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"no acceptable C compiler found in \$PATH See \`config.log' for more details" "$LINENO" 5; } # Provide some information about the compiler. $as_echo "$as_me:${as_lineno-$LINENO}: checking for C compiler version" >&5 set X $ac_compile ac_compiler=$2 for ac_option in --version -v -V -qversion; do { { ac_try="$ac_compiler $ac_option >&5" case "(($ac_try" in *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; *) ac_try_echo=$ac_try;; esac eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\"" $as_echo "$ac_try_echo"; } >&5 (eval "$ac_compiler $ac_option >&5") 2>conftest.err ac_status=$? if test -s conftest.err; then sed '10a\ ... rest of stderr output deleted ... 10q' conftest.err >conftest.er1 cat conftest.er1 >&5 fi rm -f conftest.er1 conftest.err $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; } done { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether we are using the GNU C compiler" >&5 $as_echo_n "checking whether we are using the GNU C compiler... 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It's necessary to write '\x00'==0 to get something that's true only with -std. */ int osf4_cc_array ['\x00' == 0 ? 1 : -1]; /* IBM C 6 for AIX is almost-ANSI by default, but it replaces macro parameters inside strings and character constants. */ #define FOO(x) 'x' int xlc6_cc_array[FOO(a) == 'x' ? 1 : -1]; int test (int i, double x); struct s1 {int (*f) (int a);}; struct s2 {int (*f) (double a);}; int pairnames (int, char **, FILE *(*)(struct buf *, struct stat *, int), int, int); int argc; char **argv; int main () { return f (e, argv, 0) != argv[0] || f (e, argv, 1) != argv[1]; ; return 0; } _ACEOF for ac_arg in '' -qlanglvl=extc89 -qlanglvl=ansi -std \ -Ae "-Aa -D_HPUX_SOURCE" "-Xc -D__EXTENSIONS__" do CC="$ac_save_CC $ac_arg" if ac_fn_c_try_compile "$LINENO"; then : ac_cv_prog_cc_c89=$ac_arg fi rm -f core conftest.err conftest.$ac_objext test "x$ac_cv_prog_cc_c89" != "xno" && break done rm -f conftest.$ac_ext CC=$ac_save_CC fi # AC_CACHE_VAL case "x$ac_cv_prog_cc_c89" in x) { $as_echo "$as_me:${as_lineno-$LINENO}: result: none needed" >&5 $as_echo "none needed" >&6; } ;; xno) { $as_echo "$as_me:${as_lineno-$LINENO}: result: unsupported" >&5 $as_echo "unsupported" >&6; } ;; *) CC="$CC $ac_cv_prog_cc_c89" { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_prog_cc_c89" >&5 $as_echo "$ac_cv_prog_cc_c89" >&6; } ;; esac if test "x$ac_cv_prog_cc_c89" != xno; then : fi ac_ext=c ac_cpp='$CPP $CPPFLAGS' ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' ac_compiler_gnu=$ac_cv_c_compiler_gnu ac_ext=c ac_cpp='$CPP $CPPFLAGS' ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' ac_compiler_gnu=$ac_cv_c_compiler_gnu { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether $CC understands -c and -o together" >&5 $as_echo_n "checking whether $CC understands -c and -o together... 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" >&6; } if ${ac_cv_prog_LEX+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$LEX"; then ac_cv_prog_LEX="$LEX" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_LEX="$ac_prog" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi LEX=$ac_cv_prog_LEX if test -n "$LEX"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $LEX" >&5 $as_echo "$LEX" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi test -n "$LEX" && break done test -n "$LEX" || LEX=":" if test "x$LEX" != "x:"; then cat >conftest.l <<_ACEOF %% a { ECHO; } b { REJECT; } c { yymore (); } d { yyless (1); } e { /* IRIX 6.5 flex 2.5.4 underquotes its yyless argument. */ yyless ((input () != 0)); } f { unput (yytext[0]); } . { BEGIN INITIAL; } %% #ifdef YYTEXT_POINTER extern char *yytext; #endif int main (void) { return ! yylex () + ! yywrap (); } _ACEOF { { ac_try="$LEX conftest.l" case "(($ac_try" in *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; *) ac_try_echo=$ac_try;; esac eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\"" $as_echo "$ac_try_echo"; } >&5 (eval "$LEX conftest.l") 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; } { $as_echo "$as_me:${as_lineno-$LINENO}: checking lex output file root" >&5 $as_echo_n "checking lex output file root... " >&6; } if ${ac_cv_prog_lex_root+:} false; then : $as_echo_n "(cached) " >&6 else if test -f lex.yy.c; then ac_cv_prog_lex_root=lex.yy elif test -f lexyy.c; then ac_cv_prog_lex_root=lexyy else as_fn_error $? "cannot find output from $LEX; giving up" "$LINENO" 5 fi fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_prog_lex_root" >&5 $as_echo "$ac_cv_prog_lex_root" >&6; } LEX_OUTPUT_ROOT=$ac_cv_prog_lex_root if test -z "${LEXLIB+set}"; then { $as_echo "$as_me:${as_lineno-$LINENO}: checking lex library" >&5 $as_echo_n "checking lex library... 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" >&6; } if ${ac_cv_prog_lex_yytext_pointer+:} false; then : $as_echo_n "(cached) " >&6 else # POSIX says lex can declare yytext either as a pointer or an array; the # default is implementation-dependent. Figure out which it is, since # not all implementations provide the %pointer and %array declarations. ac_cv_prog_lex_yytext_pointer=no ac_save_LIBS=$LIBS LIBS="$LEXLIB $ac_save_LIBS" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ #define YYTEXT_POINTER 1 `cat $LEX_OUTPUT_ROOT.c` _ACEOF if ac_fn_c_try_link "$LINENO"; then : ac_cv_prog_lex_yytext_pointer=yes fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_save_LIBS fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_prog_lex_yytext_pointer" >&5 $as_echo "$ac_cv_prog_lex_yytext_pointer" >&6; } if test $ac_cv_prog_lex_yytext_pointer = yes; then $as_echo "#define YYTEXT_POINTER 1" >>confdefs.h fi rm -f conftest.l $LEX_OUTPUT_ROOT.c fi if test "$LEX" = :; then LEX=${am_missing_run}flex fi for ac_prog in 'bison -y' byacc do # Extract the first word of "$ac_prog", so it can be a program name with args. set dummy $ac_prog; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_YACC+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$YACC"; then ac_cv_prog_YACC="$YACC" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_YACC="$ac_prog" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi YACC=$ac_cv_prog_YACC if test -n "$YACC"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $YACC" >&5 $as_echo "$YACC" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi test -n "$YACC" && break done test -n "$YACC" || YACC="yacc" # check for gtk-doc if test "x$ac_cv_env_PKG_CONFIG_set" != "xset"; then if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}pkg-config", so it can be a program name with args. set dummy ${ac_tool_prefix}pkg-config; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_path_PKG_CONFIG+:} false; then : $as_echo_n "(cached) " >&6 else case $PKG_CONFIG in [\\/]* | ?:[\\/]*) ac_cv_path_PKG_CONFIG="$PKG_CONFIG" # Let the user override the test with a path. ;; *) as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_path_PKG_CONFIG="$as_dir/$ac_word$ac_exec_ext" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS ;; esac fi PKG_CONFIG=$ac_cv_path_PKG_CONFIG if test -n "$PKG_CONFIG"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $PKG_CONFIG" >&5 $as_echo "$PKG_CONFIG" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_path_PKG_CONFIG"; then ac_pt_PKG_CONFIG=$PKG_CONFIG # Extract the first word of "pkg-config", so it can be a program name with args. set dummy pkg-config; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_path_ac_pt_PKG_CONFIG+:} false; then : $as_echo_n "(cached) " >&6 else case $ac_pt_PKG_CONFIG in [\\/]* | ?:[\\/]*) ac_cv_path_ac_pt_PKG_CONFIG="$ac_pt_PKG_CONFIG" # Let the user override the test with a path. ;; *) as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_path_ac_pt_PKG_CONFIG="$as_dir/$ac_word$ac_exec_ext" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS ;; esac fi ac_pt_PKG_CONFIG=$ac_cv_path_ac_pt_PKG_CONFIG if test -n "$ac_pt_PKG_CONFIG"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_pt_PKG_CONFIG" >&5 $as_echo "$ac_pt_PKG_CONFIG" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_pt_PKG_CONFIG" = x; then PKG_CONFIG="" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac PKG_CONFIG=$ac_pt_PKG_CONFIG fi else PKG_CONFIG="$ac_cv_path_PKG_CONFIG" fi fi if test -n "$PKG_CONFIG"; then _pkg_min_version=0.9.0 { $as_echo "$as_me:${as_lineno-$LINENO}: checking pkg-config is at least version $_pkg_min_version" >&5 $as_echo_n "checking pkg-config is at least version $_pkg_min_version... " >&6; } if $PKG_CONFIG --atleast-pkgconfig-version $_pkg_min_version; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 $as_echo "yes" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } PKG_CONFIG="" fi fi gtk_doc_requires="gtk-doc >= 1.14" { $as_echo "$as_me:${as_lineno-$LINENO}: checking for gtk-doc" >&5 $as_echo_n "checking for gtk-doc... " >&6; } if test -n "$PKG_CONFIG" && \ { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"\$gtk_doc_requires\""; } >&5 ($PKG_CONFIG --exists --print-errors "$gtk_doc_requires") 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then have_gtk_doc=yes else have_gtk_doc=no fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $have_gtk_doc" >&5 $as_echo "$have_gtk_doc" >&6; } if test "$have_gtk_doc" = "no"; then { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: You will not be able to create source packages with 'make dist' because $gtk_doc_requires is not found." >&5 $as_echo "$as_me: WARNING: You will not be able to create source packages with 'make dist' because $gtk_doc_requires is not found." >&2;} fi # Extract the first word of "gtkdoc-check", so it can be a program name with args. set dummy gtkdoc-check; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_GTKDOC_CHECK+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$GTKDOC_CHECK"; then ac_cv_prog_GTKDOC_CHECK="$GTKDOC_CHECK" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_GTKDOC_CHECK="gtkdoc-check.test" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi GTKDOC_CHECK=$ac_cv_prog_GTKDOC_CHECK if test -n "$GTKDOC_CHECK"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $GTKDOC_CHECK" >&5 $as_echo "$GTKDOC_CHECK" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi # Extract the first word of "gtkdoc-check", so it can be a program name with args. set dummy gtkdoc-check; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_path_GTKDOC_CHECK_PATH+:} false; then : $as_echo_n "(cached) " >&6 else case $GTKDOC_CHECK_PATH in [\\/]* | ?:[\\/]*) ac_cv_path_GTKDOC_CHECK_PATH="$GTKDOC_CHECK_PATH" # Let the user override the test with a path. ;; *) as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_path_GTKDOC_CHECK_PATH="$as_dir/$ac_word$ac_exec_ext" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS ;; esac fi GTKDOC_CHECK_PATH=$ac_cv_path_GTKDOC_CHECK_PATH if test -n "$GTKDOC_CHECK_PATH"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $GTKDOC_CHECK_PATH" >&5 $as_echo "$GTKDOC_CHECK_PATH" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi for ac_prog in gtkdoc-rebase do # Extract the first word of "$ac_prog", so it can be a program name with args. set dummy $ac_prog; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_path_GTKDOC_REBASE+:} false; then : $as_echo_n "(cached) " >&6 else case $GTKDOC_REBASE in [\\/]* | ?:[\\/]*) ac_cv_path_GTKDOC_REBASE="$GTKDOC_REBASE" # Let the user override the test with a path. ;; *) as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_path_GTKDOC_REBASE="$as_dir/$ac_word$ac_exec_ext" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS ;; esac fi GTKDOC_REBASE=$ac_cv_path_GTKDOC_REBASE if test -n "$GTKDOC_REBASE"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $GTKDOC_REBASE" >&5 $as_echo "$GTKDOC_REBASE" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi test -n "$GTKDOC_REBASE" && break done test -n "$GTKDOC_REBASE" || GTKDOC_REBASE="true" # Extract the first word of "gtkdoc-mkpdf", so it can be a program name with args. set dummy gtkdoc-mkpdf; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_path_GTKDOC_MKPDF+:} false; then : $as_echo_n "(cached) " >&6 else case $GTKDOC_MKPDF in [\\/]* | ?:[\\/]*) ac_cv_path_GTKDOC_MKPDF="$GTKDOC_MKPDF" # Let the user override the test with a path. ;; *) as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_path_GTKDOC_MKPDF="$as_dir/$ac_word$ac_exec_ext" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS ;; esac fi GTKDOC_MKPDF=$ac_cv_path_GTKDOC_MKPDF if test -n "$GTKDOC_MKPDF"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $GTKDOC_MKPDF" >&5 $as_echo "$GTKDOC_MKPDF" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi # Check whether --with-html-dir was given. if test "${with_html_dir+set}" = set; then : withval=$with_html_dir; else with_html_dir='${datadir}/gtk-doc/html' fi HTML_DIR="$with_html_dir" # Check whether --enable-gtk-doc was given. if test "${enable_gtk_doc+set}" = set; then : enableval=$enable_gtk_doc; else enable_gtk_doc=no fi { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether to build gtk-doc documentation" >&5 $as_echo_n "checking whether to build gtk-doc documentation... " >&6; } { $as_echo "$as_me:${as_lineno-$LINENO}: result: $enable_gtk_doc" >&5 $as_echo "$enable_gtk_doc" >&6; } if test "x$enable_gtk_doc" = "xyes" && test "$have_gtk_doc" = "no"; then as_fn_error $? " You must have $gtk_doc_requires installed to build documentation for $PACKAGE_NAME. Please install gtk-doc or disable building the documentation by adding '--disable-gtk-doc' to '$0'." "$LINENO" 5 fi if test "x$PACKAGE_NAME" != "xglib"; then pkg_failed=no { $as_echo "$as_me:${as_lineno-$LINENO}: checking for GTKDOC_DEPS" >&5 $as_echo_n "checking for GTKDOC_DEPS... " >&6; } if test -n "$GTKDOC_DEPS_CFLAGS"; then pkg_cv_GTKDOC_DEPS_CFLAGS="$GTKDOC_DEPS_CFLAGS" elif test -n "$PKG_CONFIG"; then if test -n "$PKG_CONFIG" && \ { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"glib-2.0 >= 2.10.0 gobject-2.0 >= 2.10.0\""; } >&5 ($PKG_CONFIG --exists --print-errors "glib-2.0 >= 2.10.0 gobject-2.0 >= 2.10.0") 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then pkg_cv_GTKDOC_DEPS_CFLAGS=`$PKG_CONFIG --cflags "glib-2.0 >= 2.10.0 gobject-2.0 >= 2.10.0" 2>/dev/null` test "x$?" != "x0" && pkg_failed=yes else pkg_failed=yes fi else pkg_failed=untried fi if test -n "$GTKDOC_DEPS_LIBS"; then pkg_cv_GTKDOC_DEPS_LIBS="$GTKDOC_DEPS_LIBS" elif test -n "$PKG_CONFIG"; then if test -n "$PKG_CONFIG" && \ { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"glib-2.0 >= 2.10.0 gobject-2.0 >= 2.10.0\""; } >&5 ($PKG_CONFIG --exists --print-errors "glib-2.0 >= 2.10.0 gobject-2.0 >= 2.10.0") 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then pkg_cv_GTKDOC_DEPS_LIBS=`$PKG_CONFIG --libs "glib-2.0 >= 2.10.0 gobject-2.0 >= 2.10.0" 2>/dev/null` test "x$?" != "x0" && pkg_failed=yes else pkg_failed=yes fi else pkg_failed=untried fi if test $pkg_failed = yes; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } if $PKG_CONFIG --atleast-pkgconfig-version 0.20; then _pkg_short_errors_supported=yes else _pkg_short_errors_supported=no fi if test $_pkg_short_errors_supported = yes; then GTKDOC_DEPS_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "glib-2.0 >= 2.10.0 gobject-2.0 >= 2.10.0" 2>&1` else GTKDOC_DEPS_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "glib-2.0 >= 2.10.0 gobject-2.0 >= 2.10.0" 2>&1` fi # Put the nasty error message in config.log where it belongs echo "$GTKDOC_DEPS_PKG_ERRORS" >&5 : elif test $pkg_failed = untried; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } : else GTKDOC_DEPS_CFLAGS=$pkg_cv_GTKDOC_DEPS_CFLAGS GTKDOC_DEPS_LIBS=$pkg_cv_GTKDOC_DEPS_LIBS { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 $as_echo "yes" >&6; } fi fi # Check whether --enable-gtk-doc-html was given. if test "${enable_gtk_doc_html+set}" = set; then : enableval=$enable_gtk_doc_html; else enable_gtk_doc_html=yes fi # Check whether --enable-gtk-doc-pdf was given. if test "${enable_gtk_doc_pdf+set}" = set; then : enableval=$enable_gtk_doc_pdf; else enable_gtk_doc_pdf=no fi if test -z "$GTKDOC_MKPDF"; then enable_gtk_doc_pdf=no fi if test -z "$AM_DEFAULT_VERBOSITY"; then AM_DEFAULT_VERBOSITY=1 fi if test x$have_gtk_doc = xyes; then HAVE_GTK_DOC_TRUE= HAVE_GTK_DOC_FALSE='#' else HAVE_GTK_DOC_TRUE='#' HAVE_GTK_DOC_FALSE= fi if test x$enable_gtk_doc = xyes; then ENABLE_GTK_DOC_TRUE= ENABLE_GTK_DOC_FALSE='#' else ENABLE_GTK_DOC_TRUE='#' ENABLE_GTK_DOC_FALSE= fi if test x$enable_gtk_doc_html = xyes; then GTK_DOC_BUILD_HTML_TRUE= GTK_DOC_BUILD_HTML_FALSE='#' else GTK_DOC_BUILD_HTML_TRUE='#' GTK_DOC_BUILD_HTML_FALSE= fi if test x$enable_gtk_doc_pdf = xyes; then GTK_DOC_BUILD_PDF_TRUE= GTK_DOC_BUILD_PDF_FALSE='#' else GTK_DOC_BUILD_PDF_TRUE='#' GTK_DOC_BUILD_PDF_FALSE= fi if test -n "$LIBTOOL"; then GTK_DOC_USE_LIBTOOL_TRUE= GTK_DOC_USE_LIBTOOL_FALSE='#' else GTK_DOC_USE_LIBTOOL_TRUE='#' GTK_DOC_USE_LIBTOOL_FALSE= fi if test -n "$GTKDOC_REBASE"; then GTK_DOC_USE_REBASE_TRUE= GTK_DOC_USE_REBASE_FALSE='#' else GTK_DOC_USE_REBASE_TRUE='#' GTK_DOC_USE_REBASE_FALSE= fi # check for rst2man for generating man pages # Extract the first word of "rst2man", so it can be a program name with args. set dummy rst2man; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_RST2MAN+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$RST2MAN"; then ac_cv_prog_RST2MAN="$RST2MAN" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_RST2MAN="yes" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS test -z "$ac_cv_prog_RST2MAN" && ac_cv_prog_RST2MAN="no" fi fi RST2MAN=$ac_cv_prog_RST2MAN if test -n "$RST2MAN"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $RST2MAN" >&5 $as_echo "$RST2MAN" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$RST2MAN" = xyes; then HAVE_RST2MAN_TRUE= HAVE_RST2MAN_FALSE='#' else HAVE_RST2MAN_TRUE='#' HAVE_RST2MAN_FALSE= fi # Checks for functions, headers, structures, etc. { $as_echo "$as_me:${as_lineno-$LINENO}: checking for ANSI C header files" >&5 $as_echo_n "checking for ANSI C header files... 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Likely further. if test -x /sbin/sysctl; then lt_cv_sys_max_cmd_len=`/sbin/sysctl -n kern.argmax` elif test -x /usr/sbin/sysctl; then lt_cv_sys_max_cmd_len=`/usr/sbin/sysctl -n kern.argmax` else lt_cv_sys_max_cmd_len=65536 # usable default for all BSDs fi # And add a safety zone lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 4` lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \* 3` ;; interix*) # We know the value 262144 and hardcode it with a safety zone (like BSD) lt_cv_sys_max_cmd_len=196608 ;; os2*) # The test takes a long time on OS/2. lt_cv_sys_max_cmd_len=8192 ;; osf*) # Dr. Hans Ekkehard Plesser reports seeing a kernel panic running configure # due to this test when exec_disable_arg_limit is 1 on Tru64. It is not # nice to cause kernel panics so lets avoid the loop below. # First set a reasonable default. lt_cv_sys_max_cmd_len=16384 # if test -x /sbin/sysconfig; then case `/sbin/sysconfig -q proc exec_disable_arg_limit` in *1*) lt_cv_sys_max_cmd_len=-1 ;; esac fi ;; sco3.2v5*) lt_cv_sys_max_cmd_len=102400 ;; sysv5* | sco5v6* | sysv4.2uw2*) kargmax=`grep ARG_MAX /etc/conf/cf.d/stune 2>/dev/null` if test -n "$kargmax"; then lt_cv_sys_max_cmd_len=`echo $kargmax | sed 's/.*[ ]//'` else lt_cv_sys_max_cmd_len=32768 fi ;; *) lt_cv_sys_max_cmd_len=`(getconf ARG_MAX) 2> /dev/null` if test -n "$lt_cv_sys_max_cmd_len" && \ test undefined != "$lt_cv_sys_max_cmd_len"; then lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 4` lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \* 3` else # Make teststring a little bigger before we do anything with it. # a 1K string should be a reasonable start. for i in 1 2 3 4 5 6 7 8; do teststring=$teststring$teststring done SHELL=${SHELL-${CONFIG_SHELL-/bin/sh}} # If test is not a shell built-in, we'll probably end up computing a # maximum length that is only half of the actual maximum length, but # we can't tell. while { test X`env echo "$teststring$teststring" 2>/dev/null` \ = "X$teststring$teststring"; } >/dev/null 2>&1 && test 17 != "$i" # 1/2 MB should be enough do i=`expr $i + 1` teststring=$teststring$teststring done # Only check the string length outside the loop. lt_cv_sys_max_cmd_len=`expr "X$teststring" : ".*" 2>&1` teststring= # Add a significant safety factor because C++ compilers can tack on # massive amounts of additional arguments before passing them to the # linker. It appears as though 1/2 is a usable value. lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 2` fi ;; esac fi if test -n "$lt_cv_sys_max_cmd_len"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_sys_max_cmd_len" >&5 $as_echo "$lt_cv_sys_max_cmd_len" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: none" >&5 $as_echo "none" >&6; } fi max_cmd_len=$lt_cv_sys_max_cmd_len : ${CP="cp -f"} : ${MV="mv -f"} : ${RM="rm -f"} if ( (MAIL=60; unset MAIL) || exit) >/dev/null 2>&1; then lt_unset=unset else lt_unset=false fi # test EBCDIC or ASCII case `echo X|tr X '\101'` in A) # ASCII based system # \n is not interpreted correctly by Solaris 8 /usr/ucb/tr lt_SP2NL='tr \040 \012' lt_NL2SP='tr \015\012 \040\040' ;; *) # EBCDIC based system lt_SP2NL='tr \100 \n' lt_NL2SP='tr \r\n \100\100' ;; esac { $as_echo "$as_me:${as_lineno-$LINENO}: checking how to convert $build file names to $host format" >&5 $as_echo_n "checking how to convert $build file names to $host format... " >&6; } if ${lt_cv_to_host_file_cmd+:} false; then : $as_echo_n "(cached) " >&6 else case $host in *-*-mingw* ) case $build in *-*-mingw* ) # actually msys lt_cv_to_host_file_cmd=func_convert_file_msys_to_w32 ;; *-*-cygwin* ) lt_cv_to_host_file_cmd=func_convert_file_cygwin_to_w32 ;; * ) # otherwise, assume *nix lt_cv_to_host_file_cmd=func_convert_file_nix_to_w32 ;; esac ;; *-*-cygwin* ) case $build in *-*-mingw* ) # actually msys lt_cv_to_host_file_cmd=func_convert_file_msys_to_cygwin ;; *-*-cygwin* ) lt_cv_to_host_file_cmd=func_convert_file_noop ;; * ) # otherwise, assume *nix lt_cv_to_host_file_cmd=func_convert_file_nix_to_cygwin ;; esac ;; * ) # unhandled hosts (and "normal" native builds) lt_cv_to_host_file_cmd=func_convert_file_noop ;; esac fi to_host_file_cmd=$lt_cv_to_host_file_cmd { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_to_host_file_cmd" >&5 $as_echo "$lt_cv_to_host_file_cmd" >&6; } { $as_echo "$as_me:${as_lineno-$LINENO}: checking how to convert $build file names to toolchain format" >&5 $as_echo_n "checking how to convert $build file names to toolchain format... " >&6; } if ${lt_cv_to_tool_file_cmd+:} false; then : $as_echo_n "(cached) " >&6 else #assume ordinary cross tools, or native build. lt_cv_to_tool_file_cmd=func_convert_file_noop case $host in *-*-mingw* ) case $build in *-*-mingw* ) # actually msys lt_cv_to_tool_file_cmd=func_convert_file_msys_to_w32 ;; esac ;; esac fi to_tool_file_cmd=$lt_cv_to_tool_file_cmd { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_to_tool_file_cmd" >&5 $as_echo "$lt_cv_to_tool_file_cmd" >&6; } { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $LD option to reload object files" >&5 $as_echo_n "checking for $LD option to reload object files... " >&6; } if ${lt_cv_ld_reload_flag+:} false; then : $as_echo_n "(cached) " >&6 else lt_cv_ld_reload_flag='-r' fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ld_reload_flag" >&5 $as_echo "$lt_cv_ld_reload_flag" >&6; } reload_flag=$lt_cv_ld_reload_flag case $reload_flag in "" | " "*) ;; *) reload_flag=" $reload_flag" ;; esac reload_cmds='$LD$reload_flag -o $output$reload_objs' case $host_os in cygwin* | mingw* | pw32* | cegcc*) if test yes != "$GCC"; then reload_cmds=false fi ;; darwin*) if test yes = "$GCC"; then reload_cmds='$LTCC $LTCFLAGS -nostdlib $wl-r -o $output$reload_objs' else reload_cmds='$LD$reload_flag -o $output$reload_objs' fi ;; esac if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}objdump", so it can be a program name with args. set dummy ${ac_tool_prefix}objdump; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_OBJDUMP+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$OBJDUMP"; then ac_cv_prog_OBJDUMP="$OBJDUMP" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_OBJDUMP="${ac_tool_prefix}objdump" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi OBJDUMP=$ac_cv_prog_OBJDUMP if test -n "$OBJDUMP"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $OBJDUMP" >&5 $as_echo "$OBJDUMP" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_OBJDUMP"; then ac_ct_OBJDUMP=$OBJDUMP # Extract the first word of "objdump", so it can be a program name with args. set dummy objdump; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_OBJDUMP+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_OBJDUMP"; then ac_cv_prog_ac_ct_OBJDUMP="$ac_ct_OBJDUMP" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_OBJDUMP="objdump" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_OBJDUMP=$ac_cv_prog_ac_ct_OBJDUMP if test -n "$ac_ct_OBJDUMP"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_OBJDUMP" >&5 $as_echo "$ac_ct_OBJDUMP" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_OBJDUMP" = x; then OBJDUMP="false" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac OBJDUMP=$ac_ct_OBJDUMP fi else OBJDUMP="$ac_cv_prog_OBJDUMP" fi test -z "$OBJDUMP" && OBJDUMP=objdump { $as_echo "$as_me:${as_lineno-$LINENO}: checking how to recognize dependent libraries" >&5 $as_echo_n "checking how to recognize dependent libraries... " >&6; } if ${lt_cv_deplibs_check_method+:} false; then : $as_echo_n "(cached) " >&6 else lt_cv_file_magic_cmd='$MAGIC_CMD' lt_cv_file_magic_test_file= lt_cv_deplibs_check_method='unknown' # Need to set the preceding variable on all platforms that support # interlibrary dependencies. # 'none' -- dependencies not supported. # 'unknown' -- same as none, but documents that we really don't know. # 'pass_all' -- all dependencies passed with no checks. # 'test_compile' -- check by making test program. # 'file_magic [[regex]]' -- check by looking for files in library path # that responds to the $file_magic_cmd with a given extended regex. # If you have 'file' or equivalent on your system and you're not sure # whether 'pass_all' will *always* work, you probably want this one. case $host_os in aix[4-9]*) lt_cv_deplibs_check_method=pass_all ;; beos*) lt_cv_deplibs_check_method=pass_all ;; bsdi[45]*) lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [ML]SB (shared object|dynamic lib)' lt_cv_file_magic_cmd='/usr/bin/file -L' lt_cv_file_magic_test_file=/shlib/libc.so ;; cygwin*) # func_win32_libid is a shell function defined in ltmain.sh lt_cv_deplibs_check_method='file_magic ^x86 archive import|^x86 DLL' lt_cv_file_magic_cmd='func_win32_libid' ;; mingw* | pw32*) # Base MSYS/MinGW do not provide the 'file' command needed by # func_win32_libid shell function, so use a weaker test based on 'objdump', # unless we find 'file', for example because we are cross-compiling. if ( file / ) >/dev/null 2>&1; then lt_cv_deplibs_check_method='file_magic ^x86 archive import|^x86 DLL' lt_cv_file_magic_cmd='func_win32_libid' else # Keep this pattern in sync with the one in func_win32_libid. lt_cv_deplibs_check_method='file_magic file format (pei*-i386(.*architecture: i386)?|pe-arm-wince|pe-x86-64)' lt_cv_file_magic_cmd='$OBJDUMP -f' fi ;; cegcc*) # use the weaker test based on 'objdump'. See mingw*. lt_cv_deplibs_check_method='file_magic file format pe-arm-.*little(.*architecture: arm)?' lt_cv_file_magic_cmd='$OBJDUMP -f' ;; darwin* | rhapsody*) lt_cv_deplibs_check_method=pass_all ;; freebsd* | dragonfly*) if echo __ELF__ | $CC -E - | $GREP __ELF__ > /dev/null; then case $host_cpu in i*86 ) # Not sure whether the presence of OpenBSD here was a mistake. # Let's accept both of them until this is cleared up. lt_cv_deplibs_check_method='file_magic (FreeBSD|OpenBSD|DragonFly)/i[3-9]86 (compact )?demand paged shared library' lt_cv_file_magic_cmd=/usr/bin/file lt_cv_file_magic_test_file=`echo /usr/lib/libc.so.*` ;; esac else lt_cv_deplibs_check_method=pass_all fi ;; haiku*) lt_cv_deplibs_check_method=pass_all ;; hpux10.20* | hpux11*) lt_cv_file_magic_cmd=/usr/bin/file case $host_cpu in ia64*) lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|ELF-[0-9][0-9]) shared object file - IA64' lt_cv_file_magic_test_file=/usr/lib/hpux32/libc.so ;; hppa*64*) lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|ELF[ -][0-9][0-9])(-bit)?( [LM]SB)? shared object( file)?[, -]* PA-RISC [0-9]\.[0-9]' lt_cv_file_magic_test_file=/usr/lib/pa20_64/libc.sl ;; *) lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|PA-RISC[0-9]\.[0-9]) shared library' lt_cv_file_magic_test_file=/usr/lib/libc.sl ;; esac ;; interix[3-9]*) # PIC code is broken on Interix 3.x, that's why |\.a not |_pic\.a here lt_cv_deplibs_check_method='match_pattern /lib[^/]+(\.so|\.a)$' ;; irix5* | irix6* | nonstopux*) case $LD in *-32|*"-32 ") libmagic=32-bit;; *-n32|*"-n32 ") libmagic=N32;; *-64|*"-64 ") libmagic=64-bit;; *) libmagic=never-match;; esac lt_cv_deplibs_check_method=pass_all ;; # This must be glibc/ELF. linux* | k*bsd*-gnu | kopensolaris*-gnu | gnu*) lt_cv_deplibs_check_method=pass_all ;; netbsd* | netbsdelf*-gnu) if echo __ELF__ | $CC -E - | $GREP __ELF__ > /dev/null; then lt_cv_deplibs_check_method='match_pattern /lib[^/]+(\.so\.[0-9]+\.[0-9]+|_pic\.a)$' else lt_cv_deplibs_check_method='match_pattern /lib[^/]+(\.so|_pic\.a)$' fi ;; newos6*) lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [ML]SB (executable|dynamic lib)' lt_cv_file_magic_cmd=/usr/bin/file lt_cv_file_magic_test_file=/usr/lib/libnls.so ;; *nto* | *qnx*) lt_cv_deplibs_check_method=pass_all ;; openbsd* | bitrig*) if test -z "`echo __ELF__ | $CC -E - | $GREP __ELF__`"; then lt_cv_deplibs_check_method='match_pattern /lib[^/]+(\.so\.[0-9]+\.[0-9]+|\.so|_pic\.a)$' else lt_cv_deplibs_check_method='match_pattern /lib[^/]+(\.so\.[0-9]+\.[0-9]+|_pic\.a)$' fi ;; osf3* | osf4* | osf5*) lt_cv_deplibs_check_method=pass_all ;; rdos*) lt_cv_deplibs_check_method=pass_all ;; solaris*) lt_cv_deplibs_check_method=pass_all ;; sysv5* | sco3.2v5* | sco5v6* | unixware* | OpenUNIX* | sysv4*uw2*) lt_cv_deplibs_check_method=pass_all ;; sysv4 | sysv4.3*) case $host_vendor in motorola) lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [ML]SB (shared object|dynamic lib) M[0-9][0-9]* Version [0-9]' lt_cv_file_magic_test_file=`echo /usr/lib/libc.so*` ;; ncr) lt_cv_deplibs_check_method=pass_all ;; sequent) lt_cv_file_magic_cmd='/bin/file' lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [LM]SB (shared object|dynamic lib )' ;; sni) lt_cv_file_magic_cmd='/bin/file' lt_cv_deplibs_check_method="file_magic ELF [0-9][0-9]*-bit [LM]SB dynamic lib" lt_cv_file_magic_test_file=/lib/libc.so ;; siemens) lt_cv_deplibs_check_method=pass_all ;; pc) lt_cv_deplibs_check_method=pass_all ;; esac ;; tpf*) lt_cv_deplibs_check_method=pass_all ;; os2*) lt_cv_deplibs_check_method=pass_all ;; esac fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_deplibs_check_method" >&5 $as_echo "$lt_cv_deplibs_check_method" >&6; } file_magic_glob= want_nocaseglob=no if test "$build" = "$host"; then case $host_os in mingw* | pw32*) if ( shopt | grep nocaseglob ) >/dev/null 2>&1; then want_nocaseglob=yes else file_magic_glob=`echo aAbBcCdDeEfFgGhHiIjJkKlLmMnNoOpPqQrRsStTuUvVwWxXyYzZ | $SED -e "s/\(..\)/s\/[\1]\/[\1]\/g;/g"` fi ;; esac fi file_magic_cmd=$lt_cv_file_magic_cmd deplibs_check_method=$lt_cv_deplibs_check_method test -z "$deplibs_check_method" && deplibs_check_method=unknown if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}dlltool", so it can be a program name with args. set dummy ${ac_tool_prefix}dlltool; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_DLLTOOL+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$DLLTOOL"; then ac_cv_prog_DLLTOOL="$DLLTOOL" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_DLLTOOL="${ac_tool_prefix}dlltool" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi DLLTOOL=$ac_cv_prog_DLLTOOL if test -n "$DLLTOOL"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $DLLTOOL" >&5 $as_echo "$DLLTOOL" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_DLLTOOL"; then ac_ct_DLLTOOL=$DLLTOOL # Extract the first word of "dlltool", so it can be a program name with args. set dummy dlltool; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_DLLTOOL+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_DLLTOOL"; then ac_cv_prog_ac_ct_DLLTOOL="$ac_ct_DLLTOOL" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_DLLTOOL="dlltool" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_DLLTOOL=$ac_cv_prog_ac_ct_DLLTOOL if test -n "$ac_ct_DLLTOOL"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_DLLTOOL" >&5 $as_echo "$ac_ct_DLLTOOL" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_DLLTOOL" = x; then DLLTOOL="false" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac DLLTOOL=$ac_ct_DLLTOOL fi else DLLTOOL="$ac_cv_prog_DLLTOOL" fi test -z "$DLLTOOL" && DLLTOOL=dlltool { $as_echo "$as_me:${as_lineno-$LINENO}: checking how to associate runtime and link libraries" >&5 $as_echo_n "checking how to associate runtime and link libraries... " >&6; } if ${lt_cv_sharedlib_from_linklib_cmd+:} false; then : $as_echo_n "(cached) " >&6 else lt_cv_sharedlib_from_linklib_cmd='unknown' case $host_os in cygwin* | mingw* | pw32* | cegcc*) # two different shell functions defined in ltmain.sh; # decide which one to use based on capabilities of $DLLTOOL case `$DLLTOOL --help 2>&1` in *--identify-strict*) lt_cv_sharedlib_from_linklib_cmd=func_cygming_dll_for_implib ;; *) lt_cv_sharedlib_from_linklib_cmd=func_cygming_dll_for_implib_fallback ;; esac ;; *) # fallback: assume linklib IS sharedlib lt_cv_sharedlib_from_linklib_cmd=$ECHO ;; esac fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_sharedlib_from_linklib_cmd" >&5 $as_echo "$lt_cv_sharedlib_from_linklib_cmd" >&6; } sharedlib_from_linklib_cmd=$lt_cv_sharedlib_from_linklib_cmd test -z "$sharedlib_from_linklib_cmd" && sharedlib_from_linklib_cmd=$ECHO if test -n "$ac_tool_prefix"; then for ac_prog in ar do # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args. set dummy $ac_tool_prefix$ac_prog; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_AR+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$AR"; then ac_cv_prog_AR="$AR" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_AR="$ac_tool_prefix$ac_prog" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi AR=$ac_cv_prog_AR if test -n "$AR"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $AR" >&5 $as_echo "$AR" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi test -n "$AR" && break done fi if test -z "$AR"; then ac_ct_AR=$AR for ac_prog in ar do # Extract the first word of "$ac_prog", so it can be a program name with args. set dummy $ac_prog; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_AR+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_AR"; then ac_cv_prog_ac_ct_AR="$ac_ct_AR" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_AR="$ac_prog" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_AR=$ac_cv_prog_ac_ct_AR if test -n "$ac_ct_AR"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_AR" >&5 $as_echo "$ac_ct_AR" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi test -n "$ac_ct_AR" && break done if test "x$ac_ct_AR" = x; then AR="false" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac AR=$ac_ct_AR fi fi : ${AR=ar} : ${AR_FLAGS=cru} { $as_echo "$as_me:${as_lineno-$LINENO}: checking for archiver @FILE support" >&5 $as_echo_n "checking for archiver @FILE support... " >&6; } if ${lt_cv_ar_at_file+:} false; then : $as_echo_n "(cached) " >&6 else lt_cv_ar_at_file=no cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ int main () { ; return 0; } _ACEOF if ac_fn_c_try_compile "$LINENO"; then : echo conftest.$ac_objext > conftest.lst lt_ar_try='$AR $AR_FLAGS libconftest.a @conftest.lst >&5' { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$lt_ar_try\""; } >&5 (eval $lt_ar_try) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; } if test 0 -eq "$ac_status"; then # Ensure the archiver fails upon bogus file names. rm -f conftest.$ac_objext libconftest.a { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$lt_ar_try\""; } >&5 (eval $lt_ar_try) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; } if test 0 -ne "$ac_status"; then lt_cv_ar_at_file=@ fi fi rm -f conftest.* libconftest.a fi rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ar_at_file" >&5 $as_echo "$lt_cv_ar_at_file" >&6; } if test no = "$lt_cv_ar_at_file"; then archiver_list_spec= else archiver_list_spec=$lt_cv_ar_at_file fi if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}strip", so it can be a program name with args. set dummy ${ac_tool_prefix}strip; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_STRIP+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$STRIP"; then ac_cv_prog_STRIP="$STRIP" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_STRIP="${ac_tool_prefix}strip" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi STRIP=$ac_cv_prog_STRIP if test -n "$STRIP"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $STRIP" >&5 $as_echo "$STRIP" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_STRIP"; then ac_ct_STRIP=$STRIP # Extract the first word of "strip", so it can be a program name with args. set dummy strip; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_STRIP+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_STRIP"; then ac_cv_prog_ac_ct_STRIP="$ac_ct_STRIP" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_STRIP="strip" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_STRIP=$ac_cv_prog_ac_ct_STRIP if test -n "$ac_ct_STRIP"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_STRIP" >&5 $as_echo "$ac_ct_STRIP" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_STRIP" = x; then STRIP=":" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac STRIP=$ac_ct_STRIP fi else STRIP="$ac_cv_prog_STRIP" fi test -z "$STRIP" && STRIP=: if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}ranlib", so it can be a program name with args. set dummy ${ac_tool_prefix}ranlib; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_RANLIB+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$RANLIB"; then ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_RANLIB="${ac_tool_prefix}ranlib" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi RANLIB=$ac_cv_prog_RANLIB if test -n "$RANLIB"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $RANLIB" >&5 $as_echo "$RANLIB" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_RANLIB"; then ac_ct_RANLIB=$RANLIB # Extract the first word of "ranlib", so it can be a program name with args. set dummy ranlib; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_RANLIB+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_RANLIB"; then ac_cv_prog_ac_ct_RANLIB="$ac_ct_RANLIB" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_RANLIB="ranlib" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_RANLIB=$ac_cv_prog_ac_ct_RANLIB if test -n "$ac_ct_RANLIB"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_RANLIB" >&5 $as_echo "$ac_ct_RANLIB" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_RANLIB" = x; then RANLIB=":" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac RANLIB=$ac_ct_RANLIB fi else RANLIB="$ac_cv_prog_RANLIB" fi test -z "$RANLIB" && RANLIB=: # Determine commands to create old-style static archives. old_archive_cmds='$AR $AR_FLAGS $oldlib$oldobjs' old_postinstall_cmds='chmod 644 $oldlib' old_postuninstall_cmds= if test -n "$RANLIB"; then case $host_os in bitrig* | openbsd*) old_postinstall_cmds="$old_postinstall_cmds~\$RANLIB -t \$tool_oldlib" ;; *) old_postinstall_cmds="$old_postinstall_cmds~\$RANLIB \$tool_oldlib" ;; esac old_archive_cmds="$old_archive_cmds~\$RANLIB \$tool_oldlib" fi case $host_os in darwin*) lock_old_archive_extraction=yes ;; *) lock_old_archive_extraction=no ;; esac # If no C compiler was specified, use CC. LTCC=${LTCC-"$CC"} # If no C compiler flags were specified, use CFLAGS. LTCFLAGS=${LTCFLAGS-"$CFLAGS"} # Allow CC to be a program name with arguments. compiler=$CC # Check for command to grab the raw symbol name followed by C symbol from nm. { $as_echo "$as_me:${as_lineno-$LINENO}: checking command to parse $NM output from $compiler object" >&5 $as_echo_n "checking command to parse $NM output from $compiler object... " >&6; } if ${lt_cv_sys_global_symbol_pipe+:} false; then : $as_echo_n "(cached) " >&6 else # These are sane defaults that work on at least a few old systems. # [They come from Ultrix. What could be older than Ultrix?!! ;)] # Character class describing NM global symbol codes. symcode='[BCDEGRST]' # Regexp to match symbols that can be accessed directly from C. sympat='\([_A-Za-z][_A-Za-z0-9]*\)' # Define system-specific variables. case $host_os in aix*) symcode='[BCDT]' ;; cygwin* | mingw* | pw32* | cegcc*) symcode='[ABCDGISTW]' ;; hpux*) if test ia64 = "$host_cpu"; then symcode='[ABCDEGRST]' fi ;; irix* | nonstopux*) symcode='[BCDEGRST]' ;; osf*) symcode='[BCDEGQRST]' ;; solaris*) symcode='[BDRT]' ;; sco3.2v5*) symcode='[DT]' ;; sysv4.2uw2*) symcode='[DT]' ;; sysv5* | sco5v6* | unixware* | OpenUNIX*) symcode='[ABDT]' ;; sysv4) symcode='[DFNSTU]' ;; esac # If we're using GNU nm, then use its standard symbol codes. case `$NM -V 2>&1` in *GNU* | *'with BFD'*) symcode='[ABCDGIRSTW]' ;; esac if test "$lt_cv_nm_interface" = "MS dumpbin"; then # Gets list of data symbols to import. lt_cv_sys_global_symbol_to_import="sed -n -e 's/^I .* \(.*\)$/\1/p'" # Adjust the below global symbol transforms to fixup imported variables. lt_cdecl_hook=" -e 's/^I .* \(.*\)$/extern __declspec(dllimport) char \1;/p'" lt_c_name_hook=" -e 's/^I .* \(.*\)$/ {\"\1\", (void *) 0},/p'" lt_c_name_lib_hook="\ -e 's/^I .* \(lib.*\)$/ {\"\1\", (void *) 0},/p'\ -e 's/^I .* \(.*\)$/ {\"lib\1\", (void *) 0},/p'" else # Disable hooks by default. lt_cv_sys_global_symbol_to_import= lt_cdecl_hook= lt_c_name_hook= lt_c_name_lib_hook= fi # Transform an extracted symbol line into a proper C declaration. # Some systems (esp. on ia64) link data and code symbols differently, # so use this general approach. lt_cv_sys_global_symbol_to_cdecl="sed -n"\ $lt_cdecl_hook\ " -e 's/^T .* \(.*\)$/extern int \1();/p'"\ " -e 's/^$symcode$symcode* .* \(.*\)$/extern char \1;/p'" # Transform an extracted symbol line into symbol name and symbol address lt_cv_sys_global_symbol_to_c_name_address="sed -n"\ $lt_c_name_hook\ " -e 's/^: \(.*\) .*$/ {\"\1\", (void *) 0},/p'"\ " -e 's/^$symcode$symcode* .* \(.*\)$/ {\"\1\", (void *) \&\1},/p'" # Transform an extracted symbol line into symbol name with lib prefix and # symbol address. lt_cv_sys_global_symbol_to_c_name_address_lib_prefix="sed -n"\ $lt_c_name_lib_hook\ " -e 's/^: \(.*\) .*$/ {\"\1\", (void *) 0},/p'"\ " -e 's/^$symcode$symcode* .* \(lib.*\)$/ {\"\1\", (void *) \&\1},/p'"\ " -e 's/^$symcode$symcode* .* \(.*\)$/ {\"lib\1\", (void *) \&\1},/p'" # Handle CRLF in mingw tool chain opt_cr= case $build_os in mingw*) opt_cr=`$ECHO 'x\{0,1\}' | tr x '\015'` # option cr in regexp ;; esac # Try without a prefix underscore, then with it. for ac_symprfx in "" "_"; do # Transform symcode, sympat, and symprfx into a raw symbol and a C symbol. symxfrm="\\1 $ac_symprfx\\2 \\2" # Write the raw and C identifiers. if test "$lt_cv_nm_interface" = "MS dumpbin"; then # Fake it for dumpbin and say T for any non-static function, # D for any global variable and I for any imported variable. # Also find C++ and __fastcall symbols from MSVC++, # which start with @ or ?. lt_cv_sys_global_symbol_pipe="$AWK '"\ " {last_section=section; section=\$ 3};"\ " /^COFF SYMBOL TABLE/{for(i in hide) delete hide[i]};"\ " /Section length .*#relocs.*(pick any)/{hide[last_section]=1};"\ " /^ *Symbol name *: /{split(\$ 0,sn,\":\"); si=substr(sn[2],2)};"\ " /^ *Type *: code/{print \"T\",si,substr(si,length(prfx))};"\ " /^ *Type *: data/{print \"I\",si,substr(si,length(prfx))};"\ " \$ 0!~/External *\|/{next};"\ " / 0+ UNDEF /{next}; / UNDEF \([^|]\)*()/{next};"\ " {if(hide[section]) next};"\ " {f=\"D\"}; \$ 0~/\(\).*\|/{f=\"T\"};"\ " {split(\$ 0,a,/\||\r/); split(a[2],s)};"\ " s[1]~/^[@?]/{print f,s[1],s[1]; next};"\ " s[1]~prfx {split(s[1],t,\"@\"); print f,t[1],substr(t[1],length(prfx))}"\ " ' prfx=^$ac_symprfx" else lt_cv_sys_global_symbol_pipe="sed -n -e 's/^.*[ ]\($symcode$symcode*\)[ ][ ]*$ac_symprfx$sympat$opt_cr$/$symxfrm/p'" fi lt_cv_sys_global_symbol_pipe="$lt_cv_sys_global_symbol_pipe | sed '/ __gnu_lto/d'" # Check to see that the pipe works correctly. pipe_works=no rm -f conftest* cat > conftest.$ac_ext <<_LT_EOF #ifdef __cplusplus extern "C" { #endif char nm_test_var; void nm_test_func(void); void nm_test_func(void){} #ifdef __cplusplus } #endif int main(){nm_test_var='a';nm_test_func();return(0);} _LT_EOF if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5 (eval $ac_compile) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then # Now try to grab the symbols. nlist=conftest.nm if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$NM conftest.$ac_objext \| "$lt_cv_sys_global_symbol_pipe" \> $nlist\""; } >&5 (eval $NM conftest.$ac_objext \| "$lt_cv_sys_global_symbol_pipe" \> $nlist) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; } && test -s "$nlist"; then # Try sorting and uniquifying the output. if sort "$nlist" | uniq > "$nlist"T; then mv -f "$nlist"T "$nlist" else rm -f "$nlist"T fi # Make sure that we snagged all the symbols we need. if $GREP ' nm_test_var$' "$nlist" >/dev/null; then if $GREP ' nm_test_func$' "$nlist" >/dev/null; then cat <<_LT_EOF > conftest.$ac_ext /* Keep this code in sync between libtool.m4, ltmain, lt_system.h, and tests. */ #if defined _WIN32 || defined __CYGWIN__ || defined _WIN32_WCE /* DATA imports from DLLs on WIN32 can't be const, because runtime relocations are performed -- see ld's documentation on pseudo-relocs. */ # define LT_DLSYM_CONST #elif defined __osf__ /* This system does not cope well with relocations in const data. */ # define LT_DLSYM_CONST #else # define LT_DLSYM_CONST const #endif #ifdef __cplusplus extern "C" { #endif _LT_EOF # Now generate the symbol file. eval "$lt_cv_sys_global_symbol_to_cdecl"' < "$nlist" | $GREP -v main >> conftest.$ac_ext' cat <<_LT_EOF >> conftest.$ac_ext /* The mapping between symbol names and symbols. */ LT_DLSYM_CONST struct { const char *name; void *address; } lt__PROGRAM__LTX_preloaded_symbols[] = { { "@PROGRAM@", (void *) 0 }, _LT_EOF $SED "s/^$symcode$symcode* .* \(.*\)$/ {\"\1\", (void *) \&\1},/" < "$nlist" | $GREP -v main >> conftest.$ac_ext cat <<\_LT_EOF >> conftest.$ac_ext {0, (void *) 0} }; /* This works around a problem in FreeBSD linker */ #ifdef FREEBSD_WORKAROUND static const void *lt_preloaded_setup() { return lt__PROGRAM__LTX_preloaded_symbols; } #endif #ifdef __cplusplus } #endif _LT_EOF # Now try linking the two files. mv conftest.$ac_objext conftstm.$ac_objext lt_globsym_save_LIBS=$LIBS lt_globsym_save_CFLAGS=$CFLAGS LIBS=conftstm.$ac_objext CFLAGS="$CFLAGS$lt_prog_compiler_no_builtin_flag" if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_link\""; } >&5 (eval $ac_link) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; } && test -s conftest$ac_exeext; then pipe_works=yes fi LIBS=$lt_globsym_save_LIBS CFLAGS=$lt_globsym_save_CFLAGS else echo "cannot find nm_test_func in $nlist" >&5 fi else echo "cannot find nm_test_var in $nlist" >&5 fi else echo "cannot run $lt_cv_sys_global_symbol_pipe" >&5 fi else echo "$progname: failed program was:" >&5 cat conftest.$ac_ext >&5 fi rm -rf conftest* conftst* # Do not use the global_symbol_pipe unless it works. if test yes = "$pipe_works"; then break else lt_cv_sys_global_symbol_pipe= fi done fi if test -z "$lt_cv_sys_global_symbol_pipe"; then lt_cv_sys_global_symbol_to_cdecl= fi if test -z "$lt_cv_sys_global_symbol_pipe$lt_cv_sys_global_symbol_to_cdecl"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: failed" >&5 $as_echo "failed" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok" >&5 $as_echo "ok" >&6; } fi # Response file support. if test "$lt_cv_nm_interface" = "MS dumpbin"; then nm_file_list_spec='@' elif $NM --help 2>/dev/null | grep '[@]FILE' >/dev/null; then nm_file_list_spec='@' fi { $as_echo "$as_me:${as_lineno-$LINENO}: checking for sysroot" >&5 $as_echo_n "checking for sysroot... " >&6; } # Check whether --with-sysroot was given. if test "${with_sysroot+set}" = set; then : withval=$with_sysroot; else with_sysroot=no fi lt_sysroot= case $with_sysroot in #( yes) if test yes = "$GCC"; then lt_sysroot=`$CC --print-sysroot 2>/dev/null` fi ;; #( /*) lt_sysroot=`echo "$with_sysroot" | sed -e "$sed_quote_subst"` ;; #( no|'') ;; #( *) { $as_echo "$as_me:${as_lineno-$LINENO}: result: $with_sysroot" >&5 $as_echo "$with_sysroot" >&6; } as_fn_error $? "The sysroot must be an absolute path." "$LINENO" 5 ;; esac { $as_echo "$as_me:${as_lineno-$LINENO}: result: ${lt_sysroot:-no}" >&5 $as_echo "${lt_sysroot:-no}" >&6; } { $as_echo "$as_me:${as_lineno-$LINENO}: checking for a working dd" >&5 $as_echo_n "checking for a working dd... " >&6; } if ${ac_cv_path_lt_DD+:} false; then : $as_echo_n "(cached) " >&6 else printf 0123456789abcdef0123456789abcdef >conftest.i cat conftest.i conftest.i >conftest2.i : ${lt_DD:=$DD} if test -z "$lt_DD"; then ac_path_lt_DD_found=false # Loop through the user's path and test for each of PROGNAME-LIST as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_prog in dd; do for ac_exec_ext in '' $ac_executable_extensions; do ac_path_lt_DD="$as_dir/$ac_prog$ac_exec_ext" as_fn_executable_p "$ac_path_lt_DD" || continue if "$ac_path_lt_DD" bs=32 count=1 conftest.out 2>/dev/null; then cmp -s conftest.i conftest.out \ && ac_cv_path_lt_DD="$ac_path_lt_DD" ac_path_lt_DD_found=: fi $ac_path_lt_DD_found && break 3 done done done IFS=$as_save_IFS if test -z "$ac_cv_path_lt_DD"; then : fi else ac_cv_path_lt_DD=$lt_DD fi rm -f conftest.i conftest2.i conftest.out fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_path_lt_DD" >&5 $as_echo "$ac_cv_path_lt_DD" >&6; } { $as_echo "$as_me:${as_lineno-$LINENO}: checking how to truncate binary pipes" >&5 $as_echo_n "checking how to truncate binary pipes... " >&6; } if ${lt_cv_truncate_bin+:} false; then : $as_echo_n "(cached) " >&6 else printf 0123456789abcdef0123456789abcdef >conftest.i cat conftest.i conftest.i >conftest2.i lt_cv_truncate_bin= if "$ac_cv_path_lt_DD" bs=32 count=1 conftest.out 2>/dev/null; then cmp -s conftest.i conftest.out \ && lt_cv_truncate_bin="$ac_cv_path_lt_DD bs=4096 count=1" fi rm -f conftest.i conftest2.i conftest.out test -z "$lt_cv_truncate_bin" && lt_cv_truncate_bin="$SED -e 4q" fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_truncate_bin" >&5 $as_echo "$lt_cv_truncate_bin" >&6; } # Calculate cc_basename. Skip known compiler wrappers and cross-prefix. func_cc_basename () { for cc_temp in $*""; do case $cc_temp in compile | *[\\/]compile | ccache | *[\\/]ccache ) ;; distcc | *[\\/]distcc | purify | *[\\/]purify ) ;; \-*) ;; *) break;; esac done func_cc_basename_result=`$ECHO "$cc_temp" | $SED "s%.*/%%; s%^$host_alias-%%"` } # Check whether --enable-libtool-lock was given. if test "${enable_libtool_lock+set}" = set; then : enableval=$enable_libtool_lock; fi test no = "$enable_libtool_lock" || enable_libtool_lock=yes # Some flags need to be propagated to the compiler or linker for good # libtool support. case $host in ia64-*-hpux*) # Find out what ABI is being produced by ac_compile, and set mode # options accordingly. echo 'int i;' > conftest.$ac_ext if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5 (eval $ac_compile) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then case `/usr/bin/file conftest.$ac_objext` in *ELF-32*) HPUX_IA64_MODE=32 ;; *ELF-64*) HPUX_IA64_MODE=64 ;; esac fi rm -rf conftest* ;; *-*-irix6*) # Find out what ABI is being produced by ac_compile, and set linker # options accordingly. echo '#line '$LINENO' "configure"' > conftest.$ac_ext if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5 (eval $ac_compile) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then if test yes = "$lt_cv_prog_gnu_ld"; then case `/usr/bin/file conftest.$ac_objext` in *32-bit*) LD="${LD-ld} -melf32bsmip" ;; *N32*) LD="${LD-ld} -melf32bmipn32" ;; *64-bit*) LD="${LD-ld} -melf64bmip" ;; esac else case `/usr/bin/file conftest.$ac_objext` in *32-bit*) LD="${LD-ld} -32" ;; *N32*) LD="${LD-ld} -n32" ;; *64-bit*) LD="${LD-ld} -64" ;; esac fi fi rm -rf conftest* ;; mips64*-*linux*) # Find out what ABI is being produced by ac_compile, and set linker # options accordingly. echo '#line '$LINENO' "configure"' > conftest.$ac_ext if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5 (eval $ac_compile) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then emul=elf case `/usr/bin/file conftest.$ac_objext` in *32-bit*) emul="${emul}32" ;; *64-bit*) emul="${emul}64" ;; esac case `/usr/bin/file conftest.$ac_objext` in *MSB*) emul="${emul}btsmip" ;; *LSB*) emul="${emul}ltsmip" ;; esac case `/usr/bin/file conftest.$ac_objext` in *N32*) emul="${emul}n32" ;; esac LD="${LD-ld} -m $emul" fi rm -rf conftest* ;; x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) # Find out what ABI is being produced by ac_compile, and set linker # options accordingly. Note that the listed cases only cover the # situations where additional linker options are needed (such as when # doing 32-bit compilation for a host where ld defaults to 64-bit, or # vice versa); the common cases where no linker options are needed do # not appear in the list. echo 'int i;' > conftest.$ac_ext if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5 (eval $ac_compile) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then case `/usr/bin/file conftest.o` in *32-bit*) case $host in x86_64-*kfreebsd*-gnu) LD="${LD-ld} -m elf_i386_fbsd" ;; x86_64-*linux*) case `/usr/bin/file conftest.o` in *x86-64*) LD="${LD-ld} -m elf32_x86_64" ;; *) LD="${LD-ld} -m elf_i386" ;; esac ;; powerpc64le-*linux*) LD="${LD-ld} -m elf32lppclinux" ;; powerpc64-*linux*) LD="${LD-ld} -m elf32ppclinux" ;; s390x-*linux*) LD="${LD-ld} -m elf_s390" ;; sparc64-*linux*) LD="${LD-ld} -m elf32_sparc" ;; esac ;; *64-bit*) case $host in x86_64-*kfreebsd*-gnu) LD="${LD-ld} -m elf_x86_64_fbsd" ;; x86_64-*linux*) LD="${LD-ld} -m elf_x86_64" ;; powerpcle-*linux*) LD="${LD-ld} -m elf64lppc" ;; powerpc-*linux*) LD="${LD-ld} -m elf64ppc" ;; s390*-*linux*|s390*-*tpf*) LD="${LD-ld} -m elf64_s390" ;; sparc*-*linux*) LD="${LD-ld} -m elf64_sparc" ;; esac ;; esac fi rm -rf conftest* ;; *-*-sco3.2v5*) # On SCO OpenServer 5, we need -belf to get full-featured binaries. SAVE_CFLAGS=$CFLAGS CFLAGS="$CFLAGS -belf" { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether the C compiler needs -belf" >&5 $as_echo_n "checking whether the C compiler needs -belf... " >&6; } if ${lt_cv_cc_needs_belf+:} false; then : $as_echo_n "(cached) " >&6 else ac_ext=c ac_cpp='$CPP $CPPFLAGS' ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' ac_compiler_gnu=$ac_cv_c_compiler_gnu cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ int main () { ; return 0; } _ACEOF if ac_fn_c_try_link "$LINENO"; then : lt_cv_cc_needs_belf=yes else lt_cv_cc_needs_belf=no fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext ac_ext=c ac_cpp='$CPP $CPPFLAGS' ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' ac_compiler_gnu=$ac_cv_c_compiler_gnu fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_cc_needs_belf" >&5 $as_echo "$lt_cv_cc_needs_belf" >&6; } if test yes != "$lt_cv_cc_needs_belf"; then # this is probably gcc 2.8.0, egcs 1.0 or newer; no need for -belf CFLAGS=$SAVE_CFLAGS fi ;; *-*solaris*) # Find out what ABI is being produced by ac_compile, and set linker # options accordingly. echo 'int i;' > conftest.$ac_ext if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5 (eval $ac_compile) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then case `/usr/bin/file conftest.o` in *64-bit*) case $lt_cv_prog_gnu_ld in yes*) case $host in i?86-*-solaris*|x86_64-*-solaris*) LD="${LD-ld} -m elf_x86_64" ;; sparc*-*-solaris*) LD="${LD-ld} -m elf64_sparc" ;; esac # GNU ld 2.21 introduced _sol2 emulations. Use them if available. if ${LD-ld} -V | grep _sol2 >/dev/null 2>&1; then LD=${LD-ld}_sol2 fi ;; *) if ${LD-ld} -64 -r -o conftest2.o conftest.o >/dev/null 2>&1; then LD="${LD-ld} -64" fi ;; esac ;; esac fi rm -rf conftest* ;; esac need_locks=$enable_libtool_lock if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}mt", so it can be a program name with args. set dummy ${ac_tool_prefix}mt; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_MANIFEST_TOOL+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$MANIFEST_TOOL"; then ac_cv_prog_MANIFEST_TOOL="$MANIFEST_TOOL" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_MANIFEST_TOOL="${ac_tool_prefix}mt" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi MANIFEST_TOOL=$ac_cv_prog_MANIFEST_TOOL if test -n "$MANIFEST_TOOL"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $MANIFEST_TOOL" >&5 $as_echo "$MANIFEST_TOOL" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_MANIFEST_TOOL"; then ac_ct_MANIFEST_TOOL=$MANIFEST_TOOL # Extract the first word of "mt", so it can be a program name with args. set dummy mt; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_MANIFEST_TOOL+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_MANIFEST_TOOL"; then ac_cv_prog_ac_ct_MANIFEST_TOOL="$ac_ct_MANIFEST_TOOL" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_MANIFEST_TOOL="mt" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_MANIFEST_TOOL=$ac_cv_prog_ac_ct_MANIFEST_TOOL if test -n "$ac_ct_MANIFEST_TOOL"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_MANIFEST_TOOL" >&5 $as_echo "$ac_ct_MANIFEST_TOOL" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_MANIFEST_TOOL" = x; then MANIFEST_TOOL=":" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac MANIFEST_TOOL=$ac_ct_MANIFEST_TOOL fi else MANIFEST_TOOL="$ac_cv_prog_MANIFEST_TOOL" fi test -z "$MANIFEST_TOOL" && MANIFEST_TOOL=mt { $as_echo "$as_me:${as_lineno-$LINENO}: checking if $MANIFEST_TOOL is a manifest tool" >&5 $as_echo_n "checking if $MANIFEST_TOOL is a manifest tool... " >&6; } if ${lt_cv_path_mainfest_tool+:} false; then : $as_echo_n "(cached) " >&6 else lt_cv_path_mainfest_tool=no echo "$as_me:$LINENO: $MANIFEST_TOOL '-?'" >&5 $MANIFEST_TOOL '-?' 2>conftest.err > conftest.out cat conftest.err >&5 if $GREP 'Manifest Tool' conftest.out > /dev/null; then lt_cv_path_mainfest_tool=yes fi rm -f conftest* fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_path_mainfest_tool" >&5 $as_echo "$lt_cv_path_mainfest_tool" >&6; } if test yes != "$lt_cv_path_mainfest_tool"; then MANIFEST_TOOL=: fi case $host_os in rhapsody* | darwin*) if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}dsymutil", so it can be a program name with args. set dummy ${ac_tool_prefix}dsymutil; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_DSYMUTIL+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$DSYMUTIL"; then ac_cv_prog_DSYMUTIL="$DSYMUTIL" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_DSYMUTIL="${ac_tool_prefix}dsymutil" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi DSYMUTIL=$ac_cv_prog_DSYMUTIL if test -n "$DSYMUTIL"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $DSYMUTIL" >&5 $as_echo "$DSYMUTIL" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_DSYMUTIL"; then ac_ct_DSYMUTIL=$DSYMUTIL # Extract the first word of "dsymutil", so it can be a program name with args. set dummy dsymutil; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_DSYMUTIL+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_DSYMUTIL"; then ac_cv_prog_ac_ct_DSYMUTIL="$ac_ct_DSYMUTIL" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_DSYMUTIL="dsymutil" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_DSYMUTIL=$ac_cv_prog_ac_ct_DSYMUTIL if test -n "$ac_ct_DSYMUTIL"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_DSYMUTIL" >&5 $as_echo "$ac_ct_DSYMUTIL" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_DSYMUTIL" = x; then DSYMUTIL=":" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac DSYMUTIL=$ac_ct_DSYMUTIL fi else DSYMUTIL="$ac_cv_prog_DSYMUTIL" fi if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}nmedit", so it can be a program name with args. set dummy ${ac_tool_prefix}nmedit; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_NMEDIT+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$NMEDIT"; then ac_cv_prog_NMEDIT="$NMEDIT" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_NMEDIT="${ac_tool_prefix}nmedit" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi NMEDIT=$ac_cv_prog_NMEDIT if test -n "$NMEDIT"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $NMEDIT" >&5 $as_echo "$NMEDIT" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_NMEDIT"; then ac_ct_NMEDIT=$NMEDIT # Extract the first word of "nmedit", so it can be a program name with args. set dummy nmedit; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_NMEDIT+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_NMEDIT"; then ac_cv_prog_ac_ct_NMEDIT="$ac_ct_NMEDIT" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_NMEDIT="nmedit" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_NMEDIT=$ac_cv_prog_ac_ct_NMEDIT if test -n "$ac_ct_NMEDIT"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_NMEDIT" >&5 $as_echo "$ac_ct_NMEDIT" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_NMEDIT" = x; then NMEDIT=":" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac NMEDIT=$ac_ct_NMEDIT fi else NMEDIT="$ac_cv_prog_NMEDIT" fi if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}lipo", so it can be a program name with args. set dummy ${ac_tool_prefix}lipo; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_LIPO+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$LIPO"; then ac_cv_prog_LIPO="$LIPO" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_LIPO="${ac_tool_prefix}lipo" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi LIPO=$ac_cv_prog_LIPO if test -n "$LIPO"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $LIPO" >&5 $as_echo "$LIPO" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_LIPO"; then ac_ct_LIPO=$LIPO # Extract the first word of "lipo", so it can be a program name with args. set dummy lipo; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_LIPO+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_LIPO"; then ac_cv_prog_ac_ct_LIPO="$ac_ct_LIPO" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_LIPO="lipo" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_LIPO=$ac_cv_prog_ac_ct_LIPO if test -n "$ac_ct_LIPO"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_LIPO" >&5 $as_echo "$ac_ct_LIPO" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_LIPO" = x; then LIPO=":" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac LIPO=$ac_ct_LIPO fi else LIPO="$ac_cv_prog_LIPO" fi if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}otool", so it can be a program name with args. set dummy ${ac_tool_prefix}otool; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_OTOOL+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$OTOOL"; then ac_cv_prog_OTOOL="$OTOOL" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_OTOOL="${ac_tool_prefix}otool" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi OTOOL=$ac_cv_prog_OTOOL if test -n "$OTOOL"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $OTOOL" >&5 $as_echo "$OTOOL" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_OTOOL"; then ac_ct_OTOOL=$OTOOL # Extract the first word of "otool", so it can be a program name with args. set dummy otool; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_OTOOL+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_OTOOL"; then ac_cv_prog_ac_ct_OTOOL="$ac_ct_OTOOL" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_OTOOL="otool" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_OTOOL=$ac_cv_prog_ac_ct_OTOOL if test -n "$ac_ct_OTOOL"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_OTOOL" >&5 $as_echo "$ac_ct_OTOOL" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_OTOOL" = x; then OTOOL=":" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac OTOOL=$ac_ct_OTOOL fi else OTOOL="$ac_cv_prog_OTOOL" fi if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}otool64", so it can be a program name with args. set dummy ${ac_tool_prefix}otool64; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_OTOOL64+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$OTOOL64"; then ac_cv_prog_OTOOL64="$OTOOL64" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_OTOOL64="${ac_tool_prefix}otool64" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi OTOOL64=$ac_cv_prog_OTOOL64 if test -n "$OTOOL64"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $OTOOL64" >&5 $as_echo "$OTOOL64" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_OTOOL64"; then ac_ct_OTOOL64=$OTOOL64 # Extract the first word of "otool64", so it can be a program name with args. set dummy otool64; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_OTOOL64+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_OTOOL64"; then ac_cv_prog_ac_ct_OTOOL64="$ac_ct_OTOOL64" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_OTOOL64="otool64" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_OTOOL64=$ac_cv_prog_ac_ct_OTOOL64 if test -n "$ac_ct_OTOOL64"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_OTOOL64" >&5 $as_echo "$ac_ct_OTOOL64" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_OTOOL64" = x; then OTOOL64=":" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac OTOOL64=$ac_ct_OTOOL64 fi else OTOOL64="$ac_cv_prog_OTOOL64" fi { $as_echo "$as_me:${as_lineno-$LINENO}: checking for -single_module linker flag" >&5 $as_echo_n "checking for -single_module linker flag... " >&6; } if ${lt_cv_apple_cc_single_mod+:} false; then : $as_echo_n "(cached) " >&6 else lt_cv_apple_cc_single_mod=no if test -z "$LT_MULTI_MODULE"; then # By default we will add the -single_module flag. You can override # by either setting the environment variable LT_MULTI_MODULE # non-empty at configure time, or by adding -multi_module to the # link flags. rm -rf libconftest.dylib* echo "int foo(void){return 1;}" > conftest.c echo "$LTCC $LTCFLAGS $LDFLAGS -o libconftest.dylib \ -dynamiclib -Wl,-single_module conftest.c" >&5 $LTCC $LTCFLAGS $LDFLAGS -o libconftest.dylib \ -dynamiclib -Wl,-single_module conftest.c 2>conftest.err _lt_result=$? # If there is a non-empty error log, and "single_module" # appears in it, assume the flag caused a linker warning if test -s conftest.err && $GREP single_module conftest.err; then cat conftest.err >&5 # Otherwise, if the output was created with a 0 exit code from # the compiler, it worked. elif test -f libconftest.dylib && test 0 = "$_lt_result"; then lt_cv_apple_cc_single_mod=yes else cat conftest.err >&5 fi rm -rf libconftest.dylib* rm -f conftest.* fi fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_apple_cc_single_mod" >&5 $as_echo "$lt_cv_apple_cc_single_mod" >&6; } { $as_echo "$as_me:${as_lineno-$LINENO}: checking for -exported_symbols_list linker flag" >&5 $as_echo_n "checking for -exported_symbols_list linker flag... " >&6; } if ${lt_cv_ld_exported_symbols_list+:} false; then : $as_echo_n "(cached) " >&6 else lt_cv_ld_exported_symbols_list=no save_LDFLAGS=$LDFLAGS echo "_main" > conftest.sym LDFLAGS="$LDFLAGS -Wl,-exported_symbols_list,conftest.sym" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ int main () { ; return 0; } _ACEOF if ac_fn_c_try_link "$LINENO"; then : lt_cv_ld_exported_symbols_list=yes else lt_cv_ld_exported_symbols_list=no fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LDFLAGS=$save_LDFLAGS fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ld_exported_symbols_list" >&5 $as_echo "$lt_cv_ld_exported_symbols_list" >&6; } { $as_echo "$as_me:${as_lineno-$LINENO}: checking for -force_load linker flag" >&5 $as_echo_n "checking for -force_load linker flag... " >&6; } if ${lt_cv_ld_force_load+:} false; then : $as_echo_n "(cached) " >&6 else lt_cv_ld_force_load=no cat > conftest.c << _LT_EOF int forced_loaded() { return 2;} _LT_EOF echo "$LTCC $LTCFLAGS -c -o conftest.o conftest.c" >&5 $LTCC $LTCFLAGS -c -o conftest.o conftest.c 2>&5 echo "$AR cru libconftest.a conftest.o" >&5 $AR cru libconftest.a conftest.o 2>&5 echo "$RANLIB libconftest.a" >&5 $RANLIB libconftest.a 2>&5 cat > conftest.c << _LT_EOF int main() { return 0;} _LT_EOF echo "$LTCC $LTCFLAGS $LDFLAGS -o conftest conftest.c -Wl,-force_load,./libconftest.a" >&5 $LTCC $LTCFLAGS $LDFLAGS -o conftest conftest.c -Wl,-force_load,./libconftest.a 2>conftest.err _lt_result=$? if test -s conftest.err && $GREP force_load conftest.err; then cat conftest.err >&5 elif test -f conftest && test 0 = "$_lt_result" && $GREP forced_load conftest >/dev/null 2>&1; then lt_cv_ld_force_load=yes else cat conftest.err >&5 fi rm -f conftest.err libconftest.a conftest conftest.c rm -rf conftest.dSYM fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ld_force_load" >&5 $as_echo "$lt_cv_ld_force_load" >&6; } case $host_os in rhapsody* | darwin1.[012]) _lt_dar_allow_undefined='$wl-undefined ${wl}suppress' ;; darwin1.*) _lt_dar_allow_undefined='$wl-flat_namespace $wl-undefined ${wl}suppress' ;; darwin*) # darwin 5.x on # if running on 10.5 or later, the deployment target defaults # to the OS version, if on x86, and 10.4, the deployment # target defaults to 10.4. Don't you love it? case ${MACOSX_DEPLOYMENT_TARGET-10.0},$host in 10.0,*86*-darwin8*|10.0,*-darwin[91]*) _lt_dar_allow_undefined='$wl-undefined ${wl}dynamic_lookup' ;; 10.[012][,.]*) _lt_dar_allow_undefined='$wl-flat_namespace $wl-undefined ${wl}suppress' ;; 10.*) _lt_dar_allow_undefined='$wl-undefined ${wl}dynamic_lookup' ;; esac ;; esac if test yes = "$lt_cv_apple_cc_single_mod"; then _lt_dar_single_mod='$single_module' fi if test yes = "$lt_cv_ld_exported_symbols_list"; then _lt_dar_export_syms=' $wl-exported_symbols_list,$output_objdir/$libname-symbols.expsym' else _lt_dar_export_syms='~$NMEDIT -s $output_objdir/$libname-symbols.expsym $lib' fi if test : != "$DSYMUTIL" && test no = "$lt_cv_ld_force_load"; then _lt_dsymutil='~$DSYMUTIL $lib || :' else _lt_dsymutil= fi ;; esac # func_munge_path_list VARIABLE PATH # ----------------------------------- # VARIABLE is name of variable containing _space_ separated list of # directories to be munged by the contents of PATH, which is string # having a format: # "DIR[:DIR]:" # string "DIR[ DIR]" will be prepended to VARIABLE # ":DIR[:DIR]" # string "DIR[ DIR]" will be appended to VARIABLE # "DIRP[:DIRP]::[DIRA:]DIRA" # string "DIRP[ DIRP]" will be prepended to VARIABLE and string # "DIRA[ DIRA]" will be appended to VARIABLE # "DIR[:DIR]" # VARIABLE will be replaced by "DIR[ DIR]" func_munge_path_list () { case x$2 in x) ;; *:) eval $1=\"`$ECHO $2 | $SED 's/:/ /g'` \$$1\" ;; x:*) eval $1=\"\$$1 `$ECHO $2 | $SED 's/:/ /g'`\" ;; *::*) eval $1=\"\$$1\ `$ECHO $2 | $SED -e 's/.*:://' -e 's/:/ /g'`\" eval $1=\"`$ECHO $2 | $SED -e 's/::.*//' -e 's/:/ /g'`\ \$$1\" ;; *) eval $1=\"`$ECHO $2 | $SED 's/:/ /g'`\" ;; esac } for ac_header in dlfcn.h do : ac_fn_c_check_header_compile "$LINENO" "dlfcn.h" "ac_cv_header_dlfcn_h" "$ac_includes_default " if test "x$ac_cv_header_dlfcn_h" = xyes; then : cat >>confdefs.h <<_ACEOF #define HAVE_DLFCN_H 1 _ACEOF fi done # Set options enable_dlopen=no enable_win32_dll=no # Check whether --enable-shared was given. if test "${enable_shared+set}" = set; then : enableval=$enable_shared; p=${PACKAGE-default} case $enableval in yes) enable_shared=yes ;; no) enable_shared=no ;; *) enable_shared=no # Look at the argument we got. We use all the common list separators. lt_save_ifs=$IFS; IFS=$IFS$PATH_SEPARATOR, for pkg in $enableval; do IFS=$lt_save_ifs if test "X$pkg" = "X$p"; then enable_shared=yes fi done IFS=$lt_save_ifs ;; esac else enable_shared=yes fi # Check whether --with-pic was given. if test "${with_pic+set}" = set; then : withval=$with_pic; lt_p=${PACKAGE-default} case $withval in yes|no) pic_mode=$withval ;; *) pic_mode=default # Look at the argument we got. We use all the common list separators. lt_save_ifs=$IFS; IFS=$IFS$PATH_SEPARATOR, for lt_pkg in $withval; do IFS=$lt_save_ifs if test "X$lt_pkg" = "X$lt_p"; then pic_mode=yes fi done IFS=$lt_save_ifs ;; esac else pic_mode=default fi # Check whether --enable-fast-install was given. if test "${enable_fast_install+set}" = set; then : enableval=$enable_fast_install; p=${PACKAGE-default} case $enableval in yes) enable_fast_install=yes ;; no) enable_fast_install=no ;; *) enable_fast_install=no # Look at the argument we got. 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We urge you to upgrade GNU *** binutils to release 2.16.91.0.3 or newer. Another option is to modify *** your PATH or compiler configuration so that the native linker is *** used, and then restart. _LT_EOF ;; *) # For security reasons, it is highly recommended that you always # use absolute paths for naming shared libraries, and exclude the # DT_RUNPATH tag from executables and libraries. But doing so # requires that you compile everything twice, which is a pain. if $LD --help 2>&1 | $GREP ': supported targets:.* elf' > /dev/null; then hardcode_libdir_flag_spec='$wl-rpath $wl$libdir' archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags $wl-soname $wl$soname -o $lib' archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags $wl-soname $wl$soname $wl-retain-symbols-file $wl$export_symbols -o $lib' else ld_shlibs=no fi ;; esac ;; sunos4*) archive_cmds='$LD -assert pure-text -Bshareable -o $lib $libobjs $deplibs $linker_flags' wlarc= hardcode_direct=yes hardcode_shlibpath_var=no ;; *) if $LD --help 2>&1 | $GREP ': supported targets:.* elf' > /dev/null; then archive_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags $wl-soname $wl$soname -o $lib' archive_expsym_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags $wl-soname $wl$soname $wl-retain-symbols-file $wl$export_symbols -o $lib' else ld_shlibs=no fi ;; esac if test no = "$ld_shlibs"; then runpath_var= hardcode_libdir_flag_spec= export_dynamic_flag_spec= whole_archive_flag_spec= fi else # PORTME fill in a description of your system's linker (not GNU ld) case $host_os in aix3*) allow_undefined_flag=unsupported always_export_symbols=yes archive_expsym_cmds='$LD -o $output_objdir/$soname $libobjs $deplibs $linker_flags -bE:$export_symbols -T512 -H512 -bM:SRE~$AR $AR_FLAGS $lib $output_objdir/$soname' # Note: this linker hardcodes the directories in LIBPATH if there # are no directories specified by -L. hardcode_minus_L=yes if test yes = "$GCC" && test -z "$lt_prog_compiler_static"; then # Neither direct hardcoding nor static linking is supported with a # broken collect2. hardcode_direct=unsupported fi ;; aix[4-9]*) if test ia64 = "$host_cpu"; then # On IA64, the linker does run time linking by default, so we don't # have to do anything special. aix_use_runtimelinking=no exp_sym_flag='-Bexport' no_entry_flag= else # If we're using GNU nm, then we don't want the "-C" option. # -C means demangle to GNU nm, but means don't demangle to AIX nm. # Without the "-l" option, or with the "-B" option, AIX nm treats # weak defined symbols like other global defined symbols, whereas # GNU nm marks them as "W". # While the 'weak' keyword is ignored in the Export File, we need # it in the Import File for the 'aix-soname' feature, so we have # to replace the "-B" option with "-P" for AIX nm. if $NM -V 2>&1 | $GREP 'GNU' > /dev/null; then export_symbols_cmds='$NM -Bpg $libobjs $convenience | awk '\''{ if (((\$ 2 == "T") || (\$ 2 == "D") || (\$ 2 == "B") || (\$ 2 == "W")) && (substr(\$ 3,1,1) != ".")) { if (\$ 2 == "W") { print \$ 3 " weak" } else { print \$ 3 } } }'\'' | sort -u > $export_symbols' else export_symbols_cmds='`func_echo_all $NM | $SED -e '\''s/B\([^B]*\)$/P\1/'\''` -PCpgl $libobjs $convenience | awk '\''{ if (((\$ 2 == "T") || (\$ 2 == "D") || (\$ 2 == "B") || (\$ 2 == "W") || (\$ 2 == "V") || (\$ 2 == "Z")) && (substr(\$ 1,1,1) != ".")) { if ((\$ 2 == "W") || (\$ 2 == "V") || (\$ 2 == "Z")) { print \$ 1 " weak" } else { print \$ 1 } } }'\'' | sort -u > $export_symbols' fi aix_use_runtimelinking=no # Test if we are trying to use run time linking or normal # AIX style linking. If -brtl is somewhere in LDFLAGS, we # have runtime linking enabled, and use it for executables. # For shared libraries, we enable/disable runtime linking # depending on the kind of the shared library created - # when "with_aix_soname,aix_use_runtimelinking" is: # "aix,no" lib.a(lib.so.V) shared, rtl:no, for executables # "aix,yes" lib.so shared, rtl:yes, for executables # lib.a static archive # "both,no" lib.so.V(shr.o) shared, rtl:yes # lib.a(lib.so.V) shared, rtl:no, for executables # "both,yes" lib.so.V(shr.o) shared, rtl:yes, for executables # lib.a(lib.so.V) shared, rtl:no # "svr4,*" lib.so.V(shr.o) shared, rtl:yes, for executables # lib.a static archive case $host_os in aix4.[23]|aix4.[23].*|aix[5-9]*) for ld_flag in $LDFLAGS; do if (test x-brtl = "x$ld_flag" || test x-Wl,-brtl = "x$ld_flag"); then aix_use_runtimelinking=yes break fi done if test svr4,no = "$with_aix_soname,$aix_use_runtimelinking"; then # With aix-soname=svr4, we create the lib.so.V shared archives only, # so we don't have lib.a shared libs to link our executables. # We have to force runtime linking in this case. aix_use_runtimelinking=yes LDFLAGS="$LDFLAGS -Wl,-brtl" fi ;; esac exp_sym_flag='-bexport' no_entry_flag='-bnoentry' fi # When large executables or shared objects are built, AIX ld can # have problems creating the table of contents. If linking a library # or program results in "error TOC overflow" add -mminimal-toc to # CXXFLAGS/CFLAGS for g++/gcc. In the cases where that is not # enough to fix the problem, add -Wl,-bbigtoc to LDFLAGS. archive_cmds='' hardcode_direct=yes hardcode_direct_absolute=yes hardcode_libdir_separator=':' link_all_deplibs=yes file_list_spec='$wl-f,' case $with_aix_soname,$aix_use_runtimelinking in aix,*) ;; # traditional, no import file svr4,* | *,yes) # use import file # The Import File defines what to hardcode. hardcode_direct=no hardcode_direct_absolute=no ;; esac if test yes = "$GCC"; then case $host_os in aix4.[012]|aix4.[012].*) # We only want to do this on AIX 4.2 and lower, the check # below for broken collect2 doesn't work under 4.3+ collect2name=`$CC -print-prog-name=collect2` if test -f "$collect2name" && strings "$collect2name" | $GREP resolve_lib_name >/dev/null then # We have reworked collect2 : else # We have old collect2 hardcode_direct=unsupported # It fails to find uninstalled libraries when the uninstalled # path is not listed in the libpath. Setting hardcode_minus_L # to unsupported forces relinking hardcode_minus_L=yes hardcode_libdir_flag_spec='-L$libdir' hardcode_libdir_separator= fi ;; esac shared_flag='-shared' if test yes = "$aix_use_runtimelinking"; then shared_flag="$shared_flag "'$wl-G' fi # Need to ensure runtime linking is disabled for the traditional # shared library, or the linker may eventually find shared libraries # /with/ Import File - we do not want to mix them. shared_flag_aix='-shared' shared_flag_svr4='-shared $wl-G' else # not using gcc if test ia64 = "$host_cpu"; then # VisualAge C++, Version 5.5 for AIX 5L for IA-64, Beta 3 Release # chokes on -Wl,-G. The following line is correct: shared_flag='-G' else if test yes = "$aix_use_runtimelinking"; then shared_flag='$wl-G' else shared_flag='$wl-bM:SRE' fi shared_flag_aix='$wl-bM:SRE' shared_flag_svr4='$wl-G' fi fi export_dynamic_flag_spec='$wl-bexpall' # It seems that -bexpall does not export symbols beginning with # underscore (_), so it is better to generate a list of symbols to export. always_export_symbols=yes if test aix,yes = "$with_aix_soname,$aix_use_runtimelinking"; then # Warning - without using the other runtime loading flags (-brtl), # -berok will link without error, but may produce a broken library. allow_undefined_flag='-berok' # Determine the default libpath from the value encoded in an # empty executable. if test set = "${lt_cv_aix_libpath+set}"; then aix_libpath=$lt_cv_aix_libpath else if ${lt_cv_aix_libpath_+:} false; then : $as_echo_n "(cached) " >&6 else cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ int main () { ; return 0; } _ACEOF if ac_fn_c_try_link "$LINENO"; then : lt_aix_libpath_sed=' /Import File Strings/,/^$/ { /^0/ { s/^0 *\([^ ]*\) *$/\1/ p } }' lt_cv_aix_libpath_=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"` # Check for a 64-bit object if we didn't find anything. if test -z "$lt_cv_aix_libpath_"; then lt_cv_aix_libpath_=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"` fi fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext if test -z "$lt_cv_aix_libpath_"; then lt_cv_aix_libpath_=/usr/lib:/lib fi fi aix_libpath=$lt_cv_aix_libpath_ fi hardcode_libdir_flag_spec='$wl-blibpath:$libdir:'"$aix_libpath" archive_expsym_cmds='$CC -o $output_objdir/$soname $libobjs $deplibs $wl'$no_entry_flag' $compiler_flags `if test -n "$allow_undefined_flag"; then func_echo_all "$wl$allow_undefined_flag"; else :; fi` $wl'$exp_sym_flag:\$export_symbols' '$shared_flag else if test ia64 = "$host_cpu"; then hardcode_libdir_flag_spec='$wl-R $libdir:/usr/lib:/lib' allow_undefined_flag="-z nodefs" archive_expsym_cmds="\$CC $shared_flag"' -o $output_objdir/$soname $libobjs $deplibs '"\$wl$no_entry_flag"' $compiler_flags $wl$allow_undefined_flag '"\$wl$exp_sym_flag:\$export_symbols" else # Determine the default libpath from the value encoded in an # empty executable. if test set = "${lt_cv_aix_libpath+set}"; then aix_libpath=$lt_cv_aix_libpath else if ${lt_cv_aix_libpath_+:} false; then : $as_echo_n "(cached) " >&6 else cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ int main () { ; return 0; } _ACEOF if ac_fn_c_try_link "$LINENO"; then : lt_aix_libpath_sed=' /Import File Strings/,/^$/ { /^0/ { s/^0 *\([^ ]*\) *$/\1/ p } }' lt_cv_aix_libpath_=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"` # Check for a 64-bit object if we didn't find anything. if test -z "$lt_cv_aix_libpath_"; then lt_cv_aix_libpath_=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"` fi fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext if test -z "$lt_cv_aix_libpath_"; then lt_cv_aix_libpath_=/usr/lib:/lib fi fi aix_libpath=$lt_cv_aix_libpath_ fi hardcode_libdir_flag_spec='$wl-blibpath:$libdir:'"$aix_libpath" # Warning - without using the other run time loading flags, # -berok will link without error, but may produce a broken library. no_undefined_flag=' $wl-bernotok' allow_undefined_flag=' $wl-berok' if test yes = "$with_gnu_ld"; then # We only use this code for GNU lds that support --whole-archive. whole_archive_flag_spec='$wl--whole-archive$convenience $wl--no-whole-archive' else # Exported symbols can be pulled into shared objects from archives whole_archive_flag_spec='$convenience' fi archive_cmds_need_lc=yes archive_expsym_cmds='$RM -r $output_objdir/$realname.d~$MKDIR $output_objdir/$realname.d' # -brtl affects multiple linker settings, -berok does not and is overridden later compiler_flags_filtered='`func_echo_all "$compiler_flags " | $SED -e "s%-brtl\\([, ]\\)%-berok\\1%g"`' if test svr4 != "$with_aix_soname"; then # This is similar to how AIX traditionally builds its shared libraries. archive_expsym_cmds="$archive_expsym_cmds"'~$CC '$shared_flag_aix' -o $output_objdir/$realname.d/$soname $libobjs $deplibs $wl-bnoentry '$compiler_flags_filtered'$wl-bE:$export_symbols$allow_undefined_flag~$AR $AR_FLAGS $output_objdir/$libname$release.a $output_objdir/$realname.d/$soname' fi if test aix != "$with_aix_soname"; then archive_expsym_cmds="$archive_expsym_cmds"'~$CC '$shared_flag_svr4' -o $output_objdir/$realname.d/$shared_archive_member_spec.o $libobjs $deplibs $wl-bnoentry '$compiler_flags_filtered'$wl-bE:$export_symbols$allow_undefined_flag~$STRIP -e $output_objdir/$realname.d/$shared_archive_member_spec.o~( func_echo_all "#! $soname($shared_archive_member_spec.o)"; if test shr_64 = "$shared_archive_member_spec"; then func_echo_all "# 64"; else func_echo_all "# 32"; fi; cat $export_symbols ) > $output_objdir/$realname.d/$shared_archive_member_spec.imp~$AR $AR_FLAGS $output_objdir/$soname $output_objdir/$realname.d/$shared_archive_member_spec.o $output_objdir/$realname.d/$shared_archive_member_spec.imp' else # used by -dlpreopen to get the symbols archive_expsym_cmds="$archive_expsym_cmds"'~$MV $output_objdir/$realname.d/$soname $output_objdir' fi archive_expsym_cmds="$archive_expsym_cmds"'~$RM -r $output_objdir/$realname.d' fi fi ;; amigaos*) case $host_cpu in powerpc) # see comment about AmigaOS4 .so support archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags $wl-soname $wl$soname -o $lib' archive_expsym_cmds='' ;; m68k) archive_cmds='$RM $output_objdir/a2ixlibrary.data~$ECHO "#define NAME $libname" > $output_objdir/a2ixlibrary.data~$ECHO "#define LIBRARY_ID 1" >> $output_objdir/a2ixlibrary.data~$ECHO "#define VERSION $major" >> $output_objdir/a2ixlibrary.data~$ECHO "#define REVISION $revision" >> $output_objdir/a2ixlibrary.data~$AR $AR_FLAGS $lib $libobjs~$RANLIB $lib~(cd $output_objdir && a2ixlibrary -32)' hardcode_libdir_flag_spec='-L$libdir' hardcode_minus_L=yes ;; esac ;; bsdi[45]*) export_dynamic_flag_spec=-rdynamic ;; cygwin* | mingw* | pw32* | cegcc*) # When not using gcc, we currently assume that we are using # Microsoft Visual C++. # hardcode_libdir_flag_spec is actually meaningless, as there is # no search path for DLLs. case $cc_basename in cl*) # Native MSVC hardcode_libdir_flag_spec=' ' allow_undefined_flag=unsupported always_export_symbols=yes file_list_spec='@' # Tell ltmain to make .lib files, not .a files. libext=lib # Tell ltmain to make .dll files, not .so files. shrext_cmds=.dll # FIXME: Setting linknames here is a bad hack. archive_cmds='$CC -o $output_objdir/$soname $libobjs $compiler_flags $deplibs -Wl,-DLL,-IMPLIB:"$tool_output_objdir$libname.dll.lib"~linknames=' archive_expsym_cmds='if test DEF = "`$SED -n -e '\''s/^[ ]*//'\'' -e '\''/^\(;.*\)*$/d'\'' -e '\''s/^\(EXPORTS\|LIBRARY\)\([ ].*\)*$/DEF/p'\'' -e q $export_symbols`" ; then cp "$export_symbols" "$output_objdir/$soname.def"; echo "$tool_output_objdir$soname.def" > "$output_objdir/$soname.exp"; else $SED -e '\''s/^/-link -EXPORT:/'\'' < $export_symbols > $output_objdir/$soname.exp; fi~ $CC -o $tool_output_objdir$soname $libobjs $compiler_flags $deplibs "@$tool_output_objdir$soname.exp" -Wl,-DLL,-IMPLIB:"$tool_output_objdir$libname.dll.lib"~ linknames=' # The linker will not automatically build a static lib if we build a DLL. # _LT_TAGVAR(old_archive_from_new_cmds, )='true' enable_shared_with_static_runtimes=yes exclude_expsyms='_NULL_IMPORT_DESCRIPTOR|_IMPORT_DESCRIPTOR_.*' export_symbols_cmds='$NM $libobjs $convenience | $global_symbol_pipe | $SED -e '\''/^[BCDGRS][ ]/s/.*[ ]\([^ ]*\)/\1,DATA/'\'' | $SED -e '\''/^[AITW][ ]/s/.*[ ]//'\'' | sort | uniq > $export_symbols' # Don't use ranlib old_postinstall_cmds='chmod 644 $oldlib' postlink_cmds='lt_outputfile="@OUTPUT@"~ lt_tool_outputfile="@TOOL_OUTPUT@"~ case $lt_outputfile in *.exe|*.EXE) ;; *) lt_outputfile=$lt_outputfile.exe lt_tool_outputfile=$lt_tool_outputfile.exe ;; esac~ if test : != "$MANIFEST_TOOL" && test -f "$lt_outputfile.manifest"; then $MANIFEST_TOOL -manifest "$lt_tool_outputfile.manifest" -outputresource:"$lt_tool_outputfile" || exit 1; $RM "$lt_outputfile.manifest"; fi' ;; *) # Assume MSVC wrapper hardcode_libdir_flag_spec=' ' allow_undefined_flag=unsupported # Tell ltmain to make .lib files, not .a files. libext=lib # Tell ltmain to make .dll files, not .so files. shrext_cmds=.dll # FIXME: Setting linknames here is a bad hack. archive_cmds='$CC -o $lib $libobjs $compiler_flags `func_echo_all "$deplibs" | $SED '\''s/ -lc$//'\''` -link -dll~linknames=' # The linker will automatically build a .lib file if we build a DLL. old_archive_from_new_cmds='true' # FIXME: Should let the user specify the lib program. old_archive_cmds='lib -OUT:$oldlib$oldobjs$old_deplibs' enable_shared_with_static_runtimes=yes ;; esac ;; darwin* | rhapsody*) archive_cmds_need_lc=no hardcode_direct=no hardcode_automatic=yes hardcode_shlibpath_var=unsupported if test yes = "$lt_cv_ld_force_load"; then whole_archive_flag_spec='`for conv in $convenience\"\"; do test -n \"$conv\" && new_convenience=\"$new_convenience $wl-force_load,$conv\"; done; func_echo_all \"$new_convenience\"`' else whole_archive_flag_spec='' fi link_all_deplibs=yes allow_undefined_flag=$_lt_dar_allow_undefined case $cc_basename in ifort*|nagfor*) _lt_dar_can_shared=yes ;; *) _lt_dar_can_shared=$GCC ;; esac if test yes = "$_lt_dar_can_shared"; then output_verbose_link_cmd=func_echo_all archive_cmds="\$CC -dynamiclib \$allow_undefined_flag -o \$lib \$libobjs \$deplibs \$compiler_flags -install_name \$rpath/\$soname \$verstring $_lt_dar_single_mod$_lt_dsymutil" module_cmds="\$CC \$allow_undefined_flag -o \$lib -bundle \$libobjs \$deplibs \$compiler_flags$_lt_dsymutil" archive_expsym_cmds="sed 's|^|_|' < \$export_symbols > \$output_objdir/\$libname-symbols.expsym~\$CC -dynamiclib \$allow_undefined_flag -o \$lib \$libobjs \$deplibs \$compiler_flags -install_name \$rpath/\$soname \$verstring $_lt_dar_single_mod$_lt_dar_export_syms$_lt_dsymutil" module_expsym_cmds="sed -e 's|^|_|' < \$export_symbols > \$output_objdir/\$libname-symbols.expsym~\$CC \$allow_undefined_flag -o \$lib -bundle \$libobjs \$deplibs \$compiler_flags$_lt_dar_export_syms$_lt_dsymutil" else ld_shlibs=no fi ;; dgux*) archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' hardcode_libdir_flag_spec='-L$libdir' hardcode_shlibpath_var=no ;; # FreeBSD 2.2.[012] allows us to include c++rt0.o to get C++ constructor # support. Future versions do this automatically, but an explicit c++rt0.o # does not break anything, and helps significantly (at the cost of a little # extra space). freebsd2.2*) archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags /usr/lib/c++rt0.o' hardcode_libdir_flag_spec='-R$libdir' hardcode_direct=yes hardcode_shlibpath_var=no ;; # Unfortunately, older versions of FreeBSD 2 do not have this feature. freebsd2.*) archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' hardcode_direct=yes hardcode_minus_L=yes hardcode_shlibpath_var=no ;; # FreeBSD 3 and greater uses gcc -shared to do shared libraries. freebsd* | dragonfly*) archive_cmds='$CC -shared $pic_flag -o $lib $libobjs $deplibs $compiler_flags' hardcode_libdir_flag_spec='-R$libdir' hardcode_direct=yes hardcode_shlibpath_var=no ;; hpux9*) if test yes = "$GCC"; then archive_cmds='$RM $output_objdir/$soname~$CC -shared $pic_flag $wl+b $wl$install_libdir -o $output_objdir/$soname $libobjs $deplibs $compiler_flags~test "x$output_objdir/$soname" = "x$lib" || mv $output_objdir/$soname $lib' else archive_cmds='$RM $output_objdir/$soname~$LD -b +b $install_libdir -o $output_objdir/$soname $libobjs $deplibs $linker_flags~test "x$output_objdir/$soname" = "x$lib" || mv $output_objdir/$soname $lib' fi hardcode_libdir_flag_spec='$wl+b $wl$libdir' hardcode_libdir_separator=: hardcode_direct=yes # hardcode_minus_L: Not really in the search PATH, # but as the default location of the library. hardcode_minus_L=yes export_dynamic_flag_spec='$wl-E' ;; hpux10*) if test yes,no = "$GCC,$with_gnu_ld"; then archive_cmds='$CC -shared $pic_flag $wl+h $wl$soname $wl+b $wl$install_libdir -o $lib $libobjs $deplibs $compiler_flags' else archive_cmds='$LD -b +h $soname +b $install_libdir -o $lib $libobjs $deplibs $linker_flags' fi if test no = "$with_gnu_ld"; then hardcode_libdir_flag_spec='$wl+b $wl$libdir' hardcode_libdir_separator=: hardcode_direct=yes hardcode_direct_absolute=yes export_dynamic_flag_spec='$wl-E' # hardcode_minus_L: Not really in the search PATH, # but as the default location of the library. hardcode_minus_L=yes fi ;; hpux11*) if test yes,no = "$GCC,$with_gnu_ld"; then case $host_cpu in hppa*64*) archive_cmds='$CC -shared $wl+h $wl$soname -o $lib $libobjs $deplibs $compiler_flags' ;; ia64*) archive_cmds='$CC -shared $pic_flag $wl+h $wl$soname $wl+nodefaultrpath -o $lib $libobjs $deplibs $compiler_flags' ;; *) archive_cmds='$CC -shared $pic_flag $wl+h $wl$soname $wl+b $wl$install_libdir -o $lib $libobjs $deplibs $compiler_flags' ;; esac else case $host_cpu in hppa*64*) archive_cmds='$CC -b $wl+h $wl$soname -o $lib $libobjs $deplibs $compiler_flags' ;; ia64*) archive_cmds='$CC -b $wl+h $wl$soname $wl+nodefaultrpath -o $lib $libobjs $deplibs $compiler_flags' ;; *) # Older versions of the 11.00 compiler do not understand -b yet # (HP92453-01 A.11.01.20 doesn't, HP92453-01 B.11.X.35175-35176.GP does) { $as_echo "$as_me:${as_lineno-$LINENO}: checking if $CC understands -b" >&5 $as_echo_n "checking if $CC understands -b... " >&6; } if ${lt_cv_prog_compiler__b+:} false; then : $as_echo_n "(cached) " >&6 else lt_cv_prog_compiler__b=no save_LDFLAGS=$LDFLAGS LDFLAGS="$LDFLAGS -b" echo "$lt_simple_link_test_code" > conftest.$ac_ext if (eval $ac_link 2>conftest.err) && test -s conftest$ac_exeext; then # The linker can only warn and ignore the option if not recognized # So say no if there are warnings if test -s conftest.err; then # Append any errors to the config.log. cat conftest.err 1>&5 $ECHO "$_lt_linker_boilerplate" | $SED '/^$/d' > conftest.exp $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2 if diff conftest.exp conftest.er2 >/dev/null; then lt_cv_prog_compiler__b=yes fi else lt_cv_prog_compiler__b=yes fi fi $RM -r conftest* LDFLAGS=$save_LDFLAGS fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_prog_compiler__b" >&5 $as_echo "$lt_cv_prog_compiler__b" >&6; } if test yes = "$lt_cv_prog_compiler__b"; then archive_cmds='$CC -b $wl+h $wl$soname $wl+b $wl$install_libdir -o $lib $libobjs $deplibs $compiler_flags' else archive_cmds='$LD -b +h $soname +b $install_libdir -o $lib $libobjs $deplibs $linker_flags' fi ;; esac fi if test no = "$with_gnu_ld"; then hardcode_libdir_flag_spec='$wl+b $wl$libdir' hardcode_libdir_separator=: case $host_cpu in hppa*64*|ia64*) hardcode_direct=no hardcode_shlibpath_var=no ;; *) hardcode_direct=yes hardcode_direct_absolute=yes export_dynamic_flag_spec='$wl-E' # hardcode_minus_L: Not really in the search PATH, # but as the default location of the library. hardcode_minus_L=yes ;; esac fi ;; irix5* | irix6* | nonstopux*) if test yes = "$GCC"; then archive_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags $wl-soname $wl$soname `test -n "$verstring" && func_echo_all "$wl-set_version $wl$verstring"` $wl-update_registry $wl$output_objdir/so_locations -o $lib' # Try to use the -exported_symbol ld option, if it does not # work, assume that -exports_file does not work either and # implicitly export all symbols. # This should be the same for all languages, so no per-tag cache variable. { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether the $host_os linker accepts -exported_symbol" >&5 $as_echo_n "checking whether the $host_os linker accepts -exported_symbol... " >&6; } if ${lt_cv_irix_exported_symbol+:} false; then : $as_echo_n "(cached) " >&6 else save_LDFLAGS=$LDFLAGS LDFLAGS="$LDFLAGS -shared $wl-exported_symbol ${wl}foo $wl-update_registry $wl/dev/null" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ int foo (void) { return 0; } _ACEOF if ac_fn_c_try_link "$LINENO"; then : lt_cv_irix_exported_symbol=yes else lt_cv_irix_exported_symbol=no fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LDFLAGS=$save_LDFLAGS fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_irix_exported_symbol" >&5 $as_echo "$lt_cv_irix_exported_symbol" >&6; } if test yes = "$lt_cv_irix_exported_symbol"; then archive_expsym_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags $wl-soname $wl$soname `test -n "$verstring" && func_echo_all "$wl-set_version $wl$verstring"` $wl-update_registry $wl$output_objdir/so_locations $wl-exports_file $wl$export_symbols -o $lib' fi link_all_deplibs=no else archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry $output_objdir/so_locations -o $lib' archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry $output_objdir/so_locations -exports_file $export_symbols -o $lib' fi archive_cmds_need_lc='no' hardcode_libdir_flag_spec='$wl-rpath $wl$libdir' hardcode_libdir_separator=: inherit_rpath=yes link_all_deplibs=yes ;; linux*) case $cc_basename in tcc*) # Fabrice Bellard et al's Tiny C Compiler ld_shlibs=yes archive_cmds='$CC -shared $pic_flag -o $lib $libobjs $deplibs $compiler_flags' ;; esac ;; netbsd* | netbsdelf*-gnu) if echo __ELF__ | $CC -E - | $GREP __ELF__ >/dev/null; then archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' # a.out else archive_cmds='$LD -shared -o $lib $libobjs $deplibs $linker_flags' # ELF fi hardcode_libdir_flag_spec='-R$libdir' hardcode_direct=yes hardcode_shlibpath_var=no ;; newsos6) archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' hardcode_direct=yes hardcode_libdir_flag_spec='$wl-rpath $wl$libdir' hardcode_libdir_separator=: hardcode_shlibpath_var=no ;; *nto* | *qnx*) ;; openbsd* | bitrig*) if test -f /usr/libexec/ld.so; then hardcode_direct=yes hardcode_shlibpath_var=no hardcode_direct_absolute=yes if test -z "`echo __ELF__ | $CC -E - | $GREP __ELF__`"; then archive_cmds='$CC -shared $pic_flag -o $lib $libobjs $deplibs $compiler_flags' archive_expsym_cmds='$CC -shared $pic_flag -o $lib $libobjs $deplibs $compiler_flags $wl-retain-symbols-file,$export_symbols' hardcode_libdir_flag_spec='$wl-rpath,$libdir' export_dynamic_flag_spec='$wl-E' else archive_cmds='$CC -shared $pic_flag -o $lib $libobjs $deplibs $compiler_flags' hardcode_libdir_flag_spec='$wl-rpath,$libdir' fi else ld_shlibs=no fi ;; os2*) hardcode_libdir_flag_spec='-L$libdir' hardcode_minus_L=yes allow_undefined_flag=unsupported shrext_cmds=.dll archive_cmds='$ECHO "LIBRARY ${soname%$shared_ext} INITINSTANCE TERMINSTANCE" > $output_objdir/$libname.def~ $ECHO "DESCRIPTION \"$libname\"" >> $output_objdir/$libname.def~ $ECHO "DATA MULTIPLE NONSHARED" >> $output_objdir/$libname.def~ $ECHO EXPORTS >> $output_objdir/$libname.def~ emxexp $libobjs | $SED /"_DLL_InitTerm"/d >> $output_objdir/$libname.def~ $CC -Zdll -Zcrtdll -o $output_objdir/$soname $libobjs $deplibs $compiler_flags $output_objdir/$libname.def~ emximp -o $lib $output_objdir/$libname.def' archive_expsym_cmds='$ECHO "LIBRARY ${soname%$shared_ext} INITINSTANCE TERMINSTANCE" > $output_objdir/$libname.def~ $ECHO "DESCRIPTION \"$libname\"" >> $output_objdir/$libname.def~ $ECHO "DATA MULTIPLE NONSHARED" >> $output_objdir/$libname.def~ $ECHO EXPORTS >> $output_objdir/$libname.def~ prefix_cmds="$SED"~ if test EXPORTS = "`$SED 1q $export_symbols`"; then prefix_cmds="$prefix_cmds -e 1d"; fi~ prefix_cmds="$prefix_cmds -e \"s/^\(.*\)$/_\1/g\""~ cat $export_symbols | $prefix_cmds >> $output_objdir/$libname.def~ $CC -Zdll -Zcrtdll -o $output_objdir/$soname $libobjs $deplibs $compiler_flags $output_objdir/$libname.def~ emximp -o $lib $output_objdir/$libname.def' old_archive_From_new_cmds='emximp -o $output_objdir/${libname}_dll.a $output_objdir/$libname.def' enable_shared_with_static_runtimes=yes ;; osf3*) if test yes = "$GCC"; then allow_undefined_flag=' $wl-expect_unresolved $wl\*' archive_cmds='$CC -shared$allow_undefined_flag $libobjs $deplibs $compiler_flags $wl-soname $wl$soname `test -n "$verstring" && func_echo_all "$wl-set_version $wl$verstring"` $wl-update_registry $wl$output_objdir/so_locations -o $lib' else allow_undefined_flag=' -expect_unresolved \*' archive_cmds='$CC -shared$allow_undefined_flag $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry $output_objdir/so_locations -o $lib' fi archive_cmds_need_lc='no' hardcode_libdir_flag_spec='$wl-rpath $wl$libdir' hardcode_libdir_separator=: ;; osf4* | osf5*) # as osf3* with the addition of -msym flag if test yes = "$GCC"; then allow_undefined_flag=' $wl-expect_unresolved $wl\*' archive_cmds='$CC -shared$allow_undefined_flag $pic_flag $libobjs $deplibs $compiler_flags $wl-msym $wl-soname $wl$soname `test -n "$verstring" && func_echo_all "$wl-set_version $wl$verstring"` $wl-update_registry $wl$output_objdir/so_locations -o $lib' hardcode_libdir_flag_spec='$wl-rpath $wl$libdir' else allow_undefined_flag=' -expect_unresolved \*' archive_cmds='$CC -shared$allow_undefined_flag $libobjs $deplibs $compiler_flags -msym -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry $output_objdir/so_locations -o $lib' archive_expsym_cmds='for i in `cat $export_symbols`; do printf "%s %s\\n" -exported_symbol "\$i" >> $lib.exp; done; printf "%s\\n" "-hidden">> $lib.exp~ $CC -shared$allow_undefined_flag $wl-input $wl$lib.exp $compiler_flags $libobjs $deplibs -soname $soname `test -n "$verstring" && $ECHO "-set_version $verstring"` -update_registry $output_objdir/so_locations -o $lib~$RM $lib.exp' # Both c and cxx compiler support -rpath directly hardcode_libdir_flag_spec='-rpath $libdir' fi archive_cmds_need_lc='no' hardcode_libdir_separator=: ;; solaris*) no_undefined_flag=' -z defs' if test yes = "$GCC"; then wlarc='$wl' archive_cmds='$CC -shared $pic_flag $wl-z ${wl}text $wl-h $wl$soname -o $lib $libobjs $deplibs $compiler_flags' archive_expsym_cmds='echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~echo "local: *; };" >> $lib.exp~ $CC -shared $pic_flag $wl-z ${wl}text $wl-M $wl$lib.exp $wl-h $wl$soname -o $lib $libobjs $deplibs $compiler_flags~$RM $lib.exp' else case `$CC -V 2>&1` in *"Compilers 5.0"*) wlarc='' archive_cmds='$LD -G$allow_undefined_flag -h $soname -o $lib $libobjs $deplibs $linker_flags' archive_expsym_cmds='echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~echo "local: *; };" >> $lib.exp~ $LD -G$allow_undefined_flag -M $lib.exp -h $soname -o $lib $libobjs $deplibs $linker_flags~$RM $lib.exp' ;; *) wlarc='$wl' archive_cmds='$CC -G$allow_undefined_flag -h $soname -o $lib $libobjs $deplibs $compiler_flags' archive_expsym_cmds='echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~echo "local: *; };" >> $lib.exp~ $CC -G$allow_undefined_flag -M $lib.exp -h $soname -o $lib $libobjs $deplibs $compiler_flags~$RM $lib.exp' ;; esac fi hardcode_libdir_flag_spec='-R$libdir' hardcode_shlibpath_var=no case $host_os in solaris2.[0-5] | solaris2.[0-5].*) ;; *) # The compiler driver will combine and reorder linker options, # but understands '-z linker_flag'. GCC discards it without '$wl', # but is careful enough not to reorder. # Supported since Solaris 2.6 (maybe 2.5.1?) if test yes = "$GCC"; then whole_archive_flag_spec='$wl-z ${wl}allextract$convenience $wl-z ${wl}defaultextract' else whole_archive_flag_spec='-z allextract$convenience -z defaultextract' fi ;; esac link_all_deplibs=yes ;; sunos4*) if test sequent = "$host_vendor"; then # Use $CC to link under sequent, because it throws in some extra .o # files that make .init and .fini sections work. archive_cmds='$CC -G $wl-h $soname -o $lib $libobjs $deplibs $compiler_flags' else archive_cmds='$LD -assert pure-text -Bstatic -o $lib $libobjs $deplibs $linker_flags' fi hardcode_libdir_flag_spec='-L$libdir' hardcode_direct=yes hardcode_minus_L=yes hardcode_shlibpath_var=no ;; sysv4) case $host_vendor in sni) archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' hardcode_direct=yes # is this really true??? ;; siemens) ## LD is ld it makes a PLAMLIB ## CC just makes a GrossModule. archive_cmds='$LD -G -o $lib $libobjs $deplibs $linker_flags' reload_cmds='$CC -r -o $output$reload_objs' hardcode_direct=no ;; motorola) archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' hardcode_direct=no #Motorola manual says yes, but my tests say they lie ;; esac runpath_var='LD_RUN_PATH' hardcode_shlibpath_var=no ;; sysv4.3*) archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' hardcode_shlibpath_var=no export_dynamic_flag_spec='-Bexport' ;; sysv4*MP*) if test -d /usr/nec; then archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' hardcode_shlibpath_var=no runpath_var=LD_RUN_PATH hardcode_runpath_var=yes ld_shlibs=yes fi ;; sysv4*uw2* | sysv5OpenUNIX* | sysv5UnixWare7.[01].[10]* | unixware7* | sco3.2v5.0.[024]*) no_undefined_flag='$wl-z,text' archive_cmds_need_lc=no hardcode_shlibpath_var=no runpath_var='LD_RUN_PATH' if test yes = "$GCC"; then archive_cmds='$CC -shared $wl-h,$soname -o $lib $libobjs $deplibs $compiler_flags' archive_expsym_cmds='$CC -shared $wl-Bexport:$export_symbols $wl-h,$soname -o $lib $libobjs $deplibs $compiler_flags' else archive_cmds='$CC -G $wl-h,$soname -o $lib $libobjs $deplibs $compiler_flags' archive_expsym_cmds='$CC -G $wl-Bexport:$export_symbols $wl-h,$soname -o $lib $libobjs $deplibs $compiler_flags' fi ;; sysv5* | sco3.2v5* | sco5v6*) # Note: We CANNOT use -z defs as we might desire, because we do not # link with -lc, and that would cause any symbols used from libc to # always be unresolved, which means just about no library would # ever link correctly. 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then sys_lib_search_path_spec="/usr/lib/hpux32 /usr/local/lib/hpux32 /usr/local/lib" sys_lib_dlsearch_path_spec=/usr/lib/hpux32 else sys_lib_search_path_spec="/usr/lib/hpux64 /usr/local/lib/hpux64" sys_lib_dlsearch_path_spec=/usr/lib/hpux64 fi ;; hppa*64*) shrext_cmds='.sl' hardcode_into_libs=yes dynamic_linker="$host_os dld.sl" shlibpath_var=LD_LIBRARY_PATH # How should we handle SHLIB_PATH shlibpath_overrides_runpath=yes # Unless +noenvvar is specified. library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' sys_lib_search_path_spec="/usr/lib/pa20_64 /usr/ccs/lib/pa20_64" sys_lib_dlsearch_path_spec=$sys_lib_search_path_spec ;; *) shrext_cmds='.sl' dynamic_linker="$host_os dld.sl" shlibpath_var=SHLIB_PATH shlibpath_overrides_runpath=no # +s is required to enable SHLIB_PATH library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' ;; esac # HP-UX runs *really* slowly unless shared libraries are mode 555, ... postinstall_cmds='chmod 555 $lib' # or fails outright, so override atomically: install_override_mode=555 ;; interix[3-9]*) version_type=linux # correct to gnu/linux during the next big refactor need_lib_prefix=no need_version=no library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' dynamic_linker='Interix 3.x ld.so.1 (PE, like ELF)' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=no hardcode_into_libs=yes ;; irix5* | irix6* | nonstopux*) case $host_os in nonstopux*) version_type=nonstopux ;; *) if test yes = "$lt_cv_prog_gnu_ld"; then version_type=linux # correct to gnu/linux during the next big refactor else version_type=irix fi ;; esac need_lib_prefix=no need_version=no soname_spec='$libname$release$shared_ext$major' library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$release$shared_ext $libname$shared_ext' case $host_os in irix5* | nonstopux*) libsuff= shlibsuff= ;; *) case $LD in # libtool.m4 will add one of these switches to LD *-32|*"-32 "|*-melf32bsmip|*"-melf32bsmip ") libsuff= shlibsuff= libmagic=32-bit;; *-n32|*"-n32 "|*-melf32bmipn32|*"-melf32bmipn32 ") libsuff=32 shlibsuff=N32 libmagic=N32;; *-64|*"-64 "|*-melf64bmip|*"-melf64bmip ") libsuff=64 shlibsuff=64 libmagic=64-bit;; *) libsuff= shlibsuff= libmagic=never-match;; esac ;; esac shlibpath_var=LD_LIBRARY${shlibsuff}_PATH shlibpath_overrides_runpath=no sys_lib_search_path_spec="/usr/lib$libsuff /lib$libsuff /usr/local/lib$libsuff" sys_lib_dlsearch_path_spec="/usr/lib$libsuff /lib$libsuff" hardcode_into_libs=yes ;; # No shared lib support for Linux oldld, aout, or coff. linux*oldld* | linux*aout* | linux*coff*) dynamic_linker=no ;; linux*android*) version_type=none # Android doesn't support versioned libraries. need_lib_prefix=no need_version=no library_names_spec='$libname$release$shared_ext' soname_spec='$libname$release$shared_ext' finish_cmds= shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=yes # This implies no fast_install, which is unacceptable. # Some rework will be needed to allow for fast_install # before this can be enabled. hardcode_into_libs=yes dynamic_linker='Android linker' # Don't embed -rpath directories since the linker doesn't support them. hardcode_libdir_flag_spec='-L$libdir' ;; # This must be glibc/ELF. linux* | k*bsd*-gnu | kopensolaris*-gnu | gnu*) version_type=linux # correct to gnu/linux during the next big refactor need_lib_prefix=no need_version=no library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' finish_cmds='PATH="\$PATH:/sbin" ldconfig -n $libdir' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=no # Some binutils ld are patched to set DT_RUNPATH if ${lt_cv_shlibpath_overrides_runpath+:} false; then : $as_echo_n "(cached) " >&6 else lt_cv_shlibpath_overrides_runpath=no save_LDFLAGS=$LDFLAGS save_libdir=$libdir eval "libdir=/foo; wl=\"$lt_prog_compiler_wl\"; \ LDFLAGS=\"\$LDFLAGS $hardcode_libdir_flag_spec\"" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ int main () { ; return 0; } _ACEOF if ac_fn_c_try_link "$LINENO"; then : if ($OBJDUMP -p conftest$ac_exeext) 2>/dev/null | grep "RUNPATH.*$libdir" >/dev/null; then : lt_cv_shlibpath_overrides_runpath=yes fi fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LDFLAGS=$save_LDFLAGS libdir=$save_libdir fi shlibpath_overrides_runpath=$lt_cv_shlibpath_overrides_runpath # This implies no fast_install, which is unacceptable. # Some rework will be needed to allow for fast_install # before this can be enabled. hardcode_into_libs=yes # Ideally, we could use ldconfig to report *all* directores which are # searched for libraries, however this is still not possible. Aside from not # being certain /sbin/ldconfig is available, command # 'ldconfig -N -X -v | grep ^/' on 64bit Fedora does not report /usr/lib64, # even though it is searched at run-time. Try to do the best guess by # appending ld.so.conf contents (and includes) to the search path. if test -f /etc/ld.so.conf; then lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[ ]*hwcap[ ]/d;s/[:, ]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '` sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra" fi # We used to test for /lib/ld.so.1 and disable shared libraries on # powerpc, because MkLinux only supported shared libraries with the # GNU dynamic linker. Since this was broken with cross compilers, # most powerpc-linux boxes support dynamic linking these days and # people can always --disable-shared, the test was removed, and we # assume the GNU/Linux dynamic linker is in use. dynamic_linker='GNU/Linux ld.so' ;; netbsdelf*-gnu) version_type=linux need_lib_prefix=no need_version=no library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major ${libname}${shared_ext}' soname_spec='${libname}${release}${shared_ext}$major' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=no hardcode_into_libs=yes dynamic_linker='NetBSD ld.elf_so' ;; netbsd*) version_type=sunos need_lib_prefix=no need_version=no if echo __ELF__ | $CC -E - | $GREP __ELF__ >/dev/null; then library_names_spec='$libname$release$shared_ext$versuffix $libname$shared_ext$versuffix' finish_cmds='PATH="\$PATH:/sbin" ldconfig -m $libdir' dynamic_linker='NetBSD (a.out) ld.so' else library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' dynamic_linker='NetBSD ld.elf_so' fi shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=yes hardcode_into_libs=yes ;; newsos6) version_type=linux # correct to gnu/linux during the next big refactor library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=yes ;; *nto* | *qnx*) version_type=qnx need_lib_prefix=no need_version=no library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=no hardcode_into_libs=yes dynamic_linker='ldqnx.so' ;; openbsd* | bitrig*) version_type=sunos sys_lib_dlsearch_path_spec=/usr/lib need_lib_prefix=no if test -z "`echo __ELF__ | $CC -E - | $GREP __ELF__`"; then need_version=no else need_version=yes fi library_names_spec='$libname$release$shared_ext$versuffix $libname$shared_ext$versuffix' finish_cmds='PATH="\$PATH:/sbin" ldconfig -m $libdir' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=yes ;; os2*) libname_spec='$name' version_type=windows shrext_cmds=.dll need_version=no need_lib_prefix=no # OS/2 can only load a DLL with a base name of 8 characters or less. soname_spec='`test -n "$os2dllname" && libname="$os2dllname"; v=$($ECHO $release$versuffix | tr -d .-); n=$($ECHO $libname | cut -b -$((8 - ${#v})) | tr . _); $ECHO $n$v`$shared_ext' library_names_spec='${libname}_dll.$libext' dynamic_linker='OS/2 ld.exe' shlibpath_var=BEGINLIBPATH sys_lib_search_path_spec="/lib /usr/lib /usr/local/lib" sys_lib_dlsearch_path_spec=$sys_lib_search_path_spec postinstall_cmds='base_file=`basename \$file`~ dlpath=`$SHELL 2>&1 -c '\''. $dir/'\''\$base_file'\''i; $ECHO \$dlname'\''`~ dldir=$destdir/`dirname \$dlpath`~ test -d \$dldir || mkdir -p \$dldir~ $install_prog $dir/$dlname \$dldir/$dlname~ chmod a+x \$dldir/$dlname~ if test -n '\''$stripme'\'' && test -n '\''$striplib'\''; then eval '\''$striplib \$dldir/$dlname'\'' || exit \$?; fi' postuninstall_cmds='dldll=`$SHELL 2>&1 -c '\''. $file; $ECHO \$dlname'\''`~ dlpath=$dir/\$dldll~ $RM \$dlpath' ;; osf3* | osf4* | osf5*) version_type=osf need_lib_prefix=no need_version=no soname_spec='$libname$release$shared_ext$major' library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' shlibpath_var=LD_LIBRARY_PATH sys_lib_search_path_spec="/usr/shlib /usr/ccs/lib /usr/lib/cmplrs/cc /usr/lib /usr/local/lib /var/shlib" sys_lib_dlsearch_path_spec=$sys_lib_search_path_spec ;; rdos*) dynamic_linker=no ;; solaris*) version_type=linux # correct to gnu/linux during the next big refactor need_lib_prefix=no need_version=no library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=yes hardcode_into_libs=yes # ldd complains unless libraries are executable postinstall_cmds='chmod +x $lib' ;; sunos4*) version_type=sunos library_names_spec='$libname$release$shared_ext$versuffix $libname$shared_ext$versuffix' finish_cmds='PATH="\$PATH:/usr/etc" ldconfig $libdir' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=yes if test yes = "$with_gnu_ld"; then need_lib_prefix=no fi need_version=yes ;; sysv4 | sysv4.3*) version_type=linux # correct to gnu/linux during the next big refactor library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' shlibpath_var=LD_LIBRARY_PATH case $host_vendor in sni) shlibpath_overrides_runpath=no need_lib_prefix=no runpath_var=LD_RUN_PATH ;; siemens) need_lib_prefix=no ;; motorola) need_lib_prefix=no need_version=no shlibpath_overrides_runpath=no sys_lib_search_path_spec='/lib /usr/lib /usr/ccs/lib' ;; esac ;; sysv4*MP*) if test -d /usr/nec; then version_type=linux # correct to gnu/linux during the next big refactor library_names_spec='$libname$shared_ext.$versuffix $libname$shared_ext.$major $libname$shared_ext' soname_spec='$libname$shared_ext.$major' shlibpath_var=LD_LIBRARY_PATH fi ;; sysv5* | sco3.2v5* | sco5v6* | unixware* | OpenUNIX* | sysv4*uw2*) version_type=sco need_lib_prefix=no need_version=no library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=yes hardcode_into_libs=yes if test yes = "$with_gnu_ld"; then sys_lib_search_path_spec='/usr/local/lib /usr/gnu/lib /usr/ccs/lib /usr/lib /lib' else sys_lib_search_path_spec='/usr/ccs/lib /usr/lib' case $host_os in sco3.2v5*) sys_lib_search_path_spec="$sys_lib_search_path_spec /lib" ;; esac fi sys_lib_dlsearch_path_spec='/usr/lib' ;; tpf*) # TPF is a cross-target only. Preferred cross-host = GNU/Linux. version_type=linux # correct to gnu/linux during the next big refactor need_lib_prefix=no need_version=no library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=no hardcode_into_libs=yes ;; uts4*) version_type=linux # correct to gnu/linux during the next big refactor library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' shlibpath_var=LD_LIBRARY_PATH ;; *) dynamic_linker=no ;; esac { $as_echo "$as_me:${as_lineno-$LINENO}: result: $dynamic_linker" >&5 $as_echo "$dynamic_linker" >&6; } test no = "$dynamic_linker" && can_build_shared=no variables_saved_for_relink="PATH $shlibpath_var $runpath_var" if test yes = "$GCC"; then variables_saved_for_relink="$variables_saved_for_relink GCC_EXEC_PREFIX COMPILER_PATH LIBRARY_PATH" fi if test set = "${lt_cv_sys_lib_search_path_spec+set}"; then sys_lib_search_path_spec=$lt_cv_sys_lib_search_path_spec fi if test set = "${lt_cv_sys_lib_dlsearch_path_spec+set}"; then sys_lib_dlsearch_path_spec=$lt_cv_sys_lib_dlsearch_path_spec fi # remember unaugmented sys_lib_dlsearch_path content for libtool script decls... configure_time_dlsearch_path=$sys_lib_dlsearch_path_spec # ... but it needs LT_SYS_LIBRARY_PATH munging for other configure-time code func_munge_path_list sys_lib_dlsearch_path_spec "$LT_SYS_LIBRARY_PATH" # to be used as default LT_SYS_LIBRARY_PATH value in generated libtool configure_time_lt_sys_library_path=$LT_SYS_LIBRARY_PATH { $as_echo "$as_me:${as_lineno-$LINENO}: checking how to hardcode library paths into programs" >&5 $as_echo_n "checking how to hardcode library paths into programs... " >&6; } hardcode_action= if test -n "$hardcode_libdir_flag_spec" || test -n "$runpath_var" || test yes = "$hardcode_automatic"; then # We can hardcode non-existent directories. if test no != "$hardcode_direct" && # If the only mechanism to avoid hardcoding is shlibpath_var, we # have to relink, otherwise we might link with an installed library # when we should be linking with a yet-to-be-installed one ## test no != "$_LT_TAGVAR(hardcode_shlibpath_var, )" && test no != "$hardcode_minus_L"; then # Linking always hardcodes the temporary library directory. hardcode_action=relink else # We can link without hardcoding, and we can hardcode nonexisting dirs. hardcode_action=immediate fi else # We cannot hardcode anything, or else we can only hardcode existing # directories. hardcode_action=unsupported fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $hardcode_action" >&5 $as_echo "$hardcode_action" >&6; } if test relink = "$hardcode_action" || test yes = "$inherit_rpath"; then # Fast installation is not supported enable_fast_install=no elif test yes = "$shlibpath_overrides_runpath" || test no = "$enable_shared"; then # Fast installation is not necessary enable_fast_install=needless fi if test yes != "$enable_dlopen"; then enable_dlopen=unknown enable_dlopen_self=unknown enable_dlopen_self_static=unknown else lt_cv_dlopen=no lt_cv_dlopen_libs= case $host_os in beos*) lt_cv_dlopen=load_add_on lt_cv_dlopen_libs= lt_cv_dlopen_self=yes ;; mingw* | pw32* | cegcc*) lt_cv_dlopen=LoadLibrary lt_cv_dlopen_libs= ;; cygwin*) lt_cv_dlopen=dlopen lt_cv_dlopen_libs= ;; darwin*) # if libdl is installed we need to link against it { $as_echo "$as_me:${as_lineno-$LINENO}: checking for dlopen in -ldl" >&5 $as_echo_n "checking for dlopen in -ldl... " >&6; } if ${ac_cv_lib_dl_dlopen+:} false; then : $as_echo_n "(cached) " >&6 else ac_check_lib_save_LIBS=$LIBS LIBS="-ldl $LIBS" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ /* Override any GCC internal prototype to avoid an error. Use char because int might match the return type of a GCC builtin and then its argument prototype would still apply. */ #ifdef __cplusplus extern "C" #endif char dlopen (); int main () { return dlopen (); ; return 0; } _ACEOF if ac_fn_c_try_link "$LINENO"; then : ac_cv_lib_dl_dlopen=yes else ac_cv_lib_dl_dlopen=no fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_check_lib_save_LIBS fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_dl_dlopen" >&5 $as_echo "$ac_cv_lib_dl_dlopen" >&6; } if test "x$ac_cv_lib_dl_dlopen" = xyes; then : lt_cv_dlopen=dlopen lt_cv_dlopen_libs=-ldl else lt_cv_dlopen=dyld lt_cv_dlopen_libs= lt_cv_dlopen_self=yes fi ;; tpf*) # Don't try to run any link tests for TPF. We know it's impossible # because TPF is a cross-compiler, and we know how we open DSOs. lt_cv_dlopen=dlopen lt_cv_dlopen_libs= lt_cv_dlopen_self=no ;; *) ac_fn_c_check_func "$LINENO" "shl_load" "ac_cv_func_shl_load" if test "x$ac_cv_func_shl_load" = xyes; then : lt_cv_dlopen=shl_load else { $as_echo "$as_me:${as_lineno-$LINENO}: checking for shl_load in -ldld" >&5 $as_echo_n "checking for shl_load in -ldld... " >&6; } if ${ac_cv_lib_dld_shl_load+:} false; then : $as_echo_n "(cached) " >&6 else ac_check_lib_save_LIBS=$LIBS LIBS="-ldld $LIBS" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ /* Override any GCC internal prototype to avoid an error. Use char because int might match the return type of a GCC builtin and then its argument prototype would still apply. */ #ifdef __cplusplus extern "C" #endif char shl_load (); int main () { return shl_load (); ; return 0; } _ACEOF if ac_fn_c_try_link "$LINENO"; then : ac_cv_lib_dld_shl_load=yes else ac_cv_lib_dld_shl_load=no fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_check_lib_save_LIBS fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_dld_shl_load" >&5 $as_echo "$ac_cv_lib_dld_shl_load" >&6; } if test "x$ac_cv_lib_dld_shl_load" = xyes; then : lt_cv_dlopen=shl_load lt_cv_dlopen_libs=-ldld else ac_fn_c_check_func "$LINENO" "dlopen" "ac_cv_func_dlopen" if test "x$ac_cv_func_dlopen" = xyes; then : lt_cv_dlopen=dlopen else { $as_echo "$as_me:${as_lineno-$LINENO}: checking for dlopen in -ldl" >&5 $as_echo_n "checking for dlopen in -ldl... " >&6; } if ${ac_cv_lib_dl_dlopen+:} false; then : $as_echo_n "(cached) " >&6 else ac_check_lib_save_LIBS=$LIBS LIBS="-ldl $LIBS" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ /* Override any GCC internal prototype to avoid an error. Use char because int might match the return type of a GCC builtin and then its argument prototype would still apply. */ #ifdef __cplusplus extern "C" #endif char dlopen (); int main () { return dlopen (); ; return 0; } _ACEOF if ac_fn_c_try_link "$LINENO"; then : ac_cv_lib_dl_dlopen=yes else ac_cv_lib_dl_dlopen=no fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_check_lib_save_LIBS fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_dl_dlopen" >&5 $as_echo "$ac_cv_lib_dl_dlopen" >&6; } if test "x$ac_cv_lib_dl_dlopen" = xyes; then : lt_cv_dlopen=dlopen lt_cv_dlopen_libs=-ldl else { $as_echo "$as_me:${as_lineno-$LINENO}: checking for dlopen in -lsvld" >&5 $as_echo_n "checking for dlopen in -lsvld... " >&6; } if ${ac_cv_lib_svld_dlopen+:} false; then : $as_echo_n "(cached) " >&6 else ac_check_lib_save_LIBS=$LIBS LIBS="-lsvld $LIBS" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ /* Override any GCC internal prototype to avoid an error. Use char because int might match the return type of a GCC builtin and then its argument prototype would still apply. */ #ifdef __cplusplus extern "C" #endif char dlopen (); int main () { return dlopen (); ; return 0; } _ACEOF if ac_fn_c_try_link "$LINENO"; then : ac_cv_lib_svld_dlopen=yes else ac_cv_lib_svld_dlopen=no fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_check_lib_save_LIBS fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_svld_dlopen" >&5 $as_echo "$ac_cv_lib_svld_dlopen" >&6; } if test "x$ac_cv_lib_svld_dlopen" = xyes; then : lt_cv_dlopen=dlopen lt_cv_dlopen_libs=-lsvld else { $as_echo "$as_me:${as_lineno-$LINENO}: checking for dld_link in -ldld" >&5 $as_echo_n "checking for dld_link in -ldld... " >&6; } if ${ac_cv_lib_dld_dld_link+:} false; then : $as_echo_n "(cached) " >&6 else ac_check_lib_save_LIBS=$LIBS LIBS="-ldld $LIBS" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ /* Override any GCC internal prototype to avoid an error. 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Modified REAMDE to include link for doing releases. Signed-off-by: Marius Vlad commit f3751d53bda785810acf85692e809627360252bf Author: Chris Wilson Date: Tue Mar 1 15:06:43 2016 +0000 benchmarks/gem_blt: Measure the throughput of synchronous copies Signed-off-by: Chris Wilson commit b59bcb811a402c716302f61ca8d4d9af6a967807 Author: Marius Vlad Date: Tue Mar 1 17:03:55 2016 +0200 NEWS: Updates and bump release to 1.14. Signed-off-by: Marius Vlad commit 95ca7644dbed799744b877d3b451d86c286627fe Author: Daniele Ceraolo Spurio Date: Tue Mar 1 11:01:33 2016 +0000 tests/drv_hangman: test for acthd increasing through invalid VM space The hangcheck logic will not flag an hang if acthd keeps increasing. However, if a malformed batch jumps to an invalid offset in the ppgtt it can potentially continue executing through the whole address space without triggering the hangcheck mechanism. This patch adds a test to simulate the issue. I've kept the test running for more than 10 minutes before killing it on a BDW and no hang occurred. I've sampled i915_hangcheck_info a few times during the run and got the following: Hangcheck active, fires in 468ms render ring: seqno = fffff55e [current fffff55e] ACTHD = 0x47df685ecc [current 0x4926b81d90] max ACTHD = 0x47df685ecc score = 0 action = 2 instdone read = 0xffd7ffff 0xffffffff 0xffffffff 0xffffffff instdone accu = 0x00000000 0x00000000 0x00000000 0x00000000 Hangcheck active, fires in 424ms render ring: seqno = fffff55e [current fffff55e] ACTHD = 0x6c953d3a34 [current 0x6de5e76fa4] max ACTHD = 0x6c953d3a34 score = 0 action = 2 instdone read = 0xffd7ffff 0xffffffff 0xffffffff 0xffffffff instdone accu = 0x00000000 0x00000000 0x00000000 0x00000000 Hangcheck active, fires in 1692ms render ring: seqno = fffff55e [current fffff55e] ACTHD = 0x1f49b0366dc [current 0x1f4dcbd88ec] max ACTHD = 0x1f49b0366dc score = 0 action = 2 instdone read = 0xffd7ffff 0xffffffff 0xffffffff 0xffffffff instdone accu = 0x00000000 0x00000000 0x00000000 0x00000000 v2: use the new gem_wait() function (Chris) v3: switch to unterminated batch and rename test, remove redundant check, update test requirements (Chris), update top comment v4: force gpu reset if the hang detection fails (Mika) Cc: Mika Kuoppala Cc: Arun Siluvery Cc: Chris Wilson Signed-off-by: Daniele Ceraolo Spurio [Mika: removed batch_len=8] Signed-off-by: Mika Kuoppala commit 03c7f84eb1c95b9761bbff3c9fcaed8472c3c6fb Author: Daniele Ceraolo Spurio Date: Tue Mar 1 11:01:32 2016 +0000 lib: move i915_wedged_set to ig_gt.c Upcoming tests will call it to recover from bad states caused by hangcheck bugs.the function was renamed to igt_force_gpu_reset to have a naming closer to other hang-related functions in the same file. The value written to the debugfs has also been changed to -1; this makes no differences with the current implementation but copes with upcoming TDR changes (still under discussion) that should allow the resetting of a mask of rings. Signed-off-by: Daniele Ceraolo Spurio Signed-off-by: Mika Kuoppala commit 094e0cbabb9615c87d8e813a91f158fe439b536d Author: Chris Wilson Date: Tue Mar 1 13:22:03 2016 +0000 igt/gem_concurrent_blit: Deglobalify num_buffers More num_buffers onto the local struct passed down into the tests to avoid the issue with having to modify the global value inside the tests leading to hilarity if the test asserts. Signed-off-by: Chris Wilson commit aed69b56d4c63a19594440be6679307b2781ae2c Author: Chris Wilson Date: Thu Feb 25 21:43:01 2016 +0000 lib: Add read/write direction support for dmabuf synchronisation Allow read-only synchronisation on dmabuf mmaps, useful to allow concurrent read-read testing between the CPU and GPU. Signed-off-by: Chris Wilson commit 925e5e1caef9b56bd53df457735514b644c7a399 Author: Chris Wilson Date: Mon Feb 29 15:33:26 2016 +0000 lib: Check required number of surfaces against VFS file limits If we want to create more file handles than VFS supports (itself often a memory limited value), report that we can not create that many objects via intel_require_memory(). Signed-off-by: Chris Wilson commit a508fc86224887c413d99e55b524f3b03a073ed5 Author: Maarten Lankhorst Date: Mon Feb 29 10:04:31 2016 +0100 tests/kms_force_connector_basic: Disable all crtc's for load-detect. Load detection requires a inactive crtc to run. The CI igt tests are failing, so ensure there is at least 1 inactive crtc. Signed-off-by: Maarten Lankhorst Reviewed-by: Daniel Vetter commit 754876378d6c9b2775e8c07b4d16f9878c55949f Author: Chris Wilson Date: Fri Feb 26 22:11:10 2016 +0000 igt/gem_sync: Enforce a timeout of 20s The sync test is supposed to complete in 10s. But some bugs cause it to run very, very slowly. As a defence against those, terminate the test if we wait for more than 20s. Signed-off-by: Chris Wilson commit 3482925454da8c107f720448d24789ce6bf884c4 Author: Matt Roper Date: Fri Feb 26 08:46:30 2016 -0800 kms_atomic: drop unnecessary connector looping from plane_primary test Local variable num_connectors is never initialized before being auto-incremented in the loop. If we wind up with a non-zero garbage value, it will lead us to try to write to an out-of-bounds array index. We should probably initialize it to zero before use. However on closer inspection, the plane_primary test doesn't actually wind up using the connector list or number of connectors, so just remove the whole block of code; it was probably brought in by accident as part of a copy-paste operation. Cc: Daniel Stone Signed-off-by: Matt Roper commit 405b3478d1ac28141a334fe42e2908f2ea59e976 Author: Chris Wilson Date: Fri Feb 26 12:47:33 2016 +0000 igt/drv_hangman: Tidy up assertion failure message Because (drv_hangman:6035) CRITICAL: Failed assertion: !((__extension__ (__builtin_constant_p (l) && ((__builtin_constant_p (tmp) && strlen (tmp) < ((size_t) (l))) || (__builtin_constant_p (s) && strlen (s) < ((size_t) (l)))) ? __extension__ ({ size_t __s1_len, __s2_len; (__builtin_constant_p (tmp) && __builtin_constant_p (s) && (__s1_len = strlen (tmp), __s2_len = strlen (s), (!((size_t)(const void *)((tmp) + 1) - (size_t)(const void *)(tmp) == 1) || __s1_len >= 4) && (!((size_t)(const void *)((s) + 1) - (size_t)(const void *)(s) == 1) || __s2_len >= 4)) ? __builtin_strcmp (tmp, s) : (__builtin_constant_p (tmp) && ((size_t)(const void *)((tmp) + 1) - (size_t)(const void *)(tmp) == 1) && (__s1_len = strlen (tmp), __s1_len < 4) ? (__builtin_constant_p (s) && ((size_t)(const void *)((s) + 1) - (size_t)(const void *)(s) == 1) ? __builtin_strcmp (tmp, s) : (__extension__ ({ const unsigned char *__s2 = (const unsigned char *) (const char *) (s); int __result = (((const unsigned char *) (const char *) (tmp))[0] - __s2[0]); if (__s1_len > 0 && __result == 0) { __result = (((const unsigned char *) (const char *) (tmp))[1] - __s2[1]); if (__s1_len > 1 && __result == 0) { __result = (((const unsigned char *) (const char *) (tmp))[2] - __s2[2]); if (__s1_len > 2 && __result == 0) __result = (((const unsigned char *) (const char *) (tmp))[3] - __s2[3]); } } __result; }))) : (__builtin_constant_p (s) && ((size_t)(const void *)((s) + 1) - (size_t)(const void *)(s) == 1) && (__s2_len = strlen (s), __s2_len < 4) ? (__builtin_constant_p (tmp) && ((size_t)(const void *)((tmp) + 1) - (size_t)(const void *)(tmp) == 1) ? __builtin_strcmp (tmp, s) : (- (__extension__ ({ const unsigned char *__s2 = (const unsigned char *) (const char *) (tmp); int __result = (((const unsigned char *) (const char *) (s))[0] - __s2[0]); if (__s2_len > 0 && __result == 0) { __result = (((const unsigned char *) (const char *) (s))[1] - __s2[1]); if (__s2_len > 1 && __result == 0) { __result = (((const unsigned char *) (const char *) (s))[2] - __s2[2]); if (__s2_len > 2 && __result == 0) __result = (((const unsigned char *) (const char *) (s))[3] - __s2[3]); } } __result; })))) : __builtin_strcmp (tmp, s)))); }) : strncmp (tmp, s, l))) == 0) is a little hard to understand at a glance. Signed-off-by: Chris Wilson commit 430439541cc1ee6003569bf4b906e5095541e542 Author: Chris Wilson Date: Fri Feb 26 10:06:51 2016 +0000 igt/gem_sync: Test across all rings simultaneously Signed-off-by: Chris Wilson commit 0667cf56691e9f72685e36ce506790d8e279183a Author: Chris Wilson Date: Fri Feb 26 09:09:51 2016 +0000 igt/gem_sync: Add some forked variants Repeat the synchronisation test with a few competing processes. Signed-off-by: Chris Wilson commit d627e30c9e7be7c8ab03fe486ce7ab0d68b5c33c Author: Chris Wilson Date: Thu Feb 25 19:54:47 2016 +0000 igt/gem_concurrent_blit: Pretend tests exist Signed-off-by: Chris Wilson commit cf569c216b7b53c2a2f78d9e76a0ea093184c27b Author: Chris Wilson Date: Thu Feb 25 17:58:24 2016 +0000 igt/gem_concurrent_blit: Add dmabuf exercisers Create and use dmabuf mmaps as well to ensure correct synchronisation between concurrent rendering and CPU access. Signed-off-by: Chris Wilson commit f27d295fe3a1ca005dfa0fbfd81d6808b1f5ca47 Author: Chris Wilson Date: Tue Feb 23 17:45:49 2016 +0000 lib: Move gem_wait() to ioctl-wrappers We intend to use gem_wait() in more tests than gem_wait.c, so move the simple ioctl wrapper into the core. Signed-off-by: Chris Wilson commit babcf40f29d9e9cce5d0739b1784eb94fe91bd26 Author: Paulo Zanoni Date: Mon Feb 15 15:00:16 2016 -0200 kms_frontbuffer_tracking: add basic subtest This test executes one of each of the very basic operations with whatever features are enabled by default in the Kernel, without checking their statuses: we only care about the CRCs. Although it's completely redundant, it will be ran by the CI so we can spot regressions both in the specific features and in the frontbuffer tracking subsystem. We're not checking sink CRCs since they're still unreliable and we don't want false negatives in the CI. It takes 5 seconds to run this test on my machines. Signed-off-by: Paulo Zanoni commit b87188795e9fda89c7e376726283a63817e83c60 Author: Paulo Zanoni Date: Mon Feb 15 12:15:14 2016 -0200 kms_frontbuffer_tracking: don't fail fbc-farfromfence on SKL SKL doesn't do the same dspaddr_offset magic as the older gens, so FBC may not be enabled on fbc-farfromfence. This is not a bug since FBC is just disabled, and this is the expected case of the current Kernel, so let's not fail the test. If/once we land the proper infrastructure to fix this in the Kernel we may revert this commit. Signed-off-by: Paulo Zanoni commit 556535400c0b3058569d7df13fcdea826bdeb875 Author: Chris Wilson Date: Fri Feb 19 10:31:44 2016 +0000 igt/gem_exec_reloc: Check WC mmaps as well Signed-off-by: Chris Wilson commit 15deba45756eeeacca2ad83ac931606986f8d669 Author: David Weinehall Date: Thu Feb 18 13:08:46 2016 +0200 lib/igt_pm: Lib for power management Move power management related code to a separate library. Initially this is done only for workarounds that apply to external components. Modify the users of such workarounds accordingly. This currently involves HD audio and SATA link power management. For SATA link PM there's also code to save the previous settings, to allow for resetting the values after we've finished testing. Signed-off-by: David Weinehall Reviewed-by: Marius Vlad Signed-off-by: Marius Vlad commit 16038908de5ef491c8c795ae48ed880de235c532 Author: Chris Wilson Date: Thu Feb 18 10:35:10 2016 +0000 lib: Restore gem_available_aperture_size() Missed an error whilst rebasing and trying to modify the previous patch to keep this function intact... Instead, I now have to add this patch to restore gem_available_aperture_size() and its one usage. Signed-off-by: Chris Wilson commit 391b32c3822993a6dd5874d2898b0c16b8eb9d03 Author: Chris Wilson Date: Fri Feb 5 18:35:21 2016 +0000 igt: Report the global GTT size For many tests, the relevant aperture is not the ppGTT but the internal global GTT managed by the kernel. Use this limit appropriately. Signed-off-by: Chris Wilson commit e85c530eab9ef20b2708ff36bfc6f6fa3990e1f4 Author: Chris Wilson Date: Thu Feb 18 10:27:07 2016 +0000 igt: Mark gem_cs_tlb/gem_cs_prefetch as a pair of basic GTT layout tests Signed-off-by: Chris Wilson commit 3990dd87b60bf8092671cb3c536666936b460b0c Author: Chris Wilson Date: Tue Feb 16 14:42:04 2016 +0000 igt/gem_ctx_thrash: Combine context thrashing with a render test Signed-off-by: Chris Wilson commit 3b12d9e6dc115939ddd110c7a7f7ad319b731524 Author: Chris Wilson Date: Fri Feb 5 11:46:41 2016 +0000 igt/gem_ctx_thrash: Double number of threads/proceesses Slightly increase the stress by doubling the number of contending threads and the number of times we try and use each ctx/fd. Signed-off-by: Chris Wilson commit ef724ab2bba7a51113542c0bc9e77d34e8935c60 Author: Derek Morton Date: Thu Feb 4 12:06:57 2016 +0000 lib/igt_core.c: Expand --run-subtest functionality. Added extended wildcard support when specifying --run-subtest. Wildcard format is as specified in rfc3977 and the uwildmat() implementation is taken from libinn. See https://tools.ietf.org/html/rfc3977#section-4 for a description of allowed wildcard expressions. v2: Use comma as list separator (Ville Syrjala) support both ^ and ! as not operators (Dave Gordon) v3: Updated to use uwildmat() (Dave Gordon) Signed-off-by: Derek Morton [danvet: Fixup whitespace. Add #include . Run lint.] Signed-off-by: Daniel Vetter commit 0a45d6ba1371bb879f55d9f75d893552c2f71c97 Author: Marius Vlad Date: Fri Feb 12 15:26:10 2016 +0200 tests/prime_mmap: Encapsulate check_for_dma_buf_mmap() in igt_fixture. This unbreaks distcheck target that in turn runs each test with --list-subtests. Signed-off-by: Marius Vlad commit 42c7dd1255cd1e37298b76d38ea9962e76efd63a Author: Marius Vlad Date: Sun Feb 14 19:14:48 2016 +0200 Update MAINTAINERS file. Signed-off-by: Marius Vlad commit c5c1270f0f0f892f0e2a14c789e85f09f79ef1a6 Author: Kristian Høgsberg Kristensen Date: Sat Feb 13 12:37:34 2016 -0800 aubdump: Add a get_bo() lookup function We'll use this instead of accessing the bo array directly and add a few sanity checks. commit 68a064ec64dab22d353dcde0b3208fa067abed51 Author: Kristian Høgsberg Kristensen Date: Sat Feb 13 12:34:22 2016 -0800 aubdump: Don't use .so constructors for initializing This doesn't seem to work when mixed with constructors in other shared objects or other creative uses of the linker. Let's stick with a simpler mechanism, where we look up the libc functions when our hooks are called for the first time. commit a3506b52199d2ac8dbc358fbb562f700f1d9ded4 Author: Kristian Høgsberg Kristensen Date: Sat Feb 13 12:33:30 2016 -0800 aubdump: Raise SIGTRAP on failure commit ca3d355846c0b9746d2d6892bd0a4c1413b2abab Author: Chris Wilson Date: Fri Feb 12 16:38:04 2016 +0000 igt/gem_userptr_blits: Flip sign on error check Following conversion to __gem_execbuf() we need to consider that it returns -errno when checking the result. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94117 Signed-off-by: Chris Wilson commit ed40329c30b50c69b25c38fa728151ab9dae00cb Author: Tiago Vignatti Date: Tue Dec 8 19:37:32 2015 -0200 tests: Add prime_mmap_coherency for cache coherency tests Different than kms_mmap_write_crc that captures the coherency issues within the scanout mapped buffer, this one is meant for test dma-buf mmap on !llc platforms mostly and provoke coherency bugs so we know where we need the sync ioctls. I tested this with !llc and llc platforms, BTY and IVY respectively. Signed-off-by: Tiago Vignatti Reviewed-by: Stéphane Marchesin Signed-off-by: Daniel Vetter commit 7c89c9d7346ca940a4c5d2828ac0c85921fa52c3 Author: Tiago Vignatti Date: Mon Aug 10 13:28:37 2015 -0300 tests: Add kms_mmap_write_crc for cache coherency tests This program can be used to detect when CPU writes in the dma-buf mapped object don't land in scanout due cache incoherency. Although this seems a problem inherently of non-LCC machines ("Atom"), this particular test catches a cache dirt on scanout on LLC machines as well. It's inspired in Ville's kms_pwrite_crc.c and can be used also to test the correctness of the driver's begin_cpu_access and end_cpu_access (which requires i915 implementation. To see the need for flush, one has to run using '-n' option to not call the sync ioctls which, via a rather simple CPU hog the system will trashes the caches, while the test will catch the coherency issue. If you now suppress '-n', then things should just work like expected. I tested this with !llc and llc platforms, BTY and IVY respectively. v2: use prime_handle_to_fd_for_mmap instead. v3: merge end_cpu_access() patch with this and provide options to disable sync. v4: use library's prime_sync_{start,end} instead. v7: use CPU hog instead and use testing rounds to catch the sync problems. Signed-off-by: Tiago Vignatti Reviewed-by: Stéphane Marchesin Signed-off-by: Daniel Vetter commit 35debab2d9690aa6c26528358e882168e90dcb2b Author: Tiago Vignatti Date: Fri Dec 11 18:50:35 2015 -0200 lib: Add prime_sync_start and prime_sync_end helpers This patch adds dma-buf mmap synchronization ioctls that can be used by tests for cache coherency management e.g. when CPU and GPU domains are being accessed through dma-buf at the same time. v7: add sync invalid flags test. Signed-off-by: Tiago Vignatti Reviewed-by: Stéphane Marchesin Signed-off-by: Daniel Vetter commit 4edfa09ae4c184177389e339c57d090914936421 Author: Tiago Vignatti Date: Wed Jul 29 18:26:29 2015 -0300 prime_mmap: Add basic tests to write in a bo using CPU This patch adds test_correct_cpu_write, which maps the texture buffer through a prime fd and then writes directly to it using the CPU. It stresses the driver to guarantee cache synchronization among the different domains. This test also adds test_forked_cpu_write, which creates the GEM bo in one process and pass the prime handle of the it to another process, which in turn uses the handle only to map and write. Roughly speaking this test simulates Chrome OS architecture, where the Web content ("unpriviledged process") maps and CPU-draws a buffer, which was previously allocated in the GPU process ("priviledged process"). This requires kernel modifications (Daniel Thompson's "drm: prime: Honour O_RDWR during prime-handle-to-fd") and therefore prime_handle_to_fd_for_mmap is added to fail in case these lack. Also, upcoming tests (e.g. next patch) are going to use it as well, so make it public and available in the lib. v2: adds prime_handle_to_fd_with_mmap for skipping test in older kernels and test for invalid flags. Signed-off-by: Tiago Vignatti Reviewed-by: Stéphane Marchesin Signed-off-by: Daniel Vetter commit e0efeb97a970fbbd5adaeef472bf9f78777c6cb4 Author: Rob Bradford Date: Wed Jul 29 17:23:58 2015 -0300 prime_mmap: Add new test for calling mmap() on dma-buf fds This test has the following subtests: - test_correct for correctness of the data - test_map_unmap checks for mapping idempotency - test_reprime checks for dma-buf creation idempotency - test_forked checks for multiprocess access - test_refcounting checks for buffer reference counting - test_dup checks that dup()ing the fd works - test_userptr make sure it fails when mmaping due the lack of obj->base.filp in a userptr. - test_errors checks the error return values for failures - test_aperture_limit tests multiple buffer creation at the gtt aperture limit v2 (Tiago): Removed pattern_check(), which was walking through a useless iterator. Removed superfluous PROT_WRITE from gem_mmap, in test_correct(). Added binary file to .gitignore v3 (Tiago): squash patch "prime_mmap: Test for userptr mmap" into this one. v4 (Tiago): use synchronized userptr for testing. Add test for buffer overlapping. Signed-off-by: Rob Bradford Signed-off-by: Tiago Vignatti Reviewed-by: Stéphane Marchesin Signed-off-by: Daniel Vetter commit e1f663b543e89a58746b0d0bebb7bab30d325e1c Author: Tiago Vignatti Date: Wed Aug 12 15:57:12 2015 -0300 lib: Add gem_userptr and __gem_userptr helpers This patch moves userptr definitions and helpers implementation that were locally in gem_userptr_benchmark and gem_userptr_blits to the library, so other tests can make use of them as well. There's no functional changes. v2: added __ function to differentiate when errors want to be handled back in the caller; bring gem_userptr_sync back to gem_userptr_blits; added gtkdoc. v8: remove local_i915_gem_userptr from gem_concurrent_all.c to use the global helpers instead. Signed-off-by: Tiago Vignatti Reviewed-by: Stéphane Marchesin Signed-off-by: Daniel Vetter commit 7670e286f5043d04af0cd1e6df1f092b5bcaf09e Author: Maarten Lankhorst Date: Thu Feb 11 12:46:24 2016 +0100 kms_force_connector_basic: Add force-load-detect test Signed-off-by: Maarten Lankhorst Reviewed-by: Daniel Vetter commit 0e388f409a9cbbcbd9a8fd5cfa4df1e0d09599cc Author: Daniele Ceraolo Spurio Date: Mon Feb 1 14:24:37 2016 +0000 tests/gem_exec_params: test all valid execution flags The control subtest has been extended to check the execution flags for all the rings that are present in the HW. Cc: Chris Wilson Signed-off-by: Daniele Ceraolo Spurio Signed-off-by: Daniel Vetter commit 2629f3aeef9989297da9bdd2c8dcb607e0bbfcea Author: Tomeu Vizoso Date: Tue Feb 9 15:45:37 2016 +0100 lib: Fix build when vc4 headers are present Automake seems to not like variable assignments indented with tabs. Signed-off-by: Tomeu Vizoso Fixes: 9e5478dc4345 ("lib: Only compile igt_vc4 is we have it") Signed-off-by: Daniel Vetter commit 9e5478dc4345ec8747c4e109ba4f739a26b9341f Author: Daniel Vetter Date: Tue Feb 9 09:44:00 2016 +0100 lib: Only compile igt_vc4 is we have it Unbreaks compilation fail. Also appease gcc in gem_exec_basic because. Cc: Eric Anholt Signed-off-by: Daniel Vetter commit 467a9fac9bbb6385c0372a6c6a0f1d2f891984e9 Author: Eric Anholt Date: Mon Jan 25 10:36:12 2016 -0800 igt/vc4_wait_bo: Add tests with rendering performed. These caught an unexpected bug with clear colors (we'd get the last executed clear's color in our new BO), while failing to catch the bug I'd been hoping to find all along. Signed-off-by: Eric Anholt Reviewed-by: Daniel Stone commit e7e094f444ac59ee93b96d9021d8c11d51fecd59 Author: Eric Anholt Date: Mon Jan 25 13:13:09 2016 -0800 igt/vc4_create_bo: Test various paths in BO creation. create-bo-0 fails on the current kernel, and it's something I want to fix. v2: Use do_ioctl_err(). Signed-off-by: Eric Anholt Reviewed-by: Daniel Stone commit 59f98997ab315465a052ed11e43ed7f6b0ec708a Author: Eric Anholt Date: Mon Jan 25 13:15:36 2016 -0800 igt: Add a helper function for creating VC4 BOs. v2: Use do_ioctl(). Signed-off-by: Eric Anholt Reviewed-by: Daniel Stone commit b8badc243630e88f243b66c20599cfd035286382 Author: Eric Anholt Date: Mon Jan 25 10:01:35 2016 -0800 igt: Add a helper function for mapping VC4 BOs. v2: Use do_ioctl(). Signed-off-by: Eric Anholt Reviewed-by: Daniel Stone commit 4880e13d04c005c1d7918b4499be45704dea9aca Author: Eric Anholt Date: Fri Jan 22 18:04:29 2016 -0800 igt: Add a helper function for getting a VC4 BO that's been drawn to. v2: Use do_ioctl(). Signed-off-by: Eric Anholt Reviewed-by: Daniel Stone commit 7f421acb60793f5b25a8af5f668197331ba09d2a Author: Eric Anholt Date: Fri Jan 22 17:37:46 2016 -0800 igt/vc4_wait_bo: Add a test for VC4's wait-for-BO ioctl. The pad subtest fails currently. v2: Use do_ioctl() and do_ioctl_err(). Signed-off-by: Eric Anholt Reviewed-by: Daniel Stone commit d333a0ed69937cefdfe9b9937f6d9556e1c2238d Author: Eric Anholt Date: Fri Jan 22 17:18:29 2016 -0800 igt/vc4_wait_seqno: Add a test for VC4's wait-for-seqno ioctl. v2: Use do_ioctl_err(). Signed-off-by: Eric Anholt Reviewed-by: Daniel Stone commit 3f83f07039753131f01dbc09f312ffd61c088e31 Author: Eric Anholt Date: Fri Jan 22 17:18:56 2016 -0800 igt: Add support for DRIVER_VC4 flags on tests. Signed-off-by: Eric Anholt Reviewed-by: Daniel Stone commit ceca9ef8d0a9fb64c1a4da11381f13adb6eca303 Author: Eric Anholt Date: Mon Jan 25 11:40:15 2016 -0800 configure.ac: Test for libdrm_vc4 and build vc4 tests based on it. Signed-off-by: Eric Anholt Reviewed-by: Daniel Stone commit 8d441ee491ad91d67a650d99cc1bcd3ccbb9b662 Author: Damien Lespiau Date: Mon Feb 8 12:01:48 2016 +0000 list-workarounds: Fix python 2 print statement That script is a python 3 script, so we can't use the python 2 print statement, it's a function now. I missed it in the review because reviewing a diff without additional context gives you a partial story. Cc: Sameer Kibey Cc: Dylan Baker Signed-off-by: Damien Lespiau commit fb9df0e5102253ab5b1017fc5347209727552831 Author: Kibey, Sameer Date: Fri Feb 5 13:55:19 2016 -0800 list-workarounds: Extend the script to Mesa Updated the list-workarounds script so that it can parse Mesa directory if provided. Moved the common code to a separate function to allow reuse for both kernel and mesa. The new command line is: Usage: list-workarounds [options] path-to-kernel -k path-to-kernel -m path-to-mesa The legacy usage is retained to avoid breaking backwards compatibility. New parameters -k and -m are added for the new behavior. Either kernel or mesa or both paths can be specified. If path-to-mesa is invalid, error is reported. Signed-off-by: Sameer Kibey Signed-off-by: Damien Lespiau Reviewed-by: Damien Lespiau commit 6b3c832cfb0f9a4bd4e6784e0d0c70788937537b Author: Chris Wilson Date: Fri Dec 11 21:34:42 2015 +0000 igt/gem_workarounds: Convert to real GPU hang injection Signed-off-by: Chris Wilson commit 6f7372f6644bed5b615d24bedc06fa84488e3c39 Author: Chris Wilson Date: Fri Feb 5 15:55:40 2016 +0000 igt/gem_exec_alignment: Fix off-by-one in buffer objects When reducing the buffer count to fit into the aperture whilst aligned, remember to adjust the pointer so that the batch is the last object! Signed-off-by: Chris Wilson commit b081257d749b536de857952037ad3d9bbe40ddad Author: Chris Wilson Date: Fri Feb 5 15:33:23 2016 +0000 igt/gem_exec_alignment: Mark batch buffer as also requiring 48B If we completely fill the lower 4G of address space with our alignment objects, then we also need to mark the batch as requiring high-address. Though the kernel should be reordering in this case... Signed-off-by: Chris Wilson commit ffbc59a3ef9b0d4347c43fd03681bbbd9d0e43d8 Author: Chris Wilson Date: Fri Feb 5 11:16:18 2016 +0000 lib: Silence a common debug message when creating a context In context tests, we may create thousands of contexts, the noise from each requirement passing drowning out the real information. Let's only do the requirement test (to detect if contexts are meant to be supported or plain broken) only on the error path. Signed-off-by: Chris Wilson commit e7faf33ec791b78b2bf1ebb81be228364c3439c4 Author: Chris Wilson Date: Thu Feb 4 22:18:33 2016 +0000 igt/gem_ctx_thrash: Rewrite to avoid extraneous allocations The goal of the test is to exercise what happens when we fill the Global GTT with the contexts. To that end, we only need to allocate 2/4GiB of context objects, and can forgo filling each context with buffers. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94005 Signed-off-by: Chris Wilson commit 0e96238bf35959f933b545d2ec85ada6b769cf8b Author: Chris Wilson Date: Thu Feb 4 17:41:05 2016 +0000 igt/gem_userptr_blits: Limit amount of mlocked surfaces When testing surface eviction we don't need that many surfaces as we mlock surplus memory. Reducing the number of surfaces speeds up the test and prevents a couple of integer overflow bugs. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94004 Signed-off-by: Chris Wilson commit 7b5a81858193d775c08892b5072019488d7cdb0f Author: Chris Wilson Date: Sat Dec 12 18:56:53 2015 +0000 igt/gem_reset_stats: Convert from stop-rings to real hang injection Signed-off-by: Chris Wilson commit 9cc2b1336b60392b834e099ce3a3eb8ea723e29a Author: Chris Wilson Date: Fri Dec 11 13:40:11 2015 +0000 igt/gem_ctx_exec: Convert from stop-rings to a real GPU hang/reset Signed-off-by: Chris Wilson commit 38fe49d9a80a45ca529adaf8bbbba63e271ad30d Author: Chris Wilson Date: Thu Feb 4 11:17:42 2016 +0000 tests/drv_hangman: Convert to using central list of engines Rather than encoding our own list of engines, use the common one for greater coverage. Signed-off-by: Chris Wilson commit 01e467a6312184f963b82c9004b6d7ce09961cc2 Author: Chris Wilson Date: Fri Jan 1 11:29:51 2016 +0000 igt/drv_hangman: Make the batchbuffer check more robust All the external viewer expects of the GPU error capture is to extract the exact batch that triggered the hang. Everything else is internal detail to aide in post-mortem debugging of the kernel driver (i.e. subject to change) and not of the userspace portion (under control of the test). Signed-off-by: Chris Wilson commit 0753057446da0c74843c8a1000f589797da9388d Author: Chris Wilson Date: Fri Dec 11 13:27:49 2015 +0000 igt/drv_hangman: Inject a true hang Wean drv_hangman off the atrocious stop_rings and use a real GPU hang instead. Signed-off-by: Chris Wilson commit 8f6957a05a5176037d72d9a4c7d17c9bf8ac8f11 Author: Chris Wilson Date: Wed Jan 27 17:14:57 2016 +0000 igt/gem_ringfill: Add exercising the default-ring to basic testing ringfill generates a few very common errors when submitting requests, and historically these have been where we have had many implementation bugs, repeated over and over again. Signed-off-by: Chris Wilson commit 348742ec0da6f2dff68bcdce02debc8d8538cf02 Author: Chris Wilson Date: Fri Jan 29 10:45:43 2016 +0000 igt/gem_streaming_writes: Set bb start alignment to 64b for Ironlake Signed-off-by: Chris Wilson commit 3992babd985e1c70e216cdc42aab3e8872c07ad8 Author: Chris Wilson Date: Thu Jan 28 22:01:37 2016 +0000 igt/gem_busy: Refactor to use gem_require_ring() Now that gem_require_ring() does the right thing with BSD1/BSD2 we can use it to our advantage here. Signed-off-by: Chris Wilson commit 3005665ead7b88607269e034f03742d5771dd924 Author: Paulo Zanoni Date: Mon Jan 25 19:36:25 2016 -0200 tools/intel_residency: use setitimer instead of {,u}alarm It seems that Android doesn't have ualarm(). Let's use setitimer() instead. The tool still won't compile on Android due to igt_fb requiring Cairo, but we're supposed to solve this in another patch since our igt_fb calls don't actually require Cairo. Reported-by: Derek Morton Tested-by: Derek Morton Acked-by: Daniel Vetter Signed-off-by: Paulo Zanoni commit ec5deb218de44cdd698a4cdb3e79b63854de15c0 Author: Paulo Zanoni Date: Wed Jan 6 18:53:17 2016 -0200 tests/pm_rpm: find an appropriate CRTC instead of hardcoding CRTC 0 BSW does not allow CRTC 0 to be used on every connector, so we need to write code to actually find a suitable CRTC. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93124 Acked-by: Daniel Vetter Signed-off-by: Paulo Zanoni commit 84157ad1b43117798e88c664bf1c82f7421cb770 Author: Paulo Zanoni Date: Wed Jan 6 14:45:34 2016 -0200 tests/pm_rpm: remove POWER_DIR definition Unused ever since we moved some code from pm_rpm.c to lib/. This is currently defined inside igt_aux.c. Acked-by: Daniel Vetter Signed-off-by: Paulo Zanoni commit 7ca55f433c1e1fa722a46d1303524579581d6037 Author: Paulo Zanoni Date: Tue Jan 26 10:52:29 2016 -0200 tests/igt_fb: rename igt_get_all_formats to igt_get_all_cairo_formats I recently had this discussion with Daniel where I didn't want to use igt_drm_format_to_bpp() because it uses the format_desc array, and igt_fb currently assumes that all the format_desc formats have a matching valid Cairo format, so I wouldn't be able to easily add formats such as ARGB2101010. The function that has the assumption mentioned above is igt_get_all_formats: its current users call igt_get_all_formats, and then call cairo-dependent functions, such as igt_get_cairo_ctx on the returned formats. In order to document the current behavior and prevent any problems in case we start adding new formats without matching Cairo versions to format_desc, rename igt_get_all_formats to igt_get_all_cairo_formats and make it explicitly check for CAIRO_FORMAT_INVALID. Requested-by: Daniel Vetter Acked-by: Daniel Vetter Signed-off-by: Paulo Zanoni commit 55229f173e00947ecc05747a9038289940e30340 Author: Paulo Zanoni Date: Tue Jan 26 10:40:43 2016 -0200 lib/igt_fb: fix igt_get_all_formats documentation We give the callers a const pointer to a static variable that we reuse between multiple calls: they're not supposed to free it, and they don't free it today. Fix the documentation and leave the still reachable pointer instead of reworking the function and its callers. Acked-by: Daniel Vetter Signed-off-by: Paulo Zanoni commit 12c1eb653fcf26ad3483478e497e09333422d7cd Author: Paulo Zanoni Date: Mon Jan 25 21:17:50 2016 -0200 lib/igt_draw: use igt_drm_format_to_bpp() Don't reimplement the function. Acked-by: Daniel Vetter Signed-off-by: Paulo Zanoni commit 0432201e6d85e84cdaf5b4b82404345014f93316 Author: Paulo Zanoni Date: Mon Nov 30 17:10:43 2015 -0200 kms_frontbuffer_tracking: standardize the used FB sizes We want to make sure that both tiled and untiled buffers have the same size for the same width/height/format. This will allow better control over the failure paths exercised by our tests: when we try to flip from tiled to untiled, we'll be sure that we won't execute the error path that checks for buffer sizes. v2: Use the new igt_calc_fb_size() instead of implementing our own size calculation (Daniel). v3: We can now use igt_drm_format_to_bpp() (Daniel). Acked-by: Daniel Vetter Signed-off-by: Paulo Zanoni commit 096e020743b7e5500e36c4be73512ca548955829 Author: Paulo Zanoni Date: Mon Jan 25 21:04:37 2016 -0200 kms_frontbuffer_tracking: use igt_drm_format_to_bpp() The only format from fb_get_bpp() not supported by igt_drm_format_to_bpp() is ARGB2101010, but we don't really use it in kms_frontbuffer_tracking, so we can do the switch. Adding ARGB2101010 to igt_fb won't be that simple since there's no equivalent Cairo format, and igt_fb users assume that all formats known by igt_fb have equivalent Cairo formats. Acked-by: Daniel Vetter Signed-off-by: Paulo Zanoni commit be6f3fadaf2c45972f7a9830baa6fd35f4d755a6 Author: Paulo Zanoni Date: Fri Nov 27 12:13:41 2015 -0200 lib/igt_fb: make the automatic buffer sizes/strides smaller The big motivation behind this patch is that the current power-of-two granularity from igt_fb is way too big. There was more than one occasion where I had to work around this problem on kms_frontbuffer_tracking, and during my last workaround I was requested to just make igt_fb use more minimal buffers. I also need to export the size computation function so I won't need to reimplement it inside kms_frontbuffer_tracking. v2: - Fix the Yf sizes (Ville). - Don't change the Gen 2/3 behavior for both tiled and non-tiled. v3: - Edit the commit message, clarify that v1 was wrongly treating gen 2/3 non-tiled as tiled (Chris). Requested-by: Daniel Vetter Acked-by: Daniel Vetter Signed-off-by: Paulo Zanoni commit d63e72f0ad281f295b058a572741b995a5a0f64a Author: Chris Wilson Date: Thu Jan 28 17:02:11 2016 +0000 igt/gem_cs_tlb: Increase BB start alignment to 64bytes Ironlake requires 64byte alignment for its MI_BATCH_BUFFER_START. Signed-off-by: Chris Wilson commit 89f81e039636c1fe8a4df846c769bbab7de609dc Author: Chris Wilson Date: Thu Jan 28 16:21:17 2016 +0000 igt: More MI_STORE_DWORD fixes for gen5 A few other tests I have updated recently to use MI_STORE_DWORD also need the magic bit for gen4/5. Signed-off-by: Chris Wilson commit 3ec8b1d28e8d5ac924bd8f2e28baa31445bc5279 Author: Chris Wilson Date: Thu Jan 28 13:59:57 2016 +0000 igt/gem_ringfill: Set MI_MEM_VIRTUAL flag for gen<6 bit22 of MI_STORE_DWORD is confusing as the meaning changed between physical/virtual addressing in early gen and GTT/ppGTT in later gen. It looks like gen4 and gen5 still need the flag. Signed-off-by: Chris Wilson commit eaa03678b00179da89f194113c0740c033857c1c Author: Chris Wilson Date: Thu Jan 28 13:44:19 2016 +0000 lib: Hide BSD1/BSD2 rings on hardware without BSD2 The kernel happily lets us run on I915_EXEC_BSD2 even with such hardware existing. Sigh. Signed-off-by: Chris Wilson commit 506d683da138a7b90f5e338d522012f00d3145e9 Author: Chris Wilson Date: Thu Jan 28 11:46:21 2016 +0000 tests: Add gem_exec_reloc The first steps towards basic relocation handling. In today's edition, we ask how well does the kernel fare if we pass it relocations via mmappings of our buffer objects. Signed-off-by: Chris Wilson commit d18d1eca811fff9871bb619558aee48568fc1b4d Author: Chris Wilson Date: Wed Jan 27 20:22:13 2016 +0000 igt/gem_reset_stats: Convert residual calllers of gem_exec() to gem_execbuf() Missed from e3b68bb66683ad4cb4c80df904a3a21c98a2b6c2 due to rebasing fun. gem_reset_stats.c: In function 'inject_hang_ring': gem_reset_stats.c:227:19: error: implicit declaration of function 'gem_exec' [-Werror=implicit-function-declaration] gem_reset_stats.c:227:2: warning: nested extern declaration of 'gem_exec' [-Wnested-externs] Signed-off-by: Chris Wilson commit a1b47ef6ae6b92be4de0cf87f1ad2ee84029f8b7 Author: Chris Wilson Date: Wed Jan 27 19:44:16 2016 +0000 igt/gem_concurrent_blit: Disable libdrm buffer cache for child inheritance It just ends up with buffer leaks all over. On the flip side, it does allow us to inherit the bufmgr directly without worry of stomping over the aliased entries (and causing double closes). Signed-off-by: Chris Wilson commit 37f4da0d981f7990e9183be2eab2197d092fb701 Author: Chris Wilson Date: Wed Jan 27 13:02:35 2016 +0000 igt/gem_concurrent_all: Pass buffer data down In order reduce the number of parameters being passed everywhere, whilst simultaneously making more information available to the lower levels, pass the struct buffers around. Signed-off-by: Chris Wilson commit 5dea5deffc31e833a7cff1f70d29e49a5152fd3e Author: Chris Wilson Date: Wed Jan 27 18:22:28 2016 +0000 igt/gem_cs_prefetch: Check each ring Since each engine has its own ring, each is subject to CS prefetching and has its own layout that needs probing. Signed-off-by: Chris Wilson commit de70769cc0a24d4d594aaa4c1f99b4a3fc8f05fe Author: Chris Wilson Date: Wed Jan 27 16:28:35 2016 +0000 Add I915_EXEC_DEFAULT to list of known engines I dropped this from the list of rings for some tests when refactoring to a common array. Almost all of the tests should be run over the default exec engine to ensure ABI backwards compatiblity. Signed-off-by: Chris Wilson commit d1308990842fec5f523c129951a5c649d817be81 Author: Chris Wilson Date: Wed Jan 27 14:17:53 2016 +0000 igt/gem_sync: Use common array of rings Signed-off-by: Chris Wilson commit dd6b45235b5f1eea9b37e686460fdf1a1c56f431 Author: Chris Wilson Date: Wed Jan 27 14:17:53 2016 +0000 igt/gem_ringfill: Use common array of rings Signed-off-by: Chris Wilson commit 8cd52893346c647e475e801c5f5267f2f2b75ebe Author: Chris Wilson Date: Wed Jan 27 14:17:53 2016 +0000 igt/gem_cs_tlb: Use common array of rings Signed-off-by: Chris Wilson commit 7e0853c9c717f8e1ce6ed7f0d2fa6bd973bd0f6a Author: Chris Wilson Date: Wed Jan 27 14:17:53 2016 +0000 igt/gem_exec_nop: Use common array of rings Signed-off-by: Chris Wilson commit b09ef449af3ad8dcb0af19c48d716104ce18d76e Author: Chris Wilson Date: Wed Jan 27 14:17:53 2016 +0000 igt/gem_storedw_loop: Use common array of rings Signed-off-by: Chris Wilson commit 01acd70762a17df2f889d4b6a4161c3540a8ce00 Author: Chris Wilson Date: Wed Jan 27 13:08:35 2016 +0000 igt: Add gem_exec_basic Extremely basic check that we can dispatch an execbuf on every ring. Signed-off-by: Chris Wilson Acked-by: Daniel Vetter commit 04f5215f00962f746c5bd1aa7bdbcaf62280f235 Author: Chris Wilson Date: Wed Jan 27 14:07:27 2016 +0000 Extract array of execution engines A few tests wish to execute on every engine, so centralise the array of known engines. Signed-off-by: Chris Wilson commit b7f150b606bc27199a007dab8d248d9510967173 Author: Chris Wilson Date: Wed Jan 27 14:30:24 2016 +0000 lib: Query the kernel for support of a particular exec id Signed-off-by: Chris Wilson commit e3b68bb66683ad4cb4c80df904a3a21c98a2b6c2 Author: Chris Wilson Date: Sat Jan 23 09:44:19 2016 +0000 lib: Share common __gem_execbuf() An oft-repeated function to check EXECBUFFER2 for a particular fail condition. Signed-off-by: Chris Wilson commit 711398e82af469394559105a4f4c6dc21f582ffe Author: Gabriel Feceoru Date: Tue Jan 26 19:40:58 2016 +0200 igt/gem_ringfill: Allow listing subtests in gem_ringfill Moved gem_quiescent_gpu() call to the run path. Signed-off-by: Gabriel Feceoru Signed-off-by: Maarten Lankhorst commit 336235c0a8554ccd3d276718ba5bacf811da3e49 Author: Maarten Lankhorst Date: Wed Jan 27 13:30:52 2016 +0100 gem_ringfill: fix typo in test name Missing a r! Signed-off-by: Maarten Lankhorst commit 5f6ebb2cb7c4ddd30e6efbcb896996d00d0016ca Author: Chris Wilson Date: Wed Jan 27 11:30:43 2016 +0000 igt/gem_concurrent_blit: Tighter scoping of buffers variable Signed-off-by: Chris Wilson commit a64f31b31e7dcaa5c75792ecb0956c7abcaef3dd Author: Chris Wilson Date: Wed Jan 27 11:19:26 2016 +0000 igt/gem_concurrent_blit: Close userptr handle after importing into bufmgr The bufmgr import creates a new handle from a name for the userptr - we can discard our original handle immediately. Signed-off-by: Chris Wilson commit 6f75990af0e8867ddbb10efaddb3f14333766a3f Author: Chris Wilson Date: Wed Jan 27 11:17:03 2016 +0000 igt/gem_concurrent_blit: Tidy blt-fill using gem wrappers Replace the open-coded ioctls with the thin gem wrappers. Signed-off-by: Chris Wilson commit 3598fff994a0446376c1a2689921730a55f0d2aa Author: Derek Morton Date: Tue Jan 26 13:04:42 2016 +0000 tests/Android.mk: Make intel_residency CAIRO dependant intel_residency has a cairo dependency through igt_fb.c. Remove it if ANDROID_HAS_CAIRO is not defined. Signed-off-by: Derek Morton Signed-off-by: Paulo Zanoni commit e28acefc5c22b41e3f141ca959c8f96cd16feb47 Author: Jesse Barnes Date: Thu Jan 14 14:03:53 2016 -0800 lib/igt_kms, tests/testdisplay: allow probing of new connector modes Fixup some fallout from the connector probing changes so testdisplay -m will pick up newly hotplugged displays correctly. Signed-off-by: Jesse Barnes Date: Tue Jan 26 09:03:46 2016 +0000 igt/gem_exec_alignment: Reduce GTT usage if !full-ppgtt If we have to share the GTT with others, we cannot rely on being able to fill it and have to factor in some slack for others. Signed-off-by: Chris Wilson commit 49b13378812df0b53a77df733e24b4a29ca8650e Author: Chris Wilson Date: Tue Jan 26 08:54:46 2016 +0000 igt/gem_exec_alignment: Actually check aligned locations after many As well as ensuring the kernel doesn't simply crash when asked to do lots of objects, check it actually aligns them. Signed-off-by: Chris Wilson commit ea3331d1201fa04904d87698055b84fa29f23869 Author: Eric Anholt Date: Mon Jan 25 19:51:21 2016 +0000 igt: Disable igt_clflush_range() implementation on ARM builds Daniel has suggested that I put vc4 testing into igt, since it's got the piglit integration and KMS coverage already. This gets the ccore building so that I can start writing tests. Signed-off-by: Eric Anholt Reviewed-by: Daniel Stone commit bccc0ec6a3fdae880e14770c2ff5770fb86ea6fc Author: Daniel Stone Date: Mon Jan 25 18:33:12 2016 +0000 build: Disable x86-specific utilities on non-x86 Some bits can't be built on non-x86 architectures, mostly because they require x86-specific assembly primitives. Disable these by default on non-x86 architectures. Signed-off-by: Daniel Stone Reviewed-by: Eric Anholt commit e6ca4bd7cd911c2a422fd6961970fc5df2b071a0 Author: Michał Winiarski Date: Mon Jan 25 19:35:02 2016 +0100 lib/ioctl_wrappers: Add gem_has_softpin We can move it from softpin test into lib, and since softpin support is highly unlikely to go away in-between getparam ioctl calls, let's just do a single call and store the value. v2: rebase Signed-off-by: Michał Winiarski Reviewed-by: Chris Wilson Signed-off-by: Daniel Vetter commit 52b5d5016edfac14ca99c01fc7c2800eccbe11c0 Author: Michał Winiarski Date: Mon Jan 25 19:35:01 2016 +0100 lib/ioctl_wrappers: Add gem_gtt_type exposing raw HAS_ALIASING_PPGTT param No functional changes. While I'm here, let's also rename gem_uses_aliasing_ppgtt (since it's being used to indicate if we are using ANY kind of ppgtt) and introduce gem_uses_full_ppgtt to drop some unnecessary code from tests that were previously calling getparam directly instead of using ioctl wrapper. v2: drop gem_uses_full_48b_ppgtt since it's no longer used anywhere, s/48b/64b (Chris) v3: rebase Cc: Chris Wilson Signed-off-by: Michał Winiarski Reviewed-by: Chris Wilson Signed-off-by: Daniel Vetter commit 0e2071411a4d4e1488a821daf522dffde2809e03 Author: Chris Wilson Date: Mon Jan 25 13:51:00 2016 +0000 Promote eviction memory sizes and buffer counts to uint64_t References: https://bugs.freedesktop.org/show_bug.cgi?id=93849 Signed-off-by: Chris Wilson commit beb936f1888d3dcd18907097dfac09ef639036ab Author: Paulo Zanoni Date: Fri Nov 27 08:38:39 2015 -0200 tools: add intel_residency After the recent discussions regarding the effects of the vblank disabling policies on PC state residencies, I started running some experiments to reevaluate some non-intuitive conclusions I had reached. In order to help me do this, I decided to write this tool. The idea is very simple: the tool puts the system on an screen-on idle state, checks which PC state residency is the deepest we can reach, measures its residency, then does some not-so-idle tests and measures the residencies. You can use the tool to compare different Kernel trees and you can also use the tool to compare enabled vs disabled features. It's obvious that these cases do not represent real-world use cases of our driver, but they are already enough to highlight differences between the many patches I wrote. I was even able to catch a bug in one of my patches by spotting an unexpected regression in the residencies. I've been using this tool for FBC, but I expect it to also be useful for PSR, DRRS and similar features. I've been measuring the effects of different optimizations I wrote, and I've also been measuring the FBC vs no-FBC cases. It is also important to highlight that if your system is not properly configured for efficient power savings the tool may not be able to show differences between the results. On my Broadwell machine, for example, if I don't run "powertop --auto-tune" before running the tool, I get PC2 as the deepest state, and 90%+ residency for every workload. After properly configuring the machine, I get PC7 as the deepest state, which is the expected. So far I only tested this tool on BDW and SKL, and it may hit some unexpected assertions for older platforms. I only implemented the cases that are immediately useful for me, but we may also expand the tool in the future. We can add more important workloads. We can add support for screen-off cases, so we can compare the effects of runtime PM and other screen-off features. There's a lot we can do, but none of this is on my current priority list. And remember: /usr/bin/paste is your friend when comparing results. v2: - Be more idle at setup_idle(). - Improve printing for /usr/bin/paste usage. Signed-off-by: Paulo Zanoni commit 9bf4e19125597ed11a23027270f5ecb3099b5ea9 Author: Chris Wilson Date: Sun Jan 24 15:34:08 2016 +0000 igt/gem_softpin: Keep last_handle around to vary hole generation If we don't close the handle from the last pass, we don't free up the previous pass's vma immediately, changing the hole allocation. Signed-off-by: Chris Wilson commit c5b0293ca301ea643529d92b7e47f916ec59a762 Author: Chris Wilson Date: Sat Jan 23 18:10:46 2016 +0000 igt/gem_softpin: Exercise snoop+uncached abutting snooped objects are not allowed to abutt uncached objects on older gen (!llc and global GTT) or else the GPU may hang if it prefetches across a page boundary into a different memory type (i.e. CS reading from snoop). The kernel should be checking the alignment rules as normal. Signed-off-by: Chris Wilson commit d4a05bc009e0634e06df7fb65d3fe4c5a10e3319 Author: Chris Wilson Date: Sat Jan 23 09:07:12 2016 +0000 igt/gem_concurrent_blit: Switch to a shared mmap for userptr If we use a MAP_SHARED mmaping for the our backing storage for userptr, then it will be inherited across the fork with the same address. ideal for continuity testing of children. Signed-off-by: Chris Wilson commit 69ecedea735425cfb9a5d7dfcaa5840393553fd1 Author: Chris Wilson Date: Fri Jan 22 22:14:33 2016 +0000 igt/gem_concurrent_blit: Allocate a private batch cache for the child We have to avoid the COW alias for the intel_bufmgr and intel_batch cache as the child may close the object (in its local cache) leaving an alias in the parent cache pointing to a stale object. Signed-off-by: Chris Wilson commit 3eae640b817fc506aafafb417e432b521517ed1a Author: Chris Wilson Date: Fri Jan 22 19:52:51 2016 +0000 igt/gem_concurrent_blit: Disable userptr+child tests The issue here is that the pointer inherited upon the child is copied-on-write, i.e. the pointer is private to each process, but the handle is shared. This means that writes and reads in the child are going to a different set of pages than the GPU's object - the test is simply broken. To overcome this we would need to mmap the shared buffer into the child. Signed-off-by: Chris Wilson commit 4645630d3e7d1dcc8050e5f7da42318747002944 Author: Chris Wilson Date: Fri Jan 22 19:29:07 2016 +0000 igt/gem_concurrent_blit: Check inheritance of buffers The current forked modes recreate their handles in the children and just look at any complications arising from contention. This mode looks at inheriting the fd+handles from the parent into the child and seeing if we can use them within the child. Signed-off-by: Chris Wilson commit 512f846f377ee97c90467ccd121519586263993f Author: Chris Wilson Date: Fri Jan 22 19:26:50 2016 +0000 igt/gem_ringfill: Mark the write object as EXEC_OBJECT_WRITE After setting the flag for NORELOC (to avoid having to pay the cost of validating the relocations on every pass), we need to make sure that we set EXEC_OBJECT_WRITE so that we do track the outstanding writes. Signed-off-by: Chris Wilson commit 291ff6bcf1678192c1cc59728e1f69797962372a Author: Chris Wilson Date: Fri Jan 22 19:01:02 2016 +0000 igt/gem_ringfill: Disable MI_STORE_DATA_IMM on BSD/gen6 It's broken, avoid at all costs. Signed-off-by: Chris Wilson commit 0091e6787cf4da668068f82d58f7169516acbc1f Author: Chris Wilson Date: Fri Jan 22 18:02:50 2016 +0000 igt/gem_userptr_blits: Exercise applying relocations to a userptr bo Signed-off-by: Chris Wilson commit 5b675f7b2f6487548a91c01eb9a7e36e808617b4 Author: Chris Wilson Date: Fri Jan 22 17:33:40 2016 +0000 lib: Refactor common detection of missed interrupts As we have the same function in a few places to read the debugfs/i915_ring_missed_irq file, move it to the core. Signed-off-by: Chris Wilson commit e0ee36141ed1747f68580559a7cbfbeba902f05c Author: Chris Wilson Date: Fri Jan 22 17:28:54 2016 +0000 igt/gem_softpin: Fix MI_STORE_DATA_IMM for gen3 We need both a secure batch and to flag it to use the virtual GTT address. Signed-off-by: Chris Wilson commit fbb0f636bd8ac898145b52961f5f7996f01ddc08 Author: Chris Wilson Date: Fri Jan 22 17:25:08 2016 +0000 igt: Fix use MI_STORE_DATA_IMM on gen3 For the older gen, MI_STORE_DATA_IMM is a privileged command so we need to set the "secure" batch flag, and we also need to instruct the command to use the GTT virtual address. Signed-off-by: Chris Wilson commit 4a3a8263427db6e1d2779a092ab6fc035e8aca3f Author: Chris Wilson Date: Wed Jan 13 14:02:50 2016 +0000 lib: Print memory requirements as MiB Since we need a lot of memory, trim off the less significant digits for easier human consumption. Signed-off-by: Chris Wilson commit e180bec7bc16e727cea2f99aeff10b642f7778be Author: Chris Wilson Date: Fri Jan 22 15:00:11 2016 +0000 igt/gem_ringfill: Reduce ringfill to just filling the rings The objective of this test is to check how the driver handles a full ring. To that end we need only submit enough work to fill the ring by submitting work faster than the GPU can execute it. If we are more careful in our batch construction, we can feed them much faster and achieve the same results much quicker. Signed-off-by: Chris Wilson commit c4bcffcd109bfee6b70a60f2309d9acd881f7aec Author: Chris Wilson Date: Fri Jan 22 15:27:24 2016 +0000 igt/gem_exec_alignment: Tweaks count for large alignments We can fit a few more objects in at high alignment, so do so. Signed-off-by: Chris Wilson commit bd9842eadead0dc17f176f2c7124ab365264c945 Author: Chris Wilson Date: Fri Jan 22 00:26:56 2016 +0000 igt/gem_cs_tlb: Use softpin to remove GTT layout assumptions With softpin we can explicitly manage the layout of the objects to be executed, deliberately forcing the reuse of active pages in an attempt to spot misbehaviour in the CS TLBs. Being explicit allows us to eliminate a lot of the CPU overhead between execbuf, hopefully increasing the likelihood of a conflict. Signed-off-by: Chris Wilson commit 0143d4f3379b60650e4951f167822fcc76bb24d9 Author: Chris Wilson Date: Thu Jan 21 09:53:50 2016 +0000 igt/gem_concurrent_blit: Add userptr backing storage tests Signed-off-by: Chris Wilson commit a4493a54f348e547027eff3cb1607805f39f955d Author: Chris Wilson Date: Thu Jan 21 09:19:02 2016 +0000 igt/gem_softpin: Fix MI_STORE_DWORD_IMM for gen2-3 Before gen4, MI_STORE_DWORD was just 3 dwords long (cmd, offset, value). Signed-off-by: Chris Wilson commit 19642c604bb0c987e6e0069974042a98d128b9fc Author: Chris Wilson Date: Fri Dec 11 13:27:49 2015 +0000 lib: Expand igt_hang_ring() to select target context and various options Some potential callers want to inject a hang into a particular context, some want to trigger an actual ban and others may or may not want to capture the associated error state. Expand the hang injection interface to suit all. v2: Disable the new kernel API, but push to provide a missing piece of infrastucture to unbreak compilation. Signed-off-by: Chris Wilson commit 92caf138f2d878429f91397120e215dcb524efac Author: Chris Wilson Date: Wed Dec 16 09:23:56 2015 +0000 tests: Drop the superfluous igt_require_hang_ring() As the hang injection now itself checks for validity before use, the tests don't need to do so themselves. Except in certain situations! If the test forks, it should do requirement checks before the fork (so that we don't anger the igt gods) and if the test plays around i915.reset then it needs to do an early igt_require_hang_ring() that is not affected by the changes to i915.reset. Signed-off-by: Chris Wilson commit a2eb63720b939d58a39cc7e5ef5ad2204fec260a Author: Chris Wilson Date: Fri Dec 11 21:24:21 2015 +0000 lib: Always double check igt_require_hang_ring() on use If we move the igt_require() into the hang injector, this makes simple test cases even more convenient. More complex test cases can always do their own precursory check before settting up the test. However, this does embed the assumption that the first context we are called from is safe (i.e no i915.enable_hangcheck/i915.reset interferrence). v2: A couple of environment variables to skip hang testing or to force hang injection even if the GPU cannot be reset. Signed-off-by: Chris Wilson commit 47b61378426002c0f71644c65c73477265a5751d Author: Chris Wilson Date: Fri Jan 8 10:40:33 2016 +0000 igt/gem_partial_pwrite_pread: Fix range computation The range we chose to overwrite in the target had an off-by-one error that could cause it to compute a size that went past the end of the buffer (and so trigger EINVAL). Fortuituously with our seed this did not occur. Whilst changing the range calculation, update the error logging to include the range information. Signed-off-by: Chris Wilson commit 6bada3e2d494e0823a31773e916c62bd36facbe7 Author: Chris Wilson Date: Wed Jan 13 16:47:21 2016 +0000 igt/gem_softpin: Remove false dependencies on esoteric features For softpinning, we do not require either userptr or extended ppgtt, so remove those requirements and make the tests work universally. (Certain ABI tests require large GTT, or per-process GTT.) In the process, make the tests more extensive - validate overlapping handling more careful, explicitly test no-relocation support, validate more ABI handling. And for fun, cause a kernel GPF. Signed-off-by: Chris Wilson commit ad9b78f443be71c093d56e513f58442f46da496b Author: Chris Wilson Date: Tue Jan 19 23:59:33 2016 +0000 igt/gem_exec_alignment: Convert to subtests Allow both parts (single, many) to be run independently. Signed-off-by: Chris Wilson commit 28c33c6f90016f494d387ff8e886632ad3b5dfc6 Author: Chris Wilson Date: Tue Jan 19 21:11:28 2016 +0000 igt/gem_exec_alignment: Fix off-by-one in evalation of find_last_bit() Signed-off-by: Chris Wilson commit 6cf9d911ab0887f481f25351ab480d44cf044e07 Author: Chris Wilson Date: Tue Jan 19 21:02:40 2016 +0000 igt/gem_exec_alignment: Remember to require 48b objects! In order to actually use the high space we need to set the can-use-48bit flag. Signed-off-by: Chris Wilson commit 167fb9e7b2d77c6b672384f880988b386129d964 Author: Chris Wilson Date: Tue Jan 19 16:52:32 2016 +0000 igt/gem_exec_alignment: Test multiple objects with alignment as well Compute the largest alignment for the most number of objects we can create, then trying an execbuf with them. Signed-off-by: Chris Wilson commit e7bdc5c91692fba3f74aea4dc6ec662c98d1fec3 Author: Chris Wilson Date: Tue Jan 19 13:44:09 2016 +0000 igt/gem_exec_alignment: Test all possible pot alignments Signed-off-by: Chris Wilson commit de45ceb6678724d2c6a5ce4b0b614071e72b4f32 Author: Chris Wilson Date: Sat Jan 16 00:35:20 2016 +0000 igt/gem_ring_sync_loop: Be explicit! The test just aims to execute batches on alternating rings with a write target such that every batch must be executed after the previous completes. This stresses the inter-ring synchronisation, which is interrupt driven if the gpu does not support semaphores, and so is a good stress tests for detecting "missed interrupt syndrome". Make that detection explicit. Signed-off-by: Chris Wilson commit a8f0963af5c217210f333790385a3d753794f6ad Author: Chris Wilson Date: Wed Jan 13 15:06:41 2016 +0000 igt/gem_storedw_loop: Add a few more iterations Whilst still keeping the runtime down, extend the pipeline slightly. Signed-off-by: Chris Wilson commit e2b9dfd0aa4295ecbd8d7c8ab3f58fa43514cf61 Author: Chris Wilson Date: Wed Jan 13 14:57:47 2016 +0000 igt/gem_storedw_loop: Remove libdrm crutches Make the behaviour of the test more explicit wrt to the handle management, mmap and domain handling. Signed-off-by: Chris Wilson commit 38790b77d562a3b1cf31996aff160081d276796f Author: Chris Wilson Date: Mon Jan 11 14:12:54 2016 +0000 igt/gem_cs_prefetch: Replace explicit sync with implicit sync We can trade off the explicit sync (presumably to avoid some resource starvation issue?) with the implicit sync of having to perform a relocation. Using an implicit sync helps stress core kernel code, besides being much faster! Signed-off-by: Chris Wilson commit a6090c71918ae4c0a54eda133081dbd1e6fe8018 Author: Chris Wilson Date: Fri Jan 8 16:32:29 2016 +0000 igt/gem_mmap_wc: Test cpu mmap vs wc mmap coherency Similar to the cpu mmap vs gtt mmap coherency test. Signed-off-by: Chris Wilson commit 571b876544933c4c6cab16065b1ade76246a7f55 Author: Chris Wilson Date: Fri Jan 8 11:51:56 2016 +0000 gem_concurrent_all: Add a "quick" tiny pass Signed-off-by: Chris Wilson commit 1c61c0f75097983d1a19e03e2c6dfd631307d1ef Author: Chris Wilson Date: Fri Jan 8 10:51:09 2016 +0000 gem_concurrent_blit: Add a pread/pwrite variant to only set part of the buffer The idea is to check partial cacheline reads/writes. Signed-off-by: Chris Wilson commit 42291f25100cd01653b3fb3a2a1fbe6975e9c1bf Author: Chris Wilson Date: Thu Jan 7 11:19:26 2016 +0000 gem_concurrent_blit: Don't call igt_require() outside of a subtest/fixture gem_concurrent_blit tries to ensure that it doesn't try and run a test that would grind the system to a halt, i.e. unexpectedly cause swap thrashing. It currently calls intel_require_memory(), but outside of the subtest (as the tests use fork, it cannot do requirement testing within the test children) - but intel_require_memory() calls igt_require() and triggers and abort. Wrapping that initial require within an igt_fixture() stops the abort(), but also prevents any further testing. This patch restructures the requirement checking to ordinary conditions, which though allowing the test to run, also prevents listing of subtests on machines which cannot handle them. commit 51e965f299284b3c9b96ac5e384ddeb22bd8d1fd Author: Chris Wilson Date: Sun Jan 17 16:21:01 2016 +0000 tests: Add basic gem_sync test A very basic test of functionality, execute a nop and wait for it to complete. It should be very effective at stimulating the "missed interrupt syndrome" on all devices. Signed-off-by: Chris Wilson commit 136d6c796141b9b9fc9c96fe57dc2352c5224548 Author: Chris Wilson Date: Sat Jan 16 17:49:46 2016 +0000 igt/gem_streaming_writes: Set the initial CPU write domain Remove one assumption from the test and amek the domain management explict - when we write through the CPU to construction the batch, mark it as having been written. Signed-off-by: Chris Wilson commit 59adb00129acd1f9aff76edd19f7774876149d4f Author: Chris Wilson Date: Fri Jan 15 13:34:39 2016 +0000 tests: Add gem_busy Exercise the busy-ioctl and verify it reports the right active engines using the execbuffer notation. Signed-off-by: Chris Wilson commit 825482a25c3efd82ad4630169d62248b06be4bc0 Author: Derek Morton Date: Mon Jan 11 13:32:04 2016 +0000 tools/Android.mk: Add zlib support IGT does not build for Android due to a zlib dependency being added to intel_error_decode.c in a recent patch. This patch fixes the error by updating the Android makefile to add the path to the zlib library and using any LDFLAGS specified in Makefile.sources. Signed-off-by: Derek Morton Signed-off-by: Damien Lespiau commit fe7a42bff6c09cda864021d291a842ffd563e30e Author: Mika Kahola Date: Fri Jan 15 10:24:55 2016 +0200 tools/intel_bios_reader: Fix typo on dump info Fix typo on intel_bios_reader.c Signed-off-by: Mika Kahola Signed-off-by: Jani Nikula commit 480479d7dce38715ca82741fce047a9eca06e8cc Author: Jani Nikula Date: Thu Jan 14 17:43:06 2016 +0200 intel_bios_reader: dump MIPI sequence block v3 Similar to what's done in kernel. It's a bit artificial that the parsing and dumping are two separate steps in the userspace tool, but it's easier to follow and debug the code when both the kernel and userspace are similar. v2: don't segfault so much on dumping null pointers Signed-off-by: Jani Nikula commit 70dc8c85f1ba543b6f6ef16c49718b68d7dafba8 Author: Jani Nikula Date: Thu Jan 14 16:41:53 2016 +0200 intel_bios_reader: port the sequence block parsing from kernel Reuse the same code as kernel. Also parses v3, although does not actually dump that stuff yet. Signed-off-by: Jani Nikula commit 7d1a37282b39026fe55fd9aee637d914b237a4f7 Author: Jani Nikula Date: Thu Jan 14 16:24:11 2016 +0200 intel_bios_reader: port find_panel_sequence_block from kernel No need to reinvent wheels, reuse the code from kernel. Signed-off-by: Jani Nikula commit b26393489ef8cba34773d3132c33c18b08d835bd Author: Jani Nikula Date: Thu Jan 14 16:08:55 2016 +0200 intel_bios_reader: make the VBT pointers more const In const we trust. Signed-off-by: Jani Nikula commit d9588c891d0dd252230b363c02ca962eed1d2303 Author: Jani Nikula Date: Thu Jan 14 15:48:13 2016 +0200 intel_bios_reader: fix size handling for 32-bit block size The MIPI DSI sequence block v3+ has a separate block size field. Signed-off-by: Jani Nikula commit 2e2fffa7a5e0debb1ea2cc70b46c4818b48b0d53 Author: Jani Nikula Date: Thu Jan 14 15:27:50 2016 +0200 intel_bios_reader: pass bdb pointer around instead of having as global Signed-off-by: Jani Nikula commit 065d73619f33c3ac92c80d06b7a48992406940cf Author: Ville Syrjälä Date: Fri Jan 8 20:37:51 2016 +0200 tests/kms_chv_cursor_fail: Skip when the pipe doesn't exist Looks like I fumbled things when I made kms_chv_cursor_fail iterate over all pipes. It fails to check that the pipe actually exists, and so fails on < 3 pipe platforms. Add the necessary checks to skip on non-existing pipes. Signed-off-by: Ville Syrjälä commit cd658a7c6bca74eb897a8ae87751029793f0c4f4 Author: Chris Wilson Date: Thu Jan 7 09:04:03 2016 +0000 core/sighelper: Interrupt everyone in the process group Some stress tests create both the signal helper and a lot of competing processes. In these tests, the parent is just waiting upon the children, and the intention is not to keep waking up the waiting parent, but to keep interrupting the children (as we hope to trigger races in our kernel code). kill(-pid) sends the signal to all members of the process group, not just the target pid. We also switch from using SIGUSR1 to SIGCONT to paper over a race condition when forking children that saw the default signal action being run (and thus killing the child). Signed-off-by: Chris Wilson Acked-by: Daniel Vetter commit 05ac611358e61f914d99e00e1738f2ff9cfb05d4 Author: Rodrigo Vivi Date: Fri Jan 8 07:40:45 2016 -0800 kms_psr_sink_crc: Simplify debugfs reading. Let's start using igt_debugfs_read helper so we can change the debugfs interface at anytime. Signed-off-by: Rodrigo Vivi commit f1bb20eb7c4fa5f8b98bfd9876adc69c250e9bea Author: Ville Syrjälä Date: Mon Dec 14 00:54:33 2015 +0200 tests/kms_flip: Increase TEST_TS_CONT max seq difference to 150 During suspend tests we can exceed the current 100 frame difference in sequence numbers. Bump the limit to 150 frames. Signed-off-by: Ville Syrjälä commit 39aecb05d5c608cb7916fe376341de1828945167 Author: Ville Syrjälä Date: Mon Dec 14 00:55:11 2015 +0200 tests/kms_pipe_crc_basic: Use igt_assert_eq() to see the failing frame counts Use igt_assert_eq() to compare the frame numbers during the frame sequence tests so that we'll see exactly what the bad frame counts are when the test fails. Signed-off-by: Ville Syrjälä commit 7ff8223d44b875e0eec02f32b9fce8baeca689a3 Author: Ville Syrjälä Date: Sun Dec 13 06:58:40 2015 +0200 tests/gem_mmap_gtt: Make the small-bo tiling tests work on old platforms Several factors conspire against us when trying to execute the tiled small-bo tests: - pre-gen4 require power of two fences, with natural alignment - the entire gtt may be mappable - we put a guard page at the end of gtt What all that means is that when we try to use a tiled object half the size of the mappable area, we can only fit it in the first half of the gtt. That leads to a SIGBUS when we try to fault in the object when there's already something (eg. fbdev) occupying the first half of gtt. So in order to make the tests run on old machines, let's further halve the object size when things look too tight. Signed-off-by: Ville Syrjälä commit 21022f076d4047348f377a1938079c046de13f42 Author: Ville Syrjälä Date: Sun Dec 13 06:54:06 2015 +0200 tests/gem_mmap_gtt: Add progress indicators Some of the copy tests take a while, so let the user know how far along we are via a progress indicator. Signed-off-by: Ville Syrjälä commit 86382de3fb17582470b32bd955ad31be201b7304 Author: Ville Syrjälä Date: Sun Dec 13 06:53:28 2015 +0200 tests/gem_mmap_gtt: Deal with tile sizes on gen2/3 Gen2/3 platforms have some unusual tile dimensions. Account for them to make the test work correctly. Signed-off-by: Ville Syrjälä commit 1ecd91a8c6575c663492eee81cd48c8d1cb36914 Author: Ville Syrjälä Date: Sun Dec 13 00:04:43 2015 +0200 Fix a bunch of printf types igt_kms.c: In function ‘igt_crtc_set_background’: igt_kms.c:1940:2: warning: format ‘%lu’ expects argument of type ‘long unsigned int’, but argument 5 has type ‘uint64_t’ [-Wformat=] LOG(display, "%s.%d: crtc_set_background(%lu)\n", ^ intel_firmware_decode.c: In function ‘csr_open’: intel_firmware_decode.c:169:2: warning: format ‘%zd’ expects argument of type ‘signed size_t’, but argument 3 has type ‘__off_t’ [-Wformat=] printf("Firmware: %s (%zd bytes)\n", filename, st.st_size); ^ intel_gpu_top.c: In function ‘main’: intel_gpu_top.c:683:10: warning: format ‘%lu’ expects argument of type ‘long unsigned int’, but argument 3 has type ‘uint64_t’ [-Wformat=] stats[i] - last_stats[i]); ^ hsw_compute_wrpll.c: In function ‘main’: hsw_compute_wrpll.c:644:3: warning: format ‘%li’ expects argument of type ‘long int’, but argument 7 has type ‘long long int’ [-Wformat=] igt_fail_on_f(ref->r2 != r2 || ref->n2 != n2 || ref->p != p, ^ gem_gtt_hog.c: In function ‘__real_main155’: gem_gtt_hog.c:177:2: warning: format ‘%lu’ expects argument of type ‘long unsigned int’, but argument 4 has type ‘unsigned int’ [-Wformat=] igt_info("Time to execute %lu children: %7.3fms\n", ^ kms_flip.c: In function ‘run_test_step’: kms_flip.c:985:3: warning: format ‘%u’ expects argument of type ‘unsigned int’, but argument 10 has type ‘__time_t’ [-Wformat=] igt_assert_f(end - start > 0.9 * frame_time(o) && ^ kms_flip.c:985:3: warning: format ‘%u’ expects argument of type ‘unsigned int’, but argument 11 has type ‘__suseconds_t’ [-Wformat=] kms_frontbuffer_tracking.c: In function ‘setup_sink_crc’: kms_frontbuffer_tracking.c:1364:3: warning: format ‘%ld’ expects argument of type ‘long int’, but argument 4 has type ‘ssize_t’ [-Wformat=] igt_info("Unexpected sink CRC error, rc=:%ld errno:%d %s\n", ^ Signed-off-by: Ville Syrjälä commit a7882a31cb9f516b6068a81221c0fdaf7e9d4073 Author: Ville Syrjälä Date: Fri Dec 18 14:21:27 2015 +0200 tests/kms_chv_cursor_fail: Add a test to exercise CHV pipe C cursor fail The test tries to anger CHV pipe C cursor by walking the edges of the screen while moving the cursor across the screen edge. The actual hw issue only occurs on pipe C, and only on the left screen edge. The testcase can walk all the edges though, and on all pipes, just so I could make sure the failure doesn't occur there. Signed-off-by: Ville Syrjälä commit a7a2c76a806e7aa93c7e8c998465a8cb63dbaa37 Author: Ville Syrjälä Date: Fri Dec 18 16:10:34 2015 +0200 tests/kms_pipe_crc_basic: Add tests for O_NONBLOCK CRC reads v2: Rebased due to __attribute__((warn_unused_result)) Signed-off-by: Ville Syrjälä commit 909074503012a11fc631118cd3180b4a1c27646e Author: Ville Syrjälä Date: Fri Dec 18 14:35:05 2015 +0200 lib: Add igt_pipe_crc_new_nonblock() Add support for reading the CRC in non-blocking mode. Useful for tests that want to start the CRC capture, then do a bunch of operations, then collect however many CRCs that got generated. The current igt_pipe_crc_new() + igt_pipe_crc_get_crcs() method would block until it gets the requested number of CRCs, whreas in non-blocking mode we can just read as many as got generated thus far. v2: __attribute__((warn_unused_result)), document the new igt_pipe_crc_get_crcs() return value (Daniel) Signed-off-by: Ville Syrjälä commit 5b113d323dde18ef3bbae2f57d613be4ab7eb267 Author: Ville Syrjälä Date: Thu Dec 17 01:39:31 2015 +0200 lib: Extract some common fb create+fill methods into helpers Several tests do one or more of the following: * igt_create_fb() + igt_paint_test_pattern() * igt_create_color_fb() + igt_paint_test_pattern() * igt_create_fb() + igt_paint_image() Extract them into new helpers: igt_create_pattern_fb(), igt_create_color_pattern_fb(), igt_create_image_fb(). v2: Fix typos, and improve API docs (Thomas) Signed-off-by: Ville Syrjälä commit 7cb35109645e6495f67981b9930587c1ddfe4f90 Author: Michel Thierry Date: Wed Jan 6 15:00:39 2016 +0000 tests/gem_softpin: Use offset addresses in canonical form i915 validates that requested offset is in canonical form, so tests need to convert the offsets as required. Also add test to verify non-canonical 48-bit address will be rejected. v2: Use sign_extend64 for converting to canonical form (Tvrtko) Cc: Vinay Belgaumkar Cc: Tvrtko Ursulin Reviewed-by: Vinay Belgaumkar Signed-off-by: Michel Thierry commit fca862cdd3a1152a64f062caff4475478e2bd50a Author: Chris Wilson Date: Thu Jan 7 10:54:30 2016 +0000 igt/gem_mmap_gtt: Add a test to exercise coherency between GTT/CPU This checks whether a write through the GTT is immediately visible to the CPU. Signed-off-by: Chris Wilson commit 8528b484e8cf9d8e9c627f99e283285726967f74 Author: Derek Morton Date: Wed Dec 23 15:34:48 2015 +0000 igt_core: Fix logging to display extended line line[strlen(line)] will always evaluate to NULL so line_continuation was always true. That prevented the program name, pid and log level ever being printed. Changed to [strlen(line) - 1] so the last character before the null terminator is compared with '\n' to determine line_continuation. Signed-off-by: Derek Morton Signed-off-by: Daniel Vetter commit 51bb53663e2d0c57e9e40c1961d67ddc1e086be5 Author: Chris Wilson Date: Wed Jan 6 10:19:03 2016 +0000 benchmarks/gem_latency: Allow setting an infinite time Well, 24000 years. Signed-off-by: Chris Wilson commit 3c1362f0a6a930f874b7533cb0a03ba9177278b4 Author: Maarten Lankhorst Date: Tue Jan 5 15:19:13 2016 +0100 tests: Bump pageflip wait timeout to 50 ms. The default is too low for panels that are 30 fps or lower. Bump the timeout to 50 ms to prevent spurious errors on those displays. Signed-off-by: Maarten Lankhorst commit 1d6e5d3197eebf682e218a34c56139f2df4ea090 Author: Chris Wilson Date: Sun Jan 3 13:44:17 2016 +0000 igt/gem_concurrent_all: Preparatory work for testing different create flags In order to do concurrency checks using different allocation functions, we need to hook those functions up to gem_concurrent_all. So let's add another layer of combinations! The actual enabling for create2-ioctl will come in the future. Signed-off-by: Chris Wilson commit e21368c53a23ccf62dc6651bda9591c1dbbb39c4 Author: Chris Wilson Date: Sat Jan 2 16:07:34 2016 +0000 benchmarks/gem_mmap: Convert to run over a fixed period Signed-off-by: Chris Wilson commit 9b902344149f87a7abce4b0b08792db2cd4d424d Author: Chris Wilson Date: Sat Jan 2 15:19:27 2016 +0000 benchmarks/gem_exec_nop: Convert to running for a fixed time Like the previous patch to gem_exec_ctx, retrict gem_exec_nop to running for a fixed length of time, rather than over a range of different execution counts. In order to retain some measurement of that range, allow measuring individual execution versus continuous dispatch. Signed-off-by: Chris Wilson commit 6953899beb5ef7311429ebf77faca02b564de473 Author: Chris Wilson Date: Sat Jan 2 12:10:14 2016 +0000 benchmarks/gem_exec_ctx: Run for a fixed time Rather than investigate the curve for dispatch latency, just run for a fixed time and report an average latency. Instead offer two modes, average single dispatch latency, average continuous dispatch latency. Signed-off-by: Chris Wilson commit 276fb3d3f4bc0214454fe172106efce71c7b0ff0 Author: Chris Wilson Date: Fri Jan 1 13:29:23 2016 +0000 benchmarks/gem_exec_ctx: Fix fd switching between default contexts Signed-off-by: Chris Wilson commit bb35716d25999260c2cc491ed832a9a39f204dcb Author: Chris Wilson Date: Thu Dec 31 21:34:27 2015 +0000 intel_error_decode: Update address parsing for 64bit offsets Signed-off-by: Chris Wilson commit 8f9df28a82f49681cc9bcfa70dd7369af56b3f70 Author: Chris Wilson Date: Wed Nov 5 11:24:49 2014 +0000 intel_error_decode: Fix decode headers for HW context As we didn't recognise the different buffer type, we confused it with whatever we last decoded (i.e. the render ring buffer). Signed-off-by: Chris Wilson commit d4c3cd4d04ab7f317d3429708d19cd5fc4d0f5fa Author: Chris Wilson Date: Fri Oct 31 11:27:21 2014 +0000 intel_error_decode: Inflate compressed error state Recent kernels compress the active objects using zlib + ascii85 encoding. This adapts the tool to decompress those inplace. Signed-off-by: Chris Wilson commit 3d5b50b4f0784faf565a781e1ab151ac4e5370f8 Author: Chris Wilson Date: Tue Dec 29 13:51:08 2015 +0000 benchmarks/gem_blt: Estimate memory bandwidth to improve test runtime If we autotune the workload to only take 0.1s and then repeat the measurements over 2s, we can bound the benchmark runtime. (Roughly of course! Sometimes the dispartity between main memory CPU bandwidth, and GPU execution bandwidth throws off the runtime, but that's the purpose of the benchmark!) Signed-off-by: Chris Wilson commit 9764247dc57036e1d1c73b2f69411906504a8288 Author: Jani Nikula Date: Mon Dec 21 16:50:47 2015 +0200 intel_bios_reader: add dumping of i2c element in mipi sequence Due to the clever way the whole sequence block is specified without forward compatibility, it's not possible to dump most blocks without this. Signed-off-by: Jani Nikula commit cb89add9793b04288cb332a0d17dd8d8d6f09680 Author: Jani Nikula Date: Mon Dec 21 16:36:32 2015 +0200 intel_bios_reader: improve element dumpers Try to print something useful and helpful for the user. Signed-off-by: Jani Nikula commit 9c4aa072f071d4cfe1513a723419f43e43fe3293 Author: Jani Nikula Date: Mon Dec 21 16:18:20 2015 +0200 intel_bios_reader: rewrite the mipi sequence block dumping Simplify things a lot, make it correct, don't pass random pointers to free() on errors, etc. Signed-off-by: Jani Nikula commit 68cfe4ba575064c798ef9857781fa4969319e876 Author: Jani Nikula Date: Mon Dec 21 15:51:10 2015 +0200 intel_bios_reader: check mipi sequence block version Bail out on v3+, we don't support that just yet. Signed-off-by: Jani Nikula commit bdf7b1c0eb753268f9059615ec92efee693abb77 Author: Jani Nikula Date: Mon Dec 21 15:22:08 2015 +0200 intel_opregion_decode: add new ASLE fields Signed-off-by: Jani Nikula commit fa24ce6b9606fac69234f27550de19f5c07cdcc3 Author: Thomas Wood Date: Mon Dec 21 16:50:16 2015 +0000 docs: add igt_edid_template.h to IGNORE_HFILES Signed-off-by: Thomas Wood commit 1b9085b9795c588d5503439c8e23ed780e927730 Author: Chris Wilson Date: Mon Dec 21 16:24:45 2015 +0000 benchmarks/gem_latency: Hide spinlocks for android Signed-off-by: Chris Wilson commit 23aa051369c2b930d35359a5c06fae5290c06291 Author: Ville Syrjälä Date: Fri Dec 18 19:25:47 2015 +0200 lib: Use igt_assert_eq() to check for crc component count It's nice to see just how many components the crc claims to have when the count don't match what we expect. Signed-off-by: Ville Syrjälä Signed-off-by: Daniel Vetter commit 793aff199f21cdb4136e39f227ced5553eec04dc Author: Ville Syrjälä Date: Fri Dec 18 19:25:45 2015 +0200 lib: Make 'extra_long_opts' const The extra_long_opts passed to igt_*_parse_opts() isn't modified, so let's make it const. Signed-off-by: Ville Syrjälä Signed-off-by: Daniel Vetter commit a1d465a3c542d965a56e794590b3f00095a1db62 Author: Chris Wilson Date: Mon Dec 21 12:53:21 2015 +0000 benchmarks/gem_latency: Serialise mmio reads The joy of our hardware; don't let two threads attempt to read the same register at the same time. Signed-off-by: Chris Wilson commit 3ebce37b65ddb292161498ac4f6a07e3667c9b03 Author: Chris Wilson Date: Mon Dec 21 09:57:52 2015 +0000 benchmarks/gem_latency: Guard against inferior pthreads.h Signed-off-by: Chris Wilson commit 3cc8f957f1c443f012b292dbb5d81acb59dffb25 Author: Chris Wilson Date: Sun Dec 20 15:18:56 2015 +0000 benchmarks/gem_latency: Measure CPU usage Try and gauge the amount of CPU time used for each dispatch/wait cycle. Signed-off-by: Chris Wilson commit a91ee853b1a1e733c0d4e291d8fc3008a9ac232f Author: Chris Wilson Date: Sun Dec 20 14:55:42 2015 +0000 benchmarks/gem_latency: Measure effect of using RealTime priority Allow the producers to be set with maximum RT priority to verify that the waiters are not exhibiting priorty-inversion. Signed-off-by: Chris Wilson commit 27e093dd1fe3c49389c302f1f3234a0769fd75dc Author: Chris Wilson Date: Sat Dec 19 17:05:32 2015 +0000 benchmarks/gem_latency: Use RCS on Sandybridge Reading BCS_TIMESTAMP just returns 0... Signed-off-by: Chris Wilson commit c0942bf52866d3182cf2e6dcf7c6960098420aeb Author: Chris Wilson Date: Sat Dec 19 16:27:19 2015 +0000 benchmarks/gem_latency: Rearrange thread cancellation Try a different pattern to cascade the cancellation from producers to their consumers in order to avoid one potential deadlock. Signed-off-by: Chris Wilson commit 8ea61ec1ff96c4303f6de49def142f134a7243a0 Author: Chris Wilson Date: Sat Dec 19 16:14:03 2015 +0000 benchmarks/gem_latency: Tweak workload Do the workload before the nop, so that if combining both, there is a better chance for the spurious interrupts. Emit just one workload batch (use the nops to generate spurious interrupts) and apply the factor to the number of copies to make inside the workload - the intention is that this gives sufficient time for all producers to run concurrently. Signed-off-by: Chris Wilson commit db011021a1c9c40e4fc3ec7a8c31bfee7b9fb623 Author: Chris Wilson Date: Sat Dec 19 14:51:08 2015 +0000 benchmarks/gem_latency: Add output field specifier Just to make it easier to integrate into ezbench. Signed-off-by: Chris Wilson commit 646cab4c0c73dce310ff8020ffb96272647780ba Author: Chris Wilson Date: Sat Dec 19 12:07:26 2015 +0000 benchmarks/gem_latency: Split the nop/work/latency measurement Split the distinct phases (generate interrupts, busywork, measure latency) into separate batches for finer control. Signed-off-by: Chris Wilson commit e37a4c80922aaeb79a419a7d7f96b0ac4c6ffb88 Author: Chris Wilson Date: Sat Dec 19 11:36:37 2015 +0000 benchmarks/gem_latency: Add time control Allow the user to choose a time to run for, default 10s Signed-off-by: Chris Wilson commit 2ef368acfa5c3863543663f03c3eb26fba93cca6 Author: Chris Wilson Date: Sat Dec 19 11:36:37 2015 +0000 benchmarks/gem_latency: Add nop dispatch latency measurement Signed-off-by: Chris Wilson commit 1db5b05243c0d0e84af4fc2845fc320aa5787436 Author: Chris Wilson Date: Sat Dec 19 10:52:12 2015 +0000 benchmarks/gem_latency: Expose the workload factor Allow the user to select how many batches each producer submits before waiting. Signed-off-by: Chris Wilson commit 6dbe0a301223f177ef80078c5ffdbf8575a8bae1 Author: Chris Wilson Date: Sat Dec 19 10:46:06 2015 +0000 benchmarks/gem_latency: Measure whole execution throughput Knowing how long it takes to execute the workload (and how that scales) is interesting to put the latency figures into perspective. Signed-off-by: Chris Wilson commit 2f74892ebd4d23b352e2e089e9b74c950f3864b8 Author: Chris Wilson Date: Sat Dec 19 10:31:49 2015 +0000 benchmarks/gem_latency: Fix for !LLC Late last night I forgot I had only added the llc CPU mmaping and not the !llc GTT mapping for byt/bsw. Signed-off-by: Chris Wilson commit 39bad606c5e24dbb144f01e5d889f8a31c294d22 Author: Chris Wilson Date: Fri Dec 18 20:51:57 2015 +0000 benchmarks: Remove gem_wait Superseded by gem_latency. Signed-off-by: Chris Wilson commit c9da0b5221cfd7dd2f22bbc5bcddf73d31214e2e Author: Chris Wilson Date: Fri Dec 18 14:45:03 2015 +0000 benchmark: Measure of latency of producers -> consumers, gem_latency The goal is measure how long it takes for clients waiting on results to wakeup after a buffer completes, and in doing so ensure scalibilty of the kernel to large number of clients. We spawn a number of producers. Each producer submits a busyload to the system and records in the GPU the BCS timestamp of when the batch completes. Then each producer spawns a number of waiters, who wait upon the batch completion and measure the current BCS timestamp register and compare against the recorded value. By varying the number of producers and consumers, we can study different aspects of the design, in particular how many wakeups the kernel does for each interrupt (end of batch). The more wakeups on each batch, the longer it takes for any one client to finish. Signed-off-by: Chris Wilson commit 8bf09f3d12f5a8d984f084f116b195925dca571b Author: Chris Wilson Date: Thu Dec 17 09:16:42 2015 +0000 tests/gem_concurrent_all: Add a couple more sanitycheck patterns As always, the goal is to quickly stress a variety of workloads that often lead to kernel bugs. Signed-off-by: Chris Wilson commit 04bd964527bf1962d3fd94f863161f5828eba767 Author: Chris Wilson Date: Wed Dec 16 19:51:08 2015 +0000 igt/gem_exec_nop: Restore SLOW_QUICK loop terminator The upper bound for SLOW_QUICK was added for the benefit of the slow simulator, not because, as I wrongly thought, of the latency measurements. SLOW_QUICK was added in commit d1e862324b747a0ab5d985eaa6830076817231c5 Author: Damien Lespiau Date: Mon Mar 25 20:06:20 2013 +0000 tests: Instrument tests run in simulation to run quickly and dropped in commit 89bcdb9022fb7a1f66635b9f2546356ad0c0761a Author: Chris Wilson Date: Tue Dec 8 13:42:50 2015 +0000 igt/gem_exec_nop: Remove nop latency measurements Reported-by: Ben Widawsky Signed-off-by: Chris Wilson commit a012e44b6a68b12e676a4ef48bebe97206fbeb1c Author: Thomas Wood Date: Mon Dec 7 15:12:15 2015 +0000 tests: remove .gitignore and add a Makefile rule to create it v2: generate the .gitignore file with the default target v3: remove the .gitignore file Signed-off-by: Thomas Wood commit 40798efd859e26386d32ec61272c210685b6a204 Author: Daniel Vetter Date: Wed Dec 16 13:13:58 2015 +0000 tests/gem_eio: New ABI - no EIO even from wait_ioctl So there's 3 competing proposals for what wait_ioctl should do wrt -EIO: - return -EIO when the gpu is wedged. Not terribly useful for userspace since it might race with a hang and then there's no guarantee that a subsequent execbuf won't end up in an -EIO. Terminally wedge really can only be reliably signalled at execbuf time, and userspace needs to cope with that (or decide not to bother). - EIO for any obj that suffered from a reset. This means big internal reorginazation in the kernel since currently we track reset stats per-ctx and not on the obj. That's also what arb robustness wants. We could do this, but this feels like new ABI territory with the usual userspace requirements and high hurdles. - No -EIO at all. Consistent with set_domain_ioctl and simplest to implement. Which is what this patch does. We can always opt to change this later on if there's a real need. To make the test really exercise this do a full wedged gpu hang, to make sure -EIO doesn't leak out at all. Signed-off-by: Daniel Vetter Signed-off-by: Chris Wilson commit 3953d2dd22ea1c87aa77e3a9415aaf767d2ec3ed Author: Derek Morton Date: Mon Dec 14 09:59:17 2015 +0000 gem_flink_race/prime_self_import: Improve test reliability gem_flink_race and prime_self_import have subtests which read the number of open gem objects from debugfs to determine if objects have leaked during the test. However the test can fail sporadically if the number of gem objects changes due to other process activity. This patch introduces a change to check the number of gem objects several times to filter out any fluctuations. v2: Moved the common code to a library and made the loop android specific (Daniel Vetter) v3: Renamed get_stable_obj_count -> igt_get_stable_obj_count Signed-off-by: Derek Morton Signed-off-by: Daniel Vetter commit 5a8d063e42c7b5843a0f069d4c2216f8f4fb81fe Author: Mika Kuoppala Date: Thu Dec 10 16:54:40 2015 +0200 tests/gem_softpin: Fix compiler warning on 32bit systems We get build error as we try to cast from ptr to integer of different size on 32 bit platforms. Use unsigned long as the cast, it will work with both 32 and 64 bit systems. Cc: Vinay Belgaumkar Signed-off-by: Mika Kuoppala Reviewed-by: Tvrtko Ursulin Reviewed-by: Vinay Belgaumkar commit 14f70a861b66f8a62a53911cf587fadeebca5957 Author: Chris Wilson Date: Sun Dec 13 12:46:47 2015 +0000 igt/gem_read_read_speed: Tweak to show comparison against write-write Since we hold an exclusive write lock we expect 2 writes to happen serially, but we expect 2 reads to happen in parallel. Expand the testing to demonstrate this effect (i.e. we expect read-read to be roughly 2x faster than write-write for small copies on big core.) Signed-off-by: Chris Wilson commit 866a6f2c41da8505cf868a9d83301cddd41cc9fb Author: Chris Wilson Date: Sat Dec 12 18:56:37 2015 +0000 tests/gem_pread,gem_pwrite: Fix compiler warnings Many warnings of the form gem_pread.c: In function ‘main’: gem_pread.c:128:8: warning: assignment discards ‘const’ qualifier from pointer target type [-Wdiscarded-qualifiers] bps = bytes_per_sec(buf, object_size/usecs*1e6); Regression from commit 48c945322b4c5f6443758143cccb9c4c04da4aaa Author: Ankitprasad Sharma Date: Wed Dec 2 14:54:51 2015 +0530 igt/gem_pread: Support to verify pread/pwrite for non-shmem backed obj Signed-off-by: Chris Wilson commit 2d08e9e9a1fd05b0d7bf824f3ca98de820c7d615 Author: Chris Wilson Date: Fri Dec 11 09:25:03 2015 +0000 igt/gem_concurrent_all: Expand testing to cover different memory regimes Signed-off-by: Chris Wilson commit 6672da5e8f430c65901adf1294647f0f4659bc54 Author: Daniel Vetter Date: Thu Dec 10 12:29:14 2015 +0100 Revert "igt: s/basic/sanitycheck/ on prior smoketesting" This reverts commit 4f5efc5c844f6fe69209982463f9220f8f3951ed. There was a bit a misunderstanding on IRC between Chris&me. We want basic tests as sanity test to be run in the BAT CI. It's just unfortunate that right now we have fairly limited ability to absorb new ones, both because of a pile of existing bugs in the kernel and because the CI infrastructure is still being scaled out. The idea was just to remove the BAT tests added yesterday, not all of the ones we've had for a while longer. Cc: Chris Wilson Grumpily-acked-by: Chris Wilson Signed-off-by: Daniel Vetter commit 4f5efc5c844f6fe69209982463f9220f8f3951ed Author: Chris Wilson Date: Thu Dec 10 10:02:46 2015 +0000 igt: s/basic/sanitycheck/ on prior smoketesting In times past, I added "basic" variants of tests just to ensure that the general principle of operation was sound before proceeding on to the main test (which typically looked at thrashing, i.e. were long and tedious and pointless if the test didn't even work in the normal situation). Since "basic" now collides with BAT, rename my trivial tests to "sanitycheck". Signed-off-by: Chris Wilson commit 197db8607d910c7d5252c1d928b715ff4c4c28ce Author: Chris Wilson Date: Wed Dec 9 20:54:10 2015 +0000 igt/gem_concurrent_blit: Explicitly check for "missed interrupts" As the concurrency tests are a good source of stress for i915_wait_request() (the tests are primarily designed to ensure that GPU activity of one form or another is completed before access by third parties), one of the common form of errors we can detect are the "missing interrupts" (i.e. where the waits do not terminate because of a race between the interrupt and the seqno write). Add an explicit check for this error and flag it as a definite fail - which also helps narrow it down to certain subtests when run as a batch. Signed-off-by: Chris Wilson commit 4cc40ad4fe80f4d107e8e4279b0b07243b91f77c Author: Bob Paauwe Date: Mon Dec 7 13:53:35 2015 -0800 igt/test/pm_rps: load GPU to force not-idle to idle transition. When changing the sysfs GT min frequency, the kernel won't automatcilly drop the GT frequency to idle unless the GPU transitions from busy to idle. Load the GPU after increasing the GT min frequency to force a busy to idle transition. This matches the behavior when decreasing the GT min frequency. Signed-off-by: Bob Paauwe Reviewed-by: Imre Deak commit 4aa1b99a121a6cb843f463af64cbd92942f809e0 Author: Rodrigo Vivi Date: Tue Dec 8 00:11:21 2015 -0800 kms_psr_sink_crc: Add BAT test for PSR active. It takes from 2 to 5 seconds to run. Cc: Daniel Vetter Signed-off-by: Rodrigo Vivi commit 4a004d9cb36ff845aebb8590b8bb08c460620a72 Author: Rodrigo Vivi Date: Mon Dec 7 01:26:17 2015 -0800 kms_psr_sink_crc: Reduce our time out for PSR active. Using same timeout value as kms_fronbuffer_tracking and for same reasons exposed at 'commit 83582f9b ("kms_frontbuffer_tracking: Increase the time we wait for PSR.")' Signed-off-by: Rodrigo Vivi commit be2d5188f6fa14e80847fe51ab546902f2483e35 Author: Vinay Belgaumkar Date: Tue Dec 8 11:57:19 2015 +0000 tests/gem_softpin: New tests for softpin feature These tests exercise the userptr ioctl to create shared buffers between CPU and GPU. They contain error and normal usage scenarios. They also contain a couple of stress tests which copy buffers between CPU and GPU. These tests rely on the softpin patch in order to pin buffers to a certain VA. Caveat: These tests were designed to run on 64-bit system. Future work includes adding logic to ensure these tests can run on 32-bit systems with PPGTT support. Some tests are currently disabled for 32-bit systems for that reason. v2: Added cc and signed-off-by fields v3: Fixed review comments, added helper functions. Removed userptr error scenarios covered by existing userptr tests. Modified stress test to have 100K buffers, it now runs for ~30 mins, checks every element has been written to correctly, and pins buffers at different VMAs. v4: Changed name to gem_softpin v5: More fixes. Removed the file based tests, will move them to userptr tests. Added a function that validates appropriate PPGTT support before running tests. Optimized stack space and memory footprint in stress test. Removed the eviction test, will add it back after verifying proper functionality. v6: Split basic test into userptr and bo Fixed some coding style issues. v7: Enhanced invalid vma pinning test to verify 32-bit PPGTT functionality. Enabled the test for 32-bit PPGTT systems, and verify pinning fails above 32-bit addresses. Enhanced the high adress pinning test to ensure pinning fails when EXEC_OBJECT_PINNED flag is not used. Some more cosmetic fixes to close buffer handles. Changed userptr function to used synchronized operations. v8: Minor change to high address pinning test as per comment. v9: Skip the tests if softpin support is not present. v10: Removed trailing white spaces. v11: Keep alphabetical order in Makefile and gitignore; update error code returned while trying to pin above the max vm size (EINVAL); test attempt to pin above 4GB without the support 48b flag. Cc: Michel Thierry Cc: Tvrtko Ursulin Signed-off-by: Vinay Belgaumkar Signed-off-by: Michel Thierry (v11) Reviewed-by: Tvrtko Ursulin commit 89bcdb9022fb7a1f66635b9f2546356ad0c0761a Author: Chris Wilson Date: Tue Dec 8 13:42:50 2015 +0000 igt/gem_exec_nop: Remove nop latency measurements Since commit c8beadb811bdc2b9c21f95144852f3e55867b546 Author: Derek Morton Date: Wed Nov 11 14:46:58 2015 +0000 tests/gem_exec_nop: Improved test run time the stablity of the measurement regressed and it is once again no longer a reliable metric for detecting regressions. Give up. Signed-off-by: Chris Wilson Cc: Derek Morton commit 870548b6533318b10c414663ea4ad2af01bab8b9 Author: Ville Syrjälä Date: Fri Dec 4 15:49:30 2015 +0200 tests/kms_force_connector_basic: Add prune-stale-modes subtest Add a new subtest that makes sure old stale modes get pruned from the connector's mode list when the EDID changes. v2: s/drmModeGetConnector/drmModeGetConnectorCurrent/ since kmstest_force_edid() already takes care of doing the heavier call for us (Daniel) Signed-off-by: Ville Syrjälä Acked-by: Daniel Vetter commit b0f4df31baf3ddda72a276f3b2b03ae8363d0843 Author: Ville Syrjälä Date: Thu Dec 3 19:01:21 2015 +0200 lib/kms: Turn base_edid into a template Signed-off-by: Ville Syrjälä commit 7bd31d090e78d87076f736071a9302aa349164e2 Author: Rodrigo Vivi Date: Tue Nov 3 10:02:14 2015 -0800 kms_psr_sink_crc: Add suspend/resume sub test. Although kms_frontbuffer_tracking already has psr-suspend testcase this one here can complement it by testing different combination and mainly covering 2 different cases individually: 1. wait-for-psr, suspend-resume tehn run 1 operation. 2. suspend-resume, wait-for-psr then run 1 operation. v2: Remove no-suspend option since this should be done with piglit if necessary for now. v3: argh! remove remaining no-suspend checks... Signed-off-by: Rodrigo Vivi commit 63980babcf9a104b12a726953cbe7d946a0aadd2 Author: Rodrigo Vivi Date: Tue Nov 3 09:37:56 2015 -0800 kms_psr_sink_crc: Fix no-psr option. commit 75b286e821 ("tests/kms_psr_sink_crc: test even if PSR is disabled by default")' force PSR enabling without respecting the no-psr (running-with-psr-disabled) option. Signed-off-by: Rodrigo Vivi commit e6848c5839f5506fbc4a496da3815403668e00d7 Author: Rodrigo Vivi Date: Thu Dec 3 08:27:08 2015 -0800 kms_frontbuffer_tracking: Skip on unreliable CRC. Even with all sink crc re-works we still have platforms where after 6 vblanks it is unable to calculate the sink crc. But if we don't get the sink crc it isn't true that test failed, but that we have no ways to say test passed or failed. So let's print a message and move forward in case sink crc cannot help us to know if the screen has been updated. v2: Also include a message on setup_sink_crc and also only skip when it is mandatory, i.e. when running for PSR. Acked-by: Paulo Zanoni Signed-off-by: Rodrigo Vivi commit ea3806badee7dcb7677edcfe35c17499c1b0f377 Author: Rodrigo Vivi Date: Thu Dec 3 08:25:38 2015 -0800 kms_frontbuffer_tracking: Make sink crc mandatory only for PSR. Unfortunately Sink CRC is not 100% reliable for all platforms. So we cannot block FBC tests nor skip them when we are getting unreliable Sink CRC results, or not getting them at all. Acked-by: Paulo Zanoni Signed-off-by: Rodrigo Vivi commit d074b44ab6a7ac14cc36b1dc98df5bcf73c82f95 Author: Rodrigo Vivi Date: Mon Nov 2 15:54:06 2015 -0800 kms_frontbuffer_tracking: Increase the time we wait for PSR. With commit (drm/i915: Delay first PSR activation.) in kernel PSR might take a bit longer to really activate after the modeset. The first PSR activation after modeset is taking 5 times the panel power cycle delay time, which is 600ms for our machines here. So timeout here needs to be a minimum of 3s. However let's use 5s as the safe value in case we find machines with higher power cycle delay. Since we do a lot of assert(psr_disabled), this commit is increasing the time it takes to run the whole set of PSR tests by a few minutes, which had been reduced by commit f4db3b18841 ("kms_frontbuffer_tracking: reduce the PSR wait timeout to 2s"). Reviewed-by: Paulo Zanoni Signed-off-by: Rodrigo Vivi commit 8b22e051e8306a8ee5e78862b403f01cc5b683ec Author: Bob Paauwe Date: Thu Dec 3 16:28:00 2015 -0800 igt/pm_rps: current freq < user specified min is not a fail (v3) Since commit commit aed242ff7ebb697e4dff912bd4dc7ec7192f7581 Author: Chris Wilson Date: Wed Mar 18 09:48:21 2015 +0000 drm/i915: Relax RPS contraints to allows setting minfreq on idle it is now possible that the current frequency will drop be the user specified minimum frequency to the "idle" or RPn frequency. Update the pm_rps tests to reflect that droping below the user specified minimum is no longer considered a failure. v2: Add check RPn <= current freq. (Me) v3: Use RPn instead of MIN frequency in idle check (Imre) Signed-off-by: Bob Paauwe Reviewed-by: Imre Deak commit 6cf72724e225524cd0a4352ba829ffc578f40a4d Author: Daniel Vetter Date: Thu Dec 3 07:45:36 2015 +0100 tests/drv_hangman: Open drm fd before doing anything This way we correctly auto-skip instead of falling over the lack of i915 debugfs files first and fail the testcase due to that. Signed-off-by: Daniel Vetter commit ee0808982f40130d29691c37505dafcbf45f9da5 Author: Daniel Vetter Date: Thu Dec 3 07:45:35 2015 +0100 tests/drm_lib.sh: Skip when i915 debugfs wasn't found Instead of failing. We might want to move this into i915 tests eventually, but this is good for now. v2: Use the correct exit code (Derek) and use the new symbolic values Thomas added. Signed-off-by: Daniel Vetter commit d8d1eab318f2f22c9199dcefc2b7b96ba4793cdc Author: Daniel Vetter Date: Thu Dec 3 07:45:34 2015 +0100 lib: igt_fork_hang_helper must be run in fixtures Because it opens an intel-specific drm fd. Fixes crashes when running igt on no-intel. Signed-off-by: Daniel Vetter commit 39e44dfa4c0ba2f979dab5ea81074343de0ad2cb Author: Chris Wilson Date: Fri Dec 4 10:22:16 2015 +0000 benchmarks/gem_exec_nop: Flush retirement lists before executing wait-ioctl skips a couple of side-effects of retiring, so provoke them using set-domain before we sleep. Signed-off-by: Chris Wilson commit 839a1426ce2a8510cdf0e648b06f28e7c33b64b6 Author: Daniel Vetter Date: Tue Dec 1 11:24:20 2015 +0100 tests/kms_force_connector: Include in BAT set Forcing connector state is a basic piece of our test infrastructure that we use in all the kms_ tests. It allows us to run tests even if no outputs are connected. They're also really fast, so perfect candidates for inclusion into the BAT set. Signed-off-by: Daniel Vetter commit db4f83ca5da29673ab9210e4322156518047130d Author: Daniel Vetter Date: Tue Dec 1 11:24:19 2015 +0100 lib/kms+tests: Use cached connector state Speeds up testcases except for those where we want to exercise the probing itself. The only exceptions left where we do a full probe are - pm_rpm: We use it to make sure the kernel doesn't get things wrong with power domains, so we really want to exercise the full probe paths. And there the only place really is the specific validation done with the data gathered by get_drm_info. - kmstest_force_ functions: Newer kernels should be better at re-probing state when the force sysfs fields change, but better safe than sorry. v2: I also consolidated the start_n_modes and start_connectors while at it - move one of the fixup hunks to this patch that accidentally got misplaced (Thomas). Cc: Thomas Wood Signed-off-by: Daniel Vetter commit cdb398b5b9a6a1895bbc8213f88bc9e45795db23 Author: Daniel Vetter Date: Tue Dec 1 11:24:18 2015 +0100 tests/kms_force_connector: Fixes The edid we inject stayed the same, but the kernel started to list more modes for it. No idea whether that's the right thing here since I'm not really an EDID expert. But then again the testcase wants to check that the injection works, not validate the kernel's parser. v2: Only check the preferred mode for more future-proofing (Thomas). v3: Clarify commit message (Jani). Cc: Thomas Wood Signed-off-by: Daniel Vetter commit 02cdd9899dbf56ae8b9ae8ee2b83e2afcd479193 Author: Thomas Wood Date: Thu Dec 3 11:36:02 2015 +0000 tests: add exit value constants for shell script tests Signed-off-by: Thomas Wood commit 8a58734c110375793306fc10a31d5b17e816471b Author: Thomas Wood Date: Thu Dec 3 11:12:38 2015 +0000 tests: replace drm_open_any in gem_create and gem_stolen drm_open_any has been replaced by drm_open_driver. Signed-off-by: Thomas Wood commit 67d32c210dab272f02d6b4e19a54451a3e0231e5 Author: Ankitprasad Sharma Date: Wed Dec 2 14:54:52 2015 +0530 igt/gem_create: Test to validate parameters for GEM_CREATE ioctl This test validates the two parameters (size and flags) GEM_CREATE ioctl. v2: Added IGT_TEST_DESCRIPTION (Thomas Wood) v3: Removed use of hard coded values, updated comments (Tvrtko) v4: Removed over-use of macros, updated with multiples of PAGE_SIZE (Tvrtko) Signed-off-by: Ankitprasad Sharma Reviewed-by: Tvrtko Ursulin Signed-off-by: Thomas Wood commit 48c945322b4c5f6443758143cccb9c4c04da4aaa Author: Ankitprasad Sharma Date: Wed Dec 2 14:54:51 2015 +0530 igt/gem_pread: Support to verify pread/pwrite for non-shmem backed obj This patch adds support to verify pread/pwrite for non-shmem backed objects. It also shows the pread/pwrite speed. It also tests speeds for pread with and without user side page faults v2: Fixed Rebase conflicts (Ankit) v3: Precalculating values to avoid redundant function calls (Dave) Replaced igt_subtest by igt_subtest_f, added asserts for mmap, corrected indentation (Tvrtko) v4: Updated data types to avoid redundant type conversions (Tvrtko) Corrected pagefault-pread time calculation (Ankit) Signed-off-by: Ankitprasad Sharma Reviewed-by: Tvrtko Ursulin Signed-off-by: Thomas Wood commit 70c3be83a0638cb65518ad2536719996d1f5a40c Author: Ankitprasad Sharma Date: Wed Dec 2 14:54:50 2015 +0530 igt/gem_stolen: Verifying extended gem_create ioctl This patch adds the testcases for verifying the new extended gem_create ioctl. By means of this extended ioctl, memory placement of the GEM object can be specified, i.e. either shmem or stolen memory. These testcases include functional tests and interface tests for testing the gem_create ioctl call for stolen memory placement v2: Testing pread/pwrite functionality for stolen backed objects, added local struct for extended gem_create and gem_get_aperture, until headers catch up (Chris) v3: Removed get_aperture related functions, extended gem_pread to compare speeds for user pages with and without page faults, unexposed local_gem_create struct, changed gem_create_stolen usage (Chris) v4: Splitting patch to remove changes from gem_pread/gem_pwrite to another patch (Ankit) v5: Fixed Rebase conflicts (Ankit) Added IGT_TEST_DESCRIPTION (Thomas Wood) v6: Added __gem_create_stolen for user to handle error, updated gem_create_stolen to align with gem_create function, corrected fill_purge test (out of bound access), added testcase to validate allocating of more than 32 bit sized buffers (Tvrtko) v7: Removed unused variables, Corrected comments & formatting (Tvrtko) Signed-off-by: Ankitprasad Sharma Reviewed-by: Tvrtko Ursulin Signed-off-by: Thomas Wood commit 2db78a4995a8ee298ae0cd68879baf80407a0e5e Author: Thomas Wood Date: Wed Dec 2 16:46:39 2015 +0000 Update version to 1.13 and add the release date Signed-off-by: Thomas Wood commit 17c6b5caf37bccd4a38d7d310cb53ea23a23b5f8 Author: Thomas Wood Date: Wed Dec 2 16:45:42 2015 +0000 NEWS: Updates Signed-off-by: Thomas Wood commit 498fb6205e62c34495ea5ef09a9c156b9cf61f2f Author: Thomas Wood Date: Wed Dec 2 16:35:50 2015 +0000 docs: remove references to tests/NAMING-CONVENTION The tests/NAMING-CONVENTION file has been removed and its contents is now included in the API documentation. Reported-by: Joonas Lahtinen Signed-off-by: Thomas Wood commit 97bf3f9a55dbe20614479cbce63c0966f8e25df1 Author: Thomas Wood Date: Wed Dec 2 10:49:03 2015 +0000 tests/core_setmaster_vs_auth: add test description macro Signed-off-by: Thomas Wood commit 66dc90ed658fe345d98ef0f287df383c3b2f4a2c Author: Thomas Wood Date: Wed Dec 2 10:46:33 2015 +0000 tests/core_setmaster_vs_auth: use igt_simple_main This test has no subtests, so should use igt_simple_main. Signed-off-by: Thomas Wood commit b3ff11232681ab615794c293de8abfebb8921ad7 Author: Thomas Wood Date: Tue Dec 1 15:12:07 2015 +0000 docs: exclude gpgpu_fill.h gpgpu_fill.h is only used internally by the library. Signed-off-by: Thomas Wood commit 0874c770eb016c26c148323b7b7b3a7c2d829441 Author: Thomas Wood Date: Tue Dec 1 15:07:10 2015 +0000 docs: document intel_pipe_crc_source enum values Signed-off-by: Thomas Wood commit 683316cb886dced1674876f21c782836fe40f9ff Author: Thomas Wood Date: Mon Nov 30 16:36:16 2015 +0000 docs: add missing documentation for drm open functions Signed-off-by: Thomas Wood commit 0394844a478e500740389e2cbbf2fdee0c4054c7 Author: Thomas Wood Date: Mon Nov 30 15:35:46 2015 +0000 tests/gem_request_retire: add test description Cc: Tvrtko Ursulin Signed-off-by: Thomas Wood commit 72b6bec370451ae722ddc1c5457f4cfa6a55b188 Author: Jani Nikula Date: Wed Nov 25 10:50:31 2015 +0200 tests: fix ddx_intel_after_fbdev to use intel_reg intel_reg_dumper is gone, replaced by 'intel_reg dump'. Signed-off-by: Jani Nikula commit 4fe60a6e1c1f2a8853d57c19c6c16be408d1cd19 Author: Jani Nikula Date: Wed Nov 25 10:46:40 2015 +0200 tools: fix intel_gpu_abrt to use intel_reg intel_reg_dumper is gone, replaced by 'intel_reg dump'. Signed-off-by: Jani Nikula commit 96d3658d0be9479168586f01101a493aa030c9d4 Author: Jani Nikula Date: Wed Nov 25 10:25:44 2015 +0200 scripts: remove display_debug.sh as obsolete The script uses the obsoleted and removed intel_reg_read tool. Rather than mechanically fix this to use intel_reg, observe that the hardcoded register offsets are platform specific. A quick glance suggests they are for PCH split platforms with FDI, and as such useful only on a minority of platforms. Remove the script as obsolete. If the need for such a script arises, it should be based around using 'intel_reg dump' with display-only register spec files. Signed-off-by: Jani Nikula commit 5830a7a04be49516e947eaefb47c2d214da9d2ab Author: Daniel Vetter Date: Tue Dec 1 18:33:17 2015 +0100 tests: Add core_setmaster_vs_auth.c Embarrasingly I noticed that I need to git add the file when resolving the conflict and manually applying my patch. But then I added the wrong file ... Reported by Thomas Wood. Signed-off-by: Daniel Vetter commit 80546d45762a7b1e20885c557a08a41ef6d7fc10 Author: Daniel Vetter Date: Tue Dec 1 17:37:40 2015 +0100 tests/pm_rpm: Don't compare edid blob IDs The kernel is free to allocate blob ids however it wants to. And also to reallocate them whenever it sees fit. The only thing we are allowed to compare is the length and the actual date. Removing this bogus check makes drm-resources-equal on my snb. Cc: Paulo Zanoni Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90546 Reviewed-by: Paulo Zanoni Signed-off-by: Daniel Vetter commit 8133295d02730dfc800d974e673dcb4b07460911 Author: Daniel Vetter Date: Tue Dec 1 08:44:00 2015 +0100 tests: add core_setmaster_vs_auth Tests that master state isn't leaked to new masters by checking that auth magics for the old master don't work any more. Based upon a simple test program provided by Thomas. v2: Use comment Thomas suggested on intel-gfx. Cc: Thomas Hellstrom Signed-off-by: Daniel Vetter commit 92e83cb379cd36c72ce1a254a1b80320b21a3ae1 Author: Daniel Vetter Date: Mon Nov 30 16:03:46 2015 +0100 tests: Rename drm_auth to core_auth It really is a core drm testcase and not a libdrm testcase. While at it also make it generic, since it is. Cc: Daniel Stone Acked-by: Daniel Stone Signed-off-by: Daniel Vetter commit 3b75839b795c3e206316f4423b1f9ae01c91d64c Author: Chris Wilson Date: Tue Dec 1 13:33:13 2015 +0000 lib: gem_set_caching() use drmIoctl() rather than ioctl() gem_set_caching() tries to be clever and detect when the ioctl isn't supported (thereby skipping the test). However, it forget that we may be acting on active objects and be subject to the usual EAGAIN/EINTR errors. We can use the drmIoctl() to wrap the raw ioctl() in order to get the automatic restart on the interrupted syscall. Signed-off-by: Chris Wilson commit 4cfcea4056ab78a8097b41e26748c940936cd411 Author: Marius Vlad Date: Fri Nov 27 20:08:33 2015 +0200 tests/pm_rpm tests for set_caching and set_tiling ioctl(s) v4: re-bind the gem objects each time before calling disable_all_screens_and_wait(). v3: Use smaller sizes when allocating gem objects for caching tests. v2: use mmap to gtt instead off cpu and various style-changes. Signed-off-by: Marius Vlad Reviewed-by: Imre Deak Signed-off-by: Imre Deak commit d2a17f4bc4d466ac19fd00ae7fe7998d6626460e Author: Paulo Zanoni Date: Fri Oct 30 18:05:58 2015 -0200 kms_frontbuffer_tracking: add tilingchange subtest During the review of a recent FBC patch, Ville pointed a problem that happens when we use the page flip IOCTL to switch between buffers that have different tiling formats. This test should catch the problem introduced by that patch - which was not merged, by the way, so the test should be passing. Signed-off-by: Paulo Zanoni commit 98bb8428b2939311015b45ca59d7d9c65949c9bf Author: Paulo Zanoni Date: Thu Nov 5 17:54:31 2015 -0200 kms_frontbuffer_tracking: assert the stride changes at stridechange() We use igt_create_fb(), which decides the stride by itself: there's no guarantee that making a buffer 512 pixels bigger is going to make its stride change. I had a fix for this problem that was supposed to be applied before this patch, but due to a rework request I'm changing the order of the patches, so we should expect to hit this assertion for now. At least the root cause of the problem is clear now. v2: Update the commit message due to the patch order changing. Signed-off-by: Paulo Zanoni commit f23ea58f1fbb7075d08bdbd85523d12270ce46a2 Author: Paulo Zanoni Date: Fri Oct 30 17:56:29 2015 -0200 kms_frontbuffer_tracking: expand badstride and stridechange Make those subtests try to change the stride using multiple APIs so we can catch errors that affect full modesets, fast modesets and page flips. Signed-off-by: Paulo Zanoni commit 340599c986ac84b3ed4e24188eca1b599caeb238 Author: Paulo Zanoni Date: Fri Oct 30 18:55:52 2015 -0200 kms_frontbuffer_tracking: move flip_type to struct test_mode Handle it just like we handle t->format. IMHO, it's better. Signed-off-by: Paulo Zanoni commit b4c58857e5059cd4df5ce6298fd1897ea859ba6c Author: Paulo Zanoni Date: Fri Oct 30 17:37:10 2015 -0200 kms_frontbuffer_tracking: do page flips using the planes API Add a new FLIP_PLANES enum so we can do "page flips" using it too. The goal is to exercise the fast modeset paths on the Kernel. Signed-off-by: Paulo Zanoni commit d63413771fc9bc77e89dacecbc1bae6192444000 Author: Paulo Zanoni Date: Thu Nov 5 16:39:00 2015 -0200 lib/igt_fb: also pass the stride to igt_create_fb_with_bo_size() If the caller is going to specify a custom size, it's likely that he will also specify a custom stride. The automatic stride picked by create_bo_for_fb() is too huge for tiled buffers, so if the caller wants smaller buffers, then he'll need a smaller stride too, otherwise the Kernel will reject the addfb IOCTL due to stride * height being bigger than the size. I want to make tests/kms_frontbuffer_tracking use igt_create_fb_with_bo_size() so I can provide smaller buffers that will fit into the CFB. I'm also planning to make all frontbuffers with the same width/height/format have the same stride and size regardless of tiling method so I can exercise specific code paths. Signed-off-by: Paulo Zanoni commit 1c68a71acc1f9ddd98bc1bd6ff1da700442c21aa Author: Paulo Zanoni Date: Thu Nov 5 16:24:06 2015 -0200 lib/igt_fb: fix open-coded ALIGN() Maybe this will help someone's life in the future. Signed-off-by: Paulo Zanoni commit cb7dd5d401acceb62197eddf3cc6f0860c49faa3 Author: Paulo Zanoni Date: Thu Nov 5 16:18:55 2015 -0200 lib/igt_fb: fix igt_create_fb_with_bo_size() documentation If we pass zero as the bo_size we won't get the minimum needed size, we'll just get a size that works. The size is decided by create_bo_for_fb(). The selected size is really not minimal for tiled objects. We'll implement support for minimum size later. Signed-off-by: Paulo Zanoni commit 5cfc4e7967f76cdc92364014c8bf896ab6afa6bc Author: Paulo Zanoni Date: Thu Nov 5 10:42:49 2015 -0200 lib/igt_fb: fix fb->size when provided by the user I want to have a little more control over the size of the buffers in kms_frontbuffer_tracking, so I decided to start calling igt_create_fb_with_bo_size() instead of igt_create_fb(). The problem is that create_bo_for_fb() returns its own calculated size as size_ret instead of the actual used size. So we fix this by returning the actual size, the one used in gem_create instead of the calculated size that's not used anywhere. Signed-off-by: Paulo Zanoni commit d44100ed233db46085b626c1d493856ca1900eab Author: Chris Wilson Date: Fri Nov 27 09:56:09 2015 +0000 benchmarks/gem_exec_ctx: Measure switching between fds Switching between fds also involves a context switch, include it amongst the measurements. Signed-off-by: Chris Wilson commit 26507f3e21fe14b0fe5b3daec73c26f37bb2189a Author: Chris Wilson Date: Fri Nov 20 16:38:52 2015 +0000 igt/gem_cs_prefetch: Convert to intel_require_memory() Replace the open-coded memory check with intel_require_memory. Signed-off-by: Chris Wilson commit e10ba6b51c028ce945605d1f720c598c93e8ad8f Author: Chris Wilson Date: Wed Nov 25 14:19:15 2015 +0000 igt/drm_read: Clear O_NONBLOCK between tests Ensure that O_NONBLOCK isn't accidentally set when we want a nonblocking file descroptor. Signed-off-by: Chris Wilson commit 32329b2e7dd9b6b69a397da0356bd1ebc6a45901 Author: Mika Kuoppala Date: Wed Nov 25 15:00:50 2015 +0200 tests/drm_import_export: Always loop with mutex held We assume that lock is held on start of the loop scope. Some paths continuing inside loop didn't adhere to this assumption, causing segfault on unlocking an already unlocked mutex. Fix this by re-aquiring lock always. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93013 Cc: Michał Winiarski Cc: Thomas Wood Signed-off-by: Mika Kuoppala Reviewed-by: Michał Winiarski commit 3b1a55874d151c8044b0168de4b6d9351ced69d4 Author: Chris Wilson Date: Wed Nov 25 10:46:53 2015 +0000 igt/drm_read: Check handling of pagefault on destination buffer In theory, this should force i915_gem_fault() when we first use the buffer (and not at mmap time) and so prevent a __copy_to_user_inatomic() from writting to the buffer. Signed-off-by: Chris Wilson commit d84e62478bf2c34d610467a98826d64c321b839b Author: Joonas Lahtinen Date: Fri Nov 20 13:57:11 2015 +0200 lib/igt_core: Prefer CLOCK_MONOTONIC_RAW CLOCK_MONOTONIC_RAW is not affected by NTP, so it should be THE clock used for timing execution of tests. When fetching either the starting or ending time of a test, show the time as -1.000s. v6: - Whitespace corrections (Chris) v5: - Do not use C99 style comments (Chris) v4: - Introduce time_valid macro (Chris) - Reduce amount of boilerplate code for calculating elapsed time v3: - Do not exit directly from handler (Chris) - Show elapsed time as -1 if it is not calculable v2: - Cache the used clock (Chris) - Do not change the clock during execution - Spit out and error if monotonic time can not be read Cc: Thomas Wood Reviewed-by: Chris Wilson Signed-off-by: Joonas Lahtinen Signed-off-by: Thomas Wood commit 4bc68b1baa8ad288a695eedf4e1638e07e5ab9a1 Author: Wayne Boyer Date: Fri Nov 13 13:40:24 2015 -0800 lib/kbl: Add Kabylake GT4 PCI IDs Add the Kabylake GT4 PCI IDs as defined in this kernel patch. commit 8b10c0cf21ec84618d4bf02c73c0543500ece68d Author: Deepak S Date: Wed Oct 28 12:21:12 2015 -0700 drm/i915/kbl: Add Kabylake GT4 PCI ID Signed-off-by: Wayne Boyer Signed-off-by: Thomas Wood commit 526a63ec6bfa4dfedb9ae27284b604ec37132a16 Author: Wayne Boyer Date: Fri Nov 13 13:40:23 2015 -0800 lib/kbl: move KBL check from IS_SKYLAKE() to IS_GEN9() Remove the KBL check from IS_SKYLAKE() following the kernel definition. Then, add the KBL check to IS_GEN9(). The idea is to avoid confusion. On the kernel side, the mix of SKY and KBL was nacked so the platforms are split. Signed-off-by: Wayne Boyer Signed-off-by: Thomas Wood commit b088e305750c9df7b5d3a16f01fd2a7dba22177f Author: Matt Turner Date: Fri Nov 13 16:45:13 2015 -0800 tools/aubdump: Link with -ldl. aubdump.c uses dlsym(), so it needs to link with -ldl. Otherwise: /bin/sh: symbol lookup error: /usr/lib64/intel_aubdump.so: undefined symbol: dlsym Signed-off-by: Matt Turner Signed-off-by: Thomas Wood commit dcdf21beb8fb40c4061e7dbcf0a021c6513d5090 Author: Tvrtko Ursulin Date: Thu Nov 19 15:02:15 2015 +0000 igt/gem_request_retire: Provoke context destruction with active VMAs Test designed to trigger the WARN_ON(!list_empty(&ppgtt->base.active_list)) in i915_gem_context_clean. v2: Simplify execbuf building and the test itself. Cleanup code. (Chris Wilson) v3: Removed asserts done by the helpers already. (Chris Wilson) Signed-off-by: Tvrtko Ursulin Cc: Chris Wilson Cc: Daniel Vetter commit b68a6428db3d1a31d7662c03eb86a7b4cd4e37be Author: Chris Wilson Date: Sun Nov 22 20:50:31 2015 +0000 benchmarks: Add a set-domain benchmark Benchmark the overhead of changing from GTT to CPU domains and vice versa. Effectively this measures the cost of a clflush, and how well the driver can avoid them. Signed-off-by: Chris Wilson commit 59f076a0898ce4c226bcc116d429f685009b268c Author: Chris Wilson Date: Fri Nov 20 11:23:37 2015 +0000 drmtest: Use standard gem_execbuf() calls in gem_quiescent_gpu() Now that we have better ioctl wrappers, let's make us of them. The advantage should be in improved error reporting in case gem_quiescent_gpu() ever fails. Signed-off-by: Chris Wilson commit b718f50f92cf7ed825c90ff54940cb155d110a2c Author: Mika Kuoppala Date: Fri Nov 6 13:52:53 2015 +0200 lib: Add Skylake Intel Graphics GT4 PCI IDs Add Skylake Intel Graphics GT4 PCI IDs. Signed-off-by: Mika Kuoppala Reviewed-by: Damien Lespiau commit 8a8717eee305b2a9f58b9f5c31adc2a8847361bf Author: Chris Wilson Date: Wed Nov 18 12:49:24 2015 +0000 overlay: Show power consumption without i915-pmu The power metter was not showing up due to an erroneous check for a failure to open the i915 perf interface. Reported-by: Marius Vlad Signed-off-by: Chris Wilson commit 938b9306be240ada0e592f2bf59f428c6e0e5717 Author: Vivek Kasireddy Date: Wed Nov 4 16:10:15 2015 -0800 igt/kms_rotation_crc: Add a new subtest to exhaustively test for fence leaks (v3) In this subtest, as a first step, MAX_FENCES+1 number of framebuffers are created backed up by objects that have multiple GGTT views (normal and rotated). Next, we have the i915 driver instantiate a normal view followed by a rotated view. We continue doing the above MAX_FENCES + 1 times. v2: - Add a igt_require() to check if there is enough GTT space left for MAX_FENCES+1 framebuffers. (Tvrtko) - Make data2 local to test_plane_rotation_exhaust_fences(). (Tvrtko) - If there is a failure, deallocate all the previously allocated framebuffers before asserting. v3: Close the gem handle if set_tiling or addfb fails. (Tvrtko) Cc: Tvrtko Ursulin Signed-off-by: Vivek Kasireddy Reviewed-by: Tvrtko Ursulin Signed-off-by: Tvrtko Ursulin commit 92a803ffb0c8a3e68dc8bac207c34a4ed78b724f Author: Ville Syrjälä Date: Sun Nov 15 15:40:02 2015 +0200 tests/kms_3d: Use XRGB8888 instead of ARGB8888 We don't allow ARGB8888 anymore on primary planes on most platforms, so use XRGB8888 instead as the format. Signed-off-by: Ville Syrjälä commit cba86e980f60b1e15f6a59c8fa60fa54288361da Author: Ville Syrjälä Date: Sun Nov 15 14:24:46 2015 +0200 tests/kms_3d: Use igt_assert_eq() Would be nice to see how many stereo modes we managed to extract from the EDID if it doesn't match the expected 13. So use igt_assert_eq() which prints the real count on failure. Signed-off-by: Ville Syrjälä commit e42936d86b52c6804da41755df7155cafded5eb2 Author: Ville Syrjälä Date: Wed Nov 11 18:19:06 2015 +0200 tests/kms_addfb_basic: Add clobbered-modifier subtest Make sure the kernel doesn't clobber the modifiers when the user didn't pass any. Signed-off-by: Ville Syrjälä commit 4d8983bcdff43e95897031d7e1fef24170df5235 Author: Ville Syrjälä Date: Wed Nov 11 20:25:11 2015 +0200 lib/kms: Pass fb_id=0 to setcrtc in kmstest_unset_all_crtcs() The setcrtc ioctl ignores the fb_id when there's no mode specified. So passing -1 doens't make much sense. When there is a more, -1 means to preserve the current fb. Signed-off-by: Ville Syrjälä commit 29cd8a092e09bc72535d83d55b5800c3aa21440a Author: Ville Syrjälä Date: Wed Nov 11 15:07:00 2015 +0200 tests/kms_flip: Add a note that the test was skipped when modeset fails Signed-off-by: Ville Syrjälä commit a09880d1c38343148e824b6a54db3046fb32986d Author: Ville Syrjälä Date: Tue Nov 10 19:22:11 2015 +0200 tests/kms_flip: Modeset pipes in reverse order To make more multi-pipe tests run on IVB, do the modesets in the reverse order (ie. pipe C first, pipe A last). This way pipe B can't reserve the 2 shared FDI lanes before pipe C is set up. Signed-off-by: Ville Syrjälä commit 5bb87dc0e563fe9fd54dde7b38732d28c3d2fa2e Author: Ville Syrjälä Date: Tue Nov 10 19:31:33 2015 +0200 tests/kms_flip: Disable all pipes before each test Currently kms_flip leaks the state of the pipes from one subtest to the next. Meaning a single pipe test can actually have two or more pipes actually up and running, and similarly a two pipe test can have three pipes running. This is particularly nasty on IVB since one of the pipes still running but not actually part of the test maybe have reserved the shared FDI lanes, thus preventing one of the pipes taking part in the test from being enabled. To avoid such problems explicitly disable all pipes before each subtests. v2: Use kmstest_unset_all_crtcs() (Paulo) Signed-off-by: Ville Syrjälä commit 2f894820ac216c9aef8db3008acb2492cae3bce1 Author: Ville Syrjälä Date: Tue Nov 10 19:07:20 2015 +0200 tests/kms_flip: Use human readable pipe and connector names Print the pipes and connectors in a human readable form instead of using the integer IDs. Signed-off-by: Ville Syrjälä commit c8beadb811bdc2b9c21f95144852f3e55867b546 Author: Derek Morton Date: Wed Nov 11 14:46:58 2015 +0000 tests/gem_exec_nop: Improved test run time Reduced the Sleep period to 200mS and reduced the repetition count to 7 to decrease the test run time significantly. v2: Changed uS to us v3: removed the output formatting change as the issue will be addressed in a seperate patch from Thomas Wood. v4: mS -> ms Signed-off-by: Derek Morton Signed-off-by: Thomas Wood commit 464424dcee9b22cf66bd33f5be5e93397aa15e24 Author: Maarten Lankhorst Date: Thu Nov 12 13:33:42 2015 +0100 tests/kms_setmode: Handle MST correctly. There is a MST encoder for each crtc, and each MST connector will be connected to the encoder bound to that crtc. This breaks the kms_setmode assertion that is only 1 encoder per connector, so make an exception to that rule for displayport. Signed-off-by: Maarten Lankhorst commit 4c14aa18c18f578825253769e97901bc963b40d2 Author: Chris Wilson Date: Thu Nov 12 10:50:17 2015 +0000 benchmarks/gem_blt: Fixup a couple of non-llc foibles When extending the batch for multiple copies, we need to remember to flag it as being in the CPU write domain so that the new values get flushed out to main memory before execution. We also have to be careful not to specify NO_RELOC for the extended batch as the execobjects will have been updated but we write the wrong presumed offsets. Subsequent iterations will be correct and we can tell the kernel then to skip the relocations entirely. Signed-off-by: Chris Wilson commit 143a2160583a3223ebfc1fd1376a23cec1b81484 Author: Chris Wilson Date: Thu Nov 12 09:29:07 2015 +0000 igt/gem_mmap_gtt: Require SET_TILING to work before doing large tiled tests Older generations are more limited in how much they can fence, and the limits is enforced in the SET_TILING ioctl. So if it reports an EINVAL, we cannot perform the tiled test and may just skip it instead. Signed-off-by: Chris Wilson commit 0c26652911986e2b1f666f662459a9e240428dc6 Author: Chris Wilson Date: Wed Nov 11 16:37:16 2015 +0000 igt/gem_concurrent_all: Add testcases that split the copying across rings More inter-ring concurrency tests. Signed-off-by: Chris Wilson commit 790f1f804b062c47fb1bf686bfa3b0f2e69ee947 Author: Thomas Wood Date: Mon Nov 9 17:17:24 2015 +0000 lib: add a environment variable to control output Disable output of terminal control characters and progress meters when IGT_PLAIN_OUTPUT is set in the environment. Cc: Derek Morton Signed-off-by: Thomas Wood commit fca7b1b5fd2d61dfec6a612f1a2798270d1f8a4e Author: Thomas Wood Date: Thu Oct 29 17:01:17 2015 +0000 lib: highlight subtest results on terminals Make subtest results easier to identify by making them bold when the output is a terminal. Signed-off-by: Thomas Wood commit 3dce57a699e1481bbe7b2e4c52a7643654e2da19 Author: Thomas Wood Date: Tue Nov 10 14:16:00 2015 +0000 tests/kms_force_connector: reset connectors and edid on exit Signed-off-by: Thomas Wood commit a8f63574307b0914214256a04939799bde2cffb9 Author: Thomas Wood Date: Tue Nov 3 11:02:23 2015 +0000 tests/kms_force_connector: clear forced edid in reset Signed-off-by: Thomas Wood commit 5652985a54849176a6b07a481b61fc72df3a6b09 Author: Thomas Wood Date: Thu Oct 29 16:38:57 2015 +0000 tests/kms_force_connector: use comparison macros Use the comparison macros to make debug output clearer. v2: fix incorrect comparison Signed-off-by: Thomas Wood commit d01433900906017f16034b60c710cae9581e7755 Author: Thomas Wood Date: Mon Nov 2 17:04:20 2015 +0000 tests/kms_force_connector: add an option to reset connector force states v2: add missing igt_exit call and fix reset_connectors definition Signed-off-by: Thomas Wood commit 01e1fca5828004954cdb1757409edd99d4b790c3 Author: Thomas Wood Date: Mon Nov 2 15:50:27 2015 +0000 tests/kms_force_connector: skip if the required connector is connected Signed-off-by: Thomas Wood commit 2e5a43d29613fcb9e780b9c804d86b578bc8d56b Author: Thomas Wood Date: Mon Nov 2 15:48:52 2015 +0000 lib: add documentation for igt_display_init/fini Signed-off-by: Thomas Wood commit 5570060d331c0942405503a4398864241c1c55ef Author: Thomas Wood Date: Mon Nov 2 15:39:12 2015 +0000 tests/kms_force_connector: free the display struct when no longer needed Signed-off-by: Thomas Wood commit e9ed1a37fcbb6c3f08bc714cdf5851202f532125 Author: Thomas Wood Date: Mon Nov 2 10:29:23 2015 +0000 tests/kms_fbc_crc: ensure context is initialized correctly Initialization was included in commit a976d7e (tests/kms_fbc_crc: refactor context handling code), but won't be executed since it is declared before the first label within a switch statement. kms_fbc_crc.c:178:2: warning: ‘context’ may be used uninitialized in this function [-Wmaybe-uninitialized] rendercopy(batch, context, ^ kms_fbc_crc.c:271:22: note: ‘context’ was declared here drm_intel_context *context = NULL; ^ Cc: Paulo Zanoni Signed-off-by: Thomas Wood Reviewed-by: Paulo Zanoni commit 0986b432f874db0f263958fa07feb1a83ba1bae4 Author: Thomas Wood Date: Mon Nov 2 10:20:15 2015 +0000 lib: add PIPE_ANY to the pipe enum This avoids compiler warnings about invalid enum values. Signed-off-by: Thomas Wood commit 2643793255084362e02bb1ca2ab5031de2d5dc59 Author: Thomas Wood Date: Mon Nov 2 10:18:27 2015 +0000 Fix comparison of unsigned integers Signed-off-by: Thomas Wood commit 52a393a3116f91157bc62d735db297d027d8724b Author: Thomas Wood Date: Mon Nov 2 10:16:16 2015 +0000 tests: remove duplicate struct member initializers Signed-off-by: Thomas Wood commit 24b7bbc7267a58d44173682da64d4dd9d32134ec Author: Thomas Wood Date: Mon Nov 2 10:02:51 2015 +0000 tests: remove unnecessary igt_exit calls Signed-off-by: Thomas Wood commit 36b8143c224b47f743d8881514bb348b9ee1d102 Author: Thomas Wood Date: Mon Nov 2 10:02:08 2015 +0000 Add missing noreturn attribute to various functions Signed-off-by: Thomas Wood commit 3bc3ab27eac6eace4c90c8da92b4e7570110263b Author: Chris Wilson Date: Tue Nov 10 14:04:17 2015 +0000 benchmarks: Add README Add a README to introduce the ezbench.sh benchmark runner. Signed-off-by: Chris Wilson commit 5cabb8c543d42c2473d11c3e6cb65bf5746b4cae Author: Chris Wilson Date: Tue Nov 10 13:40:40 2015 +0000 benchmarks/gem_blt: Report peak throughput Report the highest throughput measured from a large set of runs to improve sensitivity. Signed-off-by: Chris Wilson commit 3b0e3360811aa39bb6b5368bbcbfa62ffdc3d266 Author: Chris Wilson Date: Mon Nov 9 20:37:07 2015 +0000 lib: Add missing #include A forgotten fixup to allow instdone.h to compile. Signed-off-by: Chris Wilson commit 70ee5084213c27733f723a7d3f597764bba38dcf Author: Chris Wilson Date: Mon Nov 9 08:58:59 2015 +0000 lib: Make instdone initialisation fail gracefully Just report that we don't recognise the chipset rather than explode. Signed-off-by: Chris Wilson commit 134e32378a242e846a6e553ad80317a4a56b13b9 Author: Ben Widawsky Date: Thu Nov 5 16:56:11 2015 -0800 igt/intel_aubdump: Use the right ring This prevents the simulator from barfing when it sees commands from another ring. I've been using this locally for a very long time. Signed-off-by: Ben Widawsky Reviewed-by: Kristian Høgsberg commit bc37e0297c38348cd4e47b1dacc376bd94725ec2 Author: Daniel Stone Date: Wed Jul 8 13:23:27 2015 +0000 kms_atomic: Add basic atomic modesetting tests Add tests for KMS atomic modesetting, to exercise the basic interface and test failure/corner cases. Should ensure coherency between the legacy and atomic interfaces. v2: New patch. v3: Disable connector checking for now, as it was causing GPU hangs on newer kernels. v4: Rebase. v5: Use do_ioctl or do_ioctl_err consistently. Use igt_assert_*() helper macros rather than igt_assert() directly. Move assertions into helper/check functions. Define atomic commit helper. v6: Use do_ioctl_err, and define macros to move errors to actual callsite, rather than helper functions. Co-authored-by: Micah Fedke Signed-off-by: Daniel Stone commit b7a555e997ec43ed005f6b22707dd698e0147f64 Author: Daniel Stone Date: Tue Oct 20 22:36:13 2015 +0100 tests/core_prop_blob: Add multiple blobs per connection This should hit the bug fixed in: commit 8731b269f01e16193390c7276e70530366b8d626 Author: Maneet Singh Date: Thu Oct 8 10:10:24 2015 -0400 drm: Correct arguments to list_tail_add in create blob ioctl Arguments passed to list_add_tail were reversed resulting in deletion of old blob property everytime the new one is added. Fixes commit e2f5d2ea479b9b2619965d43db70939589afe43a Author: Daniel Stone Date: Fri May 22 13:34:51 2015 +0100 drm/mode: Add user blob-creation ioctl Signed-off-by: Maneet Singh [seanpaul tweaked commit subject a little] Signed-off-by: Sean Paul Cc: stable@kernel.org # v4.2 Reviewed-by: Daniel Stone Reviewed-by: Jani Nikula Signed-off-by: Dave Airlie which was introduced with the initial blob support in: commit e2f5d2ea479b9b2619965d43db70939589afe43a Author: Daniel Stone Date: Fri May 22 13:34:51 2015 +0100 drm/mode: Add user blob-creation ioctl Add an ioctl which allows users to create blob properties from supplied data. Currently this only supports modes, creating a drm_display_mode from the userspace drm_mode_modeinfo. v2: Removed size/type checks. Rebased on new patches to allow error propagation from create_blob, as well as avoiding double-allocation. Signed-off-by: Daniel Stone Reviewed-by: Maarten Lankhorst Tested-by: Sean Paul Signed-off-by: Daniel Vetter Signed-off-by: Daniel Stone commit de7ccdd083579c82a1be0c028acf38617fb8c2ca Author: Daniel Stone Date: Thu Oct 1 14:16:48 2015 +0100 tests: Run igt.cocci Signed-off-by: Daniel Stone commit f735015ed36f1e188d1107fd6b0969801df17c86 Author: Daniel Stone Date: Wed Oct 7 17:16:44 2015 +0100 lib/tests: Add igt_assert_*() self-tests Make sure our igt_assert variants are doing something that looks vaguely like the right thing. Signed-off-by: Daniel Stone commit f40a984413a9c06e5d382b248ba79ac7c17d2531 Author: Chris Wilson Date: Tue Nov 3 16:43:48 2015 +0000 igt/gem_userptr_blits: Correct the number of objects required Since we allocate 2 times count number of objects, that is the number of objects we should be using when checking for sufficient RAM to use for the test. References: https://bugs.freedesktop.org/show_bug.cgi?id=92799 Signed-off-by: Chris Wilson commit ce65232cf5039798045767c65f2110f3b2a8ffd0 Author: Chris Wilson Date: Fri Oct 30 15:50:12 2015 +0000 benchmarks/gem_wait: Remove pthread_cancel() Apparently the pthread shim on Android doesn't have pthread cancellation, so use the plain old volatile to terminate the CPU hogs. Signed-off-by: Chris Wilson commit 9024a72d29150f05e2ad62aa088d19a662bbf815 Author: Chris Wilson Date: Fri Oct 30 15:01:33 2015 +0000 benchmark/gem_wait: poc for benchmarking i915_wait_request overhead One scenario under recent discussion is that of having a thundering herd in i915_wait_request - where the overhead of waking up every waiter for every batchbuffer was significantly impacting customer throughput. This benchmark tries to replicate something to that effect by having a large number of consumers generating a busy load (a large copy followed by lots of small copies to generate lots of interrupts) and tries to wait upon all the consumers concurrenctly (to reproduce the thundering herd effect). To measure the overhead, we have a bunch of cpu hogs - less kernel overhead in waiting should allow more CPU throughput. Signed-off-by: Chris Wilson commit fe548fab0a63f95b729f0df4137753212e75375e Author: Vivek Kasireddy Date: Thu Oct 22 18:34:03 2015 -0700 igt/kms_rotation_crc: Add a subtest to validate Y-tiled obj + Y fb modifier (v3) The main goal of this subtest is to trigger the following warning in the function i915_gem_object_get_fence(): if (WARN_ON(!obj->map_and_fenceable)) To trigger this warning, the subtest first creates a Y-tiled object and an associated framebuffer with the Y-fb modifier. Furthermore, to prevent the map_and_fenceable from being set, we make sure that the object does not have a normal VMA by refraining from rendering to the object and by setting the rotation property upfront before calling commit. v2: Do not call paint_squares and just use one output. v3: Convert an if condition to igt_require and move the plane rotation requirement further up before the fb allocation. Cc: Tvrtko Ursulin Signed-off-by: Vivek Kasireddy Reviewed-by: Tvrtko Ursulin Signed-off-by: Daniel Vetter commit a2c67866fb447a5d00abb3061b0d735df30fd40c Author: Paulo Zanoni Date: Tue Oct 20 18:46:26 2015 -0200 kms_frontbuffer_tracking: remove opt.only_feature That option is not needed anymore since: commit 982934625ac67234c6d85c6cf29a5a487e54d4f0 Author: Thomas Wood Date: Wed Sep 16 14:36:24 2015 +0100 lib: allow wildcard matching when specifying subtests In fact, using "--run-subtest 'fbc-*'" is better than using --fbc-only due to how SKIPs are handled. In the former, only the tests matching the expression are tried, so the number of SKIPs only contains the number of tests on the specified pattern that were skipped. If you used --fbc-only, all the non-fbc tests would count as SKIPs, so it would be harder to know which of the tests marked as skipped were actual FBC tests. Signed-off-by: Paulo Zanoni commit efc2e39a458317d02e9f72b9eb277347c858ca59 Author: Paulo Zanoni Date: Tue Oct 20 16:16:04 2015 -0200 kms_frontbuffer_tracking: add stridechange subtest This is a corner case not exercised by the other subtests. The test is expected to pass both with the current Kernel tree and with the patches that are on the mailing list. The patches currently on the mailing list change how the CFB is allocated, and this subtest is designed to make sure everything still works as expected. Signed-off-by: Paulo Zanoni commit 196179a2bcab12da8b35d730d8fb0e8cf2c10a87 Author: Paulo Zanoni Date: Tue Oct 20 16:02:52 2015 -0200 kms_frontbuffer_tracking: add flag to not assert feature status This will be used by the stridechange subtest. Signed-off-by: Paulo Zanoni commit a4697fc8baf1d3f61531ec164b9b9cbae37583ed Author: Paulo Zanoni Date: Mon Oct 19 11:14:44 2015 -0200 kms_frontbuffer_tracking: unset crtcs after getting the base blue CRC This fixes the failures for cases where you use --run-subtest to run single subtests that don't use any drawing patterns. Signed-off-by: Paulo Zanoni commit 3660bd4e9c79105bfd6f10442772660b61549792 Author: Ville Syrjälä Date: Thu Oct 22 19:55:38 2015 +0300 tests/kms_flip: Dump the timestamps, counters, etc. with higher debug levels Signed-off-by: Ville Syrjälä commit 75cf16e5854e232b5d3caba0bfb063d76866a6e4 Author: Ville Syrjälä Date: Wed Oct 16 22:43:04 2013 +0300 tests/kms_flip: Improve the accuracy of out frame time calculation Don't use the rounded vrefresh info to predict the frame duration. Instead calculate if from the clock. Signed-off-by: Ville Syrjälä commit 8a17af80e0732cb6ce5e7348dcb2d56a7b870e1d Author: Ville Syrjälä Date: Thu Oct 22 18:44:56 2015 +0300 lib: Skip suspend/hibernate tests if the system doesn't support them Do a dry run with rtcwake first to determine if the system even supports the intended suspend state. If not, skip the test. Fixes a bunch of stuff on my BYT FFRD8 that doesn't support S3. Signed-off-by: Ville Syrjälä commit 47db6fbd99f1c8b127269b124948da7049298963 Author: Ville Syrjälä Date: Thu Oct 22 18:38:50 2015 +0300 tests/kms_pipe_crc_basic: Skip invalid pipe/port combos Don't try to test invaliud pipe/port combos. Fixes the test on VLV w/ DSI since the pipe<->DSI port mapping is fixed. Should also fix other platforms with similar restrictions. Signed-off-by: Ville Syrjälä commit 46ec33e847eef3292a2f3b4f4a037cfb161cfeee Author: Chris Wilson Date: Tue Oct 20 14:40:50 2015 +0100 igt/gem_concurrent_all: Add snoop concurrency tests Another caching mode worth exploring for bad flushing behaviour. Signed-off-by: Chris Wilson commit 5ec54d8a2165f5095ec70b9bdb9ae583fead39c2 Author: Chris Wilson Date: Mon Oct 19 11:36:17 2015 +0100 Update CONTEXT_PARAM for GTT_SIZE reporting Add the new PARAM identifier for reporting the context's GTT size. Signed-off-by: Chris Wilson commit a22719358d8fc7d4261829847e1ace042575a723 Author: Chris Wilson Date: Wed Oct 14 14:17:55 2015 +0100 lib: Fix querying context GTT size We need a new ioctl to find the correct GTT size to use when submitting execbuffers (as opposed to wishing to know the global GTT size). Signed-off-by: Chris Wilson commit cd99ddead3815aacaa483f27548a3f5e1a7d9353 Author: Matt Roper Date: Thu Oct 15 16:54:32 2015 -0700 kms_cursor_crc: Add test for unthrottled cursor movement We've had bugs in the past that caused cursor updates to be synced to vblank, resulting in sluggish cursor movement. Add a test to try to make sure we don't regress and reintroduce these bugs. Cc: kalyan.kondapally@intel.com Signed-off-by: Matt Roper Signed-off-by: Thomas Wood commit e3ac13e16a4a1311e8e73f242e878d74c2063341 Author: Chris Wilson Date: Fri Oct 16 11:01:42 2015 +0100 tests/gem_pwrite_snooped: Fix use of GCC pragmas Apparently GCC treats the #pragma directive as a code block and so we returned unconditionally from memchr_inv() on the first byte fubaring the test. commit b04691b3e8e62bd105f0f4d8d3b9e7da187f0c90 Author: Thomas Wood Date: Tue Sep 8 11:16:46 2015 +0100 tests/gem_pwrite_snooped: disable const cast warning Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92227 Signed-off-by: Chris Wilson commit 0ab76a22d111b903cd3ee0ba8d20dfeb34608361 Author: Derek Morton Date: Wed Oct 14 17:32:58 2015 +0100 benchmarks/gem_blt: Include igt.h in gem_blt.c To fix a build error on android Signed-off-by: Derek Morton Signed-off-by: Thomas Wood commit f050dc663d6a24e2ad0441ee3f7066ebee5e3f8c Author: Derek Morton Date: Wed Oct 14 17:23:00 2015 +0100 tests/core_prop_blob: Fix core_prop_blob for android core_prop_blob was using ioctls not in the android kernel. Added a igt_require_propblob() function and local defines/structures so the test will compile and skip on kernels where the feature is unsupported. v2: moved igt_require_propblob() to core_prop_blob.c (Daniel Vetter) Moved gem_blt.c to a seperate patch (Thomas Wood) Signed-off-by: Derek Morton [Thomas: fix compiler warning] Signed-off-by: Thomas Wood commit 061a38fca0474ef5e20a5fa5ff086fcc4c4181a6 Author: Tvrtko Ursulin Date: Wed Oct 7 12:18:52 2015 +0100 kms_rotation_crc: Exercise page flips with 90 degree rotation Do some page flipping on the rotated plane just to exercise that code path. v2: Actually render to flip fb and fixed flip counter. Signed-off-by: Tvrtko Ursulin Cc: Sonika Jindal Cc: Arun R Murthy Signed-off-by: Thomas Wood commit 1a593d2a5dfa1bd006742828338953358113cb6f Author: Matt Roper Date: Tue Oct 6 17:04:49 2015 -0700 kms_universal_plane: Add gen9-specific test Gen9 adds some new capabilities not present on previous platforms (primary plane windowing, 90/270 rotation, etc.). Add a new subtest to check how these new features interact with the use of the universal plane API. For now we just check whether pageflips work as expected in a windowed setting. We may want to add some rotation testing in future patches. Signed-off-by: Matt Roper Signed-off-by: Thomas Wood commit 5bc210a5b5d060a4053d3ad9266123abefb4840a Author: Rodrigo Vivi Date: Mon Oct 5 15:48:22 2015 -0700 lib/kbl: Add Kabylake PCI IDs Also, following kernel definition Kabylake is Skylake. Signed-off-by: Rodrigo Vivi Signed-off-by: Thomas Wood commit 3e9726b33736f7fd7a349785ab6693e33647240a Author: Lu, Han Date: Thu Jun 25 14:39:33 2015 +0800 tools/intel_audio_dump: add support for Broxton This patch adds support for dumping audio registers of Broxton. Signed-off-by: Lu, Han Signed-off-by: Thomas Wood commit f52e7ec7876603b4edb0bff412255f8f1624ecc4 Author: Ville Syrjälä Date: Fri Oct 9 19:11:39 2015 +0300 Replace __gem_mmap__{cpu,gtt,wc}() + igt_assert() with gem_mmap__{cpu,gtt,wc}() gem_mmap__{cpu,gtt,wc}() already has the assert built in, so replace __gem_mmap__{cpu,gtt,wc}() + igt_assert() with it. Mostly done with coccinelle, with some manual help: @@ identifier I; expression E1, E2, E3, E4, E5, E6; @@ ( - I = __gem_mmap__gtt(E1, E2, E3, E4); + I = gem_mmap__gtt(E1, E2, E3, E4); ... - igt_assert(I); | - I = __gem_mmap__cpu(E1, E2, E3, E4, E5); + I = gem_mmap__cpu(E1, E2, E3, E4, E5); ... - igt_assert(I); | - I = __gem_mmap__wc(E1, E2, E3, E4, E5); + I = gem_mmap__wc(E1, E2, E3, E4, E5); ... - igt_assert(I); ) Signed-off-by: Ville Syrjälä Stochastically-reviwewed-by: Chris Wilson commit b8a77dd6c8e9f73493b2f86f293ff9c06fc08049 Author: Ville Syrjälä Date: Fri Oct 9 18:29:28 2015 +0300 Make gem_mmap__{cpu,gtt,wc}() assert on failure Rename the current gem_mmap__{cpu,gtt,wc}() functions into __gem_mmap__{cpu,gtt,wc}(), and add back wrappers with the original name that assert that the pointer is valid. Most callers will expect a valid pointer and shouldn't have to bother with failures. To avoid changing anything (yet), sed 's/gem_mmap__/__gem_mmap__/g' over the entire codebase. Signed-off-by: Ville Syrjälä Stochastically-reviwewed-by: Chris Wilson commit 106fe21373f9c3eadcd95fb4b48e452f9b328ffa Author: Ville Syrjälä Date: Fri Oct 9 18:36:24 2015 +0300 lib: Die if framebuffer GTT mapping fails Cairo helpfully allocates a new buffer for us when cairo_image_surface_create_for_data() is called with a NULL ptr. That means if gem_mmap__gtt() fails, we get a totally silent failure and nothing ever drawn into the framebuffer. Very confusing. Put in an igt_assert() to make sure we managed to mmap something. Signed-off-by: Ville Syrjälä Stochastically-reviwewed-by: Chris Wilson commit 7eaae3c2013b6d4bdf11570d3fb9d95eb4978976 Author: Ville Syrjälä Date: Fri Oct 9 18:19:34 2015 +0300 Sprinkle igt_assert(ptr) after gem_mmap__{cpu,gtt,wc} Do the following ptr = gem_mmap__{cpu,gtt,wc}() +igt_assert(ptr); whenever the code doesn't handle the NULL ptr in any kind of specific way. Makes it easier to move the assert into gem_mmap__{cpu,gtt,wc}() itself. Mostly done with coccinelle, with some manual cleanups: @@ identifier I; @@ <... when != igt_assert(I) when != igt_require(I) when != igt_require_f(I, ...) when != I != NULL when != I == NULL ( I = gem_mmap__gtt(...); + igt_assert(I); | I = gem_mmap__cpu(...); + igt_assert(I); | I = gem_mmap__wc(...); + igt_assert(I); ) ...> Signed-off-by: Ville Syrjälä Stochastically-reviwewed-by: Chris Wilson commit 91d295cf06aeee733b57ec87933dba47ed2c8440 Author: Ville Syrjälä Date: Fri Oct 9 17:00:29 2015 +0300 Remove gem_mmap__{cpu,gtt,wc} return value MAP_FAILED asserts gem_mmap__{cpu,gtt,wc} never return MAP_FAILED, it gets converted to NULL internally. So don't go asserting that the returned value is not MAP_FAILED. Done with coccinelle: @@ type T; identifier I; @@ ( I = gem_mmap__gtt(...); | I = gem_mmap__cpu(...); | I = gem_mmap__wc(...); ) ... ( - igt_assert(I != MAP_FAILED); + igt_assert(I); | - igt_assert(I && I != MAP_FAILED); + igt_assert(I); | - igt_assert(I != (T *) MAP_FAILED); + igt_assert(I); | - igt_assert(I != NULL); + igt_assert(I); ) Signed-off-by: Ville Syrjälä Stochastically-reviwewed-by: Chris Wilson commit 8986bbc0ce83c1df4c314c9c04d30608cacae98b Author: Ville Syrjälä Date: Fri Oct 9 16:59:13 2015 +0300 lib: Document that gem_mmap__{cpu,gtt,wc} return NULL on failure Signed-off-by: Ville Syrjälä Stochastically-reviwewed-by: Chris Wilson commit 9792e7b58095dc03e63c105c494308ed771168f6 Author: Ville Syrjälä Date: Fri Oct 9 16:47:05 2015 +0300 s/gem_mmap/gem_mmap__gtt/ Get rid of the gem_mmap() alias of gem_mmap__gtt(). I don't see any point in having it. Signed-off-by: Ville Syrjälä Stochastically-reviwewed-by: Chris Wilson commit bfea74a9f64a900bcb90f946b38746781017449f Author: Paulo Zanoni Date: Thu Sep 24 15:13:58 2015 -0300 kms_frontbuffer_tracking: add fliptrack subtest The current upstream Kernel code stops and then restarts FBC at every page flip. I am working on patches to keep FBC enabled all the time, so this brings the possibility of having the hardware tracking mechanism looking at the old buffer instead of the new one. This test should catch this problem. Signed-off-by: Paulo Zanoni commit f0c067ddb327c6cf7d6c9becaa293b2aa5491007 Author: Paulo Zanoni Date: Mon Oct 5 16:57:53 2015 -0300 kms_frontbuffer_tracking: don't mode unset when checking sink CRC support There's no reason to do a mode unset since we don't care about whether FBC or PSR are enabled or disabled. This should save about a second for each time you invoke the program. Signed-off-by: Paulo Zanoni commit c1daf330e9c4fb0d7aca596a78d81e21ccdaba2f Author: Paulo Zanoni Date: Fri Oct 2 18:12:54 2015 -0300 kms_frontbuffer_tracking: add scaledprimary subtest It's not testing a lot since we lack the Kernel Stolen Memory Checker, but some day this will be useful. Signed-off-by: Paulo Zanoni commit bb2ebe92ef2df31d051e11642f0e122fa9a56683 Author: Paulo Zanoni Date: Thu Sep 24 18:25:24 2015 -0300 kms_frontbuffer_tracking: set the universal planes cap in the setup ... instead of just setting it for the fullscreen_plane subtest and then unsetting it. We want to use it more, so just make sure all the code knows how to deal with multiple planes per CRTC. This also allows us to do some upfront caching of the plane information, so the code for the tests gets simpler. There's a new test that's going to use all these changes. Signed-off-by: Paulo Zanoni commit 68cb0de70c76b15d47b8fb2c25acf6f855554858 Author: Paulo Zanoni Date: Thu Sep 17 15:58:54 2015 -0300 kms_frontbuffer_tracking: change pattern 1's last rect to 1x1 Make sure the tracking mechanism is able to track a write in the very last pixel. Signed-off-by: Paulo Zanoni commit f974422c21ebcc3de2c0a3c530321ba652992ba2 Author: Paulo Zanoni Date: Mon Aug 24 16:30:04 2015 -0300 lib/igt_fb: don't forget to close parens on message printed Restore the anxiety levels back to the normal values. Signed-off-by: Paulo Zanoni commit bbd193b478b4baf40d2a527cac16c271479696cd Author: Daniel Stone Date: Mon Mar 16 20:06:55 2015 +0000 tests: Add blob-property test Exercises the new blob-creation ioctl, testing lifetimes and behaviour of user-created blobs, as well as exercising all the invariant conditions we guarantee from modes exposed as blob properties. v2: Renamed to core_prop_blob, skip test if blob not available. v3: No changes. v4: Consistently return 0/errno. v5: Use do_ioctl_err and igt_assert_fd. Use igt_assert_*() helper macros rather than direct igt_assert(). Signed-off-by: Daniel Stone Reviewed-by: Daniel Vetter commit 668c053e6a63469cb88dac8f89fea0159e1377b4 Author: Daniel Stone Date: Thu Oct 1 14:16:23 2015 +0100 lib/igt.cocci: De-opencode ioctls Use do_ioctl and do_ioctl_err where possible. Signed-off-by: Daniel Stone commit c8cec6b88511f43b5c0301864081fe6ca6e39049 Author: Daniel Stone Date: Thu Oct 1 13:02:38 2015 +0100 lib/drmtest: Add do_ioctl_err to expect failure do_ioctl demands that the ioctl returns success; add a variant named do_ioctl_err, which expects the ioctl to fail, and demands a particular result. Signed-off-by: Daniel Stone commit 31821fce59d6ce3288b5b8e0f18f60417b76c61a Author: Daniel Stone Date: Thu Oct 1 13:25:48 2015 +0100 lib/igt.cocci: Add greater-than to igt_assert_lt* Change m >= n patterns to igt_assert_lte(n, m), and ditto for strict greater-than. Signed-off-by: Daniel Stone commit 6ead44d70bde0aed4ceac5311f3eec599125a554 Author: Daniel Stone Date: Thu Oct 1 13:26:36 2015 +0100 lib/igt_core: Add igt_assert_fd Skip open-coding and assert that fds are valid. Signed-off-by: Daniel Stone commit 715a17bb35a09a6889664bc7df14495bc068e06d Author: Daniel Stone Date: Thu Oct 1 13:00:12 2015 +0100 lib/igt_core: Add igt_assert_neq_*() variants Similar to igt_assert_eq_*(), add variants for non-equality of types other than int. Signed-off-by: Daniel Stone commit c9112dca9e82288b887e248a5982df94c8ec1c04 Author: Daniel Vetter Date: Fri Oct 2 12:56:16 2015 +0200 lib/core: Fix docs for igt_assert_lt(e) Logical negation is hard. v2: The second integer isn't plural (Daniel). Cc: "Morton, Derek J" Signed-off-by: Daniel Vetter Reviewed-by: Daniel Stone Signed-off-by: Daniel Vetter commit d878e18dfd37eb6dd3517d601f4e779349e25ebc Author: Chris Wilson Date: Tue Oct 6 17:03:02 2015 +0100 benchmarks/gem_blt: Fix compilation after rebase and add batch-size Add an option to do more than one copy per batch. Signed-off-by: Chris Wilson commit 8253e7dc84af43d6c757185e5c6ff463feaaf637 Author: Chris Wilson Date: Mon Oct 5 09:31:59 2015 +0100 benchmarks: Measure BLT performance Execute N blits and time how long they complete to measure both GPU limited bandwidth and submission overhead. Signed-off-by: Chris Wilson commit 1b492e311ce13fe4bc42f1edd5479441662d4855 Author: Derek Morton Date: Thu Oct 1 16:09:02 2015 +0100 benchmarks: Fix build errors on Android M-Dessert Android M-Dessert treats implicit declaration of function warnings as errors resulting in igt failing to build. This patch fixes the errors by including missing header files as required. Mostly this involved including igt.h in the benchmarks. Signed-off-by: Derek Morton Signed-off-by: Daniel Vetter commit 983dfe5b68e2e18006cee78811ff387735386fa1 Author: Ville Syrjälä Date: Tue Jul 21 14:05:24 2015 +0300 tests/pm_rc6_residency: Measure the sleep duration The code is confused about the units of CODE_TIME. The comment says 50 microsseconds, but the actual code makes it 50 milliseconds. Avoid the whole mess by measuring the sleep duration ourselves. Since the time measurement is taken around the whole operation it obviously includes a bit of extra, but at least it's much less than the fixed 50 ms. For instance on one VLV board I now get something like this: - Residency in rc6 or deeper state: 3002 ms (ratio to expected duration: 0.98) + Residency in rc6 or deeper state: 3001 ms (sleep duration 3003 ms) (ratio to expected duration: 1.00) so the reported ratio is now much closer to reality. Reviewed-by: Imre Deak Signed-off-by: Ville Syrjälä commit 571942f0c43451b48b0d47d80c70ff2808908317 Author: Ander Conselvan de Oliveira Date: Wed May 27 10:33:41 2015 +0300 testdisplay: Fix segfault after first modeset fails When testing all modes on a connector with a single mode, if the modeset fails, the code attempts to remove fb_info[-1], because old_fb still has the inital value of -1. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90625 Signed-off-by: Ander Conselvan de Oliveira Signed-off-by: Thomas Wood commit 93f1250013c6c2533f840820a62a717aa33dbd88 Author: Thomas Wood Date: Fri Sep 25 09:36:34 2015 +0100 lib: fix fopen mode in igt_debugfs_search Reported-by: Tvrtko Ursulin Signed-off-by: Thomas Wood commit 6c89204da77a721c9f6c2c77908ca9502a246df8 Author: Thomas Wood Date: Wed Sep 23 16:52:24 2015 +0100 lib: add igt_debugfs_search Add igt_debugfs_search to search each line in a debugfs file for a specified substring. Signed-off-by: Thomas Wood commit 1ea96af776a853303240fe6ec414aeed3316c24b Author: Tvrtko Ursulin Date: Thu Sep 24 12:05:07 2015 +0100 gem_ppgtt: Test VMA leak on context destruction Test that VMAs associated with a context are cleaned up when contexts are destroyed. In practice this emulates the leak seen between fbcon and X server. Every time the X server exits we gain one VMA on the fbcon frame buffer object as externally visible via for example /sys/kernel/debug/dri/0/i915_gem_gtt. v2: Use igt_debugfs_open, getline and strstr instead of home-brewed string matching. (Thomas Wood) v3: Rebase for drm_open_driver. Signed-off-by: Tvrtko Ursulin Cc: Thomas Wood Signed-off-by: Thomas Wood commit 2442f595d23b919bdc61d117b85a55304d6535a5 Author: Thomas Wood Date: Thu Sep 24 11:35:19 2015 +0100 lib/tests: explicitly raise SIGSEGV Dereferencing a NULL pointer is undefined behaviour and may not always result in a segmentation fault. Explicitly raise the SIGSEGV signal to test handling of this signal. v2: include signal.h (Derek Morton) Signed-off-by: Thomas Wood commit 9edf293c4566ffdc0937c800035dd2d215355674 Author: Thomas Wood Date: Thu Sep 24 11:04:34 2015 +0100 gem_storedw_loop: fix segfault when listing subtests Commit fb66cd5 (tests/gem_storedw_loop: Fix use after free for bufmgr) introduced a segmentation fault when listing subtests because drm_intel_bufmgr_destroy is called with NULL. Move this and the call to the close function inside an igt_fixture block to prevent them being called when listing subtests. Cc: Robert Beckett Cc: Jesse Barnes Cc: Daniel Vetter Signed-off-by: Thomas Wood commit fb66cd5c346d91407f43879582da80781eed7c97 Author: Robert Beckett Date: Tue Sep 22 19:02:39 2015 +0100 tests/gem_storedw_loop: Fix use after free for bufmgr Move bufmgr destruction to end of tests. This avoids use after free on successive tests. This could be squashed with the following patch to aid bisectability: commit 0679702150157706a6def66b893b29c16345f4db Author: Jesse Barnes Date: Wed Aug 5 16:06:31 2015 -0700 tests/gem_storedw_loop: add new store_dword test to unify per-ring ones v2 Signed-off-by: Robert Beckett Cc: Jesse Barnes Reviewed-by: Jesse Barnes Signed-off-by: Daniel Vetter commit a16704261fc12259a2e61c00c3cef7be568d71f9 Author: Daniele Ceraolo Spurio Date: Wed Sep 9 09:46:56 2015 +0100 tests/gem_ctx_param_basic.c: fix non-root-set-no-zeromap subtest The test expects an ioctl failure when it tries to set CONTEXT_PARAM_NO_ZEROMAP from a non-root process. However, there is no requirement in the kernel for the user to be root to set this parameter, so the test is failing (it never passed as far as I'm aware of). Fix the test by making it expect a successful ioctl completion. Signed-off-by: Daniele Ceraolo Spurio Reviewed-by: Jesse Barnes Signed-off-by: Thomas Wood commit ad4f3206dc05dcd1a65c9da08deb2b5d65e7a760 Author: Thomas Wood Date: Wed Sep 16 15:21:09 2015 +0100 m4: remove unused macros The requirement for these macros was removed in commit af97918 (tools: remove quick_dump). Reported-by: Ben Widawsky Signed-off-by: Thomas Wood commit 982934625ac67234c6d85c6cf29a5a487e54d4f0 Author: Thomas Wood Date: Wed Sep 16 14:36:24 2015 +0100 lib: allow wildcard matching when specifying subtests This allows multiple subtests to be specified using standard wildcard characters when using the --run-subtest command line option. Signed-off-by: Thomas Wood commit b883b3066848957376d841cb4ffdf2d5646315c8 Author: Thomas Wood Date: Tue Sep 15 17:04:11 2015 +0100 scripts: add quick-testlist.py Add a script to take a piglit results file and create a list of tests that ran in under 60 seconds. This list can be used by the --test-list option of piglit. v2: exclude incomplete tests Signed-off-by: Thomas Wood commit 1f9e0550455be4b219954a026407dd23ec21b299 Author: Thomas Wood Date: Fri Sep 11 15:15:13 2015 +0100 Update version to 1.12 and add the release date Signed-off-by: Thomas Wood commit c5902bffe3ff4d6c1dc77b97651fc3b3ff04e049 Author: Thomas Wood Date: Fri Sep 11 15:13:00 2015 +0100 NEWS: Updates Signed-off-by: Thomas Wood commit 21111730832f8139a215cf8ba66471ef7e992984 Author: Micah Fedke Date: Fri Aug 14 14:36:36 2015 +0000 tests: update core_getstats to run on any platform Signed-off-by: Micah Fedke Signed-off-by: Thomas Wood commit fd282fb9d48c265533af91a291da368ac4c626e9 Author: Micah Fedke Date: Fri Aug 14 14:35:46 2015 +0000 tests: update core_getclient to run on any platform Signed-off-by: Micah Fedke Signed-off-by: Thomas Wood commit 75c9e92efb9522d6f2c455dc35ba169c1d67ad52 Author: Micah Fedke Date: Thu Aug 13 14:05:52 2015 +0000 tests: update core_getversion to run on any platform Signed-off-by: Micah Fedke Signed-off-by: Thomas Wood commit 253544f7a376d02d306a111019ef102a79acc4f3 Author: Micah Fedke Date: Thu Aug 13 13:59:23 2015 +0000 tests: update core_get_client_auth to run on any platform Signed-off-by: Micah Fedke Signed-off-by: Thomas Wood commit f91e93fa40cf76a0d78c4f022ff94e554fd73032 Author: Micah Fedke Date: Wed Jul 22 20:32:06 2015 +0000 lib: remove support for deprecated drm_open_any*() calls Signed-off-by: Micah Fedke Signed-off-by: Thomas Wood commit c81d293aed94fea9c48899187016a1b28f8989d5 Author: Micah Fedke Date: Wed Jul 22 21:54:02 2015 +0000 convert drm_open_any*() calls to drm_open_driver*(DRIVER_INTEL) calls with cocci Apply the new API to all call sites within the test suite using the following semantic patch: // Semantic patch for replacing drm_open_any* with arch-specific drm_open_driver* calls @@ identifier i =~ "\bdrm_open_any\b"; @@ - i() + drm_open_driver(DRIVER_INTEL) @@ identifier i =~ "\bdrm_open_any_master\b"; @@ - i() + drm_open_driver_master(DRIVER_INTEL) @@ identifier i =~ "\bdrm_open_any_render\b"; @@ - i() + drm_open_driver_render(DRIVER_INTEL) @@ identifier i =~ "\b__drm_open_any\b"; @@ - i() + __drm_open_driver(DRIVER_INTEL) Signed-off-by: Micah Fedke Signed-off-by: Thomas Wood commit e2241805a43e2cbd5287010e90005542845b48cd Author: Micah Fedke Date: Wed Jul 22 21:42:51 2015 +0000 lib: adding drm_open_driver() interface The drm_open_driver*() functions replace the drm_open_any*() functions and provide the same utility, but in a way that is platform agnostic, not intel-specific. This opens the path for adopting intel-gpu-tools to non-intel platforms. This commit renames the calls and adds the chipset parameter which can be used to restrict the opening to a specific hardware family. For example, drm_open_driver(DRIVER_INTEL) will only return a valid fd if an intel GPU is found on the system, along with performing intel-specific initialization stuff like gem_quiescent_gpu(), et al. If OPEN_ANY_GPU is specified, the first available drm device of any type will be opened. Other hardware type flags may be added in the future. The drm_open_any*() calls are retained as aliases of drm_open_driver*(OPEN_ANY_GPU) but will be removed in a subsequent patch. Signed-off-by: Micah Fedke Signed-off-by: Thomas Wood commit 2bacd07eb3be30fd30ed4fa4645901683b1c6b09 Author: Thomas Wood Date: Thu Sep 10 11:40:43 2015 +0100 lib: don't use igt_warn in signal handlers igt_wan and other log functions are not async-signal safe, so should not be used in signal handlers. Reported-by: Paulo Zanoni Signed-off-by: Thomas Wood commit bcd3e1f33f136399659c7b1549be3bae467abaf4 Author: Derek Morton Date: Wed Sep 9 17:51:35 2015 +0100 tools/Android.mk: Fix compile error in intel_reg.c The patch "tools: install the register definition files" caused a build error on android as it added 'PKGDATADIR' which was not defined in the Android build environment. This patch adds that define to tools/Android.mk. It also copies the files it points to so they are actually in the target file system. v2: Added local variable for tool path Signed-off-by: Derek Morton Signed-off-by: Thomas Wood commit 3546514791e159e94ba3baf73cc2bad65a7a0f20 Author: Thomas Wood Date: Tue Sep 8 16:49:24 2015 +0100 null_state_gen: add const to intel_batch_state_copy data The data is not modified by the function and is often declared const. Signed-off-by: Thomas Wood commit fdecc1b5afbdcdb20fa98c642cea7fa1dc1a8944 Author: Thomas Wood Date: Tue Sep 8 17:13:43 2015 +0100 tools/aubdump: remove void pointer arithmetic A gcc extension allows void pointer arithmetic by treating the size of void as 1, but this generates a warning when -Wpointer-arith is used. Signed-off-by: Thomas Wood commit 2155d1eb546f1b4082374266323cbb709f1e6659 Author: Ville Syrjälä Date: Fri Sep 11 15:27:32 2015 +0300 tools/intel_bios_reader: Add MIPI device type Decode the MIPI [sic] device type. Signed-off-by: Ville Syrjälä commit d8313c30021f039a5d9d380b28a7d20e0c70f1f8 Author: Ville Syrjälä Date: Fri Sep 11 15:01:16 2015 +0300 tools/intel_bios_reader: Decode the device type bits Each bit in the device type is supposed to mean something. Decode their meaning. Signed-off-by: Ville Syrjälä commit a02305260eaba0da622cacc8308adbeffa467db7 Author: Ville Syrjälä Date: Fri Sep 11 14:47:59 2015 +0300 tools/intel_bios_reader: Print the child dev handle Signed-off-by: Ville Syrjälä commit b701bb14c6fc82edfb07c2f6087b96e36dd48efe Author: Ville Syrjälä Date: Wed Mar 25 20:23:30 2015 +0200 intel_bios_reader: Don't explode looking for the devid Check that the offset where expect to find the device id is withing the BIOS image, instead of accessing whatever (if anything) happens to be there. Signed-off-by: Ville Syrjälä commit b1e756451c59b342a9d15433379bf543ddedd56b Author: Ville Syrjälä Date: Wed Mar 25 13:36:52 2015 +0200 intel_bios_reader: Read the child device size from VBT New stuff has been added to the end of the child device block at various times, so using a hardcoded size for the block is a bad idea. Fortunately the size of the block is listed in the VBT just before the blocks themselves, so grab it from there. Signed-off-by: Ville Syrjälä commit c137ac71584467424f8a7bbb40825fa6250093c5 Author: Ville Syrjälä Date: Wed Sep 9 17:00:56 2015 +0300 tools/intel_display_poller: Align DSPSURF to 128k to appease gen4/vlv/chv gen4/vlv/chv require DSPSURF to be 128k aligned. Try to respect that in order to avoid ugly glitches. Signed-off-by: Ville Syrjälä commit a8b85ea21b053145527a848b51b57f5c0cfa003e Author: Ville Syrjälä Date: Wed Sep 9 16:47:29 2015 +0300 tools/intel_display_poller: Make pipe name alphabetic Instead of raw numbers the user can now specify the pipe as 'a',b'... or 'A','B'... Signed-off-by: Ville Syrjälä commit 01a2a4d85d71b1b7f6f4d5239d207b821ae01b55 Author: Ville Syrjälä Date: Wed Aug 19 17:00:09 2015 +0300 tools/intel_display_poller: Try to fix pipe<->plane handling on gen2/3 Check the pipe assignment for each plane (excluding plane C since the kernel doesn't use that one) and pick the first one that's assigned to the target pipe. Signed-off-by: Ville Syrjälä commit ba139493a6f8e35ba6cecd5058ff93fb12848465 Author: Ville Syrjälä Date: Fri Jun 5 17:09:25 2015 +0300 tools/intel_display_poller: Add CHV support Add CHV support by adding a pipe_offset[] thingy (like we have in the kernel) to deal with the wonky register offsets. Signed-off-by: Ville Syrjälä commit 7d2f1d7d9ed44d45b91ebdda9fe25d90cbaa92ab Author: Ville Syrjälä Date: Wed Aug 19 17:34:45 2015 +0300 tools/intel_reg: Print the potential port names in the help text v2: Repaint with Jani's favorite color Signed-off-by: Ville Syrjälä commit fb8131545f386348403fba32dc22c79b4aa110af Author: Ville Syrjälä Date: Wed Aug 19 17:12:14 2015 +0300 tools/intel_reg: Set register stride to 1 for VGA registers VGA registers are generally 8 bits long, so set the stride to 1 byte. Signed-off-by: Ville Syrjälä commit 88fed9fbca693834ae2e636adc7941cee57930d7 Author: Mika Kuoppala Date: Fri Aug 28 17:51:45 2015 +0300 tools/intel_reg: Use pci device from config on write Use the pre configured pci device from config also in write path. Cc: Jani Nikula Signed-off-by: Mika Kuoppala Reviewed-by: Jani Nikula Signed-off-by: Thomas Wood commit 6eed1b5eb4ba09435c9b4cd63fb302121009c188 Author: Ander Conselvan de Oliveira Date: Wed Aug 26 11:29:06 2015 +0300 kms_addfb_basic: Require fb modifiers for unused field tests The drm core doesn't check unused fields of ADDFB2 for pre-FB_MODIFIERS userspace, so use igt_require_fb_modifiers(). Also, the size of the ioctl changed with the addition of the modifiers, so it is necessary to use the LOCAL_ version of it, otherwise some data may get truncated. v2: Improve commit message. (Thomas) Remove one spurious change to use LOCAL_DRM_IOCTL_ADDFB2. (Thomas) Signed-off-by: Ander Conselvan de Oliveira Signed-off-by: Thomas Wood commit 2269997cff0f7700566f80359971a723d0b0212b Author: Daniele Ceraolo Spurio Date: Thu Sep 3 17:13:58 2015 +0100 tests/gem_bad_reloc: use correct page table size 2 subparts of gem_bad_reloc check that the reloc address is below the global gtt boundary. However, when executing from ppgtt the reloc address can be greater than that and still be a valid address. To be sure that we're using the right upper limit, select it based on the ppgtt mode. Cc: Michel Thierry Signed-off-by: Daniele Ceraolo Spurio Reviewed-by: Michel Thierry Signed-off-by: Thomas Wood commit b04691b3e8e62bd105f0f4d8d3b9e7da187f0c90 Author: Thomas Wood Date: Tue Sep 8 11:16:46 2015 +0100 tests/gem_pwrite_snooped: disable const cast warning Disable -Wcast-qual temporarily to allow memchr_inv to return non-const data (similar to memchr), without causing a compiler warning. Cc: Ville Syrjälä Signed-off-by: Thomas Wood commit 84cfa9e4d271dddd4211ed9a3b94549934fa8819 Author: Thomas Wood Date: Mon Sep 7 14:59:54 2015 +0100 tests: remove gem_storedw_loop_* tests These have been replaced by subtests in gem_storedw_loop. Signed-off-by: Thomas Wood Reviewed-by: Daniel Vetter commit 1dcace30184c812f1e12ee10cc827accce140cc0 Author: Thomas Wood Date: Mon Sep 7 11:32:05 2015 +0100 build: fix unused-result warnings Signed-off-by: Thomas Wood commit f0381d1abebfc5b7e24a835dfe1c2344396c0304 Author: Thomas Wood Date: Mon Sep 7 09:26:01 2015 +0100 lib: various documentation fixes Signed-off-by: Thomas Wood commit de2470ea4fb7b7df698e0f7651cb250707709c05 Author: Thomas Wood Date: Mon Sep 7 16:05:11 2015 +0100 intel_reg: ensure "intel_reg help" always works Signed-off-by: Thomas Wood commit 9ecb50e5c55c4d287f9f083b41d5e51b6a9d9ad2 Author: Thomas Wood Date: Fri Sep 4 14:46:45 2015 +0100 tools: install the register definition files Install the register definition files and use them by default in intel_reg. v2: remove redundant path check Suggested-by: Jani Nikula Signed-off-by: Thomas Wood commit af9791849467a3437e0920c8f08c5a646302da7d Author: Thomas Wood Date: Tue Aug 25 11:30:11 2015 +0100 tools: remove quick_dump Remove quick_dump as it has been replaced by the intel_reg tool and move the register definition files to tools/registers. Signed-off-by: Thomas Wood Acked-by: Jani Nikula commit 2142a15d49f85175677ff360833869afe9c79b58 Author: Thomas Wood Date: Thu Sep 3 09:56:18 2015 +0100 tests/gem_storedw_loop: remove redundant ppgtt check All tests require ppgtt, so checking for it later on has no effect. Signed-off-by: Thomas Wood commit 673aab8a0afd538463fa96da263e56537f413dfd Author: Thomas Wood Date: Tue Aug 25 16:23:28 2015 +0100 tests/gem_storedw_loop: skip on gen6 bsd MI_STORE_DATA is broken on gen6 bsd. Signed-off-by: Thomas Wood commit b9d27f03c7cdfdb66734b5164916a501dd787036 Author: Thomas Wood Date: Wed Aug 26 12:05:13 2015 +0100 tools/null_state_gen: fix various compiler warnings Add the debug and warning flags to cflags and fix the resulting issues. Signed-off-by: Thomas Wood commit 4ee6709e3bd98eb52f4c4c22f58fecf9750f26eb Author: Thomas Wood Date: Thu Aug 27 14:34:08 2015 +0100 tests/tools: add --as-needed to linker flags Add --as-needed to the linker flags to reduce the number of shared library dependencies, since not all the tests and tools use all the libraries required by the helper library (for example, many tests do not use cairo). This helps portability of the binaries and also makes a very small improvement to the execution speed and memory consumption. Signed-off-by: Thomas Wood commit 88cbb41ade5a66f96b7cd3844ce86f43d192afa0 Author: Thomas Wood Date: Tue Aug 25 10:34:46 2015 +0100 lib/gpgpu_fill.c: fix file permissions Signed-off-by: Thomas Wood commit 4c63f54de9b7f0a6d49807c15c63e952ac4afdf8 Author: Ander Conselvan de Oliveira Date: Fri Aug 21 16:49:33 2015 +0300 gem_storedw_loop: Skip test if device doesn't have requested ring The VEBOX ring is not available in generations before Haswell, so make tests that use it skip instead of fail in previous gens. Signed-off-by: Ander Conselvan de Oliveira Signed-off-by: Thomas Wood commit d3d56bf2afb45fb8a5f5dabbf41ced53d21252f3 Author: Tim Gore Date: Wed Aug 19 12:10:16 2015 +0100 tests/gem_ctx_exec.c: only hang the ring we are testing In the reset-pin-leak test we were calling igt_set_stop_rings(STOP_RING_DEFAULTS) which sets the stop_rings bits for all gpu engines. But we only submit work to the render engine. When TDR is enabled (as it is in Android currently) only the render engine gets reset, which clears the stop_rings bit for the render engine but not for the other engines. This causes the test to fail on the second iteration because stop_rings is not clear. So just set the stop_rings bit for the engine we are going to hang, namely the render engine. Signed-off-by: Tim Gore Signed-off-by: Thomas Wood commit 71b85f9713cd48d589f607afc81d090b2afc2ed4 Author: Paulo Zanoni Date: Mon Aug 24 18:22:04 2015 -0300 kms_frontbuffer_tracking: print the status when it's not what we expect Printing the status on an unexpected failure is always the first thing I do. So do this always. Signed-off-by: Paulo Zanoni commit a07d0a47be984ccb93c6bd968905bd13b7a3cfd9 Author: Paulo Zanoni Date: Mon Aug 24 18:01:47 2015 -0300 kms_frontbuffer_tracking: add slow_draw() subtest It fails on my SKL machine. Signed-off-by: Paulo Zanoni commit 229110442a4814b87859e2833688feb2881a2274 Author: Paulo Zanoni Date: Mon Aug 24 17:04:25 2015 -0300 kms_frontbuffer_tracking: wait for PSR to be HW Enabled & Active Make sure PSR is fully there. Signed-off-by: Paulo Zanoni commit c1fe951b8a08a4a42ede295cfa478cca8e230c22 Author: Paulo Zanoni Date: Mon Aug 24 17:02:12 2015 -0300 kms_frontbuffer_tracking: add options for setting the shared fb X/Y I'm using this to debug some aspects of the GTT tracking. While at it, do a small rename and fix the ASCII art. Signed-off-by: Paulo Zanoni commit 5e68ad9f8223f721c03f9915ac909ccab8a1433a Author: Chris Wilson Date: Fri Aug 21 22:26:42 2015 +0100 benchmarks/gem_exec_reloc: Allow profiling 0 relocs Signed-off-by: Chris Wilson commit 05f5e16eafb400669524265d1a506c0e6ae18c53 Author: Thomas Wood Date: Fri Aug 21 14:13:16 2015 +0100 lib: fix distcheck issues Signed-off-by: Thomas Wood commit 804e11f40defc1c53722914a449c6b2dcdbbf9a2 Author: Thomas Wood Date: Mon Aug 17 17:57:43 2015 +0100 lib: add a single include header Add a header that includes all the headers for the library. This allows reorganisation of the library without affecting programs using it and also simplifies the headers that need to be included to use the library. Signed-off-by: Thomas Wood commit a11879a4ab8840dae96867445ac27d100fc798d9 Author: Thomas Wood Date: Mon Aug 17 15:27:18 2015 +0100 assembler: remove built sources with make clean Built sources are generated by "make all", so should be removed by "make clean". This also ensures "distcleancheck" passes. Signed-off-by: Thomas Wood commit c37b2352020accd261e28d71ad71e96d62d6ddb5 Author: Mika Kuoppala Date: Tue Aug 18 17:44:38 2015 +0300 tests/drv_hangman: Adjust to 64bit bb offsets commit e1f123257a1f7d3af36a31a0fb2d4c6f40039fed Author: Michel Thierry Date: Wed Jul 29 17:23:56 2015 +0100 drm/i915: Expand error state's address width to 64b changed the batch buffer address to be 64b. Fix the parsing of gtt offset accordingly. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91638 Cc: Akash Goel Cc: Michel Thierry Reviewed-by: Michel Thierry Signed-off-by: Mika Kuoppala commit 0e25e5d92dd4303deb46f0a70dd097676e2842a8 Author: Jani Nikula Date: Thu Jun 18 15:17:47 2015 +0300 igt: remove deprecated reg access tools in favor of intel_reg intel_iosf_sb_read, intel_iosf_sb_write, intel_reg_dumper, intel_reg_read, intel_reg_snapshot, intel_reg_write, intel_vga_read, and intel_vga_write have been deprecated in favor of intel_reg. Remove the deprecated tools. intel_reg does everything they do, and more. Signed-off-by: Jani Nikula commit 9b73ce43fecc71533603849f35dd3bd1233a0eea Author: Chris Wilson Date: Sun Aug 16 12:12:53 2015 +0100 overlay: Fix min frequency detection on BYT/BSW Signed-off-by: Chris Wilson commit 64590c7b768dc8d8dd962f812d5ff5a39e7e8b54 Author: Paulo Zanoni Date: Fri Aug 14 16:08:07 2015 -0300 kms_frontbuffer_tracking: reduce the FBC wait timeout to 2s Just like we did for PSR, let's do it for FBC. FBC gets reenabled in just 50ms, so the 5000ms timeout is huge. On the other hand, we only pay the 5000ms timeout full price 9 times when running kms_frontbuffer_tracking --fbc-only, so this change shouldn't save too much time. Signed-off-by: Paulo Zanoni commit f4db3b18841263f8f617a9f7f0aaf14fab7196d1 Author: Paulo Zanoni Date: Fri Aug 14 15:56:34 2015 -0300 kms_frontbuffer_tracking: reduce the PSR wait timeout to 2s PSR only takes up to 100ms to be enabled, but we were using 5000ms timeouts. The problem with PSR is that the MMAP_GTT tests have to assert that PSR is disabled and stays disabled during the whole timeout, so that 5s cost is a little to high when we consider that we do the full 5s wait 74 times when running kms_frontbuffer_tracking --psr-only. By reducing to 2s we still make sure we're safe, since we're waiting 20x the time PSR needs to get reenabled, and we reduce the runtime of running kms_frontbuffer_tracking --psr-only from 14m10s to 10m29s. Signed-off-by: Paulo Zanoni commit 77b8af218cd2648f4d3ff671126c9d2500cade6e Author: Chris Wilson Date: Fri Aug 14 20:35:18 2015 +0100 benchmark/gem_exec_trace: Inline everything Avoid the globals and make the dispatch one huge function and hope GCC works some magic. Signed-off-by: Chris Wilson commit a64e6c39b13c2a59d807cab9d4faefd4aaa49d0c Author: Chris Wilson Date: Fri Aug 14 20:31:48 2015 +0100 benchmark/gem_exec_tracer: Tweak to handle SNA SNA starts by feeding in deliberately bad ioctls in order to detect the kernel interface versions. A quick solution is to always feed it to the ioctl and only record the trace if it is valid. Signed-off-by: Chris Wilson commit 78120d8158555fd393eb73e7dc992388b6d03f05 Author: Paulo Zanoni Date: Wed Aug 12 15:42:15 2015 -0300 kms_frontbuffer_tracking: add subtests for rgb565 and rgb101010 Make sure valid formats work properly and invalid formats keep the features disabled. Signed-off-by: Paulo Zanoni commit c3fb972ee9616d62f16d311fffdcb06c44ec46ec Author: Paulo Zanoni Date: Fri Aug 14 14:48:38 2015 -0300 kms_frontbuffer_tracking: fix psr-farfromfence assertions We're using GTT draws and they disable PSR. This test is mostly for FBC anyway. Signed-off-by: Paulo Zanoni commit d675cf3ed7c7099fe8fa42e3f27d8fc200852275 Author: Paulo Zanoni Date: Fri Aug 14 14:09:08 2015 -0300 kms_frontbuffer_tracking: split prepare_subtest() in two functions And remove duplicated code by calling prepare_subtest_data() on rte_subtest(). Signed-off-by: Paulo Zanoni commit 6de5b0611245c4949b5655890b47905eea71c34a Author: Paulo Zanoni Date: Fri Aug 14 10:43:21 2015 -0300 kms_frontbuffer_tracking: remove duplicated pairs on multidraw If we already tested the combination of m1+m2, don't test m2+m1 later: the drawing pattern used already has 4 squares, so we're already testing the "m2 followed by m1" case. This should reduce the test time from about 60s to about 30s. Signed-off-by: Paulo Zanoni commit a2904ead7487c6eba5d3ea8b93d7a9f45e883355 Author: Paulo Zanoni Date: Tue Jul 21 11:02:26 2015 -0300 kms_frontbuffer_tracking: SKIP if not enough stolen is available This is not an FBC bug. Signed-off-by: Paulo Zanoni commit f62a683acd1b8eb7626b9b1251e4c4e860f8c2f7 Author: Paulo Zanoni Date: Wed Aug 12 16:22:57 2015 -0300 kms_frontbuffer_tracking: use all drawing methods on multidraw_subtest Instead of having a single pair of methods per subtest. Having this in pairs is not very useful since we end doing all the drawing methods per subtest anyway. This saves a few modesets, which makes eDP slightly faster - about 22s on my local machine. Signed-off-by: Paulo Zanoni commit b53bcf789b2619d786b25effcc83a461aaf0610b Author: Paulo Zanoni Date: Wed Aug 12 11:50:58 2015 -0300 kms_frontbuffer_tracking: improve support for multiple pixel formats We now have per-pixel-format FBs and CRC values. Also t->format to indicate the format we're using on the subtest. We still only use the default RGB888 format (AKA FORMAT_DEFAULT) for all tests since multiplying the current number of tests by the number of new pixel formats doesn't sound like a great idea. With this, it should be really easy to add new tests that use different pixel formats. Also, if you want a full IGT run on a specific pixel format, all you need to do is to change FORMAT_DEFAULT. Signed-off-by: Paulo Zanoni commit 3b176007899e81aa6254131d09a9693b13bdbcd6 Author: Paulo Zanoni Date: Tue Aug 11 15:40:35 2015 -0300 kms_frontbuffer_tracking: add information about more formats We're not using those formats yet, but a simple change to create_fb() allows us to use these formats without problems now. Signed-off-by: Paulo Zanoni commit 606f039decec8623250979beb6f141ce4fa2f13c Author: Paulo Zanoni Date: Tue Aug 11 11:50:12 2015 -0300 kms_frontbuffer_tracking: introduce enum color We want to add support for different pixel formats and the current hardcoded pixel values won't work with that. So add enum color and its auxiliary functions so we can decide the pixel values based on the chosen color enum. Signed-off-by: Paulo Zanoni commit 7009b10c429c33ea7258997901ee8ec1c67f75c7 Author: Paulo Zanoni Date: Tue Aug 11 10:36:46 2015 -0300 kms_frontbuffer_tracking: don't pass the format to create_fb() It is create_fb() who is going to decide the buffer format based on the arguments provided by the caller. This is another step for the non-XRGB8888 support. Signed-off-by: Paulo Zanoni commit e4b94900b560e38b8a8e1ff672a53621688f5987 Author: Paulo Zanoni Date: Tue Aug 11 10:26:46 2015 -0300 kms_frontbuffer_tracking: add a wrapper for igt_create_fb() The wrapper will do a few additional things when we add support for formats different than XRGB8888. Signed-off-by: Paulo Zanoni commit 445182f26bd48bfefdec7064a7f4afafc8f52a1e Author: Paulo Zanoni Date: Thu Aug 13 19:02:34 2015 -0300 kms_frontbuffer_tracking: fix MMAP_WC assertions on PSR Now that the MMAP_WC operations call the dirty ioctl, PSR gets reenabled after some time. So we have to adjust op_disables_psr() to take that into account. Signed-off-by: Paulo Zanoni commit 9113c9aa9be5626d4d12a794c70860097ae59c1f Author: Paulo Zanoni Date: Thu Aug 13 17:37:06 2015 -0300 lib/igt_draw: break if we already wrote every pixel Due to the nature of accessing a tiled buffer in an untiled way, we used to loop through the whole buffer all the time. Add a small mechanism to just break in case we know we already wrote every pixel we should have written. On kms_frontbuffer_tracknig/fbc-2p-primscrn-pri-shrfb-draw-pwrite (with a 3200x1800 primary screen and a 1920x1080 secondary screen), I could reduce the runtime from ~7.53s to ~6.01s. Signed-off-by: Paulo Zanoni commit 9194f4efdf89d9c2e9ab79a232e642b8664fa54f Author: Paulo Zanoni Date: Thu Aug 13 17:25:31 2015 -0300 lib/igt_draw: fix pwrite_tiled() Don't forget to flush in case we're in the last iteration of the loop. This fixes failures of kms_frontbuffer_tracking when used with --use-small-modes on eDP monitors. Signed-off-by: Paulo Zanoni commit caaf3b869f2be2758ba836244f07ad25c35ec7d5 Author: Paulo Zanoni Date: Mon Aug 3 14:41:35 2015 -0300 lib/igt_draw: add support for RGB565 and XRGB2101010 We need to test those pixel formats on the FBC code, so let's make sure the drawing library works on them first. v2: Update the gtkdoc (Daniel). Signed-off-by: Paulo Zanoni commit a1fce7490c72c45c79cff89a39dee0b59a8f4c71 Author: Paulo Zanoni Date: Thu Aug 13 13:49:42 2015 -0300 lib/igt_core: use print("%s", #expr) instead of print(#expr) If I have a program with the following: igt_skip_on(i % 2 == 0); igt_skip_on_f(i % 2 == 0, "i:%d\n", i); igt_require(i % 2 == 0); igt_require_f(i % 2 == 0, "i:%d\n", i); then I'll get compiler error messages complaining about format conversions related to the '%' character used in the mod operation. So put the whole string as a %s argument to avoid interpreting '%' and any other possible chars. Signed-off-by: Paulo Zanoni commit 87a5f2d7762b5b8398c5f5899d796bb78dc827b7 Author: Jesse Barnes Date: Thu Aug 13 13:28:38 2015 -0700 tests/kms_setmode: mark simple clone test as basic Should cover simple, single CRTC mode sets. Reviewed-by: Daniel Vetter Signed-off-by: Jesse Barnes commit e5839d240aa7adf759b39043f7d16f53e30a8da7 Author: Jesse Barnes Date: Thu Aug 13 13:26:30 2015 -0700 tests/kms_flip: add basic tests for flip, flip vs dpms, and flip modeset v2 Simple variants that don't do multiple output or interruptible testing. v2: add vblank variant, remove duplication (Daniel) Reviewed-by: Daniel Vetter Signed-off-by: Jesse Barnes commit 5134f2c96d53db6ac37a4d0311eb9808ae20a80e Author: Jesse Barnes Date: Thu Aug 13 13:14:12 2015 -0700 tests/pm_rpm: mark RTE and D3 tests as basic These always need to pass for basic PM functionality. Reviewed-by: Daniel Vetter Signed-off-by: Jesse Barnes commit 68d1b532fae03768012d0c16a2c0dd03eea64fcb Author: Jesse Barnes Date: Thu Aug 13 13:13:23 2015 -0700 tests/pm_backlight: mark simple test as basic We should be able to adjust the backlight and observe changes in sysfs. Reviewed-by: Daniel Vetter Signed-off-by: Jesse Barnes commit ec4b76872d232faa7846e7c201e7fcfc98c682a9 Author: Jesse Barnes Date: Thu Aug 13 13:12:06 2015 -0700 tests/kms_addfb: mark simple fb creation tests as basic v2 We should always be able to create simple and tiled objects. v2: make the whole test basic (Daniel) add to .gitignore Reviewed-by: Daniel Vetter Signed-off-by: Jesse Barnes commit 503420944d7359ea280f6445186bedcdfaceb698 Author: Jesse Barnes Date: Fri Aug 14 08:45:08 2015 -0700 tests/gem_tiled_pread: mark normal tests as basic v2 These simple tests should always pass. v2: drop pwrite variant as it's more of a stress test (Daniel) add to .gitignore Reviewed-by: Daniel Vetter Signed-off-by: Jesse Barnes commit 5001640718d29daa8619647eff45f9e3e74fd151 Author: Jesse Barnes Date: Thu Aug 13 13:08:52 2015 -0700 tests/gem_pread/pwrite: mark normal tests as basic These should always pass. Reviewed-by: Daniel Vetter Signed-off-by: Jesse Barnes commit c51c1ed7761082b99f2f39efcf43ee8e4df2c6ae Author: Jesse Barnes Date: Thu Aug 13 13:07:34 2015 -0700 tests/gem_mmap_gtt: mark basic access and copy tests as basic v2 These ones should always pass and are fairly quick. v2: add more tests (Daniel) Reviewed-by: Daniel Vetter Signed-off-by: Jesse Barnes commit 90c47b294741089a25480e1ef73ec4d0cc5d666c Author: Jesse Barnes Date: Thu Aug 13 13:05:34 2015 -0700 tests/gem_mmap: mark basic object creation tests as basic We should be able to create small and moderate sized objects quickly and without errors. Reviewed-by: Daniel Vetter Signed-off-by: Jesse Barnes commit b0d8d73d8b7e5befd613e49610cb22287a8a60f2 Author: Jesse Barnes Date: Thu Aug 13 12:58:25 2015 -0700 tests/drv_getparams: mark EU and subslice fetch as basic v2 Fundamental and simple functionality. v2: make whole test basic (Daniel) add to .gitignore Reviewed-by: Daniel Vetter Signed-off-by: Jesse Barnes commit e920d719b20f3b79e2c70dc59ae3f9858b65a639 Author: Jesse Barnes Date: Thu Aug 13 12:57:22 2015 -0700 tests/gem_flink, prime_self_import: mark flink and prime tests as basic v2 They're testing basic functionality and don't involve stress or race induction. v2: use gem_flink and prime_self_import tests instead (Daniel) add to .gitignore Reviewed-by: Daniel Vetter Signed-off-by: Jesse Barnes commit dc9505a405cd6232f4dd6e7d7243a3df497b2f32 Author: Jesse Barnes Date: Wed Aug 5 16:09:35 2015 -0700 tests/drv_module_reload_basic: use linear_blits after module_reload for sanity check Reduces runtime a lot... Reviewed-by: Daniel Vetter Signed-off-by: Jesse Barnes commit 4409c8328442790317fb08503b646611dc807ced Author: Jesse Barnes Date: Wed Aug 5 16:09:17 2015 -0700 tests/drv_module_reload: rename drv_module_reload to include in BATs Absolutely-acked-by: Daniel Vetter Signed-off-by: Jesse Barnes commit 0679702150157706a6def66b893b29c16345f4db Author: Jesse Barnes Date: Wed Aug 5 16:06:31 2015 -0700 tests/gem_storedw_loop: add new store_dword test to unify per-ring ones v2 There was a lot of duplication going on... Mark as basic while we're at it as these should never fail. v2: add to .gitignore Reviewed-by: Daniel Vetter Signed-off-by: Jesse Barnes commit d568f69d5da9e4cc7bb7f1c405b3b8a17ac77fe3 Author: Chris Wilson Date: Fri Aug 14 13:40:01 2015 +0100 igt/gem_mmap: Add one more extra large bo Daniel complained that all the tests in gem_mmap.c were too quick. This one aims to rectify that by double checking that if we mmap a buffer larger enough to force swapping, everything still works. Also fix the test to exercise the different object sizes! Signed-off-by: Chris Wilson commit 8af62be2ada2d4a2c618a48548f4248ef397582f Author: Chris Wilson Date: Fri Aug 14 14:04:54 2015 +0100 lib: Allow caller to use uint64_t sizes with intel_require_memory() Allow the caller to ask how many extra large objects can be created and still fit into memory. Signed-off-by: Chris Wilson commit 5c07135b7bd23ce0beae67cfd8a71ac63f543859 Author: Mika Kuoppala Date: Thu Aug 13 15:51:16 2015 +0300 tools/null_state/gen9: Send all components in VF state Fix commit 59cdc16b1a6f069f944ff17851a59edf8f72d45d Author: Arun Siluvery Date: Fri Jul 31 16:27:07 2015 +0100 tools/null_state/gen9: Send atleast one valid component in VF state to honor the Reviewed-by, send all four components as noted by Ben in his review. Cc: Ben Widawsky Cc: Arun Siluvery Signed-off-by: Mika Kuoppala commit c049096eb627661182f76bc5d99b8c17c1e8b3d3 Author: Paulo Zanoni Date: Wed Aug 12 19:31:52 2015 -0300 kms_frontbuffer_tracking: don't test SPR or CUR on multidraw The goal of the multidraw subtest is to check if alternating drawing methods can somehow break the feature. The plane we're drawing to really shouldn't matter here - we have other tests to make sure drawing on the different planes works correctly. So after this patch we'll only run the multidraw subtest for the primary plane, not for sprite and cursors anymore. This makes "--no-edp --fbc-only --1p-only" go from 2m29s to 1m40s on my machine. Of course, we can still run these tests with the --show-hidden flag. Signed-off-by: Paulo Zanoni commit 78d076268cfb0319f9f44678905ac1a9ac989951 Author: Paulo Zanoni Date: Wed Aug 12 16:49:11 2015 -0300 kms_frontbuffer_tracking: don't test CUR or SPR planes on FBS_SHARED We already tested these planes for FBS_INDIVIDUAL, and there are no reasons to believe those planes will behave differently under FBS_SHARED, so save some time avoiding potentially useless tests. This makes "--no-edp --fbc-only --1p-only" go from 2m49s to 2m29s on my machine. Signed-off-by: Paulo Zanoni commit 59cdc16b1a6f069f944ff17851a59edf8f72d45d Author: Arun Siluvery Date: Fri Jul 31 16:27:07 2015 +0100 tools/null_state/gen9: Send atleast one valid component in VF state A programming restriction exists for this instruction, atleast one component of one valid vertex element must be enabled. Cc: Ben Widawsky Cc: Chris Wilson Signed-off-by: Arun Siluvery Reviewed-by: Ben Widawsky Signed-off-by: Mika Kuoppala commit dd82494724c1c11ceeeaac66a2ed0113ec13f8e4 Author: Arun Siluvery Date: Wed Aug 12 12:26:01 2015 +0100 lib/rendercopy_gen9: Setup Push constant pointer before sending BTP commands From Gen9, by default push constant command is not committed to the shader unit untill the corresponding shader's BTP_* command is parsed. This is the behaviour when set shader is enabled. This patch updates the batch to follow this requirement otherwise it results in gpu hang. Set shader need to be disabled if legacy behaviour is required. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89959 Cc: Ben Widawsky Cc: Joonas Lahtinen Cc: Mika Kuoppala Signed-off-by: Arun Siluvery Tested-by: Mika Kuoppala Reviewed-by: Joonas Lahtinen Signed-off-by: Mika Kuoppala commit 8a68ec14536c802b2d869f2356d978346bf234f4 Author: Mika Kuoppala Date: Tue Aug 11 15:25:37 2015 +0300 lib/rendercopy_gen9: WaBindlessSurfaceStateModifyEnable Don't set the size of bindless surface state on rendercopy. And as of doing so, take into account the workaround for setting the command size. This was tried during hunting for https://bugs.freedesktop.org/show_bug.cgi?id=89959. But no impact was found. Cc: Arun Siluvery Reviewed-by: Arun Siluvery Signed-off-by: Mika Kuoppala commit d524a964fc88ec52002609d15cb8ccfc50cbc18a Author: Derek Morton Date: Thu Aug 13 11:27:35 2015 +0100 benckmarks/Android.mk: Fix building benchmarks for Android The commit "benchmarks: Do not install to system-wide bin/" changed the benchmark file list from bin_PROGRAMS to benchmarks_PROGRAMS. However Android.mk was not updated, resulting in IGT failing to build for Android. This commit adds that change. It also adds LOCAL_MODULE_PATH to specify where the built benchmarks should be put. v2: I discovered that the existing definitions of LOCAL_MODULE_PATH were creating what should have been an invalid path. Not sure how it was ever working previously, but fixed now. Signed-off-by: Derek Morton Signed-off-by: Thomas Wood commit 33bc41aa4108a0177372004d0b8f689e22bbd5ff Author: Kristian Høgsberg Kristensen Date: Mon Aug 10 15:40:04 2015 -0700 aubdump: Write header after figuring out the gen We have to defer figuring out the gen until we have a PCI ID, which we don't have for sure until the first execbuffer2 ioctl. We can't write the file header until we have the gen since we need to know the size of offsets in the file format. Move the call to write_header() into the dump_execbuffer2() where we have the gen. Signed-off-by: Kristian Høgsberg Kristensen commit 3156305aceb790d410580ea44f145119359292e6 Author: Kristian Høgsberg Kristensen Date: Mon Aug 10 15:37:47 2015 -0700 aubdump: Handle 48 bit ppgtt dumping Put 48 bit block offsets in the AUB file and track the bo offsets with uint64_t. Signed-off-by: Kristian Høgsberg Kristensen commit 8a7c386f0a302be1c099804ab67f32c6965d3c7d Author: Thomas Wood Date: Wed Aug 12 16:33:09 2015 +0100 tests: update .gitignore Add missing entry to .gitignore and sort alphabetically. Signed-off-by: Thomas Wood commit a149fb238a38bd663171a19c8b3a536fbae158db Author: Ville Syrjälä Date: Tue Aug 11 19:11:12 2015 +0300 tests/gem_pwrite_snooped: Verify set_caching vs. pwrite clflush behaviour The test does the following 1. set_domain src GTT 2. set_caching src NONE 3. pwrite src 4. set_caching src CACHED 5. blt src->dst 6. pread dst 7. verify data matches Signed-off-by: Ville Syrjälä commit 62426feec5343603ee67dd296674edda1871a7fb Author: Ville Syrjälä Date: Tue Jul 21 13:56:20 2015 +0300 tests/kms_pwrite_crc: Use drmModeSetPlane() instead of igt_plane_set_fb() igt_plane_set_fb()+igt_display_commit() have too much overhead, and that causes the cache to get flushed before we flip, making the test useless, at least on machines with small LLC. Switch to drmModeSetPlane() to reduce the chance that the cache gets flushed before we grab the crc. Still nowhere near 100% reliable on my IVB laptop with 3 MiB LLC, but at least it can now hit the problem occasioanally. My desktop IVB with 8 MiB LLC seems to hit it rather reliably. Signed-off-by: Ville Syrjälä commit adfc294384d2ee20d085e98f249fe73d1f4c4055 Author: Daniel Vetter Date: Fri Aug 7 19:27:30 2015 +0200 tests: Document ABI extension catchers Our invalid-flags/params testcases are meant to catch abi extensions by just testing for the next available flag/param. Unfortunately we need that since without those we forgot to write testcases for these new flags way too often :( But it's not entirely clear why this is, so document this trick with comments. Also gem_wait wasn't this paranoid, so change the testcase to be so. Signed-off-by: Daniel Vetter commit 5b0a8433fd0ff35062f0b1d3f50f5e04e76b576b Author: Daniel Vetter Date: Fri Aug 7 19:12:07 2015 +0200 lib/core: Add igt_reset_timeout Convenience wrapper suggested by Chris for igt_set_timeout(0, NULL). v2: While at it add an empty line in kms_flip to make set/reset_timeout a visual block. Cc: Chris Wilson Signed-off-by: Daniel Vetter commit 370c9897230b4d4973d0a2ab641901081108d97b Author: Daniel Vetter Date: Fri Aug 7 19:01:23 2015 +0200 lib/core: Add optional reason for timeout failure "Timed out" isn't a terribly informative message, allow users to set something more informative. Inspired by a request from Jesse. Cc: Jesse Barnes Reviewed-by: Jesse Barnes Signed-off-by: Daniel Vetter commit 24617ef82a4c58766675b3f1e4c194ca37fe9744 Author: David Weinehall Date: Fri Aug 7 15:53:57 2015 +0300 tests/gem_ctx_param_basic: support NO_ZEROMAP Signed-off-by: David Weinehall Signed-off-by: Daniel Vetter commit 38b3bd6b7c09cdd8041e6b775933f69e0141efd3 Author: Chris Wilson Date: Tue Aug 11 12:57:38 2015 +0100 benchmarks: Add a microbenchmark for relocation overhead Allow specification of the many different busyness modes and relocation interfaces, along with the number of buffers to use and relocations. Signed-off-by: Chris Wilson commit 98bcc18572f914b27cda07fc1ceae5b48a74fe51 Author: Chris Wilson Date: Mon Aug 10 18:51:03 2015 +0100 benchmarks/gem_exec_trace: Unmap each trace after replay Just on the off chance someone is replaying a bunch of traces, remember to cleanup up. Signed-off-by: Chris Wilson commit b483e68173465408649e11122ee78060af9394f7 Author: Chris Wilson Date: Mon Aug 10 18:45:00 2015 +0100 benchmarks/gem_exec_trace: Mark the mmap as sequentially read Use madvise(MADV_SEQUENTIAL) to let the kernel optimise for our straightforward sequential read pattern. Signed-off-by: Chris Wilson commit 3911621d0d23aced7feb1569b39f7fb52b309681 Author: Chris Wilson Date: Mon Aug 10 18:17:47 2015 +0100 benchmarks: Rename the gem_exec_trace tracer module Now that we actually install the benchmarks into a sane location, slightly abuse it to put the tracer for gem_exec_trace alongside. Signed-off-by: Chris Wilson commit d9462e61f9b43828d6132679485a92108b60b2c8 Author: Chris Wilson Date: Mon Aug 10 16:08:31 2015 +0100 benchmarks/gem_exec_trace: Clear all new bo handles When reallocing the bo array, remember to set the new entries to 0. Signed-off-by: Chris Wilson commit 4c74a683c10ddfb2232cdb93f03c03295dde1201 Author: Chris Wilson Date: Fri Jul 24 14:13:49 2015 +0100 benchmarks: Do not install to system-wide bin/ These benchmarks are first-and-foremost development tools, not aimed at general users. As such they should not be installed into the system-wide bin/ directory, but installed into libexec/. v2: Now actually install beneath ${libexec} Signed-off-by: Chris Wilson commit 0393e7288ba3a640fcc9f0d8b15d7dee231a039c Author: Chris Wilson Date: Sun Aug 9 17:39:41 2015 +0100 benchmarks: Record and replay calls to EXECBUFFER2 This slightly idealises the behaviour of clients with the aim of measuring the kernel overhead of different workloads. This test focuses on the cost of relocating batchbuffers. A trace file is generated with an LD_PRELOAD intercept around execbuffer, which we can then replay at our leisure. The replay replaces the real buffers with a set of empty ones so the only thing that the kernel has to do is parse the relocations. but without a real workload we lose the impact of having to rewrite active buffers. Signed-off-by: Chris Wilson commit 74a806808618dad614d7ffb61d4562915695bbf8 Author: Chris Wilson Date: Sat Aug 8 21:31:08 2015 +0100 overlay: Handle execlists not setting the rings as active Signed-off-by: Chris Wilson commit 06aed34d384fc348c4bb52f302bbcf2c6c68bb3c Author: Chris Wilson Date: Sat Aug 8 20:54:49 2015 +0100 overlay: Add Broadwell+ ids from kernel i915_pciids.h commit 9c15167c611bbac1e702eb064044ec687bfa3703 Author: Kristian Høgsberg Date: Fri Aug 7 14:57:19 2015 -0700 tools/aubdump: Get PCI ID from getparam ioctl when we can Instead of doing an extra getparam ioctl to discover the PCI ID, we can snoop it when the application queries it. Signed-off-by: Kristian Høgsberg commit 5f4fad31829b1c6dfcddb633d65e9e7066818cff Author: Kristian Høgsberg Date: Fri Aug 7 14:51:27 2015 -0700 tools/aubdump: Don't rely on open for discovering the drm fd DRI3 passes the drm fd over X protocol and as such we can't rely on hooking open to discover the drm fd. Instead we look for drm ioctl codes in the ioctl wrapper. If we don't have a drm fd and see something that looks like a drm ioctl, we stat the fd to see if it's a drm fd. If it is, we save it for later so we don't have to do an extra stat on every ioctl. We can then drop the open wrapper, but we keep the close wrapper so we can invalidate our cached drm_fd if it's closed. Signed-off-by: Kristian Høgsberg commit db0f28aee8b7f95a10139993096d60ba2a89c6a5 Author: Jesse Barnes Date: Thu Aug 6 14:35:34 2015 -0700 Revert "tests/gem_ctx_param_basic: fix invalid params" This reverts commit 0b45b0746f45deea11670a8b2c949776bbbef55c. We want to check against our local copy of the params so we can at least potentially catch new flag additions. Requested-by: Daniel Vetter Signed-off-by: Jesse Barnes commit 0b45b0746f45deea11670a8b2c949776bbbef55c Author: Jesse Barnes Date: Thu Aug 6 13:12:46 2015 -0700 tests/gem_ctx_param_basic: fix invalid params Use -1 as the invalid param since we've added more since this test was created, causing expected EINVAL failures to return an unexpected error code. Signed-off-by: Jesse Barnes commit 1ae1d290bf0b0c0f6a1e8f81d47c2a4f5a51714a Author: Derek Morton Date: Mon Jul 27 11:30:58 2015 +0100 benchmarks/Android.mk, tools/Android.mk: Fix android build error Recently added tools / benckmarks have the same module name as existing tests. Android does not allow duplicate modules. This patch appends _benchmark and _tool to the module names used when building benckmarks and tools to prevent clashes with tests of the same name. Signed-off-by: Derek Morton Signed-off-by: Daniel Vetter commit 995f2738adece4f7423f9ce9ac34ab0477844840 Author: Paulo Zanoni Date: Mon Jul 13 14:04:25 2015 -0300 lib: add igt_debugfs_read() A helpful function for when you want to read a whole debugfs file to a string and don't want to worry about opening and closing file descriptors and asserting buffer sizes. We've been using this already for kms_frontbuffer_tracking and kms_fbcon_fbt, so the only test with new code here is kms_fbc_crc. Also notice that for kms_fbc_crc we had to increase the buffer size since the file can sometimes be bigger than 64 bytes - depending on the reason why FBC is disabled. Of course, there are probably many other programs we can patch, but I'm not doing this now. v2: Add the macro to wrap sizeof() (Daniel). v3: Add documentation for the macro too (Daniel). Signed-off-by: Paulo Zanoni commit ffd7321c701411c6ffb4aa5b983aacb92289908c Author: Paulo Zanoni Date: Wed Jul 8 16:00:45 2015 -0300 kms_frontbuffer_tracking: use the dirty ioctl after MMAP_WC calls We can't add this to igt_draw since igt_draw doesn't care whether it's writing on a frontbuffer or not. PS: the ENOSYS is for Kernels without the patch implementing the IOCTL. Signed-off-by: Paulo Zanoni commit cd33b47a47251eadd21815bfd2ecc8529c7bcf6d Author: Paulo Zanoni Date: Tue Aug 4 16:25:17 2015 -0300 tests/gem_mmap_wc: don't fail if the Kernel is too old for the getparam flag Just don't check the drmIoctl() return code: the "if (val)" should be enough to prevent any problems. v2: Don't SKIP, just proceed (Chris). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89739 Cc: Chris Wilson Reviewed-by: Chris Wilson Signed-off-by: Paulo Zanoni commit 5f9bc98a55d8077f1b42e953d573c4e655832bfa Author: Kristian Høgsberg Kristensen Date: Wed Aug 5 11:55:09 2015 -0700 configure.ac: Fix chmod on intel_aubdump the right way autoconf executes the init commands after each file it creates, causing these errors at configure time: ... chmod: cannot access 'tools/intel_aubdump': No such file or directory config.status: creating tools/Makefile chmod: cannot access 'tools/intel_aubdump': No such file or directory config.status: creating tools/intel_aubdump config.status: creating tools/quick_dump/Makefile ... Once it creates intel_aubdump, the errors go away. When I first added the chmod command, I already had a tools/intel_aubdump in my tree and didn't get the error. Split the intel_aubdump creation into its own AC_CONFIG_FILES() invocation to avoid this. Signed-off-by: Kristian Høgsberg Kristensen commit 78e2a2f245fa66773f34ea68bdbcc2c62d382a9b Author: Kristian Høgsberg Kristensen Date: Wed Aug 5 11:53:17 2015 -0700 tools: Use right #include path for i915_drm.h pkg-config adds /usr/include/libdrm to the include path so we only need i915_drm.h Signed-off-by: Kristian Høgsberg Kristensen commit 86de4c60f38b0ff180cbaa64fcf992fc49546099 Author: Kristian Høgsberg Kristensen Date: Tue Aug 4 15:11:51 2015 -0700 configure.ac: Fix the intel_aubdump chmod to use topbuilddir Signed-off-by: Kristian Høgsberg Kristensen commit 220c7d1f91e590be74866710d786833938c18c40 Author: Kristian Høgsberg Kristensen Date: Tue Aug 4 15:00:50 2015 -0700 tools/aubdump: Add --device option for overriding device ID This lets us capture AUB traces for platforms different from the one we're running on. Signed-off-by: Kristian Høgsberg Kristensen commit f47bdba8b0504661b5d291a8639f156cda993379 Author: Kristian Høgsberg Kristensen Date: Tue Aug 4 09:36:53 2015 -0700 tools/aubdump.c: Also define struct drm_i915_gem_userptr for compatibility Oops, we obviously also need to define the argument struct for userptr. Signed-off-by: Kristian Høgsberg Kristensen commit e4fa17df026d6b5d68ee221d177049cdd1ad6924 Author: Kristian Høgsberg Kristensen Date: Fri Jul 31 14:26:15 2015 -0700 tools/aubdump: #define DRM_IOCTL_I915_GEM_USERPTR if kernel headers don't Fix compile error on older kernels. Signed-off-by: Kristian Høgsberg Kristensen commit 0b5faefba35ab05bfe637964e0e8fb1075e3dd0a Author: Kristian Høgsberg Kristensen Date: Fri Jul 31 13:44:07 2015 -0700 tools: Add man page for intel_aubdump Signed-off-by: Kristian Høgsberg Kristensen commit e6a5d799fcdba567535a434789e107164072c15b Author: Kristian Høgsberg Kristensen Date: Wed Jul 29 23:12:16 2015 -0700 tools: Add LD_PRELOAD-based AUB dumper tool This does everything the aub dump functionality in libdrm does, but without being part of libdrm. This moves the very developer oriented functionality out of core libdrm and adds some flexibility in how we activate it (we can specify filename, for example). Most importantly, this lets us dump aub files for tools and/or drivers that don't use libdrm, without having to add that code to each of those projects. The tool is used much like strace or valgrind. For example: $ intel_aubdump -v --output=stuff.aub -- glxgears -geometry 500x500 will launch glxgears with its options and enable aub dumping and pass the -v and --output=stuff.aub options to the aub dumper. Signed-off-by: Kristian Høgsberg Kristensen commit 6bd42ce9c74f2b6d27b0263191295de232050ab5 Author: Daniel Vetter Date: Wed May 20 16:50:14 2015 +0200 tests/kms_addfb: Add testcass for garbage in unused planes Signed-off-by: Daniel Vetter commit 0591af9c76f21b1d9afd067adc6946799fc29179 Author: Chris Wilson Date: Tue Jul 28 20:02:54 2015 +0100 igt/gem_streaming_writes: Reorder setting EXEC_OBJECT_WRITE Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90944 Signed-off-by: Chris Wilson commit 40ebf95163dcb233b556bb97e9864497623d7328 Author: Chris Wilson Date: Tue Jul 28 18:59:47 2015 +0100 igt/gem_streaming_writes: Bind into the GTT early If we are using a streaming GGTT write into the source, we need to trigger an early fault in order to obtain a mappable offset. This is required when later we start reserving execbuf object top-down to try and avoid mappable space! Signed-off-by: Chris Wilson commit cd306d4e650d5280a40b15fe076f41eba081c0a0 Author: Chris Wilson Date: Fri Jul 24 18:54:11 2015 +0100 benchmark: Measure allocation time for objects A basic measurement, how fast can we create and populate an object with backing storage? Signed-off-by: Chris Wilson commit 42a386b83bf6693826432111fc7564254c14df95 Author: Chris Wilson Date: Fri Jul 24 16:34:26 2015 +0100 benchmarks: Measure mmap fault latency Signed-off-by: Chris Wilson commit e984d4965fa98b3071893143c65e6232ff4053ec Author: Chris Wilson Date: Wed Jul 22 15:01:47 2015 +0100 benchmarks: Benchmarkify gem_exec_ctx Measure the overhead of execution when doing nothing, switching between a pair of contexts, or creating a new context every time. Signed-off-by: Chris Wilson commit d49a868378f88685aadc601f9d5a9ae435565ece Author: Michał Winiarski Date: Fri Jul 24 16:43:33 2015 +0200 tests/drm_import_export: Add tests for prime/flink sharing races It is possible to race between unreference of the underlying BO and importing it from prime_fd/name. Verify that the behaviour of libdrm is consistent for prime/flink. v2: more comments in source file, dropped extra whitespace Signed-off-by: Michał Winiarski Cc: Thomas Wood Signed-off-by: Thomas Wood commit e14507ce987a0cfb0ba9dec39afcb08a9ebc0453 Author: Chris Wilson Date: Fri Jul 24 14:15:49 2015 +0100 benchmarks: Add kms_vblank to .gitignore Signed-off-by: Chris Wilson commit d88981f62bdcaafeb393bac22db6719d43de88c7 Author: Chris Wilson Date: Thu Jul 23 15:18:22 2015 +0100 benchmarks: Measure round-trip time for an immediate vblanks By measuring both the query and the event round trip time, we can make a reasonable estimate of how long it takes for the query to send the vblank following an interrupt. Signed-off-by: Chris Wilson commit af510c249d6d374267a2052da202ea7c3a6b20cf Author: Chris Wilson Date: Thu Jul 23 12:27:38 2015 +0100 benchmarks: gem_prw add the read/write switch to getopt In my haste to merge the two gem_pread/gem_pwrite, I forgot to write up the command line switch to getopt. Signed-off-by: Chris Wilson commit f8628a2c9808fe191c98111a1d58d728f8d20e90 Author: Chris Wilson Date: Wed Jul 22 16:53:34 2015 +0100 benchmarks: Add simple mmap benchmarks Signed-off-by: Chris Wilson commit f689e2aa813340eb499ffe04369647044887c073 Author: Chris Wilson Date: Wed Jul 22 16:53:34 2015 +0100 benchmarks: Add simple pread/pwrite benchmarks Signed-off-by: Chris Wilson commit b7c33e09394d8d59eac3d0fc581f7190e031947d Author: Chris Wilson Date: Wed Jul 22 15:01:47 2015 +0100 benchmarks: Benchmarkify gem_exec_nop Signed-off-by: Chris Wilson commit a64cf28719a0d23d611c72a0a7cf369562330de9 Author: Thomas Wood Date: Mon Jul 20 18:08:29 2015 +0100 man: ensure rst files are included in the distribution tarball Signed-off-by: Thomas Wood commit 367691297072d56f497a9b9f9c486c79bb5ecb16 Author: Dominik Zeromski Date: Fri Jul 17 11:25:45 2015 +0200 lib/gpgpu_fill: Add SKL support SKL changed state base address command. Cc: Thomas Wood Signed-off-by: Dominik Zeromski Signed-off-by: Thomas Wood commit a017c2905a615d514ae38c8c624d70ef0b11be91 Author: Dominik Zeromski Date: Fri Jul 17 11:25:44 2015 +0200 lib/gpgpu_fill: Add BDW support BDW changed structure of surface state and interface descriptors. Commands like state base address, gpgpu walker were extended. Cc: Thomas Wood Signed-off-by: Dominik Zeromski Signed-off-by: Thomas Wood commit ed816d560ce5a1d80a005a452ee0e4295ac1698f Author: Dominik Zeromski Date: Fri Jul 17 11:25:43 2015 +0200 lib: Move gpgpu_fill code to separate file The gpgpu fill utility functions are used in separate test so it's logical to keep them in separate file. This is similar to what media spin test did in the past. Functionally only gpgpu kernel changed. Send instruction payload size was reduced. Since offset is incremented by 0x10 bytes there is no point in using larger writes. Cc: Thomas Wood Signed-off-by: Dominik Zeromski [Thomas: Fix typo of gpgpu_fill.h in Makefile.sources] Signed-off-by: Thomas Wood commit 3c294a8fa3a3692bab5abe579375edf96ee3b081 Author: Derek Morton Date: Fri Jul 17 10:15:39 2015 +0100 Android.mk: Disable tools that do not build for android Disable the tools / demo code that do not currently build for android until they can be fixed. Affected tools / demos intel_display_crc intel_sprite_on v2: intel_display_crc compiled conditionally on ANDROID_HAS_CAIRO flag. v3: removed intel_reg from the skip list as Thomas has prepared a patch to fix it for Android. Signed-off-by: Derek Morton Signed-off-by: Thomas Wood commit e65c69b995590ccd7f209b1e516819b1248d4e38 Author: Thomas Wood Date: Thu Jul 16 17:39:59 2015 +0100 lib: exit immediately if igt_fail is called in an exit handler Exit immediately if the test is already exiting and igt_fail is called. This can happen if an igt_assert fails in an exit handler. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91349 Signed-off-by: Thomas Wood commit 51576b7ad67074bbee6da0e0ff96d783dbd4ea3f Author: Thomas Wood Date: Thu Jul 16 11:53:11 2015 +0100 tools/Android.mk: add any extra program sources v2: remove unintended change and fix source file duplication errors (Derek Morton) Cc: Derek Morton Signed-off-by: Thomas Wood commit 80f1553780d0d167cca8bd456a7deb3ff5d9e58e Author: Thomas Wood Date: Thu Jul 16 11:41:32 2015 +0100 intel_reg: support platforms without sys/io.h Based on an idea from Jani Nikula. Cc: Jani Nikula Cc: Derek Morton Signed-off-by: Thomas Wood commit 0705ce6d15320a153c137b4a2119496a7f9c49f1 Author: Chris Wilson Date: Sun Jul 19 18:08:20 2015 +0100 igt/stats: Fixup tests to compile after interface changes Signed-off-by: Chris Wilson commit d9c3f0b50cd4f27191a721fe64f47fdc0754f9ef Author: Chris Wilson Date: Sun Jul 19 12:44:59 2015 +0100 tools: Add a simple stats generator 'igt_stats' A rudimentary tool on top of the igt_stats library. Reads a list of numbers from stdin or from a file and prints the estimate of the central location, aka average. Signed-off-by: Chris Wilson commit 8506cdcaa59ba90fcccda762d9307528d9f4c5c7 Author: Chris Wilson Date: Sun Jul 19 15:01:42 2015 +0100 lib: Allow storing floating point values in igt_stats We don't always have precise integers with which to store, so allow degrading to double precision floating point based on available input. Signed-off-by: Chris Wilson commit fdefdd48f61b39d2af825ccdba11fafcaf58031a Author: Michał Winiarski Date: Thu Jul 16 13:19:09 2015 +0200 tests/gem_reg_read: Extend and check for valid 36b counter When reading the timestamp register with single 64b read, we are observing invalid values on x86_64: [f = valid counter value | X = garbage] i386: 0x0000000fffffffff x86_64: 0xffffffffXXXXXXXX Test checks if the counter is moving and increasing. Add a check to see if we can use (reg | 1) flag to get a proper 36b timestamp, shifting the value on x86_64 if we can't. v2: More iterations of monotonic test, comments, minor fixups (Chris) v3: Skip tests if reg_read is not supported Cc: Chris Wilson Reviewed-by: Chris Wilson Signed-off-by: Michał Winiarski Signed-off-by: Damien Lespiau commit 32c898849bd4f087e5b816b6e9e842edd5ce81d6 Author: Chris Wilson Date: Wed Jul 15 16:18:10 2015 +0100 igt/gem_eio: Waiting on a hung batch should report -EIO If we are waiting on a handle, and its request is cancelled due to a hang, we should report that explicitly through the ABI. Signed-off-by: Chris Wilson commit 7f952bd976416196f628c42a8d7bf77fe3c1540f Author: Paulo Zanoni Date: Mon Jul 13 14:09:30 2015 -0300 kms_frontbuffer_tracking: don't keep debugfs open Make the code smaller and simpler, also ready for when we move debugfs_read() to lib/. Signed-off-by: Paulo Zanoni commit 1048aa9aa5a9f095800ba41318af9ea351e943e9 Author: Paulo Zanoni Date: Thu Jul 9 13:32:16 2015 -0300 tests: add kms_fbcon_fbt This test should test the interactions between fbcon and the frontbuffer tracking infrastructure. Right now the PSR test fails, but as soon as we merge the following kernel patches, the test wills tart passing: - drm/i915: PSR: Flush means invalidate + flush - drm/i915: fbdev restore mode needs to invalidate frontbuffer - drm/i915: fbdev_set_par reliably invalidating frontbuffer I didn't want to make this a subtest of kms_frontbuffer_tracking just because when I wrote it, I really didn't have in mind the fact that someone might just close the DRM fd in the middle of a subtest. After this commit we'll have a little bit of duplicated code among tests. I'll clean this up later. v2: - Refactor the code a little bit. - Add the suspend subtests. Signed-off-by: Paulo Zanoni commit 7c5a218cc31e95f5b8b74dba80488ca37b9d85fd Author: Paulo Zanoni Date: Mon Jul 13 17:30:43 2015 -0300 kms_frontbuffer_tracking: implement suspend subtest Make sure we survive suspend/resume. Signed-off-by: Paulo Zanoni commit 1c389f69f0b188edd47eca1901f62ba36a59f37f Author: Paulo Zanoni Date: Mon Jul 13 17:08:17 2015 -0300 kms_frontbuffer_tracking: allow passing a NULL pattern So we don't need to initialize CRCs we won't use. This makes the modesetfrombusy and badstride tests a little faster. Signed-off-by: Paulo Zanoni commit 91f097aefa29ff0d6b0b97f204f2bd1e3e5f0c3d Author: Paulo Zanoni Date: Mon Jul 13 16:56:06 2015 -0300 kms_frontbuffer_tracking: simplify subtest enumeration Just a small bikeshed. Signed-off-by: Paulo Zanoni commit 04d1311fc3d2127d609b5c5e670bf9887652cb17 Author: Paulo Zanoni Date: Mon Jul 13 16:08:36 2015 -0300 kms_frontbuffer_tracking: add farfromfence subtest Make sure we notice in case our crtc->y handling is still wrong. Signed-off-by: Paulo Zanoni commit cb3861a9e3f1bc12765160345bb0dd1d543f5086 Author: Paulo Zanoni Date: Fri Jul 10 17:53:25 2015 -0300 kms_frontbuffer_tracking: implement badstride test Test strides that are either completely invalid or just result in disabled FBC. Signed-off-by: Paulo Zanoni commit 4deb562659edc1b4d53024b6ef6e183b4f94f768 Author: Paulo Zanoni Date: Tue Jul 14 12:45:04 2015 -0300 configure: require libdrm >= 2.4.55 And drop the now unnecessary universal plane definitions. The 2.4.55 version is already quite old, so we should be fine. Thanks to Thomas Wood for quickly spotting this. Signed-off-by: Paulo Zanoni commit 19e4632407cfe9fdfe5e067dfaaeaef4d5bf669f Author: Paulo Zanoni Date: Mon Jul 13 16:14:55 2015 -0300 kms_frontbuffer_tracking: only force std_1024_mode on HSW Since on BDW the big modes work fine, I want to test them without having to recompile the test every time. Let's make std_1024_mode part of opt.small_modes. Signed-off-by: Paulo Zanoni commit a7cfd224ba9b2c6735875e27f480b6bbd40ae4d9 Author: Paulo Zanoni Date: Mon Jul 13 11:08:02 2015 -0300 kms_frontbuffer_tracking: remove enum feature_status After the last commit, it's not really needed anymore, so let's get rid of it: less code lines and less non-standard enums. Signed-off-by: Paulo Zanoni commit 775fd7771565c7820eeb2406d12bec3ddbfe252d Author: Paulo Zanoni Date: Fri Jul 10 17:55:42 2015 -0300 kms_frontbuffer_tracking: improve checks for disabled features Make sure the features are disabled and stay disabled. Otherwise we could just wrongly think they are disabled while they are just in the process of being enabled. Signed-off-by: Paulo Zanoni commit ca97e784558d48915e3d9056b98c028d46e0c799 Author: Paulo Zanoni Date: Fri Jul 10 17:20:23 2015 -0300 kms_frontbuffer_tracking: rename enum fbs I tried explaining these to people twice and realized how bad the current naming was. Let's hope the new one is better. The downside is that the tests were renamed and patches mentioning them can't be fixed. Signed-off-by: Paulo Zanoni commit b0427442f90a82707cd2ffe0ee94ed73549d9ffe Author: Paulo Zanoni Date: Fri Jul 10 12:50:27 2015 -0300 kms_frontbuffer_tracking: add different ways to flip So we can make sure all code paths are properly exercised and lead to proper frontbuffer tracking. Signed-off-by: Paulo Zanoni commit a1d4b553a75a70baad2b08cf53ef62fd65ea4856 Author: Paulo Zanoni Date: Fri Jul 10 15:25:47 2015 -0300 kms_frontbuffer_tracking: fix fullscreen subtest assertions Only really assert FBC_DISABLED in case the primary plane is actually disabled. If the sprite plane is covering the whole screen but the primary plane is still enabled, FBC can remain enabled. Signed-off-by: Paulo Zanoni commit 344dab22e994ab1d5ccf6241d6bf099eeeeaf8cf Author: Paulo Zanoni Date: Fri Jul 10 15:54:34 2015 -0300 kms_frontbuffer_tracking: avoid huge strides during normal operation We want to restrict huge strides to the yet-to-be-implemented stride-size-specific subtest. Signed-off-by: Paulo Zanoni commit c2d656c5d67909537e61cd6e940038e91f558ac2 Author: Paulo Zanoni Date: Wed Jul 8 15:49:09 2015 -0300 kms_frontbuffer_tracking: don't hardcode the X/Y big FB offset While debugging the test failures I tried different values for the offsets, so having a central place to change them is the only sane way. Signed-off-by: Paulo Zanoni commit 9ca8a1bade2a4d267857ecb5f107f207a6ca3107 Author: Paulo Zanoni Date: Mon Jul 13 14:13:46 2015 -0300 pm_rpm: remove pm_status_fd declaration This was forgotten since we moved some code to igt_aux.c a long time ago. Signed-off-by: Paulo Zanoni commit b81f7db593a74daeb8c8e4216743fa985a7c03de Author: Matt Roper Date: Wed Jul 1 15:45:21 2015 -0700 kms_universal_plane.c: Update sanity checks for gen9 SKL and BXT have some new plane capabilities that previous generations didn't have; we need to update some of our universal plane tests to expect success rather than failure when running on these platforms. Signed-off-by: Matt Roper commit 8ad1e4077879a111f341dbfd2e0fee84efc9f57e Author: Abdiel Janulgue Date: Tue Jun 16 13:37:44 2015 +0300 tests/gem_exec_params: check invalid flags for Resource Streamer Make sure resource streamer flags works only in correct ring in addition to checking next flag after the RS boundary fails. v2: Make sure we reject RS on pre-hsw. v3: Don't skip 1<<15 for the exec flags (Jani Nikula) Cc: Daniel Vetter Signed-off-by: Abdiel Janulgue Signed-off-by: Thomas Wood commit ec9e5996d1c54d71c1c9cd14755ec6eddfdb0680 Author: Damien Lespiau Date: Thu Jul 2 14:59:25 2015 +0100 build: Don't use automake's conditional in a Makefile.sources I just remembered that those Makefile.sources files where also included by the Android build system, so we can't use automake's conditionals in there. So, we want to use GNU make's one. Unfortunately, after all those years, GNU automake still doesn't do anything useful with GNU make's ifeq: lib/Makefile.sources:66: error: else without if automake will helpfully signal that the 'else' corresponding to the 'ifeq' doesn't have a corresponding 'if'. Well, yeah, thanks. Fortunately, we can work around this by cunningly inserting a space before 'ifeq', 'else' and 'endif' and fool automake's regex-based checks. Signed-off-by: Damien Lespiau commit 64295c67e908d59606fafe35e2d2363802c7faec Author: Damien Lespiau Date: Thu Jul 2 11:24:02 2015 +0100 build: Add -lm to tests Since the introduction of igt_stats and its usage in gem_exec_nop, we need to link the tests against libm. My rebasing bot complained when linking gem_exec_nop: lib/igt_stats.c:492: undefined reference to `sqrt' Signed-off-by: Damien Lespiau commit e5653d5f1d1b349ec320b056d3e6e17008c256a7 Author: Damien Lespiau Date: Wed Jul 1 23:40:36 2015 +0100 build: Add an option to not use the git hash in version When developing, it's quite annoying that the version changes every commit, causing the library to be rebuild and every single binary re-linked. Add a config option to skip that. I remember Ville asking for this "feature" as well. v2: Option is now called --disable-git-hash (Thomas) Various spelling mistakes (Thomas) Cc: Ville Syrjälä Signed-off-by: Damien Lespiau commit 0a01a190f6f7b2256d6efdd49018f43023f389dd Author: Damien Lespiau Date: Wed Jul 1 23:02:31 2015 +0100 build: Add DEBUG_FLAGS to tools and self-tests Makes using GDB better on those binaries. Signed-off-by: Damien Lespiau commit 390653acfb47664ffebe07a6928fa6b0fc18f4e8 Author: Damien Lespiau Date: Tue Jun 30 00:15:15 2015 +0100 aux: Don't evaluate several times the arguments of min() and max() Signed-off-by: Damien Lespiau commit 643aab2249992f4c4ad75e98ef3d43f3c6700895 Author: Damien Lespiau Date: Thu Jul 2 00:16:07 2015 +0100 stats: Add wikipedia links to get_trimean() and get_iqm() Useful knowledge for anyone looking at the documentation and following the linkes. Signed-off-by: Damien Lespiau commit d01ebbd97ddb323564c75bfaaa374011fde4cd38 Author: Thomas Wood Date: Mon Jun 29 16:47:14 2015 +0100 docs: various documentation fixes Signed-off-by: Thomas Wood commit 8a109f94b9205222f79f20350750b39dd4b068cd Author: Thomas Wood Date: Mon Jun 29 14:42:52 2015 +0100 docs: fix duplicated ID error Signed-off-by: Thomas Wood commit 85f6d82d3ccde981382b784b67a5cc2b19dfa4bb Author: Thomas Wood Date: Mon Jun 29 14:37:13 2015 +0100 docs: fix "no link" warning igt_save_module_param is an internal static function and therefore isn't included in the public API documentation. Signed-off-by: Thomas Wood commit f01e0552d6b94d7eb2d87e388ba5be596234886c Author: Thomas Wood Date: Mon Jun 29 14:31:06 2015 +0100 docs: add the annotation glossary Signed-off-by: Thomas Wood commit 5d80872009d4f3509e7e2b7a236b27d5002aff15 Author: Thomas Wood Date: Mon Jun 29 11:03:39 2015 +0100 docs: override section id to avoid '/' in filenames The section id is generated from the section title and is used to create the html output filename, which therefore causes problems if it includes a '/' character. Cc: Damien Lespiau Signed-off-by: Thomas Wood commit 614895fec12a66376167c23294157a8f69014e54 Author: Chris Wilson Date: Wed Jul 1 20:51:54 2015 +0100 igt/gem_exec_nop: Control boost/idle frequencies Signed-off-by: Chris Wilson commit b43070987e8b926e7b487e7717e8b58197fd03cf Author: Chris Wilson Date: Wed Jul 1 13:53:07 2015 +0100 igt/gem_exec_nop: Wait between runs In order to keep the GPU in a consistent state between samples, we have to wait for it to fall asleep before proceeding. For fun hook up igt_stats. Signed-off-by: Chris Wilson commit 2d305f61995cc896aaa1d3be01c33d90515c22e0 Author: Chris Wilson Date: Wed Jul 1 18:52:46 2015 +0100 stats: Add trimean https://en.wikipedia.org/wiki/Trimean The trimean is a the most efficient 3-point L-estimator (estimator of central tendency, i.e. average), even more robust than the median at estimating the average of a sample population. Signed-off-by: Chris Wilson commit 19135a34471ec4da4d7cc8493c371b8c38879f0b Author: Chris Wilson Date: Wed Jul 1 13:50:02 2015 +0100 stats: Add the interquartile mean (IQM) https://en.wikipedia.org/wiki/Interquartile_mean The IQM is a truncated mean and so is very similar to the scoring method used in sports that are evaluated by a panel of judges: discard the lowest and the highest scores; calculate the mean value of the remaining scores. It's useful to hide outliers in measurements (due to cold cache etc), without having to worry too much about the actual distribution. Signed-off-by: Chris Wilson commit 669b5da2bc4ef8d80405aef96ebb831a39608db4 Author: Damien Lespiau Date: Tue Jun 30 00:15:15 2015 +0100 tools: Add an intel_firmware_decode tool So we can inspect fw headers. Sample output: Firmware: skl_dmc_ver1_18.bin (7892 bytes) CSS header (128 bytes) module_type: DMC (9) header_len: 32 header_ver: 0x10000 module_id: 0x0 module_vendor: 0x0 date: 0x7df060c size: 1973 key_size: 0 modulus_size: 0 exponent_size: 0 version: 1.18 (0x10012) kernel_header_info: 0x0 Package header (256 bytes) header_len: 64 header_ver: 1 num_entries: 3 Firmware #1 stepping: A.* offset: 4294967295 Firmware #2 stepping: B.* offset: 4294967295 Firmware #3 stepping: *.* offset: 0 0x7f0867143000 0x7f0867143180 signature: 0x40403e3e header_len: 128 header_ver: 1 dmcc_ver: 520 project: 0x900 fw_size: 1845 fw_version: 0x10008 mmio_count: 3 write(0x0008f074, 0x00002fc0) write(0x0008f004, 0x02500204) write(0x0008f034, 0xc003b400) Signed-off-by: Damien Lespiau commit ad411e2d5de78b621f6e9c628f8a96bd79425057 Author: Joonas Lahtinen Date: Fri Jun 26 14:52:34 2015 +0300 tests/gem_ringfill: Add {render,blitter}-forked-1 subtests. Add forking subtests to gem_ringfill. Tests cause consistent GPU hangs on SKL. v2: Removed noop parts. v3: - Allow executing the tests in order too (Chris Wilson). - Rename the tests to -forked-1 Cc: Mika Kuoppala Cc: Chris Wilson Signed-off-by: Joonas Lahtinen [ickle: Extend to cover forked-N] Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89959 commit 46f277b90b998560eb0cf895f71ca667d2ef8a39 Author: Damien Lespiau Date: Sat Jun 27 18:03:15 2015 +0100 stats: Exercise the reallocation paths Signed-off-by: Damien Lespiau commit 66e0bf66da4b06d9495025b053d4d7fe73c86fc7 Author: Damien Lespiau Date: Sat Jun 27 17:49:40 2015 +0100 stats: Spwan igt_init_with_size() from igt_init() It's all about good looking APIs. Signed-off-by: Damien Lespiau commit 00432ff260beba0bf6535d7fd1c0275de303ed57 Author: Damien Lespiau Date: Sat Jun 27 17:34:51 2015 +0100 stats: Allow the underlying arrays to grow at will Chris mentioned he wanted to be able to measure a variable "for one second" and use igt_stats to store them. That's one case where we don't know the number of data points upfront. We should really support that, so here it is. v2: Just free ->sorted when a new capacity is needed. ensure_sorted_values() will then reallocate the array to the new capacity on demand (Chris) Signed-off-by: Damien Lespiau commit 817ea87b6edab2d25a2994f076562ee03aa91fc6 Author: Damien Lespiau Date: Sat Jun 27 16:42:50 2015 +0100 stats: Test we do correctly invalidate the sorted array Chris had a doubt, and I was lazy and didn't do a similar test for the quartiles/median than for the mean (test_invalidate_mean()). Plug that gap. Signed-off-by: Damien Lespiau commit fabde384a33324dc9a9c55c1f4003196ec90564c Author: Damien Lespiau Date: Sat Jun 27 15:49:26 2015 +0100 stats: Add support for the interquartile range (IQR) IQR is a good measure of dispersion. Signed-off-by: Damien Lespiau commit 1b8997b3f89f5c7632782d2e7f8509a0f8176891 Author: Damien Lespiau Date: Sat Jun 27 15:33:58 2015 +0100 stats: Add support for quartiles (and thus median) More stuff, quite useful characteristics of a dataset. Signed-off-by: Damien Lespiau commit 3839bacde884a0d8ce55956b3221175a0078844b Author: Damien Lespiau Date: Sat Jun 27 15:32:23 2015 +0100 stats: Add a bulk version of _push() In case we want to push a bunch of values in one go. Signed-off-by: Damien Lespiau commit 2fe286985f825128142f56df5dc806a78338b308 Author: Damien Lespiau Date: Sat Jun 27 15:31:19 2015 +0100 stats: Use igt_assert_eq_double() when asserting on doubles Lucky enough to have exact values, == works! Signed-off-by: Damien Lespiau commit 0a38e977c026fee3a499946652263b2adfe7c27c Author: Damien Lespiau Date: Sat Jun 27 15:26:50 2015 +0100 lib: Add double versions of igt_assert_cmp() and igt_assert_eq() Signed-off-by: Damien Lespiau commit 23888526c7c979a40218bb8bc669fb383d86c5c3 Author: Damien Lespiau Date: Sat Jun 27 15:26:13 2015 +0100 docs: Add documentation for igt_assert_cmpuint() Signed-off-by: Damien Lespiau commit f660d0a054d559b47525d42e2a4b55057ec8e417 Author: Damien Lespiau Date: Sat Jun 27 15:16:22 2015 +0100 docs: Add documentation for igt_assert_u32() Signed-off-by: Damien Lespiau commit 4dca31b2d60019f9cdeb35b1922126cbbe1cb7af Author: Damien Lespiau Date: Sat Jun 27 11:16:52 2015 +0100 docs: Fix a "libraray" typo Signed-off-by: Damien Lespiau commit 0e4c175e04abadc1f0f76e3c144debf1527cf057 Author: Damien Lespiau Date: Sat Jun 27 11:12:01 2015 +0100 stats: Add igt_stats_get_range() Somewhat useful, for instance to size an histogram. Signed-off-by: Damien Lespiau commit 4a89a841a11cb872f9b0b0959c306fcb96f87d75 Author: Damien Lespiau Date: Sat Jun 27 09:45:42 2015 +0100 stats: Add functions to retrieve min/max values of the dataset Signed-off-by: Damien Lespiau commit 87009f3d7b155bc2c650d1395f74a2c6e80f0cf6 Author: Damien Lespiau Date: Sat Jun 27 09:41:57 2015 +0100 stats: Factor out a fixture to initialize stats We're going to use this simple fixture once more, might as well make a function instead of copy/pasting code. Signed-off-by: Damien Lespiau commit 17ed69fbb817bff6f76d3e3beffc2fd30abdf187 Author: Damien Lespiau Date: Fri Jun 26 18:19:42 2015 +0100 stats: Add a note about the standard deviation derived from unbiased variance Signed-off-by: Damien Lespiau commit da123adeae70863c967e14035f272b89371a5fd5 Author: Damien Lespiau Date: Fri Jun 26 18:04:34 2015 +0100 stats: Add a getter for the population property Signed-off-by: Damien Lespiau commit 3a5cf84317197cdac88196cda76c6a7e08943f20 Author: Damien Lespiau Date: Fri Jun 26 17:02:09 2015 +0100 stats: Add a way to specify if the data set is a population or a sample This changes how we compute the variance. We want an unbiased variance when reasoning about a sample. Signed-off-by: Damien Lespiau commit a2f6fd3725f50919c79694f1e24c1dec2752c875 Author: Damien Lespiau Date: Fri Jun 26 16:57:55 2015 +0100 stats: Add gtkdoc section for igt_stats Signed-off-by: Damien Lespiau commit 087a8d1c63b3d5863a14ff10002fde683b295592 Author: Damien Lespiau Date: Fri Jun 26 14:31:58 2015 +0100 stats: Add header gards Sigh. Signed-off-by: Damien Lespiau commit 6ebd8c2dc3291bd5776a0511e61a019a1444497f Author: Damien Lespiau Date: Fri Jun 26 14:28:41 2015 +0100 doc: Remove i-g-t/intel prefixes and capitalize section titles Looks better! Signed-off-by: Damien Lespiau commit 203c3841fc6bf9bd2b71ff9ce8e86874375eec1e Author: Damien Lespiau Date: Fri Jun 26 13:55:01 2015 +0100 stats: Zero the whole structure at init() time Because the structure started small, I initialized every member directly, but that means that the new fields added weren't properly initialized (sigh!). Zero the whole thing first then. Also, the punishment for introducing a bug should be to write the corresponding unit test. It's not a perfect one, but I'll take it. Signed-off-by: Damien Lespiau commit 76ea7b913373d1291a95706dfede7e48a812777e Author: Damien Lespiau Date: Fri Jun 26 00:20:44 2015 +0100 tests/stats: Make sure we properly invalidate the cached mean Sure, that's an implementation details, but make sure we do recompute the mean when we add a new value. Signed-off-by: Damien Lespiau commit 515cec1210764241153f5d46d70ba5e943201b14 Author: Damien Lespiau Date: Thu Jun 25 23:59:21 2015 +0100 stats: Add a way to retrieve the standard deviation Signed-off-by: Damien Lespiau commit 05c10f940f9df3a5b24e2a0b476052fbe5a22282 Author: Damien Lespiau Date: Thu Jun 25 23:57:49 2015 +0100 stats: Use an algorithm popularised by Knuth to compute mean and variance Suggested-by: Chris Wilson Signed-off-by: Damien Lespiau commit 9986282c2bb4508a1fd9b774e30e1f4e405ac82e Author: Damien Lespiau Date: Fri Jun 26 00:16:48 2015 +0100 tests/igt_stats: Call igt_stats_fini() to not leak the array Sure, it'll be freed at exit(), but might as well be a bit pedantic. Signed-off-by: Damien Lespiau commit e55a11d3ebceaf777dba369076e8e842a8479360 Author: Damien Lespiau Date: Thu Jun 25 23:44:20 2015 +0100 stats: Be more precise and talk about mean, not average There are several types of averages eg. mean, median and mode. Signed-off-by: Damien Lespiau commit e86557ca9fa24bb3c73a8168b0866169f7606d0c Author: Paulo Zanoni Date: Thu Jun 25 14:19:24 2015 -0300 lib/igt_draw: move to the GTT domain before using GTT mmaps With this, we don't need to worry about what happened to the buffer before. Reviewed-by: Chris Wilson Signed-off-by: Paulo Zanoni commit 6cc553adf298e6244fbdb5fe03841c00ddda29ad Author: Paulo Zanoni Date: Thu Jun 25 14:12:56 2015 -0300 lib/igt_core: fflush stdout after printing subtest results I often run "sudo ./test 2>&1 | tee output.txt", and when we're succeeding - never printing to stderr - the output gets buffered and is never flushed (because it doesn't point to a terminal), so I never know which test is running. With this fflush, I'm able to know when each test finishes. v2: Add blank line too (Chris) Reviewed-by: Chris Wilson Signed-off-by: Paulo Zanoni commit f78574101ffc3388ba7a948a6f5310358cdeaab2 Author: Chris Wilson Date: Fri Jun 26 11:41:44 2015 +0100 igt/gem_fenced_exec_thrash: Tidy testing of expected execbuf errors Signed-off-by: Chris Wilson commit c69b13578399915f71f4ccc10cae188c31381c6a Author: Derek Morton Date: Fri Jun 26 11:36:00 2015 +0100 igt/gem_fenced_exec_thrash: Fix memory leak between tests gem_fenced_exec_thrash was not freeing any resources between subtests. On 1Gb android systems this resulted in the test failing with an OOM error. Added cleanup code to free BOs at the end of each subtest. Signed-off-by: Derek Morton commit eeda401391de3ab434dcdd1d1b441a24660a0fd3 Author: Paulo Zanoni Date: Thu Jun 25 10:56:34 2015 -0300 kms_frontbuffer_tracking: GTT mmap writes disable PSR And they keep it disabled until something else enables it. So let's consider this on the draw subtests. With this, some PSR tests that were failing will now start passing. Signed-off-by: Paulo Zanoni commit 053f33ad1c3e8604b2c33a6ca87539a2ec684742 Author: Paulo Zanoni Date: Thu Jun 25 10:47:09 2015 -0300 kms_frontbuffer_tracking: use CPU mmaps for fill_fb_region() Because the GTT mmaps "permanently" disable PSR and this can mess some of our assertions. So let's just use the CPU domain to keep the implementation simple. With this, some PSR tests that were failing will now start passing. Signed-off-by: Paulo Zanoni commit 7a4ded7b87956b9bcfb0d33ed2368633ec2dc239 Author: Paulo Zanoni Date: Wed Jun 24 19:04:26 2015 -0300 kms_frontbuffer_tracking: remove offscreen-{cur,spr} subtests It doesn't make sense to write on the sprite/cursor plane of the "offscreen" screen. The pick_target() function was just returning the offscreen_fb pointer for those cases, so we were not really testing any cursor or sprite code. So the tests were just the same as offscreen-pri. That kills 24 subtests for each feature (72 in total). Signed-off-by: Paulo Zanoni commit ce3b47bac89d46633bd8b55842590080ab9d246d Author: Paulo Zanoni Date: Mon Jun 22 19:18:29 2015 -0300 tests/kms_frontbuffer_tracking: add modesetfrombusy test This test exercies the dev_priv->fb_tracking.busy_bits bug I recently found and Daniel fixed. Cc: Daniel Vetter Signed-off-by: Paulo Zanoni commit de774ed31e678da3f0fe0a51c4c1165161ee399a Author: Damien Lespiau Date: Thu Jun 25 17:38:19 2015 +0100 skl_compute_wrpll: Don't try other dividers if we find a 0 central freq deviation Paulo suggested that we could short-circuit the search for a good divider if we find a 0 deviation of the DCO frequency from the central frequency. Out of the 373 test frequencies, 34 hit that fast path. Suggested-by: Paulo Zanoni Signed-off-by: Damien Lespiau commit 26336385ac1f32ce2a0160558d08af9d090c4286 Author: Damien Lespiau Date: Thu Jun 25 17:48:50 2015 +0100 skl_compute_wrpll: Sync a comment with from the kernel code Might as well try to keep the code in both this test and the kernel as close as possible. Signed-off-by: Damien Lespiau commit dfebf08d9a21146e4d53ddb684e71b934d96bc59 Author: Damien Lespiau Date: Thu Jun 25 14:18:34 2015 +0100 skl_compute_wrpll: Fix the mininum deviation computation Paulo noticed that, because we were only comparing positive deviations with positive deviations and negative deviations with negative deviations, we weren't actually always using the absolute minimal deviation at all. This improves the average deviation across all tested frequencies (373): before: average deviation: 215.13 after: average deviation: 194.47 Signed-off-by: Damien Lespiau commit afdaeabbcfd9a2fd1b27b8742681d52d12161dd0 Author: Damien Lespiau Date: Thu Jun 25 12:21:27 2015 +0100 skl_compute_wrpll: Cycle through dividers, then central freqs Follow Paulo's comment on the corresponding kernel patch. This means we also have to move the break when we have cycled through the even dividers as well. This improves the number of even dividers used across the tested frequencies (373) (at the expense of a slightly worse average deviation, but "even dividers take precedence over a lower deviation". before: even/odd dividers: 338/35 average deviation: 206.52 after: even/odd dividers: 363/10 average deviation: 215.13 Signed-off-by: Damien Lespiau commit efd2895f2380bf87f6821e3ab89005070e9d1925 Author: Damien Lespiau Date: Thu Jun 25 12:17:23 2015 +0100 skl_compute_wrpll: Print the average deviation It's interesting to watch the effect of some algorithm tweaks on the average deviation between the central freq and the dco freq. A metric we'd like to minimize. Signed-off-by: Damien Lespiau commit 06f5f7065fccc5fbb9f65f6f7d348624e2fa0d2b Author: Damien Lespiau Date: Thu Jun 25 12:07:56 2015 +0100 lib: Add a tiny utility function to compute averages The master plan would be to get a bit more stats in it, at least the standard deviation and confidence interval. Just need the average for now. Signed-off-by: Damien Lespiau commit 484e27542d79f78e467004fec5a5192ac6006b34 Author: Daniel Vetter Date: Mon Jun 15 17:09:11 2015 +0200 tests/kms_fbc_crc: Don't force fbc on old platforms It's simply a bit too scary on pre-gen6 and imo not worth the bother really until someone starts to implement all the hacks an w/a required on these platforms. On later platforms the issues are just with correctness and performance hence no risk for hanging machines. Cc: Paulo Zanoni Signed-off-by: Daniel Vetter commit 44d444acaa8cfd61ea25c82fb7c3bff5f41f0835 Author: Chris Wilson Date: Wed Jun 24 17:01:21 2015 +0100 overlay: Enable locale Enabling locale allows us to use thousand separators and other such human touches in the output. Signed-off-by: Chris Wilson commit 453792c501b4553ed3c4135057249e300d3c0362 Author: Chris Wilson Date: Wed Jun 24 11:26:33 2015 +0100 lib: Enable locale dependent output to a terminal If we are in an interactive session, enable the locale. This allows for features like setting thousand separators for printing large values. By only enabling it for interactive terminals, we avoid changing outputs for the test scripts (leaving them as the "C" locale). Note this mainly affects the testcases, or binaries built using libigt. Other binaries need to be localised separately. Signed-off-by: Chris Wilson Reviewed-by: Michel Thierry commit 7eb5f079491e5c078cf44d5ddb52824bb2c6bfb0 Author: Paulo Zanoni Date: Tue Jun 23 12:55:04 2015 -0300 tests/kms_frontbuffer_tracking: rename set_screens_for_test Rename it to prepare_subtest. This function used to be much smaller when I decided its name. Signed-off-by: Paulo Zanoni commit 7756e8844538050c1e4efde28147ca7e0753df27 Author: Paulo Zanoni Date: Tue Jun 23 10:49:54 2015 -0300 tests/kms_frontbuffer_tracking: simplify flib_subtest fb handling Get rid of fb2_region, use params->fb directly instead. Signed-off-by: Paulo Zanoni commit 77e1bac6eb4588c00bbc2e431d9f2594675a18bd Author: Paulo Zanoni Date: Tue Jun 23 10:38:19 2015 -0300 tests/kms_frontbuffer_tracking: simplify wait_user() calls I often add new temoprary wait_user() calls when debugging things, and having to add "if (opt.step)" is annoying, so let's make the step level check inside wait_user(). As a bonus, our huge macro is 2 lines shorter. Signed-off-by: Paulo Zanoni commit 969cb3c575ac4618b3a3484f78a9644484f9c7e8 Author: Paulo Zanoni Date: Thu Jun 18 14:57:37 2015 -0300 tests/kms_frontbuffer_tracking: not all eDP panels support sink CRC And require sink CRC support for PSR, since the pipe CRC is not exactly useful there. v2: Check for ENOTTY (Rodrigo). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91019 Signed-off-by: Paulo Zanoni commit 471ebbed535a73d129e4d717f5b80a2af163eb0c Author: Derek Morton Date: Tue Jun 23 17:06:01 2015 +0100 igt/gem_fence_thrash: Reduce memory usage On android platforms with 1Gb RAM gem_fence_thrash was failing with an out of memory error. This patch causes gem_close() to be called when a handle is no longer required rather than relying on the cleanup when the fd is closed. This greatly improves the memory footprint of the test allowing it to run on 1Mb systems. Also fixed a leak of the 'threads' variable. v2: Simplified as per Chris Wilson's suggestion. Signed-off-by: Derek Morton [ickle: fix mmap leak from bo_copy()] Reviewed-by: Chris Wilson commit 154192a6805adc879b2fb0d08ff9d89e25b04fa0 Author: Thomas Wood Date: Fri Jun 19 09:22:55 2015 +0100 NEWS: Post-release bump Signed-off-by: Thomas Wood commit 0e528af623c735ab4bf0d5bbdc64cbdffc82674d Author: Chris Wilson Date: Mon Jun 22 15:48:54 2015 +0100 igt: Add gem_exec_alignment Simple test to see whether the kernel obey's the user's request alignemnt. Signed-off-by: Chris Wilson commit eb7d60e430ae63e36c77f2d95a0cea93017f0b71 Author: Chris Wilson Date: Wed Jun 17 18:29:49 2015 +0100 igt: Add gem_eio for inducing expected EIO A few entry points in the GEM API are expected to raise EIO if we encounter a wedged GPU. This testcase aims to do so by first injecting a GPU hang with GPU resets disabled (thus causing the GPU to become wedged) and then exercises the various API to check for the expected errors. Signed-off-by: Chris Wilson commit 4fbce7e462ab488fc11037adb571bb3a807459ba Author: Chris Wilson Date: Thu Jun 18 10:38:04 2015 +0100 testdisplay_hotplug: Add missing #include testdisplay_hotplug.c: In function ‘hotplug_event’: testdisplay_hotplug.c:46:14: error: storage size of ‘s’ isn’t known struct stat s; ^ testdisplay_hotplug.c:54:2: error: implicit declaration of function ‘fstat’ [-Werror=implicit-function-declaration] fstat(drm_fd, &s); ^ testdisplay_hotplug.c:54:2: warning: nested extern declaration of ‘fstat’ [-Wnested-externs] testdisplay_hotplug.c:46:14: warning: unused variable ‘s’ [-Wunused-variable] struct stat s; ^ Signed-off-by: Chris Wilson commit c83299d1fda4b8c67562999d61817177d422d52e Author: Chris Wilson Date: Mon Jun 15 14:51:54 2015 +0100 lib: Use HAS_GPU_RESET rather than opencode our guess Uses kernel commit 49e4d842f0d0892c3d26c93a81b9f22c1467030e Author: Chris Wilson Date: Mon Jun 15 12:23:48 2015 +0100 drm/i915: Report to userspace if we have a (presumed) working GPU reset to determine whether the kernel has a working GPU reset before injecting a hang (and so skip tests requring hang recovery if not available). commit a5633c406c4ae93abc7fce8ff59d2c021a6aa45e Author: Derek Morton Date: Thu May 28 13:02:30 2015 +0100 lib/tests/igt_segfault Add unit test to test segfault handling Unit test to check a segfaulting subtest is handled correctly. v2: Added script to check subtest results v3: Removed script. Updated test to use fork to monitor return status. v4: Added igt_segfault to .gitignore Signed-off-by: Derek Morton Signed-off-by: Daniel Vetter commit 4b944c92eb85c3cdf6526e65a1a746c979de55bd Author: Damien Lespiau Date: Thu Jun 4 18:31:04 2015 +0100 pm_rpm: Update the debugfs filename v2: Try to open i915_pc8_status first to make the transition (or just running on older kernels) better. (Paulo) Signed-off-by: Damien Lespiau commit b88212c036fbd909d70b8388fc8fffb1fac75e5b Author: Thomas Wood Date: Thu Jun 11 16:08:23 2015 +0100 Update version to 1.11 and add the release date Signed-off-by: Thomas Wood commit 0cc16b37ab9b3f8d5687380f83c0361c9de1beb6 Author: Thomas Wood Date: Thu Jun 11 16:06:33 2015 +0100 NEWS: Updates Signed-off-by: Thomas Wood commit aa75f373978756aba32ac9c009740ac45e2eb180 Author: Thomas Wood Date: Mon Jun 8 16:41:34 2015 +0100 tools: print a warning for tools replaced by intel_reg Cc: Jani Nikula Signed-off-by: Thomas Wood commit 87f15fc3da374082933aef4d2183f319e596c9ba Author: Thomas Wood Date: Mon Jun 8 10:16:00 2015 +0100 overlay: update .gitignore Signed-off-by: Thomas Wood commit d8acd24bdb0210e1b590cebc58ddcd266045ae08 Author: Paulo Zanoni Date: Tue Dec 2 10:40:05 2014 -0200 tests: add kms_frontbuffer_tracking This is a new test that should exercise the frontbuffer tracking feature of the Kernel in a number of different ways. We use different drawing methods, we use the primary, cursor and sprite planes, we can test both on single and dual pipes, also on buffers not associated with any CRTCs, etc. We currently have assertions for both FBC and PSR, and we also have a "nop" test mode that should disable both FBC and PSR, and can be used for debugging. This test is also capable of testing both FBC and PSR even if they are disabled by default on the Kernel: the test knows how to change the i915.ko parameters and then set them back after testing. I am getting a significant number of failures when I run this test, which means we have some work to do on the Kernel. I also still have a small list of additional subtests that I plan to add to this test, and those tests are documented on the main function. v2: - Use igt_debugfs_open() (Thomas). - Use igt_test_description() (Thomas). - Don't check drm_open_any_master()'s result (Thomas). - Use igt_require_f() in some cases (Thomas). - Standardize some assertions. - Use the new module param functions. - Check if FBC is supported by the chipset. - Add new subtests (multidraw, enum fbs, fbc+psr). - Make tests a little shorter. - Reorganize which tests ara ran by default. - Better comments everywhere. - Rebase. v3: - Fix a small typo. - Improve the log messages a little bit more. Signed-off-by: Paulo Zanoni commit 75b286e821bd5cf056c5a786f347943360486143 Author: Paulo Zanoni Date: Tue Jun 2 12:03:45 2015 -0300 tests/kms_psr_sink_crc: test even if PSR is disabled by default Use the igt_set_module_param_int() call to enable it, then restore the previous value after we are done testing. With this, we can change the psr_enabled() function to psr_possible(): the only requirement should be that we have a PSR capable sink. The test should now be able to make "Source_OK" and "Enabled" become true whenever it wants. Cc: Rodrigo Vivi Signed-off-by: Paulo Zanoni commit a4dbdeffc2995a0b84efb3bdfc9e460b731d7af5 Author: Paulo Zanoni Date: Tue Jun 2 10:54:27 2015 -0300 tests/kms_fbc_crc: run even if FBC is disabled by default We may not be perfect, but if we don't even test, we will probably only get worse over time. The function called makes sure we restore whatever was the original FBC parameter when we exit the test, so this should not affect the other tests. Signed-off-by: Paulo Zanoni commit d9ff9b3971121acdaedf45d95acceabbb1391547 Author: Paulo Zanoni Date: Mon Jun 1 19:06:10 2015 -0300 lib/igt_aux: add functions to manipulate i915.ko parameters Some i915.ko features have very nice IGT tests, which are never executed because the features are disabled by default. This leads to unnoticed regressions both in the Kernel and in the IGT tests. We have seen this multiple times, for example, on FBC and PSR. We want to be able to run IGT and actually test these disabled-by-default features in order to make sure we at least don't break them even more. Sometimes they may be disabled for some specific reason, and we don't want to increase the set of reasons without noticing. To help solving this problem, this commit adds some helper functions that should make it easier to change certain i915.ko parameters and then restore their original values at the end of the test. With this, I'm hoping QA will be able to detect any regressions and automatically bisect them - or, with PRTS, reject the patches before they are even merged. Signed-off-by: Paulo Zanoni commit 46a1791958f45cf1b15720b40aaca9306dd5227f Author: Paulo Zanoni Date: Tue May 26 11:11:52 2015 -0300 tests/template: add IGT_TEST_DESCRIPTION So people that write tests based on the template don't forget to use the macro. Signed-off-by: Paulo Zanoni commit 6b418f0264883871955d82058b1d36f710f810b4 Author: Imre Deak Date: Mon Jun 8 19:08:06 2015 +0300 tests/gem_storedw_batches_loop: add subtest for cached mappings v2: - add a subtest for uncached mappings too for LLC platforms where the default is cached mapping (Chris) Signed-off-by: Imre Deak commit c5a6147a1be440c2d5457f392775e583b2eba8f3 Author: Chris Wilson Date: Mon Jun 8 15:56:33 2015 +0100 overlay: Fix parsing of gem-objects for '[k]' clients Apparently '[]' are not non-whitespace characters and break '%s'. Signed-off-by: Chris Wilson commit fd772e32a23157fc29649070a6a5e94d70ae02f8 Author: Damien Lespiau Date: Fri Jun 5 15:51:40 2015 +0100 build: Add the automake subdir-objects option automake 1.14 was complaining here: overlay/Makefile.am:44: warning: source file 'x11/x11-window.c' is in a subdirectory, but option 'subdir-objects' is disabled. Signed-off-by: Damien Lespiau commit c221e0942031a8c7518fd04f346920df766ce6fe Author: Tim Gore Date: Wed Jun 3 09:20:21 2015 +0100 tests/gem_reset_stats : mask off ring_stop bits Function check_gpu_ok checks to make sure that any hangs have cleared by testing for (flags == 0). Some tests set the STOP_RINGS_ALLOW_BAN and STOP_RINGS_ALLOW_ERRORS flags but these do not get cleared by an individual ring reset, (a feature added recently to the driver), leading the check_gpu_ok function to think that the gpu is still hung. So I mask the flags with STOP_RING_ALL, to ignore the mode bits and look only at the bits that stop the rings. Once gpu_check_ok sees that the gpu is not hung I write 0 to stop_rings in order to clear it completely. This is because igt_set_stop_rings will only write to stop_rings if either a) they are currently 0 or b) we are writing 0. If we leave the mode bits set then subsequent calls to igt_set_stop_rings to create hangs will fail. Signed-off-by: Tim Gore commit a5a6d40ca8a6a809678eda695ee54a085c05b949 Author: Chris Wilson Date: Wed Jun 3 13:57:21 2015 +0100 igt/gem_streaming_writes: Reorder src/dst to avoid executing on snooped During the streaming setup, we execute a dummy batch in order to bind the objects into the GTT and query their offsets. For this, we should not use a snooped buffer for the dummy batch, or else we may anger the GPU. Given that we have a choice, use the other buffer for the dummy batch. Signed-off-by: Chris Wilson commit 85ee6e7b366713aca9d98d587f03eb7583f38830 Author: Tvrtko Ursulin Date: Mon Jun 1 11:11:15 2015 +0100 gem_userptr_benchmark: Test overlapping bo mmu notifier performance impact Current userptr kernel implementation downgrades tracking VMA ranges (real userspace ones) to an inefficient linear walk for any process which has instantiated overlapping userptr objects. This adds a test which shows the performance cliff on, most visibly, generic userspace mmap(2) and munmap(2) operations between unsync, non-overlapping and overlapping userptr objects. Signed-off-by: Tvrtko Ursulin Cc: Chris Wilson Cc: Thomas Daniel commit 977730084647d32b98019924b81b281bef942689 Author: Chris Wilson Date: Tue Jun 2 11:15:16 2015 +0100 igt/gem_streaming_writes: Map the whole batch for CPU accesses The llc cpu path only partially mapped the batch buffer so confused the CS when attempting to execute an empty batch. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90809 Signed-off-by: Chris Wilson commit 0d16473df4ed29c9836b03090c78debfb9a7e3e6 Author: Ville Syrjälä Date: Fri May 8 17:46:21 2015 +0300 tests/kms_3d: Reduce the number of expected stereo 3D modes Currently the test expects to find 15 stereo 3D modes, however the number of stereo modes we get from the current kernel EDID parser is actually 13. The extra two modes we had previously were GTF modes, which are no longer getting added by the kernel since we have corresponding CEA/DMT modes available. So having the GTF modes in the list was not actually intentional. The kernel commit that change the behaviour: commit bfcd74d2aeda25a78f7cc92f80650218b1bce0ca Author: Ville Syrjälä Date: Thu Apr 2 17:02:11 2015 +0300 drm/edid: Add DMT modes with ID > 0x50 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90368 Signed-off-by: Ville Syrjälä commit f386741932a5a6ce4db185f91445b8ad63ed1b02 Author: Antti Koskipaa Date: Thu May 28 14:44:54 2015 +0300 tests/pm_backlight: Add backlight test This is a basic sanity test of the backlight sysfs interface. v2: - Add jani's suggestion for immediate readback - Remove unused parameter from test_and_verify() - Add fade test Issue: VIZ-3377 Signed-off-by: Antti Koskipaa Reviewed-by: Jani Nikula Signed-off-by: Thomas Wood commit b1e40e97c89a82b6f574af298214ea599b089264 Author: Mike Mason Date: Wed May 27 08:25:06 2015 -0700 scripts/run-tests.sh: add option to not retry incomplete tests on resume This patch utilizes piglit's new --no-retry option. That option prevents incomplete tests from being retried when resuming a test run. This is necessary because retrying tests that cause a crash or reboot prevents a test run from being resumed. This patch also adds -s to the piglit command line. The -s option forces test logs to be synced to disk after every test. Without it, some logs can be lost if a test causes a crash or reboot, making it impossible to resume the test run at the correct point. Signed-off-by: Mike Mason Signed-off-by: Thomas Wood commit f49723872bf02788872f02e37df3e48682b5ef9b Author: Derek Morton Date: Mon May 18 14:37:31 2015 +0100 lib/igt_core.c: Flag the test as failing after a segfault fatal_signal_handler() was trapping fatal errors but not flagging the test as failing or setting an exit code. The result was that the test would return Ok or Skipped depending on what the other subtests did even though one of the subtests had segfaulted. Signed-off-by: Derek Morton Signed-off-by: Daniel Vetter commit 95019c2a3c4ed5943ad16e17c8dcf36fd6492adc Author: Yunlian Jiang Date: Tue May 26 10:22:31 2015 -0700 debugger: remove unnecessary struct per_thread_data This removes unnecessary 'struct per_thread_data' and avoids the compilation error 'variable length array in structure extension will never be supported' by clang. The bug entry is https://code.google.com/p/chromium/issues/detail?id=476001 Cc: Benjamin Widawsky Cc: Thomas Wood Signed-off-by: Yunlian Jiang Signed-off-by: Thomas Wood commit 88c9a82318bae6bf97e55bf1a28018708aca2200 Author: Derek Morton Date: Tue May 26 15:19:17 2015 +0100 lib: Enable building unit tests on android Add a make file for android so the unit tests can be built. Enabled asserts for the library code so the unit test behaviour is correct. Signed-off-by: Derek Morton Signed-off-by: Thomas Wood commit f2a5896bdddc595489a61cb0e0051de8d43a2591 Author: Tvrtko Ursulin Date: Fri May 22 11:00:45 2015 +0100 kms_rotation_crc: Update rotation direction for kernel changes commit 1e8df16778b0d8fd8102b3ee799b028f8f961089 Author: Sonika Jindal Date: Wed May 20 13:40:48 2015 +0530 drm/i915/skl: Swapping 90 and 270 to be compliant with Xrand Changed the rotation direction so IGT needs to be told. Reviewed-by: Sonika Jindal Signed-off-by: Tvrtko Ursulin Cc: Ville Syrjälä Cc: Sonika Jindal Signed-off-by: Damien Lespiau commit 308b0e856b503f953a21d98f2b808e8fdd67004f Author: Chris Wilson Date: Wed May 20 14:51:46 2015 +0100 igt/gem_linear_blits: tidy Be clean and use memset(0) on ioctl args before use and downgrade some of the lesser informatic messages to just debug. Signed-off-by: Chris Wilson commit e93fbc2873b411f9e42d49f758fc9eb845c2ad1b Author: Chris Wilson Date: Tue May 19 22:03:04 2015 +0100 igt/gem_streaming_write: Add a variant to exercise CS Another issue in streaming writes is into the batch buffer. Signed-off-by: Chris Wilson commit 3d1f9a223627b44fdaf89a5b848a9705429a80a1 Author: Chris Wilson Date: Tue May 19 15:18:58 2015 +0100 igt/gem_streaming_writes: Remember to markup the write target! Signed-off-by: Chris Wilson commit 65fec5e5836cb347e99d22320ec3ff776ddf2a1f Author: Chris Wilson Date: Tue May 19 14:51:43 2015 +0100 igt/gem_streaming_writes: Add more validation steps Inalcude a pre-pass to check that the non-streaming, partial writes work. Signed-off-by: Chris Wilson commit c0a0725fad11bb7911420cf9b49f8a2ccdf35071 Author: Damien Lespiau Date: Tue May 19 15:04:03 2015 +0100 list-workarounds: Print the line where the parsing error occured Useful to understand the warnings the scripts prints. Signed-off-by: Damien Lespiau commit 554aac5f3e349cb5e6cd99f42826893abf564d85 Author: Imre Deak Date: Fri May 15 17:30:58 2015 +0300 tests/pm_rc6_residency: fix check if RC6P or RC6PP is enabled The test checks the residency in a given RC6 state or any deeper states that are also enabled. For example the RC6 subtest checks the combined residency in RC6/RC6P/RC6PP. Since the kernel reported value for the RC6 residency doesn't include the RC6P or RC6PP residency we need to adjust the RC6 value accordingly. A similar adjustment is needed for the RC6P subtest. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90369 Signed-off-by: Imre Deak Acked-by: Daniel Vetter commit 2b47e219be73bb03993fc0d0a78dd7db93c3321b Author: Imre Deak Date: Fri May 15 17:29:37 2015 +0300 tests/pm_rc6_residency: fix counter readout in case of wrap-around Signed-off-by: Imre Deak Acked-by: Daniel Vetter commit 05e9edb2b938143677254cab1d122cd8b0ecd4c0 Author: Imre Deak Date: Fri May 15 16:58:30 2015 +0300 tests/pm_rc6_residency: remove redundant idle loops Currently the test runs a separate idle loop when reading out each RC6 counter. But there is no need for this, we can have a signle idle loop and read out all the counters at once. This prepares for an upcoming patch where we need to consider the RC6P and RC6PP counters as well when checking RC6. Signed-off-by: Imre Deak Acked-by: Daniel Vetter commit a2ce95eb9ec1b90a5697d8f8c41ae781328e29bf Author: Imre Deak Date: Fri May 15 16:31:09 2015 +0300 tests/pm_rc6_residency: sanitize the RC6 enabled mask check The way the test checks for the RC6 enabled mask atm doesn't work: calling igt_success outside of any subtests doesn't have any effect. This means the test will run a 11 second idle loop for each RC6 state regardless if the platform supports these or have them enabled. Fix this by checking explicitly if a given RC6 state is enabled before reading out/checking the corresponding counter. With this fix we can also get rid of the GEN6/IVB checks, since the RC6 mask check makes them redundant. We still need the VLV/CHV checks, since media RC6 doesn't have a separate bit in the mask. Signed-off-by: Imre Deak Acked-by: Daniel Vetter commit a76591a4be53b608c5cb9793227aa4a957a2f7b1 Author: Imre Deak Date: Fri May 15 16:22:23 2015 +0300 tests/pm_rc6_residency: factor out the code to measure residencies The upcoming patches will add some additional logic around reading out the counter values, so factor out the readout code to prepare for those patches. No functional change. Signed-off-by: Imre Deak Acked-by: Daniel Vetter commit 7883bc8c1cdf3b1cde32acceb4bd4b4c2575ff32 Author: Imre Deak Date: Fri May 15 16:15:33 2015 +0300 tetst/pm_rc6_residency: sanitize counter check function arguments The counter check function (residency_accuracy) cares only about the counter delta, so no need to pass it the start/stop values separately. Simplify things to prepare for the upcoming patches. No functional change. Signed-off-by: Imre Deak Acked-by: Daniel Vetter commit a572fb15f350be2c002b53a97cae6ceefb155df8 Author: Imre Deak Date: Tue May 12 16:29:32 2015 +0300 tests/pm_rc6_residency: simplify the residency counter check The temporary vars only obfuscated things, so get rid of them. Also remove some redundant asserts and info messages. The only functional change is that the counter delta will be checked only against a percentage based accuracy range (90%-100%) and not against a hard-coded limit (RC6_FUDGE). The two checks serve the same purpose and the former one is clearer. Signed-off-by: Imre Deak Acked-by: Daniel Vetter commit 5253af92ad6811d7c02b75355b3a47a60961b60a Author: Damien Lespiau Date: Fri May 15 19:37:12 2015 +0100 lib/bxt: Update the Broxton PCI IDs Cc: Imre Deak Reviewed-by: Imre Deak Signed-off-by: Damien Lespiau commit d819b7ee358de3972ee453221a4c2c99decb5c32 Author: Derek Morton Date: Fri May 15 11:24:55 2015 +0100 tests/Android.mk: Treat all KMS tests as Cairo dependent If ANDROID_HAS_CAIRO is not set, automatically add all kms tests to the skip_tests_list. Building for android currently fails due to the addition of new kms tests. Rather than just adding the new tests to the exclusion list, autogenerating a list of all kms tests and excluding them will reduce future maintainance. Signed-off-by: Derek Morton Signed-off-by: Damien Lespiau commit fa4396d0917aae72633cc4d0c8e14222ec494c84 Author: Damien Lespiau Date: Thu May 14 15:38:40 2015 +0100 gem_bad_blit: Make the BAD_GTT_TEST address more than 32 bits gem_bad_blit.c: In function ‘bad_blit’: gem_bad_blit.c:89:3: warning: right shift count >= width of type [enabled by default] OUT_BATCH(BAD_GTT_DEST >> 32); /* Upper 16 bits */ v2: remove extraneous () Signed-off-by: Damien Lespiau commit 15f60217cc79950702afe599b567bdf8fbd5ce75 Author: Damien Lespiau Date: Thu May 14 14:49:59 2015 +0100 intel_display_crc: A new tool to play with display CRCs The CRC debug interface is a bit more than a simple textual file in debugfs as there are a small command language to control what we want from them. This tool starts, slowly, by allowing us to dump the pipe CRCs whenever we want. It can be handy to check what is the current CRC when we reach a certain state on the screen (when using --interactive-debug for instance) against a known CRC. Signed-off-by: Damien Lespiau commit fd6846c99f00e265f558cf0106c833b96caf977f Author: Damien Lespiau Date: Thu May 14 14:19:01 2015 +0100 lib: Add a user data pointer to the argument parsing functions It can be useful to have one of those to carry state between the handler parsing the options and the rest of the test. Right now the only thing we can do is to use global variables for that. Signed-off-by: Damien Lespiau commit 7a5e1c6f0aebcfabecc3db96cb87add894530326 Author: Thomas Wood Date: Thu May 14 16:38:01 2015 +0100 tests: match gem_create prototype in igt_eviction_test_ops create function This avoids a warning when using gem_create as the create function. Signed-off-by: Thomas Wood commit aa6c63463feaba83efb893b4e69e0d334f99afea Author: Thomas Wood Date: Thu May 14 16:24:01 2015 +0100 igt.cocci: don't use igt_assert_neq to compare pointers igt_assert_neq can only compare integers, not pointers. Signed-off-by: Thomas Wood commit 6141aa2dad814ba8e1254c8e8213f1ba3ae6835a Author: Thomas Wood Date: Thu May 14 16:00:25 2015 +0100 docs: various documentation fixes Fix various typos, add missing parameter documentation, include the igt_draw section and update the list of ignored headers. Signed-off-by: Thomas Wood commit 1f6f6c07bd5bed8540dd309c3f5eac9270955f72 Author: Derek Morton Date: Thu May 14 09:59:44 2015 +0100 tests/gem_cpu_reloc: Fix gem_cpu_reloc OOM failure On android with small memory footprints gem_cpu_reloc can fail due to OOM. Refactor gem_cpu_reloc into 2 tests, a basic test which performs 10 relocations and a full test which skips if there is insufficient memory. Changed the memory required test to better estimate the actual RAM used. v2: Addresed comments from Thomas Wood Signed-off-by: Derek Morton Signed-off-by: Thomas Wood commit 1a80f90b7d0f804b39342fcd676f307e03216454 Author: Paulo Zanoni Date: Thu May 7 14:14:07 2015 -0300 tests/kms_fb_crc: fix the reference CRC checking Now we get the reference CRCs on separate untiled FBs just to make sure FBC is not there to mess the CRC computation. We also get the reference CRCs for buffers that were drawn in the same way that we draw them during the tests, so we can finally get rid of that FIXME comment we have! With this, kms_fbc_crc now actually tests something instead of just wasting CPU cycles... Fixes regression introduced by: commit 562bbe12f6fb75811a746c742a28d32a17b26aa9 Author: Daniel Vetter Date: Fri Feb 27 22:04:18 2015 +0100 tests: Remove usage of igt_crc_equal and _non_null Cc: Daniel Vetter Signed-off-by: Paulo Zanoni commit 31906084dea4f3570fea3a0a377a18665be14ba9 Author: Paulo Zanoni Date: Thu May 7 13:50:17 2015 -0300 tests/kms_fbc_crc: extract fill_mmap_{cpu,gtt}() Just like we have fill_render() and fill_blt(). I'm also going to use fill_mmap_gtt() for the code that generates the reference CRCs. Signed-off-by: Paulo Zanoni commit b3faeb16fe455497e93846979f21ca08d598d0fe Author: Paulo Zanoni Date: Thu May 7 12:16:01 2015 -0300 tests/kms_fbc_crc: make the blt test draw the same pattern ... as the other drawing tests: single white pixel at top/left of the screen, instead of painting the whole screen blue. This will make it much easier to fix the CRC checking code. Signed-off-by: Paulo Zanoni commit 5d3c2a6353bfb10f328d65812d7a08145103f422 Author: Paulo Zanoni Date: Wed May 6 19:20:17 2015 -0300 tests/kms_fbc_crc: extract check_crc() To remove some duplicated code. When we finally fix that FIXME, the code will get a little bigger too. Signed-off-by: Paulo Zanoni commit a976d7e44abb9d4e4540a8d072cdf55a7e0ea37b Author: Paulo Zanoni Date: Wed May 6 19:15:37 2015 -0300 tests/kms_fbc_crc: refactor context handling code Just a small modification to make the code a little easier to understand, IMHO. Signed-off-by: Paulo Zanoni commit fceed3a585cfcc5d2f412f11029a5a2ff3af3726 Author: Paulo Zanoni Date: Wed May 6 19:10:46 2015 -0300 tests/kms_fbc_crc: unify flip handling Just a small simplification to make the code a little easier to understand, and to help us when we further split drawing vs flipping later. Signed-off-by: Paulo Zanoni commit 036401d42c83ab61514fa529ea9e3647a2c8b40f Author: Paulo Zanoni Date: Tue May 5 18:05:54 2015 -0300 tests/kms_fbc_crc: increase the FBC wait timeout Now that we moved to the frontbuffer tracking scheme, it may take a long time for FBC to be updated after it is invalidated: 300ms is not enough anymore. The problem starts when i915_gem_execbuffer2() indirectly calls intel_fb_obj_invalidate(), which disables FBC. After this, FBC only gets reenabled when i915_gem_retire_work_handler() happens and indirectly calls intel_frontbuffer_flush(). Notice that while FBC is not yet enabled, the screen contents are correct, so this shouldn't really be a bug. Previous versions of this patch were replacing the gem_bo_busy() calls with gem_sync(), but after some discussion we concluded this was not the correct way to handle the problem, so let's just increase the timeout so we can kill those subtest failures. Signed-off-by: Paulo Zanoni commit 8c3ac50b00d08daa4b0794d96e76cf78f1253940 Author: Paulo Zanoni Date: Tue May 5 17:38:49 2015 -0300 tests/kms_fbc_crc: exec_nop() can also invalidate FBC So make sure that, at prepare_test(), we wait for FBC to be enabled again after we run the exec_nop() call. Since after this happens, we just assert fbc_enabled() at test_crc() instead of waiting for it to be enabled. This is now needed because we moved to software frontbuffer tracking, so it can take some considerable time for FBC to be reenabled after it is disabled. A previous version of this patch was just calling gem_sync() after exec_nop(). Signed-off-by: Paulo Zanoni commit 641d535a03ada74a3088309609a16c79076e6ccc Author: Paulo Zanoni Date: Wed May 6 15:23:51 2015 -0300 lib/debugfs: wait_for_keypress("crc") when collecting CRC Let's just steal the "crc" namespace and add this by default to igt_pipe_crc_collect_crc() instead of adding more calls to other tests. If tests want special waits on just some of their collect_crc() calls, they can use another name instead of "crc". This is very useful when developing, especially when the CRC we get is wrong: we want to look at the screen to see what's going on before we can think about how to fix the problem. So let's add this to the lib instead of adding this to every single test I need to debug. v2: Add some documentation (Daniel). Signed-off-by: Paulo Zanoni commit 3db5762384a9495241c1e80ce315a2092e83686a Author: Mike Mason Date: Tue May 5 17:14:55 2015 -0700 scripts/run-tests.sh: use single combined test list i-g-t now creates a single combined test list for tests with and without subtests. This patch adapts run-tests.sh to that change. Signed-off-by: Mike Mason Signed-off-by: Thomas Wood commit e949c42b496a3cd4f69a2c1953a58d4c1d1f7b46 Author: Damien Lespiau Date: Tue May 12 16:39:45 2015 +0100 quick_dump: Expand the WM cursor registers The tool I used to generate that list doesn't support expanding the list of registers when dealing with something like CUR_WM_A_*. Expand it by hand for now (tm). Remove CUR_PAL_${pipe}_* for the same reason (and because it's not very useful to have). Signed-off-by: Damien Lespiau commit 2ce298cf13f023d50132658e1ff7569e7507c5c6 Author: Chris Wilson Date: Tue May 12 15:25:03 2015 +0100 igt/gem_stream_writes: Use execbuf LUT to shave a few cycles off dispatch Since our goal is to have concurrent read/writes of GPU buffers, we want to spend as little time in between as possible. Signed-off-by: Chris Wilson commit 27cf5847dc9f14417b4a51a0b21213ba8ff04ebd Author: Daniele Ceraolo Spurio Date: Tue May 12 13:09:30 2015 +0100 tests/gem_cs_tlb: fix hardcoded ring id The test has 4 subparts, one for each ring, but internally they all submit to ring 0. Fix it to use the provided ring_id Signed-off-by: Daniel Vetter commit 980ccf124a87c05aa11c2406d9cf1575e1e3c08e Author: Tvrtko Ursulin Date: Tue May 12 11:06:37 2015 +0100 igt_kms: Do not reset plane position on assigning a fb commit a26f9f9ad0e679c7ce413a25d34f6914e1174151 Author: chandra konduru Date: Mon Mar 30 13:52:04 2015 -0700 i-g-t: Adding plane scaling test case Started doing this and broke kms_rotation_crc. Signed-off-by: Tvrtko Ursulin Reviewed-by: chandra konduru Signed-off-by: Daniel Vetter commit c3bd608fc51620145d29a3ded97370c27cb0ab0c Author: Tvrtko Ursulin Date: Tue May 12 11:06:36 2015 +0100 igt_kms: Merge condition in igt_plane_set_fb There were two paths for fb and !fb. Signed-off-by: Tvrtko Ursulin Reviewed-by: chandra konduru Cc: Thomas Wood Signed-off-by: Daniel Vetter commit 759bb7ac98eaa830fb94af59c3d743adbf465cc7 Author: Tvrtko Ursulin Date: Tue May 12 11:06:35 2015 +0100 igt_kms: Avoid NULL ptr deref when commiting disabled planes I think; commit a26f9f9ad0e679c7ce413a25d34f6914e1174151 Author: chandra konduru Date: Mon Mar 30 13:52:04 2015 -0700 i-g-t: Adding plane scaling test case introduced a condition where it attempts to update a disabled plane because of the newly introduced size_changed flag which is set for disabled frame buffers. Result is a NULL ptr deref in igt_drm_plane_commit (plane->fb->src_x). Start recognising this case as disabled plane and act accordingly. v2: Split out igt_plane_set_fb cleanup. (Thomas Wood) Signed-off-by: Tvrtko Ursulin Reviewed-by: chandra konduru Cc: Thomas Wood Signed-off-by: Daniel Vetter commit 8a5736b496b193ee0211ac34e69e43744e167425 Author: Tvrtko Ursulin Date: Tue May 12 11:06:34 2015 +0100 kms_flip_tiling: New tiling tests, including Y/Yf New subtests to excercise flips from tiled to tiled and from linear to tiled frame buffers. These will catch display programming issues like not preserving the tiling mode in page flips or not re-programming the watermarks. v2: Cleanup crc object after failing subtests. v3: * Wait for page flip completion instead of vblank. (Chris Wilson) * Added linear->tiled flip tests to catch watermark programming issues. v4: * Refactored for less code. * Check crc after page flip to ensure it happened. (Chris Wilson) * Skip rather than fail when flip fails. (Chris Wilson) Signed-off-by: Tvrtko Ursulin Reviewed-by: Chris Wilson Cc: Daniel Vetter Signed-off-by: Daniel Vetter commit b6d26c2a4858d3e6dd70f3278861b333c2758b72 Author: chandra konduru Date: Mon May 11 11:51:56 2015 -0700 i-g-t: Update kms_panel_fitting to work on other platforms kms_panel_fitting currently enabled for SKL only, but as panel_fitters are available on prior platforms, enable this kms test for them too. Signed-off-by: chandra konduru Signed-off-by: Daniel Vetter commit f5dd258cc7276be30d699d68f7c6952b04067529 Author: Chris Wilson Date: Tue May 12 10:02:59 2015 +0100 igt/gem_streaming_writes: Build in a self-test Use the first pass to write all values prior to the initial execbuf to verify that the copy itself is true. Subsequent passes then focus on verifying that writing values whilst the GPU is reading from neighbouring values is then correct. Signed-off-by: Chris Wilson commit a5a010c82d07db6c0397ba7e5f50c00683a5c5f3 Author: Chris Wilson Date: Tue May 12 09:28:34 2015 +0100 igt/gem_mmap/huge-bo: Fix cut'n'paste error One paste too many before pushing. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90411 Signed-off-by: Chris Wilson commit 357073c257fddea385a94923024ad142cb3056ec Author: Chris Wilson Date: Mon May 11 17:35:35 2015 +0100 igt/gem_streaming_writes: Trim number of batch buffers allocated Reduce memory usage for batches by a factor of 64 - which we immediately spend some of in increasing the stress. Signed-off-by: Chris Wilson commit 5f932c4dad73b276fda5b2a44b15fc922af1a35e Author: Damien Lespiau Date: Mon May 11 19:31:26 2015 +0100 quick_dump/skl: Add more pipe/plane registers With the recent developments, add scaler and NV12 registers to the dump. Also add the cursor registers that were missing in the first batch. Signed-off-by: Damien Lespiau commit f6155ac30c0f195845200174abc41d71279bef49 Author: Damien Lespiau Date: Mon May 11 17:53:44 2015 +0100 build: Add missing line continuation When -lrt was added, it was missing a '\' at the end of line. Add it. Cc: Tim Gore Cc: Thomas Wood Signed-off-by: Damien Lespiau commit 09ea86eac13d319fe6a1b84b0b1ff1db1bb86189 Author: Damien Lespiau Date: Mon May 11 16:36:51 2015 +0100 kms_cursor_crc: Move comment to the appropriate place Signed-off-by: Damien Lespiau commit 672238dbf76704019d6248e6031479afb8888d3f Author: Chris Wilson Date: Mon May 11 15:06:30 2015 +0100 igt: Add gem_streaming_writes This tries to replicate the missing barrier observed when using asynchronous mmap(wc) on byt. Signed-off-by: Chris Wilson commit d9dd33c0d93d5d1a1f9ff3a4a5059367931cadae Author: Damien Lespiau Date: Mon May 11 15:08:58 2015 +0100 lib: Add missing '\n' to error message Those messages where missing a new line at the end. Take the opportunity to re-format the messages to fit in the 80 chars limit. Signed-off-by: Damien Lespiau commit 9b0a32dc80b6b0c0f35d06fc833f29510efccd72 Author: Chris Wilson Date: Sun May 10 09:09:54 2015 +0100 lib/core: Limit fatal signal CRASH reporting to the fatal signals Signed-off-by: Chris Wilson commit cb57cdc6327f100ade8d205f6bd2da05cf78c3a4 Author: Damien Lespiau Date: Thu May 7 18:17:32 2015 +0100 skl_compute_wrpll: Prefer even dividers Signed-off-by: Damien Lespiau commit b3ef2986caebe89adc3fa8a967503f738c38a4da Author: Damien Lespiau Date: Thu May 7 18:17:08 2015 +0100 skl_compute_wrpll: Count how many even/odd dividers we compute Signed-off-by: Damien Lespiau commit 8d1739dd84070d8bad0b2940b0026f14cb50f13d Author: Damien Lespiau Date: Thu May 7 16:54:21 2015 +0100 skl_compute_wrpll: Make sure we respect the DCO frequency constraints We might as well verify that we have a semblance of all being in order by making sure the DCO frequency is within the expected bounds. Signed-off-by: Damien Lespiau commit acbcdbd8b71604fc0578894eb8f19d926fd8e55b Author: Damien Lespiau Date: Tue May 5 16:31:37 2015 +0100 skl_compute_wrpll: Add a way to test the SKL WRPLL algorithm I had various problems (infinite loops, unable to compute dividers for certain frequencies) after implementing a BSpec update. Much easier to debug that in userspace. Signed-off-by: Damien Lespiau commit 5dbeebc8aadab79047aab978766d8a5677de9b2d Author: Damien Lespiau Date: Tue May 5 15:45:21 2015 +0100 compute_wrpll: Rename ddi_compute_wrpll to hsw_compute_wrpll We're going to add the SKL version, time to rename the HSW/BDW one. Signed-off-by: Damien Lespiau commit 09f4175889a2107691a9e21d27d74fcd572121b0 Author: Chris Wilson Date: Fri May 8 16:44:40 2015 +0100 igt/gem_mmap_gtt: Add pagefault-of-doom failure case This is a test that should be a showcase for partial views... Signed-off-by: Chris Wilson commit 578795ff9549f680d426879cf19ef6124a51fcc4 Author: Chris Wilson Date: Fri May 8 14:35:37 2015 +0100 lib: Teach igt to handle signal failures gracefully If we see a fatal signal in a subtest, fail. Signed-off-by: Chris Wilson commit be955173d0481dd7f5dabe4a8531811d17e66470 Author: Chris Wilson Date: Fri May 8 11:43:50 2015 +0100 igt/gem_mmap_gtt: Check GTT mmapping of large tiled objects Move function CPU mmap test of large bo to gem_mmap, and include a page-by-page copy between two huge objects (as we have had many bugs triggering pagefault-of-doom for full apertures before). Signed-off-by: Chris Wilson commit cf9f48e704030b606260919f2da4c4287e51c4af Author: Paulo Zanoni Date: Thu Feb 19 15:41:15 2015 -0200 lib: add igt_draw For all those IGT tests that need an easy way to draw rectangles on buffers using different methods. Current planned users: FBC and PSR CRC tests. There is also a tests/kms_draw_crc program to check if the library is sane. v2: - Move the test from lib/tests to tests/ (Daniel). - Add igt_require() to filter out the swizzling/tiling methods we don't support (Daniel). - Simplify reloc handling on the BLT case (Daniel). - Document enum igt_draw_method (Daniel). - Document igt_draw_get_method_name() (Paulo). v3: - Add IGT_DRAW_MMAP_WC (Chris). - Implement the other trivial swizzling methods (Chris). - Remove the gem_sync() calls (Chris). Signed-off-by: Paulo Zanoni commit 8d3023c15bcc9890ab7b89fa8ae4564a295078c2 Author: Paulo Zanoni Date: Tue May 5 16:20:05 2015 -0300 tests/kms_fbc_crc: fix debugfs read Commit 47f6b1305cc3752f318a555b932e194e1500c1d8 completely broke this test due to the fread() assertion. When we're reading the debugfs file we really don't care about how many bytes we read because the number is not constant and we just use strstr() later. Change the assertion to make it check for at least 1 byte read, just to make sure no one changes that again. Regression introduced by: commit 47f6b1305cc3752f318a555b932e194e1500c1d8 Author: Thomas Wood Date: Wed Mar 25 16:42:57 2015 +0000 igt.cocci: check the return values of various functions Cc: Thomas Wood Signed-off-by: Paulo Zanoni commit 159562c8251d3bd27d338ea7ac6a2936becd05c2 Author: Daniele Ceraolo Spurio Date: Wed May 6 15:01:30 2015 +0100 tests/gem_ppgtt: Check for vm leaks with flink and ppgtt Using imported objects should not leak i915 vmas (and vms). In practice this simulates Xorg importing fbcon and leaking (or not) one vma per Xorg startup cycle. v2: use low-level ioctl wrappers and bo offset to check the leak (Chris) v3: use the flinked bo as batch (Chris) v4: add check on offset, remove unneeded assignments (Chris) Signed-off-by: Tvrtko Ursulin Signed-off-by: Daniele Ceraolo Spurio (v2+) Reviewed-by: Chris Wilson Cc: Chris Wilson Cc: Tvrtko Ursulin Signed-off-by: Daniel Vetter commit aa720ffaf59da0802fe58bd5850075432f644f40 Author: Daniel Vetter Date: Wed May 6 11:38:06 2015 +0200 lib/mmio: One more s/OUTRET/OUTREG/ A those typos ... Signed-off-by: Daniel Vetter commit 9bb2ca3a83efd528c11c8515ad85456d53717619 Author: Daniel Vetter Date: Wed Mar 25 21:15:34 2015 +0100 lib/batchbuffer: Fix COLOR_BLIT_COPY_BATCH_START Reviewed-by: Paulo Zanoni Signed-off-by: Daniel Vetter commit c0ed7d344af4d60d2c9663041233c3e0fbc2dc38 Author: Paulo Zanoni Date: Tue Mar 24 17:35:10 2015 -0300 tests/kms_fbc_crc: remove redundant information from data_t While it is nice to have shorter names for the most-accessed variables, it makes the code more difficult to read since it's not clear to the code reader whether that "gem_handle" is from some FB or something else. The reader also has to audit the code to see if, for example, the value of data->handle[0] stays consistent with data->fb[0].gem_handle all the tame or if at some point the value is replaced with something else. So remove the redundant information, making it explicit that we're using the gem handles and FB IDs of the framebuffers all the time. Signed-off-by: Paulo Zanoni commit 235e87de450714df9982fb86fae2dd5a9e8e2980 Author: Paulo Zanoni Date: Tue Mar 24 17:11:05 2015 -0300 tests/kms_fbc_crc: use igt_pipe_crc_collect_crc() Instead of its hardcoded implementation. Signed-off-by: Paulo Zanoni commit 26ff2c7daac88e12969530a62703913ba9ee0fe3 Author: Paulo Zanoni Date: Fri Dec 5 13:40:00 2014 -0200 tests/kms_fbc_crc: add wait_for_fbc_enabled() The code has a common pattern of "wait 300ms, then check if FBC is enabled". Most of the time FBC is enabled in either 50ms or 0ms, so introduce wait_for_fbc_enabled(), which can return much earlier if FBC is actually enabled before the 300ms timeout. Signed-off-by: Paulo Zanoni commit 9bb04d3aa6a2b1b86e091967e312a19ce337df4d Author: Paulo Zanoni Date: Wed Dec 3 16:12:49 2014 -0200 lib: add igt_wait() Just a little helper for code that needs to wait for a certain condition to happen. It has the nice advantage that it can survive the signal helper. Despite the callers added in this patch, there is another that will go in a separate patch, and another in a new IGT test file that I plan to push later. v2: Check COND again before returning in case we hit the timeout. Signed-off-by: Paulo Zanoni commit a734ac2058fd0cce842a4290335c0697d89b2d63 Author: Jani Nikula Date: Tue Apr 28 13:31:30 2015 +0300 rename global mmio variable to igt_global_mmio Global variable names should reflect the fact that they are indeed global, and at the very least they should not be as short as just "mmio". Rename mmio to igt_global_mmio. Signed-off-by: Jani Nikula commit db84a8cf143f5d343220eb1d85a20b8b3da4036c Author: Jani Nikula Date: Tue Apr 28 11:39:22 2015 +0300 tests/gen7_forcewake_mt: use local mmio variable igfx_get_mmio() uses the global mmio variable by accident. Use a local variable instead. The intention is to rename the global variable later on, so shadowing it here does not matter. Signed-off-by: Jani Nikula commit 0bbbc6360fb1b7adf325ada1bdf7e200ceb8c5c4 Author: Jani Nikula Date: Tue Apr 28 13:34:13 2015 +0300 intel_vga_{read,write}: use INREG and OUTREG Use INREG and OUTREG instead of using mmio directly. Signed-off-by: Jani Nikula commit 33c2e8b083953401949a9540f47ebb5770e4b543 Author: Jani Nikula Date: Tue Apr 28 13:25:35 2015 +0300 intel_display_poller: use INREG and OUTREG Use INREG and OUTREG instead of using mmio directly. Signed-off-by: Jani Nikula commit fb1515c170b01575dc18d24879dd20bc300db22d Author: Jani Nikula Date: Wed Apr 15 15:50:19 2015 +0300 intel_watermark: switch to INREG Use INREG instead of using mmio directly. Signed-off-by: Jani Nikula commit 12d785bcd47396b477cca206e5db2158d02ffd5b Author: Jani Nikula Date: Wed Apr 15 15:47:34 2015 +0300 intel_reg_{read,write}: switch to INREG and OUTREG Use INREG and OUTREG instead of using mmio directly. Signed-off-by: Jani Nikula commit 87eb37c86b5c4212e48cae1a05a9c21b7ff03e3e Author: Jani Nikula Date: Wed Apr 15 15:45:25 2015 +0300 intel_reg_checker: switch to INREG Use INREG instead of using mmio directly. Signed-off-by: Jani Nikula commit e9f4c5f9b92ade8465414d3a461d490bf7861476 Author: Jani Nikula Date: Wed Apr 15 15:39:55 2015 +0300 intel_backlight: switch to INREG and OUTREG Use INREG and OUTREG instead of using mmio directly. Signed-off-by: Jani Nikula commit 510ac32db14e5e847aaf998992f69768c7fffc41 Author: Jani Nikula Date: Wed Apr 15 15:42:00 2015 +0300 intel_reg: switch to INREG and OUTREG Use INREG and OUTREG instead of using mmio directly. Signed-off-by: Jani Nikula commit 23b7f089207e44244ecc5757a2be5263db08581b Author: Jani Nikula Date: Tue Apr 28 11:52:42 2015 +0300 lib: add 16 and 8 bit versions of INREG and OUTREG Add INREG8, INREG16, OUTREG8, and OUTREG16. While at it, cleanup doc comments of INREG and OUTREG. Signed-off-by: Jani Nikula commit 30e84df0c110971cc07cc81fdbf66aa9e7840bc6 Author: David Herrmann Date: Mon May 4 20:15:54 2015 +0200 tests: add drm_auth tests for generic DRM-auth-magic testing This adds tests/drm_auth.c which tests for drmGetMagic() and drmAuthMagic() deficiencies. Signed-off-by: David Herrmann Signed-off-by: Daniel Vetter commit 3be592001b6944433490d491596694ca66bd134f Author: Michel Thierry Date: Tue Apr 14 16:42:58 2015 +0100 igt/gem_ctx_exec: Add lrc lite restore subtest Exercise lite-restore (re-submit a context that is currently running), by queueing several small batchbuffers. This test helps to validate WaIdleLiteRestore. Signed-off-by: Michel Thierry commit c4ec47b46d7e716f153a904c5a5b5b01a5afc7de Author: Chris Wilson Date: Sun May 3 09:16:25 2015 +0100 igt/gem_exec_lut_handle: Force slow relocation path Signed-off-by: Chris Wilson commit c317b788c09e047c951b36a4a8acbce9f8d2f03e Author: Tvrtko Ursulin Date: Thu Apr 30 12:27:54 2015 +0100 igt_fb: Close the image file when we are done with it Signed-off-by: Tvrtko Ursulin Signed-off-by: Thomas Wood commit 48a27bcaf6a284235c41ce196b4969a472f264e6 Author: Tim Gore Date: Mon Apr 27 16:17:50 2015 +0100 lib/igt_core.c : only disable low mem killer once The call to low_mem_killer_disable(true) was being done from within function oom_adjust_for_doom. However, oom_adjust_for_doom gets called from 3 places. We only want the call to low_mem_killer_disable(true) to happen during common_init, so call it from here instead of from oom_adjust_for_doom. v2:Thomas Wood pointed out that the initial call to disable the low_mem_killer does not get made when we are just listing subtests; so I have qualified the call from the exit handler, which re-enables the low_mem_killer, with if (!igt_only_list_subtests()). For belt and braces I have also made low_mem_killer_disable idempotent, so multiple calls to disable or re-enable are safe. Signed-off-by: Tim Gore [Thomas: small coding style fix] Signed-off-by: Thomas Wood commit 637f0455da91c91eedae1245464b45f0c3f7310e Author: Tvrtko Ursulin Date: Mon Apr 27 12:29:11 2015 +0100 kms_rotation_crc: Do not leak framebuffers during test duration Test used to call prepare_crtc twice in the plane loop and leaked two framebuffers per [subtest]x[pipe]x[plane]. What the loops really wants to do, instead of second invocation of prepare_crtc, is to just turn on the display with the unrotated fb to verify that the plane property has been restored by the VT transition from previous to graphics mode. To enable that factor out code which does that from prepare_crtc into commit_crtc and call it instead. Signed-off-by: Tvrtko Ursulin Cc: Sonika Jindal Signed-off-by: Thomas Wood commit 4650d3406cd2e1378b215793730b59c065c230d4 Author: Jani Nikula Date: Tue Apr 14 22:33:33 2015 +0300 man: add man page for intel_reg in reStructured text format Produce the intel_reg man page from rst using rst2man. Also facilitate writing any man page in reStructured text, as long as rst2man is available. v2: configure check for rst2man, credits to Thomas Wood for that. Signed-off-by: Jani Nikula commit 30a1360f6abeed5f7aaaa069380d07f94ae9a036 Author: Tvrtko Ursulin Date: Wed Apr 29 13:24:34 2015 +0100 igt_fb: Transfer existing content to Cairo surface for Y/Yf frame buffers Rendering into Y and Yf tiled frame buffers with Cairo was losing the previous content ie. was starting from black. This is different than the behaviour with linear and X tiled so make it the same by blitting the initial content when creating the rendering context. Signed-off-by: Tvrtko Ursulin Cc: Damien Lespiau Signed-off-by: Damien Lespiau commit fc69bb0de5f072be45e327bfff0efade6880a1a9 Author: Chris Wilson Date: Mon Apr 27 21:05:33 2015 +0100 igt/gem_exec_big: Check 64bit relocation values On gen8, we should check that the full 64bit relocation value is correct, and we should be sure to poison the relocation offset between runs. Signed-off-by: Chris Wilson commit 40b45bace325b13519c4ddc71eb64665c7796350 Author: Thomas Wood Date: Mon Apr 27 17:34:41 2015 +0100 tools: add missing header to distributed sources Make sure all the sources for intel_reg are included in the distribution. Signed-off-by: Thomas Wood commit bad8834ee77e7defb3e1ceb150b07bf6e82d4693 Author: Thomas Wood Date: Mon Apr 27 15:32:41 2015 +0100 tools: update .gitignore Signed-off-by: Thomas Wood commit a3e336e4614613e30b2bb2cd21b76c1c69614475 Author: Joonas Lahtinen Date: Fri Apr 24 10:38:58 2015 +0300 tests/gem_mmap_gtt: Use PAGE_SIZE instead of hard coded value Now that there is PAGE_SIZE define, use it. Signed-off-by: Joonas Lahtinen Signed-off-by: Thomas Wood commit dbf6468f90f864decc79cb5c5802cb4d230fb46d Author: Tvrtko Ursulin Date: Wed Apr 22 16:46:48 2015 +0100 kms_rotation_crc: Use main test for negative cases Saves a good amount of code duplication by supporting expected failures from the main loop. Signed-off-by: Tvrtko Ursulin Cc: Sonika Jindal Reviewed-by: Sonika Jindal Signed-off-by: Thomas Wood commit 6f5d400ae9323a7c1c616d591876f29ca0ad0f10 Author: Tvrtko Ursulin Date: Wed Apr 22 16:46:47 2015 +0100 kms_rotation_crc: No need to square the buffer in paint Now that size is calculated in a single place and correct geometry passed in, paint squares does not need to concern itself with it. Signed-off-by: Tvrtko Ursulin Cc: Sonika Jindal Reviewed-by: Sonika Jindal Signed-off-by: Thomas Wood commit b769a7c96b4ccf33b9ea75f4d99856995b5ac571 Author: Tvrtko Ursulin Date: Wed Apr 22 16:46:46 2015 +0100 kms_rotation_crc: Consolidate plane and cursor code paths There can only be one, either a plane or a cursor, in each subtest so there is no need for two framebuffer varilables and also some codepaths can be unified. Signed-off-by: Tvrtko Ursulin Cc: Sonika Jindal Reviewed-by: Sonika Jindal Signed-off-by: Thomas Wood commit e23a818c180bfd81ec2eeb1e9ac55223f4bf9658 Author: Tvrtko Ursulin Date: Wed Apr 22 16:46:45 2015 +0100 kms_rotation_crc: Negative test does not need to render anything Signed-off-by: Tvrtko Ursulin Cc: Sonika Jindal Reviewed-by: Sonika Jindal Signed-off-by: Thomas Wood commit 148c0d22816f170284edc4232fc58bff58bd1e28 Author: Tvrtko Ursulin Date: Wed Apr 22 16:46:44 2015 +0100 kms_rotation_crc: Remove unused variable in negative test Signed-off-by: Tvrtko Ursulin Cc: Sonika Jindal Reviewed-by: Sonika Jindal Signed-off-by: Thomas Wood commit d9011062404a37929bcfb7f1dbfbd9d901215e6f Author: Tvrtko Ursulin Date: Wed Apr 22 16:46:43 2015 +0100 kms_rotation_crc: Framebuffer used for initial modeset does not need to be painted It is just there to light up the display using the full modeset. Also renamed it from fb_full to fb_modeset to be more descriptive. Signed-off-by: Tvrtko Ursulin Cc: Sonika Jindal Reviewed-by: Sonika Jindal Signed-off-by: Thomas Wood commit 4dd79d13c94a48c1d346eddb4936d0990c55fdab Author: Tvrtko Ursulin Date: Wed Apr 22 16:46:42 2015 +0100 kms_rotation_crc: Local framebuffers do not need to be global Signed-off-by: Tvrtko Ursulin Cc: Sonika Jindal Reviewed-by: Sonika Jindal Signed-off-by: Thomas Wood commit 019ae907ffcb6c4470ddb114a4d0de9634dc4fef Author: Chris Wilson Date: Sun Apr 26 12:16:44 2015 +0100 lib: Fix types for gem_mmap* Signed-off-by: Chris Wilson commit fb950bc17ff8dfa3235535a12f0c4dcde281b2e3 Author: Chris Wilson Date: Mon Apr 13 19:04:13 2015 +0100 lib: Cache static queries We frequently check for device capabilities, for which we can safely assume that there is but one on a system and so cache the first query value and return it for all future queries. The benefit is to reduce dmesg debug spam which helps when either bringing up a test or trying to track down why a test fails. Signed-off-by: Chris Wilson commit 10f903aa23932e8bce383ee56db8aaefd73dfb28 Author: Chris Wilson Date: Sun Apr 26 11:21:10 2015 +0100 igt/gem_pwrite: Check that mmap(wc) succeeds Signed-off-by: Chris Wilson commit cd812a4e89db0150bfcff6d91ffffea37dc106c9 Author: Chris Wilson Date: Sun Apr 26 11:18:28 2015 +0100 igt/gem_pwrite: Delete unused mmap(wc) for the big CPU test Signed-off-by: Chris Wilson commit 49bcdc84a3e420a420bce9798b683a02273373f4 Author: Chris Wilson Date: Sun Apr 26 10:39:06 2015 +0100 igt/gem_pwrite: Also test surfaces larger than the GTT Go big or go home! Signed-off-by: Chris Wilson commit 236bab5cfd2d225d1eeec32d4bfa5f0757952975 Author: Chris Wilson Date: Sun Apr 26 11:11:55 2015 +0100 lib: Fix types for gem_create() Signed-off-by: Chris Wilson commit 263da26b9c2ce33a4b6aac05acf97b21fe51d70f Author: Chris Wilson Date: Sun Apr 26 10:16:39 2015 +0100 intel-gpu-overlay: Improve error message for failure to open an output Signed-off-by: Chris Wilson commit be6e32b9254f2740da0a287caf2eaa1d745b77a3 Author: Chris Wilson Date: Sun Apr 26 10:13:49 2015 +0100 igt/gem_pwrite: Test handling of larger than mappable buffers Signed-off-by: Chris Wilson commit dfda0b6aeccef464cc6f1af60d8ea16c11fb13f7 Author: Jani Nikula Date: Wed Dec 10 14:27:07 2014 +0200 intel_reg: introduce one intel_reg tool to rule them all Three Tools for the Elven-kings under the sky, Seven for the Dwarf-lords in their halls of stone, Nine for Mortal Men doomed to die, One for the Dark Lord on his dark throne In the Land of Mordor where the Shadows lie. One Tool to rule them all, One Tool to find them, One Tool to bring them all and in the darkness bind them In the Land of Mordor where the Shadows lie. J.R.R. Tolkien's epigraph to The Lord of The Tools | sed 's/Ring/Tool/g' Introduce intel_reg as the one Intel graphics register multitool to replace intel_reg_read, intel_reg_write, intel_iosf_sb_read, intel_iosf_sb_write, intel_vga_read, intel_vga_write, intel_reg_dumper, intel_reg_snapshot, and quick_dump.py. Signed-off-by: Jani Nikula commit e1ce5eac338f44deda488a44db04faceea12f13a Author: Sonika Jindal Date: Wed Apr 22 16:44:05 2015 +0530 kms_rotation_crc: Adding test for 90/270 rotation Adding 90/270 rotation testcase for primary and sprite planes. v2: Added position test for sprite. Checking for gen > 9 for 90/270. Some cleanup and rebase. v3: Added test for unsupported tiling and unsupported pixel format for 90/270 v4: Added the legacy commit to initiate modeset in the negative test(Tvrtko) Signed-off-by: Sonika Jindal Reviewed-by: Tvrtko Ursulin Signed-off-by: Thomas Wood commit 7ef80c0a980bc6b2cb58de7aec443b343ac0d33e Author: Sonika Jindal Date: Tue Apr 7 13:59:03 2015 +0530 lib/igt_kms: Let set_property return the result Return the return value of the set_property ioctl and add check for the failure. Signed-off-by: Sonika Jindal Reviewed-by: Tvrtko Ursulin Signed-off-by: Thomas Wood commit 7aeecc197bcf586fe5b8e2091cf3e647991382f9 Author: Tim Gore Date: Wed Apr 22 10:29:08 2015 +0100 tests/Android.mk : skip kms_legacy_colorkey if no cairo test kms_legacy_colorkey depends on cairo, so add it to the list of test not to build unless "ANDROID_HAS_CAIRO" is set. Signed-off-by: Tim Gore Signed-off-by: Thomas Wood commit 20ad3e55fbd33f4400d16d4186befd7e2e5d19ac Author: Tim Gore Date: Tue Apr 21 17:08:17 2015 +0100 tools/quick_dump/makefile.am: add -lrt to get clock_gettime Attempting to build IGT on linux without libunwind fails due to tools/quick_dump not linking the rt library, causing an undefined symbol error for clock_gettime. Adding -lrt to the list of libraries in Makefile.am fixes this. Signed-off-by: Tim Gore Signed-off-by: Thomas Wood commit 52888df084f51899e7e873a24f6c1aa5c66dd191 Author: Tim Gore Date: Tue Apr 21 14:53:03 2015 +0100 lib/drmtest.h : fix mmap64 again In android mmap64 was redirected to mmap2 because mmap64 was not alway available. But now mmap2 has been removed from 64 bit android builds (and mmap64 is available), so update preprocessor conditional to check for __x86_64__. Signed-off-by: Tim Gore Signed-off-by: Thomas Wood commit 5b7edb9cb010fc770f069a2fbba2782ea3ee6936 Author: Thomas Wood Date: Mon Apr 20 12:35:01 2015 +0100 docs: avoid escaping characters in documentation comments Avoid having to escape certain characters in documentation comments by not allowing docbook markup tags. Markdown formatting in documentation comments is still supported. Signed-off-by: Thomas Wood commit cc9110c44733f63d1c81fc546becf7b22fbac394 Author: Mike Mason Date: Fri Apr 17 15:10:35 2015 -0700 tests/tools_test: Find tools in source or installed locations Signed-off-by: Mike Mason Signed-off-by: Thomas Wood commit 36ecc3180a8404c5c9a4ac4db09e69d9679f0aab Author: Rodrigo Vivi Date: Tue Apr 14 18:04:01 2015 -0700 tests/kms_psr_sink_crc: Make render size and stride based on modified fb size Signed-off-by: Rodrigo Vivi commit c35247596033c8bd2fd4d834f3941a7075aa84c8 Author: Rodrigo Vivi Date: Fri Mar 13 12:11:54 2015 -0400 test/kms_psr_sink_crc: Add dpms off/on tests. Signed-off-by: Rodrigo Vivi commit 782d5e7a032d1a34ef7f45970a5d8025ec47aece Author: Rodrigo Vivi Date: Fri Mar 13 12:10:20 2015 -0400 test/kms_psr_sink_crc: Split plane setup operations No functional changes. This reorg will allow to do some operations like dpms off/on with different places to wait for psr to get active. Signed-off-by: Rodrigo Vivi commit fd9ef1b8c87e0016c8820aed0d42542894430b85 Author: Rodrigo Vivi Date: Fri Mar 13 12:28:07 2015 -0400 tests/kms_psr_sink_crc: remove timeout option from wait_psr_entry. No functional changes. Just making timeout unique for any case. Signed-off-by: Rodrigo Vivi commit ae9c685133c5a1f30418d6fda1ce898c11c7053c Author: Rodrigo Vivi Date: Tue Dec 9 20:44:11 2014 -0500 lib/igt_aux: Introduce igt_interactive_debug_manual_check. This is an extention of igt_debug_wait_for_keypress that also can have customized message and return key pressed. v2: This is actualy a v2. V1 was an extension of original igt_debug_wait_for_keypress but it was nacked. v3: Make [Y/n] check inside aux function as suggested by Daniel. Also renaming and adding first use case along with the axu function. v4: Simplify function name and make it assert pressed key is different from n/N as suggested by Daniel. Cc: Daniel Vetter Signed-off-by: Rodrigo Vivi commit e1ac04462d94a9f51335b9f3849ce0bb29b534e4 Author: Rodrigo Vivi Date: Fri Dec 5 20:03:43 2014 -0500 tests/kms_psr_sink_crc: Add manual mode. Sink CRC is the most reliable way to test PSR. However in some platforms apparently auto generated packages force panel to keep calculating CRC invalidating our current sink crc check over debugfs. So, this manual test help us to find possible gaps on this platforms where we cannot trust on sink crc checks. v2: Accept Daniel's suggestions: * Avoid strcpy * don't override assert definition * Make --interactive-debug for every testcases instead using local --manual v3: Sink CRC can be unreliable for other platforms as well so let's skip and warn when we detect the misbehaviour instead hardcoded per platform. Cc: Daniel Vetter Signed-off-by: Rodrigo Vivi commit b7b2ecbaefc86debf858141e3d8712a28cfb2b21 Author: Rodrigo Vivi Date: Fri Dec 5 20:03:31 2014 -0500 tests/kms_psr_sink_crc: Make plane_move visible to human eyes this will allow manual tests when crc isn't available. Signed-off-by: Rodrigo Vivi commit 00992f7d86b6c821030738932a722c581fd75b5d Author: Rodrigo Vivi Date: Fri Dec 5 20:01:41 2014 -0500 tests/kms_psr_sink_crc: Make mmaps visible to human eyes this will allow manual tests when crc isn't available. Signed-off-by: Rodrigo Vivi commit f20690d864b5483026a9147bb1cab2b009a87de4 Author: Rodrigo Vivi Date: Fri Dec 5 19:45:37 2014 -0500 tests/kms_psr_sink_crc: Make render visible to human eyes This will allow manual tests when crc isn't available. v2: Remove unused and non-sense buf->size and decrease buf->stride a bit as suggested by Daniel. v3: Fix v2 mistake and get buf->size back with a value that makes more sense. TBD: to be changed for variable size depending on modified fb size on following patch Cc: Daniel Vetter Signed-off-by: Rodrigo Vivi commit 3cb21246c1310c2f34c2dc99c893cab060333cb0 Author: Rodrigo Vivi Date: Fri Dec 5 19:43:34 2014 -0500 tests/kms_psr_sink_crc: Make blt visible to human eyes This will allow manual tests when crc isn't available. Signed-off-by: Rodrigo Vivi commit 1cbe7dd54cc95281407f10e55f51a201b526b245 Author: Thomas Wood Date: Thu Apr 16 17:40:28 2015 +0100 tests: update .gitignore Signed-off-by: Thomas Wood commit 2b74b2bb3358f80c72240d1a5ea6f304b21fba8d Author: Ville Syrjälä Date: Fri Mar 27 20:51:46 2015 +0200 tests: Add kms_legacy_colorkey Add a quick test to make sure the legacy set colorkey ioctl only works for sprite planes. v2: Drop igt_fixtures Signed-off-by: Ville Syrjälä commit 4271b15f3c8df92f7f0e5201b292644d66da0054 Author: Ville Syrjälä Date: Thu Apr 9 21:23:06 2015 +0300 quick_dump: Fix undefined symbols from libunwind ../../lib/.libs/libintel_tools.a(igt_core.o): In function `print_backtrace': intel-gpu-tools/lib/igt_core.c:981: undefined reference to `_Ux86_64_getcontext' intel-gpu-tools/lib/igt_core.c:982: undefined reference to `_ULx86_64_init_local' intel-gpu-tools/lib/igt_core.c:983: undefined reference to `_ULx86_64_step' intel-gpu-tools/lib/igt_core.c:987: undefined reference to `_ULx86_64_get_proc_name' Signed-off-by: Ville Syrjälä commit 3dff4af5e053b9b64b1167621088ed8eea9e3222 Author: Ville Syrjälä Date: Thu Apr 9 21:20:25 2015 +0300 quick_dump: Don't allow undefined symbols in _chipset.so Every time _chipset.so has undefined symbols we fail to notice it at build time and then get to wonder why quick_dump fails to actually work. Pass -Wl,--no-undefined to the linker to get a build time error instead of the current runtime error. Signed-off-by: Ville Syrjälä commit beddb3be3ffcd61b67a5d541134a5e76685e6f14 Author: Chris Wilson Date: Tue Apr 14 19:02:19 2015 +0100 igt/gem_exec_lut_handle: Hide exec latency The first test tries to rewrite relocations in an active batch, which is a useful test and measurement. However, the overhead of the exec may dominate and so we want a measurement without that overhead as well. Using a pool of batches should allow for the oldest to idle whilst we setup the next (and so the wait should be non-existent). Signed-off-by: Chris Wilson commit ecb03266b208bd95d160b8fb32d14fda87c5eb10 Author: Thomas Wood Date: Mon Apr 13 17:37:22 2015 +0100 lib: load images from the data directory in igt_paint_image Update igt_paint_image so that it can read images from the package data directory. Signed-off-by: Thomas Wood commit 90dadcd0da63d70155bb4c5a40c80a4f5c3e821c Author: Thomas Wood Date: Mon Apr 13 12:09:48 2015 +0100 lib: use a critical warning when unable to open a data file Signed-off-by: Thomas Wood commit 8b3082a40e9a17fcd411aabc5c24c2e2ada5c13a Author: chandra konduru Date: Mon Mar 30 13:53:00 2015 -0700 i-g-t: Adding panel fitting test case This patch is adding i-g-t test case to test panel fitting usages. v2: -use new tiled types when calling igt_create_fb (me) Signed-off-by: chandra konduru [Thomas: convert test to use igt_simple_main] Signed-off-by: Thomas Wood commit a26f9f9ad0e679c7ce413a25d34f6914e1174151 Author: chandra konduru Date: Mon Mar 30 13:52:04 2015 -0700 i-g-t: Adding plane scaling test case This patch is adding i-g-t plane scaling test case to test couple basic display plane scaling usages. Additional test scenarios can be added later. v2: -Added iterative scaling to visually observe scaling (me) v3: -Added a flag to control primary plane scaling (me) v4: -Use new tiled types when calling igt_create_fb (me) Signed-off-by: chandra konduru [Thomas: convert test to use igt_simple_main] Signed-off-by: Thomas Wood commit ace4208702c59205754507bec0c9ae4401a4f865 Author: chandra konduru Date: Mon Mar 30 13:44:32 2015 -0700 i-g-t: Adding test case to test background color. Adding i-g-t test case to test display crtc background color. v2: - Added IGT_TEST_DESCRIPTION() (Thomas Wood) - Added to .gitignore (Thomas Wood) - Added additional details to function header (Thomas Wood) - Simplified igt_main (Thomas Wood) v3: - rebased to latest master (me) - took sleep calls out (Daniel) - use new tiled types when calling igt_create_fb (me) Signed-off-by: chandra konduru [Thomas: convert test to use igt_simple_main] Signed-off-by: Thomas Wood commit e371b3fbad2e45cfe669953ef4203e9f44659f65 Author: Joonas Lahtinen Date: Tue Apr 14 14:14:57 2015 +0300 tests/gem_mmap_gtt: add huge BO test Add a straightforward test that allocates a BO that is bigger than (by 1 page currently) the mappable aperture, tests mmap access to it by CPU directly and through GTT in sequence. Currently it is expected for the GTT access to gracefully fail as all objects are attempted to get pinned to GTT completely for mmap access. Once the partial view support is merged to kernel, the test should pass for all parts. v2: - Corrected BO domain handling (Chris Wilson) - Check again after GTT access for added paranoia (Chris Wilson) v3: - Avoid flush by using pread (Chris Wilson) - Free gtt_pattern buffer too. v4: - Add more comments (Tvrtko Ursulin) - Use igt_require (Tvrtko Ursulin) v5: - Remove wrong message from igt_require_f (Tvrtko Ursulin) - After digging deeper to it, just igt_assert that the CPU mapping needs to succeed. Cc: Tvrtko Ursulin Cc: Chris Wilson Signed-off-by: Joonas Lahtinen Reviewed-by: Tvrtko Ursulin [Thomas: remove unused label] Signed-off-by: Thomas Wood commit 577fb75ed88d01f86dbfa593d90cb91ebfa37a2b Author: Joonas Lahtinen Date: Wed Apr 8 15:55:41 2015 +0300 tests/gem_mmap_gtt: clarify BO domain setting functions Add suffix and complementary function for CPU domain. v2: - Change function signatures to be consistent with the rest Signed-off-by: Joonas Lahtinen Signed-off-by: Thomas Wood commit 629759c2d1fea11a111ee79faf6afd08ff4c99d2 Author: Thomas Wood Date: Thu Apr 9 16:34:12 2015 +0100 NEWS: Updates Signed-off-by: Thomas Wood commit c06bba1256d8435fbcea45e54897ad533ad8c1e9 Author: Thomas Wood Date: Thu Apr 9 17:08:07 2015 +0100 tests: install the test list Cc: Joonas Lahtinen Signed-off-by: Thomas Wood commit e72686b83b0bb51a0266d61c3024a5f5a6e17af7 Author: Thomas Wood Date: Fri Mar 13 14:15:46 2015 +0000 tests: create a single combined test list All tests now respond in a consistent way such that separate lists for tests with and without subtests are no longer necessary. v2: fix other references to the test list Signed-off-by: Thomas Wood commit cff102ebb264eb86554651c7cbf259b4342b76c3 Author: Thomas Wood Date: Thu Apr 9 09:27:54 2015 +0100 lib: use test failure status for igt_set_timeout Use a failure status code for timeout to avoid confusion between tests that take too long to execute versus a failure due to an operation taking longer than expected. v2: Add a "timed out" message before exiting. (Daniel Vetter) Fix the timeout library check by disabling hard errors in xfail tests, since these share the same exit status as test failure. Signed-off-by: Thomas Wood commit b47032e191f0afb8d2dabf90889eee6dac8fc0e1 Author: Thomas Wood Date: Thu Apr 9 09:24:12 2015 +0100 lib: add a define for test failure exit status Signed-off-by: Thomas Wood commit 41fe1d1a4452891a297cea427a338c8769fc5c26 Author: Chris Wilson Date: Mon Apr 13 11:54:18 2015 +0100 lib: Implement gem_sync() using WAIT When synchronising to rendering, we only want to wait for it to complete and avoid the cache-domain side-effects of SET_DOMAIN if possible. This has the advantage of speeding up a few tests (and thereby making the actual test more explicit in terms of kernel operations). Of course some tests may be reliant on the side-effects... Signed-off-by: Chris Wilson Reviewed-by: Daniel Vetter commit 9fd6e07369837ee268097e7aae4c8dea05431fa1 Author: Chris Wilson Date: Mon Apr 13 10:48:08 2015 +0100 igt/prime_self_import: Ensure driver state is consistent between counts Similar to gem_flink_race, we need to make sure that when we count objects, the driver is in an identical state. We do this by flushing all work before counting. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90003 Signed-off-by: Chris Wilson commit 2e526ae9cd05f4f2c2e166071b78c68564e191aa Author: Chris Wilson Date: Sun Apr 12 13:32:17 2015 +0100 igt/gem_flink_race: Explicitly quiesce the GPU before counting objects By explicitly quiescing the GPU we force it to a known and ideally identical state when counting objects. In particular, this should make the batch-pool status the same and not cause us to detect a negative leak. Signed-off-by: Chris Wilson commit 007ff02cbcf008628476948cad8e9ea08c6f5f26 Author: Chris Wilson Date: Fri Apr 10 09:48:46 2015 +0100 igt/gem_mmap_wc: Explicitly check for use-after-close We already rely on the mmap(object) surviving close(), but make the test explicit and early. Secondly, we don't technically need to call set_domain after writing through the CPU then reading through WC, since the CPU cache is consistent for those two paths. Test it. Signed-off-by: Chris Wilson commit d36465d5205c5510ca4078346e47e8f3afc432e2 Author: liu,lei Date: Thu Apr 9 21:17:33 2015 +0800 Correct kms_fbc_crc case Debugfs i915_fbc_status shows "FBC unsupported on this chipset" not "unsupported by this chipset" if the platform doesn't support FBC feature. That typo will cause case fail on some platforms such as byt, bsw. Signed-off-by: Lei Liu commit b556c9e8e5f53874da902c0c54442ef3eb56353e Author: Shuang He Date: Tue Apr 19 04:16:06 2011 +0800 tests: Fix duplicate 'kms_flip_event_leak' entry in tests/Makefile.sources Or, it will cause piglit failure to run I-G-T test case Signed-off-by: Shuang He Signed-off-by: Daniel Vetter commit 1f6a64ee8078ac32c2986ee9f043c55ce6f22542 Author: Chris Wilson Date: Wed Apr 8 21:32:58 2015 +0100 igt/gem_exec_lut_handle: Put some operations back! In order to force relocations, we have to remember to clear the presumed offsets that get filled in by each pass. Signed-off-by: Chris Wilson commit e22525064d357a65f480873ef9d28985e9957237 Author: Chris Wilson Date: Wed Apr 8 20:22:11 2015 +0100 igt/gem_exec_lut_handle: Trim a few operations from submission Move all the execbuffer construction upfront and do it once per round, rather than per relocation pass. It helps reduce runtime, but more importantly it removes the test overhead from out of the kernel measurement. Signed-off-by: Chris Wilson commit 9d98ccb860f529ef0bef4bdffe0733ce348f1d6f Author: Thomas Wood Date: Wed Apr 8 11:46:39 2015 +0100 tests: use standard install prefix for programs, scripts and data Use the pkglibexec and pkgdata prefixes rather than setting bindir and datadir. This also removes the extra 'tests' directory from within the package libexec and data directories. Cc: Joonas Lahtinen Signed-off-by: Thomas Wood commit 4e11307e0786d6a4fac014136c914c019aa9abb4 Author: Thomas Wood Date: Wed Apr 8 11:23:05 2015 +0100 tests: ensure scripts and data are included in the distribution Prefix the test scripts and data variables with dist_ to ensure they are included in the distribution. Cc: Joonas Lahtinen Signed-off-by: Thomas Wood commit 564dfd45a99e688c0a450f911adb864f4d5bd6b5 Author: Thomas Wood Date: Thu Apr 2 11:50:01 2015 +0100 tests/kms_fbc_crc: fix fread() return value assertion Use 1 as the element size to check the number of bytes returned is greater than 0, rather than checking the number of elements returned. This fixes a regression from commit 47f6b13 (igt.cocci: check the return values of various functions). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89833 Signed-off-by: Thomas Wood commit 074d8b440ef37eeb5fc8195a84a8c970f385a563 Author: Imre Deak Date: Tue Mar 31 20:32:36 2015 +0300 tools/intel_reg_dumper: fix PIPECONF decode - decode the register for BXT too - decode interlace on VLV/CHV too - don't decode rotation and bpc on platforms where these fields are not defined Signed-off-by: Imre Deak commit 07a58707c3e3310c8cd87b7fdf53526090fad748 Author: Imre Deak Date: Tue Mar 31 20:32:35 2015 +0300 tools/intel_reg_dumper: fix DSPCNTR decode for BXT Signed-off-by: Imre Deak commit 7027227ca24dc4acfa93e772074b111cb0734d65 Author: Imre Deak Date: Tue Mar 31 20:32:34 2015 +0300 tools/intel_bios_read: fix SSC freq for BXT On BXT the SSC reference frequency is fixed 100MHz. Signed-off-by: Imre Deak commit 790398bbbdc759882255c6f19537c138bfa094a6 Author: Damien Lespiau Date: Tue Mar 31 20:32:33 2015 +0300 list-workarounds/bxt: Add Broxton to the list of valid platorms Signed-off-by: Damien Lespiau commit ab7619b5d2d6ef16dfee86f0bdfc4dbea3c6e931 Author: Damien Lespiau Date: Tue Mar 31 20:32:32 2015 +0300 lib/bxt: Add Broxton PCI ids v2: Rebase on top of the SKL upstreaming Signed-off-by: Damien Lespiau Signed-off-by: Ben Widawsky commit 6cd0ea090cc12dd1fb62a7ced97179ffc6dbb588 Author: Imre Deak Date: Tue Mar 31 20:32:31 2015 +0300 lib/intel_chipset: fix HAS_PCH_SPLIT on GEN9 In the next patch we'll add support for BXT which is GEN9, but doesn't have PCH, so fix the macro accordingly. No functional change. Signed-off-by: Imre Deak commit f0cbfb64dfff5fd1d44cf2986f8f85656ee61882 Author: Imre Deak Date: Tue Mar 31 20:32:30 2015 +0300 lib/intel_chipset: fix HAS_PCH_SPLIT on CHV CherryView is GEN8 but doesn't have PCH so fix the macro accordingly. Signed-off-by: Imre Deak commit 1dc4884875b1fa9f2e7ea82f26b6f361249426b8 Author: Imre Deak Date: Tue Mar 31 20:32:29 2015 +0300 tools/intel_bios_reader: fix SSC freq for VLV/CHV VLV/CHV has a fixed 100MHz SSC reference frequency. Signed-off-by: Imre Deak commit d9a25af39c873199210ce06209254ed456a06263 Author: Jani Nikula Date: Wed Apr 1 12:08:59 2015 +0300 README: Update dependencies Add libunwind-dev, sort the list. Signed-off-by: Jani Nikula commit 7968098fb7bdb086d611f543832591064d88397c Author: Jeff McGee Date: Fri Apr 3 18:01:12 2015 -0700 tests/pm_sseu: Require Gen8+ early in setup Pre-Gen8 devices should be skipped early instead of failing when test resources are not found. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89822 Signed-off-by: Jeff McGee commit a6c3b32622d3d1cd2f3cb67255cd006b99d3fabb Author: Chris Wilson Date: Mon Apr 6 10:37:41 2015 +0100 igt/kms_vblank: Simple accuracy test Queue 60 event to arrive at the same vblank from different points in time and make sure it just works. Signed-off-by: Chris Wilson commit 43a1f64e7222e9b5a8d7cb2b887002a8b539452e Author: Chris Wilson Date: Fri Apr 3 09:25:02 2015 +0100 igt/gem_cpu_reloc: Pretty print execbuf failures References: https://bugs.freedesktop.org/show_bug.cgi?id=85672 Signed-off-by: Chris Wilson commit 71de427b53582348f96974920dd40d4b4d3163a0 Author: Chris Wilson Date: Fri Apr 3 09:07:09 2015 +0100 igt/gem_persistent_relocs: Add note about known byt/full-ppgtt issue References: https://bugs.freedesktop.org/show_bug.cgi?id=84859 Signed-off-by: Chris Wilson commit e8457edba6c41c4d44758e28adabf864be764c00 Author: Chris Wilson Date: Thu Apr 2 20:14:07 2015 +0100 igt/gem_exec_blt: Prevent assertion failure when running as a test load gem_exec_blt is used by other scripts to provide a background load, for example by drv_missed_irq. This mode doesn't act like a normal test and igt complains bitterly about it. Let's just ignore igt here. References: https://bugs.freedesktop.org/show_bug.cgi?id=88041 Signed-off-by: Chris Wilson commit 8938e1ed474bc4eb6598d5da01bb7001d4e9627d Author: Tim Gore Date: Wed Apr 1 16:56:38 2015 +0100 tests/Android.mk : skip kms_pipe_b_c_ivb if no cairo test kms_pipe_b_c_ivb depends on cairo, so add it to the list of test not to build unless "ANDROID_HAS_CAIRO" is set. Signed-off-by: Tim Gore Signed-off-by: Thomas Wood commit ebb46bb2e2138b5f864a3fdff21d013d03e7931f Author: Tim Gore Date: Wed Apr 1 16:36:59 2015 +0100 tests/gem_concurrent.c: rename to gem_concurrent_all Recent patch #7763349a9a87.. renamed gem_concurrent_blit.c to gem_concurrent.c and then added entries to Makefile.am to make two identical executeables (but with different names) from this source file. This executeable changes its behaviour based on argv[0]. But, this has broken the Android build, which does not use autotools. This patch instead renames the source file to match the name of one executable (gem_concurrent_all.c) and creates a second source file which simply #includes the first. The Makefile.am entries are also removed. This restores the simple test.c -> test executeable relationship seen in the rest of IGT and allows the Android build system to work without parsing Makfile.am or having to incorporate a special workaround for this test. Signed-off-by: Tim Gore Reviewed-by: Chris Wilson Signed-off-by: Thomas Wood commit a95033fdbcf32ea64ad2b75f38315489ee1c2042 Author: Joonas Lahtinen Date: Tue Mar 31 15:53:17 2015 +0300 tests: install test programs to libexec Install the test programs by default so that they can be packaged. Tested with the testdisplay test so that it still runs after the modifications as it depends on a data file to be present. Need to pass -r option to enable QR code display on success (PNG data file). Packaging is useful when building a complete software stack for a DUT from scratch. This should bring us closer to achieving a built-from-scratch testing workflow. Package maintainers can always decide to ignore the installed files. v2: - Install more tests including scripts and their data v3: - Add clarification to commit message about why we do this. (Chris Wilson & Thomas Wood) - Change libexec into pkglibexec to comply to standard (Thomas Wood) - Do not install $(common_files). (Thomas Wood) - Make it really obvious the installed files are tests by using tests directory name to avoid any confusion with packagers. v4: - Fixed commit message. v5: - Add file locator helper to retain backwards compatibility. (Thomas Wood) - Test with testdisplay -r option that draws the .png file. Cc: Chris Wilson Cc: Thomas Wood Signed-off-by: Joonas Lahtinen Signed-off-by: Thomas Wood commit 590e47c94fd81a182e24b41a715d84491df8cea8 Author: Chris Wilson Date: Thu Apr 2 11:37:23 2015 +0100 igt/kms_vblank: Include a test for comparing blocking drmWaitVblank The other aspect of the spinlock/interrupt on-off overhead is that when we wait for vblank it immediately turns off, and then we immediately turn it back on for the next wait. Signed-off-by: Chris Wilson commit 992f9f6403b95b9822cb651b38d14a95bebc4e73 Author: Ander Conselvan de Oliveira Date: Mon Mar 30 14:38:19 2015 +0300 tests: Add test for pipe B and C interactions in IVB The tests exercise different combinations of enabling pipe B with modes that require more than 2 lanes and then enabling pipe C. v2: Added a couple more tests for different pipe transitions. (Ander) Use custom modes to make the test reliable. (Daniel) v3: Add IGT_TEST_DESCRIPTION. (Thomas) Rename test to kms_pipe_b_c_ivb. (Ander) v4: Fix subtest enumeration. (Thomas) Signed-off-by: Ander Conselvan de Oliveira Signed-off-by: Thomas Wood commit 9aeff2b5c57982a5ffd17881e62e94404b10834b Author: Ander Conselvan de Oliveira Date: Mon Mar 30 10:03:00 2015 +0300 lib/kms: Add a way to override an output's mode So that it is possible to use a custom mode with the simplified mode set API. v2: Add documentation for igt_output_override_mode(). (Thomas) Signed-off-by: Ander Conselvan de Oliveira Signed-off-by: Thomas Wood commit 2f0e3cdcab423e86efc8e5aee113844ccd7b5295 Author: Thomas Wood Date: Mon Mar 30 13:19:32 2015 +0100 lib/tests: add missing library flags Signed-off-by: Thomas Wood commit 04b1526f9dc2ef08b5be2a56e6b8fd770a313872 Author: Thomas Wood Date: Fri Mar 27 15:21:41 2015 +0000 lib: add debug flags Signed-off-by: Thomas Wood commit ea453dbb4aaed2a4e59b608b0af0fd41916bf256 Author: Thomas Wood Date: Fri Mar 27 14:30:06 2015 +0000 gem_exec_blt: fix subtest enumeration Wrap the sysfs_read and sysfs_write calls in an igt_fixture block so they are not executed during subtest enumeration. Cc: Chris Wilson Signed-off-by: Thomas Wood commit af3e32cee27e99e461e727bdfb6127421ef09fbc Author: Chris Wilson Date: Mon Mar 30 17:01:51 2015 +0100 igt/gem_evict_everything: Simplify mlocked_evictions igt_fork/igt_waitchildren already perform the magic required to raise errors based on the exit error code of the child, so take advantage of that and kill the overlycomplicated message passing! Signed-off-by: Chris Wilson commit 9c6e6db03d41d3e075b0e231302810e522854817 Author: Chris Wilson Date: Mon Mar 30 11:09:44 2015 +0100 Revert "tests/gem_exec_lut_handle" This reverts commit a5934091b84e3f8804fb3fed35374c5a976dd07e. Unnerf igt/gem_exec_lut_handle. Sadly completely breaking the measurement is not a good excuse to hide regressions. commit 068f9ceb628b3d721bf3d74c7932afc01a70905c Author: Chris Wilson Date: Wed Dec 3 09:05:54 2014 +0000 igt/gem_evict_everything: Use mlock to reduce available memory The idea here is to check what happens when a large process requests memory from us - we create and utilize a bunch of surfaces then have to relinquish some but continue using the whole working set (so as to force reloads). Signed-off-by: Chris Wilson commit b9b82fdc5fdcbc43d0720b6aaf79e1f00f407d3a Author: Chris Wilson Date: Sun Mar 29 14:11:28 2015 +0100 igt/gem_exec_parse: Use a macro for pretty printing the test failure By moving the assert up a level, we get an much improved assertion failure message (e.g. it includes the batch string that fails). Signed-off-by: Chris Wilson commit a1e4ec4a68ff1144249aa2f98c6834d296ee2061 Author: Chris Wilson Date: Sun Mar 29 14:10:53 2015 +0100 igt/gem_cs_prefetch: Use gem_execbuf for pretty printing of failures Signed-off-by: Chris Wilson commit 11291fd52f53d3c729d5ef4e5b2090f38c36cf69 Author: Chris Wilson Date: Thu Mar 26 20:52:00 2015 +0000 igt/gem_exec_(blt|nop): IGT magic $ ./gem_exec_nop --list-subtests render bsd blt vebox gem_exec_nop: igt_core.c:946: igt_skip: Assertion `in_fixture' failed. Signed-off-by: Chris Wilson commit 47f6b1305cc3752f318a555b932e194e1500c1d8 Author: Thomas Wood Date: Wed Mar 25 16:42:57 2015 +0000 igt.cocci: check the return values of various functions Add rules to fix unused-result warnings when compiling with _FORTIFY_SOURCE defined and apply them to the library and tests. Acked-by: Daniel Vetter Signed-off-by: Thomas Wood commit 0c4dd28d2d3b39216f9d041119ebf34cc44b7df7 Author: Thomas Wood Date: Tue Mar 24 17:33:02 2015 +0000 docs: limit the number of subtests listed Avoid producing long lists of subtests in the documentation and instead provide instructions on how to obtain the full list. Signed-off-by: Thomas Wood commit 76dad7f41475347f99e8a8ce6af67020dfd7c0f1 Author: Thomas Wood Date: Mon Mar 23 11:46:25 2015 +0000 Add default debug flags for tests Include debugging symbols in tests by default to improve stack traces and also set the compiler optimisation level to improve the debugging experience. Signed-off-by: Thomas Wood commit 277ca2b992c766581ef6ef01ea210808f456fbe0 Author: Thomas Wood Date: Fri Mar 13 17:02:12 2015 +0000 lib: print a stack trace when a test assertion fails Add an optional dependency on libunwind to print stack traces when a test assertion fails. Acked-by: Daniel Vetter Signed-off-by: Thomas Wood commit 2659cbbf643f2fdbf2f9acf8008edd4c6980cd2f Author: Chris Wilson Date: Thu Mar 26 12:09:57 2015 +0000 igt/gem_exec_(nop|blt): Repeat measurements at min/max GPU frequencies Signed-off-by: Chris Wilson commit 7763349a9a878ca58de4fb559edcbf81040da07b Author: Chris Wilson Date: Thu Mar 26 08:11:43 2015 +0000 igt/gem_concurrent_blit: Separate out the combinatorial explosion Apparently nobody else likes testing and debugging GEM coherency issues. However, this also means that QA is skipping these vital tests. Split out a set of canaries into igt/gem_concurrent_blit and keep the rest in igt/gem_concurrent_all. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89497 Signed-off-by: Chris Wilson commit c666a19e0c16821a1ccd2a2ea7dda549d19c67d1 Author: Chris Wilson Date: Fri Mar 20 22:37:00 2015 +0000 igt/gem_exec_blt: Repeat measurement and average Through away the unstable outliers for a more consistent measurement. Signed-off-by: Chris Wilson commit cd8d3809a6e49b0bd9da53b17217f99b3c86243a Author: Chris Wilson Date: Tue Mar 24 09:15:12 2015 +0000 igt/gem_exec_nop: Repeat and average to stabilize measurements Signed-off-by: Chris Wilson commit 4f78f9ffa23f777604c617c48c0b850301c3086e Author: Chris Wilson Date: Mon Mar 23 20:57:02 2015 +0000 igt/gem_exec_blt: Do a warmup run first Sometimes it takes a pass for the GPU to come up to full speed, so do a "cold" pass first. Signed-off-by: Chris Wilson commit 6259d0a36b0aa2fd6fc37bdfd9bbede34334d771 Author: Chris Wilson Date: Sun Mar 22 10:33:57 2015 +0000 igt/gem_exec_blt: Repeat measurements for stablity Signed-off-by: Chris Wilson commit 2fa35c7316c26a469c0076a1a98c0b0a715b3386 Author: Chris Wilson Date: Thu Mar 19 08:29:51 2015 +0000 lib/core: Silence internally used signals We use SIGTERM to kill off child processes. We use it a lot. Reporting everytime we use it is just spam. Treat the similar user signals (SIGINT, SIGQUIT and the should-never-have-been SIGPIPE) similarly to reduce noise. Signed-off-by: Chris Wilson Cc: Thomas Wood commit 559987fc01f16f010681fedff69ffe8fb2231d50 Author: Mika Kuoppala Date: Tue Mar 24 13:03:26 2015 +0200 tools/intel_error_decode: Add gen8+ fault data encodings These two registers contains the 48bit fault address. Reviewed-by: Michel Thierry Signed-off-by: Mika Kuoppala commit f96bfb8e8c62b7e3f6340579fec5be6bb6d50b8e Author: Mika Kuoppala Date: Mon Mar 23 11:33:37 2015 +0200 tools/intel_error_decode: Add decodings for FAULT_REG Add decodings for FAULT_REG v2: fix fault encodings and ignore addr type for gen8+ (Michel) fix engine mask Reviewed-by: Michel Thierry Signed-off-by: Mika Kuoppala commit 0a2ef9c3490eda9b5e28c936bbe7655ff7a05bd7 Author: Mika Kuoppala Date: Mon Mar 23 11:35:14 2015 +0200 tools/intel_error_decode: Add ERROR decodings for gen8 Add ERROR decodings for gen8 Reviewed-by: Michel Thierry Signed-off-by: Mika Kuoppala commit 1cfcca66ec79feb9dbfcad7b7849eddaf026d2cf Author: Ville Syrjälä Date: Wed Mar 25 10:53:59 2015 +0200 tools: Update .gitignore Ignore intel_watermark and unignore the, now extinct, intel_dpio_{read,write}. Signed-off-by: Ville Syrjälä commit 07707aff752db9e406608fb2ed998bfc35a6f422 Author: Jeff McGee Date: Tue Mar 24 16:20:19 2015 -0700 tests/pm_sseu: Create new test pm_sseu New test pm_sseu is intended for any subtest related to the slice/subslice/EU power gating feature. The sole initial subtest, 'full-enable', confirms that the slice/subslice/EU state is at full enablement when the render engine is active. Starting with Gen9 SKL, the render power gating feature can leave SSEU in a partially enabled state upon resumption of render work unless explicit action is taken. v2: Add test description and apply recommendations of igt.cocci (Thomas Wood). v3: Skip instead of fail if debugfs entry i915_sseu_status is not available. Signed-off-by: Jeff McGee Tested-by: Lei Liu Signed-off-by: Thomas Wood commit aef4605f7c42df222761f6735375f499586d9d25 Author: Jeff McGee Date: Thu Mar 12 10:52:08 2015 -0700 lib: Add media spin The media spin utility is derived from media fill. The purpose is to create a simple means to keep the render engine (media pipeline) busy for a controlled amount of time. It does so by emitting a batch with a single execution thread that spins in a tight loop the requested number of times. Each spin increments a counter whose final 32-bit value is written to the destination buffer on completion for checking. The implementation supports Gen8, Gen8lp, and Gen9. v2: Apply the recommendations of igt.cocci. Signed-off-by: Jeff McGee Tested-by: Lei Liu Signed-off-by: Thomas Wood commit 301b9e4bb389a968cfae79a1bea07834436165b8 Author: Jeff McGee Date: Tue Mar 24 11:30:57 2015 -0700 tests/drv_getparams: Skip instead of fail on EINVAL Avoid failing on older kernels where the GETPARAM interfaces don't exist. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89669 Signed-off-by: Jeff McGee commit 9ba93c43cfb19c5a82a1d6f20f2d3140c8ca80bf Author: Tim Gore Date: Tue Mar 24 14:16:04 2015 +0000 tests/gem_tiled_fence_blits: split into subtests The gem_tiled_fence_blits test tends to get oom killed on low memory (< 4GB) Android systems. This is because the test tries to allocate (sysinfo.totalram * 9 / 10) in buffer objects and the remaining 10% of memory is not always enough for the Android system. As with a similar issue with gem_render_linear_blits, this problem is resolved by splitting into subtests. A "basic" subtest uses minimal memory buffers to test the basic operation, and a "normal" subtest which is skipped if there is insufficient memory. I also took the opportunity to cull some numeric literals. Signed-off-by: Tim Gore commit 4d2577e0ddbec1f0be919b113a3eccb0afb53886 Author: Ville Syrjälä Date: Wed Dec 10 21:17:36 2014 +0200 tools/intel_watermark: Tool to decode watermark registers The watermark registers on the gmch platform are a bit of a mess. Add a tool to make some sense of them. While at it decode the ilk-bdw wm registers as well. SKL+ is left out for now since it's a very different beast. Signed-off-by: Ville Syrjälä commit e5e7a5307113cb7622e6b3da4d66f681e9fe3a40 Author: Ville Syrjälä Date: Mon Mar 16 13:19:48 2015 +0200 lib: Add i854 PCI ID Signed-off-by: Ville Syrjälä commit 978881801e6cb69e27f9a3b016bc7b88d3b13a1d Author: Ville Syrjälä Date: Thu Feb 5 19:29:20 2015 +0200 tools/intel_iosf_sb_read: Support different register strides Some IOSF SB units ogranize their registers in a pecualiar way. Even though the registers are 32 bits wide, the register offsets only increment by one when going from one register to the next. Correctly deal with this when dumping several consecutive registers. Signed-off-by: Ville Syrjälä commit bd692becf70acfe0829033f8a33680d3d54fcfb2 Author: Ville Syrjälä Date: Thu Feb 5 20:04:29 2015 +0200 tools/intel_iosf_sb_read: Add -c command line option like intel_reg_read Add a command line option '-c ' that can be used to read set of consecutive registers without having to specify the offset for each of them. Signed-off-by: Ville Syrjälä commit dcb3edf2a971b2c00cace8bf2c052f76c24af56b Author: Ville Syrjälä Date: Thu Feb 5 20:04:29 2015 +0200 tools/intel_iosf_sb_*: Support reading/writing multiple registers at once Allow the user to specify a list of registers to read, and register/value pairs to write. Signed-off-by: Ville Syrjälä commit 0461e8cf4314ee43ef4440ebdaf68eff2c57e5a2 Author: Ville Syrjälä Date: Thu Feb 5 16:50:07 2015 +0200 tools/intel_iosf_sb_*: Use getopt() to parse the options I want to add some command line options so switch to getopt() to make that easier. Signed-off-by: Ville Syrjälä commit 38e3c58cba951ff43f8314edfd0adb8082d81f8b Author: Ville Syrjälä Date: Thu Feb 5 19:44:40 2015 +0200 tools/intel_iosf_sb_*: Replace if ladder with an array and bsearch() Replace the silly strcasecmp() if ladder with and array that maps the unit names to port numbers. And keep the thing sorted so we can do the lookup with bsearch() for extra speed :) Signed-off-by: Ville Syrjälä commit 29ebc68313a8dee9b98fac1b337f9bf60b3bfb0a Author: Ville Syrjälä Date: Thu Feb 5 16:18:17 2015 +0200 tools: Remove intel_dpio_{read,write} tools intel_dpio_{read,write} as redundant as intel_iosf_sb_{read,write} handle the same task. The difference between the tools was the opcode used to read/write the registers, but with DPIO both opcodes work just fine, so there's no need for both sets of tools. Signed-off-by: Ville Syrjälä commit 0129b02c7bb9cbff81974cbbaeebc4529d823bb4 Author: Ville Syrjälä Date: Thu Feb 5 16:17:06 2015 +0200 toos/intel_iosf_sb_*: Fix DPIO IOSF SB port number The correct port is 0x12, not 0x13 which is actually GPIO_NC. Signed-off-by: Ville Syrjälä commit ac28ecefe04ef2961baa78b949e05d87eee55e3f Author: Ville Syrjälä Date: Mon Mar 16 13:36:50 2015 +0200 lib: Allow 32bit addresses for IOSF-SB registers Signed-off-by: Ville Syrjälä commit 0a3ef582daa961047dabf3008177f60db8984b03 Author: Ville Syrjälä Date: Thu Feb 5 16:12:11 2015 +0200 lib: Change IOSF SB devfn to 0.0 The devfn field in the IOSF SB messages is only relevant when there's a real PCI bus or some other multifunction device behind a single port. Otherwise the port number itself is enough to uniquely identify the target. In fact some IOSF SB targets reject the access when devfn is not 0.0 (eg. GPIO_NC on BYT). Signed-off-by: Ville Syrjälä commit 06a9c3566462e04d47c3006daeb4ff0c89c5d043 Author: Damien Lespiau Date: Tue Mar 24 03:27:08 2015 +0000 quick_dump/skl: Add power well registers Signed-off-by: Damien Lespiau commit 392e8ee75fcbc4da7c972aaa03931c22ed8485e4 Author: Jesse Barnes Date: Mon Mar 23 12:49:08 2015 -0700 tests/pm_rps: add test descriptions Document a copule of the subtests with their purpose, methods, and expected results. Reviewed-by: Ben Widawsky Signed-off-by: Jesse Barnes commit 1765838e34d96c7eb2288cf899ab19f819fa5cb0 Author: Daniel Vetter Date: Mon Mar 23 11:00:20 2015 +0100 tests/gem_tiled_swapping: Fix up L-shaped testing I've fumbled this, resulting in this this skipping everywhere. Unfortunately no QA test report for this regression ... Signed-off-by: Daniel Vetter commit a5934091b84e3f8804fb3fed35374c5a976dd07e Author: Daniel Vetter Date: Wed Mar 18 11:15:12 2015 +0100 tests/gem_exec_lut_handle Reduce default number of repeats a lot. High repeat count is only useful for microbenchmarking, not that much for regression testing. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=87131 Signed-off-by: Daniel Vetter commit a5c6b8df8b7bc46a8664044faa7566ce56fa06a8 Author: Daniel Vetter Date: Fri Mar 13 18:02:45 2015 +0100 tests/kms_cursor_crc: Add dpms and suspend tests There was some confusion about whether we restore cursors correctly after dpms and suspend/resume. Apparently we still do! Signed-off-by: Daniel Vetter commit d297e58529217cb70e79639b13608f458332b2d0 Author: Daniel Vetter Date: Thu Mar 5 11:02:03 2015 +0100 lib: Only warn about suspicious CRCs It is theoretically possible to hit these in the wild, so only warn about them. Dropping the test is probably too much since these caught some real bugs in the past. Signed-off-by: Daniel Vetter commit 562bbe12f6fb75811a746c742a28d32a17b26aa9 Author: Daniel Vetter Date: Fri Feb 27 22:04:18 2015 +0100 tests: Remove usage of igt_crc_equal and _non_null Tests should positively check for crc matches, not for mismatches. Enforce this by only exposing and igt_assert function for comparing crcs. For the few tests which didn't just do this as consistency checks but to do functional tests add FIXME comments that some reference crc values are missing. Signed-off-by: Daniel Vetter commit e588f6dfa6f022120d5a55ef96994dbbc33d0dc9 Author: Daniel Vetter Date: Fri Feb 27 20:37:29 2015 +0100 lib/debugfs: Add igt_assert_crc_equal Because of hash collisions tests should only ever compare crc checksums for equality. Checking for inequality can result in random failures. To ensure this only expose and igt_assert function and use that. Follow-up patches will rework the code for tests which don't follow this requirement and try to compare for CRC inequality. v2: Rebase on top of Matt's kms_plane changes. Signed-off-by: Daniel Vetter commit 4fec18e5e0cbbf384b8a49febd9dc650f2712bad Author: Daniel Vetter Date: Fri Feb 27 20:24:15 2015 +0100 lib/core: add interactive debug point to igt_fail Useful for inspecting the screen state in kms tests when they fail. Also move the screen clearing in kms_cursor_crc to the bottom. Signed-off-by: Daniel Vetter commit e7d26df4198af40c92292cb4209fd803fa02062f Author: Chris Wilson Date: Thu Mar 19 15:24:52 2015 +0000 igt/kms_vblank: Simple harness for measuring speed of drmWaitVBlank Signed-off-by: Chris Wilson commit a72d4056291efd2571105cbb0a254a9cde13c6c6 Author: Chris Wilson Date: Wed Mar 18 14:15:22 2015 +0000 igt/gem_concurrent_blit: Test copying over itself Suggested by Lionel Landwerlin as a means to emulate video decode workloads. Signed-off-by: Chris Wilson commit ea4aa70f3c83a942ee34868ade1eba126b15d879 Author: Chris Wilson Date: Thu Mar 19 08:36:25 2015 +0000 igt/gem_wait: When waiting for infinity, an infinity remains Incorrect testing of out parameters leads to bug noise... Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89494#c4 Signed-off-by: Chris Wilson commit 1d0aa69f55fdb31662946f1cb472dda31347d89b Author: Chris Wilson Date: Wed Mar 18 08:46:14 2015 +0000 igt/gem_exec_nop: Enlighten the failure error message References: https://bugs.freedesktop.org/show_bug.cgi?id=89633 Signed-off-by: Chris Wilson commit 484c1a6f1cf97d3d1ff757cddd8f77accc89790a Author: Chris Wilson Date: Wed Mar 18 08:33:54 2015 +0000 igt/gem_read_read_speed: Speed up batch submission Create the RCS and BCS batches once and reuse them to avoid the rewriting and relocation overhead on every submission - the goal is to focus on the interring synchronisation overhead. Signed-off-by: Chris Wilson commit d3e9316b441bc172f5936e787879d1d13f1f7a01 Author: Chris Wilson Date: Wed Mar 18 08:33:22 2015 +0000 lib/batch: Fix range checks for blits Signed-off-by: Chris Wilson commit 233808a58db1f62d773b03f9dad599924170aca6 Author: Chris Wilson Date: Wed Mar 18 08:36:37 2015 +0000 lib/batch: Trivial compile fix for 32-bit builds intel_batchbuffer.c: In function 'fill_object': intel_batchbuffer.c:589:20: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast] obj->relocs_ptr = (uint64_t)relocs; ^ intel_batchbuffer.c: In function 'exec_blit': intel_batchbuffer.c:598:21: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast] exec.buffers_ptr = (uint64_t)objs; Signed-off-by: Chris Wilson commit a172676488def584cfe8d0340c7e5ef4b7f81d74 Author: Chris Wilson Date: Mon Mar 16 16:29:57 2015 +0000 igt/gem_concurrent_blt: Test overwrite source used for read-read optimisation Signed-off-by: Chris Wilson commit 35b0ac99fc4bb05ea98c2588a0c77a26f1964f70 Author: Chris Wilson Date: Mon Mar 16 11:55:46 2015 +0000 igt/gem_concurrent_blit: Exercise concurrent reads Since we are considering implementing read-read optimisations for mixed engine workloads, make sure that we at least have a few tests that check for coherency when doing so. Signed-off-by: Chris Wilson commit 99b5ee8aaad4920582b0143fe2e02c7149c4cf41 Author: Chris Wilson Date: Thu Jan 22 10:03:45 2015 +0000 igt/gem_concurrent_blit: Move buffer allocation after requires The choice is to either move the igt_require from the buffer allocation (and allow the allocation to fail) inside the igt_fixture, or move the buffer allocation to the subtest. Moving it to the subtest has the advantage of ensuring that every test has the same initial state (no chance of leaking state across tests) and speeding up running a single subtest. Note this is necessary in order to run igt/gem_concurrent_blit on older kernels, otherwise the requirement for mmap(wc) causes us to skip the majority of tests. Signed-off-by: Chris Wilson commit ed7e33451e91e1b4cde7553ccbe31e09562c87f7 Author: Chris Wilson Date: Mon Mar 16 15:14:14 2015 +0000 igt: Add benchmark for read-read optimisation Signed-off-by: Chris Wilson commit 505645c2ab90404067c7817072a1b8eda316e67e Author: Daniel Vetter Date: Fri Mar 13 17:57:03 2015 +0100 tests: Rename core_getparams to drv_getparams Signed-off-by: Daniel Vetter commit ae339f0977cc02ceb9e39ad458f7d8cfbf3c9fd6 Author: Jeff McGee Date: Thu Mar 12 17:26:25 2015 -0700 tests/core_getparams: Create new test core_getparams New test core_getparams consists of 2 subtests, each one testing the ability of userspace to query the correct value of a GT config attribute: subslice total or EU total. drm/i915 implementation of these queries is required for Cherryview and Gen9+ devices (non- simulated). v2: Duplicate small amount of new libdrm functionality to avoid bumping libdrm version requirement (Daniel). Convert some igt_asserts to the appropriate comparison variants. Add a test description. v3: Actually use the LOCAL GETPARAM defines. Otherwise can't build against older libdrm as intended by v2. For: VIZ-4636 Signed-off-by: Jeff McGee Reviewed-by: Zhigang Gong Signed-off-by: Daniel Vetter commit 7655606532afb0dcfa6d11a5af83ed9beac5d1fa Author: Daniel Vetter Date: Fri Mar 13 09:37:49 2015 +0100 NEWS: Post-release bump Let's prep for more cool stuff! Signed-off-by: Daniel Vetter commit e3e659163f0dcb4bc5de852190a0478092784234 Author: Thomas Wood Date: Thu Mar 12 17:06:54 2015 +0000 Update version to 1.10 and add the release date Signed-off-by: Thomas Wood commit 3b8e121552b2bd0c9023fbec0b88da36a27ce42c Author: Thomas Wood Date: Thu Mar 12 17:01:57 2015 +0000 lib: small documentation fixes Signed-off-by: Thomas Wood commit 595575b9cbdc705edc6f1ac6a3fbf2ceb45bf5ba Author: Thomas Wood Date: Thu Mar 12 16:32:17 2015 +0000 Remove old entries from .gitignore files Signed-off-by: Thomas Wood commit a6c40c7665287305fe838b6871a26bcfecad9c0a Author: Thomas Wood Date: Thu Mar 12 14:59:20 2015 +0000 lib: move igt_interactive_debug into igt_core.c igt_interactive_debug should be defined in igt_core.c, rather than the header, to avoid it being defined more than once. Reported-by: Damien Lespiau Signed-off-by: Thomas Wood commit dde047fe2c84e2519a8ed24db4ac9c794285bbd1 Author: Damien Lespiau Date: Thu Mar 12 14:31:15 2015 +0000 lib/fb: Use PRIx64 for uint64_t in format string Fix the following warning: igt_fb.c: In function 'igt_create_fb_with_bo_size': igt_fb.c:414:2: warning: format '%llx' expects argument of type 'long long unsigned int', but argument 9 has type 'uint64_t' [-Wformat=] igt_debug("%s(width=%d, height=%d, format=0x%x [bpp=%d], tiling=%llx, size=%d\n", introduced by commit: commit e36091d1c7010e825897dc4487f9985ab353973b Author: Tvrtko Ursulin Date: Tue Mar 3 14:11:01 2015 +0000 tiling: Convert framebuffer helpers to use fb modifiers Cc: Tvrtko Ursulin Signed-off-by: Damien Lespiau commit b1177831abedbf7dac323c6e67c2ec7c56c88009 Author: Tvrtko Ursulin Date: Tue Mar 3 14:11:06 2015 +0000 tests/kms_flip_tiling: Exercise Y tiling modes on Gen9+ Signed-off-by: Tvrtko Ursulin commit 7b8ba120b956e706f2cdea831233973f0ee079fa Author: Damien Lespiau Date: Tue Mar 3 14:11:05 2015 +0000 testdisplay/skl: Add command line options for Yb/Yf tiled fbs Signed-off-by: Damien Lespiau commit ff451a6d439f76ddc51cc0a374f086ace4dab680 Author: Damien Lespiau Date: Tue Mar 3 14:11:04 2015 +0000 lib: Allow the creation of Ys/Yf tiled FBs There's no fencing for those tiling layouts, so we create a linear bo for cairo to play with, and when cairo is finished with it, we do a fast copy blit to the fb BO with its final tiling. v2: Move to correct domain after CPU is done with the object (-EINVAL). (Tvrtko Ursulin) Correct arguments passed in to framebuffer creation (segfault). (Tvrtko Ursulin) Pass zero stride to kernel as it expects for Yf&Ys. (Tvrtko Ursulin) v3: Rebase for gem_mmap__cpu changes. (Tvrtko Ursulin) v4: Rebase for addfb2.5. (Tvrtko Ursulin) Signed-off-by: Damien Lespiau Signed-off-by: Tvrtko Ursulin commit eb93c1b33ef6eebe53646003e951e54a3e68bc5e Author: Tvrtko Ursulin Date: Tue Mar 3 14:11:03 2015 +0000 lib/igt_fb: Use new ADDFB2 extension for new tiling modes Signed-off-by: Tvrtko Ursulin commit c7bac3c62ab27045ceec898787435bbb5678b015 Author: Tvrtko Ursulin Date: Tue Mar 3 14:11:02 2015 +0000 lib: Add support for new extension to the ADDFB2 ioctl. New functionality accessesed via the __kms_addfb wrapper. Signed-off-by: Tvrtko Ursulin commit e36091d1c7010e825897dc4487f9985ab353973b Author: Tvrtko Ursulin Date: Tue Mar 3 14:11:01 2015 +0000 tiling: Convert framebuffer helpers to use fb modifiers This converts the IGT API only, underneath legacy set_tiling is still used. v2: One got away in kms_flip. Signed-off-by: Tvrtko Ursulin Signed-off-by: Damien Lespiau commit 672e88acb72bf58f322af928b2bc636d14aa9f21 Author: Damien Lespiau Date: Tue Mar 3 14:11:00 2015 +0000 lib: Provide a raw version of the gen9 fast copy blits So we can use it with bare kernel types, without going through libdrm bos. v2: Don't forget the object handle. (Tvrtko) Correct surface pitch calculation. (Tvrtko) Signed-off-by: Damien Lespiau Signed-off-by: Tvrtko Ursulin commit 6533d113a9710429115bee26d1f372e1a06701df Author: Damien Lespiau Date: Tue Mar 3 14:10:59 2015 +0000 lib: Split two helpers to build fast copy's dword0 and dword1 Again, these helpers will be useful for a raw version of the gen9 fast copy. Signed-off-by: Damien Lespiau commit 130221b3b5be3ad03bd0ac2b12d8b009eaf540d4 Author: Damien Lespiau Date: Tue Mar 3 14:10:58 2015 +0000 lib: Don't give a struct igt_buf * to fast_copy_pitch() So we can use this function in a "raw" (ie without igt_buf) version. Signed-off-by: Damien Lespiau commit cbd927cd35473c88bf5e2f5f42e61af612eaa75e Author: Damien Lespiau Date: Tue Mar 3 14:10:57 2015 +0000 lib/skl: Add gen9 specific igt_blitter_fast_copy() v2: Adjust for BB handling changes. (Tvrtko Ursulin) Correct XY_FAST_COPY_DST_TILING_Yf. (Tvrtko Ursulin) v3: New tiling modes are not defined in the kernel any more. (Tvrtko Ursulin) Signed-off-by: Damien Lespiau Signed-off-by: Tvrtko Ursulin commit 0c15e068a587fbb144ba6d689b402b95cd51470e Author: Tvrtko Ursulin Date: Tue Mar 3 14:10:56 2015 +0000 tests/kms_addfb: Y tiled testcases v2: Moved all init into fixtures. Signed-off-by: Tvrtko Ursulin commit 0a087733d24fcb2b80584b23e931533d72828770 Author: Tvrtko Ursulin Date: Tue Mar 3 14:10:54 2015 +0000 tests/kms_addfb: Add support for fb modifiers Just a few basic tests to make sure fb modifiers can be used and behave sanely when mixed with the old set_tiling API. v2: * Review feedback from Daniel Vetter: 1. Move cap detection into the subtest so skipping works. 2. Added some gtkdoc comments. 3. Two more test cases. 4. Removed unused parts for now. v3: * Removed two tests which do not make sense any more after the fb modifier rewrite. v4: * Moved gtkdoc comments into .c file. * Moved all initialization into fixtures. * Rebased for fb modifier changes. v5: * Added bad modifier subtest. Signed-off-by: Tvrtko Ursulin commit f59935c0ce878d20f1a34ae814a778bf476c36f8 Author: Chris Wilson Date: Wed Mar 11 08:40:23 2015 +0000 igt/kms_psr_sink_crc: Prettify i915_edp_psr_status failures Change the formatting asserts into requires and add the contents into the debug log. Signed-off-by: Chris Wilson Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89525 commit 07be8fec156ba8405f2aafa3a37fe29d06893f05 Author: Matt Roper Date: Thu Mar 5 15:01:00 2015 -0800 igt.cocci: Replace igt_assert() with igt_assert_CMP() where possible The integer comparison macros give us better error output by including the actual values that failed the comparison. Signed-off-by: Matt Roper Signed-off-by: Daniel Vetter commit 14a3d88a0967718124fc3b6c111a877203da025f Author: Matt Roper Date: Wed Mar 4 10:50:53 2015 -0800 tests/kms_plane: Ensure planes recover from DPMS i915 was using the main atomic 'disable plane' to turn off sprite planes during a CRTC disable. This was problematic because it modified the plane state, preventing us from recovering the original state later. One such case was that during a DPMS OFF followed by a DPMS ON, any sprite planes would not be restored properly. Let's add a test that toggles DPMS off and on and ensures that the CRC remains the same (i.e., planes are successfully restored unchanged). Signed-off-by: Matt Roper Signed-off-by: Daniel Vetter commit b8db5d60e0f19c46142f22f9dcbe4d7b6d166b9f Author: Chris Wilson Date: Fri Mar 6 08:49:52 2015 +0000 lib/core: Make the start of the debug output more clear I missed the quiet "Log start" between the test failure and the debug output (and so was very confused by the repetition). You have to shout at me! v2: Thomas suggested I make the end of the logging clear as well. Since I completely missed that there was a end marker, he must be right! Signed-off-by: Chris Wilson Cc: Thomas Wood commit e23accf43753055430064fa02efe7d33ab11564f Author: Chris Wilson Date: Fri Mar 6 08:37:09 2015 +0000 igt/gem_wait: Test negative timeouts The user should be able to specify a negative timeout to indefinitely wait upon a bo becoming idle. Signed-off-by: Chris Wilson commit 15559e6cb613fe152f71471643de0ac0c12332d4 Author: Chris Wilson Date: Fri Mar 6 08:47:06 2015 +0000 igt/gem_wait: Timeout parameter to the WAIT ioctl is signed So convert from uint64_t to int64_t. The distinction becomes important when you realise what test we were missing... Signed-off-by: Chris Wilson commit 50158de8122fabdb34b8f9dd5cf43a2d9c72e0b4 Author: Daniel Vetter Date: Thu Mar 5 09:42:29 2015 +0100 NEWS: Update to prep for release Signed-off-by: Daniel Vetter commit ee5c119c0cfe990ada07ae47a22f4d7f05b415d5 Author: Tim Gore Date: Tue Mar 3 10:43:43 2015 +0000 tests/gem_render_tiled_blits: split into subtests The gem_render_tiled_blits test tends to get oom killed on low memory (< 4GB) Android systems. This is because the test tries to allocate (sysinfo.totalram * 9 / 10) in buffer objects and the remaining 10% of memory is not always enough for the Android system. A similar issue with gem_render_linear_blits was resolved by creating several subtests. A "basic" subtest that uses minimal memory buffers to test the basic operation, and two stress tests which are skipped if there is insufficient memory. The first stress test uses more memory than the graphics apperture and the second uses enough to ensure that swap space is used (if present). This patch makes the same changes to gem_render_tiled_blits. v2: Following comments from Daniel Vetter: a) Use igt_main macro instead of "open coding", and b) cull some leading spaces Signed-off-by: Tim Gore commit 9f90aabc66cd62b328c16e6917dc76baafd3ab5e Author: Tim Gore Date: Tue Mar 3 10:23:00 2015 +0000 tests/gem_render_linear_blits: split into two subtests The gem_render_linear_blits test tends to get oom killed on low memory (< 4GB) Android systems. This is because the test tries to allocate (sysinfo.totalram * 9 / 10) in buffer objects and the remaining 10% of memory is not always enough for the Android system. After a discussion with Chris Wilson I have split this test into a "basic" and an "apperture-thrash" subtest, in the same way as gem_linear_blits. The basic test uses just two buffer objects and the apperture-thrash test is skipped if there is insuffiecient memory. v2: Following comment from Chris Wilson: a) Remove the command line option for count. b) Add a third subtest to ensure swap is tested v3: Replace some leading spaces with tabs v4: Follwing comment from Daniel Vetter: a) Use igt_main macro instead of "open coding", and b) cull some more leading spaces Signed-off-by: Tim Gore commit 043f5869586c471991b7cdb97a542901ab662ef6 Author: Mika Kuoppala Date: Fri Feb 13 19:04:49 2015 +0200 tools/intel_gtt: Add support for gen8 Add 64bit ptes and 8MB mmiobar offset for gen8 Cc: Ville Syrjälä Cc: Ben Widawsky Acked-by: Ben Widawsky Signed-off-by: Mika Kuoppala commit 5e4fc0c48c9a44689ec1593f356a8f22e1ca6bb8 Author: Daniel Vetter Date: Tue Nov 18 14:39:14 2014 +0100 tests/gem_tiled_swapping: Skip on L-shaped memory The only thing the kernel can do is pin the buffers, which essentially means no swapped tiled objects. Signed-off-by: Daniel Vetter commit f26d8a04c3938845d4db07cf6587b29e287dc2dc Author: Paulo Zanoni Date: Fri Feb 27 15:05:39 2015 -0300 tests/pm_rpm: I2C VGA detection is unreliable We fail to detect some VGA monitors using our I2C method, leading to bug reports from QA. If you look at the dmesg of these cases, you'll see the Kernel complaining about EDID reading mostly FFs and then disabling bit-mangling. Since we don't want to reimplement everything the Kernel does, let's just accept the fact that some VGA outputs won't be properly detected. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84273 Signed-off-by: Paulo Zanoni commit f45698df8b6b4d9375acc8e668fc54f81250fd2f Author: Daniel Vetter Date: Fri Feb 27 19:32:33 2015 +0100 lib/igt_core: don't add newlines in logging functions igt_kms extensively uses line continuation when dumping state updates at the debug level. They got badly mangled with the recent changes to for the log handling functions. Two separate fixes: - Don't prepend domain and other metainformation when it's just a continuation line. - Dont add newlines when dumping the log recorder. If someone interleaves different log level messages this will go awry, but really just don't do that. Cc: Thomas Wood Signed-off-by: Daniel Vetter commit 305fb1db5c1ec231b1cef3fd4c2106bc36ef48d8 Author: Daniel Vetter Date: Fri Feb 27 16:24:25 2015 +0100 lib: add igt_assert_lt Found one user in gem_wait.c Signed-off-by: Daniel Vetter commit e3f8eb58e64954f80207ff147de3eccba96769cd Author: Daniel Vetter Date: Fri Feb 27 16:18:40 2015 +0100 tests/kms_universal_planes: Inline igt_assert(ret == 0) checks This way the debug output in case of failures is nicer since we dump the entire test condition. Also replace one open-coded igt_assert_eq. Signed-off-by: Daniel Vetter commit 59d8d663cdac2d1f8e876d53f328e414a993c610 Author: Matt Roper Date: Thu Feb 26 19:00:19 2015 -0800 kms_universal_plane: Check for cursor fb leaks We've been leaking the framebuffers that get created inside the legacy -> universal cursor compatibility layer and nobody noticed. Add an i-g-t test to check debugfs and ensure we end up the same number of framebuffers we started with after performing cursor operations. Cc: Chris Wilson Signed-off-by: Matt Roper Signed-off-by: Daniel Vetter commit d73c5eb97747c899eda2648e238711f6d516b4c9 Author: Marc Herbert Date: Thu Feb 26 18:43:43 2015 -0800 lib/igt_kms.c: igt_require -> igt_require_f("two displays required\n") The bare "Test requirement: modes" message is too cryptic, I had to go and read the source code to understand the missing requirement. Signed-off-by: Marc Herbert Signed-off-by: Daniel Vetter commit 8e0a0c9de658931454ba2a549d922e7e9f534dea Author: Deepak S Date: Thu Feb 26 21:10:29 2015 +0530 tests/pm_rc6_residency: Add media_rc6_residency_counter subtest Added new media_rc6_residency_subtest for chv & vlv. Signed-off-by: Deepak S Signed-off-by: Daniel Vetter commit af02ef4a483184dbd9a549e98f40a1975aa204fe Author: Deepak S Date: Thu Feb 26 21:10:28 2015 +0530 tests/pm_rc6_residency: Fix proper residency calculation With current code we are not considering the RC6 residency during sysfs read. This is causing test to fail due to incorrect residency_accuracy check This patch consider code time spent for accuracy check Signed-off-by: Deepak S Signed-off-by: Daniel Vetter commit d5579f472e103e7cafb7bb10d5c52246c3d1f072 Author: Daniel Vetter Date: Thu Feb 26 16:32:43 2015 +0100 tests/drv_suspend: Unrename tests Renaming tests massively confuses QA's test result tracking and blacklisting. So except when really good reasons are around we shouldn't do it. Here I think just adding the -hibernat suffix and leaving test names unchanged is enough. Cc: David Weinehall Cc: Imre Deak Signed-off-by: Daniel Vetter commit 26f40811d70cdb80d81edea13c1d2ee55074d196 Author: Thomas Wood Date: Fri Feb 20 11:31:01 2015 +0000 lib: small documentation fixes Signed-off-by: Thomas Wood commit d9224c3479e70be31612f881d180666e1dbead93 Author: Thomas Wood Date: Thu Feb 19 15:19:57 2015 +0000 lib/tests: update .gitignore commit 4ff4ea601a0bfeceb7f291af2c3410ad547af760 Author: Thomas Wood Date: Thu Feb 19 13:58:06 2015 +0000 lib: print the signal name to stderr when handling a signal Print the received signal name to stderr when handling a signal. This uses an array of handled signal names since strsignal() only provides descriptions. Signed-off-by: Thomas Wood commit aecad4fc2ea86f5377c443a4f15ea91d3e0d614c Author: Thomas Wood Date: Wed Feb 18 15:47:07 2015 +0000 tests: remove extra file Remove a file accidentally added in commit 6f582f7 (tests: Add gem_ctx_param_basic). Cc: Daniel Vetter Signed-off-by: Thomas Wood commit 8fb19782f82f25249aaed0ff0e5fa6601dbb0e9d Author: Thomas Wood Date: Wed Feb 18 16:19:59 2015 +0000 lib: remove handled option arguments from argv Remove options from argv that have been handled by getopt to allow additional non-option parameters to be processed in the test application. This fixes issues when using options such as --debug with tests that accept additional non-option parameters. Signed-off-by: Thomas Wood commit 55cc132b3219fbbf8c5705c674ef0f9a9b53d593 Author: Thomas Wood Date: Tue Feb 17 15:10:13 2015 +0000 lib: use defines for igt_simple_init and igt_subtest_init Using defines removes an extra function call and prepares for changes to the command line argument handling. Signed-off-by: Thomas Wood commit efddb93680c5c5ca2d0c0c9c9af497908c1fa6f7 Author: Thomas Wood Date: Tue Feb 17 11:52:29 2015 +0000 tests: improve pipe enumeration Signed-off-by: Thomas Wood commit 0f3a5809e7801d4f48759ce4ffda764fcd7fb6bb Author: Praveen Paneri Date: Wed Feb 25 14:26:21 2015 +0530 tests/gem_bad_blit.c : Fix dst address for Gen8 onwards Gen8 Onwards use 48 bit addressing for src and dst base addresses. This patch fixes this for destination base address. Signed-off-by: Praveen Paneri Signed-off-by: Daniel Vetter commit c6d18ee56ba2f148e9146acd832c530b53aab096 Author: Marc Herbert Date: Tue Feb 24 12:29:22 2015 -0800 lib/igt_kms.c: remove tests dependency on VT /dev/tty0 Required to run on any recent, freon-based and X11-free ChromeOS release. v2: - igt_debug() instead of igt_warn() - return KD_GRAPHICS instead of -1UL - print previous mode in debug statements. Among others this help a tiny bit with the now confusing debug output ("cannot change" immediately followed by a misleading "mode changed"). Signed-off-by: Marc Herbert Signed-off-by: Daniel Vetter commit 7890b09348ce8d494298ac9a308df25d526fe3ea Author: David Weinehall Date: Wed Feb 11 16:46:02 2015 +0200 tests/drv_suspend: hibernation test intel-gpu-tools currently has a bunch of tests for suspend, but currently none (that I could find) for hibernate. Attached is a rudimentary patch to add said test. It does so by repurposing the drv_suspend driver to handle both suspend and hibernate, since the difference is miniscule. I decided to split the suspend/autoresume functions in igt_aux.c though, to be able to leave the igt_system_uspend_autoresume() function unchanged (the other option would be to introduce a boolean function argument and have that decide what parameters to pass to rtcwake). The timeout passed to rtcwake probably needs tuning (it might even need to be dynamically adjusted, since the time hibernation takes varies wildly depending on the amount of non-cache memory in use). Signed-off-by: David Weinehall Reviewed-by: Imre Deak commit 5b93daf5cb40f79b948029588f059b0b61638590 Author: Chris Wilson Date: Wed Feb 18 16:06:15 2015 +0000 lib: Use strtol not strtod for overiding the PCI ID Simply to avoid the roundtrip through floating points and any extra headaches from worrying about the implications Signed-off-by: Chris Wilson commit eaa7e6183cedee10acfa321ac3c66bfe58c0ed5a Author: Chris Wilson Date: Wed Feb 18 15:58:06 2015 +0000 lib: Cache DRM device id to reduce number of ioctls The DRM device id for the igfx is fixed, since there can only be one in the system. So once we query it for the first time we can safely report that value on every subsequent request, cutting out a lot of noisy ioctls from inside tests. Signed-off-by: Chris Wilson commit a22548fec06faba738a2d59b45b54704e4757685 Author: Thomas Wood Date: Mon Feb 16 11:17:11 2015 +0000 lib: small documentation fixes Signed-off-by: Thomas Wood commit f8fd4c977a9dd32992bf5f244bde0b817f7e2c82 Author: Thomas Wood Date: Tue Jan 20 15:31:51 2015 +0000 lib: print recent log messages to stderr when a test or subtest fails Signed-off-by: Thomas Wood commit a5f21726cdf542bf3c8e9ac6b7c0ab99a03596f9 Author: Thomas Wood Date: Mon Jan 19 15:27:51 2015 +0000 lib: add a ring buffer for log entries Signed-off-by: Thomas Wood commit 89201c5328280a00c027fba404459de91b546a80 Author: Matt Roper Date: Mon Jan 26 09:23:51 2015 -0800 tests/kms_universal_plane: Fix subtest enumeration We shouldn't use the contents of data.display to determine which pipes to run subtests on since this structure is initialized in an igt_fixture and won't contain any useful data when enumerating subtests (i.e., --list-subtests won't return anything). Instead, just assume we have three pipes in the main loop and ensure that each subtest will skip if we don't really have that many. Signed-off-by: Matt Roper Signed-off-by: Thomas Wood commit e8e28931b1c1c7b412474963d7a89bc307636950 Author: Lu, Han Date: Thu Feb 12 08:41:59 2015 +0800 tools/intel_audio_dump: add support for Skylake This patch adds support for dumping audio registers of Skylake. Signed-off-by: Lu, Han commit cd6644230b557bb3f5d19e499efb265ba6ed2787 Author: Damien Lespiau Date: Fri Feb 13 08:48:52 2015 +0000 quick_dump: Add interrupt and PPAT registers to the SKL dump Signed-off-by: Damien Lespiau commit 3c8aa2fb6ef9ac2526af27c5b14d51552768d5c3 Author: Daniel Vetter Date: Fri Feb 13 14:54:25 2015 +0100 tests/gem_ctx_param_basic: Include header, not source Oops. Reported by Tim Gore. Signed-off-by: Daniel Vetter commit 3cd45dec2e4be3edacdfc233089b6bd3651fa595 Author: Daniel Vetter Date: Tue Feb 10 17:46:43 2015 +0100 lib/igt_gt: Document and consolidate Also move forcewake and stop_rings code from igt_debugfs to igt_gt since it fits better. And move the hang injection fork helpers from igt_aux to igt_gt, too. Also push the intel_gen call into igt_hang_ring while at it. Signed-off-by: Daniel Vetter commit 25c4347078f181a938eaaefbed7e2e27c9dc1a3f Author: Daniel Vetter Date: Sat Feb 7 12:45:49 2015 +0100 doc: Consolidate naming conventions into docbook Duplication just means it gets out of sync. Also update they keyword list in the Makefile, not everything was listed. And add a new "invalid" keyword. While at it update NEWS. Signed-off-by: Daniel Vetter commit 14185f04bd7c5fb2052a3e6454ceda5b46c37a61 Author: Daniel Vetter Date: Sat Feb 7 12:38:56 2015 +0100 tests/gem_wait: Adjust makefile I've forgotten to do this in commit e4753d2d96fbb88077e70820793137f45f02c9ba Author: Daniel Vetter Date: Mon Sep 29 14:42:33 2014 +0200 tests/gem_wait_render_timeout: Convert to subtests Signed-off-by: Daniel Vetter commit 2eca38eab9ccb4bc41ceda4992614ffb311ce4f7 Author: Daniel Vetter Date: Sat Feb 7 12:37:48 2015 +0100 lib/igt_aux: s/swap/igt_swap/ It collides with the subtest naming convention glossary entry for swap. Which makes the docbook xml stuff unhappy. Signed-off-by: Daniel Vetter commit 3e9b4e37e68da2b866e9cebf7ceb6624617e353b Author: Daniel Vetter Date: Fri Feb 6 23:10:26 2015 +0100 tests: Align subtest with naming convention Yeah, historically grown but we should try to be somewhat consistent. It helps with filtering testcases. Signed-off-by: Daniel Vetter commit bf5035a728b4f0cd06e7205bc1911069ff224433 Author: Daniel Vetter Date: Fri Feb 6 23:09:45 2015 +0100 tests/gem_ppgtt: Start rcs before bcs for context tests This way the igt_require for the ctx support is hit before we've launched a bazillion threads and need to wait until they're all done. Signed-off-by: Daniel Vetter commit 7a03ddf994f089e795c2b6c4122fdf490f11bef0 Author: Daniel Vetter Date: Fri Feb 6 23:06:00 2015 +0100 tests: Add invalid pad tests for ctx create/destroy We've missed them, and the kernel isn't nasty enough and forgot to check them. To add these tests convert the existing create/destroy tests over to subtests. v2: Do the basic create/destroy in ctx_bad_destroy in a fixture so that all the tests skip properly. Signed-off-by: Daniel Vetter commit 6f582f70e1b344c6d0e20f312f376892553af55e Author: Daniel Vetter Date: Fri Feb 6 17:54:46 2015 +0100 tests: Add gem_ctx_param_basic Boring ioctl validation. Luckily no gaps found while doing it. v2: git add ftw! v3: Fixes: - args->size is an outparam for get, adjust test. - Pick an invalid param, not an invalid ioctl number ... tsk. Signed-off-by: Daniel Vetter commit 75c075cb263bf33259d26692b4f093f84276915c Author: Daniel Vetter Date: Fri Feb 6 17:13:59 2015 +0100 lib/ioctl: Document ctx param functions And move them so that they're grouped with the other context wrappers. Signed-off-by: Daniel Vetter commit 364efcdf9b1f90ec0befda9b1097434c88a1eb18 Author: Daniel Vetter Date: Fri Feb 6 17:13:27 2015 +0100 tests/gem_reset_stat: Use new ctx helpers A bit more invasive since getting rid off all the places meant to flatten some of the control flow with implicit igt_require. Signed-off-by: Daniel Vetter commit ccc4261dc3d369a3463aa1b8ecbc676d69e337b8 Author: Daniel Vetter Date: Fri Feb 6 17:12:45 2015 +0100 tests/gem_ctx_*: Use helpers Signed-off-by: Daniel Vetter commit 09b8211d4136d6f7767652ddf73dfb0b7c1213a2 Author: Daniel Vetter Date: Fri Feb 6 17:15:13 2015 +0100 lib/ioctl: Add gem_context_destroy helpers We also need a raw version for some tests. Signed-off-by: Daniel Vetter commit 8d21b39251615d3516522a9fe56f77e9bf9fdc62 Author: Daniel Vetter Date: Fri Feb 6 11:10:25 2015 +0100 lib/ioctls: make gem_context_set/get_param infallible We have separate require checks already, so these failing is a bug in the test logic. Signed-off-by: Daniel Vetter commit 15801b4dadfef1e754d415414ad931be639c85bf Author: Daniel Vetter Date: Fri Feb 6 11:06:11 2015 +0100 igt/ioctls: doc for gem_mmap Just spotted while driving around. gtkdoc needs the full parameter list otherwise it doesn't recognize it as a function. So add them. Signed-off-by: Daniel Vetter commit a3e34ce258aae0602c38fd8020d49f1fd1c7a83f Author: Daniel Vetter Date: Fri Feb 6 11:05:28 2015 +0100 lib/ioctl: gem_ prefix for igt_require_mmap_wc We stick to the overall prefix even for magic require functions. Signed-off-by: Daniel Vetter commit c18b2d57a98c061845e0ec31bfffc90e03356aaa Author: Daniel Vetter Date: Fri Feb 6 10:53:10 2015 +0100 lib/ioctl: api polish for gem_context_has_param Just push the igt_require down to align with the usual style. Signed-off-by: Daniel Vetter commit c66b2425e706bec5ce6df8664d19b06e047eb0ee Author: Daniel Vetter Date: Fri Feb 6 10:49:20 2015 +0100 lib/gt: api polish for igt_can_hang_ring Align with common igt library style: - Push the igt_require into the function. - Push the intel_gen into the function. Signed-off-by: Daniel Vetter commit 9ca2cc12b4a11c20b41479e94ac8837321c0a2b1 Author: Matt Roper Date: Mon Feb 2 11:07:55 2015 -0800 kms_cursor_crc: Kernel now checks for integer overflow As of kernel commit commit a679064a7e9e8799177a64a31668a34a1bc6a4f1 Author: Matt Roper Date: Fri Jan 30 16:22:37 2015 -0800 drm/i915: Switch planes from transitional helpers to full atomic helpers the kernel now checks for cursor coordinates that would result in integer overflow and returns -ERANGE, similar to the checking that was already done for other plane types. We update kms_cursor_crc here to reflect this small behavior change: * Check for success at extreme boundary conditions INT_MAX-{width,height} rather than INT_MAX * Add new check for success at SHRT_MAX; if the driver were to internally use short values and overflow, we could have the cursor reappear on the screen. * Add a test for failure with proper error code at INT_MAX-{width,height}+1 Signed-off-by: Matt Roper commit 9846e7f2c57dc7c36d5d6f64e4a9fc7f50feda33 Author: Ben Widawsky Date: Tue Jan 27 17:59:06 2015 -0800 gem_render_copy: Provide an all pixels check Signed-off-by: Ben Widawsky Reviewed-by: Imre Deak commit 38a0c41340109a9f0b365e514147c20f95248aea Author: Thomas Wood Date: Wed Jan 28 16:49:31 2015 +0000 lib/tests: check that invalid subtest names are rejected Signed-off-by: Thomas Wood commit f0516f3d3537d57aa0885212082668db2c4d5df9 Author: Thomas Wood Date: Wed Jan 28 16:30:54 2015 +0000 lib/tests: verify subtest enumeration output Check that the subtest list is not empty if using --list-subtests returns with an exit code of 0, and that the list is empty if it returns with 79. Signed-off-by: Thomas Wood commit 16cfa37a505aaafd26b09b463a562c6985453fae Author: Thomas Wood Date: Tue Jan 27 14:12:27 2015 +0000 lib: add exit status message to simple tests Add an exit status message to simple tests, similar to the one printed for subtests. This includes the test outcome and the time taken to run the test. Signed-off-by: Thomas Wood commit 9942a404379c1a021a6d26b8b2fcd9b70818a971 Author: Thomas Wood Date: Tue Jan 27 14:10:15 2015 +0000 lib: add subtest start and exit status code messages to debug output Signed-off-by: Thomas Wood commit 2b05ecfb0625ddf4b8cced18c471063aa23e2768 Author: Thomas Wood Date: Mon Jan 26 16:59:53 2015 +0000 lib: validate subtest names Subtest names should only contain '-', '_' and alphanumeric characters. Signed-off-by: Thomas Wood commit 61737903ad4d4423516a41538d1ce4cf7287da0e Author: Thomas Wood Date: Mon Jan 26 16:09:40 2015 +0000 lib: print warning and critical messages when listing subtests These messages are sent to stderr and could indicate an issue when enumerating subtests. Signed-off-by: Thomas Wood commit a228223ffaf38fa758eea58258cfe745b6cde4b6 Author: Thomas Wood Date: Mon Jan 26 16:09:09 2015 +0000 lib: warning messages should be sent to stderr This is a regression from commit df11a0f (lib: add a critical warning level). Signed-off-by: Thomas Wood commit bef692d9f3556caf3e901de62f3b24d1aec5798e Author: Michał Winiarski Date: Tue Feb 3 20:13:56 2015 +0100 tests/gem_userptr_blits: Race between close and invalidate It was possible for invalidate range start mmu notifier callback to race with releasing userptr object. If the object is released prior to taking a spinlock in the callback, we'll encounter a null pointer dereference. v2: Moved expressions inside igt_assert(), added mem barrier (Chris) Cc: Chris Wilson Signed-off-by: Michał Winiarski Reviewed-by: Chris Wilson Signed-off-by: Daniel Vetter commit 87edb519408746d31110ea4a01cfbf0734433cb8 Author: Imre Deak Date: Thu Jan 29 00:03:19 2015 -0800 rendercopy/gen9: fix gem_render_copy 3d state setup Without emitting the default 3DSTATE_WM_DEPTH_STENCIL state the test will fail. Signed-off-by: Imre Deak commit 51d87b80493169f68bf1cda0eb2f6715310fe45c Author: Thomas Daniel Date: Mon Jan 19 16:34:51 2015 +0000 tests/prime_self_import: further fix object counts A previous commit: commit 2f2c491cf3167befe7c79e4b17afb4f6284dfc84 Author: Mika Kuoppala Date: Fri Mar 28 10:52:46 2014 +0200 lib/drmtest: don't dup quiescent fd introduced a regression for drm object leak checking. A following commit: commit 8741c2289f17e9bcb740a01cad4764a71c918eea Author: Mika Kuoppala Date: Wed May 7 16:46:19 2014 +0300 tests/gem_flink_race,prime_self_import: fix object counts fixed the regression for some cases but missed the export-vs-gem_close-race subtest. Note that test behaviour depends on whether the subtest is run as part of the whole prime_self_import test (fail), or as a single subtest (pass). Using execlists on Gen8+ reverses the pass/fail due to lazy context allocation which is presumably why this has now been noticed. This commit applies the same fix to the export-vs-gem_close-race subtest. Cc: Mika Kuoppala Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=87627 Signed-off-by: Thomas Daniel Reviewed-by: Mika Kuoppala Signed-off-by: Mika Kuoppala commit 7848d214729a366eca937a63ec8ea025988203d2 Author: Chris Wilson Date: Tue Jan 27 09:38:34 2015 +0000 igt/gem_tiled_wc: Use correct offsets A last moment "tidification" in commit 5e9fac54918e424d928bc15b90e4c65d4cfdd356 Author: Chris Wilson Date: Thu Jan 22 07:52:09 2015 +0000 igt/gem_tiled_wc: Fix! Finish! wreaked havoc again. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88816 Signed-off-by: Chris Wilson commit ebd8b32bc6f5046815e00a6bee7f7f6650591cce Author: Libin Yang Date: Thu Jan 15 09:20:47 2015 +0800 tools/intel_audio_dump: add details dump for Cherryview This patch adds the details dump for audio registers of Cherryview. Signed-off-by: Libin Yang Reviewed-by: Zhenyu Wang commit fa94e01ee71ee97a07a38802e9771b885b51eeeb Author: Thomas Wood Date: Tue Jan 20 11:14:42 2015 +0000 docs: fix parsing issue Use entities for the special characters '<' and '>' to avoid "" being treated as a tag. Signed-off-by: Thomas Wood commit 6011508afed046d60eebf44f51e52a76c326a591 Author: Daniel Vetter Date: Thu Jan 22 10:01:28 2015 +0100 tests/gem_concurrent_blit: Fix indent Thrown up my brain's parser for a moment ;-) Signed-off-by: Daniel Vetter commit fbcc7ba20f5a45a6e2fc9e74a68608ebc804ec29 Author: Daniel Vetter Date: Thu Jan 22 09:43:10 2015 +0100 tests/gem_concurrent_blt: Adjust subtest naming Our tooling doesn't cope with () in the testnames (piglit becomes all confused apparently) and the naming convention says to use "blt" and "render". Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88220 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88349 Signed-off-by: Daniel Vetter commit 9f952940c00f002acb0cef5a5d6251d45be8ff2c Author: Zhipeng Gong Date: Tue Jan 13 08:50:21 2015 +0800 test/gem_dummy_reloc_loop: add tests for dual bsd ring Signed-off-by: Zhipeng Gong Signed-off-by: Daniel Vetter commit f8d47cb70dae434571c6fe5ae39a0fc4909ba7fa Author: Zhipeng Gong Date: Tue Jan 13 08:50:20 2015 +0800 tests/gem_exec_params: check the invalid flags for dual bsd ring v2: add more tests to address Daniel's comments(Zhipeng) Signed-off-by: Zhipeng Gong Signed-off-by: Daniel Vetter commit 17937a0114b29a273152c4c2df72c5b1a992b07c Author: Zhipeng Gong Date: Tue Jan 13 08:50:19 2015 +0800 i-g-t: check whether kernel has dual bsd ring v2: change the number to be consistent with upstream (Zhipeng) Signed-off-by: Zhipeng Gong Signed-off-by: Daniel Vetter commit 5e9fac54918e424d928bc15b90e4c65d4cfdd356 Author: Chris Wilson Date: Thu Jan 22 07:52:09 2015 +0000 igt/gem_tiled_wc: Fix! Finish! It helps when testing whether tiled data read back through a linear mmaping to first tile the data. And not repeatedly unmapping the linear map stops it from segfaulting. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88686 Signed-off-by: Chris Wilson commit 3d65ff780d6d7a1b354bd530942a194a97f73dca Author: Rodrigo Vivi Date: Mon Jan 12 10:21:58 2015 -0800 lib: s/IGT_DEBUG_INTERACTIVE/--interactive-debug=var Use cmdline variable for interactive debug instead of env var. v2: Make interactive-debug domain optional and use "all" when not set. Signed-off-by: Rodrigo Vivi Signed-off-by: Daniel Vetter commit eeff390598f6bf7292a9775cc6c470207f90a128 Author: Ander Conselvan de Oliveira Date: Mon Jan 19 15:43:57 2015 +0200 kms_plane: Add test that suspends/resumes before getting crc This adds a test that does a suspend/resume cycle between configuring a plane and getting the crc value for the pipe. The intention is to test if the user requested stated is restored properly, instead of being clobbered by the state read out from the hardware. Signed-off-by: Ander Conselvan de Oliveira Signed-off-by: Daniel Vetter commit a29f28eba975388aed43c83dd6ed3ec2a869f4ce Author: Chris Wilson Date: Mon Jan 19 09:42:25 2015 +0000 igt/drv_module_reload: Check more carefully for a live driver As drm_open_any() now quietly fails if there is no driver, this nullifies the effectiviness of using gem_exec_nop as the test for a good reload. Combine with gem_alive (and guarantee that gem_alive can detect a dead driver, putting lie to commit 032f30cb38bb03562ee7fde19cd278b1d8ac31a9 Author: Thomas Wood Date: Tue Jan 13 13:33:57 2015 +0000 lib: remove unnecessary checks on the drm_open_any return value ) first. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88573 Signed-off-by: Chris Wilson commit 20d6e0f41b3b70a89946e5271bc4ffa7695be1b0 Author: Tim Gore Date: Fri Jan 16 09:12:15 2015 +0000 tools/intel_gpu_frequency: remove use of getsubopt getsubopt is not available in android. The "get" option doesn't really need sub-options, just display all the current frequency settings (as per discussion with Ben Widawsky) Ben v2: Remove the -geff example in the header Fixed another typo for the --set while there (found by Dave Gordon) Signed-off-by: Tim Gore Reviewed-by: Ben Widawsky commit 0167619bbcc6b45b4045a85468007ecc9f606c71 Author: Thomas Wood Date: Wed Dec 17 11:37:31 2014 +0000 lib: use critical log level for assertion failure messages Signed-off-by: Thomas Wood commit df11a0f4a83a78ca63e04ff915a77e33cf8422fe Author: Thomas Wood Date: Tue Dec 16 15:18:20 2014 +0000 lib: add a critical warning level Signed-off-by: Thomas Wood commit 032f30cb38bb03562ee7fde19cd278b1d8ac31a9 Author: Thomas Wood Date: Tue Jan 13 13:33:57 2015 +0000 lib: remove unnecessary checks on the drm_open_any return value drm_open_any always returns a valid file descriptor, so there is no need to check the return value. Signed-off-by: Thomas Wood commit 07e9f3edb9dd8e99c2511b6b8c4cf750a5dbe536 Author: Tim Gore Date: Mon Jan 12 09:50:22 2015 +0000 lib/Android.mk: add -DHAVE_LINUX_KD_H to fix android build commit cf93bc8df9f5f94a0aedc8b52bad0ad4e036737c by Alan Coopersmith (introduced to enable solaris builds) reqires HAVE_LINUX_KD_H to be set in order for kd.h to get picked up in igt_kms.c. This is not currently set in the Android makefile so Android builds are broken. Signed-off-by: Tim Gore Signed-off-by: Thomas Wood commit 6e2fd6f64d156e9abdb3f4c51e4589fb77ec74dd Author: Thomas Wood Date: Tue Jan 13 11:53:49 2015 +0000 tools: add intel_gpu_frequency to .gitignore intel_gpu_frequency was added in commit 5fb26d1 (intel_gpu_frequency: A tool to manipulate Intel GPU frequency), but wasn't added to .gitignore. Cc: Ben Widawsky Signed-off-by: Thomas Wood commit c1d8293cc79350aa0ee803c7408a9c970f8eebc8 Author: Thomas Wood Date: Tue Jan 13 11:50:02 2015 +0000 intel_gpu_frequency: fix array bounds warning Add a parameter for the size of the act_upon array in the parse function since its size cannot be calculated with ARRAY_SIZE from just the pointer. Cc: Ben Widawsky Signed-off-by: Thomas Wood commit a263cc87958de96acd77fdae6bf8a09bdf46204e Author: Chris Wilson Date: Thu Jan 15 09:36:05 2015 +0000 igt/gem_tiled_swapping: Cycle through the bo a couple of times In order to exercise coherency across swapin/swapout of the same bo, explicitly loop over all bo a couple of times. Signed-off-by: Chris Wilson commit d3bf83af031a2e1c937b3f66fd3fbaec72864525 Author: Chris Wilson Date: Thu Jan 15 08:49:59 2015 +0000 igt/gem_mmap_wc/set-cache-level: Exercise set-cache-level WARNing With the introduction of mmap(wc) and its unbound GTT write domain, we can now hit the warning inside set-cache-level, complaining about the failure to do correct cpu cache tracking. Signed-off-by: Chris Wilson commit 3ea7a2807214900edfdfc171968d7c2e22890c0b Author: Chris Wilson Date: Wed Jan 14 14:33:29 2015 +0000 igt/gem_exec_big: Don't try to repeatedly munmap(NULL) Signed-off-by: Chris Wilson commit 3214a27b5ba7cd621b091f1d0702e069a750c054 Author: Chris Wilson Date: Tue Jan 13 09:17:29 2015 +0000 igt/gem_mmap_wc: Reorder gem_close() Unlike a GTT mmap, a WC mmap does not have a direct reference to the object, only to the backing storage. If we want to control the domain correctly for mmap(wc), we have to keep the bo reference around. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88356 Signed-off-by: Chris Wilson commit 5fb26d1469f95ea93df2f047f57c0cdcf27da5d7 Author: Ben Widawsky Date: Sat Jan 10 14:36:20 2015 -0800 intel_gpu_frequency: A tool to manipulate Intel GPU frequency WARNING: very minimally tested In general you should not need this tool. Its primary purpose is for benchmarking, and for debugging performance issues. For many kernel releases now sysfs has supported reading and writing the GPU frequency. Therefore, this tool provides no new functionality. What it does provide is an easy to package (for distros) tool that handles the most common scenarios. v2: Get rid of -f from the usage message (Jordan) Add space before [-s (Jordan) Add a -c/--custom example (Jordan) Add a setting for resetting to hardware default (Ken) Replicate examples in commit message in the source code. (me) v3: Its not It's (me) Add --help/-h to usage Add Version + man page Rename tool to intel_gpu_frequency, from intel_frequency Remove "sudo" from the examples Signed-off-by: Ben Widawsky Reviewed-by: Jordan Justen Cc: Kenneth Graunke Here are some sample usages: $ intel_gpu_frequency --get=cur,min,max,eff cur: 200 MHz min: 200 MHz RP1: 200 MHz max: 1200 MHz $ intel_gpu_frequency -g cur: 200 MHz min: 200 MHz RP1: 200 MHz max: 1200 MHz $ intel_gpu_frequency -geff RP1: 200 MHz $ intel_gpu_frequency --set min=300 $ intel_gpu_frequency --get min cur: 300 MHz min: 300 MHz RP1: 200 MHz max: 1200 MHz $ intel_gpu_frequency --custom max=900 $ intel_gpu_frequency --get max cur: 300 MHz min: 300 MHz RP1: 200 MHz max: 900 MHz $ intel_gpu_frequency --max $ intel_gpu_frequency -g cur: 1200 MHz min: 1200 MHz RP1: 200 MHz max: 1200 MHz $ intel_gpu_frequency -e $ intel_gpu_frequency -g cur: 200 MHz min: 200 MHz RP1: 200 MHz max: 200 MHz $ intel_gpu_frequency --max $ intel_gpu_frequency -g cur: 1200 MHz min: 1200 MHz RP1: 200 MHz max: 1200 MHz $ intel_gpu_frequency --min $ intel_gpu_frequency -g cur: 200 MHz min: 200 MHz RP1: 200 MHz max: 200 MHz commit cdbc514b4144b614b6ca296c0817828b6a20aa26 Author: Chris Wilson Date: Mon Jan 12 12:57:27 2015 +0000 igt/gem_exec_big: Use mmap(wc) to speed up verification Signed-off-by: Chris Wilson commit b65903b7db6c625526e29b2023e50661e584f1a0 Author: Chris Wilson Date: Mon Jan 12 10:42:03 2015 +0000 igt/gem_exec_big: Also test a large batch with a large number of relocs Signed-off-by: Chris Wilson commit 9917744176cfe694d51d77ac2eff173d9662e7b8 Author: Yang, Libin Date: Mon Jan 12 01:38:34 2015 +0000 tools/intel_audio_dump: add support for Cherryview This patch adds support for dumping audio registers of Cherryview. Signed-off-by: Libin Yang commit 67eb20c8a3569aa18d3378d8fe54cd78396a2c16 Author: Ben Widawsky Date: Sat Jan 10 11:00:22 2015 -0800 tools/Makefile: Alphabetize the list Signed-off-by: Ben Widawsky Reviewed-by: Jordan Justen commit 1dddf32df97f1f1c5269d1bc3ece1d6183277603 Author: Chris Wilson Date: Tue Nov 18 09:45:56 2014 +0000 igt/gem_exec_big: Increase stress We should be able to execute batches up to the full GTT size (give or take fragmentation), so let's try! Signed-off-by: Chris Wilson commit a315476a6ba07f83631a60355bd01a6f73ced50b Author: Chris Wilson Date: Sat Sep 6 08:16:27 2014 +0100 igt/gem_evict_(alignment|everything): contend with GPU hangs Signed-off-by: Chris Wilson commit ce79b7aa8010d848d4e9c417bcba375eac958f60 Author: Chris Wilson Date: Thu Sep 4 13:57:17 2014 +0100 igt/gem_reloc_vs_hang: Inject hangs! Signed-off-by: Chris Wilson commit 5ae9ecaf55ee3263f17ac3837b0dfdd6626cca51 Author: Chris Wilson Date: Thu Sep 4 13:16:52 2014 +0100 igt/gem_pread_after_blit: Inject hangs! Signed-off-by: Chris Wilson commit 16bafdf5bf0248c02ea9824aca003b2a23d464be Author: Chris Wilson Date: Thu Sep 4 09:26:24 2014 +0100 igt/gem_concurrent_blit: Inject hangs before verifying contents After setting up the copy operations, add a hanging batch. This should mean that we complete the copy and the compare then races against the GEM reset. Hopefully, this will catch driver bugs where the target object is no longer accessible after the hang. Note: hang injection is disabled until the required kernel interface is completed. But there are useful additional tests here... Signed-off-by: Chris Wilson commit 25cf0551c7d210c8c085c109891dc97a2cc61e27 Author: Chris Wilson Date: Tue Jan 6 09:59:47 2015 +0000 igt/gem_ctx_thrash: Tweak resource limits On some systems (ok, most systems!) we may need to enlarge the allowed number of open files in order to create enough fd to fill the aperture. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=87572 Signed-off-by: Chris Wilson commit eaa1e8e127205a9517bfc89275cd8723e8b09ed2 Author: Chris Wilson Date: Tue Jan 6 10:06:41 2015 +0000 ioct_wrappers: Add some mmap(wc) blurb dropped between authors Signed-off-by: Chris Wilson commit 33d52a854375581321eb7ae36b06705425fb482f Author: Alan Coopersmith Date: Tue Dec 23 19:07:14 2014 -0800 Skip MADV_DOFORK & MADV_DONTFORK calls on OS'es that don't support them Signed-off-by: Alan Coopersmith Signed-off-by: Daniel Vetter commit 843beb152bb948c972e573448be02ea0a902f3ea Author: Alan Coopersmith Date: Tue Dec 23 19:07:13 2014 -0800 Don't try to use CLOCK_MONOTONIC_COARSE on OS'es that don't support it Signed-off-by: Alan Coopersmith Signed-off-by: Daniel Vetter commit 95ea5d5c0b0342ec95899c6d33311b6ff40732b3 Author: Alan Coopersmith Date: Tue Dec 23 19:07:12 2014 -0800 Provide sighandler_t fallback for non-GNU-libc platforms Signed-off-by: Alan Coopersmith Signed-off-by: Daniel Vetter commit f04b9dfba00b724879b0310a5d1442196afcc24e Author: Alan Coopersmith Date: Tue Dec 23 19:07:11 2014 -0800 Need to #include for basename() on Solaris Signed-off-by: Alan Coopersmith Signed-off-by: Daniel Vetter commit 99e6defbe79d3a41f967b55d33ce1a856914e797 Author: Alan Coopersmith Date: Tue Dec 23 19:07:10 2014 -0800 Use pthread calls instead of raw syscalls on non-Linux systems Raw system calls aren't portable to other kernels. Signed-off-by: Alan Coopersmith Signed-off-by: Daniel Vetter commit cf93bc8df9f5f94a0aedc8b52bad0ad4e036737c Author: Alan Coopersmith Date: Tue Dec 23 19:07:09 2014 -0800 Solaris needs to #include instead of Signed-off-by: Alan Coopersmith Signed-off-by: Daniel Vetter commit f7766d1c77ffef757e05cbd6c6ed110cdd830045 Author: Alan Coopersmith Date: Tue Dec 23 19:07:08 2014 -0800 Fix #ifdef check for _SC_AVPHYS_PAGES in intel_get_avail_ram_mb() Check for the sysconf value used here, not the one used in the previous function. Signed-off-by: Alan Coopersmith Signed-off-by: Daniel Vetter commit f3e1a3d9f8cc366a1e0dbda42f3da9d37064fcd0 Author: Akash Goel Date: Fri Jan 2 16:33:34 2015 +0530 igt/gem_mmap_wc: Add the invalid flags subtest A new subtest added to validate the new version of gem_mmap ioctl, for creating the wc mappings, on yet to be supported flags. v2: Removed the flags checking for older kernels (Daniel) Signed-off-by: Akash Goel Signed-off-by: Chris Wilson Signed-off-by: Daniel Vetter commit f2a045f851fa46b2674d455fd5560bdc1fe21a0c Author: Chris Wilson Date: Fri Jan 2 16:33:33 2015 +0530 igt/gem_concurrent_blit: Exercise wc mappings Signed-off-by: Chris Wilson Signed-off-by: Daniel Vetter commit d95736906d7acea3f52a16076c70f0907684afb5 Author: Chris Wilson Date: Fri Jan 2 16:33:32 2015 +0530 igt/gem_fence_upload: Add comparison against wc mmaps Signed-off-by: Chris Wilson Signed-off-by: Daniel Vetter commit 58865891ba31914eb35f56a553ff7056e3443b06 Author: Chris Wilson Date: Fri Jan 2 16:33:31 2015 +0530 igt/gem_gtt_speed: compare against WC mmaps Signed-off-by: Chris Wilson Signed-off-by: Daniel Vetter commit e70c789909efee8da5c483dc84361418c1d43018 Author: Chris Wilson Date: Fri Jan 2 16:33:30 2015 +0530 igt/gem_tiled_wc: Exercise wc mmaps with swizzling This exercises both the wc mmappings and the extended get_tiling ioctl. Userspace cannot handle bit17 swizzling through wc mmaps (because bit17 requires swizzling based on the actual physical address of the page - which is unknown to userspace) and so we need an extended get_tiling ioctl to report the actual as well as the logical swizzling on an object. We then check that the contents of the object are tiled and swizzled correctly when viewed through a wc mmap. Signed-off-by: Chris Wilson Signed-off-by: Daniel Vetter commit a464fb758e102cb3af90e23e002472a9faac340b Author: Chris Wilson Date: Fri Jan 2 16:33:29 2015 +0530 igt/gem_mmap_wc: Exercise mmap(wc) interface Signed-off-by: Chris Wilson Signed-off-by: Daniel Vetter commit c49a7e9163c2ee30c4bfe930dc0418cf5e2eb0d4 Author: Chris Wilson Date: Mon Jan 5 14:34:58 2015 +0000 lib/core: Fix compile error from rebasing s/KMSG_INFO/KERN_INFO/ Signed-off-by: Chris Wilson commit d8bf7e17cb5b4b734071563f330a20e41cc6acc4 Author: Chris Wilson Date: Mon Jan 5 14:07:31 2015 +0000 lib/core: Show the exitcode in kmsg as well This provides symmetry with logging the start of the test via kmsg. Signed-off-by: Chris Wilson commit cb512b6470fa848c9b351c2090cd3e3f588cfc5f Author: Vincent Cheng Date: Wed Dec 31 10:39:51 2014 +0000 tools/intel_gpu_abrt: Fix bashism intel-gpu-tools ships a #!/bin/sh script that has bash-specific syntax (which breaks on distros such as Debian and Ubuntu where /bin/sh is a symlink to something other than bash). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=87888 commit eb799b29947a9030aca7d808e97190635636c8de Author: Chris Wilson Date: Sun Dec 21 13:53:27 2014 +0000 overlay: Hide kworker threads in overview The kworker threads are used for flip handling and other non-userspace driver tasks. They are non-blocking and so do not impact upon how userspace performs, but they do obscure that information in the overview. Signed-off-by: Chris Wilson commit 0be9766952333dc54a0c568bc487660c0caf5edf Author: Chris Wilson Date: Sun Dec 21 13:50:34 2014 +0000 overlay: A couple of valgrind pleasers Make sure we initialise values to keep valgrind happy Signed-off-by: Chris Wilson commit 7f9d14aa516527f6abf77b4df294acfa832d0dc6 Author: Chris Wilson Date: Sun Dec 21 13:49:25 2014 +0000 overlay: Negative modulus Don't use a negative index into the array if the desired element is negative, just wrap around properly into the ring for the chart. Signed-off-by: Chris Wilson commit c537cdb08eb7a862b50fab2d66aa40f8efaaf933 Author: Chris Wilson Date: Thu Dec 18 16:21:16 2014 +0000 igt/gem_ctx_thrash/threads: Allow bo resuse We already allocate enough objects to thrash the ppGTT VMs, so allow us to reuse the batch buffers for some efficiency gains and through the contention more towards the ctx->vm. Signed-off-by: Chris Wilson commit 4bde75434999568db4868adfcdc9f93fcb7c49c4 Author: Chris Wilson Date: Thu Dec 18 16:20:10 2014 +0000 igt/gem_ctx_thread/processes: Serialise after forking children Play nice, especially with the subtest, and wait for the children to exit before finishing the test. If we don't we end up with a fork bomb for some unknown reason... Signed-off-by: Chris Wilson commit 9f389d00cf83248fa31f626a5a4a3f5ac7c07a75 Author: Chris Wilson Date: Thu Dec 18 11:45:30 2014 +0000 igt/gem_ctx_thrash: Boost workloads Now that we are no longer busy-spinning inside random(), we can spend more time exercising i915.ko Signed-off-by: Chris Wilson commit 14c661599b0a9af9169779b9ffcffa4bbbb7bb3d Author: Chris Wilson Date: Thu Dec 18 11:44:52 2014 +0000 lib/gen8: Make rendercopy threadsafe Signed-off-by: Chris Wilson commit 71e9e9c564419cd1f4563c628dc80e707a512065 Author: Chris Wilson Date: Thu Dec 18 09:08:13 2014 +0000 lib: random() is too slow random() being a good multithread-safe RNG is too slow to be used in stress tests, especially for a seemingly trivial task of randomising the order of an array. Signed-off-by: Chris Wilson commit 6999b70a8438789c3afaad0cb76cf364bd4274c1 Author: Tim Gore Date: Wed Dec 17 10:44:11 2014 +0000 Demos/Android.mk: build intel_sprite_on This reverts the effect of two commits 06fb6c233dd82aac766aa9206644f6eff668ca99 264e1ac10ac14a098a78cc9f96c4e7cabb124ee5 Both of these were to stop demos/intel_sprite_on from being built, but the first was just broken. So this commit re-enables building intel_sprite_on. However, intel_sprite_on will not build in recent Android trees. To overcome this the version of IGT kept in the Android repository will carry a patch to intel_sprite_on, and the automatic build test of IGT on android will patch the freedesktop code on the fly. Signed-off-by: Tim Gore Signed-off-by: Daniel Vetter commit f73697aa8b9131f4bbcd438c66d45b24254d92c7 Author: Thomas Wood Date: Wed Dec 17 14:34:47 2014 +0000 NEWS: New heading for 1.10 Signed-off-by: Thomas Wood commit 959a7db668f19715e7d85f7899a3c38428c4deed Author: Chris Wilson Date: Tue Dec 16 12:12:51 2014 +0000 igt: Add gem_ctx_thrash to fill the GGTT with contexts Signed-off-by: Chris Wilson commit 739790d7eda4866538386f2a24e597c700c24c49 Author: Daniel Vetter Date: Wed Dec 17 09:05:10 2014 +0100 tests/gem_exec_blt: Add subtest that uses dumb buffers Just to make sure this keeps working since a patch to WARN_ON using dumb buffers in execbuf was accidentally merged. Signed-off-by: Daniel Vetter commit 6262f353bb04112becc8679f63b1caaf083f1484 Author: Thomas Wood Date: Fri Dec 12 15:26:36 2014 +0000 Update version to 1.9 and add the release date Signed-off-by: Thomas Wood commit 06fb6c233dd82aac766aa9206644f6eff668ca99 Author: Tim Gore Date: Fri Dec 12 14:29:00 2014 +0000 Demos/Android.mk: dont build intel_sprite_on intel_sprite_on wont build on Android. Previous attempt to disable was just wrong! Signed-off-by: Tim Gore Signed-off-by: Thomas Wood commit 267b352c4fd161a5e96d0a569cdc1f7a3191e90e Author: Thomas Wood Date: Fri Dec 12 14:28:38 2014 +0000 NEWS: Updates Signed-off-by: Thomas Wood commit f59bbf7e8f6b0b5208e6cc11e01537a93ae93706 Author: Thomas Wood Date: Fri Dec 12 14:18:07 2014 +0000 lib: fix a few documentation warnings Signed-off-by: Thomas Wood commit a11117e42fabc3228d21a4786584acbe9840f1dc Author: Tim Gore Date: Fri Dec 12 12:14:33 2014 +0000 Android.mk: replace std=c99 with std=gnu99 The android makefiles were passing the -std=c99 flag to the compiler which disables the typeof keyword. This causes a build fail for a recent addition to igt_aux.h. Change this to -std=gnu99, which is the flag used in the linux build Signed-off-by: Tim Gore Signed-off-by: Thomas Wood commit 264e1ac10ac14a098a78cc9f96c4e7cabb124ee5 Author: Tim Gore Date: Fri Dec 12 11:55:21 2014 +0000 Demos/Android.mk: dont build intel_sprite_on intel_sprite_on wont build on Android. Signed-off-by: Tim Gore Signed-off-by: Thomas Wood commit 6414707bdc318a0bed4c3ae2fe404e27f3cd377c Author: Joonas Lahtinen Date: Thu Dec 11 15:11:53 2014 +0200 lib: Fix out of tree build of version.h Write the version.h.tmp file into the build directory instead of source directory. This allows out of tree building when those two are not the same. Signed-off-by: Joonas Lahtinen Signed-off-by: Thomas Wood commit 42b02c284ed24871528df8f1b3eaad7fe1554fd9 Author: Thomas Wood Date: Mon Dec 8 11:12:51 2014 +0000 lib: add a function to lock memory into RAM Add a function to lock memory into RAM and use it in the gem_tiled_swapping test to reduce the amount of allocated memory required to force swapping. This also reduces the amount of time required for the test to complete, since the data set is smaller. The following durations were recorded with gem_tiled_swapping on a haswell system before the change: Subtest non-threaded: SUCCESS (55.889s) Subtest threaded: SUCCESS (810.532s) and after: Subtest non-threaded: SUCCESS (11.804s) Subtest threaded: SUCCESS (268.336s) v2: add various assertions and requirements and make sure gem_tiled_swapping works on systems with less RAM (Daniel Vetter) v3: fix allocation size calculation Signed-off-by: Thomas Wood commit 5fe9c88bdad9bf54013b58f2324b7b47d92ca09d Author: Thomas Wood Date: Tue Dec 2 11:37:26 2014 +0000 lib: add optional log domain filtering v2: add an "application" filter for the default domain (used by applications) Signed-off-by: Thomas Wood commit 8161a21762b552d97fe6bde8d4fd441d9cd10f61 Author: Thomas Wood Date: Tue Dec 2 10:54:54 2014 +0000 lib: introduce log domains Log domains can be used to identify the source of log messages, such as the test being run or the helper library. v2: Add separate domains for different parts of the helper library and use an empty default domain for applications. Expand the log output to include the process name and the log level of the message in addition to the domain and pid. Print the expanded message only for warning and debug messages. v3: check for glibc before using program_invocation_short_name Signed-off-by: Thomas Wood commit 85b74d5c14506bbae53ab02408102645e071a206 Author: Thomas Wood Date: Tue Dec 2 10:53:47 2014 +0000 tests/gem_tiled_swapping: use igt_info logging wrapper Signed-off-by: Thomas Wood commit 16f1506ff605127121249d35a233d1ba438ffeef Author: Thomas Wood Date: Wed Dec 10 16:24:03 2014 +0000 tests: replace 3D test images Use images with a smaller file size, created by saving the left and right stereo output of glxgears. Signed-off-by: Thomas Wood commit bdbf78db018d0d1854ea4274d983cf32e57a7d74 Author: Thomas Wood Date: Wed Dec 10 14:47:45 2014 +0000 tools: add missing copyright headers Signed-off-by: Thomas Wood commit f3ae3deb4f7266cd761a6c81ea2263ced23c2fc3 Author: Thomas Wood Date: Fri Dec 5 14:46:28 2014 +0000 NEWS: Updates Signed-off-by: Thomas Wood commit e80922eba61e71bbaae3febf5c69f0ed00809591 Author: Thomas Wood Date: Fri Dec 5 14:07:53 2014 +0000 Add a MAINTAINERS file Acked-by: Daniel Vetter Signed-off-by: Thomas Wood commit 84f23415c4a82ed3bd230701b2c085ca5dd699a3 Author: Thomas Wood Date: Wed Oct 29 11:18:27 2014 +0000 Update README Signed-off-by: Thomas Wood commit 5d46f68eab1cb6bdaa52eff33bcb0d61149eca3d Author: Ville Syrjälä Date: Tue Dec 9 22:33:16 2014 +0200 tests/kms_cursor_crc: Restore the valid pipe/connector combo check The valid pipe/connector combo check was lost in commit 57259d714d3fe1170cf931af72648219856a9918 Author: Daniel Vetter Date: Mon Nov 24 16:08:32 2014 +0100 lib/igt_debugfs: Don't setup crc in _new Restore it to make the test again useful on CHV. Cc: Daniel Vetter Signed-off-by: Ville Syrjälä commit b6f68c10b4ee2b730baeb8129aba36b5210ac291 Author: Ville Syrjälä Date: Tue Dec 9 14:44:02 2014 +0200 tests/kms_mmio_vs_cs_flip: Count valid tests for all crtcs Report SKIP only if none of the pipe/connector combos worked, instead of trying to report for each pipe separately. Signed-off-by: Ville Syrjälä commit 1b6eb414f36f3728f5c0393d8f4eefee74abdce9 Author: Ville Syrjälä Date: Tue Dec 9 15:27:59 2014 +0200 lib/igt_debugfs: Throw away the two first CRCs On CHV we sometimes see not just one but two bad CRCs. No real idea what would cause that, but let's just throw away the second CRC as well to gain some stability for the tests. Signed-off-by: Ville Syrjälä commit 01153e7d5f0b8d4edb0306c2a27030d2757235f4 Author: Damien Lespiau Date: Tue Dec 9 17:10:42 2014 +0000 drv_hangman: Remove unused function Signed-off-by: Damien Lespiau commit d49ef76e98d5966c31f6b960dcc1530103b42ae9 Author: Damien Lespiau Date: Tue Dec 9 17:07:22 2014 +0000 kms_cursor_crc: Remove value to 'return' in a void function Signed-off-by: Damien Lespiau commit c252c77dbfae6c7ed4d9a67b2bf545c468c2e205 Author: Jani Nikula Date: Wed Feb 12 16:29:54 2014 +0200 tools: terminate getopt_long long option arrays properly The last element of the long options array has to be filled with zeros. Signed-off-by: Jani Nikula commit f333981e1a2f5e7a16d030469c29b53c914a831c Author: Ville Syrjälä Date: Fri Nov 28 09:30:45 2014 +0200 tests/kms_flip: Target the back buffer with the dummy load Aim the dummy load to the current back buffer instead if the front buffer. Assuming the idea is to get the next flip to be stuck behind the dummy load? Signed-off-by: Ville Syrjälä commit 092682a3e5a48bf3555fdb7c4931fecc1df09f9e Author: Ville Syrjälä Date: Thu Nov 27 16:51:34 2014 +0200 tests/kms_flip: Calibrate the dummy load delay in kms_flip Try to tune the dummy load to ~1 second. The calibration happens the first time dummy load is generated. v2: Actually do the number of ops intended and calibrate to 1 second and not 2 Signed-off-by: Ville Syrjälä commit b0cb1e1f9d4b16a13c0afc16c809039fbb288213 Author: Ville Syrjälä Date: Wed Dec 3 15:25:25 2014 +0200 tests/kms_flip: Use fixed size (2kx2k) buffers for dummy load Make the dummy load independent of the display resolution by using a two fixed size dummy bos to generate the load. As a final step do another copy from one of the dummy bos to the fb to make sure there's a dependency between the dummy load and any subsequent operation on the fb. Signed-off-by: Ville Syrjälä commit 21db302c9bf8eb936f37f627aea40d3e431fc36c Author: Ville Syrjälä Date: Wed Dec 3 14:59:22 2014 +0200 tests/kms_flip: Refactor blit code Pull the code to emit a single blit to a separate function. Signed-off-by: Ville Syrjälä commit 8032f526ef1d075e303342b7741db35faadfd00f Author: Ville Syrjälä Date: Wed Dec 3 14:51:16 2014 +0200 tests: Run lib/igt.cocci Found some open coded min()/max()/swap() macros. Signed-off-by: Ville Syrjälä commit e1bdab9973ffdb5477666a384b011fa012965758 Author: Ville Syrjälä Date: Fri Nov 28 11:11:17 2014 +0200 lib/igt.cocci: Deal with min/max/swap Replace open coded min/max/swap with the macro invocation. Signed-off-by: Ville Syrjälä commit 1658edceee85bd5f57e8dd39075f1d127260d5b6 Author: Ville Syrjälä Date: Fri Nov 28 10:03:38 2014 +0200 lib: Add swap() macro swap() will swap its two arguments while keeping the required tmp variable hidden. Makes for neater code. Signed-off-by: Ville Syrjälä commit b32b5327a20b3747890235c362b093439b854f59 Author: Imre Deak Date: Thu Dec 4 17:23:05 2014 +0200 tests/pm_rps: vlv: round middle point to freq supported by HW When setting the calculated middle frequency value the test assumes that the HW/kernel rounds this value according to a 50MHz step value. This is not so at least on VLV/CHV, on my B0 BYT-M for example this step value is 22MHz, so there the test will fail. To fix this get the nearest supported value by setting the target frequency as a min or max frequency and read it back. The kernel will round the returned value to the nearest supported. v2: - remove the 50MHz rounding that was done for non-VLV platforms, the new way of rounding should provide the correct value for all platforms (Ville) Acked-by: Daniel Vetter Signed-off-by: Imre Deak commit f70afed4c7abd95fc3250141a1e36587e31f7c87 Author: Imre Deak Date: Thu Dec 4 17:05:25 2014 +0200 tests/pm_rps: vlv: load gpu for idle min/max tests When changing the sysfs GT min/max frequencies, the kernel won't explicitly change the current frequency, unless it becomes out of bound based on the new min/max values. The test happens to work on non-VLV platforms because on those the kernel resets the current frequency unconditionally (to adjust the RPS interrupt mask as a side-effect) and that will lead to an RPS interrupt setting the minimum frequency. To fix this load the GPU after decreasing the min frequency and before checking the current frequency. This should set the current frequency to the minimum. Acked-by: Daniel Vetter Signed-off-by: Imre Deak commit aabf2d095269ae4cb8e77dd61e5c0c16e602c1d8 Author: Imre Deak Date: Thu Dec 4 16:40:19 2014 +0200 tests/pm_rps: vlv: wait for freq to settle At least on VLV when forcing a new GT frequency by writing to the min/max freq sysfs entries the kernel doesn't wait until the new frequency settles, so the subsequent readback check might fail. To fix this wait until the current frequency is between the min/max values using a 10ms timeout. Acked-by: Daniel Vetter Signed-off-by: Imre Deak commit 470071d4aba10f85b3728cf24acd792a273c1d28 Author: Chris Wilson Date: Mon Dec 8 07:49:49 2014 +0000 igt/drm_read: Require that pipe 0 is active As we require a pipe enabled to generate vblanks, the first step is to then to check that pipe 0 is active or else skip the test. Signed-off-by: Chris Wilson commit 819e68f2ed0064f48250a4ed8e5135026c90b514 Author: Chris Wilson Date: Fri Dec 5 13:12:37 2014 +0000 igt/drm_read: Abuse read(drm) Check that the more obvious userspace error conditions are handled by the kernel, ideally without loss of data. These include nonblocking waits, passing invalid buffers and passing buffers of the incorrect length. Signed-off-by: Chris Wilson commit b64704673e2a4d891386a1200150e679216b6d60 Author: Chris Wilson Date: Fri Dec 5 11:04:42 2014 +0000 intel_error_decode: Decode the ERROR register on Sandybridge and Ivybridge Signed-off-by: Chris Wilson commit 88ff1cec3a830fc467b91efb7e1dcdb4d82a0e17 Author: Damien Lespiau Date: Thu Dec 4 13:42:12 2014 +0000 gem_bad_reloc: Don't flip-flop between SKIP and PASS Here is a cheap way for this test to give consistent results. This doesn't change the usefulness of this test, hopefully. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=85270 Acked-by: Daniel Vetter Signed-off-by: Damien Lespiau commit b3cce757b5e8c0d6b40e2c401e5391162d58e8c6 Author: Thomas Wood Date: Thu Dec 4 11:13:04 2014 +0000 tests: add gem_gpgpu_fill to .gitignore gem_gpgpu_fill was added in commit 4ec8479 (tests: Add gem_gpgpu_fill), but wasn't added to .gitignore. Cc: Zhenyu Wang Signed-off-by: Thomas Wood commit c76f35386c2533e9959be37feca0e80d252fec30 Author: Thomas Wood Date: Wed Dec 3 14:38:45 2014 +0000 lib: always reset connectors after the state is forced Install the exit handler to reset connector states whenever kmstest_force_connector is called, so that the connector states are always reset even if a test fails. Signed-off-by: Thomas Wood commit 8d82e5b5efb56bdf1aa2eae8a3d82817854e119b Author: Thomas Wood Date: Wed Oct 8 16:16:39 2014 +0100 lib: remove igt_edid.h This has been replaced by igt_kms_get_base_edid(). Signed-off-by: Thomas Wood commit 304c874b58c0a65dcc5442c50099d048d4fe0633 Author: Thomas Wood Date: Wed Oct 8 15:24:36 2014 +0100 tests: use base edid Use the base edid for testing, which includes several different display modes. Signed-off-by: Thomas Wood commit 43da3e706b955751506073e1c0e959209f6c7cf4 Author: Thomas Wood Date: Wed Oct 8 14:49:36 2014 +0100 tests/kms_force_connector: split into subtests v2: fix the initial mode count Signed-off-by: Thomas Wood commit 273a06dc9b68f9c6d78431de23a12ad7364bff99 Author: Thomas Wood Date: Wed Oct 8 14:11:30 2014 +0100 igt_kms: add a base edid Add a basic edid block that includes several different display modes. Signed-off-by: Thomas Wood commit b2ac2642a9b5448761086bdb8ae1a1e2974b3995 Author: Thomas Wood Date: Fri Nov 28 11:02:44 2014 +0000 tests: add more test descriptions Add more test descriptions based on exiting comments. Signed-off-by: Thomas Wood commit 029dee797965357dbcbe5a097731701e4d965d82 Author: Thomas Wood Date: Fri Nov 28 11:37:33 2014 +0000 docs: treat the test description as cdata Enclose the test description in cdata tags since the test descriptions come from the tests themselves and may not be escaped for use in xml. Signed-off-by: Thomas Wood commit a5425a101cd38941961c13f97b56aa0683f64f8e Author: Thomas Wood Date: Wed Nov 19 15:44:00 2014 +0000 docs: add a glossary of test name terms Add a glossary of test name terms based on the details in tests/NAMING-CONVENTION. Signed-off-by: Thomas Wood commit bc6dc7efdb65a6f5ac01cc2c306951dd9dd92fc4 Author: Thomas Wood Date: Wed Nov 26 18:20:03 2014 +0000 docs: add exit status documentation Signed-off-by: Thomas Wood commit e4e18faffc21cceb1f45c6bbfad9f1ceacdccf05 Author: Thomas Wood Date: Fri Nov 28 11:49:49 2014 +0000 docs: add subtest lists to test descriptions Signed-off-by: Thomas Wood commit 7d2ab7083b46d30335cdb01006ae8af021578ea2 Author: Thomas Wood Date: Mon Nov 17 11:51:51 2014 +0000 docs: split the test program documentation into sections Signed-off-by: Thomas Wood commit 4ec8479c53f187cc435f118d90f73ffa43887cd0 Author: Zhenyu Wang Date: Wed Dec 3 19:09:13 2014 +0800 tests: Add gem_gpgpu_fill This is simply a copy of gem_media_fill but using new GPGPU fill operation. v2: Use general fill func pointer. Signed-off-by: Zhenyu Wang commit 10c6ad3805489819047ee24379bb1e7ab08ead1d Author: Zhenyu Wang Date: Wed Dec 3 19:05:09 2014 +0800 lib: Add GPGPU fill This is to add fill operation using GPGPU pipeline which is similar to current media fill. This can be used to simply verify GPGPU pipeline and help to enable it on newer HW, currently it works on Gen7 only and will add support on later platform. Now this sets very simply thread group dispatch for one thread per thread group on SIMD16 dispatch. So the fill shader just uses thread group ID for buffer offset. v2: No new fill func typedef but adapt to igt_fillfunc_t. Signed-off-by: Zhenyu Wang commit 106f0bf965ac5ba8e5553e3e1b39396750bedc74 Author: Zhenyu Wang Date: Wed Dec 3 18:56:39 2014 +0800 lib: rename igt_media_fillfunc_t typedef to igt_fillfunc_t This makes fill function more general to prepare for other fill method using GPGPU pipeline. Signed-off-by: Zhenyu Wang commit 4e5c16c17ed14831aaa369877d78788ad23ce388 Author: Tim Gore Date: Mon Dec 1 14:42:37 2014 +0000 tests/drv_hangman: remove check for other drm clients This test will not run on Android as the coreu service remains running even after the android system is stopped. Coreu is a client of drm and when the test finds this it fails an assert. Coreu is started by the init process and there is no tidy, non invasive way to stop it (init just restarts it). Coreu isn't doing anything and would not be expected to interfere with this test. In addition, all the other igt tests just rely on the user/test script to ensure that there are no other drm clients, so this test can do the same. On Android we must rely on coreu being dormant when this test runs. Signed-off-by: Tim Gore Signed-off-by: Daniel Vetter commit 77b52f1881c0c62732a1deef8b900e50f1f22301 Author: Tim Gore Date: Tue Nov 18 14:59:25 2014 +0000 tests/Android.mk: Add kms_pwrite_crc to cairo test list kms_pwrite_crc was recently added and requires cairo, so add this to the list of tests to exclude if cairo is not avaiable Signed-off-by: Tim Gore Signed-off-by: Thomas Wood commit e06a7448d894392a294d89959fc1cf4e6a01fd19 Author: Ville Syrjälä Date: Fri Nov 28 11:13:45 2014 +0200 tests/kms_flip: Fix assert about vblank wait duration If we wait for one vblank, we may end up returning almost immediately, so trying to assert anything but >0 about the minimum duration is bogus. Instead wait for two vblanks and then we can assert that we should have be blocked for at least one frame. And move the upper bound to a little over two frames to match. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79050 Signed-off-by: Ville Syrjälä commit ddf0f097764da6fdc50ab40c33bef7a0c08d54e3 Author: Tim Gore Date: Fri Nov 28 14:46:24 2014 +0000 tests/gem_ring_sync_copy: reduce memory usage gem_ring_sync_copy uses a lot of memory and gets OOM killed on smaller systems (eg android devices). Most of the allocation is for "busy work" to keep the render rings busy and for this we can just re-use the same few buffers over and over. This enables the test to be run on low end devices. Reviewed-by: Damien Lespiau Signed-off-by: Tim Gore Signed-off-by: Damien Lespiau commit dbac905600c37f180618e6b4467cafbb6c3f8f2a Author: Thomas Wood Date: Tue Nov 25 14:10:04 2014 +0000 lib: ensure subtests are not added to simple tests Simple tests do not support subtests, so fail if igt_subtest is used in one. Signed-off-by: Thomas Wood commit 3bebf3dd011cb7acf280d4deb02723718149a99c Author: Thomas Wood Date: Tue Nov 25 14:03:40 2014 +0000 tests: use subtests in gem_tiled_swapping Signed-off-by: Thomas Wood commit ae3a9466316d61ab336f43d06e6ed8bc5025389a Author: Thomas Wood Date: Tue Nov 25 11:59:37 2014 +0000 lib: fix symbol names in documentation comments Signed-off-by: Thomas Wood commit b8f193bbbff1a322296969ded5a4c3f9fd759c6d Author: Gagandeep S Arora Date: Thu Nov 13 23:42:46 2014 +0530 demos/intel_sprite_on: Added support to compile intel_sprite_on on Android. Added Android.mk for intel_sprite_on. v2: Addressed review comments by Daniel Vetter. - Moved the cairo independent functions from igt_kms.c to igt_aux.c. Signed-off-by: Gagandeep S Arora Signed-off-by: Thomas Wood commit dad4694b004a65455523abbb0c7f9839d7125dae Author: Thomas Wood Date: Mon Nov 24 14:16:25 2014 +0000 lib: fix igt_reset_connectors Use igt_debugfs_open to open the connector file, since the forced_connectors array now only stores the connector path relative to the debugfs path. Also add some extra error checking to ensure a test failure if the reset fails. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=85829 Signed-off-by: Thomas Wood Signed-off-by: Daniel Vetter commit 57259d714d3fe1170cf931af72648219856a9918 Author: Daniel Vetter Date: Mon Nov 24 16:08:32 2014 +0100 lib/igt_debugfs: Don't setup crc in _new The problem is that this causes writes to registers, and if the pipe is off they might go nowhere (e.g. when runtime pm is enabled). Furthermore we can only really check once the modeset setup is done, but again most tests set up the CRC structure before calling igt_commit and friends. We could add crc restore support to the kernel's rpm code, but that will end up being rather invasive and fragile hard-to-test code. Now originally this was needed back when CRC support wasn't available everywhere. But that's fixed now. So given all this just drop that sanity check and make sure that we only touch the debugfs file (and so the hw state) when we know the pipe is running in the desired configuration. A complementary kernel patch will try to catch offenders by returning -EIO if the pipe is off. v2: Forgot to git add one hunk. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86092 Signed-off-by: Daniel Vetter commit d8078911f63494eba67f8f07ffb56c4bdeae7bc9 Author: Daniel Vetter Date: Tue Nov 18 15:17:43 2014 +0100 tests/kms_render: gen2/3 can't do 10bpc So skip those. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86236 Signed-off-by: Daniel Vetter commit 08f0e1c625571533bbef9a591d4ae4ce65c4144d Author: Daniel Vetter Date: Tue Nov 18 13:49:29 2014 +0100 tests/prime_self_import: Track leaked objects accurately drm_open_any keeps a buffer handle around for the cleanup sync work, so we can only grab the buffer count after the latst drm_open_any call. Otherwise we'll detect a fake leak. This broke in commit 2f2c491cf3167befe7c79e4b17afb4f6284dfc84 Author: Mika Kuoppala Date: Fri Mar 28 10:52:46 2014 +0200 lib/drmtest: don't dup quiescent fd since that additional open drm fd keeps a gem object for the default context around. Hence why this also only blows up on gen6+ - earlier platforms don't have hw context support. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79821 Cc: Mika Kuoppala Signed-off-by: Daniel Vetter commit 120d6d1b2c8b3f036058bf2d24d08602dea69ec9 Author: Daniel Vetter Date: Tue Nov 18 10:39:38 2014 +0100 lib/aux: Make it clear that rtcwake failures aren't bugs Because QA has a bunch of shitty machines with old distros and tends to re-port this all the time. References: https://bugs.freedesktop.org/show_bug.cgi?id=82232 Signed-off-by: Daniel Vetter commit 16f99ee419f56bf7b56657c78ecaa22ccf0c2982 Author: Daniel Vetter Date: Mon Nov 17 14:46:50 2014 +0100 lib/os: Push simulation test down into intel_require_memory This has the upside that we'll never forget to add it to thrashing tests. But we'll also never miss to move it when adding basic functionality tests to existing binaries. Chris already started this refining work in e.g. commit d77eda6614a1955717f224be023dedf74eb7735d Author: Chris Wilson Date: Fri Nov 14 07:45:40 2014 +0000 igt/gem_linear_blits: Require that we do the full test by moving igt_skip_on_simulation into subtests. Cc: Chris Wilson Signed-off-by: Daniel Vetter commit a535cdedfbd280c5e07be1c2445e09973836509a Author: Daniel Vetter Date: Mon Nov 17 14:43:33 2014 +0100 lib/os: Pust igt_require into memory check function More in line with the usual igt pattern and simplifies the code - every called just wrapped it in igt_require. Signed-off-by: Daniel Vetter commit aa63fc740c510ed44c1a8dc0fc00f0c92c0581a2 Author: Thomas Wood Date: Fri Nov 7 14:45:01 2014 +0000 configure: update bug reporting url Signed-off-by: Thomas Wood commit f674a1f61fe1e63209ba3fab05313ba14ffd071e Author: Chris Wilson Date: Fri Nov 14 07:45:40 2014 +0000 igt/gem_tiled_blits: Require that we do the full test Signed-off-by: Chris Wilson commit d77eda6614a1955717f224be023dedf74eb7735d Author: Chris Wilson Date: Fri Nov 14 07:45:40 2014 +0000 igt/gem_linear_blits: Require that we do the full test Signed-off-by: Chris Wilson commit b35b1505f762839b0e9a0f8a146804444566a92a Author: Imre Deak Date: Thu Nov 13 13:33:54 2014 +0200 tests/pm_rpm: add gem-evict-pwrite subtest This triggers a device suspended WARN in the kernel in gen6_ggtt_insert_entries() while calling the GEM pwrite ioctl. The sequence is suggested by Daniel. Signed-off-by: Imre Deak Reviewed-by: Daniel Vetter commit f12ed8305807975e232e42fd34ad75e1147a788e Author: Ville Syrjälä Date: Thu Nov 13 17:24:57 2014 +0200 tests/kms_pwrite_crc: Add pwrite vs display coherency test Add a test to verify that pwriting to a future scanout buffer works correctly. The specific problem occurs when the buffer is already UC/WT before the pwrite, not the current scanout buffer, and not currently in the CPU write domain. With the buggy kernel no clflush will be performed after the pwrite, and hence we end up with cache dirt on the display. The problem only affects LLC platforms (non-LLC would clflush anyway after pwrite), but we can let the test run on all platforms. v2: Fix typos in commit message and add to .gitignore Signed-off-by: Ville Syrjälä commit ebab9f080b24ac11507e872fcfdf58ea9cb7e6fc Author: Thomas Wood Date: Thu Nov 13 11:47:19 2014 +0000 lib: only skip subsequent tests if a timeout occurs outside of a subtest Make timeout behaviour more consistent with igt_fail, where subsequent subtests are only skipped if the failure occurs outside of a subtest. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=85718 Signed-off-by: Thomas Wood commit f6aa80ca18f3dc5fe751c941fb1af6b4b44d21ef Author: Thomas Wood Date: Mon Nov 10 15:09:51 2014 +0000 tests/kms_flip: add a timeout for the nonblocking-read test kms_flip/nonblocking-read will block indefinitely if it fails, so introduce a timeout to indicate test failure. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=85718 Signed-off-by: Thomas Wood commit 34424138bcee87dc8e3c7555f28aa2642668e2e8 Author: Thomas Wood Date: Fri Nov 7 16:25:59 2014 +0000 lib/tests: add a test for igt_set_timeout Signed-off-by: Thomas Wood commit 6ee3337b28b3598da723099d43ae14fac96d06e5 Author: Daniel Vetter Date: Fri Nov 7 10:40:32 2014 +0100 tests/gem_exec_parse: Go OCD about C-style comments Cc: Brad Volkin Signed-off-by: Daniel Vetter commit bf31ed80e097d6d69c436a5070f6ab6d0a5d08b6 Author: Brad Volkin Date: Mon Nov 3 11:19:00 2014 -0800 tests/gem_madvise: set execbuf.batch_len before doing an execbuf The command parser's batch_len optimization causes the parser to reject this batch as not having an MI_BATCH_BUFFER_END because the length was not set correctly. Signed-off-by: Brad Volkin Signed-off-by: Daniel Vetter commit c1fdc2f0e95714e20b157e318f07110219a2237f Author: Brad Volkin Date: Mon Nov 3 11:18:59 2014 -0800 tests/gem_exec_parse: fix batch_len setting for cmd-crossing-page The size of the batch buffer passed to the kernel is significantly larger than the size of the batch buffer passed to the function. A proposed optimization as part of the batch copy kernel series is to use batch_len for the copy and parse operations, which leads to a false "batch without MI_BATCH_BUFFER_END" failure for this test. To fix this, modify the test to set batch_start_offset and batch_len such that they define the range of actual commands in the batch, including a few of the surrounding nops for alignment purposes. v2: update batch_start_offset as well Signed-off-by: Brad Volkin Signed-off-by: Daniel Vetter commit 4dd6e0edcf4fb2dd52fafa8b448ce87fafc4125d Author: Thomas Wood Date: Wed Nov 12 10:47:30 2014 +0000 configure: require automake 1.12 The check tests require AM_TESTS_ENVIRONMENT, which was added in automake 1.12. Signed-off-by: Thomas Wood commit 10aacc73348f77c8ca01f02730710d8d23fb04de Author: Thomas Wood Date: Wed Nov 12 10:39:41 2014 +0000 tests: ensure the script based tests are included in the distribution TESTS_scripts was accidentally removed from EXTRA_DIST in commit 685e577 (Move library selftests to lib/tests). Cc: Daniel Vetter Signed-off-by: Thomas Wood commit 50d539efebbd71b4f5499e69d0768e69dceae09a Author: Mika Kuoppala Date: Fri Nov 7 15:33:34 2014 +0200 tests/gem_reset_stats: add defer-hangcheck test to see if one can fool hangcheck by keeping non hanging ring busy v2: break from loop instead of return (Daniel Vetter) Cc: Chris Wilson Signed-off-by: Mika Kuoppala commit c049c39f357295ecfc4d0795b5b3b1e35b04ac58 Author: Thomas Wood Date: Mon Nov 3 13:48:51 2014 +0000 tests: use igt_debugfs where possible Signed-off-by: Thomas Wood commit 4f689d52e7e6a511fb0de21ccc0b938d57ce6f41 Author: Thomas Wood Date: Thu Oct 30 15:54:44 2014 +0000 tests/drm_lib.sh: add a "--help-description" option Signed-off-by: Thomas Wood commit 895204fc6257f8ce2cae380f98cab4fd753251a1 Author: Thomas Wood Date: Thu Oct 30 15:54:02 2014 +0000 testdisplay: add a test description Signed-off-by: Thomas Wood commit 98188b4b416fe066f8d7c8ea18b4186c3381223b Author: Thomas Wood Date: Tue Oct 14 15:02:54 2014 +0100 docs: include descriptions for the test programs v2: fix various distcheck issues Signed-off-by: Thomas Wood commit e6fec38cf7151596d3f9ead99ea5386be7a7b6de Author: Thomas Wood Date: Tue Oct 14 13:46:57 2014 +0100 Build the docs directory last Ensure that other components are built before generating the documentation. v2: build the docs directory after any optional directories Signed-off-by: Thomas Wood commit 3d0dca47c6fdec0720aca8016af9a889a0eb3409 Author: Thomas Wood Date: Mon Oct 13 11:40:12 2014 +0100 docs: add some test descriptions Signed-off-by: Thomas Wood commit f8b3c704af190fcf49f358ea1395ad8fb8b5b5cb Author: Thomas Wood Date: Fri Oct 10 16:56:20 2014 +0100 lib: add the ability to include a description with a test The IGT_TEST_DESCRIPTION macro can be used to define a description for a test. v2: Remove semicolon from end of macro (Damien Lespiau) Add API documentation for the macro. Signed-off-by: Thomas Wood commit c06016798cbd24c24283dbdb3ac2762834d04bcf Author: Thomas Wood Date: Fri Oct 31 15:45:09 2014 +0000 configure: fix issues when running outside the source tree Signed-off-by: Thomas Wood commit ce0d34d73d240a95193a4a6f82adfe5f4844bb66 Author: Thomas Wood Date: Fri Oct 31 15:00:03 2014 +0000 testdiplay: add a "--help" option Signed-off-by: Thomas Wood commit db425d69f62690a95048fde6d5dc515686bfa9ac Author: Thomas Wood Date: Fri Oct 31 12:32:22 2014 +0000 testdisplay: ensure invalid long option exit status is non-zero The optopt variable is not set if an invalid long option is used, so check the current option character instead. Signed-off-by: Thomas Wood commit b441e6ac2ac98ee2f365683f339c8802d238043f Author: Thomas Wood Date: Fri Oct 31 11:45:16 2014 +0000 lib/tests: don't use hard error status to indicate test failure An exit status of 99 is reported separately in the test summary as an error, rather than as a test failure. Signed-off-by: Thomas Wood commit 03a4ad16d17b201ba719bc48d2fb2de341a1cf2f Author: Thomas Wood Date: Fri Oct 31 11:38:02 2014 +0000 lib/tests: fix tests and test list location The igt_command_line.sh script was moved by commit 685e577 (Move library selftests to lib/tests), but the location of the tests and the test lists was not updated. Cc: Daniel Vetter Signed-off-by: Thomas Wood commit 86bb6072a6e104e59ebbea2b41d4d86aeed134dc Author: Thomas Wood Date: Wed Nov 5 15:58:54 2014 +0000 tools/quick_dump: don't include generated sources in the distribution This also ensures that "make dist" works even if SWIG is not available. BUILT_SOURCES is not required because the files are already explicit dependencies of other rules. v2: make sure SWIG is not invoked with the incorrect output filename Signed-off-by: Thomas Wood commit 2c44d6316a15170a5e2897488729f3d6868e0a1c Author: Zhao Yakui Date: Thu Nov 6 16:02:31 2014 +0800 Mediafill/skl: Remove redundant field to fix GPU hang After applying the commit(982f7eb238a0898c456e0574dee7c4507738d75f), the OUT_RELOC is updated on Broadwell and later, which is to handle the 64-bit field of gfx address internally. In such case some commands should be fixed, otherwise GPU hang will be triggered when running gem_media_fill. (It is already fixed on Broadwell) Reviewed-by: Damien Lespiau Signed-off-by: Zhao Yakui Signed-off-by: Damien Lespiau commit c68028936b83a316c7360fe2dc1276cf2424c116 Author: Zhao Yakui Date: Thu Nov 6 16:02:30 2014 +0800 Rendercopy/skl: Remove redundant field to fix GPU hang After applying the commit(982f7eb238a0898c456e0574dee7c4507738d75f), the OUT_RELOC is updated on Broadwell and later, which is to handle the 64-bit field of gfx address internally. In such case some commands should be fixed, otherwise GPU hang will be triggered when running rendercopy. (It is already fixed on Broadwell) Reviewed-by: Damien Lespiau Signed-off-by: Zhao Yakui Signed-off-by: Damien Lespiau commit e34240d4c18bfef1895fad6e8ce9cc80c844ac14 Author: Brad Volkin Date: Tue Nov 4 14:00:43 2014 -0800 tests/drv_hangman: skip a few asserts when using the cmd parser This test has a few checks that batch buffer addresses in the error state match the expected address for the userspace supplied batch. But the batch buffer copy piece of the command parser means that the logged addresses are actually _supposed_ to be different. So skip just those checks. Signed-off-by: Brad Volkin Signed-off-by: Daniel Vetter commit a973aabed04bb00686b9fd4ce4c1d83ad9b8b0e7 Author: Chris Wilson Date: Tue Nov 4 16:34:40 2014 +0000 tests: Remove spurious binaries from gem_tiled_wb commit commit c45216b26d223ffd7f68c5794870214445a64b5c Author: Chris Wilson Date: Tue Nov 4 07:30:57 2014 +0000 igt/gem_tiled_wb: Exercise CPU mmaps with swizzling brought along a few interlopers. commit 83757d7b393e61502fdf331f8239da8acc34213c Author: Daniel Vetter Date: Tue Nov 4 17:24:55 2014 +0100 tests/prime_nv_test: Skip cpu mmap testcase It's not implemented yet, so no point in running the test really. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68638 Signed-off-by: Daniel Vetter commit fbc673023803b197453af3c7b985c941f654a8fb Author: Chris Wilson Date: Tue Nov 4 12:13:11 2014 +0000 igt/gem_tiled_wb: Remove extraneous mmap(wc) requirement Signed-off-by: Chris Wilson commit c45216b26d223ffd7f68c5794870214445a64b5c Author: Chris Wilson Date: Tue Nov 4 07:30:57 2014 +0000 igt/gem_tiled_wb: Exercise CPU mmaps with swizzling This exercises the the extended get_tiling ioctl in order to determine proper swizzling for direct access to objects through WB. Userspace cannot handle bit17 swizzling through wc mmaps (because bit17 requires swizzling based on the actual physical address of the page - which is unknown to userspace) and so we need an extended get_tiling ioctl to report the actual as well as the logical swizzling on an object. Signed-off-by: Chris Wilson commit 6fff1f8787687a08f66c28007abe1f1edebd5124 Author: Chris Wilson Date: Tue Nov 4 12:06:17 2014 +0000 ioctl_wrappers: Pass in offset to CPU mmaps Signed-off-by: Chris Wilson commit 676ccf862c4039f8e9cea8fb23bea053f9f5cf83 Author: Chris Wilson Date: Tue Nov 4 07:40:11 2014 +0000 igt/gem_linear_blits: Add sufficient RAM check References: https://bugs.freedesktop.org/show_bug.cgi?id=85834 Signed-off-by: Chris Wilson commit e6228509664190a24cb1c22ac597ace8f79ecdd7 Author: Thomas Wood Date: Wed Oct 29 12:26:09 2014 +0000 lib/igt_core.h: add debug messages for test requirements Signed-off-by: Thomas Wood commit d950f37be32a2bcf1a3da867bed3f9f397fb912d Author: Thomas Wood Date: Wed Oct 29 12:03:22 2014 +0000 lib/igt_core.h: fix igt_skip_on_f requirement message Signed-off-by: Thomas Wood commit 5a61421a02fe40a1dcf9f8575d5a5c136da3fdd4 Author: Thomas Wood Date: Wed Oct 29 17:20:52 2014 +0000 lib/tests: use the "check_" prefix for tests The "check_" prefix ensures the test programs are not installed and are only built when "make check" is run. Signed-off-by: Thomas Wood commit b78d142a1583e850713474d8053bea643247b8af Author: Thomas Wood Date: Wed Oct 29 17:18:06 2014 +0000 build: fix distcheck Fix distcheck issues introduced by commit 685e577 (Move library selftests to lib/tests). Cc: Daniel Vetter Signed-off-by: Thomas Wood commit ab5f7eace1857e60b6432dcabde98089380e5e74 Author: Thomas Wood Date: Wed Oct 29 16:17:41 2014 +0000 lib: ensure the library is built before the tests This fixes the build problems introduced by commit 685e577 (Move library selftests to lib/tests). Cc: Daniel Vetter Signed-off-by: Thomas Wood commit ad5cb25d702d7c5faada1de6f9208114a189cab1 Author: Gagandeep S Arora Date: Sat Sep 13 01:26:04 2014 +0530 demos/intel_sprite_on: Added support to display all sprites. Extended intel_sprite_on functionality to display all the available sprite planes on a particular connector. Signed-off-by: Gagandeep S Arora Signed-off-by: Thomas Wood commit b6715d9aa7af22316c356d62a917bb034bab7c5f Author: Daniel Vetter Date: Wed Oct 29 13:31:15 2014 +0100 tests: Reenable testdisplay This seems to have been accidentally disabled in commit 982f7eb238a0898c456e0574dee7c4507738d75f Author: Chris Wilson Date: Fri Aug 29 15:19:57 2014 +0100 Prepare for 64bit relocation addresses Apparently no one noticed. Cc: Chris Wilson Signed-off-by: Daniel Vetter commit 97f33912555cd15915ce2b8637bdd05ea0632943 Author: Daniel Vetter Date: Wed Oct 29 13:28:55 2014 +0100 tests/testdisplay: Fix test status check fumble This is a regression from 4306538d1d3f60877866c39c9ca953cc5e541dae is the first bad commit commit 4306538d1d3f60877866c39c9ca953cc5e541dae Author: Daniel Vetter AuthorDate: Thu Oct 2 11:18:20 2014 +0200 Commit: Daniel Vetter CommitDate: Thu Oct 2 11:34:55 2014 +0200 tests: Sprinkle missing igt_exit() where needed. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=85582 Signed-off-by: Daniel Vetter commit c15e6933bc5b9b224818ff43060cb0a436e24345 Author: Daniel Vetter Date: Tue Oct 28 10:54:32 2014 +0100 Add CONTRIBUTING file i-g-t has become a fairly big project with lots of people involved, so lets document the basics and formalize the current process a bit. Also use this opportunity to announce Thomas Wood as igt maintainer once more. v2: Recommend --subject-prefix="PATCH i-g-t" as suggested by Damien. v3: Clean out contributing-related information from README. Cc: Thomas Wood Cc: Damien Lespiau Signed-off-by: Daniel Vetter commit 685e57736a2c5da2e955ffd2f0027e4b42e397f7 Author: Daniel Vetter Date: Mon Oct 27 15:08:50 2014 +0100 Move library selftests to lib/tests Again they're not really igt testcases so are in the way of running spatch unconditionally. Move them someplace else. Signed-off-by: Daniel Vetter commit 9d6a2cacf6796c8e06e4b7432c5f795d4ee56d8b Author: Daniel Vetter Date: Mon Oct 27 14:51:55 2014 +0100 Move watermark code from tests to tools They're now igt tests, and so if you blindly run lib/igt.cocci with spatch on tests/*c they get mangled. Move them away, but still keep them as noinst targets. Signed-off-by: Daniel Vetter commit 15972aa8666781ad557f17ed4b5d689cdb657d78 Author: Paulo Zanoni Date: Fri Oct 24 17:40:04 2014 -0200 tests/pm_rpm: add system-suspend-{execbuf,modeset} subtests We were having a problem where the system-suspend test was passing, but then the next test - gem-execbuf-stress - was failing because of bugs caused by the suspend subtest. So add a single test that emulates the same problem, and another test that just sets a mode after resume. This way, we should be reproducing the problem even if you don't run the tests in the order they are defined. Signed-off-by: Paulo Zanoni commit cba3088619745f509a10d1339db2cd279913e051 Author: Damien Lespiau Date: Wed Oct 15 23:13:30 2014 +0100 skl_ddb_allocation: Respect the minimum number of blocks Signed-off-by: Damien Lespiau commit 7296e09ee7f17e6d564e52cf64ee900670849429 Author: Ville Syrjälä Date: Tue May 27 21:33:10 2014 +0300 tests/kms_flip: Make flip-vs-panning-vs-hang change DSPSURF Make sure DSPSURF will change during the panning operation in flip-vs-panning-vs-hang. This will now test agains bugs between the kernel's mmio vs. CS flip race handling and GPU resets. If the kernel is buggy if will fail to notice that the panning operation changed the base address before the GPU reset had a chance to deal with the pending page flips, and so the flip would never complete due to DSPSURFLIVE not matching the expected value. Signed-off-by: Ville Syrjälä Signed-off-by: Daniel Vetter commit e497600fb73d138e51a641f7792f11822c20a929 Author: Chris Wilson Date: Fri Oct 24 07:40:04 2014 +0100 igt/gem_userptr_blits/dmabuf: Map the right pointer for !llc References: https://bugs.freedesktop.org/show_bug.cgi?id=85354#c2 Signed-off-by: Chris Wilson commit eae9f724f2335d8b44ef884e24b1590c3b0a3a33 Author: Mika Kuoppala Date: Mon Sep 15 13:01:31 2014 +0300 tests/gem_workarounds: adapt to constant wa list from driver Driver now returns the constant values that were set once on ring initialization time. Extend the simple interface check to all gens (i915_wa_registers needs to be present). Due to delay when render context is visible on cpu side, wait gpu to execute something on default context to get rid of undeterministic behaviour by sometimes getting all ones. Cc: Arun Siluvery Signed-off-by: Mika Kuoppala commit 8b556f7c8fc8b16fdeb7d23adb0e2fb54a8982fc Author: Daniel Vetter Date: Thu Oct 23 17:54:44 2014 +0200 tests/*: lib/igt.cocci found something! Signed-off-by: Daniel Vetter commit 47246981b2497f7a767506fec6f9993d4772183a Author: Sonika Jindal Date: Thu Oct 23 08:48:50 2014 -0700 kms_rotation_crc: Add test for cursor rotation (v2) v2: Slight rebasing onto latest i-g-t codebase (Matt). Signed-off-by: Sonika Jindal Reviewed-by: Matt Roper Signed-off-by: Matt Roper Signed-off-by: Daniel Vetter commit 4f6a6cbdfff104cd2382c09909d89bbda010dc29 Author: Mika Kuoppala Date: Mon Oct 20 13:27:55 2014 +0300 lib: fix #define max Regression from: commit be4710a541b517b5f8663448bffed5656d59b47b Author: Thomas Wood Date: Fri Oct 10 11:20:35 2014 +0100 lib: add common min and max macros Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=85218 Tested-by: Guo Jinxian Signed-off-by: Mika Kuoppala commit 18cb650318bb2c910f95d7c7df6625110ed1a590 Author: Chris Wilson Date: Thu Oct 23 07:55:54 2014 +0100 igt/gem_userptr_blits/dmabuf: Provide partial coverage on !llc platforms Without LLC, we cannot assume coherency between system RAM and the GTT. If we try to use the GTT with snooped memory, the machine may lock up, so the kernel prevents us from doing so, causing the test to fail. However, we still do want to verify that we can access the userptr through a dmabuf, so just check that we can make a copy from it using the GPU and ignore the GTT cross-checking. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=85354 Signed-off-by: Chris Wilson commit ac2079596c0a8119f77d58ae3d5e3f8e13e5b96d Author: Paulo Zanoni Date: Tue Oct 21 11:45:59 2014 -0200 lib/igt_aux: move audio RPM code to igt_setup_runtime_pm() If we don't enable audio runtime PM, the audio driver won't release its reference, the refcount won't ever become zero, so we will never actually runtime suspend. So move this code from pm_rpm.c to igt_aux.c, so kms_flip - and any other IGT test case using RPM - can benefit from it. Previously, if you ran pm_rpm before running the other tests - or if you just didn't have snd_hda_intel loaded - you wouldn't notice this bug. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78893 Reviewed-by: Daniel Vetter Signed-off-by: Paulo Zanoni commit a06071c0cf66f1a077563fb3ffa15856a57db18d Author: Brad Volkin Date: Wed Oct 15 14:52:42 2014 -0700 tests/gem_exec_parse: test for chained batch buffers libva makes extensive use of chained batch buffers. The batch buffer copy portion of the command parser has the potential to break chained batches, so add a simple test to make sure that doesn't happen. Signed-off-by: Brad Volkin Signed-off-by: Daniel Vetter commit bba1cd0091b3e8e987f15dac1f38d233b5b0ee78 Author: Paulo Zanoni Date: Tue Oct 14 13:52:58 2014 -0300 tests/kms_cursor_crc: HSW/BDW only have square cursors When I look at cursor_size_ok() (from the Kernel's intel_display.c), I see that only 845g and i865g support non-square cursors, so SKIP the tests on HSW/BDW instead of failing them. This problem happened because support for non-square cursors was being developed for HSW/BDW, but it ended up not being merged due to a small problem and priority changes. Let's make those tests SKIP until we have proper support on the Kernel: after that, we can revert this patch. v2: Improve commit message. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84268 Signed-off-by: Paulo Zanoni commit fc6d464a59ca33257b31ed8273681250a0807e9e Author: Paulo Zanoni Date: Tue Oct 14 16:01:10 2014 -0300 lib/igt_aux: make igt_wait_for_pm_status() resist the signal helper If the signal helper is active, the usleep() calls return earlier, and we may end up returning false way before the 10s timeout, failing the subtests. This currently happens on the kms_flip RPM interruptible subtests. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78893 Signed-off-by: Paulo Zanoni commit 06de0e7f297d3f0e7747edea6252201ff43846b9 Author: Thomas Wood Date: Wed Oct 15 12:10:13 2014 +0100 tests/kms_force_connector: fix assertion when VGA is already connected Compare the number of modes available when the edid is reset with the number before the edid was overridden. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82230 Signed-off-by: Thomas Wood commit 1a0ae51f512860e89a7a5978d76a8c280e9324eb Author: Thomas Wood Date: Thu Oct 16 17:29:55 2014 +0100 tests: add a check for command line handling Check that command line handling works consistently across all tests. Signed-off-by: Thomas Wood commit d02ffe46bb89305a81d249ba75afe84835bbe70e Author: Thomas Wood Date: Thu Oct 16 16:35:44 2014 +0100 drm_lib.sh: add standard command line options Signed-off-by: Thomas Wood commit 48394471c58462fe3c245b27e730db7a8aedf29a Author: Thomas Wood Date: Thu Oct 16 14:23:24 2014 +0100 configure: include the skylake quick_dump files in EXTRA_DIST Signed-off-by: Thomas Wood commit d2595d765008ddc0cb6fa7ac4c8a4ecf45c6268e Author: Thomas Wood Date: Thu Oct 16 13:59:37 2014 +0100 quick_dump: fix distcheck Commit 711a17a (quick_dump: Move base_display.txt to indivual platforms) renamed base_display.txt to common_display.txt, but didn't update Makefile.am accordingly. Since common_display.txt is now included in the platform files, it is automatically included in $(QUICK_DUMP_EXTRA_DIST) and therefore just the reference to base_display.txt needs removing. Cc: Damien Lespiau Signed-off-by: Thomas Wood commit be4710a541b517b5f8663448bffed5656d59b47b Author: Thomas Wood Date: Fri Oct 10 11:20:35 2014 +0100 lib: add common min and max macros Signed-off-by: Thomas Wood commit d4e3b6a0f5cd759182a53e2bc51a3d3f317a81f0 Author: Thomas Wood Date: Wed Oct 8 17:06:58 2014 +0100 lib: various documentation fixes Signed-off-by: Thomas Wood commit 303fe742fcdd7da6f03f948a4e41b529ee39613a Author: Damien Lespiau Date: Mon Oct 13 15:14:15 2014 +0100 skl_ddb_allocation: Make 'end' exclusive in the DDB allocation entry Ville suggested that we should use the same semantics as C arrays to reduce the number of those pesky +1/-1 in the allocation code. Signed-off-by: Damien Lespiau commit f951943055f9af516d87f221076b6a690df1ee7a Author: Damien Lespiau Date: Mon Apr 28 07:11:04 2014 +0100 skl_ddb_allocation: Add checks on the DDB entries Signed-off-by: Damien Lespiau commit 69a465d22a9d06045f76621dfba46861adb6456c Author: Damien Lespiau Date: Mon Apr 28 05:56:31 2014 +0100 skl_ddb_allocation: Add a standalone version of the DDB allocator This is useful to debug the allocation algorithm. Signed-off-by: Damien Lespiau commit e11b7100c9c8d4e74a4d4439b1519ea50741fda5 Author: Thomas Wood Date: Thu Oct 9 16:44:12 2014 +0100 tests/kms_force_connect: skip if a VGA connector is not available v2: rename "connector" to "vga_connector" to improve the skip message (Chris Wilson) Suggested-by: Paulo Zanoni Signed-off-by: Thomas Wood commit 5209ec142dc1f5380c2c9d12c5b28d15b4311cdf Author: Thomas Wood Date: Thu Oct 9 16:29:20 2014 +0100 tests/kms_force_connector: ensure igt_exit is called at exit Since commit 5782eca (lib/igt_core.c: disable lowmemorykiller during tests), igt_exit needs to be called before the test exits. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84771 Cc: Tim Gore Signed-off-by: Thomas Wood commit 5c7d54eae5cbf9fd74cd8bd755b90d0edb1283dc Author: Rodrigo Vivi Date: Tue Oct 14 10:19:13 2014 -0700 tests/pm_rc6_residency: Split RC6p and RC6pp. sysfs interface for rc6 has been changed to only expose deep RC6 file to the platorms that really support them, aka SNB and IVB. So let's split this test and only test RC6p and RC6pp on these platforms. Reference: https://bugs.freedesktop.org/show_bug.cgi?id=84886 Signed-off-by: Rodrigo Vivi commit e7abb635162a3729f5a86419420f0192b557fcde Author: Paulo Zanoni Date: Tue Oct 14 15:09:22 2014 -0300 tests/pm_rpm: use igt_assert_eq() on COMPARE() A few weeks ago we were hitting this assertion, and the _eq macro is more useful when you're debugging. Signed-off-by: Paulo Zanoni commit 97715d5f0fad67da1d8e06db8f9d5a3c1d1aa51c Author: Paulo Zanoni Date: Tue Oct 14 14:59:36 2014 -0300 tests/pm_rpm: fix some compilation warnings warning: ignoring return value of ‘write’, declared with attribute warn_unused_result [-Wunused-result] Signed-off-by: Paulo Zanoni commit 7308e3a92be0529eaff26bc488f86924db09b688 Author: Paulo Zanoni Date: Tue Oct 14 14:42:23 2014 -0300 tests/pm_rpm: reduce the number of rounds on the stress tests With the current Kernel, it takes more than 10 minutes to run modeset-stress-extra-wait on BYT with eDP, and we don't really want IGT subtests that take more than 10 minutes to run: QA reports them as bugs. Since, as far as I remember, any of these RPM race condition bugs we had could always be triggered with just 4-5 rounds of testing, let's tune down the number of rounds we test: Before: rounds = (--quick option used) ? 10 : 50; After: rounds = (--quick option used) ? 10 : 40; rounds = (wait_flags & WAIT_EXTRA) ? rounds / 2 : rounds; This should make all subtests be way above the 10m limit. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84897 Signed-off-by: Paulo Zanoni commit 8aa7fdaee8afe569544ffd33f5c3ebac27d2da5b Author: Chris Wilson Date: Tue Oct 14 10:10:42 2014 +0100 igt/gem_bad_reloc: Handle real offset being 0 Signed-off-by: Chris Wilson commit cd5ed4529693c00863405fcf29d9b27d91f3fe28 Author: Chris Wilson Date: Tue Oct 14 09:27:40 2014 +0100 igt/gem_negative_reloc: Execute a BLT operation with a negative reloc Signed-off-by: Chris Wilson commit a0b5c6d2ee784a8ea49534050087b3c630a41bc4 Author: Rodrigo Vivi Date: Fri Oct 10 08:18:28 2014 -0700 Revert "tests/kms_sink_crc_basic: Wait 2 vblanks before grabing the new crc." This reverts commit d92fbc23138b1014e8574daf29dbb06b8c81aa7a. Author: Rodrigo Vivi Date: Tue Sep 9 12:25:47 2014 -0400 tests/kms_sink_crc_basic: Wait 2 vblanks before grabing the new crc. Sink CRC is fixed on kernel to wait as many vblanks as needed. It was fixed b commit ad9dc91b6e21266bfc6f466db4b95e10211f31ee Author: Rodrigo Vivi Date: Tue Sep 16 19:18:12 2014 -0400 drm/i915: Fix Sink CRC This this fix in place we don't need this extra 2 vblanks on test case itself Signed-off-by: Rodrigo Vivi commit 9c8ee51be25c6c27c97a6898a71bc7f79439f9dc Author: Rodrigo Vivi Date: Fri Oct 10 08:14:32 2014 -0700 Revert "tests/kms_psr_sink_crc: Wait 2 vblanks before grabing the new crc." This reverts commit d190a1f9668680c7a429110c91f8faa27949b220. Author: Rodrigo Vivi Date: Wed Sep 3 21:26:29 2014 -0400 tests/kms_psr_sink_crc: Wait 2 vblanks before grabing the new crc. Sink CRC is fixed on kernel to wait as many vblanks as needed. It was fixed by: commit ad9dc91b6e21266bfc6f466db4b95e10211f31ee Author: Rodrigo Vivi Date: Tue Sep 16 19:18:12 2014 -0400 drm/i915: Fix Sink CRC This this fix in place we don't need this extra 2 vblanks on test case itself. Signed-off-by: Rodrigo Vivi commit ca6b63f588183cc4ba19d54c2901e84491084692 Author: Mika Kuoppala Date: Fri Oct 10 16:59:00 2014 +0300 tools/null_state_gen: Add copyright notice to state output along with info about what generated it. Signed-off-by: Mika Kuoppala commit f246f1ed0c2f5eb0c0dc7d92b3d678ecdbf03539 Author: Armin Reese Date: Fri Sep 5 13:58:11 2014 -0700 tools/null_state_gen: Add GEN9 golden context batch buffer creation Modifications to 'null_state_gen' so it can generate GEN9 golden context batch buffer source for SKL. v2: - rebased on top of gen8 changes (Mika) - fixed state base address command size (Mika) - base address size macro as pages (Mika) v3: - rebased on top of current master (Mika) - removed obsolete #includes (Mika) - added copyright (Mika) - render and component packing added (Mika) Cc: Damien Lespiau Cc: Armin Reese Cc: Volkin, Bradley D Reviewed-by: Volkin, Bradley D (v2) Signed-off-by: Armin Reese (v1) Signed-off-by: Mika Kuoppala commit 0e8ac72d5d608d82a91bb5232badfb872589ac14 Author: Mika Kuoppala Date: Mon Sep 8 10:49:59 2014 +0300 tools/null_state_gen: Add Gen8 golden state Previously we didn't have a clear understanding what is necessary for a pipeline state to be properly initialized. So we had to improvise and use a stripped out render copy. Now we have a more clear understanding so switch out render copy based frankenstate to state we can call golden state. v2: - export intel_batch_state_offset - add 3DSTATE_RASTER (Bradley Volkin) Cc: Volkin, Bradley D Signed-off-by: Mika Kuoppala commit b69659c3f5ed285bd218350deeff52761aec3d10 Author: Mika Kuoppala Date: Mon Sep 8 10:41:38 2014 +0300 tools/null_state_gen: Add macro to emit commands with null state In null/golden context there are multiple state commands where the actual state is always zero. For more compact batch representation add a macro which just emits command and the rest of the state as zero. v2: - Be more verbose about length bias (Bradley Volkin) - strip out unrelated state_offset declaration (Bradley Volkin) Cc: Volkin, Bradley D Signed-off-by: Mika Kuoppala commit a1f847cba91b9e542e37bb80895d8f8909319dd3 Author: Mika Kuoppala Date: Thu Oct 9 18:39:05 2014 +0300 tools/null_state_gen: Limit the total state len to 4096 bytes Currently our kernel side buffer object is only one page. Limit the amount of dwords to 1024 to enforce this. Signed-off-by: Mika Kuoppala commit b498d81f152760b2a58d53ac3acb5269f44a253d Author: Mika Kuoppala Date: Thu Oct 9 18:35:49 2014 +0300 tools/null_state_gen: Add more debug output Be more verbose about the state size we generate. Signed-off-by: Mika Kuoppala commit c283ead78c4cb5cd56d0a7e74ebc43970ff5741d Author: Mika Kuoppala Date: Thu Oct 9 19:10:48 2014 +0300 tools/null_state_gen: Add copyrights to files where they were missing. Signed-off-by: Mika Kuoppala commit b7d80d104758fb4c90723246aed943c0097c6156 Author: Adam Sampson Date: Tue Oct 7 17:41:18 2014 +0100 Don't use += to append to a shell variable. POSIX only requires "=" to be supported; "+=" works in bash but not in dash. Signed-off-by: Adam Sampson Signed-off-by: Thomas Wood commit 432a4b488110561bc4dc8a50665b60380fb50e04 Author: Adam Sampson Date: Tue Oct 7 17:41:17 2014 +0100 Use = rather than == in test. The POSIX standard only requires test to support "="; "==" works in bash but not in dash. Other comparisons in configure.ac use "=" already. Signed-off-by: Adam Sampson Signed-off-by: Thomas Wood commit c7551bf7ccee3ce52dc51b4684716c4b10b80604 Author: Chris Wilson Date: Wed Oct 8 10:44:06 2014 +0100 igt/kms_flip/nonblocking_read: Demonstrate that O_NONBLOCK is a myth Signed-off-by: Chris Wilson commit 7041edfd144035f987001bd4f4a367d403cad912 Author: Damien Lespiau Date: Wed Oct 8 10:25:48 2014 +0100 quick_dump: Drop common_display.txt from VLV/CHV Those registers are big core registers and weren't really relevant for VLV/CHV. Drop them from the dump then. Suggested-by: Ville Syrjälä Signed-off-by: Damien Lespiau commit 7f8228955f3f3eef42e6fc61f4fa95b37b36df75 Author: Damien Lespiau Date: Mon Oct 6 17:42:33 2014 +0100 quick_dump/skl: Make quick_dump SKL aware Signed-off-by: Damien Lespiau commit d0a412597b92208d13d640013a2b277bd22f6c11 Author: Damien Lespiau Date: Mon Oct 6 15:10:35 2014 +0100 quick_dump/skl: Add some display registers Signed-off-by: Damien Lespiau commit 711a17ac753161500c5901e9f4d85ad8906b2a8b Author: Damien Lespiau Date: Mon Oct 6 18:32:51 2014 +0100 quick_dump: Move base_display.txt to indivual platforms SKL will have a whole separate display regs file, so merge base_display.txt into each platform file. Signed-off-by: Damien Lespiau commit 2faf5a8665bba9ab7ad64ac6aa8c13be8f176d7d Author: Damien Lespiau Date: Mon Oct 6 16:30:39 2014 +0100 quick-dump: Make quick dump link against libintel_tools Because quick-dump was only selecting a few files in lib/ and we move stuff around and/or add new dependencies we were failing to provide the necessary symbols to the shim library providing python bindings. And so we had a run-time error: Traceback (most recent call last): File "./tools/quick_dump/quick_dump.py", line 17, in import chipset File "/home/damien/gfx/sources/intel-gpu-tools/tools/quick_dump/chipset.py", line 28, in _chipset = swig_import_helper() File "/home/damien/gfx/sources/intel-gpu-tools/tools/quick_dump/chipset.py", line 24, in swig_import_helper _mod = imp.load_module('_chipset', fp, pathname, description) File "/usr/lib64/python3.3/imp.py", line 183, in load_module return load_dynamic(name, filename, file) ImportError: /home/damien/gfx/sources/intel-gpu-tools/tools/quick_dump/_chipset.so: undefined symbol: kmstest_pipe_name So, let's simplify maintainance and just link against the library we're building and using elsewhere. Signed-off-by: Damien Lespiau commit d4c1bb7aab2d2d7ed3eb3225f937f55f591f1ae4 Author: Damien Lespiau Date: Mon Oct 6 16:49:05 2014 +0100 gem_wait: Use PRIu64 in format string ../../tests/gem_wait.c: In function ‘render_timeout’: ../../tests/gem_wait.c:182:3: warning: format ‘%llu’ expects argument of type ‘long long unsigned int’, but argument 3 has type ‘uint64_t’ [-Wformat=] igt_info("Finished with %llu time remaining\n", timeout); Cc: Daniel Vetter Signed-off-by: Damien Lespiau commit af79fce66d023b300f308ec78289c616c81037d3 Author: Damien Lespiau Date: Mon Oct 6 18:23:33 2014 +0100 overlay: Fix compilation warning when not having xrandr Signed-off-by: Damien Lespiau commit 6b964c93f7322ee6b27ad0c2a26280e17e56ec23 Author: Damien Lespiau Date: Mon Oct 6 18:19:58 2014 +0100 gem_seqno_wrap: Remove unused variable Signed-off-by: Damien Lespiau commit 5c0139c3046a390204c6339468b22779f76460b1 Author: Daniel Vetter Date: Mon Oct 6 08:32:49 2014 +0200 tests/gem_wait: Don't close drmfd in subtest I didn't notice this on the machine I developed it since the original wait testcase fails there. Oops. Signed-off-by: Daniel Vetter commit 764772c3c8059a6a9d1a569d9c4bd180e11c4d33 Author: Tim Gore Date: Thu Oct 2 16:26:32 2014 +0100 lib/Android.mk: add define of IGT_DATADIR for igt_fb.c Since the igt_create_stereo_fb function moved into igt_fb.c we need to add the definition of IGT_DATADIR in the Android makefile in order to build the cairo dependent tests. Signed-off-by: Tim Gore Signed-off-by: Thomas Wood commit 4306538d1d3f60877866c39c9ca953cc5e541dae Author: Daniel Vetter Date: Thu Oct 2 11:18:20 2014 +0200 tests: Sprinkle missing igt_exit() where needed. Yay for breaking piles of tests. This regression has been introduced with commit 5782eca1e19e85a04ad402fa4094aa1b5f9c53ce Author: Tim Gore Date: Wed Oct 1 13:25:20 2014 +0100 lib/igt_core.c: disable lowmemorykiller during tests Cc: Tim Gore Signed-off-by: Daniel Vetter commit 5782eca1e19e85a04ad402fa4094aa1b5f9c53ce Author: Tim Gore Date: Wed Oct 1 13:25:20 2014 +0100 lib/igt_core.c: disable lowmemorykiller during tests Several IGT tests cycle through a lot of GEM memory and when running these tests on Android they tend to get killed by the lowmemorykiller. The lowmemorykiller really is not usefull in this context and is just preventing the test from doing its job. This commit adds a function to disable the lowmemorykiller by writing "9999" to its oom adj parameter, which means it will never "select" any process to kill. The normal linux oom killer is still there to protect the kernel. The low memory killer is disabled during the common init function and then re-enabled by the exit handler. To make this work for single tests the exit handler is now installed in the common init function also so that it is invoked for all tests. This is just a hack to get round the fact that the i915 driver uses the concept of purgeable memory which is not understood by the lowmemorykiller. If this ever gets fixed then this patch can be removed. Signed-off-by: Tim Gore [danvet: A bit of polish (coding style, static and rename check_igt_exit to common_exit_handler, drop the is_disabled check since we only call this once now).] Signed-off-by: Daniel Vetter commit 20c8eba84ce4f108b5a980fe7278da5853655c1d Author: Daniel Vetter Date: Wed Oct 1 12:12:43 2014 +0200 NEWS: Updates Signed-off-by: Daniel Vetter commit 711199b8ecb2fa07918e7061ff3b208efcaaa237 Author: Daniel Vetter Date: Tue Sep 30 18:44:15 2014 +0200 lib/aux: Print progress output at INFO level With the structured logging it makes more sense to tune this down a bit. Also, this way it is consistent with Thomas Wood's new activity indicator helper. Spotted while discussing Thomas' patch with him. v2: Thomas noticed that I've forgotten the fflush. Extract igt_interactive_info for both igt_progress and igt_print_activity. v3: Interactive output should go to stderr. Also extract the "is this a terminal" check. Cc: Thomas Wood Cc: Chris Wilson Signed-off-by: Daniel Vetter commit 6a8d33c2bb81f071715864c2e563ac17ae4f9967 Author: Thomas Wood Date: Tue Sep 30 17:05:39 2014 +0100 lib: add a function to indicate activity Signed-off-by: Thomas Wood commit c2d5519906f3b7d75b4fbf14c61c5f54d9d75214 Author: Thomas Wood Date: Mon Sep 29 12:08:31 2014 +0100 tests/sysfs_l3_parity: fix warnings in test enumeration Source drm_lib.sh before skipping the test to ensure that subtest enumeration is always handled correctly. Signed-off-by: Thomas Wood commit 756764a4e78ac8b6ea294924d272431f98f695ca Author: Thomas Wood Date: Fri Sep 26 15:16:21 2014 +0100 lib: ensure any buffers are flushed before fork Flush any buffers before forking to prevent duplicated output. Signed-off-by: Thomas Wood commit 519f377ddd6d43b7824f94f09eb3d3cabc39c6b9 Author: Thomas Wood Date: Fri Sep 26 14:24:52 2014 +0100 doc: various spelling and typo fixes Signed-off-by: Thomas Wood commit c256af5d448dcaef1d4100c2bdbe25656909197d Author: Imre Deak Date: Thu Sep 18 18:31:29 2014 +0300 test/kms, pm: use drm_open_any_master These tests require DRM master right, so make sure they have it from the beginning. This gives an early indication if another DRM master is running and makes the given test skip (with a proper explanation of the reason) instead of exiting with error. Signed-off-by: Imre Deak commit bfda78cd33b6562306c8c42e83047149f2ff6984 Author: Imre Deak Date: Thu Sep 18 18:25:37 2014 +0300 tests/pm_rpm: factor out drm_open_any_master Signed-off-by: Imre Deak commit 781a0485aca871d6b0278afacea724b97f6f59c1 Author: Xiang, Haihao Date: Fri Apr 11 21:57:21 2014 +0800 lib/skl: Return the render copy and media fill functions Signed-off-by: Xiang, Haihao [Ben: Reordered if tree] Signed-off-by: Ben Widawsky Signed-off-by: Damien Lespiau commit 20e9cf38b7c3aa0725eb282ecf446f0e9b4344ad Author: Zhao Yakui Date: Tue Feb 11 10:48:47 2014 +0800 mediafill/skl: Follow spec to configure media sampler DOP clock gating in PIPELINE_SELECTION Signed-off-by: Zhao Yakui Signed-off-by: Ben Widawsky Signed-off-by: Damien Lespiau commit d2e4eb3619fa61013f7704f55d0516fb380ac49b Author: Zhao Yakui Date: Tue Feb 11 10:48:46 2014 +0800 mediafill/skl: Follow spec to configure FORCE_MEDIA_AWAKE in PIPELINE_SELECTION The FORCE_MEDIA_AWAKE bit is added for the PIPELINE_SELECTION command and some instructions requires that the media enginee is awake. Signed-off-by: Zhao Yakui Signed-off-by: Ben Widawsky Signed-off-by: Damien Lespiau commit 54465b8ac5d97560a27f04683448ab74b466a89a Author: Zhao Yakui Date: Tue Feb 11 10:48:45 2014 +0800 mediafill/skl: Follow the spec to add pipeline_select mask Signed-off-by: Zhao Yakui Signed-off-by: Ben Widawsky Signed-off-by: Damien Lespiau commit 17371958dbe6de8a92bf3e0e98b37ddb12241c17 Author: Zhao Yakui Date: Tue Feb 11 10:48:44 2014 +0800 mediafill/skl: follow the spec to update STATE_BASE_ADDRESS command Signed-off-by: Zhao Yakui Signed-off-by: Ben Widawsky Signed-off-by: Damien Lespiau commit 31e94ad28b5fab3373e6c7bf10b7894ca89cfb0a Author: Zhao Yakui Date: Tue Feb 11 10:48:43 2014 +0800 mediafill/skl: Start the gen9 media_fill from the gen8 version Signed-off-by: Zhao Yakui Signed-off-by: Ben Widawsky Signed-off-by: Damien Lespiau commit 8dc95202c8c241c50f2e17d3734fc6cb004c076e Author: Zhao Yakui Date: Thu Jan 23 13:26:12 2014 +0800 assembler/skl: update the extdesc field for SEND instruction The send instruction on gen9 uses the 32bit immediate instead of 6bit immediate for the extended message descriptors. And some bits of SEND instruction are defined as the extdesc field. Signed-off-by: Zhao Yakui Signed-off-by: Ben Widawsky Signed-off-by: Damien Lespiau commit d6ff0b3f1f78c16a2754454c6134a999affa7f4c Author: Zhao Yakui Date: Thu Jan 23 13:26:11 2014 +0800 assembler/skl: Add more cache agent for write(...) Signed-off-by: Zhao Yakui Signed-off-by: Ben Widawsky Signed-off-by: Damien Lespiau commit e48666947df43814b89c4280e2c2208274628542 Author: Zhao Yakui Date: Thu Jan 23 13:26:10 2014 +0800 assembler/skl: update read(...) READ(...) is used for Render Target read and Media Block read. But there is no sampler cache agent on gen9. At the same time two message types don't share the same cache agent any more. So a parameter is needed for cache agent. The 2th parameter of read(...) is not used for gen6/gen7/gen8. Hence it is reused as cache agent for SKL as that on ILK. Signed-off-by: Zhao Yakui Signed-off-by: Ben Widawsky Signed-off-by: Damien Lespiau commit 504f5594e7f2e78ec828a3b30bbb749a3bc91472 Author: Zhao Yakui Date: Thu Jan 23 13:26:09 2014 +0800 assembler/skl: Redefine the cache agent type for some fixed functions The different cache agent type is defined for SKL although it still uses the same function ID as the previous generations. Signed-off-by: Zhao Yakui Signed-off-by: Ben Widawsky Signed-off-by: Damien Lespiau commit 2149d6e5f8856f195236e9d414fbce880c81debf Author: Damien Lespiau Date: Tue Feb 5 12:10:44 2013 +0000 assembler/skl: Add gen 9 to the -g option Signed-off-by: Damien Lespiau Signed-off-by: Ben Widawsky Signed-off-by: Damien Lespiau commit fe4e4c176c7d3ae9ba59d4a40f12f83a29b6151c Author: Xiang, Haihao Date: Fri Apr 11 21:57:20 2014 +0800 rendercopy/skl: Set the URB VS start address to 4 A value less than 4 might result in GPU hang on simulation Signed-off-by: Xiang, Haihao Signed-off-by: Ben Widawsky Signed-off-by: Damien Lespiau commit 5b46cd335d8323c8b0c48c2c004f983605e25433 Author: Zhao Yakui Date: Wed Jan 22 09:37:26 2014 +0800 rendercopy/skl: Follow the spec to add the Pipeline selection mask Reviewed-by: Damien Lespiau Signed-off-by: Zhao Yakui Signed-off-by: Ben Widawsky Signed-off-by: Damien Lespiau commit 8e62f78999281ad4bc7b9981b127830d0d3796d9 Author: Zhao Yakui Date: Wed Jan 22 09:37:25 2014 +0800 rendercopy/skl: Emit 3DSTATE_WM_HZ_OP This is from that on BDW. Without it, the pixel pipeline can't work well. Reviewed-by: Damien Lespiau Signed-off-by: Zhao Yakui Signed-off-by: Ben Widawsky Signed-off-by: Damien Lespiau commit 833e47662436094646f8510e7f9e7b3edd3d6b89 Author: Zhao Yakui Date: Wed Jan 22 09:37:24 2014 +0800 rendercopy/skl: Fix the 3DSTATE_DS instruction length Reviewed-by: Damien Lespiau Signed-off-by: Zhao Yakui Signed-off-by: Ben Widawsky Signed-off-by: Damien Lespiau commit 7628268952c586120e879310e542556d6a387abe Author: Zhao Yakui Date: Wed Jan 22 09:37:23 2014 +0800 rendercopy/skl: Fix the STATE_BASE_ADDRESS instruction length Reviewed-by: Damien Lespiau Signed-off-by: Zhao Yakui Signed-off-by: Ben Widawsky Signed-off-by: Damien Lespiau commit 77a9ed7da2ef28cd80da68a97c1f409bc7d5eacf Author: Zhao Yakui Date: Wed Jan 22 09:37:22 2014 +0800 rendercopy/skl: Set Instruction Buffer size Modify Enable to 1 This is ported from that on BDW. Reviewed-by: Damien Lespiau Signed-off-by: Zhao Yakui Signed-off-by: Ben Widawsky Signed-off-by: Damien Lespiau commit e539e91cf5d1d127abc9652dd2213a1997e54fb3 Author: Zhao Yakui Date: Wed Jan 22 09:37:21 2014 +0800 rendercopy/skl: update instruction length This is ported from that on BDW. v2: Only bump the prefix when we need to program the instruction differently with the previous generations. Reviewed-by: Damien Lespiau Signed-off-by: Zhao Yakui Signed-off-by: Ben Widawsky Signed-off-by: Damien Lespiau commit f04bf00c0d4e3b19fea63ad1d0b959575baf43b5 Author: Zhao Yakui Date: Wed Jan 22 09:37:20 2014 +0800 rendercopy/skl: Pass the context to rendercopy function on SKL Reviewed-by: Damien Lespiau Signed-off-by: Zhao Yakui Signed-off-by: Ben Widawsky commit ecd659e000dc3165c33793b7da612863738dc1c5 Author: Damien Lespiau Date: Wed Feb 27 14:57:35 2013 +0000 rendercopy/skl: Update 3DSTATE_SBE SBE has now to be explicitely told which channels of which components are used by the pixel shader. Signed-off-by: Damien Lespiau Signed-off-by: Ben Widawsky commit e5b850cb340a7dde8e6907a6de28d0ba825d1cb2 Author: Damien Lespiau Date: Wed Feb 27 14:57:34 2013 +0000 rendercopy/skl: Set the 3DSTATE_VF state This is to ensure the "Component Packing Enable" bit is set to 0. Signed-off-by: Damien Lespiau Signed-off-by: Ben Widawsky commit aa7f9cf881a50370cdf49c6210d8224c32943d24 Author: Damien Lespiau Date: Wed Feb 27 14:57:33 2013 +0000 rendercopy/skl: Start the gen9 rendercopy from the gen8 version v2 (Ben): Rebased on: commit ea11d103e0617e33bce6f11328521d15b13422b0 Author: Oscar Mateo Date: Tue Nov 12 11:50:35 2013 +0000 build: list all test/tool/lib source files in their own Makefile.sources v3: (Ben): Rebased on the doc/API rework. Probably needs review Signed-off-by: Damien Lespiau Signed-off-by: Ben Widawsky commit 334f657e981e2f2278d26516f0ebd559f2ebbfb7 Author: Damien Lespiau Date: Fri May 31 15:34:04 2013 +0100 list-workarounds/skl: Add Skylake to the list of valid platorms Signed-off-by: Damien Lespiau commit 4d95a1551b1606789650e43e9dfe0df128066b81 Author: Damien Lespiau Date: Thu Feb 14 15:32:36 2013 +0000 skl: initialize instdone bits for gen9 gen9 uses the same bits as gen8. Signed-off-by: Damien Lespiau Reviewed-by: Jesse Barnes Signed-off-by: Ben Widawsky commit 256831cd8832a39ffd5fbd38e561d31dcc4e8f96 Author: Damien Lespiau Date: Thu Feb 14 15:32:35 2013 +0000 skl: Add gen9 to intel_gen() Signed-off-by: Damien Lespiau Reviewed-by: Jesse Barnes Signed-off-by: Ben Widawsky commit 91ebcd0c54d365a633a7465a9d57f8c24c886af7 Author: Damien Lespiau Date: Fri Dec 6 16:07:22 2013 -0800 skl: Add SKL PCI ids v2: Update to the latest PCI ids Signed-off-by: Damien Lespiau Signed-off-by: Ben Widawsky commit 0eaa18061bee4b4b0c182d112db189019f01f49a Author: Daniel Vetter Date: Mon Sep 29 14:50:57 2014 +0200 tests/gem_wait: argument validation tests Shockingly we don't check for 0 flags! Signed-off-by: Daniel Vetter commit e4753d2d96fbb88077e70820793137f45f02c9ba Author: Daniel Vetter Date: Mon Sep 29 14:42:33 2014 +0200 tests/gem_wait_render_timeout: Convert to subtests I want to add a bunch of api tests besides the functional "render-timeout" testcase. Signed-off-by: Daniel Vetter commit 5da8b8db02df768ba560e7522f69106246a0590c Author: Daniel Vetter Date: Mon Sep 29 14:24:26 2014 +0200 tests/gem_wait_render_timeout: Drop local structs We're long past the point where libdrm has these. Signed-off-by: Daniel Vetter commit f33fa71481caa308f141797033cd2bc6479630fc Author: Tim Gore Date: Mon Sep 29 13:34:30 2014 +0100 lib/igt_core: make single/simple tests use igt_exit Currently tests that use igt_simple_main will simply call "exit()" if they pass, making it difficult to ensure that any required cleanup is done. At present this is not an issue, but it will be when I submit a patch to turn off the lowmemorykiller for all tests. Signed-off-by: Tim Gore [danvet: Also update api docs.] Signed-off-by: Daniel Vetter commit 32a0308e2da1ed5871e21ca81822fc0c8aa73f9e Author: Damien Lespiau Date: Fri Sep 26 16:48:02 2014 +0100 kms_cursor_crc: Remove two unused local variables Signed-off-by: Damien Lespiau commit f2775039b1d2f3c24876622e4528604496de8abc Author: Chris Wilson Date: Fri Sep 26 10:22:33 2014 +0100 igt/gem_userptr_blits: Test interruptible create-destroy In order to exercise https://bugs.freedesktop.org/show_bug.cgi?id=84207 we need to interrupt the mmu_notifier_register with a signal. This is likely to be quite difficult, but let's just try running the create-destroy test in an interruptible loop for 5s. Signed-off-by: Chris Wilson commit 3e766b8255efb6c994e6501be2af44b4bdc4d191 Author: Chris Wilson Date: Fri Sep 26 07:55:49 2014 +0100 igt/gem_concurrent_blit: Only read back a few GTT values Due to the nature of the test, we can be reasonably sure that it is either all copied or not. So we can sacrificing testing the entire buffer for the expected value in order to speed up the test by only testing along the diagonal. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84354 Signed-off-by: Chris Wilson commit 3205a9167fca34db8eb177a9050faf1b4115e9fa Author: Daniel Vetter Date: Tue Sep 23 15:15:51 2014 +0200 tests/kms_psr_sink_crc: Use options Env variables are a bit more annoying since much harder to discover. With options you can just see what they do with --help. Cc: Rodrigo Vivi Reviewed-by: Rodrigo Vivi Signed-off-by: Daniel Vetter commit 4b81e9ca7df84d3c8775ebf0332f7444cafe8e77 Author: Chris Wilson Date: Fri Sep 19 16:40:00 2014 +0100 igt/gem_reloc_vs_gpu: Fix reloc.presumed_offset value Since the last patched value does not match the presumed relocation value we submit to the kernel, it occasionally makes mistakes. Also note that the libdrm interface makes the same presumptive mistake, and would easily be broken by a threaded environment. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77793 Signed-off-by: Chris Wilson commit c3eca6f7d3a788eab0102c4a3ded606ec851a0b2 Author: Daniel Vetter Date: Fri Sep 19 09:31:52 2014 +0200 tests/drm_import_export: Add subtest for prime Cc: Rafal Sapala Signed-off-by: Daniel Vetter commit a018d60f631443f09da0a2adffc7255a0687f0d8 Author: Daniel Vetter Date: Thu Sep 18 17:34:27 2014 +0200 tests: Add drm_import_export Multithreaded test to validate the (lack of) locking in the flink/open code in libdrm-intel. Based on a testcase from Rafel Sapala. Cc: Rafal Sapala Signed-off-by: Daniel Vetter commit 25c55d3fc26ec415e0ed290b7d3cda0e15209f66 Author: Ville Syrjälä Date: Fri Sep 12 18:03:25 2014 +0300 tests/kms_cursor_crc: Add basic non-square cursor testing To minimally verify that non-square cursors work on the platforms where they're supported perform the tests first with WxH cursor and then repeat with WxH/3 cursor. Signed-off-by: Ville Syrjälä commit 7b76754e0ee3b84e703f823dd89aa94d75c011e7 Author: Ville Syrjälä Date: Fri Sep 12 20:18:04 2014 +0300 lib: Add igt_plane_set_size() Allow tests to specify the plane size instead of assuming that the entire FB will be scanned out. To keep the current tests working without having to sprinkle igt_plane_set_size() calls all over the place, make igt_plane_set_fb() reset the plane size to the FB size. Signed-off-by: Ville Syrjälä commit b4fe481d4f2ccebc125185a4c5cb652b71513723 Author: Ville Syrjälä Date: Thu Aug 28 16:52:53 2014 +0300 tools: Remove punit and nc reg read/write tools intel_iosf_sb_{read,write} provide the same functionality. intel_dpio_{read,write} are still left in place since they use a ifferent opcode to do the register access. Need to verify if both opcodes work. Signed-off-by: Ville Syrjälä commit b23329f08662e6d15220006cffa0344231b27b04 Author: Ville Syrjälä Date: Thu Aug 28 16:50:53 2014 +0300 toos/intel_iosf_sb: Add symbolic unit names Add a bunc of symbolic sideband unit names so that you don't have to go trawling through the sideband HAS every time you want to poke at something with the tool. You can still specify the port manually though if you know them by heart already. Signed-off-by: Ville Syrjälä commit b39eb28c256ecdf4f60dab08dba4bbc36294a576 Author: Ville Syrjälä Date: Thu Aug 28 16:32:46 2014 +0300 tools: Allow iosf-sb utils to work on chv Unlike the kernel IS_VALLEYVIEW() doesn't cover chv in igt. Add the appropriate IS_CHERRYVIEW() checks to the various sideband poking tools. Signed-off-by: Ville Syrjälä commit 50534460dd2034bd4cbdabd803fa2680cbc7b490 Author: Rodrigo Vivi Date: Wed Sep 17 10:35:55 2014 -0400 tools/intel_reg_dumper: Shows fences and rp debug regs on BDW+. v2: a more generic fix to cover current and future platforms (Damien). Reviewed-by: Damien Lespiau Signed-off-by: Rodrigo Vivi commit 1244fc6b9bc56cdf1584e919230796082b93f371 Author: Chris Wilson Date: Tue Sep 16 08:17:00 2014 +0100 igt/pm_rps: Fix STORE_DWORD for pre-gen8 gen8 actually changed the command layout, not just extended the relocation value. Oh well. References: https://bugs.freedesktop.org/show_bug.cgi?id=83915 Signed-off-by: Chris Wilson commit 137877f16b7d026fa1bc17797604e17de2af7e92 Author: Daniel Vetter Date: Tue Sep 9 11:43:10 2014 +0200 NEWS: New heading for 1.9 Should be done post-release. Cc: Rodrigo Vivi Cc: Thomas Wood Signed-off-by: Daniel Vetter commit 4779655c6f9c8c6c4599fd39cdff1f66d0f373b3 Author: Chris Wilson Date: Fri Sep 12 11:09:41 2014 +0100 lib: Try harder to drop-caches If at first we don't succeed, try again. (For as long as the errno says to at least!) Signed-off-by: Chris Wilson commit f81d8eba4fb4448e6ea777aa2072c3b9f277e7cb Author: Chris Wilson Date: Fri Sep 12 09:11:55 2014 +0100 igt/kms_render: Iterate only through the formats When testing each format, iterate through the formats and not randomly through the modes. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83788 Signed-off-by: Chris Wilson commit 855dc6284d97931dbe59725cfc7b0b160b0a37b2 Author: Chris Wilson Date: Fri Sep 12 09:08:41 2014 +0100 igt/gem_userptr_blits: GTT mmaping a userptr requires llc Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83790 Signed-off-by: Chris Wilson commit 3a1751ef34c32c5d288a328d855bec49ad0eaf9f Author: Chris Wilson Date: Fri Sep 12 06:46:28 2014 +0100 igt/pm_rps: Fix the batch count for emitting the flush Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=81858#c2 Signed-off-by: Chris Wilson commit 62f4d56676468cc6b7e1fb900ccf120d68352f65 Author: Rodrigo Vivi Date: Tue Sep 9 19:04:48 2014 -0400 tests: Kill pm_psr kms_psr_sink_crc check psr activity, residency and exit for screen updates. So this test is useless. Signed-off-by: Rodrigo Vivi commit d190a1f9668680c7a429110c91f8faa27949b220 Author: Rodrigo Vivi Date: Wed Sep 3 21:26:29 2014 -0400 tests/kms_psr_sink_crc: Wait 2 vblanks before grabing the new crc. Signed-off-by: Rodrigo Vivi commit 1447d83e8ecc0689be2b3e933d1d21b042474ea7 Author: Rodrigo Vivi Date: Wed Sep 3 18:18:15 2014 -0400 tests/kms_psr_sink_crc: Fix blt submission Putting back a missing dword. Signed-off-by: Rodrigo Vivi commit 25aa69d0a00435432f85ee86b30a2981411fbbbb Author: Rodrigo Vivi Date: Tue Sep 9 13:10:51 2014 -0400 tests/kms_psr_sink_crc: Check color ref CRC Black screen is forbidden on this test. So let's fail if sink crc shows it is back. Also there are many cases where we know for shure it should be all green, so let's check for them. Instead of checking colors we could print with sw using cairo and check if we have identical crc like cursor testcases. However with PSR the chance of artifacts is low and chance of getting blank screen or unchanged screen is high. So even drawing on sw and comparing both CRCs we can have the same result. However the risk is that screen never changed. So the safest way is to compare if screen changed and check the green color when we know it should be green or not green. v2: Hardcoded green was simply wrong because green CRC can change depending on display.Split R, G and B on CRC and bitewise them with mask to verify it is green. Signed-off-by: Rodrigo Vivi commit d4e6a5197002b51644bc01d4f7926c4b4d726933 Author: Rodrigo Vivi Date: Fri Aug 29 19:12:54 2014 -0400 tests/kms_psr_sink_crc: Fix all testcases. In order to get all test cases fixed and the matrix planes-operations working it was needed to use the common new igt kms functions for all cases. Previously only sprite testcase was using it. Fixed the fb colors in a way to make tests more clear and be impossible to see black screen during the tests. Signed-off-by: Rodrigo Vivi commit 99efdc0cdbeeb9f1695c668c673c31957d78954b Author: Rodrigo Vivi Date: Tue Sep 9 17:58:45 2014 -0400 tests/kms_psr_sink_crc: Start splitting tests in test_planes and operations. This will allow us to test input/write oprations on any kind of plane. At this point PLANE_ONOF is just the new name of TEST_SPRITE and PLANE_MOVE is the one for TEST_CURSOR_MOVE. They will be extended and fixed on the following patche(s). v2: fix conflict after changing previous patch Signed-off-by: Rodrigo Vivi commit 52b0e78a94ebcb8761dd7d0eadb8deaab8abedf4 Author: Rodrigo Vivi Date: Fri Aug 29 18:19:55 2014 -0400 tests/kms_psr_sink_crc: Cleaning up tests a bit This is needed to be able to split tests in a matrix that tests different input/write methods and operations for different type of planes. Signed-off-by: Rodrigo Vivi commit fb004a6b029d2338aef869a1f25b9925688d3106 Author: Rodrigo Vivi Date: Wed Sep 3 17:53:35 2014 -0400 tests/kms_psr_sink_crc: Removing context tests. This tests are unecessary. Mainly now with the software tracking for PSR. Signed-off-by: Rodrigo Vivi commit 1ab044518a22ac0c44067de9f90f4a828c2f7482 Author: Rodrigo Vivi Date: Fri Aug 29 17:58:31 2014 -0400 tests/kms_psr_sink_crc: Adding test debug options Just to make life easier and be eable to easily test with PSR disabled to know exactly what to expect when running it for real v3: Use igt_debug helpers and add env option for running with psr disabled on this test without have to recompile like v1 or changing igt infrastructure like v2. I tried to add --disable-psr or local --dry-run but than it fails to print subtests so this was the safest way. Signed-off-by: Rodrigo Vivi commit e90847f57a0446130b92c9c638da6299f37639b5 Author: Rodrigo Vivi Date: Fri Aug 22 09:37:08 2014 -0700 tests/kms_psr_sink_crc: Fix edp_psr debugfs interface Tests were broken on platforms that doesn't have psr or on new kernel that contains new interface. A lot more need to be done to get these tests really useful, but for now lets avoid it breaking tests framework. v2: Doesn't duplicate kernel's HAS_PSR. skip based on debugfs output. Signed-off-by: Rodrigo Vivi commit d92fbc23138b1014e8574daf29dbb06b8c81aa7a Author: Rodrigo Vivi Date: Tue Sep 9 12:25:47 2014 -0400 tests/kms_sink_crc_basic: Wait 2 vblanks before grabing the new crc. Signed-off-by: Rodrigo Vivi commit 1d7b062621fa291d3412f47265d0ba603b65cc96 Author: Rodrigo Vivi Date: Wed Sep 3 19:01:08 2014 -0400 tests/kms_sink_crc_basic: Simplify test by using igt_kms functions v2: sink CRC R, G and B might change depending on display. So let's split the colors and bitwise them. Signed-off-by: Rodrigo Vivi commit 107151ce9f82955191a7fd6a2e6bfd5ff8cc5aea Author: Chris Wilson Date: Tue Sep 9 16:27:57 2014 +0100 igt/gem_ppgtt: Create secondary contexts and mm Signed-off-by: Chris Wilson commit 961578f47133d7310e9531d31e7ea5e743ed6b50 Author: Chris Wilson Date: Tue Sep 9 14:17:08 2014 +0100 test: Exercise full ppgtt switching between multiple fd Load up both rings with lots of fighting between multiple contexts. Signed-off-by: Chris Wilson commit d9d3f4b0d23a7ea2147f33ab40558edd6128f3ac Author: Rodrigo Vivi Date: Mon Sep 8 22:43:46 2014 -0400 bump version to 1.8 and add the release date Signed-off-by: Rodrigo Vivi commit cdf0ea825ec529fe4f9e63d503da11d0a3cdee1c Author: Chris Wilson Date: Mon Sep 8 12:52:31 2014 +0100 igt/gem_cpu_reloc: Terminate the bad batch gen2 will read the batch up until it reaches the end as defined by the MI_BATCH_BUFFER_END command. Play nice and make sure that it does end on a MI_BB_END. Signed-off-by: Chris Wilson commit be6bb4ce4a413df5ec385523313a4e2a3894d4c8 Author: Chris Wilson Date: Sun Sep 7 15:52:10 2014 +0100 igt/kms_flip_tiling: Use the associated pipe for the output This stops us from using an illegal pipe, such as pipe 0 for LVDS on PNV. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82280 Signed-off-by: Chris Wilson commit b76f1d8b03aa506624a8a9d7fab915758bd0dec5 Author: Chris Wilson Date: Mon Sep 8 10:28:41 2014 +0100 igt/gem_mmap_gtt: Check coherency between GTT and CPU mmappings with LLC Signed-off-by: Chris Wilson commit ac3d06094a635bfeb0c6d6752f7f7bfbc21ecf2a Author: Chris Wilson Date: Sat Sep 6 18:14:35 2014 +0100 igt/kms_universal_plane: Only test existing planes Only attempt to test the number of planes that exist on the device so as not to trigger spurious failures. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82233 Signed-off-by: Chris Wilson commit 5eeb1f34d4bd16ef22e9252e876dd93c28c73b3c Author: Chris Wilson Date: Sat Sep 6 17:25:01 2014 +0100 igt/drv_missed_irq_hang: Increase busy load The test relies on having to wait upon the GPU at some point and so simulating a missed interrupt. If there is insufficient load on the GPU, we can complete the task before we even wait. References: https://bugs.freedesktop.org/show_bug.cgi?id=71334 Signed-off-by: Chris Wilson commit d35cc3ea8c0023eb8aadf3e946b1c759c6e29b3a Author: Chris Wilson Date: Sat Sep 6 12:41:28 2014 +0100 aux: Squelch warning when emitting progress indicator commit 1649ef0d1f5c0e4f995a437bd24f1574a8b5100f Author: Daniel Vetter Date: Tue Aug 26 15:26:21 2014 +0200 lib/igt_* Use igt macros in igt libaries went a little too far here as the replacement macro was too clever. Signed-off-by: Chris Wilson commit fb9c9e3adcc18b137b8931bc4f6fb05ca4d19863 Author: Chris Wilson Date: Sat Sep 6 12:21:25 2014 +0100 core: Prettify igt_require_f output Signed-off-by: Chris Wilson commit 9df77d566409fcef90c7ea63bb6d3df8d8c76dde Author: Chris Wilson Date: Sat Sep 6 12:08:13 2014 +0100 lib/igt_fb: Ignore RGB888 None of our display hardware supports the packed 24-bit format, so stop trying to use it and causing test failures. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78873&list_id=465068 Signed-off-by: Chris Wilson commit db4cc747fac2692d3b947992384d21a253e2a264 Author: Chris Wilson Date: Sat Sep 6 12:07:49 2014 +0100 lib/igt_fb: Add debug output for creating fb Signed-off-by: Chris Wilson commit 91a432721c2b16aa6610bd9c89bbee7763552f77 Author: Chris Wilson Date: Sat Sep 6 08:40:04 2014 +0100 core: Display subtest walltime Signed-off-by: Chris Wilson commit f675f6771b1a3eaca6981ad78d2f1521f379347a Author: Thomas Wood Date: Thu Sep 4 11:35:01 2014 +0100 lib: keep a list of modified connectors to reset Avoid calling functions in igt_reset_connectors that are not safe to use in signal handlers by keeping a list of connectors that have been modified, instead of enumerating all connectors. v2: add space for a sentinel NULL value on forced_connectors and print a warning when the connector limit is reached (Chris Wilson) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83498 Cc: Paulo Zanoni Signed-off-by: Thomas Wood commit 48da0e69adbf086c560a4e3175a16b85a1662bbd Author: Thomas Wood Date: Thu Sep 4 17:00:16 2014 +0100 tests/kms_3d: skip if connectors cannot be forced Signed-off-by: Thomas Wood commit d3c83b203372a00f846a3858711aae7ba290d570 Author: Thomas Wood Date: Thu Sep 4 16:56:17 2014 +0100 lib: don't force HDMI or DP connectors on HSW and BDW Forcing HDMI or DP connectors on these platforms doesn't currently work, so fail early to allow the test to skip if required. v2: restrict to HSW and BDW (Daniel Vetter) Signed-off-by: Thomas Wood commit 3aac97107ed386885cfb78f16e0c15a1042fe8cc Author: Thomas Wood Date: Fri Aug 29 17:54:10 2014 +0100 lib/igt_fb: ensure igt_create_fb parameters are consistent Make sure the parameters in the prototype and implementation of igt_create_fb match and are complete so that the documentation is correct. Signed-off-by: Thomas Wood commit 5303ce8076b03a02f891090367d2abc53f9588b7 Author: Thomas Wood Date: Wed Aug 20 11:13:34 2014 +0100 tests: add kms_3d test Add a test to verify creation and use of 3D stereo modes. v2: update for API changes Signed-off-by: Thomas Wood commit 4cb194669782d759e60bad3fa61e3efc0ee7c7ec Author: Thomas Wood Date: Mon Aug 4 16:14:51 2014 +0100 lib: move create_stereo_fb from testdisplay to igt_fb Move create_stereo_fb from testdisplay to igt_create_stereo_fb in igt_fb so that it can be used in other tests. v2: update for new igt_create_fb API add parameters for format and tiling remove some old debug code Signed-off-by: Thomas Wood commit a124b1a430bf47f31fcff0614dbc00dbe2794dcf Author: Thomas Wood Date: Wed Jul 30 11:10:49 2014 +0100 lib: add kmstest_edid_add_3d kmstest_edid_add_3d adds an EDID extension block with 3D support to a copy of the specified EDID. v2: Avoid using an invalid CEC SPA (Clint Taylor) Signed-off-by: Thomas Wood commit 4a604dee6003d3c377a2984ce288f7e9b8fdf85b Author: Mika Kuoppala Date: Fri Aug 1 21:19:56 2014 +0300 tools/null_state_gen: build cmd and state space separately Instead of building batch directly to memory, build into cmd and state arrays. This representation allows us more flexibility in batch state expression and batch generation/relocation. As a bonus, we can also attach the line information that produced the batch data to help debugging. There is no change in the output states produced. This can be considered as a preparatory patch to help introduce gen8 golden state. Signed-off-by: Mika Kuoppala commit b77145dd489ef4e05799aa734927b9f9e77710d2 Author: Mika Kuoppala Date: Fri Aug 1 21:19:55 2014 +0300 lib: Add MI_LOAD_REGISTER_IMM Signed-off-by: Mika Kuoppala commit c5ad1c329564cdfc4b99596e5d02f5b6b16edea2 Author: Mika Kuoppala Date: Fri Aug 1 21:19:54 2014 +0300 lib/gen6_render: fix GEN6_3DSTATE_VF_STATISTICS define We dont use this pre CTG and we will need it for gen8 golden state. Signed-off-by: Mika Kuoppala commit f0023fa8f54a9f7f8b65699b08f2692093f101dd Author: Mika Kuoppala Date: Fri Aug 1 21:19:53 2014 +0300 lib/rendercopy: fix a typo in define No functional changes Signed-off-by: Mika Kuoppala commit ba614bea44d2a1661312a8465791d9e844e55f8b Author: Mika Kuoppala Date: Fri Aug 1 21:19:52 2014 +0300 tools/null_state_gen: terminate relocs with -1 as this was already changed in kernel. Signed-off-by: Mika Kuoppala commit c49542af073687a5dc66eaef19c31eeaf5766a86 Author: Daniel Vetter Date: Fri Sep 5 08:51:27 2014 +0200 lib/igt_aux: Improve wait_for_keypress helper a bit - Use keys in just one env variable to enable/disable it. - Add an informational message so that the users knows when to press the key (more useful over ssh than when run on the terminal ofc). - Improve the documentation so that it's clearer how to use this when running tests. Cc: Rodrigo Vivi Cc: Damien Lespiau Acked-by: Damien Lespiau Signed-off-by: Daniel Vetter commit a16ebccaee426ef96b0894e3af733360d88ce4d7 Author: Paulo Zanoni Date: Wed Sep 3 14:47:21 2014 -0300 igt_core: zero exit_handler_count before forking If we don't reset exit_handler_count before forking, we may have a case where the forked process is killed before it even does "exit_handler_count = 0": in that case, it is still finishing forking. When that happens, we may end up calling our exit handlers. On the specific bug I'm investigating, we call igt_reset_connnectors(), which ends up in a deadlock inside malloc_atfork. If we attach gdb to the forked process and get a backtrace, we have: (gdb) bt 0 __lll_lock_wait_private () at ../nptl/sysdeps/unix/sysv/linux/x86_64/lowlevellock.S:95 1 0x00007f15634d36bf in _L_lock_10524 () from /lib/x86_64-linux-gnu/libc.so.6 2 0x00007f15634d12ef in malloc_atfork (sz=139729840351352, caller=) at arena.c:181 3 0x00007f15640466a1 in drmMalloc () from /usr/lib/x86_64-linux-gnu/libdrm.so.2 4 0x00007f1564049ad7 in drmModeGetResources () from /usr/lib/x86_64-linux-gnu/libdrm.so.2 5 0x0000000000408f84 in igt_reset_connectors () at igt_kms.c:1656 6 0x00000000004092dc in call_exit_handlers (sig=15) at igt_core.c:1130 7 fatal_sig_handler (sig=15) at igt_core.c:1154 8 9 0x00007f15634cce60 in ptmalloc_unlock_all2 () at arena.c:298 10 0x00007f156350ca3f in __libc_fork () at ../nptl/sysdeps/unix/sysv/linux/x86_64/../fork.c:188 11 0x000000000040a029 in __igt_fork_helper (proc=proc@entry=0x610fc4 ) at igt_core.c:910 12 0x000000000040459d in igt_fork_signal_helper () at igt_aux.c:110 13 0x0000000000402ab7 in __real_main63 () at bug.c:76 14 0x000000000040296e in main (argc=, argv=) at bug.c:63 After doing some searches for "stuck at malloc_atfork", it seems to me we probably shouldn't be doing any malloc calls at this point of the code, so the best way to do that is to make sure we can't really run the exit handlers. So on this patch, instead of resetting the exit handlers after forking, we reset them before forking, and then restore the original value on the parent process. I can reproduce this problem by running "./kms_flip --run-subtest 2x-flip-vs-modeset" under an infinite loop. Usually after a few hundred calls, we end up stuck on the deadlock mentioned above. QA says this problem happens every time, but I'm not sure what is the difference between our environments that makes the race condition so much easier for them. The kms_flip.c problem can be considered a regression introduced by: commit eef768f283466b6d7cb3f08381f72ccf3951dc99 Author: Thomas Wood Date: Wed Jun 18 14:28:43 2014 +0100 tests: enable extra connectors in kms_flip and kms_pipe_crc_basic even though this commit is not the one that introduced the real problem. It is also possible to reproduce this problem with a few modifications to template.c: - Add a call to igt_enable_connectors() inside the first fixture. - Add igt_fork_signal_helper() and igt_stop_signal_helper() calls around subtest B. Note that the crucial piece is that the parent actively kills helper children, and if we skip tests this can happen _really_ fast. See e.g. commit a031a1bf93b828585e7147f06145fc5030814547 Author: Daniel Vetter Date: Fri Sep 13 16:43:22 2013 +0200 lib/drmtest: ducttape over fork race for past hilarity in this area. Cc: Thomas Wood Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=81367 Signed-off-by: Paulo Zanoni Signed-off-by: Daniel Vetter commit 081887504a72878fc5f54778af68ebd9404b4e04 Author: Chris Wilson Date: Wed Sep 3 13:38:30 2014 +0100 igt/gem_concurrent_blit: Move igt_require() out of children Otherwise the test infrastructure throws a fit. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83420 Signed-off-by: Chris Wilson commit 3309f54e8f15d2d82544b00abff2215f50ca27b2 Author: Chris Wilson Date: Sat Jul 26 11:42:20 2014 +0100 igt/gem_gtt_hog: Convert opencoded fork()/wait() over to igt_fork() No reason not to use the common infrastructure here. Signed-off-by: Chris Wilson commit a54faca98717eda0e192139bd72f110bd5a98c90 Author: Daniel Vetter Date: Wed Sep 3 12:51:33 2014 +0200 NEWS: Updates in anticipation of the next release Signed-off-by: Daniel Vetter commit 4bff3ee012a05b92b5779a0cb8e74a575f74a878 Author: Damien Lespiau Date: Sat Aug 30 22:46:41 2014 +0100 gem_workarounds: intel_wa_registers is now prefixed with i915 Signed-off-by: Damien Lespiau Reviewed-by: Arun Siluvery Signed-off-by: Daniel Vetter commit f473a5543eb601473e2b23e6ff7bff0f468bd3d0 Author: Chris Wilson Date: Mon Sep 1 07:23:30 2014 +0100 rendercopy/gen8: Fix vertex buffer relocation I was thrown by the routine calling itself gen7 when in it gen8 specific and required 64bit relocation fixes. Signed-off-by: Chris Wilson commit c12f292b1d8bbc61b65f1dfc3fd4a9e1e286dbee Author: Chris Wilson Date: Sun Aug 31 16:14:40 2014 +0100 igt/gem_concurrent_blit: Use the preallocated dummy bo for temporary copies Use the existing allocation, saves having to make fresh allocations in the innermost loop - trimming code and potential failure paths. Signed-off-by: Chris Wilson commit d6af0043bdde1413a3ccdc4e82d3f5b95b3ae271 Author: Chris Wilson Date: Sat Aug 30 14:48:36 2014 +0100 batch: Fix typo in BLIT_BATCH_BEGIN Signed-off-by: Chris Wilson commit 10552b5ca6c193e0c696e96c9f5e0d6142f4d8ee Author: Chris Wilson Date: Sat Aug 30 11:44:51 2014 +0100 batch: Specify number of relocations to accommodate Since relocations are variable size, depending upon generation, it is easier to handle the resizing of the batch request inside the BEGIN_BATCH macro. This still leaves us with having to resize commands in a few places - which still need adaption for gen8+. Signed-off-by: Chris Wilson commit 255bade1ea98e642fe6d01c9dee8d5e8661bd816 Author: Chris Wilson Date: Fri Aug 29 21:25:14 2014 +0100 igt/gem_seqno_wrap: Use debugfs singleton This has the added advantage of automounting debugfs for us. Signed-off-by: Chris Wilson commit 982f7eb238a0898c456e0574dee7c4507738d75f Author: Chris Wilson Date: Fri Aug 29 15:19:57 2014 +0100 Prepare for 64bit relocation addresses This reveal that quite a few locations were writing relocation offsets but only allowing for 32 bit addresses. To reveal such places in active tests, we also now double check that we do not use more batch space than declared. Signed-off-by: Chris Wilson commit 86055df9682948ef26b06b94a3856676d638e2fb Author: Chris Wilson Date: Fri Aug 29 17:36:29 2014 +0100 igt/gem_concurrent_blit: Apply some fence pressure as well As before, we also want to race against access through the fence registers. This overlaps slightly with gem_set_tiling_vs_blt, but the different access pattern should make it useful. Signed-off-by: Chris Wilson commit d28b9d27bf6c1c5e0dae591985442a25bbecab86 Author: Chris Wilson Date: Fri Aug 29 17:30:40 2014 +0100 igt: Tweak the igt_assert_cmpint macro Minor tweak to embed the constant format string rather than passing it to the vararg printf. Signed-off-by: Chris Wilson commit fbfa754e8dce1553e024310eb7b7ed9469ed238b Author: Chris Wilson Date: Fri Aug 29 19:28:34 2014 +0100 lib/batchbuffer: Guard intel_blt_copy with even more asserts Assert that the source/destination bounds are within the pitch and size of the associated bo. Signed-off-by: Chris Wilson commit 23d961e950e92bb00c7cb29fa73499af568e7571 Author: Chris Wilson Date: Fri Aug 29 14:49:59 2014 +0100 lib/batchbuffer: Store the gen in a local variable Reduce lookups and improve code clarity. Signed-off-by: Chris Wilson commit 822cc6a5655db6c210204ca349dbbed05ee1838b Author: Mike Mason Date: Tue Aug 26 13:31:27 2014 -0700 scripts: Add capability to resume interrupted run-tests.sh session Piglit provides a 'resume' feature that can restart an interrupted test run at the point where it stopped. This patch adds that feature to run_tests.sh. Signed-off-by: Mike Mason [Thomas: remove additional new line from end of file] Signed-off-by: Thomas Wood commit 59c55626f93eabafe4617f4aca6ec11545340d9d Author: Chris Wilson Date: Fri Aug 29 13:11:37 2014 +0100 igt/gem_concurrent_blit: Add ring race checks Similar to the previous commit, we also want to check that every pipeline is serialised correctly. This extends the test to include render copies as well as blits. Signed-off-by: Chris Wilson commit 6c428a6c060a23dc948f198f7a63096bd2739875 Author: Chris Wilson Date: Fri Aug 29 13:11:37 2014 +0100 igt/gem_concurrent_blit: Add GPU-vs-GPU checks In future, we may allow reordering of GPU batches. This implements a simple race detector by extending the current CPU-vs-GPU checks. Signed-off-by: Chris Wilson commit 3b94d3f8ce21c92d3209e73ab48fda64beb0037e Author: Chris Wilson Date: Fri Aug 29 13:11:40 2014 +0100 igt: Prettify igt_assert_eq() failure messages This just improves the language about the exact failure to reduce confusion. Signed-off-by: Chris Wilson commit d0a41b47ea5ed1ac5ca45f83d2917c6ad41b644a Author: Arun Siluvery Date: Tue Aug 26 14:50:28 2014 +0100 igt/gem_workarounds: igt to test workaround registers Some of the workarounds are lost followed by a gpu reset, suspend/resume; this patch adds a test which compares register state before and after the test scenario. This test currently verifies only bdw workarounds. v2: address patch cleanup comments (ThomasW) Add binary to ignore list and use igt_debugfs helper fns to read debugfs file and igt_info for printing debug info. v2.1: address minor comments from Daniel use igt_main as opposed to normal main Signed-off-by: Arun Siluvery [danvet: Drop igt_exit, it's already in igt_main.] Signed-off-by: Daniel Vetter commit 2ef19ad79a07d862a2dc799ab2e71d2ad91c9065 Author: Rémi Cardona Date: Mon Aug 18 01:09:15 2014 +0200 shader-debugger: Force file/stdout IO as UTF-8 Not all locales on linux are UTF-8, the most notable being the C locale. Python will use the ASCII codec for stream IO in this case and will barf on the Copyright sign at the top of .g4a files. Bugzilla: https://bugs.gentoo.org/show_bug.cgi?id=519434 Signed-off-by: Rémi Cardona Signed-off-by: Damien Lespiau commit 257a51ec955b178ed07e4797a7d36f35a8cc82fe Author: Daniel Vetter Date: Tue Aug 26 15:26:34 2014 +0200 lib: Use igt macros more Stragglers. Signed-off-by: Daniel Vetter commit 1649ef0d1f5c0e4f995a437bd24f1574a8b5100f Author: Daniel Vetter Date: Tue Aug 26 15:26:21 2014 +0200 lib/igt_* Use igt macros in igt libaries Except in igt_core since that would lead to some hilarious recursions. v2: Don't fflush any more, spotted by Chris. Signed-off-by: Daniel Vetter commit 71ac5de5a4473d20fb11cb454f62d8e5c90f020c Author: Daniel Vetter Date: Tue Aug 26 15:13:06 2014 +0200 lib/intel_* Use igt checks and macros Various stuff all over. Most done with the igt.cocci spatch, but with a few fixups by hand. And add igt_core.h includes where needed. Signed-off-by: Daniel Vetter commit baa6f8b34f54b68c15fc86d86de77d954e458aac Author: Daniel Vetter Date: Tue Aug 26 15:03:40 2014 +0200 lib/rendercopy*: Use igt_assert commit 4428151960b71a2ca4c83e8da3f4b0b826a8a26c Author: Sonika Jindal Date: Tue Aug 19 12:01:25 2014 +0530 kms_rotation_crc: Calling commit2 instead of legacy commit Since planes are universal now, using commit2 so that drmModeSetPlane can be called for primary plane as well instead of drmModeSetCrtc. drmModeSetPlane will update the x,y,w,h for the plane. Cc: Damien Lespiau Signed-off-by: Sonika Jindal Signed-off-by: Daniel Vetter commit c1cf0d81389e8cc696a233aa357130f97e1b9a4c Author: Wendy Wang Date: Tue Aug 26 14:38:49 2014 +0800 Merge two subtests for pm_rc6_residency IGT case Combine two subtests(rc6_residency_check and rc6_residency_counter) into one subtest(residency_accuracy) Signed-off-by: Daniel Vetter commit 50166d2a20b72d008e5991a157a45cd9a77e4dea Author: Damien Lespiau Date: Tue Aug 19 11:55:22 2014 +0100 lib/fb: Assert, instead of silently failing, when creating fbs We were either returning 0, or a negative value cast to an unsigned int for errors and the clients of that API weren't exactly checking anything. We're in luck, we can take shortcuts in a testing library to just assert when an expected error occurs. Signed-off-by: Damien Lespiau commit 54397cafed108e54e98f109b8fd6cb4fdc729823 Author: Damien Lespiau Date: Tue Aug 19 11:40:07 2014 +0100 lib/fb: Replace straight igt_fail() by asserts with debug messages Signed-off-by: Damien Lespiau commit d9ffb7dfc3e9a36e63561f0e3a995275a445f87f Author: Damien Lespiau Date: Fri Jun 20 12:02:09 2014 +0100 testdisplay: Make the desired tiling mode an unsigned int We may be able to scan out more tiling formats in the future. Signed-off-by: Damien Lespiau commit 5f16ef6f28b97d16301d10b7a137a3d0fdcb0927 Author: Damien Lespiau Date: Mon Aug 18 16:55:57 2014 +0100 pm_rpm: Adjust to the new igt_create*fb() API Signed-off-by: Damien Lespiau commit 9317f39a5e3729ac128c960a3e21d7234239b2db Author: Damien Lespiau Date: Mon Jun 23 15:28:07 2014 +0100 pm_lpsp: Adjust to the new igt_create.*fb() API Signed-off-by: Damien Lespiau commit 210f76c4969d9b8ed74230116d4d212a6f503e73 Author: Damien Lespiau Date: Mon Jun 23 15:27:17 2014 +0100 kms_sink_crc_basic: Adjust to the new igt_create.*fb() API Signed-off-by: Damien Lespiau commit ab4cb9d7ce4b69e25447cc7c161cc12cb9b879cf Author: Damien Lespiau Date: Mon Jun 23 15:26:34 2014 +0100 kms_setmode: Adjust to the igt_create.*fb() API Signed-off-by: Damien Lespiau commit 0d4cf057f518b079b7aa3d55f0ee14903b5abbcc Author: Damien Lespiau Date: Mon Jun 23 15:25:39 2014 +0100 kms_render: Adjust to the new igt_create.*fb() API Signed-off-by: Damien Lespiau commit 3149b8e903ecdbd7fadbbfcd9d3fdddf11b444a7 Author: Damien Lespiau Date: Mon Jun 23 15:24:49 2014 +0100 kms_psr_sink_crc: Adjust to the new igt_create.*fb() API Signed-off-by: Damien Lespiau commit 4a8c6346e53f1fbda34a0d7d376b2a906716a38a Author: Damien Lespiau Date: Mon Aug 18 16:50:07 2014 +0100 kms_plane: Adjust to the new igt_create.*fb() API Signed-off-by: Damien Lespiau commit b013b2117964529f8e693f5da2c865258b2af42d Author: Damien Lespiau Date: Mon Jun 23 15:21:21 2014 +0100 kms_pipe_crc_basic: Adjust to the new igt_create.*fb() API Signed-off-by: Damien Lespiau commit fd1317bd25944feebbd553a7c85395beb6842df0 Author: Damien Lespiau Date: Mon Jun 23 15:19:25 2014 +0100 kms_mmio_vs_cs_flip: Adjust to the new igt_create_.*fb() API Signed-off-by: Damien Lespiau commit 876fe198c7a47a427d49347141a70cc3f5607a55 Author: Damien Lespiau Date: Mon Jun 23 15:18:00 2014 +0100 kms_flip_tiling: Adjust to the new igt_create_.*fb() API Signed-off-by: Damien Lespiau commit d71031cd7455fa2119215abca651e816ad0807a1 Author: Damien Lespiau Date: Mon Jun 23 15:16:54 2014 +0100 kms_flip: Adjust to the new igt_create_fb*() API Signed-off-by: Damien Lespiau commit 3a930273a05790570fb1986bc36f67bbf6a7af3b Author: Damien Lespiau Date: Mon Jun 23 15:13:46 2014 +0100 kms_fence_pin_leak: Use I915_TILING_X to create fbs Signed-off-by: Damien Lespiau commit 66d31332ddaadf8d92ff761747d51716f5a0f5da Author: Damien Lespiau Date: Mon Jun 23 15:12:48 2014 +0100 kms_fbc_crc: Use I915_TILING_X to create fbs Signed-off-by: Damien Lespiau commit 0c14af65eaf0d052a8263fadd53c825282576608 Author: Damien Lespiau Date: Mon Jun 23 15:11:12 2014 +0100 kms_cursor_crc: Use I915_TILING_NONE to create fbs Signed-off-by: Damien Lespiau commit 378e61e4d872136d9d106bcaae1fcafb5ce1c460 Author: Damien Lespiau Date: Mon Jun 23 14:53:24 2014 +0100 lib: Change the fb creation functions to take fully qualified tiling formats In the future, we'll need more than X tiling here. So give a full enum instead of bool meaning X-tiled. It's fine to do this change without updating the users just yet as 'true' happens to be I915_TILING_X. Signed-off-by: Damien Lespiau commit 4d2f511cee49db9b8f1ebf93b9835d871dfb9a9e Author: Mike Mason Date: Mon Aug 18 10:43:49 2014 -0700 tests: Fix seg fault when gem_mmap is run without specifying a subtest gem_mmap seg faults when all tests are run together. This occurs because the new-object subtest closes the gem object, but short-mmap assumes it still exists. Thus gem_mmap__cpu() returns nil for addr and memset() seg faults. This patch makes new-object and short-mmap create and close their own gem objects. Signed-off-by: Mike Mason Signed-off-by: Thomas Wood commit e9da093b13c572b50c84ea2ec19244c8e2b78f08 Author: Mike Mason Date: Mon Aug 18 10:43:09 2014 -0700 scripts: Allow multiple -t and -x regular expressions for run-tests.sh Piglit allows multiple -t and -x regular expressions to be given on the command line. This patch enables run-tests.sh to support that as well. Signed-off-by: Mike Mason Signed-off-by: Thomas Wood commit 75365eb01b7cb530426d84ea5357ed7b31575337 Author: Tim Gore Date: Mon Aug 18 14:56:43 2014 +0100 intel-gpu-tools: skip kms_flip_event_leak unless we have cairo kms_flip_event_leak depends on cairo, so add it to the list of tests to skip (in Android.mk) if ANDROID_HAS_CAIRO is not set to 1. Signed-off-by: Tim Gore Signed-off-by: Thomas Wood commit 79c0c9622c870a4e562dfe7b7e5b3625f73c61d1 Author: Mike Mason Date: Fri Aug 15 19:14:12 2014 +0000 Add kms_flip_event_leak to .gitignore This patch just adds kms_flip_event_leak to tests/.gitignore. Signed-off-by: Mike Mason Signed-off-by: Thomas Wood commit 1bec6cb2c241ec449cd75579041506d1708bd341 Author: Thomas Wood Date: Thu Aug 14 14:06:37 2014 +0100 tests: check plane rotation is reset after the VT mode is restored Make sure the rotation is reset after the VT mode is restored by collecting the unrotated CRC and comparing with the CRC value after VT mode has been restored. The CRC is used to ensure the hardware state is checked, rather than any software state. References: https://bugs.freedesktop.org/show_bug.cgi?id=82236 Signed-off-by: Thomas Wood commit fcb324c2cca6549cd95fb84269622feb72c90cbd Author: Thomas Wood Date: Thu Aug 14 13:59:02 2014 +0100 lib: add igt_restore_vt_mode Add a function to restore the previous VT mode after igt_set_vt_graphics_mode is called. Signed-off-by: Thomas Wood commit 5c7bcb11bea366ede55e839656f4d03f150b2ca3 Author: Daniel Vetter Date: Tue Aug 12 12:10:20 2014 +0200 lib/igt_kms: doc for the remaining kmstest_ functions Plus a bit an overview section explaining the split in the library - a few people (everyone except me it seems) didn't really understand it. v2: Fix typo'ed s/kmstest_set_vt_graphics_mode/kmstest_get_pipe_from_crtc_id/ in a doc comment spotted by Imre. Signed-off-by: Daniel Vetter commit 1cad834261e5792f19406faf111235737da15191 Author: Daniel Vetter Date: Tue Aug 12 11:57:32 2014 +0200 lib/igt_kms: Simplify return value of kmstest_get_connector_config A plain bool is enough. Signed-off-by: Daniel Vetter commit 81dfcaba88f2a6f04830b7da2fd7d79cf6120a40 Author: Daniel Vetter Date: Tue Aug 12 11:56:41 2014 +0200 lib/igt_kms: Simplify return value of kmstest_get_connector_default_mode A plain bool is good enough, no need for fancy negative error values. Signed-off-by: Daniel Vetter commit 3b39bfff60967c13dbadae8ff051819d78c6bd2f Author: Daniel Vetter Date: Tue Aug 12 11:31:44 2014 +0200 lib/igt_kms: Shuffle kmtests_ functions Group them a bit both in the header and .c file, and make sure they appear in the same order in both. Signed-off-by: Daniel Vetter commit 33f0884f3c711551a89483e438a6cf18af8ab25e Author: Daniel Vetter Date: Tue Aug 12 11:23:09 2014 +0200 lib/igt_kms: set_vt_graphics_mode is a low-level helper So give it a kmstest_ prefix and shuffle it around a bit. Signed-off-by: Daniel Vetter commit 9a15b5a5e2cb0ab34c0e11dc53a183919664157f Author: Daniel Vetter Date: Tue Aug 12 11:13:03 2014 +0200 lib/igt_kms: doc for type2str functions Also shuffle things around a bit to make sure the order in the header matches the order in the .c file. Signed-off-by: Daniel Vetter commit 27a19de059259ef2944f7bfd61082862e6f277e4 Author: Daniel Vetter Date: Tue Aug 12 11:04:49 2014 +0200 lib/igt_kms: Clean up the other _name functions/macros And remove sprite_name, redundant and won't work due to lack of dev_priv. Signed-off-by: Daniel Vetter commit dd8fba44cd1759e5cffc84d47f2c9b92c1e2ae8b Author: Daniel Vetter Date: Tue Aug 12 11:00:37 2014 +0200 lib/igt_kms: Unify pipe name helpers And add api doc while at it. Signed-off-by: Daniel Vetter commit fb38cf260ba6ed45b514b7a2c21f733c51caeb90 Author: Daniel Vetter Date: Tue Aug 12 10:32:41 2014 +0200 tests/kms_cursor_crc: Align opening { Signed-off-by: Daniel Vetter commit 2ce0691cd5237ebf06d617acb2a33d418178f883 Author: Chris Wilson Date: Tue Aug 12 15:29:25 2014 +0100 igt/gem_cpu_reloc: Update the memory requirements Use intel_check_memory() for accuracy and beautification Signed-off-by: Chris Wilson commit eda904c9d787bd085be3803529c7f23f81ec174b Author: Ville Syrjälä Date: Tue Aug 5 23:06:04 2014 +0300 tests: Add kms_flip_event_leak test kms_flip_event_leak will issue a page flip and close the file descriptor before the flip has finished. This may cause the kernel to leak the page flip event. The test itself won't actually fail but if the kernel notices the leak and WARNs piglit will report a failure. Signed-off-by: Ville Syrjälä commit 5a06d361b5941466ef1941bb6010f179dbb6f66e Author: Paulo Zanoni Date: Fri Aug 8 11:24:34 2014 -0300 tests/pm_rpm: refactor the modesetting code Refactor the code so the params for the modesets are always stored and don't have to be recomputed every time. With this, we can get rid of our FB caching structures, and we now also allow the subtests that do special modesets to reuse the parameters used on the default modesets, just changing whatever they want. The biggest win here is that the test case subfunctions get smaller and simpler to read and write. Signed-off-by: Paulo Zanoni commit 5a978121d36ceb0ac6b372475d03c98a8db72e7e Author: Paulo Zanoni Date: Thu Aug 7 16:36:04 2014 -0300 tests/pm_rpm: add disable_or_dpms_all_screens() And its and_wait() version. The goal is to extract common code patterns into functions/macros, so the code for the test cases gets easier to read and write. Signed-off-by: Paulo Zanoni commit 189205984224e5a66d4dcfc85f4072202d91b633 Author: Paulo Zanoni Date: Fri Aug 8 11:12:42 2014 -0300 tests/pm_rpm: add macros to disable/enable screens and wait This should make the test case functions better to read and write. Signed-off-by: Paulo Zanoni commit f6ffa3ca7f6d845d76cad95e2d5f0f8fdd84932a Author: Paulo Zanoni Date: Thu Aug 7 16:03:08 2014 -0300 tests/pm_rpm: add wait_for_suspended() calls to test_one_plane Make sure we do all operations while really runtime suspended, so we can actually test things. Signed-off-by: Paulo Zanoni commit a17f0604ef31ed310fbdcbb64324fcb39f08b908 Author: Paulo Zanoni Date: Wed Aug 6 18:50:57 2014 -0300 tests/pm_rpm: add subtests for fences Daniel thought fences were not surviving runtime PM on DPMS, so we wrote this test to check. The good news is that the test passed, so there's no need for a Kernel patch, at least on the Kernel I tested. Signed-off-by: Paulo Zanoni commit d52365677ef808ffa43bf5e9d53ed0814edd3dd5 Author: Paulo Zanoni Date: Wed Aug 6 14:31:53 2014 -0300 igt_kms: add kmstest_unset_all_crtcs() Both pm_rpm.c and pm_lpsp.c call it "disable_all_screens", but let's give it a name that better describes what the implementation does. v2: Rename to kmstest_unset_all_crtcs (Daniel). Signed-off-by: Paulo Zanoni commit da458758e7d8d10b520146591312ae0407a0da6b Author: Paulo Zanoni Date: Wed Aug 6 12:33:48 2014 -0300 tests/pm_rpm: use kmstest_get_property() So we can reduce the code size. v2: Rebase after the rename to kmstest_get_property. Signed-off-by: Paulo Zanoni commit 4924b78368fa44f96fa61f6bcf402d4a55f8d4de Author: Paulo Zanoni Date: Wed Aug 6 12:14:56 2014 -0300 igt_kms: document and export kmstest_get_property() So we can use it on pm_rpm.c. v2: Rename to kmstest_get_property (Daniel) Signed-off-by: Paulo Zanoni commit 053c10432254d2d58c33346f0ef08f024c3781ce Author: Paulo Zanoni Date: Wed Aug 6 12:03:57 2014 -0300 igt_kms: optionally return the property from get_property So we can use this function on places that also need the property pointer, without having to call drmModeGetProperty() again with the returned id. Signed-off-by: Paulo Zanoni commit 18d8ea7fe451ee73606d82b060f02e06fae16fc2 Author: Paulo Zanoni Date: Wed Aug 6 11:48:56 2014 -0300 igt_kms: pass drm_fd instead of igt_display_t on some functions Since these functions only really use the drm_fd. The goal is to be able to reuse these functions on programs that don't use the igt_display_t structure. Signed-off-by: Paulo Zanoni commit 61920c68d847dcc920fff27f857e03debc76a9a4 Author: Paulo Zanoni Date: Tue Aug 5 18:44:47 2014 -0300 igt_kms: don't get drmModeRes just to free it later Stress testing malloc is not our goal :) Signed-off-by: Paulo Zanoni commit bfb5a757751d6f8e6f7ed02f6cb76d006cd0e990 Author: Paulo Zanoni Date: Wed Aug 6 14:55:33 2014 -0300 tests/pm_rpm: add subtests for planes and cursors These tests should trigger WARNs on Kernels that don't have the most recent fixes. v2: - Merge both the cursor and planes patches into one so it's easier to update them. - Extend the tests a little bit to exercise fences. - Fix bug found by Matt to enable the test to run on older Kernels Signed-off-by: Paulo Zanoni commit 17d63e49685ac51d62ba2dba80167de96e1b6c5f Author: Sean V Kelley Date: Tue Aug 5 13:53:49 2014 -0700 lib/chv: CHV media pipeline command sequence Enable gem_media_fill test for CHV platform. In addition to differences in media IP blocks from Broadwell, the command sequence also differs for programming the media pipeline, e.g., should not send a MEDIA_STATE_FLUSH right before the MI_BATCH_BUFFER_END of batch buffers using MEDIA_OBJECT. Uses explicit IS_BROADWELL / IS_CHERRYVIEW to distinguish in gen8 media fill handling. Signed-off-by: Sean V Kelley Reviewed-by: Xiang, Haihao Signed-off-by: Daniel Vetter commit ac31f19264d45df63fdd6591d66ae57060d1ee5e Author: Gaurav K Singh Date: Wed Jul 16 19:39:33 2014 +0530 intel_bios_reader: Add support to dump MIPI Sequence block #53 Signed-off-by: Gaurav K Singh Signed-off-by: Damien Lespiau commit 525044ba32a9fa848c9fb36e8bd96211d6b38e12 Author: Gaurav K Singh Date: Wed Jul 16 19:39:32 2014 +0530 intel_bios_reader: Add support to dump MIPI Configuration Block #52 Signed-off-by: Gaurav K Singh Signed-off-by: Damien Lespiau commit ff6b068ecd1d231af466d043454279e6cddcb3d1 Author: Thomas Wood Date: Thu Jul 31 16:26:55 2014 +0100 testdisplay: ignore invalid subtest options testdisplay does not have any subtests and should therefore exit with the appropriate exit code if the --list-subtests or --run-subtest options are used. Signed-off-by: Thomas Wood commit de1e877be5fe9ac83477a8ca416708f3d078b731 Author: Chris Wilson Date: Mon Jul 28 08:58:32 2014 +0100 core: Add all kernel log levels And notice that INFO is 6 not 5. This is because I had intended to use KERN_NOTICE anyway... Signed-off-by: Chris Wilson commit 9b500dbf6b0b3a68b1de90888c11a873202c98cd Author: Thomas Wood Date: Mon Jul 28 16:43:19 2014 +0100 Update .gitignore files Signed-off-by: Thomas Wood commit bb48429a6c6057b51358ce0d506916431d982897 Author: Thomas Wood Date: Mon Jul 28 16:01:27 2014 +0100 lib: don't abort if forcing the connector state fails Ensure tests using igt_enable_connectors can still run even if the relevant debugfs files are not available. Signed-off-by: Thomas Wood commit c3ba7740c113d318d030ac408883c3303ca781bb Author: Thomas Wood Date: Mon Jul 28 15:37:16 2014 +0100 lib: check test options for conflicts Check any test specific options for conflicts with the standard set of options. Signed-off-by: Thomas Wood commit fc5e25750f96b9c05919e757baf2a54996ba4942 Author: Thomas Wood Date: Fri Jul 25 16:54:41 2014 +0100 lib: avoid getopt value conflicts with tests Most tests use a printable character as the value for getopt to return, so avoid conflicts by using non-printing values for the standard options. v2: fix "-h" short option Signed-off-by: Thomas Wood commit 8fc4107c911826f7e0900797e36b24010230e30d Author: Thomas Wood Date: Fri Jul 25 15:35:36 2014 +0100 testdisplay: set a non-zero exit code if getopt detected an error Signed-off-by: Thomas Wood commit 2fae99bf2cc69eed3ef71ba4d71f640463de57c3 Author: Ben Widawsky Date: Tue Jul 29 16:54:48 2014 -0700 lib: Add ndebug to the headers If you don't do this, it is excluded from the tarball generated by make distcheck. 1.6 and 1.7 both are not buildable as a result. Signed-off-by: Ben Widawsky commit 21e9422b01a196dbb6f4c079d352978d81d55f32 Author: Daniel Vetter Date: Tue Jul 29 18:46:09 2014 +0200 tests/gem_ringfill: add interruptible mode Should be useful to test intel_ring_begin restart behaviour a bit. Signed-off-by: Daniel Vetter commit 660a7ffdbade6ea0854df881ce316cfc64500826 Author: Damien Lespiau Date: Mon Jun 30 16:19:05 2014 +0100 testdisplay: Destroy the cairo context once the fb is painted Signed-off-by: Damien Lespiau commit 0db75bb3f91fc058c56650100f75cea5204c6af6 Author: Damien Lespiau Date: Mon Jun 30 16:34:20 2014 +0100 lib: Don't take a reference to the surface in get_cairo_surface() We don't need to keep a reference to the surface, the cairo context will keep a reference to it until we destroy it. Signed-off-by: Damien Lespiau commit 72357f3de04ab9aa57b046b666e02090641f0aa4 Author: Damien Lespiau Date: Fri Jul 11 14:45:37 2014 +0100 lib: NULLify ->cairo_surface once unmapped Just a matter of not leaving dangling pointers around. Signed-off-by: Damien Lespiau commit 4aadbc817b3ff72cb44fac2aece3affe19c04f18 Author: Damien Lespiau Date: Mon Jun 23 16:41:43 2014 +0100 lib: Split the GTT mapping out of get_cairo_surface() This is preparation work for when we need a different way to get a linear buffer we can use with cairo. Signed-off-by: Damien Lespiau commit f5959af8a5887fb991c4a24daa8017331614e6b0 Author: Damien Lespiau Date: Mon Jun 23 19:47:19 2014 +0100 lib: Remove unused field from struct igt_fb Signed-off-by: Damien Lespiau commit e48c495572ae1e07aa3f48e801caec351a370c4b Author: Chris Wilson Date: Sun Jul 27 15:39:58 2014 +0100 igt/pm_rps: Fix assertion in load_helper_stop The load_helper isn't killed by the signal, but it exits gracefully. So update the assertion to check for the successful exit. Signed-off-by: Chris Wilson commit a6e6c5bdcf93376a505abff3ae510d8275727028 Author: Chris Wilson Date: Fri Jul 25 17:34:06 2014 +0100 drmtest: First check that driver is i915 Before issuing any i915 specific ioctls, check the driver is i915 otherwise we make other drivers emit nasty errors at the start of every test. Signed-off-by: Chris Wilson commit fcbc5028aef6a8691c87d9153c93246f7904e307 Author: Thomas Wood Date: Fri Jul 25 13:53:12 2014 +0100 quick_dump: fix distcheck version.h is now generated in the libs directory, so make sure it is correctly included in the compiler flags. Signed-off-by: Thomas Wood commit 57bd86068a319b218796d0bea92258b44ee143a0 Author: Tim Gore Date: Thu Jul 24 17:38:22 2014 +0100 intel-gpu-tools: fix version.h creation in android commit 743dc7997aa9f5210055896940d87c88983dcda6 breaks the build under Android because version.h is not created. This happens because the android make executes from the ANDROID_BUILD_TOP directory rather than from the directory containing the source files, so we need to differentiate between Android and linux builds. This is V2 of this patch based on Thomas Wood's suggestion. Signed-off-by: Tim Gore [Thomas: Fix distcheck issues] Signed-off-by: Thomas Wood commit 8408e00e623b52f18ad0795122593741197fa2f4 Author: Thomas Wood Date: Thu Jul 24 17:45:48 2014 +0100 testdisplay: only set terminal attributes when in foreground process group The Piglit test runner for intel-gpu-tools creates a new process group for the test processes, so attempting to set terminal attributes causes the process to receive SIGTTOU and be stopped. Since the test is not run interactively in this case, the issue can be avoided by not setting terminal attributes if the process is not in the foreground process group. Signed-off-by: Thomas Wood commit b9e7637542364f9834c620ce2ee3b4ca11ba6f27 Author: Chris Wilson Date: Fri Jul 25 14:29:47 2014 +0100 core: Inject program name into dmesg Write the program name if !list_only so that we associate oops with simple tests. Signed-off-by: Chris Wilson commit e0dffbdeda010a0114e16fb7b2e3adb7336acff4 Author: Chris Wilson Date: Fri Jul 25 14:28:51 2014 +0100 core: Improve phrasing for test requirements Signed-off-by: Chris Wilson commit 72b12636492cdf1c97eb1fec313165720f741cca Author: Tim Gore Date: Thu Jul 24 14:54:27 2014 +0100 intel-gpu-tools: add sys/wait.h to pm_rps.c commit 745945546f7366a413a3a51a37f90caa3a227b1d breaks the build under Android because some of the macros used in pm_rps.c are defined in sys/wait.h which is not included. Signed-off-by: Tim Gore Signed-off-by: Daniel Vetter commit 93d07ab8986f383a679faffc795c71a955f67945 Author: Daniel Vetter Date: Fri Jul 25 09:28:56 2014 +0200 NEWS: Don't forget new universal plane commit for igt_kms Suggest by Matt Roper. Signed-off-by: Daniel Vetter commit 52915fc88a3948eab9e6f243b81285420897ab95 Author: Chris Wilson Date: Thu Jul 24 12:46:00 2014 +0100 core: Inject subtest message into dmesg One of the side-effects we test for are kernel oops and knowing the guilty subtest can help speed up debugging. We can write to /dev/kmsg to inject messages into dmesg, so let's do so before the start of every test. Signed-off-by: Chris Wilson commit 66e46630f8ba04060d73e18e46a956bf25201fc4 Author: Chris Wilson Date: Thu Jul 24 12:00:57 2014 +0100 igt_core: Read manpages more carefully for WNOHANG /me hides I thought it said it would not return for a signal and stopped thinking. Signed-off-by: Chris Wilson commit 745945546f7366a413a3a51a37f90caa3a227b1d Author: Chris Wilson Date: Thu Jul 24 11:44:45 2014 +0100 igt_core: Refactor igt_stop_helper() to use igt_wait_helper() Reduce code duplication as the igt_stop_helper can reuse igt_wait_helper() to replace its own waiting routine. Signed-off-by: Chris Wilson commit bd3cf81e982d191715a68b6432c3820e9ba733ff Author: Chris Wilson Date: Thu Jul 24 11:41:59 2014 +0100 core: Only use signalsafe functions inside signal handlers The atexit() and signal() callbacks both need to only use signalsafe functions - that excludes the use of assert. So simplify fork_helper_exit_handler() and children_exit_handler(). __lll_lock_wait_private () at ../nptl/sysdeps/unix/sysv/linux/x86_64/lowlevellock.S:95 0x00007fd630883d2b in _L_lock_13840 () from /lib/x86_64-linux-gnu/libc.so.6 0x00007fd630881df8 in __GI___libc_realloc (oldmem=0xfcb010, bytes=88) at malloc.c:3025 0x00007fd63087111b in _IO_vasprintf (result_ptr=0x7fff35dc4780, format=, args=args@entry=0x7fff35dc4658) at vasprintf.c:84 0x00007fd630852907 in ___asprintf (string_ptr=string_ptr@entry=0x7fff35dc4780, format=format@entry=0x7fd63097f718 "%s%s%s:%u: %s%sAssertion `%s' failed.\n%n") at asprintf.c:35 0x00007fd63082dd92 in __assert_fail_base (fmt=0x7fd63097f718 "%s%s%s:%u: %s%sAssertion `%s' failed.\n%n", assertion=assertion@entry=0x40cff5 "ret == 0", file=file@entry=0x4108d1 "igt_core.c", line=line@entry=872, function=function@entry=0x410ea0 <__PRETTY_FUNCTION__.8052> "children_exit_handler") at assert.c:57 0x00007fd63082dee2 in __GI___assert_fail (assertion=assertion@entry=0x40cff5 "ret == 0", file=file@entry=0x4108d1 "igt_core.c", line=line@entry=872, function=function@entry=0x410ea0 <__PRETTY_FUNCTION__.8052> "children_exit_handler") at assert.c:101 0x000000000040b03f in children_exit_handler (sig=) at igt_core.c:872 0x000000000040b089 in call_exit_handlers (sig=2) at igt_core.c:1029 fatal_sig_handler (sig=2) at igt_core.c:1053 0x00007fd6308bfe63 in __libc_fork () at ../nptl/sysdeps/unix/sysv/linux/x86_64/../fork.c:130 0x00007fd630bd6045 in __fork () at ../nptl/sysdeps/unix/sysv/linux/pt-fork.c:25 0x000000000040c51a in __igt_fork () at igt_core.c:900 0x00000000004036c2 in forking_evictions (ops=0x614360 , surface_size=1048576, flags=5, trash_surfaces=, working_surfaces=338, fd=4) at eviction_common.c:203 test_forking_evictions (size=1048576, flags=5, count=338, fd=4) at gem_userptr_blits.c:1086 main (argc=1, argv=0x7fff35dc5328) at gem_userptr_blits.c:1478 Reported-by: Tvrtko Ursulin Signed-off-by: Chris Wilson commit 8b3ded404c25bf23221e3b5ff2cc873107185781 Author: Tvrtko Ursulin Date: Tue Jul 22 11:14:51 2014 +0100 igt/gem_userptr_blits: Fix multi-threaded mm stress tester Two parts to the fix: 1. Do not use pthread_cancel since not available on Android. 2. Do not assert in the thread since that does not get propagated to the process. Rather pass out any failures so we know test did not work as expected. Signed-off-by: Tvrtko Ursulin Cc: Tim Gore Reviewed-by: Tim Gore commit 700bdf1401f1596d25024fd1038e782708bf39e5 Author: Tvrtko Ursulin Date: Tue Jul 22 12:33:49 2014 +0100 igt/gem_userptr_blits: Fix forked access test copy() blit helper assumes a certain object size much larger than a page size. Signed-off-by: Tvrtko Ursulin Cc: Chris Wilson Reviewed-by: Chris Wilson commit bffef22bfd0fc80e8196df8bf33970aee9683e5d Author: Daniel Vetter Date: Wed Jul 23 22:32:09 2014 +0200 NEWS: Updates commit 3efcb8c8ee3bade05cd01edf809f803a376f24a5 Author: Daniel Vetter Date: Wed Jul 23 21:14:24 2014 +0200 tests/pm_rpm: Convert to new optparsing Thomas missed the add-hoc parameter parsing in here, which did break things for Paulo since the core now fails for unknown options. Convert them over to the new infrastructure, which has the nice upside that we can remove the comments and put them into the usage available with --help. Cc: Thomas Wood Cc: Paulo Zanoni Tested-by: Paulo Zanoni Signed-off-by: Daniel Vetter commit 556ebc7a7cdec2f5cfa90c8503e0a7e9493154c5 Author: Daniel Vetter Date: Wed Jul 23 14:35:22 2014 +0200 lib/drm_lib.sh: Bare-bones long option parsing Just enough to stay compatible with simple subtests. Signed-off-by: Daniel Vetter commit 91f536dc42c667b908072ee064fd150826349ec6 Author: Daniel Vetter Date: Wed Jul 23 14:21:27 2014 +0200 tests: Move root check to lib/drm_lib.sh All tests want that anyway. Signed-off-by: Daniel Vetter commit 8cb89f7c4cb764a819410e05440cc9dcb9f8df1f Author: Chris Wilson Date: Wed Jul 23 18:35:02 2014 +0100 linux: placate drop_caches and pass it a '\n' Apparently it doesn't have much effect without the newline. Signed-off-by: Chris Wilson commit 743dc7997aa9f5210055896940d87c88983dcda6 Author: Thomas Wood Date: Tue Jul 22 14:53:18 2014 +0100 build: improve version.h generation Move version.h generation into lib/Makefile.sources so that it can be shared between the Autotools and Android build systems. Also make sure the "updating version.h" message is only displayed when version.h actually changes and remove unnecessary includes of version.h. This also includes changes from Tvrtko Ursulin to prevent a build from within the git repository failing when git is not available. Signed-off-by: Thomas Wood Cc: Tvrtko Ursulin commit 784344ef8896e47af13fbb4377b020f33ce4c93c Author: Thomas Wood Date: Wed Jul 23 16:29:39 2014 +0100 lib: add an exit code to use when invalid options are specified Signed-off-by: Thomas Wood commit 561d519e67f31c81d338601ce859d32188c4bd7b Author: Thomas Wood Date: Wed Jul 23 10:38:24 2014 +0100 lib: add a command line option to enable debug output in tests Add --debug as a common command line option for all tests to enable debug output. Signed-off-by: Thomas Wood commit c584d5c671fd81881e39b032771398cf705b4bf4 Author: Thomas Wood Date: Mon Jul 21 16:17:06 2014 +0100 lib: always warn about unknown options All tests can now register extra options, so there should not be any unknown options. Signed-off-by: Thomas Wood commit 80d2c9bf82800b3cfc988879067c0e38947e5879 Author: Thomas Wood Date: Mon Jul 21 15:57:16 2014 +0100 tests: convert simple tests to use igt_simple_init_parse_opts Convert simple tests to use igt_simple_init_parse_opts if they require extra options. Signed-off-by: Thomas Wood commit 82b424a419e48e08ae112345ba517a81609ce7eb Author: Thomas Wood Date: Fri Jul 18 17:17:34 2014 +0100 lib: don't ignore unknown options in multi-tests None of the current tests have additional options that might make use of any unknown options and igt_subtest_init_parse_opts is available that integrates additional option parsing. Signed-off-by: Thomas Wood commit e2cef00896a3b68c4f91c94254c0d44fa36f3ad0 Author: Thomas Wood Date: Fri Jul 18 16:49:07 2014 +0100 lib: add igt_simple_init_parse_opts This function allows simple tests to register additional command line options. Signed-off-by: Thomas Wood commit 94ac74ebb889909579e3b872fd29514280c99300 Author: Thomas Wood Date: Fri Jul 18 16:24:34 2014 +0100 lib: move option parsing into common_init Move option parsing into common_init so it can be shared between simple tests and tests with subtests. This allows for more common command line behaviour across all tests. Signed-off-by: Thomas Wood commit e73008bae32de18c86808da0f3393683af92c697 Author: Thomas Wood Date: Fri Jul 18 14:17:35 2014 +0100 tests: remove unused getopt header includes Signed-off-by: Thomas Wood commit e057b86109e67191448d6610e441cbca81513d68 Author: Thomas Wood Date: Fri Jul 18 14:10:27 2014 +0100 lib: warn when attempting to run an unknown subtest Signed-off-by: Thomas Wood commit bf57e93f508244b13bf9848e37f03c7cd8f9ac94 Author: Tvrtko Ursulin Date: Wed Jul 23 13:33:18 2014 +0100 igt/gem_userptr_benchmark: Fix for upstream ioctl number Hardcoding has upsides and downsides. Signed-off-by: Tvrtko Ursulin Signed-off-by: Daniel Vetter commit 70e6ed92abbca575f03f5a28402ef1eb9a6b97b8 Author: Chris Wilson Date: Mon Jul 21 16:15:24 2014 +0100 linux: Flush page/buffer cache before querying available memory Signed-off-by: Chris Wilson commit 784b77257b023b5debb05dceb397b4ba6092ae21 Author: Chris Wilson Date: Mon Jul 21 09:12:43 2014 +0100 igt/gem_userptr_blits: New tests, old issues Introduce a new test to keep that we clean up on process exit (if the userptr is busy or it has been gtt mmapped). This revealed a few bugs in the existing tests so clean those up. Signed-off-by: Chris Wilson commit acca724b42252d608b18373be82a2dfa817d4225 Author: Chris Wilson Date: Mon Jul 21 07:57:25 2014 +0100 Quieten valgrind Clear all the ioctl structs to zero before use as valgrind does not our ioctls and so complains about undefined bytes being passed to syscalls. Signed-off-by: Chris Wilson commit 4f7d4dcae56e5f993f3f0b331556d4df3b0b33ab Author: Chris Wilson Date: Mon Jul 21 07:54:29 2014 +0100 Use SIGTERM in replace of SIGQUIT SIGTERM is the normal signal to use when instructing a process to exit. The only difference is that an unhandled SIGQUIT is meant to generate a coredump, which is not what we want, but in practice I encountered an issue where SIGTERM seemed to be deliverable more reliably than SIGQUIT (in tests using multiple signal helpers). Signed-off-by: Chris Wilson commit 4d4f4b213ca95dad59bdf8080d7bb034aa2d307a Author: Chris Wilson Date: Sat Jul 19 11:59:42 2014 +0100 igt/kms_flip: Skip if headless If there are no connectors, we cannot perform any pageflips and so we have nothing to test. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73640&list_id=446828 Signed-off-by: Chris Wilson commit d0dc2c5b6a22f88d0c7288d134173320c58c8d50 Author: Paulo Zanoni Date: Wed Jul 16 16:10:30 2014 -0300 tests/pm_rpm: add dpms-mode-unset{,-non}-lpsp subtests These tests currently trigger WARNs on our Kernel. Let's make sure we fix the bug and it never comes back. Signed-off-by: Paulo Zanoni commit 8a3853c8121367d055acea2f7fb483095b971bf9 Author: Thomas Wood Date: Thu Jul 17 11:19:04 2014 +0100 core: increase the exit handler limit Increase the maximum number of exit handlers since some tests now require more that the previous limit. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=81320 Signed-off-by: Thomas Wood commit 428060c555526c988f4120718f8a000e59ac8c7b Author: Daniel Vetter Date: Tue Jul 15 10:21:37 2014 +0200 lib/igt.cocci: Add s/assert/igt_assert/ People use it way too often, and it upsets the test library. The only valid places to use this is of igt infrastructure self-tests where you need to check something _without_ all the other abi use checks igt_fail and friends do. For those tests just #define an internal assert to hide it. Signed-off-by: Daniel Vetter commit 43784baa1346a36f99a84a06cfc83c11b507c03e Author: Daniel Vetter Date: Tue Jul 15 10:12:55 2014 +0200 tests/gem_userptr_blits: Polish - Drop return values for test functions - we rely on the implicit control flow from igt_ checks. - Don't use assert directly, this upsets the test flow logic (and results in a CRASH result instead of FAIL). Cc: Tvrtko Ursulin Signed-off-by: Daniel Vetter commit abbfecb01511d4f542302148b6240561c0269007 Author: Tvrtko Ursulin Date: Mon Jul 14 14:19:17 2014 +0100 tests/gem_userptr_blits: Race between object creation and multi-threaded mm ops Userptr v23 was not thread safe against memory map operations and object creation from separate threads. MMU notifier callback would get triggered on a partially constructed object causing a NULL pointer dereference. This test excercises that path a bit. In my testing it would trigger it every time and easily, but unfortunately a test pass here does not guarantee the absence of the race. v2: Added explicit cancellation point and removed the stop flag. Use only igt_assert(). Signed-off-by: Tvrtko Ursulin Cc: Chris Wilson Signed-off-by: Daniel Vetter commit 3f50598fb7399bafed01f7b44f4a4f5a85a9f13c Author: Daniel Vetter Date: Mon Jul 14 23:02:18 2014 +0200 lib/igt_core: Fixup gtkdoc for logging functions Without the () gtkdoc won't recognize them as function references. Signed-off-by: Daniel Vetter commit bcb2c65a14c37433598404bf4d8c3a8dfc7a842a Author: Damien Lespiau Date: Mon Jul 14 18:01:05 2014 +0100 tests: Move gem_render_copy_redux to the list of multi-subtests tests Can we find a way to fix those for good? My preference goes to not having that single/multi split but always have a test being a list of one or more subtests. Signed-off-by: Damien Lespiau commit 5a98fe9d4ae7431a9c65579dcc0ac32ff3e83adf Author: Daniel Vetter Date: Mon Jul 14 14:42:23 2014 +0200 lib: Add argc/argv to igt_simple_init There's a pile of ideas around to add generally useful options like --debug to all igt tests. Or unify the runtime behaviour between simple and subtest tests a bit more. The first step to get there is to add argc/argv to igt_simple_init so that we can get at the argument list. Cc: Tim Gore Cc: Thomas Wood Signed-off-by: Daniel Vetter commit c7be53c7cb9aa7159ea316b56be119efd436ec17 Author: Tim Gore Date: Fri Jul 11 15:31:39 2014 +0100 intel-gpu-tools: Dont build kms_force_connector if no cairo kms_force_connector is a new test that requires cairo. I have added it to the list of tests not to build on Android unless ANDROID_HAS_CAIRO is set. Signed-off-by: Tim Gore Signed-off-by: Daniel Vetter commit b3d038a2b930724f1e1b45d1b149efa72ab2cbf0 Author: Chris Wilson Date: Mon Jul 14 10:30:36 2014 +0100 igt/gem_userptr_blits: Add missing RAM check before coherency tests -ENOCOFFE. References: https://bugs.freedesktop.org/show_bug.cgi?id=79237 Signed-off-by: Chris Wilson commit 52ac9a4b57f20f2dc019a973237f2f97ddb0ebf3 Author: Chris Wilson Date: Mon Jul 14 10:30:36 2014 +0100 igt/gem_userptr_blits: Add missing RAM check before coherency tests References: https://bugs.freedesktop.org/show_bug.cgi?id=79237 Signed-off-by: Chris Wilson commit e74dd22ff89e007e637f16f661f06d4857a54224 Author: Chris Wilson Date: Sat Jul 12 09:06:39 2014 +0100 igt/gem_close_race: Increase GPU load Increate the GPU load slightly, but mitigate the CPU overhead from clflushing by keeping the object alive using flink. This has also the side-effect of magnifying the desired busy-close race. References: https://bugs.freedesktop.org/show_bug.cgi?id=71029 Signed-off-by: Chris Wilson commit b9c705f4da0b3817462c544e04bead926bfaf75d Author: Chris Wilson Date: Thu Jul 3 11:18:02 2014 +0100 overlay: Baytrail needs a custom GPU frequency parser Signed-off-by: Chris Wilson commit 98165d60bec04d258eeb9623550e58a8bc2f3906 Author: Chris Wilson Date: Fri Jul 11 23:36:15 2014 +0100 igt/gem_close_race: Trim object size The challenge here is to race GPU activity versus the gem_close. Using a large objects makes the window of GPU activity larger - except on !llc systems we then incur massive overhead from clflush, likely destroying any race (due to mutex contention). And that mutex contention is amplified by the number of cores - bad news for Baytrail. Give up and make the objects smaller and hope that the test is run frequently enough to catch the race. References: https://bugs.freedesktop.org/show_bug.cgi?id=71029 Signed-off-by: Chris Wilson commit f796d9958b2b85696b572a4c686c758eb0323c2b Author: Chris Wilson Date: Fri Jul 11 20:38:38 2014 +0100 igt/gem_tiled_swapping: Speed up slightly The exercise is moving tiled objects in and out of swap. They are moved en-block and we test them all, therefore we can randomly test different bytes from each buffer to have reasonable coverage of all tiles. This shifts the bulk of the work from checking the tiled bo to kswapd. Signed-off-by: Chris Wilson commit cfc692232898d435b8fbfc7a69fda382ffc83315 Author: Chris Wilson Date: Fri Jul 11 20:38:30 2014 +0100 configure: Only build overlay if dri2proto is present Instead of making dri2proto mandatory, disable intel-gpu-overlay if it is not installed. Signed-off-by: Chris Wilson commit 8bf115ed9922e435cd26abd55639b089b285c8e0 Author: Daniel Vetter Date: Fri Jul 11 17:41:27 2014 +0200 lib/igt.cocci: Add stanza for for_each_pipe Damien dodged this ... Also run the script while at it. v2: Don't just capture identifiers for pipe, but also expressions. Signed-off-by: Daniel Vetter commit 7bf0f7fc58b524f269981c873ca120dbe1c0ae67 Author: Damien Lespiau Date: Fri Jun 20 00:14:52 2014 +0100 lib: Extract gem_get_tiling() from a couple of tests. Signed-off-by: Damien Lespiau commit 92a2b292df74408c42a3668c9f4d1a3aed194bfc Author: Damien Lespiau Date: Thu Jul 10 18:39:17 2014 +0100 kms_rotation_crc: Use the igt_kms enum to encode the plane rotation Signed-off-by: Damien Lespiau commit a58f8b93b41db4061b3a931feaae2f2c57fb8616 Author: Damien Lespiau Date: Thu Jul 10 18:37:36 2014 +0100 kms_rotation_crc: Remove unnecessary includes Turns out we didn't need most of them. Signed-off-by: Damien Lespiau commit 1a754396673d99d51cd4d5821bee32d5f6425f4c Author: Damien Lespiau Date: Wed Jul 9 14:00:59 2014 +0100 kms_rotation_crc: Always use the primary plane to compute the reference CRC Trying to disable the primary planes isn't exactly working at the moment. W/A it until it works. Signed-off-by: Damien Lespiau commit 282f5605b02a2fc0f1c1547d59e39810962112dd Author: Damien Lespiau Date: Thu Jul 10 17:44:28 2014 +0100 kms_rotation_crc: Document the two steps in prepare_crtc() Signed-off-by: Damien Lespiau commit 05f3897dc183a6ff409e146247e3f681610295cb Author: Damien Lespiau Date: Wed Jul 9 21:24:26 2014 +0100 kms_rotation_crc: Don't compile the test on Android with no cairo support Signed-off-by: Damien Lespiau commit f7a37f02f76521485fc7195b0d46e70fe7b2105e Author: Damien Lespiau Date: Wed Jul 9 21:23:27 2014 +0100 kms_rotation_crc: Add the test to .gitignore Signed-off-by: Damien Lespiau commit 8767a794bb7a1584f02da49b85ecf849d64ff36b Author: Damien Lespiau Date: Wed Jul 9 12:03:50 2014 +0100 kms_rotation_crc: Properly paint the whole frame buffer The -1 meant we weren't properly filling the whole fb. Signed-off-by: Damien Lespiau commit 1bcac4dcb35c7035ecc11ed0ce8d195f4d977dfc Author: Damien Lespiau Date: Tue Jul 8 19:27:39 2014 +0100 kms_rotation_crc: Don't commit with no fb set up prepare_crtc() was trying to commit a display state without any fb to scan out... Signed-off-by: Damien Lespiau commit c4564e0a51dcbe6489dd02853908a8f4cdb6055a Author: Damien Lespiau Date: Tue Jul 8 19:24:24 2014 +0100 kms_rotation_crc: Allow the sprite test to run even without universal planes Signed-off-by: Damien Lespiau commit 2eaa50f02e2cf9b8ed545eee333110cae2c552db Author: Damien Lespiau Date: Tue Jul 8 18:56:15 2014 +0100 kms_rotation_crc: No need to test for NULL before freeing the pipe CRC object igt_pipe_crc_free() does that check already. Signed-off-by: Damien Lespiau commit 05f90b03088f1b66dbfbb29b64aafe6b1ca164ae Author: Damien Lespiau Date: Tue Jul 8 18:51:25 2014 +0100 kms_rotation_crc: Remove plane from the state having everythin in the data_t structure makes it hard to understand what should be set when. Replace that by explicit function parameters. Signed-off-by: Damien Lespiau commit fe8373d4376817de93d9bfc278005f2c67dcba50 Author: Damien Lespiau Date: Tue Jul 8 18:48:35 2014 +0100 kms_rotation_crc: Remove the sleep(2) One can inspect the output of the igt_kms API by setting IGT_DISPLAY_WAIT_AT_COMMIT=1. Signed-off-by: Damien Lespiau commit ffc954e739fb58b3ad4336a42a35c417df875253 Author: Damien Lespiau Date: Tue Jul 8 18:46:57 2014 +0100 kms_rotation_crc: Remove 'output' from the state This restore the balance between prepare_crtc() and cleanup_crtc(), both now taking the output as a parameter. Signed-off-by: Damien Lespiau commit b146e8128d8ca5327f2a8d306e9cdeab855d9639 Author: Damien Lespiau Date: Tue Jul 8 18:45:16 2014 +0100 kms_rotation_crc: Remove the test on output->valid This test is already done by the for_each_connected_output() macro. Signed-off-by: Damien Lespiau commit aef475b6f92522a0ca4bb58047f8015c5fd3f32e Author: Damien Lespiau Date: Tue Jul 8 18:43:44 2014 +0100 kms_rotation_crc: Use for_each_pipe() Signed-off-by: Damien Lespiau commit 8843bef2808acca89222b12c16aa3f09b777c848 Author: Damien Lespiau Date: Tue Jul 8 18:38:05 2014 +0100 kms_rotation_crc: Remove now unnecessary defines Signed-off-by: Damien Lespiau commit 39abe7790f675a7d46cab2e04043b278615c0b0a Author: Damien Lespiau Date: Tue Jul 8 18:36:32 2014 +0100 kms_rotation_crc: Use igt_plane_set_rotation() More code we can remove from the test. Signed-off-by: Damien Lespiau commit 8facccfae4c05275ae2fb31bb1948b1fea9a7687 Author: Damien Lespiau Date: Tue Jul 8 18:28:53 2014 +0100 kms_rotation_crc: Don't store 'pipe' in the state This variable is only needed for prepare_crtc(), need need to put it in the test state. Signed-off-by: Damien Lespiau commit f7250d041d09b5fc83d8c98c3230696317c97cc7 Author: Damien Lespiau Date: Tue Jul 8 18:27:10 2014 +0100 kms_rotation_crc: Don't store rotate in the test state We don't use it anywhere else than the test function. Signed-off-by: Damien Lespiau commit eb81a922c7958e8680c95febca588314129ff790 Author: Damien Lespiau Date: Tue Jul 8 18:20:51 2014 +0100 kms_rotation_crc: Always disable the plane in cleanup There's no need for this check, always use set_fb(NULL) on the plane. Signed-off-by: Damien Lespiau commit 13e979c7649eeb90fbd1abaaec61bcb3028acfc9 Author: Damien Lespiau Date: Tue Jul 8 18:13:47 2014 +0100 kms_rotation_crc: Unify the two tests The only difference is which plane we are talking about. So we really need one function here with a paramater. Well, almost. For the primary plane we need to ensure we support unviversal planes. Signed-off-by: Damien Lespiau commit 063d22ecea7f3ffedb29a037f7b29694f22012ce Author: Damien Lespiau Date: Tue Jul 8 18:06:44 2014 +0100 kms_rotation_crc: Just store the igt_plane_t in data Now that we're always using an igt_plane_t, we can get rid of ->type to use ->directly without those switch() or if()/else Signed-off-by: Damien Lespiau commit 0b3a30ee5a2668897e14c99dac8ba0b2ed7bb94d Author: Damien Lespiau Date: Tue Jul 8 18:01:59 2014 +0100 kms_rotation_crc: Skip the tests if rotation is not supported This happens when the kernel lacks the rotation patches. Signed-off-by: Damien Lespiau commit 5edab97f7fa646639335166912ec443d27735fad Author: Damien Lespiau Date: Tue Jul 8 17:51:07 2014 +0100 kms_rotation_crc: Style issue: binary operators need spaces before and after Signed-off-by: Damien Lespiau commit 7ae5d9b34769581bea037fd35e5110e449cd58de Author: Damien Lespiau Date: Tue Jul 8 17:49:03 2014 +0100 kms_rotation_crc: Use drm_plane from igt_plane_t So we don't need all that extra code to grab the drm_plane structure for the primary_plane. Signed-off-by: Damien Lespiau commit 7e7c6254410c08a2d0785edefac65d158b2c3b6d Author: Damien Lespiau Date: Tue Jul 8 13:59:42 2014 +0100 kms_rotation_crc: Remove useless comments A typical example of what comments shouldn't be: case DRM_PLANE_TYPE_PRIMARY: /* primary */ Well, yes!, it's written just there, PRIMARY! Signed-off-by: Damien Lespiau commit 19743a14357fbc23a0e91d8302ed60a5690530df Author: Damien Lespiau Date: Tue Jul 8 12:59:03 2014 +0100 kms_rotation_crc: Factor out common primary/sprite code in prepare_crtc() This results in less code, always a good thing. Also, we only really need one reference CRC. Signed-off-by: Damien Lespiau commit 92b29b18ca62d1e1cadf338f1b883a49d3e63a01 Author: Damien Lespiau Date: Tue Jul 8 12:49:03 2014 +0100 kms_rotation_crc: Factor out the square drawing function Making function to the similar things is very common in programming. Let's do it once again. Cairo being a drawing library, it can be used to do the rotation! Signed-off-by: Damien Lespiau commit 78fac765238e4b21dd21cf2d105f26955a2f41d8 Author: Damien Lespiau Date: Tue Jul 8 12:28:41 2014 +0100 kms_rotation_crc: Fix style issue: single statement conditionals Signed-off-by: Damien Lespiau commit de9c1687f91b8c24b78ca10edc7166743dca5024 Author: Damien Lespiau Date: Tue Jul 8 12:26:38 2014 +0100 kms_rotation_crc: Fix style issue: '{' at the end of lines Signed-off-by: Damien Lespiau commit 1025a114c6b188dab2680c577288372f5986e0e0 Author: Damien Lespiau Date: Tue Jul 8 12:18:47 2014 +0100 kms_rotation_crc: Require universal planes for the testing primary rotation Otherwise the test will fail instead of just skipping. Signed-off-by: Damien Lespiau commit 143984a4f14ab22b5495411e006644caa7d6cb7a Author: Damien Lespiau Date: Tue Jul 8 12:10:44 2014 +0100 kms_rotation_crc: Test the validity of the output first So we don't need code to unwind what we just did. Signed-off-by: Damien Lespiau commit 9cf7e8d35fb331626a03992f68e9856eafe3997d Author: Damien Lespiau Date: Tue Jul 8 12:08:20 2014 +0100 kms_rotation_crc: Update the copyright to have this year as well Signed-off-by: Damien Lespiau commit bbd5e2ec6c7e9ae7f8eed94305e6640b4c3adc7f Author: Damien Lespiau Date: Tue Jul 8 12:02:42 2014 +0100 kms_rotation_crc: Align a few wrapped lines to the opening brace Signed-off-by: Damien Lespiau commit f00f767ceaa0ee790bbe7dd71d8210fa417483c1 Author: Damien Lespiau Date: Tue Jul 8 11:58:43 2014 +0100 kms_rotation_crc: Make more functions static More of the same. This time no need to move code around, just adding static. Signed-off-by: Damien Lespiau commit 0506f106233552b7b19c89d851f004a5bf236828 Author: Damien Lespiau Date: Tue Jul 8 11:55:20 2014 +0100 kms_rotation_crc: Make check_plane_type() static Clearly, someone tried to solve the following warning: kms_rotation_crc.c:189:6: warning: no previous prototype for ‘check_plane_type’ [-Wmissing-prototypes] Without really understanding what was the warning about. Make check_plane_type() static and move it before its user to get rid of the forward declaration. Signed-off-by: Damien Lespiau commit e3611394cc72540cfa7c8cd39339bd405336ba1f Author: Sonika Jindal Date: Wed Jun 18 14:27:27 2014 +0530 tests/kms_rotation_crc: IGT for 180 degree HW rotation Testcase for 180 degree HW rotation Cc: sagar.a.kamble@intel.com Signed-off-by: Sonika Jindal commit 753352cb3cdd3a2c71c4279913109b2e3e6e9b90 Author: Damien Lespiau Date: Tue Jul 8 18:43:22 2014 +0100 igt_kms: Introduce a for_each_pipe() macro Signed-off-by: Damien Lespiau commit 068efd8d9fc5ae02e928622a989d91b3e9c851d0 Author: Damien Lespiau Date: Tue Jul 8 16:02:05 2014 +0100 igt_kms: Add support for setting plane rotation Signed-off-by: Damien Lespiau commit b2eb48576f2422591fe338e21a46757b2e331985 Author: Damien Lespiau Date: Tue Jul 8 15:23:05 2014 +0100 igt_kms: Add a way to query of the plane supports rotation Signed-off-by: Damien Lespiau commit 143c3a757521de907889803b011ac2bb308b4e1a Author: Damien Lespiau Date: Tue Jul 8 14:56:54 2014 +0100 igt_kms: Provide a get_plane_property() shorthand So one doesn't have to write the plane type all the time. Signed-off-by: Damien Lespiau commit 33842d594044f13d3079d961df2894921be10cc5 Author: Damien Lespiau Date: Tue Jul 8 14:34:16 2014 +0100 igt_kms: Factor out a generic get_property() out of get_drm_plane_type() Signed-off-by: Damien Lespiau commit bebcb582fc40901a2aea4ab43fef3e273ad3b074 Author: Daniel Vetter Date: Fri Jul 11 10:24:30 2014 +0200 lib/igt_core: Don't log when listing subtests I've noticed some spam in the userptr list ... Signed-off-by: Daniel Vetter commit d3cfe28a1a4cc39044dbfd494370a903c39f2649 Author: Thomas Wood Date: Fri Jul 11 10:47:43 2014 +0100 README: update the test run instructions Describe using the new run-tests.sh script and also update the Piglit instructions now that using a symlink is no longer supported. Signed-off-by: Thomas Wood commit ee62ca48e7cf0e2088e40227940677c9d4e675e0 Author: Thomas Wood Date: Tue Jul 1 11:35:16 2014 +0100 scripts: add a script to help run tests with Piglit Add a script to facilitate running the tests with Piglit by providing simplified options for listing, filtering and creating summaries of test runs. Signed-off-by: Thomas Wood commit b81020526f1d08840f9ee87d31e958ddca4cce8a Author: Thomas Wood Date: Wed Jul 9 10:38:05 2014 +0100 lib: allow the edid to be reset Signed-off-by: Thomas Wood commit eef768f283466b6d7cb3f08381f72ccf3951dc99 Author: Thomas Wood Date: Wed Jun 18 14:28:43 2014 +0100 tests: enable extra connectors in kms_flip and kms_pipe_crc_basic Signed-off-by: Thomas Wood commit b6ed9fb0d9a68cd3e07154b80e78e60778a4887b Author: Thomas Wood Date: Wed May 28 14:06:01 2014 +0100 lib: add igt_enable_connectors and igt_reset_connectors igt_enable_connectors forces connectors to be enabled where doing so is known to work well. igt_reset_connectors resets the force state on all connectors. commit 13cd79c128b21d0de7d419d2ebfa8219d6190035 Author: Thomas Wood Date: Tue May 27 14:47:25 2014 +0100 lib: add the ability to set an EDID data block on a connector Add a function to set an EDID data block on a connector and include a set of generic EDID blocks for testing. Signed-off-by: Thomas Wood commit 37ffb22d3cf684a6443d68698716dbd8428f495a Author: Thomas Wood Date: Fri May 16 17:22:46 2014 +0100 lib: add function to change connector states Add an API function and a test program to force a particular state on a connector. v2: mask the correct part of the minor number to get the card number (Chris Wilson) Signed-off-by: Thomas Wood commit 9b6ae3cb6f7894b7c3e9eb89da5d89fef7f9ba91 Author: Chris Wilson Date: Fri Jul 11 10:38:32 2014 +0100 igt/gem_userptr_blits: Verify that userptr bo work on unshared memory If the parent passes a userptr to some private memory, we expect to still be able to use the userptr in the child. Signed-off-by: Chris Wilson commit 9344aa78e8ad1eb36e7cf17686907d4259d34235 Author: Chris Wilson Date: Fri Jul 11 10:16:54 2014 +0100 igt/gem_userptr_blits: Shared memory allocations The forked tests allocate the bo (and thus for userptr, the memory) in the parent and pass them to all children. The difference for userptr is that we allocate system memory which the kernel then copies into each child. As the children need to access the memory for their checks, it does need to be shared - so allocate the userptr from shared memory! Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80208 Signed-off-by: Chris Wilson commit f47ee31dd5d5a5099ed6f5d4a59a12a2f83c8cae Author: Chris Wilson Date: Fri Jul 11 10:15:19 2014 +0100 Wait for any pid in order to reap failure quicker When waiting for the forked tests, we can respond quicker to a failure (such as oom) by waiting for any child to exit rather than waiting for each child in order. Then when we see that a test failed, we can kill all other children before aborting. Signed-off-by: Chris Wilson commit 3777d42303cf9d285a5337d71623d52402cb3021 Author: Daniel Vetter Date: Thu Jul 10 20:19:18 2014 +0200 NEWS: Updates Signed-off-by: Daniel Vetter commit 282482db70188a3cbc653cebbf407715373255d1 Author: Daniel Vetter Date: Thu Jul 10 20:04:19 2014 +0200 tests: Run igt.cocci New stuff caught. Plus manually simplify the massive igt_fail_on_f(file == NULL, ...) to a simple igt_assert(file). We already print the errno (if applicapable) and the condition, which is equally informative. Cc: Yi Sun Cc: Matt Roper Cc: Wendy Wang Signed-off-by: Daniel Vetter commit 329f7a3734331cb57895a675d4fc87c261f338bd Author: Daniel Vetter Date: Thu Jul 10 19:46:46 2014 +0200 drv_module_reload: Unbind the right console driver We want to unbind fbcon, but only fbcon and only if it's there. This was broken by the recent patch in 3.16-rc to kick out the vgacon driver. I've forgotten to push out the relevant fix from the machine used to create the kick vgacon patches. v2: Dropped duplicated /, spotted by Damien. Reported-by: Damien Lespiau Cc: Damien Lespiau Signed-off-by: Daniel Vetter commit 82e3d3379b7204bd81033c96b6279b537186ed85 Author: Damien Lespiau Date: Thu Jul 10 14:03:37 2014 +0100 drv_module_reload: Don't declare success when failing We weren't returning straight away when failing to unload the driver, so the test happilly executed gem_suspend and printed ""module successfully loaded again". Signed-off-by: Damien Lespiau commit e16d4a2d68d163da81397ff7f1e00d063f0d700c Author: Damien Lespiau Date: Wed Jul 9 11:40:16 2014 +0100 core: Apply the same treatment to the in errno message in __igt_fail_assert() Just like the it was done for the requirement message, display the errno message only if errno is set, and display it at the end of the assert message. Reviewed-by: Daniel Vetter Signed-off-by: Damien Lespiau commit 41454622506d2d060cba8c6f1cbe98a359936a2b Author: Damien Lespiau Date: Wed Jul 9 11:36:27 2014 +0100 core: Only display the errno message if errno is set Reviewed-by: Daniel Vetter Signed-off-by: Damien Lespiau commit b2d1a598aba4fe6b4128a0eb99f6da95a9fc70fc Author: Damien Lespiau Date: Wed Jul 9 11:32:22 2014 +0100 core: Put the requirement failure messages together The errno message was a bit in the middle here, it makes more sense to group the messages about why the test requirement wasn't met together. Reviewed-by: Daniel Vetter Signed-off-by: Damien Lespiau commit 1e5570e28a399f57d025c36f9d3547683ba0c3d4 Author: Mika Kuoppala Date: Wed Jun 18 14:34:04 2014 +0300 lib/gen6_render: removed duplicate defines Textually the same so no harm was done and no warnings from compiler either. Signed-off-by: Mika Kuoppala commit 6b986a2044a2708f900454d7e23fcd0bbf68879d Author: Daniel Vetter Date: Wed Jul 9 20:45:54 2014 +0200 tests/gem_render_copy_redux needs legacy drm nodes ... since it uses flink. Fixes a regression due to: commit 6d6dfcfb883818b40b58bac61cc72cab428a7a03 Author: David Herrmann AuthorDate: Sun Mar 16 14:38:40 2014 +0100 drm: enable render-nodes by default Cc: David Herrmann Signed-off-by: Daniel Vetter commit f705ef158ac7448d1f3c48f853da884ac548b603 Author: Tim Gore Date: Tue Jul 8 10:04:28 2014 +0100 intel-gpu-tools: Dont build kms_univeral_plane if no cairo kms_univeral_plane is a new test that requires cairo. I have added it to the list of tests not to build on Android unless ANDROID_HAS_CAIRO is set. Signed-off-by: Tim Gore Signed-off-by: Daniel Vetter commit c5b9615b83910f5a5c19fc84d938ea643f4e3009 Author: Damien Lespiau Date: Wed Jul 9 11:05:06 2014 +0100 kms_plane: Specify the pipe when grabbing reference CRCs When changing the pipe we were using, test_grab_crc() wasn't correctly setting the pipe constraint before waiting for the CRC on the pipe, and so we ended up waiting for a CRC on a pipe that wasn't lit up. Signed-off-by: Damien Lespiau commit 8d60b8267e97f9b04e42912262c170c473d4f061 Author: Damien Lespiau Date: Mon Jul 7 14:41:15 2014 +0100 kms_plane: Add a debug message when grabbing the CRC of a colored fb Signed-off-by: Damien Lespiau commit b5333b416f6a206a583684b0fba9265c0badbd6c Author: Yi Sun Date: Fri May 23 08:28:47 2014 +0800 kms_plane: Add panning test for primary plane Get CRCs of a full red and a full blue surface as reference. Create a big framebuffer that is twice width and twice height as the current display mode. Fill the top left quarter with red, bottom right quarter with blue Check the scanned out image with the CRTC at position (0, 0) of the framebuffer and it should be the same CRC as the full red fb Check the scanned out image with the CRTC at position (hdisplay, vdisplay) and it should be the same CRC as the full blue fb v2: Fix a few things here and there (Damien) Cc: Lei Liu Cc: Yi Sun Signed-off-by: Lei Liu Signed-off-by: Yi Sun Signed-off-by: Damien Lespiau commit de538cfc7cd649216801829daffe602f4efee08a Author: Damien Lespiau Date: Mon Jul 7 13:30:41 2014 +0100 kms_plane: Make the gathering of reference CRCs test agnostic We're going to add tests for panning. Both position and panning tests share the need to grab reference CRCs of single coloured fb, so let's separate this function from the position test. Cc: Lei Liu Cc: Yi Sun Signed-off-by: Damien Lespiau commit 202b2b9567606a016edf8293048ca4d67d9eba4f Author: Damien Lespiau Date: Mon Jul 7 15:17:56 2014 +0100 pipe_crc: Make collect_crc() ensure the CRC looks somewhat valid Signed-off-by: Damien Lespiau commit 09196af60d0e7dc8b06ac78e5998d29bde66b065 Author: Damien Lespiau Date: Mon Jul 7 15:16:51 2014 +0100 pipe_crc: Warn if the CRC values is 0xffffffff This is what we read when the CRC logic in in a powered down well. We really don't want that to happen. In theory, it's possible 0xffffffff to be a valid CRC value, so I don't assert here. Signed-off-by: Damien Lespiau commit 4f83c4efa85bdb1cfadf0e4b44588ec581f2682b Author: Damien Lespiau Date: Mon Jul 7 15:08:33 2014 +0100 lib: Reset 'position_changed' after a drmModeSetCrtc() So the next commit won't trigger a drmModeSetCrtc() if the primary plane doesn't have any update needing it. This shouldn't be a problem at the moment as we don't allow the primary plane to be of a different size than the CRTC viewport, but it will most likely change in the future and we don't want to have that bug there. Signed-off-by: Damien Lespiau commit 089e8d0a6b4b702ada745e948ae4303fd9457389 Author: Damien Lespiau Date: Wed May 28 18:59:09 2014 +0100 kms_pipe_crc_basic: Add a bit a debugging output Signed-off-by: Damien Lespiau commit 017f146c57c381a77bf3295f234744fae67e1a5c Author: Damien Lespiau Date: Wed May 28 17:55:06 2014 +0100 kms_pipe_crc_basic: Make the number of CRCs a parameter Let's make the test a bit more generic and have the number of CRCs we're collecting a define so it can be changed easily. Signed-off-by: Damien Lespiau commit f18700b304cf86c030a2e7721c8f2c189805972f Author: Damien Lespiau Date: Wed May 28 17:40:05 2014 +0100 kms_pipe_crc_basic: Cycle between 2 differently colored buffer Instead of just testing if the CRCs are stable, we also test 2 different fbs to make sure that the CRC is actually changing. Signed-off-by: Damien Lespiau commit dbb80a63b434f544e291a8a3997a511378f3b992 Author: Damien Lespiau Date: Wed May 28 17:33:32 2014 +0100 kms_pipe_crc_basic: Split the main test function a bit more Let's put the per-output test in its own function to get rid of 1 level of indentation. We'll need it to cycle through 2 different framebuffers to make sure we compute different CRCs if the fbs are different. Signed-off-by: Damien Lespiau commit c8b8f8abf60de1fdaafc798ebc6f73880a4e4225 Author: Matt Roper Date: Mon Jul 7 09:08:29 2014 -0700 lib/kms: Provide universal plane #define's There hasn't been a libdrm release containing the universal plane definitions yet, so add them to igt_kms to allow compilation to succeed in the meantime. Signed-off-by: Matt Roper Signed-off-by: Daniel Vetter commit 80a4a4fd43aff81dea8822ab4756ed99b7b13e66 Author: Daniel Vetter Date: Mon Jul 7 17:54:30 2014 +0200 tests/gem_exec_parse: use gem_uses_aliasing_ppgtt Suggested by Brad Volking. Signed-off-by: Daniel Vetter commit d078035ca44dae1ec4e026fc294f4c0213027890 Author: Daniel Vetter Date: Tue Jun 17 23:47:49 2014 +0200 tests/kms_psr_sink_crc: Fix delayed gtt/cpu write tests - Drop the flip from the name - we don't do that. And the blt is really just to have a bit of fun with the domain tracking. - The real test is 1) dirty with gpu 2) grab 1st crc 3) set_domain for cpu access 4) wait a long time 5) dirty more with cpu 6) grab 2nd crc. This fixes failures since with the old tests we wouldn't have noticed the cpu rendering really. Signed-off-by: Daniel Vetter commit 838f321b9ff1ef897ab032ecc3bbb56d8d65f53f Author: Damien Lespiau Date: Thu Jul 3 15:50:53 2014 +0100 kms_universal_plane: Don't assert outside of fixtures/subtests Doing otherwise breaks listing the subtests. The test was throwing an error out when universal planes were disabled as well because of that. Cc: Matt Roper Signed-off-by: Damien Lespiau commit 3f46e815589ac5c0e9ba2d5ab94e7eff09527a8d Author: Matt Roper Date: Mon Jun 30 16:44:30 2014 -0700 tests/kms_cursor_crc: Call drmModeMoveCursor() directly We're calling drmModeSetCursor() to change the cursor image and never actually doing a display commit (aside from when we display the cursor), so call the move ioctl directly rather than igt_plane_set_position() to ensure the changes actually take effect. Signed-off-by: Matt Roper Signed-off-by: Damien Lespiau commit 07087ada293b18823ca10762bc7e28740bb0e6bf Author: Matt Roper Date: Mon Jun 30 16:44:29 2014 -0700 tests/kms_cursor_crc: Combine data_t and test_data_t If a subtest fails, cleanup_crtc() never gets called and then the test_data_t structure for the test is lost, including the CRC file descriptor that we never got a chance to release; this causes all subsequent tests to fail with -EBUSY at igt_pipe_crc_new(). The split between permanent data_t and temporary test_data_t doesn't seem to serve a purpose, so just combine the fields from both into data_t. This will prevent us from losing the CRC filedescriptor so that we can properly close and reopen it after a failed test. Signed-off-by: Matt Roper Signed-off-by: Damien Lespiau commit 075d9eafdb4c1c64099d738a012fe3e063f08fee Author: Matt Roper Date: Mon Jun 30 16:44:28 2014 -0700 tests/kms_universal_plane: Universal plane testing (v6) Add a simple test to exercise universal plane support. v6: - Update to new universal plane interface (commit parameter rather than state-changing function). It should now be a lot more explicit which steps are being taken with legacy API's vs universal API's now. v5: - Check that we don't have more than one primary or cursor. This will catch accidental calls to drm_plane_init() in the kernel where drm_universal_plane_init() was intended (these don't cause a compile warning due to type compatibility between enum and bool). v4: - Test disabling the primary plane explicitly when it has previously been implicitly disabled due to clipping. - Skip test if igt_pipe_crc_new() fails v3: - For testing while crtc is off, switch between several different primary plane fb's before reenabling the crtc. This will help catch pin/unpin mistakes. v2: - Test that pageflips error out gracefully when the primary plane is disabled before the ioctl, or between ioctl and pageflip execution. - Test that nothing blows up if we try to disable the primary plane immediately after a pageflip (presumably before the pageflip actually completes). - Test that we can setup primary + sprite planes with the CRTC off and then have them show up properly when we enable the CRTC (drmModeSetCrtc with fb = -1). - Test that we can modeset properly after having disabled the primary plane - Test that proper error codes are returned for invalid plane programming attempts. Signed-off-by: Matt Roper Signed-off-by: Damien Lespiau commit 04067c3d5029f6ca28e6e14fffa47eecbd0e9c70 Author: Matt Roper Date: Mon Jun 30 16:44:27 2014 -0700 lib/kms: Drop primary plane windowing test from igt_plane_set_position() None of our hardware can support this today, but we'd like to be able to write tests that check that the kernel returns the proper error code when userspace tries it anyway. Signed-off-by: Matt Roper Signed-off-by: Damien Lespiau commit 794a9fd6bc24b0bcc9eb8a9a59c924fd5229f25c Author: Matt Roper Date: Mon Jun 30 16:44:26 2014 -0700 lib/kms: Add universal plane support (v2) Add support for universal planes. This involves revamping the existing plane handling a bit to allow primary & cursor planes to come from the DRM plane list, rather than always being manually added. v2: Don't drop fixed ordering of internal plane list. Primary will always be index 0, cursor will always be last in internal plane list. Signed-off-by: Matt Roper Signed-off-by: Damien Lespiau commit 82bc03f392a12e5d48818faa99b02f9b2ab54483 Author: Matt Roper Date: Mon Jun 30 16:44:25 2014 -0700 lib/kms: Add igt_display_try_commit2() Add a new public API that will attempt a display commit, but will return an error code upon failure rather than failing the IGT test. This is intended to allow igt tests to verify that the expected error codes are returned to userspace when invalid requests are issued. Note that with non-atomic programming, a single commit operation has several potential failure points internally; the first non-zero error code encountered will be returned immediately and no further programming will be performed by the commit. It is the caller's responsibility to return to a sane state. Signed-off-by: Matt Roper Signed-off-by: Damien Lespiau commit 1c25547d48296c3058c9e1cc45b533746144a230 Author: Matt Roper Date: Mon Jun 30 16:44:24 2014 -0700 lib/kms: Add igt_display_commit2() Add a new commit interface, igt_display_commit2(), that allows tests to specify which programming API should be used to perform hardware updates. COMMIT_LEGACY is the only option for now, but universal and atomic interfaces will be added as additional options in the future. igt_display_commit() remains unchanged for existing tests that wish to place the hardware in a specific state, but that don't care which API is used to achieve that state. The legacy API will be used by default for now, but in the future we may decide to make the default API configurable via an environment variable. Signed-off-by: Matt Roper Signed-off-by: Damien Lespiau commit 2a3e212acc01742ac0a0f8bcf969e8a1ae2343b1 Author: Matt Roper Date: Mon Jun 30 16:44:23 2014 -0700 lib/kms: Track need for vblank wait locally The need to wait for a vblank after programming is due to the way we actually program the hardware. Move need_wait_for_vblank out of the pipe and into a local variable in preparation for future programming styles (e.g., atomic pageflip) that will need different logic. Signed-off-by: Matt Roper Signed-off-by: Damien Lespiau commit 3cc60bab465f6d22b64a7034ce75e47dd2163e6e Author: Matt Roper Date: Mon Jun 30 16:44:22 2014 -0700 lib/kms: Drop igt_pipe->need_set_{crtc, cursor} The "need" flags on igt_pipe simply mirror the fb_changed field of the primary/cursor planes. Drop them and just use fb_changed instead. Signed-off-by: Matt Roper Signed-off-by: Damien Lespiau commit 67e29a30d5da57fb6764a23ba9f6aa31ea2c15a8 Author: Jesse Barnes Date: Thu Jun 26 08:47:08 2014 -0700 gem_exec_parse: require PPGTT as well The command parser may be present, but not active, so check for PPGTT before allowing this test to run. Signed-off-by: Jesse Barnes commit 7ef537231a7bcc8deb49119034f9f6d403565ecc Author: Ville Syrjälä Date: Wed Jun 18 21:14:11 2014 +0300 tests/gem_ctx_exec: Add reset-pin-leak subtest Add a subtest to make sure the kernel doesn't leak the vma pin_count for the last context on reset. Signed-off-by: Ville Syrjälä commit fedb9b6342f6fba6f2efa926df1c4af2e8576a2b Author: Chris Wilson Date: Sat Jun 21 15:39:09 2014 +0100 gem_mmap_gtt: Test mmaping less than the full object A bug was recently introduced into the kernel that happened when the vma was smaller than the object. Test that. Signed-off-by: Chris Wilson commit 9f28ba5ef3fbc094f9da3324b79599bb2fe1993e Author: Chris Wilson Date: Sat Jun 21 15:38:31 2014 +0100 gem_fence_upload: Improve the contended messages In the contended upload case, we did not distinguish between linear and tiled uploads. Signed-off-by: Chris Wilson commit 8abca6fd14d2b0e3bf25461199dd8519803f9518 Author: Tim Gore Date: Fri Jun 20 11:28:12 2014 +0100 intel-gpu-tools: add igt_core init func calls to some tests igt-core.h/c provides some macros and initialisation functions to support the tests but some of the single tests do not use these. Modifying these tests to use the igt_simple_main macro and igt_simple_init function is the first step towards a consistent command line across all tests. Signed-off-by: Tim Gore Signed-off-by: Thomas Wood commit 236d6bd2d36114fe402fe0e85d97b14cdf102963 Author: Daniel Vetter Date: Thu Jun 19 10:13:12 2014 +0200 tests/gem_exec_big: Re-add gem_sync We need this to avoid hitting the slowpath and ending up with a presumed_offset == -1. Regression reported by PRTS, bisected to commit eb36fc993d7ae1988c80ba5b767989059c91d0ec Author: Chris Wilson AuthorDate: Mon Jun 16 10:49:16 2014 +0100 Commit: Chris Wilson CommitDate: Mon Jun 16 10:51:02 2014 +0100 igt/gem_exec_big: Update to new igt_assert_eq Use igt_assert_eq for better test output on failures. Signed-off-by: Chris Wilson v2: igt_warn_on unexpected reloc offsets. Cc: shuang.he@intel.com Acked-by: Chris Wilson (on irc) Signed-off-by: Daniel Vetter commit 1b1f4b16a25b6415187fd2b0906ae730e9ca8d23 Author: Daniel Vetter Date: Tue Jun 17 23:06:59 2014 +0200 tests/gem_mmap: Add short mmap test Blows up with the current full-object prefault code. Signed-off-by: Daniel Vetter commit 13b3e5f3e02a82e5d064e1f4f52eebb91c380819 Author: Daniel Vetter Date: Tue Jun 17 21:22:05 2014 +0200 Paritially revert "lib: add missing includes to headers" This reinstates the #includes for lib/debug.h since without that the shader debugger fails to build. You need to manually enable it with ./autogen.sh --enable-shader-debugger and the fail only happens when running a clean build with $ git clean -dfx && ./autogen.sh --enable-shader-debugger && make I have no idea what breaks, but this restores the build. Reported by Ben Widawsky. Signed-off-by: Daniel Vetter commit 15d93d0a91234e33c4e40b72204258ffbcb2fe4c Author: Daniel Vetter Date: Tue Jun 17 18:52:08 2014 +0200 tests: Move gem_userptr_blits to the right Makefile target We need to be able to check for this somehow ... Signed-off-by: Daniel Vetter commit d123de68587ef1c558bb9be7a1fd980cba58d748 Author: Daniel Vetter Date: Wed Apr 30 18:15:36 2014 +0200 tests/Makefile.sources: Remove empty last line Actually just whitespace change to make sure the new built rules for tests/*.txt pick up the changes properly everywhere. Signed-off-by: Daniel Vetter commit 748a46dcb994c8c97d32faecc1df7e03c9ec7960 Author: Wendy Wang Date: Mon Jun 9 16:36:47 2014 +0800 Fixed the review issues for pm_rc6_residency IGT case Why need add rc6_residency_counter subtest case: RC6 feature support residency counter,from power consumption aspect, the counter closer to 1,the better.If the counter is < 0.9, the residency is not good and will impact power consumption value, if the counter is > 1, sysfs file is inaccurate. Attach the test result message: root@x-bdw05:/GFX/Test/Intel_gpu_tools/intel-gpu-tools/tests# ./pm_rc6_residency IGT-Version: 1.6-g9a70e29 (x86_64) (Linux: 3.15.0-rc7_drm-intel-nightly_0a37b5_20140604+ x86_64) Subtest rc6-residency-check: SUCCESS This machine doesn't support rc6pp This machine doesn't support rc6p The residency counter : 0.987000 This machine entry rc6 state. Subtest rc6-residency-counter: SUCCESS root@x-bdw05:/GFX/Test/Intel_gpu_tools/intel-gpu-tools/tests# ./pm_rc6_residency --run-subtest rc6-residency-counter IGT-Version: 1.6-g9a70e29 (x86_64) (Linux: 3.15.0-rc7_drm-intel-nightly_0a37b5_20140604+ x86_64) This machine doesn't support rc6pp This machine doesn't support rc6p The residency counter : 0.987000 This machine entry rc6 state. Subtest rc6-residency-counter: SUCCESS root@x-bdw05:/GFX/Test/Intel_gpu_tools/intel-gpu-tools/tests# ./pm_rc6_residency --run-subtest rc6-residency-check IGT-Version: 1.6-g9a70e29 (x86_64) (Linux: 3.15.0-rc7_drm-intel-nightly_0a37b5_20140604+ x86_64) Subtest rc6-residency-check: SUCCESS root@x-bdw05:/GFX/Test/Intel_gpu_tools/intel-gpu-tools/tests# ./pm_rc6_residency --list rc6-residency-check rc6-residency-counter Run as non-root [haha@x-pk home]$ ./pm_rc6_residency IGT-Version: 1.6-g18d2130 (x86_64) (Linux: 3.13.0-rc3_drm-intel-nightly_639e4d_20131210+ x86_64) No intel gpu found Subtest rc6-residency-check: SKIP Subtest rc6-residency-counter: SKIP Run on non-intel platform [root@x-pk5 home]# ./pm_rc6_residency IGT-Version: 1.6-g18d2130 (x86_64) (Linux: 3.13.0-rc3_drm-intel-nightly_639e4d_20131210+ x86_64) Test requirement not met in function read_rc6_residency, file pm_rc6_residency.c:77: Last errno: 2, No such file or directory Test requirement: (!(file)) Subtest rc6-residency-check: SKIP Subtest rc6-residency-counter: SKIP Signed-off-by: Wendy Wang Signed-off-by: Daniel Vetter commit f4a7bd3b03418c140b7de76d1f35ea553a735e33 Author: Daniel Vetter Date: Mon Jun 16 23:54:43 2014 +0200 Revert "Revert "Add rc6_residency_counter subtest"" This reverts commit 35554a1bcaaea55c1cfa88c0176c58d2fb3b8013. Apparently people are too unhappy with this. Signed-off-by: Daniel Vetter commit d96490af9955875d2ca1a04219d5ef928fb07c94 Author: Thomas Wood Date: Mon Jun 16 16:21:35 2014 +0100 lib: add missing includes to headers Signed-off-by: Thomas Wood Signed-off-by: Daniel Vetter commit 5874daddc4976ba3756b6e37466a0205b2359048 Author: Thomas Wood Date: Mon Jun 16 16:12:21 2014 +0100 lib: ensure igt_display_init clears the memory for the display struct Add the call to memset that was accidentally removed in: commit 1e9e1baba389fe498be12390ceeeacb1d141a5cf Author: Daniel Vetter Date: Thu Mar 13 17:20:05 2014 +0100 lib/igt_kms: rip out custom verbose loggin support Instead just piggy-pack on top of igt_log. Signed-off-by: Daniel Vetter Signed-off-by: Thomas Wood Signed-off-by: Daniel Vetter commit 5f89d6f41fd5c4f6a1cd3b6da708b99a8efe8e64 Author: Tim Gore Date: Mon Jun 16 09:38:09 2014 +0100 intel-gpu-tools: remove the --cmd option from gem_seqno_wrap gem_seqno_wrap was not being built on Android because it uses wordexp which is not in Bionic. After discussion with Mika Kuoppala (the test author) it seems that wordexp was used to implement the --cmd option that was really only intended for use during development of the test and is no longer needed. So I have removed support for this option and enabled this test for Android. Signed-off-by: Tim Gore Reviewed-by: Mika Kuoppala [danvet: Resolve conflicts with cocci run.] Signed-off-by: Daniel Vetter commit eb36fc993d7ae1988c80ba5b767989059c91d0ec Author: Chris Wilson Date: Mon Jun 16 10:49:16 2014 +0100 igt/gem_exec_big: Update to new igt_assert_eq Use igt_assert_eq for better test output on failures. Signed-off-by: Chris Wilson commit 6c4b93fdbc879f95a9843f0ad7a959265b6783f1 Author: Chris Wilson Date: Mon Jun 16 09:01:52 2014 +0100 igt/gem_exec_parse: Convert to igt_assert_eq For better test output on failure. References: https://bugs.freedesktop.org/show_bug.cgi?id=80083 Signed-off-by: Chris Wilson commit 8c1566e2d9cdcdaa94728516b8e6839545fc396c Author: Ville Syrjälä Date: Tue Oct 29 18:17:39 2013 +0200 tools/intel_display_poller: Add a new tool that will poll various display registers intel_poller can be used to poll various display registers (IIR,scanline/pixel/flip/frame counter, live address, etc.). It can be used to determine eg. at which scanline or pixel count certain events occur. v2: s/intel_poller/intel_display_poller/ Signed-off-by: Ville Syrjälä commit 71874f4a52878caabe5c2ccd499bab41633fa156 Author: Ville Syrjälä Date: Tue Jun 10 21:28:10 2014 +0300 tools: Add intel_iosf_sb_{read,write} tools Add generic tools to poke at IOSF sideband. The user needs to manually specify SB port as well as the register. TODO: Maybe add symbolic names for the units? Would avoid having to trawl the docs for the magic hex value. Signed-off-by: Ville Syrjälä commit a49906e26616c405d41631d5e1b0be0a366d2c30 Author: Ville Syrjälä Date: Wed Jun 11 19:21:27 2014 +0300 lib/igt_debufs: Add IGT_NO_FORCEWAKE environment variable If IGT_NO_FORCEWAKE is set, skip the forcewake open. Useful when you want to poke at register without otherwise disturbing the GPU. Signed-off-by: Ville Syrjälä commit aba3582bb402b5cb5e48d81c5e32231fa42634d7 Author: Ville Syrjälä Date: Wed Jun 11 19:20:19 2014 +0300 lib/igt_debugfs: Don't fail if debugfs is already mounted Remove the igt_assert() from the debugfs mount. It will fail if debugfs is already mounted. With the assert in place it's very annying to use igt without i915 loaded (eg. to dump BIOS configured registers). Signed-off-by: Ville Syrjälä commit c9c554594ef074b9149f84da8fb42c9ea629c027 Author: Daniel Vetter Date: Fri Jun 13 18:27:59 2014 +0200 tests: run igt.cocci Re-run with correct igt_fail rules. Again manually fixup missing includes for igt_core.h. Signed-off-by: Daniel Vetter commit 87042d671fba3c76786171a8037515979e977d9d Author: Daniel Vetter Date: Fri Jun 13 16:23:10 2014 +0200 NEWS: Mention igt.cocci And also pimp the spatch file itself with usage hints. Signed-off-by: Daniel Vetter commit 2347e6d21eb1431479358955007a4c78430173d8 Author: Daniel Vetter Date: Fri Jun 13 18:01:33 2014 +0200 lib: Introduce igt_fail_on/_f I've yet again totally screwed things up (this time automated with cocci even, but not yet pushed luckily). So finally add a new version for easier conversion and adjust the cocci script. Signed-off-by: Daniel Vetter commit 46811c849a79892f6d0a63ae5425e59989244978 Author: Daniel Vetter Date: Fri Jun 13 15:45:30 2014 +0200 lib/igt.cocci: Also add rule to use igt_warn_on_f Signed-off-by: Daniel Vetter commit 9eb9345f9949f26bd4a5cae33a10809c5d05fe21 Author: Daniel Vetter Date: Fri Jun 13 15:45:12 2014 +0200 lib/igt.cocci: Convert abort() to igt_fail abort should only be used for internal library checks - using abort() we get a "crash" result, using igt_fail we get "fail" in piglit. Signed-off-by: Daniel Vetter commit bde52d1a08a7aeb9afe1e6cf642ba764674059da Author: Daniel Vetter Date: Fri Jun 13 15:41:28 2014 +0200 lib/igt.cocci: Conversion to igt logging Also update old hunks to match on igt logging instead of fprintf. v2: Don't forget about perror. Signed-off-by: Daniel Vetter commit 6b73a9a2887fb45fc43b75c918daf0b50d2a44b9 Author: Daniel Vetter Date: Fri Jun 13 15:32:50 2014 +0200 tests: Don't use stderr for informational messages These should go to stdout instead. The next patch will clean this up with cocci, so no change from fprintf(stdout, to printf( here. Signed-off-by: Daniel Vetter commit 652e5441504ddded9d6b138cd6df3447ed9b2e74 Author: Daniel Vetter Date: Fri Jun 13 15:19:09 2014 +0200 tests/pm_psr_sink_crc: Fix longjmp fun igt_fixture and igt_subtests use longjmp/setjmp internally, which means local variables at the same stack frame are at risk. Best practice is to move them out right in front of the igt_main block. It would be awesome if someone could come up with a cocci patch to auto-fix this, but unfortunately my attempts failed. Signed-off-by: Daniel Vetter commit ac0e606677823d27836708300a2c5ee05d24b458 Author: Daniel Vetter Date: Fri Jun 13 18:03:50 2014 +0200 Revert "tests: Run igt.cocci over tests" This reverts commit 6903ab04e5f9048e3932eb3225e94b6a228681ba. The igt_assert conversion rule is broken and doesn't invert the check as it should. Signed-off-by: Daniel Vetter commit bfede4ed2b401069c3130399ff5c2580e6ccbf77 Author: Chris Wilson Date: Fri Jun 13 15:46:33 2014 +0100 igt/gem_fence_upload: Exercise contention on the fault handler Signed-off-by: Chris Wilson commit 6903ab04e5f9048e3932eb3225e94b6a228681ba Author: Daniel Vetter Date: Fri Jun 13 11:06:18 2014 +0200 tests: Run igt.cocci over tests Cocci is awesome Signed-off-by: Daniel Vetter commit 66b31b6e196bdb869a7bd3e29d86dd9712606601 Author: Daniel Vetter Date: Fri Jun 13 11:16:28 2014 +0200 lib: add igt.cocci Small start but useful to collect refactorings/simplifications for common igt patterns. Please add more if you stumble over some so that we can occasionally run this to clean up the tests. I haven't figured out yet how to do the assert_cmpint->assert_eq transformation. Run this with spatch --sp-file lib/igt.cocci --in-place tests/*.c Signed-off-by: Daniel Vetter commit 3448b5ad4b2536c1eca3ecc5060739ea8dbec1e5 Author: Daniel Vetter Date: Fri Jun 13 10:46:55 2014 +0200 lib/igt_core: Add igt_assert_eq Suggested by Chris Wilson. Not yet rolled out since I'm trying to use cocci for this. Signed-off-by: Daniel Vetter commit b4c1f2ea0fc3fc3e361c26a83dc9468682a3c8e0 Author: Daniel Vetter Date: Fri Jun 13 10:23:01 2014 +0200 tests/prime_self_import: Use igt_assert_cmpint Signed-off-by: Daniel Vetter commit ea0116cdcd36f208ff7b5312e7684db85f395de3 Author: Daniel Vetter Date: Fri Jun 13 10:18:24 2014 +0200 tests/kms_psr_sink_crc: Skip properly Aside: The test has way too many bool return values that are then always checked with igt_assert. Imo cleaner to switch to a more declarative approach and shovel the igt_assert/require into those functions instead. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79962 Signed-off-by: Daniel Vetter commit c1192c4db48f4329a97d2e72dd8d97920164c63a Author: Chris Wilson Date: Thu Jun 12 17:01:02 2014 +0100 igt/gem_fence_upload: Throw some threads into the mix Signed-off-by: Chris Wilson commit d242f2e2a31fdc9887cc34cda0eeb92f7dc70d20 Author: Chris Wilson Date: Thu Jun 12 11:50:01 2014 +0100 igt/gem_mmap_gtt: Exercise concurrent pagefaulting This should hit the BUG inside remap_pfn_range in commit c5158fabeaf53ed2c614c3333aaa4b3cce80f500 Author: Chris Wilson Date: Tue Jun 10 12:14:41 2014 +0100 [ 27.767634] kernel BUG at mm/memory.c:2315! [ 27.767655] invalid opcode: 0000 [#1] SMP [ 27.767679] Modules linked in: cpufreq_userspace cpufreq_powersave cpufreq_stats cpufreq_conservative binfmt_misc nfs lockd fscache sunrpc hid_generic usbhid hid x86_pkg_temp_thermal microcode i2c_i801 lpc_ich mfd_core battery acpi_cpufreq evdev processor ac loop ehci_pci xhci_hcd ehci_hcd sr_mod usbcore cdrom usb_common fan thermal [ 27.767872] CPU: 3 PID: 912 Comm: gem_mmap_gtt Not tainted 3.15.0-rc8+ #953 [ 27.767903] Hardware name: Intel Corporation Shark Bay Client platform/Flathead Creek Crb, BIOS HSWLPTU1.86C.0109.R03.1301282055 01/28/2013 [ 27.767956] task: ffff880448415010 ti: ffff88044d22c000 task.ti: ffff88044d22c000 [ 27.767988] RIP: 0010:[] [] remap_pfn_range+0x2a4/0x400 [ 27.768033] RSP: 0000:ffff88044d22fc28 EFLAGS: 00010282 [ 27.768057] RAX: 0000000000020002 RBX: 00000000000a3b57 RCX: ffff880448b73fe8 [ 27.768088] RDX: 0000000000000002 RSI: ffff880000000000 RDI: ffffea000efe8158 [ 27.768119] RBP: ffff88044d22fcd8 R08: 00007fc7b57fe000 R09: 00007fc7b57fe000 [ 27.768150] R10: 00000000000001fd R11: 0000000000000a9a R12: ffffea000efe8128 [ 27.768180] R13: 0000000000000001 R14: 00007fc7b57fd000 R15: 800000000000002f [ 27.768212] FS: 00007fc7977fc700(0000) GS:ffff88045e380000(0000) knlGS:0000000000000000 [ 27.768246] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 27.768272] CR2: 00007fc7b67fd000 CR3: 000000044866c000 CR4: 00000000001407e0 [ 27.768303] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 [ 27.768333] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 [ 27.768363] Stack: [ 27.768374] ffff880448bbb6f8 00000000ffffffff 00007fc7b57fdfff 00007fc7b57fdfff [ 27.768414] 00007fc7b57fe000 ffff88044866c7f8 ffff8804496b08f0 00007fc7b57fdfff [ 27.768454] fffffff8038ee35a 0000000000001000 ffff88044c208180 00007fc7b57fe000 [ 27.768494] Call Trace: [ 27.768511] [] i915_gem_fault+0x337/0x340 [ 27.768538] [] __do_fault+0x34/0x70 [ 27.768565] [] ? wake_up_process+0x1e/0x40 [ 27.768592] [] do_shared_fault.isra.96+0x2c/0x1f0 [ 27.768623] [] ? rwsem_down_read_failed+0xe5/0x130 [ 27.768654] [] ? __rwsem_do_wake+0x129/0x160 [ 27.768682] [] handle_mm_fault+0x2b5/0xb80 [ 27.768712] [] ? call_rwsem_down_read_failed+0x14/0x30 [ 27.768745] [] __do_page_fault+0x167/0x4c0 [ 27.768774] [] ? pick_next_task_fair+0x700/0x870 [ 27.768804] [] ? __schedule+0x27b/0x860 [ 27.768831] [] do_page_fault+0xc/0x10 [ 27.768857] [] page_fault+0x22/0x30 [ 27.768881] Code: 4d 85 ed 49 0f 44 d7 80 cc 02 49 81 c6 00 10 00 00 48 83 c3 01 48 83 c1 08 48 09 d0 48 89 41 f8 4d 39 f0 74 32 48 83 39 00 74 c4 <0f> 0b 66 2e 0f 1f 84 00 00 00 00 00 48 39 37 75 63 48 8b 45 c8 [ 27.769081] RIP [] remap_pfn_range+0x2a4/0x400 [ 27.769113] RSP Signed-off-by: Chris Wilson commit 8a23da43d4eb502375620b53d11d36797447a309 Author: Thomas Wood Date: Wed Jun 11 17:13:39 2014 +0100 docs: remove unused annotation glossary include API annotations are not used anywhere in the documentation, so the annotation glossary is not built. Signed-off-by: Thomas Wood commit cd714f93e833284b1710e58d21240a3e21adec2a Author: Thomas Wood Date: Wed Jun 11 15:32:14 2014 +0100 docs: always rebuild the sections file Always rebuild the sections file since it currently doesn't contain any custom modifications. Signed-off-by: Thomas Wood commit bbd014e1632f4e906bb9c2386174eca8fa263bac Author: Thomas Wood Date: Wed Jun 11 11:46:39 2014 +0100 docs: add private headers to IGNORE_HFILES Signed-off-by: Thomas Wood commit 52a3a2e205da1679487a99699713dee240437255 Author: Thomas Wood Date: Mon Jun 9 17:23:21 2014 +0100 lib: various documentation fixes Fix some documentation comments and mark some struct members private. Signed-off-by: Thomas Wood commit 25663d9fe3d6e762132022e1af651a99f9b928a3 Author: Thomas Wood Date: Mon Jun 9 14:45:44 2014 +0100 gitignore: add missing files and keep lists sorted Signed-off-by: Thomas Wood commit 3dd7ad14d3322a727365745e94cbe46975acc423 Author: Thomas Wood Date: Mon Jun 9 14:05:42 2014 +0100 README: update the section on modifying and rebuilding documentation Signed-off-by: Thomas Wood commit 1e5c8780d03f78c17963108896354296f7313c61 Author: Thomas Wood Date: Mon Jun 9 14:02:04 2014 +0100 lib: remove /** from comments that are not API documentation These comments are not gtk-doc comments, so replacing /** with /* prevents any gtk-doc warnings. Signed-off-by: Thomas Wood commit 6d28f6a91a7a6db36a58e1fa81ef6d8358104b26 Author: Thomas Wood Date: Mon Jun 9 13:35:21 2014 +0100 README: update piglit instructions Piglit now has a top level "piglit" command and the location of the tests can now be read from an environment variable. Signed-off-by: Thomas Wood commit c54ee9819a4aa9ba521f67e4a58ea2de87dc7485 Author: Thomas Wood Date: Fri Jun 6 15:28:50 2014 +0100 quick_dump: read the architecture files for items to add to EXTRA_DIST Each architecture file contains a list of the text files it requires, so use this to add to the list of files to distribute. Signed-off-by: Thomas Wood commit e10c9a730d840d4e1867374e41a58f97d6086371 Author: Daniel Vetter Date: Thu Jun 12 09:05:55 2014 +0200 tests/gem_fence_upload: Fix test wrapper - tests with subtests need to be in the _M target for correct enumeration. - No need for igt_exit when using the igt_(simple_)main wrappers. Signed-off-by: Daniel Vetter commit 618aca1fb9649012910acbaa79a917ff4f3ff19b Author: Daniel Vetter Date: Thu Jun 12 09:04:20 2014 +0200 lib/intel_os: Spelling fix Signed-off-by: Daniel Vetter commit c62ce339f2d57e4be632d9bcea785ff087326bd9 Author: Chris Wilson Date: Mon Feb 3 15:52:00 2014 +0000 tests: add gem_fence_upload This test demonstrates the performance cliff clients face when they unwittingly use too many fenced surfaces in a looped upload. Signed-off-by: Chris Wilson commit 27d37a1f1034630a62bfbbb0235db1b0bcea98ac Author: Rodrigo Vivi Date: Wed Mar 19 22:43:51 2014 -0300 tests/kms_psr_sink_crc: Create test to test PSR by checking panel CRC. v2: Wait psr enable with timeout and more subtest added. v3: Add wait for v_blank leeting test more reliable and preparing to add Baytrail per-pipe tests. v4: Call busy_ioctl on mmap_gtt to match the real usage and remove the need of inactivate on set_domain, what was semantically wrong. v5: Adding more test cases to cover mmap_gtt with and without followed by busy ioctl and also without busy and waiting 10 seconds between set_domain and actual write. v6: rebase after kms_plane added and debugfs api changed. Plus adding more test cases. v7: Some rework and sprite test added Signed-off-by: Rodrigo Vivi commit 8c4dd1d898aa8ff9cea63d574be575a8f9325ff7 Author: Damien Lespiau Date: Fri May 31 15:33:21 2013 +0100 list-workarounds/chv: Add Cherryview to the list of valid platorms Signed-off-by: Damien Lespiau commit 35554a1bcaaea55c1cfa88c0176c58d2fb3b8013 Author: Daniel Vetter Date: Tue Jun 10 11:05:16 2014 +0200 Revert "Add rc6_residency_counter subtest" This reverts commit 9a70e29f8380c2fc6f9b43757c68e24bf2619061. Patch needs polish and after a quick irc discussion Ben&I agreed that the revert is in order. Signed-off-by: Daniel Vetter commit 4e9df4fe5fef283c23e62fd7348fae4943a9fa6b Author: Ville Syrjälä Date: Tue Jun 10 14:51:44 2014 +0300 tests/kms_fbc_crc: Update blit code for BDW Switch to XY_COLOR_BLT from COLOR_BLT and use the appropriate macros to make the code work on BDW. Also make the blit 8bpp instead if 16bpp. 8bpp is what it was supposed to use all along. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76307 Signed-off-by: Ville Syrjälä commit 210d20f413626321c0c1650b97d1cb0f0b400c2d Author: Chris Wilson Date: Tue Jun 10 14:29:00 2014 +0100 API docs for intel_check_memory() Signed-off-by: Chris Wilson commit 0617b0b3b897f7a070466af400da55e2b234e9be Author: Daniel Vetter Date: Tue Jun 10 08:18:37 2014 +0200 NEWS: post-release bump commit 32bb5d9f150bc953dbed4636ded2758be03a739c Author: Rodrigo Vivi Date: Mon Jun 9 11:30:15 2014 -0700 bump version to 1.7 and add the release date Signed-off-by: Rodrigo Vivi commit 82ad15fd1040a0457ebe22edabfaa69c44577412 Author: Rodrigo Vivi Date: Mon Jun 9 11:15:47 2014 -0700 Fix make distclean by fixing includes of version.h Actually only the igt_core was breaking the make distcheck, but let's make it consistent and let the code cleaner. Credits-to: Reviewed-by: Ben Widawsky Signed-off-by: Rodrigo Vivi commit 5a856e11fc84ec9e087aa1c52a492eb81b2c1985 Author: Rodrigo Vivi Date: Mon Jun 9 10:48:10 2014 -0700 null_state_gen: Fix Makefile.am for make distcheck commit 9bddb5eebd9819c4892fec72d6d5b6e2e2496b8b Author: Rodrigo Vivi Date: Mon Jun 9 10:47:13 2014 -0700 quick_dump: Fix vlv file names on Makefile.am commit 18d2130110331e45423dff96aeec3ea802fa0857 Author: Chris Wilson Date: Fri Jun 6 08:43:08 2014 +0100 igt/gem_evict_alignment: Fix the memory limits checking We actually allocate twice as many bo as needed to fill the aperture to cause ENOSPC, but the entire payload has to still fit into RAM. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75138 Signed-off-by: Chris Wilson commit 39329479a51768e64cf710bc14b50803446e554d Author: Chris Wilson Date: Fri Jun 6 08:43:08 2014 +0100 igt/gem_evict_alignment: Fix the memory limits checking Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75138 Signed-off-by: Chris Wilson commit 033c400e9bd53f95cccff3524c79a298c81bd3da Author: Chris Wilson Date: Fri Jun 6 08:40:36 2014 +0100 igt/gem_evict_alignment: Remove obsolete skip on gen8+ If the BLT commands, aren't fixed yet, they should be. ASAP. Signed-off-by: Chris Wilson commit 9a70e29f8380c2fc6f9b43757c68e24bf2619061 Author: Wendy Wang Date: Thu Jun 5 10:27:42 2014 +0800 Add rc6_residency_counter subtest Move rc6_residency_check to subtest, add new rc6_residency_counter subtest for pm_rc6_residency IGT case. Test results run on platforms show as below: On HSW --------------------------------------- [root@x-hswu opt]# ./pm_rc6_residency IGT-Version: 1.6-g35b31df (x86_64) (Linux: 3.15.0-rc3_drm-intel-nightly_0791a3_20140520+ x86_64) Subtest rc6-residency-check: SUCCESS This machine doesn't support rc6pp This machine doesn't support rc6p This machine entry rc6 status. The residency counter : 0.999667 Subtest rc6-residency-counter: SUCCESS On IVB ---------------------------------------- [root@IVB tests]# ./pm_rc6_residency IGT-Version: 1.6-g35b31df (x86_64) (Linux: 3.13.6_20140318+ x86_64) Subtest rc6-residency-check: SUCCESS This machine entry rc6p status. The residency counter : 0.997000 Subtest rc6-residency-counter: SUCCESS On BYT ---------------------------------------- root@x-byt:/opt# ./pm_rc6_residency IGT-Version: 1.6-g0d39021 (x86_64) (Linux: 3.14.0_kcloud_ceabbb_20140521+ x86_64) Subtest rc6-residency-check: SUCCESS This machine doesn't support rc6pp This machine doesn't support rc6p The residency counter : 1.144333 Test assertion failure function rc6_residency_counter, file pm_rc6_residency.c:131: Last errno: 0, Success Failed assertion: counter_result <=1 Debug files must be wrong, Subtest rc6-residency-counter: FAIL On BDW --------------------------------------- [root@x-bdw01 opt]# ./pm_rc6_residency IGT-Version: 1.6-g0d39021 (x86_64) (Linux: 3.15.0-rc5_drm-intel-nightly_367653_20140521+ x86_64) Subtest rc6-residency-check: SUCCESS This machine doesn't support rc6pp This machine doesn't support rc6p The residency counter : 0.994333 This machine entry rc6 state. Subtest rc6-residency-counter: SUCCESS Signed-off-by: Liu, Lei A Signed-off-by: Wendy Wang Signed-off-by: Ben Widawsky commit b428f24f7caa1286cdcf0794078547f3b27e69b3 Author: Chris Wilson Date: Thu Jun 5 13:33:25 2014 +0100 lib: Add debug to memory limits checks Signed-off-by: Chris Wilson commit a1a8aa16fb4e27a267f4ac12883419114a020dd7 Author: Chris Wilson Date: Thu Jun 5 13:19:39 2014 +0100 igt/gem_evict_everything: Compute number of surfaces to saturate the aperture The goal is to only fill the aperture, not all of memory, so fine-tune the computed number of surfaces, hopefully avoiding an integer overflow in the process. References: https://bugs.freedesktop.org/show_bug.cgi?id=79573 Signed-off-by: Chris Wilson commit 5141b21f915ce7e857bcacbd1eb4ec9eebf3fe93 Author: Daniel Vetter Date: Thu Jun 5 10:28:09 2014 +0200 lib/igt_debugfs: Fix spelling docs Signed-off-by: Daniel Vetter commit badb026ae0943d401a944d0d0fc09a7977315fe5 Author: Kenneth Graunke Date: Tue Jun 3 14:52:30 2014 -0700 rendercopy/gen8: Also emit 3DSTATE_WM_DEPTH_STENCIL. rendercopy was failing to emit 3DSTATE_WM_DEPTH_STENCIL, which is a new packet on Broadwell. Mesa emits this packet. This appears to fix various tests on a fresh boot, when Mesa has never run. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78890 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78891 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78935 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78936 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78937 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78938 Signed-off-by: Kenneth Graunke Reviewed-by: Ben Widawsky Tested-by: Guo Jinxian Signed-off-by: Ben Widawsky commit 11e62a3927e415f88dae3519578d9bba8def3128 Author: Ville Syrjälä Date: Wed May 28 20:05:59 2014 +0300 tests/kms_flip: Move EBUSY to a new busy-flip subtest The EBUSY checking is very fragile currently in case there's any kind extra delay in the test loop. At least the flip-vs-rmfb fails reliably on my IVB. So to make the test less fragile remove the EBUSY check from all the current flip tests, and instead add a specific busy-flip test. To better guarantee that we get the EBUSY add a blocking vblank wait just before we issue the first flip. This maximizes the time we have to submit two flips during one frame. Reviewed-by: Daniel Vetter Signed-off-by: Ville Syrjälä commit ddf92db9147375a4d0fc3ee861519bc1d6b0214b Author: Tim Gore Date: Wed Jun 4 09:32:54 2014 +0100 intel-gpu-tools: move kms_fence_pin_leak to single test list In Makefile.sources, kms_fence_pin_leak was in the "Multi" test list, ie tests with subtests, whereas it is actually simple/single test. This was confusing the Android script for enumerating tests. Signed-off-by: Tim Gore Signed-off-by: Daniel Vetter commit 1451df1cb692bf04e5733b5d9ea00d0757f257a4 Author: Imre Deak Date: Tue Jun 3 16:52:48 2014 +0300 quick_dump: increase reg name column width Needed by the new long audio register names. Signed-off-by: Imre Deak Reviewed-by: Ville Syrjälä commit ea43f5163a01d9bb2b7fd23dd6316c9f863ded86 Author: Imre Deak Date: Tue Jun 3 16:04:47 2014 +0300 quick_dump: vlv: remove redundant base file specifications The registers in these files are included in the dumps for all platforms by default, so no need to specify them explicitly. Signed-off-by: Imre Deak Reviewed-by: Ville Syrjälä commit 24cd3843cb222cc17f446315b0bce813a14758c8 Author: Imre Deak Date: Tue Jun 3 15:44:27 2014 +0300 quick_dump: vlv: move flisdsi register group to its logical place Signed-off-by: Imre Deak Reviewed-by: Ville Syrjälä commit 75b921688d0105743ef14783eed4ceda9d01baeb Author: Imre Deak Date: Tue Jun 3 15:55:11 2014 +0300 quick_dump: vlv: add missing dpio phy registers Also move the phy register block to its logical place. Signed-off-by: Imre Deak Reviewed-by: Ville Syrjälä commit 9da08fed032a8560959ff306cd862d44f26ed46f Author: Imre Deak Date: Tue Jun 3 14:26:30 2014 +0300 quick_dump: vlv: add missing display registers Signed-off-by: Imre Deak Reviewed-by: Ville Syrjälä commit 92378d3b778c408999a3dd84698038e681692fa0 Author: Imre Deak Date: Tue Jun 3 16:11:52 2014 +0300 quick_dump: chv: add misc gen7 GT registers Signed-off-by: Imre Deak Reviewed-by: Ville Syrjälä commit 861cea8b5245776c7ea9515b02d20449395a3132 Author: Imre Deak Date: Tue Jun 3 02:02:24 2014 +0300 quick_dump: chv: add dsi (mipi) registers Signed-off-by: Imre Deak Reviewed-by: Ville Syrjälä commit a4b53d2125a68d431587ae5f004e028ef181290f Author: Imre Deak Date: Tue Jun 3 01:59:45 2014 +0300 quick_dump: vlv: clean up dsi (mipi) registers Split out the base offset into the third argument and rename MIPIB to MIPIC to match the display cluster register HAS. Signed-off-by: Imre Deak Reviewed-by: Ville Syrjälä commit a115c4820802508733cdf7100f4de63c8d3dc50f Author: Ville Syrjälä Date: Fri Mar 21 10:07:43 2014 -0700 quick_dump: chv: add full dpio phy dumps Signed-off-by: Ville Syrjälä Reviewed-by: Imre Deak commit e23f1fdfeed49f0b61b528940effefc089f008d2 Author: Ville Syrjälä Date: Fri Mar 21 01:51:29 2014 -0700 quick_dump: chv: add display registers Signed-off-by: Ville Syrjälä [imre: add audio regs] Reviewed-by: Imre Deak commit 6d2577c74117e0f246152d2a16c96626c496a824 Author: Ville Syrjälä Date: Wed May 28 18:45:27 2014 +0300 quick_dump: chv: add detection support Signed-off-by: Ville Syrjälä Reviewed-by: Imre Deak commit 9a642a72873c2df8a0c8ad8b63e25e42b1646382 Author: Ville Syrjälä Date: Wed May 28 18:23:07 2014 +0300 quick_dump: add support for accessing the dpio phy 2 registers Signed-off-by: Ville Syrjälä Reviewed-by: Imre Deak commit 0f906083f2a2248355f799948188aa8c010585d2 Author: Ville Syrjälä Date: Wed May 28 18:26:39 2014 +0300 lib/intel_iosf: add second phy support Signed-off-by: Ville Syrjälä Reviewed-by: Imre Deak commit 82fcb90619491af13675d8c08e5d1b6bf07a781b Author: Imre Deak Date: Mon Jun 2 15:48:27 2014 +0300 quick_dump: allow passing display base as the third argument Signed-off-by: Ville Syrjälä Reviewed-by: Imre Deak commit 4e696ff8c9567051467c922f5abb4f8b64196b5c Author: Ville Syrjälä Date: Wed May 28 18:32:39 2014 +0300 quick_dump: pass register offsets as int Signed-off-by: Ville Syrjälä [imre: fix s/regi/intreg/ typo] Reviewed-by: Imre Deak commit 76bc5fdf46ce003f3f370998c1b3ed45fe8775c3 Author: Imre Deak Date: Tue Jun 3 16:44:41 2014 +0300 quick_dump: fix typo breaking dpio reg dumps Signed-off-by: Imre Deak Reviewed-by: Ville Syrjälä commit 4f0bb3147079b6a8b49ccf1b3b3b6fbf13e64f11 Author: Imre Deak Date: Tue Jun 3 16:03:50 2014 +0300 quick_dump: make autodetect the default option Signed-off-by: Imre Deak Reviewed-by: Ville Syrjälä Very-much-wanted-by: Daniel Vetter commit 73c40324159b1fda9db3d8c34c47a722977d213d Author: Tim Gore Date: Tue Jun 3 15:18:31 2014 +0100 intel-gpu-tools: remove testdisplay.h from kms_render.c kms_render.c included testdisplay.h but did not need it. This was preventing it from building on Android due to the lack of a Glib port. So I have removed this #include and changed Android.mk so that kms_render is built if we have cairo. Signed-off-by: Tim Gore Signed-off-by: Daniel Vetter commit 0dc8794fc07faf8f2b008f98fd8ef6ed04300119 Author: Tim Gore Date: Tue Jun 3 15:05:56 2014 +0100 intel-gpu-tools: re-enable gem_exec_params on Android The missing macro that was preventing the gem_exec_params test from building is now in i915_drm.h, in ABT at least, and this test can now build. So I have removed it from the skip list in Android.mk For Gmin I have added a patch for i915_drm.h to the Wiki Signed-off-by: Tim Gore Signed-off-by: Daniel Vetter commit d60d4c80e5dbdab0baa5b45c3849262d982e3856 Author: Mika Kuoppala Date: Thu Apr 10 15:15:13 2014 +0300 tools/null_state_gen: generate null render state Generate valid (null) render state for each gen. Output it as a c source file with batch and relocations. v2: noinst and vs_start fixed for BDW GT3 (Damien Lespiau) Acked-by: Damien Lespiau Signed-off-by: Mika Kuoppala commit a384e55b49dce17eff1945536f957546bc7902cf Author: Chris Wilson Date: Tue Jun 3 07:31:49 2014 +0100 igt/gem_evict_everything: Move assertion If we move the assertion from out of the callback, we can get a much more useful error message. References: https://bugs.freedesktop.org/show_bug.cgi?id=79573 Signed-off-by: Chris Wilson commit 21fb118f3b3f16f9cdc6cadf68204e745f0a8a68 Author: Antti Koskipaa Date: Mon Jun 2 13:43:18 2014 +0300 kms_cursor_crc: Test cursor size change ioctl Now that we support cursor changes other than 64x64, a bug was found where the size change was only applied at cursor enable time, rather than at every update. Add a testcase for that. Signed-off-by: Antti Koskipaa Signed-off-by: Daniel Vetter commit 532b7e61e0316b94b280efc2199ef121ced1959c Author: Daniel Vetter Date: Wed May 28 16:19:16 2014 +0200 NEWS: Fix spelling a bit commit aeb3d8897738559b6e8bb21b72e4832a8f8ab59e Author: Daniel Vetter Date: Wed May 28 16:05:14 2014 +0200 NEWS: Don't forget the runtime pm helpers! commit 0ee77ce2328d1fe2427e7086e4aa339eeb2ce820 Author: Daniel Vetter Date: Wed May 28 16:02:08 2014 +0200 NEWS: Updates ... commit 707c839a6a0abda7310cf15eeb353a477ac83315 Author: Damien Lespiau Date: Wed May 28 14:18:34 2014 +0100 build: Don't fail if SWIG isn't found People from distros have reported that packaging the newer versions is more difficult because we now depend on SWIG. We don't have to, it's needed for the python dumper and is an optional build dependency. Signed-off-by: Damien Lespiau Signed-off-by: Daniel Vetter commit 321273ff76fa16aabec0c6b0a63039525a4fec1b Author: Chris Wilson Date: Wed May 28 09:01:56 2014 +0100 Factor in kernel object overhead when checking available memory for tests Signed-off-by: Chris Wilson commit e4ba3b75e6de35483b2edea21ceda145ef0b3311 Author: Ville Syrjälä Date: Tue May 27 21:33:10 2014 +0300 tests/kms_flip: Make flip-vs-panning-vs-hang change DSPSURF Make sure DSPSURF will change during the panning operation in flip-vs-panning-vs-hang. This will now test agains bugs between the kernel's mmio vs. CS flip race handling and GPU resets. If the kernel is buggy if will fail to notice that the panning operation changed the base address before the GPU reset had a chance to deal with the pending page flips, and so the flip would never complete due to DSPSURFLIVE not matching the expected value. Signed-off-by: Ville Syrjälä Signed-off-by: Daniel Vetter commit 3805288f1a28abebb9313b515d5e48ba06350020 Author: Tim Gore Date: Tue May 27 16:45:24 2014 +0100 intel-gpu-tools: Skip kms_mmio_vs_cs_flip if no cairo The kms_mmio_vs_cs_flip test uses igt_kms.c which in turn uses cairo. So in Android.mk add this test to the skip list if we dont have cairo Signed-off-by: Tim Gore Signed-off-by: Daniel Vetter commit ff3c12209893ee8ee0e757d6cf10276596ef0338 Author: Daniel Vetter Date: Thu May 22 17:29:48 2014 +0200 tests/kms_pipe_crc_basic: Add gpu hang tests Currently pipe CRC support is broken after gpu hangs. This tests for this bug. Signed-off-by: Daniel Vetter commit f75ec0b452cbebc0375c1bf75f06e0dc8432cd7c Author: Daniel Vetter Date: Thu May 22 16:27:44 2014 +0200 tests/kms_pipe_crc_basic: Add suspend tests Currently broken ... Signed-off-by: Daniel Vetter commit 6fa1934a1991ec30b4f72359cb51d043b374bf43 Author: Mika Kuoppala Date: Tue May 20 11:25:48 2014 +0300 tests/drv_hangman: Add subtest for error state capture/dump Guarantees that error capture works at a very basic level. v2: Also check that the ring object contains a reloc with MI_BB_START for the presumed batch object's address. v3: Chris review comments: - Move variables to local scope. - Do not assume there is only one request. - Some gen encode flags into the BB start address. Also, use igt_set/get_stop_rings as suggested by Mika Kuoppala. v4: Make as a subtest of drv_hangman. v5: Rebase Signed-off-by: Oscar Mateo Signed-off-by: Mika Kuoppala commit 9b0d3481e80670ccc27925a6ada05bb36a665b05 Author: Mika Kuoppala Date: Mon May 19 17:42:21 2014 +0300 tests/drv_hangman: Convert test from shell script to c Mixing script and standlone tests didn't mix well with the strict i915_ring_stop flags handling. Also squash drv_missed_irq_hang to the new test. v2: - Remove missed irq test (Daniel Vetter) - gitignore fixed (Oscar Mateo) - fix check_other_clients to handle dangling fd's Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78322 Suggested-by: Daniel Vetter Reviewed-by: Oscar Mateo Signed-off-by: Mika Kuoppala commit 9911f3f0cf202444f1ef2399f5961605880b7360 Author: Chris Wilson Date: Thu May 22 10:20:33 2014 +0100 igt/gem_userptr_blits: Fix up last minute API changes When the patch was merged, the ioctl numbers had to be adjusted to leave no holes. Also there was a final piece of munging of the API to downgrade unsynced userptr for export over dma-buf. Signed-off-by: Chris Wilson commit eb566561e79d00c7ac7b596d428fa26f6de1ec5d Author: Ville Syrjälä Date: Mon Apr 14 16:14:40 2014 +0300 tests/kms_mmio_vs_cs_flip: Add a test case to exercise mmio vs. CS flip races kms_mmio_vs_cs_flip has two subtests: - setplane_vs_cs_flip tests the interaction between fullscreen sprites and CS flips - setcrtc_vs_cs_flip tests the interaction between primary plane panning and CS flips v2: Skip sprite test when there are no sprites Reduce busy_bo to 64MB (now works on my gen2) Handle pipe vs. port incompatibility v3: Handle missing auto pipe crc Reviewed-by Rodrigo Vivi Signed-off-by: Ville Syrjälä commit e2ac7a15f195b67a44c474920cd220baab92f6b1 Author: Daniel Vetter Date: Thu May 22 09:34:36 2014 +0200 tests/kms_sink_crc_basic: Use igt_assert Less verbose code makes for clearer test logic. Signed-off-by: Daniel Vetter commit 0675765eff4a7409afa98734aa0c8fbc02ce5ff6 Author: Daniel Vetter Date: Thu May 22 09:32:22 2014 +0200 tests/kms_sink_crc_basic: skip properly Not running the test is not failing. Signed-off-by: Daniel Vetter commit f8935351413a23920032604e05802a404b8eaff2 Author: Daniel Vetter Date: Thu May 22 09:07:45 2014 +0200 Revert "Revert "store_dw_loop: make loops smaller"" This reverts commit 3005ac3ee8d7aede73a3e63d2068a6074156ebe5. QA has done the testing we've wanted. Signed-off-by: Daniel Vetter commit c75dcbdac51dcc2d631a4a45049c9421e0229e16 Author: Daniel Vetter Date: Tue May 20 15:45:31 2014 +0200 tests/kms_flip: various improvements - Some debug logging for the ts continuity checks. - Add a plain vblank-vs-suspend test where kms_flip doesn't switch off the displays first. - Ensure that we do at least 2 rounds, the suspend tests bailed out after 1 round and so didn't test anything. - Frob the testnames a bit. Signed-off-by: Daniel Vetter commit 89152791e2ebde5e05c51fc070e3eaa462701f74 Author: Daniel Vetter Date: Tue May 20 14:42:12 2014 +0200 tests/kms_flip: Add vblank vs. gpu hang testcase Currently broken :( Signed-off-by: Daniel Vetter commit 737d248a127f51d20555de53b9dfe28ca4682b54 Author: Xiang, Haihao Date: Tue Mar 25 13:55:14 2014 +0800 assembler: distinguish the channel of .z from the condition of .z The scratch patch only works for generic register Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75631 Tested-by: Matt Turner Signed-off-by: Xiang, Haihao Signed-off-by: Damien Lespiau commit 881afff297835faf67f55ed1e9db596e57fb4cd7 Author: Xiang, Haihao Date: Tue Mar 25 13:41:25 2014 +0800 assembler: switch the order of swizzle and regtype to match the BNF of the assembly Fortunately our existing source didn't use swizzle. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75631 Tested-by: Matt Turner Signed-off-by: Xiang, Haihao Signed-off-by: Damien Lespiau commit a6eaa292717f8c8e109ae172d115abea05b5c342 Author: Imre Deak Date: Sun May 18 23:37:56 2014 +0300 igt/quickdump: vlv: dump FLISDSI regs too Signed-off-by: Imre Deak commit ad08999794ab883e6755bdf3cdce8ba9ac7a4c6d Author: Imre Deak Date: Mon May 19 13:26:35 2014 +0300 igt/intel_iosf: rename IOSF sideband opcodes according to the spec These opcodes are not specific for an endpoint, but are the same for all endpoints. So rename them accordingly, using the name the VLV2 sideband HAS uses. Also move the macros to the .c file, since they aren't used anywhere else. Signed-off-by: Imre Deak commit 3005ac3ee8d7aede73a3e63d2068a6074156ebe5 Author: Daniel Vetter Date: Mon May 19 18:11:34 2014 +0200 Revert "store_dw_loop: make loops smaller" This reverts commit f00efff326610fdba92dbc91d951790a3320052e. This is a temporary revert since I want QA to first test with the original testcase whether it got faster again. This is to test the effects of commit 227f782e4667fc622810bce8be8ccdeee45f89c2 Author: Chris Wilson Date: Thu May 15 10:41:42 2014 +0100 drm/i915: Retire requests before creating a new one We should revert this revert again as soon as QA has completed testing. References: https://bugs.freedesktop.org/show_bug.cgi?id=78024 Cc: Jesse Barnes Signed-off-by: Daniel Vetter commit f00efff326610fdba92dbc91d951790a3320052e Author: Jesse Barnes Date: Mon May 19 08:44:12 2014 -0700 store_dw_loop: make loops smaller These tests are really for catching TLB or GTT mapping failures due to bad programming in the kernel driver. We've never needed more than a few pages worth of data write to actually see those. commit d71add5c1197706fdd060e7f487293ef8b459d87 Author: Chris Wilson Date: Mon May 19 07:26:12 2014 +0100 igt/gem_bad_reloc: Refine for limited kernel w/a One proposed solution only fixes up the SNA behaviour, so reduce the test case to probe only that particular pathology. Signed-off-by: Chris Wilson commit 252d1151a809683b0f6ed2c546358b7375a27f18 Author: Daniel Vetter Date: Fri May 16 23:36:25 2014 +0200 tests/kms_sink_crc_basic: Put into righ Makefile target If it's a simple test, it needs to be in the simple lists. Tests with subtests go into the _M tests. Without that test enumeration is all screwed up. Cc: Rodrigo Vivi Signed-off-by: Daniel Vetter commit 542c2b5ed5a2a5beee5912b44f9155ade532dca3 Author: Oscar Mateo Date: Fri May 16 14:07:12 2014 +0100 tests/kms_flip: test a fb backed by a bo too big/small for its own good This is a "review by igt test" for a bug located in i915_gem_object_pin_to_display_plane and fixed by: commit 392013bdd4b6128795e33c84bd6d6d3fd66ff0a3 Author: Oscar Mateo Date: Fri May 16 11:23:12 2014 +0100 drm/i915: Gracefully handle obj not bound to GGTT in is_pin_display Otherwise, we do a NULL pointer dereference. I've seen this happen while handling an error in i915_gem_object_pin_to_display_plane(): If i915_gem_object_set_cache_level() fails, we call is_pin_display() to handle the error. At this point, the object is still not pinned to GGTT and maybe not even bound, so we have to check before we dereference its GGTT vma. v2: Chris Wilson says restoring the old value is easier, but that is_pin_display is useful as a theory of operation. Take the solomonic decision: at least this way is_pin_display is a little more robust (until Chris can kill it off). v2: Avoid code duplication by using igt_create_fb_with_bo_size() as requested by Ville Syrjälä (original author of the "too big" test idea). Signed-off-by: Oscar Mateo Signed-off-by: Ville Syrjälä commit 5bdd4d9b5e371735e0d76339989a9af9bd046702 Author: Oscar Mateo Date: Fri May 16 14:07:11 2014 +0100 lib/igt_fb: igt_create_fb_with_bo_size Useful for testing bigger/smaller fb-wrapped buffer objects. Cc: Ville Syrjälä Signed-off-by: Oscar Mateo Signed-off-by: Ville Syrjälä commit ace8a9e10c7516c7298658a73c3096aa21b5986e Author: Rodrigo Vivi Date: Thu May 15 20:13:57 2014 -0400 tests/kms_sink_crc_basic: Basic test to verify Sink CRC debugfs. v2: rebase after a long time. Signed-off-by: Rodrigo Vivi Signed-off-by: Daniel Vetter commit 1c9a5b1a7b63855bc90dfcf371dc0789548ca637 Author: Daniel Vetter Date: Fri May 16 10:33:28 2014 +0200 tests/pm_pc8 -> pm_rpm rename Plus naming convention for runtime pm tests to have "rpm" somewhere in their tests. Note that all the pc8-specific tests (for e.g. residency or similar) already have pc8 in their subtest names, so we don't lose any information here. Cc: "Yang, Guang A" Signed-off-by: Daniel Vetter commit 7357639397fd7457149329494f615bb0053b9036 Author: Daniel Vetter Date: Thu May 15 17:02:39 2014 +0200 tests/pm_pc8: Use igt_assert_cmpint More pretty! Signed-off-by: Daniel Vetter commit 5e83f0444d0fcef2d5996ef12f9cf1593ccd8f78 Author: Rodrigo Vivi Date: Thu May 15 14:06:51 2014 -0400 tests/gem_bad_reloc: Adding missing include. It was breaking compilation. Signed-off-by: Rodrigo Vivi commit 6797ca8c75dc57f4a5eaa9ca8d6f180fd24491dc Author: Daniel Vetter Date: Thu May 15 16:35:32 2014 +0200 tests/kms_render: don't loop through modes We kinda have testdisplay for this ... and doing this tends to take forever. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77709 Signed-off-by: Daniel Vetter commit 943511a3ab53df1db5e631bface63bdae663c4c8 Author: Daniel Vetter Date: Thu May 15 10:03:11 2014 +0200 tests/gem_reg_read: Fix errno check So I accidentally fixed a check when converting to the new macros and the kernel never returned -ENOENT for invalid regs. Adjust the test. Signed-off-by: Daniel Vetter commit 6727de0c1abe0b2d6d44255dd30a29dc3ee84993 Author: Daniel Vetter Date: Wed May 14 17:59:02 2014 +0200 tests/kms_flip: nasty power management tests These check whether everything is still ok wrt vblank handling after runtime pm and system suspend-resume. In addition to the usual checks they also ensure that the vblank frame counter isn't totally ridiculous, something Keith complained about aeons ago. With Ville's drm_vblank_on/off rework this should now be fixed and solid. v2: - Ignore seq_step, vblanks completely immediately when the crtc goes off - Only run system suspend/resume tests once. Cc: Keith Packard Signed-off-by: Daniel Vetter commit bd521b493e73d987669afbce8da6418e1aed7db6 Author: Daniel Vetter Date: Wed May 14 16:10:50 2014 +0200 lib/igt_aux: Extract runtime pm helpers from pm_pc8 I want to use them elsewhere ... Signed-off-by: Daniel Vetter commit 1bee7e8b82e4a264d20df1f5825b8424c9241e39 Author: Tim Gore Date: Thu May 15 10:25:48 2014 +0100 intel-gpu-tools: Skip kms_fence_pin_leak if no cairo The kms_fence_pin_leak test uses igt_kms.c which in turn uses cairo. So in Android.mk add this test to the skip list if we dont have cairo Issue: VIZ-3894 Signed-off-by: Tim Gore Signed-off-by: Daniel Vetter commit af1fbc427f50ac38ed93f3e682cf92b9ae1b2f41 Author: Chris Wilson Date: Thu May 15 13:37:03 2014 +0100 igt/gem_ringfill: Only check for rendercopy when testing render ring Overzealous test runner ftl. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78591 Signed-off-by: Chris Wilson commit ef51988ab287c86c2a324271eebf85a68979ac46 Author: Chris Wilson Date: Thu May 15 13:23:44 2014 +0100 igt/gem_bad_reloc: Restrict negative reloc tests to IVB+ The bug doesn't seem to occur on SNB, so we can skip the workaround and hence we do not expect the kernel to prevent invalid relocated offsets. Signed-off-by: Chris Wilson commit 465793bfd185062cfaee1b0dd3abf98ce5218333 Author: Chris Wilson Date: Thu May 15 13:10:54 2014 +0100 gem_exec_lut_handle: Do a warm up pass before timing Signed-off-by: Chris Wilson commit efd5a571f47885ca1cbd2f20a879d38018fe7c3e Author: Chris Wilson Date: Thu May 15 13:10:21 2014 +0100 gem_bad_reloc: Add subtest for LUT-based execbuffers Signed-off-by: Chris Wilson commit daa9e3d80a6c25667b259e864376ac929d5a11bd Author: Chris Wilson Date: Thu May 15 08:43:11 2014 +0100 Add gem_bad_reloc This test feeds a batch containing self-references into the kernel and checks that the relocation offsets remain as valid GTT addresses. This is to exercise SNA passing in negative relocation deltas which can hang the GPU if they wrap around. References: https://bugs.freedesktop.org/show_bug.cgi?id=78533 Signed-off-by: Chris Wilson commit 62cd793c37135339788fff7ddf99f5039b0282ae Author: Daniel Vetter Date: Wed May 14 17:59:25 2014 +0200 tests/kms_flip: Fix vblank ts check Oops, fumbled that in the conversion. Signed-off-by: Daniel Vetter commit 78f79e4e95b571b0ee6f407aaea6dc7c0f864985 Author: Ville Syrjälä Date: Mon May 12 14:18:42 2014 +0300 tests/kms_fence_pin_leak: Exercise full ppgtt fence pin_count leak in the kernel The kernel full ppgtt support has a bug where it can drop a pinned fence to the floor, hence we leak the pin_count as the subsequent fence unpin becomes a nop. We can trigger it easily by unbinding a buffer from a ppgtt address space while the buffer is simultaneosly being used for scanout. Make the kernel leak the fence pin_count and trick it into picking a new fence register for the next scanout buffer. Looping like this for a while we leak the pin_count for all fence registers after which the kernel can no longer find a new fence register when it needs one. As a result we get back a SIGBUS from the GTT mmap access. Signed-off-by: Ville Syrjälä commit 831eb2119793e55d9c0e1be363a2f480f3183ff6 Author: Daniel Vetter Date: Wed May 14 15:33:27 2014 +0200 lib/igt_core: Fixup docs with symbolic exit codes Conflict between me and Thomas pushing patches in parallel. Cc: Thomas Wood Signed-off-by: Daniel Vetter commit 17eb062661e02a3cea97c4893d373ce8124a0b94 Author: Thomas Wood Date: Tue May 13 15:22:52 2014 +0100 lib: add exit status defines Add defines for success, skip and timeout exit statuses. Suggested-by: Daniel Vetter Signed-off-by: Thomas Wood commit c03d58595e23d155aa470e60e6debaa0ee357a1b Author: Thomas Wood Date: Mon May 12 10:20:55 2014 +0100 lib: set a timeout when reading crc values Signed-off-by: Thomas Wood Acked-by: Damien Lespiau commit d8e5313a276c856fdd6f600e69e26f45e4c370c0 Author: Thomas Wood Date: Mon May 12 10:19:52 2014 +0100 lib: add igt_set_timeout Add a function to stop and fail a test after the specified number of seconds have elapsed. Signed-off-by: Thomas Wood Acked-by: Damien Lespiau commit 5597a1f418f925f7cb298d3f74aab5ebdb0edd36 Author: Daniel Vetter Date: Wed May 14 11:52:35 2014 +0200 tests/kms_flip: Use asserts Signed-off-by: Daniel Vetter commit 0b3407f5283c1a091f9c980df76bf6ccfb692f9f Author: Daniel Vetter Date: Wed May 14 11:41:55 2014 +0200 tests/prime_nv_pcopy: Remove unused tiling tests We now know that the hardware can't do this, and it's not designed to. Signed-off-by: Daniel Vetter commit ee90a4a0dc2cb133bd84283da460069f22c49aac Author: Daniel Vetter Date: Wed May 14 11:39:31 2014 +0200 tests/prime_nv_pcopy: Drop return values from tests Signed-off-by: Daniel Vetter commit a7294e0c22d2be22b3f9abbbcad81794c65315c8 Author: Daniel Vetter Date: Wed May 14 11:31:31 2014 +0200 tests/prime_nv_pcopy: Drop return values from copy/check functions Signed-off-by: Daniel Vetter commit 8710e302a46761a1164a6453eaf53345fd76fc44 Author: Daniel Vetter Date: Wed May 14 10:57:46 2014 +0200 tests/prime_nv_pcopy: Use asserts in setup code Now we even have more fine-grained checking and only skip if the nouveau card isn't supported, but fail properly if something else goes wrong. Signed-off-by: Daniel Vetter commit 782cda17b932e9f96beca87f61b791990bea8ce5 Author: Daniel Vetter Date: Wed May 14 10:49:40 2014 +0200 tests/prime_nv_pcopy: Use asserts in nv_bo_alloc Step one to untangle the control flow in this test and replace it all with igt assert magic. Signed-off-by: Daniel Vetter commit d502ae6f773333b0e073923911bf936842296e73 Author: Daniel Vetter Date: Wed May 14 10:44:16 2014 +0200 tests/prime_nv_api: Use asserts instead of control flow Signed-off-by: Daniel Vetter commit 722b25a303bcb927bf233cb773a3f6e3851e2f58 Author: Daniel Vetter Date: Wed May 14 10:07:17 2014 +0200 tests/gem_seqno_wrap: Replace control flow with asserts Only tricky bit was a bit of debug output sprinkled all over, I've moved it all to cmp_bo. Signed-off-by: Daniel Vetter commit 0b7ce4ac2929ea56dfde508d551163a5304c66d8 Author: Daniel Vetter Date: Wed May 14 09:56:53 2014 +0200 tests: Use igt macros more Often just folding together of the common if (cond) printf; abort|igt_skip|igt_fail; pattern. But in a few cases I've ripped out more since the igt macros will already print the condition and errno. A few tests where more work (like ripping out return codes en masse) is needed left as-is. Signed-off-by: Daniel Vetter commit e624fa8a2e1a31494c6e47a65e378e480882422d Author: Daniel Vetter Date: Wed May 14 00:36:04 2014 +0200 tests: sprinkle igt logging All the cases that simply dump some debug information and couldn't be converted to some of the fancier macros. Some information output removed when it's redundant with the subtest status. Signed-off-by: Daniel Vetter commit 351e7d395041b4b87ad28a201c81acac40cb397f Author: Imre Deak Date: Tue May 13 15:49:58 2014 +0300 pm_pc8: add system-suspend subtest Signed-off-by: Imre Deak commit 4e4ff4c1d1189f2dab59af1f1e868d88ab13624a Author: Ville Syrjälä Date: Tue May 13 15:02:37 2014 +0300 tests/kms_fbc_crc: Use igt_create_color_fb() No need to hand roll the alloc fb+paint code anymore, just use the common helper. Signed-off-by: Ville Syrjälä commit abc262bf470f0988e10f1cfe4aa8d0f7f5f65519 Author: Ville Syrjälä Date: Tue May 13 14:49:53 2014 +0300 tests/kms_fbc_crc: Reset display state between subtests If a subtest fails it'll leave the display in a state that may prevent the next subtest from working. So reset the display state between subtests. Signed-off-by: Ville Syrjälä commit 54f8f5d13eefbbfb16ffd38be565d5c60ce67440 Author: Ville Syrjälä Date: Tue May 13 13:56:41 2014 +0300 tests/kms_fbc_crc: Switch to using the igt_display stuff Let's try to use the common igt_display framework to make the code a bit nicer. Signed-off-by: Ville Syrjälä commit d2d0a96eca2e63a7ec75fd15b81808c42ae796b7 Author: Ville Syrjälä Date: Tue May 13 13:38:20 2014 +0300 tests/kms_fbc_crc: Simplify pipe_crc mess There's no need to keep an array of pipe_crc objects around. Just keep one for the duration of the specific crtc/connector/test combo. Signed-off-by: Ville Syrjälä commit 126b8ba72f6a6f017819e00dc2b37a7c6549a143 Author: Daniel Vetter Date: Tue May 13 12:28:26 2014 +0200 lib/igt_core: Fix type on igt_log doc Signed-off-by: Daniel Vetter commit 1503d17cc5444d43f37b07d722f7c2a0db7c7f91 Author: Daniel Vetter Date: Tue May 13 11:29:34 2014 +0200 lib/igt_core: Document testrunner interface a bit Also fix up one gtkdoc fumble in igt_fb. We should use symbolic defines if possible instead of just listening the magic 0, 77, 78 values for exit codes, but that's a separate patch. Cc: tim.gore@intel.com Signed-off-by: Daniel Vetter commit 0be29daac18bebeca6be6e80746ff8abb6476dfc Author: Tim Gore Date: Tue May 13 09:34:42 2014 +0100 intel-gpu-tools: Move igt tests to intel validation area Currently when IGT is built for Android the resulting test executables go to /system/bin, which is not ideal. After discussion with the core validation team i have moved them to /system/vendor/intel/validation/core/igt by setting LOCAL_MODULE_PATH. I have also added a --defsym linker option to export a symbol that allows a script to easily distinguish between tests that have subtests and those that dont. There are better ways to do this (viz, in the source code) but because the igt tests are not written consistently this would require many more changes. Signed-off-by: Tim Gore Signed-off-by: Daniel Vetter commit bd7f9ab2cefd4c8fcf57e0dc4e79fef6890a3c71 Author: Daniel Vetter Date: Tue May 13 11:12:34 2014 +0200 NEWS: Android has libcairo support now! Signed-off-by: Daniel Vetter commit 41cbe36bba966fdc96d86031f2db5853e2c59ef4 Author: Tim Gore Date: Mon May 12 13:39:00 2014 +0100 intel-gpu-tools: Build tests needing cairo if ANDROID_HAS_CAIRO=1 Until now the tests that depended on libcairo were simply skipped in the android build. Now that I have a cairo port working, build these cairo dependent tests if ANDROID_HAS_CAIRO is set to 1 in the environment. For information on building cairo for IGT on Android see the wiki at: https://securewiki.ith.intel.com/display/GFXCore/IGT+Test+Suite+on+Android Signed-off-by: Tim Gore Signed-off-by: Daniel Vetter commit 0fee90b56df9a644b305f6cf37785b8284d410b3 Author: Brad Volkin Date: Sat May 10 14:11:53 2014 -0700 tests/gen7_forcewake_mt: Don't set the GGTT bit in SRM command The command parser in newer kernels will reject it and setting this bit is not required for the actual test case. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76670 Signed-off-by: Brad Volkin Signed-off-by: Daniel Vetter commit 63746417e25b8e9efbeb6021c768695740849a18 Author: Imre Deak Date: Mon May 12 13:29:49 2014 +0300 testdisplay: fix restoring termio at exit At normal exit in test_all_modes we don't restore the original termio, since g_io_channel_shutdown() closes the stdin fd and so the following tcsetattr on stdin will fail. We also don't restore the termio at signal exit. Fix both cases by installing an exit hanlder with a dup'ed stdin fd. Signed-off-by: Imre Deak commit d848a36545eec43760de7e34a57a796182358087 Author: Ville Syrjälä Date: Thu May 8 15:56:24 2014 +0300 tests/kms_fbc_crc: Check context support earlier Check for context support before doing anything else in the subtest. Signed-off-by: Ville Syrjälä commit f85fff0de620bc20d8a20896812fcce584983f28 Author: Ville Syrjälä Date: Thu May 8 15:56:24 2014 +0300 tests/kms_fbc_crc: Allow the subtests to pass even if some planes aren't FBC capable Don't skip the entire subtest if FBC only works on some of the primary planes, as is the case on pre-gen4 and hsw+. Only skip the entire subtest if all crtc/connector combinations skip. Also print some kind of status for all otherwise valid crtc/connector combos if they skip due to FBC being disabled or CRC support not being there. Signed-off-by: Ville Syrjälä commit 66d5f092d46120d97a0408dcd8fea0c0e086d7a8 Author: Chris Wilson Date: Thu May 8 11:56:56 2014 +0100 igt/gem_render_tiled_blits: Speed up by using the GPU to detile Avoid accessing via the slow GTT to read back and compare the contents of each bo against expected results. It is much faster, on llc at least, to detile using the GPU and then copy to system memory for the compare. Before: IVB: time sudo ./gem_render_tiled_blits IGT-Version: 1.6-ge46ff3f (x86_64) (Linux: 3.15.0-rc3+ x86_64) Using 3072 1MiB buffers Verifying initialisation... Cyclic blits, forward... Cyclic blits, backward... Random blits... real 6m26.005s user 6m19.234s sys 0m2.414s PNV: time sudo ./gem_render_tiled_blits IGT-Version: 1.6-g8556f8a (i686) (Linux: 3.15.0-rc2+ i686) Using 768 1MiB buffers Verifying initialisation... Cyclic blits, forward... Cyclic blits, backward... Random blits... real 1m45.431s user 1m34.960s sys 0m4.624s Using pread: IVB: time sudo ./gem_render_tiled_blits IGT-Version: 1.6-ge46ff3f (x86_64) (Linux: 3.15.0-rc3+ x86_64) Using 3072 1MiB buffers Verifying initialisation... Cyclic blits, forward... Cyclic blits, backward... Random blits... real 0m14.717s user 0m3.699s sys 0m3.192s Using snoop: IVB: time sudo ./gem_render_tiled_blits IGT-Version: 1.6-ge46ff3f (x86_64) (Linux: 3.15.0-rc3+ x86_64) Using 3072 1MiB buffers Using a snoop linear buffer for comparisons Verifying initialisation... Cyclic blits, forward... Cyclic blits, backward... Random blits... real 0m13.774s user 0m3.900s sys 0m2.089s PNV: time sudo ./gem_render_tiled_blits IGT-Version: 1.6-g8556f8a (i686) (Linux: 3.15.0-rc2+ i686) Using 768 1MiB buffers Using a snoop linear buffer for comparisons Verifying initialisation... Cyclic blits, forward... Cyclic blits, backward... Random blits... real 0m20.831s user 0m4.384s sys 0m5.032s So roughly 10-30x faster depending on platform. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78244 Signed-off-by: Chris Wilson commit e46ff3f8c25957d641420fef4d680d48ce0a365f Author: Chris Wilson Date: Thu May 8 10:04:35 2014 +0100 igt/gem_lut_handle: Fix errno checking Regression from commit c1404e05b7477122b9923ba029593c2cb64671a7 Author: Chris Wilson Date: Tue Apr 29 07:14:33 2014 +0100 errno is reset after each syscall Signed-off-by: Chris Wilson commit 8741c2289f17e9bcb740a01cad4764a71c918eea Author: Mika Kuoppala Date: Wed May 7 16:46:19 2014 +0300 tests/gem_flink_race,prime_self_import: fix object counts We need to add one drm_open_any() before getting the object counts as first call to drm_open_any() allocates file descriptors for exit handlers and thus is not symmetrical. The regression, assymmetric behaviour, was introduced in: commit 2f2c491cf3167befe7c79e4b17afb4f6284dfc84 Author: Mika Kuoppala Date: Fri Mar 28 10:52:46 2014 +0200 lib/drmtest: don't dup quiescent fd Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77867 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77875 Reviewed-by: Daniel Vetter Signed-off-by: Mika Kuoppala commit 7935bbd9ba9508d6993ca019a5b8f3262676e7b5 Author: Jani Nikula Date: Tue May 6 14:06:52 2014 +0300 intel_bios_reader: make edp block decode match kernel All the somewhat recent VBT specs and the kernel have different format for the eDP block than what the tool decodes. What the tool does *may* be correct for really old VBT, but I have no specs or other reference to suppor this. Just do what the kernel does, that's what we're interested in anyway. Reviewed-by: Damien Lespiau Signed-off-by: Jani Nikula commit 4bd9fe6e3409d59e618053f908e33bc291d295f4 Author: Chris Wilson Date: Mon May 5 10:57:12 2014 +0100 gem_alive: A utility to see if the driver or GPU has hung commit c864279de620a6e211b8a197dbdf9e3e1e2b60ab Author: Chris Wilson Date: Wed Apr 30 18:39:27 2014 +0100 overlay: Parse /proc/interrupts in lieu of debugfs/i915_gem_interrupt So the interrupt counter was removed from i915_gem_interrupt, and if we do not have the perf API available, we therefore need to read it from /proc/interrupts instead. Signed-off-by: Chris Wilson commit bff7ecde7bf3757e11ab4559212564e3f4919b89 Author: Chris Wilson Date: Wed Apr 30 18:38:26 2014 +0100 overlay: Use new i915_frequency_info in fallback code Actually use the new location to get frequency information when perf is not available. Signed-off-by: Chris Wilson commit b38b8a59a8694ef2d2d4c78283c7c697367766d7 Author: Daniel Vetter Date: Thu Apr 24 23:37:05 2014 +0200 tests/pm_pc8: subtests for runtime pm for dpms Very basic since I lack a bit ideas. After all with the latest patches runtime pm doesn't make much a difference between dpms off and disabling the outputs completely with SetCrtc. Signed-off-by: Daniel Vetter commit 29ee36f2597747c01d5c79c93ed31f5bcd06e219 Author: Daniel Vetter Date: Thu Apr 24 23:33:09 2014 +0200 lib: extract kmstest_set_connector_dpms Signed-off-by: Daniel Vetter commit 066ad35ee7b39ab51fb5b8e54c3abd72df016413 Author: Daniel Vetter Date: Wed Apr 30 18:05:21 2014 +0200 tests: Fix make depencies for test list Oops, pretty bad ... Signed-off-by: Daniel Vetter commit a40f091d8181b911b9dc2e11f50fcc33773d35df Author: Ville Syrjälä Date: Tue Dec 18 17:43:13 2012 +0200 Add Cherryview PCI IDs Signed-off-by: Ville Syrjälä commit ce3c443641344d2ecb642e62526ebc2a6eb3a458 Author: Daniel Vetter Date: Tue Apr 29 17:17:24 2014 +0200 NEWS: Updates commit c1404e05b7477122b9923ba029593c2cb64671a7 Author: Chris Wilson Date: Tue Apr 29 07:14:33 2014 +0100 errno is reset after each syscall Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78055 Bugilla: https://bugs.freedesktop.org/show_bug.cgi?id=78053 Signed-off-by: Chris Wilson commit fa86e33ccc56ee84f2f9ac924943eef0f1469a32 Author: Ville Syrjälä Date: Mon Apr 28 17:58:45 2014 +0300 tests/gem_stress: Fix rendercopy vs. keep_gpu_busy on gen6+ If the hardware has a blt ring blits aren't allowed on the render ring. Trying to execute blits on the render ring results in a GPU hang. Flush outstanding blits from keep_gpu_busy() before calling rendercopy() so that they don't end up on the render ring. Signed-off-by: Ville Syrjälä commit 6abfe2f0dbe80f8c1d4986367d56842bbf94d23e Author: Daniel Vetter Date: Mon Apr 28 15:26:15 2014 +0200 tests/gem_exec_params: One more invalid ring tests With the vebox 2 patches the number of internal rings don't match the number of exposed rings. So add another subtest with an invalid ring which should be invalid both internally and externally. The bug this will catch is using the ring structure before validation, which the old "invalide-ring" wont be able to due to the internal vebox2 ring. Signed-off-by: Daniel Vetter commit a595a400788bac972cb24ec78ae36db113419237 Author: Imre Deak Date: Fri Apr 25 10:26:46 2014 +0300 tests/pm_pc8: skip the test if runtime PM is disabled The PC8 state won't be entered unless runtime PM is enabled, so support for PC8 residency counters alone is not enough to run this test. Signed-off-by: Imre Deak Reviewed-by: Daniel Vetter commit e36c896a71660b09fd4f96ef5342009cd5908b80 Author: Daniel Vetter Date: Fri Apr 25 17:57:22 2014 +0200 test: Fixup for the previous patch Oops, failed to git add. Signed-off-by: Daniel Vetter commit 1b55886c4ba111b2ba331b03289658cbd1ae0e2e Author: Daniel Vetter Date: Fri Apr 25 17:52:02 2014 +0200 test/gem_userptr_*: Fix compile fail Also shut up warnings. Those revealed incorrect usage of local variables in conjunction with igt_fixture/igt_subtest. Since those use longjmps we need to move the out of the stackframe those magic blocks are declared in. Signed-off-by: Daniel Vetter commit d3057d7a1eba0c050f5d6d9674d56d1794b1f066 Author: Tvrtko Ursulin Date: Fri Apr 25 15:42:20 2014 +0100 tests/gem_userptr_benchmark: Benchmarking userptr surfaces and impact This adds a small benchmark for the new userptr functionality. Apart from basic surface creation and destruction, also tested is the impact of having userptr surfaces in the process address space. Reason for that is the impact of MMU notifiers on common address space operations like munmap() which is per process. v2: * Moved to benchmarks. * Added pointer read/write tests. * Changed output to say iterations per second instead of operations per second. * Multiply result by batch size for multi-create* tests for a more comparable number with create-destroy test. v3: * Use ALIGN macro. * Catchup with big lib/ reorganization. * Removed unused code and one global variable. * Fixed up some warnings. v4: * Fixed feature test, does not matter here but makes it consistent with gem_userptr_blits and clearer. Signed-off-by: Tvrtko Ursulin Cc: Chris Wilson Cc: Brad Volkin Reviewed-by: Brad Volkin Signed-off-by: Daniel Vetter commit a3e97ddcbf53c99af3b0a25db9a055119d312116 Author: Tvrtko Ursulin Date: Fri Apr 25 15:42:19 2014 +0100 tests/gem_vmap_blits: Remove obsolete test case No need for the old test case once the new one was added. v2: * Just rebase for lib/ reorganization. Signed-off-by: Tvrtko Ursulin Reviewed-by: Brad Volkin Signed-off-by: Daniel Vetter commit 863c0730f3aa695f2e968e1f38e0f36c4f8af310 Author: Tvrtko Ursulin Date: Fri Apr 25 15:42:18 2014 +0100 tests/gem_userptr_blits: Expanded userptr test cases A set of userptr test cases to support the new feature. For the eviction and swapping stress testing I have extracted some common behaviour from gem_evict_everything and made both test cases use it to avoid duplicating the code. Both unsynchronized and synchronized userptr objects are tested but the latter set of tests will be skipped if kernel is compiled without MMU_NOTIFIERS. Also, with 32-bit userspace swapping tests are skipped if the system has a lot more RAM than process address space. Forking swapping tests are not skipped since they can still trigger swapping by cumulative effect. v2: * Fixed dmabuf test. * Added test for rejecting read-only. * Fixed ioctl detection for latest kernel patch. v3: * Use ALIGN macro. * Catchup with big lib/ reorganization. * Fixed up some warnings. Signed-off-by: Tvrtko Ursulin Reviewed-by: Brad Volkin Signed-off-by: Daniel Vetter commit a461515b334ebb7782ee15e31f943e7a6753d845 Author: Ville Syrjälä Date: Fri Apr 25 15:27:57 2014 +0300 kms_cursor_crc: Fix the test on platforms where the pipe->port mapping has restrictions On gen2 for instance the LVDS port can only be fed from pipe B. Check whether the combinations is valid before trying to run the test. Also clean up the state back to PIPE_ANY properly so that following tests can again go through all the combinations. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75131 Signed-off-by: Ville Syrjälä commit 5b90833941f17d175204041c86ad84c6662e55df Author: Ville Syrjälä Date: Fri Apr 25 13:37:09 2014 +0300 kms_cursor_crc: Wrap igt_require() in igt_fixture igt_require() must be within a fixture or subtest. Signed-off-by: Ville Syrjälä commit f688a56ee8285f6ebc416d5038eded73f04602bb Author: Ville Syrjälä Date: Fri Apr 25 13:38:31 2014 +0300 kms_cursor_crc: Replace snprintf()+%s with just %d There's no point in first printing the int to temp string using %d and then printing that out with %s. Just stick the %d into the final string. Signed-off-by: Ville Syrjälä commit fb2ccb1ade605e7c55da2ee82c9cd41d98270fa5 Author: Ville Syrjälä Date: Fri Apr 25 13:50:59 2014 +0300 kms_cursor_crc: Allow the test to run without cursor cap support Assume that only 64x64 cursor size is supported if the cursor size caps aren't supported by the kernel. This allows the test to run on older kernels. Signed-off-by: Ville Syrjälä commit f8e5a3fc7e92f67cea7c1832e786cbb344aefd5e Author: Ville Syrjälä Date: Fri Apr 25 13:49:11 2014 +0300 kms_cursor_crc: Wrap cursor fb creating into igt_fixture We don't want to attempt creating the cursor fb when enumerating subtests. So wrap it into igt_fixture. Also destroy the cursor fb after the tests. Signed-off-by: Ville Syrjälä commit f6e869732cfa054bfa218aa465b989c85a0ba489 Author: Ville Syrjälä Date: Thu Apr 24 19:07:18 2014 +0300 kms_cursor_crc: Simplify the pipe_crc mess Instead of allocating an array of igt_pipe_ctc_t objects, just allocate one and stick it into test_data. Signed-off-by: Ville Syrjälä commit aaef7ad37614f5d139b06d63b3052ae8cefe57ed Author: Antti Koskipaa Date: Thu Apr 10 15:08:12 2014 +0300 kms_cursor_crc: Add background picture This gives the cursor something to be on, instead of just a black background. Slows the test down only one second over six minutes. Signed-off-by: Antti Koskipaa commit fafcff90a870844e0febdda4066b361479df3747 Author: Antti Koskipaa Date: Thu Apr 10 15:08:11 2014 +0300 kms_cursor_crc: Add random cursor placement test Signed-off-by: Antti Koskipaa commit 470e5ce6c34731a1c76a1089dabfb6144f4f1429 Author: Antti Koskipaa Date: Thu Apr 10 15:08:10 2014 +0300 kms_cursor_crc: Add moving cursor test Signed-off-by: Antti Koskipaa commit 795eddc63967a10cc186609259f61d531e41e078 Author: Antti Koskipaa Date: Thu Apr 10 15:08:09 2014 +0300 kms_cursor_crc: Add reference software rendering This patch first render the cursor with hardware rendering and then with software, acquiring the CRC in both cases so they can be properly compared. Say goodbye to crc_must_match variable. Signed-off-by: Antti Koskipaa commit ead0173c4d14899045dfe3595b119c49229f0dc3 Author: Antti Koskipaa Date: Thu Apr 10 15:08:08 2014 +0300 kms_cursor_crc: Separate onscreen and offscreen tests Also remove onscreen boolean from parameter list. All test-related data should be put into test_data from now. Signed-off-by: Antti Koskipaa commit fe8041b8f954468acdccbba1e7ced1712cf3b629 Author: Antti Koskipaa Date: Thu Apr 10 15:08:07 2014 +0300 kms_cursor_crc: Use a function pointer to call test More tests are coming, and this allows us to not repeat the boilerplate code in run_test() for each subtest. Signed-off-by: Antti Koskipaa commit 7ec631c2426917020ab76d6d305132ab190372ea Author: Antti Koskipaa Date: Thu Apr 10 15:08:06 2014 +0300 kms_cursor_crc: Move cursor enable and disable calls where they belong We can't have the hw cursor enabled during software render tests. Signed-off-by: Antti Koskipaa [vsyrjala: collect the crc before disalbing the cursor] Signed-off-by: Ville Syrjälä commit a593d613f9ccafa5ba95ec4b9542cd00eef1cc7b Author: Antti Koskipaa Date: Thu Apr 10 15:08:05 2014 +0300 kms_cursor_crc: Remove some test cases and change cursor to color Currently this test is quite useless, since it only checks for valid CRCs when the correct output from a test is a completely black screen (invisible or visible but black cursor, or cursor is offscreen) and disables the check when anything visible is onscreen. This patch changes the cursor to a colorful one and removes the test cases that become redundant because of this change. The cursor is designed to be asymmetrical such that future tests involving rotation, mirroring, etc. produce different CRCs and failures can be detected. This (temporarily) disables CRC testing until the next patch which will add software rendering of the cursor and the CRC generation. Signed-off-by: Antti Koskipaa commit b918a3ba15b510edfeb37a375ffacd5bdb5e1410 Author: Chris Wilson Date: Fri Apr 25 07:40:34 2014 +0100 Reset errno to 0 after success errno is only valid after a syscall wrapper (e.g. ioctl()) reports an error. However, we report the last errno value as a part of the igt_assert() output and so we display spurious values such as: Test requirement not met in function gem_require_ring, file ioctl_wrappers.c:802: Last errno: 11, Resource temporarily unavailable Test requirement: (!((((intel_get_drm_devid(fd)) == 0x0102 || ... Signed-off-by: Chris Wilson commit 5d7649690c80b531a4949e275926315a749455e3 Author: Tvrtko Ursulin Date: Wed Apr 23 17:03:23 2014 +0100 benchmarks: Build them on Android. They build fine so give them some exposure. Signed-off-by: Tvrtko Ursulin Reviewed-by: Brad Volkin Signed-off-by: Thomas Wood commit dc14bf455d66a0a31253ac4fa3e024eb1e036968 Author: Tvrtko Ursulin Date: Wed Apr 23 16:07:55 2014 +0100 tests: Extract ALIGN macro into a common header Makes for a little bit less code duplication, especially since it will be used from more callers in the future. Signed-off-by: Tvrtko Ursulin Reviewed-by: Brad Volkin Signed-off-by: Thomas Wood commit e32664c8ee47d8eb01955240672a198aab7e2969 Author: Tvrtko Ursulin Date: Wed Apr 23 16:02:47 2014 +0100 tests: Skip building kms_flip_tiling on Android Dependencies are not available at the moment so it does not build. Signed-off-by: Tvrtko Ursulin Signed-off-by: Thomas Wood commit 1639022aa85e57cdf365f2be1a165263cb251ddd Author: Daniel Vetter Date: Thu Apr 24 10:43:38 2014 +0200 tests/gem_exec_params: Fix rel-constants-invalid subtest Reported by Ville and Zhao Yakui. Cc: Ville Syrjälä Cc: Zhao Yakui Signed-off-by: Daniel Vetter commit 5a8c06464e025495f0b9143dbcec76f02354d58a Author: Zhao Yakui Date: Thu Apr 24 10:15:45 2014 +0800 tests/gem_dummy_reloc_loop: Add one subtest based on multi drm_fd to test CPU<->GPU sync under multi BSD rings The Broadwell GT3 machine has two independent BSD rings in kernel driver while it is transparent to the user-space driver. In such case it needs to check the CPU<->GPU sync for the second BSD ring. V1->V2: Follow Daniel's comment to add one subtext instead of one individual test case, which is used to test the CPU<->GPU sync under multi BSD rings. V2->V3: Follow Imre's comment to remove the unnecessary initialization and use igt_assert_f instead of igt_assert Reviewed-by: Imre Deak Signed-off-by: Zhao Yakui Signed-off-by: Daniel Vetter commit ae8e646127715e816376c6324c9109331bad6503 Author: Zhao Yakui Date: Thu Apr 24 10:15:44 2014 +0800 tests: Add one ring sync case based on multi drm_fd to test ring semaphore sync under multi BSD rings The Broadwell GT3 machine has two independent BSD rings in kernel driver while it is transparent to the user-space driver. In such case it needs to check the ring sync between the two BSD rings. At the same time it also needs to check the sync among the second BSD ring and the other rings. V2->V3: Follow Imre's comment to remove the unnecessary initialization and use igt_assert_f instead of igt_assert. V3->V4: Add gem_multi_bsd_sync_loop.c into the tests/.gitignore Reviewed-by: Imre Deak Signed-off-by: Zhao Yakui Signed-off-by: Daniel Vetter commit cd3850e28e5ec83dc15462b965310794effb71b1 Author: Daniel Vetter Date: Wed Apr 23 20:23:28 2014 +0200 tests: Add gem_exec_params This fills all the gaps we've had in our execbuf testing. Overflow testing of the various arrays is already done by gem_reloc_overflow. Also add kms_flip_tiling to .gitignore. This will cause a bunch of failures since current kernels don't catch all fallout. Signed-off-by: Daniel Vetter commit 4e93890377fc1b33fbbad29759299634f0eebfa9 Author: Chris Wilson Date: Thu Apr 24 07:58:09 2014 +0100 Add gem_render_copy_redux This is an "advanced" form of the the simple gem_render_copy test. Instead of aiming for maximal simplicity to aide debugging of new rendercopy backends, this test aims to exercise the execbuf interface using the render ring. Signed-off-by: Chris Wilson commit 78e4c2b449c6d0a18e2bfaea29f3a0eadb42c5f3 Author: Ville Syrjälä Date: Wed Apr 16 17:05:43 2014 +0300 lib: Fix potential out of bounds access in ring stop code The subsequet code expects the read() to not have filled the entire buffer, and yet we allow it to do so. Reduce the size passed to read() by 1 to make the code sane. Signed-off-by: Ville Syrjälä commit 4aa2c102b933d11cc85e0dc6fe607924e248b652 Author: Ville Syrjälä Date: Wed Apr 16 17:07:07 2014 +0300 lib: Fix assert failure in ring stop code The assert in igt_set_stop_rings() is a bit bogus. Suppsoedly it was meant to assure that the caller always restores the rings to running state after stopping them. But in its current form it will trigger any time someone calls the function and the rings were already stopped. So you can't even restore the rings to running state w/o the assert triggering. Fix it up so that it'll ignore the current ring state when we're trying to restore the rings back to running state. Signed-off-by: Ville Syrjälä commit 43c2ed758fea849d666af519cd2382d6d6bc6607 Author: Ville Syrjälä Date: Mon Apr 14 16:23:18 2014 +0300 tests: Compile all the tests A bunch of the tests aren't being built due to a missing '\'. Fix it. The problem was introduced here: commit ddf8cc107e3b78e4c8200b083ed298c24eec1f03 Author: Ander Conselvan de Oliveira Date: Wed Apr 2 15:31:38 2014 +0300 test: Add test for checking if page flip changes tiling Signed-off-by: Ville Syrjälä commit 4fbd49beb94c299b38555b4ef647588fca47a388 Author: Daniel Vetter Date: Fri Apr 11 16:16:31 2014 +0200 tests/kms_flip_tiling: Fixes - Wrap up testcase correctly into the magic code block. - Put local variables out of the longjmp danger zone. Cc: Ander Conselvan de Oliveira Signed-off-by: Daniel Vetter commit ddf8cc107e3b78e4c8200b083ed298c24eec1f03 Author: Ander Conselvan de Oliveira Date: Wed Apr 2 15:31:38 2014 +0300 test: Add test for checking if page flip changes tiling Test that a page flip from a tiled buffer to a linear one works correctly. First, it sets the crtc with the linear buffer andr generate a reference crc for the pipe. Then, the crtc is set with the tiled one and page flip to the linear one issued. A new crc is generated and compared to the rerence one. Signed-off-by: Ander Conselvan de Oliveira commit cc730c418f44245c49776059b2564f54da4449e6 Author: Daniel Vetter Date: Tue Mar 11 16:14:33 2014 +0100 lib/kmstest: Fix up tiled buffer creation When extracting a raw __gem_set_tiling helper I've fumbled this in commit 590f6101402b51bca54f69c002380bda967484ea Author: Daniel Vetter Date: Wed Oct 9 20:50:50 2013 +0200 lib/drmtest: extract rawer __gem_set_tiling Fix things up so that we properly propaget the error again. Now to make this all properly work we also need to make kms_flip a notch more robust against such failures ... This only blows up on gen2/3 with the pan tests which want a too wide framebuffer for tiling. Signed-off-by: Daniel Vetter commit 99b8f807010483128f10f7934a864c78b4438b34 Author: Mika Kuoppala Date: Thu Apr 10 17:51:39 2014 +0300 tests/gem_reset_stats: fix length check in inject_hang To avoid writing past the batch end. Signed-off-by: Mika Kuoppala commit 53ad1e4a7040c57355b57fc3cdc8d9a003687a32 Author: Mika Kuoppala Date: Fri Mar 28 15:12:14 2014 +0200 tests/gem_reset_stats: check gpu state before each subtest Some tests, namely the close pending variety, tries to carefully drop all handles to gpu when hang is intruduced, to expose bugs in reset handling without any clients. Add guards after and before tests to really know if the gpu is still alive as the particular test might report success and then gpu dies few seconds after. Signed-off-by: Mika Kuoppala commit 2f2c491cf3167befe7c79e4b17afb4f6284dfc84 Author: Mika Kuoppala Date: Fri Mar 28 10:52:46 2014 +0200 lib/drmtest: don't dup quiescent fd If we dup the fd, we are in mercy of the context banning of the test application. Better to have our own to guarantee that gem_quiescent_gpu won't find itself banned on exit. Signed-off-by: Mika Kuoppala commit d983a47f1470cbea8388864537dbe5aff5575df6 Author: Mika Kuoppala Date: Tue Mar 25 12:52:19 2014 +0200 tests: use lib igt_[get|set]_stop_rings() on gem_reset_stats, kms_flip and pm_rps. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75876 Signed-off-by: Mika Kuoppala commit bfa6fa9a4bfdd7988a1ed68c9c97f9cc53d0f50c Author: Mika Kuoppala Date: Tue Mar 25 12:21:44 2014 +0200 lib: add igt_get_stop_rings and igt_set_stop_rings Multiple tests are introducing hangs by fidding with i915_ring_stop debugfs entry. Signed-off-by: Mika Kuoppala commit 1c7ca57e531315f78f8ea3b9dce7bd92d7d79f64 Author: Mika Kuoppala Date: Thu Apr 10 16:06:27 2014 +0300 tests/gem_reset_stats: end hanging batch properly As we use chained batch into itself to hang the gpu, there was no need to end the batchbuffer with BATCH_BUFFER_END. With the introduction of command parser, the batch need to have proper BATCH_BUFFER_END in it or it will be rejected. While at it, shift the upper half of batch gtt_offset accordingly with gen8+ Signed-off-by: Mika Kuoppala commit f74c443925578b377c47d655a2d864b8ed521330 Author: Brad Volkin Date: Thu Mar 27 11:44:45 2014 -0700 tests/gem_exec_parse: Test for OACONTROL tracking Signed-off-by: Brad Volkin Signed-off-by: Daniel Vetter commit 9eec5b0f11d864c986511db07d447e379bcef696 Author: Chris Wilson Date: Mon Apr 7 13:10:41 2014 +0100 gem_tiled_swapping: Test using all available fences Use extra threads to cause extra memory pressure and stress upon the relevant code. Limit the number of threads to available fences to avoid falling off the fence cliff. Signed-off-by: Chris Wilson commit ff7806e52c4e9b7c522e59ba8514c5c6e3fa8683 Author: Chris Wilson Date: Mon Apr 7 13:09:46 2014 +0100 gem_tiled_swapping: Purge all page/swap caches first Reset the system to a vanilla state before we query how much RAM/swap space is available for our testing. Signed-off-by: Chris Wilson commit 5d607a744f3df07235355ebcb5376e2464e2f4b1 Author: Chris Wilson Date: Mon Apr 7 12:07:14 2014 +0100 intel-gpu-overlay: Update debugfs path for min/max frequency Signed-off-by: Chris Wilson commit 574d62db398af45a8cb1d38fd77dd50bd645149b Author: Paulo Zanoni Date: Fri Apr 4 13:24:53 2014 -0300 tools/intel_reg_dumper: use haswell_debug_regs on BDW too Instead of using an older set of registers. Signed-off-by: Paulo Zanoni commit 1fd9fc00127026b56dbd5cea323a63bdd4e69706 Author: Paulo Zanoni Date: Fri Apr 4 13:22:56 2014 -0300 tests/pm_pc8: skip tests when no screens are connected Instead of failing, just skip the tests. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73642 Signed-off-by: Paulo Zanoni commit abba92d9cff1ab9a3b492f9742e8cd1b3f669800 Author: Paulo Zanoni Date: Mon Mar 31 17:01:59 2014 -0300 tests/pm_pc8: add missing newline Otherwise the output will get even more confusing. Signed-off-by: Paulo Zanoni commit d6362ce8a81a40bc30e1e7b34d14c27f7bfcd954 Author: Daniel Vetter Date: Thu Apr 3 18:03:21 2014 +0200 tests/gem_cmd_parse: restrict to gen7 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76982 Signed-off-by: Daniel Vetter commit e8869c4bc439de941be399d156323620a2d6ecda Author: Chris Wilson Date: Thu Apr 3 09:43:58 2014 +0100 gem_tiled_swapping: Limit to available memory If there is not enough free RAM+swap for us to execute our test, we will hit OOM, so check first. Signed-off-by: Chris Wilson commit b8afe98004ed0e082bf5d019a86f27a5909f0e4d Author: Mika Kuoppala Date: Wed Apr 2 15:13:21 2014 +0300 lib/rendercopy: fix alloc len for gen7_bind_buf Fortunately saved by the alignment. Reviewed-by: Chris Wilson Signed-off-by: Mika Kuoppala commit d4933259b84a304145634cc6ec5d9eebeb612711 Author: Thomas Wood Date: Wed Apr 2 11:41:43 2014 +0100 tests: create files that list the available tests Add Makefile targets to create two text files containing the list of available single and multi-test programs. This enables the tests to be enumerated without requiring the build system. Signed-off-by: Thomas Wood Signed-off-by: Daniel Vetter commit 22bc1a287eb6c0e7b89001424c895dd776f9a28b Author: tgore Date: Mon Mar 31 11:55:40 2014 +0100 intel-gpu-tools: avoid include of cairo.h on Android builds A recent commit means igt_debugfs.c now needs to include igt_kms.h, which in turn includes igt_fb.h and hence cairo.h. We need to avoid this inclusion of cairo.h when building for Android, (until we have a cairo port) so I have added a #ifndef around it. Signed-off-by: Tim Gore Signed-off-by: Daniel Vetter commit 4fdca96066e36cb4d41019e58c8387e0a5e0f2f5 Author: Daniel Vetter Date: Fri Mar 28 17:54:58 2014 +0100 tools/quick_dump: Fix make distcheck Someone really needs to fix this Makefile ... Signed-off-by: Daniel Vetter commit e599ff443cdcd90399666dc75226d73a943cc89f Author: tgore Date: Fri Mar 28 12:54:59 2014 +0000 intel-gpu-tools: fix some include path problems on android builds When building within the android tree (specifically in /external) the compilation fails due to the wrong versions of some header files getting picked up. This commit adds some include paths to ensure the correct headers are found Signed-off-by: Tim Gore Signed-off-by: Daniel Vetter commit a96c6340768772590cf548ed8b81a10877fc7b43 Author: tgore Date: Fri Mar 28 12:54:58 2014 +0000 intel-gpu-tools: fix problem with redefinition of mmap64 In android builds there is no reliable way to determine if mmap64 is defined or not, and this sometimes leads to a compile error due to its re-defnition. So this commit avoids its use altogether in intel-gpu-tools for Android builds, unless the HAVE_MMAP64 macro is defined. Signed-off-by: Tim Gore Signed-off-by: Daniel Vetter commit 798fca377a0e26cffb40e5a97230baaac4b12733 Author: Daniel Vetter Date: Thu Mar 27 23:04:02 2014 +0100 README: update piglit cmd Pointed out by Jesse. Signed-off-by: Daniel Vetter commit 2031da4073da0dc09ed9debb319e924ae5dc8b2a Author: Jesse Barnes Date: Thu Mar 27 11:10:18 2014 -0700 intel_infoframes: remove bogus "being transmitted" check from VLV This bit is reserved on VLV. commit c1c96d8342ee2d629d09a2be576d5bf984e9228b Author: Jesse Barnes Date: Thu Mar 27 11:01:06 2014 -0700 intel_infoframes: add VLV support Different reg offsets and such. commit 47c551bd700b50fded87ccf81384fb2e384e5f6b Author: Ben Widawsky Date: Thu Mar 27 09:56:59 2014 -0700 quick_dump: Put the cairo cflags with the other cflags. I had been hoping we can avoid linking against cairo, but alas it was not meant to be. Signed-off-by: Ben Widawsky commit 9048aa1974aee567617220f9685ad115be0cbae7 Author: Daniel Vetter Date: Wed Mar 26 22:57:52 2014 +0100 tools/quick_dump: re-apply ducttape Someone with actual automake-fu really needs to fix this up for real since compiling a bunch of source files again, with broken dep tracking even just because we can't link against a .la somehow really isn't too awesome. Signed-off-by: Daniel Vetter commit 961a46c82b4fe558ea726833aa9d390382742a10 Author: Daniel Vetter Date: Wed Mar 26 22:15:12 2014 +0100 tests/pm_rps: Add a new testcase to provoke the "stuck at max" bug Note that the sleep(5); to fully idle the gpu is _really_ important. Without it the bug is not exhibited. The issue at hand is that after gem_quiescent_gpu we are at max (expected, since the blocking waits peg to max), but then we never go down to a lower freq again until we're fully idle. The tiny load is sufficient to keep the gpu at max. I've played around with this a bit and even ridiculously low loads (like one MI_STORE per 50ms) are enough to keep the gpu at max freq. Signed-off-by: Daniel Vetter commit 669a2fca6c5ccd256d2d767107963840f7de438e Author: Daniel Vetter Date: Wed Mar 26 21:30:17 2014 +0100 tests/pm_rps: quiescent harder Apparently some rps chips are prone to stick to max once you're there. And all the synchronous waits in gem_quiescent_gpu are _really_ good at forcing the kernel to go full throttle. And even a positively tiny load (one MI_STORE_IMM per 50 ms) is enough to eternally keeep it there, which means the first idle measurement of the freqs before we do the reset it completely busted. Just add a wait before the tricky test and call it a day. Option b) would have been to now have this tiny load, but I think a good reminder how quirky rps is is always welcome. Just in case we start sleeping too easy at night. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74956 Signed-off-by: Daniel Vetter commit 896b550984cf3ffd0fa67051d5b9cf0239634894 Author: Damien Lespiau Date: Mon Mar 24 18:42:39 2014 +0000 rendercopy/gen8: Remove a hole in struct gen8_blend_state Using uint64_t in that second member makes it aligned to 64bits, while the first member is only 32bits. We then had a 32bits hole in there! Found-by: Chris Wilson Cc: Ben Widawsky Cc: Rafael Barbalho Tested-by: Rafael Barbalho Signed-off-by: Damien Lespiau commit 7255a84c9c8f4d46b47d490331100a11179180a1 Author: Jesse Barnes Date: Wed Mar 26 11:02:48 2014 -0700 testdisplay: make termio unbuffered So hotkeys take effect immediately. commit 3d9e63f2ad0c676b3efba4c854ef645ae60ee7e1 Author: Daniel Vetter Date: Wed Mar 26 16:37:15 2014 +0100 lib/igt_fb: api documentation Also realign function parameters and replace abort() with igt_fail() while at it. v2: Forgotten to add a nice intro. Signed-off-by: Daniel Vetter commit 7568edf4b1dd0f8c1b061a2bb53d593ff9d4d33d Author: Daniel Vetter Date: Wed Mar 26 16:36:46 2014 +0100 lib/igt_fb: setup font in igt_get_cairo_ctx We always want the same boring one, so extract it. Signed-off-by: Daniel Vetter commit ae461e67e8816aa7cd80791216a839d92e04f0e5 Author: Daniel Vetter Date: Wed Mar 26 16:09:27 2014 +0100 lib/igt_fb: drop kmstest_ prefix from static functions Signed-off-by: Daniel Vetter commit c6c2b2bb7039e8cc89841bd9782a61b7d734dfe2 Author: Daniel Vetter Date: Wed Mar 26 15:15:49 2014 +0100 lib/igt_kms/bf: doc skeleton igt_kms docs are just skeleton and also added igt_fb to make sure the linking works correctly. Next up: Actually documenting igt_fb. Also fix that depency spelling fumble I've copied around to a few too many places. Signed-off-by: Daniel Vetter commit 64401f57e958998d537ff67525d5f1e9a4f76b22 Author: Daniel Vetter Date: Wed Mar 26 10:19:42 2014 +0100 lib: fold igt_display into igt_kms For 1 function and 2 types we kinda don't need separate files. Especially now that igt_kms is much more focused on the actual modeset stuff with all the framebuffer helpers extracted to igt_fb. Signed-off-by: Daniel Vetter commit 9aea7ae541212e4116af8d5d922d7cbcc571df50 Author: Daniel Vetter Date: Wed Mar 26 09:18:11 2014 +0100 lib/igt_fb: switch to igt_ prefix from kmstest_ Shorter and more in line with our general igt_ prefix for everything which isn't somehow intel or i915-gem or otherwise hw specific - these helpers here are all fully generic framebuffer handling functions based on kms + cairo. Well, the actual buffer alloc is done with i915 gem, but meh ;-) Two special cases: - bpp_depth_to_drm_format and drm_format_to_bpp completely lacked prefixes, so just add igt_. - write_fb was a bit misleading given that we have gem_write for uploading to buffers. Rename that to write_fb_to_png to make it crystal clear what this thing does even without looking at docs. Signed-off-by: Daniel Vetter commit 57d7db8cf8c407541d1ed57348a6f468c2b73577 Author: Daniel Vetter Date: Wed Mar 26 09:06:11 2014 +0100 lib: extract igt_fb library Stuff all the framebuffer creation, cairo and drm fourcc format handling in there. This gives us a very clear cut in the headers where igt_fb.c only needs to include igt_fb.h, and igt_kms.c includes both (well igt_kms.h pulls in igt_fb.h since we always need this). The aim here is to add api docs for igt_fb since that part of the kms library seems fairly stable already, while all the mode setting and iteration is still a bit in flux. Signed-off-by: Daniel Vetter commit 0b3019733bce0eb7ec4bce39e4ee470f98639c36 Author: Daniel Vetter Date: Sun Mar 23 16:53:49 2014 +0100 gitignore: Add logfiles from make check A bit annoying to see this stuff around in git status, so exclude it. Signed-off-by: Daniel Vetter commit ef107940bb1f1aaa8608d5c7f6840a9990706dec Author: Daniel Vetter Date: Sun Mar 23 16:53:14 2014 +0100 lib/igt_kms: make kmstest_get_cairo_surface static Only used internally in igt_kms.c. Signed-off-by: Daniel Vetter commit 2fc2fa547190f1ba6083ffab67f9ebfb077a544d Author: Daniel Vetter Date: Sun Mar 23 16:52:49 2014 +0100 lib/igt_kms: s/kmstest_create_fb2/kmstest_create_fb/ Simplify the name since the old _fb function is now gone. Signed-off-by: Daniel Vetter commit 70182167d6d39e18d03109687918752d04165c32 Author: Daniel Vetter Date: Sun Mar 23 16:36:40 2014 +0100 lib: remove kmstest_create_fb Use the new-style function using drm fourcc codes instead everywhere. To easily use thew fourcc based interface also expose bpp_depth_to_drm_format from the library. Finally include drm_fourcc.h from the igt_kms.h header since pretty much everyone needs this now. Signed-off-by: Daniel Vetter commit 288e80f2788153cefda271e3847c82af3f40791c Author: Daniel Vetter Date: Sun Mar 23 16:24:38 2014 +0100 lib/igt_aux: Lost doc polish hunk. Oops. Signed-off-by: Daniel Vetter commit 785a0cd4ba8bf7e89dc91fdc6c2fbe2e78d26f5b Author: Ben Widawsky Date: Tue Mar 25 11:35:23 2014 -0700 quick_dump: Fix the danvet fallout. quick_dump built fine, but it could actually run, since a lot of the linking happens at run time. There is one hack where we redefine the environment stuff, since depending on igt_aux means we have to pull in libdrm, which I do not want to do. Cc: Ville Syrjälä Signed-off-by: Ben Widawsky commit db25973c8651052dc2fd024ab67a8cea878aedc4 Author: Mika Kuoppala Date: Wed Mar 26 17:24:43 2014 +0200 lib/intel_batchbuffer fix OUT_RELOC doc tag Signed-off-by: Mika Kuoppala commit 71c6f87eb3dacffbd489c83acfe95baf613d20cb Author: Daniel Vetter Date: Wed Mar 26 15:09:23 2014 +0100 lib/igt_core: fix igt_skip_on_simulation regression I've forgotten that we might want to call this from within specific subtests (or special helpers like the autoresume one). Also props for being competent enough to write a testcase, but incompetent enough to botch the job up. Fix both things and remove a leftover debug printf while at it. Signed-off-by: Daniel Vetter commit c8190147526000bc002c611bd3612caf2de22bf8 Author: Daniel Vetter Date: Tue Mar 25 17:46:32 2014 +0100 README: document quirks for regenerating gtk-doc It sucks a bit atm :( Signed-off-by: Daniel Vetter commit 05f6a35d40a9374ea560c88c2b12a715eb404261 Author: Daniel Vetter Date: Tue Mar 25 14:23:20 2014 +0100 tests/gem_exec_parse: fixups for the recent massive refactoring I think we might have some use for a do_ioctl_expected_errno or some such thing. But that's for later. Cc: Brad Volkin Signed-off-by: Daniel Vetter commit 6bf7307d8d5e0f1581cc3856528f7f49ef552036 Author: Brad Volkin Date: Wed Jan 29 13:58:30 2014 -0800 tests/gem_exec_parse: Test a command crossing a page boundary This is a speculative test in that it's not particularly relevant today, but is important if we switch the parser implementation to use kmap_atomic instead of vmap. Signed-off-by: Brad Volkin Signed-off-by: Daniel Vetter commit 56fee51b3140d33824bafc79c86c5c38346807cc Author: Brad Volkin Date: Wed Jan 29 13:58:29 2014 -0800 tests/gem_exec_parse: Test for batches w/o MI_BATCH_BUFFER_END Signed-off-by: Brad Volkin Signed-off-by: Daniel Vetter commit 1f3e03bee3af336c6b7b47e04e9f0a552a9a9289 Author: Brad Volkin Date: Wed Jan 29 13:58:28 2014 -0800 tests/gem_exec_parse: Add tests for bitmask checks Signed-off-by: Brad Volkin Signed-off-by: Daniel Vetter commit 1b1321cde7b60d413b425f358e6ecd2bd47b90fb Author: Brad Volkin Date: Wed Jan 29 13:58:27 2014 -0800 tests/gem_exec_parse: Add tests for register whitelist Signed-off-by: Brad Volkin Signed-off-by: Daniel Vetter commit 59cb7e105e0ba3d4b1c3a378d962ec270eaa3700 Author: Brad Volkin Date: Wed Jan 29 13:58:26 2014 -0800 tests/gem_exec_parse: Add tests for rejected commands Signed-off-by: Brad Volkin Signed-off-by: Daniel Vetter commit e8b4ecd387ec12fb6ef28fd64307688f70ea1d92 Author: Brad Volkin Date: Wed Jan 29 13:58:25 2014 -0800 tests: Add a test for the command parser Start with a simple testcase that should pass. v2: Switch to I915_PARAM_CMD_PARSER_VERSION Signed-off-by: Brad Volkin Signed-off-by: Daniel Vetter commit 49c611b5900fbc1a88b7dd59eb42458c090b25d0 Author: Mika Kuoppala Date: Mon Mar 17 19:09:23 2014 +0200 tests/gem_reset_stats: run non hw context tests also on older gens To gain more coverage on interface, default context and banning. As there is no proper reset support for gen <= 3, we only do limited interface testing on those. Signed-off-by: Mika Kuoppala Signed-off-by: Daniel Vetter commit 7a8109458ef92c6460852e3831aa30e53fef6857 Author: Daniel Vetter Date: Fri Mar 14 16:47:50 2014 +0100 tests/pm_rps: fixup the blt copy load helper changes All suggested by Jeff McGee. Signed-off-by: Daniel Vetter commit 816c94723632b4876b3b0b965009ceab5e8bec2b Author: Daniel Vetter Date: Sun Mar 23 15:14:16 2014 +0100 lib/intel_batchbuffer: document header dependencies At least with the core library headers the situation is now fairly sane. There's still fun stuff going on around *_reg.h and most of the source files just have a cargo-culted list of headers ... Signed-off-by: Daniel Vetter commit 187b66da0946bd213cfb8c52178d70739707cad9 Author: Daniel Vetter Date: Sun Mar 23 15:03:14 2014 +0100 lib/drmtest: api documentation Also rename the arguments of do_ioctl a bit for better clarity. I haven't figured out a way to reference other section headers, hence the links to igt_core and intel_batchbuffer are a bit fragile unfortunately. It gets the job done though. Signed-off-by: Daniel Vetter commit 7bb40944e2b2a92f6f52c288f8a88b0fcd14b991 Author: Daniel Vetter Date: Sun Mar 23 14:45:13 2014 +0100 lib: Use @include tag for include files Occasionally useful to read documentation ... Signed-off-by: Daniel Vetter commit 8221fda087e5c445ddda2bf38c09c49c4d27a7fe Author: Daniel Vetter Date: Sun Mar 23 14:38:17 2014 +0100 lib: s/igt_env_set/igt_check_boolean_env_var So I wasn't really happy with env_set since it's way too close to setenv(), whic actually _sets_ and environment variable. So use check instead of set as the verb (well adjective for env_set). Also sprinkle in some hints that we talk about a boolean setting here. Signed-off-by: Daniel Vetter commit 47575c7710b2cc14f4b96de71540375e0c1d43b4 Author: Daniel Vetter Date: Sun Mar 23 14:18:23 2014 +0100 lib/igt_aux: api documentation I'm not really happy with the name of the igt_env_set function, I'll follow up with a patch to change it. Signed-off-by: Daniel Vetter commit f5daeec724aea1613334f14d58b101a5c8e430b4 Author: Daniel Vetter Date: Sun Mar 23 13:35:09 2014 +0100 lib: extract igt_aux.[hc] And shovel all the various helpers in there. Also move igt_set_vt_graphics_mode to igt_kms.h since the function is implemented in igt_kms.c. And it fits better. I kinda missed this in the prep work. Signed-off-by: Daniel Vetter commit 018f8c3c457d1609b18867a48a512e3639979dc9 Author: Daniel Vetter Date: Sat Mar 22 22:42:35 2014 +0100 lib: s/drmtest_dumb_aub/igt_aub_dump_enabled/ This is prep work to extract a new igt aux library with all kinds of random stuff. Also give it a bit a more suitable name to indicate that this is just a flag and doesn't do the aub dumping itself. Signed-off-by: Daniel Vetter commit 95e89f0ede9ed84b5cd0c39b7f68bc08fb120c3b Author: Daniel Vetter Date: Sat Mar 22 22:41:28 2014 +0100 lib/intel_io: api documentation As usual de-inline functions for gtkdoc to see them. I've decided to exclude the register map stuff since that's not terribly interesting. Aside: gtkdoc falls over when the title of a section contains a slash, hence why it reads "IO" instead of "I/O". The fun ... Signed-off-by: Daniel Vetter commit 2d4656fb699dd9bc5329b69b2955a6e4c3753971 Author: Daniel Vetter Date: Sat Mar 22 22:23:04 2014 +0100 lib/intel_io: rename mmio setup functions Makes their intent a bit clearer. Signed-off-by: Daniel Vetter commit c03c6ceb293fd667a6b582377c182dfc3b6d0f32 Author: Daniel Vetter Date: Sat Mar 22 21:34:29 2014 +0100 lib: rename intel_gpu_tools.h to intel_io.h With the header cleanup we can now give this header a suitable name, since it now really only contains register access and other I/O functions and assorted definitions. Signed-off-by: Daniel Vetter commit 254f19ba8dc4b00d0d5df0a4f8d0a0cb104b2df5 Author: Daniel Vetter Date: Sat Mar 22 21:29:01 2014 +0100 lib: unnecessary header removal for drmtest.h, part 2 I've left unistd.h in it - it's not strictly required but most users of drmtest.h want it for the open helpers, and then you kinda need to close that file descriptor again ... Signed-off-by: Daniel Vetter commit e49ceb869056255b8b6b94720b2279f6de88c893 Author: Daniel Vetter Date: Sat Mar 22 21:07:37 2014 +0100 lib: unnecessary header removal for drmtest.h, part 1 Brought a few missing headers to light in ioctl_wrappers.h, too. Signed-off-by: Daniel Vetter commit 924115bfcd5beae84f2e2d6b266c619659185475 Author: Daniel Vetter Date: Sat Mar 22 20:18:51 2014 +0100 lib: more unecessary header removal This time big with media_fill.h Signed-off-by: Daniel Vetter commit 6cfcd715898198cbd8edd955ed24cf57f6e8d9ee Author: Daniel Vetter Date: Sat Mar 22 20:07:35 2014 +0100 lib: remove uncessary #includes from headers Only include what the header itself needs. The big fish here is intel-gpu-tools.h. More will follow. One ugly thing removed here is the duplicated GEN6_TD_CTL #define, one of which was broken. Signed-off-by: Daniel Vetter commit cd6d5a61b334aac183c85a3d2289f96a0364e911 Author: Daniel Vetter Date: Sat Mar 22 19:35:40 2014 +0100 lib: add #include "foo.h" lines like in manpages Should help in alleviating the header mess we have atm. Signed-off-by: Daniel Vetter commit 0e22f14ed642af94db5f0dd7461920274be3361a Author: Daniel Vetter Date: Sat Mar 22 19:27:04 2014 +0100 tests|lib: remove assert.h includes Only the igt core and non-test tools should have asserts to catch internal errors, tests and helper libraries should all user igt_asert instead. Fix things up where assert instead of igt_assert was used. One tiny step towards header sanity. Signed-off-by: Daniel Vetter commit bff22f7317a39605d53cf142e2c0f5c424d9c12c Author: Daniel Vetter Date: Sat Mar 22 19:21:26 2014 +0100 lib: Move non-register things out of intel-gpu-tools.h Right now almost everything in there concerns itself with register access. Move everything else out (into drmtest.h for lack of better place) to prepare for api documentation. Also rename intel_drm.c to intel_os.c since it contains OS, not drm abstractions. Signed-off-by: Daniel Vetter commit 7754c4dd769e61ea57bf3e4ab635099b47aa6223 Author: Daniel Vetter Date: Sat Mar 22 18:16:30 2014 +0100 lib/intel_batchbuffer: api documentation for render copy/media fill Also fix a fumble in the documentation for intel_blt_copy. One thing we might want to do is unify the parameter ordering here a bit ... Again gtkdoc fails to pick up the documentation for struct igt_buf :( Signed-off-by: Daniel Vetter commit 43b7aa44fdc8dee372f6d0766e953da0a36de25a Author: Daniel Vetter Date: Sat Mar 22 18:04:52 2014 +0100 lib/intel_batchbuffer: drop cpu_mapping from igt_buf It's unused. There's still num_tiles getting in the way of things, but that is used by gem_stress a bit. Signed-off-by: Daniel Vetter commit 53a4d9e982420e8a921ecf7b9542adbd3586317c Author: Daniel Vetter Date: Sat Mar 22 15:49:02 2014 +0100 lib/intel_batchbuffer: igt_ prefix for rendercopy/mediafill funcs Now everything is prepared to pour some neat api docs over this all. Signed-off-by: Daniel Vetter commit 83a4c7d3eb6347f9b743144611b08a2869f11f94 Author: Daniel Vetter Date: Sat Mar 22 15:44:48 2014 +0100 lib/intel_batchbuffer: igt_ namespace for the buffer structure Step one to properly namespace the rendercpy/mediafill functions. Als give the buf_height/width helpers a proper igt_ prefix. Signed-off-by: Daniel Vetter commit 82c6dffe9fdc75a7ef3b9a7e53e1c20d8a9b3703 Author: Daniel Vetter Date: Sat Mar 22 15:41:42 2014 +0100 lib/intel_batchbuffer: un-inline buf_height/width gtkdoc won't pick them up otherwise. Signed-off-by: Daniel Vetter commit aaebbc513a2f1fd94e9db5fc2841c2bd617e3472 Author: Daniel Vetter Date: Sat Mar 22 15:35:16 2014 +0100 lib: make media_fill.h an internal header Same deal as with rendercopy.h. Signed-off-by: Daniel Vetter commit 7dc0001f3db58af82f7e34c83a9fdb5fe90baccd Author: Daniel Vetter Date: Sat Mar 22 15:31:15 2014 +0100 lib: make rendercopy.h an internal header And move the public interfaces into intel_batchbuffer.[hc]. A bit messy since we are fairly inconsistent with our header #include handling. Also exclude rendercopy.h from the documentation. Signed-off-by: Daniel Vetter commit a8e8654f81380c19f7c90479f98b9d9314f638b3 Author: Daniel Vetter Date: Sat Mar 22 15:12:57 2014 +0100 lib/intel_chipset: api docs Unfortunately gtkdoc doesn't pick up the intel_pch enum. Signed-off-by: Daniel Vetter commit 266b26b3eda733dcc2c0a7cc6061b024a0dede70 Author: Daniel Vetter Date: Sat Mar 22 14:59:58 2014 +0100 lib/intel_chipset: intel_ prefix for pch global Just a bit better namespacing. Signed-off-by: Daniel Vetter commit aed95c390ae834a1661fb1e4ec433177b1c01fcc Author: Daniel Vetter Date: Sat Mar 22 14:54:28 2014 +0100 lib: consolidate chipset helpers in intel_chipset.[hc] Signed-off-by: Daniel Vetter commit 94e1b6af99b3548014686a0943bb286e3c81a889 Author: Daniel Vetter Date: Sat Mar 22 14:45:50 2014 +0100 lib: rename intel_pci.c to intel_chipset.c This is to consolidate all the chipset related functions to intel_chipset.[hc]. Unfortunately we need to rename a wrapper lib file in quick_dump, too. And quick_dump makes automake a bit unhappy apparently. Signed-off-by: Daniel Vetter commit 52edf3a17714e1ba2a9060401ec0f63614bc632b Author: Daniel Vetter Date: Sat Mar 22 14:45:54 2014 +0100 tests/kms_cursor_crc: Fix up breakage I've accidentally broken the new cursor size extensions, but it wasn't quite correct before already: Variables which are set in igt_fixtures _must_ be outside of the stackframe of the igt_fixture block. Signed-off-by: Daniel Vetter commit a388f3b98f039403a4583748db980d4a44dd6748 Author: Daniel Vetter Date: Sat Mar 22 13:22:11 2014 +0100 lib: allow igt_skip_on_simulation outside of fixtures. Thomas noticed that in simulation mode a lot of the tests fall over instead of skipping properly. This is due to recently added self-checks which ensure that any call to igt_skip happens either within a fixture or subtest block (or it's a simple test without subtests). This is to catch bugs since pretty much always not wrapping up hardware setup and checks into these blocks is a bug. Bug simulation skipping is a bit different, so allow that exception. Otherwise we'd need to fix up piles of tests (and likely need to play a game of whack-a-mole). Also add a library testcase for all the different variants to make sure it really works. Cc: Thomas Wood Cc: Ben Widawsky Signed-off-by: Daniel Vetter commit c196c14319b8aae6369a9ce0ba349416847105a7 Author: Damien Lespiau Date: Fri Mar 21 14:36:54 2014 +0000 build: Define enable_gtk_doc when the m4 macro is missing For setups where we don't have gtk-doc installed, ie when the GTK_DOC_CHECK macro doesn't expand, we still need to populate the enable_gtk_doc variable to provide a value to the configure summary. Acked-by: Daniel Vetter Signed-off-by: Damien Lespiau commit 20dbc5d4cfb51152278a2ad4627d1db102bf9225 Author: Adrian Negreanu Date: Fri Mar 21 09:06:15 2014 +0200 fix out-of-tree builds version.h is -include-ed assuming that builddir is the same as srcdir; In file included from :0:0: ./../../tests/../lib/check-ndebug.h:3:1: fatal error: ../../tests/../version.h: No such file or directory #endif ^ v2: Use top_builddir as suggested by Damien - builddir gets expanded to ./ which worked accidentally since automake includes top_builddir by default. Signed-off-by: Adrian Negreanu (v1) Signed-off-by: Daniel Vetter commit 701a755bde7a6f4b3973ac76f4f00c8702db4c7d Author: Daniel Vetter Date: Thu Mar 20 17:31:16 2014 +0100 tests/kms_cursor_crc: Review from Imre for Sagar's patch Signed-off-by: Daniel Vetter commit ba3a1a86b76d0648a341de4e86c84d2e2a515c51 Author: Sagar Kamble Date: Tue Mar 18 15:59:43 2014 +0530 kms_cursor_crc: Enabling this test for all cursor sizes v1: Added 128x128 and 256x256 cursor size support. v2: Refined the test to use igt_subtest_f and automate enumeration. v3: Restructuring test enumeration using drmGetCap. [Daniel's review comments] Signed-off-by: Sagar Kamble Reviewed-by: Imre Deak Signed-off-by: Daniel Vetter commit cde058ae355f47a2bf04a792bfb3647e95157397 Author: Rodrigo Vivi Date: Tue Mar 18 11:18:56 2014 -0300 tests/gem_gtt_hog: Fix for BDW Update XY_COLOR_BLT command for Broadwell. v2: stash devid and remove ugly double allocation. (by Chris). v3: fix inverted blt command size and stash fd, devid and intel_gen. v4: improved len calculation and noop between blt commands. (by Chris). Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=73724 Cc: Chris Wilson chris@chris-wilson.co.uk> Signed-off-by: Rodrigo Vivi Signed-off-by: Ben Widawsky commit d8164356e7bd4a90b2292e3687ec5fa5ec7fd021 Author: Rodrigo Vivi Date: Tue Mar 18 11:18:55 2014 -0300 tests/gem_gtt_hog: Use XY_COLOR_BLT instead of COLOR_BLT. Signed-off-by: Rodrigo Vivi Signed-off-by: Ben Widawsky commit 2f96726c960dd2e4700214d30ccb86d33b354d2d Author: Rodrigo Vivi Date: Tue Mar 18 11:18:54 2014 -0300 tests/gem_wait_render_timeout: Fix for BDW Update XY_COLOR_BLT command for Broadwell. Signed-off-by: Rodrigo Vivi Signed-off-by: Ben Widawsky commit 3e6d9d912aabacc3c07b6d97dde862d8f51fbf6e Author: Rodrigo Vivi Date: Tue Mar 18 11:18:53 2014 -0300 tests/gem_wait_render_timeout: Use XY_COLOR_BLT instead of COLOR_BLT. Signed-off-by: Rodrigo Vivi Signed-off-by: Ben Widawsky commit e8562b30819e6554b4cdd5763a35069fba77c2a9 Author: Ben Widawsky Date: Wed Mar 19 11:40:58 2014 -0700 gem_wait_render_timeout: use igt_assert_cmpint Signed-off-by: Ben Widawsky commit 5a5880426eb275bb600551460eb23ad44e8c2fbf Author: Ben Widawsky Date: Wed Mar 19 10:14:15 2014 -0700 Revert "gen8 rendercpy: temporarily disable" This reverts commit e41928e6c9bb3f24833a827903f1afeda83592d6. commit d92c2cf1deafe1cb2404844b52c17817e0e1ba56 Author: Ben Widawsky Date: Wed Mar 19 09:22:53 2014 -0700 intel_gtt: Dump the whole GTT The tool formerly only dumped the aperture size, which is fine, but not everything interesting. Most of the patch is just the variable rename. The real work happens with using the BAR0 size divided by 2 instead of the BAR2 size. Signed-off-by: Ben Widawsky commit 00bd3eba11de4ce4a7dacc62f131b401f7dfbabc Author: Ben Widawsky Date: Wed Mar 19 09:17:36 2014 -0700 quick_dump: gen8 private PAT Signed-off-by: Ben Widawsky commit 10571b8ccb5f7bda61e3072705e5d0670f54afb3 Author: Daniel Vetter Date: Sun Mar 16 19:34:37 2014 +0100 lib/igt_core: Document library design best practices This is what I've been doing in the past few months when refactoring i-g-t code. More ideas and also patterns to add highly welcome. v2: Some minor polish on the text and add another bullet to reference the kernel's coding style. Signed-off-by: Daniel Vetter commit 3ea97f2e51e8bf39ecabae132cdc6b431c72f672 Author: Daniel Vetter Date: Sun Mar 16 18:56:14 2014 +0100 lib/igt_core: Small api doc fix Signed-off-by: Daniel Vetter commit f2e5dc0114f0045e28d7a562cec9daf23e978841 Author: Daniel Vetter Date: Sun Mar 16 15:09:22 2014 +0100 lib/igt_debugfs: s/igt_pipe_crc_check/igt_require_pipe_crc/ Functions which provide feature checks through igt_skip should be of the form _require_. Otoh feature checks which return in a boolean whether the feature is available should be of the form _has_, e.g. gem_has_blt. Signed-off-by: Daniel Vetter commit dcf947aa4f2de2f3aa4766e0e3d31d2a992d3d84 Author: Daniel Vetter Date: Sun Mar 16 14:52:32 2014 +0100 lib/igt_debugfs: Remove igt_debugfs_init And also move the igt_debugfs_t type out of the headers. Signed-off-by: Daniel Vetter commit cc8f0e6e3ab72beb6b296dd866fd27842dec283f Author: Daniel Vetter Date: Sun Mar 16 14:49:35 2014 +0100 lib/igt_debugfs: Remove debugfs from pipe crc functions All tests have now lost explicit references to igt_debugfs_t! Signed-off-by: Daniel Vetter commit 9a7609a8e48ac69bfd786087abd18c8a858d6ad3 Author: Daniel Vetter Date: Sun Mar 16 14:46:39 2014 +0100 lib/igt_debugfs: Remove debugfs from igt_debugfs_fopen Also add a missing igt_assert to kms_fbc_crc and again add the missing Returns: section to the api doc. Signed-off-by: Daniel Vetter commit f04f17bcd404d7be720148fee6bb425cdb41dab1 Author: Daniel Vetter Date: Sun Mar 16 14:41:25 2014 +0100 lib/igt_debugfs: Remove debugfs from igt_debugfs_open Also update the api docs a bit since the Returns: section was missing. v2: Readd the accidentally lost line for @filename. Signed-off-by: Daniel Vetter commit 28b6e41142c035b46d2784de399c5dadfa5ce429 Author: Daniel Vetter Date: Sun Mar 16 14:40:32 2014 +0100 lib/igt_debugfs: implement a singleton igt_debugfs_t instance Allows us to remove every so little bit of boilerplate from tests, once it's all rolled out. Signed-off-by: Daniel Vetter commit 8fe0c50871b0af87c5f41a6b6d3b31b9bffe9f25 Author: Mengdong Lin Date: Thu Mar 13 16:38:02 2014 -0400 intel_audio_dump: fix CTS/M value index This patch fixes the reversed CTS/M value index when dumping the 'audio M/CTS programing enable' register. Signed-off-by: Mengdong Lin Reviewed-by: Haihao Xiang Signed-off-by: Ben Widawsky commit 374290e4300768190fee5ad742f1f1beb036de4e Author: Daniel Vetter Date: Fri Mar 14 16:08:10 2014 +0100 tests: update .gitignoe Signed-off-by: Daniel Vetter commit b0b4f8db717500f2618c8077dc58c217eb46af06 Author: Daniel Vetter Date: Fri Mar 14 16:07:28 2014 +0100 tests/drv_suspend: new forcewake subtest I suspect that currently we have an issue in there with the runtime PM refcounting, but silly me developed this on a machine with runtime PM support ... Cc: Chris Wilson Signed-off-by: Daniel Vetter commit 2839619f497dae8353d0592dcccf183374a18f73 Author: Daniel Vetter Date: Fri Mar 14 16:06:51 2014 +0100 lib/igt_core: add printf attribute to igt_vlog I didn't know that this also works for the varargs versions of format strings. But gcc was kind enough to let me know. Signed-off-by: Daniel Vetter commit ea18fc16cd88a31b5d390721ad103efa07e288f1 Author: Daniel Vetter Date: Fri Mar 14 16:00:22 2014 +0100 lib: extract igt_open_forcewake_handle ... and I immediately regret that I've killed the return value for igt_debugfs_init, since we have callers which need to work without the forcewake stuff, e.g. the reg dumper needs to work without i915 loaded. Put this new helper to good use in the mmio code and the pm_pc8 testcase. Cc: Paulo Zanoni Signed-off-by: Daniel Vetter commit 553d594b6efd117497791e708146588268c992a9 Author: Daniel Vetter Date: Fri Mar 14 11:01:09 2014 +0100 tests/pm_rps: wait longer for idling Big cores seem to take forever to idle, at least my ivb here. Fairly ridiculous, so maybe there's more room for our debooster to kick in. Anyway, this gets the min-max-config-idle and reset subtests going somewhat reliably on my ivb. They still occasionally fail with the current frequency pegged to max (or close to it) for no apparent reason at all. Rebooting tends to fix it. Don't ask, don't tell. Cc: Jeff McGee Cc: Chris Wilson Signed-off-by: Daniel Vetter commit a7dd98497a1a9c2dc31f667ad23da86d4b2d7ad9 Author: Daniel Vetter Date: Fri Mar 14 10:33:53 2014 +0100 tests/pm_rps: use igt_assert_cmpint Much better debug output almost for free. Signed-off-by: Daniel Vetter commit 5cf8d8d6dbfec71746173fae2a64d40f39e144cf Author: Daniel Vetter Date: Thu Mar 13 21:25:01 2014 +0100 lib/igt_core: document the caveats of magic code blocks v2: Polish the wording a bit. Signed-off-by: Daniel Vetter commit 5632bc81d944ae5070c403688b995ff583bb1ac7 Author: Daniel Vetter Date: Fri Mar 14 10:26:39 2014 +0100 tests/pm_rps: load harder Big core platforms need some seriuos omph to break a sweat. This fixes min-max-config-loaded here on my ivb. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75146 Cc: Jeff McGee Signed-off-by: Daniel Vetter commit d4f89d0ff25f3b382e1eabe4f0def5a1c09082ea Author: Daniel Vetter Date: Fri Mar 14 10:12:55 2014 +0100 tests/pm_rps: simplify load helper setup There's no need to be fancy here. Cc: Jeff McGee Signed-off-by: Daniel Vetter commit 5188bbe23ea6e7a2bf4d5572b64f410399aba9f7 Author: Daniel Vetter Date: Fri Mar 14 10:06:02 2014 +0100 tests/pm_rps: ducttape for igt fork helper cleanup issues We don't call cleanup handlers when exiting a subtest currently, only when exiting the entire binary. Which means pm_rps falls over when it fails more than one subtest. Cc: Jeff McGee Signed-off-by: Daniel Vetter commit f962dee636f2992152617be4dc9e62c5055473ec Author: Daniel Vetter Date: Thu Mar 13 17:59:47 2014 +0100 test/kms_pipe_crc_basic: Fix up igt_kms conversion breakage Apparently the framework doesn't ignore disabled pipes correctly, so help it out a bit. Again an awesome track record for our QA and bug scrubbers :( Oh and while I rant: Docs for this stuff, please ;-) Signed-off-by: Daniel Vetter commit bd53d722dde87d67742b4ff4ee192bd8c6058328 Author: Daniel Vetter Date: Thu Mar 13 17:27:47 2014 +0100 lib: add igt_vlog to print varargs ... and put it to immediate use in igt_display_log. To make this all add up also drop the return value of igt_display_log, no one really cared anyway. Aside: I've noticed that every time another subtest runs (at least with kms_pipe_crc_basic) the log indent level moves one up ... Signed-off-by: Daniel Vetter commit 1e9e1baba389fe498be12390ceeeacb1d141a5cf Author: Daniel Vetter Date: Thu Mar 13 17:20:05 2014 +0100 lib/igt_kms: rip out custom verbose loggin support Instead just piggy-pack on top of igt_log. Signed-off-by: Daniel Vetter commit 523d909834bd142373ff5b25a00881f93f3160cf Author: Daniel Vetter Date: Thu Mar 13 18:09:41 2014 +0100 NEWS: post-release blurb and mention api doc work Signed-off-by: Daniel Vetter commit eaccd444f774ff88f9cfc24fb0a5e5b20f71d749 Author: Daniel Vetter Date: Thu Mar 13 03:35:02 2014 +0100 lib: switch intel_copy_bo to directly take a size Instead of a width/height combination. Since I've been lazy with the math this now only accepts page-aligned copy operations, but that's all we need really. Signed-off-by: Daniel Vetter commit 32d41cc7a7fc357758a60f019341805ae1ee418d Author: Daniel Vetter Date: Thu Mar 13 02:38:04 2014 +0100 tests/prime_nv_tests: fix copied buffer size Doesn't affect the test since we only check the first few bytes. But I want to switch the copy code to always copy entire pages around, so use the right buffer size. Signed-off-by: Daniel Vetter commit ec5f9e87882257fdde39166f0f4b931ecb5b6009 Author: Daniel Vetter Date: Thu Mar 13 01:13:28 2014 +0100 lib: api docs for intel_batchbuffer - I didn't bother to document the BLIT batch header macros - I'm not too happy with them and they're fairly obscure. - intel_copy_bo could use some interface love, added a FIXME comment for now. Signed-off-by: Daniel Vetter commit 49e3877ae7280efb62dc23ea748afbeb96934ace Author: Daniel Vetter Date: Thu Mar 13 01:38:42 2014 +0100 lib/intel_batchbuffer: Remove BATCH_LOCALS Totally unused, we have frisky implicit assumptions that the batch is called batch instead. Signed-off-by: Daniel Vetter commit 675c91974e2e3cc781a4dd630c20c3f992eae8b8 Author: Daniel Vetter Date: Wed Mar 12 21:30:46 2014 +0100 lib: remove hw context #defines The libdrm we require nowadays has them already. Signed-off-by: Daniel Vetter commit 3f284f796721f750cb8af4bac7839b5a6e1edb66 Author: Daniel Vetter Date: Wed Mar 12 21:26:55 2014 +0100 docs: Exclude debug.xml It is all just stuff used internally by the EU debugger only. Not really generally useful, expect if someone wants to write documentation for the debugger. Which needs a lot more than just this. Signed-off-by: Daniel Vetter commit a095072b64a37a7df6a011608fb932796991a891 Author: Rodrigo Vivi Date: Thu Mar 13 07:52:47 2014 -0300 bump version to 1.6 and add the release date Signed-off-by: Rodrigo Vivi commit 981276819fdf6de312ecafcef27822741265f237 Author: Daniel Vetter Date: Wed Mar 12 18:53:51 2014 +0100 lib/igt_debugfs: api docs Again issues with an enum, this time intel_pipe_crc_source. The typedefs seem to work better here though. Signed-off-by: Daniel Vetter commit 36a83a6c5ccfff7336d257aba499c4e72674615a Author: Daniel Vetter Date: Wed Mar 12 19:24:00 2014 +0100 lib/igt_debugfs: drop drm_fd argument from igt_pipe_crc_new It's nowhere used and removing it gives us a cleaner, more orthogonal interface. Signed-off-by: Daniel Vetter commit 803d07b2fff95794d8a840728d417e8e1d31264c Author: Daniel Vetter Date: Wed Mar 12 19:00:48 2014 +0100 lib: make igt_debugfs_open infallible (Almost) no one cared anyway. Signed-off-by: Daniel Vetter commit 096bb851f6bbcd018b3e7dc42930952971c4ea72 Author: Daniel Vetter Date: Wed Mar 12 18:53:44 2014 +0100 lib/ioctl_wrappers: api doc fixup Oops. Signed-off-by: Daniel Vetter commit adb28fd71d21175f047d7ed4cc3e4683a146b57b Author: Daniel Vetter Date: Wed Mar 12 16:53:47 2014 +0100 lib: move prefault helpers to igt_debugfs.c This way all debugfs library code is in one place, ready for some api documentation care. Signed-off-by: Daniel Vetter commit 55e64989e5f0359796d6e71d6753e432861b04a4 Author: Daniel Vetter Date: Wed Mar 12 02:34:40 2014 +0100 lib/igt_core: api documentation At most a bit of comment of function declaration movement for more polish. One tricky bit is to #ifdef out (only for gtkdoc of course) the struct option; forward declaration - gtkdoc needlessly lists it. FIXME: The struct documentation for igt_helper_process somehow doesn't get picked up ... Same issue seems to be with the igt_log_level enum, I've shoveled the relevant documentation into igt_log in free-form for now. Signed-off-by: Daniel Vetter commit d63fe1519d34f0d0311ef8e3472c8b83c3dcfde3 Author: Daniel Vetter Date: Wed Mar 12 01:29:52 2014 +0100 lib: extract igt_core.c Same game as with ioctl_wrappers.c. To split was rather clean except for the static function oom_adjust_for_doom. But that was a bug, the calls to it in the various open helpers should simply be done at init and fork time. Which was already the case, except for simple testcase. So fix it up. While at it also start with a small section header for the documentation. v2: Don't forget to update the xml template ... Signed-off-by: Daniel Vetter commit 556c49f20bf93c32b55f494ec896703293e358cd Author: Daniel Vetter Date: Tue Mar 11 23:27:06 2014 +0100 lib/ioctl_wrappers: api doc Also some tiny polish to function interface: - @caching in gem_set_tiling should be uint32_t to match the ioctl struct. - s/size/length/ for gem_write/read. - move gem_get_num_rings to the other ring feature helpers. v2: Also demote gem_require_ring from static inline and move it, too. v3: Also move gem_handle_to_libdrm_bo. Signed-off-by: Daniel Vetter commit 766c5bc6ae24fe2ec03ada80905ccfb1b18afc26 Author: Daniel Vetter Date: Tue Mar 11 22:58:07 2014 +0100 lib: extract ioctl_wrappers.c I want to group the ioctl wrappers and related functions into their own documentation section. Apparently gtkdoc refuses to obey this wish without a corespdonding header. So appease it. Also gtkdoc seems to struggle with rebuilding a bit ... Signed-off-by: Daniel Vetter commit 6c659264a6f6d54d966d9fc2a1651ad0405a8501 Author: Thomas Wood Date: Tue Mar 11 16:18:48 2014 +0000 tests: add missing assertion Signed-off-by: Thomas Wood Signed-off-by: Daniel Vetter commit 682f69385a07b81ee0b2524b9556c0b768454147 Author: Thomas Wood Date: Tue Mar 11 16:18:50 2014 +0000 lib: Add missing header to Makefile.sources i915_pciids.h was missing from Makefile.sources, which caused distcheck to fail. Signed-off-by: Thomas Wood Signed-off-by: Daniel Vetter commit a90846adf52127afe6dd3537c047b93c31cb313f Author: Daniel Vetter Date: Tue Mar 11 21:03:39 2014 +0100 gtk-doc: Document the docs - configure output to easily see whether docs are built or not - small blurb in README Signed-off-by: Daniel Vetter commit 2d4438605efd57a7ed336df42326693065ee5d02 Author: Thomas Wood Date: Tue Mar 11 16:04:29 2014 +0000 drmtest: reformat the API documentation Make the existing documentation compatible with gtk-doc. Signed-off-by: Thomas Wood Signed-off-by: Daniel Vetter commit 14ea2a04ebfa287e33b69a3bc7e47f02ba93c9ed Author: Thomas Wood Date: Tue Mar 11 16:04:28 2014 +0000 Add API documentation support Add optional support for building API documentation using gtk-doc. Signed-off-by: Thomas Wood Signed-off-by: Daniel Vetter commit c769d0988b7fae0e758046ba165c9c52c4f2816a Author: Daniel Vetter Date: Tue Mar 11 15:45:22 2014 +0100 tests/drv_missed_irq_hand: Make it robuster Just launching empty batches isn't enough load on my speedy g33 to force the kernel to enable interrupts an wait for them. So use some real load. With that the test is now fully reliably on my g33 amchine. Signed-off-by: Daniel Vetter commit c3f2b6a339e002c2ea3c0462ebce2a374b54e093 Author: Daniel Vetter Date: Tue Mar 11 15:44:28 2014 +0100 tests/gem_exec_blt: More reasonable runtime Doing (1 << 18) - 1 repeats isn't really. With the reduced time the test is also useful in some shell scripted tests which need some real load (but not too much), like drv_missed_irq_hang. Signed-off-by: Daniel Vetter commit e2ee8b408057e5139182f47e980f3af20272fa28 Author: Daniel Vetter Date: Tue Mar 11 15:32:30 2014 +0100 tests/drv_missed_irq_hang: Remove debug output Signed-off-by: Daniel Vetter commit 20087e779d58fe0fdde156e329eb5d75e1e6336f Author: Daniel Vetter Date: Fri Mar 7 09:27:00 2014 +0100 NEWS: intel_audio_dump has now bdw support commit 02a32701192cb4832d95e121d5ee014d98dd1234 Author: Daniel Vetter Date: Fri Mar 7 09:23:58 2014 +0100 configure: Bump libdrm requirements commit 856afd588ef31d02c0dd8fd827a0af2725edc464 Author: Chris Wilson Date: Wed Mar 5 11:09:46 2014 +0000 igt/gem_pwrite_pread: Fix relocation offsets for gen8+ Oops, I didn't check to see if there was more than one call site where we built and execbuffer. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75237 Signed-off-by: Chris Wilson commit 449509dddba1e4d3853093a872632b9504b8eaa7 Author: Mengdong Lin Date: Mon Mar 3 17:03:02 2014 -0500 intel_audio_dump: add support for Valleyview This patch adds support for dumping audio registers of Valleyview, by reusing Ironlake code with a different base address and pipe number. Signed-off-by: Mengdong Lin Reviewed-by: Haihao Xiang commit fa8c75028e6c6ae523f915fdc212adb30fea1ec3 Author: Mengdong Lin Date: Tue Mar 4 10:13:09 2014 -0500 intel_audio_dump: adjust code alignment Signed-off-by: Mengdong Lin Reviewed-by: Haihao Xiang commit 86d15e080d9977dcd3b0448cefb72259597b80d9 Author: Mengdong Lin Date: Mon Mar 3 13:52:06 2014 -0500 intel_audio_dump: share common audio dump code for Ironlake, Haswell & Broadwell Most audio config registers of Ironlake, Haswell and Broadwell are almost same although the register names or some bit fields have little difference. And HSW and BDW already share their code. This patch further shares code for ILK and HSW/BDW: - ILK and HSW/BDW define their own base address to dump audio & display registers. - Small functions to dump a specific register are defined and shared. Signed-off-by: Mengdong Lin Reviewed-by: Haihao Xiang commit bae8a005d21288e61a547bba94b0a32a99c36b60 Author: Mengdong Lin Date: Mon Mar 3 13:23:50 2014 -0500 intel_audio_dump: define get_num_pipes() to get number of pipes for a device ID It's for future code sharing because some registers define their bit fields according to the number of pipes. Signed-off-by: Mengdong Lin Reviewed-by: Haihao Xiang commit 1803f1ebfad1e14b5d0eb8560d99efd3ddb6ef67 Author: Mengdong Lin Date: Fri Feb 28 16:18:11 2014 -0500 intel_audio_dump: define IS_HASWELL_PLUS to cover Haswell and its successors A macro IS_HASWELL_PLUS(devid) is defined to cover Haswell and its successors, for code sharing. Now it covers HSW and BDW. Signed-off-by: Mengdong Lin Reviewed-by: Haihao Xiang commit ed386663fe4894f9cfd2a3df4233292e0e3b39ac Author: Mengdong Lin Date: Fri Feb 28 13:25:27 2014 -0500 intel_audio_dump: move definitions of transcoder/pipe/port/converter earlier Move these enum definitions earlier for future code sharing. Signed-off-by: Mengdong Lin Reviewed-by: Haihao Xiang commit 92d319702553d31e70bcb1a098e896418f041a41 Author: Mengdong Lin Date: Mon Mar 3 11:04:39 2014 -0500 intel_audio_dump: support using base address plus an offset to dump registers Layout of display and audio registers can be same for different Intel GPUs. For code sharing, this patches defines functions to - set the base address of display and audio registers - dump registers using the base address and an offset Signed-off-by: Mengdong Lin Reviewed-by: Haihao Xiang commit cdf74b69c908b869e7e2daca04f49c5e5d02c097 Author: Imre Deak Date: Wed Mar 5 21:02:41 2014 +0200 kms_setmode: Add clone-single-crtc subtest The clone-single-crtc will test various cloning scenarios. Currently it does limit the number of simultanously cloned connectors to the number of pipes in the system. That restriction can be lifted in the future if desired. Signed-off-by: Ville Syrjälä commit a3b80912a993b4b6952917afea41906f88dda01e Author: Chris Wilson Date: Wed Mar 5 11:09:46 2014 +0000 igt/gem_pwrite_pread: Fix relocation offsets for gen8+ Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75237 Signed-off-by: Chris Wilson commit 072d358bf03d0c39dc83bce0b93801d030d2324f Author: Chris Wilson Date: Fri Feb 28 21:44:22 2014 +0000 igt/gem_pwrite_pread: Fix XY_SRC_COPY command length for gen8+ Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75237 Signed-off-by: Chris Wilson commit fa6b1516c5a5be1fcff8ee476a5e280e2e3cb16d Author: Paulo Zanoni Date: Wed Feb 26 16:51:12 2014 -0300 tests/pm_pc8: be more verbose on test_i2c failures Whenever I see that error, I go and print the numbers so I can check which one is failing. Signed-off-by: Paulo Zanoni commit d406249bedb61120ea3f8c780ea995b8c70d3d8c Author: Paulo Zanoni Date: Wed Feb 26 15:42:07 2014 -0300 tests/pm_pc8: use intel_gen instead of a big IS_GEN check Much better! Signed-off-by: Paulo Zanoni commit 0a57d0b8d30b73f7d515a2099355f7883681d699 Author: Paulo Zanoni Date: Wed Feb 26 15:13:00 2014 -0300 tests/pm_pc8: BDW should also support PC8 residencies And I'm hoping the MSR register addresses will be the same. Signed-off-by: Paulo Zanoni commit d3582aeade9d90cb4adc8ff7c4339198494aaae7 Author: Paulo Zanoni Date: Wed Feb 26 14:48:50 2014 -0300 tests/pm_pc8: use XY_COLOR_BLT instead of just COLOR_BLT And add BDW support to it. Signed-off-by: Paulo Zanoni commit 6a6b8a213813de80a86d281ee9111aaca8ed5b36 Author: Paulo Zanoni Date: Wed Feb 26 11:12:28 2014 -0300 tests/pm_pc8: add "stay" mode I used to have a binary that would just disable all the screens - so we can enter PC8/runtime PM - and then sleep forever. I used this binary many times while debugging PC8 and runtime PM, and I also sent the binary to many people so they would be able to test these things without X running. Since pm_pc8 already implements everything that the separate binary needs, and it even has some additional code to try to configure the environment to actually reach PC8, it's easier to just ask people to run "sudo ./pm_pc8 --stay" instead of sending them a file, asking them to compile it, setup the environment, and then run it. Signed-off-by: Paulo Zanoni commit 8c475e0ba69c585bc11062edd1f7fc4bbded811c Author: Chris Wilson Date: Wed Feb 26 12:01:47 2014 +0000 evictions: Limit the number of minor eviction surfaces to fit in RAM We allocate more surfaces than used in a single pass in order to stress the eviction code between batches. The intent here is not to exercise swapping, and we fail to check that there is enough swap+memory to hold all our surfaces. So limit the number of surfaces we allocate to fit into RAM, and then require that the number of surfaces we need for testing is less than the number of surfaces we can allocate. Signed-off-by: Chris Wilson commit ea332b64b6e9f6935da4b43f05fefcdcea32cc64 Author: Chris Wilson Date: Wed Feb 26 11:56:16 2014 +0000 lib: Test against available swap Even if we ignore the double-accounting bug in Linux, we need to be sure that the remaining swapspace is adequate for running our test as the system may be under load before we even start. Signed-off-by: Chris Wilson commit 37773d91d9b56f9f06c86e405e8dc9343f2c71c1 Author: Paulo Zanoni Date: Tue Feb 25 17:46:27 2014 -0300 tests/pm_pc8: add pci-d3-state subtest Currently the test suite just looks at the files provided by the runtime power management framework to check if the device is runtime suspended. Add a test that reads the PCI config space to check if the device is actually in PCI D3 state or not. Signed-off-by: Paulo Zanoni commit 31b20f7478a27e159482ac23f3d128e90ca98d23 Author: Paulo Zanoni Date: Tue Feb 25 16:40:51 2014 -0300 tests/pm_pc8: add reg-read-ioctl subtest After I finally fixed the code that WARNs if we're runtime suspended when reading registers I started getting the WARNs, so this test should reproduce them on a Kernel with the problem. Signed-off-by: Paulo Zanoni commit 81ade89d6444ed4159c8cafb0512254f02ec34e0 Author: Chris Wilson Date: Mon Feb 24 08:52:28 2014 +0000 gem_render_tiled_blits: Trim usage to fit within RAM This is a render correctness test, the intention is not to exercise the swapper (but preferrably some eviction code). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75247 Signed-off-by: Chris Wilson commit 4550a18a571611197d3958ab3c1071ef69ec3838 Author: Chris Wilson Date: Mon Feb 24 08:52:28 2014 +0000 gem_render_linear_blits: Trim usage to fit within RAM This is a render correctness test, the intention is not to exercise the swapper (but preferrably some eviction code). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75247 Signed-off-by: Chris Wilson commit 8ebc02a54c22b7a83a34c923153861848183cd96 Author: Ben Widawsky Date: Fri Feb 21 13:15:35 2014 -0800 quick_dump: Add missed broadwell autodetect Signed-off-by: Ben Widawsky commit 42aa254c65fa47fbea38a268814f815166adc056 Author: Ville Syrjälä Date: Fri Feb 21 17:19:57 2014 +0200 kms_flip: Add dpms-vs-vblank-race and modeset-vs-vblank-race subtests dpms-vs-vblank-race and modeset-vs-vblank-race try to race wait for vblank ioctls from one thread against modeset/dpms ioctls from another. Signed-off-by: Ville Syrjälä commit a0c936cfc128dfea6c58c4eef1e56cc29df21406 Author: Chris Wilson Date: Fri Feb 21 15:14:08 2014 +0000 kms_flip: Skip tests that try to inject GPU hangs if already terminally wedged Signed-off-by: Chris Wilson commit 0cc6a219f1de667ddc0c9a4011dc1c36a584be7b Author: Chris Wilson Date: Fri Feb 21 15:08:22 2014 +0000 kms_flip: Assert that hang_gpu() should only fail is the GPU is already hung Signed-off-by: Chris Wilson commit bf74a0ca3fa3b2656c5656c2365d11b6b406dbe6 Author: Chris Wilson Date: Fri Feb 21 14:42:27 2014 +0000 tests: Compile all threaded tests with -pthread when appropriate Signed-off-by: Chris Wilson commit 5f190f2d674222b27eff9f80d14761fde2e8fe7a Author: Ville Syrjälä Date: Fri Feb 21 16:08:28 2014 +0200 kms_flip: Fail the subtest if page flip hang recovery wasn't actually tested Context banning can prevent the page flip hang tests from actaully testing anything, so make the relevant subtests fail in that case. Signed-off-by: Ville Syrjälä commit 48ba2cdf969698a2520193ec0c9cff99f89fe1f6 Author: Ville Syrjälä Date: Fri Feb 21 15:14:33 2014 +0200 kms_flip: Restore rings to running state in unhang_gpu() If things go bad, make sure the rings aren't left in the stopped state. Signed-off-by: Ville Syrjälä commit 30c21ffe7f149c15ae7efdb825bbb6671a7f2e9b Author: Paulo Zanoni Date: Thu Feb 20 17:47:53 2014 -0300 tests/pm_pc8: try to modprobe msr Just in case it's compile with M instead of Y. If the module is not there, the other assertions will catch the problem. Signed-off-by: Paulo Zanoni commit 41267dca3cd62a49b7a7434e12b4f1164d95454b Author: Paulo Zanoni Date: Thu Feb 20 17:45:53 2014 -0300 tests/pm_pc8: try to modprobe i2c-dev Just in case the module is compiled with M instead of Y. If the module is not there, the other assertions will catch the problem. Signed-off-by: Paulo Zanoni commit 4eb37bf4c130fe1264c7f63e30faff3a76cd093d Author: Paulo Zanoni Date: Tue Feb 18 14:27:19 2014 -0300 tests/pm_pc8: add gem-idle subtest It's triggering WARNs and DRM_ERRORs on current drm-intel-nighly. Signed-off-by: Paulo Zanoni commit 6f288749f4f8c454f65e7de38c9bcff7a9a29411 Author: Paulo Zanoni Date: Mon Feb 17 16:29:36 2014 -0300 tests/pm_pc8: remove sleep() call when setting up the environment This sleep was added because sometimes we didn't reach PC8+ residencies, but it was still not enough to prevent the problem every time, and it is really not needed most of the times. I have investigated more and it seems that we only have to wait until after some minutes have past since the machine booted. So just remove the sleep for now since when you run each subtest in a separate process, you end up having to sleep at every subtest. Signed-off-by: Paulo Zanoni commit c9524235dd5eb3cf2d9fcd7d264c78cc2d1f3802 Author: Paulo Zanoni Date: Fri Feb 21 10:05:54 2014 -0300 tests/gen7_forcewake_mt: use -lpthread Otherwise it fails to compile on my machine. Signed-off-by: Paulo Zanoni commit 3db29744f74017a99d1b430b30623dce405ebb1a Author: Chris Wilson Date: Fri Feb 21 09:38:43 2014 +0000 kms_flip: Try to make hang_gpu() robust against hanging the GPU On a bad day, hanging the GPU may be terminal. Yet even if the GPU is terminally wedged we expect modesetting (and pageflips) to continue. That deserves to be a dedicated test, but in the meantime we should strive to avoid falling over just because the code is not resilient. Signed-off-by: Chris Wilson commit 005d1dcc9882ab4e8a8b91b5c71da5a36b1491e6 Author: Chris Wilson Date: Thu Feb 20 13:41:41 2014 +0000 Add i915_pciids.h This is a pure copy from the central location at kernel/include/drm/i915_pciids.h commit ff87c4183b31c790e50f174237167716830832e6 Author: Chris Wilson Date: Thu Feb 20 13:27:05 2014 +0000 tests: Add gen7_forcewake_mt This is supposed to be snafu... Signed-off-by: Chris Wilson commit 06189c60295e806e5073ff3473f038b1bedde212 Author: Joao Santos Date: Wed Feb 19 14:19:19 2014 +0000 build: Skip kms_plane on Android Skipping this test until we have Cairo in the build. Signed-off-by: Joao Santos Signed-off-by: Damien Lespiau commit e292e00de0553ef059ddeef572db741ec3b6c23f Author: Damien Lespiau Date: Tue Feb 18 14:17:10 2014 +0000 kms_pipe_crc_basic: Remove spurious inclusion of glib.h Signed-off-by: Damien Lespiau commit 1daafe27625d53783b9dcb41bf72aaaade5f735f Author: Damien Lespiau Date: Tue Feb 18 14:16:49 2014 +0000 kms_plane: Remove spurious inclusion of glib.h Signed-off-by: Damien Lespiau commit 959783684e2010326d91db2aa55f424f7e041c84 Author: Daniel Vetter Date: Thu Feb 13 19:22:53 2014 +0100 test/kms_flip: fix up igt logging conversion Silly me ... Signed-off-by: Daniel Vetter commit cef9b31a2415f59899c2d7a9fc895aa7b66d3230 Author: Daniel Vetter Date: Thu Feb 13 19:22:35 2014 +0100 testdisplay: Allow to specify the dpms level aka the jbarnes-me-harder mode Signed-off-by: Daniel Vetter commit 30cfde5822d1ec9b918576fa49aff9ab41d4fe65 Author: Daniel Vetter Date: Thu Feb 13 19:15:38 2014 +0100 testdisplay: implement dpms test For those who wonder about the -j switch ... all the good ones have been taken, so this is the Jesse-flag. Signed-off-by: Daniel Vetter commit b5b0aeb6a552c014fb224a3c3ff913fbab45b5e0 Author: Daniel Vetter Date: Thu Feb 13 14:43:20 2014 +0100 NEWS: Mention new logging support commit d1e318d23df6c4da2a5885f91f97aa565e001bf8 Author: Daniel Vetter Date: Thu Feb 13 14:25:55 2014 +0100 tests/kms_flip: use igt logging Signed-off-by: Daniel Vetter commit c88f898c578bd14aee049aceacb0d95a0703aab8 Author: Daniel Vetter Date: Thu Feb 13 14:12:03 2014 +0100 tests/gem_seqno_wrap: use igt logging Cc: Mika Kuoppala Signed-off-by: Daniel Vetter commit 46ec3ef1f80c1f42f24a13d742887333efc678d2 Author: Daniel Vetter Date: Thu Feb 13 14:09:41 2014 +0100 test/pm_rps: use igt logging Cc: Jeff McGee Signed-off-by: Daniel Vetter commit eebdf7f9204686f5d937d6a3084056fb86c6e7de Author: Daniel Vetter Date: Wed Feb 12 15:19:15 2014 +0100 lib: (somewhat) structured logging support Apparently there's a bit a need for more verbose output in testcases, mostly for debugging purposes. At least gem_reset_stats and pm_rps have a verbose mode. On top of that we're currently not taking advantage of piglit's "warn" state all that much. But I think it might be useful for testcases which are notorious for some kinds of spurious failures, like e.g. the really nasty timing checks in kms_flip. If we demote some of them to just warnings we could run the overall tests more often. Hence this patchs adds a new igt_log function with the three levels DEBUG, INFO and WARN. Plus a bunch of convenience helpers to keep the test code tidy. The level can be set through an enviroment vairable IGT_LOG_LEVEL with info being the default. Also tests can look at the selected log level in case they want to run costly debug functions only when needed. Comments highly welcome, I plan to roll this out over tests which can use it (not all, imo that's too much churn) once we've settled on the interfaces/semantics. Signed-off-by: Daniel Vetter commit 60a24a22ba4c7df46ebae0e99f0aa09604a6fb25 Author: Zhao Yakui Date: Tue Jan 28 09:53:50 2014 +0800 Assembler/bdw: Remove the unsupported cache agent for WRITE(...) The Sampler/Constant cache is read-only. And it can't be used as the target cache agent of WRITE message. Reviewed-by: Xiang, Haihao Signed-off-by: Zhao Yakui Signed-off-by: Damien Lespiau commit a2bf80fd8462b0014f2e230421173677bbb8b742 Author: Thomas Wood Date: Wed Feb 12 15:54:27 2014 +0000 tests: fix sub-test enumeration Ensure sub-tests can be listed correctly by doing any test setup within an igt_fixture block. Signed-off-by: Thomas Wood Signed-off-by: Daniel Vetter commit ec3b1332f87e956e7de8e03e2cdbb962df05e214 Author: Daniel Vetter Date: Wed Feb 12 00:12:07 2014 +0100 NEWS: Mention Damien's new helper library commit a036959f3ed1f0a9c3e80b9feea69713289aa4ef Author: Daniel Vetter Date: Tue Feb 11 23:54:19 2014 +0100 lib: Make igt_skip noreturn This is a remnant from the subtest code before we had proper fixture blocks. With those there's no no reason to have igt_skip calls outside of fixtures or subtests, so we can assert this and hence always jump out. Suggested by Thomas Wood since static analyzers got confused about this. To check for fallout I've run all tests as non-root so that they'll all skip. Only very little fallout resulted. Cc: Thomas Wood Signed-off-by: Daniel Vetter commit 0d1084fe3f88e2b51c50ff963a2ae81a6129474d Author: Daniel Vetter Date: Wed Feb 12 00:07:11 2014 +0100 lib: install exit handler only on success for prefault control Otherwise we'll hit an igt_skip in the exit handler, which upsets the new in_fixture||in_subtests checks. Signed-off-by: Daniel Vetter commit 58633cfde46cb6010b3bdeeca58a52ec536ff66c Author: Daniel Vetter Date: Wed Feb 12 00:05:57 2014 +0100 test/gem_gtt_hog: bail out earlier This way we properly skip instead of failing hard. Just result polish when running on non-intel systems. Signed-off-by: Daniel Vetter commit 36be04bdfb1d34f11b6bd50db7c50d213c4498b7 Author: Daniel Vetter Date: Tue Feb 11 23:52:43 2014 +0100 tests/gem_madvise: use correct main block igt_simple_main doesn't enumerate subtests ... Cc: Chris Wilson Signed-off-by: Daniel Vetter commit 3514872efeaa2fc0b656ed6949b9e6b7bf67633f Author: Daniel Vetter Date: Tue Feb 11 23:50:10 2014 +0100 tests/gem_bad_ctx_exec: Properly wrap in igt_fixtures Caught by the new nasty assert in igt_skip. Signed-off-by: Daniel Vetter commit a86651fa2476087dd04d03cf86247761595c0aef Author: Daniel Vetter Date: Tue Feb 11 23:47:50 2014 +0100 tests/gem_close_race: Properly wrap init code in fixtures Blows up otherwise if there's no intel gpu around. Signed-off-by: Daniel Vetter commit 349ba5d3e1cbc0d130305547627c5de5a35ae1a2 Author: Daniel Vetter Date: Tue Feb 11 23:36:24 2014 +0100 lib: fix header include drm/ path is for the headers from kernel sources, without when using the pkgconfig libdrm version. Cc: Damien Lespiau Signed-off-by: Daniel Vetter commit b4e85b7b53f2ebf3a8d5edab5ca98d6f8715a680 Author: Damien Lespiau Date: Tue Feb 11 17:53:00 2014 +0000 lib/display: Fix typo in igt_plane_get_fd_id() (fb) Signed-off-by: Damien Lespiau commit 82108d96566dfa1210b1fbe2f6deaf6d77d1e34e Author: Damien Lespiau Date: Tue Feb 11 17:48:32 2014 +0000 kms_pipe_crc_basic: Remove igt_display_get_n_pipes() usage in main The fixture won't be run when listing the subtests and thus we can't use igt_display_get_n_pipes() in the list of tests. The alternative here is to list the subtests with the maximum values and skip when not supported on the platform. Signed-off-by: Damien Lespiau commit 2043e6b265929ad2444cede7412f73a9cbe112a5 Author: Damien Lespiau Date: Tue Feb 11 17:45:48 2014 +0000 lib: Fix igt_ouput_get_plane() typo (output) Signed-off-by: Damien Lespiau commit 3386b4b2866b991b49e7386d51a3f4b9d9b681c0 Author: Damien Lespiau Date: Tue Feb 11 13:54:10 2014 +0000 lib: Don't wait in igt_wait_for_keypress() if stdin is not a tty When running in a non interactive terminal, there's little point in trying to wait for some input on stdin. Signed-off-by: Damien Lespiau commit 0d5de66fc6b85a0555ecc9d853e48c464122bb26 Author: Damien Lespiau Date: Thu Feb 6 21:20:35 2014 +0000 kms_plane: Start a basic display plane test We test the sprite plane positionning in there, for now. Signed-off-by: Damien Lespiau commit 3027de0a6653c6168fbc12f895a13c7d2a9ee0e2 Author: Damien Lespiau Date: Fri Feb 7 14:12:44 2014 +0000 lib/display: Fix assertion in set_plane() When cycling throuth planes, we still want to reach the cursor plane. We have to special case IGT_PLANE_CURSOR as a shorthand to select the cursor plane (the last plane on the pipe). Signed-off-by: Damien Lespiau commit fb146aa7825b8f3a1c490f30b4c3912b7fe8eb6d Author: Damien Lespiau Date: Thu Feb 6 21:18:28 2014 +0000 lib/display: Wait for a vblank after SetPlane() Let's be testing friendly and gently wait for the next vblank before returning from commit() when needed. After igt_display_commit() one can safely look at the CRC. Signed-off-by: Damien Lespiau commit da0f1cf57083c17d047d64bda53d63bd728fed7c Author: Damien Lespiau Date: Thu Feb 6 21:06:59 2014 +0000 lib/display: Print the fb id, not its pointer in the set_fb() log message Signed-off-by: Damien Lespiau commit da896537b8919e3e4dbd2067a38ec49f28603e8a Author: Damien Lespiau Date: Thu Feb 6 21:06:25 2014 +0000 lib/display: Add a way to wait at every commit for inspection Signed-off-by: Damien Lespiau commit 377f48afe668fc118d6dd902641a1c41c4430b44 Author: Damien Lespiau Date: Thu Feb 6 21:06:07 2014 +0000 lib: Add a helper to wait for a keypress Signed-off-by: Damien Lespiau commit c7e3413a081aa7fb2b9f4de5b99c64802b649392 Author: Damien Lespiau Date: Thu Feb 6 19:10:51 2014 +0000 kms_pipe_crc_basic: Use kmstest_create_color_fb() Reducing again the per-test number of lines. Signed-off-by: Damien Lespiau commit 1d2c9d5e573409edd846c445619c0d41474a0ff0 Author: Damien Lespiau Date: Thu Feb 6 19:09:53 2014 +0000 lib: Include drm_fourcc.h from igt_kms.h This include is needed for the DRM_FORMAT* defines used in the fb creation helpers. Signed-off-by: Damien Lespiau commit 063194074e5ce0ad9ceb0f3318e714aaad05ec21 Author: Damien Lespiau Date: Thu Feb 6 19:04:58 2014 +0000 kms_cursor_crc: Use kmstest_create_color_fb() Signed-off-by: Damien Lespiau commit a1df2f4363d1ed770db36fb8aba14e65087f11c3 Author: Damien Lespiau Date: Thu Feb 6 19:04:12 2014 +0000 lib: Introduce a new helper kmstest_create_color_fb() We need to create fbs of a single color in a few places. Time to abstract that out to a helper function. Signed-off-by: Damien Lespiau commit f0e0b2ae658c44461d00adddea6cc5bba711966d Author: Damien Lespiau Date: Thu Feb 6 17:54:33 2014 +0000 lib/display: Add support for DRM planes We can now extend our plane support beyond primary and cursor planes. Signed-off-by: Damien Lespiau commit 1c608a2af81f94e601b5961987a6b86eb0e3a824 Author: Damien Lespiau Date: Thu Feb 6 16:26:31 2014 +0000 tests/kms_cursor_crc: Use igt_pipe_crc_collect_crc() Signed-off-by: Damien Lespiau commit 6954103192bba9241a4b115a85cb43de779d375f Author: Damien Lespiau Date: Thu Feb 6 16:17:38 2014 +0000 lib/crc: Add a helper to read a single CRC value In this case, we also take care of starting/stopping the CRC collection. Signed-off-by: Damien Lespiau commit 7d0e2f618c05c784655c9b2a592e7f4de8df88cb Author: Damien Lespiau Date: Thu Feb 6 16:17:14 2014 +0000 lib/crc: Factor out reading a single CRC value Signed-off-by: Damien Lespiau commit 162914b9ed0af1436e260133a90b91f32e78b4fe Author: Damien Lespiau Date: Thu Feb 6 16:05:19 2014 +0000 lib/display: Check if we're trying to use the same pipe on 2 outputs Signed-off-by: Damien Lespiau commit 65fef0a43410b40f43dc5e0b8937199bebdccf79 Author: Damien Lespiau Date: Wed Feb 5 17:51:50 2014 +0000 lib/display: Allow to override the display verbosity with an env variale Signed-off-by: Damien Lespiau commit d435829ae9702c9f777b68227e43eafd702a8031 Author: Damien Lespiau Date: Wed Feb 5 17:14:12 2014 +0000 kms_cursor_crc: Port the test to the new modeset API Signed-off-by: Damien Lespiau commit 09faa45f521c98dda0ebc07a417fb34a048a697b Author: Damien Lespiau Date: Thu Feb 6 15:45:42 2014 +0000 lib/display: Add a way to specify we don't care about the pipe to use Signed-off-by: Damien Lespiau commit 5ec399b4a6b11dc6c2b1a1bd25b745d4dd9279a6 Author: Damien Lespiau Date: Wed Feb 5 16:36:51 2014 +0000 lib/display: Add support for the cursor plane Signed-off-by: Damien Lespiau commit c4823ce9a4d51eeb422be822e8a6d971a7141c24 Author: Damien Lespiau Date: Wed Feb 5 15:54:13 2014 +0000 lib/display: Fix the SetCrtc disabling log message We were displaying the value of fb_id (0), when the actual interesting thing about this call it that it'll just down the pipe. Signed-off-by: Damien Lespiau commit 969435a4078be5c1926c6ecbcfcbedfd6a9d8a64 Author: Damien Lespiau Date: Wed Feb 5 15:32:15 2014 +0000 tests/kms_cursor_crc: Move the array of cursor fb_ids to the stack This array is not used outside ouf create_cursor_fb(). A stack allocated array is enough. Signed-off-by: Damien Lespiau commit d39f5a059b688878f07586f7a9292299316424c2 Author: Damien Lespiau Date: Tue Feb 4 15:11:29 2014 +0000 kms_pipe_crc_basic: Use igt_display_get_n_pipes() instead of hardcoding 3 Signed-off-by: Damien Lespiau commit 72e9a6c8d596d062bd66503c8c2625e1e9e83ba6 Author: Damien Lespiau Date: Tue Feb 4 14:59:39 2014 +0000 lib/display: Add an accessor to retrieve the number of pipes Signed-off-by: Damien Lespiau commit a260599b6f557b66346fcbcc81c54f0dc7382f9c Author: Damien Lespiau Date: Tue Feb 4 12:07:56 2014 +0000 kms_pipe_crc_basic: Use for_each_connected_output() Signed-off-by: Damien Lespiau commit 992bd5d62a666657aae3e231e9cb7638c405595c Author: Damien Lespiau Date: Tue Feb 4 12:06:57 2014 +0000 lib: Introduce a for_each_connected_output() macro So we can easily cycle through them in tests without knowing too many internal details about how igt_display_t organize its data. Signed-off-by: Damien Lespiau commit 09e84cee8b97e8b431e537fbbacde1313d5896ac Author: Damien Lespiau Date: Sun Feb 2 17:48:24 2014 +0000 lib: Introduce symbolic names for display planes It'd be nice to have symbolic names for planes instead of using an index in igt_output_get_plane(). We also namespace the enum to not conflict with anyone. Signed-off-by: Damien Lespiau commit 417987353ec2bf637839990553967474ccf1528e Author: Damien Lespiau Date: Mon Jan 27 16:32:09 2014 +0000 kms_pipe_crc_basic: Port to the new modeset API Signed-off-by: Damien Lespiau commit 3670d6dbff7b829d71ce84d6c9cb88cd5abdbc53 Author: Damien Lespiau Date: Mon Jan 27 16:25:43 2014 +0000 lib: Introduce a modeset API The goals here are: - Reduce duplicated code in each KMS test - Provide an API that looks more like what we want for atomic modesets. The hope is then that it'll be easy to switch, at run-time, between the "legacy" path and atomic modesets, keeping the same API for tests. Signed-off-by: Damien Lespiau commit 01757d052c3427ee28b1a065652721877568a15f Author: Thomas Wood Date: Fri Feb 7 17:03:39 2014 +0000 tests/gem_seqno_wrap: fix over allocation of arrays Signed-off-by: Thomas Wood Signed-off-by: Daniel Vetter commit e6737b8a4ef42109f82c13127d8e2e5da92eb79f Author: Thomas Wood Date: Fri Feb 7 17:03:38 2014 +0000 assembler: fix condition for printing a warning Signed-off-by: Thomas Wood Signed-off-by: Daniel Vetter commit 49aa4b0df52254d47b354e98ec18236ff82b06e9 Author: Thomas Wood Date: Fri Feb 7 17:03:37 2014 +0000 debugger: fix the -p option Signed-off-by: Thomas Wood Signed-off-by: Daniel Vetter commit 333a5c6f07cba9e6d7a5506521bae5ec89b867c1 Author: Daniel Vetter Date: Tue Feb 11 12:14:09 2014 +0100 lib/drmtest: Fix up skip_henceforth checks We need to first check whether we'll even run the testcase before deciding to print a premature SKIP/FAIL. Without this and global skipped resulted in superflous output when running only one testcase. References: https://bugs.freedesktop.org/show_bug.cgi?id=74100 Signed-off-by: Daniel Vetter commit a6bc3d91af816f4d979cb6424c6e991362c2a8f8 Author: Daniel Vetter Date: Tue Feb 11 12:04:57 2014 +0100 tests/gem_reset_stats: Correctly wrap global test code Tests _must_ be able to run as non-root and on non-intel platforms, otherwise the enumeration is busted (since QA enumerates testcases on a gpu-less xeon box). Cc: Mika Kuoppala Signed-off-by: Daniel Vetter commit 971c7db2c81d0573caf1d35d70f48e6fdace90d0 Author: Daniel Vetter Date: Fri Feb 7 10:02:41 2014 +0100 tests/pm_rps: remove setfreq It's unused. Cc: Jeff McGee Signed-off-by: Daniel Vetter commit ffc481b8acc22ee8bbbf142db5b74d99c6bde926 Author: Daniel Vetter Date: Fri Feb 7 09:59:42 2014 +0100 tests/pm_rps: Round requested freq correctly The kernel will round it, so if we don't we'll have a spurious mismatch. Happens on my machine here with 650-1300MHz range, where the midpoint is 975. Cc: Jeff McGee Signed-off-by: Daniel Vetter commit 0269d1da4999ecb39ea65120a052259b19372748 Author: Thomas Wood Date: Thu Feb 6 16:31:54 2014 +0000 lib: fix signed/unsigned comparison issues Store the result of set_vt_mode as a signed value so that errors can be caught correctly. Signed-off-by: Thomas Wood Signed-off-by: Daniel Vetter commit c3e9198dd0424feb74cdf6570c769f818f2ca16c Author: Thomas Wood Date: Thu Feb 6 16:23:42 2014 +0000 assembler: define YY_NO_INPUT to prevent unused symbol warnings Signed-off-by: Thomas Wood Signed-off-by: Daniel Vetter commit 32b624c71d6e444056ba87172cc0004e355170d1 Author: Daniel Vetter Date: Thu Feb 6 07:49:33 2014 +0100 tests/pm_rps: Fix compilation on Linux Signed-off-by: Daniel Vetter commit 2b8d953aa22477d88ad6d58f3ad04d3bf90a6a84 Author: Jeff McGee Date: Fri Jan 31 10:13:53 2014 -0600 pm_rps: New subtest for gpu reset Test that RPS functions as expected after a gpu reset. Signed-off-by: Jeff McGee Signed-off-by: Daniel Vetter commit 663d758d919610b09a8bddbadd8a0b668eab6be8 Author: Jeff McGee Date: Fri Jan 31 10:13:52 2014 -0600 pm_rps: Add variable load support to load helper The load helper can be set to HIGH or LOW. HIGH is the original mode of sending continuous dword store commands. LOW adds a pause between each command to reduce throughput. Signed-off-by: Jeff McGee Signed-off-by: Daniel Vetter commit 22dfb0988aa5f055fb96873d037825bb0317a0e0 Author: Jeff McGee Date: Fri Jan 31 10:13:51 2014 -0600 pm_rps: Load helper should stall for last write This ensures that gpu is quiescent when load helper exits. Signed-off-by: Jeff McGee Signed-off-by: Daniel Vetter commit 2d16e0aad7a31a0964ae35fa07c70f4c2fb513b0 Author: Jeff McGee Date: Fri Jan 31 10:13:50 2014 -0600 pm_rps: Add stop rings injection utility Signed-off-by: Jeff McGee Signed-off-by: Daniel Vetter commit 2cbb0fbf5f3dc839a11d23a970948cb91718594e Author: Jeff McGee Date: Tue Jan 28 18:25:06 2014 -0600 pm_rps: New subtest min-max-config-loaded Like subtest basic-api, but additionally requires that current frequency is increasing to the configured maximum within reasonable time since we are loaded. Signed-off-by: Jeff McGee Signed-off-by: Daniel Vetter commit ceb14b190594b767667d34c284e4afdb1932f973 Author: Jeff McGee Date: Tue Jan 28 18:25:05 2014 -0600 pm_rps: Add load helper for loading gpu The load helper submits repeated dword store commands to keep the gpu loaded while subtests running in the parent process check for expected rps response. Signed-off-by: Jeff McGee Signed-off-by: Daniel Vetter commit fd3fcbd3b3f12f878737d331d361de7eda0f579a Author: Jeff McGee Date: Tue Jan 28 18:25:04 2014 -0600 lib/drmtest: Add igt_wait_helper igt_wait_helper compliments igt_stop_helper and is used when helper processes are expected to exit naturally. Signed-off-by: Jeff McGee Signed-off-by: Daniel Vetter commit 3bada1626cd35800533361296f4340f64b91321c Author: Jeff McGee Date: Tue Jan 28 18:25:03 2014 -0600 pm_rps: New subtest min-max-config-idle Like subtest basic-api, but additionally requires that current frequency is settling to the configured minimum within reasonable time since we are idle. Signed-off-by: Jeff McGee Signed-off-by: Daniel Vetter commit 2423b6c04e54792adc42b7d477861d9ffb87fdc3 Author: Imre Deak Date: Wed Feb 5 13:48:26 2014 +0200 lib/drmtest: fix hang in quiescent_gpu_at_exit due to signal-unsafe asprintf I got kms_flip in hung state with the backtrace below, while the parent process waiting for the signal helper to exit. It was quite easy to reproduce the bug by running kms_flip --run-subtest=flip-vs-dpms-off-vs-modeset With the change I couldn't reproduce it. TODO: audit/fix other signal handlers with signal-unsafe functions 0  0x00007f9a1362018b in ?? () from /lib/x86_64-linux-gnu/libc.so.6 1  0x00007f9a1359df81 in ?? () from /lib/x86_64-linux-gnu/libc.so.6 2  0x00007f9a1359b6cf in ?? () from /lib/x86_64-linux-gnu/libc.so.6 3  0x00007f9a13628eb6 in __vasprintf_chk () from /lib/x86_64-linux-gnu/libc.so.6 4  0x00007f9a13628e72 in __asprintf_chk () from /lib/x86_64-linux-gnu/libc.so.6 5  0x000000000040a4a2 in asprintf (__fmt=0x417441 "/dev/dri/card%u", __ptr=0x7fff1a972c08)     at /usr/include/x86_64-linux-gnu/bits/stdio2.h:178 6  drm_get_card () at drmtest.c:190 7  0x000000000040a54a in __drm_open_any () at drmtest.c:229 8  0x000000000040a846 in quiescent_gpu_at_exit (sig=) at drmtest.c:281 9  0x0000000000408759 in call_exit_handlers (sig=3) at drmtest.c:1519 10 fatal_sig_handler (sig=3) at drmtest.c:1543 11 12 0x00007f9a13596770 in ?? () from /lib/x86_64-linux-gnu/libc.so.6 13 0x00007f9a135d8f3f in fork () from /lib/x86_64-linux-gnu/libc.so.6 14 0x000000000040b3af in __igt_fork_helper (proc=0x61d8cc ) at drmtest.c:1199 15 0x000000000040b4ce in igt_fork_signal_helper () at drmtest.c:751 16 0x0000000000404167 in main (argc=, argv=) at kms_flip.c:1533 v2: - can't use snprintf as that's also signal-unsafe, so just use a dup'ed fd (Chris,Daniel) Signed-off-by: Imre Deak commit 5c9c8841eb66676dd65e84d51fa87a4b4b8ad764 Author: Chris Wilson Date: Tue Feb 4 14:14:31 2014 +0000 tests: Add gem_madvise Exercise that calling madvise produces expected results Signed-off-by: Chris Wilson Signed-off-by: Daniel Vetter commit 98952a1f6e7e5439e4b77482bd08422212c32e47 Author: Daniel Vetter Date: Tue Feb 4 13:10:37 2014 +0100 fix make distcheck Bunch of explicit include paths needed adjustments and eviction_common.c needs to be added to the dist files. This has been broken in the following three commits: commit 42bcd05eb3f1545fbf9c397c3f37c3f6a27c5da4 Author: Tvrtko Ursulin Date: Mon Feb 3 10:59:41 2014 +0000 tests/eviction_common: Avoid submitting duplicate objects commit b92b397d5e4ffe10ed92fb2fc6711758ef5bcf89 Author: Tvrtko Ursulin Date: Tue Dec 3 15:09:57 2013 +0000 build: Make sure asserts are enabled for tests commit 8c33e9ad111d27b84db4daac43809a807f262632 Author: Ben Widawsky Date: Fri Dec 6 20:35:29 2013 -0800 intel-gpu-tools: Version informatio Cc: Tvrtko Ursulin Cc: Ben Widawsky Signed-off-by: Daniel Vetter commit 42bcd05eb3f1545fbf9c397c3f37c3f6a27c5da4 Author: Tvrtko Ursulin Date: Mon Feb 3 10:59:41 2014 +0000 tests/eviction_common: Avoid submitting duplicate objects Make sure selection loop does not generate duplicates when it picks a subset of objects for a single exec buffer. Signed-off-by: Tvrtko Ursulin Signed-off-by: Daniel Vetter commit e1dea7e2e190307056a05a2945e59b59fe5b6fc0 Author: Tvrtko Ursulin Date: Mon Feb 3 10:59:40 2014 +0000 tests/gem_evict_everything: Factor out eviction logic In preparation for userptr test we move the eviction logic into a common file so it can be used from both test cases. Signed-off-by: Tvrtko Ursulin Signed-off-by: Daniel Vetter commit d8ea09f24d9e0c75593bc6e89c742998c23087fc Author: Damien Lespiau Date: Wed Jan 29 15:53:33 2014 +0000 gem_ring_sync_copy: Add a ring to ring synchronization test The goal of this test is to ensure that we respect inter ring dependencies. A more detailed description of what it tests is in a comment. The tests relies on having a blit function for the ring, so is currently only checking synchronization between the render and blitter ring. v2: Actually create an inter-ring dependency by making the first copy on ring2 and the second on ring2, not both on ring2. Signed-off-by: Damien Lespiau commit 09bcb0ab4b79273cfccdfa87f860b0be1addcc7b Author: Rafael Barbalho Date: Fri Jan 31 14:57:40 2014 +0000 android: Change tests & tools directory to use the lib directory Instead of recompiling the lib directory for every tool or tests we can just re-use the static library. This also has the nice side effect of fixing the android "mm" command to allow android users to only rebuild the local changes in either the test or tools directory. Signed-off-by: Rafael Barbalho Signed-off-by: Damien Lespiau commit bdb08f981c5ebed0ff1f0067f1aa085636b9ac7b Author: Rafael Barbalho Date: Fri Jan 31 14:57:39 2014 +0000 android: Add the generation of vesion.h & config.h to lib The lib directory is used by all the tests & tools so it should really be the place where the generate files are created. Signed-off-by: Rafael Barbalho Signed-off-by: Damien Lespiau commit 005c333e5c3ba9285e5d918877e9dd992fd2a4b9 Author: Rafael Barbalho Date: Fri Jan 31 14:57:38 2014 +0000 android: Add makefile for the lib directory The lib directory should really be compiled as a static library on its own and be re-used by any tests or tools that require it. Signed-off-by: Rafael Barbalho Signed-off-by: Damien Lespiau commit 4c79264b3cda6ef548f4125ebf49d470ab968ede Author: Rafael Barbalho Date: Fri Jan 31 14:57:37 2014 +0000 android: Clean-up common makefile directives All the Android.mk files had the same directives to find the path of libdrm & libpciaccess. These are no longer required as the android system now allows the libraries being used to export include paths to dependant modules & programs. Signed-off-by: Rafael Barbalho Signed-off-by: Damien Lespiau commit 79ea9a9071fcd39493f68ae4d7ba9941701195c9 Author: Rafael Barbalho Date: Fri Jan 31 14:57:36 2014 +0000 android: Handle the case when android doesn't have mmap64 Not all versions of Android have the mmap64 call, thus a suitable alternative must be called. Signed-off-by: Rafael Barbalho Signed-off-by: Damien Lespiau commit e72f3bcc7700fbf1f381248b0c7fedb2777b8ff1 Author: Ben Widawsky Date: Fri Jan 31 05:33:56 2014 +0000 quick_dump/broadwell: Add gen7 ring mode registers Signed-off-by: Ben Widawsky commit 56d347fad864d13b9d39512a308bb54d5f36f828 Author: Ben Widawsky Date: Fri Jan 31 05:31:07 2014 +0000 quick_dump/haswell: Add gen7 stuff + VECS_MODE Signed-off-by: Ben Widawsky commit 556c200e99da687f828f2d5e61a49f7fc21b2cb7 Author: Ben Widawsky Date: Fri Jan 31 05:29:27 2014 +0000 quick_dump/gen7: Add other GFX_MODE registers Signed-off-by: Ben Widawsky commit b5a1ab3d6e2002607f6c6387b0bf8a79cffc8224 Author: Ben Widawsky Date: Fri Jan 31 04:46:06 2014 +0000 quick_dump: Add a file argument -f, or --file will simply dump the file in the specified format. All other options will be skipped. This is helpful when one wants to create their own list for temporary debug, or if one requires a subset of registers to work around things like fused off PCH. Signed-off-by: Ben Widawsky commit 8ce7c366d7d2903aa66161d836bd1295a8d3a806 Author: Ben Widawsky Date: Fri Jan 31 04:42:50 2014 +0000 quick_dump: Refactor to allow future code Extract everything possible, and create a main function which is pretty darn simple. The goal is to make the various paths the program can take based on command line options (one more is coming) more decipherable. Signed-off-by: Ben Widawsky commit 48ad03ca0c5f078b8d12a64323fd93b3858041af Author: Chris Wilson Date: Fri Jan 31 16:56:01 2014 +0000 lib: Capture errno on entry When printing the errno, it is important that we capture the user errno before we make any library calls - as they may alter the value. References: https://bugs.freedesktop.org/show_bug.cgi?id=74007 Signed-off-by: Chris Wilson commit be22e10885eba556428919c2bbc71b4b644cb1a4 Author: Chris Wilson Date: Wed Jan 29 22:59:57 2014 +0000 igt/gem_close_race: Fix blit commands for BDW Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73958 Signed-off-by: Chris Wilson commit 5e21b434da95c8b66a97a79649a61eb40a161a70 Author: Jesse Barnes Date: Tue Jan 28 14:17:30 2014 -0800 iosf: make iosf_rw take a larger addr For higher DPIO ranges for example. Also fix it up to use intel_register_read/write. Signed-off-by: Jesse Barnes commit e558dd998de723f7f110e51dbd0ce495748d5925 Author: Jesse Barnes Date: Tue Jan 28 13:58:55 2014 -0800 dpio: make dpio reg read/write output like normal reg read/write output Just for consistency. Signed-off-by: Jesse Barnes commit 670a717b5bf4c21dde338b87e5b660632ff6f6b0 Author: Jesse Barnes Date: Tue Jan 28 13:58:23 2014 -0800 mmio: drop unused i915_loaded fn Signed-off-by: Jesse Barnes commit 81095305f4df5289f4d494345da0c87949b55f54 Author: Jesse Barnes Date: Tue Jan 28 13:46:38 2014 -0800 mmio: use intel_iosf.c for DPIO reads and writes This makes it a bit more like the kernel, so we can go poke at DPIO and other IOSF regs a bit more easily. Signed-off-by: Jesse Barnes commit d1b5823ee7645c767616ee4e5f23f6692a280dde Author: Daniel Vetter Date: Mon Jan 27 23:38:02 2014 +0100 tests/pm_rps: rename basic test to "basic-api" Jeff plans to add more tests ... Signed-off-by: Daniel Vetter commit 5d26a7e2a246265754d51320c35364a3b94cf4e6 Author: Jeff McGee Date: Tue Jan 21 17:14:33 2014 -0600 pm_rps: Make frequency logging more compact Signed-off-by: Jeff McGee Signed-off-by: Daniel Vetter commit 88864d2ba584cc11f33dafc5c91f1a8e3175d963 Author: Jeff McGee Date: Tue Jan 21 17:14:32 2014 -0600 pm_rps: Remove repeat sysfs reads Storing values avoids some unnecessary overhead but more importantly allows all of our processing to be atomic. Signed-off-by: Jeff McGee Signed-off-by: Daniel Vetter commit 4e3b661b480b0a43d9cf45afaf0cae835cb66dcc Author: Jeff McGee Date: Tue Jan 21 17:14:31 2014 -0600 pm_rps: Expand on min and max config testing Add a function that methodically varies min and max to exercise several valid and invalid combinations. Allow the caller to define what is to be checked between each step. Signed-off-by: Jeff McGee Signed-off-by: Daniel Vetter commit 22533b1eb038dbf4d3dc79945b81cefc4aac64be Author: Jesse Barnes Date: Mon Jan 27 10:43:02 2014 -0800 NEWS: update with nomodeset register access change commit 0d20fa3cc218c48421a9625fc1241008db4496d0 Author: Jesse Barnes Date: Mon Jan 27 10:26:57 2014 -0800 quick_dump: more vlv dpio regs commit 5ecac45ff08945f99365ff6d29ba21f896cdb1b6 Author: Jesse Barnes Date: Mon Jan 27 10:26:05 2014 -0800 mmio: allow register init even if debugfs isn't available and i915 isn't loaded This lets us dump regs even if modeset=0 for example. Signed-off-by: Jesse Barnes commit 0b4c33f62c2d4a61b0b5e9184524c8ca273400b1 Author: Chris Wilson Date: Sun Jan 26 14:36:32 2014 +0000 igt/gem_concurrent_blit: Scale resource usage to RAM correctly Note that we use twice the number of buffers, and so we need to restrict num_buffers appropriately to fit within RAM. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72255 Signed-off-by: Chris Wilson commit b5109e62cea170f3550588119d41a9bcf79789e5 Author: Chris Wilson Date: Thu Jan 23 21:50:36 2014 +0000 intel_error_decode: Protect against missing ring registers A dodgy kernel may miss printing out the ring registers leading to a FPE. Signed-off-by: Chris Wilson commit 4a9b70c3262a30e70207583cc23da67bba538437 Author: Tvrtko Ursulin Date: Wed Jan 22 10:41:05 2014 +0000 tools: Allow building on Android after noinst_PROGRAMS is not defined any more Looks like filter-out macro gets silently unhappy about an undefined variable. Reviewed-by: Damien Lespiau Signed-off-by: Tvrtko Ursulin Signed-off-by: Damien Lespiau commit c05c88c2b641aaab83608fb2c8e816893690c1fe Author: Mika Kuoppala Date: Tue Jan 21 17:40:08 2014 +0200 tests/gem_reset_stats: stop only one ring when submitting hang If we stop all the rings, we can end up blaming the innocent rings on hangcheck. Reference: https://bugs.freedesktop.org/show_bug.cgi?id=73652 Signed-off-by: Mika Kuoppala Signed-off-by: Daniel Vetter commit 1bbb607d9f3ee8e725a784f740937577f153a520 Author: Ben Widawsky Date: Tue Jan 21 18:03:42 2014 -0800 gem_storedw_batches_loop: Fix for pre-BDW My git failures are truly remarkable. I ended up pushing the wrong commit here: commit 1552aa21124cabe762862bb414490510415a2b2d Author: Ben Widawsky Date: Mon Jan 13 06:28:45 2014 -0800 gem_storedw_batches_loop: Fix for BDW This puts the offset of the reloc in the wrong place for pre-BDW Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73866 Signed-off-by: Ben Widawsky commit 03d144d16ffef63cedca81ccb4708b173b16868f Author: Chris Wilson Date: Mon Jan 20 15:57:16 2014 +0000 kms_flip: Try to consume all fences after a flip As a flip is outstanding, there is an issue that the kernel may not be able to release one of the fences that userspace requires and erroneous report EDEADLK (on gen2, gen3). Signed-off-by: Chris Wilson Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73696 commit ac0224f184212e8c4baa6de6fbe379c7c22f2008 Author: Ben Widawsky Date: Mon Jan 20 10:40:23 2014 -0800 quick_dump/watermarks: lp3, misc and debug I forgot to git add this originally. Signed-off-by: Ben Widawsky commit 3deaeb282656e6e9da4327b79db385479fefdb0b Author: Ben Widawsky Date: Fri Jan 17 20:32:01 2014 -0800 quick_dump/broadwell: Use haswell_other For now, the power controls and watermarks seem to be the same offsets. So just reuse haswell_other.txt Signed-off-by: Ben Widawsky commit 58aa7346c370700658fbbe13659e823afe98b6e4 Author: Ben Widawsky Date: Fri Jan 17 20:26:54 2014 -0800 quick_dump/hsw: Watermark debug Signed-off-by: Ben Widawsky commit 73ca22c9e880b0598935c871d809ecfb1f3473fc Author: Ben Widawsky Date: Fri Jan 17 20:10:46 2014 -0800 quick_dump: Allow comments in the register files Simple addition to the parser to add the following full line comments: {';', '#', "//"} Empty lines will also be ignored Signed-off-by: Ben Widawsky commit 724340cf36b4e2a87d8c545410224b617f813cc8 Author: Ben Widawsky Date: Fri Jan 17 19:35:22 2014 -0800 quick_dump: Fix the indentation Fix the spaces to use [the python standard] 4 soft spaces for tabe. While here, add the proper vim tag so we don't do it again. Signed-off-by: Ben Widawsky commit a5d17d2b0e14cafaa2573d9e538af2a98d2338cc Author: Ben Widawsky Date: Fri Jan 17 20:16:55 2014 -0800 .gitignore: Add pycache quick_dump which is python, generates files in __pycache__ which are the moral equivalent of object files. Don't let people add them to the index accidentally. Signed-off-by: Ben Widawsky commit 5b9147513029ca1e1eaf2c028e6f868adc3359f6 Author: Daniel Vetter Date: Sun Jan 19 22:15:13 2014 +0100 tests/gem_fd_exhaustion: Make it work - We need to drop root to actually hit the limits. This requires us to fork the actual test since otherwise the exit handlers (which require root) fail the entire test. - Don't assert that the gem create ioctl succeeds, it won't on the final run of the loop. Signed-off-by: Daniel Vetter commit 7d2ba073adef9c4c6f7a679befa2a5d19cbf4735 Author: Daniel Vetter Date: Sun Jan 19 22:13:36 2014 +0100 lib: add __gem_create Useful for when a gem_create ioctl is expected to fail. Signed-off-by: Daniel Vetter commit 71f1f9eafd68c82382d165028ae73035742bb730 Author: Daniel Vetter Date: Sun Jan 19 22:12:25 2014 +0100 tests/pm_rps: Add missing static Signed-off-by: Daniel Vetter commit ae57cd7dc7db8a9a72d8ee764f72cd8fd9e75a76 Author: Daniel Vetter Date: Sun Jan 19 22:11:47 2014 +0100 debugger: avoid global variable shadowing Signed-off-by: Daniel Vetter commit 862de5636f545a071f29f60ae0a4ab1370f5cf8b Author: Daniel Vetter Date: Sun Jan 19 22:06:48 2014 +0100 lib: extract igt_drop_root Useful in other tests. Signed-off-by: Daniel Vetter commit 70082e3677711bc01330ba3483fbdce5779f915d Author: Daniel Vetter Date: Sun Jan 19 18:01:24 2014 +0100 tests: Add gem_fd_exhaustion Exhausts the system limit on open files and then tries to create a new shmem-backed gem object. Linus Torvalds reported that this blows up on a null obj->base.filp, but I can't reproduce this here: http://lists.freedesktop.org/archives/intel-gfx/2014-January/038433.html Signed-off-by: Daniel Vetter commit 36106004e0e590557041e491fe690f01c89bc115 Author: Daniel Vetter Date: Sun Jan 19 14:48:07 2014 +0100 tests: Move pm_rps to the right Makefile target If it's not in the multi-test target group testrunners won't pick up on the fact that they need to enumerate subtests first. Cc: jeff.mcgee@intel.com Signed-off-by: Daniel Vetter commit 7f1c5057cf1dec0494b8929722fc092625b3c4d1 Author: Jeff McGee Date: Fri Jan 17 16:56:06 2014 -0600 pm_rps: Fix verbose option and streamline its use Signed-off-by: Jeff McGee Signed-off-by: Daniel Vetter commit d14cd7430bbba6516a900393f7af1f44c7b6f3ee Author: Jeff McGee Date: Fri Jan 17 16:56:05 2014 -0600 pm_rps: Convert to subtest structure Signed-off-by: Jeff McGee Signed-off-by: Daniel Vetter commit 0102b6bde6dc69cccee7d33df233e4ef1b73d9be Author: Jeff McGee Date: Fri Jan 17 16:56:04 2014 -0600 pm_rps: Add read back checking on sysfs writes Signed-off-by: Jeff McGee Signed-off-by: Daniel Vetter commit e07e758004ae3014504b7799cff3838f11dce848 Author: Daniel Vetter Date: Fri Jan 17 07:42:22 2014 +0100 tools: Install them all No reason really not too, especially since we install manpages for some of them. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66656 Signed-off-by: Daniel Vetter commit 8fa2066d7e707787019ecda814442c4789840499 Author: Daniel Vetter Date: Wed Jan 15 23:59:52 2014 +0100 tests/gem_gtt_hog: Use igt_simple_main Results in the compiler complaining about wrong exits and return values. Signed-off-by: Daniel Vetter commit eb1fddc057b363225153f86cf419f42d7d83469d Author: Daniel Vetter Date: Wed Jan 15 23:58:50 2014 +0100 tests/primve_nv_pcopy: Comment out unused check_swizzle function I've botched this in my patch to disable the swizzled pcopy test. Signed-off-by: Daniel Vetter commit 5e278c86eda1d5ade7c0fc425edc589e3c9dff59 Author: Chris Wilson Date: Wed Jan 15 10:40:40 2014 +0000 gem_gtt_hog: use a normal exit() Since we don't execute any subtests, using igt_exit leads to inconsistent behaviour. In the future, this may be converted. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73641 Signed-off-by: Chris Wilson commit a896ef9c1f67cf707fd2aea900e9276b4ff535d6 Author: Robert Beckett Date: Tue Jan 14 18:01:38 2014 +0000 igt: tests/Android.mk: fix LOCAL_PATH usage Fix usage of shared variable LOCAL_PATH in deferred variable expansion area. In Makefile language, rule and dependency definitions use immediate expansions of variables, so they get expanded as soon as the rule is created (1st pass). Rule implementation (a.k.a recipe) use deferred expansion (2nd pass). Android effectively makes all Android.mk files a single makefile by including them all in a big tree from the toplevel makefile. The rules are all evaluated in the first pass and targets are generated. Then the 2nd pass happens and the required target's recipes are run. At this point, LOCAL_PATH has been assigned the value from the last evaluated Android.mk in the 1st phase that defined LOCAL_PATH (most Android.mk use this variable). In my particular case, it was the bootloader's Android.mk that was evaluated last and had defined LOCAL_PATH to it's path. The errors are rather misleading due to it looking like a bug in another module's Android.mk rather than this one :) Basically, if you want to use a variable that any other Android.mk defines, then you can only use it in an immediate expansion context, not a deferred expansion context as it will likely be re-defined by the time the 2nd pass happens. This patch stores it in a unique variable that should not be being used by other Android.mk files. An alternative fix would be to use $@ and $< as the files in question are target and dependency, but I never like using those as they can easily break if dependencies are added etc. I prefer variable to be explicitly named to make them obvious. See gnu make manual for explanation of deferred vs immediate expansion of variables : http://www.gnu.org/software/make/manual/make.html#Reading-Makefiles Reviewed-by: Damien Lespiau Signed-off-by: Robert Beckett commit 44c0b2aeff41e258c74bb1b1221359c4661accd8 Author: Mika Kuoppala Date: Fri Jan 10 17:24:17 2014 +0200 tests/gem_reset_stats: run tests on all rings Run all relevant tests on all rings. Suggested-by: Daniel Vetter Signed-off-by: Mika Kuoppala Signed-off-by: Daniel Vetter commit 3367359a9858a5ad806876213593ad912d2ef30f Author: Mika Kuoppala Date: Fri Jan 10 17:24:16 2014 +0200 tests/gem_reset_stats: split ctx tests Split context related tests from non-context ones and cleanup the naming. Signed-off-by: Mika Kuoppala Signed-off-by: Daniel Vetter commit fef1930bf30b8182fe8e6e26b8f722ee8995da71 Author: Daniel Vetter Date: Tue Jan 14 13:41:21 2014 +0100 tests/prime_nv_pcopy: disable swizzle tests It's pure luck that nv can detile some of the intel layouts since one of the video MC formats matches it. Since we can't possible fix this comment the test out. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73538 Acked-by: Maarten Lankhorst Signed-off-by: Daniel Vetter commit 1552aa21124cabe762862bb414490510415a2b2d Author: Ben Widawsky Date: Mon Jan 13 06:28:45 2014 -0800 gem_storedw_batches_loop: Fix for BDW Existing code was trying to be too clever and wasn't properly emitting the high dword, or the correct length. Signed-off-by: Ben Widawsky commit fee27cf822cff981f3e6f8fb6ea4a8c5fe3579b3 Author: Ville Syrjälä Date: Mon Jan 13 17:05:19 2014 +0200 tests: Drop glib.h include from kms_cursor_crc and kms_fbc_crc kms_cursor_crc and kms_fbc_crc don't need glib.h. This was just some copy-paste error on my part. Signed-off-by: Ville Syrjälä commit 2a7dbe5f0103ffdf44be174781868adb1a03f8a4 Author: Jeff McGee Date: Fri Jan 10 15:12:33 2014 -0600 pm_rps: Use igt exit handler for restore Signed-off-by: Jeff McGee Signed-off-by: Daniel Vetter commit d0b5fd2bff7ce8ec1ada15da6ca9ed2425cbf1c5 Author: Jeff McGee Date: Fri Jan 10 15:12:32 2014 -0600 pm_rps: Fix test to target original min and max The goal of the test is to confirm that gt_cur_freq_mhz can be forced to the boundaries of the frequency range by collapsing gt_min_freq_mhz and gt_max_freq_mhz to the target value. But we miss testing the upper end of the range by targetting the current value of max after it has been set equal to min. So fix by targetting orginal max instead of current max. This correction exposes a problem in setfreq where min is always set to target before max, which should fail if the target value is greater than max. So fix that too. Signed-off-by: Jeff McGee Signed-off-by: Daniel Vetter commit 44b5d7b3300dd7c94d09c57c95ab3a407f8b17ef Author: Jeff McGee Date: Fri Jan 10 15:12:31 2014 -0600 pm_rps: Assert that valid sysfs writes return success do_writeval now always checks the return value, whether we expect success or a specific error. Also add new macro writeval_inval to simplify repeated use of do_writeval to test for EINVAL return code. Signed-off-by: Jeff McGee Signed-off-by: Daniel Vetter commit 265efbb2c4401542c8753e0d83d7a98493720865 Author: Jeff McGee Date: Fri Jan 10 15:12:30 2014 -0600 pm_rps: Use unbuffered I/O on sysfs files Bionic C library may not re-read a buffered, read-only file which results in failure to monitor changes in gt_cur_freq_mhz. Signed-off-by: Jeff McGee Signed-off-by: Daniel Vetter commit 45d63644d28c34202a97bd812f6c46c853e97d28 Author: Chris Wilson Date: Fri Jan 10 21:13:56 2014 +0000 tests/gem_pipe_control_store_loop: Delete bogus assertion target_bo->offset was just being used to verify that the batch submission worked and fortunately was not being relied upon for any subsequent conditions. However, address 0 is valid and so the assertion itself was bogus as it is possible (almost assured with full-ppgtt) for the target_bo to be located at address 0. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72984 Signed-off-by: Chris Wilson commit 84af2b9be8792fb288d4ce75821a27706e5351c3 Author: Chris Wilson Date: Fri Jan 10 16:09:57 2014 +0000 gem_gtt_hog: Print elapsed time in ms Missed one last diff before pushing commit f62abaff99792f10962b1aa072b8a3b314765591 Author: Chris Wilson Date: Fri Jan 10 13:42:55 2014 +0000 tests: Add gem_gtt_hog The purpose of this test is to exercise the userspace latency hogs reported by Arjan van de Ven. He found some applications blocked the device by stalling on the GPU inside the pagefault handler. commit 2c9e76184518854f21d367296ababef87fb41243 Author: Daniel Vetter Date: Fri Jan 10 09:21:54 2014 +0100 tests/gem_largeobject: Prefault instead of pin This doesn't test pin but pwriting to big objects ... Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72901 Signed-off-by: Daniel Vetter commit cb9e8376fac2c96c2e6bffa511b3087d916286d0 Author: Daniel Vetter Date: Fri Jan 10 09:21:15 2014 +0100 tests: fixup igt_simple_main fallout Oops, I should look at compilier warnings a bit better. Signed-off-by: Daniel Vetter commit 7775fca2df815dfee18b181de6fe13df27bb9867 Author: Daniel Vetter Date: Wed Jan 8 20:24:36 2014 +0100 tests/gem_ctx_exec: fix ram requirement fumble We need to half available ram, not double it ... Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72557 Signed-off-by: Daniel Vetter commit 864d09ed4c11f89e1cd91b187a48c57b4c00b779 Author: Daniel Vetter Date: Tue Jan 7 19:25:11 2014 +0100 tests/NAMING-CONVENTION: s/snooped/snoop/ Oops. We should be a bit more consistent with which verb form we're picking. tile,tiled,tiling is even worse ... Signed-off-by: Daniel Vetter commit 67c80f8d816259067b7474fe6f8c79915d6483f0 Author: Devon Davies Date: Wed Jan 8 16:07:06 2014 +0000 build: Added -UNDEBUG to tools/Android.mk NDEBUG is defined by default in Android and causes assert(x) to be defined as void(x). This change ensures that asserts work as expected in tools. This flag is already inside tests/Android.mk Reviewed-by: Oscar Mateo Signed-off-by: Devon Davies Signed-off-by: Damien Lespiau commit 0ec9c94bea6d1ba3969a03ebf75494115e24edf6 Author: Damien Lespiau Date: Mon Jan 6 14:56:02 2014 +0000 tools: Remove intel_disable_clock_gating This tool only supports ILK. I take the fact that nobody has felt the need to update for later platform a sign it's not very useful. Reviewed-by: Kenneth Graunke Signed-off-by: Damien Lespiau commit 5fdca4c1666fb055f1ba955beaa5511b99ebfbd6 Author: Damien Lespiau Date: Tue Jun 4 13:55:06 2013 +0100 tools: Removed unused tools/intel_iosf_read.c Also intel_iosf_read() does not exist, and would need a bit more arguments. Reviewed-by: Kenneth Graunke Signed-off-by: Damien Lespiau commit a1baf3050e3b329cf52064ec92c1dbd8bde3aab0 Author: Damien Lespiau Date: Tue Jun 4 11:36:23 2013 +0100 lib: Use INSTDONE_I965 and INSTDONE_1 for gen6 The GEN6_INSTDONE_1 and GEN6_INSTDONE_2 registers are just the old INSTDONE_I965 and INSTDONE_1 registers but renamed. Let's use the old names (this is what the kernel does). Reviewed-by: Kenneth Graunke Signed-off-by: Damien Lespiau commit 3ebd8aa95e610268cfa9b1307e6c707649f96f40 Author: Damien Lespiau Date: Tue Jun 4 09:06:50 2013 +0100 lib: Move the INSTDONE bit definitions to instdone.c This is the only place where they are used and we've even started using 1 << n constants with gen 7. Reviewed-by: Kenneth Graunke Signed-off-by: Damien Lespiau commit da78bc497b46f09f8b161202d6f61e6dd26e9a65 Author: Damien Lespiau Date: Tue Jun 4 06:48:49 2013 +0100 instdone: Add an assert to make sure we never overflow instdone_bits Reviewed-by: Kenneth Graunke Signed-off-by: Damien Lespiau commit d8b1dee220dc07bfae9d7fd82e360cc56bf9c30f Author: Damien Lespiau Date: Tue Jun 4 05:41:36 2013 +0100 intel_reg: Renamed INST_DONE to INSTDONE That's how the registers are named in the kernel defines. Reviewed-by: Kenneth Graunke Signed-off-by: Damien Lespiau commit 98c10d379b8d6b8e34da1e9963a114413021838e Author: Paulo Zanoni Date: Mon Dec 30 11:40:03 2013 -0200 tests/kms_flip: free the test_output struct when counting modes Looks like we have to do a lot of work just to count the number of modes... Caught by Valgrind. Signed-off-by: Paulo Zanoni commit 69856b5e7b96f6945da7f6c42a1468a38513b3ca Author: Paulo Zanoni Date: Mon Dec 30 11:33:16 2013 -0200 tests/kms_flip: don't leak the connector_config struct ... in case we can't find a compatible mode. We already have config[0], we can't return without freeing it first. Caught by Valgrind. Signed-off-by: Paulo Zanoni commit 056500bdc5e4243a8baa3503ec9c3fdd7323a454 Author: Paulo Zanoni Date: Mon Dec 30 11:30:03 2013 -0200 tests/kms_flip: don't leak the CRTC The kms_flip program calls kmstest_get_connector_config, which returns a struct containing some allocated variables, including a pointer to the CRTC. The problem is that we copy the values returned by this structure to the test_output struct, but we ignore the CRTC pointer. So free the CRTC pointer instead of leaking it. Caught by Valgrind. Signed-off-by: Paulo Zanoni commit 02ad7e04dd0ddbb77e928330f8490680f1e200cc Author: Paulo Zanoni Date: Mon Dec 30 11:27:57 2013 -0200 tests/kms_flip: don't leak the connector when setting DPMS Caught by Valgrind. Signed-off-by: Paulo Zanoni commit 329faeccf72ce8f289004809d5e3245cb6620ab9 Author: Paulo Zanoni Date: Mon Dec 30 11:20:39 2013 -0200 drmtest: don't leak memory when parsing the arguments Found this while investigating memory leaks on kms_flip. Detected by Valgrind. Signed-off-by: Paulo Zanoni commit bb40494671b7641540dcb2015e9411aebd5016bb Author: Daniel Vetter Date: Tue Jan 7 08:14:33 2014 +0100 NEWS updates Signed-off-by: Daniel Vetter commit 1d2ef9553ae4b738595676b7554f93d70acd78a0 Author: Damien Lespiau Date: Mon Dec 16 11:28:39 2013 +0000 intel_error_decode: Factor out common decoding code 4 pieces of code were looking very similar. Let's factor out a common function in the not so unlikely case we need to tweak that code. Signed-off-by: Damien Lespiau commit 01eeab94482de8c8fa687ffcfa95e5d32720909d Author: Ben Widawsky Date: Thu Jan 2 19:33:57 2014 -1000 configure.ac: Fix shader debugger for real I tried to get fancy before, but ended up pushing something which I didn't test. Keep the thing simple and stupid, and just make it work. Reported-by: Paulo Zanoni Signed-off-by: Ben Widawsky commit 164d9d26ac33029287a24fbed549e3a2858d5d51 Author: Chris Wilson Date: Mon Dec 30 17:48:43 2013 +0000 kmstest: Fix up lifetimes of cairo objects cairo_t is the short lived drawing context, whereas cairo_surface_t is the heavyweight object that persists and is also tied to underlying GEM objects. So make the kmstest API reflect the different weights and fix the lifetime and underlying object reference leaks. Based on the fix by Paulo Zanoni. Signed-off-by: Chris Wilson commit 9d6cfa6b59d0c22cf772ca71069f9e5f3e53d055 Author: Ben Widawsky Date: Mon Dec 30 10:41:43 2013 -0800 configure.ac: Fixup conditional shader debugger The original patch was incomplete. Testing no assembler build is a pain for me. Sorry for the mess. Signed-off-by: Ben Widawsky commit 3ed4b5bd1180c034820a4bf83eec896fd21ae33e Author: Ben Widawsky Date: Mon Dec 30 10:32:06 2013 -0800 configure.ac: Remove GEN4ASM define This was a leftover hunk that got accidently merged. Signed-off-by: Ben Widawsky commit 72fe2b641488fcc01d48187fe1642337ce61cef0 Author: Ben Widawsky Date: Tue Dec 24 13:12:31 2013 -0800 gem_exec_blit: gen8 updates for blit Signed-off-by: Ben Widawsky commit 94b2b861f5e2cd3dd5e32459174c9fdc3c3b0d8b Author: Ben Widawsky Date: Fri Dec 20 21:15:16 2013 -0800 shader-debugger: Use in tree gen4asm Reported-by: Patrick McMunn Signed-off-by: Ben Widawsky commit 4f28614777a5dec5de5cafacd640f5b50180acaa Author: Daniel Vetter Date: Fri Dec 20 16:56:14 2013 +0100 README: Fix spelling fail Thanks to Jani for spotting this. Signed-off-by: Daniel Vetter commit fd6c66c4a2ad2b13cd56dc93c4cbf3a56bc0b3a8 Author: Daniel Vetter Date: Fri Dec 20 15:49:59 2013 +0100 README: Document how to avoid Waffle with piglit Suggested by Paulo. Signed-off-by: Daniel Vetter commit 2a71bff3173c538d618f5fc6f45b7150fc10f3fb Author: Paulo Zanoni Date: Mon Dec 16 18:47:39 2013 -0200 tests/pm_pc8: check if we can't become DRM master QA reported a failure that I believe happened because we couldn't become DRM master, so add code that checks for this and prints a nice error message. Signed-off-by: Paulo Zanoni commit 62e1cbc6343577e4fe2ea5b93981fab015872670 Author: Oscar Mateo Date: Fri Dec 13 20:48:24 2013 +0000 build: Create version and config information files in Android Also, skip the compilation of pm_lpsp in Android (uses Cairo) Signed-off-by: Oscar Mateo Signed-off-by: Daniel Vetter commit 4eae05f03b893e2e7b2eb0e0d9799fe0228393bb Author: Oscar Mateo Date: Fri Dec 13 16:24:37 2013 +0000 tests/gem_close_race: Adapt the test for Full PPGTT With Full PPGTT, each new fd creates a new context and thus a new PPGTT, so we have to reduce the number of simultaneous fds or face OOM problems. For every new PPGTT, its PDEs are stored in the GGTT which imposes a limit of 1024 new contexts. We want to leave at least 1/4 of the GGTT available for "important" stuff like scanout buffers, so never open more than 768 fds. v2: Unconditionally use the lower limit, as suggested by Daniel Vetter Signed-off-by: Oscar Mateo Signed-off-by: Daniel Vetter commit be14c7bb04664a515df11c21f90a0f29c7756e6b Author: Damien Lespiau Date: Fri Dec 13 12:53:31 2013 +0000 lib: Include the necessary stdint.h in gen6_render.h Instead of assuming someone else will do it. Signed-off-by: Damien Lespiau commit 16531069f6b6fc4f8ac5ab537e9829406c348d7b Author: Daniel Vetter Date: Thu Dec 12 22:46:18 2013 +0100 tests: Document the Makefile variables a bit better Also, this is a test for the patchwork hook. Signed-off-by: Daniel Vetter commit a68937ca3b49d2ea89d753b6aecc015df8ad76a5 Author: Mika Kuoppala Date: Tue Dec 10 10:50:48 2013 +0200 tests/gem_reset_stats: add reverse order in close-pending-fork Use own copy of gem_quiescent_gpu() so that test still works if it gets changed. Further improve the test by posting a batch to rings in reverse order. Suggested-by: Daniel Vetter Signed-off-by: Mika Kuoppala Signed-off-by: Daniel Vetter commit 826c4effe624da4bf9337028e15894fbf0c2a3ab Author: Daniel Vetter Date: Thu Dec 12 09:26:58 2013 +0100 tests: Move gem_reset_stats to the right place Binaries should only be added to the HANG target if they're completely broken. If they just cause a recoverable gpu hang as part of the test then they need to be somewhere else. Signed-off-by: Daniel Vetter commit 36f017dfd1a12bcdf03f928ca02e9053f3622efc Author: Paulo Zanoni Date: Tue Dec 3 15:03:02 2013 -0200 tests/kms_setmode: avoid 2 connectors on the same encoder Don't try to set modes on two connectors that share the same encoder. That will just fail. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68463 Reviewed-by: Imre Deak Signed-off-by: Paulo Zanoni commit 13ef9e8d5453f0902e3025981b9cfd68558ff7e1 Author: Imre Deak Date: Tue Dec 10 15:33:07 2013 +0200 kms_flip: consolidate run_test_on_{crtc,crtc_pair} No functional change. Signed-off-by: Imre Deak Acked-by: Daniel Vetter commit 1ac94b50af6ef0ab5607e85960880c284607b88a Author: Imre Deak Date: Tue Dec 10 14:00:19 2013 +0200 kms_flip: keep drm_fd open for the dpms restore exit handler Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=69161 Signed-off-by: Imre Deak commit 2c6c4cf2a146855f1de6e3ca89f9df09da1024be Author: Imre Deak Date: Mon Dec 9 17:28:50 2013 +0200 kms_flip: fix seq_step for 2xcrtc subtests This also raises the absolute wait-for-vblank sequence step from 5 to 10, just to make it consistent with the corresponding 1x subtests. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=69161 Signed-off-by: Imre Deak Reviewed-by: Daniel Vetter commit f034817b401d9e0016cb8d2cddd9220c3a36463a Author: Kenneth Graunke Date: Mon Dec 9 23:29:36 2013 -0800 rendercopy/bdw: Fix length of a bunch of zeroed out packets. A bunch of packets were too short. Signed-off-by: Kenneth Graunke Signed-off-by: Damien Lespiau Reviewed-by: Damien Lespiau Cc: Ben Widawsky Cc: Damien Lespiau commit fdbdc7f325af9b42684fc6c7100cb57c52b31c4a Author: Kenneth Graunke Date: Mon Dec 9 23:29:35 2013 -0800 rendercopy/bdw: Emit 3DSTATE_WM_HZ_OP. We don't want depth/stencil fast clears or HiZ resolves; we want normal drawing. Without this, the pixel pipeline doesn't work. Signed-off-by: Kenneth Graunke Reviewed-by: Damien Lespiau Signed-off-by: Damien Lespiau Cc: Ben Widawsky Cc: Damien Lespiau commit 8cd3a9d5438a5e6961823c15fd41ae02b09c7c9b Author: Daniel Vetter Date: Tue Dec 10 10:30:59 2013 +0100 ignore version.h Signed-off-by: Daniel Vetter commit dda85fb108469e3d3c8ce19751f928c70e9fba4c Author: Daniel Vetter Date: Tue Dec 10 10:18:32 2013 +0100 tests: roll out igt_simple_init/igt_simple_main Also use igt_skip a bit more to simplify some of the tests. Signed-off-by: Daniel Vetter commit ce1a9f918ef2415562bf441c2b7d886c6eb865c4 Author: Daniel Vetter Date: Tue Dec 10 09:58:28 2013 +0100 tests: gem_close_race has subtests! Oops. v2: Found more. Signed-off-by: Daniel Vetter commit ef9745b7faf42b1273c63de6f3e4afcbb896e568 Author: Daniel Vetter Date: Tue Dec 10 09:41:48 2013 +0100 lib: igt_simple_main/init for subtest-less tests Atm only used to print the version information. Signed-off-by: Daniel Vetter commit f1c4ec936c97c4b2f906638180357c8786776316 Author: Daniel Vetter Date: Tue Dec 10 09:26:08 2013 +0100 lib: print uname information in the version string Signed-off-by: Daniel Vetter commit 831a47196dd4d8afbdd967353d689bf8aed4f3e6 Author: Daniel Vetter Date: Tue Dec 10 09:23:44 2013 +0100 lib: Add host platform to version string This is import on systems where we compile 32bit tests that run on 64bit platforms. Signed-off-by: Daniel Vetter commit 8c33e9ad111d27b84db4daac43809a807f262632 Author: Ben Widawsky Date: Fri Dec 6 20:35:29 2013 -0800 intel-gpu-tools: Version information Provide two arguments version, and verbose, which allow printing from an arbitrary igt test. It will show system information (from build time, not runtime), as well as the git SHA being used. This will help reduce errors when people try to reproduce problems. As an example if I want to verify someone is running the correct version of a test, I could ask them to do: bwidawsk@ironside ~/intel-gfx/intel-gpu-tools (master)$ sudo ./tests/gem_exec_nop --verbose gem_exec_nop-git-3c5423b (Linux ironside 3.12.0-1-ARCH #1 SMP PREEMPT Wed Nov 6 09:06:27 CET 2013 x86_64 GNU/Linux) Time to exec x 1: 35.000µs (ring=render) Time to exec x 2: 28.000µs (ring=render) Time to exec x 4: 20.000µs (ring=render) Time to exec x 8: 14.625µs (ring=render) Time to exec x 16: 11.188µs (ring=render) Time to exec x 32: 11.125µs (ring=render) Time to exec x 64: 10.328µs (ring=render) Time to exec x 128: 10.172µs (ring=render) Time to exec x 256: 10.234µs (ring=render) Time to exec x 512: 10.232µs (ring=render) Time to exec x 1024: 10.121µs (ring=render) Time to exec x 2048: 10.151µs (ring=render) Time to exec x 4096: 11.474µs (ring=render) Time to exec x 8192: 9.432µs (ring=render) Time to exec x 16384: 6.003µs (ring=render) Time to exec x 32768: 5.029µs (ring=render) Time to exec x 65536: 4.206µs (ring=render) Time to exec x 131072: 3.630µs (ring=render) Subtest render: SUCCESS --verbose is provided for completeness, but doesn't seem too useful at the moement. bwidawsk@ironside ~/intel-gfx/intel-gpu-tools (master)$ sudo ./tests/gem_exec_nop --version gem_exec_nop-git-3c5423b (Linux ironside 3.12.0-1-ARCH #1 SMP PREEMPT Wed Nov 6 09:06:27 CET 2013 x86_64 GNU/Linux) I've put version.h in the root directory so that any subdir can access it. I've added the tests usage since it's immediately useful, and done easily via Daniels igt infrastructure work. v2: - Always print the version number. - We want to print uname at runtime. - Also prefix the i-g-t release version. Signed-off-by: Ben Widawsky (v1) Signed-off-by: Daniel Vetter commit ea8c086919041d152b957773b0071e0cfafd3f78 Author: Daniel Vetter Date: Tue Dec 10 08:07:11 2013 +0100 lib: Always print errno in igt assert/require macros Useful to figure out why things have failed. Signed-off-by: Daniel Vetter commit 3c5423b9a74fe056cae1fce41fd3ad16584e9c8d Author: Tvrtko Ursulin Date: Fri Dec 6 12:38:49 2013 +0000 tests/gem_media_fill: Remove unnecessary include Causes trouble for Android builds. Signed-off-by: Tvrtko Ursulin Signed-off-by: Daniel Vetter commit ef0931724f58bd38fcd6e4261494a77ca125508f Author: Paulo Zanoni Date: Tue Dec 3 19:44:45 2013 -0200 tests: add pm_lpsp QA has asked me "How can we make sure LPSP is working?". Now, instead of writing big paragraphs, I can just answer "make sure pm_lpsp works". Signed-off-by: Paulo Zanoni commit d5cdee95d5e8290adea2757230a7c10728bcd49a Author: Paulo Zanoni Date: Tue Dec 3 16:44:08 2013 -0200 lib: rename some power well bit names I did the same change in the Kernel a few months ago. This should help not getting confused about which bit does what. Signed-off-by: Paulo Zanoni commit 3906a50ede5fa8d6edfca8bf81809fd0cf229a30 Author: Xiang, Haihao Date: Fri Dec 6 09:16:58 2013 +0800 assembler/bdw: Update write(...) write(...) is used for Render Target Write and Media Block Write. The two message types no longer share the same cache agent on GEN8, So a parameter is needed for cache agent. The 4th parameter of write() is used for write commit bit which has been removed since GEN7. Hence we can re-use the 4th parameter as cache agent on GEN8 Reviewed-by: Damien Lespiau Signed-off-by: Xiang, Haihao Signed-off-by: Damien Lespiau commit a4d3a6c013664da062cdff9ead7bc9ab86b33caa Author: Daniel Vetter Date: Fri Dec 6 10:48:25 2013 +0100 lib: make igt_pipe_crc_start never fail It's what callers expect - pipe_crc_new is the function where we pass a potential failure back to callers. Reviewed-by: Damien Lespiau Signed-off-by: Daniel Vetter commit c1b7e722dafdbddcce2bec230e3faf8b4fe6f123 Author: Daniel Vetter Date: Fri Dec 6 10:47:10 2013 +0100 lib: add igt_pipe_crc_check No need to duplicate this all over the place. Reviewed-by: Damien Lespiau Signed-off-by: Daniel Vetter commit 3e37eb3c6cae56bbd11016102c20a63ce58966da Author: Daniel Vetter Date: Fri Dec 6 10:45:49 2013 +0100 tests: drm_open_any doesn't fail Or more precisely: It already has an igt_require. So we cant ditch it from tests. Reviewed-by: Damien Lespiau Signed-off-by: Daniel Vetter commit 5b3edb61528f26c05af20fccc8b44e8e3c5f7861 Author: Damien Lespiau Date: Fri Dec 6 13:02:51 2013 +0000 gitignore: Ignore gem_media_fill Signed-off-by: Damien Lespiau commit adbd83cdc31b10dd3cee5abc247018719aa74acf Author: Xiang, Haihao Date: Fri Dec 6 16:54:45 2013 +0800 rendercopy/bdw: Set Instruction Buffer size Modify Enable to 1 Otherwise it may result in GPU hang Reviewed-by: Kenneth Graunke Signed-off-by: Xiang, Haihao Signed-off-by: Damien Lespiau commit 4570e1b3dece3cebc45fdcff5f767f24bba67da1 Author: Xiang, Haihao Date: Fri Dec 6 16:54:44 2013 +0800 lib: Clean the batch buffer store after reset Otherwise the stale data in the buffer Reviewed-by: Kenneth Graunke Signed-off-by: Xiang, Haihao Signed-off-by: Damien Lespiau commit 509850bf48199c9ec88b9ae03154e809da283d13 Author: Daniel Vetter Date: Fri Dec 6 08:39:31 2013 +0100 tests/gem_reset_stats: document the new subtest a bit better I wanted to add this to Mika's original patch but forgot to git add. Signed-off-by: Daniel Vetter commit 5f40b23cfa0441fceba9d2cb6437724e880a8fc3 Author: Xiang, Haihao Date: Mon Dec 2 12:52:08 2013 +0800 tests/gem_media_fill: the assembly code for the shader used in the case The code is for reference only v2: Fixed the source register used for the send with EOT Fixed the posted destination operand for the send with EOT v3: Fixed the cache agent used in media_block_write message on GEN8 Reviewed-by: Zhao Yakui Signed-off-by: Xiang, Haihao commit c6835697253c07cfc6711bcfc9b071afa4a6144d Author: Xiang, Haihao Date: Mon Dec 2 12:49:14 2013 +0800 tests/gem_media_fill: add support for gen7 v2: Fixed the source register used for the send with EOT Fixed the posted destination operand for the send with EOT Reviewed-by: Zhao Yakui Signed-off-by: Xiang, Haihao commit bd384c2ba38d8fccb8ce1b47b51d78cd64636b50 Author: Xiang, Haihao Date: Mon Dec 2 12:36:15 2013 +0800 tests/gem_media_fill: add support for gen8 v2: Fixed the source register used for the send with EOT Fixed the posted destination operand for the send with EOT v3: Workaround: Insert MEDIA_STATE_FLUSH after MEDIA_OBJECT. Fixed the cache agent used in media_block_write message Set Instruction Buffer size Modify Enable to 1, otherwise it may result in GPU hang Reviewed-by: Zhao Yakui Signed-off-by: Xiang, Haihao commit 641267dd735e0ab9a5b8d083b4e1a2392b41ae07 Author: Xiang, Haihao Date: Fri Nov 29 13:47:31 2013 +0800 tests: add gem_media_fill It is to check whether media pipeline on render ring works. Codes are copied and modified from the rendercopy case which uses 3D pipeline. However media pipeline is simpler than 3D pipeline and there is few changes between gen6,gen7 and gen8 Reviewed-by: Zhao Yakui Signed-off-by: Xiang, Haihao commit 8ac7b93b218af1544988331cd68c69ba4102c29f Author: Ben Widawsky Date: Thu Dec 5 16:02:52 2013 -0800 gem_exec_faulting_reloc: Update gen8 BLT cmds Signed-off-by: Ben Widawsky commit e41928e6c9bb3f24833a827903f1afeda83592d6 Author: Ben Widawsky Date: Thu Dec 5 15:35:01 2013 -0800 gen8 rendercpy: temporarily disable We don't yet have this working, and the excessive hangs are annoying. Signed-off-by: Ben Widawsky commit da4258529faa064d78184b81b0dad9b3523e722f Author: Ben Widawsky Date: Thu Dec 5 15:00:44 2013 -0800 Kill XY_COLOR_BLT_CMD Since we now always want a length for this command, and we've created a non-length variant, remove the #define to prevent further foot shooting. Signed-off-by: Ben Widawsky commit 53b0c0431c89397789252b6649e70090d0458e95 Author: Ben Widawsky Date: Thu Dec 5 14:44:23 2013 -0800 gem_reloc_vs_gpu: Update for gen8 BLT cmds NOTE: Some subtests are still failing, but I haven't found the bug yet. At least this should help QA meanwhile. Signed-off-by: Ben Widawsky commit b23d73788a7d494f99d74bafb762dd825deb6697 Author: Ben Widawsky Date: Thu Dec 5 14:44:23 2013 -0800 gem_persistent_relocs: Update for gen8 BLT cmds NOTE: Some subtests are still failing, but I haven't found the bug yet. At least this should help QA meanwhile. Signed-off-by: Ben Widawsky commit ba0d651a017d9c633e7530b7d13ec6abaeaedceb Author: Ben Widawsky Date: Thu Dec 5 14:36:20 2013 -0800 gem_write_read_ring_switch: Missed gen8 BLT updates Signed-off-by: Ben Widawsky commit 846a0f01b04eae501ced0f59e2bd18c5f4c774bb Author: Ben Widawsky Date: Thu Dec 5 14:34:35 2013 -0800 drm_vma_limiter_cached: Missed gen8 BLT updates Signed-off-by: Ben Widawsky commit 672911d7149735ee51cbcff5540b8dcb8a2de321 Author: Ben Widawsky Date: Thu Dec 5 14:14:35 2013 -0800 gem_pipe_control_store_loop: BDW update I've opted to not use the PIPE_CONTROL w/a for now. I am unclear if it is actually required (the test does pass). Signed-off-by: Ben Widawsky commit 40b586188c021db58a37ef23ac7d3e20547461a1 Author: Daniel Vetter Date: Thu Dec 5 15:49:58 2013 +0100 tests/gem_ctx_exec: Add eviction test It didn't pan out at all since atm we don't evict context objects. But maybe it's useful for when that happens. v2: Actually test eviction. Took a while to figure that one out. And indeed the testcase now fails because we don't evict the previous context as we should. Signed-off-by: Daniel Vetter commit 1a95c710f9160692e3c29100600b1766388f93de Author: Daniel Vetter Date: Thu Dec 5 15:50:18 2013 +0100 lib: add gem_available_aperture_size helper Signed-off-by: Daniel Vetter commit 33ef5284903d2b64c4744c208d9eccc54cba65a3 Author: Daniel Vetter Date: Thu Dec 5 13:41:51 2013 +0100 tests/core_get_client_auth: new subtests for always authenticated This exercise the bug fixed in commit 1020dc6990168a5081ffad620c440e220f05b460 Author: Chris Wilson Date: Tue Oct 29 08:55:57 2013 +0000 drm: Do not drop root privileges for a fancier younger process Signed-off-by: Daniel Vetter commit 365f4812b12323336e5b54befdbb2628b78713f0 Author: Daniel Vetter Date: Thu Dec 5 13:35:50 2013 +0100 tests: rename get_client_auth to have a core_ prefix Also sort .gitignore. Signed-off-by: Daniel Vetter commit 28e4b34b3d582e5489302c551bb83c2c1fdef2d3 Author: Ville Syrjälä Date: Thu Dec 5 13:01:58 2013 +0200 quick_dump: Restore execture permission on quick_dump.py quick_dump.py execute permission was accidentally lost in: commit d56697233699844db9262a9a056b62b24b69dd39 Author: Mengdong Lin Date: Sun Aug 25 23:07:22 2013 -0400 quick_dump/bdw: support Broadwell in device auto-detection Signed-off-by: Ville Syrjälä commit 0b67c0c421fb736b5086f69a7cc5415f66c3d369 Author: Chon Ming Lee Date: Wed Dec 4 20:44:33 2013 +0800 Update dpio read/write to take in extra PHY parameter. The extra parameter is for future platform. Signed-off-by: Chon Ming Lee Signed-off-by: Ville Syrjälä commit f5643c4a270baa4da33676950e36b1681d6d93dc Author: Chon Ming Lee Date: Wed Dec 4 20:44:32 2013 +0800 tools/quick_dump: Update Baytrail DPIO names to reflect to the driver change. DPIO name still using old name. Change it according to the driver name. Signed-off-by: Chon Ming Lee Signed-off-by: Ville Syrjälä commit 6b18ef826ffdb433eff00db974589897ac1dd527 Author: Mika Kuoppala Date: Wed Dec 4 16:39:09 2013 +0200 tests/gem_reset_stats: add close-pending-fork This triggers use after free oops on request->batch_obj when going through the rings and setting reset status on requests, after a gpu hang. v2: Streamlined the test and added comments (Daniel) Signed-off-by: Mika Kuoppala Signed-off-by: Daniel Vetter commit fb03ea7737dcda887e6eeca17afe7b91cf178b38 Author: Mika Kuoppala Date: Tue Nov 26 09:26:17 2013 +0200 lib/drmtest: Fix filedesc leak on gem_quiescent_gpu to not run out of filedescs as some tests call gem_quiescent_gpu directly. Signed-off-by: Mika Kuoppala Signed-off-by: Daniel Vetter commit ab7cbf9737fe35cc286520379e54ae9882ab402b Author: Tvrtko Ursulin Date: Tue Dec 3 16:44:54 2013 +0000 Revert "lib/drmtest: ducttape over fork race" This reverts commit a031a1bf93b828585e7147f06145fc5030814547. Signed-off-by: Tvrtko Ursulin Conflicts: lib/drmtest.c Signed-off-by: Daniel Vetter commit b34322fd15488eed8b7b20538cb1d50f43b4b132 Author: Daniel Vetter Date: Tue Dec 3 17:57:06 2013 +0100 Revert "test/gem_concurrent_blt" This reverts commit aee0dcb1ec2075991d310dd6f3fb5e50160847d1. Oops, accidentally commit a bit of wip changes. commit 139c72f38a07c545f5a9ab5fa3750779987b9275 Author: Tvrtko Ursulin Date: Tue Dec 3 16:44:55 2013 +0000 drmtest: Avoid wrong PID/TID after clone races Various C library implementations have various races with regards to caching getpid() or TID inside pthread_kill() implementations. For example see clone(2) glibc man page and pthread_kill Bionic C library source. Work around that by making sure correct PID/TGID and TID values are retrieved from the kernel when re-raising the signal. It can be delivered immediately after the clone system call while C library cached copies have not yet been updated. Signed-off-by: Tvrtko Ursulin Signed-off-by: Daniel Vetter commit 4f990f3ad21eb375918dde7ad7c55ee3a75158c4 Author: Tvrtko Ursulin Date: Tue Dec 3 15:35:41 2013 +0000 build: Skip kms_fbc_crc on Android We do not have GLib there so it does not build. Signed-off-by: Tvrtko Ursulin Signed-off-by: Daniel Vetter commit b92b397d5e4ffe10ed92fb2fc6711758ef5bcf89 Author: Tvrtko Ursulin Date: Tue Dec 3 15:09:57 2013 +0000 build: Make sure asserts are enabled for tests Tests depend on assertions being enabled since they can, and do, contain actual test steps. They are also mandatory for ensuring sane test case behaviour. Signed-off-by: Tvrtko Ursulin Signed-off-by: Daniel Vetter commit aee0dcb1ec2075991d310dd6f3fb5e50160847d1 Author: Daniel Vetter Date: Tue Dec 3 16:32:52 2013 +0100 test/gem_concurrent_blt Limit working set size also with available ram. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72255 Signed-off-by: Daniel Vetter commit 26b336f81128b6c51e2757381c19d8cdf0b2c369 Author: Daniel Vetter Date: Tue Dec 3 13:07:28 2013 +0100 lib: Don't put functional code into asserts Android apparently compiles with NDEBUG. Which is strongly advised against, since the big pile of asserts mostly check correct usage of the helper code in testcases. Signed-off-by: Daniel Vetter commit 38354ec4d890c384b5d91738f955ed6aed6d0c1c Author: Chris Wilson Date: Tue Dec 3 10:12:37 2013 +0000 drmtest: Fix weird signage on errno Signed-off-by: Chris Wilson commit e7ec90a01ccd6a1dcda431065851e4629ddf73b4 Author: Damien Lespiau Date: Thu Nov 28 14:35:45 2013 +0000 gitignore: Ignore kms_fbc_crc Signed-off-by: Damien Lespiau commit 8d7f00146c3664f78a12f17af0fb5365c5a09396 Author: Damien Lespiau Date: Thu Nov 28 14:34:51 2013 +0000 kms_fbc_crc: Remove unused variable Signed-off-by: Damien Lespiau commit 34f104aed7c14313c473bb7dafcda43f8b473903 Author: Damien Lespiau Date: Fri Nov 22 18:14:26 2013 +0000 rendercopy/bdw: Fix the 3DSTATE_STENCIL_BUFFER instruction length Signed-off-by: Damien Lespiau commit 09f144b649176bd80e31ccab65c9206931e6150f Author: Damien Lespiau Date: Fri Nov 22 18:12:35 2013 +0000 rendercopy/bdw: Fix the 3DSTATE_HIER_DEPTH_BUFFER instruction length Signed-off-by: Damien Lespiau commit e824fdd0339f5a649aaf54a74694836f55bb0e9c Author: Damien Lespiau Date: Fri Nov 22 18:11:03 2013 +0000 rendercopy/bdw: Fix the various 3DSTATE_CONSTANT_* instruction length Signed-off-by: Damien Lespiau commit ffff68f08a63cb27fb558b54c7240b9bc4571f96 Author: Damien Lespiau Date: Fri Nov 22 17:36:54 2013 +0000 rendercopy/bdw: Fix the STATE_SIP instruction length Signed-off-by: Damien Lespiau commit b333d23e3ae1ee3d971446464bd02c4a8f1695da Author: Damien Lespiau Date: Fri Nov 22 17:29:02 2013 +0000 intel_dump_decode: Support the INTEL_DEVID_OVERRIDE env variable This is the one that already works in libdrm, so don't disappoint people coming with expectations. Signed-off-by: Damien Lespiau commit b226f43fe854ba1d0d8be7fe94f8692a93fa8aa8 Author: Damien Lespiau Date: Fri Nov 22 17:24:52 2013 +0000 intel_dump_decode: Actually parse the -d option Signed-off-by: Damien Lespiau commit 6c9fcc42bb3ef448fdea579795816f7321f8bd75 Author: Ville Syrjälä Date: Sat Nov 9 20:58:27 2013 +0200 kms_fbc_crc: Add a CRC based FBC test kms_fbc_crc will perform various write operations to the scanout buffer whilc FBC is enabled. CRC checks will be used to make sure the modifcations to scanout buffer are detected. The operations include: - page flip - GTT mmap - CPU mmap - blit - rendercopy - context switch + rendercopy - combination of a page flip and each operation listed above v2: Use gem_sw_finish instead of drmModeDirtyFB after CPU access v3: Drop pwrite tests, call gem_bo_busy() after rendering, drop set_domain() calls after mmap access, wait for 2 vblanks Signed-off-by: Ville Syrjälä commit 49f4860d5c94afffecfac3fcda999bea59d5f929 Author: Ville Syrjälä Date: Mon Nov 25 17:31:13 2013 +0200 lib: Add gem_bo_busy Move gem_bo_busy() from gem_wait_render_timeout.c to lib. Signed-off-by: Ville Syrjälä commit 525788a7360cca116b00819c14ee11c5913ffd42 Author: Ville Syrjälä Date: Fri Nov 22 22:33:21 2013 +0200 lib: Add gem_sw_finish() Wrap DRM_IOCTL_I915_GEM_SW_FINISH into gem_sw_finish() Signed-off-by: Ville Syrjälä commit 725da6ee7458c5227a2bc9a1b686dad8f3c6d854 Author: Ville Syrjälä Date: Thu Nov 21 19:05:17 2013 +0200 rendercopy: Pass context to rendercopy functions rendercopy does the batch buffer flush internally, so if we want to use it with multiple contexts, we need to pass the context in from caller. v2: Modify rendercopy_gen8 as well Signed-off-by: Ville Syrjälä commit 3d371a7284798c96bb033a449acbad7cc29c2e29 Author: Ville Syrjälä Date: Fri Nov 22 23:46:32 2013 +0200 kms_cursor_crc: Fix crc readout after a subtest failure If a subtest fails, it'll leave the pipe CRC file open, which will prevent subsequent subtests from opening the file. Make sure the file is cloesed before trying to open it again. Signed-off-by: Ville Syrjälä commit e1e5856b3ce09e9d8b0899e10cf7e3ef724679d5 Author: Ville Syrjälä Date: Thu Nov 21 19:48:51 2013 +0200 lib: Fix pipe_crc->ctl_fd assert Use the correct fd in the assert(). Signed-off-by: Ville Syrjälä commit 6720dd4b2cb657705ccb31fd87d85cd6831ea2f2 Author: Daniel Vetter Date: Wed Nov 27 11:31:12 2013 +0100 tests: Document exec naming convention for execbuf related tests Signed-off-by: Daniel Vetter commit aa4ff912e3a7a84adcfc6bde9f6f2e9a4a1aaf82 Author: Daniel Vetter Date: Wed Nov 27 11:14:19 2013 +0100 tests: Document per-ring naming conventions Inspired by the recent pile of tests for the CS, which doesn't split up the tests into per-ring subtests. Cc: bradley.d.volkin@intel.com Signed-off-by: Daniel Vetter commit f6d9e160c9d7c76b37b49ce8918b055826806635 Author: Paulo Zanoni Date: Tue Nov 26 11:32:33 2013 -0200 tests/pm_pc8: add "resuming" state This one was missing. For some reason we never really detected it on our test suite. I checked the Kernel source and now we should be fine. Signed-off-by: Paulo Zanoni commit 0df88f5e647a38b52b46d010c54f2594c98d8018 Author: Paulo Zanoni Date: Thu Nov 21 18:19:07 2013 -0200 tests/pm_pc8: try to reuse FBs when possible Instead of creating a new FB every time we need one, create a cache of FBs and reuse whenever possible. That means we'll create at most two FBs, and reuse them hundreds and hundreds of times. The kmstest_paint_test_pattern function takes about 1-2 seconds to run, and we'll avoid it whenever we reuse the FB. This makes the time taken to run the modeset-lpsp-stress subtest go from 2:29 to 1:29. A full "time ./pm_pc8 --quick" goes from 8:14 to 6:27. Signed-off-by: Paulo Zanoni commit 78227101e27471b81af69b54e2de203678243338 Author: Paulo Zanoni Date: Thu Nov 21 17:32:42 2013 -0200 tests/pm_pc8: try harder to reach PC8+ residencies If we want to actually reach PC8+ states, we need to properly configure all the devices on the system to allow this. This function will try to setup the things we know we need, but won't scream in case anything fails: we don't know which devices are present on your machine, so we can't really expect anything, just try to help with the more common problems. Another reason for this commit is that I got tired of having to readjust the runtime PM policies every time I reboot my machine. Signed-off-by: Paulo Zanoni commit e9363973b1fd973f562c101a58354e05ea2b48e4 Author: Paulo Zanoni Date: Thu Nov 21 15:09:58 2013 -0200 tests/pm_pc8: rename some subtests Due to copy/paste error, we had 3 subtests called gem-execbuf-stress. Signed-off-by: Paulo Zanoni commit 6de398888e718800bae0f8cceef0998fbcb0a8d3 Author: Mika Kuoppala Date: Wed Nov 20 16:58:17 2013 +0200 tests/gem_reset_stats: check non root access to reset_stats Getting global reset count needs to be tested with root and non root access. Signed-off-by: Mika Kuoppala Signed-off-by: Daniel Vetter commit 2dd312cbb80be1d8c8a199248095db85eb85155d Author: Mika Kuoppala Date: Wed Nov 20 16:58:16 2013 +0200 tests/gem_reset_stats: stop rings after injecting hang To make driver report a simulated hang in dmesg. Suggested-by: Daniel Vetter Signed-off-by: Mika Kuoppala Signed-off-by: Daniel Vetter commit 0afe006eace7042e41689215ef27c82ac39cfb51 Author: Mika Kuoppala Date: Wed Nov 20 16:58:15 2013 +0200 tests/gem_reset_stats: add support for BDW+ For BDW+, there BATCH_BUFFER_START is 3 * 32bits in length and length needs to be encoded into the opcode. Suggested-by: Damien Lespiau Signed-off-by: Mika Kuoppala Signed-off-by: Daniel Vetter commit 4fd0458be217841203bb18ed36bda4211bf0cfdf Author: Daniel Vetter Date: Wed Nov 20 16:07:30 2013 +0100 tests/gem_reset_stats: More macros! Instead of freaking out about negating the skip condition and punting I could have remembered that I've solved this already ... Signed-off-by: Daniel Vetter commit 3c55a7df578610b0a5af6c14a6222c8aacc4a523 Author: Daniel Vetter Date: Wed Nov 20 10:58:55 2013 +0100 tools/reg_dumper: Add FW_BLC regs Debugging watermark issues on gen2/3 without them is hard ... Signed-off-by: Daniel Vetter commit ff193614b29308373ff3a54266159e3e194455a2 Author: Daniel Vetter Date: Sun Nov 17 17:29:10 2013 +0100 tests/gem_reset_stats: Use macros a bit more Just demonstration really. Signed-off-by: Daniel Vetter commit 36786e4a04c988184d3c04984f8e4bf7276b0bb1 Author: Damien Lespiau Date: Fri Nov 15 07:03:33 2013 +0000 gitignore: Ignore gem_reset_stats Signed-off-by: Damien Lespiau commit b5bfdbb1adfc18a9259da727a8872bef3811ca21 Author: Daniel Vetter Date: Fri Nov 15 00:10:52 2013 +0100 tests: More bdw fallout This time misplaced parens. Signed-off-by: Daniel Vetter commit df5e880beaffe2ab214eba8cdf27d9459dd99ead Author: Daniel Vetter Date: Thu Nov 14 23:15:37 2013 +0100 tests: More bdw fallout commit f7abef6618ab5b8c9a0358f9b765f3445f9f6be4 Author: Paulo Zanoni Date: Thu Nov 14 14:53:15 2013 -0200 tests/pm_pc8: add --quick option Not meant to be used on the QA cycles, but by developers who just want to quickly check things while doing development. Reduces the total time from 27 minutes to 6 minutes on my machine. Signed-off-by: Paulo Zanoni commit 482654674674cff4cfde4e3b68a4ff5ac125db08 Author: Paulo Zanoni Date: Thu Nov 14 13:59:49 2013 -0200 tests/pm_pc8: add some more stress tests I was suspecting some problems just happen if we have a bigger wait than the current ones we have, so add a new WAIT_EXTRA flag just to see if the problems really happen. Also, add support for the wait flags on the gem stress tests, and use them. Signed-off-by: Paulo Zanoni commit 4fa9dde799793001e16bb99c499b6ff25c5e7250 Author: Paulo Zanoni Date: Thu Nov 14 13:50:06 2013 -0200 tests/pm_pc8: remove compare_registers subtest It's not executed by default, and it's completely relying on Haswell registers and on internal knowledge of how the Kernel is supposed to work. Since we plan to test generic runtime PM on all supported platforms, maintaining this test so it works on all those platforms will be a pain. We already have some ideas on how to verify registers that must stay at specific values from inside the Kernel, so let's kill this test and wait until the proper Kernel code gets merged. Signed-off-by: Paulo Zanoni commit a8610a4776e9bee9bf3fc275febaf78e3ec38c98 Author: Paulo Zanoni Date: Thu Nov 14 13:40:52 2013 -0200 tests/pm_pc8: rename some variables Since we're not only testing PC8 anymore, we're resting "PM", rename some variables from something_pc8 to something_suspend, just to make it not-so-confusing. Signed-off-by: Paulo Zanoni commit 19c8d5f4ff887c55cb79b0417912ca137cf1b2e5 Author: Paulo Zanoni Date: Thu Nov 14 13:35:43 2013 -0200 tests/pm_pc8: fix debugfs-forcewake-user for PC8-only cases We don't wake up from forcewake when we only have PC8, but not runtime PM, so make the test pass. Signed-off-by: Paulo Zanoni commit 63e4dafb3252c5ee658572181b2d7a06a3a66969 Author: Paulo Zanoni Date: Tue Nov 12 17:04:50 2013 -0200 tests/pm_pc8: check for PC8 status, not residency in most cases If you really want to reach the PC8+ states and consequently get PC8+ residency, you need to properly configure all the devices on your machine to allow PC8+, not just graphics. The current code for PC8 checks for PC8+ residency everywhere, so if you have a machine that's not properly configured you'll fail every test. OTOH, even if your machine can't reach the PC8+ states, it will still try to enable and disable PC8, so we can try to test the feature even if we're never really reaching the PC8+ states. Also, if your machine does allow PC8+ residencies, but some other driver/program decides to keep the machine busy while you're running the test suite, you'll also get failures which you shouldn't be getting. Based on the arguments above, I'm changing most of the subtests to only check for the PC8 status reported by sysfs (enabled/disabled), not check real PC8+ residency. I also added two tests that should check for PC8+ residency, so we will stil be able to diagnose badly configured machines. As a bonus, we won't sleep for full 5 seconds every time we expect PC8 to be disabled: we'll just read i915_pc8_status, which quickly gives the result we're expecting. Considering how many modeset stress subtests we have in the program, we'll save a *lot* of time with this change. Signed-off-by: Paulo Zanoni commit a4e96a95ca6468a7ece9fff1c8e1949691439ed4 Author: Paulo Zanoni Date: Tue Nov 12 13:24:38 2013 -0200 tests/pm_pc8: add support for runtime PM We try to detect if we have runtime PM or if we just have PC8. In case there's runtime PM, the functions that wait will wait for the runtime PM status reported by the sysfs file instead of waiting for PC8 residencies to move. Signed-off-by: Paulo Zanoni commit e39f2dbf98a637fffcc0af98ff54ee296738b0ad Author: Daniel Vetter Date: Thu Nov 14 15:50:07 2013 +0100 tests/gem_cs_prefetch: Fix bdw damage v2: Fix more. Cc: Ben Widawsky Signed-off-by: Daniel Vetter commit 2d1119dfc0b0e0187f8ee89e144a391f7ccfedd5 Author: Daniel Vetter Date: Mon Nov 11 23:04:11 2013 +0100 lib: adjust oom_score This way the igt test will always be killed first (hopefully), preventing mayhem when one of the memory thrashing tests treatens to take down the entire system. To avoid any burden on test writers we adjust the oom score on drm_open, any of the fork helpers and subtest init. That should cover everything. v2: Fix it up. Cc: Ben Widawsky Signed-off-by: Daniel Vetter commit 4697cf4286f3ac3cc80744c3eac2c0579c215d6c Author: Daniel Vetter Date: Thu Nov 14 11:08:13 2013 +0100 NEWS: Make testing requirements official Signed-off-by: Daniel Vetter commit 217bd8d55e723d8bd6911d6c2ec8a9c42bdc8272 Author: Chris Wilson Date: Thu Nov 14 09:47:47 2013 +0000 tests/pm_pc8: Fix invalid pointer-to-integer casting Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71592 Signed-off-by: Chris Wilson commit c37e9cf0c4bb7bae69693fa5d5d57cf30f8db87e Author: Ben Widawsky Date: Wed Nov 13 18:23:06 2013 -0800 gem_cs_prefetch: more gen8 integration fallout Signed-off-by: Ben Widawsky commit 9ef6769366222bc1c272336378d802737a5e9026 Author: Ben Widawsky Date: Wed Nov 13 13:28:17 2013 -0800 gem_evict_*: Fix batch lengths, broken on gen8 integration Signed-off-by: Ben Widawsky commit 1ff7427578eaf4fe472eb5424343e53ed283450e Author: Mika Kuoppala Date: Tue Nov 12 19:58:16 2013 +0200 tests: add gem_reset_stats v2: check the ioctl pad and flag parameters Signed-off-by: Mika Kuoppala Signed-off-by: Daniel Vetter commit e046c31f45e5901e7301fc9bfa2eb8d08b133883 Author: Daniel Vetter Date: Tue Nov 12 12:18:33 2013 +0100 NEWS: Android.mk updates! commit 76c78c0aae0e31f11ed0fc860e64d437a687529d Author: Oscar Mateo Date: Tue Nov 12 11:50:45 2013 +0000 build: New Android makefiles These form the basis of the new Android build system. v2: As suggested by Daniel Vetter, modify compilation flags to not error on return-type and not warn on sign-compare. Signed-off-by: Oscar Mateo Signed-off-by: Daniel Vetter commit 25be105d7f0d9f657ce2adf2b4e659882fabb0eb Author: Oscar Mateo Date: Tue Nov 12 11:50:44 2013 +0000 lib/igt_display: workaround a name conflict in Android PLANE_A/PLANE_B are used by libdrm's i915_drm.h in Android. v2: Changes suggested by Daniel Vetter and Damien Lespiau: - Pimp up comment with a FIXME. - Reword commit message. Signed-off-by: Oscar Mateo Signed-off-by: Daniel Vetter commit 235ff9cf34f37d7eb778d72acd298b0cd8c01ab5 Author: Oscar Mateo Date: Tue Nov 12 11:50:43 2013 +0000 lib/drmtest: Get the correct basename() under Android Signed-off-by: Oscar Mateo Signed-off-by: Daniel Vetter commit 5032e7bbdd342ac111ab2c57bf82b3dd4d26f208 Author: Oscar Mateo Date: Tue Nov 12 11:50:42 2013 +0000 build: Fix assorted compilation warnings As these files are compiled for every test, the warnings cluttered the Android build completely. v2: As suggested by Daniel Vetter, drop some of the fixes and fix the compilation flags instead. Signed-off-by: Oscar Mateo Signed-off-by: Daniel Vetter commit dce0d99a91b4be26c4cd07e7030615fdc46bf2c7 Author: Oscar Mateo Date: Tue Nov 12 11:50:41 2013 +0000 tests/gem_vmap_blits: Finish extracting gem_read It seems something escaped this commit: commit bd5cf9a07d17ce91dfaa3aa12d3f2c93815f0489 Author: Daniel Vetter Date: Tue Jan 10 15:37:53 2012 +0100 lib/drmtest: extract gem_read Signed-off-by: Oscar Mateo Signed-off-by: Daniel Vetter commit 7076ea1bd6ec56cd7c85541a5d2b1bcdeaee85db Author: Oscar Mateo Date: Tue Nov 12 11:50:40 2013 +0000 tests/drm_get_client_auth: In Android, use gettid() instead of syscall(SYS_gettid) Signed-off-by: Oscar Mateo Signed-off-by: Daniel Vetter commit 1cd6913608a02f1b38ee44a084875efb9a360e4b Author: Oscar Mateo Date: Tue Nov 12 11:50:39 2013 +0000 rendercopy: Remove rendercopy.c Move scratch_buf_write_to_png() to its only user, gem_render_copy.c. This makes the cairo dependencies easier to handle from the Android perspective, but if there is a good reason why this file exists I can try to handle it differently. Signed-off-by: Oscar Mateo Signed-off-by: Daniel Vetter commit 37f26d17b1add333bacefe12fe7c7c1514b18e82 Author: Oscar Mateo Date: Tue Nov 12 11:50:38 2013 +0000 lib: Move kms stuff from drmtest.c over to igt_kms.c This makes cairo dependencies easier to handle. Otherwise, we would have to litter drmtest all over with "#ifndef ANDROID" Signed-off-by: Oscar Mateo [danvet: Add missing _GNU_SOURCE to igt_kms.c and missing include to intel_sprite_on.c] Signed-off-by: Daniel Vetter commit 4c7d5a52a7f4d79061e6cbb4627df3c194958fff Author: Oscar Mateo Date: Tue Nov 12 11:50:37 2013 +0000 build: Move logic to tests/Makefile.am and away from Makefile.sources Makefile.sources is just a listing with all the sources, and the logic to use these sources goes into either Makefile.am (automake) or Android.mk (make). Signed-off-by: Oscar Mateo Signed-off-by: Daniel Vetter commit d80c6bdedba451adff843295367ebcd3d5e3b0c7 Author: Oscar Mateo Date: Tue Nov 12 11:50:36 2013 +0000 build: Fix missing "\" in tests/Makefile.sources Noticed by Damien Lespiau. Signed-off-by: Oscar Mateo Signed-off-by: Daniel Vetter commit ea11d103e0617e33bce6f11328521d15b13422b0 Author: Oscar Mateo Date: Tue Nov 12 11:50:35 2013 +0000 build: list all test/tool/lib source files in their own Makefile.sources In this way, all source files are listed in Makefile.sources and included from Makefile.am, thus enabling the reuse from Android makefiles. Signed-off-by: Oscar Mateo Signed-off-by: Daniel Vetter commit c50dd7c149a64b683977d14bc59262f70dda15fa Author: Damien Lespiau Date: Mon Nov 11 22:38:36 2013 +0000 gitignore: Ignore the newly introduced pm_psr Signed-off-by: Damien Lespiau commit 97e48cd619c4b201613ade0110f4db840a02007d Author: Ben Widawsky Date: Mon Nov 11 13:21:58 2013 -0800 gem_storedw_batches_loop: Fix for real this time Last patch to fix the breakage when adding gen8 had bugs in the reloc offset, and size field. Signed-off-by: Ben Widawsky commit 4cc506f5eae66b812b7ad6e171524ff1d4f6feb4 Author: Oscar Mateo Date: Mon Nov 11 15:36:55 2013 +0000 tests/drv_suspend: Replace "&> /dev/null" with "> /dev/null 2>&1" Some shells do not understand "&>". For instance, my Ubuntu 12.04 machine has /bin/sh pointing to dash, which makes a mess out of "&>" (to the point that the helper processes cannot be killed). Reviewed-by: Damien Lespiau Signed-off-by: Oscar Mateo Signed-off-by: Damien Lespiau commit b76a411c86512bc13cc501e71e6a212e828ed142 Author: Ben Widawsky Date: Mon Nov 11 09:44:13 2013 -0800 gem_linear_blits: Fix blit command length Signed-off-by: Ben Widawsky commit 0d902cad5f95ec88c3925919215ef674ad38b398 Author: Paulo Zanoni Date: Fri Nov 8 19:33:08 2013 -0200 tests/pm_pc8: reorganize main function Split the tests into categories. There are too many tests, it's getting harder to locate the ones we need. Signed-off-by: Paulo Zanoni commit c527a29325bb914ea994ba8d9b38668ac8a39798 Author: Paulo Zanoni Date: Fri Nov 8 19:19:35 2013 -0200 tests/pm_pc8: add some GEM tests These are more complete tests than the previous test_batch() one. We test CPU/GTT mmaps, pread/pwrite and batch buffers. Signed-off-by: Paulo Zanoni commit 79670c54eb0345464ffc3b56a27a35bbaa40b539 Author: Paulo Zanoni Date: Fri Nov 8 19:03:24 2013 -0200 tests/pm_pc8: remove "batch" and "stress-test" subtests They use a bad BLT command and don't check its result. The next patch will add proper GEM tests that contain commands that work and code that checks if the command is really working. Signed-off-by: Paulo Zanoni commit 3775eae05165922585b5f5a1f34452d2ecbdac89 Author: Paulo Zanoni Date: Fri Nov 8 18:29:57 2013 -0200 tests/pm_pc8: add debugfs/sysfs tests They don't really exercise any particular special code path for PC8, but the runtime D3 code will touch these code paths, so we'll need the tests. Signed-off-by: Paulo Zanoni commit 0fbb8346466d1a5cf692dc7a20687fee2b92cd57 Author: Paulo Zanoni Date: Fri Nov 8 17:09:43 2013 -0200 tests/pm_pc8: add modeset-lpsp-stress It's the only one we were missing form the possible combinations. Signed-off-by: Paulo Zanoni commit 1bcae02e5c1486bfeeea674275fcd5c34bde3414 Author: Paulo Zanoni Date: Fri Nov 8 17:07:59 2013 -0200 tests/pm_pc8: extract i2c_subtest_check_environment Just to make it more organized and consistent with the other tests. Signed-off-by: Paulo Zanoni commit 2fd0eb53aa33662f44d6373c4562ba7cd4523400 Author: Paulo Zanoni Date: Fri Nov 8 17:05:00 2013 -0200 tests/pm_pc8: return void on test_i2c And do the assertion in the code line that actually verifies the condition we need. Makes it easier to debug failed tests. Signed-off-by: Paulo Zanoni commit 514efb507d5bb1cd8774b25f4419c948b575a36b Author: Paulo Zanoni Date: Fri Nov 8 17:00:40 2013 -0200 tests/pm_pc8: move teardown_environment next to setup_environment So I can add/remove/verify code more easily. Signed-off-by: Paulo Zanoni commit ffc43fcbc0bcd4f7b15afa204723876e258e4bc4 Author: Ben Widawsky Date: Thu Nov 7 23:03:04 2013 -0800 gem_cpu_reloc: Fixed botched BLIT conversion Signed-off-by: Ben Widawsky commit 2c0fc4a2e43e4b7f1a5aacca37943f5259da4094 Author: Ben Widawsky Date: Thu Nov 7 23:05:01 2013 -0800 gem_evict_alignment: Skip on GEN8 for now Signed-off-by: Ben Widawsky commit 7c41331364ea2ea7a5c7c76c0b66bbc590eade60 Author: Ben Widawsky Date: Thu Nov 7 22:59:25 2013 -0800 gem_evict_everything: Fix broken blit generalization Signed-off-by: Ben Widawsky commit 1d9512f6ce136edc23b78cb1352ec2a54152a42b Author: Daniel Vetter Date: Fri Nov 8 07:37:57 2013 +0100 Revert "tests/gem_ctx_bad_exec: Check the errno, too" This reverts commit 4a6a59f314f61e1e4156bb13a65efabee31a76fc. commit 26d237cdc28d66674fbc72ea725b24c30d08e80d Author: Ben Widawsky Date: Thu Nov 7 21:00:55 2013 -0800 gem_storedw_batches_loop: Update for gen8 Signed-off-by: Ben Widawsky commit 5dbc2630363d1111fd8081d0e3bcb1084cfba7f4 Author: Daniel Vetter Date: Thu Nov 7 13:54:01 2013 +0100 tests/gem_overflow_reloc: Rework subtest enumeration Subtest names must be stable across all platforms for easier tracking. Hence move the gen8+ check into the subtests, using igt_require. This will auto-skip the tests on platforms where a given test doesn't apply. Also move the assignment of the relocation_type var outside of the fixture block. Fixtures aren't run when enumerating subtests (so that subtests can be enumerated on any platform, even without an intel gpu). So gcc has indeed been right with it's "potentially uninitialized" var warning after all ... Signed-off-by: Daniel Vetter commit 4cf1d089ebc83ca21abbc9714bcebecf8a759714 Author: Daniel Vetter Date: Thu Nov 7 13:43:43 2013 +0100 tests/gem_reloc_overflow: Polish after Rafael's patch - use void* for generic pointer. - Fix const usage. - Shut up gcc about uninitizialized var. - Be paranoid about the moved tests and make double-sure that the batch would indeed work safe for the condition being tested. Signed-off-by: Daniel Vetter commit c537c23efc8173d6526236b6b311ac44c10a14af Author: Rafael Barbalho Date: Wed Nov 6 18:12:12 2013 +0000 tests/gem_reloc_overflow: Add gen8+ specifc tests Broadwell introduces 64-bit relocation addresses which add extra corner cases. The test was refactored slightly with some tests that were in the source offset tests were moved to the more generic reloc test area. The source offset tests are now gen aware and called twice to test both cpu & gtt relocation paths. In addition 2 new gen8+ test were added to the test: * Relocation straddling page a page * Insufficient space for a relocation at the end of the buffer. Signed-off-by: Rafael Barbalho Conflicts: tests/gem_reloc_overflow.c Signed-off-by: Daniel Vetter commit 5fab0b8aa7352525f72e0594f05c09272bfc1a79 Author: Daniel Vetter Date: Wed Nov 6 18:55:20 2013 +0100 NEWS: Remove spurious - Signed-off-by: Daniel Vetter commit 65cdba94bc49c7016adfc011198aafc6194c4717 Author: Ben Widawsky Date: Wed Nov 6 09:49:32 2013 -0800 NEWS: Restore the 1.4 release info I suck... Signed-off-by: Ben Widawsky commit a88cf4cbf1272e84b1a76b95da3e7a6eeb86065d Author: Ben Widawsky Date: Wed Nov 6 09:48:17 2013 -0800 NEWS: Broadwell will be in 1.6, not 1.5 Signed-off-by: Ben Widawsky commit 02ee89006842e62cf0e29f1830ab304c224def63 Author: Ben Widawsky Date: Wed Nov 6 09:36:27 2013 -0800 NEWS: Broadwell Signed-off-by: Ben Widawsky commit 1c5e1d230b26e8eb5017ccf2b409ee43821c58fb Author: Damien Lespiau Date: Fri May 31 15:31:33 2013 +0100 list-workarounds/bdw: Add Broadwell to the list of valid platorms Signed-off-by: Damien Lespiau commit d56697233699844db9262a9a056b62b24b69dd39 Author: Mengdong Lin Date: Sun Aug 25 23:07:22 2013 -0400 quick_dump/bdw: support Broadwell in device auto-detection This patch exposes is_broadwell() to python, to be used by device auto-detection. Signed-off-by: Mengdong Lin Signed-off-by: Ben Widawsky commit ee4318931fdf968f98f47dd5d6a019b497037d16 Author: Mengdong Lin Date: Thu Aug 15 23:58:21 2013 -0400 quick_dump/bdw: dump audio debug registers for Haswell and Broadwell A new file "audio_debug_haswell_plus.txt" is created to define audio debug registers for Haswell and its successors like Broadwell. Signed-off-by: Mengdong Lin Reviewed-by: Xingchao Wang Signed-off-by: Ben Widawsky commit 0facfb2eb057c425fce21539d5cd25c3fe05eed8 Author: Mengdong Lin Date: Thu Aug 15 23:58:05 2013 -0400 quick_dump/bdw: dump audio configuration registers for Haswell and Broadwell A new file "audio_config_haswell_plus.txt" is created to define audio configuration registers for Haswell and its successors like Broadwell. Signed-off-by: Mengdong Lin Reviewed-by: Xingchao Wang Signed-off-by: Ben Widawsky commit 4f1410d978ad4b184b61bfa0559cfd9c35f1aa0f Author: Ben Widawsky Date: Mon Feb 18 16:00:55 2013 -0800 quick_dump/bdw: Just basic stuff for now Just the interrupt registers for now. Signed-off-by: Ben Widawsky commit e35126d30ce6deda2b472498882195e37ecde81f Author: Mengdong Lin Date: Tue Aug 13 00:22:33 2013 -0400 intel_audio_dump/bdw: dump audio M CTS readback register This debug register provides test feedback of the audio M values (DP) or CTS values (HDMI) Signed-off-by: Mengdong Lin Reviewed-by: Xingchao Wang Signed-off-by: Ben Widawsky commit 97e5cf6006077d2ea1b58b5d7993756e9ec1c8b4 Author: Mengdong Lin Date: Tue Aug 13 00:22:24 2013 -0400 intel_audio_dump/bdw: dump audio DP and DIP FIFO debug status Signed-off-by: Mengdong Lin Reviewed-by: Xingchao Wang Signed-off-by: Ben Widawsky commit f075c3c0688c8f2d38bf49691110934e1c2d2032 Author: Mengdong Lin Date: Tue Aug 13 00:22:14 2013 -0400 intel_audio_dump/bdw: dump audio chicken bit register This patch dumps this debug register and parse the data for Broadwell. Signed-off-by: Mengdong Lin Reviewed-by: Xingchao Wang Signed-off-by: Ben Widawsky commit 8535720b4c9e595316bd5cf172c680ed15c709f4 Author: Mengdong Lin Date: Tue Aug 13 00:21:57 2013 -0400 intel_audio_dump/bdw: dump debug registers for audio immediate commands This patch dumps debug registers to check audio immediate command, response and status. The audio driver will fall back into immediate command mode if normal communication between controller and codec is dead. Signed-off-by: Mengdong Lin Reviewed-by: Xingchao Wang [Ben: Small printf changes to remove compiler warning] Signed-off-by: Ben Widawsky commit 69cc00b072198264a8a6e7b1e870fe0cbad34ce6 Author: Mengdong Lin Date: Wed Jul 17 13:29:17 2013 -0400 intel_audio_dump/bdw: add support for Broadwell This patch renames Haswell audio dump function and reuses it for Broadwell. Since Haswell, audio registers are moved from the south display engine to the north display engine. And the audio register layout is same for Haswell and its successors like Broadwell. Signed-off-by: Mengdong Lin Signed-off-by: Ben Widawsky commit c82872b0193c38994d09f2b78fca03264d52e614 Author: Damien Lespiau Date: Wed Feb 27 14:51:48 2013 +0000 rendercopy/bdw: Add AUB annotations for states This will hopefully help debugging things. Signed-off-by: Damien Lespiau Signed-off-by: Ben Widawsky commit 91e589724694c23db9669b987a9411b7ae152d0d Author: Damien Lespiau Date: Wed Feb 27 14:51:34 2013 +0000 rendercopy/bdw: Fix the original implementation For posterity, I've squashed these commits against Damien's request. rendercopy/gen8: Fix the include guards rendercopy/gen8: Update the 3DSTATE_MULTISAMPLE opcode The opcode has changed in BDW. rendercopy/gen8: Add the VF_TOPOLOGY state The primitive type has moved out of the 3DPRIMITIVE to its own state, VF_TOPOLOGY. rendercopy/gen8: Fixup 3STATE_PS Update the state to the latest BSpec, in particular the thread count was using a wrong shift and we were missing kernel2 offset. rendercopy/gen8: Update 3DSTATE_BASE_ADDRESS This state has seen its fields moved around a bit, follow the BSpec. rendercopy/gen8: Allocate 64 VUEs The simulator screams at us if we try to allocate less than that. rendercopy/gen8: Surface states have to be 64 bytes a aligned rendercopy/gen8: Vertical/horizontal align 2 does not exist any more So set them to 4. This should not matter with rendercopy (which is not using compressed textures), but it makes the simulator moan. rendercopy/gen8: Make sure the vertex buffer is 8 bytes aligned rendercopy/gen8: Adjust 3DSTATE_VERTEX_BUFFERS for gen8 The address of the buffer is now on 48 bits. Also the size was computed as offset + size where the field is really the size of the buffer itself, not the end address. rendercopy/gen8: Update the SF/SBE states for gen8 gen8 has a few changes around those states and a new ones RASTER and SBE_SWIZ. rendercopy/gen8: Add the PS_EXTRA and PS_BLEND states rendercopy/gen8: Fix building with DEBUG_RENDERCOPY defined The forward declaration was missing the final ';'. Let's move the whole function at the top instead. rendercopy/gen8: Update the PS and CONSTANT_PS states rendercopy/gen8: Fix the red channel selection Make it output red. rendercopy/gen8: Update the write -1 shader With the latest assembler changes from Haihao. rendercopy/gen8: Remove blit.g8a There is no diff between this file and blig.g7a. Remove it. rendercopy/gen8: Fix the surface relocation offset The surface base address is now at dwords 8/9 so the relocation has to mirror the change. rendercopy/gen8: Add the VF_INSTANCING state Should work without, but doesn't hurt to add it. rendercopy/gen8: Set the Attribule enable field in PS_EXTRA When the SF is set up to output some attributes, the pixel shader also have to be told there's attributes to care about. rendercopy/gen8: Set the force bits to read URB offset/length If we want to override the URB offset/length in the SBE state itself, we need to set the force bits on (new in gen8) Signed-off-by: Damien Lespiau Acked-by: Kenneth Graunke Signed-off-by: Ben Widawsky commit 3f0714a8607fb9b735ef8b16e0e1d1b308381a04 Author: Damien Lespiau Date: Wed Feb 27 14:51:33 2013 +0000 rendercopy/bdw: Add gen8_render.h to the file list So it gets distributed with make dist. Signed-off-by: Damien Lespiau Signed-off-by: Ben Widawsky commit 3edfff16cde0033fbec3c2deb390212acff15d6d Author: Jesse Barnes Date: Wed Feb 27 14:51:32 2013 +0000 rendercopy/bdw: Initial gen8 rendercopy Signed-off-by: Jesse Barnes Signed-off-by: Ben Widawsky commit 66783e4c4f8b417e2f493e668cc4cac4ebda51a3 Author: Zhao Yakui Date: Tue Apr 9 09:59:16 2013 +0800 assembler/bdw: Add the DATA_PORT_CACHE1 shared function for Gen8+ This is required to send some messages to data port in GPU shader. For example: media_block_write message. Signed-off-by: Zhao Yakui Reviewed-by: Kenneth Graunke Signed-off-by: Ben Widawsky commit 88e5f1fdf847a0ce284b8a01ff2cf3fb36e2b07c Author: Zhao Yakui Date: Tue Apr 9 09:59:15 2013 +0800 assembler/bdw: Add the support of align1 register-indirect addressing mode on Gen8 Otherwise it can't compile the following GPU shader that uses the register-indirect addressing mode. >add.sat (16) r[a0.5,0]<1>:uw r[a0.5,0]<16;16,1>:uw 0x0080:uw >add.sat (16) r[a0.5,32]<1>:uw r[a0.5,32]<16;16,1>:uw 0x0080:uw Signed-off-by: Zhao Yakui Signed-off-by: Ben Widawsky commit 60c9b41e11bf4a3ea4935bd30f5c169ca24de06d Author: Xiang, Haihao Date: Fri Feb 22 11:14:13 2013 +0800 assembler/bdw: SEND instruction Signed-off-by: Xiang, Haihao Signed-off-by: Ben Widawsky commit 3d8d094efec8cd6efbcead9c2fd54067e1a83223 Author: Ben Widawsky Date: Fri Aug 16 15:24:25 2013 -0700 assembler/bdw: Small cleanup This was originally part of: commit 62298329350b965e4bbfc558e5a4b1b3646742ea Author: Xiang, Haihao Date: Wed Aug 14 14:21:16 2013 -0700 assembler: error for the wrong syntax of SEND instruction on GEN6+ I merged that patch separately, but this tiny hunk was leftover. In order to not muck in changing too much history, I am leaving this as a discrete patch, but with the changed commit message Signed-off-by: Ben Widawsky commit bf05bd55310a1cde8efb835d4352c9f7c4fbcb60 Author: Xiang, Haihao Date: Fri Feb 22 11:14:11 2013 +0800 assembler/bdw: Check & Refinement Engine message Signed-off-by: Xiang, Haihao Signed-off-by: Ben Widawsky commit b6a33bdcce9dd3a9c55d9077b380f0d5ec6d0da3 Author: Xiang, Haihao Date: Fri Feb 22 11:14:10 2013 +0800 assembler/bdw: Video Motion Estimation(VME) message Signed-off-by: Xiang, Haihao Signed-off-by: Ben Widawsky commit bf003ea63434e6acc91b7c0feec6aa2084983a16 Author: Xiang, Haihao Date: Fri Feb 22 11:14:09 2013 +0800 assembler/bdw: Thread Spawn message Signed-off-by: Xiang, Haihao Signed-off-by: Ben Widawsky commit 01c9654a65460eb6058b9060894a6e0e08ac2c80 Author: Xiang, Haihao Date: Fri Feb 22 11:14:08 2013 +0800 assembler/bdw: Data port message Signed-off-by: Xiang, Haihao Signed-off-by: Ben Widawsky commit 9d0287c252cb634db6edef990192cf77d2e120e6 Author: Xiang, Haihao Date: Fri Feb 22 11:14:07 2013 +0800 assembler/bdw: Set thread switch for multiple branch instructions Signed-off-by: Xiang, Haihao Signed-off-by: Ben Widawsky commit 216163b44d2285705d1af1db405be94d69a27fef Author: Xiang, Haihao Date: Fri Feb 22 11:14:06 2013 +0800 assembler/bdw: Set jip/uip offsets used by flow control instructions Signed-off-by: Xiang, Haihao Signed-off-by: Ben Widawsky commit 2df4d3115af706c9e01b2d7ddb7b957239bfdc85 Author: Xiang, Haihao Date: Fri Feb 22 11:14:05 2013 +0800 assembler/bdw: Disable mask control for advanced mode Signed-off-by: Xiang, Haihao Signed-off-by: Ben Widawsky commit 220f165008469c943959cd9ac4958432e4d24d64 Author: Xiang, Haihao Date: Fri Feb 22 11:14:04 2013 +0800 assembler/bdw: Set math function Signed-off-by: Xiang, Haihao Signed-off-by: Ben Widawsky commit 9cf8e1b79c9430171f3e627b298bf5e0f4f65c82 Author: Damien Lespiau Date: Tue Feb 5 11:34:10 2013 +0000 assembler/bdw: Use gen8_set_exec_size() to set the execution size Signed-off-by: Damien Lespiau Signed-off-by: Ben Widawsky commit f9e74fb49464b64ff9321e04e60dba40a7bc34b5 Author: Damien Lespiau Date: Thu Jan 31 18:25:45 2013 +0000 assembler/bdw: Preliminary gen8 send & msgtarget support Still some work needed there, but enough for rendercopy. Signed-off-by: Damien Lespiau Signed-off-by: Ben Widawsky commit bc3bf098a98333aa00290663d7aec2e08270fc58 Author: Damien Lespiau Date: Thu Jan 31 15:31:27 2013 +0000 assembler/bdw: Add the start of a gen8 disassembler Directly taken from Mesa. v2 (Ben): Updated copyright Signed-off-by: Damien Lespiau Signed-off-by: Ben Widawsky commit 42d8d57c8c57232f6da4c47a03a5d9599976fa98 Author: Damien Lespiau Date: Thu Jan 31 01:55:48 2013 +0000 assembler/bdw: Make the validation functions take a brw_program_instruction This allows to use the same functions to validate operands on gen8 for now. Signed-off-by: Damien Lespiau Signed-off-by: Ben Widawsky commit af4d37de38f2ea0304b9618fbe8d85733663a6c8 Author: Damien Lespiau Date: Thu Jan 31 02:16:08 2013 +0000 assembler/bdw: Support some basic gen8 intructions We should now support alu2 intructions with direct register addressing. Signed-off-by: Damien Lespiau Signed-off-by: Ben Widawsky commit c3b36592af100672c9b52bdb141e38b7501a658b Author: Damien Lespiau Date: Wed Jan 30 17:19:57 2013 +0000 assembler/bdw: Add gen8_instruction from mesa Signed-off-by: Damien Lespiau Signed-off-by: Ben Widawsky commit f57f55e4daf2ef9c60242f22134f0f4e06117ace Author: Ben Widawsky Date: Wed Oct 9 15:51:34 2013 -0700 tests/bdw: Port storedw_loop_vebox to gen8 I chose not to implement this in the same way as Zhao Yakui because I was lazy. Signed-off-by: Ben Widawsky commit 50a52f3ada8c52c584c23d107bf96fa34a47b46e Author: Zhao Yakui Date: Tue Apr 9 09:29:19 2013 +0800 tests/bdw: Port storedw_loop_blt to gen8 The code is from the storedw_loop_render. v2 (by Ben): Flush on the correct ring Signed-off-by: Zhao Yakui Signed-off-by: Ben Widawsky commit 6a2d5059ff2ee3a6a999465b40a89e0c43d7fc12 Author: Zhao Yakui Date: Tue Apr 9 09:29:18 2013 +0800 tests/bdw: Port storedw_loop_bsd to gen8 The code is from the storedw_loop_render. v2 (by Ben): Flush on the correct Ring Signed-off-by: Zhao Yakui Signed-off-by: Ben Widawsky commit 636f726b8030e2aec831193de25032d817267452 Author: Damien Lespiau Date: Thu Feb 14 15:32:33 2013 +0000 tests/bdw: Port storedw_loop_render to bdw Signed-off-by: Damien Lespiau Reviewed-by: Jesse Barnes Signed-off-by: Ben Widawsky commit 3aad2ac83c76e8e05ac91d8b7dab465556ef9575 Author: Ben Widawsky Date: Tue Oct 8 19:48:35 2013 -0700 tests/bdw: pwrite_pread support gen8 style blits Signed-off-by: Ben Widawsky commit d3480229341b78952dc1558dd8992d0f12f6998b Author: Ben Widawsky Date: Wed Oct 9 08:41:52 2013 -0700 tests/bdw: gem_linear_blits support gen8 style blits Signed-off-by: Ben Widawsky commit adc5a41f2b26c9c86b4e31d3fa90d95bceece8cf Author: Ben Widawsky Date: Wed Oct 9 08:41:52 2013 -0700 tests/bdw: gem_pin support gen8 style blits Signed-off-by: Ben Widawsky commit eb89ce7a7e3c54961025f19093ef79fd677a94b6 Author: Ben Widawsky Date: Wed Oct 9 08:41:52 2013 -0700 tests/bdw: gem_exec_blt support gen8 style blits Signed-off-by: Ben Widawsky commit 91f9e19fcd8df9cd23f54b92db83ecfffcaf47bf Author: Ben Widawsky Date: Wed Oct 9 08:41:52 2013 -0700 tests/bdw: gem_evict_* support gen8 style blits Signed-off-by: Ben Widawsky commit 6fa529ecd6055db55bc83a56cc83025b3f7dcfd3 Author: Ben Widawsky Date: Tue Oct 8 18:15:21 2013 -0700 tests/bdw: gem_cpu_reloc support gen8 style blits Signed-off-by: Ben Widawsky commit 3e2937bd99a2c01fb303f68c7384fc8addd337ba Author: Ben Widawsky Date: Tue Oct 8 17:38:43 2013 -0700 tests/bdw: gem_exec_faulting_reloc support gen8 style blits Signed-off-by: Ben Widawsky commit f4dfa37e8578419b94a7c84fbcea7d4b70aa68b9 Author: Ben Widawsky Date: Tue Oct 8 15:02:07 2013 -0700 bdw: Update obvious missing blit support This provides a macro that allows us to update all the arbitrary blit commands we have stuck throughout the code. It assumes we don't actually use 64b relocs (which is currently true). This also allows us to easily find all the areas we need to update later when we really use the upper dword. This block was done mostly with a sed job, and represents the easier in test blit implementations. v2 by Oscar: s/OUT_BATCH/BEGIN_BATCH in BLIT_COPY_BATCH_START CC: Chris Wilson Signed-off-by: Ben Widawsky Signed-off-by: Oscar Mateo commit 26f09a91897f6ad66b8fb8e0e5afb4c95954fbd2 Author: Damien Lespiau Date: Thu Feb 14 15:32:32 2013 +0000 bdw: Add gen8 specific instdone bits Signed-off-by: Damien Lespiau Reviewed-by: Jesse Barnes Signed-off-by: Ben Widawsky commit 295137046a353ce43a0eff6b665eb1c63dc6145c Author: Damien Lespiau Date: Thu Feb 14 15:32:31 2013 +0000 bdw: Add gen8 to intel_gen() Signed-off-by: Damien Lespiau Reviewed-by: Jesse Barnes Signed-off-by: Ben Widawsky commit 068c21b56b710e20215e2c2e515ac072b6affb9c Author: Damien Lespiau Date: Thu Feb 14 15:32:30 2013 +0000 bdw: Add gen8 to the IS_9XX() macro Signed-off-by: Damien Lespiau Reviewed-by: Jesse Barnes Signed-off-by: Ben Widawsky commit a8221a53ecd295747c00f41b1cd6dbd15eec6b93 Author: Ben Widawsky Date: Mon Dec 3 11:36:46 2012 -0800 pciid/bdw: Add Broadwell PCI ids Signed-off-by: Ben Widawsky commit f20ac4c8a10995d47a0bd853b3436e8427b58bff Author: Ben Widawsky Date: Tue Dec 4 08:38:46 2012 -0800 chipset: IS_I9XX macro This isnt useful in IGT, but it will allow us to keep the merge process with libdrm simpler. Signed-off-by: Ben Widawsky commit 41b5fbfd60286fe8052a4b8d5eb5e315118282bb Author: Rodrigo Vivi Date: Wed Nov 6 13:06:11 2013 -0200 bump version to 1.5 and add the release date Signed-off-by: Rodrigo Vivi commit ad648d9debf4c2a751b6d240cfed9da8391913af Author: Rodrigo Vivi Date: Tue Oct 1 15:12:37 2013 -0300 tests: pm_psr Check on debugfs if PSR is supported by panel and matching all conditions in hardware. In this case PSR must be enabled and performance counting increasing v2: check if performance counter is really increasing. v3: respect new naming convention Signed-off-by: Rodrigo Vivi commit 27f1a7dd4bf67cd0fc892e9de3254a65f2c48110 Author: Daniel Vetter Date: Wed Nov 6 15:06:15 2013 +0100 NEWS: drop_caches improvements Signed-off-by: Daniel Vetter commit d9381c8a6629a82cb27bfcc4fc29861810fe35f1 Author: Jesse Barnes Date: Tue Nov 5 07:44:20 2013 -0800 quick_dump/vlv: add DPIO_CTL to the dump Signed-off-by: Jesse Barnes commit aa252d0e009b8c94ff875a69a4ca3640d1a5c1c9 Author: Oscar Mateo Date: Tue Nov 5 14:15:19 2013 +0000 lib/drmtest: Retire requests via drop caches after gem_quiescent_gpu This helps make sure that the GPU is really quiescent by getting rid of any residual stuff. Signed-off-by: Oscar Mateo Signed-off-by: Daniel Vetter commit 4a6a59f314f61e1e4156bb13a65efabee31a76fc Author: Daniel Vetter Date: Tue Nov 5 11:56:50 2013 +0100 tests/gem_ctx_bad_exec: Check the errno, too Signed-off-by: Daniel Vetter commit 466da453aee6bc6218b5f7ebf22223c269c176b7 Author: Oscar Mateo Date: Tue Nov 5 10:57:31 2013 +0000 gem_flink_race: Assure no pending requests before object counting Same thing that was done for prime_self_import. v2: Move igt_drop_caches_set() call inside get_object_count() to make it clearer why we want this. Signed-off-by: Oscar Mateo Signed-off-by: Daniel Vetter commit ece21fa86502352a251d313dc22b325ac57f2ee4 Author: Oscar Mateo Date: Tue Nov 5 10:56:24 2013 +0000 prime_self_import: Assure no pending requests before object counting We don't want a previously used object to be freed in the middle of a before/after object counting operation (or we would get a "-1 objects leaked" message). We have seen this happening, e.g., when a context from a previous run dies, but its backing object is alive waiting for a retire_work to kick in. v2: Use igt_debugfs facilities for drop cache. v3: Move igt_drop_caches_set() call inside get_object_count() to make it clearer why we want this. Signed-off-by: Oscar Mateo Cc: Ben Widawsky Signed-off-by: Daniel Vetter commit eeaf013214698c62a99ff9a83764f1369acd40b0 Author: Daniel Vetter Date: Sun Nov 3 11:28:50 2013 +0100 NEWS: Roll in updates. commit 682b674a673da911c4fa0526596877a28d358471 Author: Daniel Vetter Date: Sat Nov 2 12:42:21 2013 +0100 tests: establish core_ prefix Signed-off-by: Daniel Vetter commit 51dc087864c385ebd469c2764b60b40363fbe022 Author: Daniel Vetter Date: Sat Nov 2 12:35:44 2013 +0100 tests: Use kms_ prefix a bit more I was a bit on the fence about the basic pipe CRC test since that doesn't really test kms, but debug infrastructure in debugfs. Otoh running this one for a full kms testrun is always good, to make sure that all the other (real) CRC based tests work sanely. Signed-off-by: Daniel Vetter commit 5738f1952d8b62bb2dea643ae8cfa3c308a45797 Author: Daniel Vetter Date: Sat Nov 2 12:27:24 2013 +0100 tests: establish pm_ prefix Imo power management, power consumption and performance are tightly enough coupled that we can throw them all into one bin. Signed-off-by: Daniel Vetter commit c32032111aa701061acb7c3247b6cf7696272501 Author: Daniel Vetter Date: Sat Nov 2 12:22:37 2013 +0100 tests: estbalish drv_ prefix Signed-off-by: Daniel Vetter commit d983f9934513740f72bd6f9e3ad1007e60435aec Author: Daniel Vetter Date: Sat Nov 2 12:17:49 2013 +0100 tests: Start to document naming conventions Just a start and we need more work here. Some follow-up patches will clear up some of the historical confusion. While at it rename the pc8 "basic" test to "rte". Signed-off-by: Daniel Vetter commit 66c46ecc80ab16a90ed3dd845fa68a58323622af Author: Daniel Vetter Date: Sat Nov 2 12:54:35 2013 +0100 Update .gitignore a bit - Ignore build-aux/ - Cleanup ignores for assembler/ commit af9d1b5cdb4cc506a7f171a49d1103998b5a2f9e Author: Daniel Vetter Date: Mon Nov 4 18:11:29 2013 +0100 lib: drop return value from igt_drop_caches No one actually cares, everyone expects it to just work. Signed-off-by: Daniel Vetter commit 5f0ab94c3fca1437f10812e88136f82c3396a99e Author: Oscar Mateo Date: Mon Nov 4 16:30:47 2013 +0000 lib: Add igt_drop_caches_set() This is basically a "drop cache" interface to the igt_debugfs facilities. Also, update existing users. Signed-off-by: Oscar Mateo Cc: Damien Lespiau Signed-off-by: Daniel Vetter commit a97402e89ac492e2cbdd4b194638a7c0e898a4a3 Author: Oscar Mateo Date: Mon Nov 4 16:30:46 2013 +0000 tests: Fix "-thrashing" and "-thrash-inactive" distinction A typo in the relocation tests made both sub-tests perform the same action: drop *all* caches. Signed-off-by: Oscar Mateo Signed-off-by: Daniel Vetter commit 163d85d5f0c4e8dfecb93c3a01c7f90da744aa79 Author: Daniel Vetter Date: Fri Nov 1 22:18:20 2013 +0100 tests: igt_no_subtest Yet another check for the library. Signed-off-by: Daniel Vetter commit 6d73fdbfd2d8944702459f7412790aab32677c48 Author: Daniel Vetter Date: Fri Nov 1 18:31:59 2013 +0100 tests: Add a Makefile comment about the expected failures in igt_ tests Signed-off-by: Daniel Vetter commit 8f718b1cd80b13d9044956a5b19668faf4320a52 Author: Daniel Vetter Date: Thu Oct 31 17:05:28 2013 +0100 tests: Add a test template Requested by Paulo. Signed-off-by: Daniel Vetter commit 071e9ca1ca4424ba35edec0246918efdd0528d76 Author: Daniel Vetter Date: Thu Oct 31 16:23:26 2013 +0100 lib: add igt_main macro In the past new testcases with subtest often forgot to add the call to igt_exit at the end of their main() function. That is now caught with a bit more obnoxious asserts, but it's still a nuissance. This little igt_main macro takes care of that (and also of calling the subtest machinery initialization code correctly). If no one objects I'll roll this out for all the simple cases (i.e. those tests that don't have additional argv parsing on top of the subtest machinery). v2: Roll it out across the board. Signed-off-by: Daniel Vetter commit 223a61e12e119d96484ed05c563d1781fd613a4e Author: Daniel Vetter Date: Thu Oct 31 17:16:33 2013 +0100 lib: make igt_install_exit_handler never fail Most callers didn't bother checking, so just move the asserts into the function itself. Signed-off-by: Daniel Vetter commit 1f0cf2df85ca3f9d900b21db9c8744a99e8f60a0 Author: Daniel Vetter Date: Thu Oct 31 17:02:41 2013 +0100 lib: make igt_set_vt_graphics_mode never fail All tests agree that this is a letal failure, so no point to pass it back to callers. Also add some igt_require calls for the drm_fd where I've noticed that it's missing. Signed-off-by: Daniel Vetter commit 0369fe19b8b8e19e0815361b5187eba81cb2d71a Author: Daniel Vetter Date: Thu Oct 31 16:09:46 2013 +0100 lib: consolidate pipe crc exit handler No need to sprinkle this all over: - exit handlers will only be registered once - they're always called when exiting, so no need to explictly call them. This allows us to hide all the pipe crc cleanup in the library. Cc: Damien Lespiau Signed-off-by: Daniel Vetter commit 43def94f3213634c2c798049cb17efc14801a9ed Author: Daniel Vetter Date: Thu Oct 31 16:06:40 2013 +0100 tests/kms_cursor_crc: rework to auto-skip connectors Cc: Ville Syrjälä Signed-off-by: Daniel Vetter commit 8bb5730d28122fe5c142815f1ad32c351bf36cfe Author: Daniel Vetter Date: Thu Oct 31 15:37:05 2013 +0100 tests/debugfs_pipe_crc: set mode before creating CRC helper Otherwise the automagic skipping for DP ports on gmch platforms won't work. v2: We also need to just skip that connector, not the entire subtest. kms_cursor_crc still needs to be updated. Cc: Damien Lespiau Cc: Ville Syrjälä Signed-off-by: Daniel Vetter commit 842007154da76dc2684077a4080c875bb3068f32 Author: Daniel Vetter Date: Thu Oct 31 14:02:44 2013 +0100 tests: use "auto" pipe CRC source Makes stuff work on DP ports on gmch platforms automatically. Cc: Damien Lespiau Signed-off-by: Daniel Vetter commit 0b51de8dd02dc2502fa0614c3a29959a066584cc Author: Daniel Vetter Date: Fri Nov 1 18:29:33 2013 +0100 lib: add more self-tests around the igt_exit checks. Signed-off-by: Daniel Vetter commit e14596a6d074c5e79343633bf3c21a2f2961269d Author: Daniel Vetter Date: Fri Nov 1 18:21:08 2013 +0100 lib: fix igt_exit assert when only listing subtests. Ooops. Reported by Paulo. Also add a new testcase for make check to make sure this actually works. Signed-off-by: Daniel Vetter commit 9e21c255e74128a16ef5c2dd4b1903d1d2c417eb Author: Damien Lespiau Date: Fri Nov 1 16:25:10 2013 +0000 lib: Don't forget to close the pipe ctl fd in igt_pipe_crc_reset() Signed-off-by: Damien Lespiau commit b1945f8c46c1305dd882241711471dbea90f0c2b Author: Damien Lespiau Date: Fri Nov 1 15:47:42 2013 +0000 gitignore: Ignore recently introduced tools and tests Signed-off-by: Damien Lespiau commit bd0aa100ca438fa68cf07dc55ec6dbfe7391ba6c Author: Paulo Zanoni Date: Mon Oct 21 11:45:41 2013 -0200 module_reload: remove snd_hda_intel The audio driver uses the power well provided by our driver, so on Haswell we can't "rmmod i915" if we don't "rmmod snd_hda_intel" first. The problem with removing snd_hda_intel is that we also need to kill its users. On the specific machine I tested, the only user seem to be alsactl, but on other machines this may change. IMHO we should leave the "kill user space" step to whoever is running the script, but Daniel asked me to put it here so we have a better chance of Just Working on QA's machines. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70336 Requested-by: Daniel Vetter Signed-off-by: Paulo Zanoni commit 3c6a7e780b08cf7cf9e7700a2a882014f947a795 Author: Ville Syrjälä Date: Thu Sep 19 18:14:54 2013 +0300 Add VGA register read/write tools Signed-off-by: Ville Syrjälä commit 164b540936b6cc6d67151793efdc6261975cadfc Author: Ben Widawsky Date: Thu Oct 31 14:16:41 2013 -0700 debugfs_pipe_crc: skip on simulation As with other display tests, they're not working (and in this case, cause hangs). Signed-off-by: Ben Widawsky commit 2addb2744f2373cd327a8633330bf27fd11ce621 Author: Paulo Zanoni Date: Tue Oct 29 14:02:43 2013 -0200 tests/pc8: remove some printfs They pollute the output, which makes it harder to see which tests failed or succeeded. Signed-off-by: Paulo Zanoni commit b6645ee2e27beb2d8e69402611938c288ab35a47 Author: Paulo Zanoni Date: Tue Oct 29 11:14:50 2013 -0200 tests/pc8: clarify modeset_subtest arguments My tiny little brain can't properly process 3 unnamed boolean arguments. Signed-off-by: Paulo Zanoni commit abb334061763652eec274831cda87dab9f8f1d15 Author: Paulo Zanoni Date: Tue Oct 29 11:00:45 2013 -0200 tests/pc8: add modeset -stress-no-wait tests Used to trigger a racing condition between mode setting and enabling/disabling PC8. The modeset-lpsp-stress-no-wait test should fail on Kernels without the fix I just wrote today. Signed-off-by: Paulo Zanoni commit 7a5275f8a5a5768da038c87efd344c65302dfc93 Author: Paulo Zanoni Date: Mon Oct 28 19:11:31 2013 -0200 tests/pc8: add modeset-lpsp and modeset-non-lpsp The goal of these tests is to exercise the combination of power well enabling/disabling and PC8 enabling/disabling. The modeset-non-lpsp test exposes a silent bug on the current code that can just be detected with the Runtime D3 patches. The Kernel patch that fixes the bug will add a WARN to unmute it on the PC8-only case. Signed-off-by: Paulo Zanoni commit 87cf5571fc206f6d87195d574b2ec2092e0c2b1f Author: Ben Widawsky Date: Tue Oct 29 20:01:43 2013 -0700 gem_suspend: Skip on simulation Simulation has proven flaky across both reset, and s3/4 Signed-off-by: Ben Widawsky commit 5382aca1afb33614270c536835e3da61b4e2d123 Author: Ben Widawsky Date: Tue Oct 29 20:01:14 2013 -0700 gem_close_race: Fix linker flags Seems the -lpthread was missed in commit 8f771f3facae133bb72216fa05c74bc817920b6d Author: Chris Wilson Date: Tue Oct 29 14:21:29 2013 +0000 gem_close_race: Also test random closing of active fd Signed-off-by: Ben Widawsky commit 8f771f3facae133bb72216fa05c74bc817920b6d Author: Chris Wilson Date: Tue Oct 29 14:21:29 2013 +0000 gem_close_race: Also test random closing of active fd Signed-off-by: Chris Wilson commit 5d24a67c1b885084e0f0d51631ed0c5227bcb112 Author: Daniel Vetter Date: Tue Oct 29 11:29:00 2013 +0100 lib/drmtest: Scream harder when igt_exit isn't called for subtest tests We really need this since otherwise the magic return value handling for running testcases with piglit (or on QA's validation infrastructure) doesn't work properly. We need to be careful though to only install this check on success. See also the previous commits to sprinkle igt_exit() calls over all the tests that missed it. Signed-off-by: Daniel Vetter commit 780807099a482fdcbaea40af7117127b6d92beae Author: Daniel Vetter Date: Tue Oct 29 11:15:43 2013 +0100 tests: Use igt_exit for tests with subtest Signed-off-by: Daniel Vetter commit ccb1b5888dd18a8227a4e09a5674abca15931c87 Author: Chris Wilson Date: Tue Oct 29 09:25:44 2013 +0000 gem_close_race: Bump the workload Emit more work per client and many more clients in order to increase the chance of racing i915_gem_release() and i915_gem_retire_requests() commit 51783fc7f9aacd20f13bd7a12c5eb9194176ab14 Author: Chris Wilson Date: Tue Oct 29 08:38:30 2013 +0000 gem_close_race: Tidy up call to execbuffer Pass the right pointer to the execlist would be a good start. Signed-off-by: Chris Wilson commit 7b8784dccf303c4fd9c6a1c2e3f9fae7d00fde2f Author: Daniel Vetter Date: Tue Oct 29 07:47:33 2013 +0100 tests/kms_cursor_crc: Use igt_exit Otherwise the exit codes are all bogus. Signed-off-by: Daniel Vetter commit 020600b77dfc179d99bb3d088927dcdf6d432cfe Author: Damien Lespiau Date: Thu Oct 24 15:27:12 2013 +0100 tests: Convert the ctx test to use render nodes when possible Signed-off-by: Damien Lespiau commit d71ecdbf5de0bb95551c6a5def4d42e85b4d6616 Author: Damien Lespiau Date: Thu Oct 24 15:21:59 2013 +0100 tests/gem_render_copy: Use render nodes Signed-off-by: Damien Lespiau commit 69c200b0bb39bb585f46fa5c779c97166779cd93 Author: Damien Lespiau Date: Thu Oct 24 15:19:32 2013 +0100 lib: Add a drm_open_any_render() that will try to use render nodes I was fedup with having to run my tests as root and not being able to use my usual setup for tests that only exercise the GT part of the GPU. Render nodes to the rescue! Signed-off-by: Damien Lespiau commit 8329acb752721ad93dab70624b136f1befd4be3f Author: Damien Lespiau Date: Thu Oct 24 15:04:26 2013 +0100 lib: Close non intel fds in drm_get_card() When going through card%u devices, close the ones that we were able to open but weren't intel devices. Signed-off-by: Damien Lespiau commit 949ce5b8a1054fcc1c375ee4b801c291483e2005 Author: Damien Lespiau Date: Thu Oct 24 14:08:17 2013 +0100 lib: Remove stale comment Signed-off-by: Damien Lespiau commit 90ecf062d10a3ed1bb08cb887aea78b385072584 Author: Chris Wilson Date: Mon Oct 28 09:10:46 2013 +0000 tests: Add gem_close_race The intention is to exercise #70784. Yet the first challenge is make the test suite happy. commit 37c02cfa5c4ff2fa6dd833efdcf880416139d096 Author: Damien Lespiau Date: Tue Oct 22 15:03:48 2013 +0100 gem_render_linear_blits: Remove aub dump support It's much easier to follow the new gem_render_copy test and acquire a aub dump from it. Suggested-by: Chris Wilson Signed-off-by: Damien Lespiau commit 7ad0cf585b4f4c0391646c0eaea6e7e8e2e88cca Author: Damien Lespiau Date: Tue Oct 22 14:57:57 2013 +0100 tests/gem_render_copy: Add aub dump support Signed-off-by: Damien Lespiau commit 145722187c30a60456df046981087f84f3c0b601 Author: Damien Lespiau Date: Tue Oct 22 14:26:38 2013 +0100 tests/gem_render_copy: Only dump pngs when the -d option is given Signed-off-by: Damien Lespiau commit 9cd092fac149eb8cfe16e3652f1d535fb0698329 Author: Damien Lespiau Date: Tue Oct 22 14:20:10 2013 +0100 tests/gem_render_copy: Add a simple render copy test The goal is here to both: demonstrate a simple usage of render copy with the possibility to write pngs to visualize what it's doing and to provide a test bed to port the render copy function to new architectures. Signed-off-by: Damien Lespiau commit c3707ab387500b534224dd563297a7bbb26aeb83 Author: Damien Lespiau Date: Tue Oct 22 14:18:26 2013 +0100 lib: Add a function to dump a scratch buf into a png Signed-off-by: Damien Lespiau commit 13ebe3c01410c2dc0d90a4a1c33cbf143c51056c Author: Rodrigo Vivi Date: Tue Oct 22 12:35:59 2013 -0200 build: include intel_l3_parity.h to its _SOURCES to fix make distcheck and make sure intel_l3_parity.h will be included in tarball. Signed-off-by: Rodrigo Vivi commit 50c2653381ad0ff5390932df1385aeb20b0d03bc Author: Rodrigo Vivi Date: Tue Oct 22 11:28:56 2013 -0200 build: Fix small typo that was breaking make distcheck Signed-off-by: Rodrigo Vivi commit fa05c0bcedd909bf8b85c02ca0f533921e8256b4 Author: Ville Syrjälä Date: Wed Oct 16 23:07:34 2013 +0300 kms_flip: Add test for -ENOENT Make sure we get -ENOENT when we pass a non-existing fb_id to the page flip and setcrtc ioctls. Signed-off-by: Ville Syrjälä commit 08c27e3e3899f5063ac3eef44a4dbb6201568b47 Author: Ville Syrjälä Date: Fri Oct 18 17:44:42 2013 +0300 kms_cursor_crc: Add a cursor test using CRCs Use the display CRC support to validate cursor plane functionality. The test will position the cursor plane either fully onscreen, partially onscreen, or fully offscreen, using either a fully opaque or fully transparent surface. In each case it then reads the PF CRC and compares it with the CRC value obtained when the cursor plane was disabled. v2: Loop over all connectors and crtcs Use igt_wait_for_vblank Test more corner cases Add some progress indication ala. kms_flip Make it work for pf and pipe sources Signed-off-by: Ville Syrjälä commit 0786d5cc8f258c7f403a22d8234ebb81837baa70 Author: Ville Syrjälä Date: Mon Oct 21 18:45:03 2013 +0300 lib: Check pipe source validity in igt_pipe_crc_new() Have igt_pipe_crc_new() check whether the selected source is actually supported. v2: Make debugfs_pipe_crc.c not crash Signed-off-by: Ville Syrjälä commit 987bcd9a5b51db312588163d7f9a21654eb799e4 Author: Ville Syrjälä Date: Mon Oct 21 19:37:33 2013 +0300 lib: Allow pipe_crc_free(NULL) Prevent pipe_crc_free() from segfaulting on NULL ptr. Signed-off-by: Ville Syrjälä commit 471ec64de83b21316cd7f4d86a9337f4d017a907 Author: Ville Syrjälä Date: Fri Oct 18 21:43:14 2013 +0300 lib/drmtest: Add kmstest_paint_color_alpha() kmstest_paint_color_alpha() just like kmstest_paint_color() except you also get to specify the alpha channel. Signed-off-by: Ville Syrjälä commit e98a06d593ba879a5292451812be773b4157fe21 Author: Paulo Zanoni Date: Mon Oct 21 13:19:57 2013 -0200 intel_reg_dumper: fix "enable" at hsw_debug_lp_wm Signed-off-by: Paulo Zanoni commit b7ccea08e6e704d0e6c0e72b3c44d4fa6e97fa76 Author: Damien Lespiau Date: Mon Oct 21 15:55:52 2013 +0100 gitignore: Ignore intel_opregion_decode Signed-off-by: Damien Lespiau commit 6d3c917e8988979e1328103c5f030371a854e5b1 Author: Jani Nikula Date: Tue Oct 8 21:18:14 2013 +0300 intel_opregion_decode: decipher bclm table Signed-off-by: Jani Nikula Reviewed-by: Rodrigo Vivi commit 76be74975a88fe5ed12744d7735caef7588c69fb Author: Jani Nikula Date: Tue Oct 8 21:18:13 2013 +0300 intel_opregion_decode: new tool for decoding graphics opregion Signed-off-by: Jani Nikula Reviewed-by: Rodrigo Vivi commit a360e3993b9a6800432d7e1b4591d2dd6bf2ddb8 Author: Jani Nikula Date: Tue Oct 8 21:15:28 2013 +0300 intel_bios_reader: dump all sections, including unknown ones We still need to dump some of the known sections explicitly due to dependencies on information extracted, such as LFP data pointers and panel_type. Signed-off-by: Jani Nikula Reviewed-by: Rodrigo Vivi commit 419d053fd628b66fe0d838642ced6e9980f6282b Author: Jani Nikula Date: Tue Oct 8 21:15:29 2013 +0300 intel_bios_reader: dump all edp device info structs Signed-off-by: Jani Nikula Reviewed-by: Rodrigo Vivi commit a4180df32a74c8aaa7a58e1cf60d240905e01852 Author: Jani Nikula Date: Tue Oct 8 21:15:27 2013 +0300 intel_bios_reader: prepare for dumping all sections Dump sections through a table based on the section id. Hex dump the section. This works also for unknown sections. Signed-off-by: Jani Nikula Reviewed-by: Rodrigo Vivi commit 8596a4b8869bb17a4eed31815b2b63ef973c71c7 Author: Jani Nikula Date: Tue Oct 8 21:15:26 2013 +0300 intel_bios_reader: add size temp variable as a shorthand for finfo.st_size Signed-off-by: Jani Nikula Reviewed-by: Rodrigo Vivi commit 58ac17d821cb3fa6300ca58d7f387c41a81d449c Author: Chris Wilson Date: Mon Oct 21 09:31:18 2013 +0100 intel_error_decode: Fix X/Y fence for gen2/3 commit 4acaf0004d43dfb51ba60d7990cef22a54b56727 Author: Daniel Vetter Date: Sun Oct 20 20:37:21 2013 +0200 tests/kms_flip: More leeway for dummy load tests At least on my old atom i945 they take forever. Also, metric tons of pipe B underruns while running rcs-flip-vs-panning. No idea why that happens. Signed-off-by: Daniel Vetter commit 3d2d73ed450983c427a839b10527bd4659fbb708 Author: Daniel Vetter Date: Sun Oct 20 19:24:08 2013 +0200 kmstest: don't pollute stderr for impossible output configs Otherwise on machines where the only output available is restricted to one pipe we'll have tons of "warn" results for no gain in the piglit runner. All tests that use the kmstest helpers already check the return value and do something sensible (like skip the tests if there's really no config available). Signed-off-by: Daniel Vetter commit 45cd89ab3d18dc2c869951db4134c1e5dde45c1b Author: Daniel Vetter Date: Sun Oct 20 16:11:49 2013 +0200 tests/kms_flip: Unconfuse the framenumber step checking We run flips and vblank waits in parallel, which means the step for each is the maximum. If we'd switch to an interleaved scheme (to be able to check the correlation) we'd need to add them instead. Signed-off-by: Daniel Vetter commit 8e11f8778adff693f3a0246fe0e87be4e3ddb83f Author: Daniel Vetter Date: Sun Oct 20 16:10:32 2013 +0200 tests/kms_flip: no absolute vblank wait on the first frame We don't have a reference value for the vblank counter yet, so will end up waiting for a long time for the vblank counter to wrap around again. Signed-off-by: Daniel Vetter commit e313dee22b8edf1429ce861e5974b09bb2ab1b68 Author: Daniel Vetter Date: Sat Oct 19 16:21:18 2013 +0200 tets/kms_flip: disable correlation check It's broken since it doesn't take the order the events arrived into account and so will fall over for longer seq_step values in the vblank event: Since the flip completes right away, but the vblank later on they won't have the same timestamp. For now just give up, we could resurrect this by strictly alternating between a flip and a vblank wait. Signed-off-by: Daniel Vetter commit f698984bae5e907eedfa335b463ab717a45ecc2a Author: Daniel Vetter Date: Fri Oct 18 18:43:30 2013 +0200 tests/debugfs_pipe_crc: new subtest to check CRC frame numbers Signed-off-by: Daniel Vetter commit 09e9f0b216dd7ee06b857ce5fd5cc9cb5ca491dc Author: Damien Lespiau Date: Wed Feb 27 14:51:29 2013 +0000 rendercopy: Add a way to dump an .aub file with the rendercopy bos v2 (by Ben): Remove libdrm dependency since intel-gpu-tools now requires a higher version anyway. Remove associated #ifdef ENABLE_AUB_DUMP Signed-off-by: Damien Lespiau Signed-off-by: Ben Widawsky commit 5038b7e4c243b4e9d07db34a33c70adbec044370 Author: Daniel Vetter Date: Fri Oct 18 17:53:05 2013 +0200 lib: fix the assert in igt_stop_helper So much for developing different patches on different machines and then not retesting after rebasing. Reported by Ben on irc. Signed-off-by: Daniel Vetter commit 768e32a3ab5e45cc52558fb544d392729e02f1ae Author: Damien Lespiau Date: Fri Oct 18 14:29:20 2013 +0100 lib: Don't wait for a vblank when enabling the CRCs This was a previous attempt to solve the first CRC being bogus. We know wait for it and discard it at the end of the function. Signed-off-by: Damien Lespiau commit 5e3047ce522ed57dd6d06bd7512d792bcf601855 Author: Damien Lespiau Date: Fri Oct 18 12:27:21 2013 +0100 tests/debugfs_pipe_crc: Test the read CRCs are not null Signed-off-by: Damien Lespiau commit 43f5384c083adb2ae99fb138099130bf450ebd01 Author: Daniel Vetter Date: Thu Oct 17 14:18:35 2013 +0200 tests/debugfs_pipe_crc: test all connectors Diff looks a bit ugly, but it's just due to the added indentation. Signed-off-by: Daniel Vetter commit 070904bf59abb3ce8ff1d3125cdfae606a5472ed Author: Daniel Vetter Date: Thu Oct 17 14:10:43 2013 +0200 tests/debugfs_pipe_crc: test all pipes And skip them if there's no suitable connector. Signed-off-by: Daniel Vetter commit e6ad75c1c4763f649f19c367b041ce7d13dcc789 Author: Daniel Vetter Date: Thu Oct 17 14:09:52 2013 +0200 tests/debugfs_pipe_crc: fix fb leak Also remove the unused connector_t->mode. Signed-off-by: Daniel Vetter commit 173a4cf1da300af4dc3c7c0f2ea085d19e1ce90b Author: Daniel Vetter Date: Wed Oct 16 22:49:24 2013 +0200 tests/debugfs_pipe_crc: fall back to PIPE source With PLANE1 and PIPE CRC sources the test will work on all currently shipping (and planed fwiw) platforms. Also add all the other new sources for non-ivb/hsw chips. Signed-off-by: Daniel Vetter commit 548323c87d2f11384023ae3b064d6eb793d23115 Author: Daniel Vetter Date: Wed Oct 16 19:52:00 2013 +0200 lib/drmtest: Check that helper processes have died correctly If the test gets stopped sometimes a helper process falls over. We need to report this. Since we currently don't track helper process to precisely we can't shut up the 2nd test failure messge. This shouldn't happen anyway. Signed-off-by: Daniel Vetter commit 1cefd198da32d02ba7ae737866569dd56112158c Author: Daniel Vetter Date: Thu Oct 17 10:48:29 2013 +0200 tests/ZZ_missed_irq: Fixup SOURCE_PATH handling Copy the trick from ZZ_hangman of just cd'ing into the old working directory in a subshell. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70561 Signed-off-by: Daniel Vetter commit a12d4a713544ff1ff89ca176d7e94e16944adb56 Author: Ben Widawsky Date: Wed Oct 16 22:01:34 2013 -0700 gem_ctx_bad_exec: skip vebox when appropriate Signed-off-by: Ben Widawsky commit befabe241a0c01dacc230b22a488d06df76bba5e Author: Jani Nikula Date: Tue Oct 8 21:19:06 2013 +0300 README: list some of the dependencies Signed-off-by: Jani Nikula Signed-off-by: Ben Widawsky commit 0412f32670642f88bf6de6afce9179eefe608f13 Author: Daniel Vetter Date: Wed Oct 16 14:12:49 2013 +0200 tests/debugfs_pipe_crc: correctly skip on unsupported platforms Signed-off-by: Daniel Vetter commit 4ba97ddf96136d463e5b584fe997d6de698c0a74 Author: Damien Lespiau Date: Wed Oct 9 11:47:43 2013 +0100 debugfs_pipe_crc: Let's check CRCs! Let's add a new test that sets a mode, wait for a few vblanks (3) and then make sure we read 3 identical CRCs. Some subtests check for various parsing errors. In the process, improve the debugfs helpers to deal with CRCs. Signed-off-by: Damien Lespiau commit f673775fe8a7d9faeaa80f4af9677fecf16e4b17 Author: Damien Lespiau Date: Fri Oct 11 18:31:20 2013 +0100 lib: Add igt_wait_for_vblank() helper Signed-off-by: Damien Lespiau commit d4e7ddf15d69fdb17d25446edcd6c73a684b759b Author: Damien Lespiau Date: Wed Oct 9 23:53:15 2013 +0100 lib: Make igt_debugfs_open() take the mode as argument Signed-off-by: Damien Lespiau commit 952d4b0a9c835d1d2e4e2c1b8727d225c805c8c6 Author: Damien Lespiau Date: Wed Oct 9 17:54:11 2013 +0100 lib: Add a igt_display.h with a few enums and defines from the kernel Signed-off-by: Damien Lespiau commit 252dca1c7b41410e7ff4ab61590a1433a8747e1f Author: Damien Lespiau Date: Wed Oct 9 17:42:52 2013 +0100 lib: Add kmstest_paint_color() Signed-off-by: Damien Lespiau commit 5a97ea91e11a4d2a2cfd46f18e0a69c2f0f279af Author: Damien Lespiau Date: Wed Oct 9 13:42:13 2013 +0100 lib: Add a igt_assert_cmpint() Signed-off-by: Damien Lespiau commit ffa2107abc46bb891ee2e0f2f73944626b9c67a9 Author: Damien Lespiau Date: Wed Oct 9 11:45:31 2013 +0100 lib: Add igt_debugfs_fopen() Signed-off-by: Damien Lespiau commit 51b63e334c5a4271b845d2eba0486c2b4f2bbda0 Author: Damien Lespiau Date: Tue Oct 8 23:39:33 2013 +0100 lib: Add a small helper to open debugfs files Signed-off-by: Damien Lespiau commit 8fed3837c758c13c3d7a767765df2caf792cdd7a Author: Matt Turner Date: Fri Oct 11 17:34:13 2013 -0700 Depend on libdrm_intel >= 2.4.47. Reviewed-by: Ben Widawsky commit cd460f1a2c5c23bacfb6849923f5d4596ebc3fc4 Author: Matt Turner Date: Thu Oct 10 20:54:25 2013 -0700 configure: Don't bail if libdrm_nouveau isn't available. We were seriously *requiring* libdrm_nouveau unless explicitly disabled? Acked-by: Ben Widawsky Reviewed-by: Chad Versace commit d3d371fdf6aab3433ffe4bdf1d7512245aa26335 Author: Daniel Vetter Date: Mon Oct 14 19:10:56 2013 +0200 tests/pc8: Readd verbose error message I deemed them a bit redundant (assuming that developers are the only ones that look at them anyway). But Paulo requested that I readd them for the education of QA. Signed-off-by: Daniel Vetter commit a5d40a9bf27c2a41a981cb6fa168b1e68bfc0b3c Author: Daniel Vetter Date: Fri Oct 11 20:53:40 2013 +0200 tests/kms_flip: fix igt_assert I've blown the conversion in commit 37e5b318c5dac290611099e2eec21df1e49fa71f Author: Daniel Vetter Date: Fri Oct 4 18:42:26 2013 +0200 tests/kms_flip: use igt_assert more Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70332 Signed-off-by: Daniel Vetter commit 98a2b5b01f915c05ef50364494d8092668b94d8c Author: Daniel Vetter Date: Fri Oct 11 20:22:19 2013 +0200 tests/kms_flip: Skip if the kernel doesn't let y-tiled bo slip through Signed-off-by: Daniel Vetter commit 9f3794f5fd6baf613594422b64d4eb050f27b78e Author: Daniel Vetter Date: Fri Oct 11 19:58:43 2013 +0200 tests/kms_flip: exit handler needs a fixture Since it can fail. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70332 Signed-off-by: Daniel Vetter commit ce5becbb616637753e2c7e441c5e019f3864b3f7 Author: Thomas Wood Date: Thu Oct 10 12:23:19 2013 +0100 testdisplay: Allow getopt to print error messages By not assigning opterr, getopt will print its own error message that includes information about whether an option is unknown or just requires an additional argument. Signed-off-by: Thomas Wood commit ffdece38e2b6aec64b0d96e83cd2324c035b1867 Author: Daniel Vetter Date: Thu Oct 10 14:20:43 2013 +0200 tests/gem_suspend: test debugfs/sysfs reads while s/r Just a very quick hack cobbled together with /bin/sh and exec. We can't use system since that does stupid things with singals ... Still we need to whack the child process pretty hard to get rid of it. Signed-off-by: Daniel Vetter commit 8a9b275b96f1ea5637d21e4568647dcb7fed98f2 Author: Daniel Vetter Date: Thu Oct 10 11:22:09 2013 +0200 tests/module_reload: fail if the module didn't unload Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70336 Signed-off-by: Daniel Vetter commit f014878722f7d9371e54e936de668d8a3b8115f1 Author: Ben Widawsky Date: Wed Oct 9 09:07:55 2013 -0700 gem_pin: Use iterator for blit batch setup Signed-off-by: Ben Widawsky commit a7934e26ae206c6558ff3b34af8728ca7ef04fb5 Author: Ben Widawsky Date: Wed Oct 9 08:55:24 2013 -0700 gem_exec_blt: Use iterator for blit batch setup Signed-off-by: Ben Widawsky commit 637162d0f7dee79c08c49d717c295be0b0d4696e Author: Ben Widawsky Date: Wed Oct 9 08:37:48 2013 -0700 gem_evict_*: Use iterator for blit batch Signed-off-by: Ben Widawsky commit aa6fbd18d4f52b2bc9e6bf9c16b9bcd585a1ae6b Author: Ben Widawsky Date: Wed Oct 9 09:07:55 2013 -0700 gem_linear_blits: Use iterator for blit batch setup Signed-off-by: Ben Widawsky commit 4de3b1765e6f76f4e0f40434f5278f0edac0c61e Author: Ben Widawsky Date: Tue Oct 8 17:36:21 2013 -0700 gem_exec_faulting_reloc: use iterator for batchbuffer This will help keep the code clean for new platforms which might have differently sized relocations. Signed-off-by: Ben Widawsky commit 6f8c30d8edf8ee0c57689704e32b949b003bfb02 Author: Daniel Vetter Date: Wed Oct 9 21:20:40 2013 +0200 tests: add kms_addfb Just a bunch of testcase to check that all the addfb sanity checks work as they should. Signed-off-by: Daniel Vetter commit 590f6101402b51bca54f69c002380bda967484ea Author: Daniel Vetter Date: Wed Oct 9 20:50:50 2013 +0200 lib/drmtest: extract rawer __gem_set_tiling For tests that expect failures. Also apply the existing gem_set_tiling helper a bit wider. Signed-off-by: Daniel Vetter commit 40599b077972e1a721fdfcc93455e60b5b564a13 Author: Ben Widawsky Date: Tue Oct 8 19:47:53 2013 -0700 pwrite_pread: Get devid only once Signed-off-by: Ben Widawsky commit a2925b0989463a1d225a3b870a3a0e06fa74ad97 Author: Ben Widawsky Date: Tue Oct 8 19:45:30 2013 -0700 pwrite_pread: Extract batch building Signed-off-by: Ben Widawsky commit 41ae28e498afed2685feaa95ab8bf4ffdd687b62 Author: Ben Widawsky Date: Tue Oct 8 19:41:49 2013 -0700 pwrite_pread: use execbuf.batch_len for size This will make an upcoming change easier. Signed-off-by: Ben Widawsky commit 96f665cabb3038905a8a9839dae025f5156ae80e Author: Ben Widawsky Date: Tue Oct 8 20:32:12 2013 -0700 gem_tiled_blits: Squash bo leak on simulation Signed-off-by: Ben Widawsky commit f75dec0b415c8c319b9aae32cfdbac6144f3e770 Author: Ben Widawsky Date: Tue Oct 8 18:30:13 2013 -0700 gem_tiled_blits: Squash memory leak on simulation Signed-off-by: Ben Widawsky commit 304c458d542a3eee928c0004432aea8f20ca42fb Author: Daniel Vetter Date: Mon Oct 7 22:55:14 2013 +0200 tests/kms_flip: Skip if no clone configuration could be found Signed-off-by: Daniel Vetter commit bc888c2b42ab42d628d9c11181a5ba09df66fdcc Author: Ben Widawsky Date: Sat Oct 5 16:21:11 2013 -0700 configure.ac: require dri2proto for overlay With the introduction of commit f9a50de3dcc501e930de6c60983a4feb57121e7e Author: Chris Wilson Date: Sat Aug 17 11:12:07 2013 +0100 Introduce intel-gpu-overlay dri2proto became a dependency (and there is no way to disable overlay explicitly. The actual version chosen was arbitrarily stolen from mesa. Signed-off-by: Ben Widawsky commit ae599546fadb3b8ebc3114f8ab5b58cffc467952 Author: Daniel Vetter Date: Fri Oct 4 19:55:56 2013 +0200 tests/pc8: Fail harder If the test enviroment isn't properly set up we should fail the testcase, since otherwise there's no way to make sure a feature actually works. To cut down on bug triaging time extract the basic test (which was previously used to skip all subtests) into a "basic" subtest. Also fail the test hard if the msr interface isn't available. And switch all other check in setup_enviroment to igt_require. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=69838 Signed-off-by: Daniel Vetter commit 3dc91f32424191f28d7512014b2871e22b5a05b9 Author: Daniel Vetter Date: Fri Oct 4 19:49:36 2013 +0200 tests/pc8+: Only skip i2c subtest if i2c /dev interface is unavailable Through the magic of igt_skip we only need to fail this subtest, not the entire thing. Signed-off-by: Daniel Vetter commit 37e5b318c5dac290611099e2eec21df1e49fa71f Author: Daniel Vetter Date: Fri Oct 4 18:42:26 2013 +0200 tests/kms_flip: use igt_assert more I've left the time delta checks as-is since those are tricky math and my mind is feeble. Signed-off-by: Daniel Vetter commit 54b5f7251ac8f28338ea59f110f680c3ac8b6c74 Author: Daniel Vetter Date: Fri Oct 4 18:11:37 2013 +0200 tests/kms_flip: check flip count in both directions Signed-off-by: Daniel Vetter commit 47d0a6fa6954a2742a50b988461f48597f960b24 Author: Daniel Vetter Date: Fri Oct 4 11:10:48 2013 +0200 NEWS: Mention gen7 perf counters release This is too great to be omitted! Signed-off-by: Daniel Vetter commit b53f22cee7323df6984f2d34464b51264a92ef2a Author: Chris Wilson Date: Fri Aug 23 12:32:43 2013 +0100 tests: Simulate missed breadcrumb irqs Signed-off-by: Chris Wilson commit 11d5859b28727e1dac9d5b15b3027938a7023067 Author: Kenneth Graunke Date: Tue Apr 2 22:54:08 2013 -0700 intel_perf_counters: Add support for Gen7 platforms. We finally received permission to release this; the counters should be properly documented in the Haswell PRMs. Signed-off-by: Kenneth Graunke commit 16b61932bb1b54a21b67b6c209ba405f5a36f174 Author: Daniel Vetter Date: Thu Oct 3 22:45:53 2013 +0200 tests/kms_flip: use igt_assert in the dpms helpers No need to route the error code around really. Signed-off-by: Daniel Vetter commit 0b19cb5dc2afe55084b946b053c527b9f44a011f Author: Daniel Vetter Date: Thu Oct 3 18:30:56 2013 +0200 tests/kms_flip: Check the dpms confusion Some kernels inadvertedly forwarded dpms changes to crtcs connected to shared encoders even though that specific output wasn't enabled. Hilarity ensued. Note that we only have shared encoders on hsw (DP+HDMI) and with sdvo cards (multi-function encoders). v2: Do a full OFF->ON->OFF transition to make sure something actually happens. Signed-off-by: Daniel Vetter commit a8bf10c9cf5000083b102549a335239bd01d4f2f Author: Daniel Vetter Date: Tue Oct 1 22:20:38 2013 +0200 NEWS: testdisplay now with 3d support! commit 1f0addb689a5707bc3e5a5e36d28fea2745ea352 Author: Daniel Vetter Date: Mon Sep 30 21:38:09 2013 +0200 tests/kms_flip: scale test runtime On machines with many outputs and many crtcs it takes too long. So scale the runtime by the number of output combinations we're trying to light up. Compensate the test runtime a bit by doubling most subtests' duration. Signed-off-by: Daniel Vetter commit 3f89d5403ef85c1f101c0f1026cf9b800bbaaea9 Author: Daniel Vetter Date: Mon Sep 30 21:35:47 2013 +0200 tests/kms_flip: fail harder At least for pipe A/B we should always fail the test if we can't light up the preferred mode - the kernel should filter out impossible modes and for our hw pipe A/B are the least constrained. Signed-off-by: Daniel Vetter commit 6de613f8e5b76435150a74a38f5863f93195b473 Author: Damien Lespiau Date: Mon Sep 30 18:03:33 2013 +0100 testdisplay: Print the stereo mode being tested Signed-off-by: Damien Lespiau commit e836b60d3751475e768a339f29d231509ac1596c Author: Damien Lespiau Date: Mon Sep 30 17:42:33 2013 +0100 testdisplay: Make -o and -3 work together Signed-off-by: Damien Lespiau commit 8393bb41a1717691674809361908050974d71fbf Author: Damien Lespiau Date: Mon Sep 30 17:41:56 2013 +0100 testdisplay: Remove mode resetting now that we don't adjust the timings Signed-off-by: Damien Lespiau commit c128b731dceff48200a9e6e84436a5e726dc4706 Author: Damien Lespiau Date: Mon Sep 30 17:02:21 2013 +0100 testdisplay: Respect specified_disp_id in the stereo loop Signed-off-by: Damien Lespiau commit 28cf66de94962081e7de833166f274807f333f39 Author: Damien Lespiau Date: Mon Sep 30 16:56:29 2013 +0100 testdisplay: Remove printing out the eyes geometry Signed-off-by: Damien Lespiau commit 21a89a9f073a892424428631503c7bbb69c5187f Author: Damien Lespiau Date: Thu Sep 26 18:34:06 2013 +0100 lib: Adjust dump_modes() to the new stereo encoding Signed-off-by: Damien Lespiau commit a7d1937cd777e23bb6f234156e6164aafe151fbe Author: Damien Lespiau Date: Thu Sep 26 17:56:01 2013 +0100 testdisplay: Use DRM_MODE_FLAG_3D_MASK Signed-off-by: Damien Lespiau commit 578c1cefc9c0b80927b69584ef730acd3a1eb2f0 Author: Damien Lespiau Date: Tue Sep 17 18:59:52 2013 +0100 testdisplay: Remove the timing adjustements now that the kernel does it Signed-off-by: Damien Lespiau commit d89f4a2c1a773c0dc33cc7d94d475798fc0fee41 Author: Damien Lespiau Date: Mon Sep 16 17:52:41 2013 +0100 intel_infoframe: Display the VIC in decimal It's not customary to display the VIC in hexadecimal and lead me to scratch my head for a couple of seconds. Print it in decimal instead. Signed-off-by: Damien Lespiau commit 9a8fda7a4aaba11d191ebcd93c2b1ef648703148 Author: Damien Lespiau Date: Mon Sep 10 13:33:26 2012 +0100 testdisplay: Test the stereo 3D modes Now that modes have flags to describe which 3d formats the sink supports, it's time to test them. The new test cycles through the supported 3D formats and paint 3D stereoscopic images taken from publicly available samples: http://www.quantumdata.com/apps/3D/sample_BMP.asp Signed-off-by: Damien Lespiau commit 951b37e2d0d69ef7c013bf3ee7a57f7d6bd15119 Author: Damien Lespiau Date: Fri Sep 6 11:44:41 2013 +0100 testdisplay: Provide a full path when opening pngs This way one doesn't have to be in tests/ for testsdisplay to be able to open pass.png. Signed-off-by: Damien Lespiau commit 5d996349137e368c7ad8a3b2ce708c77c006a2db Author: Damien Lespiau Date: Wed Sep 4 14:21:55 2013 +0100 testdisplay: Free the array of connectors That's an array we allocated earlier in this function. Let's be symetric and free it once done. Signed-off-by: Damien Lespiau commit 66477a230fba36a349783020b77ed4a030f204f5 Author: Damien Lespiau Date: Thu Sep 5 16:49:11 2013 +0100 testdisplay: Untangle dump_info() from the main testing loop -i is just supposed to show some information about the DRM resources. Right now it works in a quite convoluted way. Untangle this to call dump_info() when -i is given, exit the program and be done with it. Signed-off-by: Damien Lespiau commit b9db1a6a96581645e222b6d43bd0cd795c6c7501 Author: Damien Lespiau Date: Wed Sep 4 12:31:18 2013 +0100 testdisplay: Fix CRTS typo Signed-off-by: Damien Lespiau commit eecd0061eb5bf45a3db515fa1cedb1184f98ca44 Author: Damien Lespiau Date: Tue Sep 3 19:46:19 2013 +0100 testdisplay: Properly handle the life cycle of framebuffers When cycling through the modes, let's make sure to free the previous framebuffers. This is the perfect occasion to use kmstest_remove_fb(). Signed-off-by: Damien Lespiau commit 5a1d84300ba31bec08c05db7d1c602c80e932021 Author: Damien Lespiau Date: Wed Sep 4 12:12:37 2013 +0100 testdisplay: Map the fb inside paint_color_key() So the code for this is self-contained. This goes along the way of reducing the number of global variables in testdisplay. Take the opportunity to unmap the fb after use as well. Signed-off-by: Damien Lespiau commit 0396273972076909f92429503232cff1be38e640 Author: Damien Lespiau Date: Tue Sep 3 14:57:31 2013 +0100 testdisplay: Move the code sanitizing depth into main() It'll be shared by the set_mode() and set_3d_mode() functions. Signed-off-by: Damien Lespiau commit 79f4cfedbf8f4249291c0915d040d79af97d1389 Author: Damien Lespiau Date: Fri Sep 6 18:22:53 2013 +0100 lib: Add a helper to write a png from a struct kmstest_fb Signed-off-by: Damien Lespiau commit dac45f5f067136496a76bf755a3df0224a2c3ea4 Author: Damien Lespiau Date: Fri Sep 6 17:26:32 2013 +0100 lib: Split create_image_surface() out of create_cairo_ctx() So we can use it in the next commit. Signed-off-by: Damien Lespiau commit bde7060e3c30eba807295c6831e10d7e4365a33b Author: Damien Lespiau Date: Fri Aug 23 16:46:45 2013 +0100 lib: Add a helper to paint a PNG using cairo Signed-off-by: Damien Lespiau commit 30e0710ca374eb937806ad79e20f53a222cab54a Author: Damien Lespiau Date: Wed Sep 12 14:21:29 2012 +0100 lib: Dump information about the supported 3D stereo formats When dumping the details of a mode, let's add the 3D formats the mode supports. Signed-off-by: Damien Lespiau commit 9edaf7fa7364e03115edd1bc3a1e99a282fce9ce Author: Damien Lespiau Date: Fri Sep 6 15:17:48 2013 +0100 testdisplay: Add left/right images of a lovely scene Signed-off-by: Damien Lespiau commit 05493f736d41dbaa2f6f8b8c1c235d30d2370800 Author: Damien Lespiau Date: Fri Sep 6 15:20:35 2013 +0100 testdisplay: Distribute pass.png commit 76dfa9195a489aa8de954f888895278bdccec3b7 Author: Daniel Vetter Date: Mon Sep 30 16:04:38 2013 +0200 tests/gem_evict_everything: tune down forked subtests On new machines with gobloads of memory and cpu cores, but slow swap on spinning rust we need to limit the runtime a bit for sanity. Signed-off-by: Daniel Vetter commit f3c54d0cb4744af9d58b5be45f574b625bbc8231 Author: Daniel Vetter Date: Wed Sep 25 14:36:59 2013 +0200 tests: use igt_assert/igt_require more With the new _f variants we can replace almost all of them. Also remove a ton of checks for argc != 1, they're a bit useless ... Signed-off-by: Daniel Vetter commit 88ad6d7be8ab5741b7019a535952145c96577c9c Author: Ben Widawsky Date: Mon Sep 23 13:46:06 2013 -0700 intel_l3_parity: Make compilation possible without udev Signed-off-by: Ben Widawsky commit 6020b951dff9584b9cfdb6819bdb1f6b0293db70 Author: Paulo Zanoni Date: Mon Sep 23 16:05:21 2013 -0300 tests/pc8: fix supports_pc8_plus_residencies Bug caused by bad copy+paste+replace. Signed-off-by: Paulo Zanoni commit 4d3e10d2161200e1c6ccf400775716b9899f3c13 Author: Chris Wilson Date: Sun Sep 22 19:00:59 2013 +0100 overlay: Some very raw usage information Signed-off-by: Chris Wilson commit 145c0d1a2697316da5de8441e4cc1847dbf3a28b Author: Daniel Vetter Date: Sun Sep 22 13:15:43 2013 +0200 NEWS: Start with release notes for 1.5 Also extend the underlying for 1.4 to the full lenght ;-) Signed-off-by: Daniel Vetter commit 799aeb6d00881fc8f19b80ddf70f8b2b4c532f28 Author: Ben Widawsky Date: Tue Sep 10 14:21:23 2013 -0700 intel_l3_parity: Support a daemonic mode v2: Add a comment explaining the dangers of directly accessing the DFT register (Daniel) Signed-off-by: Ben Widawsky commit bfa7a5906d53a016b43eaa5592d91c1fb955daf7 Author: Ben Widawsky Date: Tue Sep 10 10:40:54 2013 -0700 intel_l3_parity: Support error injection Haswell added the ability to inject errors which is extremely useful for testing. Add two arguments to the tool to inject, and uninject. Signed-off-by: Ben Widawsky commit 5f95ea780bba6027767b3f3411ce41717317e879 Author: Ben Widawsky Date: Sat Sep 7 20:38:18 2013 -0700 intel_l3_parity: Actually support multiple slices Signed-off-by: Ben Widawsky commit 8ddcfd6882a9afd17daf5399f78f74bfc6ef3d7a Author: Ben Widawsky Date: Sat Sep 7 20:10:27 2013 -0700 intel_l3_parity: slice support Haswell GT3 adds a new slice which is kept distinct from the old register interface. Plumb it into the code, though it's only 1 slice still. Signed-off-by: Ben Widawsky commit 48d1b362c52803f490080be0ee26b43ae5f7dc27 Author: Ben Widawsky Date: Sun Sep 8 16:50:23 2013 -0700 intel_l3_parity: Hardware info argument Add a new command line argument to the tool which will spit out various parameters for the giving hardware. As a result of this, some new defines are added to help with the various info. Signed-off-by: Ben Widawsky commit a9cd76b36e112389c61ccc315df185a2eaf17c01 Author: Ben Widawsky Date: Fri Sep 6 21:10:50 2013 -0700 intel_l3_parity: Use getopt for the l3 parity tool Add new command line arguments in addition to supporting the old features. This patch only introduces one feature, the -e argument to enable a specific row/bank/subbank. Previously you could only enable all. Otherwise, it has what you expect (we prefer -r -b -s for specifying the row/bank/subbank). Signed-off-by: Ben Widawsky commit e740bdf5bd1339b58912eb359902ca68529b438d Author: Ben Widawsky Date: Fri Sep 6 11:40:03 2013 -0700 intel_l3_parity: Assert all GEN7+ support v2: Don't assert for Valleyview (Bryan) Rework code to be a bit more readable. CC: "Bell, Bryan J" Signed-off-by: Ben Widawsky commit 318c0b22d7756d2ae33328935c2f15cd790f6b01 Author: Ben Widawsky Date: Tue Sep 10 15:34:54 2013 -0700 intel_l3_parity: Fix indentation Signed-off-by: Ben Widawsky commit 64cfe4eefe9b91ad648df216ba385d9a1e67dd78 Author: Daniel Vetter Date: Thu Sep 19 19:56:03 2013 +0200 lib/drmtest: Improve printf-like igt_skip_on/require Ben Widawsky suggested to use vasprintf, which perfectly fits the bill. Also fix the logic conversion bug in tests/gem_storedw_batches_loop that crept in again :( Signed-off-by: Daniel Vetter commit e5cdd62624342180a16630b4f6b1d604f6e6e581 Author: Daniel Vetter Date: Thu Sep 19 16:37:07 2013 +0200 lib/drmtest: igt_assert|require with format strings v2: Add a comment about the pitfalls around va_list handling. Signed-off-by: Daniel Vetter commit b3525129535c6e8e3588f63960e2296d598f6e9a Author: Daniel Vetter Date: Thu Sep 19 15:51:33 2013 +0200 tests/gem_stored_batches_loop: use igt_assert more Terser code ftw! Signed-off-by: Daniel Vetter commit 867b1a51a6310d63f34acc8ffe602355694da7ee Author: Daniel Vetter Date: Thu Sep 19 11:01:14 2013 +0200 tests/gem_reloc_overflow: New subtest for overflowing buffer_count Luckily everything seems to be fine. Signed-off-by: Daniel Vetter commit bf6f166035bdd85042c2d6dee0e0b088e122ae81 Author: Daniel Vetter Date: Thu Sep 19 10:20:46 2013 +0200 tests/gem_reloc_overflow: Extract reloc_tests I'll be adding more stuff soon ;-) Signed-off-by: Daniel Vetter commit 0a587e24b77707099a21d6ad00cbfd19a4661b8b Author: Daniel Vetter Date: Wed Sep 18 18:28:18 2013 +0200 tests/gem_storedw_batches_loop: Add testcase to check secure dispatch v2: Use the mrb_exec function since otherwise we can't pass flags. Signed-off-by: Daniel Vetter commit 195f04c3008c079c8edb762a8907903c264da83c Author: Daniel Vetter Date: Mon Sep 16 22:45:14 2013 +0200 tests/gem_persistent_relocs: Tune down the test a bit Takes too long. Signed-off-by: Daniel Vetter commit 31139f6b8fc2d5f0c1623de1cbaf24f8a3d5473d Author: Daniel Vetter Date: Thu Sep 12 16:18:10 2013 +0200 tests/gem_fenced_exec_thrash: Add interruptible and busy-load subtests Usual progression for gem tests up the nasty-scale. Signed-off-by: Daniel Vetter commit d1b9bc0dc17dbc49d707abf861d31020fbcb5ff6 Author: Daniel Vetter Date: Thu Sep 12 16:17:33 2013 +0200 lib/drmtest: check that igt_exit is called for subtest tests I get this wrong for almost every conversion to subtests ... v2: Don't install the check when just listing subtest names. Signed-off-by: Daniel Vetter commit 7b3634364a1f5cf1797a55a1d0d042ec8d9f510c Author: Daniel Vetter Date: Thu Sep 12 14:38:13 2013 +0200 tests/gem_fenced_exec_thrash: New subtests that uses all fences igt runs under the assumption that nothing else (besides maybe fbcon) is using the gpu. So we should be able to use all fences. Keep the conservative testcase around though in case someone has a broken setup. Signed-off-by: Daniel Vetter commit 14e12b80085db3ab9d9035ce962b5679fe862570 Author: Daniel Vetter Date: Thu Sep 12 14:21:56 2013 +0200 tests/*: scrap get_num_fences Just use gem_available_fences directly. Signed-off-by: Daniel Vetter commit deba86806670e28bfd8110ef5b6e05ab818b1935 Author: Mengdong Lin Date: Mon Sep 9 15:38:40 2013 -0400 intel_audio_dump/hsw: rename some audio configuration registers for Haswell For Haswell, some audio configuration registers have changed their name and some bit definitions. This patch applies the changes, and uses subfunctions to parse registers for code reuse. Here is the name change list: Audio configuration: AUD_CONFIG_x to AUD_TCx_CONFIG Audio Misc Control: AUD_MISC_CTRL_x to AUD_Cn_MISC_CTRL Audio M & CTS programming enable: AUD_CTS_ENABLE_x to AUD_TCx_M_CTS_ENABLE Audio EDID data block: AUD_HDMIW_HDMIEDID_x to AUD_TCx_EDID_DATA Audio Widget Data Island Packet: AUD_HDMIW_INFOFR_x to AUD_TCx_AUD_INFOFR Audio Pipe and Converter Configs: AUD_PORT_EN_HD_CFG to AUD_PIPE_CONV_CFG Audio Digital Converter: AUD_OUT_DIG_CNVT_x to AUD_Cn_DIG_CNVT Audio Stream Descriptor Format: AUD_OUT_STR_DESC_x to AUD_Cn_STR_DESC Audio Connect List Entry & Length: AUD_PINW_CONNLNG_LIST_x to AUD_TCx_PIN_PIPE_CONN_ENTRY_LNGTH Audio Connection Select Control: AUD_PINW_CONNLNG_SEL to AUD_PIPE_CONN_SEL_CTRL Audio DIP & ELD Control State: AUD_DIP_ELD_CTRL_ST_x to AUD_TCx_DIP_ELD_CTRL_ST Audio HDMI FIFO status: AUD_HDMIW_STATUS to AUD_HDMI_FIFO_STATUS NOTE: For Tx, x = A/B/C, meaning Transcoder A/B/C. For Cn, n = 1/2/3, meaning audio converter 1/2/3. Signed-off-by: Mengdong Lin Reviewed-by: Haihao Xiang Signed-off-by: Ben Widawsky commit 3c7dc5cf32ad50cf3d8b691c921064a419917fc8 Author: Mengdong Lin Date: Mon Sep 9 15:38:32 2013 -0400 intel_audio_dump/hsw: align code with tab This patch makes the file to follow kernel coding style: - replace leading spaces with tabs for alignment - fix some minor format issues But the max length of a line is set to 120 characters for readability on high resolution displays. Signed-off-by: Mengdong Lin Reviewed-by: Haihao Xiang Signed-off-by: Ben Widawsky commit cac586586ddcf9fa1679c35236cd0674237f3d37 Author: Mengdong Lin Date: Mon Sep 9 15:38:20 2013 -0400 intel_audio_dump/hsw: remove misuse of PCH transcoder configuration register The PCH transcoder config register (PCH_TRANS_CONF, 0xf0008) is not the correct config register for transcoder A, B or C. This register is in PCH and for CRT display, nothing to do with display audio. So This patch removes misuse of it as config register for transcoder A/B/C. Signed-off-by: Mengdong Lin Reviewed-by: Haihao Xiang Signed-off-by: Ben Widawsky commit be28ba071baf33afa1852ed0fd9b4efee699cdbd Author: Rodrigo Vivi Date: Mon Sep 16 16:37:08 2013 -0300 bump version to 1.4 and add the release date Signed-off-by: Rodrigo Vivi commit a33d5576232bf7caf14c848828d632c3da886ee1 Author: Rodrigo Vivi Date: Fri Sep 13 16:54:56 2013 -0300 NEWS: Fix dates of previous releases Signed-off-by: Rodrigo Vivi commit 564a1dd99355ee0c626e43e4d547730c93b640c6 Author: Rodrigo Vivi Date: Mon Sep 16 15:34:27 2013 -0300 overlay: fix link error due to missing -lrt CC: Damien Lespiau Signed-off-by: Rodrigo Vivi commit a031a1bf93b828585e7147f06145fc5030814547 Author: Daniel Vetter Date: Fri Sep 13 16:43:22 2013 +0200 lib/drmtest: ducttape over fork race Whatever the reason (and I've thought there isn't one) if we fork and kill right away the child seems to not reliably die. We can work around this little race by forcing the default SIGQUIT handler. This should break anything since we reset our atexit handling anyway, so if the helper needs any atexit handling the special signal helpers will be reinstated. Note that inserting sufficient amounts of printf between the fork and kill makes this unnecessary. While add it also add the retry loop for the waitpid call, in case there's another guy constantly interrupting us. Signed-off-by: Daniel Vetter commit 9298dfabd9658315df34616b1e9a10b3579a92bd Author: Daniel Vetter Date: Fri Sep 13 16:38:59 2013 +0200 lib: add test for igt_fork_signal_helper If we're really fast we've trying to stop the signal helper again we somehow race somewhere and it'll never happen. So add a testcase for this. Since I expect more to come for testsuite tests add a separate make target for them. Run tests with $ make check Signed-off-by: Daniel Vetter commit 32f9c497957cf165a359d8b2c11f4d18dd5f743a Author: Chris Wilson Date: Fri Sep 13 16:28:15 2013 +0100 NEWS: smelling fixes commit 35ee50769e5ae24189ae353c2f719191dcf049ce Author: Daniel Vetter Date: Fri Sep 13 17:02:07 2013 +0200 initial release notes for the next release Please amend/improve. Signed-off-by: Daniel Vetter commit 030c9c0f917155555bd09ff268c5defda6e94982 Author: Daniel Vetter Date: Fri Sep 13 17:01:38 2013 +0200 reconstruct NEWS file for the releases thus far Signed-off-by: Daniel Vetter commit 25dfea28a574988fa60278396433b65014ada809 Author: Damien Lespiau Date: Fri Sep 13 16:00:05 2013 +0100 overlay: Fix stale mention to x11-position.c Signed-off-by: Damien Lespiau commit 3fda0b6714ae503e365ae6f130ae7b4074881b70 Author: Eero Tamminen Date: Fri Sep 13 15:32:43 2013 +0100 man: Fixes typo in intel_lid.man Signed-off-by: Eero Tamminen Signed-off-by: Damien Lespiau commit 932716dd918a25ee49a4c8a9931a9a65dfd60486 Author: Daniel Vetter Date: Thu Sep 12 14:00:09 2013 +0200 lib/drmtest: skip suspend tests in simulation The simulator doesn't like this nor really support it :( v2: We've tried to a more gentle resume testing using the pm_test infrastructure, but that alos failed. So add a FIXME comment that we need to improve things a bit here. Cc: Ben Widawsky Cc: Ville Syrjälä Cc: Damien Lespiau Signed-off-by: Daniel Vetter commit 506ef293abfc83a79ae1e58193ee88bce5c667ce Author: Daniel Vetter Date: Thu Sep 12 12:56:20 2013 +0200 lib/drmtest: drop unused oldsig variabel Signed-off-by: Daniel Vetter commit 212de08d0fd679069886d673fb719582f597503c Author: Daniel Vetter Date: Wed Sep 11 15:46:43 2013 +0200 lib/drmtest: Restore default sighandlers Forked tests ended up restoring the sighandlers already inherited from the parent, resulting in endless signal loops through our atexit handler. Signed-off-by: Daniel Vetter commit 661f252f7e3ccb8fe936f2582d234408b8bb4764 Author: Daniel Vetter Date: Wed Sep 11 15:05:20 2013 +0200 lib/drmtest: don't frob signals in __igt_fork_helper We shut up the exit handlers already by clearing the array. Signed-off-by: Daniel Vetter commit 9fb316a6db16cd8cddba719d7acbdf068f9238ee Author: Daniel Vetter Date: Wed Sep 11 14:29:00 2013 +0200 lib/drmtest: clean up children in an exit handler Also be a bit more careful with killing them in general. Signed-off-by: Daniel Vetter commit 1978aecf1d22f21265d64099e70565d6e5e384cc Author: Daniel Vetter Date: Wed Sep 11 14:03:47 2013 +0200 tests/gem_persisten_relocs: Update like gem_reloc_vs_pug Signed-off-by: Daniel Vetter commit 5dc424f70d34add563ed86875d6167ab16a7a764 Author: Daniel Vetter Date: Wed Sep 11 13:59:18 2013 +0200 tests/gem_reloc_vs_gpu: some fixes - Clear the igt_helper_process struct to avoid hitting asserts. - Fix up the logic for enumerating forked processes. Signed-off-by: Daniel Vetter commit bbc820302b49d3cdd0f05f2c2be3af63718e0fc1 Author: Daniel Vetter Date: Wed Sep 11 12:11:54 2013 +0200 lib/drmtest: handle SIGBUS in the exit handlers Our kernel likes to occasionally kill process with a SIGBUS when this shouldn't ever happen. Hence also handle this signal in the exit handler infrastructure. Signed-off-by: Daniel Vetter commit 14dd7cb8aa86d51b093c8cffa40df420c342c89a Author: Daniel Vetter Date: Wed Sep 11 11:51:40 2013 +0200 lib/drmtest: Reject igt_fork from within igt_fork earlier We reject it in igt_waitchildren already, but earlier is better. Signed-off-by: Daniel Vetter commit 5f790db084ca32de79a097c29cb4fa41dcc4cb43 Author: Daniel Vetter Date: Wed Sep 11 11:09:08 2013 +0200 lib/drmtest: Fix igt_stop_signal_helper for subtest listing We need to bail out early for otherwise we'll hit the !signal_helper->running assert. Signed-off-by: Daniel Vetter commit b3a61c802872b4219699616f64dfcb572971afdd Author: Daniel Vetter Date: Wed Sep 11 10:47:07 2013 +0200 lib/drmtest: skip when prefault control isn't available Instead of crashing with an igt_assert. Fixes the only crashing test when running igt on non-intel systems. Signed-off-by: Daniel Vetter commit 2b218f69d7e2892ed1a2a2b3bc9663c35acee288 Author: Daniel Vetter Date: Wed Sep 11 10:40:25 2013 +0200 lib/drmtest: Use ARRAY_SIZE Less fragile ... Signed-off-by: Daniel Vetter commit 57e67461812eb3a1c123e590b0cf08b885417732 Author: Daniel Vetter Date: Tue Sep 10 17:41:49 2013 +0200 lib/drmtest: double-check that we clean up helper processes Signed-off-by: Daniel Vetter commit e73c1a07f3e573a2c46be73c139b0757dc8c4add Author: Daniel Vetter Date: Tue Sep 10 15:44:37 2013 +0200 lib/drmtest: consolidate the helper process killing in one exit handler Signed-off-by: Daniel Vetter commit 7c25e8cff15587712ce92f16b61b154080744fe4 Author: Daniel Vetter Date: Tue Sep 10 15:29:17 2013 +0200 tests/gem_reloc_vs_gpu: use igt_fork_helper Now we do a waitpid instead of a simple wait which could eat the "wrong" child ... Signed-off-by: Daniel Vetter commit edd723457c5b3488a26167087f8b3b3045944804 Author: Daniel Vetter Date: Tue Sep 10 15:46:08 2013 +0200 lib/drmtest: create helpers for forking helper threads The upshot is that we can share the logic to make sure the helpers are all properly stoved again in a 2nd step. Signed-off-by: Daniel Vetter commit 2096649053cf720258d66095af0c54453727e841 Author: Daniel Vetter Date: Sun Sep 8 14:03:20 2013 +0200 lib/drmtest: fixup for the prefault rework Signed-off-by: Daniel Vetter commit fbd64de6be923e339675667525fcd1a294d9b172 Author: Daniel Vetter Date: Sun Sep 8 14:03:03 2013 +0200 lib/drmtest: Avoid calling exit handlers multiple times - reset the count when forking - don't add the same handler multiple times - don't restore the exit signal handlers in the forked helper process - reset the exit handler count once called to make sure we don't call it multiple times when dying - don't wait for the signal helper if it's gone already Signed-off-by: Daniel Vetter commit b3dadedd2e899a8e3dd916aa8b0df6481e724d5a Author: Daniel Vetter Date: Wed Sep 4 15:25:03 2013 +0200 tests/gem_reloc_overflow: Add more checks For reloc offsets and batch start/len. Doesn't quite fit into the test subject at hand here, but meh. Signed-off-by: Daniel Vetter commit 44d4a3defbbee770de3a1c07d479ad8f50fb2b8f Author: Daniel Vetter Date: Wed Sep 4 14:43:06 2013 +0200 tests/gem_reloc_overflow: convert to subtests More will come! Signed-off-by: Daniel Vetter commit 3c46789c8d74c0a1c7c071949dceec0b4ac8d8b4 Author: Daniel Vetter Date: Wed Sep 4 14:27:17 2013 +0200 tests/gem_exec_bad_domains: enable conflicting write domains test Signed-off-by: Daniel Vetter commit 4f496bafea81f24a3ae81179df7abaff648f0654 Author: Imre Deak Date: Wed Sep 4 17:02:19 2013 +0300 lib: fix the fix for gen5 workaround emmision Fix the regression introduced in commit bfbe813f8fb587017c4e1d73c51395c2837eb395 Author: Daniel Vetter Date: Tue May 29 22:14:06 2012 +0200 lib: fix gen5 workaround emission Signed-off-by: Imre Deak commit caf4608809012766c1db62865b39829cbe2c0c1d Author: Imre Deak Date: Wed Sep 4 17:06:00 2013 +0300 lib/intel_batchbuffer: remove code w/o effect Introduced when refactoring the patch in commit c1ee0bb53269ded7b79966d081518d689639bac7 Author: Imre Deak Date: Mon Jul 29 16:43:31 2013 +0300 intel_batchbuffer: add support for non-32bit blt copies No functional change. Signed-off-by: Imre Deak commit 52221651ab2bd2994a9e1d97f717ade432430c91 Author: Daniel Vetter Date: Wed Sep 4 14:08:10 2013 +0200 tests/gem_pipe_control_store_loop: Add subtest for reused buffers This exercises the slightly faulty kernel w/a that Eric fixed in commit e844b990b1df9242bb91b7d490552f3198946838 Author: Eric Anholt Date: Tue Jul 31 15:35:01 2012 -0700 drm/i915: Don't forget to apply SNB PIPE_CONTROL GTT workaround. If a buffer that was the target of a PIPE_CONTROL from userland was a reused one that hadn't been evicted which had not previously had this workaround applied, then the early return for a correct presumed_offset in this function meant we would not bind it into the GTT and the write would land somewhere else. Fixes reproducible failures with GL_EXT_timer_query usage in apitrace, and I also expect it to fix the intermittent OQ issues on snb that danvet's been working on. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=48019 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=52932 Signed-off-by: Eric Anholt Reviewed-by: Chris Wilson Reviewed-by: Carl Worth Tested-by: Carl Worth Signed-off-by: Daniel Vetter Signed-off-by: Daniel Vetter commit 0550092c9a6440536c6070cdc447ed83f3062896 Author: Daniel Vetter Date: Wed Sep 4 13:25:28 2013 +0200 tests: add missing igt_exit() calls Forgotten while converting to subtests, then copy&pasted. Signed-off-by: Daniel Vetter commit 5113df7891e7ca323bd74449b7d649d5bd0b80a9 Author: Daniel Vetter Date: Wed Sep 4 13:19:42 2013 +0200 lib/drmtest: add igt_skip_on macro I've fumbled the logic inversion when converting to igt_require way too often, so lets add something for dummies like me ;-) Signed-off-by: Daniel Vetter commit 1f9d201be404fc277680d416d11f0d2d0d97f2cb Author: Daniel Vetter Date: Wed Sep 4 10:36:28 2013 +0200 tests: Update .gitignore Signed-off-by: Daniel Vetter commit 87c690f9e27237d62d0f7b397aa6b284d1acab62 Author: Daniel Vetter Date: Tue Sep 3 15:30:02 2013 +0200 tests: add gem_persisten_relocs This reproduces the 3.7 relocation regression ... Signed-off-by: Daniel Vetter commit 612252f3f9aaa67848f3f74b8a7237eb1fa72159 Author: Ben Widawsky Date: Sun Sep 1 12:34:36 2013 -0700 intel_gtt: Raw PTE dumper mode ./tools/intel_gtt -d | head GTT offset | PTEs -------------------------------------------------------- 0x000000 | 0xe4005015 0xe2854015 0xe283e015 0xe283f015 0x004000 | 0xe28ba015 0xe28bb015 0xe28b6015 0xe28b7015 0x008000 | 0xe2828015 0xe2829015 0xe282a015 0xe282b015 0x00c000 | 0xe2928015 0xe2929015 0xe292a015 0xe292b015 0x010000 | 0xe2918015 0xe2919015 0xe291a015 0xe291b015 0x014000 | 0xe291c015 0xe291d015 0xe291e015 0xe291f015 0x018000 | 0xe2920015 0xe2921015 0xe2922015 0xe2923015 0x01c000 | 0xe2924015 0xe2925015 0xe2926015 0xe2927015 Signed-off-by: Ben Widawsky commit c6f9bdc66f9ed82c82c1e77bb8bbadc250648c6e Author: Ben Widawsky Date: Sun Sep 1 12:17:23 2013 -0700 intel_gtt: Properly support gen6+ GTT PTEs This finishes the objective in the last patch which was to actually deal with physical addresses, and not the PTEs. GEN6+ Provided support for physical addresses above 4GB. I'm not actually sure what Ironlake supported, and don't feel like firing up the timemachine. v2: Add support for gen4, gen5, and haswell. Signed-off-by: Ben Widawsky commit 8adfb5886dd1128fc8c8c70c79fffbc62b0a7975 Author: Ben Widawsky Date: Sun Sep 1 11:49:12 2013 -0700 intel_gtt: Use function to get the physical address The GTT PTEs that the tool is trying to compare is really about addresses, and not the PTE itself. To accomplish this, make which calculates the physical address we actually want. This commit itself doesn't change any functionality; just the wording in the code. Signed-off-by: Ben Widawsky commit a3276e9713a7014bfcd84f29fea4dceb5670f488 Author: Ben Widawsky Date: Sun Sep 1 11:47:57 2013 -0700 gem_vmap_blits: Demote warning to note The warning that vmap isn't supported is useful, but it shouldn't get in the way of developers (or distros) being able to use -Werror. Cc: Chris Wilson Signed-off-by: Ben Widawsky commit c42f344b781fef9e8839d439dfa63d7aa76d65ca Author: Ben Widawsky Date: Sun Sep 1 11:47:11 2013 -0700 intel_reg_dumper: Silence GCC for uninitialized clock GCC 4.8.1 seems to think clock may be uninitialized. Signed-off-by: Ben Widawsky commit 7db283f930b2e03f019bb23689d2c12daff8104c Author: Daniel Vetter Date: Tue Sep 3 17:49:02 2013 +0200 tests/gem_reloc_vs_gpu: add thrashing tests Using the i915_gem_drop_caches debugfs interface to thrash without really thrashing. Signed-off-by: Daniel Vetter commit 2c7166eb7a60a87477be762d45aaafafb15aceff Author: Daniel Vetter Date: Tue Sep 3 11:57:56 2013 +0200 tests/gem_reloc_vs_gpu: add forked versions Signed-off-by: Daniel Vetter commit f4b93781be0032b4d99097d71b305638c8eb03e2 Author: Daniel Vetter Date: Tue Sep 3 12:22:09 2013 +0200 lib/drmtest: use igt_require/assert in the prefault helpers commit e45b7d9474da7b771f941d4729a435b49ef8529d Author: Daniel Vetter Date: Tue Sep 3 10:59:13 2013 +0200 tests/gem_reloc_vs_gpu: Add faulting reloc tests Signed-off-by: Daniel Vetter commit 225a91bc54050d05450e3481d0fcab24d56f94fc Author: Daniel Vetter Date: Tue Sep 3 10:38:29 2013 +0200 lib/drmtest: include sys/mman.h from drmtest.h We need it for mmapping to get at PROT_READ|WRITE anyway. Signed-off-by: Daniel Vetter commit 9cc16e8afd0269d6f94107b2044240e45334e64d Author: Daniel Vetter Date: Tue Sep 3 10:37:14 2013 +0200 lib/drmtest: extract gem_execbuf helper Signed-off-by: Daniel Vetter commit bd59d60275e8d7cce2ae4370cf8f8304abdc52fc Author: Daniel Vetter Date: Tue Sep 3 08:57:42 2013 +0200 tests/gem_reloc_vs_gpu: add interruptible version Exercise a bug where we've failed to propagate the error code correctly. Signed-off-by: Daniel Vetter commit 472c9dac034479fe5c740a33022fbb19e4dbe381 Author: Chris Wilson Date: Mon Sep 2 13:50:56 2013 +0100 kms_flip: Fix use of fb_width for PAN subtests We need to be careful to remember that fb-width is not always the same as hdisplay, since for panning we allocate a larger framebuffer. So fix up the printfs to use hdisplay/vsisplay since that should be uniform across the array. Regression from commit 919d68901187fa797a9b648fcf87c838fae22fa3 Author: Chris Wilson Date: Thu Aug 29 15:33:53 2013 +0100 kms_flips: Operate on an array of crtc Buzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68832 Signed-off-by: Chris Wilson commit 6f118bf96a4d7236f8324dd53cf0c85390605bb0 Author: Daniel Vetter Date: Mon Sep 2 08:08:29 2013 +0200 lib/drmtest: Improve output when igt_waitchildren fails Signed-off-by: Daniel Vetter commit 8eaa0982d02e13d7d8d1e1a4601bbeb8adb531ae Author: Daniel Vetter Date: Mon Sep 2 08:04:19 2013 +0200 test/gem_concurrent_blt: remove hack for testing igt_fork Oops, this shouldn't have been committed ... Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68830 Signed-off-by: Daniel Vetter commit 859159a2725dde4175ec75062fbdeba1d1e1c82e Author: Daniel Vetter Date: Mon Sep 2 07:51:24 2013 +0200 tests/gem_tiled_swapping: fix igt_require conversion I seem to be incompetent at logic ... Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68831 Signed-off-by: Daniel Vetter commit f73724c3628b61c41642837a709ac8427d699b99 Author: Daniel Vetter Date: Fri Aug 30 08:15:32 2013 +0200 tests/gem_mmap_gtt: fix access checks Reading manpages advisable ;-) Signed-off-by: Daniel Vetter commit 694bd81ed6a90e31af311da114e206a3b3d3bc1a Author: Daniel Vetter Date: Fri Aug 30 08:13:05 2013 +0200 tests/gem_mmap_gtt: clarify access check checks a bit Signed-off-by: Daniel Vetter commit a0aa8f1a2c927090d8e505565bcab035d605b711 Author: Daniel Vetter Date: Thu Aug 29 21:44:48 2013 +0200 lib/drmtest: Print info when children died due to signals Signed-off-by: Daniel Vetter commit 8f5d54162086d9832bcd574af155e86a1a4d743f Author: Daniel Vetter Date: Thu Aug 29 21:44:28 2013 +0200 tests/gem_evict_everything: add swapping and forked subtests Much better at hitting the list corruption here on my machines than what we have thus far. Note that somehow I just can't reproduce the bug any more. No idea why. But I guess it's time to simply push this pile out. v2: Limit threads and rounds to something reasonable. v3: Use igt_permute_array to avoid EINVAL due to duplicated bo. v4: - Add a variant of the forked tests with multiple drm fds. - Tune the swapped forked tests a bit to complete in a reasonable amount of time. v5: Add some memory pressure from the cpu by using cpu mmaps (which directly hit shmem, so bypass gem completely). Signed-off-by: Daniel Vetter commit 5fe116e913192d092d3d73872484a2136217d6f1 Author: Daniel Vetter Date: Thu Aug 29 15:15:56 2013 +0200 tests/gem_evict_*: Fix leak in copy This turned out to be the reason one one of my tests was hitting the list corruption bug - we need a good deal more memory pressure. So I'll now add a new testcase for that. Signed-off-by: Daniel Vetter commit fa06b0bce3f45321f88f769d090af6c3a56eab9a Author: Daniel Vetter Date: Thu Aug 29 14:01:34 2013 +0200 tests/gem_tiled_swapping: Use igt_require Signed-off-by: Daniel Vetter commit cd1f220847c34610ab9e07c3cf1c5a7e77284eb8 Author: Daniel Vetter Date: Thu Aug 29 10:06:51 2013 +0200 lib/drmtest: extract igt_fork from gem_concurrent_blt Making sure that we correctly collect the exit codes from all children is a bit a hassle. So add another magic igt codeblock for easy forking and joining. Note that children are (currently at least) not allowed to call igt_skip. Add an assert to enforce this. v2: - Properly propagate the exit code. - Fix the segfault. - Add a child int and num_children paramter to the magic codeblock as suggested by Chris Wilson. - Don't dump noise into stdout when a child thread fails, the parent will do that for us already. v3: Now with some docs. v4: Fixup igt_waitchildren to properly reset state so it can be used again. Signed-off-by: Daniel Vetter commit 90a25055e3ec7d9779663bec9cbae93187671bfd Author: Chris Wilson Date: Thu Aug 29 18:03:07 2013 +0100 kms_flip: Remove debugging leftovers Signed-off-by: Chris Wilson commit a60f9300181496e5539f6914c9074e6d1aed0fe3 Author: Chris Wilson Date: Thu Aug 29 17:55:13 2013 +0100 kms_flip: Set everything to zero to disable a CRTC Just setting fb=0 is not enough as the kernel thinks userspace is insane. Signed-off-by: Chris Wilson commit 93550043ca80caf7f754ae89825b1f618430b29d Author: Chris Wilson Date: Thu Aug 29 17:21:59 2013 +0100 kms_flip: Use the first mode if we find no matching modes for the crtc pair We will check that we can set the mode on both crtcs before use, so hopefully this will work... Signed-off-by: Chris Wilson commit 865b7821e37dbca4cc0c2ff6f91236c09e91b26b Author: Chris Wilson Date: Thu Aug 29 16:43:18 2013 +0100 kms_flip: Hook up primary events for page-flips Signed-off-by: Chris Wilson commit 1f2b3e99f9349dbc34750d506312b6eb353c14a4 Author: Chris Wilson Date: Thu Aug 29 16:00:51 2013 +0100 kms_flip: Run on pairs of connected outputs. The goal is to flip the same framebuffer on a pair of CRTCs (clone mode) and check that (a) the flip works in all combinations of workloads, and (b) that we can hit the desired refresh rate under the simplest, most ideal of conditions. Signed-off-by: Chris Wilson commit 919d68901187fa797a9b648fcf87c838fae22fa3 Author: Chris Wilson Date: Thu Aug 29 15:33:53 2013 +0100 kms_flips: Operate on an array of crtc This should be no functional change as we operate on an array of crtc[1]. Later we shall test clone mode across a number of crtc. Signed-off-by: Chris Wilson commit d0ed91210795e75847b3a3da6b48b1179ff53ede Author: Chris Wilson Date: Thu Aug 29 15:11:47 2013 +0100 kms_flip: Exercise flip-vs-render For machine with split BCS/RCS rings, we also need to test whether we correctly wait upon outstanding render work before flipping and changing modes. This should also serve to exercise the ring selection code for flips. Signed-off-by: Chris Wilson commit 59f134450d25ba5a3cdf2dbf945e3fb06322874b Author: Chris Wilson Date: Thu Aug 29 13:33:21 2013 +0100 overlay: Increase idle timeout to 30s Signed-off-by: Chris Wilson commit 2b961d9573ae227b65db7f7c39e312969644af84 Author: Chris Wilson Date: Thu Aug 29 13:31:24 2013 +0100 overlay: Hide idle processes Signed-off-by: Chris Wilson commit 2f297ed2b773a5c96fa256d3b976b9cd4d04cc80 Author: Chris Wilson Date: Thu Aug 29 13:19:29 2013 +0100 overlay: Autohide Flip counter after a period of inactivity Signed-off-by: Chris Wilson commit 474ce5396e3dc5a3f057da84cb70a642c0ac90d6 Author: Chris Wilson Date: Thu Aug 29 12:01:38 2013 +0100 overlay: Monitor per-ring context switch rate Signed-off-by: Chris Wilson commit 75ef36713a75bc46faf5b92a4442869ef6999c3a Author: Chris Wilson Date: Wed Aug 28 12:40:20 2013 +0100 overlay: Make it easier to renice Signed-off-by: Chris Wilson commit 9bebbbc49b2f828adea3cffb58907fb493813803 Author: Chris Wilson Date: Wed Aug 28 12:37:14 2013 +0100 overlay: Generate unique name for snapshots Since we no longer increment the counter every frame, we need to use a timestamp instead. Signed-off-by: Chris Wilson commit a18023f67864841fbeee6c93e9c504768e652281 Author: Chris Wilson Date: Tue Aug 27 23:51:32 2013 +0100 overlay: Add number of running processes to CPU display Signed-off-by: Chris Wilson commit 11567e318e6a05936bab135e6ed90726583ab031 Author: Chris Wilson Date: Tue Aug 27 17:51:11 2013 +0100 overlay: Include the core count in the cpu info line Signed-off-by: Chris Wilson commit c6b26c5a406225868f05672949bcc4997c94c3ab Author: Chris Wilson Date: Tue Aug 27 17:40:45 2013 +0100 overlay: Scale the CPU busy value by the numer of active cores Having 100% always mean one processor fully utilised is much easier to understand (than having to remember how many cores are on each machine and scale appropriately). Signed-off-by: Chris Wilson commit 177208b0d4cf64a3e2f18909a47afc5bd646a651 Author: Chris Wilson Date: Tue Aug 27 17:35:51 2013 +0100 overlay: Tidy presentation of ring busy values Signed-off-by: Chris Wilson commit b1d2a78a5db34e835a323364328263f5f4c605ce Author: Chris Wilson Date: Tue Aug 27 15:42:48 2013 +0100 overlay: Restore the correct default font size Signed-off-by: Chris Wilson commit 65d2481900c619846eddadb85086edbc578d6c17 Author: Chris Wilson Date: Tue Aug 27 15:19:58 2013 +0100 overlay: read rc6 status from perf Signed-off-by: Chris Wilson commit ddcd1b2ee5645475725a8e2f78917fa3e7d57c1b Author: Chris Wilson Date: Tue Aug 27 14:25:38 2013 +0100 overlay: Add support for multi-monitor positioning Signed-off-by: Chris Wilson commit 87b66f4cf034c2e058f69d848763bb4bdc45bfbf Author: Chris Wilson Date: Tue Aug 27 13:32:26 2013 +0100 overlay: Set the text color in case we do not have RC6 Signed-off-by: Chris Wilson commit 396fa1b3f52936f5b491e54aff658b272231b22f Author: Chris Wilson Date: Tue Aug 27 12:54:37 2013 +0100 overlay: improve alignment of some labels Signed-off-by: Chris Wilson commit d58aed18ee77b5e8afa7c9eda389786db6ab1818 Author: Chris Wilson Date: Tue Aug 27 12:24:18 2013 +0100 overlay: Read interrupts from perf Signed-off-by: Chris Wilson commit 14614060b8028f9ab4809f0b0e110a23980ecd14 Author: Chris Wilson Date: Tue Aug 27 12:24:18 2013 +0100 overlay: Read frequency from perf Signed-off-by: Chris Wilson commit 1c3fd70357a57f823846010f59ba75f19e5d4af9 Author: Chris Wilson Date: Tue Aug 27 11:20:43 2013 +0100 overlay: Read power from perf_events Signed-off-by: Chris Wilson commit 6ec1d2c0ae631a3c0af445d4baa53561228be9a5 Author: Chris Wilson Date: Mon Aug 26 23:32:07 2013 +0100 overlay: Align the process names in the memory table And use a shade of gray to distinguish from the total instead. Signed-off-by: Chris Wilson commit 02c0d20fa87aaad4b791407e4eb3eaf4d6079de6 Author: Daniel Vetter Date: Mon Aug 26 21:16:37 2013 +0200 lib/drmtest: restore in_fixture assert I didn't really want to revert those, too ... Signed-off-by: Daniel Vetter commit ad0f081f2b569a2392d0df1fe7bb140b57d91a46 Author: Daniel Vetter Date: Mon Aug 26 20:41:00 2013 +0200 Revert "tests/gem_concurrent_blit: Fix segmentation fault" This reverts commit 912a7d855600aadb937517ec5bab26bfd9b8953d. Now fixed for real! Signed-off-by: Daniel Vetter commit 8869e1e6281139f2c12a9a774becd6c1f892274f Author: Daniel Vetter Date: Mon Aug 26 20:52:14 2013 +0200 lib/drmtest: don't complete fixtures with a longjmp Longjmp creates havoc with stack variables of the current stackframe. And since fixtures should be used to set up such variables creating havoc isn't a great idea. With this I can revert a bunch of bogus patches I've done to paper over this by moving stack variables to be global. The same issue is actually a feature for subtest blocks since subtests should be independant anyway. Signed-off-by: Daniel Vetter commit cf93ba45b00e302c755e1ea5fb860ee5f5379e24 Author: Daniel Vetter Date: Mon Aug 26 19:43:59 2013 +0200 tests/gem_mmap_gtt: Add testcase for the vma access manager Currently fails since the patches aren't merged yet. Signed-off-by: Daniel Vetter commit c2c0efc21acac67a909b5047f9b100853a975ec7 Author: Daniel Vetter Date: Mon Aug 26 10:26:00 2013 +0200 tests/gem_mmap: Convert to subtests I wanted to write a testcase for gtt mmap access restriction checking and only noticed after conversion to subtests that this here is for cpu mmaps ;-) Signed-off-by: Daniel Vetter commit 86f60ee593e3fb6808150d63088e508cf7068a75 Author: Imre Deak Date: Mon Aug 26 17:15:46 2013 +0300 tests/kms_setmode: don't save/restore vt graphics for dry-run Signed-off-by: Imre Deak commit 40cc4b8d103f4406bb51334c1338b0ae774eed17 Author: Imre Deak Date: Mon Aug 26 17:02:49 2013 +0300 lib/drmtest: fix handling of -h --help argument parsing So far we handled -h or --help arguments properly only if the test called igt_subtest_init_parse_opts(). Fix this for igt_subtest_init() callers too. Make sure we still don't exit for any other unknown options, which the caller may parse with a second getopt scan. Signed-off-by: Imre Deak commit 04a4fae32e252666aa12729d232acbc20a0ea8ce Author: Chris Wilson Date: Mon Aug 26 14:45:26 2013 +0100 overlay: Trim the padding slightly Signed-off-by: Chris Wilson commit 908df374a9b469a8d8accdc504564a1bd79eeab5 Author: Chris Wilson Date: Mon Aug 26 14:11:27 2013 +0100 overlay: Count number of semaphores used by each process This required me to contract the per-process information considerably, hopefully readability is not sacrificed too much. Signed-off-by: Chris Wilson commit 1e65d5ac2f1c3b80444fd3c12e7bfcaf033a117f Author: Chris Wilson Date: Sun Aug 25 23:37:58 2013 +0100 overlay: Allow simple positioning and resizing Using window.size=x or window.size=% in the config file, or --size=% or --size=x Signed-off-by: Chris Wilson commit c9f0173764c5266ebd29a3d57ea8a379440346b4 Author: Chris Wilson Date: Sun Aug 25 20:13:31 2013 +0100 overlay: Monitor interrupts Signed-off-by: Chris Wilson commit 39f9812315546b8b5044d8372c7e9c3055151882 Author: Chris Wilson Date: Sun Aug 25 15:17:39 2013 +0100 overlay: Detach from terminal Signed-off-by: Chris Wilson commit d929102591b25c1e9bf95ee58d95f86869e268fd Author: Chris Wilson Date: Sun Aug 25 13:15:55 2013 +0100 overlay: Add a raw kms output For when you don't have any display server, use brute force. Signed-off-by: Chris Wilson commit 20a25f5eafd37c2864e04c3065f6355e1306c6a6 Author: Chris Wilson Date: Sat Aug 24 12:59:31 2013 +0100 overlay: Draw the cpu busy line on top of the waits By drawing it behind the waits, it is obscured by the translucent waits. Signed-off-by: Chris Wilson commit a932c73ab7b0e768ceb723ec280847e55c5cf495 Author: Chris Wilson Date: Sat Aug 24 12:37:59 2013 +0100 overlay: simplify types for object counts for 32/64bit porting Signed-off-by: Chris Wilson commit 68c63ddd36bc8e5379bf9573c24894246f5d0aa7 Author: Chris Wilson Date: Sat Aug 24 10:00:36 2013 +0100 overlay: Expose sampling period/frequency as a user parameter Signed-off-by: Chris Wilson commit 09d9089ead9ceec19888251807db4ccd8017c9ff Author: Daniel Vetter Date: Fri Aug 23 22:32:29 2013 +0200 tests/gem_evict_*: Add interruptible modes Also I've stumbled over igt_fixture again. Somehow gcc loves to wreak havoc with stack variables set up in igt_fixtures ... Duct-tape in the form of moving fd out to global scope applied. Signed-off-by: Daniel Vetter commit 1b6480114e368bcbda394e09b698268b356c1f8f Author: Chris Wilson Date: Fri Aug 23 16:02:42 2013 +0100 overlay: Fix power reading from debugfs Signed-off-by: Chris Wilson commit b22e90bc8b9c7fe27556558c31f00e35e689a12e Author: Chris Wilson Date: Fri Aug 23 15:59:06 2013 +0100 overlay: Distinguish the root debugfs path and our dri node Signed-off-by: Chris Wilson commit 9574cb1a3de0dfe45c59420e2cb9a74fc23baecc Author: Chris Wilson Date: Fri Aug 23 15:51:21 2013 +0100 overlay: Search for right debugfs path Signed-off-by: Chris Wilson commit fd88db77cccf5d8d9be133dfcb3cdc3ff3f219f3 Author: Daniel Vetter Date: Fri Aug 23 09:30:47 2013 +0200 tests/sysfs_rps: Fix igt_require conversion Another fumble caught by QA. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68461 Signed-off-by: Daniel Vetter commit ea80196d9f9380bb7ede871553db2b329a6a2713 Author: Chris Wilson Date: Thu Aug 22 22:50:05 2013 +0100 overlay: Replace debug ticker with hostname Signed-off-by: Chris Wilson commit 163b6a52a4dd44c48c40a609aa8b8b1ffc46881e Author: Chris Wilson Date: Thu Aug 22 20:42:58 2013 +0100 overlay: Close DRI2 device after authentication failure So that we don't leave a master fd open when operating remotely. Signed-off-by: Chris Wilson commit 92a2f8010b5b786c52d676e87209e8332fd370a0 Author: Chris Wilson Date: Thu Aug 22 19:20:01 2013 +0100 overlay: Double buffer the x11 window For pleasant remote transport. Signed-off-by: Chris Wilson commit b6ee8ccffe58a9d604ac0d593b4c6147d62f2898 Author: Chris Wilson Date: Thu Aug 22 19:19:03 2013 +0100 overlay: Make the config parser more lenient Allow a dot-notation outside of the [ini] style to make commandline parameters easier to add. Signed-off-by: Chris Wilson commit c62cf67a6fe4ffcef0bcbdccd6607428b78e676b Author: Paulo Zanoni Date: Thu Aug 22 11:53:09 2013 -0300 tests/pc8: don't work around the eDP I2C bug On the current Kernels, i2c operations on disabled eDP panels don't work because we don't enable the panel before doing the i2c transactions. Whenever we try these transactions we print an error message on dmesg and fail. The current test suite was trying to work around this problem: we count how many eDP outputs we have and add them to the final result. Daniel asked me to not work around the bug, so now the i2c test will fail until we actually fix the Kernel bug (or stop using eDP panels). Signed-off-by: Paulo Zanoni commit 9d29670dee6cabd93785c6c80016bbeca3a80328 Author: Paulo Zanoni Date: Thu Aug 22 11:50:05 2013 -0300 tests/pc8: fix function return value Looks like I forgot to push this chunk... The test was passing in cases where you only have eDP monitors due to the fact that we consider i2c won't work on eDP monitors. Signed-off-by: Paulo Zanoni commit 7c52a3cf5243b42b632fd73789d1b484e81b9b0c Author: Chris Wilson Date: Thu Aug 22 15:07:48 2013 +0100 overlay: Rudiments of config files and option parsing Signed-off-by: Chris Wilson commit 184786988e5d78ae230139d76691b9ce7f97dca6 Author: Chris Wilson Date: Thu Aug 22 10:59:58 2013 +0000 overlay: Fill the blank charts with error messages Instead of showing nothing, show a "space left intentionally blank" message. Signed-off-by: Chris Wilson commit b20a6b827924bfaf0bf92a1eae818385f90dfbea Author: Chris Wilson Date: Thu Aug 22 01:30:02 2013 +0100 overlay: Remove busy estimation Too inaccurate to be useful. Signed-off-by: Chris Wilson commit 4572067c88276c6f72e33e6b204527f8a7ba4481 Author: Rodrigo Vivi Date: Wed Aug 21 15:13:13 2013 -0300 tests: ddx_intel_after_fbdev loads intel ddx after fbdev was loaded. v2: Don't add to kernel tests. Signed-off-by: Rodrigo Vivi Signed-off-by: Daniel Vetter commit 5e66c8c23925090bc230557704a23aaadbd5ad9a Author: Chris Wilson Date: Wed Aug 21 13:49:45 2013 +0100 overlay: Fix underflow for clamping initial values Signed-off-by: Chris Wilson commit 8b9f919b6346eac65be25e4f2e7c8f1b3168eb0a Author: Chris Wilson Date: Wed Aug 21 13:44:44 2013 +0100 overlay: i915 pmu doesn't require a specific frequency Signed-off-by: Chris Wilson commit db35f8c6adfd3880910469beb5a55b0763e55fa4 Author: Chris Wilson Date: Wed Aug 21 13:36:29 2013 +0100 overlay: Put a faint outline around each chart Signed-off-by: Chris Wilson commit e34fab5d2bad0ea9b6bb7e1eb45310640ccaf096 Author: Chris Wilson Date: Wed Aug 21 11:06:51 2013 +0100 overlay: Fade the graphs behind the text Signed-off-by: Chris Wilson commit e104037fff7c1274e1b36f6f458caf6fd868c6db Author: Chris Wilson Date: Wed Aug 21 09:24:59 2013 +0100 tests: Add gem_evict_alignment Clone gem_evict_everything and use it to exercise the misalignment paths. Signed-off-by: Chris Wilson commit e075e7b43ce54573df296bed3477e1d32d357176 Author: Daniel Vetter Date: Wed Aug 21 10:22:13 2013 +0200 lib/drmtest: fix logic fumble in gem_context_create Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68363 Signed-off-by: Daniel Vetter commit 3e7dddc1d1deff674c64b42d26aa1d31b47e495e Author: Chris Wilson Date: Wed Aug 21 09:16:25 2013 +0100 overlay: Fix old mmio gpu busyness probing Signed-off-by: Chris Wilson commit a7b742092700b68d049597d1f25574cac41bb63a Author: Chris Wilson Date: Tue Aug 20 23:19:45 2013 +0100 overlay: Fix sampling of i915 perf event Signed-off-by: Chris Wilson commit 0b78c1632c88d2995baa0cdf40e120e628ea8a27 Author: Chris Wilson Date: Tue Aug 20 21:58:22 2013 +0100 overlay: Fix display of rc6 states Signed-off-by: Chris Wilson commit b98bade56e28cdac0ad5d1b9adfe384410555c15 Author: Chris Wilson Date: Tue Aug 20 21:39:27 2013 +0100 overlay: Add copyright statements Signed-off-by: Chris Wilson commit 2e482a34870c4ab37ad3ae066e3f1b9b8e6b6688 Author: Chris Wilson Date: Tue Aug 20 19:11:44 2013 +0100 overlay: Use the new i915 PMU to query GPU busyness And so avoid having to hold forcewake indefinitely. Signed-off-by: Chris Wilson commit 5cb8c77d69ffda7fed784cd194844b4efecedf52 Author: Chris Wilson Date: Tue Aug 20 19:24:33 2013 +0100 overlay: Take a snapshot on SIGUSR1 Signed-off-by: Chris Wilson commit 57e573ecc1c53b3aafe6ac4784069d79bd73107d Author: Daniel Vetter Date: Tue Aug 20 22:03:30 2013 +0200 tests/pc8: Update to latest igt infrastructure - Use igt_require for magic SKIP results while still printing results for all subtests. - Wrap setup/teardown code outside of subtests with igt_fixture. This will ensure that the so wrapped code isn't run when an igt_require/igt_assert failed (and we're essentially just printing the SKIP/FAIL result for all subtests) or when just enumerating subtests. - Use igt_exit. Otherwise SKIP/FAIL results of subtests won't be propagated correctly. - igt_subtest checks should be run unconditionally to make sure we always enumerate the same set of subtests. A bit on the line here since this is a subtest hidden behind a runtime flag. Signed-off-by: Daniel Vetter commit c158128de5541f67543ea7fcb2404bc06e5d8fa3 Author: Paulo Zanoni Date: Mon Aug 19 13:20:02 2013 -0300 tests: add pc8 This test chekcs our code that enables Package C8+. The environment requirements for this test are quite complicated: - The machine needs to be properly configured to reach PC8+ when possible, which means all the power management policies and device drivers must be properly configured. - You need at least one output connected. - You need the /dev/cpu/0/msr file available. - You need the /dev/i2c-* files available. v2: - Many many changes due to the latest review comments and rebase. Signed-off-by: Paulo Zanoni Signed-off-by: Daniel Vetter commit a7aaf85ac0708973bd1e34bb9b4a1443ea00cd89 Author: Damien Lespiau Date: Tue Aug 20 18:56:54 2013 +0100 gitignore: Add a couple of recent binaries to .gitignore files Signed-off-by: Damien Lespiau commit 84beb3a2a64dbe0e4bad952ea63625ed216bc224 Author: Damien Lespiau Date: Tue Aug 20 18:55:16 2013 +0100 quick_dump: Use AM_V_GEN when generating the bindings Signed-off-by: Damien Lespiau commit 993815ae3be4ddce2a10106c32e939a99b352a29 Author: Damien Lespiau Date: Tue Aug 20 18:52:53 2013 +0100 overlay: Include gpu-perf.h for distribution Signed-off-by: Damien Lespiau commit 01283245ab15453ffcb36fdf0d4c5d1805a0ce3b Author: Damien Lespiau Date: Tue Aug 20 18:25:52 2013 +0100 assembler: Disable the declare test It's not hitting a valid assertion that it tries to write an instruction without a defined execution size (because the "default" exec_size never end up being set). Signed-off-by: Damien Lespiau commit ca043f3a8ffa4d9d69a6833264717b59d0b2aa6a Author: Damien Lespiau Date: Tue Aug 20 18:22:45 2013 +0100 assembler: Disable tests that where already failing in the gen4asm repo Signed-off-by: Damien Lespiau commit f8b25a3612dd0a4df593bd73e3d944addcbbd0e4 Author: Damien Lespiau Date: Tue Aug 20 18:12:49 2013 +0100 assembler: Ignore make check output Signed-off-by: Damien Lespiau commit 751f8a73781b84d15088ee010dad10ef3a337efd Author: Damien Lespiau Date: Tue Aug 20 18:02:37 2013 +0100 assembler: Fix the path of intel-gen4asm With the move to intel-gpu-tools, we need to update that as well. Signed-off-by: Damien Lespiau commit 63720a4f86105c9988334ee4bbc7b9252331994a Author: Damien Lespiau Date: Tue Aug 20 17:58:48 2013 +0100 assembler: Revert "Fix missing environment variables problem in test/run-test.sh" Same as: commit 497814f2f2828efdc5bdd787ebc490d5083f61b8 Author: Damien Lespiau Date: Tue Aug 20 14:52:05 2013 +0100 assembler: Revert "Automatically run all test cases." make check will define srcdir and buildir variables for us. This reverts commit 1c009349bc894bd195b5522540536898b0bee574. commit 497814f2f2828efdc5bdd787ebc490d5083f61b8 Author: Damien Lespiau Date: Tue Aug 20 14:52:05 2013 +0100 assembler: Revert "Automatically run all test cases." The tests where supposed to be run through make check, not running the "run-test.sh" standalone. So revert that patch to have make check work as intended. This reverts commit 6983eebf47f37def8f2315d5af1800b81644f240. commit 5959b8bb41fd852f44c4b81276fc451d896c2f05 Author: Damien Lespiau Date: Tue Aug 20 14:25:52 2013 +0100 assembler: Tune the error message for invalid send on gen6+ And be a bit more descriptive. Signed-off-by: Damien Lespiau commit 5b791671adc798486bb85213984e8e11094d19e3 Author: Damien Lespiau Date: Tue Aug 20 14:20:06 2013 +0100 intel_infoframes: Be future-proof about showing 3D_Ext_Data As Ville noted, future 3D_Struct must also send 3D_Ext_Data in the vendor infoframe. Signed-off-by: Damien Lespiau commit b5acc1061aad3c73a32b5ecc20fcb71067c938b8 Author: Damien Lespiau Date: Tue Aug 20 14:18:58 2013 +0100 build: Fix the overlay build summary at the end of configure Signed-off-by: Damien Lespiau commit 2a37b1d78e8afedcd796dbb0b91d1bee6822d133 Author: Chris Wilson Date: Tue Aug 20 12:45:55 2013 +0100 lib: Make igt_assert() abort under gdb Signed-off-by: Chris Wilson commit 398be7d573fc20c42c737fdac3e3e979835c47fa Author: Chris Wilson Date: Tue Aug 20 12:40:56 2013 +0100 gem_evict_everything: Fix the error code checking after drmIoctl drmIoctl doesn't return the errno, so look it up after an error. Signed-off-by: Chris Wilson commit c615b5828974bd5f182b5ee35c5ed3393b3fe2b5 Author: Chris Wilson Date: Tue Aug 20 11:53:22 2013 +0100 tests: Add gem_evict_everything Exercise the eviction logic. This is just a naive test to ensure that we can evict old buffers to accommodate new batches, and in the process trigger the evict everything logic. Signed-off-by: Chris Wilson commit c6482b781462a291495b9a3b8befa26d49a5ebd0 Author: Chris Wilson Date: Tue Aug 20 11:09:11 2013 +0100 overlay: Sample power every second Found the bug, but still only read the msr once every second - mainly as an exercise in handling different sample rates. Signed-off-by: Chris Wilson commit c888507b68c665e15d02defae9d341245c87b1c2 Author: Chris Wilson Date: Tue Aug 20 11:08:13 2013 +0100 overlay: use rc6_enable to drop useless information Signed-off-by: Chris Wilson commit cf62d52eb414db54c7dd8c78e3052fbad30f94fb Author: Chris Wilson Date: Tue Aug 20 10:58:02 2013 +0100 overlay: Fix counting fail Signed-off-by: Chris Wilson commit 5c81cda0ff092a13c6a1eb24149e7bf98e7242fa Author: Chris Wilson Date: Tue Aug 20 10:04:23 2013 +0100 overlay: Add graph for GPU power consumption Signed-off-by: Chris Wilson commit baa5be07d6652bcd86353d25188505cb0199450a Author: Chris Wilson Date: Tue Aug 20 09:27:34 2013 +0100 overlay: Add rc6 residency Not much point at the moment since we use forcewake to continuously probe the GPU busyness. But that will eventually change to a more power-efficient in-kernel. Signed-off-by: Chris Wilson commit 912a7d855600aadb937517ec5bab26bfd9b8953d Author: Daniel Vetter Date: Tue Aug 20 06:39:43 2013 +0200 tests/gem_concurrent_blit: Fix segmentation fault Apparently the simple changes introduced in commit 78865847f9fae7e590960f9836f2ec8b611a190e Author: Daniel Vetter AuthorDate: Mon Aug 19 07:23:49 2013 +0200 Commit: Daniel Vetter CommitDate: Mon Aug 19 08:09:25 2013 +0200 lib/drmtest: skip fixtures after an igt_skip pushed the stack space requirement for run_modes over some magic limit (I guess where the strack grow logic starts to fail, but I didn't check). Fix this by moving the data into .bss. Also add some asserts to check that fixtures aren't abused while at it (i.e. the useful parts of my debug printf/assert craze). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68299 Signed-off-by: Daniel Vetter commit 00282ed4589491732e921b66166ffa72e3ae11f3 Author: Chris Wilson Date: Mon Aug 19 23:29:08 2013 +0100 overlay: Wrap the colour index around the rgba array And stop assigning colours beyond the end of the array. Still needs a better method for colour assignment, big list of good colours & ida? Signed-off-by: Chris Wilson commit f71d7aeb774ea8d603519d0d1fdef69ba83f2b68 Author: Chris Wilson Date: Mon Aug 19 22:26:01 2013 +0100 overlay: Add missing include "debugfs.h" Later versions of gcc are apparently stricter. Signed-off-by: Chris Wilson commit 55b8c33ca50ce82393f99fb4412aaaed17f010fb Author: Chris Wilson Date: Mon Aug 19 18:15:04 2013 +0100 overlay: Auatomatically mount debugfs Signed-off-by: Chris Wilson commit 34198b801ebca69fba654c8d1e011acea45b778c Author: Mengdong Lin Date: Sun Aug 18 20:36:03 2013 -0400 quick_dump/bdw: use hex() to convert devid to hex string in error message This patch is to avoid the error on device auto-detection failure "TypeError: Can't convert 'int' object to str implicitly". Reviewed-by: Ben Widawsky Signed-off-by: Mengdong Lin commit b70d4c9e6824d648c34ffbd9993aa3e0dd482ac8 Author: Imre Deak Date: Wed Jul 31 11:59:38 2013 +0300 tests: add kms_setmode Iterate through all valid/invalid crtc/connector combinations. At the moment only clone configurations are tested as the single output cases are tested already by testdisplay. Also from combinations where all connectors are on the same crtc (clone-single-crtc) only those are tested that are invalid, as I haven't found any machine that supports these (have to be GT2 with dvo and vga output). For configurations with one crtc per connector the FBs are per-crtc atm. Signed-off-by: Imre Deak commit 5cabaae4dd8f3b4f78468b669d9177d593b4472d Author: Imre Deak Date: Sat Aug 3 02:10:11 2013 +0300 lib: add subtest extra command line option handling At the moment any command line option handling done by tests will interfere with the option handling of the subtest interface. To fix this add a new version of the subtest_init function accepting optional short and long command line options. Merge these together with the subtest interface's own long options and handle both together in the same getopt_long call. Signed-off-by: Imre Deak commit e55b89f1c375df20415e0ebe164001b168fb2bde Author: Imre Deak Date: Fri Aug 2 17:13:37 2013 +0300 lib: handle SIGSEGV similarly to other error signals Signed-off-by: Imre Deak commit 9cbbce148f4a10aa7acf899d0f3cd47b98111cde Author: Imre Deak Date: Fri Aug 2 17:13:21 2013 +0300 lib: shorten DP/eDP connector names Signed-off-by: Imre Deak commit 9a9f13167a655613abfca4a7bc567727e33cfabd Author: Imre Deak Date: Thu Aug 1 15:08:19 2013 +0300 lib: export kmstest_get_connector_default_mode Signed-off-by: Imre Deak commit 8dbd1fb9d4ecdd686dac13fb64f7af02480ea849 Author: Daniel Vetter Date: Mon Aug 19 11:09:25 2013 +0200 lib/drmtest: igt_skip when drm_get_card fails Also add printf support to igt_skip to make sure there's always a reason why we fail a testcase. Signed-off-by: Daniel Vetter commit 9ad062d0b30f307cd5045ba03eeb7d2fa90487b0 Author: Daniel Vetter Date: Mon Aug 19 10:55:28 2013 +0200 lib/drmtest: extract gem_create_context libdrm requirements are now up to it. Signed-off-by: Daniel Vetter commit 23eee394893541fa531543e8fb4b12610599817c Author: Daniel Vetter Date: Mon Aug 19 10:47:53 2013 +0200 tests: roll out igt_require some more Signed-off-by: Daniel Vetter commit 5951ffb6a042037b74f7123d599b6a4f907ecff0 Author: Daniel Vetter Date: Mon Aug 19 10:34:34 2013 +0200 lib/drmtest: rip out drm_open_any_master It's unused. Also most of our tests failed to ask for the right type of drm fd anyway. So it's imo better to just let them fall over when they don't get master but want it, like they already do today. This also allows us to garbage-collect the master parameter to drm_get_card and associated code. Signed-off-by: Daniel Vetter commit 4ba1f2e104310263a112846b19acfa04c8f95fe4 Author: Daniel Vetter Date: Mon Aug 19 07:57:03 2013 +0200 lib/drmtest: Properly skip if no intel gfx supported drm/* kernel test nirvana! Signed-off-by: Daniel Vetter commit 47a32a3aec22f3252a5f551d7b52bb3c2886d0a7 Author: Daniel Vetter Date: Mon Aug 19 07:28:42 2013 +0200 lib/drmtest: make igt_fail work outside of subtests With the abortable fixtures we can now correctly fail all subsequent sutbests if we hit upon an igt_assert outside of a subtest. Signed-off-by: Daniel Vetter commit 78865847f9fae7e590960f9836f2ec8b611a190e Author: Daniel Vetter Date: Mon Aug 19 07:23:49 2013 +0200 lib/drmtest: skip fixtures after an igt_skip This way we can just enclose all igt_skip/igt_require calls into fixtures even when we have subtests, and still output correct SKIP message for all of them. Wohoo, magic! The only thing which doesn't work yet is enumerating failed subtests, but I think that should work out on top of this. Signed-off-by: Daniel Vetter commit 3df8300e23a6a610f738722872743b0670298f99 Author: Chris Wilson Date: Mon Aug 19 08:20:15 2013 +0100 overlay: Tweak label locations to include baseline offset. Still approximately, too lazy to query the metrics. Signed-off-by: Chris Wilson commit 34e4780c8e9c429a835c8be9c512cfe239241298 Author: Chris Wilson Date: Sun Aug 18 21:10:26 2013 +0100 overlay: Add a X11 window backend Useful for remote hosts. Signed-off-by: Chris Wilson commit 1c1a2798063df03633dc7dfbd215a37b71dbecd6 Author: Chris Wilson Date: Sun Aug 18 19:20:24 2013 +0100 overlay: Tweak a couple of the fill colours to be slightly less horrid Signed-off-by: Chris Wilson commit 1391ae08eb007205ad79d4201c3bf499239f8697 Author: Chris Wilson Date: Sun Aug 18 19:16:29 2013 +0100 overlay: Don't smooth gpu freq This is supposed to be discrete jumps, so use straight lines to emphasis this nature. Signed-off-by: Chris Wilson commit 90ef68859c3e5edf2a6cd6b274f0443b936c9e0d Author: Daniel Vetter Date: Sun Aug 18 19:58:28 2013 +0200 test/gem_dummy_reloc_loop: fix igt_require conversion Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68170 Signed-off-by: Daniel Vetter commit 5d41b13824d85c2e773cca5c4639882ea394e866 Author: Chris Wilson Date: Sun Aug 18 18:54:04 2013 +0100 overlay: Remove the double ':' from object comm names Signed-off-by: Chris Wilson commit 6a38200b87b7b44d781470d4cbd6578182938aa8 Author: Chris Wilson Date: Sun Aug 18 18:45:14 2013 +0100 overlay: Use a more compact 2x2 layout for the graphs Signed-off-by: Chris Wilson commit 74032f4b4559fee909aec97b16617c40a81bc642 Author: Chris Wilson Date: Sun Aug 18 18:40:03 2013 +0100 overlay: Rearrange GUI state Planning a new layout... Signed-off-by: Chris Wilson commit 7d950fa6f26e823a741f8c2db95ce4dd96c8d432 Author: Chris Wilson Date: Sun Aug 18 18:27:47 2013 +0100 overlay: Print min/max GPU frequencies. Signed-off-by: Chris Wilson commit 3f5129471fdcc81ae4291bfa717e497d223e35a1 Author: Chris Wilson Date: Sun Aug 18 18:24:43 2013 +0100 overlay: Convert gem objects to megabytes Less confusing, I hope. Signed-off-by: Chris Wilson commit e1ed5606c6dd9d320b97582a9575e2b86a17e844 Author: Chris Wilson Date: Sun Aug 18 18:17:05 2013 +0100 overlay: Parse gem objects Condense the information and begin graphing it. Remaining todo for memory is to measure bind/evict flux, and perhaps clflush. Signed-off-by: Chris Wilson commit de2c97b27fa176deec12a6277448397fcc246e47 Author: Chris Wilson Date: Sun Aug 18 16:42:25 2013 +0100 overlay: Add GPU frequency Signed-off-by: Chris Wilson commit 6a64ee938b90a2d27342aa42ba1d2d90da40dc7b Author: Chris Wilson Date: Sun Aug 18 15:56:22 2013 +0100 overlay: Include CPU usage in the overview chart Signed-off-by: Chris Wilson commit 98572f0446e62eb889f28efe39fc1501e96093c1 Author: Chris Wilson Date: Sun Aug 18 11:15:08 2013 +0100 overlay: Count flips per plane Stop the misleading double-accounting of flips when we have multiple displays active. Signed-off-by: Chris Wilson commit b79a28355ded0118f6e53f745684d67c8201bf30 Author: Chris Wilson Date: Sat Aug 17 23:50:21 2013 +0100 overlay: Improve the horizontal fit of the charts Notably fix the fill boundary to not extend past the right hand side of the chart. Signed-off-by: Chris Wilson commit f185f46114620ff8938abc965f89ecb4d295b4f4 Author: Chris Wilson Date: Sat Aug 17 23:07:01 2013 +0100 overlay: Correct layout of ring/seqno in raw sample For seqno completion, the events are too coarse i.e. one event may signal the completion of a few seqno. We will need to sort the events to properly compute the busy times. Signed-off-by: Chris Wilson commit 67f533f836487093a27e176d64de206772088345 Author: Chris Wilson Date: Sat Aug 17 22:33:35 2013 +0100 overlay: Accumulate busy times Still a little too course as we add multiple overlapping seqnos and waits. Signed-off-by: Chris Wilson commit 6233cac9c9f264961c62bb1330d8f48b3b6922b5 Author: Chris Wilson Date: Sat Aug 17 22:22:21 2013 +0100 overlay: Couple wait begin/end events together to fix accounting Since the events may be processed out of order (due to per-cpu ringbuffers) we need to be careful to associated wait pairs in order to compute the correct elapsed time. Signed-off-by: Chris Wilson commit e1d8d774f331ba4e515cad4e5efa91ddc18efad6 Author: Chris Wilson Date: Sat Aug 17 22:07:49 2013 +0100 overlay: Perf output redirection must be done after mmap() Effectively you choose to redirect the output of an event instead of mmapping it directly - but the target must already be mmapped. Signed-off-by: Chris Wilson commit eed59eac47bae095513a5b1b6286fdd556d8a760 Author: Chris Wilson Date: Sat Aug 17 21:14:10 2013 +0100 overlay: Show per-process wait times Signed-off-by: Chris Wilson commit cc9de398cf5232e547e9131d72782732a552fc56 Author: Chris Wilson Date: Sat Aug 17 20:32:58 2013 +0100 overlay: Graph per-process requests over time Signed-off-by: Chris Wilson commit cbbd55af154f88fdd2c58c0398408f242124b005 Author: Chris Wilson Date: Sat Aug 17 20:04:11 2013 +0100 overlay: Track requests per-process Signed-off-by: Chris Wilson commit be9937b65cbc7ba06f972b68db2a80c2100c4141 Author: Chris Wilson Date: Sat Aug 17 18:48:28 2013 +0100 overlay: Drop unused mmap/comm events Signed-off-by: Chris Wilson commit 8cdb5bc5e838665bd8aafde3667a55152196e7f4 Author: Chris Wilson Date: Sat Aug 17 18:24:39 2013 +0100 overlay: Constify perf ringbuffer Signed-off-by: Chris Wilson commit 3e430a8b01ae13bac878863663bd3e2efd995c6d Author: Chris Wilson Date: Sat Aug 17 18:09:40 2013 +0100 overlay: Fix wraparound handling of perf ringbuffer Signed-off-by: Chris Wilson commit cc45a9a3dbbaa51a480c56bea53c1803dbd1859f Author: Chris Wilson Date: Sat Aug 17 17:38:37 2013 +0100 overlay: Primitive integration with perf We can now record when a pageflip occurs by listening for the flip tracepoint. Merely proof of principle at this point. Signed-off-by: Chris Wilson commit 06c0cc0bb42d0a3f1c72e0c0d85d15107a392069 Author: Chris Wilson Date: Sat Aug 17 12:32:17 2013 +0100 overlay: Show GPU waits Signed-off-by: Chris Wilson commit f9a50de3dcc501e930de6c60983a4feb57121e7e Author: Chris Wilson Date: Sat Aug 17 11:12:07 2013 +0100 Introduce intel-gpu-overlay A realtime display of GPU activity. Note, this is just at the point of minimum usability... Signed-off-by: Chris Wilson commit 7df9caeea1606b4f0272de35f0d7f70eedd5ec30 Author: Ben Widawsky Date: Fri Aug 16 14:54:36 2013 -0700 quick_dump: add is_haswell() This was missed beforehand. Signed-off-by: Ben Widawsky commit 0d320fdcedf9e5fd512597477e9f4913a3c7af33 Author: Chris Wilson Date: Fri Aug 16 12:07:56 2013 +0100 gem_concurrent_blit: Purge the child bufmgr's cache Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68169 commit 6332994c269ae5613845a40cd798ffa2f1b86395 Author: Chris Wilson Date: Fri Aug 16 12:15:00 2013 +0100 drmtest: Squelch the rude interrupter Stop printing the debugging information of how many times we emitted a signal. commit 1b17cb9d04809f9528279abc44ad74f5559df3b5 Author: Chris Wilson Date: Fri Aug 16 11:23:22 2013 +0100 gem_concurrent_blit: Fix the leak from the children. As the children use the parent's fd, the kernel only has a single filp for everyone. Therefore we cannot rely on the process termination reaping the buffers we allocate for the children. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68169 commit 1ca607b458b63762846fc95c104b4686eb4eccb3 Author: Chris Wilson Date: Fri Aug 16 09:44:13 2013 +0100 gem_concurrent_blit: Share total num_buffers between all children Apparently not all machines have more than 4GiB of RAM available. Spoilsports. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68169 commit 62298329350b965e4bbfc558e5a4b1b3646742ea Author: Xiang, Haihao Date: Wed Aug 14 14:21:16 2013 -0700 assembler: error for the wrong syntax of SEND instruction on GEN6+ predicate SEND execsize dst sendleadreg payload directsrcoperand instoptions predicate SEND execsize dst sendleadreg payload imm32reg instoptions predicate SEND execsize dst sendleadreg payload sndopr imm32reg instoptions predicate SEND execsize dst sendleadreg payload exp directsrcoperand instoptions The above four syntaxes are only used on legacy platforms which support implied move from payload to dst. Signed-off-by: Xiang, Haihao Reviewed-by: Damien Lespiau Signed-off-by: Ben Widawsky commit 9d5e4fac207a9278ec26717576dff0e5d3766c57 Author: Damien Lespiau Date: Thu Aug 15 16:46:58 2013 +0100 gem_ctx_basic: Fix misc warnings Signed-off-by: Damien Lespiau commit 92aca3b19e7201ed6e8f74b18207209d9312f8d2 Author: Damien Lespiau Date: Thu Aug 15 16:40:47 2013 +0100 intel_infoframes: Dump 3D_Ext_Data when using Side-by-side (half) Signed-off-by: Damien Lespiau commit bc1cf77534fa11fbdc5bb95313fe5728c6411235 Author: Damien Lespiau Date: Sat Aug 10 21:25:16 2013 +0100 intel_infoframes: Add support for decoding HDMI VICs The HDMI vendor infoframe can contain a HDMI VIC (as of HDMI 1.4, only used for 4k formats). Signed-off-by: Damien Lespiau Reviewed-by: Simon Farnsworth commit e58891d0aef37391ccd09091871db35516427884 Author: Daniel Vetter Date: Thu Aug 15 14:00:23 2013 +0200 tests/prime: test dma-buf llseek support This exercises a proposed patch from Christopher James Halse Rogers. Signed-off-by: Daniel Vetter commit 79abed393f7c92255a1263c5ef3694befbea6812 Author: Daniel Vetter Date: Thu Aug 15 11:55:32 2013 +0200 lib/drmtest: Use igt_assert in the do_ioctl/do_or_die helpers abort results in "crash" test results in the piglit runner, igt gives us neater output. The downside is that we can now only use these in igt tests, but that's already the case (and given their placement in drmtest.h their intended use-case, too). Signed-off-by: Daniel Vetter commit 610630622b4f5f9570f6faf136a0273535728536 Author: Daniel Vetter Date: Thu Aug 15 13:47:15 2013 +0200 tests/gem_ctx_basic: Use igt_require ... instead of threading the 77 return value through threads. Even better would be to check for requirements in the single-threaded setup part of the test, since now it's done by multiple threads in parallel and will result in interleaved and multiplied output on stdout. Whatever. Signed-off-by: Daniel Vetter commit 176011eea776566ca73f98c48b0476db7f8b1e4d Author: Chris Wilson Date: Thu Aug 15 10:55:22 2013 +0100 Add intel_framebuffer_dump A simple utility to capture the currently active framebuffers and record them as a png. commit f2198896087b160bdc13eb8cf9b2dd54e79d52da Author: Daniel Vetter Date: Wed Aug 14 22:13:38 2013 +0200 lib/drmtest: fix subtest output when skipping all tests (null) isn't too nice ... Signed-off-by: Daniel Vetter commit ec834c995f96a9e2feb3a36cca5887c16c87dfc1 Author: Daniel Vetter Date: Wed Aug 14 22:24:43 2013 +0200 tests/prime_nv_api: fixup conversion goof-up Oops. Signed-off-by: Daniel Vetter commit eab7a322edc0a5b0553ff5f4c170096a98f8464f Author: Daniel Vetter Date: Wed Aug 14 22:15:04 2013 +0200 tests/primve_nv_test: use igt_assert for checking ... and drop the int return argument of the tests. Also: - make nv_write_i915_cpu_mmap_read functional again by dropping the goto. - add checks to i915_import_pread_pwrite Signed-off-by: Daniel Vetter commit 696c8f6434c7ec8db64f88125d4a7b31afd130bf Author: Daniel Vetter Date: Wed Aug 14 18:30:03 2013 +0200 lib/drmtest: documentation for igt_fixture Signed-off-by: Daniel Vetter commit 15c19229f404bcd04f90517925614d5716258057 Author: Daniel Vetter Date: Wed Aug 14 18:03:09 2013 +0200 lib/drmtest: add igt_subtest_name and use it in kms_flip Useful when the testname is constructed with igt_subtest_f. Signed-off-by: Daniel Vetter commit b3880d3a969656b78fe246e5ca4dd5a4a2c70ef5 Author: Daniel Vetter Date: Wed Aug 14 18:02:46 2013 +0200 tests: roll out igt_fixture Also sprinkle igt_assert and igt_require over the setup code to clean up code while at it. To avoid gcc getting upset about unitialized variables just move them out of main as global data (where they always get initialized to 0) - gcc can't see through our igt_fixture and igt_subtest maze properly. Signed-off-by: Daniel Vetter commit c3dd8a8c85b3e1a4329282cbe82fd7f387cd2643 Author: Daniel Vetter Date: Wed Aug 14 17:11:49 2013 +0200 tests/gem_ctx_bad_exec: add subtest for vebox Signed-off-by: Daniel Vetter commit 2dbd998429dc1c449abfa153060aba5a97b7c8aa Author: Daniel Vetter Date: Wed Aug 14 15:48:54 2013 +0200 tests: Introduce igt_fixture Just a tiny wrapper to protect global test setup/teardown code when just listing subtests. Rolling this out over all tests with subtests should allow us to generate the testlist with piglit as an unpriviledged user on a non-intel system. The aim here is to make our QA team happy who currently suffers from this. Even more so for the prime tests since you need a system with intel _and_ nouveau gpus to just be able to list tests. Exemplary conversion with gem_concurrent_blt.c Fixture is the same name other test suites like googletest use for setup/teardown code used by multiple tests. Signed-off-by: Daniel Vetter commit f8c0dfe399d7b5351a16d111285e85f54a5725ff Author: Daniel Vetter Date: Wed Aug 14 16:51:26 2013 +0200 lib/drmtest: sprinkle documentation over igt_skip|fail|success|exit And make the behaviour of igt_exit() a bit saner. Signed-off-by: Daniel Vetter commit a1ca8ef5b1f44845bb2d0eada0123eb35b7e0b21 Author: Daniel Vetter Date: Wed Aug 14 16:02:24 2013 +0200 tests: use igt_exit() consistently with subtests This is mostly important to get the SKIP reporting right, but I've found a few stragglers that wanted to get converted over to the igt result reporting completely. Signed-off-by: Daniel Vetter commit ec283d6a52f49963b7f4d5d6582142f7f2025ded Author: Daniel Vetter Date: Wed Aug 14 15:18:37 2013 +0200 tests/gem_concurrent_blt: extract run wrappers Functional programming ftw! Signed-off-by: Daniel Vetter commit 9a4957a1b3cdc31019c90fedc44c3ac7449344fc Author: Daniel Vetter Date: Wed Aug 14 15:10:52 2013 +0200 tests/gem_concurrent_blt: use the test helpers in the forked tests Signed-off-by: Daniel Vetter commit 5a598c9b2ec22c3161d2d48e6f05a132ce8d333b Author: Daniel Vetter Date: Wed Aug 14 15:08:05 2013 +0200 tests/gem_concurrent_blt: refactor basic run modes a bit Signed-off-by: Daniel Vetter commit 43779e37b50d3bb256706b0e7bbd23df79bc9912 Author: Daniel Vetter Date: Wed Aug 14 14:50:50 2013 +0200 tests: merge gem_*_concurrent_blt together Too much copy&pasting isn't good. Signed-off-by: Daniel Vetter commit f542b0970a1e4104fb0af0f60079271ac1cf02b1 Author: Daniel Vetter Date: Wed Aug 14 13:48:10 2013 +0200 lib/drmtest: Don't spoil stdout when listing tests Oops. Signed-off-by: Daniel Vetter commit 6234658063b4080778c34228a444e96eb901279f Author: Daniel Vetter Date: Wed Aug 14 13:47:47 2013 +0200 tests: add igt_subtest_f for snprintf'ing testnames Useful when stitching together combinatorial testnames. v2: - ## rules are just fun. We need 2 indirections to actually get __LINE__ to properly expand. - Kill stray ; which botched the logic. Signed-off-by: Daniel Vetter commit 1532af19d9bf962412bb150393aa10d13fae91d6 Author: Daniel Vetter Date: Wed Aug 14 12:13:28 2013 +0200 tests/gem_dummy_reloc_loop: use igt_skip For tests with subtest we should use igt_skip to ensure that subtests are always properly enumerated. Signed-off-by: Daniel Vetter commit c2d6773b253b7ab15fe8818730aef2f9f7e4a23d Author: Daniel Vetter Date: Wed Aug 14 12:07:44 2013 +0200 tests/gem_write_read_ring_switch: use igt_exit and friends And consolidate the gem_require_ring check a bit. Signed-off-by: Daniel Vetter commit 99431a4f06bcaaa8944d1ed8fed118cd2b97078b Author: Chris Wilson Date: Wed Aug 14 11:03:34 2013 +0100 gem_(cpu|prw)_concurrent_blit: Add contending processes Blindly fixed conflicts: tests/gem_cpu_concurrent_blit.c tests/gem_prw_concurrent_blit.c commit 4f8c9a2c386154a5be94e117b4371ab0ef8b55a8 Author: Chris Wilson Date: Wed Aug 14 08:17:22 2013 +0100 gem_write_read_ring_switch: Copy the missing igt_require An oversight in the mass conversion to the new framework as the test was called from two locations. Ideally, the checks could be moved back to the caller and the framework still work. This is just the patch of least resistence. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68091 commit 6a746c82ab890cc7bcd6a0cdce78e6d69875f2bf Author: Chris Wilson Date: Tue Aug 13 23:51:09 2013 +0100 gem_exec_lut_handle: Use linear regression analysis Simultaneously make the results more robust and compact by performing a linear regression to compute the amount of time required to perform the exec array walk and the relocations. commit 629f48fa0e3d928a8d1999b4d547ad0ff9e2fd6b Author: Daniel Vetter Date: Tue Aug 13 23:05:51 2013 +0200 lib/drmtest: Don't run the rude interruptor when just listing subtests Signed-off-by: Daniel Vetter commit 878ac4c3ab3315e767801b53cabecebda583672f Author: Daniel Vetter Date: Tue Aug 13 20:07:32 2013 +0200 configure: require libdrm 2.4.45 We've started to use the VEBOX defines. Signed-off-by: Daniel Vetter commit 8f5387eb99b640771812d28a0b949aca729bf296 Author: Daniel Vetter Date: Tue Aug 13 13:20:58 2013 +0200 tests: introduce igt_require Since igt_skip has funny control flow we can abuse it and make it work like a special kind of assert which automatically skips tests if a requirement fails. Note that in places where we have a less strict test which should always succeed (e.g. ioctl works or isn't available) the igt_assert should be place before the igt_require with the more strict requirements. Otherwise we'll skip a test instead of properly failing it. Convert a few users of igt_skip over to igt_require to showcase its use. v2: s/gem_check_/gem_require_/ so that we consistently use "require" to indicate magic check that can call igt_skip. Imo hiding the igt_require for feature checks is ok, but for more traditional assert like use cases an explicit igt_require might be better. Signed-off-by: Daniel Vetter commit 5e25fcc285240353ab15bd4c3a0d0e02d970f45b Author: Daniel Vetter Date: Tue Aug 13 12:56:06 2013 +0200 tests: use igt_fail instead of exit(param != 0) Mostly a sed job with too manual fixups: - one case of using _exit instead of exit - and one case which under some conditions use 77, so convert that check to an igt_skip. Signed-off-by: Daniel Vetter commit b30d95f33ca9c7c2cd3ef9e3e23ea965ee784a8a Author: Daniel Vetter Date: Tue Aug 13 12:51:35 2013 +0200 tests: s/exit(77)/igt_skip()/ Signed-off-by: Daniel Vetter commit c9d037828130a97f5952164fba06007b056dfb4b Author: Daniel Vetter Date: Tue Aug 13 12:50:39 2013 +0200 tests: s/exit(EXIT_SUCCESS)/igt_success()/ Signed-off-by: Daniel Vetter commit a4cb8954b2d8f103b613aaa9860d9f25e8e2954d Author: Daniel Vetter Date: Tue Aug 13 12:49:46 2013 +0200 tests: s/exit(EXIT_FAILURE)/igt_fail(1)/ Signed-off-by: Daniel Vetter commit 907377da0e9c2d878f45201230b8d3900310cb0b Author: Daniel Vetter Date: Tue Aug 13 12:45:14 2013 +0200 tests/gem_readwrite: convert to subtests A bit lazy since the read/write tests are all smashed together. But since we have really evil partial write/read tests for coherency checking that doesn't matter that much really. Signed-off-by: Daniel Vetter commit ef9e64577d2b3ddc94827433a763d5445d8b23b8 Author: Daniel Vetter Date: Tue Aug 13 12:41:20 2013 +0200 tests/gem_ctx_bad_exec: convert to subtests Signed-off-by: Daniel Vetter commit 83440953e50d1c46217ce9bdcd74aa9a4671913d Author: Daniel Vetter Date: Tue Aug 13 12:35:58 2013 +0200 tests: s/assert/igt_assert Just a wholesale rollout for now, we can refine later on. Signed-off-by: Daniel Vetter commit 2371c79bbd69f46c2849298fb7f216a5b9a21aa8 Author: Daniel Vetter Date: Tue Aug 13 11:56:24 2013 +0200 lib/drmtest: roll out igt_assert I've left the asserts as-is where they check for tests that use the infrastructure in drmtest.c incorrectly. That way piglit's differentiation between a failed testcase and a crashing testcase should be more useful. Signed-off-by: Daniel Vetter commit 646a6fefbc2f11df9d25811c317d1f05aa21da45 Author: Daniel Vetter Date: Tue Aug 13 11:52:01 2013 +0200 lib/drmtest: add igt_assert as a replacement for assert The aim is that we keep on running subtests even when a not-too-lethal assert failed in a subtest. To make that useful also print per-subtest test results from igt_skip|fail|success functions. If required we can always go googletest-nuts with different types of asserts later on, but I think for now we're good with what we have here. v2: Also print out proper SKIP message when skipping all subsequent tests since a global (i.e. outside of a subtest) init step failed and resulted in an igt_skip call. Signed-off-by: Daniel Vetter commit c67ebf413a45dd225049b14562fd76d2bbc444e2 Author: Daniel Vetter Date: Tue Aug 13 11:40:57 2013 +0200 lib/drmtest: fixup igt_fail for the list-only case Oops. Signed-off-by: Daniel Vetter commit bd161f8c042f710020137444a47cdeaea1bfd8f6 Author: Daniel Vetter Date: Thu Aug 8 09:32:05 2013 +0200 tests: add drm_get_client_auth To check we don't break the magic authentication check libva does. Ugh. Signed-off-by: Daniel Vetter commit a7433ec9eebfb0e5a40189943764c0cf1555dab3 Author: Daniel Vetter Date: Mon Aug 12 14:02:03 2013 +0200 tests: scrap old automake based kernel test runner Upstream broke our dynamic creation of the testlist, and I think adding stupid .tests suffixes everywhere just to appease upstream autohell tools isn't that great. So scrap it, we can use piglit instead. References: https://lists.gnu.org/archive/html/help-debbugs/2013-06/msg00000.html Signed-off-by: Daniel Vetter commit 6877877558870c9c245e7fedcbd1d66ed2206d83 Author: Daniel Vetter Date: Mon Aug 12 12:26:35 2013 +0200 tests: s/return igt_retval();/igt_exit();/ Requested-by: Chris Wilson Signed-off-by: Daniel Vetter commit 1caaf0a6b6e00e3ab85a10d7e9e36907d4c1d577 Author: Daniel Vetter Date: Mon Aug 12 12:17:35 2013 +0200 s/drmtest_/igt_/ Requested-by: Chris Wilson Acked-by: Damien Lespiau Signed-off-by: Daniel Vetter commit 814b135541813a6ee623eda895119acdea7f7a2f Author: Daniel Vetter Date: Mon Aug 12 12:15:16 2013 +0200 s/drmtest_subtest_block/drmtest_subtest/ The _block postfix meant to convey that a C statement/block must follow can be misread as the verb to block. So drop it. Signed-off-by: Daniel Vetter commit 16024841a12f71d52aea12603d9fb1cb63124fb6 Author: Daniel Vetter Date: Mon Aug 12 11:57:32 2013 +0200 lib/drmtest: __ prefix for drmtest_run_subtest Now that callers must setup the longjmp target (we can't do that in run_subtest itself since that callframe won't survive) tests shouldn't call this function directly any more. Make this clear by adding a __ prefix. Signed-off-by: Daniel Vetter commit d65d19d4f4ad98af42c628f3a81d273ce6ac4e5a Author: Daniel Vetter Date: Mon Aug 12 10:46:55 2013 +0200 lib/intel_mmio: Remove unused label Signed-off-by: Daniel Vetter commit 7847ea2965e548f7f68c6d7a88499bdb255a697f Author: Daniel Vetter Date: Mon Aug 12 11:03:29 2013 +0200 tests: use drmtest_skip to check for rings To simplify things add a set of gem_check_ functions which take care of this. Since I've opted for static inlines drmtest.h grew a few more header includes which was a neat opportunity to dump a few redundant #defines. This kills all the skipped_all hand-rolled logic we have. Signed-off-by: Daniel Vetter commit 7553ad6e10f76aa703359a10e08138e14501d54d Author: Daniel Vetter Date: Mon Aug 12 10:43:59 2013 +0200 tests: use drmtest_skip() in caching ioctl helpers This way we can rip out all the skip handling from the test control flow, and additionally (by using drmtest_retval()) even get correct exit codes. The only tricky part is that when we only want ot skip parts of a test (like for gem_pread and gem_pwrite) we need to split out those parts as subtests. But no addition of control-flow is required, the set/longjmp magic in the helpers all makes it happen. Also we make extensive use of the behaviour of drmtest_skip to skip all subsequent subtests if it is called outside of a subtest. This allows us to re-flatten the control flow a lot. Signed-off-by: Daniel Vetter commit a4038d3853b98707a803f5d1fb5c9ebe32f0b84b Author: Daniel Vetter Date: Mon Aug 12 10:39:33 2013 +0200 lib/drmtest: make signal process cleanup more robust If we skip a test and and fail somewhere the parent might die before the child. So add some cleanup to handle this case. Also make sure that the parent indeed waits for the child to die. This is required to make the latest version of the piglit runner happy, it tends to wait for all zombies to disappear. Signed-off-by: Daniel Vetter commit 740065f0f9cd8f5add5520e6b3db6b02befee0a9 Author: Daniel Vetter Date: Mon Aug 12 09:49:25 2013 +0200 tests/gem_caching: convert to use drmtest retval infrastructure Signed-off-by: Daniel Vetter commit ba0d2acf0ed9faf8025c54857db661d37c3a1339 Author: Daniel Vetter Date: Mon Aug 12 09:31:55 2013 +0200 lib/drmtest: skip/fail handling Exitcode handling in igt testcases has too ugly facets in combination with subtests: - When individual subtest needed to be skipped for different reasons we need to painstakingly thread this information through the test to make sure that we still succeed if just one testcase worked (for running it with the simple automake test runner in igt). But it also needs to correctly report the skip exit value if only this one skipped testcase has been run (e.g. when run with piglit or in QA's test infrastructure). - We'd prefer to easily skip (and also fail) subtests without hampering other subtests. Again threading the return value of each subtest through the code is cumbersome. To simplify test case writing use longjmps to be able to get out of subcases easily. But since longjmps are funny things thug it all away into the newly added drmtest_subtest_block macro. Note that if drmtest_skip is called outside of a subtest, but in a testcase with subtests all subsequent subtests will be automatically skipped. Signed-off-by: Daniel Vetter commit 9f6365e4eacc7aa07fc3f9524500d1e217b61bb5 Author: Daniel Vetter Date: Mon Aug 12 09:04:24 2013 +0200 lib/drmtest: Add drmtest_subtest_block macro Doesn't do more than an if (drmtest_run_test(name)) right now, but as soon as we get a bit of infrastructure to handle test failures and skipping, this will get more interesting. Signed-off-by: Daniel Vetter commit 40ea6f4ea89dbf5a326677ea9482cc48743d2543 Author: Daniel Vetter Date: Mon Aug 12 08:41:05 2013 +0200 tests: s/cacheing/caching Signed-off-by: Daniel Vetter commit 7b254f193933eda7c9761a7f10ac49049103b259 Author: Chris Wilson Date: Mon Aug 12 08:39:26 2013 +0100 gem_pwrite: Print the cache name not the number Bugzilla: https://bugzilla.freedesktop.org/show_bug.cgi?id=68003 commit 467796acc80ced3440740d267c2e2a4f246d4b8a Author: Chris Wilson Date: Sat Aug 10 15:49:33 2013 +0100 Expand gem_set_cacheing testing to handle the proposed DISPLAY domain commit dbbf2e9b24d1488402269a803a230f341791d39a Author: Chris Wilson Date: Wed Aug 7 23:41:54 2013 +0100 intel_error_decode: First try /sys/drm/card0/error for the error-state As the sysfs is almost always mounted and readable, we have a higher success rate checking for our error state there than in debugfs. Signed-off-by: Chris Wilson commit a285f03f56050b9a9cb02f232078b63b4a181ed2 Author: Daniel Vetter Date: Wed Aug 7 14:54:00 2013 +0200 tests/prime_self_import: fix comment commit 00280fa82acbca4cf2fac6ac27efb56d86bfcbe1 Author: Daniel Vetter Date: Wed Aug 7 18:36:31 2013 +0200 tests/prime_self_import: Fixup previuos test ... not a great display of my prowess here. Signed-off-by: Daniel Vetter commit 8e11ab41923d0d45740c0530a8158edd354cf510 Author: Daniel Vetter Date: Wed Aug 7 18:12:20 2013 +0200 tests/prime_self_import: Add a flink/dma-buf self-import test This checks that we really always fill the dma-buf export cache. Which sometimes we don't. Signed-off-by: Daniel Vetter commit e7c4fde8c1827783e8cd1ff17945c710f44b8723 Author: Daniel Vetter Date: Wed Aug 7 12:01:35 2013 +0200 tests: update .gitignore Signed-off-by: Daniel Vetter commit 57622965e57a9d9dfb491434169bce1ea3aa94fe Author: Daniel Vetter Date: Wed Aug 7 11:59:05 2013 +0200 tests/gem_pwrite_pread: subtest annotation This testcase mixes correctnes tests with performance tests, so it's good to track the different correctness test separate for QA. Together with pread_after_blt the pwrite->blt tests here exercise the full cache coherency lifecycle of both snooped and uncached objects. /me is happy Signed-off-by: Daniel Vetter commit 3dba47e8962ec6ebf7e8825531bd46ab54a84ec6 Author: Daniel Vetter Date: Tue Aug 6 22:27:37 2013 +0200 tests: add gem_prw_concurrent_blt New testcase to check that pwrite/pread correctly synchronize with oustanding rendering. Just to catch regressions when we change something. Signed-off-by: Daniel Vetter commit 4901b5ff0e882b0b4e80d0adcbbf0c0f2a524560 Author: Daniel Vetter Date: Thu Jul 25 21:09:43 2013 +0200 tests/prime_self_import: Add racing handle2fd testcase Similar to how we test flink races. Note that on unfixed kernels this oopses, and with my current set of patches it still leaks like mad. v2: Only close the prime fd if we've successfully created it. v3: Add a reimport test to check whether we don't race when reaping the obj->dma_buf link. Signed-off-by: Daniel Vetter commit 9ff5161354f2f8023e08eb87ebc173c01c2f607a Author: Daniel Vetter Date: Thu Jul 25 22:10:51 2013 +0200 tests/gem_flink_race: Kill duplicate drm_open_any Leak test that leaks ... Signed-off-by: Daniel Vetter commit d9bc78767329bd183f3644b8d97c45fb2c2bd6e1 Author: Chris Wilson Date: Tue Aug 6 18:03:18 2013 +0100 gem_pwrite_pread: Use mmap to bypass pwrite/pread for comparison Just to help sanity test alternate paths. commit e4a7c2fe6d2e2ddc052f264168e4835bebb1e81e Author: Chris Wilson Date: Tue Aug 6 16:14:59 2013 +0100 gem_pwrite_pread: Measure how long it takes to upload/copy/download Further trying to determine the effects of setting snooping. commit ab6ac672437fb403cea984b992ccab8336daf7ca Author: Chris Wilson Date: Tue Aug 6 15:48:08 2013 +0100 lib: Reset sig_stat after stopping the rude interrupter commit 5d635f95f2cd7e97a925bae707bf35c8315603ad Author: Chris Wilson Date: Tue Aug 6 15:18:30 2013 +0100 gem_pread: Symmetric measurement to gem_pwrite commit aad68d1a86a515c96e7af02c7d048680b5e83071 Author: Chris Wilson Date: Tue Aug 6 15:12:55 2013 +0100 gem_pwrite: Time pwrites to both uncached/snooped memory commit a661c098b0156a7cba4f29af0d6f223ca72560ba Author: Chris Wilson Date: Tue Aug 6 15:09:50 2013 +0100 gem_partial_pwrite_pread: Exercise different cacheing of the staging bo commit 24eade08ab49bc2e1e16260472c34365e1e26d50 Author: Chris Wilson Date: Tue Aug 6 15:03:40 2013 +0100 gem_pread_after_blit: Exercise reading back through different cache levels commit 3052fe2c91f927cce7f6b9340357ea14fed24c9a Author: Imre Deak Date: Mon Jul 29 17:21:21 2013 +0300 kms_render: fix gpu-blit for non-32bit bpps intel_copy_bo assumes a 32bpp bo, whereas we passed it bos with arbitrary bpp values. This resulted in thrashing GPU memory following the destination bo. Fix this by using a blit helper that can handle other bpps too. Signed-off-by: Imre Deak commit 24de8bac80e61b9b8dbfd2b3b834f15a13e506e3 Author: Imre Deak Date: Mon Jul 29 17:19:58 2013 +0300 lib: export drm_format_to_bpp Needed by the next patch. Signed-off-by: Imre Deak commit c1ee0bb53269ded7b79966d081518d689639bac7 Author: Imre Deak Date: Mon Jul 29 16:43:31 2013 +0300 intel_batchbuffer: add support for non-32bit blt copies Needed by an upcoming patch fixing kms_render's blits for fbs that have other than 32bpp formats. Based on the corresponding SNA function. v2: - fix random ordering of src, dst parameters (Chris) - pass pitch in bytes rather than pixels (Chris) Signed-off-by: Imre Deak commit a85548910cbb5f9f9c90b99a178e3b5bc1034730 Author: Ben Widawsky Date: Sat Jul 27 15:30:41 2013 -0700 lib/intel_mmio: Fix the fixed fix (register access) When I moved code around here: commit 57bc7631e161a7bdcf7f68e1a46049dcb49c2256 Author: Ben Widawsky Date: Thu May 23 11:09:55 2013 -0700 lib/intel_mmio: Fix the fix I accidently dropped the intel_gen() for the PCI id. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67289 Signed-off-by: Ben Widawsky commit e3e4db93db8b41d8683361931a9da60169575561 Author: Daniel Vetter Date: Thu Jul 25 21:51:27 2013 +0200 tests/sysfs_edid_timing: use real bash The lib/drm_lib.sh load path trick doesn't work otherwise. Tsk. Signed-off-by: Daniel Vetter commit db225aa38dae079c8fb5a95e9fd6ddc5975be466 Author: Daniel Vetter Date: Wed Jul 24 17:04:35 2013 +0200 tests/gem_flink_race: correct thread count They all race against each another, no worker-slave relationship like in the other subtest. Signed-off-by: Daniel Vetter commit bc62a64b8a28a65e6d2586defc29032ca44ab592 Author: Daniel Vetter Date: Wed Jul 24 17:01:11 2013 +0200 tests/gem_flink_race: fix up scanf format Oops, failed to git add. Signed-off-by: Daniel Vetter commit 24bbca9237cbb6bd5e85db839dc517db65e693e8 Author: Daniel Vetter Date: Wed Jul 24 09:46:57 2013 +0200 tests/gem_flink_race: actually make it somewhat useful - Enable subtest support. - Add a check for the same flink name in the racing threads, which is an issue one of my recent patches actually fixes. - Add the test I've actually wanted to write which races an flink against gem close (with no open in between). That one does indeed leak. - Readd the leak check, but note that this needs a fixed kernel. Otherwise the leak counter will be utter garbage. Signed-off-by: Daniel Vetter commit dfe942edec1a713568a19e15ce75e1ed01b9fb08 Author: Daniel Vetter Date: Wed Jul 24 09:31:40 2013 +0200 Revert "tests/gem_flink_race: count leaked objects" This reverts commit bd927662fcfb1443c5982fb04cc694f78e1c8d53. It's bogus. Signed-off-by: Daniel Vetter commit aaeaca77208ef792dcb3fbf97c63e2c0303d7e5e Author: Daniel Vetter Date: Wed Jul 24 08:01:35 2013 +0200 tests/gem_flink_race: check for expected flink failure code Signed-off-by: Daniel Vetter commit bd927662fcfb1443c5982fb04cc694f78e1c8d53 Author: Daniel Vetter Date: Wed Jul 24 07:37:45 2013 +0200 tests/gem_flink_race: count leaked objects And fail the test if the leak count is bigger than 0. Signed-off-by: Daniel Vetter commit 9736fc09e26e6d6a68e85189062d49532a5d95bb Author: Daniel Vetter Date: Wed Jul 24 06:55:10 2013 +0200 tests/gem_flink_race: kill debug printf Oops. Signed-off-by: Daniel Vetter commit 7b5440a09aa7257045c15643ae4b1bea79f90552 Author: Daniel Vetter Date: Tue Jul 23 23:14:57 2013 +0200 tests: add gem_flink_race This exercises a race in the flink name descruction of the current drm gem core. When racing a gem close with a gem open the open can sneak in and cause the kernel to leak the flink name and its reference. This results in leaked gem objects that won't get reaped even at drm file close time. On my 2 core/4 threads snb machine this leaks on the order of 1k objects per second. Signed-off-by: Daniel Vetter commit 8e46c382e359c7a3d465bb1505e7f8b63a7a5952 Author: Daniel Vetter Date: Tue Jul 23 22:43:30 2013 +0200 lib/drmtest: add gem_flink and gem_open Requires us to rename a few things in the gem_flink test to avoid variable shadowing. Signed-off-by: Daniel Vetter commit 5fcb528cb3b9523226486ac9df40850285a75f14 Author: Daniel Vetter Date: Tue Jul 23 21:07:16 2013 +0200 tests: sort tests in Makefile.am and .gitignore Signed-off-by: Daniel Vetter commit 10834f86102e7dae242a0cbda463a2d7543401dd Author: Daniel Vetter Date: Mon Jul 22 09:24:43 2013 +0200 tests/gem_suspend: exercise fence restore code This exercise the bug fixed in commit 94a335dba34ff47cad3d6d0c29b452d43a1be3c8 Author: Daniel Vetter Date: Wed Jul 17 14:51:28 2013 +0200 drm/i915: correctly restore fences with objects attached For fun I've also added a subtest for the inverse transition. Signed-off-by: Daniel Vetter commit 5bc0324e86ac6cf7c67fea929f0f1f48ca9711f9 Author: Daniel Vetter Date: Fri Jul 19 19:08:43 2013 +0200 lib/drmtest: document interface groups with one-liners Signed-off-by: Daniel Vetter commit 89d96a12d61cade801f07e0d78028a613b841978 Author: Ben Widawsky Date: Thu Jul 11 09:59:46 2013 -0700 tests: Basic tools tester Requested-by: Daniel Vetter Signed-off-by: Ben Widawsky commit f801b928826f3a23979bf6e2747611895b1ea9c2 Author: Chris Wilson Date: Sat Jul 20 10:20:52 2013 +0100 test/gem_pread_after_blit: Make the test a little more stressful Extend the simply functionality by repeating it under the rude interrupter and chain together a couple of steps in new test cases. As a compromise for adding more tests, incorporate the piglit subtest framework. commit 7d9dbd1fed62a9c22a616110db105ec7cf76c871 Author: Damien Lespiau Date: Fri Jul 19 17:01:55 2013 +0100 tests: Source drm_lib.sh instead of having its own INTEL_SIMULATION test One code path to maintain is always better. Signed-off-by: Damien Lespiau commit a7c56938c84eb25d8cf95caa125c7bf09e72dc1c Author: Damien Lespiau Date: Fri Jul 19 17:08:57 2013 +0100 tests: Allow a shell test to declare it doesn't need to be DRM master Signed-off-by: Damien Lespiau commit aefc5c63e4c60cba18c3941cafed926e23d114cf Author: Damien Lespiau Date: Fri Jul 19 15:42:20 2013 +0100 lib: Allow users of env_set() to specify a default value So when the environment value isn't set, one can specify the default value to return. Signed-off-by: Damien Lespiau commit 94444aea6eb731dbf4146ec431fa0d4376da8e2f Author: Damien Lespiau Date: Fri Jul 19 16:08:11 2013 +0100 build: Pimp up the configure summary This helps people compiling i-g-t figuring out what can be optional. Signed-off-by: Damien Lespiau commit 2797596432b1e19e7a79ee5dab2e2e9946f2c529 Author: Damien Lespiau Date: Fri Jul 19 16:07:18 2013 +0100 build: Fix automake 1.13 warnings warning: deprecated feature: target 'sr' overrides 'sr$(EXEEXT)' Signed-off-by: Damien Lespiau commit bbce319b2912760f8b4118c250bf2dd6bf4bdc3d Author: Damien Lespiau Date: Fri Jul 19 16:03:49 2013 +0100 build: Fix unbalanced quoting in the python dumper AC_ARG_ENABLE() Signed-off-by: Damien Lespiau commit 54ec3cbdd5ae7f535896c377789c2397a1594c9d Author: Damien Lespiau Date: Fri Jul 19 16:03:29 2013 +0100 build: Fix a small typo in configure.ac Signed-off-by: Damien Lespiau commit 289024b3280c4814da747c3709ae9e220da2a179 Author: Daniel Vetter Date: Fri Jul 19 18:24:59 2013 +0200 lib/drmtest: fix const mismatch warning Signed-off-by: Daniel Vetter commit fc5c6930144dfb33039a0e7359db6268fd70cbd3 Author: Xiong Zhang Date: Fri Jul 19 18:42:52 2013 +0800 tests: add reloc, pread, pwrite slow path subtest the reloc, pread, pwrite slow path will be prevented by prefault, these subtests will disable prefault first, then do reloc, pread, pwrite, finally enable prefault. Signed-off-by: Xiong Zhang commit 7ea2983b119a13f535a9a01fbfd28a05eb3014f2 Author: Xiong Zhang Date: Fri Jul 19 18:42:51 2013 +0800 lib/drmtest: add drmtest_disable/enable_prefault() function V2: add exit handler to enable prefault (Daniel) Signed-off-by: Xiong Zhang commit 161e610765b0b590a93c5a69468bc75f726c3f1b Author: Damien Lespiau Date: Thu Jul 18 12:23:49 2013 +0100 tests: Add some tiled tests to the runs on simulation Signed-off-by: Damien Lespiau commit 00ab9a1313997f6292f064989b2c295d3fb2903b Author: Damien Lespiau Date: Thu Jul 18 11:53:55 2013 +0100 tests: Instrument gem_seqno_wrap to run in simulation Signed-off-by: Damien Lespiau commit 204df6679814d67d0d932f9e60382f660dca915c Author: Damien Lespiau Date: Thu Jul 18 11:36:56 2013 +0100 tests: Instrument gem_lut_handle for simulation Signed-off-by: Damien Lespiau commit d1e862324b747a0ab5d985eaa6830076817231c5 Author: Damien Lespiau Date: Mon Mar 25 20:06:20 2013 +0000 tests: Instrument tests run in simulation to run quickly We tweak the tests marked as runnable in simulation to run more quickly, more often then not at the expense of stress testing (which is of an arguable interest for the initial bring up in simulation). Hopefully the values chosen still test something, which is not always straightforward. It does run quickly, the number on an IVB machines are: $ time sudo IGT_SIMULATION=0 ./piglit-run.py tests/igt.tests foo [...] real 2m0.141s user 0m16.365s sys 1m33.382s Vs. $ time sudo IGT_SIMULATION=1 ./piglit-run.py tests/igt.tests foo [...] real 0m0.448s user 0m0.226s sys 0m0.183s Signed-off-by: Damien Lespiau commit 5fa15f79d00ba4f51f35cb83cf2e82a9460b60b2 Author: Damien Lespiau Date: Mon Apr 29 18:40:39 2013 +0100 tests: Black list tests we don't want to run on simulation Let's start by a small set of tests, to eventually consider running more. The current list should then be: gem_mmap gem_pread_after_blit gem_ring_sync_loop gem_ctx_basic gem_pipe_control_store_loop gem_storedw_loop_render gem_storedw_loop_blt gem_storedw_loop_bsd gem_render_linear_blits gem_tiled_blits gem_cpu_reloc gem_exec_nop gem_mmap_gtt v2 add (Daniel Vetter) gem_exec_bad_domains gem_exec_faulting_reloc gem_flink gem_reg_read gem_reloc_overflow gem_tiling_max_stride prime_* Signed-off-by: Damien Lespiau commit cf4efd15977d5849fbe091e7992bf94e80129c19 Author: Damien Lespiau Date: Thu Jul 18 14:49:46 2013 +0100 lib: Remove old dead code intel_batchbuffer_emit_mi_flush() Signed-off-by: Damien Lespiau commit 4b3476559436ca26d54b30dd90fc999adc304728 Author: Damien Lespiau Date: Mon Apr 29 16:04:52 2013 +0100 lib: Introduce drmtest_skip_on_simulation() This will allow us to explicitely blacklist tests we don't want to run on simulation. Signed-off-by: Damien Lespiau commit c25e892ec339660a5a0c3e0f995a2ce3cbe92135 Author: Damien Lespiau Date: Mon Mar 25 17:25:14 2013 +0000 lib: Rename IGT_QUICK to INTEL_SIMULATION It's more accurate this way as the quick mode is really useful for in the simulation environment. v2: Use the INTEL_ prefix to have a chance to share the same environment variable as piglit OpenGL tests Signed-off-by: Damien Lespiau commit 0193b69e1480707cd66b532a1d9c31bedb03748b Author: Damien Lespiau Date: Wed Jul 17 16:25:29 2013 +0100 build: Depend on cairo 1.12.0 for CAIRO_FORMAT_RGB30 We've somewhat recently added RGB30 support to testdisplay, but we need cairo 1.12.0 for that. Barf early. Signed-off-by: Damien Lespiau Signed-off-by: Daniel Vetter commit edee952e6af1903d710ee3e2e0b90c03b072f3e3 Author: Mika Kuoppala Date: Fri Jul 12 17:02:04 2013 +0300 tools/inter_error_decode: decode for ctl and acthd Signed-off-by: Mika Kuoppala Signed-off-by: Daniel Vetter commit 05cc515f3a9782fdf7e1553df61437db51625ea0 Author: Daniel Vetter Date: Mon Jul 15 11:55:09 2013 +0200 tests/prime_nv_api: check multiple foreign imports with flink We want prime to only ever create one native gem object for each dma-buf it sees. This can e.g. happen if multiple processes import the same foreign dma-buf, e.g. the application imports a yuv frame from v4l to encode it into a video stream and the compositor imports it into his fd again to display it with an overlay. Hence add a bunch of tests which check all the various orders in which this could happen. Currently they all fail. Checking flink names is the easiest (and afaik only) way to check whether we're indeed dealing with the same object. This checks both ways, i.e. exporting from i915 and from nouveau, each with two variants of the test: One reuses the prime fd, the other closes it and creates a new one. Signed-off-by: Daniel Vetter commit d64a9458b26794cb85314a145581376cf128bc08 Author: Daniel Vetter Date: Mon Jul 15 11:12:31 2013 +0200 test/prime_nv_test: use gem drmtest functions for pread/pwrite Different argument order, otherwise the same. Signed-off-by: Daniel Vetter commit bc1a85e813268160816761f021cf989eb049934c Author: Daniel Vetter Date: Mon Jul 15 11:09:57 2013 +0200 test/prime_nv_test: nicer test names Signed-off-by: Daniel Vetter commit 4a9d50db1ba6e2733020ca35c0e5c43ae3bce4da Author: Daniel Vetter Date: Mon Jul 15 11:04:20 2013 +0200 test/prime_nv_api: more descriptive subtest names Preprocessor magic ftw! Signed-off-by: Daniel Vetter commit 1a3c7e349389bbb28bbf98b4738ab32c3cacd756 Author: Daniel Vetter Date: Mon Jul 15 10:59:55 2013 +0200 tests/prime_nv_api: Drop bogus check from import-twice It's purely accidental that importing that same bo to different drm nouveau fds yields the same handle. Signed-off-by: Daniel Vetter commit c28b898cd48f389f5f830ae1fdbeeccbcef5a5af Author: Daniel Vetter Date: Mon Jul 15 10:51:10 2013 +0200 tests/prime_nv_api: convert to subtest infrastructure Signed-off-by: Daniel Vetter commit b37d89318de5b5e771ad065bb7b55102f6800391 Author: Chris Wilson Date: Fri Jul 12 10:05:34 2013 +0100 tests/gem_write_ring_switch: Skip on pre-SNB The test requires MI commands only introduced with SNB, and so causes GPU death on gm45 and ilk. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66838 commit 7dbc43f27af6731c8b8d92c1bdcc046466c27ab3 Author: Chris Wilson Date: Fri Jul 12 09:54:55 2013 +0100 tests/gem_write_read_ring_switch: Repeat under rude interrupter Another waiter that will then be subject to being interrupted, so retest the ring switches with the rude interrupter. commit 9ee41661de50e5e6a602c2ff8ff919b9b34bb370 Author: Daniel Vetter Date: Wed Jul 10 15:35:13 2013 +0200 tools/quickdump: gitignore generated files Signed-off-by: Daniel Vetter commit 727440c48a6d247591d9cfc3af53e6f2e2b1b7f9 Author: Daniel Vetter Date: Wed Jul 10 15:34:56 2013 +0200 tests: actually add gem_write_read_ring_switch Duh ... Signed-off-by: Daniel Vetter commit 21c0ab30a144a2d236221be86a8947c5ce19101c Author: Daniel Vetter Date: Wed Jul 10 10:35:10 2013 +0200 test: add gem_write_read_ring_switch This is meant to exercise the bug fixed in https://patchwork.kernel.org/patch/2825192/ Signed-off-by: Daniel Vetter commit 037847a102ba5eb35977fe21b3b02efd546185ed Author: Daniel Vetter Date: Tue Jul 9 23:04:20 2013 +0200 tools/intel_reg_dumper: fix up END register I'm full of fail ... Signed-off-by: Daniel Vetter commit d3221334d29f31d140b7bb64ba955701e59a1bf2 Author: Daniel Vetter Date: Tue Jul 9 10:46:09 2013 +0200 tools/intel_reg_dumper: add gen6+ fences Signed-off-by: Daniel Vetter commit 79b3029fe8c5c9d8d4428b639f458305887ceac3 Author: Chris Wilson Date: Thu Jul 4 01:11:05 2013 +0100 gem_(tiled|linear)_blits: s/interrutible/interruptible/ Spelling fix in "interruptible" subtest name. commit db94faede57be86e4f4dbefaf2c1ea24f44acae1 Author: Daniel Vetter Date: Thu Jul 4 01:50:55 2013 +0200 tests/kms_flip: don't run blocking relateve vblank waits with interrupts They simply take forever with the current kernel implementation. And since everyone switched over to the event based interface I don't see much incentive to try to fix that. So just disable them. Signed-off-by: Daniel Vetter commit a7e7d08513a46eb721e708e7c9f0520edf265085 Author: Paulo Zanoni Date: Wed Jul 3 14:42:48 2013 -0300 intel_reg_dumper: enable the power well The intel_reg_dumper tool reads a lot of display registers. If we don't turn on the power well, dmesg will get flooded with tons of messages about unclaimed registers. So here we enable the "Debug" power well register and then restore its state later. It's impossible to guarantee that other things won't mess with the debug register between our put and get calls, but at least we're trying our best to keep things working fine, and it's the debug register anyway. As far as I know, nothing else uses the Debug register for anything, so we should be safe for now. Signed-off-by: Paulo Zanoni commit a1ca6f9ca5286b1f5ffa60eb590667871d655a09 Author: Paulo Zanoni Date: Wed Jul 3 14:13:34 2013 -0300 lib: fix WM_DBG register address Signed-off-by: Paulo Zanoni commit c013bb02e653f53e9033fe3d95e8204587e499a8 Author: Paulo Zanoni Date: Tue May 7 12:53:52 2013 -0300 intel_reg_dumper: add hsw_debug_lp_wm Signed-off-by: Paulo Zanoni commit c6cec844f95e3fbd4b140586c2453916328b7aa4 Author: Chris Wilson Date: Wed Jul 3 10:02:27 2013 +0100 Make the failure message for drm_open_any() more specific Do not suggest retrying as root if we already are. commit 9eb7d8950c199b9f4d93f3434aac9aa51c69d242 Author: Chris Wilson Date: Wed Jul 3 09:58:28 2013 +0100 Avoid corrupting the exitcode with a failure to open a quiescent fd In the atexit handler, we attempt to quiesce the GPU. This involves opening a fd - which will fail if the test is not being run as root and will obliterate the test status and pollute the output. commit 9360df4ab33697b6a64ed8ec05d84564c784d607 Author: Daniel Vetter Date: Wed Jul 3 08:47:34 2013 +0200 tests/gem_linear|tiled_blits: convert to subtests Finer granularity for nightly runs and regression reporting is always nice. Signed-off-by: Daniel Vetter commit bc388b54d4325669bfffef314c6f18349c239a1c Author: Chris Wilson Date: Wed Jul 3 08:10:28 2013 +0100 drm_lib.sh: Be more precise in detecting the i915 /sys path We need to be careful in case other devices grow an error file in the future. The first step here is just to check the minor that corresponds with the debugfs path found for the device commit e50ae9596c544c3cca0f32c5eba94c655a1ebcd2 Author: Chris Wilson Date: Wed Jul 3 08:00:13 2013 +0100 tests/hangman: Be lenient towards a non-existent sysfs error state As /sys/class/drm/cardX/error is a new interface for 3.11, we need to be quiet when it does not exist or else we upset the automated tests. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66533 commit ae452e327aa8dab739ca521e924a9ac9fcc506cf Author: Chris Wilson Date: Tue Jul 2 11:24:57 2013 +0100 tests/gem_(linear|tiled)_blits: Repeat whilst being interrupted Since these two tests exercise a working set larger than aperture, they require stalls which are prone to being interrupted - so interrupt them and check that everything still works. commit faf2a0223cb8655e7ac826592b50ad4e08ec04ee Author: Daniel Vetter Date: Tue Jul 2 09:13:57 2013 +0200 tests/drm_lib.sh: Don't die if the sysfs path can't be found That just means that the sysfs error file isn't there. Signed-off-by: Daniel Vetter commit 3f93e1bc74850ded734e8667674d83711a26c19c Author: Daniel Vetter Date: Tue Jul 2 09:09:56 2013 +0200 test/drm_lib.sh: Updated sysfs error filename I've forgotten to bikeshed that part ... Signed-off-by: Daniel Vetter commit 857b464b34d8deb4f1676a40b1c75da357614df7 Author: Mika Kuoppala Date: Fri Jun 28 14:35:41 2013 +0300 tests/ZZ_hangman: Test both error_state interfaces Test both debugfs and sysfs error_state interfaces. v2: sysfs error_state not mandatory Signed-off-by: Mika Kuoppala [danvet: Update sysfs file name.] Signed-off-by: Daniel Vetter commit 6fd652ac1db1b572af6cc4a040ca357707503f5b Author: Mika Kuoppala Date: Thu Jun 27 16:54:43 2013 +0300 tests: add i915_sfs_path To access 'error_state' through sysfs. Signed-off-by: Mika Kuoppala Signed-off-by: Daniel Vetter commit 3743a0b994a4e6035d9370ec658b70e0a8528c4a Author: Mika Kuoppala Date: Thu Jun 27 16:54:42 2013 +0300 tests: rename debugfs base path to be more specific In preparation to have sysfs entries used in scripts rename to more specific name. Signed-off-by: Mika Kuoppala Signed-off-by: Daniel Vetter commit 4541cbeba4fdd71c7e0a14d0803fa4f7ef345696 Author: Chris Wilson Date: Mon Jul 1 12:24:55 2013 +0100 tests/kms_flip: Repeat all of the tests whilst being rudely interrupted Once upon a time, our modesetting code used to fail if it was interrupted. So lets make sure that never happens whilst flipping. commit b84b9e230c40d8ebfe834f2965c868a88016cffb Author: Ville Syrjälä Date: Wed Jun 26 20:57:34 2013 +0300 quick_dump: Add VLV DPIO registers Add the names of all VLV DPIO registers. v2: Use the third element to signal DPIO registers, and split the code changes to a separate patch Signed-off-by: Ville Syrjälä Signed-off-by: Ben Widawsky commit e87c2536f6e19dfd77fc2ede2a5a63e2675ff077 Author: Ville Syrjälä Date: Wed Jun 26 20:57:33 2013 +0300 quick_dump: Document the register definition format Add a small comment about what the elements in the register tuple mean. Signed-off-by: Ville Syrjälä Signed-off-by: Ben Widawsky commit de92969a402da1ae070ca76efd8721138f46f376 Author: Ville Syrjälä Date: Wed Jun 26 20:57:32 2013 +0300 quick_dump: Add automagic DPIO register support Repurpose the (currently unused) third element in the register definition tuple to indicate the type of the register. 'DPIO' is the only special register type for now. Signed-off-by: Ville Syrjälä Signed-off-by: Ben Widawsky commit 26af13f84fe2e1244b91760870d3763f978d3c30 Author: Daniel Vetter Date: Sat Jun 29 18:31:45 2013 +0200 lib/drmtest: set default sighandler for QUIT in the signal process Otherwise the thing doesn't reliably die when run from the piglit framework somehow. Signed-off-by: Daniel Vetter commit 64ff612b81c29de3f808a55f2010e99924a10191 Author: Daniel Vetter Date: Sat Jun 29 17:50:49 2013 +0200 tests/gem_cpu_concurrent_blit: stop signal helper again Not doing so totally upsets the piglit igt runner since we leave a bunch of zombies behind. Signed-off-by: Daniel Vetter commit 13932d67de1ab11f768782138ea88a00fc2ff4a5 Author: Chris Wilson Date: Sat Jun 29 17:17:52 2013 +0100 tests/gem_cpu_concurrent_blit: Restore lost intel_copy_bo() Accidentally replaced the intel_copy_bo() with the set_bo() in the "overwrite-source" in 4fd34977aff60f58cd955eb9c2d568d5fb824611 when clearly I wanted to simply add the calls to set_bo() first. Signed-off-by: Chris Wilson commit b1f23fe1d475ee99f77a96e29f5a8d54d4d2c6fc Author: Chris Wilson Date: Sat Jun 29 17:09:21 2013 +0100 tests/gem_cpu_concurrent_blit: Undo debugging hack Accidentally left in the hack to run the "overwrite-source-interruptible" for only one loop, used whilst testing. Signed-off-by: Chris Wilson commit 4fd34977aff60f58cd955eb9c2d568d5fb824611 Author: Chris Wilson Date: Sat Jun 29 17:05:24 2013 +0100 test/gem_(cpu|gtt)_concurrent_blit: Move the set_bo() from create to the test Hiding the initial set_bo() required for the "overwrite-source" tests lead to a nice bit of hilarity as I missed repeating the initialisation for the multiple loops of the interruptible version of "overwrite-source". Signed-off-by: Chris Wilson commit 4c6f2d4e0c10fe3aa6ee8fffee1541f03cd9fa48 Author: Chris Wilson Date: Sat Jun 29 16:45:46 2013 +0100 tests/gem_(cpu|gtt)_concurrent_blit: Restore the old tests and add the new interruptible as new tests Daniel preferred to keep the old tests intact lest we accidentally break them, and to add the new interruptible tests as new subtests. In the process also make sure the GPU is idle before starting each loop. Signed-off-by: Chris Wilson commit 95426dc206eee75a7092bc6f00a53572892ba0e5 Author: Chris Wilson Date: Sat Jun 29 16:15:38 2013 +0100 tests/gem_(cpu|gtt)_concurrent_blit: Enable signals In order to exercise the bug behind: commit 22fd5ca947b58901927d100d2b1aa0f1672b3435 Author: Chris Wilson Date: Fri Jun 28 16:54:08 2013 +0100 drm/i915: Only clear write-domains after a successful wait-seqno we need to check for concurrent access with the potential to be interrupted by a signal. The framework for doing so is already in place, so just enable it and repeat the tests for longer to give better chance of being interrupted at just the wrong moment. Signed-off-by: Chris Wilson commit ebfd01908f787876040a679fc7895828b23d268d Author: Chris Wilson Date: Thu Jun 27 19:58:57 2013 +0100 tests/gem_lut_handle: Quit when we hit ENOSPC I'd been working under the falsehood that we would always generate an error for an invalid reloc->target_handle before reserving any object. However, only the execlist is checked up front for validity before reservation so ENOSPC is a genuine error condition raised by the test. Fix it so that we stop reporting that limit as a test failure. Signed-off-by: Chris Wilson Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65391 commit 60e3930987134ff855cb24dd1021eb5225b18857 Author: Chris Wilson Date: Mon Jun 24 13:53:44 2013 +0100 tests/gem_lut_handle: Simplify creation of broken handles Limit the broken handles to UINT32_MAX-4096 so that we can be sure that they do not alias with a valid handle. References: https://bugs.freedesktop.org/show_bug.cgi?id=65391 Signed-off-by: Chris Wilson commit 6de9736394242f207a43e828a8236e4f63c16e03 Author: Chris Wilson Date: Mon Jun 24 12:03:54 2013 +0100 tests/kms_flip: Suppress failure from setting mode We may fail to set a mode if it fails some hidden constraints, such as bandwidth on the third pipe. This is expected, so skip testing such modes. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66111 Signed-off-by: Chris Wilson commit fc6621f5f96f64a3d5ec7b36c64c8d110e99217d Author: Ben Widawsky Date: Sun Jun 23 16:12:51 2013 -0700 m4/ax_python_devel: Update to upstream Signed-off-by: Ben Widawsky commit d2048819b9db8781c65399f28696f375448a03e6 Author: Chris Wilson Date: Fri Jun 21 16:52:53 2013 +0100 kms_render: Skip unsupported display configurations Certain modes may not be supported by certain combinations of pipes. This is impossible to determine upfront, and we await an atomic modesetting query operation. In the meantime, if we fail to set a mode, just skip that test. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66000 commit e56754965fad7c53130cecd26a91b841e22a8ab9 Author: Chris Wilson Date: Wed Jun 19 14:19:07 2013 +0100 gem_lut_handle: Print some more information upon failure References: https://bugs.freedesktop.org/show_bug.cgi?id=65391 commit 5bb0897f73b2e42a32338432ae198289f6f8b91c Author: Jani Nikula Date: Tue Jun 4 15:42:15 2013 +0300 quick_dump: vlv mipi dsi register support Signed-off-by: Jani Nikula Signed-off-by: Ben Widawsky commit 67a4ea0ee1ebd3959fe9de9a2849671b97983d9d Author: Imre Deak Date: Fri Jun 7 21:29:02 2013 +0300 lib: fix drm_fourcc.h include path Signed-off-by: Imre Deak commit 9d8fc1957c8cccb6875264334cd67bb24c6e7c54 Author: Chris Wilson Date: Fri Jun 7 11:44:40 2013 +0100 gem_lut_handle: Avoid using a valid handle when testing BROKEN commit 17523ef7bfae5a98f061e13916f25f64eacfb835 Author: Damien Lespiau Date: Thu Jun 6 16:52:09 2013 +0100 list-workarounds: Some workarounds start with WA, not Wa Signed-off-by: Damien Lespiau commit 528b1f381c4e67c2e63e23b5597070fffe8033d6 Author: Imre Deak Date: Thu May 30 22:59:59 2013 +0300 tests: add kms_render Add a test going through all connectors/crtcs/modes/formats painting to a front FB with CPU or painting to a back FB with CPU and blitting it to the front FB. Only formats understood by cairo are supported for now. Signed-off-by: Imre Deak Reviewed-by: Rodrigo Vivi commit f68d964c57c9229cad7321463e40f14b3974ec5d Author: Imre Deak Date: Fri May 24 17:26:54 2013 +0300 lib: refactor kmstest_create_fb Factor out parts that will be used by an upcoming patch adding kmstest_create_fb2. Also call the fb paint functions directly, there is not much point in passing a function pointer for that. Signed-off-by: Imre Deak Reviewed-by: Rodrigo Vivi commit bfb0cdd668e6ecea56125586f5ddf1cf62cc0383 Author: Imre Deak Date: Fri May 31 00:21:43 2013 +0300 lib: add kmstest_get_connector_config This is used by multiple test cases, so make it shared. Signed-off-by: Imre Deak Reviewed-by: Rodrigo Vivi commit 334baf05ca4f90a49a86893a702f4cd1270a8dbb Author: Imre Deak Date: Wed Jun 5 22:11:11 2013 +0300 lib: use kmstest_cairo_printf_line in paint_marker Signed-off-by: Imre Deak Reviewed-by: Rodrigo Vivi commit 542a40c485361909a40830ffd2421082a0e85c89 Author: Imre Deak Date: Thu May 30 15:03:48 2013 +0300 lib: add kmstest_cairo_printf_line Signed-off-by: Imre Deak Reviewed-by: Rodrigo Vivi [v3: fix mode printing in paint_output_info() botched by debugging leftover :/ ] commit 3a2aed1f30ea0e4373fa93eab8cb33cd8dd98670 Author: Imre Deak Date: Thu May 30 22:53:53 2013 +0300 lib: move connector_type_str and co to drmtest These are used by multiple test cases, so make them shared. Signed-off-by: Imre Deak Reviewed-by: Rodrigo Vivi commit 18bf2e6b343512cf829e8ff8eebd0958bbb59b51 Author: Rodrigo Vivi Date: Mon May 13 17:54:12 2013 -0300 intel_chipset: Adding more reserved PCI IDs for Haswell. At DDX commit Chris mentioned the tendency we have of finding out more PCI IDs only when users report. So Let's add all new reserved Haswell IDs. Bugzilla: http://bugs.freedesktop.org/show_bug.cgi?id=63701 Signed-off-by: Rodrigo Vivi Acked-by: Kenneth Graunke commit 0476c646fa44f017e47030afca0525bccf16a3ae Author: Rodrigo Vivi Date: Mon May 13 17:54:11 2013 -0300 intel_chipset: Fix Haswell GT3 names. When publishing first HSW ids we weren't allowed to use "GT3" codname. But this is the correct codname and Mesa is using it already. So to avoid people getting confused why in Mesa it is called GT3 and here it is called GT2_PLUS let's fix this name in a standard and correct way. Signed-off-by: Rodrigo Vivi Reviewed-by: Kenneth Graunke commit f1e9e300fa82181182e2e92ccce078682829a3a2 Author: Chris Wilson Date: Wed Jun 5 11:10:04 2013 +0100 gem_lut_handle: Make the error checking explicit for LUT handling What this test is interested in is the handling of the LUT for very large arrays, irrespective of whether such batch are actually executable. So adjust the pass/fail checks to be explicit in the error they are looking for, so that we do not conflate memory/aperture pressure as a failure in the LUT API. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65391 Signed-off-by: Chris Wilson commit 2e1c11546a4aa69c1e774aaa653bb9d84552e133 Author: Chris Wilson Date: Thu May 30 08:37:48 2013 +0100 gem_reg_read: Only check errno after a definite error As upon success, errno is invalid and may give spurious false results. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65157 Signed-off-by: Chris Wilson commit 1cb4f90946289457c3b92773f2ce96b0b03e4a22 Author: Imre Deak Date: Tue May 28 17:35:32 2013 +0300 tests/lib: make sure the GPU is idle at test start and exit Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=64270 v2: - Make sure also that the GPU is idle at start and error exit of any test using drm_open_any(). (Daniel) v3: - actually call gem_quiescent_gpu() at exit Signed-off-by: Imre Deak Signed-off-by: Daniel Vetter commit a3b47dbe69deebcaf353876feaefa105136dad05 Author: Imre Deak Date: Tue May 28 17:22:57 2013 +0300 lib: make sure all rings are idle in gpu_quiescent_gpu() Signed-off-by: Imre Deak Signed-off-by: Daniel Vetter commit 55876338fa2bc37f632a8ca970b3573541cacc38 Author: Ben Widawsky Date: Thu May 23 11:16:52 2013 -0700 quick_dump: fix text file I accidentally pushed commit a08d62257dbdc8f4d3f5e655e0ba7bd192af37ff Author: Ben Widawsky Date: Thu May 23 11:03:25 2013 -0700 quick_dump: Add CCID before I was ready, in order to get the mmio fix in. This fixes a parse error in quick_dump. Signed-off-by: Ben Widawsky commit 57bc7631e161a7bdcf7f68e1a46049dcb49c2256 Author: Ben Widawsky Date: Thu May 23 11:09:55 2013 -0700 lib/intel_mmio: Fix the fix commit 16e44f5499e1754dfb10fc62b22675f5aa6ac781 Author: Daniel Vetter Date: Wed Apr 3 00:22:41 2013 +0200 lib: fixup register access on gen2/3 THis fix was incorrect for a few reasons: 1. It didn't reflect the state in mmio_data.safe 2. It skipped forcewake on gen6+ which is both incorrect and unnecessary (for gen<6). 3. It had 2 goto done, the second of which was impossible to hit. Signed-off-by: Ben Widawsky commit a08d62257dbdc8f4d3f5e655e0ba7bd192af37ff Author: Ben Widawsky Date: Thu May 23 11:03:25 2013 -0700 quick_dump: Add CCID Signed-off-by: Ben Widawsky commit 81ba005381f06283e072a5a5cffd429c83651c53 Author: Damien Lespiau Date: Thu May 23 12:11:26 2013 +0100 list-workarounds: Don't prepend kernel_path to the driver directory We are changing the cwd, so we just need the relative patch from the root for the kernel git repo. This allows the script to work from anywhere. Signed-off-by: Damien Lespiau commit 1109c5acfd58d6f5d7c4b0f1d9961fdc3bfc7732 Author: Ben Widawsky Date: Wed May 22 16:15:04 2013 -0700 quick_dump: Add basic haswell support Mostly using the IVB registers + a few I grabbed from i915_reg.h Signed-off-by: Ben Widawsky commit 099a92ea28d3bceffaebf7d65ae5a9219038ae0e Author: Ben Widawsky Date: Wed May 22 15:54:53 2013 -0700 quick_dump: Add more ring registers START + CTL (and reorder them in the file) Signed-off-by: Ben Widawsky commit 160feafa2dc3616a0731f600919056ba62581bf6 Author: Matt Turner Date: Mon Apr 29 10:58:26 2013 -0700 assembler: Add support for the SENDC instruction. Reviewed-by: Damien Lespiau commit 7fcd94b286dc7ef3dac362f97ce8f6de49b71735 Author: Imre Deak Date: Wed May 22 17:40:48 2013 +0300 kms_flip: add subtests for the DPMS OFF->modeset->flip sequence Add a double buffer and a single buffer version of the above sequence, to check if the modeset does a DPMS ON. Tested on IVB, with and without the relevant kernel fix, got the expected results. Signed-off-by: Imre Deak Signed-off-by: Daniel Vetter commit 404f353394ab2e5b8ca55c519ba706ca7d33250c Author: Imre Deak Date: Wed May 22 17:40:47 2013 +0300 kms_flip: do a DPMS ON when exiting with error Currently when exiting with error, we'll get stuck in a DPMS OFF state if the error happens while we have DPMS OFF set in the test sequence. This happens even though we switch back to text mode at exit. This might be a bug in itself to be fixed later, but in any case we want a working console, so do an explicit DPMS ON. Signed-off-by: Imre Deak Signed-off-by: Daniel Vetter commit bce7d8a06133f1d92ca99acae23ff498552ad327 Author: Imre Deak Date: Wed May 22 17:40:46 2013 +0300 lib: export the exit handler interface Signed-off-by: Imre Deak Signed-off-by: Daniel Vetter commit 4dec89aef746a60a98a1b93823e79b51a5a8a3c6 Author: Imre Deak Date: Wed May 22 17:40:45 2013 +0300 lib: fix exit handler when multiple handlers are registered Signed-off-by: Imre Deak Signed-off-by: Daniel Vetter commit 0e8931925d725317d34bfbe0ba48b52b67ec7859 Author: Ben Widawsky Date: Fri May 10 15:25:49 2013 -0700 list-workarounds: Convert to python3 The rest of the tool suite that uses python already uses python3. The tool configure requires python >= 3 (which is confusing because of the no backward compat problem). The world is slowly moving to python3. Converted with 2to3. Reviewed-by: Damien Lespiau Reviewed-by: Kenneth Graunke Signed-off-by: Ben Widawsky commit 397dcb745ec517eb116694575ac159242bc179bd Author: Damien Lespiau Date: Fri May 10 14:37:10 2013 +0100 list-workarounds: Don't add an already present platform Currently if we come across several sites that say that a specific workaround is implemented for a platform, we just add the platform several times to the list. eg. WaFbcDisableDpfcClockGating: ivb, hsw, ivb, hsw This patch prevent that by only adding the plaform if it's not already there. Signed-off-by: Damien Lespiau commit eab0823e0e58c4a4ca09410a1aa22689b0de85d8 Author: Damien Lespiau Date: Fri May 10 13:41:32 2013 +0100 ddi_compute_wrpll: Do not use a double constant Otherwise the expression will be promoted to a floating point multiplication Signed-off-by: Damien Lespiau commit 3b793606421fda9ae6d58dfc253eba24edd944a3 Author: Damien Lespiau Date: Thu May 2 16:38:30 2013 +0100 ddi_compute_wrpll: Factor out a common expression Signed-off-by: Damien Lespiau commit 4897ac41da1bc14e4cc34c2914722a78dc977b5a Author: Damien Lespiau Date: Thu May 2 16:33:56 2013 +0100 ddi_compute_wrpll: Rework the logic around r2 and n2 a bit Let's not use the 2K variants of the frequencies it does not help in anything here and the explanations are hopefuly more understandable this way. On top of that, I noticed that we can just compute the desired min/max boundaries for r2 and n2, so use that instead of the two tests to discard out of range values. Signed-off-by: Damien Lespiau commit bb1dfd5613256e516c86521cac806b4dd227b750 Author: Damien Lespiau Date: Thu May 2 15:21:51 2013 +0100 ddi_compute_wrpll: Fix the reference for 222525Khz and 296703Khz Assume that the budget for those frequencies were tuned after the reference table was created. Signed-off-by: Damien Lespiau commit a59b0cd01d84ba4df03b4442e2b336c3c073a549 Author: Damien Lespiau Date: Thu May 2 15:11:49 2013 +0100 ddi_compute_wrpll: Fix the reference table for 37762500Hz The 5 was lost when stored in KHz. Signed-off-by: Damien Lespiau commit 8cf09e5ed4860d5d351588414bac0765e22b9b3f Author: Damien Lespiau Date: Thu May 2 14:51:41 2013 +0100 ddi_compute_wrpll: Code the reference frequencies in Hz Because the reference frequencies were stored in KHz, we've lost precision for 37762500Hz and the test is failing. Let's express the reference frequencies in Hz then. Signed-off-by: Damien Lespiau commit 0be2723c3045d04f6970add4214713af697e73df Author: Damien Lespiau Date: Tue Apr 30 17:42:15 2013 +0100 tools: Add a standalone tool to test the computation of r,n,p for WRPLLs Signed-off-by: Damien Lespiau commit 3d9beff623f26de2847f38650c2dbfdff5bf93a7 Author: Daniel Vetter Date: Thu May 9 17:17:04 2013 +0200 tests: fix script testlist Oops. This has been broken since: commit d798ab9c2a092a08e14c6f2dfb1777376ba407a8 Author: Daniel Vetter Date: Tue Dec 18 22:55:58 2012 +0100 tests: add testcase to check igt runtime enviroment commit 01b408e43a50415c8d979c52c1b732785c1327ea Author: Imre Deak Date: Wed May 8 19:06:44 2013 +0300 testdisplay: set VT graphics mode Signed-off-by: Imre Deak Signed-off-by: Daniel Vetter commit 0009a4af3d76ada8df86ec012736792d0543fb08 Author: Imre Deak Date: Wed May 8 19:06:43 2013 +0300 kms_flip: set VT graphics mode This is one reason for some of the sporadic kms_flip failures. One such is https://bugs.freedesktop.org/show_bug.cgi?id=59834. v2: - use unsigned long for KDSETMODE/KDGETMODE - fix passing the parameter to KDGETMODE as it should be by value - actually testing that it works.. v3: - don't do an explicit DPMS_ON, only switch to graphics mode. v4: - use the newly added drmtest_set_vt_graphics_mode(), which will also take care of restoring the original mode. (Daniel) Signed-off-by: Imre Deak Signed-off-by: Daniel Vetter commit cf26435be80232a30de918f6b231ffb7e3b30ee4 Author: Imre Deak Date: Wed May 8 19:06:42 2013 +0300 lib: add helper to set VT graphics mode Signed-off-by: Imre Deak Signed-off-by: Daniel Vetter commit d2f7a66fee4fa5e3b011866c0dcb30d77f20d4e5 Author: Imre Deak Date: Wed May 8 19:06:41 2013 +0300 kms_flip: suppress uninitialized var warning Signed-off-by: Imre Deak Signed-off-by: Daniel Vetter commit cc6c254ae91bf633ac0ff5851ba2593ded13ec45 Author: Damien Lespiau Date: Mon Apr 29 19:05:27 2013 +0100 reg_dumper: Shut a warning down Signed-off-by: Damien Lespiau commit 6587f66ff3fcddca443e4ed9da7f58c54d2401a5 Author: Damien Lespiau Date: Mon Apr 29 18:57:47 2013 +0100 lib: Add the declaration of intel_register_access_needs_fakewake() Otherwise gcc complains that the function hasn't been declared. commit ec3e7a66f0511a7089d87b63d09d3371a52e3156 Author: Damien Lespiau Date: Mon Apr 29 15:51:59 2013 +0100 Update .gitignore files with the new tests and tools Also sort them. Signed-off-by: Damien Lespiau commit f5f6036bbea88e652ace24ad8e81173877bffa70 Author: Damien Lespiau Date: Mon Apr 29 14:53:07 2013 +0100 lib: Remove the execution bit of intel_chipset.h commit 6a82b68e3689e5a5d67fa39aaa0dcf97cb632107 Author: Damien Lespiau Date: Tue Mar 26 15:14:56 2013 +0000 build: Make grep silent when running make test -q will prevent grep from writing to stdout and print "root" when make test is running as root. Signed-off-by: Damien Lespiau commit 7e9fd56873aba26a196c18d233d8ea40a9f0eac3 Author: Damien Lespiau Date: Mon Mar 25 17:15:50 2013 +0000 README: Reword a few sentences To be a bit more correct (they were understandable though). Signed-off-by: Damien Lespiau commit b9765af636510fe0896c8e1648a4cd003cd91ca1 Author: Damien Lespiau Date: Fri May 3 16:08:25 2013 +0100 scripts: Add a script to list implemented workarounds We document the implemented workarounds with workaround_name:platforms with platforms being a comma separated list of 3-letters platform names. This scripts gather those tags and output a summary of implemented work arounds. Example usages: $ ./scripts/list-workarounds ~/gfx/sources/linux-2.6/ WaApplyL3ControlAndL3ChickenMode: hsw, ivb, vlv WaCatErrorRejectionIssue: hsw, ivb, vlv WaDisable4x2SubspanOptimization: hsw, ivb WaDisableBackToBackFlipFix: ivb, vlv WaDisableDopClockGating: vlv .... $ ./scripts/list-workarounds ~/gfx/sources/linux-2.6/ -p ivb WaApplyL3ControlAndL3ChickenMode WaCatErrorRejectionIssue WaDisable4x2SubspanOptimization WaDisableBackToBackFlipFix WaDisableEarlyCull ... Signed-off-by: Damien Lespiau commit a417ef7cc8ebe01a3198849db8cf9e6896c54a0b Author: Zhong Li Date: Fri May 3 15:55:34 2013 +0800 i-g-t: gem_dummy_reloc_loop.c: add vebox test case Aside from adding VEBOX support, this test allows allows the "mixed" test case variant to work on platforms that have 2 rings which was previously not the case. To the best of my memory, this might therefore impact G45, and Ironlake. Signed-off-by: Zhong Li [Ben: added commit message, remove num_rings = 1, s/LOCACL/LOCAL] Signed-off-by: Ben Widawsky commit 8ddf84d1295925a831f4e37a33308aa7cb3c0e94 Author: Zhong Li Date: Fri May 3 15:54:48 2013 +0800 i-g-t: check kernel enable rings or not 1. add functions check kernel enable a ring or not. 2. add function gem_get_num_rings() to check how many rings kernel has enable. 3. gem_ring_sync_loop.c will call gem_get_num_rings() directly instead of original static fucntion get_number_rings(). Signed-off-by: Zhong Li [Ben: Wrapped commit message + whitespace fixes] Signed-off-by: Ben Widawsky commit 53d251ac23d8a3f5c4d0144794788a1423a5fa14 Author: Daniel Vetter Date: Thu May 2 08:10:15 2013 +0200 tests/prime_udl: don't put dirt into stderr when skipping It upset's QA's test runner. Signed-off-by: Daniel Vetter commit bafbbf1cc8663fa192c57152f2c13a81e68f9089 Author: Zhong Li Date: Tue Apr 23 15:06:45 2013 +0800 gem_exec_nop.c: add vebox test case v2 (Ben): Fixed whitespace, s/HAS_BLT_RING/gem_has_vebox/ s/I915_EXEC_VEBOX/LOCAL_I915_EXEC_VEBOX Signed-off-by: Zhong Li Signed-off-by: Ben Widawsky commit 21e7e342c14a69d62a24a9bce89b66c3ef0fd208 Author: Zhong Li Date: Tue Apr 23 15:06:44 2013 +0800 gem_cs_tlb.c: add vebox test case v2 (Ben): Fixed whitespace, s/HAS_BLT_RING/gem_has_vebox/ s/I915_EXEC_VEBOX/LOCAL_I915_EXEC_VEBOX Signed-off-by: Zhong Li Signed-off-by: Ben Widawsky commit b6fa628db0459c4a6b5946527570879a0c551898 Author: Zhong Li Date: Tue Apr 23 15:06:48 2013 +0800 gem_ring_sync_loop.c: fix an operator error Signed-off-by: Zhong Li Signed-off-by: Ben Widawsky commit 8be812b86c1a6d03822bf788c05f38abb531cc0d Author: Ben Widawsky Date: Fri Apr 26 14:26:48 2013 -0700 intel_mmio: Add intel_register_access_needs_fakewake I screwed this up in my recent patch: commit c7b6ec50007e2e524a208572c34faf1380eeab1b Author: Ben Widawsky Date: Wed Apr 24 19:05:18 2013 -0700 clean warnings: Silence unused (or private) functions I've clarified the functions now, and added the proper call from the python script. Time to get a regression tester for our tools? Signed-off-by: Ben Widawsky commit 2facc1368d5af8417e240f68153cecdfb5dc731a Author: Chris Wilson Date: Fri Apr 26 08:30:04 2013 +0100 Check for vebox support before testing Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=63941 commit cae610a2e5ab137229c666f435b7bcb4a67a423e Author: Jesse Barnes Date: Thu Apr 25 15:18:19 2013 -0700 fix breakage from newly used functions vs rebase commit d6917cf72d823cc478f4ad8c21386e65ab503328 Author: Jesse Barnes Date: Thu Apr 25 14:43:03 2013 -0700 add punit and nc read/write tools for vlv Good for testing/debugging. commit c7b6ec50007e2e524a208572c34faf1380eeab1b Author: Ben Widawsky Date: Wed Apr 24 19:05:18 2013 -0700 clean warnings: Silence unused (or private) functions Signed-off-by: Ben Widawsky commit cf73a1f241542dadb49ae2c6d491c725218a68e8 Author: Ben Widawsky Date: Wed Apr 24 18:50:01 2013 -0700 gem_storedw_loop_vebox: Modernize test to look like blitter Signed-off-by: Ben Widawsky commit 96baf59f3edd64117f8e90926b4af0b50cd89e21 Author: Xiang, Haihao Date: Tue Apr 23 15:06:43 2013 +0800 tests: storedw on VEBOX v2 (Ben): Define LOCAL_I915_EXEC_VEBOX Small copyright fixes Signed-off-by: Xiang, Haihao Signed-off-by: Zhong Li Signed-off-by: Ben Widawsky commit f187990bbf4396c7ae1796030377301bdd493852 Author: Xiang, Haihao Date: Tue Apr 23 15:06:42 2013 +0800 gem_ring_sync_loop: test the new ring The code is surround by a #ifdef...#endif to avoid to break compiling against the current libdrm release v2 (Ben): Use VEBOX get param. Thankfully Daniel let us carve this out way back when. Spacing cleanups Signed-off-by: Xiang, Haihao Signed-off-by: Zhong Li Signed-off-by: Ben Widawsky commit 0a413cd8a935744c1abf3c4ee3d95698dd68ca93 Author: Xiang, Haihao Date: Tue Apr 23 15:06:41 2013 +0800 gem_ring_sync_loop: check the rings supported by the kernel Signed-off-by: Xiang, Haihao Signed-off-by: Zhong Li Signed-off-by: Ben Widawsky commit afeb43190e705c91565d92f93afc33aaca4a7bd3 Author: Ben Widawsky Date: Mon Apr 22 11:36:03 2013 -0700 intel_error_decode: HEAD stuff Show the decoded HEAD value, as well as print the calculated head offset per ringbuffer. This will be superceded in the next commit, but that patch is way more complicated than this one (read: error prone), so I want this here. Example: ringbuffer (blitter ring) at 0x00044000; HEAD points to: 0x00044950 v2: Actually make it work for all rings. Signed-off-by: Ben Widawsky commit 155aa1e1fa18b2d6665cb48b073af73bc86850e6 Author: Ben Widawsky Date: Mon Apr 22 11:07:35 2013 -0700 intel_error_decode: Whitespacing fix The rest of igt has moved to kernel coding style. People had already been not conforming with the existing formatting in error decode, so we may as well fix it. This addresses two primary issues, tabbing (remove spaces), and space after function in function call. I may have missed some of the latter since that was done by hand. I have upcoming work in this file, and it was annoying me. v2: Fix case alignment (Chris) Signed-off-by: Ben Widawsky commit 70afbead463fd0b5c9af29ebd7a169d316364c29 Author: Imre Deak Date: Wed Apr 17 23:18:02 2013 +0300 tests/prime_self_import: add subtest to export/import a second gem buffer Also add a subtest for the fd=handle_to_fd(), fd2=dup(fd), close(fd) case (idea from Kristian Høgsberg). Signed-off-by: Imre Deak v2: - add a new subtest instead of modifying the original test (Daniel) - add a new subtest for testing dup (Kristian) Signed-off-by: Daniel Vetter commit 6f0d8b011e412d9dfb03c87d58d9b30440058ca5 Author: Ben Widawsky Date: Tue Apr 16 23:09:25 2013 -0700 quick_dump: Add dpio read The sample usage is in reg_access.dpio_read(). We should add some semantics to the text files to detect DPIO registers, and do the right thing. Cc: Jesse Barnes Signed-off-by: Ben Widawsky Reviewed-by: Jesse Barnes Signed-off-by: Daniel Vetter commit a59b0ee5d403630152fd720cd9dde2846424bd8a Author: Ben Widawsky Date: Thu Feb 21 22:05:36 2013 -0800 reg_access: Forcewake as necessary Don't try to be smart. Just poke all forcewake bits if it seems we need it. Signed-off-by: Ben Widawsky commit 67ed990604254af6a2cb3aa4d128dabb7714f3e2 Author: Ben Widawsky Date: Thu Feb 21 22:05:35 2013 -0800 quick_dump: add register write Since there is no command line support, just do a pure integer version Signed-off-by: Ben Widawsky commit f60dd5153500514baba060857e115e6c0d3e1617 Author: Ben Widawsky Date: Thu Feb 21 22:05:34 2013 -0800 intel_mmio: a query for forcewake requirement Signed-off-by: Ben Widawsky commit 8904d29416e784f7ba0fb74455505fc251dd894f Author: Ben Widawsky Date: Thu Feb 21 22:05:33 2013 -0800 intel_mmio: Allow mmio without debugfs With the introduction of the forcewake dance: commit cac8f8b52621f246a7cff412f340a7db28cb1b99 Author: Ben Widawsky Date: Thu Jul 28 13:40:19 2011 -0700 forcewake: Add mmio code to do proper forcewake stuff for gen6 We lost the ability to do register access when either debugfs isn't mounted, or when the driver isn't loaded. The latter can be beneficial in debugging situations. This patch will allow the driver to still do mmio (leaving forcewake management up to the callers) provided that the i915 driver appears to not be loaded (according to sysfs) Requested by Jesse. Cc: Jesse Barnes Signed-off-by: Ben Widawsky commit ec107b019435ab49e8454664368bf1187f3d0273 Author: Ben Widawsky Date: Thu Feb 21 22:05:32 2013 -0800 quick_dump: say something when reg init fails Signed-off-by: Ben Widawsky commit 0b7da0afb10b3ebfd8615d7b3e50bde013aa2b0a Author: Jesse Barnes Date: Tue Apr 16 13:16:31 2013 -0700 fixup VLV reg offsets, add a few more commit 25339595a764c0b50516b7db60fd117128a6c8bc Author: Jesse Barnes Date: Tue Apr 16 13:14:58 2013 -0700 add VLV punit & north cluster read tools commit 2fe3f76c255b08f4b462fc64be12d5e4ac7b37cd Author: Ville Syrjälä Date: Thu Apr 11 20:43:40 2013 +0300 tests/gem_fenced_exec_thrash: Test with > max fences Make sure the kernel returns EDEADLK when the number of fences is exceeded for gen2-3. For gen4+ the test makes sure the kernel ignores the EXEC_OBJECT_NEEDS_FENCE flag. Note that I changed the code not to round the num_fences to an even number. Not sure why that was there, and if there's a reason for it, we need to add it back. Signed-off-by: Ville Syrjälä Signed-off-by: Daniel Vetter commit a7ca33b673ee90b0a93ffdb18449256798f67786 Author: Mika Kuoppala Date: Thu Apr 11 16:11:28 2013 +0300 tests/gem_seqno_wrap: verify debugfs write with readback Make sure that debugfs entry works as expected by reading back the sequence number that was written. Signed-off-by: Mika Kuoppala Signed-off-by: Daniel Vetter commit 918e763e2dd474a58c43c145c10e7f3aa4ec9a39 Author: Ville Syrjälä Date: Tue Apr 9 17:45:37 2013 +0300 tests/gem_tiling_max_stride: Add a test for max fence stride gem_tiling_max_stride writes a data pattern to an X-tiled buffer using the maximum supported stride, reads the data back as linear, and verifies that the data didn't get scrambled on the way. The test also checks that some invalid stride values are rejected properly. v2: Check invalid strides v3: Check invalid stride with Y-tiling Include a few more invalid stride values Fix gen3 X-tile size v4: A few more invalid strides :) Drop the useless memset() Signed-off-by: Ville Syrjälä Reviewed-by: Chris Wilson Signed-off-by: Daniel Vetter commit 1d1f68316f420d8e174d3f16655f6be1549cd74c Author: Ville Syrjälä Date: Tue Apr 9 15:25:38 2013 +0300 tests: Use gem_available_fences() lib/drmtest.c provides gem_available_fences(). Use it where appropriate. Signed-off-by: Ville Syrjälä Signed-off-by: Daniel Vetter commit e37eb35e194de8fe1f244df085b8b8d2c530ce20 Author: Ville Syrjälä Date: Tue Apr 9 15:25:37 2013 +0300 tests/gem_fenced_exec_thrash: Increase MAX_FENCES to 32 IVB+ supports 32 fence registers, bump the maximum in the test. Signed-off-by: Ville Syrjälä Signed-off-by: Daniel Vetter commit b0c63a781dd597288c3a240b10996f4b313cbbd4 Author: Paulo Zanoni Date: Thu Apr 4 14:33:59 2013 -0300 intel_reg_dumper: improve the dumping of backlight registers Signed-off-by: Paulo Zanoni commit d6dd0bcb1c99cc7be5819851565128f5dc6651f0 Author: Ben Widawsky Date: Mon Apr 8 10:50:57 2013 -0700 m4: Updates to ax_python_devel.m4 Signed-off-by: Ben Widawsky commit 0a8bfbf7476d845b2136b6e7f9360cd3fbe6d426 Author: Daniel Vetter Date: Mon Apr 8 09:19:05 2013 +0200 tests/gem_fence_trash: make threaded tests more through-rough With this at least the y-tiled test reliably fails on my machines, but x-tiled still passes on some. More ideas to tune this highly welcome. v2: Fill cpu caches with data for each newly allocated bo. This seems to do the trick on my snb here _really_ reliably. So apparently the backsnoop for llc gtt writes is the crucial ingredient here to make the test fail. While at it, also stop leaking mmap space. v3: Fixup commit message. Cc: Mika Kuoppala Cc: Chris Wilson Signed-off-by: Daniel Vetter commit cb3a44fa2691e0a642b150373b5fd9d0f554a7ce Author: Daniel Vetter Date: Mon Apr 8 00:31:06 2013 +0200 lib/drmtest: tune down signal handler stats Avoids tests with a spurious WARN result in piglit. Signed-off-by: Daniel Vetter commit 1677c2129113adfd7cda766548b09e0bfec10b3e Author: Daniel Vetter Date: Sat Apr 6 18:29:37 2013 +0200 tests/kms_flip: don't leak gpu hang state We need to clear out the error_state. While at it also make sure that the hang was indeed detected. Whoever writes the next test to race against gpu hangs should probably extract these two functions into the drmtest library. Which just one user that's not really worth it right now. Signed-off-by: Daniel Vetter commit c97a45ff098ba1e9772b5d1ebeedf52ec2b64652 Author: Daniel Vetter Date: Thu Apr 4 11:36:27 2013 +0200 tests/prime_udl: skip harder I fail. commit d16dd3a0f896d7d7060427a4547d19472a0ea492 Author: Daniel Vetter Date: Thu Apr 4 11:06:37 2013 +0200 tests/prime_udl: proper return values ... especially skip properly if there's no udl device. Signed-off-by: Daniel Vetter commit 16e44f5499e1754dfb10fc62b22675f5aa6ac781 Author: Daniel Vetter Date: Wed Apr 3 00:22:41 2013 +0200 lib: fixup register access on gen2/3 This wreaked havoc with intel_reg_dumper since it's been broken in commit c6fe31bc473a7ae44bc42bad7da5faca3c924821 Author: Eugeni Dodonov Date: Thu Jun 21 14:31:34 2012 -0300 intel_reg_dumper: use intel_register_access_init/fini Signed-off-by: Daniel Vetter commit 74f6e413d3cba0e95d1233c71e119ff50cd406d2 Author: Chris Wilson Date: Wed Mar 27 11:32:47 2013 +0000 gem_fence_thrash: Fix array allocation size for LP64 systems commit 43a086269795c5b41bdab0dc2c456be0de97e762 Author: Kenneth Graunke Date: Tue Mar 26 22:06:39 2013 -0700 intel_perf_counters: Add support for Sandybridge. While the Sandybridge PRM doesn't have any documentation on the GPU's performance counters, a lot of information can be gleaned from the older Ironlake PRM. Oddly, none of the information documented there actually appears to apply to Ironlake. However, it apparently works just great on Sandybridge. Since this information has all been publicly available on the internet for around three years, we can use it. Signed-off-by: Kenneth Graunke Signed-off-by: Daniel Vetter commit 0811556747ce861730d8eb310860080b8840e202 Author: Kenneth Graunke Date: Tue Mar 26 22:06:38 2013 -0700 intel_perf_counters: Abstract out Ironlake-specific code. We want to support this tool on more platforms. This lays the groundwork for making that possible. Signed-off-by: Kenneth Graunke Signed-off-by: Daniel Vetter commit 85667f4f7d698ba994af32a65b1393d54b8d8784 Author: Eric Anholt Date: Tue Mar 26 22:06:37 2013 -0700 intel_perf_counters: a little tool for dumping performance counters. This reads the GPU's performance counters via MI_REPORT_PERF_COUNT and prints them in a top-style interface. While it can be useful in and of itself, it also documents the performance counters and lets us verify that they're working. Currently, it only supports Ironlake. v2 [Ken]: Rebase on master and fix compilation failures; make it abort on non-Ironlake platforms to avoid GPU hangs; rename from 'chaps' to intel_perf_counters since that acronym isn't used any longer; write the above commit message. Signed-off-by: Daniel Vetter commit 9535fed171386713dba1147fb9e76f7310a6bc3f Author: Daniel Vetter Date: Wed Mar 27 12:26:46 2013 +0100 tests/Makefile.am: gem_fence_trash has grown subtests Need to move it to the right make target now! Signed-off-by: Daniel Vetter commit ee79b8fccd64218fb8218d1c281ff34db1724e87 Author: Mika Kuoppala Date: Wed Mar 27 12:48:07 2013 +0200 tests: add write-verify test to gem_fence_thrash Add write-verify test to gem_fence_thrash. Test will create multiple threads per fence then verify the write into fenced region. v2: non-threaded, non-tiled tests added. suggested by Chris Wilson. Signed-off-by: Mika Kuoppala Signed-off-by: Daniel Vetter commit 7253eb4e4f875777104e24454b2216d17655cae1 Author: Paulo Zanoni Date: Fri Mar 22 14:28:24 2013 -0300 intel_reg_dumper: debug SDEISR on Haswell Signed-off-by: Paulo Zanoni commit 1043b22bb02ddb37e3abbcc2108c6ebe03eeb9f0 Author: Paulo Zanoni Date: Fri Mar 1 17:32:34 2013 -0300 lib: fix HAS_PCH_SPLIT check So HAS_PCH_SPLIT on't be true on VLV. Signed-off-by: Paulo Zanoni commit 051e327247dbfeb4671fd5ece48e64aa52b7b835 Author: Paulo Zanoni Date: Fri Mar 1 17:12:29 2013 -0300 intel_reg_dumper: dump HSW watermark registers Signed-off-by: Paulo Zanoni commit eb88ce64b7266b0593904b84c8fcaac5c59d0260 Author: Paulo Zanoni Date: Fri Mar 1 16:55:22 2013 -0300 intel_reg_dumper: decode some useful Haswell registers I've checked the value of these registers many many many times during development. Signed-off-by: Paulo Zanoni commit 5c0ce0f2a9d7957b45bac3cfbab6a003a024cb9c Author: Paulo Zanoni Date: Fri Mar 1 15:46:25 2013 -0300 intel_reg_dumper: make Haswell dump useful It was previously printing ironlake_debug_regs and haswell_debug_regs. Since ironlake_debug_regs contains a lot of registers that don't exist on Haswell, running intel_reg_dumper on Haswell caused "unclaimed register" messages. Now I've copied the existing registers from ironlake_debug_regs to haswell_debug_regs, so we won't print the registers that don't exist anymore. Also removed DP_TP_STATUS_A since it doesn't exist. Signed-off-by: Paulo Zanoni commit 2fadf695ff54f282d88ced849d260de8cd201b15 Author: Paulo Zanoni Date: Fri Mar 1 13:53:40 2013 -0300 intel_reg_dumper: recognize LPT Signed-off-by: Paulo Zanoni commit 29abdb96dca554858b86e6fe3c1e69ea4aecc521 Author: Paulo Zanoni Date: Fri Mar 1 13:30:46 2013 -0300 lib: detect PCH_LPT and PCH_NONE So we don't assign PCH_IBX to anything that's not PCH_CPT nor PCH_LPT. Signed-off-by: Paulo Zanoni commit c3bfd738c71b2821fcdc5c769c088578d84dc0a1 Author: Kees Cook Date: Fri Mar 15 11:09:07 2013 -0700 tests: add gem_reloc_overflow to check wrapping This adds a test to make sure that the execbuffer validation routine is checking for invalid addresses, single entry overflow, and multi-entry wrapping overflow. Signed-off-by: Kees Cook Signed-off-by: Daniel Vetter commit 7da0af8855c1ecf075dc6019d9b711d969219722 Author: Ville Syrjälä Date: Mon Mar 4 15:34:07 2013 +0200 kms_flip: Don't access freed data Signed-off-by: Ville Syrjälä Signed-off-by: Daniel Vetter commit 069e35e0fc3785faa562adcfd2dd7bbed4cb1dea Author: Ville Syrjälä Date: Mon Mar 4 15:34:06 2013 +0200 kms_flip: Add flip-vs-bad-tiling test flip-vs-bad-tiling tests that page flipping to a Y-tiled buffer returns an error correctly, rather than triggering kernel BUG for instance. Create a third fb for this purpose. After the fb has been created, change its tiling mode to Y. When performing a flip, target this Y-tiled fb and make sure we get the expected error value. Signed-off-by: Ville Syrjälä Signed-off-by: Daniel Vetter commit 7ab8e53b5d44812d796e2e964dd084fe6692491c Author: Ville Syrjälä Date: Fri Feb 15 17:10:47 2013 +0200 kms_flip: Add a flip-vs-panning-vs-hang test The flip-vs-panning-vs-hang is just like the regular flip-vs-panning test, except it also hangs the GPU. This will test whether panning works after a pending page flip has been cancelled by a GPU reset, and also whether page flip events get delivered correctly. Signed-off-by: Ville Syrjälä Signed-off-by: Daniel Vetter commit 1f5957c64ea5c28d785e60e36adaf2a507665b02 Author: Ville Syrjälä Date: Fri Feb 15 17:10:46 2013 +0200 kms_flip: Split the "no events" logic into a separate flag Do not use the TEST_HANG flag to determine whether page flip events are used. Add a new TEST_NOEVENT flag that can be used to disable the use of events instead. Signed-off-by: Ville Syrjälä Signed-off-by: Daniel Vetter commit c6c6f0f5937da94c0efb70bbd56d72bba1dc0f96 Author: Damien Lespiau Date: Thu Mar 21 16:19:36 2013 +0000 lib: Add a comment about why we only parse long options for subtests For thet next one wondering about that. Signed-off-by: Damien Lespiau commit 764b9e503e83d7ad9d7f7dae61ab24763b7cac9c Author: Damien Lespiau Date: Mon Mar 4 15:59:00 2013 +0000 build: Fix typo if the test setting enable_debugger Of course, a 'x' need to be inserted there. Signed-off-by: Damien Lespiau commit 45919917697572214106d0f996d9ef5b33901600 Author: Damien Lespiau Date: Mon Feb 4 13:57:48 2013 +0000 assembler: Mark format() as PRINTFLIKE in the disassembler So when making changes in code using that function, we get warnings about mismatches between the format string and arguments. Signed-off-by: Damien Lespiau commit 92262e1ff8c1b2d68b910adcadafe24761469d10 Author: Damien Lespiau Date: Mon Feb 4 12:23:57 2013 +0000 assembler: Fix the decoding of the destination horizontal stride dest_horizontal_stride needs go through the horiz_stride[] indirection to pick up the rigth stride when its value is 11b (4 elements). Signed-off-by: Damien Lespiau commit d9afa5bfeac435dcfded66908b49fd342a007312 Author: Damien Lespiau Date: Mon Feb 4 12:12:29 2013 +0000 assembler: Group the header inclusions together Signed-off-by: Damien Lespiau commit f0365d40b4e83d13c1865d48e571271737a58c65 Author: Damien Lespiau Date: Mon Feb 4 12:02:18 2013 +0000 assembler: Don't use GL types sed -i -e 's/GLuint/unsigned/g' -e 's/GLint/int/g' \ -e 's/GLfloat/float/g' -e 's/GLubyte/uint8_t/g' \ -e 's/GLshort/int16_t/g' assembler/*.[ch] Drop the GL types here, they don't bring anything to the table. For instance, GLuint has no guarantee to be 32 bits, so it does not make too much sense to use it in structure describing hardware tables and opcodes. Of course, some bikeshedding can be applied to use uin32_t instead, I figured that some of the GLuint are used without size constraints, so a sed with uint32_t did not seem the right thing to do. On top of that initial sed, one bothered enough could change the structures with size constraints to actually use uint32_t. Signed-off-by: Damien Lespiau commit 2d8b92a24b2d6aebe2ced1f014b6c3129f86b91c Author: Damien Lespiau Date: Fri Feb 1 14:54:46 2013 +0000 assembler: Remove trailing white space Signed-off-by: Damien Lespiau commit 2f502bcaaa06419b8a8cfb328d2fbd8dc982f771 Author: Damien Lespiau Date: Fri Feb 1 14:09:41 2013 +0000 assembler: Use defines for width Instead of just using hardcoded numbers or resorting to ffs(). Signed-off-by: Damien Lespiau commit 2de8b40c4820a1159aa46ba683ab0849ada3efa5 Author: Damien Lespiau Date: Fri Feb 1 13:59:32 2013 +0000 assembler: Merge declared_register's type into the reg structure Signed-off-by: Damien Lespiau commit 45d87d7f0bf8e1be1fedd386b97a70b6b9505e5f Author: Damien Lespiau Date: Fri Feb 1 13:29:48 2013 +0000 assembler: Finish importing brw_eu_*c from mesa Signed-off-by: Damien Lespiau commit fa2b679cc926add04c22c1e5ffb32bf9d9bd8584 Author: Damien Lespiau Date: Thu Jan 31 18:22:49 2013 +0000 assembler: Use set_instruction_src1() in send No reason not to! Signed-off-by: Damien Lespiau commit 28ff66a13c9dcc7aeb7bcff8d173495ee53deef9 Author: Damien Lespiau Date: Thu Jan 31 14:28:00 2013 +0000 assembler: Put struct opcode_desc back in brw_context.h I originally moved struct opcode_desc from brw_context.h to brw_eu.h on the mesa side, but that was before the realization we needed struct brw_context if we wanted to not touch the code too much. So put it back there now that the mesa patch has been dropped. Signed-off-by: Damien Lespiau commit e75faa3e43360995354683987c42e02b5ca16b19 Author: Damien Lespiau Date: Thu Jan 31 14:25:42 2013 +0000 assembler: Don't pollute the library files with gen4asm.h gen4asm.h is assembler specific while we want the library files to be somewhat of a proper library. This means that we have to redefine the GL* typedefs for brw_structs.h, not using any of thet GL typedef will be for a future commit. Signed-off-by: Damien Lespiau commit 26da375471edfa02b5558e6a29470dc2adcdcfa6 Author: Damien Lespiau Date: Thu Jan 31 01:28:15 2013 +0000 assembler: Use brw_*() functions for 3-src instructions Signed-off-by: Damien Lespiau commit 67f3f949bfaf0eefda22fb03f0eed827053c4247 Author: Damien Lespiau Date: Thu Jan 31 01:27:36 2013 +0000 assembler: Add support for D and UD in 3-src instructions Signed-off-by: Damien Lespiau commit a2a6583518682442865b683a1e48ec83c46ed100 Author: Damien Lespiau Date: Thu Jan 31 00:53:46 2013 +0000 assembler: Expose setters for 3src operands Signed-off-by: Damien Lespiau commit 49861a03b6b3c9316ca329dba231623e64930816 Author: Damien Lespiau Date: Thu Jan 31 00:26:51 2013 +0000 assembler: Introduce set_instruction_saturate() Also simplify the logic that was setting the saturate bit in the math instruction. Signed-off-by: Damien Lespiau commit b21c2e60e9d9c3a2a8482d77a7f7e29f997d7dda Author: Damien Lespiau Date: Thu Jan 31 00:18:47 2013 +0000 assembler: Introduce set_intruction_pred_cond() This allow us to factor out the test that checks if, when using both predicates and conditional modifiers, we are using the same flag register. Also get rid of of a FIXME that we are now dealing with (the warning mentioned above). Signed-off-by: Damien Lespiau commit 5d526c8317fb6f0fc7741ff558cbb9dcd0fdfc6e Author: Damien Lespiau Date: Wed Jan 30 23:39:09 2013 +0000 assembler: Introduce set_instruction_opcode() Signed-off-by: Damien Lespiau commit 6bf3aa84e0c608ae4c628c6215694d70245da53e Author: Damien Lespiau Date: Wed Jan 30 23:25:19 2013 +0000 assembler: Isolate all the options in their own structure Like with the predicate fields before, there's no need to use the full instruction to collect the list of options. This allows us to decouple the list of options from a specific instruction encoding. Signed-off-by: Damien Lespiau commit bca2ff2a0229c6ddf29221fee71b45a12e941640 Author: Damien Lespiau Date: Wed Jan 30 23:00:26 2013 +0000 assembler: Unify adding options to the header Right now we have duplicated code for when the option is the last in the list or not. Put that code in a common function. Interestingly it appears that both sides haven't been kept in sync and that EOT and ACCWRCTRL had limitations on where they had to be in the option list. It's fixed now! Signed-off-by: Damien Lespiau commit dfe6adacc923336fa1e98b781ff67abaada29b95 Author: Damien Lespiau Date: Wed Jan 30 22:32:07 2013 +0000 assembler: Gather all predicate data in its own structure Rather than user a full instruction for that. Also use set_instruction_predicate() for a case that coud not be done like that before the refactoring (because everyone now uses the same instruction structure). Signed-off-by: Damien Lespiau commit 9b78f74f23aee082fe6e2e5686b6325b1f942288 Author: Damien Lespiau Date: Wed Jan 30 17:09:17 2013 +0000 assembler: Move struct relocation out of relocatable instructions Now that all instructions (relocatable or not) are struct brw_program_instructions, this means we can move the relocation specific information out the "relocatable instruction" structure. This will allow us to share the relocation information between different types of instructions. Signed-off-by: Damien Lespiau commit f6e9052e8d62606c3a89c2e6f138a66a003854ae Author: Damien Lespiau Date: Wed Jan 30 17:04:13 2013 +0000 assembler: Unify all instructions to be brw_program_instructions Time to finally unify all instructions on the same structure. Signed-off-by: Damien Lespiau commit d008064b3ef6a85181a61e97f51a9b4c9319ddc8 Author: Damien Lespiau Date: Wed Jan 30 12:31:45 2013 +0000 assembler: Renamed the instruction field to insn This will be less typing for the refactoring to come (which is use struct brw_program_instruction in gram.y for the type of all the instructions). Signed-off-by: Damien Lespiau commit 888b2dcae60cb2db0eb95adddfd894f58dc6dc89 Author: Damien Lespiau Date: Mon Jan 28 15:29:26 2013 +0000 assembler: Use brw_set_src1() Everything is now aligned to be able to use brw_set_src1() in the opcode generation, so use it. Signed-off-by: Damien Lespiau commit d3a2a678d51ca23ca72aa2e066642ccce5abc0ff Author: Damien Lespiau Date: Mon Jan 28 15:27:59 2013 +0000 assembler: Implement register-indirect addressing mode in brw_set_src1() The assembler allows people to do that and that's something available since Crestline. Signed-off-by: Damien Lespiau commit 8eb30d9493690471ad04953b609dfe7da35352d7 Author: Damien Lespiau Date: Sun Jan 27 11:23:38 2013 +0000 assembler: Fix ')' placement in condition A small typo in the condition. Signed-off-by: Damien Lespiau commit 1d53e1813e2519c966a527efc20a1b5795f25b60 Author: Damien Lespiau Date: Sun Jan 27 11:05:50 2013 +0000 assembler: Cleanup visibility of a few global variables/functions Not everything has to be exported out the compilation unit. Do a small cleanup pass. Signed-off-by: Damien Lespiau commit 6d3d36953549afed7ebc9afe5e26f133173d835d Author: Damien Lespiau Date: Sun Jan 27 10:41:23 2013 +0000 assembler: Port the warning and error reporting to warn()/error() This way we ensure to have a single place where these are handled. The immediate benefit is that now line numbers are always printed out, which is quite handy. Signed-off-by: Damien Lespiau commit e7cca1a3cafb2f33b4ae94afb9a11dd01085b23d Author: Damien Lespiau Date: Sun Jan 27 02:06:22 2013 +0000 assembler: Use brw_set_src0() Unfortunately, it's all a walk in the park. Both, internal code in the assembler and external shaders (libva) generate registers that trigger assertions in brw_eu_emit.c's brw_validate(). To fix all that I took the option to be able to emit warning with the -W flag but still make the assembler generate the same opcodes. We can fix all this, but it requires validation, something that I cannot do right now. Signed-off-by: Damien Lespiau commit 1eb622a8477e1e850bbd7d6a1ff500a3b4eb4181 Author: Damien Lespiau Date: Sun Jan 27 01:32:52 2013 +0000 assembler: Add the input filename to the error/warning messages Signed-off-by: Damien Lespiau commit 95b12082d272699ade246f625d4fa231c3ae5204 Author: Damien Lespiau Date: Sat Jan 26 23:55:01 2013 +0000 assembler: Add a check for when ExecSize and width are 1 Another check (that we hit if we try to use brw_set_src0()). Again, protect it with the -W option. Signed-off-by: Damien Lespiau commit d70e9f824f6f837614bbc2714c5ccc5f77d2c539 Author: Damien Lespiau Date: Sat Jan 26 23:09:42 2013 +0000 assembler: Add a check for when width is 1 and hstride is not 0 The list of region restrictions in bspec do say that we can't have: width == 1 && hstrize != 0 We do have plenty of assembly code that don't respect that behaviour. So let's hide the warning under a -W flag (for now) while we fix things. Signed-off-by: Damien Lespiau commit e9172aa22538216cd434c700d78915ec06142238 Author: Damien Lespiau Date: Sat Jan 26 22:44:45 2013 +0000 assembler: Add error() and warn() shorthands and use them in set_src[01] Now that we have locations, we can write error() and warn() functions giving more information about where it's going wrong. Signed-off-by: Damien Lespiau commit d94e8a6cf0952e0a905699a47a50e57181fb414f Author: Damien Lespiau Date: Sat Jan 26 19:51:28 2013 +0000 assembler: Add location support Let's generate location information about the tokens we are parsing. This can be used to give accurate location when reporting errors and warnings. Signed-off-by: Damien Lespiau commit 574a249142f0b3140bda599326e581bb36b328da Author: Damien Lespiau Date: Sat Jan 26 18:26:03 2013 +0000 assembler: Don't warn if identical declared registers are redefined There's no real need to warn when the same register is declared twice. Currently the libva driver does do that and this warning makes other errors really hide in a sea of warnings. Redefining a register with different parameters is a real error though, so we should not allow that and error out in that case. Signed-off-by: Damien Lespiau commit 9c72beb70123050db74281bb5f9e5250bb800491 Author: Damien Lespiau Date: Fri Jan 25 15:48:58 2013 +0000 assembler: Store immediate values in reg.dw1.ud Another step in pushing the parsing in struct brw_reg. Signed-off-by: Damien Lespiau commit 103edccd9b1a660d82eb40cffd2d6f5b17d5f752 Author: Damien Lespiau Date: Fri Jan 25 15:13:30 2013 +0000 assembler: Fix comparisons between reg.type and Architecture registers Of course the assertion is there to make sure GRF and MRF have a reg.nr < 128. To exclude ARF registers, reg.file has be checked, not reg.type (channel type). Most likely a typo never caught. Signed-off-by: Damien Lespiau commit 6e83eb66b1a8c32b7ecfa212c831b46ef3da996f Author: Damien Lespiau Date: Fri Jan 25 15:12:12 2013 +0000 assembler: ExecSize can be as big as 32 channels See the IVB PRM, vol4 part3 5.2.3. Signed-off-by: Damien Lespiau commit c0592b2882c5bc6f08983d054e51f28f9c8ebdf9 Author: Damien Lespiau Date: Thu Jan 24 18:32:20 2013 +0000 assembler: Factor out the source register validation The goal is to use brw_set_src[01](), so let's start by validating the register we have before generating the opcode. Signed-off-by: Damien Lespiau commit 9fcc1bdcad1a993d4681673d96443991d0c3bac4 Author: Damien Lespiau Date: Thu Jan 24 16:16:35 2013 +0000 assembler: Use brw_set_dest() to encode the destination A few notes: I needed to introduce a brw context and compile structs. These are only used to get which generation we are compiling code for, but eventually we can use more of the infrastructure. brw_set_dest() uses the destination register width to program the instruction execution size. The assembler can either take subnr in bytes or in number of elements, so we need a resolve step when setting a brw_reg. Signed-off-by: Damien Lespiau commit 5e0da9f854fea552cbc73f07a2e86a370f35aa92 Author: Damien Lespiau Date: Thu Jan 24 12:21:13 2013 +0000 assembler: Factor out the destination register validation The goal is to use brw_set_dest(), so let's start by validating the register we have before generating the opcode. Signed-off-by: Damien Lespiau commit 9d5a87a096a71a7c689437fdd25f2c8eb260625c Author: Damien Lespiau Date: Wed Jan 23 22:29:23 2013 +0000 assembler: Use brw_reg in the source operand Last refactoring step in transition to struct brw_reg. Signed-off-by: Damien Lespiau commit c13613ea2df3a021263dc9c0514f940658024eb3 Author: Damien Lespiau Date: Wed Jan 23 21:46:21 2013 +0000 assembler: Get rid of src operand's swizzle_set swizzle_set can be derived from the value of swizzle itself, no need for that field. Signed-off-by: Damien Lespiau commit a82722b60f9d4508a1ba41bff53a4d7cb3b49437 Author: Damien Lespiau Date: Wed Jan 23 21:35:10 2013 +0000 assembler: Consolidate the swizzling configuration on 8 bits Signed-off-by: Damien Lespiau commit 0375073f0529f894d89d3de2f67799ce9312fc16 Author: Damien Lespiau Date: Wed Jan 23 20:33:00 2013 +0000 assembler: Replace struct dst_operand by struct brw_reg One more step on the road to replacing all register-like structures by struct brw_reg. Two things in this commit are worth noting: * As we are using more and more brw_reg, a lot of the field-by-field assignments can be replaced by 1 assignment which results is a reduction of code * As the destination horizontal stride is now stored on 2 bits in brw_reg, it's not possible to defer the handling of DEFAULT_DSTREGION (aka (int)-1) when setting the destination operand. It has to be done when parsing the region and resolve_dst_region() is a helper for that task. Signed-off-by: Damien Lespiau commit 801b4eb1b3ea52f81587a30f3cdcff8affe9ab72 Author: Damien Lespiau Date: Wed Jan 23 16:20:05 2013 +0000 assembler: Unify the direct and indirect register type They are all struct brw_reg registers now. Signed-off-by: Damien Lespiau commit 36f8f65aa06bfbd3785bb43bc9c646b6769b1be2 Author: Damien Lespiau Date: Wed Jan 23 16:17:28 2013 +0000 assembler: Replace struct indirect_reg by struct brw_reg More code simplification can be layered on top of that (by using some brw_* helpers to create registers), that'd be for another commit. Signed-off-by: Damien Lespiau commit b33b8810e084a32adeae0c2da64484e3e1d2361c Author: Damien Lespiau Date: Wed Jan 23 16:06:49 2013 +0000 assembler: Replace struct direct_reg by struct brw_reg More code simplification can be layered on top of that (by using some brw_* helpers to create registers), that'd be for another commit. Signed-off-by: Damien Lespiau commit cce4fc2c36b18c349f0fe63f14f15ec6dd880fc0 Author: Damien Lespiau Date: Wed Jan 23 15:13:55 2013 +0000 assembler: Make struct declared_register use struct brw_reg It's time to start converting the emission code in gram.y to use libbrw infrastructure. Let's start with using brw_reg for declared register. Signed-off-by: Damien Lespiau commit 6b5680475761e22ec0fb46bc518b5e4e61e0c863 Author: Damien Lespiau Date: Mon Jan 21 22:17:54 2013 +0000 assembler: Don't expose functions only used in main.c and make then static. Signed-off-by: Damien Lespiau commit c74c80c9a5d2d84c55ba373d2d56ada635467ee6 Author: Damien Lespiau Date: Mon Jan 21 22:12:10 2013 +0000 assembler: Make sure nobody adds a field back to struct brw_instruction Adding something there will break the library, so we might as check for it. Signed-off-by: Damien Lespiau commit 79c62f1134b2200fc49c43178d846ecba8e37a7b Author: Damien Lespiau Date: Mon Jan 21 21:41:36 2013 +0000 assembler: Don't change the size of opcodes! Until now, the assembler had relocation-related fields added to struct brw_instruction. This changes the size of the structure and break code assuming the opcode structure is really 16 bytes, for instance the emission code in brw_eu_emit.c. With this commit, we build on the infrastructure that slowly emerged in the few previous commits to add a relocatable instruction with the needed fields. Signed-off-by: Damien Lespiau commit a45a47183a98e07f7a44330cd68bf65fec8d6dea Author: Damien Lespiau Date: Mon Jan 21 19:28:41 2013 +0000 assembler: Make explicit that labels are part of the instructions list The output of the parsing is a list of struct brw_program_instruction. These instructions can be either GEN instructions aka struct brw_instruction or labels. To make this more explicit we now have a type to test to determine which instruction we are dealing with. This will also allow to to pull the relocation bits into struct brw_program_instruction instead of having them in the structure representing the opcodes. Signed-off-by: Damien Lespiau commit 73d58edab9fca04d9b00f9e1a9095bbbb00f25a4 Author: Damien Lespiau Date: Mon Jan 21 17:07:28 2013 +0000 assembler: Refactor the code adding instructions and labels Factoring out the code from the grammar will allow us to switch to using brw_compile in a cleaner way. Signed-off-by: Damien Lespiau commit 5e5861183df1326f74f66886c3f580d43d470d60 Author: Damien Lespiau Date: Mon Jan 21 15:10:01 2013 +0000 assembler: Make print_instruction() take an instruction No need to use a brw_program_instruction there as a brw_instruction is what you really dump anyway, espcially when the plan is to use brw_compile from Mesa sooner rather than later. Signed-off-by: Damien Lespiau commit c716e2bdb43023cffb652582aeb21c9af228931e Author: Damien Lespiau Date: Mon Jan 21 14:45:46 2013 +0000 assembler: Simplify get_subreg_address() This function can only be called to resolve subreg_nr in direct mode (there is an other function for the indirect case) and it makes no sense to call it with an immediate operand. Express those facts with asserts and simplify the logic. Signed-off-by: Damien Lespiau commit 8322802acba537777d8877fc7e74115df3a9bdef Author: Damien Lespiau Date: Mon Jan 21 14:04:59 2013 +0000 assembler: Use subreg_nr to store the address register subreg Another step towards using struct brw_reg for source and destination operands. Instead of having a separate field to store the sub register number of the address register in indirect access mode, we can reuse the subreg_nr field that was only used for direct access so far. Signed-off-by: Damien Lespiau commit 02019d4d554623f151f8c800a0812a8fee237ee6 Author: Damien Lespiau Date: Sun Jan 20 21:52:05 2013 +0000 assembler: Remove the writemask_set field of struct dest_operand writemask_set gets in the way of switching to using struct brw_reg and it's possible to derive it from the writemask value. Signed-off-by: Damien Lespiau commit db6f5e08ba358d9d7af8ca43ae61f19486e7dfa5 Author: Damien Lespiau Date: Sun Jan 20 21:11:29 2013 +0000 assembler: Use BRW_WRITEMASK_XYZW instead of the 0xf constant Signed-off-by: Damien Lespiau commit 042e9353e98610dd403a37c1f012148c11f5d23a Author: Damien Lespiau Date: Sat Jan 19 23:27:46 2013 +0000 assembler: Import brw_eu_emit.c Finally importing the meaty brw_eu_emit.c code that emit instructions. Signed-off-by: Damien Lespiau commit 7902f2c08ce1cbe591f3ce43621d42d42a44bdf9 Author: Damien Lespiau Date: Sat Jan 19 23:25:22 2013 +0000 assembler: Don't use -Wpointer-arith Mesa's code uses the GNU C extension that allows additions and soustractions on void* (+/- 1). Signed-off-by: Damien Lespiau commit 241c5a1322e96871ca1c296266b89b25200d366b Author: Damien Lespiau Date: Sat Jan 19 23:04:07 2013 +0000 assembler: Import brw_eu.c Another step the road of importing Mesa's emission code. Signed-off-by: Damien Lespiau commit 112075f8c217ba01c23d5f9562205ea08864a3f1 Author: Damien Lespiau Date: Sat Jan 19 22:52:21 2013 +0000 assembler: Import brw_eu_compact.c To be able to import brw_eu.c and brw_eu_emit.c later on. This could be used to get the assembler generate compact instructions at some point. Signed-off-by: Damien Lespiau commit a66cd60f2d5a748e0893fc0f31fbc9bdeb0bb758 Author: Damien Lespiau Date: Sat Jan 19 22:50:57 2013 +0000 assembler: Protect gen4asm.h from multiple inclusions Signed-off-by: Damien Lespiau commit 8b10ceb61b2e33085eceab7d907dd4466a704c22 Author: Damien Lespiau Date: Sat Jan 19 17:24:56 2013 +0000 assembler: Make an libbrw library With the brw_* files imported from mesa. There are still a few things in that library that needs gen4asm.h, for instance the GLuint and GLint types. The hope is that eventually libbrw can be split out in its own directory and shared. Signed-off-by: Damien Lespiau commit 609a8453fb907041db52e8e029bc33f6bd49d907 Author: Damien Lespiau Date: Sat Jan 19 17:05:48 2013 +0000 assembler: Introduce struct brw_context A lot of the mesa code use struct brw_context to get the GPU generation and various information. Let's stub this structure and initialize it ourselves to be able to resuse mesa's code untouched. Signed-off-by: Damien Lespiau commit 3ee5808d63be8c9604849b491d64e692315e8470 Author: Damien Lespiau Date: Sat Jan 19 11:51:08 2013 +0000 assembler: Remove white space from brw_eu.h Signed-off-by: Damien Lespiau commit 14146b403736b481cf4dc9b815372076fa3ba4e5 Author: Damien Lespiau Date: Sat Jan 19 11:49:11 2013 +0000 assembler: Import ralloc from Mesa This also add a new brw_compat.h that should help maintaining the diff between mesa's version and our as small as possible. Signed-off-by: Damien Lespiau commit 4ca1a04b859ed039a41d46891a3019d953ab1dc2 Author: Damien Lespiau Date: Sat Jan 19 00:30:18 2013 +0000 assembler: Update the disassembler code From Mesa. This imports a bit more the of brw_eu* infrastructure (which is going towards the right direction!) from mesa and the update is quite a significant improvement over what we had. I also verified that the changes that were done on the assembler old version of brw_disasm.c were already supported by the Mesa version, and indeed they were. Signed-off-by: Damien Lespiau commit 66fdc85d5bdab9d38d3d5fe255ec6481829ae2d9 Author: Damien Lespiau Date: Fri Jan 18 13:21:32 2013 +0000 assembler: Remove trailing white space from brw_defines.h Signed-off-by: Damien Lespiau commit 153aee37d75e0d3624c67b119d4c8fd377c72c19 Author: Damien Lespiau Date: Fri Jan 18 13:14:23 2013 +0000 assembler: Import brw_defines.h from Mesa Almost identical files now, the diff is: -#include "intel_chipset.h" +#define EX_DESC_SFID_MASK 0xF +#define EX_DESC_EOT_MASK 0x20 Signed-off-by: Damien Lespiau commit 4431869bef02d96692dabfa26923b4a5b97e3481 Author: Damien Lespiau Date: Fri Jan 18 11:52:01 2013 +0000 assembler: Rename BRW_ACCWRCTRL_ACCWRCTRL To a more self-describing define. This hopefully will help its inclusion into Mesa. Signed-off-by: Damien Lespiau commit 5e7e3f43a5965d5757952f3798769111a2a21bc7 Author: Damien Lespiau Date: Fri Jan 18 11:04:37 2013 +0000 assembler: Adopt enum brw_message_target from mesa Signed-off-by: Damien Lespiau commit 64e84284e3740f6348501e8513161dd80f895f0c Author: Damien Lespiau Date: Wed Jan 16 15:11:05 2013 +0000 assembler: Remove trailing white spaces from brw_structs.h Signed-off-by: Damien Lespiau commit c35e0677fe1afee4f9975ffdcd3d772f37ae1ae7 Author: Damien Lespiau Date: Wed Jan 16 14:56:40 2013 +0000 assembler: Adopt brw_structs.h from mesa Finally merge both brw_structs.h from mesa. One detail has risen in that last commit, the msg_control field of data port message descriptors. Mesa's msg_control field is sometimes split with messages-specific fields where the assembler (at least for recent generations) exposes the full msg_control value in the send instruction. As libva's shaders encodes the full msg_control value in its send instructions, I've chosen to not take the split msg_control from mesa. It's absolutely possible to have a patch fixing that divergence at some later point. I've also kept a hack introduced with ironlake to not have to rewrite shaders (that encode msg_control in the text, remember), and thus creates a another difference with Mesa. - GLuint msg_control:3; - GLuint msg_type:3; + GLuint msg_control:4; + GLuint msg_type:2; Once again, I've made sure that re-generating libva's shaders don't show any difference. Signed-off-by: Damien Lespiau commit f2059b7cc75deaeabb8ef2104a1fe7a595a94de0 Author: Damien Lespiau Date: Wed Jan 16 01:50:47 2013 +0000 assembler: Rename bits3.id and bits3.fd As always, to sync with mesa. Signed-off-by: Damien Lespiau commit c7dac8495328f9b56895d3be410eea933079d8bd Author: Damien Lespiau Date: Wed Jan 16 01:44:41 2013 +0000 assembler: Rename branch_2_offset to break_cont Once again, import the equivalent struct from mesa. Signed-off-by: Damien Lespiau commit cb425d6d203c9e36d20aaf4c975aecb3ca10b598 Author: Damien Lespiau Date: Wed Jan 16 01:19:29 2013 +0000 assembler: Rename branch to branch_gen6 The purpose of this commit is to synchronize opcode definitions across the gen4asm assembler and mesa. Signed-off-by: Damien Lespiau commit 0fde3ddccc4f2f1dcf9f81c2038ce18ef1a62a29 Author: Damien Lespiau Date: Tue Jan 15 20:34:50 2013 +0000 assembler: Rename gen5 DP pixel_scoreboard_clear to last_render_target The purpose of this commit is to synchronize opcode definitions across the gen4asm assembler and mesa. Signed-off-by: Damien Lespiau commit fe0bd3776e522c6a30060562cf57c6fc75196461 Author: Damien Lespiau Date: Tue Jan 15 20:24:51 2013 +0000 assembler: Remove struct dp_write_gen6 and struct use gen6_dp We ended up with 2 structures that where exactly the same, so just use one, which happens to be the one Mesa has. Signed-off-by: Damien Lespiau commit 8fa561d4bbaec0ba0a4c9ccf2abe9131b893729a Author: Damien Lespiau Date: Tue Jan 15 18:47:05 2013 +0000 assembler: Rename dp_gen7 to gen7_dp and sync it with Mesa's The purpose of this commit is to synchronize opcode definitions across the gen4asm assembler and mesa. I had to drop how mesa splits msg_control as the current assembly language gives access the the whole msg_control field. Recompiling the xorg and the intel driver of libva shaders doesn't show any difference in the assembly created. Signed-off-by: Damien Lespiau commit 1f1ad5974655a241bcf202bcd79a3e2d236bcc1c Author: Damien Lespiau Date: Tue Jan 15 17:35:24 2013 +0000 assembler: Rename dp_gen6 to gen6_dp and sync with Mesa's The purpose of this commit is to synchronize opcode definitions across the gen4asm assembler and mesa. I had to drop how mesa splits msg_control as the current assembly language gives access the the whole msg_control field. Recompiling the xorg and the intel driver of libva shaders doesn't show any difference in the assembly created. Signed-off-by: Damien Lespiau commit 668e0dff7da8a604e626c1c5fefe65a3a8f2be19 Author: Damien Lespiau Date: Tue Jan 15 16:40:06 2013 +0000 assembler: Rename dp_read_gen6 to gen6_dp_sampler_const_cache The purpose of this commit is to synchronize opcode definitions across the gen4asm assembler and mesa. Signed-off-by: Damien Lespiau commit 31259c5edc51d16afcfd453f7abaf81601a62a15 Author: Damien Lespiau Date: Tue Jan 15 14:05:23 2013 +0000 assembler: Rename three_src_gen6 to da3src Mesa's brw_structs.h has named/renamed this field to da3src. Sync with them. Signed-off-by: Damien Lespiau commit e71f1d2ad46af09a61b0fd03f4b00514de5091e5 Author: Damien Lespiau Date: Mon Jan 14 19:13:19 2013 +0000 assembler: Sync brw_instruction's header with mesa's Two changes there, a field has been renamed and one bit of padding is now used for compressed instructions. Signed-off-by: Damien Lespiau commit 5d526899392caa9ec6fd954d1668a3a5355836c7 Author: Damien Lespiau Date: Tue Jan 22 08:35:15 2013 +0000 build: Add the debugger compilation status to the summary Signed-off-by: Damien Lespiau commit 5435708a50beb0368ed6694695ac89f9a8d49c07 Author: Damien Lespiau Date: Mon Jan 21 23:02:36 2013 +0000 build: Only build the assembler if flex and bison are found And start displaying a nice summary of what we are going to compile. Signed-off-by: Damien Lespiau commit 9d3707a78f8adb5851ff65dbc4254d628556b03b Author: Damien Lespiau Date: Sat Jan 19 11:54:05 2013 +0000 build: Don't use AM_MAINTAINER_MODE This does not bring us anything these days, not using the macro at all is the same thing as having it always on. See this discussion: https://www.redhat.com/archives/virt-tools-list/2010-October/msg00049.html Signed-off-by: Damien Lespiau commit e5d07538b2d59034010e9c0f3ff1395faee6d4e3 Author: Damien Lespiau Date: Tue Jan 15 13:52:57 2013 +0000 gitignore: Ignore TAGS files TAGS files are generated with "make tags" to quickly jump through the code. Ignore those by-products of automake/ctags. Signed-off-by: Damien Lespiau commit af7e11de69690e465e30632e546771ee3c3bdce7 Author: Damien Lespiau Date: Mon Jan 14 23:25:14 2013 +0000 build: Add CAIRO_FLAGS to the debugger compilation The library in lib/ exposes in its main header and thus users must be able to include it. commit 191c85976d7f924de781ac4d9ad8a73b034493bf Author: Damien Lespiau Date: Mon Jan 14 23:21:21 2013 +0000 build: Integrate the merged gen assembler in the build system Signed-off-by: Damien Lespiau commit e466360df9ca2d43754e825eb496d8dd23c9ccf0 Author: Xiang, Haihao Date: Wed Oct 31 16:10:20 2012 +0800 bump version to 1.3 Signed-off-by: Xiang, Haihao commit 5d727898489f6fb37a263abfa8aa0fcd6aafdcae Author: Homer Hsing Date: Tue Oct 23 09:21:15 2012 +0800 Fix typo. "donesn't" -> "doesn't" commit 93f2a4fc93b70d37a207589800f66ab8be81bd6e Author: Zhao Yakui Date: Mon Oct 22 16:13:51 2012 -0400 Add the CRE enginee for HSW+ This is also for media encoding like VME, which can do the operation of check & refinement. Signed-off-by: Zhao Yakui commit 495c4e14e7417610bf75ca397450b4b8447e29a3 Author: Gwenole Beauchesne Date: Mon Oct 22 16:13:51 2012 -0400 Fix JMPI encoding for Haswell. It uses the byte-aligned jump instead of 64-bit units. Signed-off-by: Gwenole Beauchesne Signed-off-by: Zhao Yakui commit 8aa952873cbf3449815e75318c4807e43e74004e Author: Gwenole Beauchesne Date: Mon Oct 22 16:13:51 2012 -0400 Add initial support for Haswell. Signed-off-by: Gwenole Beauchesne Signed-off-by: Zhao Yakui commit 0c32e25c96355c4edfa589fc5dad3993da82a90e Author: Gwenole Beauchesne Date: Mon Oct 22 16:13:51 2012 -0400 Allow Gen version decimals. This is preparatory work for Haswell (Gen 7.5). Signed-off-by: Gwenole Beauchesne commit a5e5d94ce37356a6b5d2bf389456849f2f3c79ef Author: Gwenole Beauchesne Date: Mon Oct 22 16:13:51 2012 -0400 Bump gen_level to multiple of tens. Add new helper macros to check versions: - IS_GENp() meant to match Gen X and above - IS_GENx() meant to match Gen X exactly. Patch mechanically generated. No stale "gen_level" usage. Signed-off-by: Gwenole Beauchesne Signed-off-by: Zhao Yakui commit ee321884221942e3dbe91d46d293e0115620fbfc Author: Homer Hsing Date: Fri Oct 19 11:18:23 2012 +0800 Fix Gen7 JMPI compilation Gen7 JMPI Restrictions in bspec: The JIP data type must be Signed DWord commit e221b0aa78ccd0f75f64dc3fab66c06fa9fb1828 Author: Homer Hsing Date: Thu Oct 18 12:37:31 2012 +0800 Fix sub-register number of an address register encoding The AddrSubRegNum field in the instruction binary code should be: code value(advanced_flag==0) value(advanced_flag==1) a0.0 0 0 a0.1 invalid input 1 a0.2 1 2 a0.3 invalid input 3 a0.4 2 4 a0.5 invalid input 5 a0.6 3 6 a0.7 invalid input 7 a0.8 4 invalid input a0.10 5 invalid input a0.12 6 invalid input a0.14 7 invalid input commit 599d7d244afa4cf70de02d7b6799449fe8cbe57b Author: Homer Hsing Date: Tue Oct 16 14:14:25 2012 +0800 Fix symbol register subreg number calculation rule symbol_reg_p When in normal mode, subreg_nr should not be divided by type_size. This patch fixes such bug. commit 460fdc041b0d510f96b5d4cd0decd5e1c42d7fa8 Author: Homer Hsing Date: Fri Sep 28 14:10:00 2012 +0800 Show warning when compiling the grammar parser commit e8cb195c6d9bb9072896e15416f4207ccffdd919 Author: Homer Hsing Date: Fri Sep 28 14:05:51 2012 +0800 Support Gen6 WHILE instruction commit 2ad18c1c97a14edd9733b1d7319a1c50a170be92 Author: Homer Hsing Date: Fri Sep 28 14:02:25 2012 +0800 Make sure Gen6 IF works commit c56d78611641cfa7eff5b046054b051206a97dc6 Author: Homer Hsing Date: Fri Sep 28 13:46:21 2012 +0800 Make sure Gen6 ENDIF work commit 397e1ccccbd00fcf2ec763f9d6f8c82db8d395ee Author: Homer Hsing Date: Fri Sep 28 13:43:44 2012 +0800 Fix JIP position for Gen6 JMPI commit c91bd8c76ffb3a5098791a7d9c8b45a789f77cc2 Author: Homer Hsing Date: Thu Sep 27 16:20:39 2012 +0800 Fix Gen6 ELSE instructions code logic according to bspec. commit ce55552470d8135070d4ceb2c21585f77de68210 Author: Homer Hsing Date: Thu Sep 27 15:44:15 2012 +0800 Make sure BREAK/CONT/HALT work on Gen6. commit 3de439e2f5e98b2afc909bd02b27403755d475ae Author: Homer Hsing Date: Thu Sep 27 15:39:28 2012 +0800 Support Gen6 RET instruction. commit 7529682d0a7878160dfb5ef91da886acba27d22d Author: Homer Hsing Date: Thu Sep 27 15:31:56 2012 +0800 Support Gen6 CALL instruction. commit b899aba57f0e1b8a01b3f74b26a8c575a69ab6ae Author: Homer Hsing Date: Thu Sep 27 14:56:30 2012 +0800 Replace variable init code in WAIT by src_null_reg commit 7e2461b6fc357476adebad19095f5cfdb4038b31 Author: Homer Hsing Date: Thu Sep 27 14:48:14 2012 +0800 Let ip_dst and ip_src become local const variable, so as to reduce replicated code. commit 45ab3cf5a1fd810c380d7d973a5b034f8f3aa78c Author: Homer Hsing Date: Thu Sep 27 14:20:32 2012 +0800 Support Gen6 three-source-operand instructions. Add bits1.three_src.gen6.dest_reg_file according to Gen6 spec commit 72a3c194db2682cb00ea882933f17940a5dfde7e Author: Homer Hsing Date: Thu Sep 27 13:51:33 2012 +0800 Compile ELSE and WHILE in Gen5 as same way as in Gen4 commit f55ed65bb28bd8bce416a9dfd32dfc0028cb61bf Author: Homer Hsing Date: Mon Sep 24 16:39:36 2012 +0800 Fix reloc_target_offset computing logic commit 4bf84ec1461a5346a84259ade14ae0da2c4ac898 Author: Homer Hsing Date: Mon Sep 24 10:12:26 2012 +0800 Fully support Gen7 branching instructions Also fix integer argument parsing rule for JMPI, IF and WHILE Fix shift/reduce conflicts in relativelocation commit 88dfdf34df88949e61efefacde1be14c36e9966e Author: Homer Hsing Date: Mon Sep 24 10:06:35 2012 +0800 Supporting multi-branch instructios BRD & BRC brd: redirect channels to branches brc: let channels converging together also rewrite code converting label to offset commit 5d589dbe132f32718ea144f932fbe3cd37017957 Author: Homer Hsing Date: Fri Sep 21 12:35:35 2012 +0800 Use right-recursing in parser rule inst_option_list This recursing cost less memory. It is recommended by Bison. commit a7b1c09d18fc25069ddc39ef6c6aa00ab67537ad Author: Homer Hsing Date: Fri Sep 21 12:33:13 2012 +0800 Support subroutine instructions, CALL & RET commit c0ebde27866d6638bc6326ab4996081874a04ae0 Author: Homer Hsing Date: Fri Sep 21 10:14:31 2012 +0800 Merge replicative code in gram.y commit b0b540f02a67ca8d7d1e6748586a51e5bd755503 Author: Homer Hsing Date: Fri Sep 21 10:06:20 2012 +0800 Reduce replicative code in gram.y by reloc_target field in src_operand Bspec says JIP and UIP should be the source operands. It is better if src_operand has a field "reloc_target" according to bspec. The replicative code in JMPI and branchloop rules can be merged into one. commit 1f9a4d71e8b87ab08209cd42b6651b4e0c04a433 Author: Homer Hsing Date: Fri Sep 21 09:51:55 2012 +0800 Restrict type of relativelocation2 to int Original rule set it to EXP | NUMBER, then YYERROR if it is NUMBER. This patch set it directly to EXP, restricting its type to int. commit ccd17211909ce0a1c64904e70774a770feb8b8a4 Author: Homer Hsing Date: Fri Sep 21 09:37:06 2012 +0800 Rewrite label matching code. Collect labels in a linked list. Label matching is faster because of searching only in a small list, rather than searching a label in all instructions. commit 751838e809003529cbb3753e4e332e5a191905d6 Author: Homer Hsing Date: Fri Sep 21 08:39:57 2012 +0800 Add second_reloc_target in the data structure. Since Gen6+, some branching instructions have two relocation targets. commit d6f02c181f9c25b60575bfe54d70fd5f58c6e5b4 Author: Homer Hsing Date: Thu Sep 20 14:06:06 2012 +0800 Add test case for ".declare" overriding feature. Later same name .declare pragma will override previously defined one. This patch add a test case for that feature. commit 2ab4c0d9b8b15e770ef6a6af4f60a2f5bf007c2b Author: Homer Hsing Date: Thu Sep 20 14:04:20 2012 +0800 Fix memory leaking in the parser STRING has been malloc'ed by strdup in src/lex.l but forgotten to be freed in src/gram.y. commit 741008e0503df0a0626d27da99a30aac0c880c29 Author: Homer Hsing Date: Thu Sep 20 13:09:15 2012 +0800 Fix field length of JIP for one-offset-branch in Gen6 Such JIP has 25 bits length in Gen6. commit 6983eebf47f37def8f2315d5af1800b81644f240 Author: Homer Hsing Date: Wed Sep 19 09:34:58 2012 +0800 Automatically run all test cases. In the past test/run-test.sh run only one test case per call. This patch let it automatically run all test cases. commit 1c009349bc894bd195b5522540536898b0bee574 Author: Homer Hsing Date: Tue Sep 18 16:44:45 2012 +0800 Fix missing environment variables problem in test/run-test.sh Currently test/run-test.sh cannot get the value of ${srcdir} and ${top_builddir}. Thus we cannot run any test case. This patch uses $0 to get the absolute path of run-test.sh. Now test cases work. commit 868cbf7dc56d96dce1463cd9288730ece7ee9e9b Author: Homer Hsing Date: Tue Sep 18 16:32:39 2012 +0800 Add a generic hash table algorithm. Reuse for declared_reg_table and label_table in the future. Rewrite find_register() and insert_register(). The hash table code has been extracted. We may use those code for label table in the future. commit 131f61f2ef2ecac4f0e4cb207a58449f36abfa36 Author: Homer Hsing Date: Tue Sep 18 16:28:27 2012 +0800 Add a test case for ".declare" pragma commit c3bcc7dbeb520fcca387dac510f47d4847cc32b8 Author: Homer Hsing Date: Tue Sep 18 13:57:20 2012 +0800 Rename brw_instruction.bits3.if_else to branch Because that field will be used for all branch instructions commit bebe8179e1b97ac8111756de1cf27f54eebee150 Author: Homer Hsing Date: Tue Sep 18 13:47:22 2012 +0800 According to BSPEC, put PLN & BFI1 to binaryop, put SUBB to binaryaccop bspec: BFI1 should not access accumulator. PLN should not use accumulator as source. future work in gram.y: show warning if acc is used as dest for ADDC/SUBB/CMP/CMPN/SHL/BFI1. commit 74383f4db4c348be1fd3c227653493c8eb5dab67 Author: Homer Hsing Date: Tue Sep 18 13:25:53 2012 +0800 Explain the difference between binaryinstruction and binaryaccinstruction Developers may add new instructions in wrong place in the future if they don't know the difference between binaryinstruction and binaryaccinstruction. commit 375d1fd7b2858accb91c277b8606eaa98837ce75 Author: Homer Hsing Date: Tue Sep 18 13:12:50 2012 +0800 Renaming according to BSPEC: jump_count -> JIP; pop_count -> UIP. Since bspec SNB+, jump_count and pop_count is renamed to JIP and uIP. commit 6171c61e0c13d563d5aaad85c74940ceaaf6afa9 Author: Homer Hsing Date: Mon Sep 17 16:11:49 2012 +0800 Use bits3.if_else.jump_count instead of bits3.ud for readability commit 5defbd37b6d0c18801298edaa2eba3e9e09cd24d Author: Homer Hsing Date: Mon Sep 17 16:01:16 2012 +0800 Pad NOP instructions instead of the ILLEGAL instruction for entry If a label is an entry, the assembler will pad empty instruction before the label until offset % 4 == 0. In the past, the ILLEGAL instructions are padded. It may raise exceptions. We use the NOP instructions instead. commit e6d61ac20284b0de9b4dc81cb9ba27109b477cd1 Author: Homer Hsing Date: Mon Sep 17 13:34:38 2012 +0800 Merge same if branches in declare_pragma section in gram.y commit c19f8338d726fd9d4fcec7596118228f515f8dc1 Author: Homer Hsing Date: Fri Sep 14 15:27:19 2012 +0800 Reduce memory cost in entry_table Original code double entry table space if there is no space. It may waste 50% memory of the entry table. Now we use a link list to store entry items. commit f02a1ed42758c38ab97d5a58a4dd821b8daaf0eb Author: Homer Hsing Date: Fri Sep 14 13:40:08 2012 +0800 Make the entry point padding code logic looks nicer commit 73ab2f6a680035414c9f97fd691b476ace722d6b Author: Homer Hsing Date: Fri Sep 14 10:50:09 2012 +0800 Fix a typo in src/main.c: "in unit of type" -> "in unit of byte" commit 7186723f81f42b56be44709c4aa6f178553ce2dc Author: Homer Hsing Date: Fri Sep 14 10:06:39 2012 +0800 Reduce hash value collision probability in src/main.c Original code use "hash_value = *name++", which may produce hash value collision for word permutations like "abc", "bac" and "cba". commit 940522588af6ac1881765edfdbc23637f67db45b Author: Homer Hsing Date: Fri Sep 14 10:02:53 2012 +0800 Move program_defaults init statement into variable declaration In original code, the init value for "program_defaults.register_type" is put inside main(), which may be hard to maintain. commit 77dcc41cfdb2156e5953eeb5a50a2b8fab94ab8c Author: Homer Hsing Date: Fri Sep 14 09:42:30 2012 +0800 Better comment text. Change "c like" to "C style" in main.c commit 81859af1106362deb3f410a93fe906dae7c6864d Author: Homer Hsing Date: Fri Sep 14 09:34:58 2012 +0800 Replace bzero by memset. bzero has been removed from POSIX.1-2008. Should use memset instead. commit b1ef3bc209f2b4beece1bc84a7a01df3e80b653a Author: Homer Hsing Date: Fri Sep 14 09:02:01 2012 +0800 Supporting integer subtraction with borrow subb: subtract unsigned integer src1 from src0. store the result in dst and store the borrow (0 or 1) as a 32-bit value in acc. commit 9e711a4f2ccf3d2008d25dc613b5f9e8c6639193 Author: Homer Hsing Date: Fri Sep 14 08:56:36 2012 +0800 Supporting find first bit instructions fbh: Find the first significant bit searching from the high bits in src0 and store the result in dst. fbl: Find the first 1 bit searching from the low bits in src0 and store the result in dst. commit b094cd8648bcbcdb6015ae6373f01555e7408d2b Author: Homer Hsing Date: Fri Sep 14 08:50:18 2012 +0800 Supporting half precision to single precision float convertion The f16to32 instruction converts the half precision float in src0 to single precision float and storing in dst. The f32to16 instruction converts the single precision float in src0 to half precision float and storing in the lower word of each channel in dst. commit 4285d9c2ce80f5e5306f544ec47e1485b925e83c Author: Homer Hsing Date: Fri Sep 14 08:41:16 2012 +0800 Supporting count bit set instruction The cbit instruction counts component-wise the total bits set in src0 and stores the resulting counts in dst. commit d4f48a7271cf94073194112fb763685043e723dd Author: Homer Hsing Date: Fri Sep 14 08:32:12 2012 +0800 Supporting instruction "reverse bits" The bfrev instruction component-wise reverses all the bits in src0 and stores the results in dst. commit 4d6337dfaf6b91957d839f65695e15e4fe1a7856 Author: Homer Hsing Date: Fri Sep 14 08:27:41 2012 +0800 Supporting instruction Bit Field Insert 1 The bfi1 instruction component-wise generates mask with control from src0 and src1 and stores the results in dst. commit 5777bfa91fdbb0f89d6948570a5ba946ef1d7b34 Author: Homer Hsing Date: Fri Sep 14 08:24:54 2012 +0800 Delete an extra space character in brw_defines.h Now the column is aligned and the code is nicer. commit c3f1e0a732c4cbdca32544fefb887496f7b3f0c4 Author: Homer Hsing Date: Fri Sep 14 08:20:13 2012 +0800 Supporting addc instruction The addc instruction performs component-wise addition of src0 and src1 and stores the results in dst; it also stores the carry into acc. commit 8ca55688ea01a688677996570fb1f6626469d99d Author: Homer Hsing Date: Thu Sep 13 11:05:50 2012 +0800 Supporting bit field extract and bit field insert 2 Supporting two new operators, bfe and bfi2 bfe: Component-wise extracts a bit field from src2 using the bit field width from src0 and the bit field offset from src1. bfi2: component-wise performs the bitfield insert operation on src1 and src2 based on the mask in src0. commit 210510cebbac669ce86cf557c6b5d37d757ac7be Author: Homer Hsing Date: Wed Sep 12 13:04:49 2012 +0800 Supporting LRP: dest = src0 * src1 + (1-src0) * src2 commit a034bcbd04b5cd67b94e8521f5c17738645a13fd Author: Homer Hsing Date: Fri Sep 7 14:38:13 2012 +0800 Support trinary source instruction "multiply add". MAD (Multiply ADd) computes dst <- src1*src2 + src0. Tried best to follow previous variable naming habit. Also renamed "triinstruction" -> "trinaryinstruction" in grammar parser for better readability. commit 0d3f8495ea90515c3852c43fb38a345d5ac9c3da Author: Homer Hsing Date: Fri Sep 7 09:53:17 2012 +0800 add data structure in src/brw_structs.h for supporting three-source-operator instruncions commit 75f1d80982e7cf16e5ca98f8cc295896fdcd339e Author: Homer Hsing Date: Fri Sep 7 09:20:50 2012 +0800 Comment magic words "da1", "da16", "ia1", and "ia16" commit aab7cd5cc59c9af88bb5f1b7f73ab6f67ebdce93 Author: Homer Hsing Date: Thu Sep 6 16:12:08 2012 +0800 close File yyin before calling yylex_destroy This patch makes sure file handler yyin is closed. yylex_destroy() calls yy_init_globals(), which reset yyin to 0. Therefore if we do not close yyin before yylex_destroy(), yyin will not be closed anymore. commit 31401afe78e2a1a08fa89448ed2e4fa12760c64d Author: Homer Hsing Date: Thu Sep 6 15:55:54 2012 +0800 Call yylex_destroy() to free memory after yyparse() commit 302ca73198bf9d7d2ae136201529d647ce26c1e2 Author: Homer Hsing Date: Thu Sep 6 15:33:41 2012 +0800 Close input file handler yyin after yyparse commit f282ea689b551999afb4331f8f345507704d309d Author: Homer Hsing Date: Thu Sep 6 10:31:22 2012 +0800 Fix a typo ... lable -> label commit ea1fcf0b447d9677859bc3d9692d29434b7fb5be Author: Lu Guanqun Date: Wed Aug 22 09:09:36 2012 +0800 fix the label checking logics Signed-off-by: Lu Guanqun commit 4d75db550ee938067213dc60be9bf5116f4361e2 Author: Xiang, Haihao Date: Tue Jul 17 16:16:11 2012 +0800 Waring if both predication and conditional modifier are enabled but use different flag registers Signed-off-by: Xiang, Haihao commit 3ffbe96c1eb35da7fbaa22d48b26d3ec56b0e31d Author: Xiang, Haihao Date: Tue Jul 17 15:05:31 2012 +0800 Add support for flag register f1 on Ivy bridge Signed-off-by: Xiang, Haihao commit 2f772dd67b353ecd9de7c6c7cbd7e94025b34428 Author: Xiang, Haihao Date: Tue Jul 17 14:18:54 2012 +0800 s/flag_reg_nr/flag_subreg_nr for an instruction s/flagreg/flag_subreg_nr for a condition They are flag subregister number indeed Signed-off-by: Xiang, Haihao commit 968d2d7ef644704a09089ed6fd87a2e41195e304 Author: Xiang, Haihao Date: Tue Jul 17 14:01:54 2012 +0800 Remove flag_reg_nr from the DW3 of an instruction Signed-off-by: Xiang, Haihao commit f3f6ba24e6e576a315d14eaeb31a563e5f40459b Author: Xiang, Haihao Date: Tue Jul 17 13:46:59 2012 +0800 Change the rule for flag register The shift/reduce conflict mentioned in the comment has been fixed, so flagreg can return the reg number in the lvalue now. In addition, it will be easy to add support for flag register f1 on Ivy bridge Signed-off-by: Xiang, Haihao commit 128053f120fba33394c5f05fbbe75eb9029d3792 Author: Xiang, Haihao Date: Fri Jun 29 16:47:10 2012 +0800 Accept symbol register as the leading register of the request Signed-off-by: Xiang, Haihao commit fc2995b59aae45b85880f6b281f68f862fae5b0d Author: Ben Widawsky Date: Sun Jun 24 15:03:28 2012 -0700 disasm: decode SENDC like SEND Signed-off-by: Ben Widawsky commit 35c217b98618e2f2a4b25c1cccb348671f54fa61 Author: Ben Widawsky Date: Sun Jun 24 15:01:57 2012 -0700 disasm: add gen6 style send decoding Signed-off-by: Ben Widawsky commit 22505dc0511e18f42bd97ff3ffd7503095071b97 Author: Ben Widawsky Date: Sun Jun 24 14:43:45 2012 -0700 disasm: add sendc Signed-off-by: Ben Widawsky commit 26c36abdf64dc64afff9cefa561ff4c1fb86f5d6 Author: Ben Widawsky Date: Sat Jun 23 19:36:48 2012 -0700 disasm: add pln instruction Signed-off-by: Ben Widawsky commit 0b5f7fa0490be0e6f755d244b8e5d121c045c6d0 Author: Xiang, Haihao Date: Thu Aug 11 15:35:14 2011 +0800 A new syntax of SEND intruction on Ivybridge [()] send () reg greg imm6 reg32a Signed-off-by: Xiang, Haihao commit d6bc0e4ea30c576944838f0fed289d982d09fb9b Author: Xiang, Haihao Date: Tue Jun 21 11:12:13 2011 +0800 bump version to 1.2 Signed-off-by: Xiang, Haihao commit 86f8ca6af925b8d8985ba667e6fe634f0579b353 Author: Xiang, Haihao Date: Tue May 31 13:36:03 2011 +0800 Support VME on Ivybridge Signed-off-by: Xiang, Haihao commit 27050395d21955cf91f70a10da7abb726fa0bf70 Author: Xiang, Haihao Date: Fri Jun 10 16:04:30 2011 +0800 Support DP for sampler/render/constant/data cache Since Sandybridge, DP supports cache select for read/write. Some write messages such as OWord Block Write don't support render cache any more on Ivybridge. So introduce a generic data_port messsage for Sandybridge+. data_port( cache_type, /* sampler, render, constant or data(on Ivybridge+) cache */ message_type, /* read or write type */ message_control, binding_table_index, write_commit_or_category, /* write commit on Sandybridge, category on Ivybridge+ */ header_present) Signed-off-by: Xiang, Haihao commit e97f0bca5fab4ddff3199470294d82d60fcc0b62 Author: Xiang, Haihao Date: Mon May 30 16:30:48 2011 +0800 sampler/render/constant cache unit since Sandybridge since Sandybrdige, there isn't a single function unit for data port read/write. Instead sampler/render/constant cache unit is introduced, data port read/write can be specified in a SEND instruction with different cache unit. To keep compatibility, currently data port read always uses sampler cache unit however data port write uses render cache unit Signed-off-by: Xiang, Haihao commit 6a3a9e7148723fcf7339e0878b5c89b1bb95b2b5 Author: Xiang, Haihao Date: Mon May 30 16:00:12 2011 +0800 fix an error in commit cf76278 Signed-off-by: Xiang, Haihao commit 46ffdd5df74c8e502ea0bf3636927d6b257aafda Author: Xiang, Haihao Date: Wed May 25 14:29:14 2011 +0800 SEND uses GRFs instead of MRFs on Ivybridge Signed-off-by: Xiang, Haihao commit 67d4ed665d4f9e1267e2ff61b5a3005687b42b38 Author: Xiang, Haihao Date: Mon May 23 13:45:04 2011 +0800 Add support for sample (00000) on Ivybridge Signed-off-by: Xiang, Haihao commit c8d6bf353eb46ac109baeba3bd053e31a6a7835f Author: Xiang, Haihao Date: Mon May 23 13:32:32 2011 +0800 Add support for data port read/write on Ivybridge Signed-off-by: Xiang, Haihao commit 6fa6b45dafec7109b69e13a5d72e447bc8c31189 Author: Xiang, Haihao Date: Mon May 23 12:43:25 2011 +0800 Add -g 7 for Ivybridge Signed-off-by: Xiang, Haihao commit 37d68103a83e27159ec2ddbca4675ff60215b784 Author: Feng, Boqun Date: Tue Apr 19 08:43:22 2011 +0800 Send instruction on PRE-ILK [()] send () commit 52399867bfac2b8a7659acc291de45700fecd00c Author: Zhou Chang Date: Thu Apr 14 11:51:29 2011 +0800 Add VME support in SEND commit 83a5c38e12a7c8d1f342abf330c8c6bad1a376b3 Author: Ben Widawsky Date: Wed Mar 23 22:08:39 2011 -0700 intel-gen4asm: add byte array style disasm I previously added a byte array style output for intel-gen4asm, but there was no way to disassemble here. Well here that is. commit cbfab5f415a56517d4a8e3faed5e9936743ab476 Author: Ben Widawsky Date: Thu Mar 17 18:57:59 2011 -0700 intel-gen4asm: have a C-like binary output Have the assembler support a byte array output. This is useful for writing blobs which can directly be linked code that wishes to upload to the EU. Signed-off-by: Ben Widawsky commit e7f4dc6e39fbf35a2474048c11fbc6b086e59837 Author: Xiang, Haihao Date: Tue Mar 1 16:43:02 2011 +0800 fix the parameters of register region Signed-off-by: Xiang, Haihao commit 85da7b9e8a4737afd4b2ae6684374d1d43fc4ba8 Author: Xiang, Haihao Date: Thu Feb 17 13:24:11 2011 +0800 send instruction on GEN6 [()] send () reg mreg imm6 imm32 Signed-off-by: Xiang, Haihao commit 852216d6e35fafedd9d315e26c8761d5bcf83943 Author: Xiang, Haihao Date: Wed Feb 16 15:26:24 2011 +0800 fix notification count register Signed-off-by: Xiang, Haihao commit 27b4303a30cab372597c1a78f3c0b686451a8f53 Author: Xiang, Haihao Date: Mon Dec 13 16:07:16 2010 +0800 Support instructions which strictly follow the documents. Previously some instructions parsed by this assembler don't follow the documents. Signed-off-by: Chen, Yangyang Signed-off-by: Han, Haofu Signed-off-by: Zou Nan hai Signed-off-by: Xiang, Haihao commit 66649d7b4efc87063b0bb7677bd708b61973b2ac Author: Chen, Yangyang Date: Mon Dec 13 15:36:02 2010 +0800 1. fix DOT 2. rule for instrseq Signed-off-by: Chen, Yangyang Signed-off-by: Han, Haofu commit bf06f07d5bee7ed4e3e52ebc984e56f6a40fbad1 Author: Chen, Yangyang Date: Mon Dec 13 15:30:48 2010 +0800 fix CHANNEL select Signed-off-by: Chen, Yangyang Signed-off-by: Han, Haofu commit 14c0bd0fb3d0816d85db938337d16adda5686b5f Author: Xiang, Haihao Date: Mon Nov 1 16:16:25 2010 +0800 Support for headerless write Add a new parameter to write Signed-off-by: Xiang, Haihao commit d0ae3297086e671fa41f7d565c29f6ecc8d77077 Author: Xiang, Haihao Date: Thu Oct 21 14:37:18 2010 +0800 bump version to 1.1 Signed-off-by: Xiang, Haihao commit 5405532ffc1926f0616581a330db32d07335b960 Author: Xiang, Haihao Date: Wed Oct 27 09:42:56 2010 +0800 add support for math instruction on Sandybridge Signed-off-by: Xiang, Haihao commit f1f5208e1e36fe89660f600388613aa5cb3c61b0 Author: Xiang, Haihao Date: Tue Oct 19 13:26:24 2010 +0800 add support for plane instruction (pln) Signed-off-by: Xiang, Haihao commit dcdde5347eb95343d493f2e098ed41d930866b37 Author: Xiang, Haihao Date: Thu Oct 21 14:33:35 2010 +0800 Send on Sandybridge uses a message register as operand src0 Signed-off-by: Xiang, Haihao commit c2382cab55ea44a45ff7836647dfec43588c0b73 Author: Xiang, Haihao Date: Sat Oct 9 13:57:48 2010 +0800 no compression flag on Sandybridge Signed-off-by: Xiang, Haihao commit 718cd6cb4260847c1fa5b3e6d40bd8cecf12f3f7 Author: Xiang, Haihao Date: Sat Oct 9 12:52:08 2010 +0800 print error message when using math function on Sandybridge. Sandybridge doesn't have math funtion, instead it supports a set of math instructions. The support for math instructions will be added later. Signed-off-by: Xiang, Haihao commit 9d2be258386aeefdfe86aef52ecd0c5fcdde5d26 Author: Xiang, Haihao Date: Sat Oct 9 12:46:15 2010 +0800 sampler, urb write, null and gateway on Sandybridge are same as Ironlake. Signed-off-by: Xiang, Haihao commit a8458d5d5e097c03536c47ea455257cf67f21c95 Author: Xiang, Haihao Date: Sat Oct 9 11:09:47 2010 +0800 add support for data port read on Sandybridge Signed-off-by: Xiang, Haihao commit 61784dbc9739bc6dcd935311cc8aa2e1a6d02e73 Author: Xiang, Haihao Date: Fri Oct 8 16:48:15 2010 +0800 add support for data port write on Sandybridge. Signed-off-by: Xiang, Haihao commit 4f777e73f1b9fb0d70378d30aa4bda3fb60ee128 Author: Xiang, Haihao Date: Fri Oct 8 15:07:51 2010 +0800 fix send instruction on Sandybridge Send doesn't have implied move on Sandybridge, the SFID moves to bits[24,27] which is used as the destination of the implied move on Prev GEN6. Signed-off-by: Xiang, Haihao commit 55d81c4ce7ee5ec79fcaacf2c22d42580b49cf82 Author: Xiang, Haihao Date: Fri Oct 8 13:53:22 2010 +0800 add AccWrCtrl flag on Sandybridge Signed-off-by: Xiang, Haihao commit 5bcf1f5a0360bbfb3c135ccac1d0e67e558a71c0 Author: Xiang, Haihao Date: Fri Oct 8 13:10:15 2010 +0800 always set destination horiz stride for Align16 to 1 on Sandybridge. Signed-off-by: Xiang, Haihao commit 95d0ce48f667783d9b50d514c1ba928a64463743 Author: Xiang, Haihao Date: Fri Oct 8 12:53:38 2010 +0800 fix jump count for Sandybridge. It is same as Ironlake. Signed-off-by: Xiang, Haihao commit eb92c228cdf17d92b4d616bc33366aaf5144c3e1 Author: Xiang, Haihao Date: Fri Oct 8 12:52:34 2010 +0800 add -g 6 for Sandybridge Signed-off-by: Xiang, Haihao commit db8aedc745faea10b10f96b2dca9e29543192e68 Author: Zou Nan hai Date: Wed Apr 21 11:02:21 2010 +0800 use left recursion instead of right recursion to avoid memory exhausted issue when compiling large source files commit dea75a6935109e8fc3e667705375ae7f4f5b01ba Author: Eric Anholt Date: Tue Dec 22 17:06:47 2009 -0800 Fix setup of immediate types for gen4 disasm. Caught by clang. commit a6f1455019d719d554d3a07820ed767957b442fd Author: Eric Anholt Date: Tue Aug 4 16:27:28 2009 -0700 disasm: Print out ELSE and ENDIF src1 arguments like IF does. commit 459c95b20c845be7d7bdeeb2353909b405f69b54 Author: Eric Anholt Date: Tue Aug 4 15:02:12 2009 -0700 whitespace cleanup from Mesa import. commit c6f2da4e82123a98f5a2d7fc462089363ea37f0c Author: Zou Nan hai Date: Wed Oct 28 10:14:19 2009 +0800 1. type syntax :ud :uw etc 2. empty instruction option 3. remove a conflict commit 5608d2765dfa22afc4d6ec843e9e8f1a40ceef4a Author: Zou Nan hai Date: Tue Oct 20 14:51:04 2009 +0800 support simple expression commit 8521146207abaefb8fbb0ba9850496902ff5557d Author: Xiang, Haihao Date: Thu Jul 23 10:43:27 2009 +0800 add intel-gen4asm.pc.in bump version to 1.0 commit 60cf6e09dd006692414f7d83e7e9dcdfcb79c5fc Author: Xiang, Haihao Date: Thu Jul 23 10:33:55 2009 +0800 the offset of JMPI is in unit of 64bits on GEN5. This fix is only applied for JMPI label. It is up to you to use a right offset for JMPI imm32|reg in your program. commit 5261b8475e25f66043df4b389e7ef13d4ccf797d Author: Xiang, Haihao Date: Thu Jul 23 10:32:51 2009 +0800 change read message format on GEN5 to re-use a lot of shaders for GEN5. commit 549b751afb30723c776747419d9abfc98319a6b2 Author: Xiang Haihao Date: Tue Jun 30 10:02:33 2009 +0800 Add support for GEN5 Add a new option [-g n], n=4(GEN4),5(GEN5). If don't use -g, the default value is 4(GEN4) commit be9bcee15f82c9ba4557639ec77b8a00b303c884 Author: Zou Nanhai Date: Tue Dec 9 18:38:54 2008 -0800 Add support for labeled and conditional branches Signed-off-by: Keith Packard commit 5a2ec836e1b05d246f6312e32a6d76b612fecef9 Author: Keith Packard Date: Sat Oct 18 20:07:45 2008 -0700 Support more addressing modes in disasm commit d866fff116d52c90aaa699b78ebd6d9526517aa4 Author: Eric Anholt Date: Wed Jun 18 15:09:30 2008 -0700 Fix compiler warning from missing include. commit 807f8768e9a55fc4be4ef7f66211b1c9a53bde1d Author: Zou Nan hai Date: Wed Jun 18 15:05:19 2008 -0700 Add support for dp_read message. commit 26afe90126eefb2bed16dc9a7ac45aeb09cfb4f9 Author: Zou Nan hai Date: Wed Jun 18 15:04:11 2008 -0700 Add thread_spawner message target support. commit 2033aea3dd429b94f5272a83ad1d46d95ecbff04 Author: Keith Packard Date: Wed Apr 23 23:10:40 2008 -0700 Add conditional support to assembler. Add align16 dest support to disasm. This is working towards round-tripping mesa programs. Still need indirect register addressing and align16 source support. commit d8057c9bcdf65ffdcd180f017106bd73d9f17c88 Author: Keith Packard Date: Wed Apr 23 19:28:23 2008 -0700 Add math and urb units, deal with nop commit ae85b10cf03ea1bdb920cb70af186830775f3b1f Author: Keith Packard Date: Wed Apr 23 12:52:58 2008 -0700 Add disassembler (intel-gen4disasm). Decodes most simple instructions. Still needs work on branching and send. commit 082fbe8738988effb46749db905ddc3b2b3287d9 Author: Keith Packard Date: Fri Apr 11 11:04:42 2008 -0700 Support #line directives commit b81aca4948b18e65252f2629c5fdd446e8e6e818 Author: Keith Packard Date: Sun Mar 30 00:58:40 2008 -0700 Ensure that parse errors cause non-zero exit. Also, avoid creating output file when a parse error occurs commit 2d4d401d709953520cec0c40d38781caa913f6f8 Author: Keith Packard Date: Sun Mar 30 00:58:28 2008 -0700 Add packed vector immediate values commit 3fd6e2fc7ba168ade75a98fc291ea8566188f8d9 Author: Keith Packard Date: Sun Mar 30 00:57:40 2008 -0700 Add GCC warnings commit 6e4b04a807c67c6c4a652994e836206964749af9 Author: Eric Anholt Date: Fri Sep 1 16:19:04 2006 -0700 Add accidentally forgotten rnde test. commit 713db8b220009c9fd10be0ce259bfa02bca7bdb0 Author: Eric Anholt Date: Fri Sep 1 16:18:06 2006 -0700 More renaming of gen4asm -> intel-gen4asm, plus README update. commit 09bf91ea75e7910dbf80c173bb47310f4638b37b Author: Eric Anholt Date: Fri Sep 1 15:54:54 2006 -0700 Update .gitignore for gen4asm -> intel-gen4asm commit a1170c5e64b8fd9b7a3b3f2b88a8fafc364c3292 Author: Eric Anholt Date: Fri Sep 1 15:40:57 2006 -0700 Rename package and binary to intel-gen4asm. commit a6d95cc0ce10718b92175977b4c36a2a4746b14c Author: Eric Anholt Date: Fri Sep 1 15:38:37 2006 -0700 Use 0 instead of INITIAL, as the chosen lex on my debian doesn't supply it. commit 09d8be4117105ce1759ff8023a19067cc87659cf Author: Eric Anholt Date: Fri Sep 1 15:37:00 2006 -0700 Use inttypes.h to get at uint32_t instead of sys/types.h. commit 6be3ba41573acfe7ba25c69138bd37c8329604ce Author: Eric Anholt Date: Fri Sep 1 13:57:02 2006 -0700 Update the TODO with more tasks and a bit more description. commit 4ee9c3d869742334672a1c622e2589ebeb8991cd Author: Eric Anholt Date: Fri Sep 1 13:37:51 2006 -0700 Add break, cont, and halt instructions. commit 9201e4e2a0eb2311daf5333f198631a497e06313 Author: Eric Anholt Date: Fri Sep 1 13:37:07 2006 -0700 Add tests for break, cont, and halt instructions. commit f45ac8b2cca414224427069ae7edc28d5e8e4278 Author: Eric Anholt Date: Fri Sep 1 12:29:23 2006 -0700 Fix the exitcode type for ENDIF to be D instead of UD. Fixes the endif test. commit 7c3ba4d49dc0f3e0629d3d2018591acebc0d954a Author: Eric Anholt Date: Fri Sep 1 12:25:22 2006 -0700 Add a test for ENDIF, revealing issues. commit 960ca001cadb2824ecbb93a2dffacf198e61cece Author: Eric Anholt Date: Fri Sep 1 12:11:55 2006 -0700 Fix initialization of null reg for ELSE, and set the pop count right. This fixes the ELSE test. commit a8eb735270722182a4a9152604d40b9be5733853 Author: Eric Anholt Date: Fri Sep 1 12:11:24 2006 -0700 Add a test for the ELSE instruction, revealing issues. commit 1f58efa747e8cfedc3f4277bc0409ac3c348f6df Author: Eric Anholt Date: Fri Sep 1 11:56:12 2006 -0700 Add support for the WAIT instruction. commit 055be60abf1dc4d3b9a77a75fe83b8256caaa52b Author: Eric Anholt Date: Fri Sep 1 11:55:22 2006 -0700 Add a test for wait instruction (not yet implemented). commit d1b879192816aeccd6e49d872856f0e6e98bb1e7 Author: Eric Anholt Date: Thu Aug 31 16:19:08 2006 -0700 Lex integers as unsigned long instead of signed int, fixing the immediate test. commit d72f5c9828c76b0bd7d643b37e0215ebcba4759a Author: Eric Anholt Date: Thu Aug 31 16:16:06 2006 -0700 Add a failing test for maximum ranges of UD/D immediates. commit 330903ad8189707069d8dff597ccf00706f35e94 Author: Eric Anholt Date: Thu Aug 31 15:59:14 2006 -0700 Parse negative integers for imm32s, and don't exceed the IP count width field. This fixes the while test. commit d538dfc4625aaadb3e6de07528d24abd0c1fa8df Author: Eric Anholt Date: Thu Aug 31 15:57:35 2006 -0700 Fix the width of the IP count field expected by the while test. commit 892d6e7ed0b785c7e4fef754f5915e89d0282a20 Author: Eric Anholt Date: Thu Aug 31 15:53:53 2006 -0700 Fix copy'n'paste-o in lexing of the WHILE instruction. commit 56cdee41afae4e4f4cef67866dc590fcd3bdc138 Author: Eric Anholt Date: Thu Aug 31 15:28:10 2006 -0700 Initialize the structure used for setting up the ip src/dst in branches/jumps. This fixes jmpi, if, and iff. The while test still fails to compile. commit 8828725dc9e5e20e22ef5968620e5b6ebde715a9 Author: Eric Anholt Date: Thu Aug 31 15:27:30 2006 -0700 Add tests for jmpi, if, iff, and while, revealing issues. commit cc865f1bc0c92f5469abdced839fcb923c081f67 Author: Eric Anholt Date: Thu Aug 31 15:14:23 2006 -0700 Explain why rnde-intsrc is expected to fail. commit 78cb82a1e2e0169237b836a60b5e7573066168e4 Author: Eric Anholt Date: Thu Aug 31 15:08:52 2006 -0700 Add some masks in comments that will help with writing tests. commit b6fe4bbe2e4bbefcca39a33fb337eb60956d3672 Author: Eric Anholt Date: Thu Aug 31 14:46:58 2006 -0700 Add configure.lineno to ignores. commit 863cd6a5b757740fdfb0598dbfdc4ee9df4be050 Author: Eric Anholt Date: Thu Aug 31 14:46:28 2006 -0700 Add more unary operation tests. commit e3cc73bec41038a63a4f0a09c562a627c1ea98b9 Author: Eric Anholt Date: Thu Aug 31 14:25:33 2006 -0700 Start adding a test suite. commit 356ce76d447a8a8707e399703002988f711bd0f3 Author: Eric Anholt Date: Thu Aug 31 10:27:48 2006 -0700 Add a rule for the ELSE instruction. Untested. commit 1e907c7aed7c11f9b29ca8ee4d6e7916d81a5277 Author: Eric Anholt Date: Thu Aug 31 10:21:15 2006 -0700 Add rules for branch and jump instructions. Untested. commit d77712994d7a6dd183e0274c2afb5f246b06c0d1 Author: Eric Anholt Date: Wed Aug 30 11:40:05 2006 -0700 Add DO and ENDIF instructions. commit 74c81af3ddd0af8488983acedf860fe44868ceb2 Author: Eric Anholt Date: Wed Aug 30 11:10:45 2006 -0700 Fix a compiler warning by defining struct {in,}direct_reg at the top level. commit cc05ba1d9ec0559c766175c06c4d3fc024cea957 Author: Eric Anholt Date: Wed Aug 30 11:09:52 2006 -0700 Fix gram.h creation, fixing dependencies and distcheck. commit c8939edc2822d09717ebfb37df77e2a9daef93d0 Author: Eric Anholt Date: Wed Aug 30 10:50:56 2006 -0700 Fix issues in the grammar that caused errors in bison. commit 9b40c3724a032b24837fdc689ba1e0ca6097350d Author: Eric Anholt Date: Wed Aug 30 10:38:44 2006 -0700 Add autotools build system, and rearrange directory layout. commit 5fbc3990626328d18eeea4fbec2632b54d08772e Author: Eric Anholt Date: Wed Aug 30 10:22:56 2006 -0700 Add input/output file command line arguments. commit 2d298742bfabc799251920c01b3b1db255b13145 Author: Eric Anholt Date: Wed Aug 30 09:57:20 2006 -0700 Add support for register-indirect addressing in source operands. commit 3bcf6b29cdef3cde36a55a5dde6d451a8d8e2f4b Author: Eric Anholt Date: Tue Aug 29 18:31:34 2006 -0700 Add support for register-indirect access in destination registers. This is untested. Also, a few bits for source operand register-indirect access sneak in with this commit. commit 2dac0a19a438d27b03e901cc70ef0a9a27039154 Author: Eric Anholt Date: Tue Aug 29 15:29:31 2006 -0700 Add support for destination writemasks. This involved changing dest operands to have their own structure like src operands, as the destination writemask (which is align16-only) shares space with register numbers in align1 mode. commit de1a889fe3554df47a6a751855ebae0cd1517e2f Author: Eric Anholt Date: Tue Aug 29 09:30:32 2006 -0700 Avoid shift/reduce conflict in predicate by making flagreg and subreg 1 token. Thanks to keithp for pointing out where the conflict was. commit 0ed5d93cc2f7aa74a10674c8ea0c9a0125a8521f Author: Eric Anholt Date: Mon Aug 28 23:05:51 2006 -0700 Add support for predicate control. This is untested on programs using predicate control, and also causes a shift/reduce conflict. commit 6a88ada7e8b1ea241c037137d7f88ab22a0e1812 Author: Eric Anholt Date: Mon Aug 28 22:11:18 2006 -0700 Add support for swizzle control on source operands. This required restructuring to store source operands in a new structure rather than being stored in instructions, as swizzle is align16-only and shares storage with other fields for align1 mode. These changes were not tested on real programs using swizzle. commit 2a0f135784ebdf24917da1a8fd1f4a1c08a358eb Author: Eric Anholt Date: Fri Aug 25 17:44:55 2006 -0700 Add acc[01] as src operands. commit edc82a045c536a4b62750cd2c2f25e4b881877d6 Author: Eric Anholt Date: Fri Aug 25 17:42:05 2006 -0700 Comment cleanup and add missing semicolons after rules. commit 908f37d92d3d847aaf46ce825ef7e6568445ad33 Author: Eric Anholt Date: Fri Aug 25 17:33:02 2006 -0700 Add support for more instruction options. commit 6db54d7465656dee9f6e929672b86521cfc9b3bb Author: Eric Anholt Date: Fri Aug 25 16:54:01 2006 -0700 Typo fix in comment. commit 1d7d04228e8263de5c42042f3ceaab7afacf9238 Author: Eric Anholt Date: Fri Aug 25 16:52:09 2006 -0700 Rename direct_gen_reg struct to direct_reg now that it fills more roles. commit 5297b2a7e89805e7e8d4f057578000ceda4139d0 Author: Eric Anholt Date: Fri Aug 25 16:50:17 2006 -0700 Support src ARF operands in another place, and spell it arch instead of acc. commit 2c7876583e723dc3ede8e1023b8215d98d99c608 Author: Eric Anholt Date: Fri Aug 25 13:53:48 2006 -0700 Add support for more registers as source operands. commit 883408eab8dc0d36d36acbccc4bb4cde432607ec Author: Eric Anholt Date: Fri Aug 25 13:38:03 2006 -0700 Add rules for more registers, and use some for destinations. commit 2cca382cd23c6d18d498f55692088ee1112deb8c Author: Eric Anholt Date: Fri Aug 25 11:10:00 2006 -0700 Rename the resulting binary to gen4asm instead of lextest. commit c81a6084de62479783443f57ce6c7431146d86f9 Author: Eric Anholt Date: Fri Aug 25 11:08:03 2006 -0700 Add a negation that the initial disasm missed. commit f914c6ace23dbfb0edc2988dddd655a61529771f Author: Eric Anholt Date: Fri Aug 25 11:05:10 2006 -0700 Add many more opcodes. commit 569990bf6b6f1d95ffa88981d0afe8b16626e4be Author: Eric Anholt Date: Fri Aug 25 09:46:18 2006 -0700 Lex the register number with the register name. This avoids the need for a start condition to prevent for example g1.8<0,1,0>UW being lexed as GENREG NUMBER LANGLE etc. rather than GENREG INTEGER DOT INTEGER LANGLE etc. commit 3d36079ae3f9cab993b7bbec68f6fa2fbfb60136 Author: Eric Anholt Date: Fri Aug 25 09:36:28 2006 -0700 Add syntax for extended math send functions, and adjust packed_yuv_sf for it. commit e865196a9d28d0097e76d606f727939c11bf6147 Author: Eric Anholt Date: Thu Aug 24 16:37:04 2006 -0700 Add a syntax for urb write messages. commit 5232981c8898489d5ce69be5a3fd6ffd32432ca8 Author: Eric Anholt Date: Thu Aug 24 15:43:50 2006 -0700 Add some more generated files to ignore. commit bf0b5ddbe780178fd6b31ac7fc38e61e8c8fa61d Author: Eric Anholt Date: Thu Aug 24 15:43:20 2006 -0700 Add packed yuv sf kernel from 2d driver. commit 43313946e773568b59830601daa826039fcfc908 Author: Eric Anholt Date: Thu Aug 24 15:26:10 2006 -0700 Add syntax for translating the DP write send message. commit 16324215b26170b5add01028d2bc924c79d6b393 Author: Eric Anholt Date: Thu Aug 24 14:47:21 2006 -0700 Fix respecting of instruction options (misunderstood default action behavior). commit 56c4ccfc193ad3b57a0d1731570a1fc81a664ce3 Author: Eric Anholt Date: Thu Aug 24 14:35:10 2006 -0700 Fix up sampler send message translation and give it a near-usable syntax. commit e609d6ba93bf71be3c7d6543a8a9c7af4747dedc Author: Eric Anholt Date: Thu Aug 24 12:36:56 2006 -0700 Zero out the initial header instoptions. commit 2093218bcdfc3ff687422335f1faec5ed5e47eee Author: Eric Anholt Date: Thu Aug 24 12:36:21 2006 -0700 There's no reason to provide typing or region on the null register. commit 56b50b68032d181ae9f2bc75e8c606d2238266e7 Author: Eric Anholt Date: Thu Aug 24 10:51:48 2006 -0700 bzero instructions before filling in the bits we care about. This avoids some set bits in padding fields. commit 7c330fbf3aeb6ea488da87c1a399bf20bce37c93 Author: Eric Anholt Date: Tue Aug 22 15:21:44 2006 -0700 Fill in type of null register to match Mesa. commit ac32bb09ebdfc7fd675aab30c7663edde7e37102 Author: Eric Anholt Date: Tue Aug 22 15:21:28 2006 -0700 This code was supposed to be null instead of acc0 (brw_disasm.c gave "a0"). commit a34d1e0d8ce889ea93833c5b02128e93f3c69290 Author: Eric Anholt Date: Tue Aug 22 14:52:14 2006 -0700 Fix translation of message registers. commit 90aea5198313fe5b548f31badc714a63aa0dffce Author: Eric Anholt Date: Tue Aug 22 14:46:39 2006 -0700 Fix translation of saturate value, and wire conditionalmod to 0 for now. commit b9e6224587f13846eab5ccf6db5054d129169529 Author: Eric Anholt Date: Tue Aug 22 14:43:03 2006 -0700 Remove generated source from repo. commit dc96c56d9e9da633795fe512067efcc444bcbe2d Author: Eric Anholt Date: Tue Aug 22 14:42:45 2006 -0700 Add support for negate and abs to source operands. commit 0d929b430b301859d775c05f4687db1665a1f6f9 Author: Eric Anholt Date: Tue Aug 22 13:33:41 2006 -0700 Fix imm32 translation. commit 0edcb2561d5ccde869b6f3b67479de37a62ceeb6 Author: Eric Anholt Date: Tue Aug 22 13:15:38 2006 -0700 Fix dest_horiz_stride translation, and destination type. commit b798c7c9daa298acc64cd8fd9ca53b8f3922561d Author: Eric Anholt Date: Tue Aug 22 13:15:00 2006 -0700 And add a comma. This was supposed to be a minor change. commit fc022c1bc23588515dbb91f21764cd34138bb79a Author: Eric Anholt Date: Tue Aug 22 13:14:09 2006 -0700 Remove generated file. commit d4c82e8278a901c9c329906f0e43512ac6669f5d Author: Eric Anholt Date: Tue Aug 22 13:08:26 2006 -0700 Fix horizontal stride translation. commit f2f18561e524a202163cf73a00b11f5a4647ce9d Author: Eric Anholt Date: Tue Aug 22 12:46:37 2006 -0700 C warnings cleanup. commit 1c62350848470e9cfe357bb59119742f50542be0 Author: Eric Anholt Date: Tue Aug 22 12:44:28 2006 -0700 Add Wall. commit a58d896dfea42bdd9e5da05a1263bcd2b4e55e6d Author: Eric Anholt Date: Tue Aug 22 12:42:25 2006 -0700 actually print out last uint32_t of instruction. commit 19f1c1cec4ad712c6e3e4a257d624dec2da4bb97 Author: Eric Anholt Date: Tue Aug 22 12:41:09 2006 -0700 Start correcting the translation. commit 6c98c8d578ab5feb65a9f6827a7e1bad11468575 Author: Eric Anholt Date: Tue Aug 22 11:54:19 2006 -0700 Get the wm program to parse. commit 22a1063cc014437bee07bdaff2c38c2e843d12d2 Author: Eric Anholt Date: Tue Aug 22 10:15:33 2006 -0700 Initial gen4asm code. commit 7ee278f17613d07ee18070f83aca9f050a526a72 Author: Damien Lespiau Date: Wed Feb 20 14:40:07 2013 +0000 build: Guard the inclusions of config.h with HAVE_CONFIG_H autoconf can be configured to not generate a config.h but to give the defines with command line arguments instead. In this case, there's no config.h to include. To work in both cases autoconf adds a HAVE_CONFIG_H define on the command line to signal there's a config.h to include. Signed-off-by: Damien Lespiau commit aa2bd8a6921b751d2f8a5caa0001e386f139fecc Author: Damien Lespiau Date: Tue Feb 19 00:39:04 2013 +0000 lib: Allow to override the device id at run time Using the same environment variable as libdrm so one doesn't have to remember two different things. This is helpful to run a test under a fake identity, to, say, dump an aub file. Signed-off-by: Damien Lespiau commit 75f52a6e3b334e817d5adb2e5fb0b00a4de36b8f Author: Damien Lespiau Date: Mon Feb 18 23:49:48 2013 +0000 lib: Factor out a function to check if an environment variable is set Signed-off-by: Damien Lespiau commit 6c04309579805e595749e7918c7901d63a36f581 Author: Kenneth Graunke Date: Fri Mar 1 15:36:20 2013 -0800 intel_chipset: Fix Haswell CRW PCI IDs. The second digit was off by one, which meant we accidentally treated GT(n) as GT(n-1). This also meant no support for GT1 at all. Signed-off-by: Kenneth Graunke Signed-off-by: Daniel Vetter commit 2155b16af2a382055b4059ce21786b77305d8910 Author: Ben Widawsky Date: Thu Feb 21 18:31:20 2013 -0800 quick_dump: prettier printing Signed-off-by: Ben Widawsky commit cf17d10828a42bacce9932d1d19f4d64d14a9479 Author: Ben Widawsky Date: Tue Feb 19 09:53:43 2013 -0800 fix arch build: update ax_python_devel.m4 I complained about the broken m4 script, and it got fixed. I love the internet. Signed-off-by: Ben Widawsky commit 84b525cf46c2d835f81f778a6e732cf69aa20bea Author: Ville Syrjälä Date: Mon Feb 18 21:41:10 2013 +0200 intel_chipset: Add multiple inclusion guards into intel_chipset.h Signed-off-by: Ville Syrjälä Signed-off-by: Daniel Vetter commit d7b06f50d2856c6d78b704e835b7af57a8d70060 Author: Ville Syrjälä Date: Mon Feb 18 21:41:09 2013 +0200 intel_chipset: Use parens around macro arguments Protect the macro argument evaluations with parens. This is already touching most lines, so while at it, fix up all white space to uniform style throughout the file. Signed-off-by: Ville Syrjälä Signed-off-by: Daniel Vetter commit 6526d8c6fcc10f1b100c570f1d924154cd43b2e9 Author: Damien Lespiau Date: Tue Feb 12 14:24:40 2013 +0000 tests: Forbid to run the blit tests with count of 1 Invoking say, sudo ./tests/gem_render_linear_blits 1 does not make a lot of sense as we're creating a single bo. The test does not yell at you and passes, even if the rendercopy function does not do anything. This makes it quite harmful when trying to debug rendercopy without realizing that count is the number of allocated bos and must be >= 2. Signed-off-by: Damien Lespiau Signed-off-by: Daniel Vetter commit 50c45f9586843bb3b83d9bed5d9738145ba05866 Author: Damien Lespiau Date: Wed Feb 13 16:29:02 2013 +0000 tests: Add a quick variant to the gem_storedw_* tests Signed-off-by: Damien Lespiau Signed-off-by: Daniel Vetter commit bb33d08845db2cf368240e737090ca3938b5ba64 Author: Damien Lespiau Date: Wed Feb 13 16:29:01 2013 +0000 lib: Add a way to specify values for "quick" runs In some environments, we don't really want to loop 100000 times or allocate 152352621 buffers because it makes the tests too long to run. This adds a way to specify "quick" values to reduce the time taken by certain tests. Signed-off-by: Damien Lespiau Signed-off-by: Daniel Vetter commit 6157d242a572c21970e98d36e0837d106f6b2d0e Author: Yi Sun Date: Tue Feb 12 23:11:35 2013 +0800 tests/testdisplay.c: Remove the variable only_one_mode. That variable is useless, instead the variables specified_mode_num and specified_disp_id can cover all the situation. For parameter -o, all three instances should work: ./testdisplay -o 21,4 only test the 4th mode on the connector with id 21. ./testdisplay -o 21 test all the mode lines on the connector wiht id 21. ./testdisplay -o ,4 the -o is ignored, just like -a. Signed-off-by: Yi Sun commit 05795daebf3b4d37b89422a2fca0236ee6a26b73 Author: Matt Turner Date: Fri Feb 8 19:36:54 2013 +0000 quick_dump: Makefile.am best practices and fix distcheck A few changes - Put CPPFLAGS in AM_CPPFLAGS instead of a per-target CFLAGS var; - Use _LIBS/_CFLAGS from pkg-config instead of hard-coded values; - List non-generated scripts in dist_bin_SCRIPTS; - Add chipset.py to the run that implicitly generates it, which fixes distcheck. Signed-off-by: Ben Widawsky commit c73eab9f4043ee2c9be00250190a2833bf307aee Author: Matt Turner Date: Fri Feb 8 19:36:53 2013 +0000 configure.ac: fix autogen.sh Put -I m4 in ACLOCAL_AMFLAGS so ./autogen.sh just works [ben: commit message modified by] Signed-off-by: Ben Widawsky commit 6b77e04560060c24b45a17059e135cd185871381 Author: Ben Widawsky Date: Thu Feb 7 18:58:17 2013 -0800 quick_dump: chdir us to where the text files are This is useful if you run out of the quick_dump directory. Signed-off-by: Ben Widawsky commit d8d114bca34239d046fb7ccb16b2efefff5fa41b Author: Ben Widawsky Date: Thu Feb 7 08:35:57 2013 -0800 README: Add quick_dump info Reviewed-by: Paul Menzel Signed-off-by: Ben Widawsky commit 1cce7eb21b0d78bf8a8848ad1698309f683b9d9d Author: Ben Widawsky Date: Thu Feb 7 08:28:14 2013 -0800 quick_dump: Give dumper an AM_CONDITIONAL It may sometimes be undesirable to build or install the quick dumper. This was requested by Damien. Signed-off-by: Damien Lespiau Signed-off-by: Ben Widawsky commit 1f2e037e8fabaa30264c1ad8c3dc0e4fc5e13769 Author: Ben Widawsky Date: Sat Feb 2 11:31:46 2013 -0800 quick_dump: Use the register access library Signed-off-by: Ben Widawsky commit beb5de858d38ec3c4d27da749fcecf460e6bd59d Author: Ben Widawsky Date: Fri Feb 1 20:13:25 2013 -0800 quick_dump: Connect libpciaccess and other utils Make a register access library with sample to do register reads Signed-off-by: Ben Widawsky commit 6437eed930c089a5b8b860daac03cfe537b285a9 Author: Ben Widawsky Date: Fri Feb 1 14:54:31 2013 -0800 quick_dump: SWIG chipset interface This isn't strictly necessary it would have been easy enough to simply convert intel_chipset.h but this should be nice prep work for directly doing MMIO. It also serves as a nice review point. It's demonstrated with an autodetect function in the script. That autodetect has a hardcoded path that shouldn't be there, but it will go away in the next patch when we can properly link in libpciaccess. Thanks to Matt for helping whip the automake stuff into shape. v2: Switch to $(top_srcdir) Reviewed-by: Matt Turner Signed-off-by: Ben Widawsky commit 508b5ce9a5e39a0fa78b2cf0e3706a53cb066bc6 Author: Ben Widawsky Date: Fri Feb 1 14:53:19 2013 -0800 configure.ac: Add swig dependency As far as I can tell (and recommended to me by Matt) taking these m4 extension macros from http://www.gnu.org/software/autoconf-archive/ doesn't require the project distribute GPL. I am a bit confused from reading the license. I'd really hope someone can comment. The only other solution would be to roll my on m4 macros, or figure out a way to check that this autoconf-archive package is included from the configure.ac. Reviewed-by: Matt Turner Signed-off-by: Ben Widawsky commit ebc918601ed3239f61d7d5c4d28e8c768422652a Author: Ben Widawsky Date: Thu Jan 31 11:09:15 2013 -0800 quick_dump: vlv support This patch includes a patch from Jesse which removed a bunch of VLV registers which were useless in my original RFC. Cc: Jesse Barnes Signed-off-by: Ben Widawsky commit b96821cb392639319a69dde8008f94b014ad7d3e Author: Ben Widawsky Date: Thu Jan 31 11:08:36 2013 -0800 quick_dump: gen7 support Signed-off-by: Ben Widawsky commit 45cc039e315ca0eb4e673c480dcad371096b58ea Author: Ben Widawsky Date: Thu Jan 31 11:08:06 2013 -0800 quick_dump: gen6 support Signed-off-by: Ben Widawsky commit ac1634e23cdedf0e9467e607220437c96f010a0a Author: Ben Widawsky Date: Wed Sep 19 22:08:46 2012 -0700 quick_dump: A dump utility different than reg_dumper This is the base tool for quick dump. At it's heart, quick dump is simply a basic text parsing thingie which plugs into intel-gpu-tools to do something similar to intel_reg_dumper. The format for the register definition files is very open, so it's just something simple for now. Signed-off-by: Ben Widawsky commit 66ec9bd4e7abc7e65edf6518b034ec55b3b7d682 Author: Ben Widawsky Date: Thu Feb 7 08:29:24 2013 -0800 configure.ac: Move prime stuff to where it belongs Signed-off-by: Ben Widawsky commit 3a752a3d9a7aa2c9d8c710c7c889e9cd09384aed Author: Ben Widawsky Date: Thu Feb 7 10:30:03 2013 -0800 configure: slightly more standard --disable-tests Cc: Julien Cristau Signed-off-by: Ben Widawsky commit 7c170724003f42cd4ceea9f6c805292bbe2e81b2 Author: Rodrigo Vivi Date: Tue Feb 5 16:17:54 2013 -0200 Build: Add --disable-tests configure flag to avoid tests build Tests are still being built by default. However this request came from OSVs in order to allow them to include i-g-t in their distributions by default avoiding adding more and more dependencies since we are improving and adding more and more tests. v2: wait for Ben's spacing fixes and adjusted for new space rules. Signed-off-by: Rodrigo Vivi Acked-by: Paul Menzel Reviewed-by: Takashi Iwai Signed-off-by: Daniel Vetter commit c75b8c60b52cd75f756e59fcfd4ce971e9189509 Author: Ben Widawsky Date: Thu Jan 31 13:06:17 2013 -0800 configure.ac: Add vim magic modeline Signed-off-by: Ben Widawsky commit 90f0b3dcf361cfed86f3222028f7a8d525159e66 Author: Ben Widawsky Date: Thu Jan 31 13:04:18 2013 -0800 configure.ac: Fix spacing Almost all based on vim's config file type. It got it wrong in a few places which were fixed by hand. Signed-off-by: Ben Widawsky commit b8e5965e8fb1820f5709a4762e04af5b183b0a2c Author: Mika Kuoppala Date: Tue Feb 5 12:26:49 2013 +0200 tests/gem_ctx_exec: properly test destroy_ctx ioctl Call context destroy with proper ioctl number and add test to verify that we can't post batchbuffers with destroyed context. Signed-off-by: Mika Kuoppala Signed-off-by: Daniel Vetter commit f5c3e5811e2d29ee0c00dc4fc49ab776f247203f Author: Ben Widawsky Date: Mon Feb 4 17:47:53 2013 -0800 intel_gtt: Fix PTE offsets Vincent sent me a patch which I think didn't go far enough. Honestly, I don't even know what this tool does. Reported-by: Cheah, Vincent Beng Keat Signed-off-by: Ben Widawsky commit f9c8e365e972bf7ec6dd690096acaa21372e9826 Author: Chris Wilson Date: Mon Feb 4 21:41:13 2013 +0000 intel_error_decode: Don't barf on a malformed PCI ID line Whoops, someone added UTS_RELEASE with no newline before PCI ID which upsets our naive parser. commit 34c66d073919424438356befbee7bc45609fb340 Author: Jesse Barnes Date: Sat Feb 2 11:24:39 2013 +0100 add more VLV PCI IDs Signed-off-by: Jesse Barnes commit 8c4bb7022b0b8327c3b41eeb34a14c415cca0d80 Author: Ville Syrjälä Date: Wed Jan 30 14:52:24 2013 +0200 kms_flip: Add flip-vs-modeset-vs-hang test The flip-vs-modeset-vs-hang test will: 1. simulate a GPU hang 2. exec a nop batch 3. schedule a page flip 4. perform a modeset operation With the current buggy kernel driver, the modeset operation will hang indefinitely waiting for the flip to complete. Since the rings are stopped, that will never happen. The current GPU reset code doesn't play well with page flips either, so a GPU reset won't fix things. Once the kernel driver is fixed, the eventual GPU reset will save the day. The nop batch buffer is required only because the kernel can't currently detect GPU hangs, unless there is at least one user submitted request pending. Signed-off-by: Ville Syrjälä Signed-off-by: Daniel Vetter commit e1d1beb47849875b65b4f970251e58d5918d6187 Author: Ville Syrjälä Date: Wed Jan 30 14:52:23 2013 +0200 kms_flip: Make flip events optional Pass an argument to do_page_flip() telling it whether to request flip events. Signed-off-by: Ville Syrjälä Signed-off-by: Daniel Vetter commit fb7bc2e8d1dcc626778f4e8f3346a2ecbdfe4b04 Author: Chris Wilson Date: Thu Jan 17 15:07:50 2013 +0000 tests/gem_lut_handle: Limit testing LUT interface to recent kernels Signed-off-by: Chris Wilson commit d5517a1301f066465c3b2941542fb8aec66aa5e3 Author: Chris Wilson Date: Thu Jan 17 15:05:20 2013 +0000 tests/gem_lut_handle: Expand negative testing Pass in lots of execs and relocs trying to trick the kernel into making a mistake. Signed-off-by: Chris Wilson commit 230d77f1d0069a48d83b9829573712935d49fbd5 Author: Chris Wilson Date: Wed Nov 14 12:15:01 2012 +0000 tests: Benchmark new API for using a LUT with the execbuffer Signed-off-by: Chris Wilson commit ec2eac6d7b3e11a37e8ba96bc0453ca1d91ba715 Author: Chris Wilson Date: Wed Nov 14 12:15:01 2012 +0000 tests: Exercise new API for using a LUT with the execbuffer Signed-off-by: Chris Wilson commit cdd352df95b8dfd6a6bab7014be2a15526643721 Author: Yi Sun Date: Sun Jan 13 10:10:24 2013 +0800 tests/testdisplay.c: Fix the issue which don't display anything until '-o' given. Signed-off-by: Yi Sun Signed-off-by: Daniel Vetter commit c612481a196f642ae6a3a67631d7a312e506e1b4 Author: Mika Kuoppala Date: Tue Jan 8 13:16:06 2013 +0200 tests/gem_seqno_wrap: skip if debugfs entry is not there Return error code 77 to skip test if debugfs entry is not available. Signed-off-by: Mika Kuoppala Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=59116 Signed-off-by: Daniel Vetter commit 2d0a8e8545351e70112a6df2ce86932a5a2046d0 Author: Chris Wilson Date: Mon Jan 7 11:43:38 2013 +0000 tests: Add basic testing of gem_pin Including exercising races versus interrupts. Signed-off-by: Chris Wilson commit cda8bee056c71acd01b2a70258f99d43ba826198 Author: Thomas Jarosch Date: Tue Dec 25 18:06:57 2012 +0100 Fix out of bounds memory access cppcheck reported: [tools/intel_infoframes.c:836]: (error) Width 31 given in format string (no. 1) is larger than destination buffer 'option[16]', use %15s to prevent overflowing it. Signed-off-by: Thomas Jarosch Signed-off-by: Daniel Vetter commit 05bfbf422723fbb6c6e085e9b7f1bdb41afab7c8 Author: Yi Sun Date: Wed Dec 26 17:12:39 2012 +0800 tests/testdisplay: Specify the display. It can specify the display by the connector id which list as the first column of ./testdisplay -i. E.g. command "./testdiplay -o 1,4" means setting number 4 mode line on the display with connector id 1. v2. Specify the display by id which can be got from option '-i' Signed-off-by: Yi Sun Signed-off-by: Ben Widawsky commit 33f09f6954d0b5213f26f987c39ab63182d55369 Author: Mika Kuoppala Date: Fri Dec 21 14:06:02 2012 +0200 tests/gem_seqno_wrap: adapt to new next_seqno debugfs interface - adapt to use debugfs interface that can set seqno to arbitrary value - fix dynamic buffer allocation Signed-off-by: Daniel Vetter commit 5825cf807ea29772d2dff6135be9c15c61d04155 Author: Daniel Vetter Date: Thu Dec 20 23:30:10 2012 +0100 tests/prime_nv_pcopy: guard output for subtest listing commit 71ba0038dbd8574a959f0e742e7dcac843426805 Author: Dave Airlie Date: Tue Aug 14 14:16:04 2012 +1000 intel/udl tests; basic test to share a BO, add as a udl framebuffer, and call the dirty ioctl on it so we cause the vmapping to happen [danvet: Snatched up from Dave's prime branch, ocd name and bikeshed whitespace a bit.] commit d798ab9c2a092a08e14c6f2dfb1777376ba407a8 Author: Daniel Vetter Date: Tue Dec 18 22:55:58 2012 +0100 tests: add testcase to check igt runtime enviroment Now that we've abandonded the autohell testrunner, need to port this over. Easiest is to just add another testcase ... Signed-off-by: Daniel Vetter commit f0546374a001bbf8a4e05548a5320d05f3cc2d02 Author: Ville Syrjälä Date: Tue Dec 18 16:51:27 2012 +0200 kms_flip: Add -lrt back kms_flip doesn't build due to missing -lrt. The build was broken due to a typo in this commit: commit acdf7171264a5139caabb78127c9eef5080c0682 Author: Daniel Vetter Date: Sat Dec 15 00:48:47 2012 +0100 tests: s/flip_test/kms_flip OCD wins! Signed-off-by: Daniel Vetter For some reason libudev.pc brings in -lrt as well, which probably caused the typo to go unnoticed. Signed-off-by: Ville Syrjälä Signed-off-by: Daniel Vetter commit cef68158dd39fa36f7273a603e2a571b98527d67 Author: Daniel Vetter Date: Tue Dec 18 10:25:15 2012 +0100 tests/kms_flip: don't die on stdin input Seems to be a leftover from fliptest ... Signed-off-by: Daniel Vetter commit 0af2b184ad0d876936091e58028cca56de30b850 Author: Daniel Vetter Date: Sat Dec 15 01:06:11 2012 +0100 lib: extract kmstest_get_pipe_from_crtc_id commit 573d59dd148d9fedceb8aaeeb88b76cfc5564c40 Author: Daniel Vetter Date: Sat Dec 15 01:05:33 2012 +0100 tests/gem_flink: enable flink lifetime subtest Somehow fumbled this. Signed-off-by: Daniel Vetter commit acdf7171264a5139caabb78127c9eef5080c0682 Author: Daniel Vetter Date: Sat Dec 15 00:48:47 2012 +0100 tests: s/flip_test/kms_flip OCD wins! Signed-off-by: Daniel Vetter commit f56384c2c0264989acae7b8c7efb5030a6c94caf Author: Daniel Vetter Date: Sat Dec 15 00:41:01 2012 +0100 tests/flip_test: add flip vs. rmfb testcase To check that the kernel doesn't fall over when tearing down a life fb. Confirmed that it exercises the right codepath with printk. Also fix an issue Imre introduced in commit fe7fea0be3b5f418b76dc7834e73b31827484429 Author: Imre Deak Date: Tue Oct 16 04:09:43 2012 +0300 flip_test: add event sequence number tracking Signed-off-by: Daniel Vetter commit df41e1a6bbe75f047e83bb543e0b0564ed10862b Author: Daniel Vetter Date: Thu Dec 13 21:30:43 2012 +0100 flip_test: recreate fb ... to test the latency of rmfb, getfb and addfb. Since if those still can cause spikes, we have a problem. Signed-off-by: Daniel Vetter commit 8ed0112f88a8738d3e813428e5045333a6e07fbf Author: Daniel Vetter Date: Thu Dec 13 21:10:58 2012 +0100 tests/flip_test: split out timestamp checks into subtest This way we can still test basic pageflips on kernels with broken locking while still failing when the timestamps/framecounts are wrong. Also disable the delay check on analog tv, timings on those ports are truely screwed-up Signed-off-by: Daniel Vetter commit f185699a4ba904569db286cdb3386512a2540af2 Author: Alan Coopersmith Date: Sun Dec 16 10:38:54 2012 -0800 tests/gem_seqno_wrap.c: include for definition of kill() Fixes build failure on Solaris: gem_seqno_wrap.c: In function ‘run_cmd’: gem_seqno_wrap.c:328:3: error: implicit declaration of function ‘kill’ [-Werror=implicit-function-declaration] Signed-off-by: Alan Coopersmith Signed-off-by: Daniel Vetter commit c2e05af3538830f0fd1f0e750a99b2e10b84e991 Author: Daniel Vetter Date: Sat Dec 15 15:38:31 2012 +0100 tests/prime_nv_pcopy: convert to subtests Signed-off-by: Daniel Vetter commit cc4eeb990f0378f2e3166c4d03699d4873747c38 Author: Daniel Vetter Date: Sat Dec 15 15:30:19 2012 +0100 tests/prime_nv_tests: convert to subtests And properly fail the failing ones - bloody hate it when the tests lie to me ... commit c0a74d8d505b00ff823ce2ad47b0fc2f7d0cebb7 Author: Rodrigo Vivi Date: Thu Dec 13 14:11:24 2012 -0200 tools: intel_gpu_abrt bug report template. checking if file has been generated and output a template for a good bug report commit 3ab148331a37ace6eb73d17bd3803602eabd7c17 Author: Rodrigo Vivi Date: Thu Dec 13 14:11:23 2012 -0200 tools: intel_gpu_abrt checking for root access needed by other igt tools that are collecting more usefull information. commit 616a4de567f574e42233b10d3546a3e1b5394e66 Author: Rodrigo Vivi Date: Thu Dec 13 14:11:22 2012 -0200 tools: intel_gpu_abrt collecting more useful info commit 7150a04124ae151c3e917bbad03442cebaeaecd6 Author: Rodrigo Vivi Date: Thu Dec 13 14:11:21 2012 -0200 tools: intel_gpu_abrt "get" function A function to make it easy to collect any file or directory needed later. commit a2452d68a062e3fda2ac1c3bc92b8fd083a0cf68 Author: Mika Kuoppala Date: Thu Dec 13 12:43:35 2012 +0200 tests/gem_seqno_wrap: dont sync when crossing half of seqno space For seqno comparison to work they have to be less than UINT32_MAX/2 apart. So when crossing the half way of seqno space, be careful not to sync anything as this causes gpu hangs. Do real test with syncing only when we are about to wrap. v2: Don't spam if no rendercopy was found, only warn once commit 7ab837b21473a9e7bf5565a8fa862349d37bc597 Author: Imre Deak Date: Fri Dec 7 20:30:28 2012 +0200 flip_test: fix link error due to missing -lrt Needed by clock_gettime(). This isn't a problem if libudev is used, as that pulles librt with it. Signed-off-by: Imre Deak Signed-off-by: Daniel Vetter commit e0ce231bf3d0ca14a2c10423f0d0affca999b447 Author: Chris Wilson Date: Wed Dec 12 14:33:17 2012 +0000 tests/gem_*_tiled_blits: Use the vma limiter to present address space exhaustion References: https://bugs.freedesktop.org/show_bug.cgi?id=58113 Signed-off-by: Chris Wilson commit de9621b4f5972fc6f137b241a1b904d7cac9742b Author: Chris Wilson Date: Wed Dec 12 13:58:04 2012 +0000 tests/gem_tiled_pread_pwrite: Allow the kernel to reap the GTT address space Otherwise we can not run this test on 32-bit systems. Signed-off-by: Chris Wilson commit b1ee03c540af86708a8dd1674032712cba7aa1f1 Author: Chris Wilson Date: Wed Dec 12 13:56:09 2012 +0000 tests/gem_tiled_swapping: Don't needless crash on 32-bit systems Only 32-bit of mmap address space, but with PAE we may be trying to allocate more than 4 GiB of memory. Signed-off-by: Chris Wilson commit 4cd21795d2ba882a4197769e516b021a5a4c806d Author: Maarten Lankhorst Date: Tue Sep 11 19:01:46 2012 +0200 tests/prime_nv_pcopy.c: fail if nouveau_pushbuf_kick fails rather than spinning commit 30842637820b15916198cca45065826115864473 Author: Daniel Vetter Date: Fri Dec 7 23:34:23 2012 +0100 tests: disable gem_exec_bad_domains/conflicting-write-domain Kernel checks have been eased in commit c1f093e09c4ceb583b04d11e767bb3201812e4d2 Author: Chris Wilson Date: Mon Dec 3 11:49:07 2012 +0000 drm/i915: Remove check for conflicting relocation write-domains commit c0dbf04b0536aeff95dd56aa7847b3483d95e61f Author: Chris Wilson Date: Thu Dec 6 20:36:24 2012 +0000 tests: Add a basic test for tiled render copies Signed-off-by: Chris Wilson commit 1945e2a7f18dc2e4c46010ab8b7774679fc217d3 Author: Chris Wilson Date: Thu Dec 6 17:18:52 2012 +0000 Implement a working gen7 rendercopy Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=57825 Signed-off-by: Chris Wilson commit 3ad92902e1ed51894ddece2ae2a698ff55ac8adf Author: Chris Wilson Date: Thu Dec 6 19:32:14 2012 +0000 tests: Add basic test for render blits Signed-off-by: Chris Wilson commit 50fdf32e46bcfd01e83b813d6a1fd0dc5b686692 Author: Chris Wilson Date: Thu Dec 6 12:16:12 2012 +0000 pci: Search for the first Intel GPU, rather than assume a fixed slot Everywhere else we search for a match based on an Intel display device, so if the quick check of the fixed slot fails, fallback to walking the PCI bus looking for a match. Signed-off-by: Chris Wilson commit 51f08301ab5702db673fd4c2543ead7251641939 Author: Daniel Vetter Date: Wed Dec 5 19:29:11 2012 +0100 tests/gem_exec_nop: implemented correct SKIP reporting I think I need a testsuite for test writing. commit 53e184b228b9bda43df75aa4ff919bc23f5caa09 Author: Daniel Vetter Date: Wed Dec 5 10:09:08 2012 +0100 tests/gem_dummy_reloc_loop: some updates - convert to subtests - shut up stderr output for successful runs Signed-off-by: Daniel Vetter commit ad5919617cbccd2f7a2c8311c8ebe83e6d0acd52 Author: Daniel Vetter Date: Wed Dec 5 04:16:38 2012 +0100 tests: fixup gem_exec_nop subtests Note to self: No more pushing after 12 o'clock midnight. Not a good idea, too embarassing. commit d9d9578f3bd25734e8dc85b620c9c9073161d7fb Author: Daniel Vetter Date: Tue Dec 4 17:13:05 2012 +0100 tests: run no-op batches on all rings For Ben ... commit 796fd58a17aa93e3e1a62549afde5984a10ebdee Author: Mika Kuoppala Date: Tue Dec 4 19:43:13 2012 +0200 tests: add gem_seqno_wrap This test uses debugfs entry to set next_seqno close to a wrapping point and then creates a load with dependant buffer objects or with specified command to induce the wrap. v2: Use new get_rendercpy_func as suggested by Daniel Vetter. Signed-off-by: Mika Kuoppala Signed-off-by: Daniel Vetter commit d0f3a0d77a7792a38d7571b011bb6cf5ad604b4a Author: Daniel Vetter Date: Tue Dec 4 10:42:15 2012 +0100 README: piglit requires results-file for testruns Noticed by Mika. commit 175fc656ebc17e5cb01d87215268af7628d700ae Author: Daniel Vetter Date: Tue Dec 4 10:37:55 2012 +0100 tests/Makefile.am: Add a comment about the subtest infrastructure commit df545c19689463a0f6f70fa4cc3f3dd3a1eabcdb Author: Daniel Vetter Date: Tue Dec 4 10:34:46 2012 +0100 README: add quick howto for using piglit as testrunner commit 6daae8bcb6b4a930c9677f87fa24675581b69072 Author: Daniel Vetter Date: Sat Dec 1 13:07:45 2012 +0100 tests/gem_flink: check flink lifetime rules flink names may not be destroyed while there's still a userspace handle around. Test this by - exporting an flink name from fd2 - open a gem bo from that name in fd - close fd2, then open a new drm file (so that the original handle disappears) - check whether the same flink name still works commit d8df90dc6bce77842c781aa0907147cecce4b5f6 Author: Daniel Vetter Date: Sat Dec 1 00:51:53 2012 +0100 tests/gem_exec_bad_domains: add more bad domains - mulitple write domains - conflicting write domains - not-yet-defined gpu domains Also convert to subtests while at it. Signed-off-by: Daniel Vetter commit da6473184ccd35d203a1de435b7b500f5c222662 Author: Daniel Vetter Date: Sat Dec 1 00:52:24 2012 +0100 tools/intel_reg_dumper: add some cpt/ppt debug regs Signed-off-by: Daniel Vetter commit 0d7139af5813f227f120bf13152c35dd08774e6b Author: Daniel Vetter Date: Thu Nov 29 15:01:09 2012 +0100 tests/gem_stress: prevent segfault in getopt parsing Needs a terminal element in the long option array. commit 64f669f7a94d459437a4dd47142ef2bb9870c5e6 Author: Daniel Vetter Date: Thu Nov 29 14:59:57 2012 +0100 lib: extract get_render_copyfunc Otherwise we won't update all the tests if we add new render copyfuncs. Signed-off-by: Daniel Vetter commit d79414f64a599e5ec35f5e865a5e24858602d186 Author: Daniel Vetter Date: Thu Nov 29 11:27:32 2012 +0100 tests: disable gem_non_secure_batch Seems to cause hangs on some of my old gen2/3 machines, but not all of them. commit df11a6f31d98eb56568a3fc234e6e6294c72e4ab Author: Daniel Vetter Date: Wed Nov 28 13:25:12 2012 +0100 tests/gem_tiled_partial_pwrite_pread: convert to subtest infrastructure commit b0066d3659ce0814fba396626436e6bc7b369580 Author: Daniel Vetter Date: Wed Nov 28 13:22:39 2012 +0100 tests/gem_tiled_partial_pwrite_pread: refactor subtests into functions commit 129d2013377f93da78e24c6616b61acac235dc0a Author: Daniel Vetter Date: Wed Nov 28 13:10:26 2012 +0100 tests/gem_set_tiling_vs_blt: convert to subtest infrastructure commit ca2851f827d5f60283dc8c202006a2f5095c738b Author: Daniel Vetter Date: Wed Nov 28 13:08:20 2012 +0100 tests/gem_ringfill: convert to subtest infrastructure commit 046b149b18d485ee0dbe3419944f5b9db47389fb Author: Daniel Vetter Date: Wed Nov 28 13:08:07 2012 +0100 tests/gem_partial_pwrite_pread: convert to subtest infrastructure commit 1a55ca753e3250baec32aa87cdea18b746141325 Author: Daniel Vetter Date: Wed Nov 28 12:47:26 2012 +0100 tests/gem_partial_pwrite_pread: refactor subtests into functions This was a too big mess. Signed-off-by: Daniel Vetter commit af228d4edc44fc539e6a28ac68ce7a880d036f99 Author: Daniel Vetter Date: Wed Nov 28 12:40:23 2012 +0100 tests/gem_mmap_gtt: convert to subtest infrastructure commit 7160c534f8283eb6fa1796406fcec70132b6b82a Author: Daniel Vetter Date: Wed Nov 28 12:38:00 2012 +0100 tests: re-enable gem_hangcheck_forcewak Was accidentally disable in ab3f4bdafe60dede32a48674ef9920df090bf3a7 Signed-off-by: Daniel Vetter commit a2778575d5f469e67a3d2dbd5293cfe79cbe8b6e Author: Daniel Vetter Date: Wed Nov 28 12:35:03 2012 +0100 tests/gem_gtt_concurrent_blit: convert to subtest infrastructure Same treatment as for gem_cpu_concurrent_blit. Signed-off-by: Daniel Vetter commit 2a9e128b18df8e3683b165378d884ce24147f04d Author: Daniel Vetter Date: Wed Nov 28 12:17:40 2012 +0100 tests/gem_flink: convert to subtest infrastructure commit 9d65d484f65c841c878fa946e905f9297df62dac Author: Daniel Vetter Date: Wed Nov 28 12:09:58 2012 +0100 tests/gem_cs_tlb: convert to subtests Again required a bit of shuffling to avoid expensive setup and some logic to properly handling 'skip' when only running a subtest. Signed-off-by: Daniel Vetter commit 4f6ab180a11128627385db722d06db60fa6023ff Author: Daniel Vetter Date: Wed Nov 28 12:00:33 2012 +0100 tests/gem_cpu_concurrent_blt: convert to subtest infrastructure Small changes to avoid expensive setup just to print out the subtest list, and setting up the source buffers such that "early-read" works without having run "overwrite-soure" right beforehand. Signed-off-by: Daniel Vetter commit 792a05a0a1c7b901093c3542ec96b5d7a9a9f253 Author: Daniel Vetter Date: Wed Nov 28 11:41:33 2012 +0100 tests/gem_cacheing: convert to subtest infrastructure commit 3cca0d8c6d33837e1e5a3f1bd1210cb37bb94a18 Author: Daniel Vetter Date: Wed Nov 28 11:16:44 2012 +0100 tests/gem_basic: convert to subtest infrastructure commit c3d5c1292bac53ac14d8661d8ac76c5a79752016 Author: Daniel Vetter Date: Tue Nov 27 20:33:15 2012 +0100 tests/flip_test: use subtest infrastructure To make the testnames easier to handle in scripts, replace all spaces with dashes. The important part is to not print anything to stdout when enumerating subtests, so protect the timestamp test with the right check. Signed-off-by: Daniel Vetter commit 9fc7e1386aade4cf0cd0e27354f47cde48253fb6 Author: Daniel Vetter Date: Tue Nov 27 20:03:25 2012 +0100 lib/drmtest: subtest infrastructure To make these helpers as least invasive as possible simply initialize the options with a getopt parser and let the control flow be steered with a simple helper which gets the subtest name as an argument. The only tricky part for using it is that the subtest check helper doubles up as the conduit to enumerate tests (and in that mode prevents any test from being run). It is therefore important that nothing gets printed to stdout outside of these checks. Signed-off-by: Daniel Vetter commit 021909e10d1bf9192c6245802b0df4866681b3f0 Author: Daniel Vetter Date: Tue Nov 27 20:04:15 2012 +0100 tests: dont polute stderr if the test succeeds/skips Results in spurious 'warn' results in piglit. Also don't print progress indicators when not outputting to a terminal. Signed-off-by: Daniel Vetter commit 4fae0c65c5c1fdf5403a31104890a279fd7b544f Author: Daniel Vetter Date: Tue Nov 27 16:38:43 2012 +0100 tests: remove ZZ_check_dmesg from runner This is getting in the way of piglit integration. If we want this functionality again, we should integrate it into the IGT piglit runner as an option. Signed-off-by: Daniel Vetter commit c79c56cf8c994e5a2e679008576b1d1329f4e687 Author: Daniel Vetter Date: Wed Nov 28 11:08:31 2012 +0100 tests: infrastructure for piglit runner Piglit needs a way to grab the latest list of tests to run, so add new make targets to dump those. Note that for future extendability we'll dump 2 different lists, one for single-testcase tests and one for testcases with enumerable subcases. Some support code for the later will follow in subsequent patches. Signed-off-by: Daniel Vetter commit b11887741cdcf28d962aa7957b2f8fd30b081e6b Author: Damien Lespiau Date: Tue Nov 27 19:14:05 2012 +0000 testdisplay: Use the fb stride when painting the color key Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55901 Signed-off-by: Damien Lespiau Signed-off-by: Daniel Vetter commit e5315f9dad8eb1f24ce23d2a0b636a5ee3f4900a Author: Daniel Vetter Date: Sun Nov 25 13:55:55 2012 +0100 tests: add gem_non_secure_batch commit 314953117fde1b96aa9c310bd5ad1d53842fddd2 Author: Imre Deak Date: Thu Nov 22 16:46:36 2012 +0200 flip_test: switch to using monotonic timestamps (v2) Since monotonic timestamps are now the preferred time format, change timestamps checks to compare against monotonic instead of real time. Also add two tests for DRM's compatibility mode where it returns real timestamps. v2: drop the tests for the compatibilty mode (Daniel) Signed-off-by: Imre Deak Signed-off-by: Daniel Vetter commit b7067d6c10d44c73d35828c6a39056ed7862fb40 Author: Imre Deak Date: Thu Nov 22 15:25:05 2012 +0200 flip_test: use monotonic time to measure the test duration Signed-off-by: Imre Deak Signed-off-by: Daniel Vetter commit 8a2593bd3c1f56f03a925d86c3865479505ddb66 Author: Imre Deak Date: Thu Nov 22 15:25:04 2012 +0200 flip_test: skip check for last_received_ts for the first event The old way worked too, but just skipping the test for the first event is more logical/simpler thing to do. Signed-off-by: Imre Deak Signed-off-by: Daniel Vetter commit b28caa0ac0fc7ae187100d0a79173ab11bb52128 Author: Imre Deak Date: Tue Oct 23 12:07:52 2012 +0300 flip_test: add wf-vblank test for expired sequence In v2: - Wait for the seq that just completed (current_seq) not last_seq - 1. - Do an equality check for ts and seq instead of >=. The previous issue didn't let us do this before. - Simplify the condition when we do an "expired sequence" check by only using the last flip event as a reference. Signed-off-by: Imre Deak Signed-off-by: Daniel Vetter commit c7dd1dcdd9b04cf8aae12c59091497d71fe54a15 Author: Imre Deak Date: Mon Oct 22 20:40:07 2012 +0300 flip_test: add comment about the race between flip vs. vblank events Signed-off-by: Imre Deak Signed-off-by: Daniel Vetter commit 7f32adc6c5364308f402f981ebde7f3689849471 Author: Imre Deak Date: Mon Oct 22 20:40:06 2012 +0300 flip_test: check if the vblank and flip states correlate Signed-off-by: Imre Deak Signed-off-by: Daniel Vetter commit 429dc016360946c4b126bf453187a2cb5d7dd003 Author: Imre Deak Date: Mon Oct 22 20:40:05 2012 +0300 flip_test: fixup zero timestamp for premature vblanks Signed-off-by: Imre Deak Signed-off-by: Daniel Vetter commit 5fc312e9f1e19dfdbb1427d344489aa09002dcdd Author: Imre Deak Date: Mon Oct 22 20:40:04 2012 +0300 flip_test: increase duration for vbl+flip tests with ts check We need a big enough duration, so the hotplug event's affect doesn't distort our final frame count too much. Without this these tests will exit with a "dropped frames" error. Signed-off-by: Imre Deak Signed-off-by: Daniel Vetter commit 554237f35109b64d1ecd5a309190c4f654f49dab Author: Daniel Vetter Date: Thu Oct 18 22:37:20 2012 +0200 tests/gem_cs_tlb: make it more robust ... using a fine roll of duct-tape. Dunno what exactly leaks out from the previous testcase, but the bo gets moved about a bit and makes the self-check of the test fail. commit ea50871f15d02b2f0f57d9c430dc2c34398f2655 Author: Daniel Vetter Date: Wed Oct 17 11:09:13 2012 +0200 flip_test: check whether wait_vblank fails when it should commit 3b1fbbf41208a7af3d8332179c66d1e90af1ed60 Author: Daniel Vetter Date: Wed Oct 17 00:35:43 2012 +0200 flip_test: drop vblank vs. pan pageflip vs. pan is interesting since we wait for outstanding flips before updating the fb base address. For vblank absolutely nothing interesting happens. commit 7125a338ec6b42fa31090508063bef2432d94ec2 Author: Daniel Vetter Date: Wed Oct 17 00:34:43 2012 +0200 flip_test: tune test-durations a bit 15 seconds for timestamp checkers (to at least hit the dreaded hotplug once), 5 seconds for fast tests that check every vblank something, 30 for slow test (dpms/modeset cycles). commit 6473c537d8710a775991f2535dbcaedd49f68213 Author: Imre Deak Date: Tue Oct 16 05:43:19 2012 +0300 flip_test: add wait-for-vblank tests Signed-off-by: Imre Deak [danvet: add {} for multi-line but single-statement if block.] Signed-off-by: Daniel Vetter commit ae62874cf16a759b753f8b9dbfa8eb999d1e1859 Author: Imre Deak Date: Tue Oct 16 04:11:43 2012 +0300 flip_test: add check to see if any event has occured At the moment select() would time out in case we don't get any event. When we add vblank events in a later patch, it's possible that we receive one type of events but not the other type. In this case select() doesn't time out and we need another way to detect this. Signed-off-by: Imre Deak commit fe7fea0be3b5f418b76dc7834e73b31827484429 Author: Imre Deak Date: Tue Oct 16 04:09:43 2012 +0300 flip_test: add event sequence number tracking Signed-off-by: Imre Deak commit 887a2597fab15281db7352460b52161d9e7ed3c8 Author: Imre Deak Date: Tue Oct 16 01:47:15 2012 +0300 flip_test: add logic to track pending events When we add the vblank tests later, it can happen that one type of event is pending while we are servicing another. Prepare for that by maintaining a pending/completed event mask. No functional change. Signed-off-by: Imre Deak commit a7d9a57c4767b63deb241278e9d7eafdd0023e8e Author: Imre Deak Date: Tue Oct 16 01:47:15 2012 +0300 flip_test: make page flip tests conditional Since later we want to add vblank tests where we don't want to flip, make the flips and corresponding state checks conditional. No functional change. Signed-off-by: Imre Deak commit eecae8dfef452194bd183a86cfb7d31f8d93dcba Author: Imre Deak Date: Mon Oct 15 21:18:40 2012 +0300 flip_test: unify the name of the current test in status messages Signed-off-by: Imre Deak commit 6c2b53d8948a0660e6a95b4d7350a0d15bf78ceb Author: Imre Deak Date: Mon Oct 15 21:15:18 2012 +0300 flip_test: store the pipe id in the test context obj For DRM_IOCTL_WAIT_VBLANK we'll have to pass the pipe id - as opposed to the crtc id required by the rest of the IOCTLs we use. Thanks for Chris Wilson for pointing this out. No functional change. Signed-off-by: Imre Deak commit 641261f4fec9a4519f55a08c2df6913f65c4e9b4 Author: Imre Deak Date: Tue Oct 16 16:18:08 2012 +0300 flip_test: don't skip checks for sequence #1 So far we skipped some tests for seq#0 and #1, since at that point we were missing the 'last' state against which we could compare the current state. Since in the previous patches we fixed the ordering in the test loop and moved the increment of count to the update state phase, we have a proper 'last' state for seq#1, so enable the tests already at that point. Signed-off-by: Imre Deak commit ee8f485e55f86ae850a233fabad9c0c200d81550 Author: Imre Deak Date: Mon Oct 15 20:37:01 2012 +0300 flip_test: factor out the event state Factor out the status vars that are specific to the flip events into a separate structure. This will allow us tracking the vblank events with the same code. We move the increment of the flip event counter to the end of the test loop, but this shouldn't affect anything. This is the only functional change. Signed-off-by: Imre Deak commit 5fa695529c82d5f1b5c77c83e2b46194e503987b Author: Imre Deak Date: Tue Oct 16 02:41:02 2012 +0300 flip_test: swap the order of check state/run test step At the moment we first check the state then run the test step in our test loop. Swapping the order makes the starting state of each iteration better defined, allowing an easier extension of these steps in the future. Since now it's guaranteed that we exit the event loop with no pending flips, we can also get rid of the final flushing of events. We don't want the first initializing flip to affect the test loop other than setting an initial FB, so before starting the test loop wait for it to complete by calling wait_for_events() and leave the flip event counter at zero. Signed-off-by: Imre Deak commit 960a3895a0b2a73d2c2c29910d705070940cc376 Author: Imre Deak Date: Tue Oct 16 02:37:15 2012 +0300 flip_test: split the flip handler into logical parts The handler consits of handle_event/run_test/check_state/update_state logical steps, split the function accordingly. This is needed by the following patches that need to do part of these steps for both flip and vblank events. No functional change. Signed-off-by: Imre Deak commit 9e43ecdf2113f61a28a71f67a2c464d40c732d59 Author: Imre Deak Date: Tue Oct 16 02:26:35 2012 +0300 flip_test: store current flip/received timestamps in the context obj This is needed by the next patch that splits the flip handler function into logical parts. Make the timestamps accesible to these parts. No functional change. Signed-off-by: Imre Deak commit 161e525fd8d3a1617818c5acdee4b3be6d0a1bf0 Author: Imre Deak Date: Tue Oct 16 05:50:22 2012 +0300 flip_test: factor out the final state check Needed by an upcoming patch where we want to make a final state check for both the flip and vblank events. No functional change. Signed-off-by: Imre Deak commit c96d18a994798ca2caccda4eeb4773966b4a87da Author: Imre Deak Date: Fri Oct 12 13:31:25 2012 +0300 flip_test: factor out the event loop/wait for event logic Needed by an upcoming patch where we want to wait for an event without starting a new round of test run. No functional change. Signed-off-by: Imre Deak commit 0699dc725925d36f49b833735c21f19f7cf498aa Author: Imre Deak Date: Wed Oct 10 14:47:51 2012 +0300 flip_test: move output panning inside the flip_handler Move the panning to a more logical place where the rest of the test steps are performed. As Daniel Vetter pointed it out, the proper place is _after_ the flip command is sent, so that fb_set_base correctly waits for any outstanding flip. So move the function between the flip and the dpms/modeset off calls. Signed-off-by: Imre Deak commit 3731fee849e3b02cc565812656b540cc46297227 Author: Imre Deak Date: Wed Oct 10 12:01:28 2012 +0300 flip_test: store fb width, height in test context object We will need these in event handlers, so store them where the handlers have access to them. No functional change. Signed-off-by: Imre Deak commit f9f6bff80d9d3b7e508751c344fcd3bd059d7b68 Author: Imre Deak Date: Tue Oct 16 17:34:41 2012 +0300 flip_test: factor out drmModePageFlip For better readability and to prepare for the upcoming patch marking pending flip events with a flag. No functional change. Signed-off-by: Imre Deak Signed-off-by: Daniel Vetter commit 43f6f873eb8c8e98194b5ba50675fd3a1e6b656a Author: Imre Deak Date: Tue Oct 16 17:34:39 2012 +0300 test_flip: fix checking for delayed event reception The intent for the time limit seems to be 2ms, but the current condition will result in a 1s limit and makes the check against tv_usec redundant. Fix the condition to check for a 2ms limit. Signed-off-by: Imre Deak Signed-off-by: Daniel Vetter commit 95a967faa2558a32a13390de71361af051926c75 Author: Imre Deak Date: Tue Oct 16 17:34:38 2012 +0300 flip_test: check drmHandleEvents()' return value Signed-off-by: Imre Deak [danvet: s/assert/do_or_die] Signed-off-by: Daniel Vetter commit f1b1729a8a81d05e4c45d0c20f1a5843c4bb8b6d Author: Imre Deak Date: Tue Oct 16 17:34:37 2012 +0300 flip_test: reset the state for each test run Each test run needs a clean state. Signed-off-by: Imre Deak Signed-off-by: Daniel Vetter commit 472e8a70c227807cf77db13d460e695d82b300ae Author: Imre Deak Date: Tue Oct 16 17:34:36 2012 +0300 flip_test: free FBs after each test run Though the FBs will be freed implicitly at process exit, with the growing number of test cases it's probably better not to let them accumulate and free them as soon as we can. Signed-off-by: Imre Deak Signed-off-by: Daniel Vetter commit 21393431f191d3c51b98f5acd507418b126f6cf7 Author: Imre Deak Date: Tue Oct 16 17:34:35 2012 +0300 drmtest: add function to remove an DRM FB Signed-off-by: Imre Deak Signed-off-by: Daniel Vetter commit dc3ac00f033245155c765f308fe76088f9f5bfc0 Author: Ben Widawsky Date: Mon Oct 15 10:05:56 2012 -0700 sysfs_rps: Add negative test case for bad values Signed-off-by: Ben Widawsky commit 50d46750d90b30a06d15583abe693550955ebd50 Author: Daniel Vetter Date: Fri Oct 12 10:45:52 2012 +0200 lib/mmio: gen2 has a bigger register window, too It's split up into two parts, with the gtt pte range in between. Without this I couldn't read the ADPA register ... commit 31dfc98a301b1071bfe483e5588cef2352dbcf13 Author: Imre Deak Date: Wed Oct 10 16:04:45 2012 +0300 fix warn in testdisplay: ignoring return value of 'chdir' Signed-off-by: Imre Deak Signed-off-by: Daniel Vetter commit 0bf5fd894c386cbb6a2419056e43d400c4dec73b Author: Imre Deak Date: Wed Oct 10 16:04:44 2012 +0300 fix warn in prime_nv_*: ignoring return value of ‘fgets’ Signed-off-by: Imre Deak Signed-off-by: Daniel Vetter commit bcfc0f1e4b15dac830c1f7d61b2cca3c74b3ba69 Author: Imre Deak Date: Wed Oct 10 16:04:43 2012 +0300 fix warn in gem_reg_read: 'read' shadows a global declaration Signed-off-by: Imre Deak Signed-off-by: Daniel Vetter commit 3a622b9784289615078f331df4571550aeaa7578 Author: Imre Deak Date: Wed Oct 10 16:04:42 2012 +0300 fix warn in sysfs_{rc6, rps}*: ignoring return value of 'fscanf' Signed-off-by: Imre Deak Signed-off-by: Daniel Vetter commit b614b4d648bc3534996601b4d17609439135e98a Author: Imre Deak Date: Wed Oct 10 16:04:41 2012 +0300 fix warn in gem_readwrite: 'read/write' shadows a global declaration Signed-off-by: Imre Deak Signed-off-by: Daniel Vetter commit 9de58cf6c1c1fd47ad56504cfa7cbff5cc75b885 Author: Imre Deak Date: Wed Oct 10 16:04:40 2012 +0300 fix warn in intel_reg_snapshot: ignoring return value of 'write' Signed-off-by: Imre Deak Signed-off-by: Daniel Vetter commit 5efd3d3d227365421acb4c7b350cae9c34923b2e Author: Imre Deak Date: Wed Oct 10 16:04:39 2012 +0300 fix warn in intel_error_decode: ignoring return value of 'asprintf' Signed-off-by: Imre Deak Signed-off-by: Daniel Vetter commit 6456e75f0d91f35eb2e8c2b71629e2813b0aa72d Author: Imre Deak Date: Wed Oct 10 16:04:38 2012 +0300 fix warn: 'div' shadows a global declaration Signed-off-by: Imre Deak Signed-off-by: Daniel Vetter commit 1a83c0990af469a0559002d4c2e9f99333edc996 Author: Daniel Vetter Date: Tue Oct 9 22:47:59 2012 +0200 tests/gem_exec_big: fixups - don't emit a self-modifying batch, the kernel doesn't like those - also change the buffer size, to exercise all corner-cases of the sg_table stuff commit fa6b0208ab161f7021cfde09fa74ab02907073e6 Author: Daniel Vetter Date: Tue Oct 9 19:43:28 2012 +0200 tests/gem_exec_big: add a reloc at the end of the big batch Since that's the other place where the broken get_page blows up. Actually it seems to only blow up on specific pages ... commit 1431938c5c00786130a6870277a376009c34579f Author: Daniel Vetter Date: Tue Oct 9 19:29:02 2012 +0200 tests: add big batchbuffer test ... and use it in the hangman to stress the error_state capture a bit more. Uncovered a bug in the obj->pages ->obj->sg_list rework. commit 5f94468f520ba790215a352a3f824b9580e268a7 Author: Daniel Vetter Date: Tue Oct 9 19:27:41 2012 +0200 lib: remove auto-quiescenting of the gpu In retrospective, this is an ugly idea. Any tests that needs this can call it themselves. commit b8e384a4d5b9910f655dc532636978d0c0e24054 Author: Daniel Vetter Date: Tue Oct 9 17:50:40 2012 +0200 lib: make drmtest_progress more robust commit e5722bac9cfd5a643141117d1899bcd6aa7c3731 Author: Daniel Vetter Date: Tue Oct 9 17:32:00 2012 +0200 tests: update .gitignore I've thought I've fixed this, but looks like I've failed to commit. commit c9795c6dfe1fc383dcbbd587ba633974dd4d0f67 Author: Daniel Vetter Date: Tue Oct 9 17:30:59 2012 +0200 tests: add gem_cs_tlb Should test tlb coherency, but somehow it fails to hit the bug I want it to hit ... needs more work. commit a7787baccc187ef10ed497ad9d8dd940df70c6e7 Author: Daniel Vetter Date: Tue Oct 9 15:51:13 2012 +0200 tests/gem_cs_prefetch: clarify what it tests I've forgotten ;-) commit dc5d76e2bf95eadf299edfdfc51eee085f5c67d3 Author: Daniel Vetter Date: Thu Oct 4 21:40:54 2012 +0200 tests/flip_test: check -EBUSY and -EINVAL behaviour We want -EBUSY for a pending flip and -EINVAL if the pipe is off (either dpms off or completely off). With the small exception that someone thought it would be funny to return -EBUSY when the crtc is fully off. commit 1422c22e8909b189bb7cc67ee1ee403c5bd81d08 Author: Daniel Vetter Date: Thu Oct 4 13:22:16 2012 +0200 tests/*storedw*: add subcases with more outstanding batches Just in case this is better at hitting seqno signalling races ... Signed-off-by: Daniel Vetter commit 826326bc7c464c7297687a82d03da83922555ca1 Author: Daniel Vetter Date: Wed Oct 3 23:16:18 2012 +0200 flip_test: fix timestamp order When grabbing the timestamp after a flip, it has a decent chance to actually be after the flip. Surprising. commit 630dd4087d50f6db3b9d4e9fc42ca159b6d39446 Author: Daniel Vetter Date: Wed Oct 3 18:57:40 2012 +0200 tests/gem_caching: only disable on vintage i965g/gm Hooray for confusing macros! Acked-by: Chris Wilson commit 2d431fd6b6430261334f50a9dbba5bd473ded449 Author: Daniel Vetter Date: Wed Oct 3 13:44:30 2012 +0200 tests: add drm_threaded_access_tiled This catches parallel access to bo->virtual causing sigbus Signed-off-by: Mika Kuoppala [danvet: applied some bikeshed - changed prefix from drm_ to gem_, it's a kernel gem test - added autohell magic to link with pthreads - .gitignore entry Signed-off-by: Daniel Vetter commit 9965299cf35496d10f8348a1539822a9f83940a8 Author: Daniel Vetter Date: Tue Oct 2 21:29:57 2012 +0200 flip_test: add an explicit flag for timing checks We'll need this for the wait_vblank test cases. commit aaa460951d9d54f27dc2a7d775ed5cf439b9768f Author: Chris Wilson Date: Tue Oct 2 21:40:46 2012 +0100 gem_cpu_reloc: Do another pass explicitly moving to the CPU write domain Signed-off-by: Chris Wilson commit 99a0824669374144d2c644c3a5d9bb7cf65ef716 Author: Chris Wilson Date: Tue Oct 2 21:04:36 2012 +0100 gem_cpu_reloc: Use the mappable aperture size! Signed-off-by: Chris Wilson commit 217511012a80461d465df33f7760c1f5f77c270e Author: Chris Wilson Date: Tue Oct 2 21:02:22 2012 +0100 gem_cpu_reloc: And run the test in reverse to check with already bound batches Signed-off-by: Chris Wilson commit 8b2c19da0bf5d6f9c7b78f8cd6f5000bf49862cd Author: Chris Wilson Date: Tue Oct 2 20:50:17 2012 +0100 gem_cpu_reloc: Fix for running on SNB+ I work with these everyday and I still made a basic mistake. Signed-off-by: Chris Wilson commit 43737163d3d5a798b63497003027ba6d5aba847c Author: Daniel Vetter Date: Tue Oct 2 19:42:11 2012 +0200 flip_test: increase runtime of the plain flip to 15s This ensures that we'll hit the stupid hpd poll handler in every run. Also don't yell around about jitter for tv outputs ... commit 400535e82f6f6a3e5f9098fef009cdbd7c727a41 Author: Daniel Vetter Date: Tue Oct 2 19:33:30 2012 +0200 tests/flip_test: measure inter-frame ts jitter Yell if it's wrong. For some odd reason this blows up on my snb. And always on the same o->count frame on the 2nd crtc ... And we have to thank the hpd poll helper for that. Comment explaining this added, also made the error non-fatal. commit 87f7dccab69631562fac20aa3fcc2b5762f48f24 Author: Daniel Vetter Date: Tue Oct 2 17:38:04 2012 +0200 flip_test: race against modesets, too Even slower than dpms switching ;-) commit ef45b4403677ccf6207a3d80528c45f8d3a3f171 Author: Chris Wilson Date: Tue Oct 2 19:22:37 2012 +0100 gem_wait_render_timeout: Fix SKIP return code Signed-off-by: Chris Wilson commit 3b9a76d2fa40b43ed3231d3c5382ea05317b9bde Author: Chris Wilson Date: Tue Oct 2 17:27:16 2012 +0100 tests: Add gem_cpu_reloc Attempt to stress test performing relocations whilst the batch is in the CPU domain. A freshly allocated buffer starts in the CPU domain, and the pwrite should also be performed whilst in the CPU domain and so we should execute the relocations within the CPU domain. If for any reason one of those steps should land it in the GTT domain, we take the secondary precaution of filling the mappable portion of the GATT. In order to detect whether a relocation fails, we first fill a target buffer with a sequence of invalid commands that would cause the GPU to immediate hang, and then attempt to overwrite them with a legal, if short, batchbuffer using a BLT. Then we come to execute the bo, if the relocation fail and we either copy across all zeros or garbage, then the GPU will hang. Signed-off-by: Chris Wilson commit d619a672df97f34cfbbebe89ed8cbe15827182a1 Author: Daniel Vetter Date: Tue Oct 2 17:22:09 2012 +0200 tests/flip_test: also test pannning with dummy load Needs a bit more relaxed select timeout to work (which is not required when testing dummy_load vs. dpms, since the dpms forces the sync, not the select timeout). commit 66fe119afd1cec2fdd47cec77523b4af2526df47 Author: Daniel Vetter Date: Tue Oct 2 17:17:40 2012 +0200 tests/flip_test: test interaction with panning Since panning with set_crtc is synchronous, we need to stall for any outstanding pageflips. This new testcase exercise that code. Unfortunately we still need eyes to check whether we don't loose the offset :( commit 3441ad29bf82057db814d60f35c146f24c5896b9 Author: Daniel Vetter Date: Tue Oct 2 17:01:06 2012 +0200 tests/flip_test: robustifications - don't yell around about dropped frames on tv connectors (and explain why in a comment) - wait a bit when using a test config that checks for dropped frames before starting. Also allow for 1% of fudge, this makes it reliably work - make the dummy load more variable, took too long on older machines. commit cdad308a4bbc96bd7feb7ab57eb4f261c08dd1dd Author: Daniel Vetter Date: Tue Oct 2 16:09:00 2012 +0200 tests/flip_test: don't complain about timestamps in the future those can happen due to the scanline vblank timestamp adjuster ... commit 4c7fc65cb63374a42ec9a41f4d5067d50e053aac Author: Daniel Vetter Date: Tue Oct 2 15:59:58 2012 +0200 tests/flip_test: actually try to check what I want to check /me sucks commit 6b034a6fd69c9e5bfac682a4c98208433079501c Author: Daniel Vetter Date: Tue Oct 2 15:42:34 2012 +0200 tests/flip_test: check whether timestamp isn't in the past This is mostly useful for when we add support for other clock sources, e.g. clock_monotic, to check whether the kernel picked the right clock. commit 73af035c598047147957a081b26bfb156e01a530 Author: Daniel Vetter Date: Tue Oct 2 15:37:24 2012 +0200 tests/flip_test: check whether the pageflip event took too long We're suspecting that something is fishy with the event deliver/vblank timestamp handling on gmch platforms. Unfortunately, this isn't it. Signed-off-by: Daniel Vetter commit f509d40fa95886266a6e78aa4aa1b2764769eba1 Author: Chris Wilson Date: Tue Oct 2 12:59:16 2012 +0100 flip_test: count the number of flips and check we don't drop any In the basic case of just flipping between two buffers with no additional work, we should neve drop a frame. commit 93ea0182c4632ac69dcefd05a20b7ebabb2d7e18 Author: Daniel Vetter Date: Tue Oct 2 11:50:20 2012 +0200 tests/flip_test: re-enable disabled testcases oops commit 4701dacbc5903303bdd3c35488f449eb2f425074 Author: Daniel Vetter Date: Tue Oct 2 10:33:13 2012 +0200 tests/flip_test: new testcase with a busy load before the flip I've hoped that this would be good enough to hang pch platforms, but it looks like those just complete the flip immediately on disabled pipes. commit 3d4ebe9be3dc4e4375ac10e84b6355144d043851 Author: Daniel Vetter Date: Tue Oct 2 10:32:25 2012 +0200 fixup .gitignore for newly add sysfs_rps test commit df7edaab90517cc8d5ed0f72a8a96dbdd04f0ed7 Author: Daniel Vetter Date: Tue Oct 2 10:32:10 2012 +0200 lib: helper to convert gem_hanlde to drm_intel_bo commit 9d1a3587acc75f39a1a070f92dd80f79504bf60c Author: Daniel Vetter Date: Mon Oct 1 11:34:10 2012 +0200 drmtest: use do_or_die commit a65087a26e0f7a567a3d09887869d821bb5a7840 Author: Chris Wilson Date: Fri Sep 28 13:03:02 2012 +0100 tests/flip_test: Revamp to demonstrate race with modeset/dpms and pageflips Signed-off-by: Chris Wilson commit 4650505d7e48dce84baeeb7754409b3956e80ad8 Author: Damien Lespiau Date: Wed Sep 26 18:17:53 2012 +0100 intel_infoframes: Dump HDMI vendor infoframes Those infoframes are programmed when using stereo 3D modes. Signed-off-by: Damien Lespiau Reviewed-by: Rodrigo Vivi Signed-off-by: Daniel Vetter commit 53895acbe26c2cdb1ff536035231889f97a3500c Author: Yi Sun Date: Tue Sep 25 17:13:17 2012 +0800 Add option -o , which can test only one specified mode. Each mode line has a number just like '[i]'. So we can only test the specified mode with giving the number of mode to '-o' parameter. Signed-off-by: Yi Sun Signed-off-by: Daniel Vetter commit d00f72a01bb66d63713a0628fc47b82321a92d4c Author: Chris Wilson Date: Tue Sep 18 14:04:58 2012 +0100 tests/module_reload: Silence warnings when unloaded shared modules So long as we spit out critical errors during i915 reload, or detect any oops the test will do its job. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55040 commit 0cedccc8445943cc43ecbaf9af28807e2556d129 Author: Ben Widawsky Date: Fri Sep 7 18:12:07 2012 -0700 sysfs rps test added Signed-off-by: Ben Widawsky commit 397cd4acd1c7789482eadb5cf24e667a9684d1fa Author: Chris Wilson Date: Thu Sep 13 15:05:34 2012 +0100 gem_gtt_speed: Add a test that caches the mmapping across iterations Repeat the memset streaming performance test on the same mapping so that we can factor out the overhead of establishing the GTT/CPU mmaps. Signed-off-by: Chris Wilson commit f256ada3b689c4ecedfd2a2978a01ab01f266aaa Author: Chris Wilson Date: Thu Sep 13 14:55:53 2012 +0100 gem_gtt_speed: Use a memset() to test streaming performance This make the reasonable assumption that the libc code for memset() can saturate the memory bandwidth -- at any rate it should do better than the copy. Signed-off-by: Chris Wilson commit efd68f9d64caf7b359df2d7512f89d61c4b6e3ae Author: Ben Widawsky Date: Wed Sep 12 17:48:21 2012 -0700 intel_sprite_on: plane needs 16.16 width and height This only ever worked because we used to have a bug in our driver which was fixed months ago by: commit b4db1e35ac59c144965f517bc575a0d75b60b03f Author: Jesse Barnes Date: Tue Mar 20 10:59:09 2012 -0700 drm/i915: treat src w & h as fixed point in sprite handling code Reported-by: Armin Reese Signed-off-by: Ben Widawsky commit 93e5b4477ffe12f70013da027ecdc086520e027a Author: Ben Widawsky Date: Wed Sep 12 17:27:08 2012 -0700 intel_sprite_on: coding style fixes It was driving me nuts... Signed-off-by: Ben Widawsky commit 5b5a7a806f69dd6208822e3a35f3fb5a38d615b1 Author: Ben Widawsky Date: Sat Sep 8 13:40:04 2012 -0700 intel_sprite_on: Idententation + Copyright fix Signed-off-by: Ben Widawsky commit 209ab470f248e1720ac0aff1be175fb992c827a1 Author: Damien Lespiau Date: Fri Sep 7 11:42:20 2012 +0100 tools: Update gitignore with intel_dpio_{read, write} Signed-off-by: Damien Lespiau Signed-off-by: Daniel Vetter commit c8b93b8b7738f74e710bcbe8a7015ee3eaad3aa1 Author: Damien Lespiau Date: Mon Sep 3 16:16:29 2012 +0100 intel_reg_dumper: Add more information when dumping single registers Now that we can dump registers giving a partial name, adding more information about the dumped registers seems useful. Signed-off-by: Damien Lespiau Signed-off-by: Daniel Vetter commit 62a026eac5de8ed2acfe26161c718eb51fc537f0 Author: Damien Lespiau Date: Mon Sep 3 16:16:28 2012 +0100 intel_reg_dumper: Allow partial register names on the command line Let people give just a part of the register name. Handy when not remembering the exact name or if the register is defined with a different name than the one in the spec being looked at. Signed-off-by: Damien Lespiau Signed-off-by: Daniel Vetter commit 763d22cbf83721982e43818cc07a0df999790afb Author: Damien Lespiau Date: Mon Sep 3 16:16:27 2012 +0100 intel_reg_dumper: Also decode registers given by address One can now give an address instead of a register name to decode a single register. Signed-off-by: Damien Lespiau Signed-off-by: Daniel Vetter commit 2fd80079c0943a16b9b55bedc7926c47922e368e Author: Damien Lespiau Date: Mon Sep 3 16:16:26 2012 +0100 intel_reg_dumper: Add a single register decode mode From time to time, one would like to decode a register value that have been captured at a certain point in time (and say printed out with a printk). intel_reg_dumper has all the knowledge to do that and this patch adds a way to ask it to decode a value. Example usage: $ ./tools/intel_reg_dumper PCH_PP_CONTROL 0xabcd0002 PCH_PP_CONTROL: 0xabcd0002 (blacklight disabled, power... v2: friendlier invocation (Chris Wilson) v3: remove unecessary casts and use strcasecmp (Jani Nikula) Signed-off-by: Damien Lespiau Signed-off-by: Daniel Vetter commit bc62567b77cd3a790e2e8e2d7fd81ce950bfbe3f Author: Ben Widawsky Date: Thu Aug 30 14:17:01 2012 -0700 clang: Fix static analysis warnings from clang Signed-off-by: Ben Widawsky commit 54ed938d393970584a9b2a8b0783b0c0901255db Author: Ben Widawsky Date: Thu Aug 30 14:03:54 2012 -0700 clang: Fix warnings found through clang. Signed-off-by: Ben Widawsky commit ac23daaa51c88eba3e120afeaff9e491a2d61168 Author: Chris Wilson Date: Mon Jul 16 16:41:16 2012 +0100 tests/gem_cacheing: Exercise snoop coherency This is based on tests/gem_partial_pwrite_pread which aims to detect incoherency between CPU reads and writes to a bo whilst using it as a source and target for GPU writes. Signed-off-by: Chris Wilson commit 51baabb562caf1e1009bad5cae7efef126590117 Author: Chris Wilson Date: Mon Jul 16 16:39:57 2012 +0100 Add bare-metal interface to adjust cacheing (i.e. snoop status) of a bo Signed-off-by: Chris Wilson commit dd5f40f50c02e8ef68ac9bbee3e94302e7baeed3 Author: Daniel Vetter Date: Mon Aug 27 09:37:01 2012 +0200 bump to 1.3 release commit 7a02aa4cbfe4c63bb9435cf9cab487bd1df10185 Author: Chris Wilson Date: Sun Aug 26 21:22:15 2012 +0100 mmio: Limit the uc- mapping to only map the registers In the future, we may like to enable wc mapping of at least the GATT, and so causing a conflict if we attempt to map the entire bar as uc- here. Obviously we need a better fallback plan, but for the moment only attempt to map the portion of the pci space that we use for register access. Signed-off-by: Chris Wilson Signed-off-by: Daniel Vetter commit a4783f9485f78c80e7cc1eb041634b4b8a3aa4b9 Author: Chris Wilson Date: Sun Aug 26 21:22:14 2012 +0100 intel_gtt: Harden against changes to kernel mappings of the GTT Rather than use the common mmio segment which will be in future restricted to just the registers and so exclude the GTT portion on all architectures, explicitly mmap the GTT ourselves. Repeat this mmapping with a couple of flags until we matching the existing kernel mapping. Signed-off-by: Chris Wilson Signed-off-by: Daniel Vetter commit 3d148e164d498d81cc3990c85b65afee8bcca3b8 Author: Daniel Vetter Date: Sat Aug 25 00:01:27 2012 +0200 s/NO_PID/NOP_ID Alan typo'ed it, I've failed to notice :( commit 1b5fd314fd474827373f6f48fa11fcb60687f5a2 Author: Alan Coopersmith Date: Fri Aug 24 14:02:04 2012 -0700 Add --disable-nouveau option for platforms without nouveau support Signed-off-by: Alan Coopersmith Signed-off-by: Daniel Vetter commit 4cdfa8e9b7177a12d7d693207be52a6c999236ef Author: Alan Coopersmith Date: Fri Aug 24 14:02:03 2012 -0700 flip_test: add cast to pacify Solaris Studio compiler Fixes build error: "flip_test.c", line 180: improper pointer/integer combination: op "=" Signed-off-by: Alan Coopersmith Signed-off-by: Daniel Vetter commit 6b3e6f28d2ba738fd2677b6c3e4f7ec03d9a463a Author: Alan Coopersmith Date: Fri Aug 24 14:02:02 2012 -0700 Rename NOPID to NO_PID to avoid conflict with Solaris NOPID Solaris already has #define NOPID (pid_t)(-1) Signed-off-by: Alan Coopersmith Signed-off-by: Daniel Vetter commit 99fdba921ed88381ab721b15299e637366042465 Author: Alan Coopersmith Date: Fri Aug 24 14:02:01 2012 -0700 Fall back to CLOCK_MONOTONIC on systems without CLOCK_MONOTONIC_RAW Solaris has not yet adopted this Linux extension Signed-off-by: Alan Coopersmith Signed-off-by: Daniel Vetter commit e40146878e4cf74a96fd0c42342065f7cd85fa97 Author: Daniel Vetter Date: Fri Aug 24 23:18:48 2012 +0200 Revert "tests: disable nouveau if unavailable" This reverts commit dd8325323bfcca1f742e864ca7d87101a0d59936. I like the patch from Alan Coopersmith with an explicit disable option better. commit dd8325323bfcca1f742e864ca7d87101a0d59936 Author: Maarten Lankhorst Date: Fri Aug 24 22:55:20 2012 +0200 tests: disable nouveau if unavailable commit 425940be1d894459cead9aaf211a74338480aaa3 Author: Maarten Lankhorst Date: Fri Aug 24 22:50:21 2012 +0200 tests/prime_nv_test: add missing call for test8 commit c5b7ebc1cc4ecb4db8e691ba0d935826c6da2ebf Author: Maarten Lankhorst Date: Fri Aug 24 22:49:40 2012 +0200 tests/prime_nv_pcopy: kill debug code that's not upstream commit 94ec3f926c2a8e0706a93b20892aa1a25a504e99 Author: Daniel Vetter Date: Fri Aug 24 15:45:09 2012 +0200 tests/prime_nv: don't enable buffer reuse We share these suckers, hence the fd-local libdrn instance does not have full control over the lifecycle of the object. Prevents the tests from blowing up with [drm:i915_gem_mmap_gtt] *ERROR* Attempting to mmap a purgeable buffer and similar things. Signed-off-by: Daniel Vetter commit d4005511443e385b54b11754681f7bf44b6d9796 Author: Ben Widawsky Date: Thu Aug 23 11:37:09 2012 -0700 Converted a display debug script for use by designers Signed-off-by: Ben Widawsky commit ea944a9faf137e95b146ce8a1fb15d7e4cb8ae41 Author: Ben Widawsky Date: Thu Aug 23 11:32:57 2012 -0700 intel_reg_read: use strtol instead of atoi Signed-off-by: Ben Widawsky commit baf026d692c25969c3a30fcd50394c83f3f20815 Author: Ben Widawsky Date: Thu Aug 23 11:29:43 2012 -0700 intel_reg_read: support -c option to read multiple dwords Signed-off-by: Ben Widawsky commit 4fc76adf313f2792b7438f9372321ce3ea66c6c2 Author: Vijay Purushothaman Date: Fri Aug 17 18:06:52 2012 +0530 tools: Added intel_dpio_read and intel_dpio_write In Valleyview the DPLL and lane control registers are accessible only through side band fabric called DPIO. Added two tools to read and write registers residing in this space. v2: Moved the core read/write functions to lib/intel_dpio.c based on Ben's feedback Signed-off-by: Vijay Purushothaman Signed-off-by: Daniel Vetter commit 082826de6c66ff76c444434cd56aaf6df80027b3 Author: Daniel Vetter Date: Wed Aug 15 10:26:08 2012 +0200 tests: add gem_gtt_cpu_tlb This catches tlb invalidation issues on my snb mobile gt2+ commit c407722048cee255be0e02ccf27d010ad3c7a6f6 Author: Wang Xingchao Date: Wed Aug 15 16:13:38 2012 +0800 intel_audio_dump: add Haswell audio dump support Add Haswell audio registers definition and dump support. Signed-off-by: Wang Xingchao Signed-off-by: Daniel Vetter commit f9a2481e717fcd8c8bd363f9084743ce885aa1d4 Author: Wang Xingchao Date: Wed Aug 15 16:13:37 2012 +0800 intel_audio_dump: fix wrong port definition there're three Ports B/C/D used for selection by each transcoder A/B/C. Signed-off-by: Wang Xingchao Signed-off-by: Daniel Vetter commit 1f523bd8d10c0b67fc8a026633bcaa416ea03d9c Author: Maarten Lankhorst Date: Tue Aug 14 18:51:19 2012 +0200 Fixup previous commit ENODEV not being defined and return code wrong commit 3dda35744561e61cd6a63a75eb77bc4d67643f27 Author: Maarten Lankhorst Date: Tue Aug 14 18:50:29 2012 +0200 And add another corner case skip commit 0f65ee9576dcfe3f9b82dcda47fd8744874c4ccb Author: Maarten Lankhorst Date: Tue Aug 14 18:48:48 2012 +0200 fix crash with insufficient permissions commit fc54f2eaa8f55ceb4955d31ef6d8b36645c6910f Author: Maarten Lankhorst Date: Tue Aug 14 18:25:50 2012 +0200 satisfy danvet's OC and add skip codes, but mostly satisfy danvet's OCD commit 4520025b7320cad238333793f36aadd466adb7ba Author: Maarten Lankhorst Date: Mon Aug 13 15:57:57 2012 +0200 Add intel <-> nouveau prime tests commit 0efa6c7b2725f67d742f194a0c88291b7b3edffa Author: Daniel Vetter Date: Tue Aug 7 18:16:34 2012 +0200 tools/reg_dumper: really dump pipe C regs Not just a copy of pipe B. Meh. Also kill a few redudant #define for pipe B - they match pipe A. commit 9fcaffda887a8ea20135e48368b44037a4750c63 Author: Yi Sun Date: Wed Aug 8 14:35:20 2012 +0800 Update the image file pass.png with higher correction level Signed-off-by: Yi Sun commit f669e8c12ebaae6f3638593d564358e5ab43d24c Author: Yi Sun Date: Wed Aug 8 14:32:04 2012 +0800 tests/testdisplay.c Remove an uncomfortable error output Signed-off-by: Yi Sun commit 5ba39da67e4bc2a17e2e3d8e8a06386ebc5a5ae8 Author: Paulo Zanoni Date: Mon Aug 6 15:05:28 2012 -0300 lib: add more Haswell PCI IDs Signed-off-by: Paulo Zanoni Reviewed-by: Rodrigo Vivi commit f56a289aa86e591243c07b17d9bdf22e5e82de8a Author: Daniel Vetter Date: Tue Aug 7 14:50:54 2012 +0200 tools/reg_dumper: dump pipe C regs Also reorder the pipe B regs a bit to be consisten with pipe A. commit 81f16261f4d5d2cb1217569cc6580c0326b9eae2 Author: Daniel Vetter Date: Sun Aug 5 21:40:56 2012 +0200 tests/gem_reg_read: actually wait a bit between reading TIMESTAMP reg QA could only hit this on ilk because the timer increase quite a bit slower on that platform than on gen6+ (80ns vs 320ns, iirc). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=52937 commit 41fe811feb5c79c760f5d2e9fe5d1671f6d71ff8 Author: Yi Sun Date: Thu Jul 26 14:23:36 2012 +0800 tests/testdisplay.c: Add a option '-r'. With the option '-r', the testdisplay could paint a 2-D bar code(QR bar code) on the screen. The word "pass" is hiden in the bar code image. Further more, with this option, testdisplay will wait until a system signal 'SIGUSR1' coming after each mode setting. This function is for another program to control testdisplay. danvet: Fix up the missing static. Signed-off-by: Yi Sun Signed-off-by: Daniel Vetter commit 3b0f80308a033633be6b903fa2a55128dfd99339 Author: Damien Lespiau Date: Wed Jul 25 16:04:32 2012 +0100 build: Make autoreconf honour ACLOCAL_FLAGS When running autoreconf, it's possible to give flags to the underlying aclocal by declaring a ACLOCAL_AMFLAGS variable in the top level Makefile.am. Putting ${ACLOCAL_FLAGS} there allows the user to set an environment variable up before running autogen.sh and pull in the right directories to look for m4 macros, say an up-to-date version of the xorg-util macros. Signed-off-by: Damien Lespiau commit efa5e355ac371d749cf505b952b900d05f25474c Author: Daniel Vetter Date: Tue May 22 19:55:21 2012 +0200 test/flip_test: don't fail if we can't find a crtc some connectors are forced to certain crcs ... commit c832aa1714a47516e6b9402709d66720c464393f Author: Daniel Vetter Date: Mon Jul 23 11:25:47 2012 +0200 tests: fixup prime test paranoia commit 5d9e22366b37b725358d22dbee47e094f7157974 Author: Daniel Vetter Date: Mon Jul 23 10:06:25 2012 +0200 tests/prime: more paranoia - check the old contents first in check_bo - drop all GEM handles for the re-import test commit 796f6193c9697e0ae57970a8c48cc9bb3a69877d Author: Daniel Vetter Date: Mon Jul 23 09:51:12 2012 +0200 tests: add missing stuff to .gitignore Signed-off-by: Daniel Vetter commit 6bc22e3dfd2cf143c2a9abcb72738a1674ce2fc5 Author: Daniel Vetter Date: Mon Jul 23 09:49:06 2012 +0200 tests: add basic re-importing prime test Signed-off-by: Daniel Vetter commit fb748aad4cc8b178801f286e947b251d29764da5 Author: Daniel Vetter Date: Mon Jul 23 06:41:10 2012 +0200 tests: s/drm_reg_read/gem_reg_read gem_ is the prefix for low-level kernel tests, drm_ tests libdrm_intel specific stuff. commit 434be47f12c390659bf0dabd8ebea8ea37f8f26a Author: Daniel Vetter Date: Sat Jul 21 17:36:36 2012 +0200 shut up the compiler a bit Signed-Off-by: Daniel Vetter commit 4c9abd5aa460572899c4890fcc833d57ee025073 Author: Ben Widawsky Date: Sun Jul 22 16:30:04 2012 -0700 reg_read: use good offset, and errno The test was bonghits. Signed-off-by: Ben Widawsky commit 58cfeabb90a9bef742df53e2602966a2166e37b9 Author: Ben Widawsky Date: Wed Jul 18 11:47:42 2012 -0700 reg_read: skip older kernels Signed-off-by: Ben Widawsky commit 4fe786953962d9603d15ea82c97ea5f6e57ba8be Author: Ben Widawsky Date: Wed Jul 11 17:06:01 2012 -0700 reg_read: basic register read ioctl test This will need to get modified when the ioctl expands, and so is only here for reference/to make Daniel happy. Signed-off-by: Ben Widawsky commit d9fb72e26698562367df53909ade0d34520f88f0 Author: Daniel Vetter Date: Fri Jul 13 10:35:11 2012 +0200 tests: improve concurrent blit tests By adding another testcase that follows up with a gpu read. This checks whether the kernel properly tracks the pending write and doesn't lose it (or sync up to the wrong seqno). For some odd reason only the cpu mmap variant blows up, the gtt one works here. I need to look into that some more. Signed-Off-by: Daniel Vetter commit fbd6d0495969ffab5902e3e8e39dc4687806ae0c Author: Ben Widawsky Date: Tue Jul 3 11:04:05 2012 -0700 gem_ctx_basic: fixes I must have checked in the wrong version the first time. Signed-off-by: Ben Widawsky commit e843c55370e85c147b9e4ca9b26cf0902a1b322c Author: Ben Widawsky Date: Tue Jul 3 10:40:32 2012 -0700 ctx_basic: we stopped using rendercopy so get rid of the remants. perhaps we'll use it again someday. Signed-off-by: Ben Widawsky commit cbb3c685b59aeb41a6ce94bc47f0bf255c87df60 Author: Ben Widawsky Date: Sat Jun 30 19:26:59 2012 -0700 rendercopy_gen7: add support for haswell Only compile tested. Signed-off-by: Ben Widawsky commit afcffe783a12472e60d4cd0f2ebdc89e2f5b2def Author: Ben Widawsky Date: Thu Jun 14 11:04:01 2012 -0700 context_basic: the most stressful context test to date. this context test requiring libdrm updates Signed-off-by: Ben Widawsky commit a635a5ac3bb72b8ac13f020b610b71d97499a1fb Author: Ben Widawsky Date: Sun Jan 15 14:52:33 2012 -0800 context: libdrm wrappers This wraps libdrm functionality to exec with contexts. This patch shouldn't be applied until libdrm for contexts is updated. Signed-off-by: Ben Widawsky commit c157e9485e6a96fa359f8236f43475bc2095e1e2 Author: Ben Widawsky Date: Fri Jun 29 11:23:34 2012 -0700 intel: update libdrm requirement We want context APIs in order to use our super context test. Signed-off-by: Ben Widawsky commit beb1bb8fd26b1b1c55242c3b2a3004a346d64b80 Author: Ben Widawsky Date: Thu Jun 28 22:43:47 2012 -0700 gem_stress: use the gen7 rendercopy Signed-off-by: Ben Widawsky commit 2234f87a0852f321a6f85e8fcd6fbb6866f9c944 Author: Ben Widawsky Date: Thu Jun 28 22:42:58 2012 -0700 lib: add a gen7 rendercopy Signed-off-by: Ben Widawsky commit ab0460eaac85fdd66328ccba511519397cea0ddb Author: Ben Widawsky Date: Wed Jun 27 11:13:23 2012 -0700 ctx_bad_destroy: danvet changed to ENOENT In all fairness if the test worked, he would have found this earlier Signed-off-by: Ben Widawsky commit 278e53b5c42f4bf1dcabf82aab2f211e6994ed06 Author: Ben Widawsky Date: Wed Jun 27 11:13:06 2012 -0700 ctx_bad_destroy - ioctl is 2e, not 23 Signed-off-by: Ben Widawsky commit 1136f61298979912e7edfa94a56437f7c9c5499b Author: Ben Widawsky Date: Wed Jun 27 11:07:09 2012 -0700 ctx_bad_destroy: a little more description is nice Signed-off-by: Ben Widawsky commit 76b53ef68d39063c4b0203aa8db2b32dcce1e3b4 Author: Daniel Vetter Date: Tue Jun 26 19:47:30 2012 +0200 tests/gem_wait_rendering_timeout: needs more fudge Due to the way we calculate the workload by doubling it each time we might end up with almost twice as much as we want. Hence increase our fudge by 1.5 to account for that. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=50666 commit c6fe31bc473a7ae44bc42bad7da5faca3c924821 Author: Eugeni Dodonov Date: Thu Jun 21 14:31:34 2012 -0300 intel_reg_dumper: use intel_register_access_init/fini We need to hold forcewake lock in order to be able to read GT registers. Otherwise, when the GPU is in RC6 mode, we'll read all zeros. Signed-off-by: Eugeni Dodonov commit f7e356d9cd7795de055a9f3c13bb33f5c9bea01f Author: Ben Widawsky Date: Thu Jun 14 10:00:57 2012 -0700 context tests not requiring libdrm Signed-off-by: Ben Widawsky commit 5a28ef8580a83375fc663b84873c4e18207ed3fb Author: Ben Widawsky Date: Sun Mar 18 18:42:44 2012 -0700 context: update for new execbuf2 element Signed-off-by: Ben Widawsky commit b28a399dcd8d28b6b9bde4baa105f9e78e520122 Author: Eugeni Dodonov Date: Wed Jun 13 15:34:40 2012 -0300 intel_reg_dumper: dump more PM registers Signed-off-by: Eugeni Dodonov commit 34240176c15968e9f25e154d7a1111bb7b0af8af Author: Jesse Barnes Date: Mon Jun 11 12:08:32 2012 -0700 add VLV PCI ID This allows the tests to run on the prototype boards. commit b015a25e897d8b2d79d5938d10e35803ce4dfa2c Author: Daniel Vetter Date: Fri Jun 8 19:35:19 2012 +0200 tests/debgufs_emon_crash: make it quiet commit 9739401fb5806d576f0bc895239e67d86352d417 Author: Daniel Vetter Date: Thu Jun 7 16:37:02 2012 +0200 intel_reg_dumper: dump pre-pch-split blc regs commit 77586dcdf7240aebf29d3d70313dce9d79108147 Author: Chris Wilson Date: Mon Jun 4 17:29:20 2012 +0100 test/gem_gtt_speed: Add a baseline test for the performance of a CPU mmap When looking at the pwrite/pread/wc performance, it is useful to judge that against the performance of an ordinary CPU mmap. Signed-off-by: Chris Wilson Acked-by: Daniel Vetter commit b558877f6e25663ece1242f1e658cf1630d7d7fe Author: Daniel Vetter Date: Thu May 31 15:45:17 2012 +0200 test/sysfs_l3_parity: skip test if the sysfs interface doesn't exist commit 4cf1b02e96b276fcd707d26c9533ab4bfad54739 Author: Daniel Vetter Date: Thu May 31 15:45:17 2012 +0200 test/sysfs_l3_parity: fixup logic It didn't fail properly. commit 55fdd7f1bb4cd5044dbbb4822180a91a9a4c0dd2 Author: Daniel Vetter Date: Thu May 31 13:49:32 2012 +0200 cleanups after l3_parity merge - call it sysfs_l3_parity for more consistency - add .gitignore for intel_l3_parity commit dac1a2cedae1118cfa4ae5a4667cd715487cfcf2 Author: Ben Widawsky Date: Fri May 25 16:56:27 2012 -0700 tests/dpf: simple dpf test Signed-off-by: Ben Widawsky commit 8f7ea34751886ca754e6246a9d400de18c6a972f Author: Ben Widawsky Date: Fri May 25 16:56:26 2012 -0700 tools/dpf: Tool to read and write l3 remap registers. Signed-off-by: Ben Widawsky commit a35dcac0ff7310bc431c14419874e9653d0d2725 Author: Daniel Vetter Date: Wed May 30 20:16:24 2012 +0200 tests/gem_wait_rendering_timeout: check polling behaviour ... with timeout=0. We have special code in the kernel to optimize that one. commit b8e00110a0556fb7edde5dcb3ed0ff3d728c5552 Author: Daniel Vetter Date: Tue May 29 22:23:14 2012 +0200 lib/gem_wait_rendering_timeout: sprinkle busy_ioctl checks While we have that testcase, let's cross-check the busy ioctl. commit bfbe813f8fb587017c4e1d73c51395c2837eb395 Author: Daniel Vetter Date: Tue May 29 22:14:06 2012 +0200 lib: fix gen5 workaround emission Using BEGIN_BATCH can lead to a nice inf recursion through require_space -> flush_batch -> BEGIN_BATCH. Also fix things up to always require BATCH_RESERVED. We need 2 dwords for the gen5 workaround and 2 dwords for MI_BB_END. commit 04dfa492d195e063a07053815ff541b4351b0097 Author: Daniel Vetter Date: Tue May 29 16:52:23 2012 +0200 tests/gem_wait_rendering_timeout: test the timeout case When I've first tried this it somehow failed, but I can't reproduce this any more. I guess I've hunted a ghost. commit b711bfe54f74c6a4337f978e6bef4c47a2f2ea9e Author: Daniel Vetter Date: Tue May 29 16:49:41 2012 +0200 tests/gem_wait_rendering_timeout: fix up the autotuner duuh commit 95877ab9ce137e52128b34acab343273b46404dd Author: Daniel Vetter Date: Tue May 29 16:35:35 2012 +0200 tests/gem_wait_rendering_timout: adjust .gitignore commit 2952feb23f303e0c7afe5ce9c92002abecd7a75f Author: Daniel Vetter Date: Tue May 29 16:35:11 2012 +0200 tests/get_wait_rendering_timeout: fixup the auto-tuner - start at 1 iterations - actually adjust the number of iterations like the comment claims commit cf979c20636814389adcf969c5858a915a97571f Author: Daniel Vetter Date: Tue May 29 16:34:32 2012 +0200 tests/gem_wait_rendering_timeout: some fixes for the blt function - widht/height are in pixel, and the cmd uses 32bit, so we need to adjust this. - we write to the buffer, set the right reloc domain. commit 25bf5574a2252311bf5c0c691e728e8ffd47161e Author: Daniel Vetter Date: Tue May 29 16:23:41 2012 +0200 tests/gem_wait_rendering_timeout: properly skip test also assign the timeout value unconditionally, we want to know it even when we've timeout out. commit f14a045137ea804625439fc7ac3144e46a12d3ae Author: Daniel Vetter Date: Tue May 29 16:14:31 2012 +0200 tests/gem_wait_rendering_timeout: make it compile ... we need to do this libdrm depency dance. Or just copy&paste it. commit 9cfcb75b79829230dc9dde1247a82ffe8b0b9702 Author: Ben Widawsky Date: Fri May 11 13:54:12 2012 -0700 tests/wait render timeout test Assures that signals interrupting the wait works properly. Because of the scheduling around signals, interrupted waits will *seem* faster as the GPU continues to work while all the CPU scheduling stuff happens. Signed-off-by: Ben Widawsky commit c26b5ee72f3a2ac3ddef309e181daab9e5128ae9 Author: Daniel Vetter Date: Fri May 25 11:29:28 2012 +0200 tests: fixup type in module_reload Oops, I've frobbed this to test the check but committed the wrong version. commit 3985d9b976f4daabb9adea38735d9c9b77da7fac Author: root Date: Fri May 25 11:26:53 2012 +0200 tests: add some help to module_reload ... so that it's easier to get the kernel configuration right. commit a628d564709aec0dda98ae71c24bff7cfe9268c0 Author: root Date: Fri May 25 11:02:09 2012 +0200 tests: add module reload testcase We've broken this way too often in the past. commit 2448a75ff6127a03404e659a5e1046236eef41d4 Author: Daniel Vetter Date: Wed May 23 11:37:04 2012 +0200 tests/hangman: fix when run with absolute path QA's test rig does that. commit 96c2fc82ba0be6c0e1ae8f675ccc97714aa08e11 Author: Daniel Vetter Date: Tue May 22 19:54:22 2012 +0200 test/flip_test: fail harder We want testcase to return non-zero if they fail ... commit 17787f30c6f05edb40da1a1fc0074bee2e09e779 Author: Daniel Vetter Date: Tue May 22 16:15:15 2012 +0200 lib: extract kmstest_dump_mode commit b7aa6756ce770f44280e1369dd7fbf9761f3cdb7 Author: Daniel Vetter Date: Tue May 22 16:01:32 2012 +0200 test/flip_test: use kmstest_create_fb And bring back some frame indication that actually works. commit 662d73219976ca820f878f63b5222e22e17c6328 Author: Daniel Vetter Date: Tue May 22 14:37:19 2012 +0200 lib: extract kmstest_create_fb We should get more kms tests soon, and not needing to copy-paste a nice test pattern should be useful. That establishes a firm depency of i-g-t on cairo over everything, but I don't care so much about that. Signed-Off-by: Daniel Vetter commit 0732cc59abc06151b8756a6890f13885cde7403b Author: Daniel Vetter Date: Tue May 22 12:01:36 2012 +0200 tests: use drm_open_any more And fix it up to not leak open fds, which kills all the master only stuff. commit a5e6897d10962e4bdfa657ce704bc111a4a4c663 Author: Daniel Vetter Date: Tue May 22 10:57:17 2012 +0200 tests/flip_test: rip out usage Totally useless if the only option is "-h" commit 1fedd1db41bfe1815654a726480e430591db344d Author: Daniel Vetter Date: Tue May 22 10:53:38 2012 +0200 tests: add flip_test to .gitignore commit 9e620146f704549c7203632f63571d22a9551de3 Author: Daniel Vetter Date: Tue May 22 10:51:29 2012 +0200 tests/flip_test: rip out funny pictures The path isn't properly autodetected and it yells stupid stuff into stderr. Which causes spurious failures. And really, these are automated tests. If you need to look at the output, something is wrong. Signed-off-by: Daniel Vetter commit 984e44f88bad9b39bd5bb9c449f6bfb0580660ae Author: Paulo Zanoni Date: Fri Apr 27 16:14:34 2012 -0300 intel_infoframes: options -p and -P require an argument Signed-off-by: Paulo Zanoni commit e6b264cce7799d822bc8a1b0e493cf5dee112f85 Author: Eugeni Dodonov Date: Wed May 16 10:14:55 2012 -0300 intel_gpu_top: allow to work on Gen7 Somehow nobody noticed this before, but we were missing blt and bsd6 initialization on Gen7. Reported-by: Philippe Lecluse Signed-off-by: Eugeni Dodonov commit 544e35785198045d76d8f11ee414c7f1661ffc77 Author: Daniel Vetter Date: Thu May 10 20:25:33 2012 +0200 tests/gtt_speed: try to outwit gcc It optimized away the read loops ;-) Also fix up the size to not be 1/4th of the one we want for tiled buffer tests. Signed-Off-by: Daniel Vetter commit 78c38dcddb79052a964081c470bb2641fb3daf95 Author: Chris Wilson Date: Wed May 9 14:06:28 2012 +0100 tests/gem_tiled_pread_pwrite fix progname for pretty print progress Signed-off-by: Chris Wilson commit 412e7b341f40a2d21067c7059a64e500945d6433 Author: Chris Wilson Date: Wed May 9 13:50:53 2012 +0100 intel_error_decode: Be more lax for whitespace around parsing PCI-ID Signed-off-by: Chris Wilson commit 3986d9faf343639dc9ceec23e880a99f4fcea365 Author: Eugeni Dodonov Date: Tue May 8 15:55:05 2012 -0300 tools: add Haswell registers into intel_reg_dumper For now, only print their content for diffing, but also add the necessary bits that can be used for more verbose output in the fugure. Signed-off-by: Eugeni Dodonov Signed-off-by: Daniel Vetter commit e70b7de8cea142a7aa2b4c08cdbd7484d7b39e14 Author: Jesse Barnes Date: Mon May 7 12:57:05 2012 -0700 tests/flip_test: test on each CRTC for each detected output This allows us to test on 3 pipe configs for example. commit 362599ac1042eeca52ebbfca646a975a989ff38f Author: Jesse Barnes Date: Mon May 7 12:36:28 2012 -0700 tests: add simple flip test Add a simple flip test to test flipping on a single output with the preferred mode. TODO: test each crtc for 3s and print pass/fail results commit c6f42f4cca10cb644c7f91d1fd3e625dba505eb0 Author: Ben Widawsky Date: Sat Apr 28 20:10:09 2012 -0700 intel_infoframe: fix assertion off by 1 this makes my compiler very unhappy Signed-off-by: Ben Widawsky commit 43fda53199afba7788549d4d290bb0874459fa2d Author: Ben Widawsky Date: Sat Apr 28 20:07:40 2012 -0700 chipset: accidentally left the old IS_GEN7 macro Signed-off-by: Ben Widawsky commit 97198ccbe1546e0249c3a7885d778e46cb538877 Author: Daniel Vetter Date: Fri Apr 27 14:08:34 2012 +0200 test/ZZ_hangman: adjust to new error_state reset semantics Signed-Off-by: Daniel Vetter commit 9898083fa2841a73227515cbe2659c99f353db95 Author: Paulo Zanoni Date: Tue Apr 24 18:10:25 2012 -0300 intel_infoframes: add support for Gen 4 Signed-off-by: Paulo Zanoni Signed-off-by: Daniel Vetter commit 0611af4a33e443767ce2bdadac08f6f0680dbb9e Author: Paulo Zanoni Date: Tue Apr 24 18:10:24 2012 -0300 intel_infoframes: AVI InfoFrame version should be 2 Signed-off-by: Paulo Zanoni Signed-off-by: Daniel Vetter commit 4d053f97db7759c51c2299b401e166b09efad87e Author: Ben Widawsky Date: Wed Apr 25 13:33:17 2012 -0700 chipset updates Signed-off-by: Ben Widawsky commit bb40c7e8df2183449e6e252556b9c176d516caeb Author: Daniel Vetter Date: Wed Apr 25 13:21:38 2012 +0200 test: fix up hangman script and enable by default Signed-Off-by: Daniel Vetter commit cf72da57dcc1baeaaff71250a82b40ab324b7590 Author: Daniel Vetter Date: Sun Apr 22 12:35:23 2012 +0200 tests: add gem_unfence_active_buffers Unfortunately this requires slab poisoning to catch anything :( Also add a new helper to drmtest to get the available fence count. Signed-off-by: Daniel Vetter commit 19a28d06ad6555ae36797f64e3705d373822faf7 Author: Chris Wilson Date: Thu Apr 19 14:11:51 2012 +0100 lib: Fix render copy on gen2 commit 7e9676143cd5c7e44b310fa3bce8da5d1cdf21e8 Author: Daniel Vetter Date: Thu Apr 19 12:34:16 2012 +0200 tests/gem_ringfill: add progress indicator This thing takes ages on older chips. Signed-Off-by: Daniel Vetter commit 127d76d51c00fa1693053d126f8045b1efa7f07a Author: Daniel Vetter Date: Tue Apr 17 22:38:44 2012 +0200 tests: re-enable commented-out testcase Meh, I suck. Signed-Off-by: Daniel Vetter commit 16bc61993915ab39136407d82e3468d8840b6a28 Author: Daniel Vetter Date: Tue Apr 17 22:02:33 2012 +0200 tests: add gem_set_tiling_vs_pwrite Signed-off-by: Daniel Vetter commit 2f4bc72da76afac4dc708a0c70ca9e32522b1f83 Author: Daniel Vetter Date: Tue Apr 17 18:01:48 2012 +0200 tests/gem_set_tiling_vs_gtt: update copyright header Meh, I've forgotten these. Signed-Off-by: Daniel Vetter commit ff6abb313d975850c0f333f308d6c09e636cd907 Author: Daniel Vetter Date: Tue Apr 17 17:25:24 2012 +0200 tests: add gem_set_tiling_vs_gtt Signed-off-by: Daniel Vetter commit 48ec7f9edd7a1bfe01a158a2a3ba85667f29030f Author: Daniel Vetter Date: Tue Apr 17 13:25:04 2012 +0200 tests/gem_set_tiling_vs_blt: fix on gen4+ Oops, the new checks need correctly tiled blts to work. Signed-Off-by: Daniel Vetter commit b38188ad97571f9145407e9bf3bd6a32a51ce87d Author: Daniel Vetter Date: Sun Apr 15 23:59:12 2012 +0200 tests: rename gem_tiled_after_untiled_blt into gem_set_tiling_vs_blt ... it checks much more now. Also update the comments a bit in the testcase. Signed-off-by: Daniel Vetter commit 887e4a58b9b697e7c8545123008a350864311c2c Author: Daniel Vetter Date: Sun Apr 15 23:40:20 2012 +0200 tests: pimp tiled_after_untiled_blt Now with more tiling transition tests. Changes: - refactoring to reuse the tiling transition functions. - add a tiled->untiled transition - add a tiled->tiled transition with different stride - add a check at the end to ensure that the tiling has indeed changed on the test_bo Signed-Off-by: Daniel Vetter commit fd585207961f9916e1603852a703d6c656604656 Author: Paulo Zanoni Date: Fri Apr 13 10:27:01 2012 -0300 Add tools/intel_infoframes This is a command-line tool that allows us to display and modify the InfoFrames we send. v2: use argv instead of stdin Signed-off-by: Paulo Zanoni Signed-off-by: Daniel Vetter commit de9d98bb6e8736907458a28921aee5fcc507ca6d Author: Daniel Vetter Date: Thu Apr 12 23:12:24 2012 +0200 tests: skip rc6_residency test if not supported Fixes spurious failures. Signed-Off-by: Daniel Vetter commit 5ce86f88a0a9b24564a6349a70de5797b814b108 Author: Chris Wilson Date: Thu Apr 12 15:47:00 2012 +0100 Use mmap64() for performing the GTT mapping Although the address space for GTT mappings may only be 32-bits, we need to use the explicit 64-bit mmap interface so that on a 32-bit platform the offset we pass is not truncated to 31-bits. Fixes gem_mmap_offset_exhaustion on 32-bit platforms. Signed-off-by: Chris Wilson commit 8f6ebd4ac03f7c3c751d4d6bb4096d0285e34517 Author: Daniel Vetter Date: Wed Apr 11 15:28:26 2012 +0200 tests: add gem_gtt_concurrent_blit Same test as Chris Wilson's gem_cpu_concurrent_blit, but for gtt mmaps. Signed-off-by: Daniel Vetter commit 0448eefeb2f6971f9f74fb83972fa327d3255415 Author: Daniel Vetter Date: Wed Apr 11 15:02:32 2012 +0200 tests: add sysfs_rc6_residency to .gitignore commit ee014dbb8d98ada16a4829ff9878af6d4a06dcad Author: Daniel Vetter Date: Wed Apr 11 14:55:30 2012 +0200 tests/sysfs_rc6_residency: add some sleep before testing That way I can run i-g-t on my ivb without spurious failures. Signed-Off-by: Daniel Vetter commit f841f4028ca37c3e4b49240b7f999dd07709724c Author: Ben Widawsky Date: Sat Mar 24 19:04:10 2012 -0700 tests: rc6 residency test This is meant to test the sysfs entry for showing rc6 residency in milliseconds. Remember, sysfs is a permanent interface. v2: use new get_card interface to try "all" devices check rc6p and rc6pp in addition to rc6 v3: rename rc6_residency.c to sysfs_rc6_residency.c print better error messages skip test if rc6 isn't enabled v4: update to new sysfs names Acked-by: Daniel Vetter Signed-off-by: Ben Widawsky commit 2585bea428801c5542bc62d75d0d5c1ee71ff739 Author: Ben Widawsky Date: Sun Mar 25 16:04:07 2012 -0700 drm/i915: extract card getting Signed-off-by: Ben Widawsky commit 8af53e0b7e2f99ead129822f3761c618f775f7e2 Author: Ben Widawsky Date: Sat Mar 24 19:03:38 2012 -0700 build: make sure we have asprintf Signed-off-by: Ben Widawsky commit b78243fc61bd46624931f149d00e4a78242e9c92 Author: Chris Wilson Date: Tue Apr 10 19:41:43 2012 +0100 test/gem_cpu_concurrent_blit: Limit memory usage to half aperture So that we don't cause needless thrashing on older devices and spoil the test. commit da026d8bfef1a76a60ae4a46a738ce153e9fe0b7 Author: Chris Wilson Date: Tue Apr 10 18:21:33 2012 +0100 test: Exercise concurrent GPU read/write with CPU domain access Designed to exercise this patch to i915.ko: diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index fbf1118..57ae1f2 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -3181,9 +3181,11 @@ i915_gem_object_set_to_cpu_domain(struct drm_i915_gem_obj if (ret) return ret; - ret = i915_gem_object_wait_rendering(obj); - if (ret) - return ret; + if (write || obj->pending_gpu_write) { + ret = i915_gem_object_wait_rendering(obj); + if (ret) + return ret; + } i915_gem_object_flush_gtt_write_domain(obj); By exercising the conditions whereby should either of the checks be missed an error is detected. commit 7601fafbcffe1c6da5351682bd6febe5fa248f16 Author: Daniel Vetter Date: Tue Apr 10 16:23:18 2012 +0200 tests: explicit use bash We use bashisms, which debian's default sh dash doesn't like. Signed-Off-by: Daniel Vetter commit af275bd52197cb41e6beb83dc496a50666b48814 Author: Ben Widawsky Date: Tue Apr 3 23:02:59 2012 -0700 tests: add wedging tests Used to check that i915_error_state works. Unfortunately this kills the gpu because wedging is permanent. Base on a patch by Ben Widawsky. Signed-off-by: Daniel Vetter commit bb86947638b7471c4e3da5dd32b756b0c7d504ae Author: Daniel Vetter Date: Wed Apr 4 11:07:44 2012 +0200 tests: fixup drm_lib.sh sourcing Signed-off-by: Daniel Vetter commit e63f1870b47073852c82f02e29b57dbb66b72d0d Author: Daniel Vetter Date: Wed Apr 4 10:56:50 2012 +0200 tests: use / as path separator instead of _ Oops. Originally by me, noticed while reviewing Ben Widawsky's patch. Signed-Off-by: Daniel Vetter commit 888df75a0cc3e6eea485ae3189afde2d86486750 Author: Ben Widawsky Date: Tue Apr 3 23:02:58 2012 -0700 tests: use common code for scripts This removes cut and pasted code and uses a more central source. Signed-off-by: Ben Widawsky Signed-off-by: Daniel Vetter commit b7bd1837ccc980666f5502fbd428d3a4be3cd26f Author: Chris Wilson Date: Thu Mar 29 12:45:59 2012 +0100 Make the assertions guarding syscalls (drmIoctl in particular) verbose Currently all we see is gem_read: ret == 0 failed, where it would help to see the errno and/or the ret. Signed-off-by: Chris Wilson commit 9dbce0991f4eb353ab892c88299bbebf2cb1a285 Author: Daniel Vetter Date: Sat Mar 24 19:30:29 2012 +0100 tests: use gem_create and gem_close more Signed-Off-by: Daniel Vetter commit ff93f351512a194dd3d32e643c7987b5fe2347a5 Author: Daniel Vetter Date: Sat Mar 24 19:22:21 2012 +0100 tests/gem_fence_thrash: make some good use of drmtest helpers Signed-Off-by: Daniel Vetter commit 11fa35850306172b0e2285a919172c02671dd815 Author: Daniel Vetter Date: Sat Mar 24 19:17:43 2012 +0100 tests/gem_exec_faulting_reloc: kill superflous mmap_bo Signed-Off-by: Daniel Vetter commit c34e48119939fa30809a58a9991ae18539824892 Author: Daniel Vetter Date: Fri Mar 23 19:28:08 2012 +0100 tests: add gem_tiled_after_untiled_blt Signed-Off-by: Daniel Vetter commit afbdc7af8d9324ae065c47d6122bb020c579fd0a Author: Daniel Vetter Date: Thu Mar 22 13:47:57 2012 +0100 tests: adapt storedw tests to ppgtt MI_MEM_VIRTUAL actually means use global gtt now, not setting the bit means use ppgtt. On previous gens, not setting the bits ment 'use physical memory'. So what, the usual confusion. Note that for some odd reasong this is broken on gen6, but only on the bsd ring. Unexpected. Signed-Off-by: Daniel Vetter commit 9e531888ed0c3e34303a67e324ea4ab29057c62b Author: Daniel Vetter Date: Thu Mar 22 12:27:43 2012 +0100 tests: don't just bail out when there's not enough RAM ... but actually run the test with reduced memory requirements, as the messages claims. Additional print it to stdout, stderr seems to imply FAIL in our QA's testing rig. Signed-off-by: Daniel Vetter commit 16c4f52782e0df88f818dadd4586ea99ccf992d5 Author: Daniel Vetter Date: Tue Mar 20 14:24:14 2012 +0100 tests: add gem_mmap_offset_exhaustion This also adds a gem_madvise helper to lib/drmtest.c Signed-off-by: Daniel Vetter commit c4ae3bc41204c83a89369af91217daa33fff9675 Author: Daniel Vetter Date: Tue Mar 20 14:25:56 2012 +0100 update .gitingore commit f4908880f3b91caab1fffbbd17c3e0bc432f71d1 Author: Daniel Vetter Date: Tue Mar 20 14:03:18 2012 +0100 intel_sprite_on: kill overtly verbose and totally content-free comments /me just hates fluff Signed-off-by: Daniel Vetter commit 42b20d4ab97363f18c7c05cf69fe9b06ddead27f Author: Daniel Vetter Date: Tue Mar 20 14:00:55 2012 +0100 intel_sprite_on: remove copy&pasted gem functions Can we just please stop this? Signed-off-by: Daniel Vetter commit 3928569eede8ca5f2e9ee1fa4e7fb9989956b2a9 Author: Chris Wilson Date: Mon Mar 19 14:25:13 2012 +0000 intel_gpu_top: Trust the register access is safe Fixes intel_gpu_top on gen3 which otherwise refuses to do mmio. Signed-off-by: Chris Wilson commit bf6c480d6ddc157713f839af314ea4892bf8f867 Author: Chris Wilson Date: Mon Mar 19 14:24:22 2012 +0000 decode: Use the correct start mask for gen3 fence registers A cut'n'paste error from gen2 apparently. Signed-off-by: Chris Wilson commit d364c280892af29956ad7032b0d242b7d24d7846 Author: Chris Wilson Date: Wed Mar 14 10:59:51 2012 +0000 configure: Add AC_SYS_LARGEFILE for mmap64 support on 64-bit Without enabling largefile support the prototype for mmap64() is broken on Linux/x86_64 with the result being a 32-bit integer sign-extended to fill a 64-bit pointer. Hilarity ensues. commit be7ca950d7d4d18744a76abab091eb032835fb82 Author: Eugeni Dodonov Date: Tue Feb 28 17:40:32 2012 -0300 intel_reg_read: add a flag to simplify bit decoding This allows to specify '-d' parameter which will decode individual bits in each register being read. The register bits are printed horizontally for space reasons. This requires more than 80x25 terminal to see them all. An alternative solution would be to print them vertically, but this will become much more difficult to read when printing multiple registers at the same time. v2: fix spacing to get us a bit closer to the code nirvana. Signed-off-by: Eugeni Dodonov commit 8d4545642835cb66f84739b9384f31920feacdba Author: Eugeni Dodonov Date: Tue Feb 28 17:33:54 2012 -0300 intel_reg_read: support reading multiple registers The registers must be passed on the command line and will be read sequentially, one at a time. Signed-off-by: Eugeni Dodonov commit b7464e4032a181fc743fe531c6ea271c099b9a74 Author: Eugeni Dodonov Date: Tue Feb 28 17:20:35 2012 -0300 intel_reg_read: add support for getopt This will allow us to pass more options to it in the future. v2: fix whitespacing issues and improve scary warning text as suggested by Paul Menzel. Reviewed-by: Paul Menzel Signed-off-by: Eugeni Dodonov commit 628ad0c91bad85f48a34ae7cefd53e686f99a3a8 Author: Daniel Vetter Date: Wed Feb 29 20:22:45 2012 +0100 tests: some more tuning on the tiled partial pwrite/pread test ... 8 pages is just not enough to somewhat reliably get one page that needs bit17 swizzling. Signed-Off-by: Daniel Vetter commit dac239e2b694f5f187ae0af9aeb339e3b57a51a1 Author: Daniel Vetter Date: Wed Feb 29 17:36:04 2012 +0100 tests/gem_tiled_partial_pread/write: fixes Astonishing how dense I sometimes am ... - increase the bo size so that we don't have any round-up to next tile size areas (which the 2d blit go over, but the 1d pread/pwrite calls will notice). - correctly set tiling bits when copying back to a linear buffer. - read back through a tiled bo to avoid messing with swizzling. Signed-Off-by: Daniel Vetter commit f1d32d541dc8328a0f55224915906f23b58062a0 Author: Daniel Vetter Date: Wed Feb 29 15:57:30 2012 +0100 tests: add tiled partial pwrite/pread test And indeed, this blows up. Signed-off-by: Daniel Vetter commit a50550f22341aa4ee17110ecc68953829ba0153e Author: Chris Wilson Date: Tue Feb 28 09:31:17 2012 +0000 lib: Downgrade error for unknown 'swap' not 'ram' Oops, my mistake for copying a compile fix from another machine... If we can't detect how much RAM we have, 0 is not a suitable default, so keep the error for the time being and only downgrade the error for unknown swap. Signed-off-by: Chris Wilson commit 2035119201b4c63fe84d3883ae1b1c058bcc862c Author: Chris Wilson Date: Tue Feb 28 09:29:11 2012 +0000 lib: Downgrade error for failing to determine swap interface to a warning If we can't detect how much swap is available, presume none. Signed-off-by: Chris Wilson commit 1e74007b4c7c05f0b157b16acc2b9605002fe2ba Author: Jesse Barnes Date: Mon Feb 27 12:50:50 2012 -0800 testdisplay: remove unnecessary passing of width, height, stride, depth These are globals, no need to shadow them everywhere. commit ea4163395e95951bd73b14316a0b28eac0475aaa Author: Jesse Barnes Date: Mon Feb 27 12:46:11 2012 -0800 testdisplay: remove plane test support This is better done in intel_sprite_on and was broken anyway. commit 488daaa40bdf45f4cdcc9f516148dc1fd3b6a0bd Author: Daniel Vetter Date: Wed Feb 22 10:58:39 2012 +0100 demos/intel_sprite_on: build warning fixes ... from Armin Reese. Signed-Off-by: Daniel Vetter commit ace4a6e0e99841aec7199fe00795ddb35dfb24d1 Author: Daniel Vetter Date: Wed Feb 22 10:50:52 2012 +0100 tests/gem_ringfill: shut up the compiler Double-include ftl and local variable shadowing. While fixing the later I've noticed that we mix up width and height in the blt copy function. Signed-Off-by: Daniel Vetter commit fa6c2757feb18b17120310fe315ed32594ff326c Author: Chris Wilson Date: Mon Feb 20 22:53:26 2012 +0000 tests/gem_ringfill: Exercise all rings On SandyBridge, the BLT commands were split from the RENDER commands as well as the BSD split inherited from Ironlake. So we need to make sure we do exercise each ring, and in order to do so we also need to make sure each batch takes longer to execute than it takes for us to submit it. v2: Exercise each ring sequentially. Signed-off-by: Chris Wilson commit 5cf555868214ac6d55d8102d3198813aadc37853 Author: Eric Anholt Date: Mon Feb 20 10:04:02 2012 -0800 gem_ringfill: Make this actually test that all the batches executed. I was looking into some strange behavior in Mesa that looks like batches maybe being skipped, but this test didn't catch it. commit 732547793f22c873e3bc68c9c164937cb2ec2da9 Author: Eric Anholt Date: Mon Feb 20 10:04:01 2012 -0800 intel_reg_dumper: Add dumping of GPU turbo regs. I was interested in finding why my IVB system is not getting GPU turbo after suspend/resume. The piece that looks weird to me is that INTERRUPT_THRESHOLD is sitting at 0, whereas pre-suspend it's 0x12000000. commit 6624325f13e48e13f3c6d95f374437b151afbe12 Author: Eric Anholt Date: Mon Feb 20 10:04:00 2012 -0800 reg_dumper: Refactor duplicated reg-dumping code. commit 3e0bd266d29c74fb4e5d19d24e8c9853c0da90eb Author: Eric Anholt Date: Mon Feb 20 10:03:58 2012 -0800 instdone: Fix fallthroughs to invalid instdone bits on newer hardware. commit 4fc909fd4881eec38d46be5db9e023e07d53c33c Author: Eric Anholt Date: Mon Feb 20 10:03:59 2012 -0800 instdone: Add support for one of the IVB instdone regs. [danvet: added GAM and GAFM bits.] commit 8bedcae848332e9dd3425765682a7f71eb1339f0 Author: Daniel Vetter Date: Thu Feb 16 12:26:23 2012 +0100 tests/intel_reg_dumper: s/pipe/disp_pipe/ to shut off the compiler Signed-Off-by: Daniel Vetter commit 3b65f179f2acbf8f2c4372f1cea14069b0d3375c Author: Paulo Zanoni Date: Wed Feb 15 16:04:28 2012 -0200 Add intel_panel_fitter tool The tool allows you to change the panel fitter settings, so you can change the size of the screen being displayed on your monitor without changing the real pixel size of your desktop. The biggest use case for this tool is to work around overscan done by TVs and some monitors in interlaced mode. v2: reviews by Ben, Chris and Rodrigo - don't install - use intel_register_access_init - check for maximum X and Y values - add a disclaimer saying this is not the real solution - print less when pf is disabled and option '-l' is used Signed-off-by: Paulo Zanoni Signed-off-by: Daniel Vetter commit ecad594e0254648a3bf2d995569afd18dbb75ec2 Author: Paulo Zanoni Date: Wed Feb 15 16:04:00 2012 -0200 reg_dumper: change and fix behavior when using dump files Before this patch, handling dump files was wrong: - when HAS_PCH_SPLIT was specified, intel_reg_dumper segfaulted inside intel_check_pch() - the "devid" variable was used but not set - there was no way to specify the device id of the machine used to generate the dump file This patch fixes this behavior with the following changes: - the HAS_PCH_SPLIT variable is gone - there is now a '-d' argument that can be used to specify the device id used to interpret the results - when a dump file is used but the '-d' argument is not provided, an Ironlake machine is assumed Signed-off-by: Paulo Zanoni Signed-off-by: Daniel Vetter commit ad87b06fd6a5af4836562c1d318ca06a918d5466 Author: Paulo Zanoni Date: Wed Feb 15 16:03:09 2012 -0200 reg_dumper: add interlaced information to TRANSCONF Signed-off-by: Paulo Zanoni Signed-off-by: Daniel Vetter commit 3310db08d874d696241b84aceb9380e8e17d6e9e Author: Paulo Zanoni Date: Wed Feb 15 16:02:27 2012 -0200 reg_dumper: add interlaced and rotation information to PIPECONF Signed-off-by: Paulo Zanoni Signed-off-by: Daniel Vetter commit 27d1cef2d32cf1ef6904e672152364240d634ef8 Author: Daniel Vetter Date: Wed Feb 15 17:50:57 2012 +0100 tests: fixup storedw tests We need to use _INSTRUCTION as the reloc domain because otherwise the ppgtt pipe_control w/a for snb won't kick in and the test fails. The storedw tests for blt and bsd are still disabled because the corresponding patch to flag ppgtt support isn't merged upstream yet. Without ppgtt these hang my snb here. Signed-Off-by: Daniel Vetter commit 1d16f7934df06d4b4feee083096575ef0c4f2340 Author: Daniel Vetter Date: Wed Feb 15 17:43:38 2012 +0100 test/gem_tiled_pread_pwrite: add progress indicator Signed-Off-by: Daniel Vetter commit 24c8d2f112853a41cd9d5077c86e41ed62663a09 Author: Daniel Vetter Date: Sun Feb 12 12:14:27 2012 +0100 remove old .c files Oopps, I've forgotten about this in commit 9b32894937af27f9ba95ea572ac857d376fe9034 Author: Daniel Vetter Date: Sat Feb 11 16:52:26 2012 +0100 prepend 'intel_' to installed programms Signed-Off-by: Daniel Vetter commit e1ddd1c8e0ec947906b528315cdc7b9f64ae3d9b Author: Daniel Vetter Date: Sat Feb 11 16:54:58 2012 +0100 lib/drmtest: fixup copy&paste printf format issue Signed-Off-by: Daniel Vetter commit 9b32894937af27f9ba95ea572ac857d376fe9034 Author: Daniel Vetter Date: Sat Feb 11 16:52:26 2012 +0100 prepend 'intel_' to installed programms Signed-off-by: Daniel Vetter commit 6cfd16648d8d229c4ab474e4beff1cc131287238 Author: Kenneth Graunke Date: Fri Feb 10 22:19:16 2012 -0800 Remove pointless Android ifdefs for sys/fcntl.h. On my system, sys/fcntl.h contains exactly one line: #include So there's really no need to #ifdef it. Also, intel_mmio.c already included ; there's no need to include it twice. Signed-off-by: Kenneth Graunke Signed-off-by: Daniel Vetter commit b39a74ba4ef36889465b03c93d3d4940b21af465 Author: Sateesh Kavuri Date: Mon Feb 6 15:37:04 2012 +0530 Added support for Android Added the Android.mk file as per Android make system. Also had to modify the headers with the proper location for fcntl.h as per the Android bionic headers location Signed-off-by: Sateesh Kavuri Signed-off-by: Daniel Vetter commit 2065ca15fb5a5a5c4079f6c0cb6361a4052e4fdb Author: Daniel Vetter Date: Thu Feb 9 22:39:50 2012 +0100 Release 1.2 commit 06bfa3d3870521a595beb280f5f91c07422f189e Author: Daniel Vetter Date: Thu Feb 9 22:32:54 2012 +0100 lib/rendercopy: fixup make distcheck And complete the gem_stress->rendercopy rename that I've forgotten about. Signed-off-by: Daniel Vetter commit 042f40eda776aec56c4d39d4e47033117a85415e Author: Alan Coopersmith Date: Wed Feb 8 17:04:45 2012 -0800 Fix program name in intel_bios_dumper.man SYNOPSIS Signed-off-by: Alan Coopersmith commit 90a6f75dd284e4527e6583a519da5b634f8b469d Author: Kenneth Graunke Date: Wed Feb 8 12:05:05 2012 -0800 Update generation checks to provide basic support for Ivybridge. There may be some updates required, but assuming Ivybridge is similar to Sandybridge is a decent start; previously it fell through to the Gen2/3 case and nothing worked. Signed-off-by: Kenneth Graunke Reviewed-by: Ben Widawsky Signed-off-by: Daniel Vetter commit 6fe3884bc97b7c9ad5cdcbc9144cb7319341eb75 Author: Daniel Vetter Date: Wed Feb 8 16:46:57 2012 +0100 add sprite demo from Armin Reese Also fixed up the copyright header a bit. No comments on the coding styled used ;-) Signed-off-by: Daniel Vetter commit e61b917134527500c08900f5f71d996a9cbc5735 Author: Alan Coopersmith Date: Sat Feb 4 09:05:08 2012 -0800 Move free(cmd) to after last use of cmd in intel_gpu_top Error: Use after free (CWE 416) Use after free of pointer 'cmd' in call to fprintf at line 496 of tools/intel_gpu_top.c in function 'main'. Previously freed at line 491 with free. [ This bug was found by the Parfait 0.4.2 bug checking tool. For more information see http://labs.oracle.com/projects/parfait/ ] Signed-off-by: Alan Coopersmith Signed-off-by: Daniel Vetter commit 3d46ca8c4d43adfd9827b4b21648a4fddd03c254 Author: Yi Sun Date: Fri Feb 3 22:45:39 2012 +0800 tests/testdisplay.c: rewite function dump_connectors and dump_crtcs. Replace the globe variable drm_fd with local variable passed from parameter. Signed-off-by: Yi Sun [danvet: fixup whitespace] Signed-off-by: Daniel Vetter commit 4cceae74e3f18b78db5049edb0fc3d6d89b66275 Author: Yi Sun Date: Fri Feb 3 19:23:55 2012 +0800 tests/testdisplay.c: Fix the black screen issue while force mode. Replace the 8 globe force mode variables with a struct drmModeInfo variable. Next step, we could reduce the number of globe veriables, to be convenient to call the functions. Signed-off-by: Yi Sun Signed-off-by: Daniel Vetter commit 36a40a5423247651bb51d8ad9bfdd0528cd79634 Author: Daniel Vetter Date: Tue Jan 31 13:52:59 2012 +0100 gem_partial_pwrite_pread: add progress indicator Without optimized pread/pwrite this test takes forever. Signed-Off-by: Daniel Vetter commit 611e0cb333b9c0c55985b5d40d7c0c76e15b343b Author: Daniel Vetter Date: Fri Jan 27 18:50:21 2012 +0100 intel_reg_dumper: add TRANS_VSYNCSHIFT Signed-Off-by: Daniel Vetter commit 6b6b13906a22d7d1f0205a6a44b6c760b4c3fe97 Author: Ben Widawsky Date: Wed Jan 25 21:05:15 2012 -0800 intel_reg_write: use register access init/fini This will do the proper forcewake stuff. Signed-off-by: Ben Widawsky commit 6e3066c9c3c4443cf63e0efbb3d9d0906d58b5b4 Author: Ben Widawsky Date: Wed Jan 25 21:05:15 2012 -0800 intel_reg_read: use register access init/fini This will do the proper forcewake stuff. Signed-off-by: Ben Widawsky commit 4c20525b7f50fa0c0bb5579d49f7bc4907698da0 Author: Ben Widawsky Date: Wed Jan 25 21:04:16 2012 -0800 mmio: refactor reg init/fini Rearrange register access init and fini so that we properly accomodate platforms without forcewake. Signed-off-by: Ben Widawsky commit 802bd74c5f9526faccfdf168b06c0c2c44237840 Author: Ben Widawsky Date: Sun Jan 15 13:41:42 2012 -0800 i-g-t: silence -Winline In this case, the code already has a comment about the problem. We don't need to flood the build with this less than useful message. Signed-off-by: Ben Widawsky commit 1ffe6b0ee8decc02edb48ab197a869e1d7783a2b Author: Chris Wilson Date: Wed Jan 25 10:11:49 2012 +0000 intel_bios_reader: Sanitize input to ensure all data blocks are within bounds Running intel_bios_reader upon itself causes the reader to crash and burn. It obviously finds a VBT signature inside the binary, but then does not rigorously check that all data blocks are valid before dereferencing them. Reported-by: Emanuel Bronshtein Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=45205 Signed-off-by: Chris Wilson commit 93a65895bb775932b02a3de692a1262ef7fafdbc Author: Daniel Vetter Date: Tue Jan 24 23:18:21 2012 +0100 drmtest: add progress indicator Some test that trash the aperture necessarily need to take forever, so add a little progress indicator to keep worried minds at peace. Signed-Off-by: Daniel Vetter commit 7492f97cde0a0b86b307637858c1d5efbadd2d06 Author: Daniel Vetter Date: Tue Jan 24 18:05:11 2012 +0100 tests: add gem_cs_prefetch Tested-by: Chris Wilson Signed-off-by: Daniel Vetter commit ca10c7231da5fe00be52c6d5be2d053637c07467 Author: Daniel Vetter Date: Tue Jan 24 21:41:17 2012 +0100 intel_error_decode: fixup glibc free warning Usually some random stack garbage doesn't equal some other random stack garbage, leading to the filename != path check succeeding. Signed-off-by: Daniel Vetter commit fbae13899013491fa78499ba27641c2fadef1fb0 Author: Alan Coopersmith Date: Mon Jan 23 20:13:49 2012 -0800 Add Solaris implementation of intel_get_total_swap_mb() Signed-off-by: Alan Coopersmith Signed-off-by: Daniel Vetter commit 5c4e041dc8bea5cc32e37ab8fce09ac7f4ede135 Author: Alan Coopersmith Date: Mon Jan 23 20:13:48 2012 -0800 Make benchmarks also link against libpciaccess Fixes Solaris build error on build of intel_upload_blit_large: Undefined first referenced symbol in file pci_device_probe ../lib/.libs/libintel_tools.a(intel_pci.o) (symbol belongs to implicit dependency libpciaccess.so.0) pci_system_init ../lib/.libs/libintel_tools.a(intel_pci.o) (symbol belongs to implicit dependency libpciaccess.so.0) pci_device_find_by_slot ../lib/.libs/libintel_tools.a(intel_pci.o) (symbol belongs to implicit dependency libpciaccess.so.0) ld: fatal: symbol referencing errors. No output written to intel_upload_blit_large Signed-off-by: Alan Coopersmith Signed-off-by: Daniel Vetter commit fa461203e6df7318d49d183366769e392e6decf0 Author: Daniel Vetter Date: Tue Jan 24 11:28:25 2012 +0100 testdisplay: make udev optional Hopefully this makes Solaris happy. Signed-Off-by: Daniel Vetter commit 7f7cafe7293570d56607b101cac7db617741713d Author: Daniel Vetter Date: Tue Jan 24 10:50:05 2012 +0100 testdisplay: extract hotplug code Signed-Off-by: Daniel Vetter commit 137f4d467e93eb1a91487f7be8b7a6e62e2bce2d Author: Daniel Vetter Date: Tue Jan 24 09:37:51 2012 +0100 lib: forcewake is gen6+ Signed-Off-by: Daniel Vetter commit 8d4d8b00ed92287cee81448ad886d8e9a4602f7b Author: Daniel Vetter Date: Mon Jan 23 17:18:53 2012 +0100 tests/gem_tiled_swapping: be more conservative with the swap requirements Blew up and angered the OOM killer on one of my machines. Signed-Off-by: Daniel Vetter commit 98129fa2ff2c095d13cb0f60499c2de129d36d6c Author: Daniel Vetter Date: Sun Jan 22 21:58:27 2012 +0100 tests: add gem_tiled_swapping Also add a drmtest_exchange_int helper, might come handy at other places. Signed-off-by: Daniel Vetter commit fbfe374b280be9542f7ddb59c41c6096f4d773fa Author: Daniel Vetter Date: Sun Jan 22 20:09:54 2012 +0100 lib: extract drmtest_permute_array Lots of tests need to create havoc to LRUs in the kernel or otherwise need to shuffle things around a bit. So make a small array permutation function available. Signed-Off-by: Daniel Vetter commit 1a9fa8fd12c78236b1eb4a83062cd8f732c7abb3 Author: Daniel Vetter Date: Sun Jan 22 19:24:48 2012 +0100 lib: add intel_get_total_swap_mb Test that try to exercise the swap paths need to check whether swap is available, otherwise they'll just oom. Signed-Off-by: Daniel Vetter commit 7132d0f977d226969b47edafbed74a6de04465f9 Author: Daniel Vetter Date: Sun Jan 22 19:14:25 2012 +0100 Revert "tests/gem_tiled_pread_pwrite: actually try to use more than total ram" This test is actually not really designed to test swap. This reverts commit 6d755c39d38e9f0e5a991933cc82e015d1ccd272. Signed-Off-by: Daniel Vetter commit 6d755c39d38e9f0e5a991933cc82e015d1ccd272 Author: Daniel Vetter Date: Sun Jan 22 18:04:24 2012 +0100 tests/gem_tiled_pread_pwrite: actually try to use more than total ram Luckily there's usually enough other stuff around to waste the last few mb ... Signed-Off-by: Daniel Vetter commit e64abe581a34bf12d3a91c13970100a16f709783 Author: Wu Fengguang Date: Tue Jan 17 07:19:24 2012 +0800 intel_audio_dump: show more AUD_CONFIG bits Signed-off-by: Wu Fengguang Reviewed-by: Eugeni Dodonov Signed-off-by: Daniel Vetter commit 3beea0bd0c3ead3cb87ca6fc0b17b887d187d002 Author: Wu Fengguang Date: Tue Jan 17 07:18:08 2012 +0800 intel_audio_dump: fix missing Audio DIP tabs This makes the SNB/IVY Audio DIP values aligned with others. Signed-off-by: Wu Fengguang Reviewed-by: Eugeni Dodonov Signed-off-by: Daniel Vetter commit 08ccec1ec77a92ec1aa766c8571a0a7a2e6541f8 Author: Daniel Vetter Date: Thu Jan 19 13:01:03 2012 +0100 tests: make testdisplay non-optional Not testing modesetting should not be an option. Also this hopefully prevents testdisplay build-breakage from lingering on for days like it has in the past. And we want to eventually test the gem/kms cross-section, i.e. pageflips. Acked-by: Chris Wilson Signed-Off-by: Daniel Vetter commit f07e4d1885fbf54a4faa1f91a92fa9499e11b011 Author: Daniel Vetter Date: Wed Jan 18 21:23:56 2012 +0100 lib: extract rendercopy functions from gem_stress Signed-off-by: Daniel Vetter commit 1357427fd0287b1027608c96d400daa6c4c97ddc Author: Daniel Vetter Date: Wed Jan 18 17:53:12 2012 +0100 gem_stress: s/gem_stress.h/rendercopy.h commit f7c2dab5bd1284982343a31d315864906392f016 Author: Daniel Vetter Date: Wed Jan 18 17:51:48 2012 +0100 gem_stress: move keep_gpu_busy stuff out of render copy functions Signed-off-by: Daniel Vetter commit b9fe673f498003b2d235f63485ed832070f84a8c Author: Daniel Vetter Date: Wed Jan 18 17:47:33 2012 +0100 gem_stress: move option struct out of header Signed-off-by: Daniel Vetter commit 9f20ecc3b3e80b2893646817926f2e090abf757a Author: Daniel Vetter Date: Wed Jan 18 17:46:00 2012 +0100 gem_stress: add width/height arg to rendercpy functions Signed-off-by: Daniel Vetter commit 699d30950f1d91cd017364765c14fdc4cb63cd14 Author: Daniel Vetter Date: Wed Jan 18 01:03:20 2012 +0100 gem_stress: move a few things out of gem_stress.h Signed-off-by: Daniel Vetter commit f1de285e7e5e1825f09510b2e6264139ea92f921 Author: Daniel Vetter Date: Wed Jan 18 00:55:49 2012 +0100 gem_stress: pass batch as arg to render_copy functions Signed-off-by: Daniel Vetter commit 72f74ce35512aebebf7f9a35e54cd7746ab30017 Author: Daniel Vetter Date: Wed Jan 18 00:36:37 2012 +0100 gem_stress: remove logical_tile_no arg from render_copy functions Signed-off-by: Daniel Vetter commit 205510badf00f82c0dc069ca15c5016a6fe18a60 Author: Daniel Vetter Date: Wed Jan 18 00:34:15 2012 +0100 gem_stress: add buf->size Removes a dependency on gem_stress internals from the rendercpy functions. Signed-off-by: Daniel Vetter commit d75d69d0a9e5e77dcea469b47401cd7d25f155a3 Author: Daniel Vetter Date: Sun Jan 15 18:32:11 2012 +0100 lib/drmtest: extract mappable aperture trasher infrastructure Signed-off-by: Daniel Vetter commit 7b14b093d45232cd2fd3a96322353eb35083c9eb Author: Daniel Vetter Date: Sun Jan 15 17:40:41 2012 +0100 lib/drmtest: add gem_mappable_aperture_size Signed-off-by: Daniel Vetter commit 7f944349efb98ae2ab777dc745c3d12acd03d82f Author: Daniel Vetter Date: Sun Jan 15 17:14:56 2012 +0100 lib/drmtest: extract gem_aperture_size Signed-off-by: Daniel Vetter commit d749921e48366c3b562fa315e7ed6cf4ce063a1c Author: Daniel Vetter Date: Sun Jan 15 16:40:32 2012 +0100 tests: update .gitignore commit a50eb34398b7a8ac5580d21a5f867c4697fee7ea Author: Daniel Vetter Date: Sun Jan 15 16:39:49 2012 +0100 tests: add ZZ_hangman Not yet enabled by default because the kernel can't recover from this on chips where we don't have a gpu reset implemented. Signed-off-by: Daniel Vetter commit eb6459161394d763b116e55eaef22b6b0b6a09a8 Author: Daniel Vetter Date: Sat Jan 14 17:05:39 2012 +0100 tests: add ZZ_check_dmesg This way the testsuit automatically fails if we hit a DRM_ERROR or a WARN/BUG somewhere. ... i.e. this is the Jesse Barnes catcher ... Signed-off-by: Daniel Vetter commit 91a01e034858dacd41f0a847ba90996db87c44be Author: Gaetan Nadon Date: Tue Jan 10 20:30:23 2012 -0500 tools: use correct src and build location Headers are found under top_srcdir/ Headers are CPP flags, not C Flags libintel_tools.la is located in top_builddir. Use dist_bin_SCRIPTS so it is included in tarball Line-up the line continuation characters Acked-by: Ben Widawsky Signed-off-by: Gaetan Nadon commit 812ca58f8a0d71433781b3ae38ead65e10e51cce Author: Gaetan Nadon Date: Thu Jan 5 18:56:28 2012 -0500 scripts: use PYTHON primary directive for python scripts Should it become installlable in the future, it will get compiled at installation time by Automake. Because it is "source", they get included in the tarball. Acked-by: Ben Widawsky Signed-off-by: Gaetan Nadon commit 65b7c72335572fec7f1fd78de840148c91b1fde2 Author: Gaetan Nadon Date: Thu Jan 5 18:44:49 2012 -0500 lib: fix include directives, alphabetize sources Headers are found under top_srcdir/... Headers are CPP flags, not C Flags Acked-by: Ben Widawsky Signed-off-by: Gaetan Nadon commit 3ceb75828ccf813005a7eb4c3924c9ca56c01aa1 Author: Gaetan Nadon Date: Thu Jan 5 17:02:30 2012 -0500 Benchmark: use correct src and build location Headers are found under top_srcdir/... Haeders are CPP flags, not C Flags AM_CPPFLAGS, AM_CFLAGS and LDAAD apply to all targets. libintel_tools.la is located in top_builddir. Acked-by: Ben Widawsky Signed-off-by: Gaetan Nadon commit 4768adf7d77706fb6c2967695e0afa7d7c7dbb75 Author: Gaetan Nadon Date: Tue Jan 10 17:25:24 2012 -0500 Debugger: convert existing makefiles to Automake. A common xorg idiom is used. The dependencies are auto-detected. If they are present, the debugger is build. If any are missing, the debugger is silently skipped. If --enable-shader-debugger is specified, the configuration will abort if any of the dependencies is missing. No user actions is needed, no env variable to set (as it should be) This will fix a number of problems: build cannot start due Makefile missing in tarball. build fails as GEN4ASM variable not available in Makefile. distcheck is also disturbed. In the process other minor problems were fixed: helper target is missing dependencies on evict.h. too may arguments given to pre_cpp.py but they were ignored. fills /tmp with temporary files. Acked-by: Ben Widawsky Signed-off-by: Gaetan Nadon commit 9f8766030463bc0c75506d990831b853f19d7725 Author: Daniel Vetter Date: Wed Jan 11 17:19:53 2012 +0100 lib/drmtest: add gpu quiescent helper Some tests are higly timing dependent and others carelessly leave active buffers behind. So add a helper to quiescent the gpu and call it unconditionally when opening an fd in a vain attempt to make all this race-condition hitting more scientifically sound. Signed-Off-by: Daniel Vetter commit 7a54bfa772d6823a20152c15fe18726e9222a4e9 Author: Daniel Vetter Date: Wed Jan 11 16:56:50 2012 +0100 tests: add drm_vma_limiter_cached to check libdrm cache mmap pruning Suggested by Chris Wilson. Signed-Off-by: Daniel Vetter commit cbaa8a389e47695e6612eb0f76faaf7d0979fee3 Author: Daniel Vetter Date: Wed Jan 11 15:33:00 2012 +0100 lib/drmtest: extract helpers for signal interruptions Also add some hackish stat to check it works. Signed-off-by: Daniel Vetter commit 36d25cc7440ef9d37d16ea95ee0d51e5e6e2c5e2 Author: Daniel Vetter Date: Wed Jan 11 14:59:47 2012 +0100 tests: add drm_vma_limiter variants that only check gtt/cpu mmaps Suggested by Chris Wilson. Signed-off-by: Daniel Vetter commit 553021d9740019d602ef327632a120cf0c9fc15a Author: root Date: Wed Jan 11 14:37:42 2012 +0100 tests: add drm_vma_limiter v2: Also check whether a 2nd mmap on the same bo still works. Suggested by Chris Wilson. Signed-Off-by: Daniel Vetter commit e287fe1958f73d35dd833d927662a5a1c64bcdbd Author: root Date: Tue Jan 10 22:34:52 2012 +0100 tests/gem_fenced_exec_trash: use drmtest helpers more Signed-Off-by: Daniel Vetter commit 527cad1618b458a2ff04b1d63ea1ffe926774815 Author: Daniel Vetter Date: Tue Jan 10 18:41:46 2012 +0100 lib/drmtest: extract gem_mmap Signed-Off-by: Daniel Vetter commit 7a6042e87ef3dee2df06b1666fb8af6889ac35b8 Author: Daniel Vetter Date: Tue Jan 10 18:29:30 2012 +0100 lib/drmtest: extract gem_create Signed-Off-by: Daniel Vetter commit 73d1b88129cdcf6fa250b6fb8e198fdfc2d70e04 Author: Daniel Vetter Date: Tue Jan 10 18:20:39 2012 +0100 testdisplay: rename global fd variable to drm_fd Shuts up compiler warnings about shadowing in functions. Signed-Off-by: Daniel Vetter commit db7462e1f5e3fd6bfeeeeb18e76231638d7f8c07 Author: Daniel Vetter Date: Tue Jan 10 18:15:05 2012 +0100 testdisplay: fixup smaller compiler warnings const char * issues and redudant getopt stuff Signed-Off-by: Daniel Vetter commit 08cd2f220ee84e51917cc76c19998b12b6d50407 Author: Daniel Vetter Date: Tue Jan 10 16:10:48 2012 +0100 tests: use the gem_write wrapper some more Signed-Off-by: Daniel Vetter commit 673e6b220a34fb7600cbf272bc46a4ac1ca08905 Author: Daniel Vetter Date: Tue Jan 10 16:05:34 2012 +0100 lib/drmtest: extract gem_set_domain and gem_sync gem_sync just does a gtt sync by using set_domain(GTT, GTT). Signed-Off-by: Daniel Vetter commit a7a80c2c2f7ac15ae50d75dc2fcaf59834b47e0c Author: Daniel Vetter Date: Tue Jan 10 15:50:20 2012 +0100 tests: fixup new warnings Signed-Off-by: Daniel Vetter commit bd5cf9a07d17ce91dfaa3aa12d3f2c93815f0489 Author: Daniel Vetter Date: Tue Jan 10 15:37:53 2012 +0100 lib/drmtest: extract gem_read Signed-Off-by: Daniel Vetter commit 319638ba6d38c25be0f6dadbab3f5855083234a1 Author: Daniel Vetter Date: Tue Jan 10 15:31:11 2012 +0100 lib/drmtest: extract gem_write Astonishing how many different function signatures are possible for something that simple. Signed-Off-by: Daniel Vetter commit 5dd17d3f4bddb075f3fb6fbcd1b6c271f7b746a7 Author: Daniel Vetter Date: Tue Jan 10 15:07:19 2012 +0100 lib/drmtest: extract gem_close Signed-Off-by: Daniel Vetter commit aa67b22e426f26f8a8d7fe35221fe2a6ceb5d3db Author: Daniel Vetter Date: Tue Jan 10 14:59:58 2012 +0100 lib/drmtest: extract gem_set_tiling Way too much copy-pasting going on here. Also fix a compiler warnings in gem_stress while fixup things up. Signed-off-by: Daniel Vetter commit 1be3fd7eeed3adf1fba56edc37110d346b03b88b Author: Daniel Vetter Date: Mon Jan 9 23:42:19 2012 +0100 lib: fixup new compiler warnings Signed-Off-by: Daniel Vetter commit bd811d2d39f49087310be508e2ea6278e817d6f1 Author: Daniel Vetter Date: Mon Jan 9 23:37:36 2012 +0100 tools/intel_stepping: fixup new warnings Signed-Off-by: Daniel Vetter commit faf3dd11357dc3aebbf025785f572b51117ea068 Author: Daniel Vetter Date: Mon Jan 9 23:35:21 2012 +0100 tools/intel_gtt: fixup new warnings Signed-Off-by: Daniel Vetter commit 5774fadf7d99ade1a18177eb04bf10377fcfef8b Author: Daniel Vetter Date: Mon Jan 9 23:34:38 2012 +0100 tools/intel_reg_dumper: fixup new warnings Signed-Off-by: Daniel Vetter commit d50e6368abfb657a838d212955b7445b44aba168 Author: Daniel Vetter Date: Mon Jan 9 23:24:12 2012 +0100 remove tools/intel_decode Everyone's using the libdrm decoder now. Signed-Off-by: Daniel Vetter commit 904bcab7ba884605e2e99264482c6c5383025b19 Author: Daniel Vetter Date: Mon Jan 9 23:22:21 2012 +0100 tools/intel_gpu_top: fixup new warnings Signed-Off-by: Daniel Vetter commit 2ca6c6b4fdd09b99b2456923926cc8d85316f301 Author: Daniel Vetter Date: Mon Jan 9 23:19:32 2012 +0100 tools/intel_dump_decode: use libdrm decoder Signed-Off-by: Daniel Vetter commit 24a33db7f0177e3c0d7cc4686a69ae6e30e09c3b Author: Daniel Vetter Date: Mon Jan 9 23:11:58 2012 +0100 tools/intel_bios_reader: fixup new warnings Signed-Off-by: Daniel Vetter commit 74b70baf14e42ee435a4e317c20a41d3fb0f0d93 Author: Daniel Vetter Date: Mon Jan 9 23:10:44 2012 +0100 tools/intel_bios_dumper: fixup new warnings Signed-Off-by: Daniel Vetter commit 03ab1328a765d725677809179779ff673ca41296 Author: Daniel Vetter Date: Mon Jan 9 23:09:37 2012 +0100 tools/intel_audio_dump: fixup new warnings Signed-Off-by: Daniel Vetter commit 391e6aa89ad21fa161632b41ff8e1f48352d0287 Author: Daniel Vetter Date: Mon Jan 9 23:06:41 2012 +0100 tools/intel_error_decode: fixup new warnings Signed-Off-by: Daniel Vetter commit 7ee9f16e5166a4b0dddb76ad5166410c388f603e Author: Daniel Vetter Date: Mon Jan 9 23:38:17 2012 +0100 tools/intel_error_decode: convert over to libdrm decoder Note that a per-ring error decode state would make more sense - this way we could better decode the ring head and tail. But our current head tracking is already lame (we need the kernel to also dump the ringbuffer head/tail first, not just acthd), so I didn't bother. Signed-Off-by: Daniel Vetter commit 555cfd4597bc04cb3fa67304408f7fa1be910647 Author: Jesse Barnes Date: Mon Jan 9 14:33:39 2012 -0800 testdisplay: update to new colorkey ioctl commit 504c4fa94f109338ef90a7e07b21bfafa67b8d4e Author: Alan Coopersmith Date: Fri Jan 6 15:45:29 2012 -0800 Fix pthread compiler flags to work on Solaris and with Studio compiler AC_USE_SYSTEM_EXTENSIONS is used to let autoconf take care of setting the right system defintions for POSIX threads & similar extensions to the base POSIX API. Since it will also #define _GNU_SOURCE 1, remove the extra setting to avoid compiler warnings about redefined macros. Signed-off-by: Alan Coopersmith Signed-off-by: Daniel Vetter commit 4e3c85f153276fc297570364b71ddbdd37aeaf5a Author: Alan Coopersmith Date: Fri Jan 6 14:37:20 2012 -0800 include in lib/intel_mmio.c for open() prototype on Solaris is the POSIX standard specified header for open(), so should be available on all platforms. Signed-off-by: Alan Coopersmith Signed-off-by: Daniel Vetter commit c461006bac8a3ff1196a83449bd1676778e8844f Author: Alan Coopersmith Date: Fri Jan 6 14:37:19 2012 -0800 List out array values instead of using gcc range extension Required to compile with Solaris Studio cc compiler. Signed-off-by: Alan Coopersmith Signed-off-by: Daniel Vetter commit 00751594dbdce9f1855ebe4105677a494fd7e36b Author: Alan Coopersmith Date: Fri Jan 6 15:45:28 2012 -0800 Use sched_yield instead of pthread_yield Despite the name implying it's a standard part of the POSIX threads API, pthread_yield is actually non-standard and less portable than sched_yield. For instance, Solaris only has sched_yield, and not pthread_yield. Since even the Linux man page suggests using sched_yield, just call that. Signed-off-by: Alan Coopersmith Signed-off-by: Daniel Vetter commit f73dddc767b38988f6905ef56e95acad9fa4e8ca Author: Alan Coopersmith Date: Fri Jan 6 14:37:17 2012 -0800 Solaris defines struct winsize in termios.h Signed-off-by: Alan Coopersmith Signed-off-by: Daniel Vetter commit 9ebb860e3981db78ee31859dc77f1fce3ccc3183 Author: Alan Coopersmith Date: Fri Jan 6 14:37:16 2012 -0800 Provide Solaris implementation of intel_get_total_ram_mb Signed-off-by: Alan Coopersmith Signed-off-by: Daniel Vetter commit 65db78f687e757ca40ac42e9c26ddc769bd4cfcc Author: Gaetan Nadon Date: Tue Jan 3 21:13:39 2012 -0500 config: restore the libtool minimum version to 1.5 Very few systems still use this old version, but it would be inconvenient to build a video driver with libtool 1.5 and have to build the gpu tools on another system having libtool 2.2. The toolchain version requirements are documented here: http://www.x.org/wiki/ModularDevelopersGuide#GNU_Build_System Signed-off-by: Gaetan Nadon Signed-off-by: Daniel Vetter commit d63a1f6c73f2fbfd4af1d3bab3eb0e4f68483115 Author: Gaetan Nadon Date: Tue Jan 3 21:12:25 2012 -0500 config: the minimum version for autoconf is 2.60 A version later than 2.60 can be used, but no new features from such a later version can be used in configure.ac. The toolchain version requirements are documented here: http://www.x.org/wiki/ModularDevelopersGuide#GNU_Build_System Minimum version for Automake is 1.10 but we have not written it in any xorg module so far and there has been no issues. Signed-off-by: Gaetan Nadon Signed-off-by: Daniel Vetter commit a03ef7abb508223bce65366d2ef9193521513d00 Author: Gaetan Nadon Date: Tue Jan 3 21:12:24 2012 -0500 config: set-up xorg automatic rebuilding rules The current code is a noop. Use the same configuration as all the other xorg modules. This will change in the future but it is less confusing when all modules behave the same way. Note that these rules apply to building from a tarball only. Restore autogen.sh to be identical in all xorg modules. Signed-off-by: Gaetan Nadon Signed-off-by: Daniel Vetter commit 665b86664ab5b4a8a076682d9c879f7a9fbeb756 Author: Gaetan Nadon Date: Tue Jan 3 21:12:23 2012 -0500 config: use project wide xorg warnings variable Use CWARNFLAGS as in all of xorg. There seems to be no reason why this module should be different. The warnings were updated recently for those who install the latest util-macros. Signed-off-by: Gaetan Nadon Signed-off-by: Daniel Vetter commit 1722b781286bbb7d98a90fa789d56219fd907ce7 Author: Gaetan Nadon Date: Tue Jan 3 21:12:22 2012 -0500 config: remove duplicate AC_PROG_CC and AC_PROG__CC_99 The compiler was configured three times. It is done once by XORG_DEFAULT_OPTIONS in util-macros. Signed-off-by: Gaetan Nadon Signed-off-by: Daniel Vetter commit 4435791013a7172a06a17e5656a5e6007f5a2d89 Author: Gaetan Nadon Date: Tue Jan 3 21:12:21 2012 -0500 config: remove unrequired AM_PROG_CC_C_O Required when using per-target flags or subdir-objects with C sources. http://www.gnu.org/software/automake/manual/automake.html Signed-off-by: Gaetan Nadon Signed-off-by: Daniel Vetter commit 27e1294cf8ef11455cb54527b8a269717ea12395 Author: Gaetan Nadon Date: Tue Jan 3 21:12:20 2012 -0500 Add mandatory ChangeLog and INSTALL files These are generated from a macro in the util-macros package Refer to the wiki for more details. http://www.x.org/wiki/NewModuleGuidelines. Acked-by: Cyril Brulebois Reviewed-by: Ben Widawsky Signed-off-by: Gaetan Nadon Signed-off-by: Daniel Vetter commit 4384c68f2ed7dac944b1cf57ac4acda606fafffe Author: Gaetan Nadon Date: Tue Jan 3 21:12:19 2012 -0500 Man pages still showing version 1.0 in the 1.1 release The patch coverts the man subdir to the standard xorg man page makefile. The version number is automatically updated when a new release is made. The man page section number is no longer hard coded either. The package util-macros at version 1.8 or greater is required. Acked-by: Cyril Brulebois Reviewed-by: Ben Widawsky Signed-off-by: Gaetan Nadon Signed-off-by: Daniel Vetter commit 6540ed2112dc589e13eb4bf4460df1c95a1b38a5 Author: Gaetan Nadon Date: Tue Jan 3 21:12:18 2012 -0500 Use standard .gitignore file and layout Reusing xorg code saves maintenance in the long term. Now that m4/.gitignore is removed, the -I m4 ${ACLOCAL_FLAGS} must be removed to avoid build breakage as m4 is generated and not part of the git source. Acked-by: Cyril Brulebois Reviewed-by: Ben Widawsky Signed-off-by: Gaetan Nadon Signed-off-by: Daniel Vetter commit 41ae07aba28dcec0b98245be90d9d5925c13c5c7 Author: Gaetan Nadon Date: Tue Jan 3 21:12:17 2012 -0500 Add mandatory COPYING file. This module is hosted as an X.Org app and is published as such. This file is a summary of the copyright statements in the source code. http://www.x.org/wiki/NewModuleGuidelines Acked-by: Cyril Brulebois Reviewed-by: Ben Widawsky Signed-off-by: Gaetan Nadon Signed-off-by: Daniel Vetter commit 47a5bc505cb972cc94f1fbd9882d4e5c2e72ac43 Author: Eugeni Dodonov Date: Mon Dec 19 16:25:53 2011 -0200 tools/intel_reg_dumper: retrieve rc6 residency values This allows to check if rc6 works, and how long have we been in each state. Signed-off-by: Eugeni Dodonov commit 1649ab350f60b664a51fc4a7fd9c225bb72eb0a8 Author: Eugeni Dodonov Date: Tue Oct 25 14:40:12 2011 -0200 tools/intel_reg_dumper: Add support for debug register Right now, we only check for hardware DRRS support. But much more can be done with it. Some day. Signed-off-by: Eugeni Dodonov commit f3f84bb3502cd1188dbc60cd975564eb3c3d4670 Author: Wu Fengguang Date: Sat Nov 12 11:12:55 2011 +0800 intel_audio_dump: show Gamut Metadata DIP Signed-off-by: Wu Fengguang Signed-off-by: Daniel Vetter commit 821e07d00d8d43472a808e240b0a7f1b9adc0ba9 Author: Wu Fengguang Date: Sat Nov 12 11:12:54 2011 +0800 intel_audio_dump: show interrupt enable bit Signed-off-by: Wu Fengguang Signed-off-by: Daniel Vetter commit ee94958d131cb71488f60fad48d7793a9dfd78e7 Author: Wu Fengguang Date: Sat Nov 12 11:12:53 2011 +0800 intel_audio_dump: show HDMI encoding Signed-off-by: Wu Fengguang Signed-off-by: Daniel Vetter commit e321f1315bddf94748e412cc1741cf1908420b6f Author: Wu Fengguang Date: Sat Nov 12 11:12:52 2011 +0800 intel_audio_dump: show VIDEO_DIP_CTL_* for CPT Signed-off-by: Wu Fengguang Signed-off-by: Daniel Vetter commit c0635c3f5c10459478665eb54814726def22fb5d Author: Wu Fengguang Date: Sat Nov 12 11:12:51 2011 +0800 intel_audio_dump: show ironlake ELD_access_address Signed-off-by: Wu Fengguang Signed-off-by: Daniel Vetter commit f32aecb2963f94f8ea033ad2e7a5e8d30a92484b Author: Wu Fengguang Date: Sat Nov 12 11:12:50 2011 +0800 intel_audio_dump: show ELD contents for G45 Signed-off-by: Wu Fengguang Signed-off-by: Daniel Vetter commit 6fcb5cdcbc385d94290271e0122ee4163ce38ec6 Author: Wu Fengguang Date: Sat Nov 12 11:12:49 2011 +0800 intel_audio_dump: show detected chipset name Signed-off-by: Wu Fengguang Signed-off-by: Daniel Vetter commit b5ca6b4410ac9ac00cad85dc53ef9761c6031f15 Author: Wu Fengguang Date: Sat Nov 12 11:12:48 2011 +0800 intel_audio_dump: show DP control registers for Ironlake Signed-off-by: Wu Fengguang Signed-off-by: Daniel Vetter commit 12861a95680ad35646713a38b617036a2bc3bbc8 Author: Wu Fengguang Date: Sat Nov 12 11:12:47 2011 +0800 intel_audio_dump: explain Bits_per_Sample Signed-off-by: Wu Fengguang Signed-off-by: Daniel Vetter commit cf4c12f103bbcc4b3f3b39fc8fe944f3c411b4fb Author: Wu Fengguang Date: Sat Nov 12 11:12:46 2011 +0800 intel_audio_dump: fix DP port width for CPT Signed-off-by: Wu Fengguang Signed-off-by: Daniel Vetter commit 97d203140c748490a5371a4695247f21ae328ac5 Author: Wu Fengguang Date: Sat Nov 12 11:12:45 2011 +0800 intel_audio_dump: fix DP control registers for CPT Signed-off-by: Wu Fengguang Signed-off-by: Daniel Vetter commit 63e3c37838aefb7e8a715eda29e1ca635fa21c63 Author: Wu Fengguang Date: Sat Nov 12 11:12:44 2011 +0800 intel_audio_dump: fix Ironlake detection The original test mistakenly calls dump_cpt() for Ironlake, due to HAS_PCH_SPLIT := IS_GEN5 || IS_GEN6 || IS_GEN7. Signed-off-by: Wu Fengguang Signed-off-by: Daniel Vetter commit 305443cf0ae5cc7566aceb6dc37aa3f51f51c9fb Author: Wu Fengguang Date: Sat Nov 12 11:12:43 2011 +0800 intel_audio_dump: fix Digital_Port_D_Detected copy&paste error Signed-off-by: Wu Fengguang Signed-off-by: Daniel Vetter commit d6bdaf01f9e9db47e0f5bb37d65e017b0c01502d Author: Wu Fengguang Date: Sat Nov 12 11:12:42 2011 +0800 intel_audio_dump: fix ironlake Stream_ID indents Signed-off-by: Wu Fengguang Signed-off-by: Daniel Vetter commit 5032f68a77b67d020cd462c22e390dc35d70447b Author: Wu Fengguang Date: Sat Nov 12 11:12:41 2011 +0800 intel_audio_dump: report effective channel count The raw channel count is not user friendly and may be misleading. Signed-off-by: Wu Fengguang Signed-off-by: Daniel Vetter commit 1c6a7cade7881d6ee1ff4e240331b10112389ce8 Author: Wu Fengguang Date: Sat Nov 12 11:12:40 2011 +0800 intel_audio_dump: cleanup hex output - no need to show the 1-bit AUD_OUT_DIG_CNVT_* as hex value - show the Connection_select_Control_* bits as hex values Signed-off-by: Wu Fengguang Signed-off-by: Daniel Vetter commit d6e38ffb6fbca1d13f21dae0b0b1eef2325583cd Author: Wu Fengguang Date: Sat Nov 12 11:12:39 2011 +0800 intel_audio_dump: cleanup ACP DIP name for ironlake and CPT Signed-off-by: Wu Fengguang Signed-off-by: Daniel Vetter commit ea3815cd03a4613d915f410aaa5c2079e989467c Author: Wu Fengguang Date: Sat Nov 12 11:12:38 2011 +0800 intel_audio_dump: cleanup hyphen character Convert "­" (Hex 00ad) to "-" (Hex 2d), the former leads to ugly outputs in some situations. Signed-off-by: Wu Fengguang Signed-off-by: Daniel Vetter commit 5a3fccbb577dd8d6a0699cd58e9f39532792b866 Author: Daniel Vetter Date: Sat Dec 24 01:23:59 2011 +0100 Release 1.1 commit 74d6545ffadf0a7f321138ae4ccd0def8f28e0d2 Author: Daniel Vetter Date: Sun Dec 18 00:24:45 2011 +0100 testdisplay: shut up compiler Signed-Off-by: Daniel Vetter commit 2de19c477af4f10370f1272e6578cec0d1b486bc Author: Daniel Vetter Date: Sun Dec 18 00:21:39 2011 +0100 testdisplay: move drm_fourcc.h include under the #ifdef protection Signed-Off-by: Daniel Vetter commit 1f41a30070d62e007bfda9f8ddadc24877a3324c Author: Yi Sun Date: Thu Dec 1 18:57:16 2011 +0800 tests/testdisplay.c: make the 3th pipe finish all the mode setting. If test all modes rather than preferred mode, remove framebuffer and set CRTC to zero after each connector mode setting. Signed-off-by: Sun Yi Reviewed-by: Eugeni Dodonov commit 06460049f69b2769c31c51520ae07af394a0a33b Author: Ben Widawsky Date: Thu Dec 15 13:54:30 2011 -0800 intel-decode: fix flush dword post sync parse Signed-off-by: Ben Widawsky commit 7ecdb152ca30db67f23a8f31bc7e4b84ec72a4d1 Author: Chris Wilson Date: Wed Dec 14 17:43:37 2011 +0000 tests/gem_double_irq_loop: silence the compiler gem_double_irq_loop.c: In function ‘dummy_reloc_loop’: gem_double_irq_loop.c:62:9: warning: unused variable ‘j’ [-Wunused-variable] commit f381a8b9f08a6d0c843e7b9f7997020d6b0d1e1a Author: Chris Wilson Date: Wed Dec 14 17:41:34 2011 +0000 tests/gem_exec_blt: silence the compiler by failing on error gem_exec_blt.c: In function ‘gem_exec’: gem_exec_blt.c:174:6: warning: variable ‘ret’ set but not used [-Wunused-but-set-variable] Propagate the failure and exit(1). commit 2a292188e764c18b76698e1698ecaf62699b2f04 Author: Chris Wilson Date: Wed Dec 14 17:41:34 2011 +0000 tests/gem_exec_nop: silence the compiler by failing on error gem_exec_nop.c: In function ‘exec’: gem_exec_nop.c:101:6: warning: variable ‘ret’ set but not used [-Wunused-but-set-variable] Propagate the failure and exit(1). commit ceb9f7d934e7efaaf0b061c3a0c5cb4b21efa156 Author: Chris Wilson Date: Wed Dec 14 17:39:42 2011 +0000 tests/gem_stress: silence the compiler by using '%zu' for size_t gem_stress.c: In function ‘main’: gem_stress.c:980:3: warning: format ‘%lu’ expects argument of type ‘long unsigned int’, but argument 4 has type ‘unsigned int’ [-Wformat] commit d4bb328b78b767b98c8a60ee2c1bd0d2cc894d67 Author: Chris Wilson Date: Wed Dec 14 17:37:53 2011 +0000 tests/gem_largeobject: silence the compiler gem_largeobject.c: In function ‘test_large_object’: gem_largeobject.c:95:20: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] commit b4fb480c802c41dbb8061344a540752156113489 Author: Jesse Barnes Date: Wed Dec 14 08:14:45 2011 -0800 testdisplay: don't test planes if i915 color key ioctl is not available commit 7ac492aec2c749895c863675ad5f48177daf9648 Author: Chris Wilson Date: Mon Dec 12 20:19:03 2011 +0000 scripts/who: Add the process id to the output Signed-off-by: Chris Wilson commit 61ff1309cabaa1fc879ed0c3179696ad64a79da3 Author: Chris Wilson Date: Mon Dec 12 17:44:58 2011 +0000 scripts: Add a trivial script to show which programs are using the GPU Signed-off-by: Chris Wilson commit 10e36edabe42e52f7862f66147d4433e8947ebc2 Author: Chris Wilson Date: Sat Dec 10 12:49:10 2011 +0000 decode: Fix interpretation of i915 8bit formats 2/3 are reserved with the correct values for A8/I8 being 4/5 respectively. Signed-off-by: Chris Wilson commit 5a9d82c6d5ad6d4e9b48a74dd4a5226babee81aa Author: Jesse Barnes Date: Wed Dec 7 08:22:41 2011 -0800 testdisplay: update for final plane & fb ABI Signed-off-by: Jesse Barnes commit ff409c537f541cbaa20f0b0f8faa03ece0d8014f Author: Daniel Vetter Date: Tue Dec 6 16:57:53 2011 +0100 tests/gem_partial_pwrite_pread: don't trash gtt unnecessarily On chips that don't have a unmappable gtt part it's utterly pointless. Signed-Off-by: Daniel Vetter commit 5a851b139266063fc4e172e6ce781ebc1c75c9d9 Author: Daniel Vetter Date: Sun Dec 4 21:42:31 2011 +0100 tests: add gem_partial_pwrite_pread Signed-off-by: Daniel Vetter commit 09cba27fdc5fbcc82471b4d7ba41944e5a4865d4 Author: Daniel Vetter Date: Sun Dec 4 13:57:56 2011 +0100 tests/gem_reloc_vs_gpu: fixup this mess - fixup pitch mess noticed by Chris Wilson. - we need to diable bo reuse otherwise the kernel won't do the relocs (we might get an already gtt-bound batch from the dummy load). Signed-Off-by: Daniel Vetter commit b9629f2d8d21a47c383c718e41910cc61c7947a6 Author: Daniel Vetter Date: Sun Dec 4 13:49:24 2011 +0100 tests/gem_reloc_vs_gpu: emit special batch on blt ring on gen6+ Signed-Off-by: Daniel Vetter commit 28e3f9c6064f2c9859e547b17abe1138a62e97ae Author: Daniel Vetter Date: Sun Dec 4 13:02:35 2011 +0100 tests/gem_reloc_vs_gpu: switch to COLOR_BLT instead of PIPE_CONTROL Less fancy command that works everywhere. Suggested by Chris Wilons. Signed-Off-by: Daniel Vetter commit 1c9cce9c45b9d8980eb6944dc8c36925e91f5228 Author: Daniel Vetter Date: Sat Dec 3 19:57:36 2011 +0100 tests/gem_tiled_pread_pwrite: kill set-but-unsed warning Signed-Off-by: Daniel Vetter commit ad6be1f0c913c5b9b5bb93d1c56390ac2b0c62ea Author: Daniel Vetter Date: Sun Dec 4 12:08:59 2011 +0100 tests: add gem_reloc_vs_gpu Tests whether the kernel properly waits for the gpu before applying a reloc. Signed-off-by: Daniel Vetter commit 224d4d22f069782c3a83a06ec97bbc58932db3d8 Author: Daniel Vetter Date: Fri Dec 2 20:40:03 2011 +0100 Revert some accidental things ... somehow slipped in. Signed-off-by: Daniel Vetter commit f5854c89022991f76d813249104566d14e73801b Author: Daniel Vetter Date: Fri Dec 2 20:36:06 2011 +0100 tests: add gem_exec_faulting_reloc Signed-off-by: Daniel Vetter commit ab3f4bdafe60dede32a48674ef9920df090bf3a7 Author: Daniel Vetter Date: Fri Dec 2 18:41:34 2011 +0100 tests: add gem_exec_bad_domains To check whether the kernel properly rejects non-gpu domains in relocs. Signed-Off-by: Daniel Vetter commit 783f16e328f331f92ef37b986b0f845c4ae23d98 Author: Daniel Vetter Date: Fri Dec 2 10:55:56 2011 +0100 tests: add gem_tiled_pread_pwrite Signed-off-by: Daniel Vetter commit eafdf50044f53e4b5eef222f6374c9ddba21e9da Author: Daniel Vetter Date: Tue Nov 1 14:33:53 2011 +0100 improve README Signed-Off-by: Daniel Vetter commit 2e88c4ce34c0403df2301863efae4bf0a8699acb Author: Daniel Vetter Date: Wed Nov 30 12:36:29 2011 +0100 tests/gem_gtt_speed: Add modes that force that to the gtt domain No sane userspace doesn't upload data to the gpu without actually using it there ... Signed-Off-by: Daniel Vetter commit 4591d4ba7fe224289faa2b3b37052106d476a04f Author: Paul Berry Date: Wed Nov 30 09:47:56 2011 -0800 Add missing executables to .gitignore. commit 7af82bb0e5af670add67996ff8d6e890b9622a0c Author: Daniel Vetter Date: Sun Nov 27 02:39:14 2011 +0100 tests: implement snb+ XY_SETUP_CLIP_BLT workaround Better safe than sorry. Signed-off-by: Daniel Vetter commit 66b88b615cb5b1f483eb86d4623a5df0bbb2c1bf Author: Daniel Vetter Date: Sun Nov 27 01:55:42 2011 +0100 tests/sysfs_edit_reader: posixify Debian's default sh complains ... Signed-Off-by: Daniel Vetter commit 8c7f8bcccbbb8cdd75aaa2f5084f7667f4279ea8 Author: Daniel Vetter Date: Sun Nov 27 01:37:59 2011 +0100 tests: properly terminate tests when values mismatch Not much use running them in the test rig otherwise. Signed-Off-by: Daniel Vetter commit 2f56e9617703466aaac79c8763974cea6b233933 Author: Eugeni Dodonov Date: Fri Nov 11 11:17:59 2011 -0200 tests/gem_hang: fix copy-paste problem I suspect that we should do different things for different pipes.. Spotted by Thomas Jarosh on #intel-gfx freenode. Signed-off-by: Eugeni Dodonov commit faf413d87556b9b76686ef9bf1e797e86e4b5129 Author: Eugeni Dodonov Date: Thu Nov 10 11:27:27 2011 -0200 tests: add a test for checking edid reading delays With base on EDID timing testing, when we take more than 1s to run xrandr command, something is wrong.. So add this test for testing the time we take to read the status of all the connectors from sysfs. It should do us an average picture of how long we'd take to run xrandr (roughtly 2x that value). Signed-off-by: Eugeni Dodonov commit 48186febf17490820dc089172c58526664255417 Author: Eugeni Dodonov Date: Thu Nov 10 11:12:10 2011 -0200 tests: add test for kernel segmentation fault As asked by Daniel Vetter, this is a tech which checks if we can cause division by zero in kernel by reading the i915_emon_status debugfs entry repeatably. Signed-off-by: Eugeni Dodonov commit 31a4b13132d8d3c1c8e2d16205b9785f4e6bb48d Author: Eugeni Dodonov Date: Tue Nov 8 15:47:03 2011 -0200 intel_gpu_top: use debugfs interface for forcewake Using debugfs facilities for forcewake-related stuff. Acked-by: Ben Widawsky Signed-off-by: Eugeni Dodonov commit f4ba3f529eace14bc3f4c3bf9fb2a0112d3632d5 Author: Daniel Vetter Date: Tue Nov 8 12:36:24 2011 +0100 tests: disable pipe_control on i965g That hw is broken. Reported-by: Dave Airlie Signed-off-by: Daniel Vetter commit 402948624cb9a18da2a5bdf9c1905b9eb9fd22ee Author: Chris Wilson Date: Fri Nov 4 17:10:06 2011 +0000 Call Arrandale gen5 not gen4. commit 4c7c94ad98ac94a1f8fffbf2ffd79fc3bfcef647 Author: Chris Wilson Date: Fri Nov 4 13:26:13 2011 +0000 testdisplay: Round tiled allocations up to pot stride and fence size Be simple and use the strictest requirements from gen2/3 with old kernels so that this simply works everywhere. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=42585 commit 9c29be40bcb139ba57927fde954f66dcc4f0e6c8 Author: Jesse Barnes Date: Wed Nov 2 12:57:40 2011 -0700 testdisplay: find planes for each pipe Fixes a bug where we were masking against the wrong value. commit 3afb7b22d6388d13e7af293baa98cad6c3226aec Author: Jesse Barnes Date: Wed Nov 2 12:57:20 2011 -0700 testdisplay: update to new addfb2 definition commit 6f7e6c91009000ad4614609a4b2ebd0bf69ec751 Author: Daniel Vetter Date: Tue Nov 1 17:20:01 2011 +0100 cargo-cult the build system into shape Signed-Off-by: Daniel Vetter commit 593cb1874a7929909773ec5d95e4b1911ff27918 Author: Daniel Vetter Date: Tue Nov 1 17:04:44 2011 +0100 always require libdrm ... and also add the missing files to lib/Makefile.am Signed-Off-by: Daniel Vetter commit 37c64007345d4cf949746dd64b150162053de7cf Author: Daniel Vetter Date: Tue Nov 1 12:10:35 2011 +0100 tests/gem_tiled_pread: fixup detiler for gen2 Signed-Off-by: Daniel Vetter commit 6b4f5c7ad84cac32151e9acd0c1692b74cf33fb2 Author: Daniel Vetter Date: Tue Nov 1 11:52:53 2011 +0100 tests/gem_largeobject: accomodate for puny apertures ... like on my i855gm. Signed-Off-by: Daniel Vetter commit 7c8d41f4d959ee5f09c76272589f4e9b7872af52 Author: Ben Widawsky Date: Mon Oct 31 17:19:54 2011 -0700 i-g-t/debugger - make the debugger work with distcheck Signed-off-by: Ben Widawsky commit 15830ea54be914b1f4005154b2dcba52fa6b6120 Author: Ben Widawsky Date: Mon Oct 31 13:36:50 2011 -0700 i-g-t/debugger: Only allow the shader debugger if the user has specified a gen4asm Signed-off-by: Ben Widawsky commit 32910231514d938be269c3b087f0d444709b0466 Author: Daniel Vetter Date: Mon Oct 31 23:19:08 2011 +0100 tests: mark gem_bad_address as HANG Kills my little i855gm. Signed-Off-by: Daniel Vetter commit efd3a5d0b595b0e7f3a8a66fc61ecd67f4af8699 Author: Daniel Vetter Date: Mon Oct 31 17:40:37 2011 +0100 tests/debugfs_reader: fight bashism debian's dash doesn't like this. Signed-Off-by: Daniel Vetter commit cc85c4efb719f31812947616dad3c6e00af5a001 Author: Daniel Vetter Date: Mon Oct 31 16:08:02 2011 +0100 tests: actually add the drm client check script Ooops. Signed-Off-by: Daniel Vetter commit d4cc95b4578d2010cf6fecb6bb833c8dd83651b5 Author: Daniel Vetter Date: Mon Oct 31 16:04:34 2011 +0100 tests: check for other drm clients Signed-Off-by: Daniel Vetter commit 899496ba414067c72bbfb2dcdbf835977338db26 Author: Daniel Vetter Date: Sun Oct 30 23:20:12 2011 +0100 tests/gem_bad_length: disable broken batchbuffer Submitting random crap hangs the gpu. Suprise! Signed-off-by: Daniel Vetter commit 20ff3839e448ba383b73a227889445a35d197cdc Author: Daniel Vetter Date: Sun Oct 30 22:27:19 2011 +0100 tests: don't run kernel check from make check Add a new target test for that. Signed-off-by: Daniel Vetter commit 931aa17754bad046f9a1d870894468527cb10c17 Author: Daniel Vetter Date: Sun Oct 30 22:04:39 2011 +0100 tools: script to gather bug report data Signed-off-by: Daniel Vetter commit 91b3c7f3338370538feeb080c79a1f506823dee5 Author: Daniel Vetter Date: Sun Oct 30 21:24:12 2011 +0100 make distcheck fixes Signed-off-by: Daniel Vetter commit f361664df024e7d30ef94221304207991c2ebb6c Author: Daniel Vetter Date: Sun Oct 30 20:51:03 2011 +0100 tests: add test to read all debugfs files Catches a bunch of forcewake warnings on snb+ Signed-off-by: Daniel Vetter commit 5b8bbc950d411ea30ebe14e6d001f1eb3204f8b1 Author: Daniel Vetter Date: Sun Oct 30 20:45:42 2011 +0100 testdisplay: compile fix for !DRM_PLANES Signed-off-by: Daniel Vetter commit 5ef806bb5d4767eeeb6ec926b8af7044c98d47a0 Author: Daniel Vetter Date: Fri Oct 28 17:39:14 2011 +0200 tests: add gem_unref_active_buffers The crucial trick to reproduce the bug is that we need to have a decent pile of active bos to retire. Because we unref the bo after having it moved off the active list, our recursion depth in fdo bug #42180 is limited by the number of active objects that can retire at the same time. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=42180 Signed-off-by: Daniel Vetter commit 1f4c37a6e91c74553afe3e67ac5e4703c85e6dbc Author: Jesse Barnes Date: Fri Oct 28 05:25:53 2011 +0200 testdisplay: allow overlay plane to be moved & scaled at runtime For additional testing. Signed-off-by: Jesse Barnes commit 2b484c16dd477bfe35e41a52f6a47ae8f9ae28d0 Author: Jesse Barnes Date: Fri Oct 28 08:53:48 2011 -0700 intel_reg_dumper: handle 3 pipe configs when dumping HDMI config Could be on pipe A, B, or C. Signed-off-by: Jesse Barnes commit 234b5c40b13f3fd211bff07a046aee00611e1a4f Author: Jesse Barnes Date: Thu Oct 27 17:47:58 2011 -0700 testdisplay: add stub disable_planes() function To fix the compile with non-plane libdrms. Signed-off-by: Jesse Barnes commit 28d1be3f9bca0ef5fb87d5c8c45d71f7e94a4e2c Author: Daniel Vetter Date: Tue Oct 25 12:24:17 2011 +0200 tools/decode: decode XY_SCANLINES_BLT commit c2657e865f5c87a8ac64f75a560b6c0f01fe1a0d Author: Daniel Vetter Date: Tue Oct 25 12:15:27 2011 +0200 tools/decode: decode XY_SETUP_* cmds And extract decode code for br00 and br01. Signed-off-by: Daniel Vetter commit 24e60385febe8ce603a233c617cdcc5b3d3ea9ba Author: Jesse Barnes Date: Mon Oct 24 17:15:34 2011 +0200 testdisplay: add sprite scaling and location support Allow testdisplay to locate the sprite on the screen and potentially scale it using different crtc width/height vs the source width/height (determined by the resolution on the target pipe). Also fix exit, making sure we properly disable all the planes. Signed-off-by: Jesse Barnes commit d510953ef38de7017c87688b3f4f5a7924097488 Author: Daniel Vetter Date: Fri Oct 21 19:06:08 2011 +0200 tools/intel_error_decode: decode gen4+ fences Signed-off-by: Daniel Vetter commit 982d14e34b978b318ba0d92dd25d5b791375d0f3 Author: Daniel Vetter Date: Fri Oct 21 10:09:14 2011 +0200 tools/decode: properly decode gen6+ PIPE_CONTROL flags Signed-off-by: Daniel Vetter commit e0b264573074debc0b97b3d13f60de4c2c21186b Author: Chris Wilson Date: Tue Oct 18 14:05:54 2011 +0100 top: Avoid FPE by removing meaningless metric commit d2c95d118310374e5d0958b2cd85bc77479b307a Author: Eric Anholt Date: Fri Sep 23 14:47:44 2011 -0700 intel_reg_checker: New tool to accumulate checks for HW workarounds. The goal of this tool is to be usable as a test for whether something (suspend/resume, GPU reset, bugs, whatever) may have lost various required hardware setup specified in the docs. Reviewed-By: Eugeni Dodonov commit 5801e6b9118c5209f2e44e581776e1b078164f46 Author: Daniel Vetter Date: Tue Oct 18 16:30:56 2011 +0200 intel/decode: print out chipset gen ... instead of i965+ for almost everything that Intel is still selling. Signed-off-by: Daniel Vetter commit 92b1f2c96eaf51a793a267fa66fa0cc0b960de11 Author: Daniel Vetter Date: Tue Oct 18 15:54:31 2011 +0200 tools/decode: don't move around the display register section Signed-off-by: Daniel Vetter commit 6ed89f47ecefb334be6fd8a80d8e6f26ddc059f6 Author: Daniel Vetter Date: Tue Oct 18 15:49:41 2011 +0200 tools/decode: don't forget to print the name of the last ring Signed-off-by: Daniel Vetter commit e98f308994711b3bc22d70c782bdf800eb253a0f Author: Eugeni Dodonov Date: Mon Oct 17 17:48:18 2011 -0200 Allow intel_dump_decode to read data from stdin. Signed-off-by: Eugeni Dodonov commit f312f89f4ae65ee969ec30657724b1fd5a1ebd44 Author: Daniel Vetter Date: Mon Oct 17 19:41:42 2011 +0200 tools/intel_dump_decode: make devid parsing more useful We use hex for these! Signed-off-by: Daniel Vetter commit 73c2104070fc0e2cd8230075a75eed3a214bba06 Author: Daniel Vetter Date: Tue Oct 11 13:14:02 2011 +0200 tools/decode: retain the ring name Signed-off-by: Daniel Vetter commit 1c6511f7fb9b0117d2a1f4ebe489e5a0221c6d7b Author: Daniel Vetter Date: Sun Oct 16 21:13:34 2011 +0200 tests: add gem_hangcheck_forcewake Provokes the forcewake warning when the hangcheck runs and no one waits for the gpu (and hence holds the dev->struct_mutex). Signed-off-by: Daniel Vetter commit 2e9e27ce6b7b7cb2db39590265d08bd19386855d Author: Daniel Vetter Date: Sat Oct 15 13:46:19 2011 +0200 tests/gem_fence_trash: some retuning We actually want to test lru behaviour, so do a bit of work with the fence before yielding to the next thread (we use twice as many fences as there are, so yielding always is pretty bad, no matter how clever our fence stealing). Signed-off-by: Daniel Vetter commit b75451838a0b4315fa9494691c1615bce178d424 Author: Daniel Vetter Date: Sat Oct 15 13:09:36 2011 +0200 tests/gem_*_blits: reduce buffer count to not trash swap Signed-off-by: Daniel Vetter commit 62c542fd4e7f47d5216785e9a13054ce56973f28 Author: Eugeni Dodonov Date: Fri Oct 14 15:26:13 2011 -0300 Allow to output statistics to stdout. This allows intel_gpu_top to run both in statistics-collecting mode (collecting the per-ring statistics in gnuplot-friendly format) and ncurses top-like mode at the same time. It also allows to output the statistics directly to stdout, by using "-o -", so the results can be parsed directly via a popen() parsing. If you are using intel_gpu_top as previously (without any command-line arguments), it should change nothing for you. If you were using its logging facilities (e.g., the '-o file'), note that the logging will keep running, but the detailed top-like interface will be on the screen at the same time. Signed-off-by: Eugeni Dodonov commit eaaddc794bade33e0d7b0c94406102c9814c2c05 Author: Adam Jackson Date: Tue Oct 11 18:25:26 2011 -0400 bios_reader: Allow forcing the device ID with DEVICE=0xNNNN As a pleasant side effect you can now feed it an opregion dump and it'll decode without crashing. Signed-off-by: Adam Jackson commit 1708580217ed403f0abd086f15baddf98cb0fb5a Author: Jesse Barnes Date: Tue Oct 11 11:37:25 2011 -0700 intel_reg_dumper: use none instead of NULL if no port is assigned to TRANS_DP Makes the output a little more readable. commit 503cfa2707bca2c06895f51d50fa38218ff16aa7 Author: Jesse Barnes Date: Mon Oct 10 11:24:42 2011 -0700 Treat PPT like CPT as we do in the kernel Set the pch type to CPT if we detect a PPT as well. commit af6a25c187a0f1a340fad71bb1a019e087e2b1ae Author: Daniel Vetter Date: Wed Sep 28 10:05:56 2011 +0200 tests: disable storedw tests on !render According to docs, this should work with ppgtt and just convert to noops otherwise. In reality, it hangs the machine. So just disable these for the moment. Signed-Off-by: Daniel Vetter commit a2dfbbf3e70767bc4c67c18c9c14ab4f9646155e Author: Daniel Vetter Date: Wed Sep 28 10:02:57 2011 +0200 tools/decode: add missing shift to MI_SEM_MBOX decoder Signed-off-by: Daniel Vetter commit 17ceccedbf8c09368b72ecc4afe12f0d1e63837e Author: Paulo Zanoni Date: Fri Sep 16 18:06:27 2011 -0300 testdisplay: return 0 when successful We use the "ret" variable to check function return values, and these values are not necessarily 0 on the successful cases, so we need to reset "ret" after we finish using it. Signed-off-by: Paulo Zanoni Signed-Off-by: Daniel Vetter commit a167425b39c01a729ed3b2ef5a1d17e83edb720f Author: Paulo Zanoni Date: Thu Sep 15 15:18:40 2011 -0300 getstats: remove useless assertion getstats.c:48:2: warning: comparison of unsigned expression >= 0 is always true Signed-off-by: Paulo Zanoni Signed-off-by: Daniel Vetter commit ca2800f1d4d352304dccd33e9ab5c0e27e89a05a Author: Paulo Zanoni Date: Thu Sep 15 15:17:46 2011 -0300 drm_open_any: explain why we are abort()ing Signed-off-by: Paulo Zanoni [danvet: pimped error msg] Signed-off-by: Daniel Vetter commit 3ba12bbb2faf6cfd87eea96edf761f16ef8c4ab1 Author: Paulo Zanoni Date: Thu Sep 15 15:16:33 2011 -0300 testdisplay: remove wrong return statement It seems that the kernel patches required by the TEST_PLANES feature are still not upstream, so I didn't test this patch. Signed-off-by: Paulo Zanoni Signed-off-by: Daniel Vetter commit 7ead7ba3e6bcfa59203d63ac3cc66432853e02de Author: Paulo Zanoni Date: Thu Sep 15 15:14:18 2011 -0300 testdisplay: don't enter the main loop if dump_info or test_all_modes If calls inside update_display fail, the function returns and we don't quit the program if dump_info or test_all_modes. So we enter the main loop and keep waiting for user input, even on cases where we are not supposed to require user input. To fix this, we move the check to outside the update_display function. As a side effect, we also do cleanup instead of just exit(0) and we return 1 in case update_display failed. Signed-off-by: Paulo Zanoni Signed-off-by: Daniel Vetter commit 9fe1148c4b20cb80c86c64a81c4594d152d20be7 Author: Paulo Zanoni Date: Thu Sep 15 15:13:41 2011 -0300 testdisplay: test all modes if no option is provided Previously, when called without any arguments, the application required user input to finish. However, testdisplay is ran by "make check", and it is not a good idea to run a program that requires user input in "make check". So we change the default behavior to something that doesn't require user input. You can still access the previous behavior using the "-m" argument. Signed-off-by: Paulo Zanoni Signed-off-by: Daniel Vetter commit e450cf6d8aefc99bf9300092d50bae0d927490a1 Author: Paulo Zanoni Date: Thu Sep 15 15:12:48 2011 -0300 Add missing files to .gitignore Signed-off-by: Paulo Zanoni Signed-off-by: Daniel Vetter commit 19fef544ebcd7358633db56027f893cacca7ef88 Author: Paulo Zanoni Date: Thu Sep 15 15:10:52 2011 -0300 testdisplay: fix compiler warnings testdisplay.c:117:1: warning: comparison between signed and unsigned integer expressions testdisplay.c:125:1: warning: comparison between signed and unsigned integer expressions testdisplay.c:145:1: warning: comparison between signed and unsigned integer expressions testdisplay.c:1060:16: warning: comparison between signed and unsigned integer expressions Signed-off-by: Paulo Zanoni Signed-off-by: Daniel Vetter commit 733a1d9f3441eec77c272648d0df7eea010b8f44 Author: Daniel Vetter Date: Thu Sep 15 18:47:21 2011 +0200 tests/gem_mmap_gtt: also test gtt pwrite paths This needs a properly pre-faulted dst bo. Signed-off-by: Daniel Vetter commit ba2255a7e41cade707af36d3de0a59fbb41245e9 Author: Daniel Vetter Date: Wed Sep 14 14:58:55 2011 +0200 tests: build all tests by default Signed-off-by: Daniel Vetter commit d6ac159ba18756a63d22bf84be72e433d9ec04d2 Author: Daniel Vetter Date: Wed Sep 14 14:48:45 2011 +0200 tests: separate testcases in gem_bad_length Creating a zero-length bo should fail, so check that. Still run the minimal batchbuffer, but without the zero-length reloc. Signed-off-by: Daniel Vetter commit 2c380c2eac0562a5e8ebc1ed8aeca2192f60e885 Author: Daniel Vetter Date: Wed Sep 14 11:06:03 2011 +0200 tests: disable gem_bad_blit Hangs gen3 and simply writes garbage into the unmappable part of gtt on gen4+, which might cause issues later on. Signed-off-by: Daniel Vetter commit bbe635f0dc67e40fde1efb221b7e550952ad8a84 Author: Daniel Vetter Date: Tue Sep 13 20:57:04 2011 +0200 tests/gem_bad_length: dont throw garbage at the gpu It doesn't like it. Really. Signed-off-by: Daniel Vetter commit a5abe177468f3c1c93f869a7c33712c63b023f65 Author: Ben Widawsky Date: Tue Sep 13 08:54:33 2011 -0700 intel: we don't do distcheck for the debugger commit f91e2c2b7e5e7fd79ba4be3051914e4453d292d8 Author: Daniel Vetter Date: Tue Sep 13 17:20:12 2011 +0200 intel_gpu_dump: really kill it This is getting a bit hilarious ... Signed-off-by: Daniel Vetter commit c7a98ae2515e39a54c35bf3da978fec7f4b1235c Author: Daniel Vetter Date: Tue Sep 13 12:05:58 2011 +0200 intel_gpu_dump: also kill manpage Signed-off-by: Daniel Vetter commit 8d9792ce23087ac4cbee17fb93f9a75030abc7c6 Author: Daniel Vetter Date: Tue Sep 13 11:43:06 2011 +0200 tools: remove intel_gpu_dump Superseded by the kernel's i915_error_state dumping facility. Signed-off-by: Daniel Vetter commit e855dc222368f76b80b6685dcaa731b00ee1a0d6 Author: Daniel Vetter Date: Tue Sep 13 11:41:42 2011 +0200 tools: beef up intel_dump_decode - now also handles ascii dumps like i915_ringbuffer_data - getoptified - totally lazy binary detector Signed-off-by: Daniel Vetter commit 19d69955d2827ccf56c65d97a921e5c70f125ca0 Author: Daniel Vetter Date: Tue Sep 13 11:05:13 2011 +0200 tests: exit(77) to properly mark tests as SKIP Signed-off-by: Daniel Vetter commit 21ec8c78b3b8860b59e772416b5858ed6b41554f Author: Daniel Vetter Date: Mon Sep 12 20:56:13 2011 +0200 tests: mark gen3-only tests as such ... instead of hanging the gpu. Signed-off-by: Daniel Vetter commit b8245e18fe6a80e55aa0ece17d6b3a0cf3b1182c Author: Daniel Vetter Date: Mon Sep 12 20:45:06 2011 +0200 tests: add basic test for missed irqs Didn't catch any known bug, but can't hurt. Signed-off-by: Daniel Vetter commit fbf8950f6e04e5e000f1f099d75536d8e4fe0cad Author: Daniel Vetter Date: Wed Sep 7 09:31:00 2011 +0200 tests: check pipe_control coherency v2: proper support for gen6+ Signed-off-by: Daniel Vetter commit bf9f149a6d24355dd5959d3ad750678c4e1cd4b6 Author: Daniel Vetter Date: Mon Sep 12 20:33:58 2011 +0200 tools: add intel_gen Signed-off-by: Daniel Vetter commit 61b9806f4e7b92031491f2c4b3454c1f3afe418c Author: Daniel Vetter Date: Fri Sep 9 20:44:27 2011 +0200 tests: basic ring<->cpu and ring<->ring tests Using a dummy reloc that doesn't matter to trick the kernel into synchroizing the rings. v2: properly apply MI_NOOP workaround to MI_FLUSH_DW and switch to MI_COND_BATCH_BUFFER_END as a dummy command on the render ring to avoid PIPE_CONTROL errata. v3: somebody clever decided that in C, you cound from 1, i.e. I915_EXEC_RENDER == 1. It works now ... Signed-off-by: Daniel Vetter commit 32f49c7c0d91318c1993e381855ecf4bb02abc80 Author: Daniel Vetter Date: Thu Sep 8 10:50:37 2011 +0200 tests: split up gem_storedw_loop into ring specific variations Also start to shortly explain testcases with an easily-greppable header like this: /* * Testcase: * * [Possible further explanation.] * */ Signed-off-by: Daniel Vetter commit d1aae145a7d76775f9903f8dbba9a0d2bd8118bd Author: Daniel Vetter Date: Wed Sep 7 10:18:06 2011 +0200 tests/gem_storedw: disable on pre-gen6 Doesn't work. Signed-off-by: Daniel Vetter commit d42b7f9189680de4f137cae248ddb67f2310a26f Author: Daniel Vetter Date: Wed Sep 7 09:20:36 2011 +0200 lib/batch: hackish interface to run batches on specific rings Signed-off-by: Daniel Vetter commit 49cd753a77ab8ed9194f0e3ac2b5eadc803ef165 Author: Daniel Vetter Date: Tue Sep 6 21:16:21 2011 +0200 test/gem_storedw_*: tune some more MI_*/PIPE_CONTROL writes need to be in DOMAIN_INSTRUCTION, because that is what mesa uses and I plan to use this to work around a gen6 ppgtt issue. Also testing with intentionally b0rked GFX_MODE on my snb shows that we need to increase the loop counter a bit to reliably hit the tlb invalidation problem. Test still completes within a few seconds. Signed-off-by: Daniel Vetter commit 2a0b3488a0f3a715d2d654858ba0a638d71366c7 Author: Daniel Vetter Date: Fri Sep 9 17:22:28 2011 +0200 tools: decode some more MI_ ops Signed-off-by: Daniel Vetter commit 206e129af067b7a898515d8c26acc319e5c5f445 Author: Daniel Vetter Date: Fri Sep 9 10:10:07 2011 +0200 tools: decode MI_SEMAPHORE_MBOX Juggle the length check up to avoid duplication. Signed-off-by: Daniel Vetter commit 079f8390309d9dc59197f04cafbcbda6c711c346 Author: Daniel Vetter Date: Tue Sep 6 20:54:16 2011 +0200 tools/intel_gpu_dump: add hackish --devid parsing For bugreports and whatnotelse. Signed-off-by: Daniel Vetter commit 2a7778d4e3f4730572e4f22c39c85787daa73469 Author: Paulo Zanoni Date: Wed Aug 24 14:57:31 2011 -0300 gem_vmap_blits: fix compilation if I915_PARAM_HAS_VMAP is not defined Previously, "make check" failed because the main() function was not defined. Signed-off-by: Paulo Zanoni Tested-By: Eugeni Dodonov Signed-Off-by: Daniel Vetter commit 15cb28218786ae80101ad0f6cc5a21c1ad9e8d3e Author: Eugeni Dodonov Date: Mon Sep 5 20:04:17 2011 -0300 intel_gpu_top: access hardware before running profiling command Without this patch, intel_gpu_top will try to get access to the hardware after running the profiling command in the background. In case such access fails, the main process quits, but the background one will continue running. So let's move this test up, so it is done before we fork. Signed-off-by: Eugeni Dodonov commit 8ad08546e5d6189d2c778b6175e97b486332d37e Author: Eugeni Dodonov Date: Mon Sep 5 19:59:40 2011 -0300 intel_gpu_tools: describe -e option in usage screen This patch adds a short description of '-e' option to the usage screen. Signed-off-by: Eugeni Dodonov commit b9d7c3a087f0973bd98af02955082b9140d90c11 Author: Eugeni Dodonov Date: Mon Sep 5 19:50:52 2011 -0300 intel_gpu_top: adopt to kernel coding style This patch fixes adopts the code to the kernel coding_style. commit a483c97d910d18b0626591f770d212ca97e2f7a1 Author: Eugeni Dodonov Date: Mon Sep 5 19:41:24 2011 -0300 intel_gpu_top: support profiling user-specified commands This patch adds support for running intel_gpu_top to profile specific commands. The required command will be carried out in separate process, and main intel_gpu_top will leave when the child process will exit. Signed-off-by: Eugeni Dodonov commit c2983f24e34936fd9e0d513922af70485d579e61 Author: Eugeni Dodonov Date: Mon Sep 5 19:39:58 2011 -0300 intel_gpu_top: support non-interactive mode This patch adds support for non-interactive mode, invoked by running with '-o output' switch. In this case, no interactive output is being performed, but the execution statistics are being saved into the output file. The output file is generated in both human and gnuplot-readable format. Unlike interactive mode, where non-supported pipes and non-active registers are skipped, the content of such pipes and registers is recorded into the log file to simplify parsing and standardize the list of columns. Also, unlike interactive mode, the registers are not sorted according to the usage - this way, their variation over time can be analysed offline. Signed-off-by: Eugeni Dodonov commit 83047e9a5e7563bb7dd7085de5f27b55d3c2f16e Author: Eugeni Dodonov Date: Mon Sep 5 19:35:44 2011 -0300 This patch initializes the last_stats[] for registers prior to starting the monitoring itself. This way, the first measure will already contain the difference from the previous value instead of non-initialized value. Signed-off-by: Eugeni Dodonov commit f11f8d9aac77051a071b215910832b020d959858 Author: Eugeni Dodonov Date: Mon Sep 5 19:33:40 2011 -0300 Revert "intel_gpu_top: initialize monitoring statistics at startup" This reverts commit 431fe7803d37f344275fdaceb57c1fbaeee8541c. Will be replaced with more fine-grained commits. commit 431fe7803d37f344275fdaceb57c1fbaeee8541c Author: Eugeni Dodonov Date: Mon Sep 5 16:33:04 2011 -0300 intel_gpu_top: initialize monitoring statistics at startup This patch initializes the last_stats[] for registers prior to starting the monitoring itself. This way, the first measure will already contain the difference from the previous value instead of non-initialized value. Signed-off-by: Eugeni Dodonov commit 4b0a15e45d1823888cfed9a76e54036658ab8e61 Author: Eugeni Dodonov Date: Mon Sep 5 16:29:39 2011 -0300 intel_gpu_tool: initial support for non-screen output This patch adds initial support for non-stdio output, to be used for non-interactive monitoring. Signed-off-by: Eugeni Dodonov commit 09e4b0cd26e800c203c1de071b83d879a09bb0dc Author: Eugeni Dodonov Date: Mon Sep 5 16:23:11 2011 -0300 intel_gpu_top: suport command line parameters and variable samples per second This patch adds support for getopt, and adds two default parameters to it: -h to show usage notes; and -s to allow user to define number of samples to acquire per second. Manpage documentation is also adjusted accordingly. Signed-off-by: Eugeni Dodonov commit 6194c75c8f438d13f6535d70009658851929f39e Author: Eugeni Dodonov Date: Mon Sep 5 15:31:17 2011 -0300 intel_gpu_top: account for time spent in syscalls This allows intel_gpu_top to properly account for time spent inside system calls. Effectively, with previous implementation, intel_gpu_top could spent longer than 1s between consecutive measures. This attempts to minimize the extra time spent while polling for data. Signed-off-by: Eugeni Dodonov commit 922214f9869220373c3768cfcbd0e243e6ac07b6 Author: Jesse Barnes Date: Fri Aug 12 12:51:34 2011 -0700 tests: add store dword tests Add a couple of simple store dword tests to test memory coherence. gem_storedw_loop simply executes a batch that continually stores an incremented value to a target buffer object, checking the results after each batch completes. gem_storedw_batches_loop does the same thing, but creates a new command batch buffer for each iteration, which can exercise the buffer creation code. This test is based on one from Andrzej Kacprowski from Intel. Signed-off-by: Jesse Barnes commit 6857a1af816e18981515b942faaba65e85c40cc5 Author: Hai Lan Date: Fri Aug 5 00:47:25 2011 -0400 testdisplay: for tiled mode test, the height should be aligned Signed-off-by: Hai Lan commit e40c9c7faf7303201b8fbe8ff1ed1b17533d3c50 Author: Eric Anholt Date: Mon Aug 1 10:39:51 2011 -0700 Add missing copyright info to intel_decode.c commit 3b10b7bd5a8ce60aef06df5e61f0a0c30fb0fa10 Author: Ben Widawsky Date: Thu Jul 28 14:58:24 2011 -0700 tools: readme addition for shader debugging commit d0a7e0ab5a19b2f04f2692ec0e8874056c9b2d32 Author: Ben Widawsky Date: Thu Jul 28 15:07:28 2011 -0700 tools/range handing: forgot the register map file :( commit 62873796c4a96554cc139e9aa49e25ce19cd65cd Author: Ben Widawsky Date: Fri Jun 24 11:42:03 2011 -0700 intel-gpu-tools/debugging: shader debugger high level summary of the files: * debug_rdata - get current state from debug registers. Helpful when developing the debugger, and could serve some purpose in the future. * eudb - the debugger itself * eviction_macro - generate the proper macro to flush the EU render cache until I get control flow working * pre_cpp - an evaluating c preprocesser like thing, to be used before cpp * sr - the system routine, exception handler which runs on the EU * test - a very basic test system routine * debug.h commit e39b13d7e4174ec50fd41d74fe8d3375c8ef2850 Author: Ben Widawsky Date: Sun Jul 17 12:43:12 2011 -0700 intel-gpu-tools/debugging: add important debug regs Cc: Chris Wilson commit c82c1d68469ae99b40fa260a1b4c4debb9130515 Author: Ben Widawsky Date: Tue Jun 14 11:00:30 2011 -0700 intel-gpu-tools/forcewaked: sample forcewake app This app is required for debug features which seem to (undocumented) reset themselves if/when the GT goes to sleep. It is also useful for those doing general debugging or profiling from userspace when they do not wish to have the GT sleep. v2: made forcewaked more daemon-like Cc: Chris Wilson commit abd7038e5a814bb29398d6ea259815b293c62a2b Author: Ben Widawsky Date: Thu Jul 28 13:42:45 2011 -0700 intel-gpu-tools/range handling: register range handling Hooks to allow safe accesses from userspace. Can revert to old behavior by using unsafe access. commit cac8f8b52621f246a7cff412f340a7db28cb1b99 Author: Ben Widawsky Date: Thu Jul 28 13:40:19 2011 -0700 forcewake: Add mmio code to do proper forcewake stuff for gen6 commit 294927c601bf1af05d718e0b1ca092f9c8c8e19e Author: Chris Wilson Date: Wed Jul 20 20:40:13 2011 +0100 Add intel_backlight A trivial tool to adjust the backlight registers (gen5+ only atm). Signed-off-by: Chris Wilson commit 30ffcc34ea6bae238671c042d718ae7f05853022 Author: Chris Wilson Date: Wed Jul 20 20:39:56 2011 +0100 intel_decode: Handle a few gen7 blocks commit 74670c7bb9968a99d75a97c3677b15110281c94d Author: Daniel Vetter Date: Sun Jul 17 23:33:27 2011 +0200 gem_stress: ducttaping mandatory In other news: We've been missing a unmapping_mapping_range somewhere in the kernel. But lazy me never came around to digging up the real cause. Signed-off-by: Daniel Vetter commit 6cc92bcbc5301e79a9afa8f3dcbc73ec770be034 Author: Hai Lan Date: Tue May 31 17:13:30 2011 -0400 testdisplay: Test the first mode if there is no preferred mode. For a TV device, there might be no preferred mode. In this case, we can test the first mode. Signed-off-by: Hai Lan commit 25b25b907d8d6dc309c23fde136c35d4daee2643 Author: Chris Wilson Date: Fri Jul 8 15:01:39 2011 +0100 tests/gem_vmap_blits: Fix typo Why, oh why, do these only become obvious after pushing upstream? Signed-off-by: Chris Wilson commit 4c0176e49700401a568d592865d6f53649075ca7 Author: Chris Wilson Date: Fri Jul 8 14:55:36 2011 +0100 intel_reg_dumper: Slightly tidy the reporting of pipe configs Signed-off-by: Chris Wilson commit a0a0b6ab34f4413cc911d6e9b60e831f72a1e11a Author: Chris Wilson Date: Fri Jul 8 14:54:32 2011 +0100 Add a test case for coherency of vmaps Signed-off-by: Chris Wilson commit 75f7e81fbc65cd67500f0795228f6e03619e3a49 Author: Chris Wilson Date: Wed May 25 14:49:40 2011 +0100 gem_stress: Assert we have no pending ops when using the CPU Signed-off-by: Chris Wilson commit f40d54e132f84efa28b29723f90537e4731c6c92 Author: Chris Wilson Date: Wed May 25 14:40:38 2011 +0100 gem_gtt_speed: Add option for variable buffer size commit 4227da8c3cc6417c9d9600bddac938759f01ae03 Author: Chris Wilson Date: Sat Jul 2 08:59:32 2011 +0100 gem_stress: Add an option to test handling of signals As signals cause the syscalls to be interrupted, we often need to clean up partial state before returning to userspace. Often a source of unamusing bugs, so encourage gem_stress to provoke them. Signed-off-by: Chris Wilson commit 8908055da6a484058caa92c3c2ba3221cb9ce9d9 Author: Chris Wilson Date: Thu Jun 23 14:04:35 2011 +0100 tests: Add an exercise for zero-length buffers Triggers an OOPS with dmar enabled currently. Signed-off-by: Chris Wilson commit 9de433a471a0bf829a8143658e6b8d07fa896454 Author: Chris Wilson Date: Mon Jun 20 13:53:12 2011 +0100 tests: Add a simple exercise of GTT mmaps Test copying between 2 mappings and reading/writing from and to. References: https://bugs.freedesktop.org/show_bug.cgi?id=38115 Signed-off-by: Chris Wilson commit 336f85dafb6b11f24353544e12d4ddd7f1c10a73 Author: Daniel Vetter Date: Mon Jun 13 22:02:52 2011 +0200 gem_stress: some stats about incoherencies Signed-off-by: Daniel Vetter commit 10079566805f5d48edb09f7a9ed3fdea0ecee004 Author: Daniel Vetter Date: Mon Jun 13 20:14:53 2011 +0200 gem_stress: option to disable render copyfunc check Too noisy - which is an another way of saying too broken :( Signed-off-by: Daniel Vetter commit 5b253cee37b610a14d4d48a8bdde0df5a932be88 Author: Daniel Vetter Date: Mon Jun 13 20:09:38 2011 +0200 gem_stress: option for tile_size I want to know how large these corruptions can get! Signed-off-by: Daniel Vetter commit c0f34338e7bb3be473ff3afe70e17afbaa3a7958 Author: Daniel Vetter Date: Mon Jun 13 13:18:35 2011 +0200 gem_stress: option to set tiles per buffer gem_stress -p1 is much more evil than gem_stress -c1, it also manages to tear appart untiled workloads! Now duct-taping over it still works (--apply-duct-tape) ... hm. Signed-off-by: Daniel Vetter commit 6daa883fa3cf08363912fd46bce49177a3fa7c82 Author: Daniel Vetter Date: Mon Jun 13 00:22:01 2011 +0200 gem_stress: option to continue despite failures Signed-off-by: Daniel Vetter commit 9649dd7ef0bc55a027219347734b2bb13fe0fc71 Author: Daniel Vetter Date: Tue Jun 7 22:30:03 2011 +0200 gem_stress: option to override the number of rounds to complete gem_stress -c 1 ... sometimes takes a while to hit a problem. Signed-off-by: Daniel Vetter commit e0532d4eb0192f62d2fed29a67b830f122f356c2 Author: Chris Wilson Date: Wed Jun 8 12:13:46 2011 +0100 scripts: Add throttle.py Parses a trace.dat and works out how long each throttle was and how many batches retired within that period (and their average duration). Signed-off-by: Chris Wilson commit e235f932883316953a9b7a5bcc76ea3b775c3695 Author: Jesse Barnes Date: Tue Jun 7 13:32:37 2011 -0700 testdisplay: automatically enable TEST_PLANES if possible Just look for the ADDFB2 ioctl and enable the new code if it exists. commit 8969b839b544e73a9242adb025562b1dc9ec5916 Author: Jesse Barnes Date: Tue Jun 7 13:28:19 2011 -0700 testdisplay: fix error output if test pattern draw fails commit b707feb9d51bb3a2e7eb5f172afeae2ef13381e1 Author: Jesse Barnes Date: Tue Jun 7 13:27:35 2011 -0700 testdisplay: add tiled buffer test support Useful for testing tiled vs linear framebuffers. commit 7230c0142115b2ed6460e1b95cef97c0954b56c5 Author: Jesse Barnes Date: Tue Jun 7 13:17:46 2011 -0700 testdisplay: add overlay plane test option Enumerate available extra planes and try to use one on each CRTC we enable. commit 3ddc799fbf04e1c7c482c0879aa506c3c7a12c04 Author: Lan, Hai Date: Mon Jun 6 19:16:26 2011 -0700 testdisplay: fix possible_crtcs check so LVDS works When using testdisplay on GM965 and Pineview with LVDS, it will fail to set a mode because the first unused crtc can't be used for LVDS. So check the possible_crtcs to make sure the crtc can be used. Signed-off-by: Hai Lan commit 1095a825c0acaecf51f97741eacf14acd9bf901e Author: Daniel Vetter Date: Mon Jun 6 20:16:35 2011 +0200 gem_stress: avoid division by 0 Without this height would be 16 with the minimal buffer size. Signed-off-by: Daniel Vetter commit fde66f9bf4de6240422e64b24dd1a74577cd6128 Author: Daniel Vetter Date: Mon Jun 6 20:15:44 2011 +0200 gem_stress: disable fence storm when only using untiled buffers This explains why gem_stress -u worked beforehand - the rendercpy was not actually used! Signed-off-by: Daniel Vetter commit 7250328bb8b3d524cd39dee3fd48b6e17e3af24e Author: Daniel Vetter Date: Mon Jun 6 18:59:54 2011 +0200 gem_stress: round max_dimension down to the next pot Creates funny rounding problems otherwise. Signed-off-by: Daniel Vetter commit 3d66d913d9165f59e39952a41b41461b2329c9c1 Author: Chris Wilson Date: Sun Jun 5 21:53:49 2011 +0100 gem_stress: trim buffer sizes to fit into 3D pipeline Remember the 3D pipeline is much more restricted than the BLT engine, and we were feeding it buffers much larger than either the render engine or the sampler could manager. Signed-off-by: Chris Wilson commit 2933547eb0d22cb70c783a78ab3d7b4dcc5972ce Author: Chris Wilson Date: Sun Jun 5 21:35:34 2011 +0100 gem_stress: cpu maps force tiling to be disabled, so fix the printf Signed-off-by: Chris Wilson commit bfa23b47a57a89eb8adcde32ffe2849f0d2aac2e Author: Chris Wilson Date: Sun Jun 5 21:34:07 2011 +0100 gem_stress: Add extra passes to intial render copyfunc verification ...and allow for cpu maps! commit e7119c2e3bf73bd1029a668d167c16a0949fef70 Author: Chris Wilson Date: Sun Jun 5 19:10:14 2011 +0100 test/gen3_mixed_blits: Remember that the BLT engine cannot handle Y-tiling ...even through a fence that can. Signed-off-by: Chris Wilson commit 6f6cd8191392a9b6c5805524cbe3fd62937f76bb Author: Chris Wilson Date: Sun Jun 5 18:05:28 2011 +0100 test/gen3_mixed_blits: Alternately use fence regs for the render copies Signed-off-by: Chris Wilson commit 853d729598fddce3f1814cd7fc5e1020147b3f34 Author: Chris Wilson Date: Sun Jun 5 17:45:28 2011 +0100 test/gen3_mixed_blits: Acutally use fences for BLT Gah, in my excitement of reproducing the failure reported by gem_stress, I missed using fenced relocs for the BLT. Fortunately, it doesn't affect the presence of the error. Signed-off-by: Chris Wilson commit aadfcdfd4edbaa7f9912a6ec42215ddb6726c74a Author: Chris Wilson Date: Sun Jun 5 18:13:18 2011 +0100 decode: Fix segmentation fault The decode for A8 is incomplete and died with a segfault. First hide the segfault, latter fix the pretty printing. Signed-off-by: Chris Wilson commit f5e63b12a5881d112f8c757838167e05e1c13b88 Author: Chris Wilson Date: Sun Jun 5 17:23:09 2011 +0100 test: Add more gen3 render blitters ... and we have a winner: gen3_mixed_blits reproduces the issue Daniel Vetter originally found. It seems clear that we have some incoherence between the RENDER and BLT units on gen3 that no amount of MI_FLUSH can hide. Hmmm.... Signed-off-by: Chris Wilson commit 20b69039e816ed44ef30048c81a76def7028f0ba Author: Chris Wilson Date: Sun Jun 5 11:20:34 2011 +0100 test: Exercise gen3 render copies gem_stress is unhappy with tiled render copies on gen3. This is a simple little test to ensure that a set of pure copies with a working set larger than the aperture are handled correctly. Signed-off-by: Chris Wilson commit 3ca054c2259483f27ffaabd786215ea82a66f78f Author: Chris Wilson Date: Sat Jun 4 21:41:11 2011 +0100 tests: Add a fenced execbuffer thrash test Exercise a nasty corner-case in the reservation logic for the fence accounting. Signed-off-by: Chris Wilson commit 91f609741d7497c4bcc113e74028f9c4948d8b48 Author: Sun Yi Date: Mon May 30 18:20:30 2011 -0700 testdisplay: print pixel clock in mode debug output Print the pixel clock of each mode. commit 9b325c8a864efce172bdfaf82e251284f115e263 Author: Chris Wilson Date: Wed May 25 13:42:29 2011 +0100 Update gitignore Signed-off-by: Chris Wilson commit 4e1f2f5957d47458c39b7b32fcdacf2b5411d6b1 Author: Chris Wilson Date: Wed May 25 13:41:28 2011 +0100 gem_stress: '-b' option to disable BLT copyfunc Signed-off-by: Chris Wilson commit 719ffef7c39386c453614bc71e1af97904d3671b Author: Chris Wilson Date: Sun May 22 10:34:12 2011 +0100 gem_stress: Add render copyfunc for SandyBridge Signed-off-by: Chris Wilson commit d73cdde45afc41fb7b36829eda1af763af682ada Author: Eric Anholt Date: Fri May 6 12:15:50 2011 -0700 Add Ivybridge support to intel_gpu_dump and the BLT tests. commit a825173a5f2154b0491f7b5554c10ab7146b4592 Author: Jesse Barnes Date: Thu May 12 17:49:07 2011 -0700 testdisplay: add 30bpp support (#ifdef'd out until the next cairo release) commit a09dd09e00561739a10c83eb25ee9443f8bf79f6 Author: Jesse Barnes Date: Tue May 10 17:21:12 2011 -0700 Add Ivybridge device IDs Makes the reg dumper work better. commit 12de60a5e8db990c173b21857fe68ff74daa5679 Author: Jesse Barnes Date: Wed May 4 14:55:32 2011 -0700 testdisplay: don't read hotplug events from buffer before libudev Otherwise we'll just block rather than trying to update the display. Signed-off-by: Jesse Barnes commit b11d67a33baca467bebd53bf605bdeeee1f31e26 Author: Daniel Vetter Date: Wed Apr 27 22:13:29 2011 +0200 gem_stress: option to use cpu mappings This things just won't die (libva!!!), so add an option to test them. _Not_ meant to test snoopable mappings. Signed-off-by: Daniel Vetter commit 9bfda1a809b6606e06bb96158cc103e12428e9c2 Author: Hai Lan Date: Tue Apr 26 11:03:39 2011 +0800 Fix a bug of testing preferred mode Signed-off-by: Chris Wilson commit c56cd106f969d223b17e7d9a6113e63d6befd9bc Author: Jesse Barnes Date: Tue Apr 19 11:50:16 2011 -0700 testdisplay: add non-24 bit depth support Testing 16bpp is useful, and 30bpp will be added once cairo supports it. commit 0d3043f5f3cb7265e297a4e8386c7c0b2ec97d2d Author: Jesse Barnes Date: Mon Apr 18 16:48:27 2011 -0700 testdisplay: paint color gradients Helps identify dithering problems. commit a67091b220bd50ea4c1a6aaecbac816bbf331fcf Author: Daniel Vetter Date: Tue Apr 12 22:26:42 2011 +0200 gem_stress: option to only use x-tiling This seems to be another trick to massively improve correctness of the render blit. At least on my i945. Signed-off-by: Daniel Vetter commit f70a717482823e69637b4d91e216ae5756f07e0d Author: Ben Widawsky Date: Mon Apr 11 08:47:11 2011 -0700 Add C99 requirement to autoconf. snprintf is part of the C99 standard and is used in many places in the tools. Signed-off-by: Ben Widawsky commit afa940c39844f565d396b51deb6fd6e564751e49 Author: Daniel Vetter Date: Sat Apr 9 20:15:10 2011 +0200 Disable gem tests when libdrm is not available Quickly checked on ppc by Cyril Brulebois. Signed-off-by: Daniel Vetter commit 1c9ede3acbf62eab60e6f949a759e9e2e2e1014b Author: Daniel Vetter Date: Tue Apr 5 21:14:54 2011 +0200 intel_decode: drop unused code Signed-off-by: Daniel Vetter commit 841c551f12a522b8fdfbe2233ed1b8baa2f1c146 Author: Chris Wilson Date: Tue Apr 5 08:52:52 2011 +0100 decode: Correct a couple of mistakes in gen3 IMMEDIATE_STATE_1 Signed-off-by: Chris Wilson commit e68652cad6ec46b8dacbf5360f20dd03afab3ec9 Author: Daniel Vetter Date: Mon Apr 4 22:10:21 2011 +0200 gem_stress: option to disable tiling Of all the things I've tried, this seems to be the only thing to fix tile corruptions reliably on gen2&gen3 (safe for outright disabling the render copy). Signed-off-by: Daniel Vetter commit 272c8988079ce867f92bdf5df85f27ca46d15f27 Author: Daniel Vetter Date: Mon Apr 4 21:24:58 2011 +0200 gem_stress: clean up fence_storm That little snippet creapt in and magically made render copy work - by essentially disabling it. Restore order, everything incoherent again. Signed-off-by: Daniel Vetter commit aeb0b6f33c56766cf269e798742cb793ee4dcd5e Author: Daniel Vetter Date: Sun Apr 3 13:10:07 2011 +0200 gem_stress: extract emit_blt Signed-off-by: Daniel Vetter commit 4fcfc9f1020aad07060569be3fcedf446ff2d58f Author: Daniel Vetter Date: Thu Mar 31 23:30:17 2011 +0200 gem_stress: gen2 render copy Sometimes acts up like gen3 on my i855gm. Sometimes works flawless. Signed-off-by: Daniel Vetter commit a6751bac8dd05e2f04960d40b670d35d3b63704e Author: Daniel Vetter Date: Thu Mar 31 23:29:25 2011 +0200 gem_stress: split out gen3 render copy Header conflicts with other headers for different generations. Signed-off-by: Daniel Vetter commit 1baab2e43a40fe33606668c0be19ab772e25cc7a Author: Daniel Vetter Date: Wed Mar 30 21:46:04 2011 +0200 gem_stress: option to disable render copy It seems to be randomly broken, every boot in a slightly different way on my i945gme. Works quite well on my Q35. So add an option to disable it till this is resolved. Well, more testing seems to suggest that I've been hunting ghosts. Or maybe not and it works now simply because it's a different day. Anyway, leave this in for future testing. Signed-off-by: Daniel Vetter commit cd640cca6c0eb5936eaf48e43ebc5b3bf7278f6d Author: Daniel Vetter Date: Sun Mar 27 21:33:29 2011 +0200 gem_stress: render copy on gen3 Headers copied over from xf86-video-intel, code built after the Xrender support. Signed-off-by: Daniel Vetter commit 8ab88c9af062512dee6dc2c43d400a71b165c284 Author: Daniel Vetter Date: Sun Mar 27 16:17:54 2011 +0200 lib: execbuffer2 support Signed-off-by: Daniel Vetter commit 2374af20feaaeac849b9a506aeb1e8e9028e5ff7 Author: Daniel Vetter Date: Mon Mar 28 21:42:26 2011 +0200 gem_stress: fix set_tiling Signed-off-by: Daniel Vetter commit 6a860b75075e68eac786e1b4b8ec76b2dfbedb1a Author: Daniel Vetter Date: Tue Mar 29 19:23:35 2011 +0200 gem_stress: ad-hoc tile tracing Signed-off-by: root commit 130daf9cd072dd3cdb380a2578ff830cc022bd1b Author: Daniel Vetter Date: Sun Mar 27 15:37:26 2011 +0200 gem_stress: optin to set num_buffers Signed-off-by: Daniel Vetter commit 294c78f4ab3fea90cf8a09ec08095b200103b6e3 Author: Daniel Vetter Date: Sun Mar 27 15:25:12 2011 +0200 gem_stress: variable gpu busy load Signed-off-by: Daniel Vetter commit 22fe098bf5468931278e68c42280a583c3f714f2 Author: Daniel Vetter Date: Sun Mar 27 14:26:43 2011 +0200 gem_stress: getoptification Signed-off-by: Daniel Vetter commit 874163d5c8433012bcfd00e990c289fa6d2a64ce Author: Daniel Vetter Date: Sun Mar 27 14:02:49 2011 +0200 gem_stress: dump complete failed tile Signed-off-by: Daniel Vetter commit ad515f817a7e669ec1b7596c88a97349094728e8 Author: Daniel Vetter Date: Fri Mar 25 22:09:28 2011 +0100 Move gen5 blitter work-around to lib Suggested by Chris Wilson to prevent utterly strange gpu hangs. Signed-off-by: Daniel Vetter commit bfa6f5d94ffccfe00a6232e5adaf61d60c7cdde2 Author: Daniel Vetter Date: Fri Mar 25 21:54:02 2011 +0100 gem_stress: limit gtt_size to 256 gem_stress maps all buffers, so more only results in trashing (which should be handled with an option). Signed-off-by: Daniel Vetter commit 2aac22358feb217435bb4b77ae824db823435db0 Author: Daniel Vetter Date: Fri Mar 25 21:53:07 2011 +0100 gem_stress: implement gen5 blitter work-around ddx and mesa assume that this is issued after every blit command. Breaking that invariant results in a dying gpu. Signed-off-by: Daniel Vetter commit cfba9dd371bdf8031bf2bd77817a7a7976319e61 Author: Daniel Vetter Date: Fri Mar 25 20:42:57 2011 +0100 gem_stress: fix blitter_copy on gen4+ Utter fail at copy&pasting. Signed-off-by: Daniel Vetter commit d641f0fd42c2f59459641f039a8da7d3b2adbae8 Author: Forest Bond Date: Tue Mar 22 10:31:43 2011 -0400 intel_bios_dumper: handle rom_size == 0 Some versions of libpciaccess on Linux set rom_size to 0 for VGA devices. While this behavior may change, intel_bios_dumper should handle this situation to be compatible with current versions of the library. This fixes segmentation faults on affected systems. Signed-off-by: Forest Bond Signed-off-by: Chris Wilson commit 3f10ff85bd2bb65e49e52ec4f025dc977985b4b6 Author: Daniel Vetter Date: Mon Mar 21 22:13:18 2011 +0100 gem_stress: submit batch if there's only one fence left ... for a copy might use up to two fences! Signed-off-by: Daniel Vetter commit 652d9eb983c25caf4bac09aabafbf90aa9daddbf Author: Chris Wilson Date: Mon Mar 21 07:58:51 2011 +0000 stress: Distinguish between busy_bo and scratch_bo creation sizes The busy bo has a fixed size (1024x256, 32bpp) whereas the scratch bo may need to vary their size to exercise different features of fence allocation. Signed-off-by: Chris Wilson commit 80aae9b4244d02873e9f6221de70a4d9cbbc2504 Author: Daniel Vetter Date: Sun Mar 20 21:12:20 2011 +0100 gem_stress: pwrite/pread support And a few other things: - inline checking when copying tiles with the cpu, fails _much_ faster. - bo size seems to have a tremendous effect, put on the TODO. Signed-off-by: Daniel Vetter commit 08cf53703e79ec48e826af06fd6a5d5be847cb7c Author: Daniel Vetter Date: Sat Mar 19 21:34:55 2011 +0100 Add gem stress test Not where I want it to be, yet. And not as good as I've hoped in detecting broken kernels. Signed-off-by: Daniel Vetter commit 02014cee2aff72592107046328448a32374b18d3 Author: Daniel Vetter Date: Mon Mar 14 13:03:48 2011 +0100 Decode map state on gen2 At least the important stuff. Signed-off-by: Daniel Vetter commit cf5db1161a559798d789ae2aba2c9b8c101c7bdc Author: Daniel Vetter Date: Mon Mar 14 11:20:17 2011 +0100 Decode gen2/gen3 fences in the error_state Signed-off-by: Daniel Vetter commit afe492549d782fc58201268d119092e069d31a83 Author: Daniel Vetter Date: Sun Mar 6 00:12:03 2011 +0100 Decode 3DSTATE_CLEAR_PARAMETERS Signed-off-by: Daniel Vetter commit ad27fac946ca67d88bf12b40d6455c30daf1584b Author: Daniel Vetter Date: Sun Mar 6 00:11:50 2011 +0100 Small cleanups for immediate state S5 And a tiny fix. Signed-off-by: Daniel Vetter commit 84c32bd85cc9c6b066e3af53a0998104391f56cf Author: Chris Wilson Date: Sat Mar 5 09:01:01 2011 +0000 test: Mark gem_bad_batch as a known hang Signed-off-by: Chris Wilson commit 03c1e334b8cb06a9f548ec2e43baa79731c1c798 Author: Daniel Vetter Date: Fri Mar 4 16:41:07 2011 +0100 Fully decode sampler state Signed-off-by: Daniel Vetter commit f14877f2ded521f90d47aa9682f60d648eebeea9 Author: Daniel Vetter Date: Fri Mar 4 15:58:00 2011 +0100 Fully decode map state A few odd things were missing. Signed-off-by: Daniel Vetter commit 673d5bcea01bfcbf62a014bd13cc026bac3c6a8c Author: Daniel Vetter Date: Fri Mar 4 14:31:04 2011 +0100 Decode 3DSTATE_LOAD_INDIRECT The remaining stuff + cleanups. Signed-off-by: Daniel Vetter commit 75c403e9236cc03bc9c14ee7bf4f3d2ca8e4a93a Author: Daniel Vetter Date: Fri Mar 4 12:50:48 2011 +0100 Decode 3DSTATE_LOAD_INDIRECT S0-S4 Signed-off-by: Daniel Vetter commit 1e8713fdaa38ee384d916831e8bd5354ff664f46 Author: Daniel Vetter Date: Thu Mar 3 21:29:27 2011 +0100 Decode scissor state Not absolutely paranoid, who cares. Signed-off-by: Daniel Vetter commit 01ac8b90993eb28668d791e0b88df8bd5e93ee78 Author: Daniel Vetter Date: Thu Mar 3 21:23:13 2011 +0100 Decode 3DSTATE_DRAWING_RECTANGLE Signed-off-by: Daniel Vetter commit 05309ebfe43d54ae231676cabbee9a285ef6375a Author: Daniel Vetter Date: Thu Mar 3 21:20:26 2011 +0100 Decode MS3 tex format Signed-off-by: Daniel Vetter commit 1f35267948ef98c5685a02633784a5ca13e49718 Author: Chris Wilson Date: Wed Mar 2 16:06:00 2011 +0000 decode: Fix pretty printing of 3DSTATE_URB allocation size Signed-off-by: Chris Wilson commit 1c05f89cebb0d1fa5e0676bf88cc1cf0bdb4421c Author: Chris Wilson Date: Wed Mar 2 14:48:20 2011 +0000 decode: fix gen6 PS binding table update bit Signed-off-by: Chris Wilson commit eb777071d75e4bb50964d32e4c354021116ed9e9 Author: Daniel Vetter Date: Tue Mar 1 00:01:34 2011 +0100 Decode MS3 tex format Signed-off-by: Daniel Vetter commit 8348e69561f7300ef9eb4a154f0185f9da4fa651 Author: Daniel Vetter Date: Mon Feb 28 22:51:47 2011 +0100 Decode depth buffer format Signed-off-by: Daniel Vetter commit 14bed666f4f88ac2597ab5322a21e1846db21339 Author: Ben Widawsky Date: Tue Feb 22 09:25:29 2011 -0800 Add MI_SUSPEND_FLUSH instruction decode Signed-off-by: Ben Widawsky Signed-off-by: Chris Wilson commit 41570d9bf583d35687bab88ac88620af41404836 Author: Chris Wilson Date: Mon Feb 14 15:56:14 2011 +0000 Remove confusing use of IS_9XX ... and test for what we mean instead. Reported-by: Diego Celix Signed-off-by: Chris Wilson commit dac602b7b3678c82dd7bc41f258e6518efb8d6cd Author: Hai Lan Date: Fri Feb 11 23:25:36 2011 -0500 correct a mistyping for testdisplay For testing all mode, the sleep time should be sleep_between_modes Signed-off-by: Chris Wilson commit 28032382bce40392a98dd5ec71443a6f2bee7f27 Author: Chris Wilson Date: Fri Feb 11 10:56:41 2011 +0000 testdisplay: Remove deprecated GIO functions Signed-off-by: Chris Wilson commit 5534cb1c7566916a6bc39badf1eb4624399d542e Author: Chris Wilson Date: Fri Feb 11 10:48:04 2011 +0000 testdisplay: Clarify Move the loop operations around for test_all_modes so that it is clearly split up into the desired phases. Signed-off-by: Chris Wilson commit 62d516813afd36146df63746e7b83e86d2588c70 Author: Hai Lan Date: Fri Feb 11 11:14:15 2011 -0500 Add a test case into intel-gpu-tools for intel display driver validation. We have not a unified tool to check Intel display driver and we plan to use intel-gpu-tools/testdisplay to check Intel display driver even though some function tests can be found in libdrm/test. 3 new features are added:test all supported modes, force mode and dump mode info(dump mode info is based on libdrm/tests/modetest). [ickle: attack the whitespacing!] Signed-off-by: Chris Wilson commit d75f2632c11b4f694447c464690e52c37c7c0573 Author: Chris Wilson Date: Thu Feb 10 11:20:20 2011 +0000 intel_stepping: Include clocks in summary Signed-off-by: Chris Wilson commit 592b1a51ffa8944da1673e844bfccd0c40cf0a20 Author: Chris Wilson Date: Thu Feb 10 11:00:49 2011 +0000 tools/intel_bios_reader: use correct printf format for size_t intel_bios_reader.c: In function ‘dump_backlight_info’: intel_bios_reader.c:192:22: warning: format ‘%lu’ expects argument of type ‘long unsigned int’, but argument 2 has type ‘unsigned int’ [-Wformat] Signed-off-by: Chris Wilson commit 73dd92f85b6321a863dac2a1d22600ad03b3b5d9 Author: Chris Wilson Date: Thu Feb 10 10:59:54 2011 +0000 tools/intel_disable_clock_gating: Remove unused variable intel_disable_clock_gating.c: In function ‘main’: intel_disable_clock_gating.c:38:11: warning: unused variable ‘temp’ [-Wunused-variable] Signed-off-by: Chris Wilson commit 56167d8bfd7dcd6959e3f0465b09833f2906baec Author: Chris Wilson Date: Thu Feb 10 10:56:27 2011 +0000 tools: Do not install intel_gpu_dump It has been supersede by intel_error_decode for the user-facing role of obtaining debug info after a crash. Signed-off-by: Chris Wilson commit c407041ebbe0ad1944dc713ec342fd9b57efb8b2 Author: Chris Wilson Date: Thu Feb 10 10:54:39 2011 +0000 tools/intel_gpu_dump: Replace asprintf with snprintf The maximum filename is limited so we can simply use a large buffer rather than fail to check the error return from asprintf. Signed-off-by: Chris Wilson commit 2c9b293927b5f6bd48c71e2657ca5d7a524a59f8 Author: Chris Wilson Date: Thu Feb 10 10:50:48 2011 +0000 tests/intel_reg_dumper: Replace asprintf with snprintf Stops the compiler warning about not checking the potential error return from asprintf, which was a false positive anyway. Signed-off-by: Chris Wilson commit d4127e0e68315b668a4d9aea62ec43e03ccb86e7 Author: Chris Wilson Date: Wed Feb 9 10:24:39 2011 +0000 tests: Move potential machine killers away from distcheck Signed-off-by: Chris Wilson commit a5bbd5ea7122fef2c66980805c110e4f095406cb Author: Chris Wilson Date: Wed Feb 9 10:21:27 2011 +0000 tests/gem_exec_blt: Compile fix commit 68b64f1b399e712a3b96b91568dc2b6d7e9b35d9 Author: Javier Jardón Date: Tue Feb 8 22:33:12 2011 +0000 build: Update autotools configuration Replace deprecated macros and use the new libtool syntax Also use silent-rules to make the build option less verbose. commit 293dd478d713eee5cedfa04749c97d1aa850df3c Author: Chris Wilson Date: Tue Feb 8 12:04:17 2011 +0000 configure: Bump the libdrm dependency Whoops, should have done this ages ago for I915_EXEC_BLT Signed-off-by: Chris Wilson commit c91951de0e7b412fa02facf349c8912348cb1aa4 Author: Chris Wilson Date: Sun Feb 6 10:18:53 2011 +0000 gem_linear_blits,gem_tiled_blits: Add optional count Signed-off-by: Chris Wilson commit 0995b563341c9e34f4b6314c67d4671a516fb1b0 Author: Chris Wilson Date: Tue Feb 1 13:35:16 2011 +0000 Fix basic blt test for SNB Signed-off-by: Chris Wilson commit 0e50b972de4ea7e883b6cea608311fbd84b2961b Author: Chris Wilson Date: Sun Feb 6 10:12:42 2011 +0000 Fix typo excluding Ironlake from IS_INTEL Signed-off-by: Chris Wilson commit 74895a2344a3839c5c8f9b41438e226b9d72efc1 Author: Chris Wilson Date: Sat Feb 5 10:09:38 2011 +0000 gem_tiled_blits: Minor enhancements Include a simple series of blits that exhaust the aperture but have the maximum grace time between reuse. Signed-off-by: Chris Wilson commit 91b1c62a9c1e625d6c84cab354ed66d08239faa9 Author: Chris Wilson Date: Sat Feb 5 10:09:38 2011 +0000 gem_linear_blits: Minor enhancements Include a simple series of blits that exhaust the aperture but have the maximum grace time between reuse. Signed-off-by: Chris Wilson commit f343805d169a99f7daa12df88bdf3da7e7085482 Author: Chris Wilson Date: Wed Feb 2 10:32:52 2011 +0000 Simplify gem_linear_blits By doing everything manually we can indeed exercise the full GTT. Signed-off-by: Chris Wilson commit 9fd7e35c39a2fd82b95376c8a8a8424bc79f2d23 Author: Chris Wilson Date: Tue Feb 1 19:22:32 2011 +0000 Simple test to ensure that working sets larger than memory, just work. Based on gem_tiled_blit, but without the complication of the tiling. Signed-off-by: Chris Wilson commit 68a95f0e389096e7e4d87cd87dbb09edaca9909b Author: Chris Wilson Date: Tue Jan 25 16:34:08 2011 +0000 error decode: Search for first i915_error_state Handy for multi-GPU systems where the IGFX may not be first. Signed-off-by: Chris Wilson commit 3c5c8ba71c4c32dcac1cf0493210d21fc9b33c8a Author: Chris Wilson Date: Tue Feb 1 13:35:36 2011 +0000 Search for the first Intel dri device. This is vital in a multi-GPU system so that we only test the Intel card and not the discrete GPUs. Signed-off-by: Chris Wilson commit c1e9795050b1e4b76c7f9acd3cc5071f0ecb06ed Author: Chris Wilson Date: Tue Feb 1 11:12:40 2011 +0000 tests/gem_tiled_fence_blits: Ensure the bo count is odd In order to avoid a self-copy, the number of bo must not be even. Signed-off-by: Chris Wilson commit 371f87f2d825900484e34a8ec78272b9e62cbc02 Author: Chris Wilson Date: Tue Feb 1 10:53:57 2011 +0000 Exercise the whole aperture with tiled blits After full-gtt, gem_tiled_blits doesn't allocate enough to force eviction. So query the total aperture and accommodate. Also introduce a similar test that utilizes fences rather than use the BLT to perform the tiling and detiling. Signed-off-by: Chris Wilson commit 5fc09c82d40113a7ebf67b7dbc374c181d9fafe3 Author: Chris Wilson Date: Fri Jan 21 00:43:11 2011 +0000 Time blt vs pwrite Signed-off-by: Chris Wilson commit 07d59b308d1d71c350e99ac2a889e5d0110a69d8 Author: Chris Wilson Date: Thu Jan 20 22:10:10 2011 +0000 Add a simple test to execute n nop batches Signed-off-by: Chris Wilson commit ed385ea331b1d7d284c6e2e0165f01d1af1f4513 Author: Chris Wilson Date: Thu Dec 23 12:44:51 2010 +0000 Add a GTT timing test Using for basic benchmarking and diagnosing some mysterious slowdowns. Signed-off-by: Chris Wilson commit 281285ec702bceecaffbdcbc5c1a3cc4591e500c Author: Chris Wilson Date: Sat Jan 29 16:12:38 2011 +0000 bios: Parse SDVO panel DTDs Signed-off-by: Chris Wilson commit afaf5ef27cafad5a0fc0ad2fb870e1a7ea8743a1 Author: Chris Wilson Date: Sun Jan 9 14:01:47 2011 +0000 gpu-top: Correct computation of ring size Signed-off-by: Chris Wilson commit 98eb5a5e240fbdf8067c2bee48afe749feeca12f Author: Chris Wilson Date: Sun Jan 9 13:26:50 2011 +0000 error: Parse ring name before gtt_offset Signed-off-by: Chris Wilson commit d9ec63b1a0c41c96af676cd9d642bf622be1788f Author: Chris Wilson Date: Fri Jan 7 19:59:00 2011 +0000 intel_gpu_top: Include BLT ring Signed-off-by: Chris Wilson commit 5503ac9e1907ed905a29986d0db8beb468273827 Author: Chris Wilson Date: Fri Jan 7 19:42:29 2011 +0000 intel_gpu_top: Wake the GT power well to read gen6 ring registers Signed-off-by: Chris Wilson commit 4f20844247e72811c2f3655e24cb45dc920340d6 Author: Chris Wilson Date: Thu Dec 23 19:44:14 2010 +0000 error decode: print out class of chipset in the error report Signed-off-by: Chris Wilson commit f19a1942c2a3da4b65dff029ecfd9d20a132765d Author: Chris Wilson Date: Thu Dec 23 12:44:51 2010 +0000 Add a GTT timing test Using for diagnosing some mysterious slowdowns. Should include a variant for basic benchmarking... Signed-off-by: Chris Wilson commit 322563027cabbdbd21c1ecee4cec4b89b3028ce6 Author: Jesse Barnes Date: Tue Dec 21 12:06:00 2010 -0800 tools/bios_reader: try to dump more child device data Some of our device class defines were incorrect, and we were missing several recent ones, so fix those up and dump more child device data if we have it. commit 5406c633a006eb76a81b73d27cc3be1754b0718f Author: Jesse Barnes Date: Tue Dec 21 09:38:23 2010 -0800 tests: add display testing program Just a simple program to light up all detected outputs at their native mode and respond to hotplug events. commit 253acc34af6fb9976a8d54991560dec5920af20b Author: Eric Anholt Date: Thu Dec 16 16:42:52 2010 -0800 intel_disable_clock_gating: New tool for turning off clock gating on ILK. This is something I sometimes want to do in testing, to see if a mystery bug (say, 29172) is due to broken clock gating. Sadly, in this case it isn't. Note that it isn't supported on non-ILK chipsets yet. commit 19b412b37cd3474200a2c6fe0cdb11af0c0f98cb Author: Eric Anholt Date: Tue Nov 16 09:25:56 2010 +0800 intel_gpu_top: Print stats regs on Ironlake as well. commit 292ae4538a922f93eec1958b6073e83baab4e1c7 Author: Chris Wilson Date: Fri Dec 10 15:31:59 2010 +0000 error-decode: stdin is 0 not 1 Signed-off-by: Chris Wilson commit 94de0b46b5b2c80dc34a145ec47a34b13a1f7937 Author: Chris Wilson Date: Sat Dec 4 14:12:19 2010 +0000 decode: Add a couple of BLT MI. Signed-off-by: Chris Wilson commit 1e4cf7dbbe4fcc86c551567975f121589c721f97 Author: Chris Wilson Date: Sat Dec 4 11:41:30 2010 +0000 gpu-dump: Include BLT and BSD ringbuffers Signed-off-by: Chris Wilson commit 157207ada5d92ce47c03f64f953ee3955de164e1 Author: Chris Wilson Date: Fri Dec 3 00:41:43 2010 +0000 decode: Add some missing protection against short buffers for gen6 instr Signed-off-by: Chris Wilson commit 3dafead3f25cf2118637d131a9da1d06da4cae02 Author: Chris Wilson Date: Thu Dec 2 23:05:16 2010 +0000 dump-decode: allow specification of devid, i.e. gen Signed-off-by: Chris Wilson commit a3a78632bd1ae873b3946d22271d4002daccc34b Author: Chris Wilson Date: Wed Dec 1 21:51:59 2010 +0000 error-decode: Operate as a pipe and accept input from stdin Useful for feeding in compressed files from bugzilla: $ bzcat /tmp/i915_error_state.bz | intel_error_decode | less Next step would be to use gzfopen or bzfopen to automagically handle compressed files... Signed-off-by: Chris Wilson commit aa0a346deb208386e3f39253efd0693621841535 Author: Chris Wilson Date: Mon Nov 29 16:06:46 2010 +0000 decode: Improve parsing of i915 fixed-length indexed primitives Signed-off-by: Chris Wilson commit d4d769a4329f3f22842f8270fca46047bd4892ce Author: Chris Wilson Date: Tue Oct 26 10:59:18 2010 +0100 Prepare for split BLT ring on Sandybridge. Depends on libdrm 057fab3382c02af54126ce395c43d4e6dce9439a Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31123 Signed-off-by: Chris Wilson commit 8934395d9d3b5910a52785d69a8da4516c4d82a6 Author: Chris Wilson Date: Fri Oct 22 11:33:08 2010 +0100 Decode PGTBL_ER for i965 Signed-off-by: Chris Wilson commit 8a4fc850a820cb555dfe7c1a6ddd068cb0039308 Author: Chris Wilson Date: Fri Oct 1 22:22:28 2010 +0100 intel_gpu_top: Sample BSD rings as well as render Show how busy the GPU is when decoding video as well as rendering. Signed-off-by: Chris Wilson commit 4eef00a8fbb0602914e7bf903c78fecb4b888ef1 Author: Zhenyu Wang Date: Wed Sep 29 09:47:46 2010 +0800 decode: fix PS sample state change bit on sandybridge Signed-off-by: Zhenyu Wang commit dbc547dbb525827a53543267bd38451c475e7c54 Author: Zhenyu Wang Date: Mon Sep 27 13:34:52 2010 +0800 intel_decode: decode 3d commands for sandybridge Signed-off-by: Zhenyu Wang commit b95893820fd0b8e0af3d5c80110884acdb934666 Author: Zhenyu Wang Date: Mon Sep 27 13:24:52 2010 +0800 Add all sandybridge device ids Signed-off-by: Zhenyu Wang commit 7ab19ae6feb06fa8140a16333fc7670936af80ac Author: Jesse Barnes Date: Mon Sep 20 14:37:07 2010 -0700 intel_reg_dumper: eDP port is on the CPU, not PCH Made me think there was another register until I checked the offset. commit 4f12d8acbaa3a253d8b21d04bbfe17ed9ede6158 Author: Adam Jackson Date: Wed Sep 8 14:39:12 2010 -0400 bios_reader: Fix to work on non-Intel machines Actually, fix to work on _any_ machine where the ROM file doesn't match the GPU. Just extract the device ID from the ROM itself rather than look at the running system. Signed-off-by: Adam Jackson commit c09fa38c01e44581db37703bb6b8cf1b60b2d09f Author: Chris Wilson Date: Sun Sep 5 12:05:52 2010 +0100 reg dumper: Dump ILK panel fitting control debug registers Signed-off-by: Chris Wilson commit a462fa6e29bf64fd64d94274775f33b9918f5cbb Author: Chris Wilson Date: Sun Sep 5 10:53:12 2010 +0100 reg dumper: Fix ilk panel fitter filter shift Signed-off-by: Chris Wilson commit c935c6021449fa442c51858e3d9cd79e1cec62ab Author: Chris Wilson Date: Wed Aug 25 11:56:59 2010 +0100 tests: Fix fallout from s/EBADF/ENOENT/ in 2.6.36 After bf79cb914dbfe848add8bb76cbb8ff89110d29ff, drm uses ENOENT to report unknown handles buffer objects, update the tests accordingly. Fixes: Bug 29794 - some intel_gpu_tools cases fail https://bugs.freedesktop.org/show_bug.cgi?id=29794 Signed-off-by: Chris Wilson commit 14618620cc057293bce77f9a137a5f7df083beed Author: Chris Wilson Date: Wed Aug 25 11:55:25 2010 +0100 decode: Handle errors during parsing. Signed-off-by: Chris Wilson commit db91f220da8806a505e848ab35db7659b155fe1f Author: Chris Wilson Date: Wed Aug 25 11:54:54 2010 +0100 reg dumper: Add panel backlight detailed information Signed-off-by: Chris Wilson commit 74c8c8d6121cda1d91df29d471e58f6b68275a1c Author: Eric Anholt Date: Mon Jul 19 08:27:32 2010 -0700 intel_gpu_top: Fix the "limit printing to terminal height" again. commit 9e4ba53014f214750d8bba01f92bf3febf2ffb0d Author: Eric Anholt Date: Fri Jul 9 13:26:57 2010 -0700 intel_decode: Fix decode for gen6's moved VERTEX_ELEMENTS valid bit. commit aa4772c3c1c09f775e34e15533789094922f2e40 Author: Chris Wilson Date: Thu Jul 15 19:31:21 2010 +0100 dump decode: Add a non-installed program for decoding binary batchbuffer dumps. Rather than add yet another decoder into the drivers, I rather just emit a binary blob and use the decoder being developed here. As it is a pure debugging feature, lets not package it. Signed-off-by: Chris Wilson commit 2d1ad95423953c60fdc5b336d5dd1298ce2114c7 Author: Chris Wilson Date: Thu Jul 15 19:18:39 2010 +0100 error: Decode i915 PGTBL errors Signed-off-by: Chris Wilson commit cf255e382d147fe3ca450f0dcec3525190e7dcbc Author: Eric Anholt Date: Thu Jul 8 12:13:08 2010 -0700 intel_decode: Fix whitespace for importing to Mesa. commit b1e839d02652fcc5b19ee20d7feeb7e908df1c29 Author: Jesse Barnes Date: Wed Jun 30 02:02:49 2010 -0700 intel_reg_dumper: add some 945 MI reg dumping commit be6e1a53fc0fadedf24839e11d0bd2e0faca5126 Author: Adam Jackson Date: Wed Jun 30 11:18:00 2010 -0400 Use longer string padding in intel_reg_dumper on ironlake DIGITAL_PORT_HOTPLUG_CNTRL is 26 chars. Bump out to 30. Signed-off-by: Adam Jackson commit 439adf7a0af2613e13bf1b29b02ab084b39f072c Author: Adam Jackson Date: Wed May 5 11:46:27 2010 -0400 fix reg_dumper on systems without intel gpus commit 040fbc6ea3fd59024a41e85af273b0194901f27a Author: Chris Wilson Date: Tue Jun 15 13:05:48 2010 +0100 intel_reg_dump: Off-by-one in calculation of i965 fence pitch Signed-off-by: Chris Wilson commit 581205db44b834e8f056749819502fd833c1af10 Author: Zhenyu Wang Date: Thu Jun 3 10:31:04 2010 +0800 bios_reader: Fix SSC frequency parse for Ironlake/Sandybridge Signed-off-by: Zhenyu Wang commit 020abdb7cc52163a0f2dacd1b296b36ce1a31911 Author: Wu Fengguang Date: Mon Apr 19 13:13:06 2010 +0800 intel_audio_dump: add support for IbexPeak and CougarPoint Signed-off-by: Wu Fengguang Signed-off-by: Eric Anholt commit a52cbcbf5657a13e456af419c45a87b89bf56ca3 Author: Adam Jackson Date: Thu Apr 22 15:37:49 2010 -0400 bios reader: Decode device type from child device table Signed-off-by: Adam Jackson commit a5b1e98edb2f8f7f7f6449afaad8a1385cad3d4d Author: Chris Wilson Date: Fri Apr 16 22:23:44 2010 +0100 decode; Parse 3DSTATE_BUFFER_INFO Signed-off-by: Chris Wilson commit 5b9678e822b770825a4b17919a953009ac7abb02 Author: Chris Wilson Date: Thu Apr 15 09:53:00 2010 +0100 decode: Also override S2 for 3DPRIM_CLEAR_RECT 3DPRIM_CLEAR_RECT implicitly uses only VERTEX_XY and no texture coords. Signed-off-by: Chris Wilson commit c8f5ac542c91f2533db72abe30546df8fb8aee0f Author: Chris Wilson Date: Thu Apr 15 09:48:00 2010 +0100 decode: Use a valid S4 mask [VERTEX_XY] for 3DPRIM_CLEAR_RECT Signed-off-by: Chris Wilson commit 50b8272d0b28c1fde9e3ab07fcf011d14f41fb66 Author: Zhenyu Wang Date: Thu Apr 15 23:22:06 2010 +0800 update PCH HDMI debug info Signed-off-by: Zhenyu Wang commit eae80edbb3e6959d3acda963ee32db4f4a200533 Author: Zhenyu Wang Date: Thu Apr 15 01:25:50 2010 +0800 reg dump update for SNB/CPT Signed-off-by: Zhenyu Wang commit 2b40fc83d130d2850761aa1409e0716ace6dfe0b Author: Zhenyu Wang Date: Thu Apr 15 22:57:02 2010 +0800 Add PCH chipset type check for Cougarpoint Signed-off-by: Zhenyu Wang commit c3832aefbf9a4120f12283e3cb3e18d7daa04070 Author: Chris Wilson Date: Mon Apr 5 00:26:35 2010 +0100 decode: There are 4 unpreserved registers on i915, not 3. Signed-off-by: Chris Wilson commit 4278dc6e645c4b70b4029294e552aae5f57340ba Author: Chris Wilson Date: Wed Apr 14 22:30:58 2010 +0100 decode: CLEAR_RECT uses a fixed VERTEX_XY format. Signed-off-by: Chris Wilson commit 3d883c3d2576a460dd56dcb04b22d98022f3057b Author: Chris Wilson Date: Wed Apr 14 22:25:57 2010 +0100 decode: CLEAR_PARAMETERS has a fixed length bias of 5. Signed-off-by: Chris Wilson commit 58eb041970a6bd3732aaeb61cf427d0db088a663 Author: Chris Wilson Date: Thu Apr 8 12:00:00 2010 +0100 gitignore: Add missing intel_reg_snapshot commit 95374225e865da3a30153f73e8bb536700d15459 Author: Chris Wilson Date: Thu Apr 8 11:56:57 2010 +0100 Enable compilation on non-Intel, non-DRM systems. A few of the tools can be performed post-mortem from a different system, so it is useful to be able to compile those tools on those foreign systems. Obviously, any program to interact with the PCI device or talk to GEM will fail on a non-Intel system. Signed-off-by: Chris Wilson commit cd64e193299be4b9733a5e804cedd99e2072830f Author: Adam Jackson Date: Wed Mar 31 17:25:23 2010 -0400 intel_reg_dumper: Add support for reading register dumps from files Also add intel_reg_snapshot for creating such snapshots, and relevant documentation. Signed-off-by: Adam Jackson commit 2187ec2112750bb898416358ac5463eebbf30049 Author: Chris Wilson Date: Mon Apr 5 00:26:35 2010 +0100 decode: There are 4 unpreserved registers on i915, not 3. Signed-off-by: Chris Wilson commit 7682c42809078ad32552a2dae663510580158b28 Author: Eric Anholt Date: Wed Mar 24 12:01:00 2010 -0700 Fix INSTDONE1 bits on g4x, and use those on Ironlake too. commit b0ddd0688cccd41a4661a00bfd897a63f9a11279 Author: Eric Anholt Date: Wed Mar 24 11:40:07 2010 -0700 Add Ironlake INSTDONE bits. commit 7c9d69de5722fe492c3e06ec94d1c26013df2861 Author: Eric Anholt Date: Mon Mar 8 22:51:40 2010 -0800 intel_reg_dumper: Fix the i915 fence reg decode to not be pure lies. commit 4279006ff24376c47ed3efff95ed2239b0928954 Author: Chris Wilson Date: Sun Mar 21 19:33:45 2010 +0000 decode: Parse i915 MAP_STATE texture sizes and tiling Signed-off-by: Chris Wilson commit bfc2b5306fac21bda5fc09dbf031716fd53a0f78 Author: Chris Wilson Date: Thu Mar 4 21:56:04 2010 +0000 intel_error_decode: Pretty print i830 PGTBL_ER Signed-off-by: Chris Wilson commit f93dae8176d83791521eae23ab3c028cc7c93eee Author: Chris Wilson Date: Thu Mar 4 09:14:56 2010 +0000 decode: Fix length mask for LOAD_REGISTER_IMM. Signed-off-by: Chris Wilson commit bcaea4da8997ce09d580df351ae7919832882fc5 Author: Eric Anholt Date: Thu Feb 25 12:48:00 2010 -0800 intel_gpu_top: Print stats lines even when there's no done bit on the line. commit 9271e2256d7e86989587b001715fccc30400180e Author: Eric Anholt Date: Thu Feb 25 12:18:11 2010 -0800 intel_gpu_top: Print the vertex/primitive statistics on gen4+. This requires that the window be much wider. I'm not sure how we really want to lay out this interface usably, but so far giant windows are working well enough for me. commit c33f64ff955134aef2fc10cee4d48c6da4858549 Author: Chris Wilson Date: Thu Feb 25 18:52:15 2010 +0000 man: Add manpage for intel_error_decode A rudimentary manpage based on intel_gpu_dump for the simple tool for the post-processing of i915_error_state, intel_error_decode. commit 0e4e700c51fbed8f333f2642edadf1b46bf51cc5 Author: Eric Anholt Date: Tue Feb 23 17:04:29 2010 -0800 Fix a typo in intel_gtt(1). commit 17b8abdb6b9401768c9b1821ac33220d3b7eea5e Author: Eric Anholt Date: Tue Feb 23 17:00:54 2010 -0800 Add manpages for a bunch of recently-added tools. commit cb6bd9f73a6ff926cb4863c1fd3ad37a00f9c0b3 Author: Eric Anholt Date: Mon Feb 1 10:47:19 2010 -0800 Add decode for more Sandybridge packets. commit 291a576d72d234c42f5d9655ee0698f20eec8bd8 Author: Eric Anholt Date: Fri Jan 15 14:28:16 2010 -0800 Add support for Sandybridge INSTDONE regs. commit 67736dbc9435ab95ab4092d73a5b057039d14d30 Author: Eric Anholt Date: Fri Jan 15 14:28:02 2010 -0800 Add support for Sandybridge mobile chipset. commit 0fe5e9c1342a3baf9c15616febc74d203b43b2d4 Author: Eric Anholt Date: Fri Jan 15 14:27:41 2010 -0800 intel_gpu_dump: More SNB packets. commit 334f76d22de1098fb209c08c8ae45b8d71c4ed6a Author: Eric Anholt Date: Fri Jan 15 14:26:43 2010 -0800 intel_gpu_dump: Use the spec's names for the INSTDONE regs printed out. commit 35233864413ff74e26a29b7807ec7413cde6e7cc Author: Eric Anholt Date: Thu Dec 17 14:21:28 2009 -0800 Add Sandybridge decode for CMD_VIEWPORT_STATE_POINTERS commit 0a497420cd170e0eb1109dd03dab04232d7e9ce2 Author: Eric Anholt Date: Tue Dec 15 12:38:23 2009 -0800 Add Sandybridge STATE_BASE_ADDRESS decode. commit 24ea25de39cc2f4e9e2052f90f4e93ad98d98c19 Author: Eric Anholt Date: Tue Nov 3 16:15:25 2009 -0800 intel_gpu_dump: Add support for sandybridge DEPTH_BUFFER and BINDING_TABLEs. commit 613d1c48968bf5b6130d01a3408a70fc2d1307ee Author: Eric Anholt Date: Thu Oct 22 15:52:02 2009 -0700 Add some initial definitions for Sandybridge. commit c94174d106b0b7c97643309ec85d763b0429ef11 Author: Chris Wilson Date: Thu Feb 25 11:05:16 2010 +0000 decode: Parse MI_BATCH_BUFFER for i8xx Signed-off-by: Chris Wilson commit 0583c22cdfb71cb43153cf7c17aa775ae660f96c Author: Eric Anholt Date: Fri Feb 19 12:23:16 2010 -0500 Add intel_bios_dumper from the 2D driver. Last of the tools, finally! commit 22fd4c370c2a04702fd5fabd6bbd16988b4a8225 Author: Eric Anholt Date: Fri Feb 19 12:12:04 2010 -0500 Move the intel_lid tool from the 2D driver to here. commit 9eb4de10a1ff3df3a455efb63a51ea9d5480d72d Author: Chris Wilson Date: Fri Feb 12 13:28:40 2010 +0000 Add intel_error_decode. A simple variant of intel_gpu_dump that explicitly handles parsing of i915_error_state. Signed-off-by: Chris Wilson commit a5846bff27ccd4f148c883177c9516c3f06da4b0 Author: Eric Anholt Date: Mon Feb 1 15:02:24 2010 -0800 intel_gtt: Add intel_gtt from the 2D driver. We've used it several times in bringing up the AGP driver, so it seems useful to have aronud. commit 65f1f881b7a4a547c6ebdb75f8bddc99636210b9 Author: Chris Wilson Date: Thu Jan 28 22:52:50 2010 +0000 intel_gpu_dump: Parse ringbuffer info from i915_error_state Distinguish an inline ringbuffer [-- ringbuffer] dump, from batch buffers [-- gtt_offset] and separate it in the decoded output. Signed-off-by: Chris Wilson commit 6c1125d95804dafc72f16deafd345d7523d9dd24 Author: Zhenyu Wang Date: Thu Jan 21 09:39:29 2010 +0800 Remove extra aclocal flag after replace dolt and shave Signed-off-by: Zhenyu Wang commit 7daa481bb7cdb06630a42fe45c2a59d677cf8af1 Author: Zhao Yakui Date: Tue Jan 5 14:13:43 2010 +0000 reg_dump: Dump display port register on Ironlake Dump the display port register on Ironlake. Signed-off-by: Zhao Yakui Signed-off-by: Eric Anholt commit 97ffee66ae240fdebe8142f4f43687b1772a9350 Author: Zhenyu Wang Date: Tue Jan 12 14:04:43 2010 +0800 Pull bios_reader program from Xorg driver Signed-off-by: Zhenyu Wang commit 087d74b33544b07ec4413cd6622b2eb9b0dbfa73 Author: Zhenyu Wang Date: Wed Jan 6 13:43:54 2010 +0800 gitignore intel_audio_dump and intel_reg_read Signed-off-by: Zhenyu Wang commit 4cc8b0543a9afc3209ff02f5739f7a38ff484dd8 Author: Zhenyu Wang Date: Wed Jan 6 13:39:05 2010 +0800 Add 'intel_reg_read' tool This is a handy tool to just check state of one register, which might not bother to be included in intel_reg_dumper tool. And also take in Ben's original full range register dump with '-f' option. Signed-off-by: Zhenyu Wang commit 5afb8ff68b87c4ae00b2ac2c3124515c1c71272b Author: Chris Wilson Date: Tue Jan 5 12:33:17 2010 +0000 gpu_dump: Parse INSTDONE if seen inside a file. Signed-off-by: Chris Wilson commit e30f06fbb927a7348630d5c2ad64982068475b58 Author: Chris Wilson Date: Tue Jan 5 12:32:32 2010 +0000 reg: Include INSTPM in dump. Signed-off-by: Chris Wilson commit 55950195da6ab0cb6d931dae2733628a97286bde Author: Chris Wilson Date: Tue Jan 5 12:31:12 2010 +0000 decode/i965: Show byte lengths for buffers. Signed-off-by: Chris Wilson commit 7f63b95c06ee49afcc6547128f8d582b91694d40 Author: Shuang He Date: Mon Dec 14 14:10:02 2009 +0800 intel_gpu_top: Fix broken clock reporting. Signed-off-by: Eric Anholt commit 4e6400c4bbba2a35c7dc5396c69ca4444682b07f Author: Eric Anholt Date: Mon Nov 2 11:20:23 2009 -0800 Replace dolt and shave with using current autotools. commit b4b8aafc61f48be9c1bfef7cf2c055201aeb4711 Author: Kenneth Graunke Date: Tue Dec 8 22:38:18 2009 -0800 Limit printing to terminal height in intel_gpu_top. When using intel_gpu_top in a small terminal, the most important information (ring idle/busy units) scrolls off the top of the screen. This patch limits the number of lines printed to the terminal height so that the most idle units (at the bottom) are truncated instead. Signed-off-by: Kenneth Graunke commit 94a180c0c95d70983ca15ada1de5d8624a68211e Author: Chris Wilson Date: Mon Nov 30 15:20:29 2009 +0000 decode: Split decoder and reuse outside of intel_gpu_dump Introduce a second decoder that simpler operates on a file so that it can be run on dumped batchbuffers independent of the gpu. Signed-off-by: Chris Wilson commit 9e9c9f24f5d5520ab6a2451aab7dc81d2abc8cdf Author: Wu Fengguang Date: Fri Nov 6 11:06:22 2009 +0800 Add: tools/intel_audio_dump Signed-off-by: Zhenyu Wang Signed-off-by: Wu Fengguang commit b4ddf71a4ae45e24fc0947194048b56e45c18456 Author: Chris Wilson Date: Thu Oct 8 06:48:02 2009 +0100 Add: tools/intel_gpu_time A simple variant on time crossed with intel_gpu_top to estimate the amount of GPU activity during a program's execution time. The resource usage (sys+user, i.e. CPU %) is for the child, but the GPU measure is global. Hmm. Signed-off-by: Chris Wilson commit 40bff5071c8e5bce785f9c56b7d98f12fc3ae2c2 Author: Eric Anholt Date: Tue Oct 6 17:25:10 2009 -0700 Add intel_gpu_dump from the 2D driver. commit d48fc144cab31b0a776992b2a8eba30b101a21f4 Author: Eric Anholt Date: Mon Sep 21 15:00:56 2009 -0700 Bump to 1.0.2 for release. commit 15ba3a5fc6556ce408723e4a9f05b1830316115b Author: Carl Worth Date: Thu Sep 17 15:05:24 2009 -0700 Print unmatched opcode value for all 3D UNKNOWN messages This just simplifies one step for fixing up an incompletely-parsed dump. commit bbebf6b1c90b5c777e1a155818e3194e1c3889bc Author: Xiang, Haihao Date: Thu Sep 3 09:50:00 2009 +0800 Add support for new chips Signed-off-by: Xiang, Haihao commit b20efcf585af65b1cff8b76b8bac5af9252d9391 Author: Xiang, Haihao Date: Thu Sep 3 09:35:50 2009 +0800 CS FENCE in URB_FENCE is 11-bits wide Signed-off-by: Xiang, Haihao commit 84a877511f2a85274ef0f22ea01249b1440e95c5 Author: Xiang, Haihao Date: Thu Sep 3 09:33:36 2009 +0800 Fix the length of CONSTANT_BUFFER Signed-off-by: Xiang, Haihao commit 61237b98bb02479bfa9eefe5e6bf62a3ce9468f7 Author: Eric Anholt Date: Mon Jul 20 11:46:11 2009 -0700 intel_gpu_dump: Don't pretend we understand vertex formats on 8xx. commit b66d2feb6981c41fae9eea003e7e55ff531d1317 Author: Eric Anholt Date: Mon Jul 20 11:44:56 2009 -0700 intel_gpu_dump: Parse LOAD_STATE_IMMEDIATE_2 for 830. commit 7bc13bc00c028162dbf402a8ebda6203c50c3179 Author: Eric Anholt Date: Mon Jul 20 09:14:43 2009 -0700 intel_gpu_dump: Add IPEIR and PGTBL_ER to output. commit 56bdcd1d6b434cd37bfc47d295abaf37f0093c84 Author: Eric Anholt Date: Mon Jul 20 09:07:16 2009 -0700 Add INSTDONE bits for 830-865. commit 1cbfe0ea6aea4a1bef6528cb72308c9571636c62 Author: Eric Anholt Date: Thu Jul 16 14:15:47 2009 -0700 intel_gpu_dump: Fix decode for LOAD_STATE_IMMEDIATE_1 with S8 set. commit d9e28e63e5a11f0707516b2eff648b1c2c99598a Author: Eric Anholt Date: Mon Jul 13 10:03:17 2009 -0700 Add a manpage for intel_reg_write commit d83a417c0158b5385835d520c1ed46fd6e5fd683 Author: Chris Wilson Date: Thu Sep 3 10:58:59 2009 +0100 dump: Minor typo commit 8f3f862b961c5b28ccdb42faff7b279aafcec652 Author: Chris Wilson Date: Tue Sep 1 10:09:55 2009 +0100 Add gem_fence_thrash test This is a test case that overcommits fence registers between threads, which are copying from one fenced bo to another. In earlier versions of the driver this would cause excessive spinning as the first inactive (i.e. not in use by the GPU) would be used to service the next page. After all the fence registers had been allocated, in effect only the very first fence would then be used for all subsequent faults. commit 4839ee97875d07a27c28f39021178d2cf4b5d4b8 Author: Ben Gamari Date: Wed Jul 1 16:52:20 2009 -0400 Add CS_USB_STATE decoding commit 147f07b5c2248f57c75961b80e717bd83fcaa44b Author: Ben Gamari Date: Wed Jul 1 16:52:19 2009 -0400 Add CONSTANT_BUFFER decoding commit 357e43a4f1e1e4561fa1ced59c47e1b489b21b2b Author: Ben Gamari Date: Wed Jul 1 16:52:18 2009 -0400 Fix gs_fence output in URB_FENCE output commit e302d0fe89596ff5a12ae6b098ec5094154f9a4e Author: Ben Gamari Date: Wed Jul 1 16:52:17 2009 -0400 add realloc bits to URB_FENCE decoding commit 3fda98b4db5d0308cd6cbb984871ea52aca6cc5c Author: Carl Worth Date: Fri May 8 16:04:24 2009 -0700 Fix error message for case of kernel prior to 2.6.30 The error message was falsely claiming that a debugfs directory didn't exist, when it was supposed to report that the ringbuffer file did not exist within that directory. commit 324428ca82ce96e2e64b724682833baf16ee6616 Author: Eric Anholt Date: Tue Jun 30 18:05:57 2009 -0700 .gitignore: catch up to intel_reg_write addition commit eb239afeb7c04ffec6570959b050edda7131dcf2 Author: Eric Anholt Date: Tue Jun 30 17:52:43 2009 -0700 intel_gpu_dump: Add instdone register values and decoding. commit 3904b7c6a266538eaf749c90445970601239e0a2 Author: Eric Anholt Date: Tue Jun 30 17:13:27 2009 -0700 intel_gpu_top: Move instdone bit definitions to lib to share with _dump. commit 21b6f2600d2eda8e9c10ab9b123ebe79431779f7 Author: Eric Anholt Date: Tue Jun 23 19:35:19 2009 -0700 intel_gpu_dump: Use the correct IPEHR on pre-965. commit eafbad3707fcbe36cc37c4acd62b8612e82757ae Author: Eric Anholt Date: Tue Jun 23 18:43:59 2009 -0700 intel_gpu_dump: Add details on URB_FENCE. commit bf3b1a3da95a1190ad09a0007be6c4c45d76627b Author: Eric Anholt Date: Tue Jun 23 18:16:42 2009 -0700 Oops, fix up printed hw offset since the HEAD pointer fixup commit a18af8ed43b092408196948b1ec3d7f9a8d7065c Author: Eric Anholt Date: Tue Jun 23 17:10:44 2009 -0700 Add more 965 INSTDONE bits. This shows off the units that are stuck busy in the ut2004 hang. commit da2c7f35c7b3059e09b4ffe680975fac0d6eb7c0 Author: Eric Anholt Date: Tue Jun 23 16:22:41 2009 -0700 Correctly flag the acthd when it points within a packet. commit 12ceecf971e416fbd8be921ea187f68238878c0c Author: Eric Anholt Date: Tue Jun 23 16:21:34 2009 -0700 Add the acthd to the GPU dump. commit c25532cc613c9daf87e97d04aec2ad708bec9b3b Author: Ben Gamari Date: Wed Jun 10 23:13:40 2009 -0400 Add register writing tool Signed-off-by: Eric Anholt commit bbafc3d0bf851f0f1a2de6cdc7f2923a2387e775 Author: Jesse Barnes Date: Thu Jun 18 18:07:47 2009 -0700 Four new tests for error handling Add four new tests for error the error handling cases: - gem_bad_address - store to a bad address, should generate a protection or page table error - gem_bad_batch - try to execute a bad batch, should generate a protection, invalid instruction or page table error - gem_bad_blit - blit to an invalid location, should generated a protection or page table error - gem_hang - hang the GPU on an event that will never happen, test hang detection & recovery code commit 49c564ec2fa47f62d097c7dee42730ae43445f8b Author: Eric Anholt Date: Tue Jun 9 11:30:25 2009 -0700 Make the precentage bars fit in 80 columns. Signed-off-by: Eric Anholt commit 8c7be935443934297763af03f0b4b7fcd4999dde Author: Robert Bragg Date: Fri Apr 17 19:01:04 2009 +0100 A pedantic addition of a format string to a printf call The printf used to clear the screen didn't have a format string, this adds one to avoid a compiler warning. Signed-off-by: Eric Anholt commit 700e45a5225dbf06ada48c269d725458ceb347a6 Author: Robert Bragg Date: Fri Apr 17 18:52:23 2009 +0100 Adds unicode bars for quickly visualizing the busy percentages It can be a bit easier to digest the percentages with bar graphs than by scanning continually changing numbers. Signed-off-by: Eric Anholt commit 2f0c0aa8ae0649e8b05d74fed9115a4a62aa7e7f Author: Robert Bragg Date: Fri Apr 17 16:25:52 2009 +0100 Increases the sample frequency from 100/sec to 10,000/sec For a typical vsync locked application running at 60fps, sampling at just under twice a frame doesn't seem to give very stable lists of relevent hardware units because there are a number of units involved that may not be sampled one second to the next. This bumps the sample rate to 10,000 instead which is ~ 170 samples per frame so we tend to hit all the units involved. It also changes the report threshold to a sample count >= 1, so you don't see as many units with a percentage of 0. Signed-off-by: Eric Anholt commit 2a50faae7e9d674dac60b51101aa8bf653a0b7a3 Author: Robert Bragg Date: Sun Jun 7 23:26:18 2009 +0100 Revert "intel_gpu_top:print a visual clue on how big a certain use is" This reverts commit 5e13b98da1e7e31cffba84fd257002357d5f2682. We can print prettier graphs using unicode Signed-off-by: Eric Anholt commit 114763f4190260e326cf4e82806fc07c7022d934 Author: Eric Anholt Date: Thu Jun 4 14:38:17 2009 +0000 intel_gpu_top: Print GPU clock information, which seems interesting. commit 5e13b98da1e7e31cffba84fd257002357d5f2682 Author: Arjan van de Ven Date: Tue Apr 28 12:05:43 2009 +0100 intel_gpu_top:print a visual clue on how big a certain use is humans are pretty bad at reading percentages quicky; this patch adds a histogram capability to make it more visually clear as to which lines are big ticket items commit 0521bca629a1d350fd5807516cfa0f3d0fc215de Author: Eric Anholt Date: Tue May 19 16:48:40 2009 -0700 Bump version to 1.0.1 for release. commit 3365c8563a3e0ac0d86d01f956301a23a7d8dc92 Author: Eric Anholt Date: Tue May 19 16:32:39 2009 -0700 intel_gpu_dump: Stop decoding batchbuffers after MI_BATCH_BUFFER_END. commit 652d5518d6901f4ebe0f696b8d7e18b8edfc76ec Author: Eric Anholt Date: Tue May 19 16:26:35 2009 -0700 Add decode of gen4 PIPE_CONTROL commit b7d70fc1fdb8b1b29ce62a6d75c2aca2b5314b7e Author: Eric Anholt Date: Tue May 19 16:12:43 2009 -0700 Add decode of dest buffer variables (destination format) (cherry-pick from Mesa commit 0af7e9170fd7c0d906652378b9f78fe2ba9725ad) commit e71c6283022d91e3884374fa145b936cba330a66 Author: Eric Anholt Date: Tue May 19 16:09:08 2009 -0700 Add manpages for all installed binaries. commit 49cba961a2914df0d308ef22d257c9c60ecd02f7 Author: Eric Anholt Date: Tue May 19 15:53:55 2009 -0700 Add gem_largeobject to ignore. commit 433e1c85a0a512d2d58775bf10ddadeb43fe7ed8 Author: Jesse Barnes Date: Thu May 14 14:39:48 2009 -0700 tests: add large object test The large object test simply tries to allocate a 128M object, pin it, then pwrite the whole thing. This should make obvious any leaks on close or page pointer allocation failures. commit c9de42933223e53f326a46cffc98d24d540dc694 Author: Eric Anholt Date: Mon Apr 27 09:45:22 2009 -0700 Fix distcheck commit 49ccc2bfc21f89fdd1dd823969ad5ddd82b2e67e Author: Eric Anholt Date: Mon Apr 27 09:41:41 2009 -0700 .gitignore libtool junk commit 7583e811a57d72b47ec721fcc91b2f7ad0b6a770 Author: Eric Anholt Date: Mon Apr 27 09:39:05 2009 -0700 intel_gpu_top: Add ring information. commit 302d15f2e7cd77bf2bfef5a142688cdf07fc59fc Author: Eric Anholt Date: Mon Apr 27 09:35:40 2009 -0700 Add a test to try to fill the ring. Did this while trying to debug the Ubuntu DRI1+compiz issue. Didn't succeed in filling the ring. commit 28a1d6436e5067221b03c820c1b6fee2ef21d496 Author: Carl Worth Date: Mon Apr 13 14:35:11 2009 -0700 intel_gpu_dump: Use asprintf instead of a static-sized array Not that we're really concerned about buffer-overrun attacks against this utility, but still, good habits and clean code are always preferred. commit 5b8c19445cdd736d679e12be196cd4db0aac0cb1 Author: Carl Worth Date: Mon Apr 13 14:33:09 2009 -0700 intel_gpu_dump: Give a nicer message for missing batchbuffer-dumping code This is the case where debugfs is mounted, the dri/0 directory exists but there's no i915_ringbuffer_info file. Point the user toward upgrading the driver. commit 0a820610ee733f348f9331c677f74cc88bc46486 Author: Carl Worth Date: Mon Apr 13 14:06:00 2009 -0700 intel_gpu_dump: Mention filename in error message This helps for when the user makes a typo trying to pass a file or directory name to intel_gpu_dump. commit 660a20f611adb0a176cecce1b2abfe9ec5accd05 Author: Carl Worth Date: Mon Apr 13 14:02:04 2009 -0700 Add example command for mounting debugfs This is a nice opportunity to teach the user something, (and help our users to actually succeed in creating useful bug reports for us). commit 48888093b2da0b7809d465d111e9c0cc92bb6c5e Author: Eric Anholt Date: Sun Apr 12 18:03:25 2009 -0700 intel_gpu_dump: Add no-arguments automatic mode, and clean up comments. commit 5b40c86c9a714936938d19cc095f038ee904c94c Author: Eric Anholt Date: Sun Apr 12 17:49:31 2009 -0700 intel_gpu_dump: Dump ring, batch, and head/tail info when given the directory. commit d69042dde69ca4a04f5e949130026447b8890cfc Author: Eric Anholt Date: Sun Apr 12 17:04:31 2009 -0700 intel_gpu_dump: Decode the GTT offset of batchbuffers. commit 593a47f00e3c9cb3f748daae7d3fe04427c7e0c2 Author: Eric Anholt Date: Sun Apr 12 15:57:07 2009 -0700 intel_gpu_dump: Get the devid so we can decode correctly on gen4. commit b51588b9bd8a1a18a77d354b1c9fe4c841dff0f3 Author: Eric Anholt Date: Tue Apr 7 19:07:18 2009 -0700 Fix warning about assert in intel_batchbuffer.h commit 548a6a7fa2037415cade339252ed29a7f89ff9f7 Author: Eric Anholt Date: Tue Apr 7 16:21:16 2009 -0700 Add a test for reading tiled objects with pread. commit cd9ba0a3b6c5e11fcd2cb82914cb9d491309de89 Author: Eric Anholt Date: Tue Apr 7 16:18:11 2009 -0700 Add a test for pread after blitting to an object. This caught a bug with get_user_pages usage in the kernel, which would result in zeroes being read out of the object when faulting in a new page. commit 00c7571fce14135fa6bbe387ab4e7ce205d53c08 Author: Carl Worth Date: Tue Apr 7 16:22:46 2009 -0700 Add very preliminary intel_gpu_dump program Right now it requires a filename on the command line, (such as /debug/dri/0/i915_batchbuffers). We plan to make it smarter in the future by going out and collecting all the data it needs. commit 90ca63163d250e2d50d01aa06f9fc158c0fb6ced Author: Carl Worth Date: Thu Apr 2 11:53:38 2009 -0700 Add Eric's batchbuffer-decode code This comes from the 3D driver within mesa, with identically named files. In its new life here it will become a standalone program. commit 3b301df9ecf652d1d26fbcc5083cdfd70c800a8b Author: Eric Anholt Date: Fri Apr 3 14:23:06 2009 -0700 Add a regression test for tiled object blitting. commit cb5a35fe8ebe959291082a15395a619b40c562a7 Author: Eric Anholt Date: Mon Mar 30 19:17:12 2009 -0700 Add a couple of other intel_upload_blit_large variants for comparison. commit 7889abd2631b418d4bb9fb90a758f23f37d2f098 Author: Eric Anholt Date: Mon Mar 30 19:09:00 2009 -0700 intel_upload_blit_*: Fix reporting and generate junk instead of using random. Turns out that random completely overwhelmed the cost of the driver stuff in _large.c. I definitely want to generate data, but still be able to see the driver's responsibility. commit 614b165c60d695da424c1f42ecca53d95a32ca94 Author: Eric Anholt Date: Mon Mar 30 19:08:43 2009 -0700 Add intel_chipset.h to fix dist. commit ce4782dc9d387929babf2c96d795286c91b753fe Author: Eric Anholt Date: Fri Mar 27 16:11:50 2009 -0700 Move i810_reg.h to lib/intel_reg.h and get it disted. commit 0581738c7a02d45518d60924bd8cafa5446d4019 Author: Eric Anholt Date: Fri Mar 27 16:04:25 2009 -0700 tests/: warning fixes commit 1eabfa9a142a314adeaba7a691e9cf85e026f79c Author: Eric Anholt Date: Fri Mar 27 16:03:12 2009 -0700 rename project commit 676a1097234bdb4661c65565c3d568fb8cfc0e94 Author: Eric Anholt Date: Fri Mar 27 16:03:02 2009 -0700 readme fixups commit 3ba49a9295370cbcbb3139674556ea723c1a6b6c Author: Eric Anholt Date: Fri Mar 27 13:13:47 2009 -0700 intel_gpu_top: Add more 965 bits. commit fbbf124f8d01365078328910cf9375e08767a57e Author: Eric Anholt Date: Fri Mar 27 12:25:09 2009 -0700 Port intel_idle from 2D driver as intel_gpu_top with a better interface. commit 872713057a7bf02afaab89832d85c0401b4bb510 Author: Eric Anholt Date: Fri Mar 27 11:07:33 2009 -0700 intel_stepping: Add G45 and GM45. commit 29777a542b8db659cf539af72b17fe17a44c2aae Author: Eric Anholt Date: Fri Mar 27 10:59:09 2009 -0700 Add intel_stepping from the 2D driver. commit 895a415909188e7bddb8571fe5db69cf91ee1383 Author: Eric Anholt Date: Thu Mar 26 18:47:42 2009 -0700 Add the tests we want from libdrm. commit ec172167d6992b2f9b59f79b57b7a346b75317ba Author: Eric Anholt Date: Thu Mar 26 18:45:01 2009 -0700 Fix project name/version for distfiles. commit 6abc9b13f0b87f9af82d9b46ad84d74648b46a97 Author: Eric Anholt Date: Thu Mar 26 18:44:13 2009 -0700 Add notes about running things as root. commit 8c64183a461a422b0443f84622af48858d5fe6ed Author: Eric Anholt Date: Thu Mar 26 17:15:11 2009 -0700 Initial import of intel-graphics-tools with some microbenchmarks. intel-gpu-tools-1.14/demos/0000755000175000017500000000000012665337377012634 500000000000000intel-gpu-tools-1.14/demos/Makefile.in0000644000175000017500000005351612665336443014624 00000000000000# Makefile.in generated by automake 1.15 from Makefile.am. # @configure_input@ # Copyright (C) 1994-2014 Free Software Foundation, Inc. # This Makefile.in is free software; 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mostlyclean-libtool pdf pdf-am ps ps-am \ tags tags-am uninstall uninstall-am uninstall-binPROGRAMS .PRECIOUS: Makefile # Tell versions [3.59,3.63) of GNU make to not export all variables. # Otherwise a system limit (for SysV at least) may be exceeded. .NOEXPORT: intel-gpu-tools-1.14/demos/Makefile.am0000644000175000017500000000046212665336131014575 00000000000000bin_PROGRAMS = \ intel_sprite_on \ $(NULL) AM_CPPFLAGS = -I$(top_srcdir) -I$(top_srcdir)/lib AM_CFLAGS = $(DRM_CFLAGS) $(PCIACCESS_CFLAGS) $(CWARNFLAGS) $(CAIRO_CFLAGS) $(LIBUNWIND_CFLAGS) LDADD = $(top_builddir)/lib/libintel_tools.la $(DRM_LIBS) $(PCIACCESS_LIBS) $(CAIRO_LIBS) $(LIBUNWIND_LIBS) intel-gpu-tools-1.14/demos/intel_sprite_on.c0000644000175000017500000006432112665336131016106 00000000000000/* * Copyright © 2012 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * * Author: * Armin Reese */ /* * This program is intended for testing sprite functionality. */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "i915_drm.h" #include "drmtest.h" #include "igt_kms.h" #include "ioctl_wrappers.h" /* * Mode setting with the kernel interfaces is a bit of a chore. * First you have to find the connector in question and make sure the * requested mode is available. * Then you need to find the encoder attached to that connector so you * can bind it with a free crtc. */ struct connector { uint32_t id; int mode_valid; drmModeModeInfo mode; drmModeEncoder *encoder; drmModeConnector *connector; int crtc; int pipe; }; static void dump_mode(drmModeModeInfo *mode) { printf(" %s %d %d %d %d %d %d %d %d %d 0x%x 0x%x %d\n", mode->name, mode->vrefresh, mode->hdisplay, mode->hsync_start, mode->hsync_end, mode->htotal, mode->vdisplay, mode->vsync_start, mode->vsync_end, mode->vtotal, mode->flags, mode->type, mode->clock); } static void dump_connectors(int gfx_fd, drmModeRes *resources) { int i, j; printf("Connectors:\n"); printf("id\tencoder\tstatus\t\ttype\tsize (mm)\tmodes\n"); for (i = 0; i < resources->count_connectors; i++) { drmModeConnector *connector; connector = drmModeGetConnector(gfx_fd, resources->connectors[i]); if (!connector) { printf("could not get connector %i: %s\n", resources->connectors[i], strerror(errno)); continue; } printf("%d\t%d\t%s\t%s\t%dx%d\t\t%d\n", connector->connector_id, connector->encoder_id, kmstest_connector_status_str(connector->connection), kmstest_connector_type_str(connector->connector_type), connector->mmWidth, connector->mmHeight, connector->count_modes); if (!connector->count_modes) continue; printf(" modes:\n"); printf(" name refresh (Hz) hdisp hss hse htot vdisp vss vse vtot flags type clock\n"); for (j = 0; j < connector->count_modes; j++) dump_mode(&connector->modes[j]); drmModeFreeConnector(connector); } printf("\n"); } static void dump_crtcs(int gfx_fd, drmModeRes *resources) { int i; printf("CRTCs:\n"); printf("id\tfb\tpos\tsize\n"); for (i = 0; i < resources->count_crtcs; i++) { drmModeCrtc *crtc; crtc = drmModeGetCrtc(gfx_fd, resources->crtcs[i]); if (!crtc) { printf("could not get crtc %i: %s\n", resources->crtcs[i], strerror(errno)); continue; } printf("%d\t%d\t(%d,%d)\t(%dx%d)\n", crtc->crtc_id, crtc->buffer_id, crtc->x, crtc->y, crtc->width, crtc->height); dump_mode(&crtc->mode); drmModeFreeCrtc(crtc); } printf("\n"); } static void dump_planes(int gfx_fd, drmModeRes *resources) { drmModePlaneRes *plane_resources; drmModePlane *ovr; int i; plane_resources = drmModeGetPlaneResources(gfx_fd); if (!plane_resources) { printf("drmModeGetPlaneResources failed: %s\n", strerror(errno)); return; } printf("Planes:\n"); printf("id\tcrtc\tfb\tCRTC x,y\tx,y\tgamma size\n"); for (i = 0; i < plane_resources->count_planes; i++) { ovr = drmModeGetPlane(gfx_fd, plane_resources->planes[i]); if (!ovr) { printf("drmModeGetPlane failed: %s\n", strerror(errno)); continue; } printf("%d\t%d\t%d\t%d,%d\t\t%d,%d\t%d\n", ovr->plane_id, ovr->crtc_id, ovr->fb_id, ovr->crtc_x, ovr->crtc_y, ovr->x, ovr->y, ovr->gamma_size); drmModeFreePlane(ovr); } printf("\n"); return; } static void connector_find_preferred_mode(int gfx_fd, drmModeRes *gfx_resources, struct connector *c) { drmModeConnector *connector; drmModeEncoder *encoder = NULL; int i, j; /* First, find the connector & mode */ c->mode_valid = 0; connector = drmModeGetConnector(gfx_fd, c->id); if (!connector) { printf("could not get connector %d: %s\n", c->id, strerror(errno)); drmModeFreeConnector(connector); return; } if (connector->connection != DRM_MODE_CONNECTED) { drmModeFreeConnector(connector); return; } if (!connector->count_modes) { printf("connector %d has no modes\n", c->id); drmModeFreeConnector(connector); return; } if (connector->connector_id != c->id) { printf("connector id doesn't match (%d != %d)\n", connector->connector_id, c->id); drmModeFreeConnector(connector); return; } for (j = 0; j < connector->count_modes; j++) { c->mode = connector->modes[j]; if (c->mode.type & DRM_MODE_TYPE_PREFERRED) { c->mode_valid = 1; break; } } if (!c->mode_valid) { if (connector->count_modes > 0) { /* use the first mode as test mode */ c->mode = connector->modes[0]; c->mode_valid = 1; } else { printf("failed to find any modes on connector %d\n", c->id); return; } } /* Now get the encoder */ for (i = 0; i < connector->count_encoders; i++) { encoder = drmModeGetEncoder(gfx_fd, connector->encoders[i]); if (!encoder) { printf("could not get encoder %i: %s\n", gfx_resources->encoders[i], strerror(errno)); drmModeFreeEncoder(encoder); continue; } break; } c->encoder = encoder; if (i == gfx_resources->count_encoders) { printf("failed to find encoder\n"); c->mode_valid = 0; return; } /* Find first CRTC not in use */ for (i = 0; i < gfx_resources->count_crtcs; i++) { if (gfx_resources->crtcs[i] && (c->encoder->possible_crtcs & (1<crtc = gfx_resources->crtcs[i]; c->pipe = i; gfx_resources->crtcs[i] = 0; c->connector = connector; } static int connector_find_plane(int gfx_fd, struct connector *c, unsigned int **sprite_plane_id) { drmModePlaneRes *plane_resources; drmModePlane *ovr; int i, sprite_plane_count = 0; plane_resources = drmModeGetPlaneResources(gfx_fd); if (!plane_resources) { printf("drmModeGetPlaneResources failed: %s\n", strerror(errno)); return 0; } /* Allocating buffer to hold sprite plane ids of the * current connector. */ *sprite_plane_id = (unsigned int *) malloc(plane_resources->count_planes * sizeof(unsigned int)); for (i = 0; i < plane_resources->count_planes; i++) { ovr = drmModeGetPlane(gfx_fd, plane_resources->planes[i]); if (!ovr) { printf("drmModeGetPlane failed: %s\n", strerror(errno)); continue; } /* Add the available sprite id to the buffer sprite_plane_id. */ if (ovr->possible_crtcs & (1 << c->pipe)) { (*sprite_plane_id)[sprite_plane_count++] = ovr->plane_id; } drmModeFreePlane(ovr); } return sprite_plane_count; } static int prepare_primary_surface(int fd, int prim_width, int prim_height, uint32_t *prim_handle, uint32_t *prim_stride, uint32_t *prim_size, int tiled) { uint32_t bytes_per_pixel = sizeof(uint32_t); uint32_t *prim_fb_ptr; if (bytes_per_pixel != sizeof(uint32_t)) { printf("Bad bytes_per_pixel for primary surface: %d\n", bytes_per_pixel); return -EINVAL; } if (tiled) { int v; /* Round the tiling up to the next power-of-two and the * region up to the next pot fence size so that this works * on all generations. * * This can still fail if the framebuffer is too large to * be tiled. But then that failure is expected. */ v = prim_width * bytes_per_pixel; for (*prim_stride = 512; *prim_stride < v; *prim_stride *= 2) ; v = *prim_stride * prim_height; for (*prim_size = 1024*1024; *prim_size < v; *prim_size *= 2) ; } else { /* Scan-out has a 64 byte alignment restriction */ *prim_stride = (prim_width * bytes_per_pixel + 63) & ~63; *prim_size = *prim_stride * prim_height; } *prim_handle = gem_create(fd, *prim_size); if (tiled) gem_set_tiling(fd, *prim_handle, I915_TILING_X, *prim_stride); prim_fb_ptr = __gem_mmap__gtt(fd, *prim_handle, *prim_size, PROT_READ | PROT_WRITE); if (prim_fb_ptr != NULL) { // Write primary surface with gray background memset(prim_fb_ptr, 0x3f, *prim_size); munmap(prim_fb_ptr, *prim_size); } return 0; } static void fill_sprite(int sprite_width, int sprite_height, int sprite_stride, int sprite_index, void *sprite_fb_ptr) { __u32 *pLinePat0, *pLinePat1, *pLinePtr; int i, line; int stripe_width; stripe_width = ((sprite_width > 64) && (sprite_height > 64)) ? (sprite_index + 1) * 8 : (sprite_index + 1) * 2; // Note: sprite_stride is in bytes. pLinePat0 and pLinePat1 // are both __u32 pointers pLinePat0 = sprite_fb_ptr; pLinePat1 = pLinePat0 + (stripe_width * (sprite_stride / sizeof(*pLinePat0))); for (i = 0; i < sprite_width; i++) { *(pLinePat0 + i) = ((i / stripe_width) & 0x1) ? 0 : ~0; *(pLinePat1 + i) = ~(*(pLinePat0 + i)); } for (line = 1; line < sprite_height; line++) { if (line == stripe_width) { continue; } pLinePtr = ((line / stripe_width) & 0x1) ? pLinePat1 : pLinePat0; memcpy( pLinePat0 + ((sprite_stride / sizeof(*pLinePat0)) * line), pLinePtr, sprite_width * sizeof(*pLinePat0)); } return; } static int prepare_sprite_surfaces(int fd, int sprite_width, int sprite_height, uint32_t num_surfaces, uint32_t *sprite_handles, uint32_t *sprite_stride, uint32_t *sprite_size, int tiled) { uint32_t bytes_per_pixel = sizeof(uint32_t); uint32_t *sprite_fb_ptr; int i; if (bytes_per_pixel != sizeof(uint32_t)) { printf("Bad bytes_per_pixel for sprite: %d\n", bytes_per_pixel); return -EINVAL; } if (tiled) { int v; /* Round the tiling up to the next power-of-two and the * region up to the next pot fence size so that this works * on all generations. * * This can still fail if the framebuffer is too large to * be tiled. But then that failure is expected. */ v = sprite_width * bytes_per_pixel; for (*sprite_stride = 512; *sprite_stride < v; *sprite_stride *= 2) ; v = *sprite_stride * sprite_height; for (*sprite_size = 1024*1024; *sprite_size < v; *sprite_size *= 2) ; } else { /* Scan-out has a 64 byte alignment restriction */ *sprite_stride = (sprite_width * bytes_per_pixel + 63) & ~63; *sprite_size = *sprite_stride * sprite_height; } for (i = 0; i < num_surfaces; i++) { // Create the sprite surface sprite_handles[i] = gem_create(fd, *sprite_size); if (tiled) gem_set_tiling(fd, sprite_handles[i], I915_TILING_X, *sprite_stride); // Get pointer to the surface sprite_fb_ptr = __gem_mmap__gtt(fd, sprite_handles[i], *sprite_size, PROT_READ | PROT_WRITE); if (sprite_fb_ptr != NULL) { // Fill with checkerboard pattern fill_sprite(sprite_width, sprite_height, *sprite_stride, i, sprite_fb_ptr); munmap(sprite_fb_ptr, *sprite_size); } else { i--; while (i >= 0) { gem_close(fd, sprite_handles[i]); i--; } } } return 0; } static void ricochet(int tiled, int sprite_w, int sprite_h, int out_w, int out_h, int dump_info) { int ret; int gfx_fd; int keep_moving; const int num_surfaces = 3; uint32_t sprite_handles[num_surfaces]; uint32_t sprite_fb_id[num_surfaces]; int *sprite_x = NULL; int *sprite_y = NULL; uint32_t sprite_stride; uint32_t sprite_size; uint32_t handles[4], pitches[4], offsets[4]; /* we only use [0] */ uint32_t prim_width, prim_height, prim_handle, prim_stride, prim_size, prim_fb_id; struct drm_intel_sprite_colorkey set; struct connector curr_connector; drmModeRes *gfx_resources; struct termios orig_term, curr_term; int c_index; int sprite_index; unsigned int *sprite_plane_id = NULL; uint32_t plane_flags = 0; int *delta_x = NULL, *delta_y = NULL; struct timeval stTimeVal; long long currTime, prevFlipTime, prevMoveTime, deltaFlipTime, deltaMoveTime, SleepTime; char key; int sprite_plane_count = 0; int i; // Open up I915 graphics device gfx_fd = drmOpen("i915", NULL); if (gfx_fd < 0) { printf("Failed to load i915 driver: %s\n", strerror(errno)); return; } // Obtain pointer to struct containing graphics resources gfx_resources = drmModeGetResources(gfx_fd); if (!gfx_resources) { printf("drmModeGetResources failed: %s\n", strerror(errno)); return; } if (dump_info != 0) { dump_connectors(gfx_fd, gfx_resources); dump_crtcs(gfx_fd, gfx_resources); dump_planes(gfx_fd, gfx_resources); } // Save previous terminal settings if (tcgetattr( 0, &orig_term) != 0) { printf("tcgetattr failure: %s\n", strerror(errno)); return; } // Set up input to return characters immediately curr_term = orig_term; curr_term.c_lflag &= ~(ICANON | ECHO | ECHONL); curr_term.c_cc[VMIN] = 0; // No minimum number of characters curr_term.c_cc[VTIME] = 0 ; // Return immediately, even if // nothing has been entered. if (tcsetattr( 0, TCSANOW, &curr_term) != 0) { printf("tcgetattr failure: %s\n", strerror(errno)); return; } // Cycle through all connectors and display the flying sprite // where there are displays attached and the hardware will support it. for (c_index = 0; c_index < gfx_resources->count_connectors; c_index++) { curr_connector.id = gfx_resources->connectors[c_index]; // Find the native (preferred) display mode connector_find_preferred_mode(gfx_fd, gfx_resources, &curr_connector); if (curr_connector.mode_valid == 0) { printf("No valid preferred mode detected\n"); goto out; } // Determine if sprite hardware is available on pipe // associated with this connector. sprite_plane_count = connector_find_plane(gfx_fd, &curr_connector, &sprite_plane_id); if (!sprite_plane_count) { printf("Failed to find sprite plane on crtc\n"); goto out; } // Width and height of preferred mode prim_width = curr_connector.mode.hdisplay; prim_height = curr_connector.mode.vdisplay; // Allocate and fill memory for primary surface ret = prepare_primary_surface( gfx_fd, prim_width, prim_height, &prim_handle, &prim_stride, &prim_size, tiled); if (ret != 0) { printf("Failed to add primary fb (%dx%d): %s\n", prim_width, prim_height, strerror(errno)); goto out; } // Add the primary surface framebuffer ret = drmModeAddFB(gfx_fd, prim_width, prim_height, 24, 32, prim_stride, prim_handle, &prim_fb_id); gem_close(gfx_fd, prim_handle); if (ret != 0) { printf("Failed to add primary fb (%dx%d): %s\n", prim_width, prim_height, strerror(errno)); goto out; } // Allocate and fill sprite surfaces ret = prepare_sprite_surfaces(gfx_fd, sprite_w, sprite_h, num_surfaces, &sprite_handles[0], &sprite_stride, &sprite_size, tiled); if (ret != 0) { printf("Preparation of sprite surfaces failed %dx%d\n", sprite_w, sprite_h); goto out; } // Add the sprite framebuffers for (sprite_index = 0; sprite_index < num_surfaces; sprite_index++) { handles[0] = sprite_handles[sprite_index]; handles[1] = handles[0]; handles[2] = handles[0]; handles[3] = handles[0]; pitches[0] = sprite_stride; pitches[1] = sprite_stride; pitches[2] = sprite_stride; pitches[3] = sprite_stride; memset(offsets, 0, sizeof(offsets)); ret = drmModeAddFB2(gfx_fd, sprite_w, sprite_h, DRM_FORMAT_XRGB8888, handles, pitches, offsets, &sprite_fb_id[sprite_index], plane_flags); gem_close(gfx_fd, sprite_handles[sprite_index]); if (ret) { printf("Failed to add sprite fb (%dx%d): %s\n", sprite_w, sprite_h, strerror(errno)); sprite_index--; while (sprite_index >= 0) { drmModeRmFB(gfx_fd, sprite_fb_id[sprite_index]); sprite_index--; } goto out; } } if (dump_info != 0) { printf("Displayed Mode Connector struct:\n" " .id = %d\n" " .mode_valid = %d\n" " .crtc = %d\n" " .pipe = %d\n" " drmModeModeInfo ...\n" " .name = %s\n" " .type = %d\n" " .flags = %08x\n" " drmModeEncoder ...\n" " .encoder_id = %d\n" " .encoder_type = %d (%s)\n" " .crtc_id = %d\n" " .possible_crtcs = %d\n" " .possible_clones = %d\n" " drmModeConnector ...\n" " .connector_id = %d\n" " .encoder_id = %d\n" " .connector_type = %d (%s)\n" " .connector_type_id = %d\n\n", curr_connector.id, curr_connector.mode_valid, curr_connector.crtc, curr_connector.pipe, curr_connector.mode.name, curr_connector.mode.type, curr_connector.mode.flags, curr_connector.encoder->encoder_id, curr_connector.encoder->encoder_type, kmstest_encoder_type_str(curr_connector.encoder->encoder_type), curr_connector.encoder->crtc_id, curr_connector.encoder->possible_crtcs, curr_connector.encoder->possible_clones, curr_connector.connector->connector_id, curr_connector.connector->encoder_id, curr_connector.connector->connector_type, kmstest_connector_type_str(curr_connector.connector->connector_type), curr_connector.connector->connector_type_id); printf("Sprite surface dimensions = %dx%d\n" "Sprite output dimensions = %dx%d\n" "Press any key to continue >\n", sprite_w, sprite_h, out_w, out_h); // Wait for a key-press while( read(0, &key, 1) == 0); // Purge unread characters tcflush(0, TCIFLUSH); } // Set up the primary display mode ret = drmModeSetCrtc(gfx_fd, curr_connector.crtc, prim_fb_id, 0, 0, &curr_connector.id, 1, &curr_connector.mode); if (ret != 0) { printf("Failed to set mode (%dx%d@%dHz): %s\n", prim_width, prim_height, curr_connector.mode.vrefresh, strerror(errno)); continue; } // Set the sprite colorkey state for(i = 0; i < sprite_plane_count; i++) { set.plane_id = sprite_plane_id[i]; set.min_value = 0; set.max_value = 0; set.flags = I915_SET_COLORKEY_NONE; ret = drmCommandWrite(gfx_fd, DRM_I915_SET_SPRITE_COLORKEY, &set, sizeof(set)); assert(ret == 0); } // Set up sprite output dimensions, initial position, etc. if (out_w > prim_width / 2) out_w = prim_width / 2; if (out_h > prim_height / 2) out_h = prim_height / 2; delta_x = (int *) malloc(sprite_plane_count * sizeof(int)); delta_y = (int *) malloc(sprite_plane_count * sizeof(int)); sprite_x = (int *) malloc(sprite_plane_count * sizeof(int)); sprite_y = (int *) malloc(sprite_plane_count * sizeof(int)); /* Initializing the coordinates (x,y) of the available sprites on the * connector, equally spaced along the diagonal of the rectangle * {(0,0),(prim_width/2, prim_height/2)}. */ for(i = 0; i < sprite_plane_count; i++) { delta_x[i] = 3; delta_y[i] = 4; sprite_x[i] = i * (prim_width / (2 * sprite_plane_count)); sprite_y[i] = i * (prim_height / (2 * sprite_plane_count)); } currTime = 0; prevFlipTime = 0; // Will force immediate sprite flip prevMoveTime = 0; // Will force immediate sprite move deltaFlipTime = 500000; // Flip sprite surface every 1/2 second deltaMoveTime = 100000; // Move sprite every 100 ms sprite_index = num_surfaces - 1; keep_moving = 1; // Bounce sprite off the walls while (keep_moving) { // Obtain system time in usec. if (gettimeofday( &stTimeVal, NULL ) != 0) printf("gettimeofday error: %s\n", strerror(errno)); else currTime = ((long long)stTimeVal.tv_sec * 1000000) + stTimeVal.tv_usec; // Check if it's time to flip the sprite surface if (currTime - prevFlipTime > deltaFlipTime) { sprite_index = (sprite_index + 1) % num_surfaces; prevFlipTime = currTime; } // Move the sprite on the screen and flip // the surface if the index has changed // NB: sprite_w and sprite_h must be 16.16 fixed point, herego << 16 for(i = 0; i < sprite_plane_count; i++) { if (drmModeSetPlane(gfx_fd, sprite_plane_id[i], curr_connector.crtc, sprite_fb_id[sprite_index], plane_flags, sprite_x[i], sprite_y[i], out_w, out_h, 0, 0, sprite_w << 16, sprite_h << 16)) printf("Failed to enable sprite plane: %s\n", strerror(errno)); } // Check if it's time to move the sprite surface if (currTime - prevMoveTime > deltaMoveTime) { // Compute the next position for sprite for(i = 0; i < sprite_plane_count; i++) { sprite_x[i] += delta_x[i]; sprite_y[i] += delta_y[i]; if (sprite_x[i] < 0) { sprite_x[i] = 0; delta_x[i] = -delta_x[i]; } else if (sprite_x[i] > prim_width - out_w) { sprite_x[i] = prim_width - out_w; delta_x[i] = -delta_x[i]; } if (sprite_y[i] < 0) { sprite_y[i] = 0; delta_y[i] = -delta_y[i]; } else if (sprite_y[i] > prim_height - out_h) { sprite_y[i] = prim_height - out_h; delta_y[i] = -delta_y[i]; } } prevMoveTime = currTime; } // Fetch a key from input (non-blocking) if (read(0, &key, 1) == 1) { switch (key) { case 'q': // Kill the program case 'Q': goto out; break; case 's': // Slow down sprite movement; deltaMoveTime = (deltaMoveTime * 100) / 90; if (deltaMoveTime > 800000) { deltaMoveTime = 800000; } break; case 'S': // Speed up sprite movement; deltaMoveTime = (deltaMoveTime * 100) / 110; if (deltaMoveTime < 2000) { deltaMoveTime = 2000; } break; case 'f': // Slow down sprite flipping; deltaFlipTime = (deltaFlipTime * 100) / 90; if (deltaFlipTime > 1000000) deltaFlipTime = 1000000; break; case 'F': // Speed up sprite flipping; deltaFlipTime = (deltaFlipTime * 100) / 110; if (deltaFlipTime < 20000) deltaFlipTime = 20000; break; case 'n': // Next connector case 'N': keep_moving = 0; break; default: break; } // Purge unread characters tcflush(0, TCIFLUSH); } // Wait for min of flip or move deltas SleepTime = (deltaFlipTime < deltaMoveTime) ? deltaFlipTime : deltaMoveTime; usleep(SleepTime); } free(sprite_plane_id); free(sprite_x); free(sprite_y); free(delta_x); free(delta_y); sprite_plane_id = NULL; sprite_plane_count = 0; sprite_x = sprite_y = delta_x = delta_y = NULL; } out: // Purge unread characters tcflush(0, TCIFLUSH); // Restore previous terminal settings if (tcsetattr( 0, TCSANOW, &orig_term) != 0) { printf("tcgetattr failure: %s\n", strerror(errno)); return; } drmModeFreeResources(gfx_resources); } static void usage(char *name) { printf("usage: %s -s x [-dhto]\n" "\t-d\t[optional] dump mode information\n" "\t-h\t[optional] output help message\n" "\t-t\t[optional] enable tiling\n" "\t-o\t[optional] x\n\n" "Keyboard control for sprite movement and flip rate ...\n" "\t'q' or 'Q' - Quit the program\n" "\t'n' or 'N' - Switch to next display\n" "\t's' - Slow sprite movement\n" "\t'S' - Speed up sprite movement\n" "\t'f' - Slow sprite surface flipping\n" "\t'F' - Speed up sprite surface flipping\n", name); } int main(int argc, char **argv) { int c; int test_overlay = 0, enable_tiling = 0, dump_info = 0; int plane_width = 0, plane_height = 0, out_width = 0, out_height = 0; static char optstr[] = "ds:o:th"; opterr = 0; while ((c = getopt(argc, argv, optstr)) != -1) { switch (c) { case 'd': // Dump information dump_info = 1; break; case 't': // Tiling enable enable_tiling = 1; break; case 's': // Surface dimensions if (sscanf(optarg, "%dx%d", &plane_width, &plane_height) != 2) usage(argv[0]); test_overlay = 1; break; case 'o': // Output dimensions if (sscanf(optarg, "%dx%d", &out_width, &out_height) != 2) usage(argv[0]); break; default: printf("unknown option %c\n", c); /* fall through */ case 'h': // Help! usage(argv[0]); goto out; } } if (test_overlay) { if (out_width < (plane_width / 2)) out_width = plane_width; if (out_height < (plane_height / 2)) out_height = plane_height; ricochet(enable_tiling, plane_width, plane_height, out_width, out_height, dump_info); } else { printf("Sprite dimensions are required:\n"); usage(argv[0]); } out: exit(0); } intel-gpu-tools-1.14/COPYING0000644000175000017500000001472712665336131012476 00000000000000Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. Copyright 2003,2006 Tungsten Graphics, Inc., Cedar Park, Texas. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. Copyright © 2006-2011 Intel Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. Copyright © 2010 Red Hat, Inc. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. Copyright © 2011 Daniel Vetter Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. Copyright (c) 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012, 2013, 2014 by Internet Systems Consortium, Inc. ("ISC") Copyright (c) 1991, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 by The Internet Software Consortium and Rich Salz This code is derived from software contributed to the Internet Software Consortium by Rich Salz. Permission to use, copy, modify, and distribute this software for any purpose with or without fee is hereby granted, provided that the above copyright notice and this permission notice appear in all copies. THE SOFTWARE IS PROVIDED "AS IS" AND ISC DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL ISC BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. intel-gpu-tools-1.14/Makefile.in0000644000175000017500000007236712665336443013522 00000000000000# Makefile.in generated by automake 1.15 from Makefile.am. # @configure_input@ # Copyright (C) 1994-2014 Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or without modifications, as long as this notice is preserved. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY, to the extent permitted by law; without # even the implied warranty of MERCHANTABILITY or FITNESS FOR A # PARTICULAR PURPOSE. @SET_MAKE@ # Copyright © 2005 Adam Jackson. # Copyright © 2009,2013 Intel Corporation # # Permission is hereby granted, free of charge, to any person obtaining a # copy of this software and associated documentation files (the "Software"), # to deal in the Software without restriction, including without limitation # on the rights to use, copy, modify, merge, publish, distribute, sub # license, and/or sell copies of the Software, and to permit persons to whom # the Software is furnished to do so, subject to the following conditions: # # The above copyright notice and this permission notice (including the next # paragraph) shall be included in all copies or substantial portions of the # Software. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, # FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL # ADAM JACKSON BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER # IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN # CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 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IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Ben Widawsky * */ #include #include #include #include "intel_io.h" #include "intel_chipset.h" struct eu_rdata { union { struct { uint8_t sendc_dep : 1; uint8_t swh_dep : 1; uint8_t pwc_dep : 1; uint8_t n2_dep : 1; uint8_t n1_dep : 1; uint8_t n0_dep : 1; uint8_t flag1_dep : 1; uint8_t flag0_dep : 1; uint8_t indx_dep : 1; uint8_t mrf_dep : 1; uint8_t dst_dep : 1; uint8_t src2_dep : 1; uint8_t src1_dep : 1; uint8_t src0_dep : 1; uint8_t mp_dep_pin : 1; uint8_t sp_dep_pin : 1; uint8_t fftid : 8; uint8_t ffid : 4; uint8_t instruction_valid : 1; uint8_t thread_status : 3; }; uint32_t dword; } ud0; union { struct { uint8_t mrf_addr : 4; uint8_t dst_addr : 7; uint8_t src2_addr : 7; uint8_t src1_addr : 7; uint8_t src0_addr : 7; }; uint32_t dword; } ud1; union { struct { uint16_t exip : 12; uint8_t opcode : 7; uint8_t pwc : 8; uint8_t instruction_valid : 1; uint8_t mbz : 4; }; uint32_t dword; } ud2; }; const char *thread_status[] = {"INVALID", "invalid/no thread", "standby (dependency)", "INVALID", "Executing", "INVALID" , "INVALID" , "INVALID"}; static struct eu_rdata collect_rdata(int eu, int tid) { struct eu_rdata rdata; intel_register_write(0x7800, eu << 16 | (3 * tid) << 8); rdata.ud0.dword = intel_register_read(0x7840); intel_register_write(0x7800, eu << 16 | (3 * tid + 1) << 8); rdata.ud1.dword = intel_register_read(0x7840); intel_register_write(0x7800, eu << 16 | (3 * tid + 2) << 8); rdata.ud2.dword = intel_register_read(0x7840); return rdata; } static void print_rdata(struct eu_rdata rdata) { printf("\t%s\n", thread_status[rdata.ud0.thread_status]); printf("\tn1_dep: %d\n", rdata.ud0.n1_dep); printf("\tpwc_dep: %d\n", rdata.ud0.pwc_dep); printf("\tswh_dep: %d\n", rdata.ud0.swh_dep); printf("\tsource 0 %x\n", rdata.ud1.src0_addr); printf("\tsource 1 %x\n", rdata.ud1.src1_addr); printf("\tsource 2 %x\n", rdata.ud1.src2_addr); printf("\tdest %x\n", rdata.ud1.dst_addr); printf("\tmrf %x\n", rdata.ud1.mrf_addr); printf("\tIP: %x\n", rdata.ud2.exip); printf("\topcode: %x\n", rdata.ud2.opcode); } static void find_stuck_threads(void) { int i, j; for (i = 0; i < 15; i++) for (j = 0; j < 5; j++) { struct eu_rdata rdata; rdata = collect_rdata(i, j); if (rdata.ud0.thread_status == 2 || rdata.ud0.thread_status == 4) { printf("%d %d:\n", i, j); print_rdata(rdata); } } } int main(int argc, char *argv[]) { struct pci_device *pci_dev; pci_dev = intel_get_pci_device(); intel_register_access_init(pci_dev, 1); find_stuck_threads(); // collect_rdata(atoi(argv[1]), atoi(argv[2])); return 0; } intel-gpu-tools-1.14/debugger/system_routine/0000755000175000017500000000000012665337377016402 500000000000000intel-gpu-tools-1.14/debugger/system_routine/Makefile.in0000644000175000017500000005237412665336443020373 00000000000000# Makefile.in generated by automake 1.15 from Makefile.am. # @configure_input@ # Copyright (C) 1994-2014 Free Software Foundation, Inc. # This Makefile.in is free software; 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clean-noinstPROGRAMS cscopelist-am ctags \ ctags-am distclean distclean-compile distclean-generic \ distclean-libtool distclean-tags distdir dvi dvi-am html \ html-am info info-am install install-am install-data \ install-data-am install-dvi install-dvi-am install-exec \ install-exec-am install-html install-html-am install-info \ install-info-am install-man install-pdf install-pdf-am \ install-ps install-ps-am install-strip installcheck \ installcheck-am installdirs maintainer-clean \ maintainer-clean-generic mostlyclean mostlyclean-compile \ mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \ tags tags-am uninstall uninstall-am .PRECIOUS: Makefile evict.h : eviction_macro $(builddir)/eviction_macro > evict.h sr.cpp : sr.g4a $(srcdir)/pre_cpp.py $(srcdir)/sr.g4a > $@.tmp && mv $@.tmp $@ sr.asm : sr.cpp evict.h $(CPP) $(ASM_CPPFLAGS) -o $@ sr.cpp sr.c: sr.asm $(GEN4ASM) $(GEN4ASM_FLAGS) sr.asm -o $@ sr.o : sr.c $(CC) -c -o $@ sr.c sr$(EXEEXT) : sr.o $(OBJCOPY) -O binary -K gen_eu_bytes sr.o $@ # Test.g4a is the simplest possible system routine we can run on the GPU # without actually hanging the system. The system routine kernel is very # simple and doesn't depend on any external communication to run. tiny.cpp : test.g4a $(srcdir)/pre_cpp.py $(srcdir)/test.g4a > $@.tmp && mv $@.tmp $@ tiny.asm : tiny.cpp $(CPP) $(ASM_CPPFLAGS) -o $@ tiny.cpp tiny.c: tiny.asm $(GEN4ASM) $(GEN4ASM_FLAGS) tiny.asm -o $@ tiny.o : tiny.c $(CC) -c -o $@ tiny.c tiny$(EXEEXT) : tiny.o $(OBJCOPY) -O binary -K gen_eu_bytes tiny.o $@ # Tell versions [3.59,3.63) of GNU make to not export all variables. # Otherwise a system limit (for SysV at least) may be exceeded. .NOEXPORT: intel-gpu-tools-1.14/debugger/system_routine/sr.g4a0000644000175000017500000002040712665336131017331 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Ben Widawsky * */ #include "debug.h" #include "evict.h" #define CR0_0_ME_STATE_CTRL (1 << 31) #define CR0_0_BP_SUPPRESS (1 << 15) #define CR0_0_SPF_EN (1 << 2) #define CR0_0_ACC_DIS (1 << 1) #define CR0_1_BES_CTRL (1 << 31) #define CR0_1_HALT_CTRL (1 << 30) #define CR0_1_SOFT_EXCEPTION_CTRL (1 << 29) #define CR0_1_ILLGL_OP_STS (1 << 28) #define CR0_1_STACK_OVRFLW_STS (1 << 27) #define CR0_0_ENTRY_UNMASK (CR0_0_SPF_EN | CR0_0_ACC_DIS) // TODO: Need to fix this for non breakpoint case #define CR0_1_ENTRY_UNMASK ~(CR0_1_BES_CTRL) #define CR0_0_RETURN_MASK ~(CR0_0_ME_STATE_CTRL | CR0_0_SPF_EN | CR0_0_ACC_DIS) // TODO: not sure how to make this not hardcoded #define PER_THREAD_SCRATCH_SIZE (1 << 20) #define PER_THREAD_QWORDS (PER_THREAD_SCRATCH_SIZE >> 4) /* Should get this from brw_defines.h */ #define BRW_DATAPORT_OWORD_BLOCK_2_OWORDS 2 #define BRW_DATAPORT_OWORD_BLOCK_4_OWORDS 3 #define BRW_DATAPORT_OWORD_BLOCK_8_OWORDS 4 #define GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE 8 #define BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ 0 /* desc field, ie. dword3 6.3.66.2 and 2.11.2.1.4 */ #define SEND_MLEN_5 (5<<25) #define SEND_MLEN_3 (3<<25) #define SEND_MLEN_2 (2<<25) #define SEND_MLEN_1 (1<<25) #define SEND_RLEN_1 (1<<20) #define SEND_RLEN_0 (0<<20) #define SEND_HEADER_PRESENT (1<<19) #define SEND_WRITE_COMMIT (1<<17) #define SEND_TYPE_WRITE (GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE<<13) #define SEND_TYPE_READ (BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ<<13) #define SEND_BLOCK_SIZE1 (BRW_DATAPORT_OWORD_BLOCK_2_OWORDS<<8) #define SEND_BLOCK_SIZE2 (BRW_DATAPORT_OWORD_BLOCK_4_OWORDS<<8) #define SEND_BLOCK_SIZE4 (BRW_DATAPORT_OWORD_BLOCK_8_OWORDS<<8) #define SEND_BINDING_TABLE (255<<0) // No write commit #define WRITE_DESC1_XXX SEND_BINDING_TABLE | SEND_BLOCK_SIZE1 | SEND_TYPE_WRITE | SEND_HEADER_PRESENT | SEND_MLEN_2 #define WRITE_DESC1_WC SEND_BINDING_TABLE | SEND_BLOCK_SIZE1 | SEND_TYPE_WRITE | SEND_HEADER_PRESENT | SEND_MLEN_2 | SEND_WRITE_COMMIT #define WRITE_DESC2 SEND_BINDING_TABLE | SEND_BLOCK_SIZE2 | SEND_TYPE_WRITE | SEND_HEADER_PRESENT | SEND_MLEN_3 #define WRITE_DESC4 SEND_BINDING_TABLE | SEND_BLOCK_SIZE4 | SEND_TYPE_WRITE | SEND_HEADER_PRESENT | SEND_MLEN_5 #define RECV_DESC1 SEND_BINDING_TABLE | SEND_BLOCK_SIZE1 | SEND_TYPE_READ | SEND_HEADER_PRESENT | SEND_MLEN_1 | SEND_RLEN_1 //#define SEND_DESC1 0x40902FF #define SEND_DESC1_WC 0x40b02FF /* ex_desc field 6.3.66.2 */ #define SEND_DP_RENDER_CACHE (5<<0) #define SEND_EOT (1<<5) #define SEND_EX_DESC SEND_DP_RENDER_CACHE /** * WRITE_SCRATCH1 - Write 2 owords. * cdst.2 - offset * cdst.5 - per thread scratch base, relative to gsba?? * cdst+1 - data to be written. */ #define WRITE_SCRATCH1(cdst) \ send (16) null cdst SEND_EX_DESC WRITE_DESC1_XXX FLAGS #define WRITE_SCRATCH1_WC(cdst) \ send (16) g1 cdst SEND_EX_DESC WRITE_DESC1_WC FLAGS #define WRITE_SCRATCH2(cdst) \ send (16) null cdst SEND_EX_DESC WRITE_DESC2 FLAGS #define WRITE_SCRATCH4(cdst) \ send (16) null cdst SEND_EX_DESC WRITE_DESC4 FLAGS /** * READ_SCRATCH1 - Read 2 owords. * cdst.2 - offset * cdst.5 - per thread scratch base, relative to gsba?? * grf - register where read data is populated. */ #define READ_SCRATCH1(grf, cdst) \ send (16) grf:ud cdst SEND_EX_DESC RECV_DESC1 FLAGS /** * SET_OFFSET - setup mrf for the given offset prior to a send instruction. * mrf - message register to be used as the header. * offset - offset. * * If a WRITE_SCRATCH follows, mrf+1 -> mrf+1+n should contain the data to be * written. */ #define SET_OFFSET(mrf, offset) \ mov (1) mrf.5:ud g0.5:ud FLAGS; \ mov (1) mrf.2:ud offset:ud FLAGS /** * SAVE_CRF - save the control register * clobbers: m0.2, m0.5 */ #define CR_OFFSET 0x40 #define SAVE_CRF \ SET_OFFSET(m0, CR_OFFSET); \ mov (8) m1:ud 0xdeadbeef:ud FLAGS; \ mov (1) m1.0:ud cr0.0 FLAGS; \ mov (1) m1.1:ud cr0.1 FLAGS; \ mov (1) m1.2:ud cr0.2 FLAGS; \ mov (1) m1.3:ud sr0:ud FLAGS; \ WRITE_SCRATCH1(m0) /* * clobbers: m0.2, m0.5 */ #define STORE_GRF(grf, offset) \ SET_OFFSET(m0, offset); \ mov (8) m1:ud grf:ud FLAGS; \ WRITE_SCRATCH1(m0) /* * clobbers: m0.2, m0.5 */ #define LOAD_GRF(grf, offset) \ SET_OFFSET(m0, offset); \ READ_SCRATCH1(grf, m0) /* * clobbers: mrf.2 mrf.5 */ #define STORE_MRF(mrf, offset) \ SET_OFFSET(mrf, offset); \ WRITE_SCRATCH1(mrf) /* * non-quirky semantics, unlike STORE_MRF * clobbers: g1 */ #define LOAD_MRF(mrf, offset) \ LOAD_GRF(g1, offset); \ mov (8) mrf:ud g1:ud FLAGS #define SAVE_ALL_MRF \ /* m1 is saved already */ \ STORE_MRF(m1, 0x2); \ STORE_MRF(m2, 0x4); \ STORE_MRF(m3, 0x6); \ STORE_MRF(m4, 0x8); \ STORE_MRF(m5, 0xa); \ STORE_MRF(m6, 0xc); \ STORE_MRF(m7, 0xe); \ STORE_MRF(m8, 0x10); \ STORE_MRF(m9, 0x12); \ STORE_MRF(m10, 0x14); \ STORE_MRF(m11, 0x16); \ STORE_MRF(m12, 0x18); \ STORE_MRF(m13, 0x1a); \ STORE_MRF(m14, 0x1c) #define RESTORE_ALL_MRF \ LOAD_MRF(m15, 0x1c); \ LOAD_MRF(m14, 0x1a); \ LOAD_MRF(m13, 0x18); \ LOAD_MRF(m12, 0x16); \ LOAD_MRF(m11, 0x14); \ LOAD_MRF(m10, 0x12); \ LOAD_MRF(m9, 0x10); \ LOAD_MRF(m8, 0xe); \ LOAD_MRF(m7, 0xc); \ LOAD_MRF(m6, 0xa); \ LOAD_MRF(m5, 0x8); \ LOAD_MRF(m4, 0x6); \ LOAD_MRF(m3, 0x4); \ LOAD_MRF(m2, 0x2); \ LOAD_MRF(m1, 0x0) #ifndef SANDYBRIDGE #error Only SandyBridge is supported #endif /* Default flags for an instruction */ #define FLAGS { ALIGN1, SWITCH, MASK_DISABLE, ACCWRCTRL} /* * We can clobber m0, and g0.4, everything else must be saved. */ Enter: nop; or (1) cr0.0 cr0.0 CR0_0_ENTRY_UNMASK:ud FLAGS; /* * g0.5 has the per thread scratch space when running in FS or VS. * If we don't have a valid g0.5, we can calculate a per thread scratch offset * using the system registers. The problem is we do not have a good way to know * the offset from GSBA. The system routine will have to be hardcoded or * dynamically patched with the correct offset. * TID is in sr0.0[2:0] * EUID is in sr0.0[11:8] */ #ifdef GPGPU mov (1) g0.4:ud 0:ud FLAGS; #if 0 /* This should work according to the docs, the add blows up */ shr (1) g0.8:uw sr0.0:uw 5 FLAGS; add (1) g0.16:ub gr0.16:ub sr0.0:ub FLAGS; #else shr (1) g0.8:uw sr0.0:uw 5 FLAGS; mov (1) g0.9:uw sr0.0:uw FLAGS; and (1) g0.9:uw g0.9:uw 0x7:uw FLAGS; add (1) g0.8:uw g0.8:uw g0.9:uw FLAGS; mov (1) g0.9:uw 0:uw FLAGS; mul (1) g0.4:ud g0.4:ud PER_THREAD_QWORDS FLAGS; #endif #endif mov (8) m0:ud 0:ud FLAGS; /* Saves must occur in order so as not to clobber the next register */ STORE_MRF(m0, 0); STORE_GRF(g0, 0x20); STORE_GRF(g1, 0x22); SAVE_ALL_MRF; mov (8) g1:ud STATE_EU_MSG:ud FLAGS; STORE_GRF(g1, STATE_QWORD); mov (8) g1:ud DEBUG_PROTOCOL_VERSION:ud FLAGS; STORE_GRF(g1, COMMUNICATION_QWORD); SAVE_CRF; EVICT_CACHE; wait n1:ud; EVICT_CACHE; /* Using this to try to keep coherency */ LOAD_GRF(g1, CR_OFFSET); LOAD_GRF(g1, COMMUNICATION_QWORD); LOAD_GRF(g1, STATE_QWORD); RESTORE_ALL_MRF; LOAD_GRF(g1, 0x22); LOAD_GRF(g0, 0x20); /* Clear breakpoint status */ and (1) cr0.1 cr0.1 CR0_1_ENTRY_UNMASK:ud FLAGS; /* set breakpoint suppress this should be conditional on bes */ or (1) cr0.0 cr0.0 CR0_0_BP_SUPPRESS:ud FLAGS; and (1) cr0.0 cr0.0 CR0_0_RETURN_MASK:ud FLAGS; nop; intel-gpu-tools-1.14/debugger/system_routine/Makefile.am0000644000175000017500000000240612665336131020343 00000000000000 noinst_PROGRAMS = eviction_macro sr tiny nodist_sr_SOURCES = sr.c nodist_tiny_SOURCES = tiny.c GEN4ASM = $(top_builddir)/assembler/intel-gen4asm GEN4ASM_FLAGS = -g6 -a -b ASM_CPPFLAGS = \ -x assembler-with-cpp \ -P -DGEN_ASM -DSANDYBRIDGE \ -I$(top_srcdir)/lib \ -I$(builddir) evict.h : eviction_macro $(builddir)/eviction_macro > evict.h sr.cpp : sr.g4a $(srcdir)/pre_cpp.py $(srcdir)/sr.g4a > $@.tmp && mv $@.tmp $@ sr.asm : sr.cpp evict.h $(CPP) $(ASM_CPPFLAGS) -o $@ sr.cpp sr.c: sr.asm $(GEN4ASM) $(GEN4ASM_FLAGS) sr.asm -o $@ sr.o : sr.c $(CC) -c -o $@ sr.c sr$(EXEEXT) : sr.o $(OBJCOPY) -O binary -K gen_eu_bytes sr.o $@ # Test.g4a is the simplest possible system routine we can run on the GPU # without actually hanging the system. The system routine kernel is very # simple and doesn't depend on any external communication to run. tiny.cpp : test.g4a $(srcdir)/pre_cpp.py $(srcdir)/test.g4a > $@.tmp && mv $@.tmp $@ tiny.asm : tiny.cpp $(CPP) $(ASM_CPPFLAGS) -o $@ tiny.cpp tiny.c: tiny.asm $(GEN4ASM) $(GEN4ASM_FLAGS) tiny.asm -o $@ tiny.o : tiny.c $(CC) -c -o $@ tiny.c tiny$(EXEEXT) : tiny.o $(OBJCOPY) -O binary -K gen_eu_bytes tiny.o $@ CLEANFILES = evict.h sr.cpp sr.asm sr.c tiny.cpp tiny.asm tiny.c EXTRA_DIST = pre_cpp.py sr.g4a test.g4a intel-gpu-tools-1.14/debugger/system_routine/pre_cpp.py0000755000175000017500000000752312665336131020321 00000000000000#!/usr/bin/env python3 # Copyright © 2011 Intel Corporation # # Permission is hereby granted, free of charge, to any person obtaining a copy # of this software and associated documentation files (the "Software"), to deal # in the Software without restriction, including without limitation the rights # to use, copy, modify, merge, publish, distribute, sublicense, and/or sell # copies of the Software, and to permit persons to whom the Software is # furnished to do so, subject to the following conditions: # # The above copyright notice and this permission notice (including the next # paragraph) shall be included in all copies or substantial portions of the # Software. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE # AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE # SOFTWARE. # # Authors: # Ben Widawsky #very limited C-like preprocessor #limitations: # no macro substitutions # no multiline definitions # divide operator is // import sys,re # make sure both input file and stdout are handled as utf-8 text, regardless # of current locale (eg. LANG=C which tells python to use ascii encoding) sys.stdout = open(sys.__stdout__.fileno(), "a", encoding="utf-8") file = open(sys.argv[1], "r", encoding="utf-8") lines = file.readlines() len(lines) out = dict() defines = dict() count = 0 #create a dict for our output for line in lines: out[count] = line count = count + 1 #done is considered #define def is_done(string): m = re.match("#define\s+(\w+?)\s+([a-fA-F0-9\-]+?)\s*$", string) return m #skip macros, the real cpp will handle it def skip(string): #macro m = re.match("#define\s+\w+\(.+", string) return m != None #put contants which are done being evaluated into the dictionary def easy_constants(): ret = 0 for lineno, string in out.items(): if skip(string): continue m = is_done(string) if m != None: key = m.group(1) value = m.group(2) if not key in defines: defines[key] = int(eval(value)) ret = 1 return ret #replace names with dictionary values def simple_replace(): ret = 0 for lineno, string in out.items(): if skip(string): continue for key, value in defines.items(): if is_done(string): continue s = re.subn(key, repr(value), string) if s[1] > 0: out[lineno] = s[0] ret = s[1] return ret #evaluate expressions to try to simplify them def collapse_constants(): ret = 0 for lineno, string in out.items(): if skip(string): continue if is_done(string): continue m = re.match("#define\s+(.+?)\s+(.+)$", string) if m != None: try: out[lineno] = "#define " + m.group(1) + " " + repr(eval(m.group(2))) ret = 1 except NameError as ne: #this happens before a variable is resolved in simple_replace continue except SyntaxError: #this happens with something like #define foo bar, which the #regular cpp can handle continue except: raise KeyboardInterrupt return ret; while True: ret = 0 ret += easy_constants() ret += simple_replace() ret += collapse_constants() if ret == 0: break; for lineno, string in out.items(): print(string.rstrip()) intel-gpu-tools-1.14/debugger/system_routine/test.g4a0000644000175000017500000000433712665336131017670 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Ben Widawsky * */ #include "debug.h" #define CR0_0_ME_STATE_CTRL (1 << 31) #define CR0_0_BP_SUPPRESS (1 << 15) #define CR0_0_SPF_EN (1 << 2) #define CR0_0_ACC_DIS (1 << 1) #define CR0_1_BES_CTRL (1 << 31) #define CR0_1_HALT_CTRL (1 << 30) #define CR0_1_SOFT_EXCEPTION_CTRL (1 << 29) #define CR0_1_ILLGL_OP_STS (1 << 28) #define CR0_1_STACK_OVRFLW_STS (1 << 27) #define CR0_0_ENTRY_UNMASK (CR0_0_SPF_EN | CR0_0_ACC_DIS) // TODO: Need to fix this for non breakpoint case #define CR0_1_ENTRY_UNMASK ~(CR0_1_BES_CTRL) #define CR0_0_RETURN_MASK ~(CR0_0_ME_STATE_CTRL | CR0_0_SPF_EN | CR0_0_ACC_DIS) #ifndef SANDYBRIDGE #error Only SandyBridge is supported #endif /* Default flags for an instruction */ #define FLAGS { ALIGN1, SWITCH, MASK_DISABLE, ACCWRCTRL} Enter: nop; or (1) cr0.0 cr0.0 CR0_0_ENTRY_UNMASK:ud FLAGS; /* Clear breakpoint status */ and (1) cr0.1 cr0.1 CR0_1_ENTRY_UNMASK:ud FLAGS; /* set breakpoint suppress this should be conditional on bes */ or (1) cr0.0 cr0.0 CR0_0_BP_SUPPRESS:ud FLAGS; and (1) cr0.0 cr0.0 CR0_0_RETURN_MASK:ud FLAGS; nop; intel-gpu-tools-1.14/debugger/system_routine/eviction_macro.c0000644000175000017500000000333212665336131021453 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Ben Widawsky * */ #include #define START 0x100 #define END ((128 << 10) / 4) int main(int argc, char *argv[]) { int i; printf("#ifdef SANDYBRIDGE\n"); printf("#define EVICT_CACHE \\\n"); printf("\tmov (1) m0.5:ud g0.5:ud FLAGS; \\\n"); for (i = START; i < END - 8; i+=0x8) { printf("\tmov (1) m0.2:ud 0x%04x:ud FLAGS; \\\n", i); printf("\tWRITE_SCRATCH4(m0); \\\n"); } printf("\tmov (1) m0.2:ud 0x%04x:ud FLAGS; \\\n", i); printf("\tWRITE_SCRATCH4(m0)\n"); printf("#else\n"); printf("#define EVICT_CACHE\n"); printf("#endif\n"); } intel-gpu-tools-1.14/debugger/Makefile.in0000644000175000017500000006560212665336443015300 00000000000000# Makefile.in generated by automake 1.15 from Makefile.am. # @configure_input@ # Copyright (C) 1994-2014 Free Software Foundation, Inc. # This Makefile.in is free software; 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not export all variables. # Otherwise a system limit (for SysV at least) may be exceeded. .NOEXPORT: intel-gpu-tools-1.14/debugger/eudb.c0000644000175000017500000003340412665336131014303 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Ben Widawsky * * Notes: * */ #include #include #include #include #include #include #include #include #include #include #include #include #include "drm.h" #include "i915_drm.h" #include "drmtest.h" #include "intel_chipset.h" #include "intel_bufmgr.h" #include "intel_io.h" #include "intel_batchbuffer.h" #include "intel_debug.h" #include "debug.h" #define EU_ATT 0x7810 #define EU_ATT_CLR 0x7830 #define RSVD_EU -1 #define RSVD_THREAD -1 #define RSVD_ID EUID(-1, -1, -1) enum { EBAD_SHMEM, EBAD_PROTOCOL, EBAD_MAGIC, EBAD_WRITE }; struct debuggee { int euid; int tid; int fd; int clr; uint32_t reg; }; struct debugger { struct debuggee *debuggees; int num_threads; int real_num_threads; int threads_per_eu; } *eu_info; drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; drm_intel_bo *scratch_bo; int handle; int drm_fd; int debug_fd = 0; const char *debug_file = "dump_debug.bin"; int debug; int clear_waits; int shutting_down = 0; struct intel_debug_handshake dh; int force_clear = 0; uint32_t old_td_ctl; /* * The docs are wrong about the attention clear bits. The clear bits are * provided as part of the structure in case they change in future generations. */ #define EUID(eu, td, clear) \ { .euid = eu, .tid = td, .reg = EU_ATT, .fd = -1, .clr = clear } #define EUID2(eu, td, clear) \ { .euid = eu, .tid = td, .reg = EU_ATT + 4, .fd = -1, .clr = clear } struct debuggee gt1_debug_ids[] = { RSVD_ID, RSVD_ID, RSVD_ID, EUID(6, 3, 28), EUID(6, 2, 27), EUID(6, 1, 26), EUID(6, 0, 25), RSVD_ID, EUID(5, 3, 23), EUID(5, 2, 22), EUID(5, 1, 21), EUID(5, 0, 20), RSVD_ID, EUID(4, 3, 18), EUID(4, 2, 17), EUID(4, 1, 16), EUID(4, 0, 15), RSVD_ID, EUID(2, 3, 13), EUID(2, 2, 12), EUID(2, 1, 11), EUID(2, 0, 10), RSVD_ID, EUID(1, 3, 8), EUID(1, 2, 7), EUID(1, 1, 6), EUID(1, 0, 5), RSVD_ID, EUID(0, 3, 3), EUID(0, 2, 2), EUID(0, 1, 1), EUID(0, 0, 0) }; struct debuggee gt2_debug_ids[] = { EUID(8, 1, 31), EUID(8, 0, 30), EUID(6, 4, 29), EUID(6, 3, 28), EUID(6, 2, 27), EUID(6, 1, 26), EUID(6, 0, 25), EUID(5, 4, 24), EUID(5, 3, 23), EUID(5, 2, 22), EUID(5, 1, 21), EUID(5, 0, 20), EUID(4, 4, 19), EUID(4, 3, 18), EUID(4, 2, 17), EUID(4, 1, 16), EUID(4, 0, 15), EUID(2, 4, 14), EUID(2, 3, 13), EUID(2, 2, 12), EUID(2, 1, 11), EUID(2, 0, 10), EUID(1, 4, 9), EUID(1, 3, 8), EUID(1, 2, 7), EUID(1, 1, 6), EUID(1, 0, 5), EUID(0, 4, 4), EUID(0, 3, 3), EUID(0, 2, 2), EUID(0, 1, 1), EUID(0, 0, 0), RSVD_ID, RSVD_ID, RSVD_ID, RSVD_ID, EUID2(14, 4, 27), EUID2(14, 3, 26), EUID2(14, 2, 25), EUID2(14, 1, 24), EUID2(14, 0, 23), EUID2(13, 4, 22), EUID2(13, 3, 21), EUID2(13, 2, 20), EUID2(13, 1, 19), EUID2(13, 0, 18), EUID2(12, 4, 17), EUID2(12, 3, 16), EUID2(12, 2, 15), EUID2(12, 1, 14), EUID2(12, 0, 13), EUID2(10, 4, 12), EUID2(10, 3, 11), EUID2(10, 2, 10), EUID2(10, 1, 9), EUID2(10, 0, 8), EUID2(9, 4, 7), EUID2(9, 3, 6), EUID2(9, 2, 5), EUID2(9, 1, 4), EUID2(9, 0, 3), EUID2(8, 4, 2), EUID2(8, 3, 1), EUID2(8, 2, 0) }; struct debugger gt1 = { .debuggees = gt1_debug_ids, .num_threads = 32, .real_num_threads = 24, .threads_per_eu = 4 }; struct debugger gt2 = { .debuggees = gt2_debug_ids, .num_threads = 64, .real_num_threads = 60, .threads_per_eu = 5 }; static void dump_debug(void *buf, size_t count) { if (!debug_fd) debug_fd = open(debug_file, O_CREAT | O_WRONLY | O_TRUNC, S_IRWXO); if (write(debug_fd, buf, count) == -1) fprintf(stderr, "Error writing to debug file: %s\n", strerror(errno)); } static volatile void * map_debug_buffer(void) { int ret; ret = drm_intel_bo_map(scratch_bo, 0); assert(ret == 0); return scratch_bo->virtual; } static void unmap_debug_buffer(void) { drm_intel_bo_unmap(scratch_bo); } static int wait_for_attn(int timeout, int *out_bits) { int step = 1; int eus_waiting = 0; int i,j; if (timeout <= 0) { timeout = 1; step = 0; } for (i = 0; i < timeout; i += step) { for (j = 0; j < 8; j += 4) { uint32_t attn = intel_register_read(EU_ATT + j); if (attn) { int bit = 0; while( (bit = ffs(attn)) != 0) { bit--; // ffs is 1 based assert(bit >= 0); out_bits[eus_waiting] = bit + (j * 8); attn &= ~(1 << bit); eus_waiting++; } } } if (intel_register_read(EU_ATT + 8) || intel_register_read(EU_ATT + 0xc)) { fprintf(stderr, "Unknown attention bits\n"); } if (eus_waiting || shutting_down) break; } return eus_waiting; } #define eu_fd(bit) eu_info->debuggees[bit].fd #define eu_id(bit) eu_info->debuggees[bit].euid #define eu_tid(bit) eu_info->debuggees[bit].tid static struct eu_state * find_eu_shmem(int bit, volatile uint8_t *buf) { struct eu_state *eu; int mem_tid, mem_euid, i; for(i = 0; i < eu_info->num_threads; i++) { eu = (struct eu_state *)(buf + i * dh.per_thread_scratch); mem_tid = eu->sr0 & 0x7; mem_euid = (eu->sr0 >> 8) & 0xf; if (mem_tid == eu_tid(bit) && mem_euid == eu_id(bit)) break; eu = NULL; } return eu; } #define GRF_CMP(a, b) memcmp(a, b, sizeof(grf)) #define GRF_CPY(a, b) memcpy(a, b, sizeof(grf)) static int verify(struct eu_state *eu) { if (GRF_CMP(eu->version, protocol_version)) { if (debug) { printf("Bad EU protocol version %x %x\n", ((uint32_t *)&eu->version)[0], DEBUG_PROTOCOL_VERSION); dump_debug((void *)eu, sizeof(*eu)); } return -EBAD_PROTOCOL; } if (GRF_CMP(eu->state_magic, eu_msg)) { if (debug) { printf("Bad EU state magic %x %x\n", ((uint32_t *)&eu->state_magic)[0], ((uint32_t *)&eu->state_magic)[1]); dump_debug((void *)eu, sizeof(*eu)); } return -EBAD_MAGIC; } else { GRF_CPY(eu->state_magic, cpu_ack); } eu->sr0 = RSVD_EU << 8 | RSVD_THREAD; return 0; } static int collect_data(int bit, volatile uint8_t *buf) { struct eu_state *eu; ssize_t num; int ret; assert(eu_id(bit) != RSVD_EU); if (eu_fd(bit) == -1) { char name[128]; sprintf(name, "dump_eu_%02d_%d.bin", eu_id(bit), eu_tid(bit)); eu_fd(bit) = open(name, O_CREAT | O_WRONLY | O_TRUNC, S_IRWXO); if (eu_fd(bit) == -1) return -1; } eu = find_eu_shmem(bit, buf); if (eu == NULL) { if (debug) printf("Bad offset %d %d\n", eu_id(bit), eu_tid(bit)); return -EBAD_SHMEM; } ret = verify(eu); if (ret) return ret; num = write(eu_fd(bit), (void *)eu, sizeof(*eu)); if (num != sizeof(*eu)) { perror("unhandled write failure"); return EBAD_WRITE; } return 0; } static void clear_attn(int bit) { #if 0 /* * This works but doesn't allow for easily changed clearing bits */ static void clear_attn_old(int bit) { int bit_to_clear = bit % 32; bit_to_clear = 31 - bit_to_clear; intel_register_write(0x7830 + (bit/32) * 4, 0); intel_register_write(0x7830 + (bit/32) * 4, 1 << bit_to_clear); } #else if (!force_clear) { int bit_to_clear; bit_to_clear = eu_info->debuggees[bit].clr; intel_register_write(EU_ATT_CLR + (bit/32) * 4, 0); intel_register_write(EU_ATT_CLR + (bit/32) * 4, 1 << bit_to_clear); } else { intel_register_write(EU_ATT_CLR + 0, 0); intel_register_write(EU_ATT_CLR + 4, 0); intel_register_write(EU_ATT_CLR + 0, 0xffffffff); intel_register_write(EU_ATT_CLR + 4, 0xffffffff); } #endif } static void db_shutdown(int sig) { shutting_down = 1; printf("Shutting down...\n"); } static void __attribute__((noreturn)) die(int reason) { int i = 0; intel_register_write(EU_ATT_CLR, 0); intel_register_write(EU_ATT_CLR + 4, 0); if (debug_fd) close(debug_fd); for (i = 0; i < eu_info->num_threads; i++) { if (eu_info->debuggees[i].fd != -1) close(eu_info->debuggees[i].fd); } unmap_debug_buffer(); if (old_td_ctl) intel_register_write(TD_CTL, old_td_ctl); intel_register_access_fini(); exit(reason); } static int identify_device(int devid) { switch(devid) { case PCI_CHIP_SANDYBRIDGE_GT1: case PCI_CHIP_SANDYBRIDGE_M_GT1: case PCI_CHIP_SANDYBRIDGE_S: eu_info = >1; break; case PCI_CHIP_SANDYBRIDGE_GT2: case PCI_CHIP_SANDYBRIDGE_GT2_PLUS: case PCI_CHIP_SANDYBRIDGE_M_GT2: case PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS: eu_info = >2; break; default: return 1; } return 0; } static void parse_data(const char *file_name) { struct eu_state *eu_state = NULL; struct stat st; int fd = -1; int ret, i, elements; fd = open(file_name, O_RDONLY); if (fd == -1) { perror("open"); goto out; } ret = fstat(fd, &st); if (ret == -1) { perror("fstat"); goto out; } elements = st.st_size / sizeof(struct eu_state); if (elements == 0) { fprintf(stderr, "File not big enough for 1 entry\n"); goto out; } eu_state = mmap(0, st.st_size, PROT_READ, MAP_SHARED, fd, 0); if (eu_state == MAP_FAILED) { perror("mmap"); goto out; } for(i = 0; i < elements; i++) { printf("AIP: "); printf("%x\n", ((uint32_t *)eu_state[i].cr0)[2]); } out: if (eu_state) munmap(eu_state, st.st_size); if (fd != -1) close(fd); } static int wait_for_scratch_bo(void) { struct sockaddr_un addr; uint32_t version; int fd, ret, dh_handle = -1; assert(sizeof(version) == sizeof(dh.version)); fd = socket(AF_UNIX, SOCK_STREAM, 0); if (fd == -1) return -1; /* Clean up previous runs */ remove(SHADER_DEBUG_SOCKET); memset(&addr, 0, sizeof(addr)); addr.sun_family = AF_UNIX; strncpy(addr.sun_path, SHADER_DEBUG_SOCKET, sizeof(addr.sun_path) - 1); ret = bind(fd, (const struct sockaddr *)&addr, sizeof(addr)); if (ret == -1) { perror("listen"); return -1; } ret = listen(fd, 1); if (ret == -1) { perror("listen"); goto done; } while(1) { int client_fd; size_t count; char ack[] = DEBUG_HANDSHAKE_ACK; client_fd = accept(fd, NULL, NULL); if (client_fd == -1) { perror("accept"); goto done; } count = read(client_fd, &version, sizeof(version)); if (count != sizeof(version)) { perror("read version"); goto loop_out; } if (version != DEBUG_HANDSHAKE_VERSION) { fprintf(stderr, "Bad debug handshake\n"); goto loop_out; } count = read(client_fd, ((char *)&dh) + 1, sizeof(dh) - 1); if (count != sizeof(dh) - 1) { perror("read handshake"); goto loop_out; } count = write(client_fd, ack, sizeof(ack)); if (count != sizeof(ack)) { perror("write ack"); goto loop_out; } dh_handle = dh.flink_handle; if (debug > 0) { printf("Handshake completed successfully\n" "\tprotocol version = %d\n" "\tflink handle = %d\n" "\tper thread scratch = %x\n", version, dh.flink_handle, dh.per_thread_scratch); } loop_out: close(client_fd); break; } done: close(fd); return dh_handle; } static void setup_hw_bits(void) { intel_register_write(INST_PM, GEN6_GLOBAL_DEBUG_ENABLE | GEN6_GLOBAL_DEBUG_ENABLE << 16); old_td_ctl = intel_register_read(GEN6_TD_CTL); intel_register_write(GEN6_TD_CTL, GEN6_TD_CTL_FORCE_TD_BKPT); } int main(int argc, char* argv[]) { struct pci_device *pci_dev; volatile uint8_t *scratch = NULL; int bits[64]; int devid = -1, opt; while ((opt = getopt(argc, argv, "cdr:pf?h")) != -1) { switch (opt) { case 'c': clear_waits = 1; break; case 'd': debug = 1; break; case 'r': parse_data(optarg); exit(0); break; case 'p': devid = atoi(optarg); break; case 'f': force_clear = 1; break; case '?': case 'h': default: exit(0); } } pci_dev = intel_get_pci_device(); if (devid == -1) devid = pci_dev->device_id; if (identify_device(devid)) { abort(); } assert(intel_register_access_init(pci_dev, 1) == 0); memset(bits, -1, sizeof(bits)); /* * These events have to occur before the SR runs, or we need * non-blocking versions of the functions. */ if (!clear_waits) { int dh_handle; drm_fd = drm_open_driver(DRIVER_INTEL); bufmgr = drm_intel_bufmgr_gem_init(drm_fd, 4096); setup_hw_bits(); /* We are probably root, make files world friendly */ umask(0); dh_handle = wait_for_scratch_bo(); if (dh_handle == -1) { printf("No handle from mesa, please enter manually: "); if (fscanf(stdin, "%1d", &dh_handle) == 0) exit(1); } scratch_bo = intel_bo_gem_create_from_name(bufmgr, "scratch", dh_handle); if (scratch_bo == NULL) { fprintf(stderr, "Couldn't flink buffer\n"); abort(); } signal(SIGINT, db_shutdown); printf("Press Ctrl-C to stop\n"); } else { int time = force_clear ? 0 : 20000; while (wait_for_attn(time, bits)) { clear_attn(bits[0]); memset(bits, -1, sizeof(bits)); } die(0); } scratch = map_debug_buffer(); while (shutting_down == 0) { int num_events, i; memset(bits, -1, sizeof(bits)); num_events = wait_for_attn(-1, bits); if (num_events == 0) break; for (i = 0; i < num_events; i++) { assert(bits[i] < 64 && bits[i] >= 0); if (collect_data(bits[i], scratch)) { bits[i] = -1; continue; } clear_attn(bits[i]); } } die(0); return 0; } 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has the device open, # and to read the mappings of likely root-owned processes # for i in `lsof -t /dev/dri/card0`; do who=`readlink /proc/$i/exe` count=`grep /dev/dri/card0 /proc/$i/maps | wc -l | cut -f1 -d\ ` echo "$who [$i]: $count" done intel-gpu-tools-1.14/scripts/run-tests.sh0000755000175000017500000001013612665336131015423 00000000000000#!/bin/bash # # Copyright © 2014 Intel Corporation # # Permission is hereby granted, free of charge, to any person obtaining a # copy of this software and associated documentation files (the "Software"), # to deal in the Software without restriction, including without limitation # the rights to use, copy, modify, merge, publish, distribute, sublicense, # and/or sell copies of the Software, and to permit persons to whom the # Software is furnished to do so, subject to the following conditions: # # The above copyright notice and this permission notice (including the next # paragraph) shall be included in all copies or substantial portions of the # Software. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL # THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING # FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS # IN THE SOFTWARE. ROOT="`dirname $0`" ROOT="`readlink -f $ROOT/..`" IGT_TEST_ROOT="$ROOT/tests" RESULTS="$ROOT/results" PIGLIT=`which piglit 2> /dev/null` if [ ! -d "$IGT_TEST_ROOT" ]; then echo "Error: could not find tests directory." exit 1 fi if [ ! -f "$IGT_TEST_ROOT/test-list.txt" ]; then echo "Error: test list not found." echo "Please run make in the tests directory to generate the test list." exit 1 fi TEST_LIST=`cat "$IGT_TEST_ROOT/test-list.txt" | sed -e '/TESTLIST/d' -e 's/ /\n/g'` function download_piglit { git clone git://anongit.freedesktop.org/piglit "$ROOT/piglit" } function print_help { echo "Usage: run-tests.sh [options]" echo "Available options:" echo " -d download Piglit to $ROOT/piglit" echo " -h display this help message" echo " -l list all available tests" echo " -r store the results in directory" echo " (default: $RESULTS)" echo " -s create html summary" echo " -t only include tests that match the regular expression" echo " (can be used more than once)" echo " -v enable verbose mode" echo " -x exclude tests that match the regular expression" echo " (can be used more than once)" echo " -R resume interrupted test where the partial results" echo " are in the directory given by -r" echo " -n do not retry incomplete tests when resuming a" echo " test run with -R" echo "" echo "Useful patterns for test filtering are described in the API documentation." } function list_tests { for test in $TEST_LIST; do SUBTESTS=`"$IGT_TEST_ROOT/$test" --list-subtests` if [ -z "$SUBTESTS" ]; then echo "$test" else for subtest in $SUBTESTS; do echo "$test/$subtest" done fi done } while getopts ":dhlr:st:vx:Rn" opt; do case $opt in d) download_piglit; exit ;; h) print_help; exit ;; l) list_tests; exit ;; r) RESULTS="$OPTARG" ;; s) SUMMARY="html" ;; t) FILTER="$FILTER -t $OPTARG" ;; v) VERBOSE="-v" ;; x) EXCLUDE="$EXCLUDE -x $OPTARG" ;; R) RESUME="true" ;; n) NORETRY="--no-retry" ;; :) echo "Option -$OPTARG requires an argument." exit 1 ;; \?) echo "Unknown option: -$OPTARG" print_help exit 1 ;; esac done shift $(($OPTIND-1)) if [ "x$1" != "x" ]; then echo "Unknown option: $1" print_help exit 1 fi if [ "x$PIGLIT" == "x" ]; then PIGLIT="$ROOT/piglit/piglit" fi if [ ! -x "$PIGLIT" ]; then echo "Could not find Piglit." echo "Please install Piglit or use -d to download Piglit locally." exit 1 fi if [ "x$RESUME" != "x" ]; then sudo IGT_TEST_ROOT="$IGT_TEST_ROOT" "$PIGLIT" resume "$RESULTS" $NORETRY else mkdir -p "$RESULTS" sudo IGT_TEST_ROOT="$IGT_TEST_ROOT" "$PIGLIT" run igt "$RESULTS" -s $VERBOSE $EXCLUDE $FILTER fi if [ "$SUMMARY" == "html" ]; then "$PIGLIT" summary html --overwrite "$RESULTS/html" "$RESULTS" echo "HTML summary has been written to $RESULTS/html/index.html" fi intel-gpu-tools-1.14/scripts/Makefile.am0000644000175000017500000000010712665336131015151 00000000000000 dist_noinst_SCRIPTS = who.sh run-tests.sh noinst_PYTHON = throttle.py intel-gpu-tools-1.14/scripts/throttle.py0000755000175000017500000000313612665336131015344 00000000000000#!/usr/bin/env python # # Usage: # scripts/throttle.py trace-dat # # Shows how often the trace throttles and for how long. import getopt from tracecmd import * import sys requests = {} throttle = {} prev_throttle = 0; def read_events(t): for cpu in range(0, t.cpus): e = t.read_event(cpu) while e: if e.name == 'i915_gem_request_complete': seqno = e.num_field('seqno') requests[seqno] = e.ts; if e.name == 'i915_gem_request_throttle_begin': seqno = e.num_field('seqno') throttle[seqno] = e.ts if e.name == 'i915_gem_request_throttle_end': global prev_throttle ts = 0 sum_dispatch = 0 num_dispatch = 0 max_dispatch = 0 seqno = e.num_field('seqno') s = prev_throttle if s == 0: s = seqno while s <= seqno: if requests.has_key(s): if ts: delta = requests[s] - ts num_dispatch += 1 sum_dispatch += delta if delta > max_dispatch: max_dispatch = delta ts = requests[s] s += 1 if throttle.has_key(seqno) and throttle.has_key(prev_throttle) and num_dispatch: print "throttle +%d: %dms -- %d dispatch, avg %.3fms, max %dus" % ((throttle[seqno]-throttle[prev_throttle])/1000000, (e.ts - throttle[seqno]) / 1000000, num_dispatch, sum_dispatch / (1000000. * num_dispatch), max_dispatch / 1000) throttle[seqno] = e.ts prev_throttle = seqno e = t.read_event(cpu) if __name__ == "__main__": if len(sys.argv) >=2: filename = sys.argv[1] else: filename = "trace.dat" print "Initializing trace '%s'..." % (filename) trace = Trace(filename) read_events(trace) intel-gpu-tools-1.14/aclocal.m40000644000175000017500000041170112665336442013301 00000000000000# generated automatically by aclocal 1.15 -*- Autoconf -*- # Copyright (C) 1996-2014 Free Software Foundation, Inc. # This file is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or without modifications, as long as this notice is preserved. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY, to the extent permitted by law; without # even the implied warranty of MERCHANTABILITY or FITNESS FOR A # PARTICULAR PURPOSE. m4_ifndef([AC_CONFIG_MACRO_DIRS], [m4_defun([_AM_CONFIG_MACRO_DIRS], [])m4_defun([AC_CONFIG_MACRO_DIRS], [_AM_CONFIG_MACRO_DIRS($@)])]) m4_ifndef([AC_AUTOCONF_VERSION], [m4_copy([m4_PACKAGE_VERSION], [AC_AUTOCONF_VERSION])])dnl m4_if(m4_defn([AC_AUTOCONF_VERSION]), [2.69],, [m4_warning([this file was generated for autoconf 2.69. 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Unlike PKG_PROG_PKG_CONFIG, which checks the user's dnl installed version of pkg-config, this checks the developer's version dnl of pkg.m4 when generating configure. dnl dnl To ensure that this macro is defined, also add: dnl m4_ifndef([PKG_PREREQ], dnl [m4_fatal([must install pkg-config 0.29 or later before running autoconf/autogen])]) dnl dnl See the "Since" comment for each macro you use to see what version dnl of the macros you require. m4_defun([PKG_PREREQ], [m4_define([PKG_MACROS_VERSION], [0.29]) m4_if(m4_version_compare(PKG_MACROS_VERSION, [$1]), -1, [m4_fatal([pkg.m4 version $1 or higher is required but ]PKG_MACROS_VERSION[ found])]) ])dnl PKG_PREREQ dnl PKG_PROG_PKG_CONFIG([MIN-VERSION]) dnl ---------------------------------- dnl Since: 0.16 dnl dnl Search for the pkg-config tool and set the PKG_CONFIG variable to dnl first found in the path. Checks that the version of pkg-config found dnl is at least MIN-VERSION. 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AC_DEFUN([PKG_PROG_PKG_CONFIG], [m4_pattern_forbid([^_?PKG_[A-Z_]+$]) m4_pattern_allow([^PKG_CONFIG(_(PATH|LIBDIR|SYSROOT_DIR|ALLOW_SYSTEM_(CFLAGS|LIBS)))?$]) m4_pattern_allow([^PKG_CONFIG_(DISABLE_UNINSTALLED|TOP_BUILD_DIR|DEBUG_SPEW)$]) AC_ARG_VAR([PKG_CONFIG], [path to pkg-config utility]) AC_ARG_VAR([PKG_CONFIG_PATH], [directories to add to pkg-config's search path]) AC_ARG_VAR([PKG_CONFIG_LIBDIR], [path overriding pkg-config's built-in search path]) if test "x$ac_cv_env_PKG_CONFIG_set" != "xset"; then AC_PATH_TOOL([PKG_CONFIG], [pkg-config]) fi if test -n "$PKG_CONFIG"; then _pkg_min_version=m4_default([$1], [0.9.0]) AC_MSG_CHECKING([pkg-config is at least version $_pkg_min_version]) if $PKG_CONFIG --atleast-pkgconfig-version $_pkg_min_version; then AC_MSG_RESULT([yes]) else AC_MSG_RESULT([no]) PKG_CONFIG="" fi fi[]dnl ])dnl PKG_PROG_PKG_CONFIG dnl PKG_CHECK_EXISTS(MODULES, [ACTION-IF-FOUND], [ACTION-IF-NOT-FOUND]) dnl ------------------------------------------------------------------- dnl Since: 0.18 dnl dnl Check to see whether a particular set of modules exists. Similar to dnl PKG_CHECK_MODULES(), but does not set variables or print errors. dnl dnl Please remember that m4 expands AC_REQUIRE([PKG_PROG_PKG_CONFIG]) dnl only at the first occurence in configure.ac, so if the first place dnl it's called might be skipped (such as if it is within an "if", you dnl have to call PKG_CHECK_EXISTS manually AC_DEFUN([PKG_CHECK_EXISTS], [AC_REQUIRE([PKG_PROG_PKG_CONFIG])dnl if test -n "$PKG_CONFIG" && \ AC_RUN_LOG([$PKG_CONFIG --exists --print-errors "$1"]); then m4_default([$2], [:]) m4_ifvaln([$3], [else $3])dnl fi]) dnl _PKG_CONFIG([VARIABLE], [COMMAND], [MODULES]) dnl --------------------------------------------- dnl Internal wrapper calling pkg-config via PKG_CONFIG and setting dnl pkg_failed based on the result. m4_define([_PKG_CONFIG], [if test -n "$$1"; then pkg_cv_[]$1="$$1" elif test -n "$PKG_CONFIG"; then PKG_CHECK_EXISTS([$3], [pkg_cv_[]$1=`$PKG_CONFIG --[]$2 "$3" 2>/dev/null` test "x$?" != "x0" && pkg_failed=yes ], [pkg_failed=yes]) else pkg_failed=untried fi[]dnl ])dnl _PKG_CONFIG dnl _PKG_SHORT_ERRORS_SUPPORTED dnl --------------------------- dnl Internal check to see if pkg-config supports short errors. AC_DEFUN([_PKG_SHORT_ERRORS_SUPPORTED], [AC_REQUIRE([PKG_PROG_PKG_CONFIG]) if $PKG_CONFIG --atleast-pkgconfig-version 0.20; then _pkg_short_errors_supported=yes else _pkg_short_errors_supported=no fi[]dnl ])dnl _PKG_SHORT_ERRORS_SUPPORTED dnl PKG_CHECK_MODULES(VARIABLE-PREFIX, MODULES, [ACTION-IF-FOUND], dnl [ACTION-IF-NOT-FOUND]) dnl -------------------------------------------------------------- dnl Since: 0.4.0 dnl dnl Note that if there is a possibility the first call to dnl PKG_CHECK_MODULES might not happen, you should be sure to include an dnl explicit call to PKG_PROG_PKG_CONFIG in your configure.ac AC_DEFUN([PKG_CHECK_MODULES], [AC_REQUIRE([PKG_PROG_PKG_CONFIG])dnl AC_ARG_VAR([$1][_CFLAGS], [C compiler flags for $1, overriding pkg-config])dnl AC_ARG_VAR([$1][_LIBS], [linker flags for $1, overriding pkg-config])dnl pkg_failed=no AC_MSG_CHECKING([for $1]) _PKG_CONFIG([$1][_CFLAGS], [cflags], [$2]) _PKG_CONFIG([$1][_LIBS], [libs], [$2]) m4_define([_PKG_TEXT], [Alternatively, you may set the environment variables $1[]_CFLAGS and $1[]_LIBS to avoid the need to call pkg-config. See the pkg-config man page for more details.]) if test $pkg_failed = yes; then AC_MSG_RESULT([no]) _PKG_SHORT_ERRORS_SUPPORTED if test $_pkg_short_errors_supported = yes; then $1[]_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "$2" 2>&1` else $1[]_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "$2" 2>&1` fi # Put the nasty error message in config.log where it belongs echo "$$1[]_PKG_ERRORS" >&AS_MESSAGE_LOG_FD m4_default([$4], [AC_MSG_ERROR( [Package requirements ($2) were not met: $$1_PKG_ERRORS Consider adjusting the PKG_CONFIG_PATH environment variable if you installed software in a non-standard prefix. _PKG_TEXT])[]dnl ]) elif test $pkg_failed = untried; then AC_MSG_RESULT([no]) m4_default([$4], [AC_MSG_FAILURE( [The pkg-config script could not be found or is too old. Make sure it is in your PATH or set the PKG_CONFIG environment variable to the full path to pkg-config. _PKG_TEXT To get pkg-config, see .])[]dnl ]) else $1[]_CFLAGS=$pkg_cv_[]$1[]_CFLAGS $1[]_LIBS=$pkg_cv_[]$1[]_LIBS AC_MSG_RESULT([yes]) $3 fi[]dnl ])dnl PKG_CHECK_MODULES dnl PKG_CHECK_MODULES_STATIC(VARIABLE-PREFIX, MODULES, [ACTION-IF-FOUND], dnl [ACTION-IF-NOT-FOUND]) dnl --------------------------------------------------------------------- dnl Since: 0.29 dnl dnl Checks for existence of MODULES and gathers its build flags with dnl static libraries enabled. Sets VARIABLE-PREFIX_CFLAGS from --cflags dnl and VARIABLE-PREFIX_LIBS from --libs. dnl dnl Note that if there is a possibility the first call to dnl PKG_CHECK_MODULES_STATIC might not happen, you should be sure to dnl include an explicit call to PKG_PROG_PKG_CONFIG in your dnl configure.ac. AC_DEFUN([PKG_CHECK_MODULES_STATIC], [AC_REQUIRE([PKG_PROG_PKG_CONFIG])dnl _save_PKG_CONFIG=$PKG_CONFIG PKG_CONFIG="$PKG_CONFIG --static" PKG_CHECK_MODULES($@) PKG_CONFIG=$_save_PKG_CONFIG[]dnl ])dnl PKG_CHECK_MODULES_STATIC dnl PKG_INSTALLDIR([DIRECTORY]) dnl ------------------------- dnl Since: 0.27 dnl dnl Substitutes the variable pkgconfigdir as the location where a module dnl should install pkg-config .pc files. By default the directory is dnl $libdir/pkgconfig, but the default can be changed by passing dnl DIRECTORY. The user can override through the --with-pkgconfigdir dnl parameter. AC_DEFUN([PKG_INSTALLDIR], [m4_pushdef([pkg_default], [m4_default([$1], ['${libdir}/pkgconfig'])]) m4_pushdef([pkg_description], [pkg-config installation directory @<:@]pkg_default[@:>@]) AC_ARG_WITH([pkgconfigdir], [AS_HELP_STRING([--with-pkgconfigdir], pkg_description)],, [with_pkgconfigdir=]pkg_default) AC_SUBST([pkgconfigdir], [$with_pkgconfigdir]) m4_popdef([pkg_default]) m4_popdef([pkg_description]) ])dnl PKG_INSTALLDIR dnl PKG_NOARCH_INSTALLDIR([DIRECTORY]) dnl -------------------------------- dnl Since: 0.27 dnl dnl Substitutes the variable noarch_pkgconfigdir as the location where a dnl module should install arch-independent pkg-config .pc files. By dnl default the directory is $datadir/pkgconfig, but the default can be dnl changed by passing DIRECTORY. The user can override through the dnl --with-noarch-pkgconfigdir parameter. AC_DEFUN([PKG_NOARCH_INSTALLDIR], [m4_pushdef([pkg_default], [m4_default([$1], ['${datadir}/pkgconfig'])]) m4_pushdef([pkg_description], [pkg-config arch-independent installation directory @<:@]pkg_default[@:>@]) AC_ARG_WITH([noarch-pkgconfigdir], [AS_HELP_STRING([--with-noarch-pkgconfigdir], pkg_description)],, [with_noarch_pkgconfigdir=]pkg_default) AC_SUBST([noarch_pkgconfigdir], [$with_noarch_pkgconfigdir]) m4_popdef([pkg_default]) m4_popdef([pkg_description]) ])dnl PKG_NOARCH_INSTALLDIR dnl PKG_CHECK_VAR(VARIABLE, MODULE, CONFIG-VARIABLE, dnl [ACTION-IF-FOUND], [ACTION-IF-NOT-FOUND]) dnl ------------------------------------------- dnl Since: 0.28 dnl dnl Retrieves the value of the pkg-config variable for the given module. AC_DEFUN([PKG_CHECK_VAR], [AC_REQUIRE([PKG_PROG_PKG_CONFIG])dnl AC_ARG_VAR([$1], [value of $3 for $2, overriding pkg-config])dnl _PKG_CONFIG([$1], [variable="][$3]["], [$2]) AS_VAR_COPY([$1], [pkg_cv_][$1]) AS_VAR_IF([$1], [""], [$5], [$4])dnl ])dnl PKG_CHECK_VAR dnl xorg-macros.m4. Generated from xorg-macros.m4.in xorgversion.m4 by configure. dnl dnl Copyright (c) 2005, 2006, Oracle and/or its affiliates. All rights reserved. dnl dnl Permission is hereby granted, free of charge, to any person obtaining a dnl copy of this software and associated documentation files (the "Software"), dnl to deal in the Software without restriction, including without limitation dnl the rights to use, copy, modify, merge, publish, distribute, sublicense, dnl and/or sell copies of the Software, and to permit persons to whom the dnl Software is furnished to do so, subject to the following conditions: dnl dnl The above copyright notice and this permission notice (including the next dnl paragraph) shall be included in all copies or substantial portions of the dnl Software. dnl dnl THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR dnl IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, dnl FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL dnl THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER dnl LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING dnl FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER dnl DEALINGS IN THE SOFTWARE. # XORG_MACROS_VERSION(required-version) # ------------------------------------- # Minimum version: 1.1.0 # # If you're using a macro added in Version 1.1 or newer, include this in # your configure.ac with the minimum required version, such as: # XORG_MACROS_VERSION(1.1) # # To ensure that this macro is defined, also add: # m4_ifndef([XORG_MACROS_VERSION], # [m4_fatal([must install xorg-macros 1.1 or later before running autoconf/autogen])]) # # # See the "minimum version" comment for each macro you use to see what # version you require. m4_defun([XORG_MACROS_VERSION],[ m4_define([vers_have], [1.19.0]) m4_define([maj_have], m4_substr(vers_have, 0, m4_index(vers_have, [.]))) m4_define([maj_needed], m4_substr([$1], 0, m4_index([$1], [.]))) m4_if(m4_cmp(maj_have, maj_needed), 0,, [m4_fatal([xorg-macros major version ]maj_needed[ is required but ]vers_have[ found])]) m4_if(m4_version_compare(vers_have, [$1]), -1, [m4_fatal([xorg-macros version $1 or higher is required but ]vers_have[ found])]) m4_undefine([vers_have]) m4_undefine([maj_have]) m4_undefine([maj_needed]) ]) # XORG_MACROS_VERSION # XORG_PROG_RAWCPP() # ------------------ # Minimum version: 1.0.0 # # Find cpp program and necessary flags for use in pre-processing text files # such as man pages and config files AC_DEFUN([XORG_PROG_RAWCPP],[ AC_REQUIRE([AC_PROG_CPP]) AC_PATH_PROGS(RAWCPP, [cpp], [${CPP}], [$PATH:/bin:/usr/bin:/usr/lib:/usr/libexec:/usr/ccs/lib:/usr/ccs/lbin:/lib]) # Check for flag to avoid builtin definitions - assumes unix is predefined, # which is not the best choice for supporting other OS'es, but covers most # of the ones we need for now. AC_MSG_CHECKING([if $RAWCPP requires -undef]) AC_LANG_CONFTEST([AC_LANG_SOURCE([[Does cpp redefine unix ?]])]) if test `${RAWCPP} < conftest.$ac_ext | grep -c 'unix'` -eq 1 ; then AC_MSG_RESULT([no]) else if test `${RAWCPP} -undef < conftest.$ac_ext | grep -c 'unix'` -eq 1 ; then RAWCPPFLAGS=-undef AC_MSG_RESULT([yes]) # under Cygwin unix is still defined even with -undef elif test `${RAWCPP} -undef -ansi < conftest.$ac_ext | grep -c 'unix'` -eq 1 ; then RAWCPPFLAGS="-undef -ansi" AC_MSG_RESULT([yes, with -ansi]) else AC_MSG_ERROR([${RAWCPP} defines unix with or without -undef. I don't know what to do.]) fi fi rm -f conftest.$ac_ext AC_MSG_CHECKING([if $RAWCPP requires -traditional]) AC_LANG_CONFTEST([AC_LANG_SOURCE([[Does cpp preserve "whitespace"?]])]) if test `${RAWCPP} < conftest.$ac_ext | grep -c 'preserve \"'` -eq 1 ; then AC_MSG_RESULT([no]) else if test `${RAWCPP} -traditional < conftest.$ac_ext | grep -c 'preserve \"'` -eq 1 ; then TRADITIONALCPPFLAGS="-traditional" RAWCPPFLAGS="${RAWCPPFLAGS} -traditional" AC_MSG_RESULT([yes]) else AC_MSG_ERROR([${RAWCPP} does not preserve whitespace with or without -traditional. I don't know what to do.]) fi fi rm -f conftest.$ac_ext AC_SUBST(RAWCPPFLAGS) AC_SUBST(TRADITIONALCPPFLAGS) ]) # XORG_PROG_RAWCPP # XORG_MANPAGE_SECTIONS() # ----------------------- # Minimum version: 1.0.0 # # Determine which sections man pages go in for the different man page types # on this OS - replaces *ManSuffix settings in old Imake *.cf per-os files. # Not sure if there's any better way than just hardcoding by OS name. # Override default settings by setting environment variables # Added MAN_SUBSTS in version 1.8 # Added AC_PROG_SED in version 1.8 AC_DEFUN([XORG_MANPAGE_SECTIONS],[ AC_REQUIRE([AC_CANONICAL_HOST]) AC_REQUIRE([AC_PROG_SED]) if test x$APP_MAN_SUFFIX = x ; then APP_MAN_SUFFIX=1 fi if test x$APP_MAN_DIR = x ; then APP_MAN_DIR='$(mandir)/man$(APP_MAN_SUFFIX)' fi if test x$LIB_MAN_SUFFIX = x ; then LIB_MAN_SUFFIX=3 fi if test x$LIB_MAN_DIR = x ; then LIB_MAN_DIR='$(mandir)/man$(LIB_MAN_SUFFIX)' fi if test x$FILE_MAN_SUFFIX = x ; then case $host_os in solaris*) FILE_MAN_SUFFIX=4 ;; *) FILE_MAN_SUFFIX=5 ;; esac fi if test x$FILE_MAN_DIR = x ; then FILE_MAN_DIR='$(mandir)/man$(FILE_MAN_SUFFIX)' fi if test x$MISC_MAN_SUFFIX = x ; then case $host_os in solaris*) MISC_MAN_SUFFIX=5 ;; *) MISC_MAN_SUFFIX=7 ;; esac fi if test x$MISC_MAN_DIR = x ; then MISC_MAN_DIR='$(mandir)/man$(MISC_MAN_SUFFIX)' fi if test x$DRIVER_MAN_SUFFIX = x ; then case $host_os in solaris*) DRIVER_MAN_SUFFIX=7 ;; *) DRIVER_MAN_SUFFIX=4 ;; esac fi if test x$DRIVER_MAN_DIR = x ; then DRIVER_MAN_DIR='$(mandir)/man$(DRIVER_MAN_SUFFIX)' fi if test x$ADMIN_MAN_SUFFIX = x ; then case $host_os in solaris*) ADMIN_MAN_SUFFIX=1m ;; *) ADMIN_MAN_SUFFIX=8 ;; esac fi if test x$ADMIN_MAN_DIR = x ; then ADMIN_MAN_DIR='$(mandir)/man$(ADMIN_MAN_SUFFIX)' fi AC_SUBST([APP_MAN_SUFFIX]) AC_SUBST([LIB_MAN_SUFFIX]) AC_SUBST([FILE_MAN_SUFFIX]) AC_SUBST([MISC_MAN_SUFFIX]) AC_SUBST([DRIVER_MAN_SUFFIX]) AC_SUBST([ADMIN_MAN_SUFFIX]) AC_SUBST([APP_MAN_DIR]) AC_SUBST([LIB_MAN_DIR]) AC_SUBST([FILE_MAN_DIR]) AC_SUBST([MISC_MAN_DIR]) AC_SUBST([DRIVER_MAN_DIR]) AC_SUBST([ADMIN_MAN_DIR]) XORG_MAN_PAGE="X Version 11" AC_SUBST([XORG_MAN_PAGE]) MAN_SUBSTS="\ -e 's|__vendorversion__|\"\$(PACKAGE_STRING)\" \"\$(XORG_MAN_PAGE)\"|' \ -e 's|__xorgversion__|\"\$(PACKAGE_STRING)\" \"\$(XORG_MAN_PAGE)\"|' \ -e 's|__xservername__|Xorg|g' \ -e 's|__xconfigfile__|xorg.conf|g' \ -e 's|__projectroot__|\$(prefix)|g' \ -e 's|__apploaddir__|\$(appdefaultdir)|g' \ -e 's|__appmansuffix__|\$(APP_MAN_SUFFIX)|g' \ -e 's|__drivermansuffix__|\$(DRIVER_MAN_SUFFIX)|g' \ -e 's|__adminmansuffix__|\$(ADMIN_MAN_SUFFIX)|g' \ -e 's|__libmansuffix__|\$(LIB_MAN_SUFFIX)|g' \ -e 's|__miscmansuffix__|\$(MISC_MAN_SUFFIX)|g' \ -e 's|__filemansuffix__|\$(FILE_MAN_SUFFIX)|g'" AC_SUBST([MAN_SUBSTS]) ]) # XORG_MANPAGE_SECTIONS # XORG_CHECK_SGML_DOCTOOLS([MIN-VERSION]) # ------------------------ # Minimum version: 1.7.0 # # Defines the variable XORG_SGML_PATH containing the location of X11/defs.ent # provided by xorg-sgml-doctools, if installed. AC_DEFUN([XORG_CHECK_SGML_DOCTOOLS],[ AC_MSG_CHECKING([for X.Org SGML entities m4_ifval([$1],[>= $1])]) XORG_SGML_PATH= PKG_CHECK_EXISTS([xorg-sgml-doctools m4_ifval([$1],[>= $1])], [XORG_SGML_PATH=`$PKG_CONFIG --variable=sgmlrootdir xorg-sgml-doctools`], [m4_ifval([$1],[:], [if test x"$cross_compiling" != x"yes" ; then AC_CHECK_FILE([$prefix/share/sgml/X11/defs.ent], [XORG_SGML_PATH=$prefix/share/sgml]) fi]) ]) # Define variables STYLESHEET_SRCDIR and XSL_STYLESHEET containing # the path and the name of the doc stylesheet if test "x$XORG_SGML_PATH" != "x" ; then AC_MSG_RESULT([$XORG_SGML_PATH]) STYLESHEET_SRCDIR=$XORG_SGML_PATH/X11 XSL_STYLESHEET=$STYLESHEET_SRCDIR/xorg.xsl else AC_MSG_RESULT([no]) fi AC_SUBST(XORG_SGML_PATH) AC_SUBST(STYLESHEET_SRCDIR) AC_SUBST(XSL_STYLESHEET) AM_CONDITIONAL([HAVE_STYLESHEETS], [test "x$XSL_STYLESHEET" != "x"]) ]) # XORG_CHECK_SGML_DOCTOOLS # XORG_CHECK_LINUXDOC # ------------------- # Minimum version: 1.0.0 # # Defines the variable MAKE_TEXT if the necessary tools and # files are found. $(MAKE_TEXT) blah.sgml will then produce blah.txt. # Whether or not the necessary tools and files are found can be checked # with the AM_CONDITIONAL "BUILD_LINUXDOC" AC_DEFUN([XORG_CHECK_LINUXDOC],[ AC_REQUIRE([XORG_CHECK_SGML_DOCTOOLS]) AC_REQUIRE([XORG_WITH_PS2PDF]) AC_PATH_PROG(LINUXDOC, linuxdoc) AC_MSG_CHECKING([whether to build documentation]) if test x$XORG_SGML_PATH != x && test x$LINUXDOC != x ; then BUILDDOC=yes else BUILDDOC=no fi AM_CONDITIONAL(BUILD_LINUXDOC, [test x$BUILDDOC = xyes]) AC_MSG_RESULT([$BUILDDOC]) AC_MSG_CHECKING([whether to build pdf documentation]) if test x$have_ps2pdf != xno && test x$BUILD_PDFDOC != xno; then BUILDPDFDOC=yes else BUILDPDFDOC=no fi AM_CONDITIONAL(BUILD_PDFDOC, [test x$BUILDPDFDOC = xyes]) AC_MSG_RESULT([$BUILDPDFDOC]) MAKE_TEXT="SGML_SEARCH_PATH=$XORG_SGML_PATH GROFF_NO_SGR=y $LINUXDOC -B txt -f" MAKE_PS="SGML_SEARCH_PATH=$XORG_SGML_PATH $LINUXDOC -B latex --papersize=letter --output=ps" MAKE_PDF="$PS2PDF" MAKE_HTML="SGML_SEARCH_PATH=$XORG_SGML_PATH $LINUXDOC -B html --split=0" AC_SUBST(MAKE_TEXT) AC_SUBST(MAKE_PS) AC_SUBST(MAKE_PDF) AC_SUBST(MAKE_HTML) ]) # XORG_CHECK_LINUXDOC # XORG_CHECK_DOCBOOK # ------------------- # Minimum version: 1.0.0 # # Checks for the ability to build output formats from SGML DocBook source. # For XXX in {TXT, PDF, PS, HTML}, the AM_CONDITIONAL "BUILD_XXXDOC" # indicates whether the necessary tools and files are found and, if set, # $(MAKE_XXX) blah.sgml will produce blah.xxx. AC_DEFUN([XORG_CHECK_DOCBOOK],[ AC_REQUIRE([XORG_CHECK_SGML_DOCTOOLS]) BUILDTXTDOC=no BUILDPDFDOC=no BUILDPSDOC=no BUILDHTMLDOC=no AC_PATH_PROG(DOCBOOKPS, docbook2ps) AC_PATH_PROG(DOCBOOKPDF, docbook2pdf) AC_PATH_PROG(DOCBOOKHTML, docbook2html) AC_PATH_PROG(DOCBOOKTXT, docbook2txt) AC_MSG_CHECKING([whether to build text documentation]) if test x$XORG_SGML_PATH != x && test x$DOCBOOKTXT != x && test x$BUILD_TXTDOC != xno; then BUILDTXTDOC=yes fi AM_CONDITIONAL(BUILD_TXTDOC, [test x$BUILDTXTDOC = xyes]) AC_MSG_RESULT([$BUILDTXTDOC]) AC_MSG_CHECKING([whether to build PDF documentation]) if test x$XORG_SGML_PATH != x && test x$DOCBOOKPDF != x && test x$BUILD_PDFDOC != xno; then BUILDPDFDOC=yes fi AM_CONDITIONAL(BUILD_PDFDOC, [test x$BUILDPDFDOC = xyes]) AC_MSG_RESULT([$BUILDPDFDOC]) AC_MSG_CHECKING([whether to build PostScript documentation]) if test x$XORG_SGML_PATH != x && test x$DOCBOOKPS != x && test x$BUILD_PSDOC != xno; then BUILDPSDOC=yes fi AM_CONDITIONAL(BUILD_PSDOC, [test x$BUILDPSDOC = xyes]) AC_MSG_RESULT([$BUILDPSDOC]) AC_MSG_CHECKING([whether to build HTML documentation]) if test x$XORG_SGML_PATH != x && test x$DOCBOOKHTML != x && test x$BUILD_HTMLDOC != xno; then BUILDHTMLDOC=yes fi AM_CONDITIONAL(BUILD_HTMLDOC, [test x$BUILDHTMLDOC = xyes]) AC_MSG_RESULT([$BUILDHTMLDOC]) MAKE_TEXT="SGML_SEARCH_PATH=$XORG_SGML_PATH $DOCBOOKTXT" MAKE_PS="SGML_SEARCH_PATH=$XORG_SGML_PATH $DOCBOOKPS" MAKE_PDF="SGML_SEARCH_PATH=$XORG_SGML_PATH $DOCBOOKPDF" MAKE_HTML="SGML_SEARCH_PATH=$XORG_SGML_PATH $DOCBOOKHTML" AC_SUBST(MAKE_TEXT) AC_SUBST(MAKE_PS) AC_SUBST(MAKE_PDF) AC_SUBST(MAKE_HTML) ]) # XORG_CHECK_DOCBOOK # XORG_WITH_XMLTO([MIN-VERSION], [DEFAULT]) # ---------------- # Minimum version: 1.5.0 # Minimum version for optional DEFAULT argument: 1.11.0 # # Documentation tools are not always available on all platforms and sometimes # not at the appropriate level. This macro enables a module to test for the # presence of the tool and obtain it's path in separate variables. Coupled with # the --with-xmlto option, it allows maximum flexibilty in making decisions # as whether or not to use the xmlto package. When DEFAULT is not specified, # --with-xmlto assumes 'auto'. # # Interface to module: # HAVE_XMLTO: used in makefiles to conditionally generate documentation # XMLTO: returns the path of the xmlto program found # returns the path set by the user in the environment # --with-xmlto: 'yes' user instructs the module to use xmlto # 'no' user instructs the module not to use xmlto # # Added in version 1.10.0 # HAVE_XMLTO_TEXT: used in makefiles to conditionally generate text documentation # xmlto for text output requires either lynx, links, or w3m browsers # # If the user sets the value of XMLTO, AC_PATH_PROG skips testing the path. # AC_DEFUN([XORG_WITH_XMLTO],[ AC_ARG_VAR([XMLTO], [Path to xmlto command]) m4_define([_defopt], m4_default([$2], [auto])) AC_ARG_WITH(xmlto, AS_HELP_STRING([--with-xmlto], [Use xmlto to regenerate documentation (default: ]_defopt[)]), [use_xmlto=$withval], [use_xmlto=]_defopt) m4_undefine([_defopt]) if test "x$use_xmlto" = x"auto"; then AC_PATH_PROG([XMLTO], [xmlto]) if test "x$XMLTO" = "x"; then AC_MSG_WARN([xmlto not found - documentation targets will be skipped]) have_xmlto=no else have_xmlto=yes fi elif test "x$use_xmlto" = x"yes" ; then AC_PATH_PROG([XMLTO], [xmlto]) if test "x$XMLTO" = "x"; then AC_MSG_ERROR([--with-xmlto=yes specified but xmlto not found in PATH]) fi have_xmlto=yes elif test "x$use_xmlto" = x"no" ; then if test "x$XMLTO" != "x"; then AC_MSG_WARN([ignoring XMLTO environment variable since --with-xmlto=no was specified]) fi have_xmlto=no else AC_MSG_ERROR([--with-xmlto expects 'yes' or 'no']) fi # Test for a minimum version of xmlto, if provided. m4_ifval([$1], [if test "$have_xmlto" = yes; then # scrape the xmlto version AC_MSG_CHECKING([the xmlto version]) xmlto_version=`$XMLTO --version 2>/dev/null | cut -d' ' -f3` AC_MSG_RESULT([$xmlto_version]) AS_VERSION_COMPARE([$xmlto_version], [$1], [if test "x$use_xmlto" = xauto; then AC_MSG_WARN([xmlto version $xmlto_version found, but $1 needed]) have_xmlto=no else AC_MSG_ERROR([xmlto version $xmlto_version found, but $1 needed]) fi]) fi]) # Test for the ability of xmlto to generate a text target # # NOTE: xmlto 0.0.27 or higher return a non-zero return code in the # following test for empty XML docbook files. # For compatibility reasons use the following empty XML docbook file and if # it fails try it again with a non-empty XML file. have_xmlto_text=no cat > conftest.xml << "EOF" EOF AS_IF([test "$have_xmlto" = yes], [AS_IF([$XMLTO --skip-validation txt conftest.xml >/dev/null 2>&1], [have_xmlto_text=yes], [# Try it again with a non-empty XML file. cat > conftest.xml << "EOF" EOF AS_IF([$XMLTO --skip-validation txt conftest.xml >/dev/null 2>&1], [have_xmlto_text=yes], [AC_MSG_WARN([xmlto cannot generate text format, this format skipped])])])]) rm -f conftest.xml AM_CONDITIONAL([HAVE_XMLTO_TEXT], [test $have_xmlto_text = yes]) AM_CONDITIONAL([HAVE_XMLTO], [test "$have_xmlto" = yes]) ]) # XORG_WITH_XMLTO # XORG_WITH_XSLTPROC([MIN-VERSION], [DEFAULT]) # -------------------------------------------- # Minimum version: 1.12.0 # Minimum version for optional DEFAULT argument: 1.12.0 # # XSLT (Extensible Stylesheet Language Transformations) is a declarative, # XML-based language used for the transformation of XML documents. # The xsltproc command line tool is for applying XSLT stylesheets to XML documents. # It is used under the cover by xmlto to generate html files from DocBook/XML. # The XSLT processor is often used as a standalone tool for transformations. # It should not be assumed that this tool is used only to work with documnetation. # When DEFAULT is not specified, --with-xsltproc assumes 'auto'. # # Interface to module: # HAVE_XSLTPROC: used in makefiles to conditionally generate documentation # XSLTPROC: returns the path of the xsltproc program found # returns the path set by the user in the environment # --with-xsltproc: 'yes' user instructs the module to use xsltproc # 'no' user instructs the module not to use xsltproc # have_xsltproc: returns yes if xsltproc found in PATH or no # # If the user sets the value of XSLTPROC, AC_PATH_PROG skips testing the path. # AC_DEFUN([XORG_WITH_XSLTPROC],[ AC_ARG_VAR([XSLTPROC], [Path to xsltproc command]) # Preserves the interface, should it be implemented later m4_ifval([$1], [m4_warn([syntax], [Checking for xsltproc MIN-VERSION is not implemented])]) m4_define([_defopt], m4_default([$2], [auto])) AC_ARG_WITH(xsltproc, AS_HELP_STRING([--with-xsltproc], [Use xsltproc for the transformation of XML documents (default: ]_defopt[)]), [use_xsltproc=$withval], [use_xsltproc=]_defopt) m4_undefine([_defopt]) if test "x$use_xsltproc" = x"auto"; then AC_PATH_PROG([XSLTPROC], [xsltproc]) if test "x$XSLTPROC" = "x"; then AC_MSG_WARN([xsltproc not found - cannot transform XML documents]) have_xsltproc=no else have_xsltproc=yes fi elif test "x$use_xsltproc" = x"yes" ; then AC_PATH_PROG([XSLTPROC], [xsltproc]) if test "x$XSLTPROC" = "x"; then AC_MSG_ERROR([--with-xsltproc=yes specified but xsltproc not found in PATH]) fi have_xsltproc=yes elif test "x$use_xsltproc" = x"no" ; then if test "x$XSLTPROC" != "x"; then AC_MSG_WARN([ignoring XSLTPROC environment variable since --with-xsltproc=no was specified]) fi have_xsltproc=no else AC_MSG_ERROR([--with-xsltproc expects 'yes' or 'no']) fi AM_CONDITIONAL([HAVE_XSLTPROC], [test "$have_xsltproc" = yes]) ]) # XORG_WITH_XSLTPROC # XORG_WITH_PERL([MIN-VERSION], [DEFAULT]) # ---------------------------------------- # Minimum version: 1.15.0 # # PERL (Practical Extraction and Report Language) is a language optimized for # scanning arbitrary text files, extracting information from those text files, # and printing reports based on that information. # # When DEFAULT is not specified, --with-perl assumes 'auto'. # # Interface to module: # HAVE_PERL: used in makefiles to conditionally scan text files # PERL: returns the path of the perl program found # returns the path set by the user in the environment # --with-perl: 'yes' user instructs the module to use perl # 'no' user instructs the module not to use perl # have_perl: returns yes if perl found in PATH or no # # If the user sets the value of PERL, AC_PATH_PROG skips testing the path. # AC_DEFUN([XORG_WITH_PERL],[ AC_ARG_VAR([PERL], [Path to perl command]) # Preserves the interface, should it be implemented later m4_ifval([$1], [m4_warn([syntax], [Checking for perl MIN-VERSION is not implemented])]) m4_define([_defopt], m4_default([$2], [auto])) AC_ARG_WITH(perl, AS_HELP_STRING([--with-perl], [Use perl for extracting information from files (default: ]_defopt[)]), [use_perl=$withval], [use_perl=]_defopt) m4_undefine([_defopt]) if test "x$use_perl" = x"auto"; then AC_PATH_PROG([PERL], [perl]) if test "x$PERL" = "x"; then AC_MSG_WARN([perl not found - cannot extract information and report]) have_perl=no else have_perl=yes fi elif test "x$use_perl" = x"yes" ; then AC_PATH_PROG([PERL], [perl]) if test "x$PERL" = "x"; then AC_MSG_ERROR([--with-perl=yes specified but perl not found in PATH]) fi have_perl=yes elif test "x$use_perl" = x"no" ; then if test "x$PERL" != "x"; then AC_MSG_WARN([ignoring PERL environment variable since --with-perl=no was specified]) fi have_perl=no else AC_MSG_ERROR([--with-perl expects 'yes' or 'no']) fi AM_CONDITIONAL([HAVE_PERL], [test "$have_perl" = yes]) ]) # XORG_WITH_PERL # XORG_WITH_ASCIIDOC([MIN-VERSION], [DEFAULT]) # ---------------- # Minimum version: 1.5.0 # Minimum version for optional DEFAULT argument: 1.11.0 # # Documentation tools are not always available on all platforms and sometimes # not at the appropriate level. This macro enables a module to test for the # presence of the tool and obtain it's path in separate variables. Coupled with # the --with-asciidoc option, it allows maximum flexibilty in making decisions # as whether or not to use the asciidoc package. When DEFAULT is not specified, # --with-asciidoc assumes 'auto'. # # Interface to module: # HAVE_ASCIIDOC: used in makefiles to conditionally generate documentation # ASCIIDOC: returns the path of the asciidoc program found # returns the path set by the user in the environment # --with-asciidoc: 'yes' user instructs the module to use asciidoc # 'no' user instructs the module not to use asciidoc # # If the user sets the value of ASCIIDOC, AC_PATH_PROG skips testing the path. # AC_DEFUN([XORG_WITH_ASCIIDOC],[ AC_ARG_VAR([ASCIIDOC], [Path to asciidoc command]) m4_define([_defopt], m4_default([$2], [auto])) AC_ARG_WITH(asciidoc, AS_HELP_STRING([--with-asciidoc], [Use asciidoc to regenerate documentation (default: ]_defopt[)]), [use_asciidoc=$withval], [use_asciidoc=]_defopt) m4_undefine([_defopt]) if test "x$use_asciidoc" = x"auto"; then AC_PATH_PROG([ASCIIDOC], [asciidoc]) if test "x$ASCIIDOC" = "x"; then AC_MSG_WARN([asciidoc not found - documentation targets will be skipped]) have_asciidoc=no else have_asciidoc=yes fi elif test "x$use_asciidoc" = x"yes" ; then AC_PATH_PROG([ASCIIDOC], [asciidoc]) if test "x$ASCIIDOC" = "x"; then AC_MSG_ERROR([--with-asciidoc=yes specified but asciidoc not found in PATH]) fi have_asciidoc=yes elif test "x$use_asciidoc" = x"no" ; then if test "x$ASCIIDOC" != "x"; then AC_MSG_WARN([ignoring ASCIIDOC environment variable since --with-asciidoc=no was specified]) fi have_asciidoc=no else AC_MSG_ERROR([--with-asciidoc expects 'yes' or 'no']) fi m4_ifval([$1], [if test "$have_asciidoc" = yes; then # scrape the asciidoc version AC_MSG_CHECKING([the asciidoc version]) asciidoc_version=`$ASCIIDOC --version 2>/dev/null | cut -d' ' -f2` AC_MSG_RESULT([$asciidoc_version]) AS_VERSION_COMPARE([$asciidoc_version], [$1], [if test "x$use_asciidoc" = xauto; then AC_MSG_WARN([asciidoc version $asciidoc_version found, but $1 needed]) have_asciidoc=no else AC_MSG_ERROR([asciidoc version $asciidoc_version found, but $1 needed]) fi]) fi]) AM_CONDITIONAL([HAVE_ASCIIDOC], [test "$have_asciidoc" = yes]) ]) # XORG_WITH_ASCIIDOC # XORG_WITH_DOXYGEN([MIN-VERSION], [DEFAULT]) # ------------------------------------------- # Minimum version: 1.5.0 # Minimum version for optional DEFAULT argument: 1.11.0 # Minimum version for optional DOT checking: 1.18.0 # # Documentation tools are not always available on all platforms and sometimes # not at the appropriate level. This macro enables a module to test for the # presence of the tool and obtain it's path in separate variables. Coupled with # the --with-doxygen option, it allows maximum flexibilty in making decisions # as whether or not to use the doxygen package. When DEFAULT is not specified, # --with-doxygen assumes 'auto'. # # Interface to module: # HAVE_DOXYGEN: used in makefiles to conditionally generate documentation # DOXYGEN: returns the path of the doxygen program found # returns the path set by the user in the environment # --with-doxygen: 'yes' user instructs the module to use doxygen # 'no' user instructs the module not to use doxygen # # If the user sets the value of DOXYGEN, AC_PATH_PROG skips testing the path. # AC_DEFUN([XORG_WITH_DOXYGEN],[ AC_ARG_VAR([DOXYGEN], [Path to doxygen command]) AC_ARG_VAR([DOT], [Path to the dot graphics utility]) m4_define([_defopt], m4_default([$2], [auto])) AC_ARG_WITH(doxygen, AS_HELP_STRING([--with-doxygen], [Use doxygen to regenerate documentation (default: ]_defopt[)]), [use_doxygen=$withval], [use_doxygen=]_defopt) m4_undefine([_defopt]) if test "x$use_doxygen" = x"auto"; then AC_PATH_PROG([DOXYGEN], [doxygen]) if test "x$DOXYGEN" = "x"; then AC_MSG_WARN([doxygen not found - documentation targets will be skipped]) have_doxygen=no else have_doxygen=yes fi elif test "x$use_doxygen" = x"yes" ; then AC_PATH_PROG([DOXYGEN], [doxygen]) if test "x$DOXYGEN" = "x"; then AC_MSG_ERROR([--with-doxygen=yes specified but doxygen not found in PATH]) fi have_doxygen=yes elif test "x$use_doxygen" = x"no" ; then if test "x$DOXYGEN" != "x"; then AC_MSG_WARN([ignoring DOXYGEN environment variable since --with-doxygen=no was specified]) fi have_doxygen=no else AC_MSG_ERROR([--with-doxygen expects 'yes' or 'no']) fi m4_ifval([$1], [if test "$have_doxygen" = yes; then # scrape the doxygen version AC_MSG_CHECKING([the doxygen version]) doxygen_version=`$DOXYGEN --version 2>/dev/null` AC_MSG_RESULT([$doxygen_version]) AS_VERSION_COMPARE([$doxygen_version], [$1], [if test "x$use_doxygen" = xauto; then AC_MSG_WARN([doxygen version $doxygen_version found, but $1 needed]) have_doxygen=no else AC_MSG_ERROR([doxygen version $doxygen_version found, but $1 needed]) fi]) fi]) dnl Check for DOT if we have doxygen. The caller decides if it is mandatory dnl HAVE_DOT is a variable that can be used in your doxygen.in config file: dnl HAVE_DOT = @HAVE_DOT@ HAVE_DOT=no if test "x$have_doxygen" = "xyes"; then AC_PATH_PROG([DOT], [dot]) if test "x$DOT" != "x"; then HAVE_DOT=yes fi fi AC_SUBST([HAVE_DOT]) AM_CONDITIONAL([HAVE_DOT], [test "$HAVE_DOT" = "yes"]) AM_CONDITIONAL([HAVE_DOXYGEN], [test "$have_doxygen" = yes]) ]) # XORG_WITH_DOXYGEN # XORG_WITH_GROFF([DEFAULT]) # ---------------- # Minimum version: 1.6.0 # Minimum version for optional DEFAULT argument: 1.11.0 # # Documentation tools are not always available on all platforms and sometimes # not at the appropriate level. This macro enables a module to test for the # presence of the tool and obtain it's path in separate variables. Coupled with # the --with-groff option, it allows maximum flexibilty in making decisions # as whether or not to use the groff package. When DEFAULT is not specified, # --with-groff assumes 'auto'. # # Interface to module: # HAVE_GROFF: used in makefiles to conditionally generate documentation # HAVE_GROFF_MM: the memorandum macros (-mm) package # HAVE_GROFF_MS: the -ms macros package # GROFF: returns the path of the groff program found # returns the path set by the user in the environment # --with-groff: 'yes' user instructs the module to use groff # 'no' user instructs the module not to use groff # # Added in version 1.9.0: # HAVE_GROFF_HTML: groff has dependencies to output HTML format: # pnmcut pnmcrop pnmtopng pnmtops from the netpbm package. # psselect from the psutils package. # the ghostcript package. Refer to the grohtml man pages # # If the user sets the value of GROFF, AC_PATH_PROG skips testing the path. # # OS and distros often splits groff in a basic and full package, the former # having the groff program and the later having devices, fonts and macros # Checking for the groff executable is not enough. # # If macros are missing, we cannot assume that groff is useless, so we don't # unset HAVE_GROFF or GROFF env variables. # HAVE_GROFF_?? can never be true while HAVE_GROFF is false. # AC_DEFUN([XORG_WITH_GROFF],[ AC_ARG_VAR([GROFF], [Path to groff command]) m4_define([_defopt], m4_default([$1], [auto])) AC_ARG_WITH(groff, AS_HELP_STRING([--with-groff], [Use groff to regenerate documentation (default: ]_defopt[)]), [use_groff=$withval], [use_groff=]_defopt) m4_undefine([_defopt]) if test "x$use_groff" = x"auto"; then AC_PATH_PROG([GROFF], [groff]) if test "x$GROFF" = "x"; then AC_MSG_WARN([groff not found - documentation targets will be skipped]) have_groff=no else have_groff=yes fi elif test "x$use_groff" = x"yes" ; then AC_PATH_PROG([GROFF], [groff]) if test "x$GROFF" = "x"; then AC_MSG_ERROR([--with-groff=yes specified but groff not found in PATH]) fi have_groff=yes elif test "x$use_groff" = x"no" ; then if test "x$GROFF" != "x"; then AC_MSG_WARN([ignoring GROFF environment variable since --with-groff=no was specified]) fi have_groff=no else AC_MSG_ERROR([--with-groff expects 'yes' or 'no']) fi # We have groff, test for the presence of the macro packages if test "x$have_groff" = x"yes"; then AC_MSG_CHECKING([for ${GROFF} -ms macros]) if ${GROFF} -ms -I. /dev/null >/dev/null 2>&1 ; then groff_ms_works=yes else groff_ms_works=no fi AC_MSG_RESULT([$groff_ms_works]) AC_MSG_CHECKING([for ${GROFF} -mm macros]) if ${GROFF} -mm -I. /dev/null >/dev/null 2>&1 ; then groff_mm_works=yes else groff_mm_works=no fi AC_MSG_RESULT([$groff_mm_works]) fi # We have groff, test for HTML dependencies, one command per package if test "x$have_groff" = x"yes"; then AC_PATH_PROGS(GS_PATH, [gs gswin32c]) AC_PATH_PROG(PNMTOPNG_PATH, [pnmtopng]) AC_PATH_PROG(PSSELECT_PATH, [psselect]) if test "x$GS_PATH" != "x" -a "x$PNMTOPNG_PATH" != "x" -a "x$PSSELECT_PATH" != "x"; then have_groff_html=yes else have_groff_html=no AC_MSG_WARN([grohtml dependencies not found - HTML Documentation skipped. Refer to grohtml man pages]) fi fi # Set Automake conditionals for Makefiles AM_CONDITIONAL([HAVE_GROFF], [test "$have_groff" = yes]) AM_CONDITIONAL([HAVE_GROFF_MS], [test "$groff_ms_works" = yes]) AM_CONDITIONAL([HAVE_GROFF_MM], [test "$groff_mm_works" = yes]) AM_CONDITIONAL([HAVE_GROFF_HTML], [test "$have_groff_html" = yes]) ]) # XORG_WITH_GROFF # XORG_WITH_FOP([MIN-VERSION], [DEFAULT]) # --------------------------------------- # Minimum version: 1.6.0 # Minimum version for optional DEFAULT argument: 1.11.0 # Minimum version for optional MIN-VERSION argument: 1.15.0 # # Documentation tools are not always available on all platforms and sometimes # not at the appropriate level. This macro enables a module to test for the # presence of the tool and obtain it's path in separate variables. Coupled with # the --with-fop option, it allows maximum flexibilty in making decisions # as whether or not to use the fop package. When DEFAULT is not specified, # --with-fop assumes 'auto'. # # Interface to module: # HAVE_FOP: used in makefiles to conditionally generate documentation # FOP: returns the path of the fop program found # returns the path set by the user in the environment # --with-fop: 'yes' user instructs the module to use fop # 'no' user instructs the module not to use fop # # If the user sets the value of FOP, AC_PATH_PROG skips testing the path. # AC_DEFUN([XORG_WITH_FOP],[ AC_ARG_VAR([FOP], [Path to fop command]) m4_define([_defopt], m4_default([$2], [auto])) AC_ARG_WITH(fop, AS_HELP_STRING([--with-fop], [Use fop to regenerate documentation (default: ]_defopt[)]), [use_fop=$withval], [use_fop=]_defopt) m4_undefine([_defopt]) if test "x$use_fop" = x"auto"; then AC_PATH_PROG([FOP], [fop]) if test "x$FOP" = "x"; then AC_MSG_WARN([fop not found - documentation targets will be skipped]) have_fop=no else have_fop=yes fi elif test "x$use_fop" = x"yes" ; then AC_PATH_PROG([FOP], [fop]) if test "x$FOP" = "x"; then AC_MSG_ERROR([--with-fop=yes specified but fop not found in PATH]) fi have_fop=yes elif test "x$use_fop" = x"no" ; then if test "x$FOP" != "x"; then AC_MSG_WARN([ignoring FOP environment variable since --with-fop=no was specified]) fi have_fop=no else AC_MSG_ERROR([--with-fop expects 'yes' or 'no']) fi # Test for a minimum version of fop, if provided. m4_ifval([$1], [if test "$have_fop" = yes; then # scrape the fop version AC_MSG_CHECKING([for fop minimum version]) fop_version=`$FOP -version 2>/dev/null | cut -d' ' -f3` AC_MSG_RESULT([$fop_version]) AS_VERSION_COMPARE([$fop_version], [$1], [if test "x$use_fop" = xauto; then AC_MSG_WARN([fop version $fop_version found, but $1 needed]) have_fop=no else AC_MSG_ERROR([fop version $fop_version found, but $1 needed]) fi]) fi]) AM_CONDITIONAL([HAVE_FOP], [test "$have_fop" = yes]) ]) # XORG_WITH_FOP # XORG_WITH_M4([MIN-VERSION]) # --------------------------- # Minimum version: 1.19.0 # # This macro attempts to locate an m4 macro processor which supports # -I option and is only useful for modules relying on M4 in order to # expand macros in source code files. # # Interface to module: # M4: returns the path of the m4 program found # returns the path set by the user in the environment # AC_DEFUN([XORG_WITH_M4], [ AC_CACHE_CHECK([for m4 that supports -I option], [ac_cv_path_M4], [AC_PATH_PROGS_FEATURE_CHECK([M4], [m4 gm4], [[$ac_path_M4 -I. /dev/null > /dev/null 2>&1 && \ ac_cv_path_M4=$ac_path_M4 ac_path_M4_found=:]], [AC_MSG_ERROR([could not find m4 that supports -I option])], [$PATH:/usr/gnu/bin])]) AC_SUBST([M4], [$ac_cv_path_M4]) ]) # XORG_WITH_M4 # XORG_WITH_PS2PDF([DEFAULT]) # ---------------- # Minimum version: 1.6.0 # Minimum version for optional DEFAULT argument: 1.11.0 # # Documentation tools are not always available on all platforms and sometimes # not at the appropriate level. This macro enables a module to test for the # presence of the tool and obtain it's path in separate variables. Coupled with # the --with-ps2pdf option, it allows maximum flexibilty in making decisions # as whether or not to use the ps2pdf package. When DEFAULT is not specified, # --with-ps2pdf assumes 'auto'. # # Interface to module: # HAVE_PS2PDF: used in makefiles to conditionally generate documentation # PS2PDF: returns the path of the ps2pdf program found # returns the path set by the user in the environment # --with-ps2pdf: 'yes' user instructs the module to use ps2pdf # 'no' user instructs the module not to use ps2pdf # # If the user sets the value of PS2PDF, AC_PATH_PROG skips testing the path. # AC_DEFUN([XORG_WITH_PS2PDF],[ AC_ARG_VAR([PS2PDF], [Path to ps2pdf command]) m4_define([_defopt], m4_default([$1], [auto])) AC_ARG_WITH(ps2pdf, AS_HELP_STRING([--with-ps2pdf], [Use ps2pdf to regenerate documentation (default: ]_defopt[)]), [use_ps2pdf=$withval], [use_ps2pdf=]_defopt) m4_undefine([_defopt]) if test "x$use_ps2pdf" = x"auto"; then AC_PATH_PROG([PS2PDF], [ps2pdf]) if test "x$PS2PDF" = "x"; then AC_MSG_WARN([ps2pdf not found - documentation targets will be skipped]) have_ps2pdf=no else have_ps2pdf=yes fi elif test "x$use_ps2pdf" = x"yes" ; then AC_PATH_PROG([PS2PDF], [ps2pdf]) if test "x$PS2PDF" = "x"; then AC_MSG_ERROR([--with-ps2pdf=yes specified but ps2pdf not found in PATH]) fi have_ps2pdf=yes elif test "x$use_ps2pdf" = x"no" ; then if test "x$PS2PDF" != "x"; then AC_MSG_WARN([ignoring PS2PDF environment variable since --with-ps2pdf=no was specified]) fi have_ps2pdf=no else AC_MSG_ERROR([--with-ps2pdf expects 'yes' or 'no']) fi AM_CONDITIONAL([HAVE_PS2PDF], [test "$have_ps2pdf" = yes]) ]) # XORG_WITH_PS2PDF # XORG_ENABLE_DOCS (enable_docs=yes) # ---------------- # Minimum version: 1.6.0 # # Documentation tools are not always available on all platforms and sometimes # not at the appropriate level. This macro enables a builder to skip all # documentation targets except traditional man pages. # Combined with the specific tool checking macros XORG_WITH_*, it provides # maximum flexibilty in controlling documentation building. # Refer to: # XORG_WITH_XMLTO --with-xmlto # XORG_WITH_ASCIIDOC --with-asciidoc # XORG_WITH_DOXYGEN --with-doxygen # XORG_WITH_FOP --with-fop # XORG_WITH_GROFF --with-groff # XORG_WITH_PS2PDF --with-ps2pdf # # Interface to module: # ENABLE_DOCS: used in makefiles to conditionally generate documentation # --enable-docs: 'yes' user instructs the module to generate docs # 'no' user instructs the module not to generate docs # parm1: specify the default value, yes or no. # AC_DEFUN([XORG_ENABLE_DOCS],[ m4_define([docs_default], m4_default([$1], [yes])) AC_ARG_ENABLE(docs, AS_HELP_STRING([--enable-docs], [Enable building the documentation (default: ]docs_default[)]), [build_docs=$enableval], [build_docs=]docs_default) m4_undefine([docs_default]) AM_CONDITIONAL(ENABLE_DOCS, [test x$build_docs = xyes]) AC_MSG_CHECKING([whether to build documentation]) AC_MSG_RESULT([$build_docs]) ]) # XORG_ENABLE_DOCS # XORG_ENABLE_DEVEL_DOCS (enable_devel_docs=yes) # ---------------- # Minimum version: 1.6.0 # # This macro enables a builder to skip all developer documentation. # Combined with the specific tool checking macros XORG_WITH_*, it provides # maximum flexibilty in controlling documentation building. # Refer to: # XORG_WITH_XMLTO --with-xmlto # XORG_WITH_ASCIIDOC --with-asciidoc # XORG_WITH_DOXYGEN --with-doxygen # XORG_WITH_FOP --with-fop # XORG_WITH_GROFF --with-groff # XORG_WITH_PS2PDF --with-ps2pdf # # Interface to module: # ENABLE_DEVEL_DOCS: used in makefiles to conditionally generate developer docs # --enable-devel-docs: 'yes' user instructs the module to generate developer docs # 'no' user instructs the module not to generate developer docs # parm1: specify the default value, yes or no. # AC_DEFUN([XORG_ENABLE_DEVEL_DOCS],[ m4_define([devel_default], m4_default([$1], [yes])) AC_ARG_ENABLE(devel-docs, AS_HELP_STRING([--enable-devel-docs], [Enable building the developer documentation (default: ]devel_default[)]), [build_devel_docs=$enableval], [build_devel_docs=]devel_default) m4_undefine([devel_default]) AM_CONDITIONAL(ENABLE_DEVEL_DOCS, [test x$build_devel_docs = xyes]) AC_MSG_CHECKING([whether to build developer documentation]) AC_MSG_RESULT([$build_devel_docs]) ]) # XORG_ENABLE_DEVEL_DOCS # XORG_ENABLE_SPECS (enable_specs=yes) # ---------------- # Minimum version: 1.6.0 # # This macro enables a builder to skip all functional specification targets. # Combined with the specific tool checking macros XORG_WITH_*, it provides # maximum flexibilty in controlling documentation building. # Refer to: # XORG_WITH_XMLTO --with-xmlto # XORG_WITH_ASCIIDOC --with-asciidoc # XORG_WITH_DOXYGEN --with-doxygen # XORG_WITH_FOP --with-fop # XORG_WITH_GROFF --with-groff # XORG_WITH_PS2PDF --with-ps2pdf # # Interface to module: # ENABLE_SPECS: used in makefiles to conditionally generate specs # --enable-specs: 'yes' user instructs the module to generate specs # 'no' user instructs the module not to generate specs # parm1: specify the default value, yes or no. # AC_DEFUN([XORG_ENABLE_SPECS],[ m4_define([spec_default], m4_default([$1], [yes])) AC_ARG_ENABLE(specs, AS_HELP_STRING([--enable-specs], [Enable building the specs (default: ]spec_default[)]), [build_specs=$enableval], [build_specs=]spec_default) m4_undefine([spec_default]) AM_CONDITIONAL(ENABLE_SPECS, [test x$build_specs = xyes]) AC_MSG_CHECKING([whether to build functional specifications]) AC_MSG_RESULT([$build_specs]) ]) # XORG_ENABLE_SPECS # XORG_ENABLE_UNIT_TESTS (enable_unit_tests=auto) # ---------------------------------------------- # Minimum version: 1.13.0 # # This macro enables a builder to enable/disable unit testing # It makes no assumption about the test cases implementation # Test cases may or may not use Automake "Support for test suites" # They may or may not use the software utility library GLib # # When used in conjunction with XORG_WITH_GLIB, use both AM_CONDITIONAL # ENABLE_UNIT_TESTS and HAVE_GLIB. Not all unit tests may use glib. # The variable enable_unit_tests is used by other macros in this file. # # Interface to module: # ENABLE_UNIT_TESTS: used in makefiles to conditionally build tests # enable_unit_tests: used in configure.ac for additional configuration # --enable-unit-tests: 'yes' user instructs the module to build tests # 'no' user instructs the module not to build tests # parm1: specify the default value, yes or no. # AC_DEFUN([XORG_ENABLE_UNIT_TESTS],[ AC_BEFORE([$0], [XORG_WITH_GLIB]) AC_BEFORE([$0], [XORG_LD_WRAP]) AC_REQUIRE([XORG_MEMORY_CHECK_FLAGS]) m4_define([_defopt], m4_default([$1], [auto])) AC_ARG_ENABLE(unit-tests, AS_HELP_STRING([--enable-unit-tests], [Enable building unit test cases (default: ]_defopt[)]), [enable_unit_tests=$enableval], [enable_unit_tests=]_defopt) m4_undefine([_defopt]) AM_CONDITIONAL(ENABLE_UNIT_TESTS, [test "x$enable_unit_tests" != xno]) AC_MSG_CHECKING([whether to build unit test cases]) AC_MSG_RESULT([$enable_unit_tests]) ]) # XORG_ENABLE_UNIT_TESTS # XORG_ENABLE_INTEGRATION_TESTS (enable_unit_tests=auto) # ------------------------------------------------------ # Minimum version: 1.17.0 # # This macro enables a builder to enable/disable integration testing # It makes no assumption about the test cases' implementation # Test cases may or may not use Automake "Support for test suites" # # Please see XORG_ENABLE_UNIT_TESTS for unit test support. Unit test support # usually requires less dependencies and may be built and run under less # stringent environments than integration tests. # # Interface to module: # ENABLE_INTEGRATION_TESTS: used in makefiles to conditionally build tests # enable_integration_tests: used in configure.ac for additional configuration # --enable-integration-tests: 'yes' user instructs the module to build tests # 'no' user instructs the module not to build tests # parm1: specify the default value, yes or no. # AC_DEFUN([XORG_ENABLE_INTEGRATION_TESTS],[ AC_REQUIRE([XORG_MEMORY_CHECK_FLAGS]) m4_define([_defopt], m4_default([$1], [auto])) AC_ARG_ENABLE(integration-tests, AS_HELP_STRING([--enable-integration-tests], [Enable building integration test cases (default: ]_defopt[)]), [enable_integration_tests=$enableval], [enable_integration_tests=]_defopt) m4_undefine([_defopt]) AM_CONDITIONAL([ENABLE_INTEGRATION_TESTS], [test "x$enable_integration_tests" != xno]) AC_MSG_CHECKING([whether to build unit test cases]) AC_MSG_RESULT([$enable_integration_tests]) ]) # XORG_ENABLE_INTEGRATION_TESTS # XORG_WITH_GLIB([MIN-VERSION], [DEFAULT]) # ---------------------------------------- # Minimum version: 1.13.0 # # GLib is a library which provides advanced data structures and functions. # This macro enables a module to test for the presence of Glib. # # When used with ENABLE_UNIT_TESTS, it is assumed GLib is used for unit testing. # Otherwise the value of $enable_unit_tests is blank. # # Please see XORG_ENABLE_INTEGRATION_TESTS for integration test support. Unit # test support usually requires less dependencies and may be built and run under # less stringent environments than integration tests. # # Interface to module: # HAVE_GLIB: used in makefiles to conditionally build targets # with_glib: used in configure.ac to know if GLib has been found # --with-glib: 'yes' user instructs the module to use glib # 'no' user instructs the module not to use glib # AC_DEFUN([XORG_WITH_GLIB],[ AC_REQUIRE([PKG_PROG_PKG_CONFIG]) m4_define([_defopt], m4_default([$2], [auto])) AC_ARG_WITH(glib, AS_HELP_STRING([--with-glib], [Use GLib library for unit testing (default: ]_defopt[)]), [with_glib=$withval], [with_glib=]_defopt) m4_undefine([_defopt]) have_glib=no # Do not probe GLib if user explicitly disabled unit testing if test "x$enable_unit_tests" != x"no"; then # Do not probe GLib if user explicitly disabled it if test "x$with_glib" != x"no"; then m4_ifval( [$1], [PKG_CHECK_MODULES([GLIB], [glib-2.0 >= $1], [have_glib=yes], [have_glib=no])], [PKG_CHECK_MODULES([GLIB], [glib-2.0], [have_glib=yes], [have_glib=no])] ) fi fi # Not having GLib when unit testing has been explicitly requested is an error if test "x$enable_unit_tests" = x"yes"; then if test "x$have_glib" = x"no"; then AC_MSG_ERROR([--enable-unit-tests=yes specified but glib-2.0 not found]) fi fi # Having unit testing disabled when GLib has been explicitly requested is an error if test "x$enable_unit_tests" = x"no"; then if test "x$with_glib" = x"yes"; then AC_MSG_ERROR([--enable-unit-tests=yes specified but glib-2.0 not found]) fi fi # Not having GLib when it has been explicitly requested is an error if test "x$with_glib" = x"yes"; then if test "x$have_glib" = x"no"; then AC_MSG_ERROR([--with-glib=yes specified but glib-2.0 not found]) fi fi AM_CONDITIONAL([HAVE_GLIB], [test "$have_glib" = yes]) ]) # XORG_WITH_GLIB # XORG_LD_WRAP([required|optional]) # --------------------------------- # Minimum version: 1.13.0 # # Check if linker supports -wrap, passed via compiler flags # # When used with ENABLE_UNIT_TESTS, it is assumed -wrap is used for unit testing. # Otherwise the value of $enable_unit_tests is blank. # # Argument added in 1.16.0 - default is "required", to match existing behavior # of returning an error if enable_unit_tests is yes, and ld -wrap is not # available, an argument of "optional" allows use when some unit tests require # ld -wrap and others do not. # AC_DEFUN([XORG_LD_WRAP],[ XORG_CHECK_LINKER_FLAGS([-Wl,-wrap,exit],[have_ld_wrap=yes],[have_ld_wrap=no], [AC_LANG_PROGRAM([#include void __wrap_exit(int status) { return; }], [exit(0);])]) # Not having ld wrap when unit testing has been explicitly requested is an error if test "x$enable_unit_tests" = x"yes" -a "x$1" != "xoptional"; then if test "x$have_ld_wrap" = x"no"; then AC_MSG_ERROR([--enable-unit-tests=yes specified but ld -wrap support is not available]) fi fi AM_CONDITIONAL([HAVE_LD_WRAP], [test "$have_ld_wrap" = yes]) # ]) # XORG_LD_WRAP # XORG_CHECK_LINKER_FLAGS # ----------------------- # SYNOPSIS # # XORG_CHECK_LINKER_FLAGS(FLAGS, [ACTION-SUCCESS], [ACTION-FAILURE], [PROGRAM-SOURCE]) # # DESCRIPTION # # Check whether the given linker FLAGS work with the current language's # linker, or whether they give an error. # # ACTION-SUCCESS/ACTION-FAILURE are shell commands to execute on # success/failure. # # PROGRAM-SOURCE is the program source to link with, if needed # # NOTE: Based on AX_CHECK_COMPILER_FLAGS. # # LICENSE # # Copyright (c) 2009 Mike Frysinger # Copyright (c) 2009 Steven G. Johnson # Copyright (c) 2009 Matteo Frigo # # This program is free software: you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by the # Free Software Foundation, either version 3 of the License, or (at your # option) any later version. # # This program is distributed in the hope that it will be useful, but # WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General # Public License for more details. # # You should have received a copy of the GNU General Public License along # with this program. If not, see . # # As a special exception, the respective Autoconf Macro's copyright owner # gives unlimited permission to copy, distribute and modify the configure # scripts that are the output of Autoconf when processing the Macro. You # need not follow the terms of the GNU General Public License when using # or distributing such scripts, even though portions of the text of the # Macro appear in them. The GNU General Public License (GPL) does govern # all other use of the material that constitutes the Autoconf Macro. # # This special exception to the GPL applies to versions of the Autoconf # Macro released by the Autoconf Archive. When you make and distribute a # modified version of the Autoconf Macro, you may extend this special # exception to the GPL to apply to your modified version as well.# AC_DEFUN([XORG_CHECK_LINKER_FLAGS], [AC_MSG_CHECKING([whether the linker accepts $1]) dnl Some hackery here since AC_CACHE_VAL can't handle a non-literal varname: AS_LITERAL_IF([$1], [AC_CACHE_VAL(AS_TR_SH(xorg_cv_linker_flags_[$1]), [ ax_save_FLAGS=$LDFLAGS LDFLAGS="$1" AC_LINK_IFELSE([m4_default([$4],[AC_LANG_PROGRAM()])], AS_TR_SH(xorg_cv_linker_flags_[$1])=yes, AS_TR_SH(xorg_cv_linker_flags_[$1])=no) LDFLAGS=$ax_save_FLAGS])], [ax_save_FLAGS=$LDFLAGS LDFLAGS="$1" AC_LINK_IFELSE([AC_LANG_PROGRAM()], eval AS_TR_SH(xorg_cv_linker_flags_[$1])=yes, eval AS_TR_SH(xorg_cv_linker_flags_[$1])=no) LDFLAGS=$ax_save_FLAGS]) eval xorg_check_linker_flags=$AS_TR_SH(xorg_cv_linker_flags_[$1]) AC_MSG_RESULT($xorg_check_linker_flags) if test "x$xorg_check_linker_flags" = xyes; then m4_default([$2], :) else m4_default([$3], :) fi ]) # XORG_CHECK_LINKER_FLAGS # XORG_MEMORY_CHECK_FLAGS # ----------------------- # Minimum version: 1.16.0 # # This macro attempts to find appropriate memory checking functionality # for various platforms which unit testing code may use to catch various # forms of memory allocation and access errors in testing. # # Interface to module: # XORG_MALLOC_DEBUG_ENV - environment variables to set to enable debugging # Usually added to TESTS_ENVIRONMENT in Makefile.am # # If the user sets the value of XORG_MALLOC_DEBUG_ENV, it is used verbatim. # AC_DEFUN([XORG_MEMORY_CHECK_FLAGS],[ AC_REQUIRE([AC_CANONICAL_HOST]) AC_ARG_VAR([XORG_MALLOC_DEBUG_ENV], [Environment variables to enable memory checking in tests]) # Check for different types of support on different platforms case $host_os in solaris*) AC_CHECK_LIB([umem], [umem_alloc], [malloc_debug_env='LD_PRELOAD=libumem.so UMEM_DEBUG=default']) ;; *-gnu*) # GNU libc - Value is used as a single byte bit pattern, # both directly and inverted, so should not be 0 or 255. malloc_debug_env='MALLOC_PERTURB_=15' ;; darwin*) malloc_debug_env='MallocPreScribble=1 MallocScribble=1 DYLD_INSERT_LIBRARIES=/usr/lib/libgmalloc.dylib' ;; *bsd*) malloc_debug_env='MallocPreScribble=1 MallocScribble=1' ;; esac # User supplied flags override default flags if test "x$XORG_MALLOC_DEBUG_ENV" != "x"; then malloc_debug_env="$XORG_MALLOC_DEBUG_ENV" fi AC_SUBST([XORG_MALLOC_DEBUG_ENV],[$malloc_debug_env]) ]) # XORG_WITH_LINT # XORG_CHECK_MALLOC_ZERO # ---------------------- # Minimum version: 1.0.0 # # Defines {MALLOC,XMALLOC,XTMALLOC}_ZERO_CFLAGS appropriately if # malloc(0) returns NULL. Packages should add one of these cflags to # their AM_CFLAGS (or other appropriate *_CFLAGS) to use them. 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cat conftest.err >&AS_MESSAGE_LOG_FD echo "$as_me:$LINENO: \$? = $ac_status" >&AS_MESSAGE_LOG_FD if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. $ECHO "$_lt_compiler_boilerplate" | $SED '/^$/d' >conftest.exp $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2 if test ! -s conftest.er2 || diff conftest.exp conftest.er2 >/dev/null; then $2=yes fi fi $RM conftest* ]) if test yes = "[$]$2"; then m4_if([$5], , :, [$5]) else m4_if([$6], , :, [$6]) fi ])# _LT_COMPILER_OPTION # Old name: AU_ALIAS([AC_LIBTOOL_COMPILER_OPTION], [_LT_COMPILER_OPTION]) dnl aclocal-1.4 backwards compatibility: dnl AC_DEFUN([AC_LIBTOOL_COMPILER_OPTION], []) # _LT_LINKER_OPTION(MESSAGE, VARIABLE-NAME, FLAGS, # [ACTION-SUCCESS], [ACTION-FAILURE]) # ---------------------------------------------------- # Check whether the given linker option works AC_DEFUN([_LT_LINKER_OPTION], [m4_require([_LT_FILEUTILS_DEFAULTS])dnl m4_require([_LT_DECL_SED])dnl AC_CACHE_CHECK([$1], [$2], [$2=no save_LDFLAGS=$LDFLAGS LDFLAGS="$LDFLAGS $3" echo "$lt_simple_link_test_code" > conftest.$ac_ext if (eval $ac_link 2>conftest.err) && test -s conftest$ac_exeext; then # The linker can only warn and ignore the option if not recognized # So say no if there are warnings if test -s conftest.err; then # Append any errors to the config.log. cat conftest.err 1>&AS_MESSAGE_LOG_FD $ECHO "$_lt_linker_boilerplate" | $SED '/^$/d' > conftest.exp $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2 if diff conftest.exp conftest.er2 >/dev/null; then $2=yes fi else $2=yes fi fi $RM -r conftest* LDFLAGS=$save_LDFLAGS ]) if test yes = "[$]$2"; then m4_if([$4], , :, [$4]) else m4_if([$5], , :, [$5]) fi ])# _LT_LINKER_OPTION # Old name: AU_ALIAS([AC_LIBTOOL_LINKER_OPTION], [_LT_LINKER_OPTION]) dnl aclocal-1.4 backwards compatibility: dnl AC_DEFUN([AC_LIBTOOL_LINKER_OPTION], []) # LT_CMD_MAX_LEN #--------------- AC_DEFUN([LT_CMD_MAX_LEN], [AC_REQUIRE([AC_CANONICAL_HOST])dnl # find the maximum length of command line arguments AC_MSG_CHECKING([the maximum length of command line arguments]) AC_CACHE_VAL([lt_cv_sys_max_cmd_len], [dnl i=0 teststring=ABCD case $build_os in msdosdjgpp*) # On DJGPP, this test can blow up pretty badly due to problems in libc # (any single argument exceeding 2000 bytes causes a buffer overrun # during glob expansion). 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It is not # nice to cause kernel panics so lets avoid the loop below. # First set a reasonable default. lt_cv_sys_max_cmd_len=16384 # if test -x /sbin/sysconfig; then case `/sbin/sysconfig -q proc exec_disable_arg_limit` in *1*) lt_cv_sys_max_cmd_len=-1 ;; esac fi ;; sco3.2v5*) lt_cv_sys_max_cmd_len=102400 ;; sysv5* | sco5v6* | sysv4.2uw2*) kargmax=`grep ARG_MAX /etc/conf/cf.d/stune 2>/dev/null` if test -n "$kargmax"; then lt_cv_sys_max_cmd_len=`echo $kargmax | sed 's/.*[[ ]]//'` else lt_cv_sys_max_cmd_len=32768 fi ;; *) lt_cv_sys_max_cmd_len=`(getconf ARG_MAX) 2> /dev/null` if test -n "$lt_cv_sys_max_cmd_len" && \ test undefined != "$lt_cv_sys_max_cmd_len"; then lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 4` lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \* 3` else # Make teststring a little bigger before we do anything with it. # a 1K string should be a reasonable start. for i in 1 2 3 4 5 6 7 8; do teststring=$teststring$teststring done SHELL=${SHELL-${CONFIG_SHELL-/bin/sh}} # If test is not a shell built-in, we'll probably end up computing a # maximum length that is only half of the actual maximum length, but # we can't tell. while { test X`env echo "$teststring$teststring" 2>/dev/null` \ = "X$teststring$teststring"; } >/dev/null 2>&1 && test 17 != "$i" # 1/2 MB should be enough do i=`expr $i + 1` teststring=$teststring$teststring done # Only check the string length outside the loop. lt_cv_sys_max_cmd_len=`expr "X$teststring" : ".*" 2>&1` teststring= # Add a significant safety factor because C++ compilers can tack on # massive amounts of additional arguments before passing them to the # linker. It appears as though 1/2 is a usable value. lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 2` fi ;; esac ]) if test -n "$lt_cv_sys_max_cmd_len"; then AC_MSG_RESULT($lt_cv_sys_max_cmd_len) else AC_MSG_RESULT(none) fi max_cmd_len=$lt_cv_sys_max_cmd_len _LT_DECL([], [max_cmd_len], [0], [What is the maximum length of a command?]) ])# LT_CMD_MAX_LEN # Old name: AU_ALIAS([AC_LIBTOOL_SYS_MAX_CMD_LEN], [LT_CMD_MAX_LEN]) dnl aclocal-1.4 backwards compatibility: dnl AC_DEFUN([AC_LIBTOOL_SYS_MAX_CMD_LEN], []) # _LT_HEADER_DLFCN # ---------------- m4_defun([_LT_HEADER_DLFCN], [AC_CHECK_HEADERS([dlfcn.h], [], [], [AC_INCLUDES_DEFAULT])dnl ])# _LT_HEADER_DLFCN # _LT_TRY_DLOPEN_SELF (ACTION-IF-TRUE, ACTION-IF-TRUE-W-USCORE, # ACTION-IF-FALSE, ACTION-IF-CROSS-COMPILING) # ---------------------------------------------------------------- m4_defun([_LT_TRY_DLOPEN_SELF], [m4_require([_LT_HEADER_DLFCN])dnl if test yes = "$cross_compiling"; then : [$4] else lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext <<_LT_EOF [#line $LINENO "configure" #include "confdefs.h" #if HAVE_DLFCN_H #include #endif #include #ifdef RTLD_GLOBAL # define LT_DLGLOBAL RTLD_GLOBAL #else # ifdef DL_GLOBAL # define LT_DLGLOBAL DL_GLOBAL # else # define LT_DLGLOBAL 0 # endif #endif /* We may have to define LT_DLLAZY_OR_NOW in the command line if we find out it does not work in some platform. */ #ifndef LT_DLLAZY_OR_NOW # ifdef RTLD_LAZY # define LT_DLLAZY_OR_NOW RTLD_LAZY # else # ifdef DL_LAZY # define LT_DLLAZY_OR_NOW DL_LAZY # else # ifdef RTLD_NOW # define LT_DLLAZY_OR_NOW RTLD_NOW # else # ifdef DL_NOW # define LT_DLLAZY_OR_NOW DL_NOW # else # define LT_DLLAZY_OR_NOW 0 # endif # endif # endif # endif #endif /* When -fvisibility=hidden is used, assume the code has been annotated correspondingly for the symbols needed. */ #if defined __GNUC__ && (((__GNUC__ == 3) && (__GNUC_MINOR__ >= 3)) || (__GNUC__ > 3)) int fnord () __attribute__((visibility("default"))); #endif int fnord () { return 42; } int main () { void *self = dlopen (0, LT_DLGLOBAL|LT_DLLAZY_OR_NOW); int status = $lt_dlunknown; if (self) { if (dlsym (self,"fnord")) status = $lt_dlno_uscore; else { if (dlsym( self,"_fnord")) status = $lt_dlneed_uscore; else puts (dlerror ()); } /* dlclose (self); */ } else puts (dlerror ()); return status; }] _LT_EOF if AC_TRY_EVAL(ac_link) && test -s "conftest$ac_exeext" 2>/dev/null; then (./conftest; exit; ) >&AS_MESSAGE_LOG_FD 2>/dev/null lt_status=$? case x$lt_status in x$lt_dlno_uscore) $1 ;; x$lt_dlneed_uscore) $2 ;; x$lt_dlunknown|x*) $3 ;; esac else : # compilation failed $3 fi fi rm -fr conftest* ])# _LT_TRY_DLOPEN_SELF # LT_SYS_DLOPEN_SELF # ------------------ AC_DEFUN([LT_SYS_DLOPEN_SELF], [m4_require([_LT_HEADER_DLFCN])dnl if test yes != "$enable_dlopen"; then enable_dlopen=unknown enable_dlopen_self=unknown enable_dlopen_self_static=unknown else lt_cv_dlopen=no lt_cv_dlopen_libs= case $host_os in beos*) lt_cv_dlopen=load_add_on lt_cv_dlopen_libs= lt_cv_dlopen_self=yes ;; mingw* | pw32* | cegcc*) lt_cv_dlopen=LoadLibrary lt_cv_dlopen_libs= ;; cygwin*) lt_cv_dlopen=dlopen lt_cv_dlopen_libs= ;; darwin*) # if libdl is installed we need to link against it AC_CHECK_LIB([dl], [dlopen], [lt_cv_dlopen=dlopen lt_cv_dlopen_libs=-ldl],[ lt_cv_dlopen=dyld lt_cv_dlopen_libs= lt_cv_dlopen_self=yes ]) ;; tpf*) # Don't try to run any link tests for TPF. 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then # We can hardcode non-existent directories. if test no != "$_LT_TAGVAR(hardcode_direct, $1)" && # If the only mechanism to avoid hardcoding is shlibpath_var, we # have to relink, otherwise we might link with an installed library # when we should be linking with a yet-to-be-installed one ## test no != "$_LT_TAGVAR(hardcode_shlibpath_var, $1)" && test no != "$_LT_TAGVAR(hardcode_minus_L, $1)"; then # Linking always hardcodes the temporary library directory. _LT_TAGVAR(hardcode_action, $1)=relink else # We can link without hardcoding, and we can hardcode nonexisting dirs. _LT_TAGVAR(hardcode_action, $1)=immediate fi else # We cannot hardcode anything, or else we can only hardcode existing # directories. _LT_TAGVAR(hardcode_action, $1)=unsupported fi AC_MSG_RESULT([$_LT_TAGVAR(hardcode_action, $1)]) if test relink = "$_LT_TAGVAR(hardcode_action, $1)" || test yes = "$_LT_TAGVAR(inherit_rpath, $1)"; then # Fast installation is not supported enable_fast_install=no elif test yes = "$shlibpath_overrides_runpath" || test no = "$enable_shared"; then # Fast installation is not necessary enable_fast_install=needless fi _LT_TAGDECL([], [hardcode_action], [0], [How to hardcode a shared library path into an executable]) ])# _LT_LINKER_HARDCODE_LIBPATH # _LT_CMD_STRIPLIB # ---------------- m4_defun([_LT_CMD_STRIPLIB], [m4_require([_LT_DECL_EGREP]) striplib= old_striplib= AC_MSG_CHECKING([whether stripping libraries is possible]) if test -n "$STRIP" && $STRIP -V 2>&1 | $GREP "GNU strip" >/dev/null; then test -z "$old_striplib" && old_striplib="$STRIP --strip-debug" test -z "$striplib" && striplib="$STRIP --strip-unneeded" AC_MSG_RESULT([yes]) else # FIXME - insert some real tests, host_os isn't really good enough case $host_os in darwin*) if test -n "$STRIP"; then striplib="$STRIP -x" old_striplib="$STRIP -S" AC_MSG_RESULT([yes]) else AC_MSG_RESULT([no]) fi ;; *) AC_MSG_RESULT([no]) ;; esac fi _LT_DECL([], [old_striplib], [1], [Commands to strip libraries]) _LT_DECL([], [striplib], [1]) ])# _LT_CMD_STRIPLIB # _LT_PREPARE_MUNGE_PATH_LIST # --------------------------- # Make sure func_munge_path_list() is defined correctly. m4_defun([_LT_PREPARE_MUNGE_PATH_LIST], [[# func_munge_path_list VARIABLE PATH # ----------------------------------- # VARIABLE is name of variable containing _space_ separated list of # directories to be munged by the contents of PATH, which is string # having a format: # "DIR[:DIR]:" # string "DIR[ DIR]" will be prepended to VARIABLE # ":DIR[:DIR]" # string "DIR[ DIR]" will be appended to VARIABLE # "DIRP[:DIRP]::[DIRA:]DIRA" # string "DIRP[ DIRP]" will be prepended to VARIABLE and string # "DIRA[ DIRA]" will be appended to VARIABLE # "DIR[:DIR]" # VARIABLE will be replaced by "DIR[ DIR]" func_munge_path_list () { case x@S|@2 in x) ;; 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esac # HP-UX runs *really* slowly unless shared libraries are mode 555, ... postinstall_cmds='chmod 555 $lib' # or fails outright, so override atomically: install_override_mode=555 ;; interix[[3-9]]*) version_type=linux # correct to gnu/linux during the next big refactor need_lib_prefix=no need_version=no library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' dynamic_linker='Interix 3.x ld.so.1 (PE, like ELF)' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=no hardcode_into_libs=yes ;; irix5* | irix6* | nonstopux*) case $host_os in nonstopux*) version_type=nonstopux ;; *) if test yes = "$lt_cv_prog_gnu_ld"; then version_type=linux # correct to gnu/linux during the next big refactor else version_type=irix fi ;; esac need_lib_prefix=no need_version=no soname_spec='$libname$release$shared_ext$major' library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$release$shared_ext $libname$shared_ext' case $host_os in irix5* | nonstopux*) libsuff= shlibsuff= ;; *) case $LD in # libtool.m4 will add one of these switches to LD *-32|*"-32 "|*-melf32bsmip|*"-melf32bsmip ") libsuff= shlibsuff= libmagic=32-bit;; *-n32|*"-n32 "|*-melf32bmipn32|*"-melf32bmipn32 ") libsuff=32 shlibsuff=N32 libmagic=N32;; *-64|*"-64 "|*-melf64bmip|*"-melf64bmip ") libsuff=64 shlibsuff=64 libmagic=64-bit;; *) libsuff= shlibsuff= libmagic=never-match;; esac ;; esac shlibpath_var=LD_LIBRARY${shlibsuff}_PATH shlibpath_overrides_runpath=no sys_lib_search_path_spec="/usr/lib$libsuff /lib$libsuff /usr/local/lib$libsuff" sys_lib_dlsearch_path_spec="/usr/lib$libsuff /lib$libsuff" hardcode_into_libs=yes ;; # No shared lib support for Linux oldld, aout, or coff. linux*oldld* | linux*aout* | linux*coff*) dynamic_linker=no ;; linux*android*) version_type=none # Android doesn't support versioned libraries. need_lib_prefix=no need_version=no library_names_spec='$libname$release$shared_ext' soname_spec='$libname$release$shared_ext' finish_cmds= shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=yes # This implies no fast_install, which is unacceptable. # Some rework will be needed to allow for fast_install # before this can be enabled. hardcode_into_libs=yes dynamic_linker='Android linker' # Don't embed -rpath directories since the linker doesn't support them. _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-L$libdir' ;; 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then case $cc_basename in nvcc*) _LT_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)=' -Xcompiler -fno-builtin' ;; *) _LT_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)=' -fno-builtin' ;; esac _LT_COMPILER_OPTION([if $compiler supports -fno-rtti -fno-exceptions], lt_cv_prog_compiler_rtti_exceptions, [-fno-rtti -fno-exceptions], [], [_LT_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)="$_LT_TAGVAR(lt_prog_compiler_no_builtin_flag, $1) -fno-rtti -fno-exceptions"]) fi _LT_TAGDECL([no_builtin_flag], [lt_prog_compiler_no_builtin_flag], [1], [Compiler flag to turn off builtin functions]) ])# _LT_COMPILER_NO_RTTI # _LT_CMD_GLOBAL_SYMBOLS # ---------------------- m4_defun([_LT_CMD_GLOBAL_SYMBOLS], [AC_REQUIRE([AC_CANONICAL_HOST])dnl AC_REQUIRE([AC_PROG_CC])dnl AC_REQUIRE([AC_PROG_AWK])dnl AC_REQUIRE([LT_PATH_NM])dnl AC_REQUIRE([LT_PATH_LD])dnl m4_require([_LT_DECL_SED])dnl m4_require([_LT_DECL_EGREP])dnl m4_require([_LT_TAG_COMPILER])dnl # Check for command to grab the raw symbol name followed by C symbol from nm. AC_MSG_CHECKING([command to parse $NM output from $compiler object]) AC_CACHE_VAL([lt_cv_sys_global_symbol_pipe], [ # These are sane defaults that work on at least a few old systems. # [They come from Ultrix. What could be older than Ultrix?!! ;)] # Character class describing NM global symbol codes. symcode='[[BCDEGRST]]' # Regexp to match symbols that can be accessed directly from C. sympat='\([[_A-Za-z]][[_A-Za-z0-9]]*\)' # Define system-specific variables. case $host_os in aix*) symcode='[[BCDT]]' ;; cygwin* | mingw* | pw32* | cegcc*) symcode='[[ABCDGISTW]]' ;; hpux*) if test ia64 = "$host_cpu"; then symcode='[[ABCDEGRST]]' fi ;; irix* | nonstopux*) symcode='[[BCDEGRST]]' ;; osf*) symcode='[[BCDEGQRST]]' ;; solaris*) symcode='[[BDRT]]' ;; sco3.2v5*) symcode='[[DT]]' ;; sysv4.2uw2*) symcode='[[DT]]' ;; sysv5* | sco5v6* | unixware* | OpenUNIX*) symcode='[[ABDT]]' ;; sysv4) symcode='[[DFNSTU]]' ;; esac # If we're using GNU nm, then use its standard symbol codes. case `$NM -V 2>&1` in *GNU* | *'with BFD'*) symcode='[[ABCDGIRSTW]]' ;; esac if test "$lt_cv_nm_interface" = "MS dumpbin"; then # Gets list of data symbols to import. lt_cv_sys_global_symbol_to_import="sed -n -e 's/^I .* \(.*\)$/\1/p'" # Adjust the below global symbol transforms to fixup imported variables. lt_cdecl_hook=" -e 's/^I .* \(.*\)$/extern __declspec(dllimport) char \1;/p'" lt_c_name_hook=" -e 's/^I .* \(.*\)$/ {\"\1\", (void *) 0},/p'" lt_c_name_lib_hook="\ -e 's/^I .* \(lib.*\)$/ {\"\1\", (void *) 0},/p'\ -e 's/^I .* \(.*\)$/ {\"lib\1\", (void *) 0},/p'" else # Disable hooks by default. lt_cv_sys_global_symbol_to_import= lt_cdecl_hook= lt_c_name_hook= lt_c_name_lib_hook= fi # Transform an extracted symbol line into a proper C declaration. # Some systems (esp. on ia64) link data and code symbols differently, # so use this general approach. lt_cv_sys_global_symbol_to_cdecl="sed -n"\ $lt_cdecl_hook\ " -e 's/^T .* \(.*\)$/extern int \1();/p'"\ " -e 's/^$symcode$symcode* .* \(.*\)$/extern char \1;/p'" # Transform an extracted symbol line into symbol name and symbol address lt_cv_sys_global_symbol_to_c_name_address="sed -n"\ $lt_c_name_hook\ " -e 's/^: \(.*\) .*$/ {\"\1\", (void *) 0},/p'"\ " -e 's/^$symcode$symcode* .* \(.*\)$/ {\"\1\", (void *) \&\1},/p'" # Transform an extracted symbol line into symbol name with lib prefix and # symbol address. lt_cv_sys_global_symbol_to_c_name_address_lib_prefix="sed -n"\ $lt_c_name_lib_hook\ " -e 's/^: \(.*\) .*$/ {\"\1\", (void *) 0},/p'"\ " -e 's/^$symcode$symcode* .* \(lib.*\)$/ {\"\1\", (void *) \&\1},/p'"\ " -e 's/^$symcode$symcode* .* \(.*\)$/ {\"lib\1\", (void *) \&\1},/p'" # Handle CRLF in mingw tool chain opt_cr= case $build_os in mingw*) opt_cr=`$ECHO 'x\{0,1\}' | tr x '\015'` # option cr in regexp ;; esac # Try without a prefix underscore, then with it. for ac_symprfx in "" "_"; do # Transform symcode, sympat, and symprfx into a raw symbol and a C symbol. symxfrm="\\1 $ac_symprfx\\2 \\2" # Write the raw and C identifiers. if test "$lt_cv_nm_interface" = "MS dumpbin"; then # Fake it for dumpbin and say T for any non-static function, # D for any global variable and I for any imported variable. # Also find C++ and __fastcall symbols from MSVC++, # which start with @ or ?. lt_cv_sys_global_symbol_pipe="$AWK ['"\ " {last_section=section; section=\$ 3};"\ " /^COFF SYMBOL TABLE/{for(i in hide) delete hide[i]};"\ " /Section length .*#relocs.*(pick any)/{hide[last_section]=1};"\ " /^ *Symbol name *: /{split(\$ 0,sn,\":\"); si=substr(sn[2],2)};"\ " /^ *Type *: code/{print \"T\",si,substr(si,length(prfx))};"\ " /^ *Type *: data/{print \"I\",si,substr(si,length(prfx))};"\ " \$ 0!~/External *\|/{next};"\ " / 0+ UNDEF /{next}; / UNDEF \([^|]\)*()/{next};"\ " {if(hide[section]) next};"\ " {f=\"D\"}; \$ 0~/\(\).*\|/{f=\"T\"};"\ " {split(\$ 0,a,/\||\r/); split(a[2],s)};"\ " s[1]~/^[@?]/{print f,s[1],s[1]; next};"\ " s[1]~prfx {split(s[1],t,\"@\"); print f,t[1],substr(t[1],length(prfx))}"\ " ' prfx=^$ac_symprfx]" else lt_cv_sys_global_symbol_pipe="sed -n -e 's/^.*[[ ]]\($symcode$symcode*\)[[ ]][[ ]]*$ac_symprfx$sympat$opt_cr$/$symxfrm/p'" fi lt_cv_sys_global_symbol_pipe="$lt_cv_sys_global_symbol_pipe | sed '/ __gnu_lto/d'" # Check to see that the pipe works correctly. pipe_works=no rm -f conftest* cat > conftest.$ac_ext <<_LT_EOF #ifdef __cplusplus extern "C" { #endif char nm_test_var; void nm_test_func(void); void nm_test_func(void){} #ifdef __cplusplus } #endif int main(){nm_test_var='a';nm_test_func();return(0);} _LT_EOF if AC_TRY_EVAL(ac_compile); then # Now try to grab the symbols. nlist=conftest.nm if AC_TRY_EVAL(NM conftest.$ac_objext \| "$lt_cv_sys_global_symbol_pipe" \> $nlist) && test -s "$nlist"; then # Try sorting and uniquifying the output. if sort "$nlist" | uniq > "$nlist"T; then mv -f "$nlist"T "$nlist" else rm -f "$nlist"T fi # Make sure that we snagged all the symbols we need. if $GREP ' nm_test_var$' "$nlist" >/dev/null; then if $GREP ' nm_test_func$' "$nlist" >/dev/null; then cat <<_LT_EOF > conftest.$ac_ext /* Keep this code in sync between libtool.m4, ltmain, lt_system.h, and tests. */ #if defined _WIN32 || defined __CYGWIN__ || defined _WIN32_WCE /* DATA imports from DLLs on WIN32 can't be const, because runtime relocations are performed -- see ld's documentation on pseudo-relocs. */ # define LT@&t@_DLSYM_CONST #elif defined __osf__ /* This system does not cope well with relocations in const data. */ # define LT@&t@_DLSYM_CONST #else # define LT@&t@_DLSYM_CONST const #endif #ifdef __cplusplus extern "C" { #endif _LT_EOF # Now generate the symbol file. eval "$lt_cv_sys_global_symbol_to_cdecl"' < "$nlist" | $GREP -v main >> conftest.$ac_ext' cat <<_LT_EOF >> conftest.$ac_ext /* The mapping between symbol names and symbols. */ LT@&t@_DLSYM_CONST struct { const char *name; void *address; } lt__PROGRAM__LTX_preloaded_symbols[[]] = { { "@PROGRAM@", (void *) 0 }, _LT_EOF $SED "s/^$symcode$symcode* .* \(.*\)$/ {\"\1\", (void *) \&\1},/" < "$nlist" | $GREP -v main >> conftest.$ac_ext cat <<\_LT_EOF >> conftest.$ac_ext {0, (void *) 0} }; /* This works around a problem in FreeBSD linker */ #ifdef FREEBSD_WORKAROUND static const void *lt_preloaded_setup() { return lt__PROGRAM__LTX_preloaded_symbols; } #endif #ifdef __cplusplus } #endif _LT_EOF # Now try linking the two files. mv conftest.$ac_objext conftstm.$ac_objext lt_globsym_save_LIBS=$LIBS lt_globsym_save_CFLAGS=$CFLAGS LIBS=conftstm.$ac_objext CFLAGS="$CFLAGS$_LT_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)" if AC_TRY_EVAL(ac_link) && test -s conftest$ac_exeext; then pipe_works=yes fi LIBS=$lt_globsym_save_LIBS CFLAGS=$lt_globsym_save_CFLAGS else echo "cannot find nm_test_func in $nlist" >&AS_MESSAGE_LOG_FD fi else echo "cannot find nm_test_var in $nlist" >&AS_MESSAGE_LOG_FD fi else echo "cannot run $lt_cv_sys_global_symbol_pipe" >&AS_MESSAGE_LOG_FD fi else echo "$progname: failed program was:" >&AS_MESSAGE_LOG_FD cat conftest.$ac_ext >&5 fi rm -rf conftest* conftst* # Do not use the global_symbol_pipe unless it works. if test yes = "$pipe_works"; then break else lt_cv_sys_global_symbol_pipe= fi done ]) if test -z "$lt_cv_sys_global_symbol_pipe"; then lt_cv_sys_global_symbol_to_cdecl= fi if test -z "$lt_cv_sys_global_symbol_pipe$lt_cv_sys_global_symbol_to_cdecl"; then AC_MSG_RESULT(failed) else AC_MSG_RESULT(ok) fi # Response file support. if test "$lt_cv_nm_interface" = "MS dumpbin"; then nm_file_list_spec='@' elif $NM --help 2>/dev/null | grep '[[@]]FILE' >/dev/null; then nm_file_list_spec='@' fi _LT_DECL([global_symbol_pipe], [lt_cv_sys_global_symbol_pipe], [1], [Take the output of nm and produce a listing of raw symbols and C names]) _LT_DECL([global_symbol_to_cdecl], [lt_cv_sys_global_symbol_to_cdecl], [1], [Transform the output of nm in a proper C declaration]) _LT_DECL([global_symbol_to_import], [lt_cv_sys_global_symbol_to_import], [1], [Transform the output of nm into a list of symbols to manually relocate]) _LT_DECL([global_symbol_to_c_name_address], [lt_cv_sys_global_symbol_to_c_name_address], [1], [Transform the output of nm in a C name address pair]) _LT_DECL([global_symbol_to_c_name_address_lib_prefix], [lt_cv_sys_global_symbol_to_c_name_address_lib_prefix], [1], [Transform the output of nm in a C name address pair when lib prefix is needed]) _LT_DECL([nm_interface], [lt_cv_nm_interface], [1], [The name lister interface]) _LT_DECL([], [nm_file_list_spec], [1], [Specify filename containing input files for $NM]) ]) # _LT_CMD_GLOBAL_SYMBOLS # _LT_COMPILER_PIC([TAGNAME]) # --------------------------- m4_defun([_LT_COMPILER_PIC], [m4_require([_LT_TAG_COMPILER])dnl _LT_TAGVAR(lt_prog_compiler_wl, $1)= _LT_TAGVAR(lt_prog_compiler_pic, $1)= _LT_TAGVAR(lt_prog_compiler_static, $1)= m4_if([$1], [CXX], [ # C++ specific cases for pic, static, wl, etc. if test yes = "$GXX"; then _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' case $host_os in aix*) # All AIX code is PIC. if test ia64 = "$host_cpu"; then # AIX 5 now supports IA64 processor _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' fi _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' ;; amigaos*) case $host_cpu in powerpc) # see comment about AmigaOS4 .so support _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' ;; m68k) # FIXME: we need at least 68020 code to build shared libraries, but # adding the '-m68020' flag to GCC prevents building anything better, # like '-m68040'. _LT_TAGVAR(lt_prog_compiler_pic, $1)='-m68020 -resident32 -malways-restore-a4' ;; esac ;; beos* | irix5* | irix6* | nonstopux* | osf3* | osf4* | osf5*) # PIC is the default for these OSes. ;; mingw* | cygwin* | os2* | pw32* | cegcc*) # This hack is so that the source file can tell whether it is being # built for inclusion in a dll (and should export symbols for example). # Although the cygwin gcc ignores -fPIC, still need this for old-style # (--disable-auto-import) libraries m4_if([$1], [GCJ], [], [_LT_TAGVAR(lt_prog_compiler_pic, $1)='-DDLL_EXPORT']) case $host_os in os2*) _LT_TAGVAR(lt_prog_compiler_static, $1)='$wl-static' ;; esac ;; darwin* | rhapsody*) # PIC is the default on this platform # Common symbols not allowed in MH_DYLIB files _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fno-common' ;; *djgpp*) # DJGPP does not support shared libraries at all _LT_TAGVAR(lt_prog_compiler_pic, $1)= ;; haiku*) # PIC is the default for Haiku. # The "-static" flag exists, but is broken. _LT_TAGVAR(lt_prog_compiler_static, $1)= ;; interix[[3-9]]*) # Interix 3.x gcc -fpic/-fPIC options generate broken code. # Instead, we relocate shared libraries at runtime. ;; sysv4*MP*) if test -d /usr/nec; then _LT_TAGVAR(lt_prog_compiler_pic, $1)=-Kconform_pic fi ;; hpux*) # PIC is the default for 64-bit PA HP-UX, but not for 32-bit # PA HP-UX. On IA64 HP-UX, PIC is the default but the pic flag # sets the default TLS model and affects inlining. case $host_cpu in hppa*64*) ;; *) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' ;; esac ;; *qnx* | *nto*) # QNX uses GNU C++, but need to define -shared option too, otherwise # it will coredump. _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC -shared' ;; *) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' ;; esac else case $host_os in aix[[4-9]]*) # All AIX code is PIC. if test ia64 = "$host_cpu"; then # AIX 5 now supports IA64 processor _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' else _LT_TAGVAR(lt_prog_compiler_static, $1)='-bnso -bI:/lib/syscalls.exp' fi ;; chorus*) case $cc_basename in cxch68*) # Green Hills C++ Compiler # _LT_TAGVAR(lt_prog_compiler_static, $1)="--no_auto_instantiation -u __main -u __premain -u _abort -r $COOL_DIR/lib/libOrb.a $MVME_DIR/lib/CC/libC.a $MVME_DIR/lib/classix/libcx.s.a" ;; esac ;; mingw* | cygwin* | os2* | pw32* | cegcc*) # This hack is so that the source file can tell whether it is being # built for inclusion in a dll (and should export symbols for example). m4_if([$1], [GCJ], [], [_LT_TAGVAR(lt_prog_compiler_pic, $1)='-DDLL_EXPORT']) ;; dgux*) case $cc_basename in ec++*) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' ;; ghcx*) # Green Hills C++ Compiler _LT_TAGVAR(lt_prog_compiler_pic, $1)='-pic' ;; *) ;; esac ;; freebsd* | dragonfly*) # FreeBSD uses GNU C++ ;; hpux9* | hpux10* | hpux11*) case $cc_basename in CC*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_static, $1)='$wl-a ${wl}archive' if test ia64 != "$host_cpu"; then _LT_TAGVAR(lt_prog_compiler_pic, $1)='+Z' fi ;; aCC*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_static, $1)='$wl-a ${wl}archive' case $host_cpu in hppa*64*|ia64*) # +Z the default ;; *) _LT_TAGVAR(lt_prog_compiler_pic, $1)='+Z' ;; esac ;; *) ;; esac ;; interix*) # This is c89, which is MS Visual C++ (no shared libs) # Anyone wants to do a port? ;; irix5* | irix6* | nonstopux*) case $cc_basename in CC*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared' # CC pic flag -KPIC is the default. ;; *) ;; esac ;; linux* | k*bsd*-gnu | kopensolaris*-gnu | gnu*) case $cc_basename in KCC*) # KAI C++ Compiler _LT_TAGVAR(lt_prog_compiler_wl, $1)='--backend -Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' ;; ecpc* ) # old Intel C++ for x86_64, which still supported -KPIC. _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' ;; icpc* ) # Intel C++, used to be incompatible with GCC. # ICC 10 doesn't accept -KPIC any more. _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' ;; pgCC* | pgcpp*) # Portland Group C++ compiler _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fpic' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; cxx*) # Compaq C++ # Make sure the PIC flag is empty. It appears that all Alpha # Linux and Compaq Tru64 Unix objects are PIC. _LT_TAGVAR(lt_prog_compiler_pic, $1)= _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared' ;; xlc* | xlC* | bgxl[[cC]]* | mpixl[[cC]]*) # IBM XL 8.0, 9.0 on PPC and BlueGene _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-qpic' _LT_TAGVAR(lt_prog_compiler_static, $1)='-qstaticlink' ;; *) case `$CC -V 2>&1 | sed 5q` in *Sun\ C*) # Sun C++ 5.9 _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Qoption ld ' ;; esac ;; esac ;; lynxos*) ;; m88k*) ;; mvs*) case $cc_basename in cxx*) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-W c,exportall' ;; *) ;; esac ;; netbsd* | netbsdelf*-gnu) ;; *qnx* | *nto*) # QNX uses GNU C++, but need to define -shared option too, otherwise # it will coredump. _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC -shared' ;; osf3* | osf4* | osf5*) case $cc_basename in KCC*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='--backend -Wl,' ;; RCC*) # Rational C++ 2.4.1 _LT_TAGVAR(lt_prog_compiler_pic, $1)='-pic' ;; cxx*) # Digital/Compaq C++ _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' # Make sure the PIC flag is empty. It appears that all Alpha # Linux and Compaq Tru64 Unix objects are PIC. _LT_TAGVAR(lt_prog_compiler_pic, $1)= _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared' ;; *) ;; esac ;; psos*) ;; solaris*) case $cc_basename in CC* | sunCC*) # Sun C++ 4.2, 5.x and Centerline C++ _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Qoption ld ' ;; gcx*) # Green Hills C++ Compiler _LT_TAGVAR(lt_prog_compiler_pic, $1)='-PIC' ;; *) ;; esac ;; sunos4*) case $cc_basename in CC*) # Sun C++ 4.x _LT_TAGVAR(lt_prog_compiler_pic, $1)='-pic' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; lcc*) # Lucid _LT_TAGVAR(lt_prog_compiler_pic, $1)='-pic' ;; *) ;; esac ;; sysv5* | unixware* | sco3.2v5* | sco5v6* | OpenUNIX*) case $cc_basename in CC*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; esac ;; tandem*) case $cc_basename in NCC*) # NonStop-UX NCC 3.20 _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' ;; *) ;; esac ;; vxworks*) ;; *) _LT_TAGVAR(lt_prog_compiler_can_build_shared, $1)=no ;; esac fi ], [ if test yes = "$GCC"; then _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' case $host_os in aix*) # All AIX code is PIC. if test ia64 = "$host_cpu"; then # AIX 5 now supports IA64 processor _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' fi _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' ;; amigaos*) case $host_cpu in powerpc) # see comment about AmigaOS4 .so support _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' ;; m68k) # FIXME: we need at least 68020 code to build shared libraries, but # adding the '-m68020' flag to GCC prevents building anything better, # like '-m68040'. _LT_TAGVAR(lt_prog_compiler_pic, $1)='-m68020 -resident32 -malways-restore-a4' ;; esac ;; beos* | irix5* | irix6* | nonstopux* | osf3* | osf4* | osf5*) # PIC is the default for these OSes. ;; mingw* | cygwin* | pw32* | os2* | cegcc*) # This hack is so that the source file can tell whether it is being # built for inclusion in a dll (and should export symbols for example). # Although the cygwin gcc ignores -fPIC, still need this for old-style # (--disable-auto-import) libraries m4_if([$1], [GCJ], [], [_LT_TAGVAR(lt_prog_compiler_pic, $1)='-DDLL_EXPORT']) case $host_os in os2*) _LT_TAGVAR(lt_prog_compiler_static, $1)='$wl-static' ;; esac ;; darwin* | rhapsody*) # PIC is the default on this platform # Common symbols not allowed in MH_DYLIB files _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fno-common' ;; haiku*) # PIC is the default for Haiku. # The "-static" flag exists, but is broken. _LT_TAGVAR(lt_prog_compiler_static, $1)= ;; hpux*) # PIC is the default for 64-bit PA HP-UX, but not for 32-bit # PA HP-UX. On IA64 HP-UX, PIC is the default but the pic flag # sets the default TLS model and affects inlining. case $host_cpu in hppa*64*) # +Z the default ;; *) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' ;; esac ;; interix[[3-9]]*) # Interix 3.x gcc -fpic/-fPIC options generate broken code. # Instead, we relocate shared libraries at runtime. ;; msdosdjgpp*) # Just because we use GCC doesn't mean we suddenly get shared libraries # on systems that don't support them. _LT_TAGVAR(lt_prog_compiler_can_build_shared, $1)=no enable_shared=no ;; *nto* | *qnx*) # QNX uses GNU C++, but need to define -shared option too, otherwise # it will coredump. _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC -shared' ;; sysv4*MP*) if test -d /usr/nec; then _LT_TAGVAR(lt_prog_compiler_pic, $1)=-Kconform_pic fi ;; *) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' ;; esac case $cc_basename in nvcc*) # Cuda Compiler Driver 2.2 _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Xlinker ' if test -n "$_LT_TAGVAR(lt_prog_compiler_pic, $1)"; then _LT_TAGVAR(lt_prog_compiler_pic, $1)="-Xcompiler $_LT_TAGVAR(lt_prog_compiler_pic, $1)" fi ;; esac else # PORTME Check for flag to pass linker flags through the system compiler. case $host_os in aix*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' if test ia64 = "$host_cpu"; then # AIX 5 now supports IA64 processor _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' else _LT_TAGVAR(lt_prog_compiler_static, $1)='-bnso -bI:/lib/syscalls.exp' fi ;; darwin* | rhapsody*) # PIC is the default on this platform # Common symbols not allowed in MH_DYLIB files _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fno-common' case $cc_basename in nagfor*) # NAG Fortran compiler _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,-Wl,,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-PIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; esac ;; mingw* | cygwin* | pw32* | os2* | cegcc*) # This hack is so that the source file can tell whether it is being # built for inclusion in a dll (and should export symbols for example). m4_if([$1], [GCJ], [], [_LT_TAGVAR(lt_prog_compiler_pic, $1)='-DDLL_EXPORT']) case $host_os in os2*) _LT_TAGVAR(lt_prog_compiler_static, $1)='$wl-static' ;; esac ;; hpux9* | hpux10* | hpux11*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' # PIC is the default for IA64 HP-UX and 64-bit HP-UX, but # not for PA HP-UX. case $host_cpu in hppa*64*|ia64*) # +Z the default ;; *) _LT_TAGVAR(lt_prog_compiler_pic, $1)='+Z' ;; esac # Is there a better lt_prog_compiler_static that works with the bundled CC? _LT_TAGVAR(lt_prog_compiler_static, $1)='$wl-a ${wl}archive' ;; irix5* | irix6* | nonstopux*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' # PIC (with -KPIC) is the default. _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared' ;; linux* | k*bsd*-gnu | kopensolaris*-gnu | gnu*) case $cc_basename in # old Intel for x86_64, which still supported -KPIC. ecc*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' ;; # icc used to be incompatible with GCC. # ICC 10 doesn't accept -KPIC any more. icc* | ifort*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' ;; # Lahey Fortran 8.1. lf95*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='--shared' _LT_TAGVAR(lt_prog_compiler_static, $1)='--static' ;; nagfor*) # NAG Fortran compiler _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,-Wl,,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-PIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; tcc*) # Fabrice Bellard et al's Tiny C Compiler _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' ;; pgcc* | pgf77* | pgf90* | pgf95* | pgfortran*) # Portland Group compilers (*not* the Pentium gcc compiler, # which looks to be a dead project) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fpic' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; ccc*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' # All Alpha code is PIC. _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared' ;; xl* | bgxl* | bgf* | mpixl*) # IBM XL C 8.0/Fortran 10.1, 11.1 on PPC and BlueGene _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-qpic' _LT_TAGVAR(lt_prog_compiler_static, $1)='-qstaticlink' ;; *) case `$CC -V 2>&1 | sed 5q` in *Sun\ Ceres\ Fortran* | *Sun*Fortran*\ [[1-7]].* | *Sun*Fortran*\ 8.[[0-3]]*) # Sun Fortran 8.3 passes all unrecognized flags to the linker _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' _LT_TAGVAR(lt_prog_compiler_wl, $1)='' ;; *Sun\ F* | *Sun*Fortran*) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Qoption ld ' ;; *Sun\ C*) # Sun C 5.9 _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' ;; *Intel*\ [[CF]]*Compiler*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' ;; *Portland\ Group*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fpic' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; esac ;; esac ;; newsos6) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; *nto* | *qnx*) # QNX uses GNU C++, but need to define -shared option too, otherwise # it will coredump. _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC -shared' ;; osf3* | osf4* | osf5*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' # All OSF/1 code is PIC. _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared' ;; rdos*) _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared' ;; solaris*) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' case $cc_basename in f77* | f90* | f95* | sunf77* | sunf90* | sunf95*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Qoption ld ';; *) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,';; esac ;; sunos4*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Qoption ld ' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-PIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; sysv4 | sysv4.2uw2* | sysv4.3*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; sysv4*MP*) if test -d /usr/nec; then _LT_TAGVAR(lt_prog_compiler_pic, $1)='-Kconform_pic' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' fi ;; sysv5* | unixware* | sco3.2v5* | sco5v6* | OpenUNIX*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; unicos*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_can_build_shared, $1)=no ;; uts4*) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-pic' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; *) _LT_TAGVAR(lt_prog_compiler_can_build_shared, $1)=no ;; esac fi ]) case $host_os in # For platforms that do not support PIC, -DPIC is meaningless: *djgpp*) _LT_TAGVAR(lt_prog_compiler_pic, $1)= ;; *) _LT_TAGVAR(lt_prog_compiler_pic, $1)="$_LT_TAGVAR(lt_prog_compiler_pic, $1)@&t@m4_if([$1],[],[ -DPIC],[m4_if([$1],[CXX],[ -DPIC],[])])" ;; esac AC_CACHE_CHECK([for $compiler option to produce PIC], [_LT_TAGVAR(lt_cv_prog_compiler_pic, $1)], [_LT_TAGVAR(lt_cv_prog_compiler_pic, $1)=$_LT_TAGVAR(lt_prog_compiler_pic, $1)]) _LT_TAGVAR(lt_prog_compiler_pic, $1)=$_LT_TAGVAR(lt_cv_prog_compiler_pic, $1) # # Check to make sure the PIC flag actually works. # if test -n "$_LT_TAGVAR(lt_prog_compiler_pic, $1)"; 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solaris*) _LT_TAGVAR(no_undefined_flag, $1)=' -z defs' if test yes = "$GCC"; then wlarc='$wl' _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag $wl-z ${wl}text $wl-h $wl$soname -o $lib $libobjs $deplibs $compiler_flags' _LT_TAGVAR(archive_expsym_cmds, $1)='echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~echo "local: *; };" >> $lib.exp~ $CC -shared $pic_flag $wl-z ${wl}text $wl-M $wl$lib.exp $wl-h $wl$soname -o $lib $libobjs $deplibs $compiler_flags~$RM $lib.exp' else case `$CC -V 2>&1` in *"Compilers 5.0"*) wlarc='' _LT_TAGVAR(archive_cmds, $1)='$LD -G$allow_undefined_flag -h $soname -o $lib $libobjs $deplibs $linker_flags' _LT_TAGVAR(archive_expsym_cmds, $1)='echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~echo "local: *; };" >> $lib.exp~ $LD -G$allow_undefined_flag -M $lib.exp -h $soname -o $lib $libobjs $deplibs $linker_flags~$RM $lib.exp' ;; *) wlarc='$wl' _LT_TAGVAR(archive_cmds, $1)='$CC -G$allow_undefined_flag -h $soname -o $lib $libobjs $deplibs $compiler_flags' _LT_TAGVAR(archive_expsym_cmds, $1)='echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~echo "local: *; };" >> $lib.exp~ $CC -G$allow_undefined_flag -M $lib.exp -h $soname -o $lib $libobjs $deplibs $compiler_flags~$RM $lib.exp' ;; esac fi _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-R$libdir' _LT_TAGVAR(hardcode_shlibpath_var, $1)=no case $host_os in solaris2.[[0-5]] | solaris2.[[0-5]].*) ;; *) # The compiler driver will combine and reorder linker options, # but understands '-z linker_flag'. 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(KAI) C++ Compiler # KCC will only create a shared library if the output file # ends with ".so" (or ".sl" for HP-UX), so rename the library # to its proper name (with version) after linking. _LT_TAGVAR(archive_cmds, $1)='tempext=`echo $shared_ext | $SED -e '\''s/\([[^()0-9A-Za-z{}]]\)/\\\\\1/g'\''`; templib=`echo $lib | $SED -e "s/\$tempext\..*/.so/"`; $CC $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags --soname $soname -o \$templib; mv \$templib $lib' _LT_TAGVAR(archive_expsym_cmds, $1)='tempext=`echo $shared_ext | $SED -e '\''s/\([[^()0-9A-Za-z{}]]\)/\\\\\1/g'\''`; templib=`echo $lib | $SED -e "s/\$tempext\..*/.so/"`; $CC $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags --soname $soname -o \$templib $wl-retain-symbols-file,$export_symbols; mv \$templib $lib' # Commands to make compiler produce verbose output that lists # what "hidden" libraries, object files and flags are used when # linking a shared library. # # There doesn't appear to be a way to prevent this compiler from # explicitly linking system object files so we need to strip them # from the output so that they don't get included in the library # dependencies. output_verbose_link_cmd='templist=`$CC $CFLAGS -v conftest.$objext -o libconftest$shared_ext 2>&1 | $GREP "ld"`; rm -f libconftest$shared_ext; list= ; for z in $templist; do case $z in conftest.$objext) list="$list $z";; *.$objext);; *) list="$list $z";;esac; done; func_echo_all "$list"' _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='$wl-rpath,$libdir' _LT_TAGVAR(export_dynamic_flag_spec, $1)='$wl--export-dynamic' # Archives containing C++ object files must be created using # "CC -Bstatic", where "CC" is the KAI C++ compiler. _LT_TAGVAR(old_archive_cmds, $1)='$CC -Bstatic -o $oldlib $oldobjs' ;; icpc* | ecpc* ) # Intel C++ with_gnu_ld=yes # version 8.0 and above of icpc choke on multiply defined symbols # if we add $predep_objects and $postdep_objects, however 7.1 and # earlier do not add the objects themselves. case `$CC -V 2>&1` in *"Version 7."*) _LT_TAGVAR(archive_cmds, $1)='$CC -shared $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags $wl-soname $wl$soname -o $lib' _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags $wl-soname $wl$soname $wl-retain-symbols-file $wl$export_symbols -o $lib' ;; *) # Version 8.0 or newer tmp_idyn= case $host_cpu in ia64*) tmp_idyn=' -i_dynamic';; esac _LT_TAGVAR(archive_cmds, $1)='$CC -shared'"$tmp_idyn"' $libobjs $deplibs $compiler_flags $wl-soname $wl$soname -o $lib' _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared'"$tmp_idyn"' $libobjs $deplibs $compiler_flags $wl-soname $wl$soname $wl-retain-symbols-file $wl$export_symbols -o $lib' ;; esac _LT_TAGVAR(archive_cmds_need_lc, $1)=no _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='$wl-rpath,$libdir' _LT_TAGVAR(export_dynamic_flag_spec, $1)='$wl--export-dynamic' _LT_TAGVAR(whole_archive_flag_spec, $1)='$wl--whole-archive$convenience $wl--no-whole-archive' ;; pgCC* | pgcpp*) # Portland Group C++ compiler case `$CC -V` in *pgCC\ [[1-5]].* | *pgcpp\ [[1-5]].*) _LT_TAGVAR(prelink_cmds, $1)='tpldir=Template.dir~ rm -rf $tpldir~ $CC --prelink_objects --instantiation_dir $tpldir $objs $libobjs $compile_deplibs~ compile_command="$compile_command `find $tpldir -name \*.o | sort | $NL2SP`"' _LT_TAGVAR(old_archive_cmds, $1)='tpldir=Template.dir~ rm -rf $tpldir~ $CC --prelink_objects --instantiation_dir $tpldir $oldobjs$old_deplibs~ $AR $AR_FLAGS $oldlib$oldobjs$old_deplibs `find $tpldir -name \*.o | sort | $NL2SP`~ $RANLIB $oldlib' _LT_TAGVAR(archive_cmds, $1)='tpldir=Template.dir~ rm -rf $tpldir~ $CC --prelink_objects --instantiation_dir $tpldir $predep_objects $libobjs $deplibs $convenience $postdep_objects~ $CC -shared $pic_flag $predep_objects $libobjs $deplibs `find $tpldir -name \*.o | sort | $NL2SP` $postdep_objects $compiler_flags $wl-soname $wl$soname -o $lib' _LT_TAGVAR(archive_expsym_cmds, $1)='tpldir=Template.dir~ rm -rf $tpldir~ $CC --prelink_objects --instantiation_dir $tpldir $predep_objects $libobjs $deplibs $convenience $postdep_objects~ $CC -shared $pic_flag $predep_objects $libobjs $deplibs `find $tpldir -name \*.o | sort | $NL2SP` $postdep_objects $compiler_flags $wl-soname $wl$soname $wl-retain-symbols-file $wl$export_symbols -o $lib' ;; *) # Version 6 and above use weak symbols _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags $wl-soname $wl$soname -o $lib' _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $pic_flag $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags $wl-soname $wl$soname $wl-retain-symbols-file $wl$export_symbols -o $lib' ;; esac _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='$wl--rpath $wl$libdir' _LT_TAGVAR(export_dynamic_flag_spec, $1)='$wl--export-dynamic' _LT_TAGVAR(whole_archive_flag_spec, $1)='$wl--whole-archive`for conv in $convenience\"\"; do test -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` $wl--no-whole-archive' ;; cxx*) # Compaq C++ _LT_TAGVAR(archive_cmds, $1)='$CC -shared $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags $wl-soname $wl$soname -o $lib' _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags $wl-soname $wl$soname -o $lib $wl-retain-symbols-file $wl$export_symbols' runpath_var=LD_RUN_PATH _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-rpath $libdir' _LT_TAGVAR(hardcode_libdir_separator, $1)=: # Commands to make compiler produce verbose output that lists # what "hidden" libraries, object files and flags are used when # linking a shared library. # # There doesn't appear to be a way to prevent this compiler from # explicitly linking system object files so we need to strip them # from the output so that they don't get included in the library # dependencies. output_verbose_link_cmd='templist=`$CC -shared $CFLAGS -v conftest.$objext 2>&1 | $GREP "ld"`; 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Vaughan, 2004 # # This file is free software; the Free Software Foundation gives # unlimited permission to copy and/or distribute it, with or without # modifications, as long as this notice is preserved. # serial 6 ltsugar.m4 # This is to help aclocal find these macros, as it can't see m4_define. AC_DEFUN([LTSUGAR_VERSION], [m4_if([0.1])]) # lt_join(SEP, ARG1, [ARG2...]) # ----------------------------- # Produce ARG1SEPARG2...SEPARGn, omitting [] arguments and their # associated separator. # Needed until we can rely on m4_join from Autoconf 2.62, since all earlier # versions in m4sugar had bugs. m4_define([lt_join], [m4_if([$#], [1], [], [$#], [2], [[$2]], [m4_if([$2], [], [], [[$2]_])$0([$1], m4_shift(m4_shift($@)))])]) m4_define([_lt_join], [m4_if([$#$2], [2], [], [m4_if([$2], [], [], [[$1$2]])$0([$1], m4_shift(m4_shift($@)))])]) # lt_car(LIST) # lt_cdr(LIST) # ------------ # Manipulate m4 lists. # These macros are necessary as long as will still need to support # Autoconf-2.59, which quotes differently. m4_define([lt_car], [[$1]]) m4_define([lt_cdr], [m4_if([$#], 0, [m4_fatal([$0: cannot be called without arguments])], [$#], 1, [], [m4_dquote(m4_shift($@))])]) m4_define([lt_unquote], $1) # lt_append(MACRO-NAME, STRING, [SEPARATOR]) # ------------------------------------------ # Redefine MACRO-NAME to hold its former content plus 'SEPARATOR''STRING'. # Note that neither SEPARATOR nor STRING are expanded; they are appended # to MACRO-NAME as is (leaving the expansion for when MACRO-NAME is invoked). # No SEPARATOR is output if MACRO-NAME was previously undefined (different # than defined and empty). # # This macro is needed until we can rely on Autoconf 2.62, since earlier # versions of m4sugar mistakenly expanded SEPARATOR but not STRING. m4_define([lt_append], [m4_define([$1], m4_ifdef([$1], [m4_defn([$1])[$3]])[$2])]) # lt_combine(SEP, PREFIX-LIST, INFIX, SUFFIX1, [SUFFIX2...]) # ---------------------------------------------------------- # Produce a SEP delimited list of all paired combinations of elements of # PREFIX-LIST with SUFFIX1 through SUFFIXn. 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AC_DEFUN([AS_COMPILER_FLAG], [ AC_MSG_CHECKING([to see if compiler understands $1]) save_CFLAGS="$CFLAGS" CFLAGS="$CFLAGS $1" AC_TRY_COMPILE([ ], [], [flag_ok=yes], [flag_ok=no]) CFLAGS="$save_CFLAGS" if test "X$flag_ok" = Xyes ; then m4_ifvaln([$2],[$2]) true else m4_ifvaln([$3],[$3]) true fi AC_MSG_RESULT([$flag_ok]) ]) dnl AS_COMPILER_FLAGS(VAR, FLAGS) dnl Tries to compile with the given CFLAGS. AC_DEFUN([AS_COMPILER_FLAGS], [ list=$2 flags_supported="" flags_unsupported="" AC_MSG_CHECKING([for supported compiler flags]) for each in $list do save_CFLAGS="$CFLAGS" CFLAGS="$CFLAGS $each" AC_TRY_COMPILE([ ], [], [flag_ok=yes], [flag_ok=no]) CFLAGS="$save_CFLAGS" if test "X$flag_ok" = Xyes ; then flags_supported="$flags_supported $each" else flags_unsupported="$flags_unsupported $each" fi done AC_MSG_RESULT([$flags_supported]) if test "X$flags_unsupported" != X ; then AC_MSG_WARN([unsupported compiler flags: $flags_unsupported]) fi $1="$$1 $flags_supported" ]) intel-gpu-tools-1.14/m4/ltversion.m40000644000175000017500000000127312665336437014253 00000000000000# ltversion.m4 -- version numbers -*- Autoconf -*- # # Copyright (C) 2004, 2011-2015 Free Software Foundation, Inc. # Written by Scott James Remnant, 2004 # # This file is free software; the Free Software Foundation gives # unlimited permission to copy and/or distribute it, with or without # modifications, as long as this notice is preserved. # @configure_input@ # serial 4179 ltversion.m4 # This file is part of GNU Libtool m4_define([LT_PACKAGE_VERSION], [2.4.6]) m4_define([LT_PACKAGE_REVISION], [2.4.6]) AC_DEFUN([LTVERSION_VERSION], [macro_version='2.4.6' macro_revision='2.4.6' _LT_DECL(, macro_version, 0, [Which release of libtool.m4 was used?]) _LT_DECL(, macro_revision, 0) ]) intel-gpu-tools-1.14/m4/ltoptions.m40000644000175000017500000003426212665336437014265 00000000000000# Helper functions for option handling. -*- Autoconf -*- # # Copyright (C) 2004-2005, 2007-2009, 2011-2015 Free Software # Foundation, Inc. # Written by Gary V. Vaughan, 2004 # # This file is free software; the Free Software Foundation gives # unlimited permission to copy and/or distribute it, with or without # modifications, as long as this notice is preserved. # serial 8 ltoptions.m4 # This is to help aclocal find these macros, as it can't see m4_define. AC_DEFUN([LTOPTIONS_VERSION], [m4_if([1])]) # _LT_MANGLE_OPTION(MACRO-NAME, OPTION-NAME) # ------------------------------------------ m4_define([_LT_MANGLE_OPTION], [[_LT_OPTION_]m4_bpatsubst($1__$2, [[^a-zA-Z0-9_]], [_])]) # _LT_SET_OPTION(MACRO-NAME, OPTION-NAME) # --------------------------------------- # Set option OPTION-NAME for macro MACRO-NAME, and if there is a # matching handler defined, dispatch to it. Other OPTION-NAMEs are # saved as a flag. m4_define([_LT_SET_OPTION], [m4_define(_LT_MANGLE_OPTION([$1], [$2]))dnl m4_ifdef(_LT_MANGLE_DEFUN([$1], [$2]), _LT_MANGLE_DEFUN([$1], [$2]), [m4_warning([Unknown $1 option '$2'])])[]dnl ]) # _LT_IF_OPTION(MACRO-NAME, OPTION-NAME, IF-SET, [IF-NOT-SET]) # ------------------------------------------------------------ # Execute IF-SET if OPTION is set, IF-NOT-SET otherwise. m4_define([_LT_IF_OPTION], [m4_ifdef(_LT_MANGLE_OPTION([$1], [$2]), [$3], [$4])]) # _LT_UNLESS_OPTIONS(MACRO-NAME, OPTION-LIST, IF-NOT-SET) # ------------------------------------------------------- # Execute IF-NOT-SET unless all options in OPTION-LIST for MACRO-NAME # are set. m4_define([_LT_UNLESS_OPTIONS], [m4_foreach([_LT_Option], m4_split(m4_normalize([$2])), [m4_ifdef(_LT_MANGLE_OPTION([$1], _LT_Option), [m4_define([$0_found])])])[]dnl m4_ifdef([$0_found], [m4_undefine([$0_found])], [$3 ])[]dnl ]) # _LT_SET_OPTIONS(MACRO-NAME, OPTION-LIST) # ---------------------------------------- # OPTION-LIST is a space-separated list of Libtool options associated # with MACRO-NAME. If any OPTION has a matching handler declared with # LT_OPTION_DEFINE, dispatch to that macro; otherwise complain about # the unknown option and exit. m4_defun([_LT_SET_OPTIONS], [# Set options m4_foreach([_LT_Option], m4_split(m4_normalize([$2])), [_LT_SET_OPTION([$1], _LT_Option)]) m4_if([$1],[LT_INIT],[ dnl dnl Simply set some default values (i.e off) if boolean options were not dnl specified: _LT_UNLESS_OPTIONS([LT_INIT], [dlopen], [enable_dlopen=no ]) _LT_UNLESS_OPTIONS([LT_INIT], [win32-dll], [enable_win32_dll=no ]) dnl dnl If no reference was made to various pairs of opposing options, then dnl we run the default mode handler for the pair. For example, if neither dnl 'shared' nor 'disable-shared' was passed, we enable building of shared dnl archives by default: _LT_UNLESS_OPTIONS([LT_INIT], [shared disable-shared], [_LT_ENABLE_SHARED]) _LT_UNLESS_OPTIONS([LT_INIT], [static disable-static], [_LT_ENABLE_STATIC]) _LT_UNLESS_OPTIONS([LT_INIT], [pic-only no-pic], [_LT_WITH_PIC]) _LT_UNLESS_OPTIONS([LT_INIT], [fast-install disable-fast-install], [_LT_ENABLE_FAST_INSTALL]) _LT_UNLESS_OPTIONS([LT_INIT], [aix-soname=aix aix-soname=both aix-soname=svr4], [_LT_WITH_AIX_SONAME([aix])]) ]) ])# _LT_SET_OPTIONS ## --------------------------------- ## ## Macros to handle LT_INIT options. ## ## --------------------------------- ## # _LT_MANGLE_DEFUN(MACRO-NAME, OPTION-NAME) # ----------------------------------------- m4_define([_LT_MANGLE_DEFUN], [[_LT_OPTION_DEFUN_]m4_bpatsubst(m4_toupper([$1__$2]), [[^A-Z0-9_]], [_])]) # LT_OPTION_DEFINE(MACRO-NAME, OPTION-NAME, CODE) # ----------------------------------------------- m4_define([LT_OPTION_DEFINE], [m4_define(_LT_MANGLE_DEFUN([$1], [$2]), [$3])[]dnl ])# LT_OPTION_DEFINE # dlopen # ------ LT_OPTION_DEFINE([LT_INIT], [dlopen], [enable_dlopen=yes ]) AU_DEFUN([AC_LIBTOOL_DLOPEN], [_LT_SET_OPTION([LT_INIT], [dlopen]) AC_DIAGNOSE([obsolete], [$0: Remove this warning and the call to _LT_SET_OPTION when you put the 'dlopen' option into LT_INIT's first parameter.]) ]) dnl aclocal-1.4 backwards compatibility: dnl AC_DEFUN([AC_LIBTOOL_DLOPEN], []) # win32-dll # --------- # Declare package support for building win32 dll's. LT_OPTION_DEFINE([LT_INIT], [win32-dll], [enable_win32_dll=yes case $host in *-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-cegcc*) AC_CHECK_TOOL(AS, as, false) AC_CHECK_TOOL(DLLTOOL, dlltool, false) AC_CHECK_TOOL(OBJDUMP, objdump, false) ;; esac test -z "$AS" && AS=as _LT_DECL([], [AS], [1], [Assembler program])dnl test -z "$DLLTOOL" && DLLTOOL=dlltool _LT_DECL([], [DLLTOOL], [1], [DLL creation program])dnl test -z "$OBJDUMP" && OBJDUMP=objdump _LT_DECL([], [OBJDUMP], [1], [Object dumper program])dnl ])# win32-dll AU_DEFUN([AC_LIBTOOL_WIN32_DLL], [AC_REQUIRE([AC_CANONICAL_HOST])dnl _LT_SET_OPTION([LT_INIT], [win32-dll]) AC_DIAGNOSE([obsolete], [$0: Remove this warning and the call to _LT_SET_OPTION when you put the 'win32-dll' option into LT_INIT's first parameter.]) ]) dnl aclocal-1.4 backwards compatibility: dnl AC_DEFUN([AC_LIBTOOL_WIN32_DLL], []) # _LT_ENABLE_SHARED([DEFAULT]) # ---------------------------- # implement the --enable-shared flag, and supports the 'shared' and # 'disable-shared' LT_INIT options. # DEFAULT is either 'yes' or 'no'. If omitted, it defaults to 'yes'. m4_define([_LT_ENABLE_SHARED], [m4_define([_LT_ENABLE_SHARED_DEFAULT], [m4_if($1, no, no, yes)])dnl AC_ARG_ENABLE([shared], [AS_HELP_STRING([--enable-shared@<:@=PKGS@:>@], [build shared libraries @<:@default=]_LT_ENABLE_SHARED_DEFAULT[@:>@])], [p=${PACKAGE-default} case $enableval in yes) enable_shared=yes ;; no) enable_shared=no ;; *) enable_shared=no # Look at the argument we got. We use all the common list separators. lt_save_ifs=$IFS; IFS=$IFS$PATH_SEPARATOR, for pkg in $enableval; do IFS=$lt_save_ifs if test "X$pkg" = "X$p"; then enable_shared=yes fi done IFS=$lt_save_ifs ;; esac], [enable_shared=]_LT_ENABLE_SHARED_DEFAULT) _LT_DECL([build_libtool_libs], [enable_shared], [0], [Whether or not to build shared libraries]) ])# _LT_ENABLE_SHARED LT_OPTION_DEFINE([LT_INIT], [shared], [_LT_ENABLE_SHARED([yes])]) LT_OPTION_DEFINE([LT_INIT], [disable-shared], [_LT_ENABLE_SHARED([no])]) # Old names: AC_DEFUN([AC_ENABLE_SHARED], [_LT_SET_OPTION([LT_INIT], m4_if([$1], [no], [disable-])[shared]) ]) AC_DEFUN([AC_DISABLE_SHARED], [_LT_SET_OPTION([LT_INIT], [disable-shared]) ]) AU_DEFUN([AM_ENABLE_SHARED], [AC_ENABLE_SHARED($@)]) AU_DEFUN([AM_DISABLE_SHARED], [AC_DISABLE_SHARED($@)]) dnl aclocal-1.4 backwards compatibility: dnl AC_DEFUN([AM_ENABLE_SHARED], []) dnl AC_DEFUN([AM_DISABLE_SHARED], []) # _LT_ENABLE_STATIC([DEFAULT]) # ---------------------------- # implement the --enable-static flag, and support the 'static' and # 'disable-static' LT_INIT options. # DEFAULT is either 'yes' or 'no'. If omitted, it defaults to 'yes'. m4_define([_LT_ENABLE_STATIC], [m4_define([_LT_ENABLE_STATIC_DEFAULT], [m4_if($1, no, no, yes)])dnl AC_ARG_ENABLE([static], [AS_HELP_STRING([--enable-static@<:@=PKGS@:>@], [build static libraries @<:@default=]_LT_ENABLE_STATIC_DEFAULT[@:>@])], [p=${PACKAGE-default} case $enableval in yes) enable_static=yes ;; no) enable_static=no ;; *) enable_static=no # Look at the argument we got. We use all the common list separators. lt_save_ifs=$IFS; IFS=$IFS$PATH_SEPARATOR, for pkg in $enableval; do IFS=$lt_save_ifs if test "X$pkg" = "X$p"; then enable_static=yes fi done IFS=$lt_save_ifs ;; esac], [enable_static=]_LT_ENABLE_STATIC_DEFAULT) _LT_DECL([build_old_libs], [enable_static], [0], [Whether or not to build static libraries]) ])# _LT_ENABLE_STATIC LT_OPTION_DEFINE([LT_INIT], [static], [_LT_ENABLE_STATIC([yes])]) LT_OPTION_DEFINE([LT_INIT], [disable-static], [_LT_ENABLE_STATIC([no])]) # Old names: AC_DEFUN([AC_ENABLE_STATIC], [_LT_SET_OPTION([LT_INIT], m4_if([$1], [no], [disable-])[static]) ]) AC_DEFUN([AC_DISABLE_STATIC], [_LT_SET_OPTION([LT_INIT], [disable-static]) ]) AU_DEFUN([AM_ENABLE_STATIC], [AC_ENABLE_STATIC($@)]) AU_DEFUN([AM_DISABLE_STATIC], [AC_DISABLE_STATIC($@)]) dnl aclocal-1.4 backwards compatibility: dnl AC_DEFUN([AM_ENABLE_STATIC], []) dnl AC_DEFUN([AM_DISABLE_STATIC], []) # _LT_ENABLE_FAST_INSTALL([DEFAULT]) # ---------------------------------- # implement the --enable-fast-install flag, and support the 'fast-install' # and 'disable-fast-install' LT_INIT options. # DEFAULT is either 'yes' or 'no'. If omitted, it defaults to 'yes'. m4_define([_LT_ENABLE_FAST_INSTALL], [m4_define([_LT_ENABLE_FAST_INSTALL_DEFAULT], [m4_if($1, no, no, yes)])dnl AC_ARG_ENABLE([fast-install], [AS_HELP_STRING([--enable-fast-install@<:@=PKGS@:>@], [optimize for fast installation @<:@default=]_LT_ENABLE_FAST_INSTALL_DEFAULT[@:>@])], [p=${PACKAGE-default} case $enableval in yes) enable_fast_install=yes ;; no) enable_fast_install=no ;; *) enable_fast_install=no # Look at the argument we got. We use all the common list separators. lt_save_ifs=$IFS; IFS=$IFS$PATH_SEPARATOR, for pkg in $enableval; do IFS=$lt_save_ifs if test "X$pkg" = "X$p"; then enable_fast_install=yes fi done IFS=$lt_save_ifs ;; esac], [enable_fast_install=]_LT_ENABLE_FAST_INSTALL_DEFAULT) _LT_DECL([fast_install], [enable_fast_install], [0], [Whether or not to optimize for fast installation])dnl ])# _LT_ENABLE_FAST_INSTALL LT_OPTION_DEFINE([LT_INIT], [fast-install], [_LT_ENABLE_FAST_INSTALL([yes])]) LT_OPTION_DEFINE([LT_INIT], [disable-fast-install], [_LT_ENABLE_FAST_INSTALL([no])]) # Old names: AU_DEFUN([AC_ENABLE_FAST_INSTALL], [_LT_SET_OPTION([LT_INIT], m4_if([$1], [no], [disable-])[fast-install]) AC_DIAGNOSE([obsolete], [$0: Remove this warning and the call to _LT_SET_OPTION when you put the 'fast-install' option into LT_INIT's first parameter.]) ]) AU_DEFUN([AC_DISABLE_FAST_INSTALL], [_LT_SET_OPTION([LT_INIT], [disable-fast-install]) AC_DIAGNOSE([obsolete], [$0: Remove this warning and the call to _LT_SET_OPTION when you put the 'disable-fast-install' option into LT_INIT's first parameter.]) ]) dnl aclocal-1.4 backwards compatibility: dnl AC_DEFUN([AC_ENABLE_FAST_INSTALL], []) dnl AC_DEFUN([AM_DISABLE_FAST_INSTALL], []) # _LT_WITH_AIX_SONAME([DEFAULT]) # ---------------------------------- # implement the --with-aix-soname flag, and support the `aix-soname=aix' # and `aix-soname=both' and `aix-soname=svr4' LT_INIT options. DEFAULT # is either `aix', `both' or `svr4'. If omitted, it defaults to `aix'. m4_define([_LT_WITH_AIX_SONAME], [m4_define([_LT_WITH_AIX_SONAME_DEFAULT], [m4_if($1, svr4, svr4, m4_if($1, both, both, aix))])dnl shared_archive_member_spec= case $host,$enable_shared in power*-*-aix[[5-9]]*,yes) AC_MSG_CHECKING([which variant of shared library versioning to provide]) AC_ARG_WITH([aix-soname], [AS_HELP_STRING([--with-aix-soname=aix|svr4|both], [shared library versioning (aka "SONAME") variant to provide on AIX, @<:@default=]_LT_WITH_AIX_SONAME_DEFAULT[@:>@.])], [case $withval in aix|svr4|both) ;; *) AC_MSG_ERROR([Unknown argument to --with-aix-soname]) ;; esac lt_cv_with_aix_soname=$with_aix_soname], [AC_CACHE_VAL([lt_cv_with_aix_soname], [lt_cv_with_aix_soname=]_LT_WITH_AIX_SONAME_DEFAULT) with_aix_soname=$lt_cv_with_aix_soname]) AC_MSG_RESULT([$with_aix_soname]) if test aix != "$with_aix_soname"; then # For the AIX way of multilib, we name the shared archive member # based on the bitwidth used, traditionally 'shr.o' or 'shr_64.o', # and 'shr.imp' or 'shr_64.imp', respectively, for the Import File. # Even when GNU compilers ignore OBJECT_MODE but need '-maix64' flag, # the AIX toolchain works better with OBJECT_MODE set (default 32). if test 64 = "${OBJECT_MODE-32}"; then shared_archive_member_spec=shr_64 else shared_archive_member_spec=shr fi fi ;; *) with_aix_soname=aix ;; esac _LT_DECL([], [shared_archive_member_spec], [0], [Shared archive member basename, for filename based shared library versioning on AIX])dnl ])# _LT_WITH_AIX_SONAME LT_OPTION_DEFINE([LT_INIT], [aix-soname=aix], [_LT_WITH_AIX_SONAME([aix])]) LT_OPTION_DEFINE([LT_INIT], [aix-soname=both], [_LT_WITH_AIX_SONAME([both])]) LT_OPTION_DEFINE([LT_INIT], [aix-soname=svr4], [_LT_WITH_AIX_SONAME([svr4])]) # _LT_WITH_PIC([MODE]) # -------------------- # implement the --with-pic flag, and support the 'pic-only' and 'no-pic' # LT_INIT options. # MODE is either 'yes' or 'no'. If omitted, it defaults to 'both'. m4_define([_LT_WITH_PIC], [AC_ARG_WITH([pic], [AS_HELP_STRING([--with-pic@<:@=PKGS@:>@], [try to use only PIC/non-PIC objects @<:@default=use both@:>@])], [lt_p=${PACKAGE-default} case $withval in yes|no) pic_mode=$withval ;; *) pic_mode=default # Look at the argument we got. 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See the GNU # General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, see . # # As a special exception to the GNU General Public License, if you # distribute this file as part of a program that contains a # configuration script generated by Autoconf, you may include it under # the same distribution terms that you use for the rest of that # program. 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-mint | -mint[0-9]*) basic_machine=m68k-atari os=-mint ;; esac # Decode aliases for certain CPU-COMPANY combinations. case $basic_machine in # Recognize the basic CPU types without company name. # Some are omitted here because they have special meanings below. 1750a | 580 \ | a29k \ | aarch64 | aarch64_be \ | alpha | alphaev[4-8] | alphaev56 | alphaev6[78] | alphapca5[67] \ | alpha64 | alpha64ev[4-8] | alpha64ev56 | alpha64ev6[78] | alpha64pca5[67] \ | am33_2.0 \ | arc | arceb \ | arm | arm[bl]e | arme[lb] | armv[2-8] | armv[3-8][lb] | armv7[arm] \ | avr | avr32 \ | ba \ | be32 | be64 \ | bfin \ | c4x | c8051 | clipper \ | d10v | d30v | dlx | dsp16xx \ | e2k | epiphany \ | fido | fr30 | frv | ft32 \ | h8300 | h8500 | hppa | hppa1.[01] | hppa2.0 | hppa2.0[nw] | hppa64 \ | hexagon \ | i370 | i860 | i960 | ia64 \ | ip2k | iq2000 \ | k1om \ | le32 | le64 \ | lm32 \ | m32c | m32r | m32rle | m68000 | m68k | m88k \ | maxq | mb | microblaze | microblazeel | mcore | mep | metag \ | mips | mipsbe | mipseb | mipsel | mipsle \ | mips16 \ | mips64 | mips64el \ | mips64octeon | mips64octeonel \ | mips64orion | mips64orionel \ | mips64r5900 | mips64r5900el \ | mips64vr | mips64vrel \ | mips64vr4100 | mips64vr4100el \ | mips64vr4300 | mips64vr4300el \ | mips64vr5000 | mips64vr5000el \ | mips64vr5900 | mips64vr5900el \ | mipsisa32 | mipsisa32el \ | mipsisa32r2 | mipsisa32r2el \ | mipsisa32r6 | mipsisa32r6el \ | mipsisa64 | mipsisa64el \ | mipsisa64r2 | mipsisa64r2el \ | mipsisa64r6 | mipsisa64r6el \ | mipsisa64sb1 | mipsisa64sb1el \ | mipsisa64sr71k | mipsisa64sr71kel \ | mipsr5900 | mipsr5900el \ | mipstx39 | mipstx39el \ | mn10200 | mn10300 \ | moxie \ | mt \ | msp430 \ | nds32 | nds32le | nds32be \ | nios | nios2 | nios2eb | nios2el \ | ns16k | ns32k \ | open8 | or1k | or1knd | or32 \ | pdp10 | pdp11 | pj | pjl \ | powerpc | powerpc64 | powerpc64le | powerpcle \ | pyramid \ | riscv32 | riscv64 \ | rl78 | rx \ | score \ | sh | sh[1234] | sh[24]a | sh[24]aeb | sh[23]e | sh[234]eb | sheb | shbe | shle | sh[1234]le | sh3ele \ | sh64 | sh64le \ | sparc | sparc64 | sparc64b | sparc64v | sparc86x | sparclet | sparclite \ | sparcv8 | sparcv9 | sparcv9b | sparcv9v \ | spu \ | tahoe | tic4x | tic54x | tic55x | tic6x | tic80 | tron \ | ubicom32 \ | v850 | v850e | v850e1 | v850e2 | v850es | v850e2v3 \ | visium \ | we32k \ | x86 | xc16x | xstormy16 | xtensa \ | z8k | z80) basic_machine=$basic_machine-unknown ;; c54x) basic_machine=tic54x-unknown ;; c55x) basic_machine=tic55x-unknown ;; c6x) basic_machine=tic6x-unknown ;; leon|leon[3-9]) basic_machine=sparc-$basic_machine ;; m6811 | m68hc11 | m6812 | m68hc12 | m68hcs12x | nvptx | picochip) basic_machine=$basic_machine-unknown os=-none ;; m88110 | m680[12346]0 | m683?2 | m68360 | m5200 | v70 | w65 | z8k) ;; ms1) basic_machine=mt-unknown ;; strongarm | thumb | xscale) basic_machine=arm-unknown ;; xgate) basic_machine=$basic_machine-unknown os=-none ;; xscaleeb) basic_machine=armeb-unknown ;; xscaleel) basic_machine=armel-unknown ;; # We use `pc' rather than `unknown' # because (1) that's what they normally are, and # (2) the word "unknown" tends to confuse beginning users. i*86 | x86_64) basic_machine=$basic_machine-pc ;; # Object if more than one company name word. *-*-*) echo Invalid configuration \`$1\': machine \`$basic_machine\' not recognized 1>&2 exit 1 ;; # Recognize the basic CPU types with company name. 580-* \ | a29k-* \ | aarch64-* | aarch64_be-* \ | alpha-* | alphaev[4-8]-* | alphaev56-* | alphaev6[78]-* \ | alpha64-* | alpha64ev[4-8]-* | alpha64ev56-* | alpha64ev6[78]-* \ | alphapca5[67]-* | alpha64pca5[67]-* | arc-* | arceb-* \ | arm-* | armbe-* | armle-* | armeb-* | armv*-* \ | avr-* | avr32-* \ | ba-* \ | be32-* | be64-* \ | bfin-* | bs2000-* \ | c[123]* | c30-* | [cjt]90-* | c4x-* \ | c8051-* | clipper-* | craynv-* | cydra-* \ | d10v-* | d30v-* | dlx-* \ | e2k-* | elxsi-* \ | f30[01]-* | f700-* | fido-* | fr30-* | frv-* | fx80-* \ | h8300-* | h8500-* \ | hppa-* | hppa1.[01]-* | hppa2.0-* | hppa2.0[nw]-* | hppa64-* \ | hexagon-* \ | i*86-* | i860-* | i960-* | ia64-* \ | ip2k-* | iq2000-* \ | k1om-* \ | le32-* | le64-* \ | lm32-* \ | m32c-* | m32r-* | m32rle-* \ | m68000-* | m680[012346]0-* | m68360-* | m683?2-* | m68k-* \ | m88110-* | m88k-* | maxq-* | mcore-* | metag-* \ | microblaze-* | microblazeel-* \ | mips-* | mipsbe-* | mipseb-* | mipsel-* | mipsle-* \ | mips16-* \ | mips64-* | mips64el-* \ | mips64octeon-* | mips64octeonel-* \ | mips64orion-* | mips64orionel-* \ | mips64r5900-* | mips64r5900el-* \ | mips64vr-* | mips64vrel-* \ | mips64vr4100-* | mips64vr4100el-* \ | mips64vr4300-* | mips64vr4300el-* \ | mips64vr5000-* | mips64vr5000el-* \ | mips64vr5900-* | mips64vr5900el-* \ | mipsisa32-* | mipsisa32el-* \ | mipsisa32r2-* | mipsisa32r2el-* \ | mipsisa32r6-* | mipsisa32r6el-* \ | mipsisa64-* | mipsisa64el-* \ | mipsisa64r2-* | mipsisa64r2el-* \ | mipsisa64r6-* | mipsisa64r6el-* \ | mipsisa64sb1-* | mipsisa64sb1el-* \ | mipsisa64sr71k-* | mipsisa64sr71kel-* \ | mipsr5900-* | mipsr5900el-* \ | mipstx39-* | mipstx39el-* \ | mmix-* \ | mt-* \ | msp430-* \ | nds32-* | nds32le-* | nds32be-* \ | nios-* | nios2-* | nios2eb-* | nios2el-* \ | none-* | np1-* | ns16k-* | ns32k-* \ | open8-* \ | or1k*-* \ | orion-* \ | pdp10-* | pdp11-* | pj-* | pjl-* | pn-* | power-* \ | powerpc-* | powerpc64-* | powerpc64le-* | powerpcle-* \ | pyramid-* \ | riscv32-* | riscv64-* \ | rl78-* | romp-* | rs6000-* | rx-* \ | sh-* | sh[1234]-* | sh[24]a-* | sh[24]aeb-* | sh[23]e-* | sh[34]eb-* | sheb-* | shbe-* \ | shle-* | sh[1234]le-* | sh3ele-* | sh64-* | sh64le-* \ | sparc-* | sparc64-* | sparc64b-* | sparc64v-* | sparc86x-* | sparclet-* \ | sparclite-* \ | sparcv8-* | sparcv9-* | sparcv9b-* | sparcv9v-* | sv1-* | sx*-* \ | tahoe-* \ | tic30-* | tic4x-* | tic54x-* | tic55x-* | tic6x-* | tic80-* \ | tile*-* \ | tron-* \ | ubicom32-* \ | v850-* | v850e-* | v850e1-* | v850es-* | v850e2-* | v850e2v3-* \ | vax-* \ | visium-* \ | we32k-* \ | x86-* | x86_64-* | xc16x-* | xps100-* \ | xstormy16-* | xtensa*-* \ | ymp-* \ | z8k-* | z80-*) ;; # Recognize the basic CPU types without company name, with glob match. xtensa*) basic_machine=$basic_machine-unknown ;; # Recognize the various machine names and aliases which stand # for a CPU type and a company and sometimes even an OS. 386bsd) basic_machine=i386-unknown os=-bsd ;; 3b1 | 7300 | 7300-att | att-7300 | pc7300 | safari | unixpc) basic_machine=m68000-att ;; 3b*) basic_machine=we32k-att ;; a29khif) basic_machine=a29k-amd os=-udi ;; abacus) basic_machine=abacus-unknown ;; adobe68k) basic_machine=m68010-adobe os=-scout ;; alliant | fx80) basic_machine=fx80-alliant ;; altos | altos3068) basic_machine=m68k-altos ;; am29k) basic_machine=a29k-none os=-bsd ;; amd64) basic_machine=x86_64-pc ;; amd64-*) basic_machine=x86_64-`echo $basic_machine | sed 's/^[^-]*-//'` ;; amdahl) basic_machine=580-amdahl os=-sysv ;; amiga | amiga-*) basic_machine=m68k-unknown ;; amigaos | amigados) basic_machine=m68k-unknown os=-amigaos ;; amigaunix | amix) basic_machine=m68k-unknown os=-sysv4 ;; apollo68) basic_machine=m68k-apollo os=-sysv ;; apollo68bsd) basic_machine=m68k-apollo os=-bsd ;; aros) basic_machine=i386-pc os=-aros ;; asmjs) basic_machine=asmjs-unknown ;; aux) basic_machine=m68k-apple os=-aux ;; balance) basic_machine=ns32k-sequent os=-dynix ;; blackfin) basic_machine=bfin-unknown os=-linux ;; blackfin-*) basic_machine=bfin-`echo $basic_machine | sed 's/^[^-]*-//'` os=-linux ;; bluegene*) basic_machine=powerpc-ibm os=-cnk ;; c54x-*) basic_machine=tic54x-`echo $basic_machine | sed 's/^[^-]*-//'` ;; c55x-*) basic_machine=tic55x-`echo $basic_machine | sed 's/^[^-]*-//'` ;; c6x-*) basic_machine=tic6x-`echo $basic_machine | sed 's/^[^-]*-//'` ;; c90) basic_machine=c90-cray os=-unicos ;; cegcc) basic_machine=arm-unknown os=-cegcc ;; convex-c1) basic_machine=c1-convex os=-bsd ;; convex-c2) basic_machine=c2-convex os=-bsd ;; convex-c32) basic_machine=c32-convex os=-bsd ;; convex-c34) basic_machine=c34-convex os=-bsd ;; convex-c38) basic_machine=c38-convex os=-bsd ;; cray | j90) basic_machine=j90-cray os=-unicos ;; craynv) basic_machine=craynv-cray os=-unicosmp ;; cr16 | cr16-*) basic_machine=cr16-unknown os=-elf ;; crds | unos) basic_machine=m68k-crds ;; crisv32 | crisv32-* | etraxfs*) basic_machine=crisv32-axis ;; cris | cris-* | etrax*) basic_machine=cris-axis ;; crx) basic_machine=crx-unknown os=-elf ;; da30 | da30-*) basic_machine=m68k-da30 ;; decstation | decstation-3100 | pmax | pmax-* | pmin | dec3100 | decstatn) basic_machine=mips-dec ;; decsystem10* | dec10*) basic_machine=pdp10-dec os=-tops10 ;; decsystem20* | dec20*) basic_machine=pdp10-dec os=-tops20 ;; delta | 3300 | motorola-3300 | motorola-delta \ | 3300-motorola | delta-motorola) basic_machine=m68k-motorola ;; delta88) basic_machine=m88k-motorola os=-sysv3 ;; dicos) basic_machine=i686-pc os=-dicos ;; djgpp) basic_machine=i586-pc os=-msdosdjgpp ;; dpx20 | dpx20-*) basic_machine=rs6000-bull os=-bosx ;; dpx2* | dpx2*-bull) basic_machine=m68k-bull os=-sysv3 ;; ebmon29k) basic_machine=a29k-amd os=-ebmon ;; elxsi) basic_machine=elxsi-elxsi os=-bsd ;; encore | umax | mmax) basic_machine=ns32k-encore ;; es1800 | OSE68k | ose68k | ose | OSE) basic_machine=m68k-ericsson os=-ose ;; fx2800) basic_machine=i860-alliant ;; genix) basic_machine=ns32k-ns ;; gmicro) basic_machine=tron-gmicro os=-sysv ;; go32) basic_machine=i386-pc os=-go32 ;; h3050r* | hiux*) basic_machine=hppa1.1-hitachi os=-hiuxwe2 ;; h8300hms) basic_machine=h8300-hitachi os=-hms ;; h8300xray) basic_machine=h8300-hitachi os=-xray ;; h8500hms) basic_machine=h8500-hitachi os=-hms ;; harris) basic_machine=m88k-harris os=-sysv3 ;; hp300-*) basic_machine=m68k-hp ;; hp300bsd) basic_machine=m68k-hp os=-bsd ;; hp300hpux) basic_machine=m68k-hp os=-hpux ;; hp3k9[0-9][0-9] | hp9[0-9][0-9]) basic_machine=hppa1.0-hp ;; hp9k2[0-9][0-9] | hp9k31[0-9]) basic_machine=m68000-hp ;; hp9k3[2-9][0-9]) basic_machine=m68k-hp ;; hp9k6[0-9][0-9] | hp6[0-9][0-9]) basic_machine=hppa1.0-hp ;; hp9k7[0-79][0-9] | hp7[0-79][0-9]) basic_machine=hppa1.1-hp ;; hp9k78[0-9] | hp78[0-9]) # FIXME: really hppa2.0-hp basic_machine=hppa1.1-hp ;; hp9k8[67]1 | hp8[67]1 | hp9k80[24] | hp80[24] | hp9k8[78]9 | hp8[78]9 | hp9k893 | hp893) # FIXME: really hppa2.0-hp basic_machine=hppa1.1-hp ;; hp9k8[0-9][13679] | hp8[0-9][13679]) basic_machine=hppa1.1-hp ;; hp9k8[0-9][0-9] | hp8[0-9][0-9]) basic_machine=hppa1.0-hp ;; hppa-next) os=-nextstep3 ;; hppaosf) basic_machine=hppa1.1-hp os=-osf ;; hppro) basic_machine=hppa1.1-hp os=-proelf ;; i370-ibm* | ibm*) basic_machine=i370-ibm ;; i*86v32) basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'` os=-sysv32 ;; i*86v4*) basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'` os=-sysv4 ;; i*86v) basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'` os=-sysv ;; i*86sol2) basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'` os=-solaris2 ;; i386mach) basic_machine=i386-mach os=-mach ;; i386-vsta | vsta) basic_machine=i386-unknown os=-vsta ;; iris | iris4d) basic_machine=mips-sgi case $os in -irix*) ;; *) os=-irix4 ;; esac ;; isi68 | isi) basic_machine=m68k-isi os=-sysv ;; leon-*|leon[3-9]-*) basic_machine=sparc-`echo $basic_machine | sed 's/-.*//'` ;; m68knommu) basic_machine=m68k-unknown os=-linux ;; m68knommu-*) basic_machine=m68k-`echo $basic_machine | sed 's/^[^-]*-//'` os=-linux ;; m88k-omron*) basic_machine=m88k-omron ;; magnum | m3230) basic_machine=mips-mips os=-sysv ;; merlin) basic_machine=ns32k-utek os=-sysv ;; microblaze*) basic_machine=microblaze-xilinx ;; mingw64) basic_machine=x86_64-pc os=-mingw64 ;; mingw32) basic_machine=i686-pc os=-mingw32 ;; mingw32ce) basic_machine=arm-unknown os=-mingw32ce ;; miniframe) basic_machine=m68000-convergent ;; *mint | -mint[0-9]* | *MiNT | *MiNT[0-9]*) basic_machine=m68k-atari os=-mint ;; mips3*-*) basic_machine=`echo $basic_machine | sed -e 's/mips3/mips64/'` ;; mips3*) basic_machine=`echo $basic_machine | sed -e 's/mips3/mips64/'`-unknown ;; monitor) basic_machine=m68k-rom68k os=-coff ;; morphos) basic_machine=powerpc-unknown os=-morphos ;; moxiebox) basic_machine=moxie-unknown os=-moxiebox ;; msdos) basic_machine=i386-pc os=-msdos ;; ms1-*) basic_machine=`echo $basic_machine | sed -e 's/ms1-/mt-/'` ;; msys) basic_machine=i686-pc os=-msys ;; mvs) basic_machine=i370-ibm os=-mvs ;; nacl) basic_machine=le32-unknown os=-nacl ;; ncr3000) basic_machine=i486-ncr os=-sysv4 ;; netbsd386) basic_machine=i386-unknown os=-netbsd ;; netwinder) basic_machine=armv4l-rebel os=-linux ;; news | news700 | news800 | news900) basic_machine=m68k-sony os=-newsos ;; news1000) basic_machine=m68030-sony os=-newsos ;; news-3600 | risc-news) basic_machine=mips-sony os=-newsos ;; necv70) basic_machine=v70-nec os=-sysv ;; next | m*-next ) basic_machine=m68k-next case $os in -nextstep* ) ;; -ns2*) os=-nextstep2 ;; *) os=-nextstep3 ;; esac ;; nh3000) basic_machine=m68k-harris os=-cxux ;; nh[45]000) basic_machine=m88k-harris os=-cxux ;; nindy960) basic_machine=i960-intel os=-nindy ;; mon960) basic_machine=i960-intel os=-mon960 ;; nonstopux) basic_machine=mips-compaq os=-nonstopux ;; np1) basic_machine=np1-gould ;; neo-tandem) basic_machine=neo-tandem ;; nse-tandem) basic_machine=nse-tandem ;; nsr-tandem) basic_machine=nsr-tandem ;; op50n-* | op60c-*) basic_machine=hppa1.1-oki os=-proelf ;; openrisc | openrisc-*) basic_machine=or32-unknown ;; os400) basic_machine=powerpc-ibm os=-os400 ;; OSE68000 | ose68000) basic_machine=m68000-ericsson os=-ose ;; os68k) basic_machine=m68k-none os=-os68k ;; pa-hitachi) basic_machine=hppa1.1-hitachi os=-hiuxwe2 ;; paragon) basic_machine=i860-intel os=-osf ;; parisc) basic_machine=hppa-unknown os=-linux ;; parisc-*) basic_machine=hppa-`echo $basic_machine | sed 's/^[^-]*-//'` os=-linux ;; pbd) basic_machine=sparc-tti ;; pbb) basic_machine=m68k-tti ;; pc532 | pc532-*) basic_machine=ns32k-pc532 ;; pc98) basic_machine=i386-pc ;; pc98-*) basic_machine=i386-`echo $basic_machine | sed 's/^[^-]*-//'` ;; pentium | p5 | k5 | k6 | nexgen | viac3) basic_machine=i586-pc ;; pentiumpro | p6 | 6x86 | athlon | athlon_*) basic_machine=i686-pc ;; pentiumii | pentium2 | pentiumiii | pentium3) basic_machine=i686-pc ;; pentium4) basic_machine=i786-pc ;; pentium-* | p5-* | k5-* | k6-* | nexgen-* | viac3-*) basic_machine=i586-`echo $basic_machine | sed 's/^[^-]*-//'` ;; pentiumpro-* | p6-* | 6x86-* | athlon-*) basic_machine=i686-`echo $basic_machine | sed 's/^[^-]*-//'` ;; pentiumii-* | pentium2-* | pentiumiii-* | pentium3-*) basic_machine=i686-`echo $basic_machine | sed 's/^[^-]*-//'` ;; pentium4-*) basic_machine=i786-`echo $basic_machine | sed 's/^[^-]*-//'` ;; pn) basic_machine=pn-gould ;; power) basic_machine=power-ibm ;; ppc | ppcbe) basic_machine=powerpc-unknown ;; ppc-* | ppcbe-*) basic_machine=powerpc-`echo $basic_machine | sed 's/^[^-]*-//'` ;; ppcle | powerpclittle | ppc-le | powerpc-little) basic_machine=powerpcle-unknown ;; ppcle-* | powerpclittle-*) basic_machine=powerpcle-`echo $basic_machine | sed 's/^[^-]*-//'` ;; ppc64) basic_machine=powerpc64-unknown ;; ppc64-*) basic_machine=powerpc64-`echo $basic_machine | sed 's/^[^-]*-//'` ;; ppc64le | powerpc64little | ppc64-le | powerpc64-little) basic_machine=powerpc64le-unknown ;; ppc64le-* | powerpc64little-*) basic_machine=powerpc64le-`echo $basic_machine | sed 's/^[^-]*-//'` ;; ps2) basic_machine=i386-ibm ;; pw32) basic_machine=i586-unknown os=-pw32 ;; rdos | rdos64) basic_machine=x86_64-pc os=-rdos ;; rdos32) basic_machine=i386-pc os=-rdos ;; rom68k) basic_machine=m68k-rom68k os=-coff ;; rm[46]00) basic_machine=mips-siemens ;; rtpc | rtpc-*) basic_machine=romp-ibm ;; s390 | s390-*) basic_machine=s390-ibm ;; s390x | s390x-*) basic_machine=s390x-ibm ;; sa29200) basic_machine=a29k-amd os=-udi ;; sb1) basic_machine=mipsisa64sb1-unknown ;; sb1el) basic_machine=mipsisa64sb1el-unknown ;; sde) basic_machine=mipsisa32-sde os=-elf ;; sei) basic_machine=mips-sei os=-seiux ;; sequent) basic_machine=i386-sequent ;; sh) basic_machine=sh-hitachi os=-hms ;; sh5el) basic_machine=sh5le-unknown ;; sh64) basic_machine=sh64-unknown ;; sparclite-wrs | simso-wrs) basic_machine=sparclite-wrs os=-vxworks ;; sps7) basic_machine=m68k-bull os=-sysv2 ;; spur) basic_machine=spur-unknown ;; st2000) basic_machine=m68k-tandem ;; stratus) basic_machine=i860-stratus os=-sysv4 ;; strongarm-* | thumb-*) basic_machine=arm-`echo $basic_machine | sed 's/^[^-]*-//'` ;; sun2) basic_machine=m68000-sun ;; sun2os3) basic_machine=m68000-sun os=-sunos3 ;; sun2os4) basic_machine=m68000-sun os=-sunos4 ;; sun3os3) basic_machine=m68k-sun os=-sunos3 ;; sun3os4) basic_machine=m68k-sun os=-sunos4 ;; sun4os3) basic_machine=sparc-sun os=-sunos3 ;; sun4os4) basic_machine=sparc-sun os=-sunos4 ;; sun4sol2) basic_machine=sparc-sun os=-solaris2 ;; sun3 | sun3-*) basic_machine=m68k-sun ;; sun4) basic_machine=sparc-sun ;; sun386 | sun386i | roadrunner) basic_machine=i386-sun ;; sv1) basic_machine=sv1-cray os=-unicos ;; symmetry) basic_machine=i386-sequent os=-dynix ;; t3e) basic_machine=alphaev5-cray os=-unicos ;; t90) basic_machine=t90-cray os=-unicos ;; tile*) basic_machine=$basic_machine-unknown os=-linux-gnu ;; tx39) basic_machine=mipstx39-unknown ;; tx39el) basic_machine=mipstx39el-unknown ;; toad1) basic_machine=pdp10-xkl os=-tops20 ;; tower | tower-32) basic_machine=m68k-ncr ;; tpf) basic_machine=s390x-ibm os=-tpf ;; udi29k) basic_machine=a29k-amd os=-udi ;; ultra3) basic_machine=a29k-nyu os=-sym1 ;; v810 | necv810) basic_machine=v810-nec os=-none ;; vaxv) basic_machine=vax-dec os=-sysv ;; vms) basic_machine=vax-dec os=-vms ;; vpp*|vx|vx-*) basic_machine=f301-fujitsu ;; vxworks960) basic_machine=i960-wrs os=-vxworks ;; vxworks68) basic_machine=m68k-wrs os=-vxworks ;; vxworks29k) basic_machine=a29k-wrs os=-vxworks ;; w65*) basic_machine=w65-wdc os=-none ;; w89k-*) basic_machine=hppa1.1-winbond os=-proelf ;; xbox) basic_machine=i686-pc os=-mingw32 ;; xps | xps100) basic_machine=xps100-honeywell ;; xscale-* | xscalee[bl]-*) basic_machine=`echo $basic_machine | sed 's/^xscale/arm/'` ;; ymp) basic_machine=ymp-cray os=-unicos ;; z8k-*-coff) basic_machine=z8k-unknown os=-sim ;; z80-*-coff) basic_machine=z80-unknown os=-sim ;; none) basic_machine=none-none os=-none ;; # Here we handle the default manufacturer of certain CPU types. It is in # some cases the only manufacturer, in others, it is the most popular. w89k) basic_machine=hppa1.1-winbond ;; op50n) basic_machine=hppa1.1-oki ;; op60c) basic_machine=hppa1.1-oki ;; romp) basic_machine=romp-ibm ;; mmix) basic_machine=mmix-knuth ;; rs6000) basic_machine=rs6000-ibm ;; vax) basic_machine=vax-dec ;; pdp10) # there are many clones, so DEC is not a safe bet basic_machine=pdp10-unknown ;; pdp11) basic_machine=pdp11-dec ;; we32k) basic_machine=we32k-att ;; sh[1234] | sh[24]a | sh[24]aeb | sh[34]eb | sh[1234]le | sh[23]ele) basic_machine=sh-unknown ;; sparc | sparcv8 | sparcv9 | sparcv9b | sparcv9v) basic_machine=sparc-sun ;; cydra) basic_machine=cydra-cydrome ;; orion) basic_machine=orion-highlevel ;; orion105) basic_machine=clipper-highlevel ;; mac | mpw | mac-mpw) basic_machine=m68k-apple ;; pmac | pmac-mpw) basic_machine=powerpc-apple ;; *-unknown) # Make sure to match an already-canonicalized machine name. ;; *) echo Invalid configuration \`$1\': machine \`$basic_machine\' not recognized 1>&2 exit 1 ;; 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Hard to guess exactly what SunOS6 will be like, but # it's likely to be more like Solaris than SunOS4. echo sparc-sun-solaris3`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` exit ;; sun4*:SunOS:*:*) case "`/usr/bin/arch -k`" in Series*|S4*) UNAME_RELEASE=`uname -v` ;; esac # Japanese Language versions have a version number like `4.1.3-JL'. echo sparc-sun-sunos`echo ${UNAME_RELEASE}|sed -e 's/-/_/'` exit ;; sun3*:SunOS:*:*) echo m68k-sun-sunos${UNAME_RELEASE} exit ;; sun*:*:4.2BSD:*) UNAME_RELEASE=`(sed 1q /etc/motd | awk '{print substr($5,1,3)}') 2>/dev/null` test "x${UNAME_RELEASE}" = "x" && UNAME_RELEASE=3 case "`/bin/arch`" in sun3) echo m68k-sun-sunos${UNAME_RELEASE} ;; sun4) echo sparc-sun-sunos${UNAME_RELEASE} ;; esac exit ;; aushp:SunOS:*:*) echo sparc-auspex-sunos${UNAME_RELEASE} exit ;; # The situation for MiNT is a little confusing. The machine name # can be virtually everything (everything which is not # "atarist" or "atariste" at least should have a processor # > m68000). The system name ranges from "MiNT" over "FreeMiNT" # to the lowercase version "mint" (or "freemint"). Finally # the system name "TOS" denotes a system which is actually not # MiNT. But MiNT is downward compatible to TOS, so this should # be no problem. atarist[e]:*MiNT:*:* | atarist[e]:*mint:*:* | atarist[e]:*TOS:*:*) echo m68k-atari-mint${UNAME_RELEASE} exit ;; atari*:*MiNT:*:* | atari*:*mint:*:* | atarist[e]:*TOS:*:*) echo m68k-atari-mint${UNAME_RELEASE} exit ;; *falcon*:*MiNT:*:* | *falcon*:*mint:*:* | *falcon*:*TOS:*:*) echo m68k-atari-mint${UNAME_RELEASE} exit ;; milan*:*MiNT:*:* | milan*:*mint:*:* | *milan*:*TOS:*:*) echo m68k-milan-mint${UNAME_RELEASE} exit ;; hades*:*MiNT:*:* | hades*:*mint:*:* | *hades*:*TOS:*:*) echo m68k-hades-mint${UNAME_RELEASE} exit ;; *:*MiNT:*:* | *:*mint:*:* | *:*TOS:*:*) echo m68k-unknown-mint${UNAME_RELEASE} exit ;; m68k:machten:*:*) echo m68k-apple-machten${UNAME_RELEASE} exit ;; powerpc:machten:*:*) echo powerpc-apple-machten${UNAME_RELEASE} exit ;; RISC*:Mach:*:*) echo mips-dec-mach_bsd4.3 exit ;; RISC*:ULTRIX:*:*) echo mips-dec-ultrix${UNAME_RELEASE} exit ;; VAX*:ULTRIX*:*:*) echo vax-dec-ultrix${UNAME_RELEASE} exit ;; 2020:CLIX:*:* | 2430:CLIX:*:*) echo clipper-intergraph-clix${UNAME_RELEASE} exit ;; mips:*:*:UMIPS | mips:*:*:RISCos) eval $set_cc_for_build sed 's/^ //' << EOF >$dummy.c #ifdef __cplusplus #include /* for printf() prototype */ int main (int argc, char *argv[]) { #else int main (argc, argv) int argc; char *argv[]; { #endif #if defined (host_mips) && defined (MIPSEB) #if defined (SYSTYPE_SYSV) printf ("mips-mips-riscos%ssysv\n", argv[1]); exit (0); #endif #if defined (SYSTYPE_SVR4) printf ("mips-mips-riscos%ssvr4\n", argv[1]); exit (0); #endif #if defined (SYSTYPE_BSD43) || defined(SYSTYPE_BSD) printf ("mips-mips-riscos%sbsd\n", argv[1]); exit (0); #endif #endif exit (-1); } EOF $CC_FOR_BUILD -o $dummy $dummy.c && dummyarg=`echo "${UNAME_RELEASE}" | sed -n 's/\([0-9]*\).*/\1/p'` && SYSTEM_NAME=`$dummy $dummyarg` && { echo "$SYSTEM_NAME"; exit; } echo mips-mips-riscos${UNAME_RELEASE} exit ;; Motorola:PowerMAX_OS:*:*) echo powerpc-motorola-powermax exit ;; Motorola:*:4.3:PL8-*) echo powerpc-harris-powermax exit ;; Night_Hawk:*:*:PowerMAX_OS | Synergy:PowerMAX_OS:*:*) echo powerpc-harris-powermax exit ;; Night_Hawk:Power_UNIX:*:*) echo powerpc-harris-powerunix exit ;; m88k:CX/UX:7*:*) echo m88k-harris-cxux7 exit ;; m88k:*:4*:R4*) echo m88k-motorola-sysv4 exit ;; m88k:*:3*:R3*) echo m88k-motorola-sysv3 exit ;; AViiON:dgux:*:*) # DG/UX returns AViiON for all architectures UNAME_PROCESSOR=`/usr/bin/uname -p` if [ $UNAME_PROCESSOR = mc88100 ] || [ $UNAME_PROCESSOR = mc88110 ] then if [ ${TARGET_BINARY_INTERFACE}x = m88kdguxelfx ] || \ [ ${TARGET_BINARY_INTERFACE}x = x ] then echo m88k-dg-dgux${UNAME_RELEASE} else echo m88k-dg-dguxbcs${UNAME_RELEASE} fi else echo i586-dg-dgux${UNAME_RELEASE} fi exit ;; M88*:DolphinOS:*:*) # DolphinOS (SVR3) echo m88k-dolphin-sysv3 exit ;; M88*:*:R3*:*) # Delta 88k system running SVR3 echo m88k-motorola-sysv3 exit ;; XD88*:*:*:*) # Tektronix XD88 system running UTekV (SVR3) echo m88k-tektronix-sysv3 exit ;; Tek43[0-9][0-9]:UTek:*:*) # Tektronix 4300 system running UTek (BSD) echo m68k-tektronix-bsd exit ;; *:IRIX*:*:*) echo mips-sgi-irix`echo ${UNAME_RELEASE}|sed -e 's/-/_/g'` exit ;; ????????:AIX?:[12].1:2) # AIX 2.2.1 or AIX 2.1.1 is RT/PC AIX. echo romp-ibm-aix # uname -m gives an 8 hex-code CPU id exit ;; # Note that: echo "'`uname -s`'" gives 'AIX ' i*86:AIX:*:*) echo i386-ibm-aix exit ;; ia64:AIX:*:*) if [ -x /usr/bin/oslevel ] ; then IBM_REV=`/usr/bin/oslevel` else IBM_REV=${UNAME_VERSION}.${UNAME_RELEASE} fi echo ${UNAME_MACHINE}-ibm-aix${IBM_REV} exit ;; *:AIX:2:3) if grep bos325 /usr/include/stdio.h >/dev/null 2>&1; then eval $set_cc_for_build sed 's/^ //' << EOF >$dummy.c #include main() { if (!__power_pc()) exit(1); puts("powerpc-ibm-aix3.2.5"); exit(0); } EOF if $CC_FOR_BUILD -o $dummy $dummy.c && SYSTEM_NAME=`$dummy` then echo "$SYSTEM_NAME" else echo rs6000-ibm-aix3.2.5 fi elif grep bos324 /usr/include/stdio.h >/dev/null 2>&1; then echo rs6000-ibm-aix3.2.4 else echo rs6000-ibm-aix3.2 fi exit ;; *:AIX:*:[4567]) IBM_CPU_ID=`/usr/sbin/lsdev -C -c processor -S available | sed 1q | awk '{ print $1 }'` if /usr/sbin/lsattr -El ${IBM_CPU_ID} | grep ' POWER' >/dev/null 2>&1; then IBM_ARCH=rs6000 else IBM_ARCH=powerpc fi if [ -x /usr/bin/lslpp ] ; then IBM_REV=`/usr/bin/lslpp -Lqc bos.rte.libc | awk -F: '{ print $3 }' | sed s/[0-9]*$/0/` else IBM_REV=${UNAME_VERSION}.${UNAME_RELEASE} fi echo ${IBM_ARCH}-ibm-aix${IBM_REV} exit ;; *:AIX:*:*) echo rs6000-ibm-aix exit ;; ibmrt:4.4BSD:*|romp-ibm:BSD:*) echo romp-ibm-bsd4.4 exit ;; ibmrt:*BSD:*|romp-ibm:BSD:*) # covers RT/PC BSD and echo romp-ibm-bsd${UNAME_RELEASE} # 4.3 with uname added to exit ;; # report: romp-ibm BSD 4.3 *:BOSX:*:*) echo rs6000-bull-bosx exit ;; DPX/2?00:B.O.S.:*:*) echo m68k-bull-sysv3 exit ;; 9000/[34]??:4.3bsd:1.*:*) echo m68k-hp-bsd exit ;; hp300:4.4BSD:*:* | 9000/[34]??:4.3bsd:2.*:*) echo m68k-hp-bsd4.4 exit ;; 9000/[34678]??:HP-UX:*:*) HPUX_REV=`echo ${UNAME_RELEASE}|sed -e 's/[^.]*.[0B]*//'` case "${UNAME_MACHINE}" in 9000/31? ) HP_ARCH=m68000 ;; 9000/[34]?? ) HP_ARCH=m68k ;; 9000/[678][0-9][0-9]) if [ -x /usr/bin/getconf ]; then sc_cpu_version=`/usr/bin/getconf SC_CPU_VERSION 2>/dev/null` sc_kernel_bits=`/usr/bin/getconf SC_KERNEL_BITS 2>/dev/null` case "${sc_cpu_version}" in 523) HP_ARCH="hppa1.0" ;; # CPU_PA_RISC1_0 528) HP_ARCH="hppa1.1" ;; # CPU_PA_RISC1_1 532) # CPU_PA_RISC2_0 case "${sc_kernel_bits}" in 32) HP_ARCH="hppa2.0n" ;; 64) HP_ARCH="hppa2.0w" ;; '') HP_ARCH="hppa2.0" ;; # HP-UX 10.20 esac ;; esac fi if [ "${HP_ARCH}" = "" ]; then eval $set_cc_for_build sed 's/^ //' << EOF >$dummy.c #define _HPUX_SOURCE #include #include int main () { #if defined(_SC_KERNEL_BITS) long bits = sysconf(_SC_KERNEL_BITS); #endif long cpu = sysconf (_SC_CPU_VERSION); switch (cpu) { case CPU_PA_RISC1_0: puts ("hppa1.0"); break; case CPU_PA_RISC1_1: puts ("hppa1.1"); break; case CPU_PA_RISC2_0: #if defined(_SC_KERNEL_BITS) switch (bits) { case 64: puts ("hppa2.0w"); break; case 32: puts ("hppa2.0n"); break; default: puts ("hppa2.0"); break; } break; #else /* !defined(_SC_KERNEL_BITS) */ puts ("hppa2.0"); break; #endif default: puts ("hppa1.0"); break; } exit (0); } EOF (CCOPTS= $CC_FOR_BUILD -o $dummy $dummy.c 2>/dev/null) && HP_ARCH=`$dummy` test -z "$HP_ARCH" && HP_ARCH=hppa fi ;; esac if [ ${HP_ARCH} = "hppa2.0w" ] then eval $set_cc_for_build # hppa2.0w-hp-hpux* has a 64-bit kernel and a compiler generating # 32-bit code. hppa64-hp-hpux* has the same kernel and a compiler # generating 64-bit code. GNU and HP use different nomenclature: # # $ CC_FOR_BUILD=cc ./config.guess # => hppa2.0w-hp-hpux11.23 # $ CC_FOR_BUILD="cc +DA2.0w" ./config.guess # => hppa64-hp-hpux11.23 if echo __LP64__ | (CCOPTS= $CC_FOR_BUILD -E - 2>/dev/null) | grep -q __LP64__ then HP_ARCH="hppa2.0w" else HP_ARCH="hppa64" fi fi echo ${HP_ARCH}-hp-hpux${HPUX_REV} exit ;; ia64:HP-UX:*:*) HPUX_REV=`echo ${UNAME_RELEASE}|sed -e 's/[^.]*.[0B]*//'` echo ia64-hp-hpux${HPUX_REV} exit ;; 3050*:HI-UX:*:*) eval $set_cc_for_build sed 's/^ //' << EOF >$dummy.c #include int main () { long cpu = sysconf (_SC_CPU_VERSION); /* The order matters, because CPU_IS_HP_MC68K erroneously returns true for CPU_PA_RISC1_0. CPU_IS_PA_RISC returns correct results, however. */ if (CPU_IS_PA_RISC (cpu)) { switch (cpu) { case CPU_PA_RISC1_0: puts ("hppa1.0-hitachi-hiuxwe2"); break; case CPU_PA_RISC1_1: puts ("hppa1.1-hitachi-hiuxwe2"); break; case CPU_PA_RISC2_0: puts ("hppa2.0-hitachi-hiuxwe2"); break; default: puts ("hppa-hitachi-hiuxwe2"); break; } } else if (CPU_IS_HP_MC68K (cpu)) puts ("m68k-hitachi-hiuxwe2"); else puts ("unknown-hitachi-hiuxwe2"); exit (0); } EOF $CC_FOR_BUILD -o $dummy $dummy.c && SYSTEM_NAME=`$dummy` && { echo "$SYSTEM_NAME"; exit; } echo unknown-hitachi-hiuxwe2 exit ;; 9000/7??:4.3bsd:*:* | 9000/8?[79]:4.3bsd:*:* ) echo hppa1.1-hp-bsd exit ;; 9000/8??:4.3bsd:*:*) echo hppa1.0-hp-bsd exit ;; *9??*:MPE/iX:*:* | *3000*:MPE/iX:*:*) echo hppa1.0-hp-mpeix exit ;; hp7??:OSF1:*:* | hp8?[79]:OSF1:*:* ) echo hppa1.1-hp-osf exit ;; hp8??:OSF1:*:*) echo hppa1.0-hp-osf exit ;; i*86:OSF1:*:*) if [ -x /usr/sbin/sysversion ] ; then echo ${UNAME_MACHINE}-unknown-osf1mk else echo ${UNAME_MACHINE}-unknown-osf1 fi exit ;; parisc*:Lites*:*:*) echo hppa1.1-hp-lites exit ;; C1*:ConvexOS:*:* | convex:ConvexOS:C1*:*) echo c1-convex-bsd exit ;; C2*:ConvexOS:*:* | convex:ConvexOS:C2*:*) if getsysinfo -f scalar_acc then echo c32-convex-bsd else echo c2-convex-bsd fi exit ;; C34*:ConvexOS:*:* | convex:ConvexOS:C34*:*) echo c34-convex-bsd exit ;; C38*:ConvexOS:*:* | convex:ConvexOS:C38*:*) echo c38-convex-bsd exit ;; C4*:ConvexOS:*:* | convex:ConvexOS:C4*:*) echo c4-convex-bsd exit ;; CRAY*Y-MP:*:*:*) echo ymp-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' exit ;; CRAY*[A-Z]90:*:*:*) echo ${UNAME_MACHINE}-cray-unicos${UNAME_RELEASE} \ | sed -e 's/CRAY.*\([A-Z]90\)/\1/' \ -e y/ABCDEFGHIJKLMNOPQRSTUVWXYZ/abcdefghijklmnopqrstuvwxyz/ \ -e 's/\.[^.]*$/.X/' exit ;; CRAY*TS:*:*:*) echo t90-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' exit ;; CRAY*T3E:*:*:*) echo alphaev5-cray-unicosmk${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' exit ;; CRAY*SV1:*:*:*) echo sv1-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' exit ;; *:UNICOS/mp:*:*) echo craynv-cray-unicosmp${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' exit ;; F30[01]:UNIX_System_V:*:* | F700:UNIX_System_V:*:*) FUJITSU_PROC=`uname -m | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz'` FUJITSU_SYS=`uname -p | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/\///'` FUJITSU_REL=`echo ${UNAME_RELEASE} | sed -e 's/ /_/'` echo "${FUJITSU_PROC}-fujitsu-${FUJITSU_SYS}${FUJITSU_REL}" exit ;; 5000:UNIX_System_V:4.*:*) FUJITSU_SYS=`uname -p | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/\///'` FUJITSU_REL=`echo ${UNAME_RELEASE} | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/ /_/'` echo "sparc-fujitsu-${FUJITSU_SYS}${FUJITSU_REL}" exit ;; i*86:BSD/386:*:* | i*86:BSD/OS:*:* | *:Ascend\ Embedded/OS:*:*) echo ${UNAME_MACHINE}-pc-bsdi${UNAME_RELEASE} exit ;; sparc*:BSD/OS:*:*) echo sparc-unknown-bsdi${UNAME_RELEASE} exit ;; *:BSD/OS:*:*) echo ${UNAME_MACHINE}-unknown-bsdi${UNAME_RELEASE} exit ;; *:FreeBSD:*:*) UNAME_PROCESSOR=`/usr/bin/uname -p` case ${UNAME_PROCESSOR} in amd64) echo x86_64-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` ;; *) echo ${UNAME_PROCESSOR}-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` ;; esac exit ;; i*:CYGWIN*:*) echo ${UNAME_MACHINE}-pc-cygwin exit ;; *:MINGW64*:*) echo ${UNAME_MACHINE}-pc-mingw64 exit ;; *:MINGW*:*) echo ${UNAME_MACHINE}-pc-mingw32 exit ;; *:MSYS*:*) echo ${UNAME_MACHINE}-pc-msys exit ;; i*:windows32*:*) # uname -m includes "-pc" on this system. echo ${UNAME_MACHINE}-mingw32 exit ;; i*:PW*:*) echo ${UNAME_MACHINE}-pc-pw32 exit ;; *:Interix*:*) case ${UNAME_MACHINE} in x86) echo i586-pc-interix${UNAME_RELEASE} exit ;; authenticamd | genuineintel | EM64T) echo x86_64-unknown-interix${UNAME_RELEASE} exit ;; IA64) echo ia64-unknown-interix${UNAME_RELEASE} exit ;; esac ;; [345]86:Windows_95:* | [345]86:Windows_98:* | [345]86:Windows_NT:*) echo i${UNAME_MACHINE}-pc-mks exit ;; 8664:Windows_NT:*) echo x86_64-pc-mks exit ;; i*:Windows_NT*:* | Pentium*:Windows_NT*:*) # How do we know it's Interix rather than the generic POSIX subsystem? # It also conflicts with pre-2.0 versions of AT&T UWIN. Should we # UNAME_MACHINE based on the output of uname instead of i386? echo i586-pc-interix exit ;; i*:UWIN*:*) echo ${UNAME_MACHINE}-pc-uwin exit ;; amd64:CYGWIN*:*:* | x86_64:CYGWIN*:*:*) echo x86_64-unknown-cygwin exit ;; p*:CYGWIN*:*) echo powerpcle-unknown-cygwin exit ;; prep*:SunOS:5.*:*) echo powerpcle-unknown-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` exit ;; *:GNU:*:*) # the GNU system echo `echo ${UNAME_MACHINE}|sed -e 's,[-/].*$,,'`-unknown-${LIBC}`echo ${UNAME_RELEASE}|sed -e 's,/.*$,,'` exit ;; *:GNU/*:*:*) # other systems with GNU libc and userland echo ${UNAME_MACHINE}-unknown-`echo ${UNAME_SYSTEM} | sed 's,^[^/]*/,,' | tr '[A-Z]' '[a-z]'``echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'`-${LIBC} exit ;; i*86:Minix:*:*) echo ${UNAME_MACHINE}-pc-minix exit ;; aarch64:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; aarch64_be:Linux:*:*) UNAME_MACHINE=aarch64_be echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; alpha:Linux:*:*) case `sed -n '/^cpu model/s/^.*: \(.*\)/\1/p' < /proc/cpuinfo` in EV5) UNAME_MACHINE=alphaev5 ;; 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This # helps a lot in preventing typo-related bugs. set -u usage_error () { echo "$0: $*" >&2 print_usage >&2 exit 2 } print_usage () { cat <$log_file 2>&1 estatus=$? if test $enable_hard_errors = no && test $estatus -eq 99; then tweaked_estatus=1 else tweaked_estatus=$estatus fi case $tweaked_estatus:$expect_failure in 0:yes) col=$red res=XPASS recheck=yes gcopy=yes;; 0:*) col=$grn res=PASS recheck=no gcopy=no;; 77:*) col=$blu res=SKIP recheck=no gcopy=yes;; 99:*) col=$mgn res=ERROR recheck=yes gcopy=yes;; *:yes) col=$lgn res=XFAIL recheck=no gcopy=yes;; *:*) col=$red res=FAIL recheck=yes gcopy=yes;; esac # Report the test outcome and exit status in the logs, so that one can # know whether the test passed or failed simply by looking at the '.log' # file, without the need of also peaking into the corresponding '.trs' # file (automake bug#11814). echo "$res $test_name (exit status: $estatus)" >>$log_file # Report outcome to console. echo "${col}${res}${std}: $test_name" # Register the test result, and other relevant metadata. echo ":test-result: $res" > $trs_file echo ":global-test-result: $res" >> $trs_file echo ":recheck: $recheck" >> $trs_file echo ":copy-in-global-log: $gcopy" >> $trs_file # Local Variables: # mode: shell-script # sh-indentation: 2 # eval: (add-hook 'write-file-hooks 'time-stamp) # time-stamp-start: "scriptversion=" # time-stamp-format: "%:y-%02m-%02d.%02H" # time-stamp-time-zone: "UTC" # time-stamp-end: "; # UTC" # End: intel-gpu-tools-1.14/build-aux/depcomp0000755000175000017500000005601612665336443014715 00000000000000#! /bin/sh # depcomp - compile a program generating dependencies as side-effects scriptversion=2013-05-30.07; # UTC # Copyright (C) 1999-2014 Free Software Foundation, Inc. # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2, or (at your option) # any later version. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # You should have received a copy of the GNU General Public License # along with this program. If not, see . # As a special exception to the GNU General Public License, if you # distribute this file as part of a program that contains a # configuration script generated by Autoconf, you may include it under # the same distribution terms that you use for the rest of that program. # Originally written by Alexandre Oliva . case $1 in '') echo "$0: No command. Try '$0 --help' for more information." 1>&2 exit 1; ;; -h | --h*) cat <<\EOF Usage: depcomp [--help] [--version] PROGRAM [ARGS] Run PROGRAMS ARGS to compile a file, generating dependencies as side-effects. Environment variables: depmode Dependency tracking mode. source Source file read by 'PROGRAMS ARGS'. object Object file output by 'PROGRAMS ARGS'. DEPDIR directory where to store dependencies. depfile Dependency file to output. tmpdepfile Temporary file to use when outputting dependencies. libtool Whether libtool is used (yes/no). Report bugs to . EOF exit $? ;; -v | --v*) echo "depcomp $scriptversion" exit $? ;; esac # Get the directory component of the given path, and save it in the # global variables '$dir'. Note that this directory component will # be either empty or ending with a '/' character. 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We # parameterize here, but still list the modes in the big case below, # to make depend.m4 easier to write. Note that we *cannot* use a case # here, because this file can only contain one case statement. if test "$depmode" = hp; then # HP compiler uses -M and no extra arg. gccflag=-M depmode=gcc fi if test "$depmode" = dashXmstdout; then # This is just like dashmstdout with a different argument. dashmflag=-xM depmode=dashmstdout fi cygpath_u="cygpath -u -f -" if test "$depmode" = msvcmsys; then # This is just like msvisualcpp but w/o cygpath translation. # Just convert the backslash-escaped backslashes to single forward # slashes to satisfy depend.m4 cygpath_u='sed s,\\\\,/,g' depmode=msvisualcpp fi if test "$depmode" = msvc7msys; then # This is just like msvc7 but w/o cygpath translation. # Just convert the backslash-escaped backslashes to single forward # slashes to satisfy depend.m4 cygpath_u='sed s,\\\\,/,g' depmode=msvc7 fi if test "$depmode" = xlc; then # IBM C/C++ Compilers xlc/xlC can output gcc-like dependency information. gccflag=-qmakedep=gcc,-MF depmode=gcc fi case "$depmode" in gcc3) ## gcc 3 implements dependency tracking that does exactly what ## we want. Yay! Note: for some reason libtool 1.4 doesn't like ## it if -MD -MP comes after the -MF stuff. Hmm. ## Unfortunately, FreeBSD c89 acceptance of flags depends upon ## the command line argument order; so add the flags where they ## appear in depend2.am. Note that the slowdown incurred here ## affects only configure: in makefiles, %FASTDEP% shortcuts this. for arg do case $arg in -c) set fnord "$@" -MT "$object" -MD -MP -MF "$tmpdepfile" "$arg" ;; *) set fnord "$@" "$arg" ;; esac shift # fnord shift # $arg done "$@" stat=$? if test $stat -ne 0; then rm -f "$tmpdepfile" exit $stat fi mv "$tmpdepfile" "$depfile" ;; gcc) ## Note that this doesn't just cater to obsosete pre-3.x GCC compilers. ## but also to in-use compilers like IMB xlc/xlC and the HP C compiler. ## (see the conditional assignment to $gccflag above). ## There are various ways to get dependency output from gcc. Here's ## why we pick this rather obscure method: ## - Don't want to use -MD because we'd like the dependencies to end ## up in a subdir. Having to rename by hand is ugly. ## (We might end up doing this anyway to support other compilers.) ## - The DEPENDENCIES_OUTPUT environment variable makes gcc act like ## -MM, not -M (despite what the docs say). Also, it might not be ## supported by the other compilers which use the 'gcc' depmode. ## - Using -M directly means running the compiler twice (even worse ## than renaming). if test -z "$gccflag"; then gccflag=-MD, fi "$@" -Wp,"$gccflag$tmpdepfile" stat=$? if test $stat -ne 0; then rm -f "$tmpdepfile" exit $stat fi rm -f "$depfile" echo "$object : \\" > "$depfile" # The second -e expression handles DOS-style file names with drive # letters. sed -e 's/^[^:]*: / /' \ -e 's/^['$alpha']:\/[^:]*: / /' < "$tmpdepfile" >> "$depfile" ## This next piece of magic avoids the "deleted header file" problem. ## The problem is that when a header file which appears in a .P file ## is deleted, the dependency causes make to die (because there is ## typically no way to rebuild the header). We avoid this by adding ## dummy dependencies for each header file. Too bad gcc doesn't do ## this for us directly. ## Some versions of gcc put a space before the ':'. On the theory ## that the space means something, we add a space to the output as ## well. hp depmode also adds that space, but also prefixes the VPATH ## to the object. Take care to not repeat it in the output. ## Some versions of the HPUX 10.20 sed can't process this invocation ## correctly. Breaking it into two sed invocations is a workaround. tr ' ' "$nl" < "$tmpdepfile" \ | sed -e 's/^\\$//' -e '/^$/d' -e "s|.*$object$||" -e '/:$/d' \ | sed -e 's/$/ :/' >> "$depfile" rm -f "$tmpdepfile" ;; hp) # This case exists only to let depend.m4 do its work. It works by # looking at the text of this script. This case will never be run, # since it is checked for above. exit 1 ;; sgi) if test "$libtool" = yes; then "$@" "-Wp,-MDupdate,$tmpdepfile" else "$@" -MDupdate "$tmpdepfile" fi stat=$? if test $stat -ne 0; then rm -f "$tmpdepfile" exit $stat fi rm -f "$depfile" if test -f "$tmpdepfile"; then # yes, the sourcefile depend on other files echo "$object : \\" > "$depfile" # Clip off the initial element (the dependent). Don't try to be # clever and replace this with sed code, as IRIX sed won't handle # lines with more than a fixed number of characters (4096 in # IRIX 6.2 sed, 8192 in IRIX 6.5). We also remove comment lines; # the IRIX cc adds comments like '#:fec' to the end of the # dependency line. tr ' ' "$nl" < "$tmpdepfile" \ | sed -e 's/^.*\.o://' -e 's/#.*$//' -e '/^$/ d' \ | tr "$nl" ' ' >> "$depfile" echo >> "$depfile" # The second pass generates a dummy entry for each header file. tr ' ' "$nl" < "$tmpdepfile" \ | sed -e 's/^.*\.o://' -e 's/#.*$//' -e '/^$/ d' -e 's/$/:/' \ >> "$depfile" else make_dummy_depfile fi rm -f "$tmpdepfile" ;; xlc) # This case exists only to let depend.m4 do its work. It works by # looking at the text of this script. This case will never be run, # since it is checked for above. exit 1 ;; aix) # The C for AIX Compiler uses -M and outputs the dependencies # in a .u file. In older versions, this file always lives in the # current directory. Also, the AIX compiler puts '$object:' at the # start of each line; $object doesn't have directory information. # Version 6 uses the directory in both cases. set_dir_from "$object" set_base_from "$object" if test "$libtool" = yes; then tmpdepfile1=$dir$base.u tmpdepfile2=$base.u tmpdepfile3=$dir.libs/$base.u "$@" -Wc,-M else tmpdepfile1=$dir$base.u tmpdepfile2=$dir$base.u tmpdepfile3=$dir$base.u "$@" -M fi stat=$? if test $stat -ne 0; then rm -f "$tmpdepfile1" "$tmpdepfile2" "$tmpdepfile3" exit $stat fi for tmpdepfile in "$tmpdepfile1" "$tmpdepfile2" "$tmpdepfile3" do test -f "$tmpdepfile" && break done aix_post_process_depfile ;; tcc) # tcc (Tiny C Compiler) understand '-MD -MF file' since version 0.9.26 # FIXME: That version still under development at the moment of writing. # Make that this statement remains true also for stable, released # versions. # It will wrap lines (doesn't matter whether long or short) with a # trailing '\', as in: # # foo.o : \ # foo.c \ # foo.h \ # # It will put a trailing '\' even on the last line, and will use leading # spaces rather than leading tabs (at least since its commit 0394caf7 # "Emit spaces for -MD"). "$@" -MD -MF "$tmpdepfile" stat=$? if test $stat -ne 0; then rm -f "$tmpdepfile" exit $stat fi rm -f "$depfile" # Each non-empty line is of the form 'foo.o : \' or ' dep.h \'. # We have to change lines of the first kind to '$object: \'. sed -e "s|.*:|$object :|" < "$tmpdepfile" > "$depfile" # And for each line of the second kind, we have to emit a 'dep.h:' # dummy dependency, to avoid the deleted-header problem. sed -n -e 's|^ *\(.*\) *\\$|\1:|p' < "$tmpdepfile" >> "$depfile" rm -f "$tmpdepfile" ;; ## The order of this option in the case statement is important, since the ## shell code in configure will try each of these formats in the order ## listed in this file. A plain '-MD' option would be understood by many ## compilers, so we must ensure this comes after the gcc and icc options. pgcc) # Portland's C compiler understands '-MD'. # Will always output deps to 'file.d' where file is the root name of the # source file under compilation, even if file resides in a subdirectory. # The object file name does not affect the name of the '.d' file. # pgcc 10.2 will output # foo.o: sub/foo.c sub/foo.h # and will wrap long lines using '\' : # foo.o: sub/foo.c ... \ # sub/foo.h ... \ # ... set_dir_from "$object" # Use the source, not the object, to determine the base name, since # that's sadly what pgcc will do too. set_base_from "$source" tmpdepfile=$base.d # For projects that build the same source file twice into different object # files, the pgcc approach of using the *source* file root name can cause # problems in parallel builds. Use a locking strategy to avoid stomping on # the same $tmpdepfile. lockdir=$base.d-lock trap " echo '$0: caught signal, cleaning up...' >&2 rmdir '$lockdir' exit 1 " 1 2 13 15 numtries=100 i=$numtries while test $i -gt 0; do # mkdir is a portable test-and-set. if mkdir "$lockdir" 2>/dev/null; then # This process acquired the lock. "$@" -MD stat=$? # Release the lock. rmdir "$lockdir" break else # If the lock is being held by a different process, wait # until the winning process is done or we timeout. while test -d "$lockdir" && test $i -gt 0; do sleep 1 i=`expr $i - 1` done fi i=`expr $i - 1` done trap - 1 2 13 15 if test $i -le 0; then echo "$0: failed to acquire lock after $numtries attempts" >&2 echo "$0: check lockdir '$lockdir'" >&2 exit 1 fi if test $stat -ne 0; then rm -f "$tmpdepfile" exit $stat fi rm -f "$depfile" # Each line is of the form `foo.o: dependent.h', # or `foo.o: dep1.h dep2.h \', or ` dep3.h dep4.h \'. # Do two passes, one to just change these to # `$object: dependent.h' and one to simply `dependent.h:'. sed "s,^[^:]*:,$object :," < "$tmpdepfile" > "$depfile" # Some versions of the HPUX 10.20 sed can't process this invocation # correctly. Breaking it into two sed invocations is a workaround. sed 's,^[^:]*: \(.*\)$,\1,;s/^\\$//;/^$/d;/:$/d' < "$tmpdepfile" \ | sed -e 's/$/ :/' >> "$depfile" rm -f "$tmpdepfile" ;; hp2) # The "hp" stanza above does not work with aCC (C++) and HP's ia64 # compilers, which have integrated preprocessors. The correct option # to use with these is +Maked; it writes dependencies to a file named # 'foo.d', which lands next to the object file, wherever that # happens to be. # Much of this is similar to the tru64 case; see comments there. set_dir_from "$object" set_base_from "$object" if test "$libtool" = yes; then tmpdepfile1=$dir$base.d tmpdepfile2=$dir.libs/$base.d "$@" -Wc,+Maked else tmpdepfile1=$dir$base.d tmpdepfile2=$dir$base.d "$@" +Maked fi stat=$? if test $stat -ne 0; then rm -f "$tmpdepfile1" "$tmpdepfile2" exit $stat fi for tmpdepfile in "$tmpdepfile1" "$tmpdepfile2" do test -f "$tmpdepfile" && break done if test -f "$tmpdepfile"; then sed -e "s,^.*\.[$lower]*:,$object:," "$tmpdepfile" > "$depfile" # Add 'dependent.h:' lines. sed -ne '2,${ s/^ *// s/ \\*$// s/$/:/ p }' "$tmpdepfile" >> "$depfile" else make_dummy_depfile fi rm -f "$tmpdepfile" "$tmpdepfile2" ;; tru64) # The Tru64 compiler uses -MD to generate dependencies as a side # effect. 'cc -MD -o foo.o ...' puts the dependencies into 'foo.o.d'. # At least on Alpha/Redhat 6.1, Compaq CCC V6.2-504 seems to put # dependencies in 'foo.d' instead, so we check for that too. # Subdirectories are respected. set_dir_from "$object" set_base_from "$object" if test "$libtool" = yes; then # Libtool generates 2 separate objects for the 2 libraries. These # two compilations output dependencies in $dir.libs/$base.o.d and # in $dir$base.o.d. We have to check for both files, because # one of the two compilations can be disabled. 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This case will never be run, # since it is checked for above. exit 1 ;; #nosideeffect) # This comment above is used by automake to tell side-effect # dependency tracking mechanisms from slower ones. dashmstdout) # Important note: in order to support this mode, a compiler *must* # always write the preprocessed file to stdout, regardless of -o. "$@" || exit $? # Remove the call to Libtool. if test "$libtool" = yes; then while test "X$1" != 'X--mode=compile'; do shift done shift fi # Remove '-o $object'. IFS=" " for arg do case $arg in -o) shift ;; $object) shift ;; *) set fnord "$@" "$arg" shift # fnord shift # $arg ;; esac done test -z "$dashmflag" && dashmflag=-M # Require at least two characters before searching for ':' # in the target name. This is to cope with DOS-style filenames: # a dependency such as 'c:/foo/bar' could be seen as target 'c' otherwise. "$@" $dashmflag | sed "s|^[$tab ]*[^:$tab ][^:][^:]*:[$tab ]*|$object: |" > "$tmpdepfile" rm -f "$depfile" cat < "$tmpdepfile" > "$depfile" # Some versions of the HPUX 10.20 sed can't process this sed invocation # correctly. Breaking it into two sed invocations is a workaround. tr ' ' "$nl" < "$tmpdepfile" \ | sed -e 's/^\\$//' -e '/^$/d' -e '/:$/d' \ | sed -e 's/$/ :/' >> "$depfile" rm -f "$tmpdepfile" ;; dashXmstdout) # This case only exists to satisfy depend.m4. It is never actually # run, as this mode is specially recognized in the preamble. exit 1 ;; makedepend) "$@" || exit $? # Remove any Libtool call if test "$libtool" = yes; then while test "X$1" != 'X--mode=compile'; do shift done shift fi # X makedepend shift cleared=no eat=no for arg do case $cleared in no) set ""; shift cleared=yes ;; esac if test $eat = yes; then eat=no continue fi case "$arg" in -D*|-I*) set fnord "$@" "$arg"; shift ;; # Strip any option that makedepend may not understand. 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"$@" || exit $? # Remove the call to Libtool. if test "$libtool" = yes; then while test "X$1" != 'X--mode=compile'; do shift done shift fi # Remove '-o $object'. IFS=" " for arg do case $arg in -o) shift ;; $object) shift ;; *) set fnord "$@" "$arg" shift # fnord shift # $arg ;; esac done "$@" -E \ | sed -n -e '/^# [0-9][0-9]* "\([^"]*\)".*/ s:: \1 \\:p' \ -e '/^#line [0-9][0-9]* "\([^"]*\)".*/ s:: \1 \\:p' \ | sed '$ s: \\$::' > "$tmpdepfile" rm -f "$depfile" echo "$object : \\" > "$depfile" cat < "$tmpdepfile" >> "$depfile" sed < "$tmpdepfile" '/^$/d;s/^ //;s/ \\$//;s/$/ :/' >> "$depfile" rm -f "$tmpdepfile" ;; msvisualcpp) # Important note: in order to support this mode, a compiler *must* # always write the preprocessed file to stdout. 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See the GNU # General Public License for more details. # You should have received a copy of the GNU General Public License # along with this program. If not, see . # Please report bugs or propose patches to gary@gnu.org. ## ------ ## ## Usage. ## ## ------ ## # Evaluate this file near the top of your script to gain access to # the functions and variables defined here: # # . `echo "$0" | ${SED-sed} 's|[^/]*$||'`/build-aux/funclib.sh # # If you need to override any of the default environment variable # settings, do that before evaluating this file. ## -------------------- ## ## Shell normalisation. ## ## -------------------- ## # Some shells need a little help to be as Bourne compatible as possible. # Before doing anything else, make sure all that help has been provided! DUALCASE=1; export DUALCASE # for MKS sh if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then : emulate sh NULLCMD=: # Pre-4.2 versions of Zsh do word splitting on ${1+"$@"}, which # is contrary to our usage. Disable this feature. alias -g '${1+"$@"}'='"$@"' setopt NO_GLOB_SUBST else case `(set -o) 2>/dev/null` in *posix*) set -o posix ;; esac fi # NLS nuisances: We save the old values in case they are required later. _G_user_locale= _G_safe_locale= for _G_var in LANG LANGUAGE LC_ALL LC_CTYPE LC_COLLATE LC_MESSAGES do eval "if test set = \"\${$_G_var+set}\"; then save_$_G_var=\$$_G_var $_G_var=C export $_G_var _G_user_locale=\"$_G_var=\\\$save_\$_G_var; \$_G_user_locale\" _G_safe_locale=\"$_G_var=C; \$_G_safe_locale\" fi" done # CDPATH. (unset CDPATH) >/dev/null 2>&1 && unset CDPATH # Make sure IFS has a sensible default sp=' ' nl=' ' IFS="$sp $nl" # There are apparently some retarded systems that use ';' as a PATH separator! if test "${PATH_SEPARATOR+set}" != set; then PATH_SEPARATOR=: (PATH='/bin;/bin'; FPATH=$PATH; sh -c :) >/dev/null 2>&1 && { (PATH='/bin:/bin'; FPATH=$PATH; sh -c :) >/dev/null 2>&1 || PATH_SEPARATOR=';' } fi ## ------------------------- ## ## Locate command utilities. ## ## ------------------------- ## # func_executable_p FILE # ---------------------- # Check that FILE is an executable regular file. func_executable_p () { test -f "$1" && test -x "$1" } # func_path_progs PROGS_LIST CHECK_FUNC [PATH] # -------------------------------------------- # Search for either a program that responds to --version with output # containing "GNU", or else returned by CHECK_FUNC otherwise, by # trying all the directories in PATH with each of the elements of # PROGS_LIST. # # CHECK_FUNC should accept the path to a candidate program, and # set $func_check_prog_result if it truncates its output less than # $_G_path_prog_max characters. func_path_progs () { _G_progs_list=$1 _G_check_func=$2 _G_PATH=${3-"$PATH"} _G_path_prog_max=0 _G_path_prog_found=false _G_save_IFS=$IFS; IFS=${PATH_SEPARATOR-:} for _G_dir in $_G_PATH; do IFS=$_G_save_IFS test -z "$_G_dir" && _G_dir=. for _G_prog_name in $_G_progs_list; do for _exeext in '' .EXE; do _G_path_prog=$_G_dir/$_G_prog_name$_exeext func_executable_p "$_G_path_prog" || continue case `"$_G_path_prog" --version 2>&1` in *GNU*) func_path_progs_result=$_G_path_prog _G_path_prog_found=: ;; *) $_G_check_func $_G_path_prog func_path_progs_result=$func_check_prog_result ;; esac $_G_path_prog_found && break 3 done done done IFS=$_G_save_IFS test -z "$func_path_progs_result" && { echo "no acceptable sed could be found in \$PATH" >&2 exit 1 } } # We want to be able to use the functions in this file before configure # has figured out where the best binaries are kept, which means we have # to search for them ourselves - except when the results are already set # where we skip the searches. # Unless the user overrides by setting SED, search the path for either GNU # sed, or the sed that truncates its output the least. test -z "$SED" && { _G_sed_script=s/aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa/bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb/ for _G_i in 1 2 3 4 5 6 7; do _G_sed_script=$_G_sed_script$nl$_G_sed_script done echo "$_G_sed_script" 2>/dev/null | sed 99q >conftest.sed _G_sed_script= func_check_prog_sed () { _G_path_prog=$1 _G_count=0 printf 0123456789 >conftest.in while : do cat conftest.in conftest.in >conftest.tmp mv conftest.tmp conftest.in cp conftest.in conftest.nl echo '' >> conftest.nl "$_G_path_prog" -f conftest.sed conftest.out 2>/dev/null || break diff conftest.out conftest.nl >/dev/null 2>&1 || break _G_count=`expr $_G_count + 1` if test "$_G_count" -gt "$_G_path_prog_max"; then # Best one so far, save it but keep looking for a better one func_check_prog_result=$_G_path_prog _G_path_prog_max=$_G_count fi # 10*(2^10) chars as input seems more than enough test 10 -lt "$_G_count" && break done rm -f conftest.in conftest.tmp conftest.nl conftest.out } func_path_progs "sed gsed" func_check_prog_sed $PATH:/usr/xpg4/bin rm -f conftest.sed SED=$func_path_progs_result } # Unless the user overrides by setting GREP, search the path for either GNU # grep, or the grep that truncates its output the least. test -z "$GREP" && { func_check_prog_grep () { _G_path_prog=$1 _G_count=0 _G_path_prog_max=0 printf 0123456789 >conftest.in while : do cat conftest.in conftest.in >conftest.tmp mv conftest.tmp conftest.in cp conftest.in conftest.nl echo 'GREP' >> conftest.nl "$_G_path_prog" -e 'GREP$' -e '-(cannot match)-' conftest.out 2>/dev/null || break diff conftest.out conftest.nl >/dev/null 2>&1 || break _G_count=`expr $_G_count + 1` if test "$_G_count" -gt "$_G_path_prog_max"; then # Best one so far, save it but keep looking for a better one func_check_prog_result=$_G_path_prog _G_path_prog_max=$_G_count fi # 10*(2^10) chars as input seems more than enough test 10 -lt "$_G_count" && break done rm -f conftest.in conftest.tmp conftest.nl conftest.out } func_path_progs "grep ggrep" func_check_prog_grep $PATH:/usr/xpg4/bin GREP=$func_path_progs_result } ## ------------------------------- ## ## User overridable command paths. ## ## ------------------------------- ## # All uppercase variable names are used for environment variables. These # variables can be overridden by the user before calling a script that # uses them if a suitable command of that name is not already available # in the command search PATH. : ${CP="cp -f"} : ${ECHO="printf %s\n"} : ${EGREP="$GREP -E"} : ${FGREP="$GREP -F"} : ${LN_S="ln -s"} : ${MAKE="make"} : ${MKDIR="mkdir"} : ${MV="mv -f"} : ${RM="rm -f"} : ${SHELL="${CONFIG_SHELL-/bin/sh}"} ## -------------------- ## ## Useful sed snippets. ## ## -------------------- ## sed_dirname='s|/[^/]*$||' sed_basename='s|^.*/||' # Sed substitution that helps us do robust quoting. It backslashifies # metacharacters that are still active within double-quoted strings. sed_quote_subst='s|\([`"$\\]\)|\\\1|g' # Same as above, but do not quote variable references. sed_double_quote_subst='s/\(["`\\]\)/\\\1/g' # Sed substitution that turns a string into a regex matching for the # string literally. sed_make_literal_regex='s|[].[^$\\*\/]|\\&|g' # Sed substitution that converts a w32 file name or path # that contains forward slashes, into one that contains # (escaped) backslashes. A very naive implementation. sed_naive_backslashify='s|\\\\*|\\|g;s|/|\\|g;s|\\|\\\\|g' # Re-'\' parameter expansions in output of sed_double_quote_subst that # were '\'-ed in input to the same. If an odd number of '\' preceded a # '$' in input to sed_double_quote_subst, that '$' was protected from # expansion. Since each input '\' is now two '\'s, look for any number # of runs of four '\'s followed by two '\'s and then a '$'. '\' that '$'. _G_bs='\\' _G_bs2='\\\\' _G_bs4='\\\\\\\\' _G_dollar='\$' sed_double_backslash="\ s/$_G_bs4/&\\ /g s/^$_G_bs2$_G_dollar/$_G_bs&/ s/\\([^$_G_bs]\\)$_G_bs2$_G_dollar/\\1$_G_bs2$_G_bs$_G_dollar/g s/\n//g" ## ----------------- ## ## Global variables. ## ## ----------------- ## # Except for the global variables explicitly listed below, the following # functions in the '^func_' namespace, and the '^require_' namespace # variables initialised in the 'Resource management' section, sourcing # this file will not pollute your global namespace with anything # else. There's no portable way to scope variables in Bourne shell # though, so actually running these functions will sometimes place # results into a variable named after the function, and often use # temporary variables in the '^_G_' namespace. If you are careful to # avoid using those namespaces casually in your sourcing script, things # should continue to work as you expect. And, of course, you can freely # overwrite any of the functions or variables defined here before # calling anything to customize them. EXIT_SUCCESS=0 EXIT_FAILURE=1 EXIT_MISMATCH=63 # $? = 63 is used to indicate version mismatch to missing. EXIT_SKIP=77 # $? = 77 is used to indicate a skipped test to automake. # Allow overriding, eg assuming that you follow the convention of # putting '$debug_cmd' at the start of all your functions, you can get # bash to show function call trace with: # # debug_cmd='eval echo "${FUNCNAME[0]} $*" >&2' bash your-script-name debug_cmd=${debug_cmd-":"} exit_cmd=: # By convention, finish your script with: # # exit $exit_status # # so that you can set exit_status to non-zero if you want to indicate # something went wrong during execution without actually bailing out at # the point of failure. exit_status=$EXIT_SUCCESS # Work around backward compatibility issue on IRIX 6.5. On IRIX 6.4+, sh # is ksh but when the shell is invoked as "sh" and the current value of # the _XPG environment variable is not equal to 1 (one), the special # positional parameter $0, within a function call, is the name of the # function. progpath=$0 # The name of this program. progname=`$ECHO "$progpath" |$SED "$sed_basename"` # Make sure we have an absolute progpath for reexecution: case $progpath in [\\/]*|[A-Za-z]:\\*) ;; *[\\/]*) progdir=`$ECHO "$progpath" |$SED "$sed_dirname"` progdir=`cd "$progdir" && pwd` progpath=$progdir/$progname ;; *) _G_IFS=$IFS IFS=${PATH_SEPARATOR-:} for progdir in $PATH; do IFS=$_G_IFS test -x "$progdir/$progname" && break done IFS=$_G_IFS test -n "$progdir" || progdir=`pwd` progpath=$progdir/$progname ;; esac ## ----------------- ## ## Standard options. ## ## ----------------- ## # The following options affect the operation of the functions defined # below, and should be set appropriately depending on run-time para- # meters passed on the command line. opt_dry_run=false opt_quiet=false opt_verbose=false # Categories 'all' and 'none' are always available. Append any others # you will pass as the first argument to func_warning from your own # code. warning_categories= # By default, display warnings according to 'opt_warning_types'. Set # 'warning_func' to ':' to elide all warnings, or func_fatal_error to # treat the next displayed warning as a fatal error. warning_func=func_warn_and_continue # Set to 'all' to display all warnings, 'none' to suppress all # warnings, or a space delimited list of some subset of # 'warning_categories' to display only the listed warnings. opt_warning_types=all ## -------------------- ## ## Resource management. ## ## -------------------- ## # This section contains definitions for functions that each ensure a # particular resource (a file, or a non-empty configuration variable for # example) is available, and if appropriate to extract default values # from pertinent package files. Call them using their associated # 'require_*' variable to ensure that they are executed, at most, once. # # It's entirely deliberate that calling these functions can set # variables that don't obey the namespace limitations obeyed by the rest # of this file, in order that that they be as useful as possible to # callers. # require_term_colors # ------------------- # Allow display of bold text on terminals that support it. require_term_colors=func_require_term_colors func_require_term_colors () { $debug_cmd test -t 1 && { # COLORTERM and USE_ANSI_COLORS environment variables take # precedence, because most terminfo databases neglect to describe # whether color sequences are supported. test -n "${COLORTERM+set}" && : ${USE_ANSI_COLORS="1"} if test 1 = "$USE_ANSI_COLORS"; then # Standard ANSI escape sequences tc_reset='' tc_bold=''; tc_standout='' tc_red=''; tc_green='' tc_blue=''; tc_cyan='' else # Otherwise trust the terminfo database after all. test -n "`tput sgr0 2>/dev/null`" && { tc_reset=`tput sgr0` test -n "`tput bold 2>/dev/null`" && tc_bold=`tput bold` tc_standout=$tc_bold test -n "`tput smso 2>/dev/null`" && tc_standout=`tput smso` test -n "`tput setaf 1 2>/dev/null`" && tc_red=`tput setaf 1` test -n "`tput setaf 2 2>/dev/null`" && tc_green=`tput setaf 2` test -n "`tput setaf 4 2>/dev/null`" && tc_blue=`tput setaf 4` test -n "`tput setaf 5 2>/dev/null`" && tc_cyan=`tput setaf 5` } fi } require_term_colors=: } ## ----------------- ## ## Function library. ## ## ----------------- ## # This section contains a variety of useful functions to call in your # scripts. Take note of the portable wrappers for features provided by # some modern shells, which will fall back to slower equivalents on # less featureful shells. # func_append VAR VALUE # --------------------- # Append VALUE onto the existing contents of VAR. # We should try to minimise forks, especially on Windows where they are # unreasonably slow, so skip the feature probes when bash or zsh are # being used: if test set = "${BASH_VERSION+set}${ZSH_VERSION+set}"; then : ${_G_HAVE_ARITH_OP="yes"} : ${_G_HAVE_XSI_OPS="yes"} # The += operator was introduced in bash 3.1 case $BASH_VERSION in [12].* | 3.0 | 3.0*) ;; *) : ${_G_HAVE_PLUSEQ_OP="yes"} ;; esac fi # _G_HAVE_PLUSEQ_OP # Can be empty, in which case the shell is probed, "yes" if += is # useable or anything else if it does not work. test -z "$_G_HAVE_PLUSEQ_OP" \ && (eval 'x=a; x+=" b"; test "a b" = "$x"') 2>/dev/null \ && _G_HAVE_PLUSEQ_OP=yes if test yes = "$_G_HAVE_PLUSEQ_OP" then # This is an XSI compatible shell, allowing a faster implementation... eval 'func_append () { $debug_cmd eval "$1+=\$2" }' else # ...otherwise fall back to using expr, which is often a shell builtin. func_append () { $debug_cmd eval "$1=\$$1\$2" } fi # func_append_quoted VAR VALUE # ---------------------------- # Quote VALUE and append to the end of shell variable VAR, separated # by a space. if test yes = "$_G_HAVE_PLUSEQ_OP"; then eval 'func_append_quoted () { $debug_cmd func_quote_for_eval "$2" eval "$1+=\\ \$func_quote_for_eval_result" }' else func_append_quoted () { $debug_cmd func_quote_for_eval "$2" eval "$1=\$$1\\ \$func_quote_for_eval_result" } fi # func_append_uniq VAR VALUE # -------------------------- # Append unique VALUE onto the existing contents of VAR, assuming # entries are delimited by the first character of VALUE. For example: # # func_append_uniq options " --another-option option-argument" # # will only append to $options if " --another-option option-argument " # is not already present somewhere in $options already (note spaces at # each end implied by leading space in second argument). func_append_uniq () { $debug_cmd eval _G_current_value='`$ECHO $'$1'`' _G_delim=`expr "$2" : '\(.\)'` case $_G_delim$_G_current_value$_G_delim in *"$2$_G_delim"*) ;; *) func_append "$@" ;; esac } # func_arith TERM... # ------------------ # Set func_arith_result to the result of evaluating TERMs. test -z "$_G_HAVE_ARITH_OP" \ && (eval 'test 2 = $(( 1 + 1 ))') 2>/dev/null \ && _G_HAVE_ARITH_OP=yes if test yes = "$_G_HAVE_ARITH_OP"; then eval 'func_arith () { $debug_cmd func_arith_result=$(( $* )) }' else func_arith () { $debug_cmd func_arith_result=`expr "$@"` } fi # func_basename FILE # ------------------ # Set func_basename_result to FILE with everything up to and including # the last / stripped. if test yes = "$_G_HAVE_XSI_OPS"; then # If this shell supports suffix pattern removal, then use it to avoid # forking. Hide the definitions single quotes in case the shell chokes # on unsupported syntax... _b='func_basename_result=${1##*/}' _d='case $1 in */*) func_dirname_result=${1%/*}$2 ;; * ) func_dirname_result=$3 ;; esac' else # ...otherwise fall back to using sed. _b='func_basename_result=`$ECHO "$1" |$SED "$sed_basename"`' _d='func_dirname_result=`$ECHO "$1" |$SED "$sed_dirname"` if test "X$func_dirname_result" = "X$1"; then func_dirname_result=$3 else func_append func_dirname_result "$2" fi' fi eval 'func_basename () { $debug_cmd '"$_b"' }' # func_dirname FILE APPEND NONDIR_REPLACEMENT # ------------------------------------------- # Compute the dirname of FILE. If nonempty, add APPEND to the result, # otherwise set result to NONDIR_REPLACEMENT. eval 'func_dirname () { $debug_cmd '"$_d"' }' # func_dirname_and_basename FILE APPEND NONDIR_REPLACEMENT # -------------------------------------------------------- # Perform func_basename and func_dirname in a single function # call: # dirname: Compute the dirname of FILE. If nonempty, # add APPEND to the result, otherwise set result # to NONDIR_REPLACEMENT. # value returned in "$func_dirname_result" # basename: Compute filename of FILE. # value retuned in "$func_basename_result" # For efficiency, we do not delegate to the functions above but instead # duplicate the functionality here. eval 'func_dirname_and_basename () { $debug_cmd '"$_b"' '"$_d"' }' # func_echo ARG... # ---------------- # Echo program name prefixed message. func_echo () { $debug_cmd _G_message=$* func_echo_IFS=$IFS IFS=$nl for _G_line in $_G_message; do IFS=$func_echo_IFS $ECHO "$progname: $_G_line" done IFS=$func_echo_IFS } # func_echo_all ARG... # -------------------- # Invoke $ECHO with all args, space-separated. func_echo_all () { $ECHO "$*" } # func_echo_infix_1 INFIX ARG... # ------------------------------ # Echo program name, followed by INFIX on the first line, with any # additional lines not showing INFIX. func_echo_infix_1 () { $debug_cmd $require_term_colors _G_infix=$1; shift _G_indent=$_G_infix _G_prefix="$progname: $_G_infix: " _G_message=$* # Strip color escape sequences before counting printable length for _G_tc in "$tc_reset" "$tc_bold" "$tc_standout" "$tc_red" "$tc_green" "$tc_blue" "$tc_cyan" do test -n "$_G_tc" && { _G_esc_tc=`$ECHO "$_G_tc" | $SED "$sed_make_literal_regex"` _G_indent=`$ECHO "$_G_indent" | $SED "s|$_G_esc_tc||g"` } done _G_indent="$progname: "`echo "$_G_indent" | $SED 's|.| |g'`" " ## exclude from sc_prohibit_nested_quotes func_echo_infix_1_IFS=$IFS IFS=$nl for _G_line in $_G_message; do IFS=$func_echo_infix_1_IFS $ECHO "$_G_prefix$tc_bold$_G_line$tc_reset" >&2 _G_prefix=$_G_indent done IFS=$func_echo_infix_1_IFS } # func_error ARG... # ----------------- # Echo program name prefixed message to standard error. func_error () { $debug_cmd $require_term_colors func_echo_infix_1 " $tc_standout${tc_red}error$tc_reset" "$*" >&2 } # func_fatal_error ARG... # ----------------------- # Echo program name prefixed message to standard error, and exit. func_fatal_error () { $debug_cmd func_error "$*" exit $EXIT_FAILURE } # func_grep EXPRESSION FILENAME # ----------------------------- # Check whether EXPRESSION matches any line of FILENAME, without output. func_grep () { $debug_cmd $GREP "$1" "$2" >/dev/null 2>&1 } # func_len STRING # --------------- # Set func_len_result to the length of STRING. STRING may not # start with a hyphen. test -z "$_G_HAVE_XSI_OPS" \ && (eval 'x=a/b/c; test 5aa/bb/cc = "${#x}${x%%/*}${x%/*}${x#*/}${x##*/}"') 2>/dev/null \ && _G_HAVE_XSI_OPS=yes if test yes = "$_G_HAVE_XSI_OPS"; then eval 'func_len () { $debug_cmd func_len_result=${#1} }' else func_len () { $debug_cmd func_len_result=`expr "$1" : ".*" 2>/dev/null || echo $max_cmd_len` } fi # func_mkdir_p DIRECTORY-PATH # --------------------------- # Make sure the entire path to DIRECTORY-PATH is available. func_mkdir_p () { $debug_cmd _G_directory_path=$1 _G_dir_list= if test -n "$_G_directory_path" && test : != "$opt_dry_run"; then # Protect directory names starting with '-' case $_G_directory_path in -*) _G_directory_path=./$_G_directory_path ;; esac # While some portion of DIR does not yet exist... while test ! -d "$_G_directory_path"; do # ...make a list in topmost first order. Use a colon delimited # list incase some portion of path contains whitespace. _G_dir_list=$_G_directory_path:$_G_dir_list # If the last portion added has no slash in it, the list is done case $_G_directory_path in */*) ;; *) break ;; esac # ...otherwise throw away the child directory and loop _G_directory_path=`$ECHO "$_G_directory_path" | $SED -e "$sed_dirname"` done _G_dir_list=`$ECHO "$_G_dir_list" | $SED 's|:*$||'` func_mkdir_p_IFS=$IFS; IFS=: for _G_dir in $_G_dir_list; do IFS=$func_mkdir_p_IFS # mkdir can fail with a 'File exist' error if two processes # try to create one of the directories concurrently. Don't # stop in that case! $MKDIR "$_G_dir" 2>/dev/null || : done IFS=$func_mkdir_p_IFS # Bail out if we (or some other process) failed to create a directory. test -d "$_G_directory_path" || \ func_fatal_error "Failed to create '$1'" fi } # func_mktempdir [BASENAME] # ------------------------- # Make a temporary directory that won't clash with other running # libtool processes, and avoids race conditions if possible. If # given, BASENAME is the basename for that directory. func_mktempdir () { $debug_cmd _G_template=${TMPDIR-/tmp}/${1-$progname} if test : = "$opt_dry_run"; then # Return a directory name, but don't create it in dry-run mode _G_tmpdir=$_G_template-$$ else # If mktemp works, use that first and foremost _G_tmpdir=`mktemp -d "$_G_template-XXXXXXXX" 2>/dev/null` if test ! -d "$_G_tmpdir"; then # Failing that, at least try and use $RANDOM to avoid a race _G_tmpdir=$_G_template-${RANDOM-0}$$ func_mktempdir_umask=`umask` umask 0077 $MKDIR "$_G_tmpdir" umask $func_mktempdir_umask fi # If we're not in dry-run mode, bomb out on failure test -d "$_G_tmpdir" || \ func_fatal_error "cannot create temporary directory '$_G_tmpdir'" fi $ECHO "$_G_tmpdir" } # func_normal_abspath PATH # ------------------------ # Remove doubled-up and trailing slashes, "." path components, # and cancel out any ".." path components in PATH after making # it an absolute path. func_normal_abspath () { $debug_cmd # These SED scripts presuppose an absolute path with a trailing slash. _G_pathcar='s|^/\([^/]*\).*$|\1|' _G_pathcdr='s|^/[^/]*||' _G_removedotparts=':dotsl s|/\./|/|g t dotsl s|/\.$|/|' _G_collapseslashes='s|/\{1,\}|/|g' _G_finalslash='s|/*$|/|' # Start from root dir and reassemble the path. func_normal_abspath_result= func_normal_abspath_tpath=$1 func_normal_abspath_altnamespace= case $func_normal_abspath_tpath in "") # Empty path, that just means $cwd. func_stripname '' '/' "`pwd`" func_normal_abspath_result=$func_stripname_result return ;; # The next three entries are used to spot a run of precisely # two leading slashes without using negated character classes; # we take advantage of case's first-match behaviour. ///*) # Unusual form of absolute path, do nothing. ;; //*) # Not necessarily an ordinary path; POSIX reserves leading '//' # and for example Cygwin uses it to access remote file shares # over CIFS/SMB, so we conserve a leading double slash if found. func_normal_abspath_altnamespace=/ ;; /*) # Absolute path, do nothing. ;; *) # Relative path, prepend $cwd. func_normal_abspath_tpath=`pwd`/$func_normal_abspath_tpath ;; esac # Cancel out all the simple stuff to save iterations. We also want # the path to end with a slash for ease of parsing, so make sure # there is one (and only one) here. func_normal_abspath_tpath=`$ECHO "$func_normal_abspath_tpath" | $SED \ -e "$_G_removedotparts" -e "$_G_collapseslashes" -e "$_G_finalslash"` while :; do # Processed it all yet? if test / = "$func_normal_abspath_tpath"; then # If we ascended to the root using ".." the result may be empty now. if test -z "$func_normal_abspath_result"; then func_normal_abspath_result=/ fi break fi func_normal_abspath_tcomponent=`$ECHO "$func_normal_abspath_tpath" | $SED \ -e "$_G_pathcar"` func_normal_abspath_tpath=`$ECHO "$func_normal_abspath_tpath" | $SED \ -e "$_G_pathcdr"` # Figure out what to do with it case $func_normal_abspath_tcomponent in "") # Trailing empty path component, ignore it. ;; ..) # Parent dir; strip last assembled component from result. func_dirname "$func_normal_abspath_result" func_normal_abspath_result=$func_dirname_result ;; *) # Actual path component, append it. func_append func_normal_abspath_result "/$func_normal_abspath_tcomponent" ;; esac done # Restore leading double-slash if one was found on entry. func_normal_abspath_result=$func_normal_abspath_altnamespace$func_normal_abspath_result } # func_notquiet ARG... # -------------------- # Echo program name prefixed message only when not in quiet mode. func_notquiet () { $debug_cmd $opt_quiet || func_echo ${1+"$@"} # A bug in bash halts the script if the last line of a function # fails when set -e is in force, so we need another command to # work around that: : } # func_relative_path SRCDIR DSTDIR # -------------------------------- # Set func_relative_path_result to the relative path from SRCDIR to DSTDIR. func_relative_path () { $debug_cmd func_relative_path_result= func_normal_abspath "$1" func_relative_path_tlibdir=$func_normal_abspath_result func_normal_abspath "$2" func_relative_path_tbindir=$func_normal_abspath_result # Ascend the tree starting from libdir while :; do # check if we have found a prefix of bindir case $func_relative_path_tbindir in $func_relative_path_tlibdir) # found an exact match func_relative_path_tcancelled= break ;; $func_relative_path_tlibdir*) # found a matching prefix func_stripname "$func_relative_path_tlibdir" '' "$func_relative_path_tbindir" func_relative_path_tcancelled=$func_stripname_result if test -z "$func_relative_path_result"; then func_relative_path_result=. fi break ;; *) func_dirname $func_relative_path_tlibdir func_relative_path_tlibdir=$func_dirname_result if test -z "$func_relative_path_tlibdir"; then # Have to descend all the way to the root! func_relative_path_result=../$func_relative_path_result func_relative_path_tcancelled=$func_relative_path_tbindir break fi func_relative_path_result=../$func_relative_path_result ;; esac done # Now calculate path; take care to avoid doubling-up slashes. func_stripname '' '/' "$func_relative_path_result" func_relative_path_result=$func_stripname_result func_stripname '/' '/' "$func_relative_path_tcancelled" if test -n "$func_stripname_result"; then func_append func_relative_path_result "/$func_stripname_result" fi # Normalisation. If bindir is libdir, return '.' else relative path. if test -n "$func_relative_path_result"; then func_stripname './' '' "$func_relative_path_result" func_relative_path_result=$func_stripname_result fi test -n "$func_relative_path_result" || func_relative_path_result=. : } # func_quote_for_eval ARG... # -------------------------- # Aesthetically quote ARGs to be evaled later. # This function returns two values: # i) func_quote_for_eval_result # double-quoted, suitable for a subsequent eval # ii) func_quote_for_eval_unquoted_result # has all characters that are still active within double # quotes backslashified. func_quote_for_eval () { $debug_cmd func_quote_for_eval_unquoted_result= func_quote_for_eval_result= while test 0 -lt $#; do case $1 in *[\\\`\"\$]*) _G_unquoted_arg=`printf '%s\n' "$1" |$SED "$sed_quote_subst"` ;; *) _G_unquoted_arg=$1 ;; esac if test -n "$func_quote_for_eval_unquoted_result"; then func_append func_quote_for_eval_unquoted_result " $_G_unquoted_arg" else func_append func_quote_for_eval_unquoted_result "$_G_unquoted_arg" fi case $_G_unquoted_arg in # Double-quote args containing shell metacharacters to delay # word splitting, command substitution and variable expansion # for a subsequent eval. # Many Bourne shells cannot handle close brackets correctly # in scan sets, so we specify it separately. *[\[\~\#\^\&\*\(\)\{\}\|\;\<\>\?\'\ \ ]*|*]*|"") _G_quoted_arg=\"$_G_unquoted_arg\" ;; *) _G_quoted_arg=$_G_unquoted_arg ;; esac if test -n "$func_quote_for_eval_result"; then func_append func_quote_for_eval_result " $_G_quoted_arg" else func_append func_quote_for_eval_result "$_G_quoted_arg" fi shift done } # func_quote_for_expand ARG # ------------------------- # Aesthetically quote ARG to be evaled later; same as above, # but do not quote variable references. func_quote_for_expand () { $debug_cmd case $1 in *[\\\`\"]*) _G_arg=`$ECHO "$1" | $SED \ -e "$sed_double_quote_subst" -e "$sed_double_backslash"` ;; *) _G_arg=$1 ;; esac case $_G_arg in # Double-quote args containing shell metacharacters to delay # word splitting and command substitution for a subsequent eval. # Many Bourne shells cannot handle close brackets correctly # in scan sets, so we specify it separately. *[\[\~\#\^\&\*\(\)\{\}\|\;\<\>\?\'\ \ ]*|*]*|"") _G_arg=\"$_G_arg\" ;; esac func_quote_for_expand_result=$_G_arg } # func_stripname PREFIX SUFFIX NAME # --------------------------------- # strip PREFIX and SUFFIX from NAME, and store in func_stripname_result. # PREFIX and SUFFIX must not contain globbing or regex special # characters, hashes, percent signs, but SUFFIX may contain a leading # dot (in which case that matches only a dot). if test yes = "$_G_HAVE_XSI_OPS"; then eval 'func_stripname () { $debug_cmd # pdksh 5.2.14 does not do ${X%$Y} correctly if both X and Y are # positional parameters, so assign one to ordinary variable first. func_stripname_result=$3 func_stripname_result=${func_stripname_result#"$1"} func_stripname_result=${func_stripname_result%"$2"} }' else func_stripname () { $debug_cmd case $2 in .*) func_stripname_result=`$ECHO "$3" | $SED -e "s%^$1%%" -e "s%\\\\$2\$%%"`;; *) func_stripname_result=`$ECHO "$3" | $SED -e "s%^$1%%" -e "s%$2\$%%"`;; esac } fi # func_show_eval CMD [FAIL_EXP] # ----------------------------- # Unless opt_quiet is true, then output CMD. Then, if opt_dryrun is # not true, evaluate CMD. If the evaluation of CMD fails, and FAIL_EXP # is given, then evaluate it. func_show_eval () { $debug_cmd _G_cmd=$1 _G_fail_exp=${2-':'} func_quote_for_expand "$_G_cmd" eval "func_notquiet $func_quote_for_expand_result" $opt_dry_run || { eval "$_G_cmd" _G_status=$? if test 0 -ne "$_G_status"; then eval "(exit $_G_status); $_G_fail_exp" fi } } # func_show_eval_locale CMD [FAIL_EXP] # ------------------------------------ # Unless opt_quiet is true, then output CMD. Then, if opt_dryrun is # not true, evaluate CMD. If the evaluation of CMD fails, and FAIL_EXP # is given, then evaluate it. Use the saved locale for evaluation. func_show_eval_locale () { $debug_cmd _G_cmd=$1 _G_fail_exp=${2-':'} $opt_quiet || { func_quote_for_expand "$_G_cmd" eval "func_echo $func_quote_for_expand_result" } $opt_dry_run || { eval "$_G_user_locale $_G_cmd" _G_status=$? eval "$_G_safe_locale" if test 0 -ne "$_G_status"; then eval "(exit $_G_status); $_G_fail_exp" fi } } # func_tr_sh # ---------- # Turn $1 into a string suitable for a shell variable name. # Result is stored in $func_tr_sh_result. All characters # not in the set a-zA-Z0-9_ are replaced with '_'. Further, # if $1 begins with a digit, a '_' is prepended as well. func_tr_sh () { $debug_cmd case $1 in [0-9]* | *[!a-zA-Z0-9_]*) func_tr_sh_result=`$ECHO "$1" | $SED -e 's/^\([0-9]\)/_\1/' -e 's/[^a-zA-Z0-9_]/_/g'` ;; * ) func_tr_sh_result=$1 ;; esac } # func_verbose ARG... # ------------------- # Echo program name prefixed message in verbose mode only. func_verbose () { $debug_cmd $opt_verbose && func_echo "$*" : } # func_warn_and_continue ARG... # ----------------------------- # Echo program name prefixed warning message to standard error. func_warn_and_continue () { $debug_cmd $require_term_colors func_echo_infix_1 "${tc_red}warning$tc_reset" "$*" >&2 } # func_warning CATEGORY ARG... # ---------------------------- # Echo program name prefixed warning message to standard error. Warning # messages can be filtered according to CATEGORY, where this function # elides messages where CATEGORY is not listed in the global variable # 'opt_warning_types'. func_warning () { $debug_cmd # CATEGORY must be in the warning_categories list! case " $warning_categories " in *" $1 "*) ;; *) func_internal_error "invalid warning category '$1'" ;; esac _G_category=$1 shift case " $opt_warning_types " in *" $_G_category "*) $warning_func ${1+"$@"} ;; esac } # func_sort_ver VER1 VER2 # ----------------------- # 'sort -V' is not generally available. # Note this deviates from the version comparison in automake # in that it treats 1.5 < 1.5.0, and treats 1.4.4a < 1.4-p3a # but this should suffice as we won't be specifying old # version formats or redundant trailing .0 in bootstrap.conf. # If we did want full compatibility then we should probably # use m4_version_compare from autoconf. func_sort_ver () { $debug_cmd printf '%s\n%s\n' "$1" "$2" \ | sort -t. -k 1,1n -k 2,2n -k 3,3n -k 4,4n -k 5,5n -k 6,6n -k 7,7n -k 8,8n -k 9,9n } # func_lt_ver PREV CURR # --------------------- # Return true if PREV and CURR are in the correct order according to # func_sort_ver, otherwise false. Use it like this: # # func_lt_ver "$prev_ver" "$proposed_ver" || func_fatal_error "..." func_lt_ver () { $debug_cmd test "x$1" = x`func_sort_ver "$1" "$2" | $SED 1q` } # Local variables: # mode: shell-script # sh-indentation: 2 # eval: (add-hook 'before-save-hook 'time-stamp) # time-stamp-pattern: "10/scriptversion=%:y-%02m-%02d.%02H; # UTC" # time-stamp-time-zone: "UTC" # End: #! /bin/sh # Set a version string for this script. scriptversion=2014-01-07.03; # UTC # A portable, pluggable option parser for Bourne shell. # Written by Gary V. Vaughan, 2010 # Copyright (C) 2010-2015 Free Software Foundation, Inc. # This is free software; see the source for copying conditions. There is NO # warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. # This program is free software: you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation, either version 3 of the License, or # (at your option) any later version. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # You should have received a copy of the GNU General Public License # along with this program. If not, see . # Please report bugs or propose patches to gary@gnu.org. ## ------ ## ## Usage. ## ## ------ ## # This file is a library for parsing options in your shell scripts along # with assorted other useful supporting features that you can make use # of too. # # For the simplest scripts you might need only: # # #!/bin/sh # . relative/path/to/funclib.sh # . relative/path/to/options-parser # scriptversion=1.0 # func_options ${1+"$@"} # eval set dummy "$func_options_result"; shift # ...rest of your script... # # In order for the '--version' option to work, you will need to have a # suitably formatted comment like the one at the top of this file # starting with '# Written by ' and ending with '# warranty; '. # # For '-h' and '--help' to work, you will also need a one line # description of your script's purpose in a comment directly above the # '# Written by ' line, like the one at the top of this file. # # The default options also support '--debug', which will turn on shell # execution tracing (see the comment above debug_cmd below for another # use), and '--verbose' and the func_verbose function to allow your script # to display verbose messages only when your user has specified # '--verbose'. # # After sourcing this file, you can plug processing for additional # options by amending the variables from the 'Configuration' section # below, and following the instructions in the 'Option parsing' # section further down. ## -------------- ## ## Configuration. ## ## -------------- ## # You should override these variables in your script after sourcing this # file so that they reflect the customisations you have added to the # option parser. # The usage line for option parsing errors and the start of '-h' and # '--help' output messages. You can embed shell variables for delayed # expansion at the time the message is displayed, but you will need to # quote other shell meta-characters carefully to prevent them being # expanded when the contents are evaled. usage='$progpath [OPTION]...' # Short help message in response to '-h' and '--help'. Add to this or # override it after sourcing this library to reflect the full set of # options your script accepts. usage_message="\ --debug enable verbose shell tracing -W, --warnings=CATEGORY report the warnings falling in CATEGORY [all] -v, --verbose verbosely report processing --version print version information and exit -h, --help print short or long help message and exit " # Additional text appended to 'usage_message' in response to '--help'. long_help_message=" Warning categories include: 'all' show all warnings 'none' turn off all the warnings 'error' warnings are treated as fatal errors" # Help message printed before fatal option parsing errors. fatal_help="Try '\$progname --help' for more information." ## ------------------------- ## ## Hook function management. ## ## ------------------------- ## # This section contains functions for adding, removing, and running hooks # to the main code. A hook is just a named list of of function, that can # be run in order later on. # func_hookable FUNC_NAME # ----------------------- # Declare that FUNC_NAME will run hooks added with # 'func_add_hook FUNC_NAME ...'. func_hookable () { $debug_cmd func_append hookable_fns " $1" } # func_add_hook FUNC_NAME HOOK_FUNC # --------------------------------- # Request that FUNC_NAME call HOOK_FUNC before it returns. FUNC_NAME must # first have been declared "hookable" by a call to 'func_hookable'. func_add_hook () { $debug_cmd case " $hookable_fns " in *" $1 "*) ;; *) func_fatal_error "'$1' does not accept hook functions." ;; esac eval func_append ${1}_hooks '" $2"' } # func_remove_hook FUNC_NAME HOOK_FUNC # ------------------------------------ # Remove HOOK_FUNC from the list of functions called by FUNC_NAME. func_remove_hook () { $debug_cmd eval ${1}_hooks='`$ECHO "\$'$1'_hooks" |$SED "s| '$2'||"`' } # func_run_hooks FUNC_NAME [ARG]... # --------------------------------- # Run all hook functions registered to FUNC_NAME. # It is assumed that the list of hook functions contains nothing more # than a whitespace-delimited list of legal shell function names, and # no effort is wasted trying to catch shell meta-characters or preserve # whitespace. func_run_hooks () { $debug_cmd case " $hookable_fns " in *" $1 "*) ;; *) func_fatal_error "'$1' does not support hook funcions.n" ;; esac eval _G_hook_fns=\$$1_hooks; shift for _G_hook in $_G_hook_fns; do eval $_G_hook '"$@"' # store returned options list back into positional # parameters for next 'cmd' execution. eval _G_hook_result=\$${_G_hook}_result eval set dummy "$_G_hook_result"; shift done func_quote_for_eval ${1+"$@"} func_run_hooks_result=$func_quote_for_eval_result } ## --------------- ## ## Option parsing. ## ## --------------- ## # In order to add your own option parsing hooks, you must accept the # full positional parameter list in your hook function, remove any # options that you action, and then pass back the remaining unprocessed # options in '_result', escaped suitably for # 'eval'. Like this: # # my_options_prep () # { # $debug_cmd # # # Extend the existing usage message. # usage_message=$usage_message' # -s, --silent don'\''t print informational messages # ' # # func_quote_for_eval ${1+"$@"} # my_options_prep_result=$func_quote_for_eval_result # } # func_add_hook func_options_prep my_options_prep # # # my_silent_option () # { # $debug_cmd # # # Note that for efficiency, we parse as many options as we can # # recognise in a loop before passing the remainder back to the # # caller on the first unrecognised argument we encounter. # while test $# -gt 0; do # opt=$1; shift # case $opt in # --silent|-s) opt_silent=: ;; # # Separate non-argument short options: # -s*) func_split_short_opt "$_G_opt" # set dummy "$func_split_short_opt_name" \ # "-$func_split_short_opt_arg" ${1+"$@"} # shift # ;; # *) set dummy "$_G_opt" "$*"; shift; break ;; # esac # done # # func_quote_for_eval ${1+"$@"} # my_silent_option_result=$func_quote_for_eval_result # } # func_add_hook func_parse_options my_silent_option # # # my_option_validation () # { # $debug_cmd # # $opt_silent && $opt_verbose && func_fatal_help "\ # '--silent' and '--verbose' options are mutually exclusive." # # func_quote_for_eval ${1+"$@"} # my_option_validation_result=$func_quote_for_eval_result # } # func_add_hook func_validate_options my_option_validation # # You'll alse need to manually amend $usage_message to reflect the extra # options you parse. It's preferable to append if you can, so that # multiple option parsing hooks can be added safely. # func_options [ARG]... # --------------------- # All the functions called inside func_options are hookable. See the # individual implementations for details. func_hookable func_options func_options () { $debug_cmd func_options_prep ${1+"$@"} eval func_parse_options \ ${func_options_prep_result+"$func_options_prep_result"} eval func_validate_options \ ${func_parse_options_result+"$func_parse_options_result"} eval func_run_hooks func_options \ ${func_validate_options_result+"$func_validate_options_result"} # save modified positional parameters for caller func_options_result=$func_run_hooks_result } # func_options_prep [ARG]... # -------------------------- # All initialisations required before starting the option parse loop. # Note that when calling hook functions, we pass through the list of # positional parameters. If a hook function modifies that list, and # needs to propogate that back to rest of this script, then the complete # modified list must be put in 'func_run_hooks_result' before # returning. func_hookable func_options_prep func_options_prep () { $debug_cmd # Option defaults: opt_verbose=false opt_warning_types= func_run_hooks func_options_prep ${1+"$@"} # save modified positional parameters for caller func_options_prep_result=$func_run_hooks_result } # func_parse_options [ARG]... # --------------------------- # The main option parsing loop. func_hookable func_parse_options func_parse_options () { $debug_cmd func_parse_options_result= # this just eases exit handling while test $# -gt 0; do # Defer to hook functions for initial option parsing, so they # get priority in the event of reusing an option name. func_run_hooks func_parse_options ${1+"$@"} # Adjust func_parse_options positional parameters to match eval set dummy "$func_run_hooks_result"; shift # Break out of the loop if we already parsed every option. test $# -gt 0 || break _G_opt=$1 shift case $_G_opt in --debug|-x) debug_cmd='set -x' func_echo "enabling shell trace mode" $debug_cmd ;; --no-warnings|--no-warning|--no-warn) set dummy --warnings none ${1+"$@"} shift ;; --warnings|--warning|-W) test $# = 0 && func_missing_arg $_G_opt && break case " $warning_categories $1" in *" $1 "*) # trailing space prevents matching last $1 above func_append_uniq opt_warning_types " $1" ;; *all) opt_warning_types=$warning_categories ;; *none) opt_warning_types=none warning_func=: ;; *error) opt_warning_types=$warning_categories warning_func=func_fatal_error ;; *) func_fatal_error \ "unsupported warning category: '$1'" ;; esac shift ;; --verbose|-v) opt_verbose=: ;; --version) func_version ;; -\?|-h) func_usage ;; --help) func_help ;; # Separate optargs to long options (plugins may need this): --*=*) func_split_equals "$_G_opt" set dummy "$func_split_equals_lhs" \ "$func_split_equals_rhs" ${1+"$@"} shift ;; # Separate optargs to short options: -W*) func_split_short_opt "$_G_opt" set dummy "$func_split_short_opt_name" \ "$func_split_short_opt_arg" ${1+"$@"} shift ;; # Separate non-argument short options: -\?*|-h*|-v*|-x*) func_split_short_opt "$_G_opt" set dummy "$func_split_short_opt_name" \ "-$func_split_short_opt_arg" ${1+"$@"} shift ;; --) break ;; -*) func_fatal_help "unrecognised option: '$_G_opt'" ;; *) set dummy "$_G_opt" ${1+"$@"}; shift; break ;; esac done # save modified positional parameters for caller func_quote_for_eval ${1+"$@"} func_parse_options_result=$func_quote_for_eval_result } # func_validate_options [ARG]... # ------------------------------ # Perform any sanity checks on option settings and/or unconsumed # arguments. func_hookable func_validate_options func_validate_options () { $debug_cmd # Display all warnings if -W was not given. test -n "$opt_warning_types" || opt_warning_types=" $warning_categories" func_run_hooks func_validate_options ${1+"$@"} # Bail if the options were screwed! $exit_cmd $EXIT_FAILURE # save modified positional parameters for caller func_validate_options_result=$func_run_hooks_result } ## ----------------- ## ## Helper functions. ## ## ----------------- ## # This section contains the helper functions used by the rest of the # hookable option parser framework in ascii-betical order. # func_fatal_help ARG... # ---------------------- # Echo program name prefixed message to standard error, followed by # a help hint, and exit. func_fatal_help () { $debug_cmd eval \$ECHO \""Usage: $usage"\" eval \$ECHO \""$fatal_help"\" func_error ${1+"$@"} exit $EXIT_FAILURE } # func_help # --------- # Echo long help message to standard output and exit. func_help () { $debug_cmd func_usage_message $ECHO "$long_help_message" exit 0 } # func_missing_arg ARGNAME # ------------------------ # Echo program name prefixed message to standard error and set global # exit_cmd. func_missing_arg () { $debug_cmd func_error "Missing argument for '$1'." exit_cmd=exit } # func_split_equals STRING # ------------------------ # Set func_split_equals_lhs and func_split_equals_rhs shell variables after # splitting STRING at the '=' sign. test -z "$_G_HAVE_XSI_OPS" \ && (eval 'x=a/b/c; test 5aa/bb/cc = "${#x}${x%%/*}${x%/*}${x#*/}${x##*/}"') 2>/dev/null \ && _G_HAVE_XSI_OPS=yes if test yes = "$_G_HAVE_XSI_OPS" then # This is an XSI compatible shell, allowing a faster implementation... eval 'func_split_equals () { $debug_cmd func_split_equals_lhs=${1%%=*} func_split_equals_rhs=${1#*=} test "x$func_split_equals_lhs" = "x$1" \ && func_split_equals_rhs= }' else # ...otherwise fall back to using expr, which is often a shell builtin. func_split_equals () { $debug_cmd func_split_equals_lhs=`expr "x$1" : 'x\([^=]*\)'` func_split_equals_rhs= test "x$func_split_equals_lhs" = "x$1" \ || func_split_equals_rhs=`expr "x$1" : 'x[^=]*=\(.*\)$'` } fi #func_split_equals # func_split_short_opt SHORTOPT # ----------------------------- # Set func_split_short_opt_name and func_split_short_opt_arg shell # variables after splitting SHORTOPT after the 2nd character. if test yes = "$_G_HAVE_XSI_OPS" then # This is an XSI compatible shell, allowing a faster implementation... eval 'func_split_short_opt () { $debug_cmd func_split_short_opt_arg=${1#??} func_split_short_opt_name=${1%"$func_split_short_opt_arg"} }' else # ...otherwise fall back to using expr, which is often a shell builtin. func_split_short_opt () { $debug_cmd func_split_short_opt_name=`expr "x$1" : 'x-\(.\)'` func_split_short_opt_arg=`expr "x$1" : 'x-.\(.*\)$'` } fi #func_split_short_opt # func_usage # ---------- # Echo short help message to standard output and exit. func_usage () { $debug_cmd func_usage_message $ECHO "Run '$progname --help |${PAGER-more}' for full usage" exit 0 } # func_usage_message # ------------------ # Echo short help message to standard output. func_usage_message () { $debug_cmd eval \$ECHO \""Usage: $usage"\" echo $SED -n 's|^# || /^Written by/{ x;p;x } h /^Written by/q' < "$progpath" echo eval \$ECHO \""$usage_message"\" } # func_version # ------------ # Echo version message to standard output and exit. func_version () { $debug_cmd printf '%s\n' "$progname $scriptversion" $SED -n ' /(C)/!b go :more /\./!{ N s|\n# | | b more } :go /^# Written by /,/# warranty; / { s|^# || s|^# *$|| s|\((C)\)[ 0-9,-]*[ ,-]\([1-9][0-9]* \)|\1 \2| p } /^# Written by / { s|^# || p } /^warranty; /q' < "$progpath" exit $? } # Local variables: # mode: shell-script # sh-indentation: 2 # eval: (add-hook 'before-save-hook 'time-stamp) # time-stamp-pattern: "10/scriptversion=%:y-%02m-%02d.%02H; # UTC" # time-stamp-time-zone: "UTC" # End: # Set a version string. scriptversion='(GNU libtool) 2.4.6' # func_echo ARG... # ---------------- # Libtool also displays the current mode in messages, so override # funclib.sh func_echo with this custom definition. func_echo () { $debug_cmd _G_message=$* func_echo_IFS=$IFS IFS=$nl for _G_line in $_G_message; do IFS=$func_echo_IFS $ECHO "$progname${opt_mode+: $opt_mode}: $_G_line" done IFS=$func_echo_IFS } # func_warning ARG... # ------------------- # Libtool warnings are not categorized, so override funclib.sh # func_warning with this simpler definition. func_warning () { $debug_cmd $warning_func ${1+"$@"} } ## ---------------- ## ## Options parsing. ## ## ---------------- ## # Hook in the functions to make sure our own options are parsed during # the option parsing loop. usage='$progpath [OPTION]... [MODE-ARG]...' # Short help message in response to '-h'. usage_message="Options: --config show all configuration variables --debug enable verbose shell tracing -n, --dry-run display commands without modifying any files --features display basic configuration information and exit --mode=MODE use operation mode MODE --no-warnings equivalent to '-Wnone' --preserve-dup-deps don't remove duplicate dependency libraries --quiet, --silent don't print informational messages --tag=TAG use configuration variables from tag TAG -v, --verbose print more informational messages than default --version print version information -W, --warnings=CATEGORY report the warnings falling in CATEGORY [all] -h, --help, --help-all print short, long, or detailed help message " # Additional text appended to 'usage_message' in response to '--help'. func_help () { $debug_cmd func_usage_message $ECHO "$long_help_message MODE must be one of the following: clean remove files from the build directory compile compile a source file into a libtool object execute automatically set library path, then run a program finish complete the installation of libtool libraries install install libraries or executables link create a library or an executable uninstall remove libraries from an installed directory MODE-ARGS vary depending on the MODE. When passed as first option, '--mode=MODE' may be abbreviated as 'MODE' or a unique abbreviation of that. Try '$progname --help --mode=MODE' for a more detailed description of MODE. When reporting a bug, please describe a test case to reproduce it and include the following information: host-triplet: $host shell: $SHELL compiler: $LTCC compiler flags: $LTCFLAGS linker: $LD (gnu? $with_gnu_ld) version: $progname (GNU libtool) 2.4.6 automake: `($AUTOMAKE --version) 2>/dev/null |$SED 1q` autoconf: `($AUTOCONF --version) 2>/dev/null |$SED 1q` Report bugs to . GNU libtool home page: . General help using GNU software: ." exit 0 } # func_lo2o OBJECT-NAME # --------------------- # Transform OBJECT-NAME from a '.lo' suffix to the platform specific # object suffix. lo2o=s/\\.lo\$/.$objext/ o2lo=s/\\.$objext\$/.lo/ if test yes = "$_G_HAVE_XSI_OPS"; then eval 'func_lo2o () { case $1 in *.lo) func_lo2o_result=${1%.lo}.$objext ;; * ) func_lo2o_result=$1 ;; esac }' # func_xform LIBOBJ-OR-SOURCE # --------------------------- # Transform LIBOBJ-OR-SOURCE from a '.o' or '.c' (or otherwise) # suffix to a '.lo' libtool-object suffix. eval 'func_xform () { func_xform_result=${1%.*}.lo }' else # ...otherwise fall back to using sed. func_lo2o () { func_lo2o_result=`$ECHO "$1" | $SED "$lo2o"` } func_xform () { func_xform_result=`$ECHO "$1" | $SED 's|\.[^.]*$|.lo|'` } fi # func_fatal_configuration ARG... # ------------------------------- # Echo program name prefixed message to standard error, followed by # a configuration failure hint, and exit. func_fatal_configuration () { func__fatal_error ${1+"$@"} \ "See the $PACKAGE documentation for more information." \ "Fatal configuration error." } # func_config # ----------- # Display the configuration for all the tags in this script. func_config () { re_begincf='^# ### BEGIN LIBTOOL' re_endcf='^# ### END LIBTOOL' # Default configuration. $SED "1,/$re_begincf CONFIG/d;/$re_endcf CONFIG/,\$d" < "$progpath" # Now print the configurations for the tags. for tagname in $taglist; do $SED -n "/$re_begincf TAG CONFIG: $tagname\$/,/$re_endcf TAG CONFIG: $tagname\$/p" < "$progpath" done exit $? } # func_features # ------------- # Display the features supported by this script. func_features () { echo "host: $host" if test yes = "$build_libtool_libs"; then echo "enable shared libraries" else echo "disable shared libraries" fi if test yes = "$build_old_libs"; then echo "enable static libraries" else echo "disable static libraries" fi exit $? } # func_enable_tag TAGNAME # ----------------------- # Verify that TAGNAME is valid, and either flag an error and exit, or # enable the TAGNAME tag. We also add TAGNAME to the global $taglist # variable here. func_enable_tag () { # Global variable: tagname=$1 re_begincf="^# ### BEGIN LIBTOOL TAG CONFIG: $tagname\$" re_endcf="^# ### END LIBTOOL TAG CONFIG: $tagname\$" sed_extractcf=/$re_begincf/,/$re_endcf/p # Validate tagname. case $tagname in *[!-_A-Za-z0-9,/]*) func_fatal_error "invalid tag name: $tagname" ;; esac # Don't test for the "default" C tag, as we know it's # there but not specially marked. case $tagname in CC) ;; *) if $GREP "$re_begincf" "$progpath" >/dev/null 2>&1; then taglist="$taglist $tagname" # Evaluate the configuration. Be careful to quote the path # and the sed script, to avoid splitting on whitespace, but # also don't use non-portable quotes within backquotes within # quotes we have to do it in 2 steps: extractedcf=`$SED -n -e "$sed_extractcf" < "$progpath"` eval "$extractedcf" else func_error "ignoring unknown tag $tagname" fi ;; esac } # func_check_version_match # ------------------------ # Ensure that we are using m4 macros, and libtool script from the same # release of libtool. func_check_version_match () { if test "$package_revision" != "$macro_revision"; then if test "$VERSION" != "$macro_version"; then if test -z "$macro_version"; then cat >&2 <<_LT_EOF $progname: Version mismatch error. This is $PACKAGE $VERSION, but the $progname: definition of this LT_INIT comes from an older release. $progname: You should recreate aclocal.m4 with macros from $PACKAGE $VERSION $progname: and run autoconf again. _LT_EOF else cat >&2 <<_LT_EOF $progname: Version mismatch error. This is $PACKAGE $VERSION, but the $progname: definition of this LT_INIT comes from $PACKAGE $macro_version. $progname: You should recreate aclocal.m4 with macros from $PACKAGE $VERSION $progname: and run autoconf again. _LT_EOF fi else cat >&2 <<_LT_EOF $progname: Version mismatch error. This is $PACKAGE $VERSION, revision $package_revision, $progname: but the definition of this LT_INIT comes from revision $macro_revision. $progname: You should recreate aclocal.m4 with macros from revision $package_revision $progname: of $PACKAGE $VERSION and run autoconf again. _LT_EOF fi exit $EXIT_MISMATCH fi } # libtool_options_prep [ARG]... # ----------------------------- # Preparation for options parsed by libtool. libtool_options_prep () { $debug_mode # Option defaults: opt_config=false opt_dlopen= opt_dry_run=false opt_help=false opt_mode= opt_preserve_dup_deps=false opt_quiet=false nonopt= preserve_args= # Shorthand for --mode=foo, only valid as the first argument case $1 in clean|clea|cle|cl) shift; set dummy --mode clean ${1+"$@"}; shift ;; compile|compil|compi|comp|com|co|c) shift; set dummy --mode compile ${1+"$@"}; shift ;; execute|execut|execu|exec|exe|ex|e) shift; set dummy --mode execute ${1+"$@"}; shift ;; finish|finis|fini|fin|fi|f) shift; set dummy --mode finish ${1+"$@"}; shift ;; install|instal|insta|inst|ins|in|i) shift; set dummy --mode install ${1+"$@"}; shift ;; link|lin|li|l) shift; set dummy --mode link ${1+"$@"}; shift ;; uninstall|uninstal|uninsta|uninst|unins|unin|uni|un|u) shift; set dummy --mode uninstall ${1+"$@"}; shift ;; esac # Pass back the list of options. func_quote_for_eval ${1+"$@"} libtool_options_prep_result=$func_quote_for_eval_result } func_add_hook func_options_prep libtool_options_prep # libtool_parse_options [ARG]... # --------------------------------- # Provide handling for libtool specific options. libtool_parse_options () { $debug_cmd # Perform our own loop to consume as many options as possible in # each iteration. while test $# -gt 0; do _G_opt=$1 shift case $_G_opt in --dry-run|--dryrun|-n) opt_dry_run=: ;; --config) func_config ;; --dlopen|-dlopen) opt_dlopen="${opt_dlopen+$opt_dlopen }$1" shift ;; --preserve-dup-deps) opt_preserve_dup_deps=: ;; --features) func_features ;; --finish) set dummy --mode finish ${1+"$@"}; shift ;; --help) opt_help=: ;; --help-all) opt_help=': help-all' ;; --mode) test $# = 0 && func_missing_arg $_G_opt && break opt_mode=$1 case $1 in # Valid mode arguments: clean|compile|execute|finish|install|link|relink|uninstall) ;; # Catch anything else as an error *) func_error "invalid argument for $_G_opt" exit_cmd=exit break ;; esac shift ;; --no-silent|--no-quiet) opt_quiet=false func_append preserve_args " $_G_opt" ;; --no-warnings|--no-warning|--no-warn) opt_warning=false func_append preserve_args " $_G_opt" ;; --no-verbose) opt_verbose=false func_append preserve_args " $_G_opt" ;; --silent|--quiet) opt_quiet=: opt_verbose=false func_append preserve_args " $_G_opt" ;; --tag) test $# = 0 && func_missing_arg $_G_opt && break opt_tag=$1 func_append preserve_args " $_G_opt $1" func_enable_tag "$1" shift ;; --verbose|-v) opt_quiet=false opt_verbose=: func_append preserve_args " $_G_opt" ;; # An option not handled by this hook function: *) set dummy "$_G_opt" ${1+"$@"}; shift; break ;; esac done # save modified positional parameters for caller func_quote_for_eval ${1+"$@"} libtool_parse_options_result=$func_quote_for_eval_result } func_add_hook func_parse_options libtool_parse_options # libtool_validate_options [ARG]... # --------------------------------- # Perform any sanity checks on option settings and/or unconsumed # arguments. libtool_validate_options () { # save first non-option argument if test 0 -lt $#; then nonopt=$1 shift fi # preserve --debug test : = "$debug_cmd" || func_append preserve_args " --debug" case $host in # Solaris2 added to fix http://debbugs.gnu.org/cgi/bugreport.cgi?bug=16452 # see also: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59788 *cygwin* | *mingw* | *pw32* | *cegcc* | *solaris2* | *os2*) # don't eliminate duplications in $postdeps and $predeps opt_duplicate_compiler_generated_deps=: ;; *) opt_duplicate_compiler_generated_deps=$opt_preserve_dup_deps ;; esac $opt_help || { # Sanity checks first: func_check_version_match test yes != "$build_libtool_libs" \ && test yes != "$build_old_libs" \ && func_fatal_configuration "not configured to build any kind of library" # Darwin sucks eval std_shrext=\"$shrext_cmds\" # Only execute mode is allowed to have -dlopen flags. if test -n "$opt_dlopen" && test execute != "$opt_mode"; then func_error "unrecognized option '-dlopen'" $ECHO "$help" 1>&2 exit $EXIT_FAILURE fi # Change the help message to a mode-specific one. generic_help=$help help="Try '$progname --help --mode=$opt_mode' for more information." } # Pass back the unparsed argument list func_quote_for_eval ${1+"$@"} libtool_validate_options_result=$func_quote_for_eval_result } func_add_hook func_validate_options libtool_validate_options # Process options as early as possible so that --help and --version # can return quickly. func_options ${1+"$@"} eval set dummy "$func_options_result"; shift ## ----------- ## ## Main. ## ## ----------- ## magic='%%%MAGIC variable%%%' magic_exe='%%%MAGIC EXE variable%%%' # Global variables. extracted_archives= extracted_serial=0 # If this variable is set in any of the actions, the command in it # will be execed at the end. This prevents here-documents from being # left over by shells. exec_cmd= # A function that is used when there is no print builtin or printf. func_fallback_echo () { eval 'cat <<_LTECHO_EOF $1 _LTECHO_EOF' } # func_generated_by_libtool # True iff stdin has been generated by Libtool. This function is only # a basic sanity check; it will hardly flush out determined imposters. func_generated_by_libtool_p () { $GREP "^# Generated by .*$PACKAGE" > /dev/null 2>&1 } # func_lalib_p file # True iff FILE is a libtool '.la' library or '.lo' object file. # This function is only a basic sanity check; it will hardly flush out # determined imposters. func_lalib_p () { test -f "$1" && $SED -e 4q "$1" 2>/dev/null | func_generated_by_libtool_p } # func_lalib_unsafe_p file # True iff FILE is a libtool '.la' library or '.lo' object file. # This function implements the same check as func_lalib_p without # resorting to external programs. To this end, it redirects stdin and # closes it afterwards, without saving the original file descriptor. # As a safety measure, use it only where a negative result would be # fatal anyway. Works if 'file' does not exist. func_lalib_unsafe_p () { lalib_p=no if test -f "$1" && test -r "$1" && exec 5<&0 <"$1"; then for lalib_p_l in 1 2 3 4 do read lalib_p_line case $lalib_p_line in \#\ Generated\ by\ *$PACKAGE* ) lalib_p=yes; break;; esac done exec 0<&5 5<&- fi test yes = "$lalib_p" } # func_ltwrapper_script_p file # True iff FILE is a libtool wrapper script # This function is only a basic sanity check; it will hardly flush out # determined imposters. func_ltwrapper_script_p () { test -f "$1" && $lt_truncate_bin < "$1" 2>/dev/null | func_generated_by_libtool_p } # func_ltwrapper_executable_p file # True iff FILE is a libtool wrapper executable # This function is only a basic sanity check; it will hardly flush out # determined imposters. func_ltwrapper_executable_p () { func_ltwrapper_exec_suffix= case $1 in *.exe) ;; *) func_ltwrapper_exec_suffix=.exe ;; esac $GREP "$magic_exe" "$1$func_ltwrapper_exec_suffix" >/dev/null 2>&1 } # func_ltwrapper_scriptname file # Assumes file is an ltwrapper_executable # uses $file to determine the appropriate filename for a # temporary ltwrapper_script. func_ltwrapper_scriptname () { func_dirname_and_basename "$1" "" "." func_stripname '' '.exe' "$func_basename_result" func_ltwrapper_scriptname_result=$func_dirname_result/$objdir/${func_stripname_result}_ltshwrapper } # func_ltwrapper_p file # True iff FILE is a libtool wrapper script or wrapper executable # This function is only a basic sanity check; it will hardly flush out # determined imposters. func_ltwrapper_p () { func_ltwrapper_script_p "$1" || func_ltwrapper_executable_p "$1" } # func_execute_cmds commands fail_cmd # Execute tilde-delimited COMMANDS. # If FAIL_CMD is given, eval that upon failure. # FAIL_CMD may read-access the current command in variable CMD! func_execute_cmds () { $debug_cmd save_ifs=$IFS; IFS='~' for cmd in $1; do IFS=$sp$nl eval cmd=\"$cmd\" IFS=$save_ifs func_show_eval "$cmd" "${2-:}" done IFS=$save_ifs } # func_source file # Source FILE, adding directory component if necessary. # Note that it is not necessary on cygwin/mingw to append a dot to # FILE even if both FILE and FILE.exe exist: automatic-append-.exe # behavior happens only for exec(3), not for open(2)! Also, sourcing # 'FILE.' does not work on cygwin managed mounts. func_source () { $debug_cmd case $1 in */* | *\\*) . "$1" ;; *) . "./$1" ;; esac } # func_resolve_sysroot PATH # Replace a leading = in PATH with a sysroot. Store the result into # func_resolve_sysroot_result func_resolve_sysroot () { func_resolve_sysroot_result=$1 case $func_resolve_sysroot_result in =*) func_stripname '=' '' "$func_resolve_sysroot_result" func_resolve_sysroot_result=$lt_sysroot$func_stripname_result ;; esac } # func_replace_sysroot PATH # If PATH begins with the sysroot, replace it with = and # store the result into func_replace_sysroot_result. func_replace_sysroot () { case $lt_sysroot:$1 in ?*:"$lt_sysroot"*) func_stripname "$lt_sysroot" '' "$1" func_replace_sysroot_result='='$func_stripname_result ;; *) # Including no sysroot. func_replace_sysroot_result=$1 ;; esac } # func_infer_tag arg # Infer tagged configuration to use if any are available and # if one wasn't chosen via the "--tag" command line option. # Only attempt this if the compiler in the base compile # command doesn't match the default compiler. # arg is usually of the form 'gcc ...' func_infer_tag () { $debug_cmd if test -n "$available_tags" && test -z "$tagname"; then CC_quoted= for arg in $CC; do func_append_quoted CC_quoted "$arg" done CC_expanded=`func_echo_all $CC` CC_quoted_expanded=`func_echo_all $CC_quoted` case $@ in # Blanks in the command may have been stripped by the calling shell, # but not from the CC environment variable when configure was run. " $CC "* | "$CC "* | " $CC_expanded "* | "$CC_expanded "* | \ " $CC_quoted"* | "$CC_quoted "* | " $CC_quoted_expanded "* | "$CC_quoted_expanded "*) ;; # Blanks at the start of $base_compile will cause this to fail # if we don't check for them as well. *) for z in $available_tags; do if $GREP "^# ### BEGIN LIBTOOL TAG CONFIG: $z$" < "$progpath" > /dev/null; then # Evaluate the configuration. eval "`$SED -n -e '/^# ### BEGIN LIBTOOL TAG CONFIG: '$z'$/,/^# ### END LIBTOOL TAG CONFIG: '$z'$/p' < $progpath`" CC_quoted= for arg in $CC; do # Double-quote args containing other shell metacharacters. func_append_quoted CC_quoted "$arg" done CC_expanded=`func_echo_all $CC` CC_quoted_expanded=`func_echo_all $CC_quoted` case "$@ " in " $CC "* | "$CC "* | " $CC_expanded "* | "$CC_expanded "* | \ " $CC_quoted"* | "$CC_quoted "* | " $CC_quoted_expanded "* | "$CC_quoted_expanded "*) # The compiler in the base compile command matches # the one in the tagged configuration. # Assume this is the tagged configuration we want. tagname=$z break ;; esac fi done # If $tagname still isn't set, then no tagged configuration # was found and let the user know that the "--tag" command # line option must be used. if test -z "$tagname"; then func_echo "unable to infer tagged configuration" func_fatal_error "specify a tag with '--tag'" # else # func_verbose "using $tagname tagged configuration" fi ;; esac fi } # func_write_libtool_object output_name pic_name nonpic_name # Create a libtool object file (analogous to a ".la" file), # but don't create it if we're doing a dry run. func_write_libtool_object () { write_libobj=$1 if test yes = "$build_libtool_libs"; then write_lobj=\'$2\' else write_lobj=none fi if test yes = "$build_old_libs"; then write_oldobj=\'$3\' else write_oldobj=none fi $opt_dry_run || { cat >${write_libobj}T </dev/null` if test "$?" -eq 0 && test -n "$func_convert_core_file_wine_to_w32_tmp"; then func_convert_core_file_wine_to_w32_result=`$ECHO "$func_convert_core_file_wine_to_w32_tmp" | $SED -e "$sed_naive_backslashify"` else func_convert_core_file_wine_to_w32_result= fi fi } # end: func_convert_core_file_wine_to_w32 # func_convert_core_path_wine_to_w32 ARG # Helper function used by path conversion functions when $build is *nix, and # $host is mingw, cygwin, or some other w32 environment. Relies on a correctly # configured wine environment available, with the winepath program in $build's # $PATH. Assumes ARG has no leading or trailing path separator characters. # # ARG is path to be converted from $build format to win32. # Result is available in $func_convert_core_path_wine_to_w32_result. # Unconvertible file (directory) names in ARG are skipped; if no directory names # are convertible, then the result may be empty. func_convert_core_path_wine_to_w32 () { $debug_cmd # unfortunately, winepath doesn't convert paths, only file names func_convert_core_path_wine_to_w32_result= if test -n "$1"; then oldIFS=$IFS IFS=: for func_convert_core_path_wine_to_w32_f in $1; do IFS=$oldIFS func_convert_core_file_wine_to_w32 "$func_convert_core_path_wine_to_w32_f" if test -n "$func_convert_core_file_wine_to_w32_result"; then if test -z "$func_convert_core_path_wine_to_w32_result"; then func_convert_core_path_wine_to_w32_result=$func_convert_core_file_wine_to_w32_result else func_append func_convert_core_path_wine_to_w32_result ";$func_convert_core_file_wine_to_w32_result" fi fi done IFS=$oldIFS fi } # end: func_convert_core_path_wine_to_w32 # func_cygpath ARGS... # Wrapper around calling the cygpath program via LT_CYGPATH. This is used when # when (1) $build is *nix and Cygwin is hosted via a wine environment; or (2) # $build is MSYS and $host is Cygwin, or (3) $build is Cygwin. In case (1) or # (2), returns the Cygwin file name or path in func_cygpath_result (input # file name or path is assumed to be in w32 format, as previously converted # from $build's *nix or MSYS format). In case (3), returns the w32 file name # or path in func_cygpath_result (input file name or path is assumed to be in # Cygwin format). Returns an empty string on error. # # ARGS are passed to cygpath, with the last one being the file name or path to # be converted. # # Specify the absolute *nix (or w32) name to cygpath in the LT_CYGPATH # environment variable; do not put it in $PATH. func_cygpath () { $debug_cmd if test -n "$LT_CYGPATH" && test -f "$LT_CYGPATH"; then func_cygpath_result=`$LT_CYGPATH "$@" 2>/dev/null` if test "$?" -ne 0; then # on failure, ensure result is empty func_cygpath_result= fi else func_cygpath_result= func_error "LT_CYGPATH is empty or specifies non-existent file: '$LT_CYGPATH'" fi } #end: func_cygpath # func_convert_core_msys_to_w32 ARG # Convert file name or path ARG from MSYS format to w32 format. Return # result in func_convert_core_msys_to_w32_result. func_convert_core_msys_to_w32 () { $debug_cmd # awkward: cmd appends spaces to result func_convert_core_msys_to_w32_result=`( cmd //c echo "$1" ) 2>/dev/null | $SED -e 's/[ ]*$//' -e "$sed_naive_backslashify"` } #end: func_convert_core_msys_to_w32 # func_convert_file_check ARG1 ARG2 # Verify that ARG1 (a file name in $build format) was converted to $host # format in ARG2. Otherwise, emit an error message, but continue (resetting # func_to_host_file_result to ARG1). func_convert_file_check () { $debug_cmd if test -z "$2" && test -n "$1"; then func_error "Could not determine host file name corresponding to" func_error " '$1'" func_error "Continuing, but uninstalled executables may not work." # Fallback: func_to_host_file_result=$1 fi } # end func_convert_file_check # func_convert_path_check FROM_PATHSEP TO_PATHSEP FROM_PATH TO_PATH # Verify that FROM_PATH (a path in $build format) was converted to $host # format in TO_PATH. Otherwise, emit an error message, but continue, resetting # func_to_host_file_result to a simplistic fallback value (see below). func_convert_path_check () { $debug_cmd if test -z "$4" && test -n "$3"; then func_error "Could not determine the host path corresponding to" func_error " '$3'" func_error "Continuing, but uninstalled executables may not work." # Fallback. This is a deliberately simplistic "conversion" and # should not be "improved". See libtool.info. if test "x$1" != "x$2"; then lt_replace_pathsep_chars="s|$1|$2|g" func_to_host_path_result=`echo "$3" | $SED -e "$lt_replace_pathsep_chars"` else func_to_host_path_result=$3 fi fi } # end func_convert_path_check # func_convert_path_front_back_pathsep FRONTPAT BACKPAT REPL ORIG # Modifies func_to_host_path_result by prepending REPL if ORIG matches FRONTPAT # and appending REPL if ORIG matches BACKPAT. func_convert_path_front_back_pathsep () { $debug_cmd case $4 in $1 ) func_to_host_path_result=$3$func_to_host_path_result ;; esac case $4 in $2 ) func_append func_to_host_path_result "$3" ;; esac } # end func_convert_path_front_back_pathsep ################################################## # $build to $host FILE NAME CONVERSION FUNCTIONS # ################################################## # invoked via '$to_host_file_cmd ARG' # # In each case, ARG is the path to be converted from $build to $host format. # Result will be available in $func_to_host_file_result. # func_to_host_file ARG # Converts the file name ARG from $build format to $host format. Return result # in func_to_host_file_result. func_to_host_file () { $debug_cmd $to_host_file_cmd "$1" } # end func_to_host_file # func_to_tool_file ARG LAZY # converts the file name ARG from $build format to toolchain format. Return # result in func_to_tool_file_result. If the conversion in use is listed # in (the comma separated) LAZY, no conversion takes place. func_to_tool_file () { $debug_cmd case ,$2, in *,"$to_tool_file_cmd",*) func_to_tool_file_result=$1 ;; *) $to_tool_file_cmd "$1" func_to_tool_file_result=$func_to_host_file_result ;; esac } # end func_to_tool_file # func_convert_file_noop ARG # Copy ARG to func_to_host_file_result. func_convert_file_noop () { func_to_host_file_result=$1 } # end func_convert_file_noop # func_convert_file_msys_to_w32 ARG # Convert file name ARG from (mingw) MSYS to (mingw) w32 format; automatic # conversion to w32 is not available inside the cwrapper. Returns result in # func_to_host_file_result. func_convert_file_msys_to_w32 () { $debug_cmd func_to_host_file_result=$1 if test -n "$1"; then func_convert_core_msys_to_w32 "$1" func_to_host_file_result=$func_convert_core_msys_to_w32_result fi func_convert_file_check "$1" "$func_to_host_file_result" } # end func_convert_file_msys_to_w32 # func_convert_file_cygwin_to_w32 ARG # Convert file name ARG from Cygwin to w32 format. Returns result in # func_to_host_file_result. func_convert_file_cygwin_to_w32 () { $debug_cmd func_to_host_file_result=$1 if test -n "$1"; then # because $build is cygwin, we call "the" cygpath in $PATH; no need to use # LT_CYGPATH in this case. func_to_host_file_result=`cygpath -m "$1"` fi func_convert_file_check "$1" "$func_to_host_file_result" } # end func_convert_file_cygwin_to_w32 # func_convert_file_nix_to_w32 ARG # Convert file name ARG from *nix to w32 format. Requires a wine environment # and a working winepath. Returns result in func_to_host_file_result. func_convert_file_nix_to_w32 () { $debug_cmd func_to_host_file_result=$1 if test -n "$1"; then func_convert_core_file_wine_to_w32 "$1" func_to_host_file_result=$func_convert_core_file_wine_to_w32_result fi func_convert_file_check "$1" "$func_to_host_file_result" } # end func_convert_file_nix_to_w32 # func_convert_file_msys_to_cygwin ARG # Convert file name ARG from MSYS to Cygwin format. Requires LT_CYGPATH set. # Returns result in func_to_host_file_result. func_convert_file_msys_to_cygwin () { $debug_cmd func_to_host_file_result=$1 if test -n "$1"; then func_convert_core_msys_to_w32 "$1" func_cygpath -u "$func_convert_core_msys_to_w32_result" func_to_host_file_result=$func_cygpath_result fi func_convert_file_check "$1" "$func_to_host_file_result" } # end func_convert_file_msys_to_cygwin # func_convert_file_nix_to_cygwin ARG # Convert file name ARG from *nix to Cygwin format. Requires Cygwin installed # in a wine environment, working winepath, and LT_CYGPATH set. Returns result # in func_to_host_file_result. func_convert_file_nix_to_cygwin () { $debug_cmd func_to_host_file_result=$1 if test -n "$1"; then # convert from *nix to w32, then use cygpath to convert from w32 to cygwin. func_convert_core_file_wine_to_w32 "$1" func_cygpath -u "$func_convert_core_file_wine_to_w32_result" func_to_host_file_result=$func_cygpath_result fi func_convert_file_check "$1" "$func_to_host_file_result" } # end func_convert_file_nix_to_cygwin ############################################# # $build to $host PATH CONVERSION FUNCTIONS # ############################################# # invoked via '$to_host_path_cmd ARG' # # In each case, ARG is the path to be converted from $build to $host format. # The result will be available in $func_to_host_path_result. # # Path separators are also converted from $build format to $host format. If # ARG begins or ends with a path separator character, it is preserved (but # converted to $host format) on output. # # All path conversion functions are named using the following convention: # file name conversion function : func_convert_file_X_to_Y () # path conversion function : func_convert_path_X_to_Y () # where, for any given $build/$host combination the 'X_to_Y' value is the # same. If conversion functions are added for new $build/$host combinations, # the two new functions must follow this pattern, or func_init_to_host_path_cmd # will break. # func_init_to_host_path_cmd # Ensures that function "pointer" variable $to_host_path_cmd is set to the # appropriate value, based on the value of $to_host_file_cmd. to_host_path_cmd= func_init_to_host_path_cmd () { $debug_cmd if test -z "$to_host_path_cmd"; then func_stripname 'func_convert_file_' '' "$to_host_file_cmd" to_host_path_cmd=func_convert_path_$func_stripname_result fi } # func_to_host_path ARG # Converts the path ARG from $build format to $host format. Return result # in func_to_host_path_result. func_to_host_path () { $debug_cmd func_init_to_host_path_cmd $to_host_path_cmd "$1" } # end func_to_host_path # func_convert_path_noop ARG # Copy ARG to func_to_host_path_result. func_convert_path_noop () { func_to_host_path_result=$1 } # end func_convert_path_noop # func_convert_path_msys_to_w32 ARG # Convert path ARG from (mingw) MSYS to (mingw) w32 format; automatic # conversion to w32 is not available inside the cwrapper. Returns result in # func_to_host_path_result. func_convert_path_msys_to_w32 () { $debug_cmd func_to_host_path_result=$1 if test -n "$1"; then # Remove leading and trailing path separator characters from ARG. MSYS # behavior is inconsistent here; cygpath turns them into '.;' and ';.'; # and winepath ignores them completely. func_stripname : : "$1" func_to_host_path_tmp1=$func_stripname_result func_convert_core_msys_to_w32 "$func_to_host_path_tmp1" func_to_host_path_result=$func_convert_core_msys_to_w32_result func_convert_path_check : ";" \ "$func_to_host_path_tmp1" "$func_to_host_path_result" func_convert_path_front_back_pathsep ":*" "*:" ";" "$1" fi } # end func_convert_path_msys_to_w32 # func_convert_path_cygwin_to_w32 ARG # Convert path ARG from Cygwin to w32 format. Returns result in # func_to_host_file_result. func_convert_path_cygwin_to_w32 () { $debug_cmd func_to_host_path_result=$1 if test -n "$1"; then # See func_convert_path_msys_to_w32: func_stripname : : "$1" func_to_host_path_tmp1=$func_stripname_result func_to_host_path_result=`cygpath -m -p "$func_to_host_path_tmp1"` func_convert_path_check : ";" \ "$func_to_host_path_tmp1" "$func_to_host_path_result" func_convert_path_front_back_pathsep ":*" "*:" ";" "$1" fi } # end func_convert_path_cygwin_to_w32 # func_convert_path_nix_to_w32 ARG # Convert path ARG from *nix to w32 format. Requires a wine environment and # a working winepath. Returns result in func_to_host_file_result. func_convert_path_nix_to_w32 () { $debug_cmd func_to_host_path_result=$1 if test -n "$1"; then # See func_convert_path_msys_to_w32: func_stripname : : "$1" func_to_host_path_tmp1=$func_stripname_result func_convert_core_path_wine_to_w32 "$func_to_host_path_tmp1" func_to_host_path_result=$func_convert_core_path_wine_to_w32_result func_convert_path_check : ";" \ "$func_to_host_path_tmp1" "$func_to_host_path_result" func_convert_path_front_back_pathsep ":*" "*:" ";" "$1" fi } # end func_convert_path_nix_to_w32 # func_convert_path_msys_to_cygwin ARG # Convert path ARG from MSYS to Cygwin format. Requires LT_CYGPATH set. # Returns result in func_to_host_file_result. func_convert_path_msys_to_cygwin () { $debug_cmd func_to_host_path_result=$1 if test -n "$1"; then # See func_convert_path_msys_to_w32: func_stripname : : "$1" func_to_host_path_tmp1=$func_stripname_result func_convert_core_msys_to_w32 "$func_to_host_path_tmp1" func_cygpath -u -p "$func_convert_core_msys_to_w32_result" func_to_host_path_result=$func_cygpath_result func_convert_path_check : : \ "$func_to_host_path_tmp1" "$func_to_host_path_result" func_convert_path_front_back_pathsep ":*" "*:" : "$1" fi } # end func_convert_path_msys_to_cygwin # func_convert_path_nix_to_cygwin ARG # Convert path ARG from *nix to Cygwin format. Requires Cygwin installed in a # a wine environment, working winepath, and LT_CYGPATH set. Returns result in # func_to_host_file_result. func_convert_path_nix_to_cygwin () { $debug_cmd func_to_host_path_result=$1 if test -n "$1"; then # Remove leading and trailing path separator characters from # ARG. msys behavior is inconsistent here, cygpath turns them # into '.;' and ';.', and winepath ignores them completely. func_stripname : : "$1" func_to_host_path_tmp1=$func_stripname_result func_convert_core_path_wine_to_w32 "$func_to_host_path_tmp1" func_cygpath -u -p "$func_convert_core_path_wine_to_w32_result" func_to_host_path_result=$func_cygpath_result func_convert_path_check : : \ "$func_to_host_path_tmp1" "$func_to_host_path_result" func_convert_path_front_back_pathsep ":*" "*:" : "$1" fi } # end func_convert_path_nix_to_cygwin # func_dll_def_p FILE # True iff FILE is a Windows DLL '.def' file. # Keep in sync with _LT_DLL_DEF_P in libtool.m4 func_dll_def_p () { $debug_cmd func_dll_def_p_tmp=`$SED -n \ -e 's/^[ ]*//' \ -e '/^\(;.*\)*$/d' \ -e 's/^\(EXPORTS\|LIBRARY\)\([ ].*\)*$/DEF/p' \ -e q \ "$1"` test DEF = "$func_dll_def_p_tmp" } # func_mode_compile arg... func_mode_compile () { $debug_cmd # Get the compilation command and the source file. base_compile= srcfile=$nonopt # always keep a non-empty value in "srcfile" suppress_opt=yes suppress_output= arg_mode=normal libobj= later= pie_flag= for arg do case $arg_mode in arg ) # do not "continue". Instead, add this to base_compile lastarg=$arg arg_mode=normal ;; target ) libobj=$arg arg_mode=normal continue ;; normal ) # Accept any command-line options. case $arg in -o) test -n "$libobj" && \ func_fatal_error "you cannot specify '-o' more than once" arg_mode=target continue ;; -pie | -fpie | -fPIE) func_append pie_flag " $arg" continue ;; -shared | -static | -prefer-pic | -prefer-non-pic) func_append later " $arg" continue ;; -no-suppress) suppress_opt=no continue ;; -Xcompiler) arg_mode=arg # the next one goes into the "base_compile" arg list continue # The current "srcfile" will either be retained or ;; # replaced later. I would guess that would be a bug. -Wc,*) func_stripname '-Wc,' '' "$arg" args=$func_stripname_result lastarg= save_ifs=$IFS; IFS=, for arg in $args; do IFS=$save_ifs func_append_quoted lastarg "$arg" done IFS=$save_ifs func_stripname ' ' '' "$lastarg" lastarg=$func_stripname_result # Add the arguments to base_compile. func_append base_compile " $lastarg" continue ;; *) # Accept the current argument as the source file. # The previous "srcfile" becomes the current argument. # lastarg=$srcfile srcfile=$arg ;; esac # case $arg ;; esac # case $arg_mode # Aesthetically quote the previous argument. func_append_quoted base_compile "$lastarg" done # for arg case $arg_mode in arg) func_fatal_error "you must specify an argument for -Xcompile" ;; target) func_fatal_error "you must specify a target with '-o'" ;; *) # Get the name of the library object. test -z "$libobj" && { func_basename "$srcfile" libobj=$func_basename_result } ;; esac # Recognize several different file suffixes. # If the user specifies -o file.o, it is replaced with file.lo case $libobj in *.[cCFSifmso] | \ *.ada | *.adb | *.ads | *.asm | \ *.c++ | *.cc | *.ii | *.class | *.cpp | *.cxx | \ *.[fF][09]? | *.for | *.java | *.go | *.obj | *.sx | *.cu | *.cup) func_xform "$libobj" libobj=$func_xform_result ;; esac case $libobj in *.lo) func_lo2o "$libobj"; obj=$func_lo2o_result ;; *) func_fatal_error "cannot determine name of library object from '$libobj'" ;; esac func_infer_tag $base_compile for arg in $later; do case $arg in -shared) test yes = "$build_libtool_libs" \ || func_fatal_configuration "cannot build a shared library" build_old_libs=no continue ;; -static) build_libtool_libs=no build_old_libs=yes continue ;; -prefer-pic) pic_mode=yes continue ;; -prefer-non-pic) pic_mode=no continue ;; esac done func_quote_for_eval "$libobj" test "X$libobj" != "X$func_quote_for_eval_result" \ && $ECHO "X$libobj" | $GREP '[]~#^*{};<>?"'"'"' &()|`$[]' \ && func_warning "libobj name '$libobj' may not contain shell special characters." func_dirname_and_basename "$obj" "/" "" objname=$func_basename_result xdir=$func_dirname_result lobj=$xdir$objdir/$objname test -z "$base_compile" && \ func_fatal_help "you must specify a compilation command" # Delete any leftover library objects. if test yes = "$build_old_libs"; then removelist="$obj $lobj $libobj ${libobj}T" else removelist="$lobj $libobj ${libobj}T" fi # On Cygwin there's no "real" PIC flag so we must build both object types case $host_os in cygwin* | mingw* | pw32* | os2* | cegcc*) pic_mode=default ;; esac if test no = "$pic_mode" && test pass_all != "$deplibs_check_method"; then # non-PIC code in shared libraries is not supported pic_mode=default fi # Calculate the filename of the output object if compiler does # not support -o with -c if test no = "$compiler_c_o"; then output_obj=`$ECHO "$srcfile" | $SED 's%^.*/%%; s%\.[^.]*$%%'`.$objext lockfile=$output_obj.lock else output_obj= need_locks=no lockfile= fi # Lock this critical section if it is needed # We use this script file to make the link, it avoids creating a new file if test yes = "$need_locks"; then until $opt_dry_run || ln "$progpath" "$lockfile" 2>/dev/null; do func_echo "Waiting for $lockfile to be removed" sleep 2 done elif test warn = "$need_locks"; then if test -f "$lockfile"; then $ECHO "\ *** ERROR, $lockfile exists and contains: `cat $lockfile 2>/dev/null` This indicates that another process is trying to use the same temporary object file, and libtool could not work around it because your compiler does not support '-c' and '-o' together. If you repeat this compilation, it may succeed, by chance, but you had better avoid parallel builds (make -j) in this platform, or get a better compiler." $opt_dry_run || $RM $removelist exit $EXIT_FAILURE fi func_append removelist " $output_obj" $ECHO "$srcfile" > "$lockfile" fi $opt_dry_run || $RM $removelist func_append removelist " $lockfile" trap '$opt_dry_run || $RM $removelist; exit $EXIT_FAILURE' 1 2 15 func_to_tool_file "$srcfile" func_convert_file_msys_to_w32 srcfile=$func_to_tool_file_result func_quote_for_eval "$srcfile" qsrcfile=$func_quote_for_eval_result # Only build a PIC object if we are building libtool libraries. if test yes = "$build_libtool_libs"; then # Without this assignment, base_compile gets emptied. fbsd_hideous_sh_bug=$base_compile if test no != "$pic_mode"; then command="$base_compile $qsrcfile $pic_flag" else # Don't build PIC code command="$base_compile $qsrcfile" fi func_mkdir_p "$xdir$objdir" if test -z "$output_obj"; then # Place PIC objects in $objdir func_append command " -o $lobj" fi func_show_eval_locale "$command" \ 'test -n "$output_obj" && $RM $removelist; exit $EXIT_FAILURE' if test warn = "$need_locks" && test "X`cat $lockfile 2>/dev/null`" != "X$srcfile"; then $ECHO "\ *** ERROR, $lockfile contains: `cat $lockfile 2>/dev/null` but it should contain: $srcfile This indicates that another process is trying to use the same temporary object file, and libtool could not work around it because your compiler does not support '-c' and '-o' together. If you repeat this compilation, it may succeed, by chance, but you had better avoid parallel builds (make -j) in this platform, or get a better compiler." $opt_dry_run || $RM $removelist exit $EXIT_FAILURE fi # Just move the object if needed, then go on to compile the next one if test -n "$output_obj" && test "X$output_obj" != "X$lobj"; then func_show_eval '$MV "$output_obj" "$lobj"' \ 'error=$?; $opt_dry_run || $RM $removelist; exit $error' fi # Allow error messages only from the first compilation. if test yes = "$suppress_opt"; then suppress_output=' >/dev/null 2>&1' fi fi # Only build a position-dependent object if we build old libraries. if test yes = "$build_old_libs"; then if test yes != "$pic_mode"; then # Don't build PIC code command="$base_compile $qsrcfile$pie_flag" else command="$base_compile $qsrcfile $pic_flag" fi if test yes = "$compiler_c_o"; then func_append command " -o $obj" fi # Suppress compiler output if we already did a PIC compilation. func_append command "$suppress_output" func_show_eval_locale "$command" \ '$opt_dry_run || $RM $removelist; exit $EXIT_FAILURE' if test warn = "$need_locks" && test "X`cat $lockfile 2>/dev/null`" != "X$srcfile"; then $ECHO "\ *** ERROR, $lockfile contains: `cat $lockfile 2>/dev/null` but it should contain: $srcfile This indicates that another process is trying to use the same temporary object file, and libtool could not work around it because your compiler does not support '-c' and '-o' together. If you repeat this compilation, it may succeed, by chance, but you had better avoid parallel builds (make -j) in this platform, or get a better compiler." $opt_dry_run || $RM $removelist exit $EXIT_FAILURE fi # Just move the object if needed if test -n "$output_obj" && test "X$output_obj" != "X$obj"; then func_show_eval '$MV "$output_obj" "$obj"' \ 'error=$?; $opt_dry_run || $RM $removelist; exit $error' fi fi $opt_dry_run || { func_write_libtool_object "$libobj" "$objdir/$objname" "$objname" # Unlock the critical section if it was locked if test no != "$need_locks"; then removelist=$lockfile $RM "$lockfile" fi } exit $EXIT_SUCCESS } $opt_help || { test compile = "$opt_mode" && func_mode_compile ${1+"$@"} } func_mode_help () { # We need to display help for each of the modes. case $opt_mode in "") # Generic help is extracted from the usage comments # at the start of this file. func_help ;; clean) $ECHO \ "Usage: $progname [OPTION]... --mode=clean RM [RM-OPTION]... FILE... Remove files from the build directory. RM is the name of the program to use to delete files associated with each FILE (typically '/bin/rm'). RM-OPTIONS are options (such as '-f') to be passed to RM. If FILE is a libtool library, object or program, all the files associated with it are deleted. Otherwise, only FILE itself is deleted using RM." ;; compile) $ECHO \ "Usage: $progname [OPTION]... --mode=compile COMPILE-COMMAND... SOURCEFILE Compile a source file into a libtool library object. This mode accepts the following additional options: -o OUTPUT-FILE set the output file name to OUTPUT-FILE -no-suppress do not suppress compiler output for multiple passes -prefer-pic try to build PIC objects only -prefer-non-pic try to build non-PIC objects only -shared do not build a '.o' file suitable for static linking -static only build a '.o' file suitable for static linking -Wc,FLAG pass FLAG directly to the compiler COMPILE-COMMAND is a command to be used in creating a 'standard' object file from the given SOURCEFILE. The output file name is determined by removing the directory component from SOURCEFILE, then substituting the C source code suffix '.c' with the library object suffix, '.lo'." ;; execute) $ECHO \ "Usage: $progname [OPTION]... --mode=execute COMMAND [ARGS]... Automatically set library path, then run a program. This mode accepts the following additional options: -dlopen FILE add the directory containing FILE to the library path This mode sets the library path environment variable according to '-dlopen' flags. If any of the ARGS are libtool executable wrappers, then they are translated into their corresponding uninstalled binary, and any of their required library directories are added to the library path. Then, COMMAND is executed, with ARGS as arguments." ;; finish) $ECHO \ "Usage: $progname [OPTION]... --mode=finish [LIBDIR]... Complete the installation of libtool libraries. Each LIBDIR is a directory that contains libtool libraries. The commands that this mode executes may require superuser privileges. Use the '--dry-run' option if you just want to see what would be executed." ;; install) $ECHO \ "Usage: $progname [OPTION]... --mode=install INSTALL-COMMAND... Install executables or libraries. INSTALL-COMMAND is the installation command. The first component should be either the 'install' or 'cp' program. The following components of INSTALL-COMMAND are treated specially: -inst-prefix-dir PREFIX-DIR Use PREFIX-DIR as a staging area for installation The rest of the components are interpreted as arguments to that command (only BSD-compatible install options are recognized)." ;; link) $ECHO \ "Usage: $progname [OPTION]... --mode=link LINK-COMMAND... Link object files or libraries together to form another library, or to create an executable program. LINK-COMMAND is a command using the C compiler that you would use to create a program from several object files. The following components of LINK-COMMAND are treated specially: -all-static do not do any dynamic linking at all -avoid-version do not add a version suffix if possible -bindir BINDIR specify path to binaries directory (for systems where libraries must be found in the PATH setting at runtime) -dlopen FILE '-dlpreopen' FILE if it cannot be dlopened at runtime -dlpreopen FILE link in FILE and add its symbols to lt_preloaded_symbols -export-dynamic allow symbols from OUTPUT-FILE to be resolved with dlsym(3) -export-symbols SYMFILE try to export only the symbols listed in SYMFILE -export-symbols-regex REGEX try to export only the symbols matching REGEX -LLIBDIR search LIBDIR for required installed libraries -lNAME OUTPUT-FILE requires the installed library libNAME -module build a library that can dlopened -no-fast-install disable the fast-install mode -no-install link a not-installable executable -no-undefined declare that a library does not refer to external symbols -o OUTPUT-FILE create OUTPUT-FILE from the specified objects -objectlist FILE use a list of object files found in FILE to specify objects -os2dllname NAME force a short DLL name on OS/2 (no effect on other OSes) -precious-files-regex REGEX don't remove output files matching REGEX -release RELEASE specify package release information -rpath LIBDIR the created library will eventually be installed in LIBDIR -R[ ]LIBDIR add LIBDIR to the runtime path of programs and libraries -shared only do dynamic linking of libtool libraries -shrext SUFFIX override the standard shared library file extension -static do not do any dynamic linking of uninstalled libtool libraries -static-libtool-libs do not do any dynamic linking of libtool libraries -version-info CURRENT[:REVISION[:AGE]] specify library version info [each variable defaults to 0] -weak LIBNAME declare that the target provides the LIBNAME interface -Wc,FLAG -Xcompiler FLAG pass linker-specific FLAG directly to the compiler -Wl,FLAG -Xlinker FLAG pass linker-specific FLAG directly to the linker -XCClinker FLAG pass link-specific FLAG to the compiler driver (CC) All other options (arguments beginning with '-') are ignored. Every other argument is treated as a filename. Files ending in '.la' are treated as uninstalled libtool libraries, other files are standard or library object files. If the OUTPUT-FILE ends in '.la', then a libtool library is created, only library objects ('.lo' files) may be specified, and '-rpath' is required, except when creating a convenience library. If OUTPUT-FILE ends in '.a' or '.lib', then a standard library is created using 'ar' and 'ranlib', or on Windows using 'lib'. If OUTPUT-FILE ends in '.lo' or '.$objext', then a reloadable object file is created, otherwise an executable program is created." ;; uninstall) $ECHO \ "Usage: $progname [OPTION]... --mode=uninstall RM [RM-OPTION]... FILE... Remove libraries from an installation directory. RM is the name of the program to use to delete files associated with each FILE (typically '/bin/rm'). RM-OPTIONS are options (such as '-f') to be passed to RM. If FILE is a libtool library, all the files associated with it are deleted. Otherwise, only FILE itself is deleted using RM." ;; *) func_fatal_help "invalid operation mode '$opt_mode'" ;; esac echo $ECHO "Try '$progname --help' for more information about other modes." } # Now that we've collected a possible --mode arg, show help if necessary if $opt_help; then if test : = "$opt_help"; then func_mode_help else { func_help noexit for opt_mode in compile link execute install finish uninstall clean; do func_mode_help done } | $SED -n '1p; 2,$s/^Usage:/ or: /p' { func_help noexit for opt_mode in compile link execute install finish uninstall clean; do echo func_mode_help done } | $SED '1d /^When reporting/,/^Report/{ H d } $x /information about other modes/d /more detailed .*MODE/d s/^Usage:.*--mode=\([^ ]*\) .*/Description of \1 mode:/' fi exit $? fi # func_mode_execute arg... func_mode_execute () { $debug_cmd # The first argument is the command name. cmd=$nonopt test -z "$cmd" && \ func_fatal_help "you must specify a COMMAND" # Handle -dlopen flags immediately. for file in $opt_dlopen; do test -f "$file" \ || func_fatal_help "'$file' is not a file" dir= case $file in *.la) func_resolve_sysroot "$file" file=$func_resolve_sysroot_result # Check to see that this really is a libtool archive. func_lalib_unsafe_p "$file" \ || func_fatal_help "'$lib' is not a valid libtool archive" # Read the libtool library. dlname= library_names= func_source "$file" # Skip this library if it cannot be dlopened. if test -z "$dlname"; then # Warn if it was a shared library. test -n "$library_names" && \ func_warning "'$file' was not linked with '-export-dynamic'" continue fi func_dirname "$file" "" "." dir=$func_dirname_result if test -f "$dir/$objdir/$dlname"; then func_append dir "/$objdir" else if test ! -f "$dir/$dlname"; then func_fatal_error "cannot find '$dlname' in '$dir' or '$dir/$objdir'" fi fi ;; *.lo) # Just add the directory containing the .lo file. func_dirname "$file" "" "." dir=$func_dirname_result ;; *) func_warning "'-dlopen' is ignored for non-libtool libraries and objects" continue ;; esac # Get the absolute pathname. absdir=`cd "$dir" && pwd` test -n "$absdir" && dir=$absdir # Now add the directory to shlibpath_var. if eval "test -z \"\$$shlibpath_var\""; then eval "$shlibpath_var=\"\$dir\"" else eval "$shlibpath_var=\"\$dir:\$$shlibpath_var\"" fi done # This variable tells wrapper scripts just to set shlibpath_var # rather than running their programs. libtool_execute_magic=$magic # Check if any of the arguments is a wrapper script. args= for file do case $file in -* | *.la | *.lo ) ;; *) # Do a test to see if this is really a libtool program. if func_ltwrapper_script_p "$file"; then func_source "$file" # Transform arg to wrapped name. file=$progdir/$program elif func_ltwrapper_executable_p "$file"; then func_ltwrapper_scriptname "$file" func_source "$func_ltwrapper_scriptname_result" # Transform arg to wrapped name. file=$progdir/$program fi ;; esac # Quote arguments (to preserve shell metacharacters). func_append_quoted args "$file" done if $opt_dry_run; then # Display what would be done. if test -n "$shlibpath_var"; then eval "\$ECHO \"\$shlibpath_var=\$$shlibpath_var\"" echo "export $shlibpath_var" fi $ECHO "$cmd$args" exit $EXIT_SUCCESS else if test -n "$shlibpath_var"; then # Export the shlibpath_var. eval "export $shlibpath_var" fi # Restore saved environment variables for lt_var in LANG LANGUAGE LC_ALL LC_CTYPE LC_COLLATE LC_MESSAGES do eval "if test \"\${save_$lt_var+set}\" = set; then $lt_var=\$save_$lt_var; export $lt_var else $lt_unset $lt_var fi" done # Now prepare to actually exec the command. exec_cmd=\$cmd$args fi } test execute = "$opt_mode" && func_mode_execute ${1+"$@"} # func_mode_finish arg... func_mode_finish () { $debug_cmd libs= libdirs= admincmds= for opt in "$nonopt" ${1+"$@"} do if test -d "$opt"; then func_append libdirs " $opt" elif test -f "$opt"; then if func_lalib_unsafe_p "$opt"; then func_append libs " $opt" else func_warning "'$opt' is not a valid libtool archive" fi else func_fatal_error "invalid argument '$opt'" fi done if test -n "$libs"; then if test -n "$lt_sysroot"; then sysroot_regex=`$ECHO "$lt_sysroot" | $SED "$sed_make_literal_regex"` sysroot_cmd="s/\([ ']\)$sysroot_regex/\1/g;" else sysroot_cmd= fi # Remove sysroot references if $opt_dry_run; then for lib in $libs; do echo "removing references to $lt_sysroot and '=' prefixes from $lib" done else tmpdir=`func_mktempdir` for lib in $libs; do $SED -e "$sysroot_cmd s/\([ ']-[LR]\)=/\1/g; s/\([ ']\)=/\1/g" $lib \ > $tmpdir/tmp-la mv -f $tmpdir/tmp-la $lib done ${RM}r "$tmpdir" fi fi if test -n "$finish_cmds$finish_eval" && test -n "$libdirs"; then for libdir in $libdirs; do if test -n "$finish_cmds"; then # Do each command in the finish commands. func_execute_cmds "$finish_cmds" 'admincmds="$admincmds '"$cmd"'"' fi if test -n "$finish_eval"; then # Do the single finish_eval. eval cmds=\"$finish_eval\" $opt_dry_run || eval "$cmds" || func_append admincmds " $cmds" fi done fi # Exit here if they wanted silent mode. $opt_quiet && exit $EXIT_SUCCESS if test -n "$finish_cmds$finish_eval" && test -n "$libdirs"; then echo "----------------------------------------------------------------------" echo "Libraries have been installed in:" for libdir in $libdirs; do $ECHO " $libdir" done echo echo "If you ever happen to want to link against installed libraries" echo "in a given directory, LIBDIR, you must either use libtool, and" echo "specify the full pathname of the library, or use the '-LLIBDIR'" echo "flag during linking and do at least one of the following:" if test -n "$shlibpath_var"; then echo " - add LIBDIR to the '$shlibpath_var' environment variable" echo " during execution" fi if test -n "$runpath_var"; then echo " - add LIBDIR to the '$runpath_var' environment variable" echo " during linking" fi if test -n "$hardcode_libdir_flag_spec"; then libdir=LIBDIR eval flag=\"$hardcode_libdir_flag_spec\" $ECHO " - use the '$flag' linker flag" fi if test -n "$admincmds"; then $ECHO " - have your system administrator run these commands:$admincmds" fi if test -f /etc/ld.so.conf; then echo " - have your system administrator add LIBDIR to '/etc/ld.so.conf'" fi echo echo "See any operating system documentation about shared libraries for" case $host in solaris2.[6789]|solaris2.1[0-9]) echo "more information, such as the ld(1), crle(1) and ld.so(8) manual" echo "pages." ;; *) echo "more information, such as the ld(1) and ld.so(8) manual pages." ;; esac echo "----------------------------------------------------------------------" fi exit $EXIT_SUCCESS } test finish = "$opt_mode" && func_mode_finish ${1+"$@"} # func_mode_install arg... func_mode_install () { $debug_cmd # There may be an optional sh(1) argument at the beginning of # install_prog (especially on Windows NT). if test "$SHELL" = "$nonopt" || test /bin/sh = "$nonopt" || # Allow the use of GNU shtool's install command. case $nonopt in *shtool*) :;; *) false;; esac then # Aesthetically quote it. func_quote_for_eval "$nonopt" install_prog="$func_quote_for_eval_result " arg=$1 shift else install_prog= arg=$nonopt fi # The real first argument should be the name of the installation program. # Aesthetically quote it. func_quote_for_eval "$arg" func_append install_prog "$func_quote_for_eval_result" install_shared_prog=$install_prog case " $install_prog " in *[\\\ /]cp\ *) install_cp=: ;; *) install_cp=false ;; esac # We need to accept at least all the BSD install flags. dest= files= opts= prev= install_type= isdir=false stripme= no_mode=: for arg do arg2= if test -n "$dest"; then func_append files " $dest" dest=$arg continue fi case $arg in -d) isdir=: ;; -f) if $install_cp; then :; else prev=$arg fi ;; -g | -m | -o) prev=$arg ;; -s) stripme=" -s" continue ;; -*) ;; *) # If the previous option needed an argument, then skip it. if test -n "$prev"; then if test X-m = "X$prev" && test -n "$install_override_mode"; then arg2=$install_override_mode no_mode=false fi prev= else dest=$arg continue fi ;; esac # Aesthetically quote the argument. func_quote_for_eval "$arg" func_append install_prog " $func_quote_for_eval_result" if test -n "$arg2"; then func_quote_for_eval "$arg2" fi func_append install_shared_prog " $func_quote_for_eval_result" done test -z "$install_prog" && \ func_fatal_help "you must specify an install program" test -n "$prev" && \ func_fatal_help "the '$prev' option requires an argument" if test -n "$install_override_mode" && $no_mode; then if $install_cp; then :; else func_quote_for_eval "$install_override_mode" func_append install_shared_prog " -m $func_quote_for_eval_result" fi fi if test -z "$files"; then if test -z "$dest"; then func_fatal_help "no file or destination specified" else func_fatal_help "you must specify a destination" fi fi # Strip any trailing slash from the destination. func_stripname '' '/' "$dest" dest=$func_stripname_result # Check to see that the destination is a directory. test -d "$dest" && isdir=: if $isdir; then destdir=$dest destname= else func_dirname_and_basename "$dest" "" "." destdir=$func_dirname_result destname=$func_basename_result # Not a directory, so check to see that there is only one file specified. set dummy $files; shift test "$#" -gt 1 && \ func_fatal_help "'$dest' is not a directory" fi case $destdir in [\\/]* | [A-Za-z]:[\\/]*) ;; *) for file in $files; do case $file in *.lo) ;; *) func_fatal_help "'$destdir' must be an absolute directory name" ;; esac done ;; esac # This variable tells wrapper scripts just to set variables rather # than running their programs. libtool_install_magic=$magic staticlibs= future_libdirs= current_libdirs= for file in $files; do # Do each installation. case $file in *.$libext) # Do the static libraries later. func_append staticlibs " $file" ;; *.la) func_resolve_sysroot "$file" file=$func_resolve_sysroot_result # Check to see that this really is a libtool archive. func_lalib_unsafe_p "$file" \ || func_fatal_help "'$file' is not a valid libtool archive" library_names= old_library= relink_command= func_source "$file" # Add the libdir to current_libdirs if it is the destination. if test "X$destdir" = "X$libdir"; then case "$current_libdirs " in *" $libdir "*) ;; *) func_append current_libdirs " $libdir" ;; esac else # Note the libdir as a future libdir. case "$future_libdirs " in *" $libdir "*) ;; *) func_append future_libdirs " $libdir" ;; esac fi func_dirname "$file" "/" "" dir=$func_dirname_result func_append dir "$objdir" if test -n "$relink_command"; then # Determine the prefix the user has applied to our future dir. inst_prefix_dir=`$ECHO "$destdir" | $SED -e "s%$libdir\$%%"` # Don't allow the user to place us outside of our expected # location b/c this prevents finding dependent libraries that # are installed to the same prefix. # At present, this check doesn't affect windows .dll's that # are installed into $libdir/../bin (currently, that works fine) # but it's something to keep an eye on. test "$inst_prefix_dir" = "$destdir" && \ func_fatal_error "error: cannot install '$file' to a directory not ending in $libdir" if test -n "$inst_prefix_dir"; then # Stick the inst_prefix_dir data into the link command. relink_command=`$ECHO "$relink_command" | $SED "s%@inst_prefix_dir@%-inst-prefix-dir $inst_prefix_dir%"` else relink_command=`$ECHO "$relink_command" | $SED "s%@inst_prefix_dir@%%"` fi func_warning "relinking '$file'" func_show_eval "$relink_command" \ 'func_fatal_error "error: relink '\''$file'\'' with the above command before installing it"' fi # See the names of the shared library. set dummy $library_names; shift if test -n "$1"; then realname=$1 shift srcname=$realname test -n "$relink_command" && srcname=${realname}T # Install the shared library and build the symlinks. func_show_eval "$install_shared_prog $dir/$srcname $destdir/$realname" \ 'exit $?' tstripme=$stripme case $host_os in cygwin* | mingw* | pw32* | cegcc*) case $realname in *.dll.a) tstripme= ;; esac ;; os2*) case $realname in *_dll.a) tstripme= ;; esac ;; esac if test -n "$tstripme" && test -n "$striplib"; then func_show_eval "$striplib $destdir/$realname" 'exit $?' fi if test "$#" -gt 0; then # Delete the old symlinks, and create new ones. # Try 'ln -sf' first, because the 'ln' binary might depend on # the symlink we replace! Solaris /bin/ln does not understand -f, # so we also need to try rm && ln -s. for linkname do test "$linkname" != "$realname" \ && func_show_eval "(cd $destdir && { $LN_S -f $realname $linkname || { $RM $linkname && $LN_S $realname $linkname; }; })" done fi # Do each command in the postinstall commands. lib=$destdir/$realname func_execute_cmds "$postinstall_cmds" 'exit $?' fi # Install the pseudo-library for information purposes. func_basename "$file" name=$func_basename_result instname=$dir/${name}i func_show_eval "$install_prog $instname $destdir/$name" 'exit $?' # Maybe install the static library, too. test -n "$old_library" && func_append staticlibs " $dir/$old_library" ;; *.lo) # Install (i.e. copy) a libtool object. # Figure out destination file name, if it wasn't already specified. if test -n "$destname"; then destfile=$destdir/$destname else func_basename "$file" destfile=$func_basename_result destfile=$destdir/$destfile fi # Deduce the name of the destination old-style object file. case $destfile in *.lo) func_lo2o "$destfile" staticdest=$func_lo2o_result ;; *.$objext) staticdest=$destfile destfile= ;; *) func_fatal_help "cannot copy a libtool object to '$destfile'" ;; esac # Install the libtool object if requested. test -n "$destfile" && \ func_show_eval "$install_prog $file $destfile" 'exit $?' # Install the old object if enabled. if test yes = "$build_old_libs"; then # Deduce the name of the old-style object file. func_lo2o "$file" staticobj=$func_lo2o_result func_show_eval "$install_prog \$staticobj \$staticdest" 'exit $?' fi exit $EXIT_SUCCESS ;; *) # Figure out destination file name, if it wasn't already specified. if test -n "$destname"; then destfile=$destdir/$destname else func_basename "$file" destfile=$func_basename_result destfile=$destdir/$destfile fi # If the file is missing, and there is a .exe on the end, strip it # because it is most likely a libtool script we actually want to # install stripped_ext= case $file in *.exe) if test ! -f "$file"; then func_stripname '' '.exe' "$file" file=$func_stripname_result stripped_ext=.exe fi ;; esac # Do a test to see if this is really a libtool program. case $host in *cygwin* | *mingw*) if func_ltwrapper_executable_p "$file"; then func_ltwrapper_scriptname "$file" wrapper=$func_ltwrapper_scriptname_result else func_stripname '' '.exe' "$file" wrapper=$func_stripname_result fi ;; *) wrapper=$file ;; esac if func_ltwrapper_script_p "$wrapper"; then notinst_deplibs= relink_command= func_source "$wrapper" # Check the variables that should have been set. test -z "$generated_by_libtool_version" && \ func_fatal_error "invalid libtool wrapper script '$wrapper'" finalize=: for lib in $notinst_deplibs; do # Check to see that each library is installed. libdir= if test -f "$lib"; then func_source "$lib" fi libfile=$libdir/`$ECHO "$lib" | $SED 's%^.*/%%g'` if test -n "$libdir" && test ! -f "$libfile"; then func_warning "'$lib' has not been installed in '$libdir'" finalize=false fi done relink_command= func_source "$wrapper" outputname= if test no = "$fast_install" && test -n "$relink_command"; then $opt_dry_run || { if $finalize; then tmpdir=`func_mktempdir` func_basename "$file$stripped_ext" file=$func_basename_result outputname=$tmpdir/$file # Replace the output file specification. relink_command=`$ECHO "$relink_command" | $SED 's%@OUTPUT@%'"$outputname"'%g'` $opt_quiet || { func_quote_for_expand "$relink_command" eval "func_echo $func_quote_for_expand_result" } if eval "$relink_command"; then : else func_error "error: relink '$file' with the above command before installing it" $opt_dry_run || ${RM}r "$tmpdir" continue fi file=$outputname else func_warning "cannot relink '$file'" fi } else # Install the binary that we compiled earlier. file=`$ECHO "$file$stripped_ext" | $SED "s%\([^/]*\)$%$objdir/\1%"` fi fi # remove .exe since cygwin /usr/bin/install will append another # one anyway case $install_prog,$host in */usr/bin/install*,*cygwin*) case $file:$destfile in *.exe:*.exe) # this is ok ;; *.exe:*) destfile=$destfile.exe ;; *:*.exe) func_stripname '' '.exe' "$destfile" destfile=$func_stripname_result ;; esac ;; esac func_show_eval "$install_prog\$stripme \$file \$destfile" 'exit $?' $opt_dry_run || if test -n "$outputname"; then ${RM}r "$tmpdir" fi ;; esac done for file in $staticlibs; do func_basename "$file" name=$func_basename_result # Set up the ranlib parameters. oldlib=$destdir/$name func_to_tool_file "$oldlib" func_convert_file_msys_to_w32 tool_oldlib=$func_to_tool_file_result func_show_eval "$install_prog \$file \$oldlib" 'exit $?' if test -n "$stripme" && test -n "$old_striplib"; then func_show_eval "$old_striplib $tool_oldlib" 'exit $?' fi # Do each command in the postinstall commands. func_execute_cmds "$old_postinstall_cmds" 'exit $?' done test -n "$future_libdirs" && \ func_warning "remember to run '$progname --finish$future_libdirs'" if test -n "$current_libdirs"; then # Maybe just do a dry run. $opt_dry_run && current_libdirs=" -n$current_libdirs" exec_cmd='$SHELL "$progpath" $preserve_args --finish$current_libdirs' else exit $EXIT_SUCCESS fi } test install = "$opt_mode" && func_mode_install ${1+"$@"} # func_generate_dlsyms outputname originator pic_p # Extract symbols from dlprefiles and create ${outputname}S.o with # a dlpreopen symbol table. func_generate_dlsyms () { $debug_cmd my_outputname=$1 my_originator=$2 my_pic_p=${3-false} my_prefix=`$ECHO "$my_originator" | $SED 's%[^a-zA-Z0-9]%_%g'` my_dlsyms= if test -n "$dlfiles$dlprefiles" || test no != "$dlself"; then if test -n "$NM" && test -n "$global_symbol_pipe"; then my_dlsyms=${my_outputname}S.c else func_error "not configured to extract global symbols from dlpreopened files" fi fi if test -n "$my_dlsyms"; then case $my_dlsyms in "") ;; *.c) # Discover the nlist of each of the dlfiles. nlist=$output_objdir/$my_outputname.nm func_show_eval "$RM $nlist ${nlist}S ${nlist}T" # Parse the name list into a source file. func_verbose "creating $output_objdir/$my_dlsyms" $opt_dry_run || $ECHO > "$output_objdir/$my_dlsyms" "\ /* $my_dlsyms - symbol resolution table for '$my_outputname' dlsym emulation. */ /* Generated by $PROGRAM (GNU $PACKAGE) $VERSION */ #ifdef __cplusplus extern \"C\" { #endif #if defined __GNUC__ && (((__GNUC__ == 4) && (__GNUC_MINOR__ >= 4)) || (__GNUC__ > 4)) #pragma GCC diagnostic ignored \"-Wstrict-prototypes\" #endif /* Keep this code in sync between libtool.m4, ltmain, lt_system.h, and tests. */ #if defined _WIN32 || defined __CYGWIN__ || defined _WIN32_WCE /* DATA imports from DLLs on WIN32 can't be const, because runtime relocations are performed -- see ld's documentation on pseudo-relocs. */ # define LT_DLSYM_CONST #elif defined __osf__ /* This system does not cope well with relocations in const data. */ # define LT_DLSYM_CONST #else # define LT_DLSYM_CONST const #endif #define STREQ(s1, s2) (strcmp ((s1), (s2)) == 0) /* External symbol declarations for the compiler. */\ " if test yes = "$dlself"; then func_verbose "generating symbol list for '$output'" $opt_dry_run || echo ': @PROGRAM@ ' > "$nlist" # Add our own program objects to the symbol list. progfiles=`$ECHO "$objs$old_deplibs" | $SP2NL | $SED "$lo2o" | $NL2SP` for progfile in $progfiles; do func_to_tool_file "$progfile" func_convert_file_msys_to_w32 func_verbose "extracting global C symbols from '$func_to_tool_file_result'" $opt_dry_run || eval "$NM $func_to_tool_file_result | $global_symbol_pipe >> '$nlist'" done if test -n "$exclude_expsyms"; then $opt_dry_run || { eval '$EGREP -v " ($exclude_expsyms)$" "$nlist" > "$nlist"T' eval '$MV "$nlist"T "$nlist"' } fi if test -n "$export_symbols_regex"; then $opt_dry_run || { eval '$EGREP -e "$export_symbols_regex" "$nlist" > "$nlist"T' eval '$MV "$nlist"T "$nlist"' } fi # Prepare the list of exported symbols if test -z "$export_symbols"; then export_symbols=$output_objdir/$outputname.exp $opt_dry_run || { $RM $export_symbols eval "$SED -n -e '/^: @PROGRAM@ $/d' -e 's/^.* \(.*\)$/\1/p' "'< "$nlist" > "$export_symbols"' case $host in *cygwin* | *mingw* | *cegcc* ) eval "echo EXPORTS "'> "$output_objdir/$outputname.def"' eval 'cat "$export_symbols" >> "$output_objdir/$outputname.def"' ;; esac } else $opt_dry_run || { eval "$SED -e 's/\([].[*^$]\)/\\\\\1/g' -e 's/^/ /' -e 's/$/$/'"' < "$export_symbols" > "$output_objdir/$outputname.exp"' eval '$GREP -f "$output_objdir/$outputname.exp" < "$nlist" > "$nlist"T' eval '$MV "$nlist"T "$nlist"' case $host in *cygwin* | *mingw* | *cegcc* ) eval "echo EXPORTS "'> "$output_objdir/$outputname.def"' eval 'cat "$nlist" >> "$output_objdir/$outputname.def"' ;; esac } fi fi for dlprefile in $dlprefiles; do func_verbose "extracting global C symbols from '$dlprefile'" func_basename "$dlprefile" name=$func_basename_result case $host in *cygwin* | *mingw* | *cegcc* ) # if an import library, we need to obtain dlname if func_win32_import_lib_p "$dlprefile"; then func_tr_sh "$dlprefile" eval "curr_lafile=\$libfile_$func_tr_sh_result" dlprefile_dlbasename= if test -n "$curr_lafile" && func_lalib_p "$curr_lafile"; then # Use subshell, to avoid clobbering current variable values dlprefile_dlname=`source "$curr_lafile" && echo "$dlname"` if test -n "$dlprefile_dlname"; then func_basename "$dlprefile_dlname" dlprefile_dlbasename=$func_basename_result else # no lafile. user explicitly requested -dlpreopen . $sharedlib_from_linklib_cmd "$dlprefile" dlprefile_dlbasename=$sharedlib_from_linklib_result fi fi $opt_dry_run || { if test -n "$dlprefile_dlbasename"; then eval '$ECHO ": $dlprefile_dlbasename" >> "$nlist"' else func_warning "Could not compute DLL name from $name" eval '$ECHO ": $name " >> "$nlist"' fi func_to_tool_file "$dlprefile" func_convert_file_msys_to_w32 eval "$NM \"$func_to_tool_file_result\" 2>/dev/null | $global_symbol_pipe | $SED -e '/I __imp/d' -e 's/I __nm_/D /;s/_nm__//' >> '$nlist'" } else # not an import lib $opt_dry_run || { eval '$ECHO ": $name " >> "$nlist"' func_to_tool_file "$dlprefile" func_convert_file_msys_to_w32 eval "$NM \"$func_to_tool_file_result\" 2>/dev/null | $global_symbol_pipe >> '$nlist'" } fi ;; *) $opt_dry_run || { eval '$ECHO ": $name " >> "$nlist"' func_to_tool_file "$dlprefile" func_convert_file_msys_to_w32 eval "$NM \"$func_to_tool_file_result\" 2>/dev/null | $global_symbol_pipe >> '$nlist'" } ;; esac done $opt_dry_run || { # Make sure we have at least an empty file. test -f "$nlist" || : > "$nlist" if test -n "$exclude_expsyms"; then $EGREP -v " ($exclude_expsyms)$" "$nlist" > "$nlist"T $MV "$nlist"T "$nlist" fi # Try sorting and uniquifying the output. if $GREP -v "^: " < "$nlist" | if sort -k 3 /dev/null 2>&1; then sort -k 3 else sort +2 fi | uniq > "$nlist"S; then : else $GREP -v "^: " < "$nlist" > "$nlist"S fi if test -f "$nlist"S; then eval "$global_symbol_to_cdecl"' < "$nlist"S >> "$output_objdir/$my_dlsyms"' else echo '/* NONE */' >> "$output_objdir/$my_dlsyms" fi func_show_eval '$RM "${nlist}I"' if test -n "$global_symbol_to_import"; then eval "$global_symbol_to_import"' < "$nlist"S > "$nlist"I' fi echo >> "$output_objdir/$my_dlsyms" "\ /* The mapping between symbol names and symbols. */ typedef struct { const char *name; void *address; } lt_dlsymlist; extern LT_DLSYM_CONST lt_dlsymlist lt_${my_prefix}_LTX_preloaded_symbols[];\ " if test -s "$nlist"I; then echo >> "$output_objdir/$my_dlsyms" "\ static void lt_syminit(void) { LT_DLSYM_CONST lt_dlsymlist *symbol = lt_${my_prefix}_LTX_preloaded_symbols; for (; symbol->name; ++symbol) {" $SED 's/.*/ if (STREQ (symbol->name, \"&\")) symbol->address = (void *) \&&;/' < "$nlist"I >> "$output_objdir/$my_dlsyms" echo >> "$output_objdir/$my_dlsyms" "\ } }" fi echo >> "$output_objdir/$my_dlsyms" "\ LT_DLSYM_CONST lt_dlsymlist lt_${my_prefix}_LTX_preloaded_symbols[] = { {\"$my_originator\", (void *) 0}," if test -s "$nlist"I; then echo >> "$output_objdir/$my_dlsyms" "\ {\"@INIT@\", (void *) <_syminit}," fi case $need_lib_prefix in no) eval "$global_symbol_to_c_name_address" < "$nlist" >> "$output_objdir/$my_dlsyms" ;; *) eval "$global_symbol_to_c_name_address_lib_prefix" < "$nlist" >> "$output_objdir/$my_dlsyms" ;; esac echo >> "$output_objdir/$my_dlsyms" "\ {0, (void *) 0} }; /* This works around a problem in FreeBSD linker */ #ifdef FREEBSD_WORKAROUND static const void *lt_preloaded_setup() { return lt_${my_prefix}_LTX_preloaded_symbols; } #endif #ifdef __cplusplus } #endif\ " } # !$opt_dry_run pic_flag_for_symtable= case "$compile_command " in *" -static "*) ;; *) case $host in # compiling the symbol table file with pic_flag works around # a FreeBSD bug that causes programs to crash when -lm is # linked before any other PIC object. But we must not use # pic_flag when linking with -static. The problem exists in # FreeBSD 2.2.6 and is fixed in FreeBSD 3.1. *-*-freebsd2.*|*-*-freebsd3.0*|*-*-freebsdelf3.0*) pic_flag_for_symtable=" $pic_flag -DFREEBSD_WORKAROUND" ;; *-*-hpux*) pic_flag_for_symtable=" $pic_flag" ;; *) $my_pic_p && pic_flag_for_symtable=" $pic_flag" ;; esac ;; esac symtab_cflags= for arg in $LTCFLAGS; do case $arg in -pie | -fpie | -fPIE) ;; *) func_append symtab_cflags " $arg" ;; esac done # Now compile the dynamic symbol file. func_show_eval '(cd $output_objdir && $LTCC$symtab_cflags -c$no_builtin_flag$pic_flag_for_symtable "$my_dlsyms")' 'exit $?' # Clean up the generated files. func_show_eval '$RM "$output_objdir/$my_dlsyms" "$nlist" "${nlist}S" "${nlist}T" "${nlist}I"' # Transform the symbol file into the correct name. symfileobj=$output_objdir/${my_outputname}S.$objext case $host in *cygwin* | *mingw* | *cegcc* ) if test -f "$output_objdir/$my_outputname.def"; then compile_command=`$ECHO "$compile_command" | $SED "s%@SYMFILE@%$output_objdir/$my_outputname.def $symfileobj%"` finalize_command=`$ECHO "$finalize_command" | $SED "s%@SYMFILE@%$output_objdir/$my_outputname.def $symfileobj%"` else compile_command=`$ECHO "$compile_command" | $SED "s%@SYMFILE@%$symfileobj%"` finalize_command=`$ECHO "$finalize_command" | $SED "s%@SYMFILE@%$symfileobj%"` fi ;; *) compile_command=`$ECHO "$compile_command" | $SED "s%@SYMFILE@%$symfileobj%"` finalize_command=`$ECHO "$finalize_command" | $SED "s%@SYMFILE@%$symfileobj%"` ;; esac ;; *) func_fatal_error "unknown suffix for '$my_dlsyms'" ;; esac else # We keep going just in case the user didn't refer to # lt_preloaded_symbols. The linker will fail if global_symbol_pipe # really was required. # Nullify the symbol file. compile_command=`$ECHO "$compile_command" | $SED "s% @SYMFILE@%%"` finalize_command=`$ECHO "$finalize_command" | $SED "s% @SYMFILE@%%"` fi } # func_cygming_gnu_implib_p ARG # This predicate returns with zero status (TRUE) if # ARG is a GNU/binutils-style import library. Returns # with nonzero status (FALSE) otherwise. func_cygming_gnu_implib_p () { $debug_cmd func_to_tool_file "$1" func_convert_file_msys_to_w32 func_cygming_gnu_implib_tmp=`$NM "$func_to_tool_file_result" | eval "$global_symbol_pipe" | $EGREP ' (_head_[A-Za-z0-9_]+_[ad]l*|[A-Za-z0-9_]+_[ad]l*_iname)$'` test -n "$func_cygming_gnu_implib_tmp" } # func_cygming_ms_implib_p ARG # This predicate returns with zero status (TRUE) if # ARG is an MS-style import library. Returns # with nonzero status (FALSE) otherwise. func_cygming_ms_implib_p () { $debug_cmd func_to_tool_file "$1" func_convert_file_msys_to_w32 func_cygming_ms_implib_tmp=`$NM "$func_to_tool_file_result" | eval "$global_symbol_pipe" | $GREP '_NULL_IMPORT_DESCRIPTOR'` test -n "$func_cygming_ms_implib_tmp" } # func_win32_libid arg # return the library type of file 'arg' # # Need a lot of goo to handle *both* DLLs and import libs # Has to be a shell function in order to 'eat' the argument # that is supplied when $file_magic_command is called. # Despite the name, also deal with 64 bit binaries. func_win32_libid () { $debug_cmd win32_libid_type=unknown win32_fileres=`file -L $1 2>/dev/null` case $win32_fileres in *ar\ archive\ import\ library*) # definitely import win32_libid_type="x86 archive import" ;; *ar\ archive*) # could be an import, or static # Keep the egrep pattern in sync with the one in _LT_CHECK_MAGIC_METHOD. if eval $OBJDUMP -f $1 | $SED -e '10q' 2>/dev/null | $EGREP 'file format (pei*-i386(.*architecture: i386)?|pe-arm-wince|pe-x86-64)' >/dev/null; then case $nm_interface in "MS dumpbin") if func_cygming_ms_implib_p "$1" || func_cygming_gnu_implib_p "$1" then win32_nmres=import else win32_nmres= fi ;; *) func_to_tool_file "$1" func_convert_file_msys_to_w32 win32_nmres=`eval $NM -f posix -A \"$func_to_tool_file_result\" | $SED -n -e ' 1,100{ / I /{ s|.*|import| p q } }'` ;; esac case $win32_nmres in import*) win32_libid_type="x86 archive import";; *) win32_libid_type="x86 archive static";; esac fi ;; *DLL*) win32_libid_type="x86 DLL" ;; *executable*) # but shell scripts are "executable" too... case $win32_fileres in *MS\ Windows\ PE\ Intel*) win32_libid_type="x86 DLL" ;; esac ;; esac $ECHO "$win32_libid_type" } # func_cygming_dll_for_implib ARG # # Platform-specific function to extract the # name of the DLL associated with the specified # import library ARG. # Invoked by eval'ing the libtool variable # $sharedlib_from_linklib_cmd # Result is available in the variable # $sharedlib_from_linklib_result func_cygming_dll_for_implib () { $debug_cmd sharedlib_from_linklib_result=`$DLLTOOL --identify-strict --identify "$1"` } # func_cygming_dll_for_implib_fallback_core SECTION_NAME LIBNAMEs # # The is the core of a fallback implementation of a # platform-specific function to extract the name of the # DLL associated with the specified import library LIBNAME. # # SECTION_NAME is either .idata$6 or .idata$7, depending # on the platform and compiler that created the implib. # # Echos the name of the DLL associated with the # specified import library. func_cygming_dll_for_implib_fallback_core () { $debug_cmd match_literal=`$ECHO "$1" | $SED "$sed_make_literal_regex"` $OBJDUMP -s --section "$1" "$2" 2>/dev/null | $SED '/^Contents of section '"$match_literal"':/{ # Place marker at beginning of archive member dllname section s/.*/====MARK====/ p d } # These lines can sometimes be longer than 43 characters, but # are always uninteresting /:[ ]*file format pe[i]\{,1\}-/d /^In archive [^:]*:/d # Ensure marker is printed /^====MARK====/p # Remove all lines with less than 43 characters /^.\{43\}/!d # From remaining lines, remove first 43 characters s/^.\{43\}//' | $SED -n ' # Join marker and all lines until next marker into a single line /^====MARK====/ b para H $ b para b :para x s/\n//g # Remove the marker s/^====MARK====// # Remove trailing dots and whitespace s/[\. \t]*$// # Print /./p' | # we now have a list, one entry per line, of the stringified # contents of the appropriate section of all members of the # archive that possess that section. Heuristic: eliminate # all those that have a first or second character that is # a '.' (that is, objdump's representation of an unprintable # character.) This should work for all archives with less than # 0x302f exports -- but will fail for DLLs whose name actually # begins with a literal '.' or a single character followed by # a '.'. # # Of those that remain, print the first one. $SED -e '/^\./d;/^.\./d;q' } # func_cygming_dll_for_implib_fallback ARG # Platform-specific function to extract the # name of the DLL associated with the specified # import library ARG. # # This fallback implementation is for use when $DLLTOOL # does not support the --identify-strict option. # Invoked by eval'ing the libtool variable # $sharedlib_from_linklib_cmd # Result is available in the variable # $sharedlib_from_linklib_result func_cygming_dll_for_implib_fallback () { $debug_cmd if func_cygming_gnu_implib_p "$1"; then # binutils import library sharedlib_from_linklib_result=`func_cygming_dll_for_implib_fallback_core '.idata$7' "$1"` elif func_cygming_ms_implib_p "$1"; then # ms-generated import library sharedlib_from_linklib_result=`func_cygming_dll_for_implib_fallback_core '.idata$6' "$1"` else # unknown sharedlib_from_linklib_result= fi } # func_extract_an_archive dir oldlib func_extract_an_archive () { $debug_cmd f_ex_an_ar_dir=$1; shift f_ex_an_ar_oldlib=$1 if test yes = "$lock_old_archive_extraction"; then lockfile=$f_ex_an_ar_oldlib.lock until $opt_dry_run || ln "$progpath" "$lockfile" 2>/dev/null; do func_echo "Waiting for $lockfile to be removed" sleep 2 done fi func_show_eval "(cd \$f_ex_an_ar_dir && $AR x \"\$f_ex_an_ar_oldlib\")" \ 'stat=$?; rm -f "$lockfile"; exit $stat' if test yes = "$lock_old_archive_extraction"; then $opt_dry_run || rm -f "$lockfile" fi if ($AR t "$f_ex_an_ar_oldlib" | sort | sort -uc >/dev/null 2>&1); then : else func_fatal_error "object name conflicts in archive: $f_ex_an_ar_dir/$f_ex_an_ar_oldlib" fi } # func_extract_archives gentop oldlib ... func_extract_archives () { $debug_cmd my_gentop=$1; shift my_oldlibs=${1+"$@"} my_oldobjs= my_xlib= my_xabs= my_xdir= for my_xlib in $my_oldlibs; do # Extract the objects. case $my_xlib in [\\/]* | [A-Za-z]:[\\/]*) my_xabs=$my_xlib ;; *) my_xabs=`pwd`"/$my_xlib" ;; esac func_basename "$my_xlib" my_xlib=$func_basename_result my_xlib_u=$my_xlib while :; do case " $extracted_archives " in *" $my_xlib_u "*) func_arith $extracted_serial + 1 extracted_serial=$func_arith_result my_xlib_u=lt$extracted_serial-$my_xlib ;; *) break ;; esac done extracted_archives="$extracted_archives $my_xlib_u" my_xdir=$my_gentop/$my_xlib_u func_mkdir_p "$my_xdir" case $host in *-darwin*) func_verbose "Extracting $my_xabs" # Do not bother doing anything if just a dry run $opt_dry_run || { darwin_orig_dir=`pwd` cd $my_xdir || exit $? darwin_archive=$my_xabs darwin_curdir=`pwd` func_basename "$darwin_archive" darwin_base_archive=$func_basename_result darwin_arches=`$LIPO -info "$darwin_archive" 2>/dev/null | $GREP Architectures 2>/dev/null || true` if test -n "$darwin_arches"; then darwin_arches=`$ECHO "$darwin_arches" | $SED -e 's/.*are://'` darwin_arch= func_verbose "$darwin_base_archive has multiple architectures $darwin_arches" for darwin_arch in $darwin_arches; do func_mkdir_p "unfat-$$/$darwin_base_archive-$darwin_arch" $LIPO -thin $darwin_arch -output "unfat-$$/$darwin_base_archive-$darwin_arch/$darwin_base_archive" "$darwin_archive" cd "unfat-$$/$darwin_base_archive-$darwin_arch" func_extract_an_archive "`pwd`" "$darwin_base_archive" cd "$darwin_curdir" $RM "unfat-$$/$darwin_base_archive-$darwin_arch/$darwin_base_archive" done # $darwin_arches ## Okay now we've a bunch of thin objects, gotta fatten them up :) darwin_filelist=`find unfat-$$ -type f -name \*.o -print -o -name \*.lo -print | $SED -e "$sed_basename" | sort -u` darwin_file= darwin_files= for darwin_file in $darwin_filelist; do darwin_files=`find unfat-$$ -name $darwin_file -print | sort | $NL2SP` $LIPO -create -output "$darwin_file" $darwin_files done # $darwin_filelist $RM -rf unfat-$$ cd "$darwin_orig_dir" else cd $darwin_orig_dir func_extract_an_archive "$my_xdir" "$my_xabs" fi # $darwin_arches } # !$opt_dry_run ;; *) func_extract_an_archive "$my_xdir" "$my_xabs" ;; esac my_oldobjs="$my_oldobjs "`find $my_xdir -name \*.$objext -print -o -name \*.lo -print | sort | $NL2SP` done func_extract_archives_result=$my_oldobjs } # func_emit_wrapper [arg=no] # # Emit a libtool wrapper script on stdout. # Don't directly open a file because we may want to # incorporate the script contents within a cygwin/mingw # wrapper executable. Must ONLY be called from within # func_mode_link because it depends on a number of variables # set therein. # # ARG is the value that the WRAPPER_SCRIPT_BELONGS_IN_OBJDIR # variable will take. If 'yes', then the emitted script # will assume that the directory where it is stored is # the $objdir directory. This is a cygwin/mingw-specific # behavior. func_emit_wrapper () { func_emit_wrapper_arg1=${1-no} $ECHO "\ #! $SHELL # $output - temporary wrapper script for $objdir/$outputname # Generated by $PROGRAM (GNU $PACKAGE) $VERSION # # The $output program cannot be directly executed until all the libtool # libraries that it depends on are installed. # # This wrapper script should never be moved out of the build directory. # If it is, it will not operate correctly. # Sed substitution that helps us do robust quoting. It backslashifies # metacharacters that are still active within double-quoted strings. sed_quote_subst='$sed_quote_subst' # Be Bourne compatible if test -n \"\${ZSH_VERSION+set}\" && (emulate sh) >/dev/null 2>&1; then emulate sh NULLCMD=: # Zsh 3.x and 4.x performs word splitting on \${1+\"\$@\"}, which # is contrary to our usage. Disable this feature. alias -g '\${1+\"\$@\"}'='\"\$@\"' setopt NO_GLOB_SUBST else case \`(set -o) 2>/dev/null\` in *posix*) set -o posix;; esac fi BIN_SH=xpg4; export BIN_SH # for Tru64 DUALCASE=1; export DUALCASE # for MKS sh # The HP-UX ksh and POSIX shell print the target directory to stdout # if CDPATH is set. (unset CDPATH) >/dev/null 2>&1 && unset CDPATH relink_command=\"$relink_command\" # This environment variable determines our operation mode. if test \"\$libtool_install_magic\" = \"$magic\"; then # install mode needs the following variables: generated_by_libtool_version='$macro_version' notinst_deplibs='$notinst_deplibs' else # When we are sourced in execute mode, \$file and \$ECHO are already set. if test \"\$libtool_execute_magic\" != \"$magic\"; then file=\"\$0\"" qECHO=`$ECHO "$ECHO" | $SED "$sed_quote_subst"` $ECHO "\ # A function that is used when there is no print builtin or printf. func_fallback_echo () { eval 'cat <<_LTECHO_EOF \$1 _LTECHO_EOF' } ECHO=\"$qECHO\" fi # Very basic option parsing. These options are (a) specific to # the libtool wrapper, (b) are identical between the wrapper # /script/ and the wrapper /executable/ that is used only on # windows platforms, and (c) all begin with the string "--lt-" # (application programs are unlikely to have options that match # this pattern). # # There are only two supported options: --lt-debug and # --lt-dump-script. There is, deliberately, no --lt-help. # # The first argument to this parsing function should be the # script's $0 value, followed by "$@". lt_option_debug= func_parse_lt_options () { lt_script_arg0=\$0 shift for lt_opt do case \"\$lt_opt\" in --lt-debug) lt_option_debug=1 ;; --lt-dump-script) lt_dump_D=\`\$ECHO \"X\$lt_script_arg0\" | $SED -e 's/^X//' -e 's%/[^/]*$%%'\` test \"X\$lt_dump_D\" = \"X\$lt_script_arg0\" && lt_dump_D=. lt_dump_F=\`\$ECHO \"X\$lt_script_arg0\" | $SED -e 's/^X//' -e 's%^.*/%%'\` cat \"\$lt_dump_D/\$lt_dump_F\" exit 0 ;; --lt-*) \$ECHO \"Unrecognized --lt- option: '\$lt_opt'\" 1>&2 exit 1 ;; esac done # Print the debug banner immediately: if test -n \"\$lt_option_debug\"; then echo \"$outputname:$output:\$LINENO: libtool wrapper (GNU $PACKAGE) $VERSION\" 1>&2 fi } # Used when --lt-debug. Prints its arguments to stdout # (redirection is the responsibility of the caller) func_lt_dump_args () { lt_dump_args_N=1; for lt_arg do \$ECHO \"$outputname:$output:\$LINENO: newargv[\$lt_dump_args_N]: \$lt_arg\" lt_dump_args_N=\`expr \$lt_dump_args_N + 1\` done } # Core function for launching the target application func_exec_program_core () { " case $host in # Backslashes separate directories on plain windows *-*-mingw | *-*-os2* | *-cegcc*) $ECHO "\ if test -n \"\$lt_option_debug\"; then \$ECHO \"$outputname:$output:\$LINENO: newargv[0]: \$progdir\\\\\$program\" 1>&2 func_lt_dump_args \${1+\"\$@\"} 1>&2 fi exec \"\$progdir\\\\\$program\" \${1+\"\$@\"} " ;; *) $ECHO "\ if test -n \"\$lt_option_debug\"; then \$ECHO \"$outputname:$output:\$LINENO: newargv[0]: \$progdir/\$program\" 1>&2 func_lt_dump_args \${1+\"\$@\"} 1>&2 fi exec \"\$progdir/\$program\" \${1+\"\$@\"} " ;; esac $ECHO "\ \$ECHO \"\$0: cannot exec \$program \$*\" 1>&2 exit 1 } # A function to encapsulate launching the target application # Strips options in the --lt-* namespace from \$@ and # launches target application with the remaining arguments. func_exec_program () { case \" \$* \" in *\\ --lt-*) for lt_wr_arg do case \$lt_wr_arg in --lt-*) ;; *) set x \"\$@\" \"\$lt_wr_arg\"; shift;; esac shift done ;; esac func_exec_program_core \${1+\"\$@\"} } # Parse options func_parse_lt_options \"\$0\" \${1+\"\$@\"} # Find the directory that this script lives in. thisdir=\`\$ECHO \"\$file\" | $SED 's%/[^/]*$%%'\` test \"x\$thisdir\" = \"x\$file\" && thisdir=. # Follow symbolic links until we get to the real thisdir. file=\`ls -ld \"\$file\" | $SED -n 's/.*-> //p'\` while test -n \"\$file\"; do destdir=\`\$ECHO \"\$file\" | $SED 's%/[^/]*\$%%'\` # If there was a directory component, then change thisdir. if test \"x\$destdir\" != \"x\$file\"; then case \"\$destdir\" in [\\\\/]* | [A-Za-z]:[\\\\/]*) thisdir=\"\$destdir\" ;; *) thisdir=\"\$thisdir/\$destdir\" ;; esac fi file=\`\$ECHO \"\$file\" | $SED 's%^.*/%%'\` file=\`ls -ld \"\$thisdir/\$file\" | $SED -n 's/.*-> //p'\` done # Usually 'no', except on cygwin/mingw when embedded into # the cwrapper. WRAPPER_SCRIPT_BELONGS_IN_OBJDIR=$func_emit_wrapper_arg1 if test \"\$WRAPPER_SCRIPT_BELONGS_IN_OBJDIR\" = \"yes\"; then # special case for '.' if test \"\$thisdir\" = \".\"; then thisdir=\`pwd\` fi # remove .libs from thisdir case \"\$thisdir\" in *[\\\\/]$objdir ) thisdir=\`\$ECHO \"\$thisdir\" | $SED 's%[\\\\/][^\\\\/]*$%%'\` ;; $objdir ) thisdir=. ;; esac fi # Try to get the absolute directory name. absdir=\`cd \"\$thisdir\" && pwd\` test -n \"\$absdir\" && thisdir=\"\$absdir\" " if test yes = "$fast_install"; then $ECHO "\ program=lt-'$outputname'$exeext progdir=\"\$thisdir/$objdir\" if test ! -f \"\$progdir/\$program\" || { file=\`ls -1dt \"\$progdir/\$program\" \"\$progdir/../\$program\" 2>/dev/null | $SED 1q\`; \\ test \"X\$file\" != \"X\$progdir/\$program\"; }; then file=\"\$\$-\$program\" if test ! -d \"\$progdir\"; then $MKDIR \"\$progdir\" else $RM \"\$progdir/\$file\" fi" $ECHO "\ # relink executable if necessary if test -n \"\$relink_command\"; then if relink_command_output=\`eval \$relink_command 2>&1\`; then : else \$ECHO \"\$relink_command_output\" >&2 $RM \"\$progdir/\$file\" exit 1 fi fi $MV \"\$progdir/\$file\" \"\$progdir/\$program\" 2>/dev/null || { $RM \"\$progdir/\$program\"; $MV \"\$progdir/\$file\" \"\$progdir/\$program\"; } $RM \"\$progdir/\$file\" fi" else $ECHO "\ program='$outputname' progdir=\"\$thisdir/$objdir\" " fi $ECHO "\ if test -f \"\$progdir/\$program\"; then" # fixup the dll searchpath if we need to. # # Fix the DLL searchpath if we need to. Do this before prepending # to shlibpath, because on Windows, both are PATH and uninstalled # libraries must come first. if test -n "$dllsearchpath"; then $ECHO "\ # Add the dll search path components to the executable PATH PATH=$dllsearchpath:\$PATH " fi # Export our shlibpath_var if we have one. if test yes = "$shlibpath_overrides_runpath" && test -n "$shlibpath_var" && test -n "$temp_rpath"; then $ECHO "\ # Add our own library path to $shlibpath_var $shlibpath_var=\"$temp_rpath\$$shlibpath_var\" # Some systems cannot cope with colon-terminated $shlibpath_var # The second colon is a workaround for a bug in BeOS R4 sed $shlibpath_var=\`\$ECHO \"\$$shlibpath_var\" | $SED 's/::*\$//'\` export $shlibpath_var " fi $ECHO "\ if test \"\$libtool_execute_magic\" != \"$magic\"; then # Run the actual program with our arguments. func_exec_program \${1+\"\$@\"} fi else # The program doesn't exist. \$ECHO \"\$0: error: '\$progdir/\$program' does not exist\" 1>&2 \$ECHO \"This script is just a wrapper for \$program.\" 1>&2 \$ECHO \"See the $PACKAGE documentation for more information.\" 1>&2 exit 1 fi fi\ " } # func_emit_cwrapperexe_src # emit the source code for a wrapper executable on stdout # Must ONLY be called from within func_mode_link because # it depends on a number of variable set therein. func_emit_cwrapperexe_src () { cat < #include #ifdef _MSC_VER # include # include # include #else # include # include # ifdef __CYGWIN__ # include # endif #endif #include #include #include #include #include #include #include #include #define STREQ(s1, s2) (strcmp ((s1), (s2)) == 0) /* declarations of non-ANSI functions */ #if defined __MINGW32__ # ifdef __STRICT_ANSI__ int _putenv (const char *); # endif #elif defined __CYGWIN__ # ifdef __STRICT_ANSI__ char *realpath (const char *, char *); int putenv (char *); int setenv (const char *, const char *, int); # endif /* #elif defined other_platform || defined ... */ #endif /* portability defines, excluding path handling macros */ #if defined _MSC_VER # define setmode _setmode # define stat _stat # define chmod _chmod # define getcwd _getcwd # define putenv _putenv # define S_IXUSR _S_IEXEC #elif defined __MINGW32__ # define setmode _setmode # define stat _stat # define chmod _chmod # define getcwd _getcwd # define putenv _putenv #elif defined __CYGWIN__ # define HAVE_SETENV # define FOPEN_WB "wb" /* #elif defined other platforms ... */ #endif #if defined PATH_MAX # define LT_PATHMAX PATH_MAX #elif defined MAXPATHLEN # define LT_PATHMAX MAXPATHLEN #else # define LT_PATHMAX 1024 #endif #ifndef S_IXOTH # define S_IXOTH 0 #endif #ifndef S_IXGRP # define S_IXGRP 0 #endif /* path handling portability macros */ #ifndef DIR_SEPARATOR # define DIR_SEPARATOR '/' # define PATH_SEPARATOR ':' #endif #if defined _WIN32 || defined __MSDOS__ || defined __DJGPP__ || \ defined __OS2__ # define HAVE_DOS_BASED_FILE_SYSTEM # define FOPEN_WB "wb" # ifndef DIR_SEPARATOR_2 # define DIR_SEPARATOR_2 '\\' # endif # ifndef PATH_SEPARATOR_2 # define PATH_SEPARATOR_2 ';' # endif #endif #ifndef DIR_SEPARATOR_2 # define IS_DIR_SEPARATOR(ch) ((ch) == DIR_SEPARATOR) #else /* DIR_SEPARATOR_2 */ # define IS_DIR_SEPARATOR(ch) \ (((ch) == DIR_SEPARATOR) || ((ch) == DIR_SEPARATOR_2)) #endif /* DIR_SEPARATOR_2 */ #ifndef PATH_SEPARATOR_2 # define IS_PATH_SEPARATOR(ch) ((ch) == PATH_SEPARATOR) #else /* PATH_SEPARATOR_2 */ # define IS_PATH_SEPARATOR(ch) ((ch) == PATH_SEPARATOR_2) #endif /* PATH_SEPARATOR_2 */ #ifndef FOPEN_WB # define FOPEN_WB "w" #endif #ifndef _O_BINARY # define _O_BINARY 0 #endif #define XMALLOC(type, num) ((type *) xmalloc ((num) * sizeof(type))) #define XFREE(stale) do { \ if (stale) { free (stale); stale = 0; } \ } while (0) #if defined LT_DEBUGWRAPPER static int lt_debug = 1; #else static int lt_debug = 0; #endif const char *program_name = "libtool-wrapper"; /* in case xstrdup fails */ void *xmalloc (size_t num); char *xstrdup (const char *string); const char *base_name (const char *name); char *find_executable (const char *wrapper); char *chase_symlinks (const char *pathspec); int make_executable (const char *path); int check_executable (const char *path); char *strendzap (char *str, const char *pat); void lt_debugprintf (const char *file, int line, const char *fmt, ...); void lt_fatal (const char *file, int line, const char *message, ...); static const char *nonnull (const char *s); static const char *nonempty (const char *s); void lt_setenv (const char *name, const char *value); char *lt_extend_str (const char *orig_value, const char *add, int to_end); void lt_update_exe_path (const char *name, const char *value); void lt_update_lib_path (const char *name, const char *value); char **prepare_spawn (char **argv); void lt_dump_script (FILE *f); EOF cat <= 0) && (st.st_mode & (S_IXUSR | S_IXGRP | S_IXOTH))) return 1; else return 0; } int make_executable (const char *path) { int rval = 0; struct stat st; lt_debugprintf (__FILE__, __LINE__, "(make_executable): %s\n", nonempty (path)); if ((!path) || (!*path)) return 0; if (stat (path, &st) >= 0) { rval = chmod (path, st.st_mode | S_IXOTH | S_IXGRP | S_IXUSR); } return rval; } /* Searches for the full path of the wrapper. Returns newly allocated full path name if found, NULL otherwise Does not chase symlinks, even on platforms that support them. */ char * find_executable (const char *wrapper) { int has_slash = 0; const char *p; const char *p_next; /* static buffer for getcwd */ char tmp[LT_PATHMAX + 1]; size_t tmp_len; char *concat_name; lt_debugprintf (__FILE__, __LINE__, "(find_executable): %s\n", nonempty (wrapper)); if ((wrapper == NULL) || (*wrapper == '\0')) return NULL; /* Absolute path? */ #if defined HAVE_DOS_BASED_FILE_SYSTEM if (isalpha ((unsigned char) wrapper[0]) && wrapper[1] == ':') { concat_name = xstrdup (wrapper); if (check_executable (concat_name)) return concat_name; XFREE (concat_name); } else { #endif if (IS_DIR_SEPARATOR (wrapper[0])) { concat_name = xstrdup (wrapper); if (check_executable (concat_name)) return concat_name; XFREE (concat_name); } #if defined HAVE_DOS_BASED_FILE_SYSTEM } #endif for (p = wrapper; *p; p++) if (*p == '/') { has_slash = 1; break; } if (!has_slash) { /* no slashes; search PATH */ const char *path = getenv ("PATH"); if (path != NULL) { for (p = path; *p; p = p_next) { const char *q; size_t p_len; for (q = p; *q; q++) if (IS_PATH_SEPARATOR (*q)) break; p_len = (size_t) (q - p); p_next = (*q == '\0' ? q : q + 1); if (p_len == 0) { /* empty path: current directory */ if (getcwd (tmp, LT_PATHMAX) == NULL) lt_fatal (__FILE__, __LINE__, "getcwd failed: %s", nonnull (strerror (errno))); tmp_len = strlen (tmp); concat_name = XMALLOC (char, tmp_len + 1 + strlen (wrapper) + 1); memcpy (concat_name, tmp, tmp_len); concat_name[tmp_len] = '/'; strcpy (concat_name + tmp_len + 1, wrapper); } else { concat_name = XMALLOC (char, p_len + 1 + strlen (wrapper) + 1); memcpy (concat_name, p, p_len); concat_name[p_len] = '/'; strcpy (concat_name + p_len + 1, wrapper); } if (check_executable (concat_name)) return concat_name; XFREE (concat_name); } } /* not found in PATH; assume curdir */ } /* Relative path | not found in path: prepend cwd */ if (getcwd (tmp, LT_PATHMAX) == NULL) lt_fatal (__FILE__, __LINE__, "getcwd failed: %s", nonnull (strerror (errno))); tmp_len = strlen (tmp); concat_name = XMALLOC (char, tmp_len + 1 + strlen (wrapper) + 1); memcpy (concat_name, tmp, tmp_len); concat_name[tmp_len] = '/'; strcpy (concat_name + tmp_len + 1, wrapper); if (check_executable (concat_name)) return concat_name; XFREE (concat_name); return NULL; } char * chase_symlinks (const char *pathspec) { #ifndef S_ISLNK return xstrdup (pathspec); #else char buf[LT_PATHMAX]; struct stat s; char *tmp_pathspec = xstrdup (pathspec); char *p; int has_symlinks = 0; while (strlen (tmp_pathspec) && !has_symlinks) { lt_debugprintf (__FILE__, __LINE__, "checking path component for symlinks: %s\n", tmp_pathspec); if (lstat (tmp_pathspec, &s) == 0) { if (S_ISLNK (s.st_mode) != 0) { has_symlinks = 1; break; } /* search backwards for last DIR_SEPARATOR */ p = tmp_pathspec + strlen (tmp_pathspec) - 1; while ((p > tmp_pathspec) && (!IS_DIR_SEPARATOR (*p))) p--; if ((p == tmp_pathspec) && (!IS_DIR_SEPARATOR (*p))) { /* no more DIR_SEPARATORS left */ break; } *p = '\0'; } else { lt_fatal (__FILE__, __LINE__, "error accessing file \"%s\": %s", tmp_pathspec, nonnull (strerror (errno))); } } XFREE (tmp_pathspec); if (!has_symlinks) { return xstrdup (pathspec); } tmp_pathspec = realpath (pathspec, buf); if (tmp_pathspec == 0) { lt_fatal (__FILE__, __LINE__, "could not follow symlinks for %s", pathspec); } return xstrdup (tmp_pathspec); #endif } char * strendzap (char *str, const char *pat) { size_t len, patlen; assert (str != NULL); assert (pat != NULL); len = strlen (str); patlen = strlen (pat); if (patlen <= len) { str += len - patlen; if (STREQ (str, pat)) *str = '\0'; } return str; } void lt_debugprintf (const char *file, int line, const char *fmt, ...) { va_list args; if (lt_debug) { (void) fprintf (stderr, "%s:%s:%d: ", program_name, file, line); va_start (args, fmt); (void) vfprintf (stderr, fmt, args); va_end (args); } } static void lt_error_core (int exit_status, const char *file, int line, const char *mode, const char *message, va_list ap) { fprintf (stderr, "%s:%s:%d: %s: ", program_name, file, line, mode); vfprintf (stderr, message, ap); fprintf (stderr, ".\n"); if (exit_status >= 0) exit (exit_status); } void lt_fatal (const char *file, int line, const char *message, ...) { va_list ap; va_start (ap, message); lt_error_core (EXIT_FAILURE, file, line, "FATAL", message, ap); va_end (ap); } static const char * nonnull (const char *s) { return s ? s : "(null)"; } static const char * nonempty (const char *s) { return (s && !*s) ? "(empty)" : nonnull (s); } void lt_setenv (const char *name, const char *value) { lt_debugprintf (__FILE__, __LINE__, "(lt_setenv) setting '%s' to '%s'\n", nonnull (name), nonnull (value)); { #ifdef HAVE_SETENV /* always make a copy, for consistency with !HAVE_SETENV */ char *str = xstrdup (value); setenv (name, str, 1); #else size_t len = strlen (name) + 1 + strlen (value) + 1; char *str = XMALLOC (char, len); sprintf (str, "%s=%s", name, value); if (putenv (str) != EXIT_SUCCESS) { XFREE (str); } #endif } } char * lt_extend_str (const char *orig_value, const char *add, int to_end) { char *new_value; if (orig_value && *orig_value) { size_t orig_value_len = strlen (orig_value); size_t add_len = strlen (add); new_value = XMALLOC (char, add_len + orig_value_len + 1); if (to_end) { strcpy (new_value, orig_value); strcpy (new_value + orig_value_len, add); } else { strcpy (new_value, add); strcpy (new_value + add_len, orig_value); } } else { new_value = xstrdup (add); } return new_value; } void lt_update_exe_path (const char *name, const char *value) { lt_debugprintf (__FILE__, __LINE__, "(lt_update_exe_path) modifying '%s' by prepending '%s'\n", nonnull (name), nonnull (value)); if (name && *name && value && *value) { char *new_value = lt_extend_str (getenv (name), value, 0); /* some systems can't cope with a ':'-terminated path #' */ size_t len = strlen (new_value); while ((len > 0) && IS_PATH_SEPARATOR (new_value[len-1])) { new_value[--len] = '\0'; } lt_setenv (name, new_value); XFREE (new_value); } } void lt_update_lib_path (const char *name, const char *value) { lt_debugprintf (__FILE__, __LINE__, "(lt_update_lib_path) modifying '%s' by prepending '%s'\n", nonnull (name), nonnull (value)); if (name && *name && value && *value) { char *new_value = lt_extend_str (getenv (name), value, 0); lt_setenv (name, new_value); XFREE (new_value); } } EOF case $host_os in mingw*) cat <<"EOF" /* Prepares an argument vector before calling spawn(). Note that spawn() does not by itself call the command interpreter (getenv ("COMSPEC") != NULL ? getenv ("COMSPEC") : ({ OSVERSIONINFO v; v.dwOSVersionInfoSize = sizeof(OSVERSIONINFO); GetVersionEx(&v); v.dwPlatformId == VER_PLATFORM_WIN32_NT; }) ? "cmd.exe" : "command.com"). Instead it simply concatenates the arguments, separated by ' ', and calls CreateProcess(). We must quote the arguments since Win32 CreateProcess() interprets characters like ' ', '\t', '\\', '"' (but not '<' and '>') in a special way: - Space and tab are interpreted as delimiters. They are not treated as delimiters if they are surrounded by double quotes: "...". - Unescaped double quotes are removed from the input. Their only effect is that within double quotes, space and tab are treated like normal characters. - Backslashes not followed by double quotes are not special. - But 2*n+1 backslashes followed by a double quote become n backslashes followed by a double quote (n >= 0): \" -> " \\\" -> \" \\\\\" -> \\" */ #define SHELL_SPECIAL_CHARS "\"\\ \001\002\003\004\005\006\007\010\011\012\013\014\015\016\017\020\021\022\023\024\025\026\027\030\031\032\033\034\035\036\037" #define SHELL_SPACE_CHARS " \001\002\003\004\005\006\007\010\011\012\013\014\015\016\017\020\021\022\023\024\025\026\027\030\031\032\033\034\035\036\037" char ** prepare_spawn (char **argv) { size_t argc; char **new_argv; size_t i; /* Count number of arguments. */ for (argc = 0; argv[argc] != NULL; argc++) ; /* Allocate new argument vector. */ new_argv = XMALLOC (char *, argc + 1); /* Put quoted arguments into the new argument vector. */ for (i = 0; i < argc; i++) { const char *string = argv[i]; if (string[0] == '\0') new_argv[i] = xstrdup ("\"\""); else if (strpbrk (string, SHELL_SPECIAL_CHARS) != NULL) { int quote_around = (strpbrk (string, SHELL_SPACE_CHARS) != NULL); size_t length; unsigned int backslashes; const char *s; char *quoted_string; char *p; length = 0; backslashes = 0; if (quote_around) length++; for (s = string; *s != '\0'; s++) { char c = *s; if (c == '"') length += backslashes + 1; length++; if (c == '\\') backslashes++; else backslashes = 0; } if (quote_around) length += backslashes + 1; quoted_string = XMALLOC (char, length + 1); p = quoted_string; backslashes = 0; if (quote_around) *p++ = '"'; for (s = string; *s != '\0'; s++) { char c = *s; if (c == '"') { unsigned int j; for (j = backslashes + 1; j > 0; j--) *p++ = '\\'; } *p++ = c; if (c == '\\') backslashes++; else backslashes = 0; } if (quote_around) { unsigned int j; for (j = backslashes; j > 0; j--) *p++ = '\\'; *p++ = '"'; } *p = '\0'; new_argv[i] = quoted_string; } else new_argv[i] = (char *) string; } new_argv[argc] = NULL; return new_argv; } EOF ;; esac cat <<"EOF" void lt_dump_script (FILE* f) { EOF func_emit_wrapper yes | $SED -n -e ' s/^\(.\{79\}\)\(..*\)/\1\ \2/ h s/\([\\"]\)/\\\1/g s/$/\\n/ s/\([^\n]*\).*/ fputs ("\1", f);/p g D' cat <<"EOF" } EOF } # end: func_emit_cwrapperexe_src # func_win32_import_lib_p ARG # True if ARG is an import lib, as indicated by $file_magic_cmd func_win32_import_lib_p () { $debug_cmd case `eval $file_magic_cmd \"\$1\" 2>/dev/null | $SED -e 10q` in *import*) : ;; *) false ;; esac } # func_suncc_cstd_abi # !!ONLY CALL THIS FOR SUN CC AFTER $compile_command IS FULLY EXPANDED!! # Several compiler flags select an ABI that is incompatible with the # Cstd library. Avoid specifying it if any are in CXXFLAGS. func_suncc_cstd_abi () { $debug_cmd case " $compile_command " in *" -compat=g "*|*\ -std=c++[0-9][0-9]\ *|*" -library=stdcxx4 "*|*" -library=stlport4 "*) suncc_use_cstd_abi=no ;; *) suncc_use_cstd_abi=yes ;; esac } # func_mode_link arg... func_mode_link () { $debug_cmd case $host in *-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-os2* | *-cegcc*) # It is impossible to link a dll without this setting, and # we shouldn't force the makefile maintainer to figure out # what system we are compiling for in order to pass an extra # flag for every libtool invocation. # allow_undefined=no # FIXME: Unfortunately, there are problems with the above when trying # to make a dll that has undefined symbols, in which case not # even a static library is built. For now, we need to specify # -no-undefined on the libtool link line when we can be certain # that all symbols are satisfied, otherwise we get a static library. allow_undefined=yes ;; *) allow_undefined=yes ;; esac libtool_args=$nonopt base_compile="$nonopt $@" compile_command=$nonopt finalize_command=$nonopt compile_rpath= finalize_rpath= compile_shlibpath= finalize_shlibpath= convenience= old_convenience= deplibs= old_deplibs= compiler_flags= linker_flags= dllsearchpath= lib_search_path=`pwd` inst_prefix_dir= new_inherited_linker_flags= avoid_version=no bindir= dlfiles= dlprefiles= dlself=no export_dynamic=no export_symbols= export_symbols_regex= generated= libobjs= ltlibs= module=no no_install=no objs= os2dllname= non_pic_objects= precious_files_regex= prefer_static_libs=no preload=false prev= prevarg= release= rpath= xrpath= perm_rpath= temp_rpath= thread_safe=no vinfo= vinfo_number=no weak_libs= single_module=$wl-single_module func_infer_tag $base_compile # We need to know -static, to get the right output filenames. for arg do case $arg in -shared) test yes != "$build_libtool_libs" \ && func_fatal_configuration "cannot build a shared library" build_old_libs=no break ;; -all-static | -static | -static-libtool-libs) case $arg in -all-static) if test yes = "$build_libtool_libs" && test -z "$link_static_flag"; then func_warning "complete static linking is impossible in this configuration" fi if test -n "$link_static_flag"; then dlopen_self=$dlopen_self_static fi prefer_static_libs=yes ;; -static) if test -z "$pic_flag" && test -n "$link_static_flag"; then dlopen_self=$dlopen_self_static fi prefer_static_libs=built ;; -static-libtool-libs) if test -z "$pic_flag" && test -n "$link_static_flag"; then dlopen_self=$dlopen_self_static fi prefer_static_libs=yes ;; esac build_libtool_libs=no build_old_libs=yes break ;; esac done # See if our shared archives depend on static archives. test -n "$old_archive_from_new_cmds" && build_old_libs=yes # Go through the arguments, transforming them on the way. while test "$#" -gt 0; do arg=$1 shift func_quote_for_eval "$arg" qarg=$func_quote_for_eval_unquoted_result func_append libtool_args " $func_quote_for_eval_result" # If the previous option needs an argument, assign it. if test -n "$prev"; then case $prev in output) func_append compile_command " @OUTPUT@" func_append finalize_command " @OUTPUT@" ;; esac case $prev in bindir) bindir=$arg prev= continue ;; dlfiles|dlprefiles) $preload || { # Add the symbol object into the linking commands. func_append compile_command " @SYMFILE@" func_append finalize_command " @SYMFILE@" preload=: } case $arg in *.la | *.lo) ;; # We handle these cases below. force) if test no = "$dlself"; then dlself=needless export_dynamic=yes fi prev= continue ;; self) if test dlprefiles = "$prev"; then dlself=yes elif test dlfiles = "$prev" && test yes != "$dlopen_self"; then dlself=yes else dlself=needless export_dynamic=yes fi prev= continue ;; *) if test dlfiles = "$prev"; then func_append dlfiles " $arg" else func_append dlprefiles " $arg" fi prev= continue ;; esac ;; expsyms) export_symbols=$arg test -f "$arg" \ || func_fatal_error "symbol file '$arg' does not exist" prev= continue ;; expsyms_regex) export_symbols_regex=$arg prev= continue ;; framework) case $host in *-*-darwin*) case "$deplibs " in *" $qarg.ltframework "*) ;; *) func_append deplibs " $qarg.ltframework" # this is fixed later ;; esac ;; esac prev= continue ;; inst_prefix) inst_prefix_dir=$arg prev= continue ;; mllvm) # Clang does not use LLVM to link, so we can simply discard any # '-mllvm $arg' options when doing the link step. prev= continue ;; objectlist) if test -f "$arg"; then save_arg=$arg moreargs= for fil in `cat "$save_arg"` do # func_append moreargs " $fil" arg=$fil # A libtool-controlled object. # Check to see that this really is a libtool object. if func_lalib_unsafe_p "$arg"; then pic_object= non_pic_object= # Read the .lo file func_source "$arg" if test -z "$pic_object" || test -z "$non_pic_object" || test none = "$pic_object" && test none = "$non_pic_object"; then func_fatal_error "cannot find name of object for '$arg'" fi # Extract subdirectory from the argument. func_dirname "$arg" "/" "" xdir=$func_dirname_result if test none != "$pic_object"; then # Prepend the subdirectory the object is found in. pic_object=$xdir$pic_object if test dlfiles = "$prev"; then if test yes = "$build_libtool_libs" && test yes = "$dlopen_support"; then func_append dlfiles " $pic_object" prev= continue else # If libtool objects are unsupported, then we need to preload. prev=dlprefiles fi fi # CHECK ME: I think I busted this. -Ossama if test dlprefiles = "$prev"; then # Preload the old-style object. func_append dlprefiles " $pic_object" prev= fi # A PIC object. func_append libobjs " $pic_object" arg=$pic_object fi # Non-PIC object. if test none != "$non_pic_object"; then # Prepend the subdirectory the object is found in. non_pic_object=$xdir$non_pic_object # A standard non-PIC object func_append non_pic_objects " $non_pic_object" if test -z "$pic_object" || test none = "$pic_object"; then arg=$non_pic_object fi else # If the PIC object exists, use it instead. # $xdir was prepended to $pic_object above. non_pic_object=$pic_object func_append non_pic_objects " $non_pic_object" fi else # Only an error if not doing a dry-run. if $opt_dry_run; then # Extract subdirectory from the argument. func_dirname "$arg" "/" "" xdir=$func_dirname_result func_lo2o "$arg" pic_object=$xdir$objdir/$func_lo2o_result non_pic_object=$xdir$func_lo2o_result func_append libobjs " $pic_object" func_append non_pic_objects " $non_pic_object" else func_fatal_error "'$arg' is not a valid libtool object" fi fi done else func_fatal_error "link input file '$arg' does not exist" fi arg=$save_arg prev= continue ;; os2dllname) os2dllname=$arg prev= continue ;; precious_regex) precious_files_regex=$arg prev= continue ;; release) release=-$arg prev= continue ;; rpath | xrpath) # We need an absolute path. case $arg in [\\/]* | [A-Za-z]:[\\/]*) ;; *) func_fatal_error "only absolute run-paths are allowed" ;; esac if test rpath = "$prev"; then case "$rpath " in *" $arg "*) ;; *) func_append rpath " $arg" ;; esac else case "$xrpath " in *" $arg "*) ;; *) func_append xrpath " $arg" ;; esac fi prev= continue ;; shrext) shrext_cmds=$arg prev= continue ;; weak) func_append weak_libs " $arg" prev= continue ;; xcclinker) func_append linker_flags " $qarg" func_append compiler_flags " $qarg" prev= func_append compile_command " $qarg" func_append finalize_command " $qarg" continue ;; xcompiler) func_append compiler_flags " $qarg" prev= func_append compile_command " $qarg" func_append finalize_command " $qarg" continue ;; xlinker) func_append linker_flags " $qarg" func_append compiler_flags " $wl$qarg" prev= func_append compile_command " $wl$qarg" func_append finalize_command " $wl$qarg" continue ;; *) eval "$prev=\"\$arg\"" prev= continue ;; esac fi # test -n "$prev" prevarg=$arg case $arg in -all-static) if test -n "$link_static_flag"; then # See comment for -static flag below, for more details. func_append compile_command " $link_static_flag" func_append finalize_command " $link_static_flag" fi continue ;; -allow-undefined) # FIXME: remove this flag sometime in the future. func_fatal_error "'-allow-undefined' must not be used because it is the default" ;; -avoid-version) avoid_version=yes continue ;; -bindir) prev=bindir continue ;; -dlopen) prev=dlfiles continue ;; -dlpreopen) prev=dlprefiles continue ;; -export-dynamic) export_dynamic=yes continue ;; -export-symbols | -export-symbols-regex) if test -n "$export_symbols" || test -n "$export_symbols_regex"; then func_fatal_error "more than one -exported-symbols argument is not allowed" fi if test X-export-symbols = "X$arg"; then prev=expsyms else prev=expsyms_regex fi continue ;; -framework) prev=framework continue ;; -inst-prefix-dir) prev=inst_prefix continue ;; # The native IRIX linker understands -LANG:*, -LIST:* and -LNO:* # so, if we see these flags be careful not to treat them like -L -L[A-Z][A-Z]*:*) case $with_gcc/$host in no/*-*-irix* | /*-*-irix*) func_append compile_command " $arg" func_append finalize_command " $arg" ;; esac continue ;; -L*) func_stripname "-L" '' "$arg" if test -z "$func_stripname_result"; then if test "$#" -gt 0; then func_fatal_error "require no space between '-L' and '$1'" else func_fatal_error "need path for '-L' option" fi fi func_resolve_sysroot "$func_stripname_result" dir=$func_resolve_sysroot_result # We need an absolute path. case $dir in [\\/]* | [A-Za-z]:[\\/]*) ;; *) absdir=`cd "$dir" && pwd` test -z "$absdir" && \ func_fatal_error "cannot determine absolute directory name of '$dir'" dir=$absdir ;; esac case "$deplibs " in *" -L$dir "* | *" $arg "*) # Will only happen for absolute or sysroot arguments ;; *) # Preserve sysroot, but never include relative directories case $dir in [\\/]* | [A-Za-z]:[\\/]* | =*) func_append deplibs " $arg" ;; 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*-*-sco3.2v5* | *-*-sco5v6*) # Causes problems with __ctype test X-lc = "X$arg" && continue ;; *-*-sysv4.2uw2* | *-*-sysv5* | *-*-unixware* | *-*-OpenUNIX*) # Compiler inserts libc in the correct place for threads to work test X-lc = "X$arg" && continue ;; esac elif test X-lc_r = "X$arg"; then case $host in *-*-openbsd* | *-*-freebsd* | *-*-dragonfly* | *-*-bitrig*) # Do not include libc_r directly, use -pthread flag. continue ;; esac fi func_append deplibs " $arg" continue ;; -mllvm) prev=mllvm continue ;; -module) module=yes continue ;; # Tru64 UNIX uses -model [arg] to determine the layout of C++ # classes, name mangling, and exception handling. # Darwin uses the -arch flag to determine output architecture. -model|-arch|-isysroot|--sysroot) func_append compiler_flags " $arg" func_append compile_command " $arg" func_append finalize_command " $arg" prev=xcompiler continue ;; -mt|-mthreads|-kthread|-Kthread|-pthread|-pthreads|--thread-safe \ |-threads|-fopenmp|-openmp|-mp|-xopenmp|-omp|-qsmp=*) func_append compiler_flags " $arg" func_append compile_command " $arg" func_append finalize_command " $arg" case "$new_inherited_linker_flags " in *" $arg "*) ;; * ) func_append new_inherited_linker_flags " $arg" ;; esac continue ;; -multi_module) single_module=$wl-multi_module continue ;; -no-fast-install) fast_install=no continue ;; -no-install) case $host in *-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-os2* | *-*-darwin* | *-cegcc*) # The PATH hackery in wrapper scripts is required on Windows # and Darwin in order for the loader to find any dlls it needs. func_warning "'-no-install' is ignored for $host" func_warning "assuming '-no-fast-install' instead" fast_install=no ;; *) no_install=yes ;; esac continue ;; -no-undefined) allow_undefined=no continue ;; -objectlist) prev=objectlist continue ;; -os2dllname) prev=os2dllname continue ;; -o) prev=output ;; -precious-files-regex) prev=precious_regex continue ;; -release) prev=release continue ;; -rpath) prev=rpath continue ;; -R) prev=xrpath continue ;; -R*) func_stripname '-R' '' "$arg" dir=$func_stripname_result # We need an absolute path. case $dir in [\\/]* | [A-Za-z]:[\\/]*) ;; =*) func_stripname '=' '' "$dir" dir=$lt_sysroot$func_stripname_result ;; *) func_fatal_error "only absolute run-paths are allowed" ;; esac case "$xrpath " in *" $dir "*) ;; *) func_append xrpath " $dir" ;; esac continue ;; -shared) # The effects of -shared are defined in a previous loop. continue ;; -shrext) prev=shrext continue ;; -static | -static-libtool-libs) # The effects of -static are defined in a previous loop. # We used to do the same as -all-static on platforms that # didn't have a PIC flag, but the assumption that the effects # would be equivalent was wrong. It would break on at least # Digital Unix and AIX. continue ;; -thread-safe) thread_safe=yes continue ;; -version-info) prev=vinfo continue ;; -version-number) prev=vinfo vinfo_number=yes continue ;; -weak) prev=weak continue ;; -Wc,*) func_stripname '-Wc,' '' "$arg" args=$func_stripname_result arg= save_ifs=$IFS; IFS=, for flag in $args; do IFS=$save_ifs func_quote_for_eval "$flag" func_append arg " $func_quote_for_eval_result" func_append compiler_flags " $func_quote_for_eval_result" done IFS=$save_ifs func_stripname ' ' '' "$arg" arg=$func_stripname_result ;; -Wl,*) func_stripname '-Wl,' '' "$arg" args=$func_stripname_result arg= save_ifs=$IFS; IFS=, for flag in $args; do IFS=$save_ifs func_quote_for_eval "$flag" func_append arg " $wl$func_quote_for_eval_result" func_append compiler_flags " $wl$func_quote_for_eval_result" func_append linker_flags " $func_quote_for_eval_result" done IFS=$save_ifs func_stripname ' ' '' "$arg" arg=$func_stripname_result ;; -Xcompiler) prev=xcompiler continue ;; -Xlinker) prev=xlinker continue ;; -XCClinker) prev=xcclinker continue ;; # -msg_* for osf cc -msg_*) func_quote_for_eval "$arg" arg=$func_quote_for_eval_result ;; # Flags to be passed through unchanged, with rationale: # -64, -mips[0-9] enable 64-bit mode for the SGI compiler # -r[0-9][0-9]* specify processor for the SGI compiler # -xarch=*, -xtarget=* enable 64-bit mode for the Sun compiler # +DA*, +DD* enable 64-bit mode for the HP compiler # -q* compiler args for the IBM compiler # -m*, -t[45]*, -txscale* architecture-specific flags for GCC # -F/path path to uninstalled frameworks, gcc on darwin # -p, -pg, --coverage, -fprofile-* profiling flags for GCC # -fstack-protector* stack protector flags for GCC # @file GCC response files # -tp=* Portland pgcc target processor selection # --sysroot=* for sysroot support # -O*, -g*, -flto*, -fwhopr*, -fuse-linker-plugin GCC link-time optimization # -specs=* GCC specs files # -stdlib=* select c++ std lib with clang # -fsanitize=* Clang/GCC memory and address sanitizer -64|-mips[0-9]|-r[0-9][0-9]*|-xarch=*|-xtarget=*|+DA*|+DD*|-q*|-m*| \ -t[45]*|-txscale*|-p|-pg|--coverage|-fprofile-*|-F*|@*|-tp=*|--sysroot=*| \ -O*|-g*|-flto*|-fwhopr*|-fuse-linker-plugin|-fstack-protector*|-stdlib=*| \ -specs=*|-fsanitize=*) func_quote_for_eval "$arg" arg=$func_quote_for_eval_result func_append compile_command " $arg" func_append finalize_command " $arg" func_append compiler_flags " $arg" continue ;; -Z*) if test os2 = "`expr $host : '.*\(os2\)'`"; then # OS/2 uses -Zxxx to specify OS/2-specific options compiler_flags="$compiler_flags $arg" func_append compile_command " $arg" func_append finalize_command " $arg" case $arg in -Zlinker | -Zstack) prev=xcompiler ;; esac continue else # Otherwise treat like 'Some other compiler flag' below func_quote_for_eval "$arg" arg=$func_quote_for_eval_result fi ;; # Some other compiler flag. -* | +*) func_quote_for_eval "$arg" arg=$func_quote_for_eval_result ;; *.$objext) # A standard object. func_append objs " $arg" ;; *.lo) # A libtool-controlled object. # Check to see that this really is a libtool object. if func_lalib_unsafe_p "$arg"; then pic_object= non_pic_object= # Read the .lo file func_source "$arg" if test -z "$pic_object" || test -z "$non_pic_object" || test none = "$pic_object" && test none = "$non_pic_object"; then func_fatal_error "cannot find name of object for '$arg'" fi # Extract subdirectory from the argument. func_dirname "$arg" "/" "" xdir=$func_dirname_result test none = "$pic_object" || { # Prepend the subdirectory the object is found in. pic_object=$xdir$pic_object if test dlfiles = "$prev"; then if test yes = "$build_libtool_libs" && test yes = "$dlopen_support"; then func_append dlfiles " $pic_object" prev= continue else # If libtool objects are unsupported, then we need to preload. prev=dlprefiles fi fi # CHECK ME: I think I busted this. -Ossama if test dlprefiles = "$prev"; then # Preload the old-style object. func_append dlprefiles " $pic_object" prev= fi # A PIC object. func_append libobjs " $pic_object" arg=$pic_object } # Non-PIC object. if test none != "$non_pic_object"; then # Prepend the subdirectory the object is found in. non_pic_object=$xdir$non_pic_object # A standard non-PIC object func_append non_pic_objects " $non_pic_object" if test -z "$pic_object" || test none = "$pic_object"; then arg=$non_pic_object fi else # If the PIC object exists, use it instead. # $xdir was prepended to $pic_object above. non_pic_object=$pic_object func_append non_pic_objects " $non_pic_object" fi else # Only an error if not doing a dry-run. if $opt_dry_run; then # Extract subdirectory from the argument. func_dirname "$arg" "/" "" xdir=$func_dirname_result func_lo2o "$arg" pic_object=$xdir$objdir/$func_lo2o_result non_pic_object=$xdir$func_lo2o_result func_append libobjs " $pic_object" func_append non_pic_objects " $non_pic_object" else func_fatal_error "'$arg' is not a valid libtool object" fi fi ;; *.$libext) # An archive. func_append deplibs " $arg" func_append old_deplibs " $arg" continue ;; *.la) # A libtool-controlled library. func_resolve_sysroot "$arg" if test dlfiles = "$prev"; then # This library was specified with -dlopen. func_append dlfiles " $func_resolve_sysroot_result" prev= elif test dlprefiles = "$prev"; then # The library was specified with -dlpreopen. func_append dlprefiles " $func_resolve_sysroot_result" prev= else func_append deplibs " $func_resolve_sysroot_result" fi continue ;; # Some other compiler argument. *) # Unknown arguments in both finalize_command and compile_command need # to be aesthetically quoted because they are evaled later. func_quote_for_eval "$arg" arg=$func_quote_for_eval_result ;; esac # arg # Now actually substitute the argument into the commands. if test -n "$arg"; then func_append compile_command " $arg" func_append finalize_command " $arg" fi done # argument parsing loop test -n "$prev" && \ func_fatal_help "the '$prevarg' option requires an argument" if test yes = "$export_dynamic" && test -n "$export_dynamic_flag_spec"; then eval arg=\"$export_dynamic_flag_spec\" func_append compile_command " $arg" func_append finalize_command " $arg" fi oldlibs= # calculate the name of the file, without its directory func_basename "$output" outputname=$func_basename_result libobjs_save=$libobjs if test -n "$shlibpath_var"; then # get the directories listed in $shlibpath_var eval shlib_search_path=\`\$ECHO \"\$$shlibpath_var\" \| \$SED \'s/:/ /g\'\` else shlib_search_path= fi eval sys_lib_search_path=\"$sys_lib_search_path_spec\" eval sys_lib_dlsearch_path=\"$sys_lib_dlsearch_path_spec\" # Definition is injected by LT_CONFIG during libtool generation. func_munge_path_list sys_lib_dlsearch_path "$LT_SYS_LIBRARY_PATH" func_dirname "$output" "/" "" output_objdir=$func_dirname_result$objdir func_to_tool_file "$output_objdir/" tool_output_objdir=$func_to_tool_file_result # Create the object directory. func_mkdir_p "$output_objdir" # Determine the type of output case $output in "") func_fatal_help "you must specify an output file" ;; *.$libext) linkmode=oldlib ;; *.lo | *.$objext) linkmode=obj ;; *.la) linkmode=lib ;; *) linkmode=prog ;; # Anything else should be a program. esac specialdeplibs= libs= # Find all interdependent deplibs by searching for libraries # that are linked more than once (e.g. -la -lb -la) for deplib in $deplibs; do if $opt_preserve_dup_deps; then case "$libs " in *" $deplib "*) func_append specialdeplibs " $deplib" ;; esac fi func_append libs " $deplib" done if test lib = "$linkmode"; then libs="$predeps $libs $compiler_lib_search_path $postdeps" # Compute libraries that are listed more than once in $predeps # $postdeps and mark them as special (i.e., whose duplicates are # not to be eliminated). pre_post_deps= if $opt_duplicate_compiler_generated_deps; then for pre_post_dep in $predeps $postdeps; do case "$pre_post_deps " in *" $pre_post_dep "*) func_append specialdeplibs " $pre_post_deps" ;; esac func_append pre_post_deps " $pre_post_dep" done fi pre_post_deps= fi deplibs= newdependency_libs= newlib_search_path= need_relink=no # whether we're linking any uninstalled libtool libraries notinst_deplibs= # not-installed libtool libraries notinst_path= # paths that contain not-installed libtool libraries case $linkmode in lib) passes="conv dlpreopen link" for file in $dlfiles $dlprefiles; do case $file in *.la) ;; *) func_fatal_help "libraries can '-dlopen' only libtool libraries: $file" ;; esac done ;; prog) compile_deplibs= finalize_deplibs= alldeplibs=false newdlfiles= newdlprefiles= passes="conv scan dlopen dlpreopen link" ;; *) passes="conv" ;; esac for pass in $passes; do # The preopen pass in lib mode reverses $deplibs; put it back here # so that -L comes before libs that need it for instance... if test lib,link = "$linkmode,$pass"; then ## FIXME: Find the place where the list is rebuilt in the wrong ## order, and fix it there properly tmp_deplibs= for deplib in $deplibs; do tmp_deplibs="$deplib $tmp_deplibs" done deplibs=$tmp_deplibs fi if test lib,link = "$linkmode,$pass" || test prog,scan = "$linkmode,$pass"; then libs=$deplibs deplibs= fi if test prog = "$linkmode"; then case $pass in dlopen) libs=$dlfiles ;; dlpreopen) libs=$dlprefiles ;; link) libs="$deplibs %DEPLIBS%" test "X$link_all_deplibs" != Xno && libs="$libs $dependency_libs" ;; esac fi if test lib,dlpreopen = "$linkmode,$pass"; then # Collect and forward deplibs of preopened libtool libs for lib in $dlprefiles; do # Ignore non-libtool-libs dependency_libs= func_resolve_sysroot "$lib" case $lib in *.la) func_source "$func_resolve_sysroot_result" ;; esac # Collect preopened libtool deplibs, except any this library # has declared as weak libs for deplib in $dependency_libs; do func_basename "$deplib" deplib_base=$func_basename_result case " $weak_libs " in *" $deplib_base "*) ;; *) func_append deplibs " $deplib" ;; esac done done libs=$dlprefiles fi if test dlopen = "$pass"; then # Collect dlpreopened libraries save_deplibs=$deplibs deplibs= fi for deplib in $libs; do lib= found=false case $deplib in -mt|-mthreads|-kthread|-Kthread|-pthread|-pthreads|--thread-safe \ |-threads|-fopenmp|-openmp|-mp|-xopenmp|-omp|-qsmp=*) if test prog,link = "$linkmode,$pass"; then compile_deplibs="$deplib $compile_deplibs" finalize_deplibs="$deplib $finalize_deplibs" else func_append compiler_flags " $deplib" if test lib = "$linkmode"; then case "$new_inherited_linker_flags " in *" $deplib "*) ;; * ) func_append new_inherited_linker_flags " $deplib" ;; esac fi fi continue ;; -l*) if test lib != "$linkmode" && test prog != "$linkmode"; then func_warning "'-l' is ignored for archives/objects" continue fi func_stripname '-l' '' "$deplib" name=$func_stripname_result if test lib = "$linkmode"; then searchdirs="$newlib_search_path $lib_search_path $compiler_lib_search_dirs $sys_lib_search_path $shlib_search_path" else searchdirs="$newlib_search_path $lib_search_path $sys_lib_search_path $shlib_search_path" fi for searchdir in $searchdirs; do for search_ext in .la $std_shrext .so .a; do # Search the libtool library lib=$searchdir/lib$name$search_ext if test -f "$lib"; then if test .la = "$search_ext"; then found=: else found=false fi break 2 fi done done if $found; then # deplib is a libtool library # If $allow_libtool_libs_with_static_runtimes && $deplib is a stdlib, # We need to do some special things here, and not later. if test yes = "$allow_libtool_libs_with_static_runtimes"; then case " $predeps $postdeps " in *" $deplib "*) if func_lalib_p "$lib"; then library_names= old_library= func_source "$lib" for l in $old_library $library_names; do ll=$l done if test "X$ll" = "X$old_library"; then # only static version available found=false func_dirname "$lib" "" "." ladir=$func_dirname_result lib=$ladir/$old_library if test prog,link = "$linkmode,$pass"; then compile_deplibs="$deplib $compile_deplibs" finalize_deplibs="$deplib $finalize_deplibs" else deplibs="$deplib $deplibs" test lib = "$linkmode" && newdependency_libs="$deplib $newdependency_libs" fi continue fi fi ;; *) ;; esac fi else # deplib doesn't seem to be a libtool library if test prog,link = "$linkmode,$pass"; then compile_deplibs="$deplib $compile_deplibs" finalize_deplibs="$deplib $finalize_deplibs" else deplibs="$deplib $deplibs" test lib = "$linkmode" && newdependency_libs="$deplib $newdependency_libs" fi continue fi ;; # -l *.ltframework) if test prog,link = "$linkmode,$pass"; then compile_deplibs="$deplib $compile_deplibs" finalize_deplibs="$deplib $finalize_deplibs" else deplibs="$deplib $deplibs" if test lib = "$linkmode"; then case "$new_inherited_linker_flags " in *" $deplib "*) ;; * ) func_append new_inherited_linker_flags " $deplib" ;; esac fi fi continue ;; -L*) case $linkmode in lib) deplibs="$deplib $deplibs" test conv = "$pass" && continue newdependency_libs="$deplib $newdependency_libs" func_stripname '-L' '' "$deplib" func_resolve_sysroot "$func_stripname_result" func_append newlib_search_path " $func_resolve_sysroot_result" ;; prog) if test conv = "$pass"; then deplibs="$deplib $deplibs" continue fi if test scan = "$pass"; then deplibs="$deplib $deplibs" else compile_deplibs="$deplib $compile_deplibs" finalize_deplibs="$deplib $finalize_deplibs" fi func_stripname '-L' '' "$deplib" func_resolve_sysroot "$func_stripname_result" func_append newlib_search_path " $func_resolve_sysroot_result" ;; *) func_warning "'-L' is ignored for archives/objects" ;; esac # linkmode continue ;; # -L -R*) if test link = "$pass"; then func_stripname '-R' '' "$deplib" func_resolve_sysroot "$func_stripname_result" dir=$func_resolve_sysroot_result # Make sure the xrpath contains only unique directories. case "$xrpath " in *" $dir "*) ;; *) func_append xrpath " $dir" ;; esac fi deplibs="$deplib $deplibs" continue ;; *.la) func_resolve_sysroot "$deplib" lib=$func_resolve_sysroot_result ;; *.$libext) if test conv = "$pass"; then deplibs="$deplib $deplibs" continue fi case $linkmode in lib) # Linking convenience modules into shared libraries is allowed, # but linking other static libraries is non-portable. case " $dlpreconveniencelibs " in *" $deplib "*) ;; *) valid_a_lib=false case $deplibs_check_method in match_pattern*) set dummy $deplibs_check_method; shift match_pattern_regex=`expr "$deplibs_check_method" : "$1 \(.*\)"` if eval "\$ECHO \"$deplib\"" 2>/dev/null | $SED 10q \ | $EGREP "$match_pattern_regex" > /dev/null; then valid_a_lib=: fi ;; pass_all) valid_a_lib=: ;; esac if $valid_a_lib; then echo $ECHO "*** Warning: Linking the shared library $output against the" $ECHO "*** static library $deplib is not portable!" deplibs="$deplib $deplibs" else echo $ECHO "*** Warning: Trying to link with static lib archive $deplib." echo "*** I have the capability to make that library automatically link in when" echo "*** you link to this library. But I can only do this if you have a" echo "*** shared version of the library, which you do not appear to have" echo "*** because the file extensions .$libext of this argument makes me believe" echo "*** that it is just a static archive that I should not use here." fi ;; esac continue ;; prog) if test link != "$pass"; then deplibs="$deplib $deplibs" else compile_deplibs="$deplib $compile_deplibs" finalize_deplibs="$deplib $finalize_deplibs" fi continue ;; esac # linkmode ;; # *.$libext *.lo | *.$objext) if test conv = "$pass"; then deplibs="$deplib $deplibs" elif test prog = "$linkmode"; then if test dlpreopen = "$pass" || test yes != "$dlopen_support" || test no = "$build_libtool_libs"; then # If there is no dlopen support or we're linking statically, # we need to preload. func_append newdlprefiles " $deplib" compile_deplibs="$deplib $compile_deplibs" finalize_deplibs="$deplib $finalize_deplibs" else func_append newdlfiles " $deplib" fi fi continue ;; %DEPLIBS%) alldeplibs=: continue ;; esac # case $deplib $found || test -f "$lib" \ || func_fatal_error "cannot find the library '$lib' or unhandled argument '$deplib'" # Check to see that this really is a libtool archive. func_lalib_unsafe_p "$lib" \ || func_fatal_error "'$lib' is not a valid libtool archive" func_dirname "$lib" "" "." ladir=$func_dirname_result dlname= dlopen= dlpreopen= libdir= library_names= old_library= inherited_linker_flags= # If the library was installed with an old release of libtool, # it will not redefine variables installed, or shouldnotlink installed=yes shouldnotlink=no avoidtemprpath= # Read the .la file func_source "$lib" # Convert "-framework foo" to "foo.ltframework" if test -n "$inherited_linker_flags"; then tmp_inherited_linker_flags=`$ECHO "$inherited_linker_flags" | $SED 's/-framework \([^ $]*\)/\1.ltframework/g'` for tmp_inherited_linker_flag in $tmp_inherited_linker_flags; do case " $new_inherited_linker_flags " in *" $tmp_inherited_linker_flag "*) ;; *) func_append new_inherited_linker_flags " $tmp_inherited_linker_flag";; esac done fi dependency_libs=`$ECHO " $dependency_libs" | $SED 's% \([^ $]*\).ltframework% -framework \1%g'` if test lib,link = "$linkmode,$pass" || test prog,scan = "$linkmode,$pass" || { test prog != "$linkmode" && test lib != "$linkmode"; }; then test -n "$dlopen" && func_append dlfiles " $dlopen" test -n "$dlpreopen" && func_append dlprefiles " $dlpreopen" fi if test conv = "$pass"; then # Only check for convenience libraries deplibs="$lib $deplibs" if test -z "$libdir"; then if test -z "$old_library"; then func_fatal_error "cannot find name of link library for '$lib'" fi # It is a libtool convenience library, so add in its objects. func_append convenience " $ladir/$objdir/$old_library" func_append old_convenience " $ladir/$objdir/$old_library" tmp_libs= for deplib in $dependency_libs; do deplibs="$deplib $deplibs" if $opt_preserve_dup_deps; then case "$tmp_libs " in *" $deplib "*) func_append specialdeplibs " $deplib" ;; esac fi func_append tmp_libs " $deplib" done elif test prog != "$linkmode" && test lib != "$linkmode"; then func_fatal_error "'$lib' is not a convenience library" fi continue fi # $pass = conv # Get the name of the library we link against. linklib= if test -n "$old_library" && { test yes = "$prefer_static_libs" || test built,no = "$prefer_static_libs,$installed"; }; then linklib=$old_library else for l in $old_library $library_names; do linklib=$l done fi if test -z "$linklib"; then func_fatal_error "cannot find name of link library for '$lib'" fi # This library was specified with -dlopen. if test dlopen = "$pass"; then test -z "$libdir" \ && func_fatal_error "cannot -dlopen a convenience library: '$lib'" if test -z "$dlname" || test yes != "$dlopen_support" || test no = "$build_libtool_libs" then # If there is no dlname, no dlopen support or we're linking # statically, we need to preload. We also need to preload any # dependent libraries so libltdl's deplib preloader doesn't # bomb out in the load deplibs phase. func_append dlprefiles " $lib $dependency_libs" else func_append newdlfiles " $lib" fi continue fi # $pass = dlopen # We need an absolute path. case $ladir in [\\/]* | [A-Za-z]:[\\/]*) abs_ladir=$ladir ;; *) abs_ladir=`cd "$ladir" && pwd` if test -z "$abs_ladir"; then func_warning "cannot determine absolute directory name of '$ladir'" func_warning "passing it literally to the linker, although it might fail" abs_ladir=$ladir fi ;; esac func_basename "$lib" laname=$func_basename_result # Find the relevant object directory and library name. if test yes = "$installed"; then if test ! -f "$lt_sysroot$libdir/$linklib" && test -f "$abs_ladir/$linklib"; then func_warning "library '$lib' was moved." dir=$ladir absdir=$abs_ladir libdir=$abs_ladir else dir=$lt_sysroot$libdir absdir=$lt_sysroot$libdir fi test yes = "$hardcode_automatic" && avoidtemprpath=yes else if test ! -f "$ladir/$objdir/$linklib" && test -f "$abs_ladir/$linklib"; then dir=$ladir absdir=$abs_ladir # Remove this search path later func_append notinst_path " $abs_ladir" else dir=$ladir/$objdir absdir=$abs_ladir/$objdir # Remove this search path later func_append notinst_path " $abs_ladir" fi fi # $installed = yes func_stripname 'lib' '.la' "$laname" name=$func_stripname_result # This library was specified with -dlpreopen. if test dlpreopen = "$pass"; then if test -z "$libdir" && test prog = "$linkmode"; then func_fatal_error "only libraries may -dlpreopen a convenience library: '$lib'" fi case $host in # special handling for platforms with PE-DLLs. *cygwin* | *mingw* | *cegcc* ) # Linker will automatically link against shared library if both # static and shared are present. Therefore, ensure we extract # symbols from the import library if a shared library is present # (otherwise, the dlopen module name will be incorrect). We do # this by putting the import library name into $newdlprefiles. # We recover the dlopen module name by 'saving' the la file # name in a special purpose variable, and (later) extracting the # dlname from the la file. if test -n "$dlname"; then func_tr_sh "$dir/$linklib" eval "libfile_$func_tr_sh_result=\$abs_ladir/\$laname" func_append newdlprefiles " $dir/$linklib" else func_append newdlprefiles " $dir/$old_library" # Keep a list of preopened convenience libraries to check # that they are being used correctly in the link pass. test -z "$libdir" && \ func_append dlpreconveniencelibs " $dir/$old_library" fi ;; * ) # Prefer using a static library (so that no silly _DYNAMIC symbols # are required to link). if test -n "$old_library"; then func_append newdlprefiles " $dir/$old_library" # Keep a list of preopened convenience libraries to check # that they are being used correctly in the link pass. test -z "$libdir" && \ func_append dlpreconveniencelibs " $dir/$old_library" # Otherwise, use the dlname, so that lt_dlopen finds it. elif test -n "$dlname"; then func_append newdlprefiles " $dir/$dlname" else func_append newdlprefiles " $dir/$linklib" fi ;; esac fi # $pass = dlpreopen if test -z "$libdir"; then # Link the convenience library if test lib = "$linkmode"; then deplibs="$dir/$old_library $deplibs" elif test prog,link = "$linkmode,$pass"; then compile_deplibs="$dir/$old_library $compile_deplibs" finalize_deplibs="$dir/$old_library $finalize_deplibs" else deplibs="$lib $deplibs" # used for prog,scan pass fi continue fi if test prog = "$linkmode" && test link != "$pass"; then func_append newlib_search_path " $ladir" deplibs="$lib $deplibs" linkalldeplibs=false if test no != "$link_all_deplibs" || test -z "$library_names" || test no = "$build_libtool_libs"; then linkalldeplibs=: fi tmp_libs= for deplib in $dependency_libs; do case $deplib in -L*) func_stripname '-L' '' "$deplib" func_resolve_sysroot "$func_stripname_result" func_append newlib_search_path " $func_resolve_sysroot_result" ;; esac # Need to link against all dependency_libs? if $linkalldeplibs; then deplibs="$deplib $deplibs" else # Need to hardcode shared library paths # or/and link against static libraries newdependency_libs="$deplib $newdependency_libs" fi if $opt_preserve_dup_deps; then case "$tmp_libs " in *" $deplib "*) func_append specialdeplibs " $deplib" ;; esac fi func_append tmp_libs " $deplib" done # for deplib continue fi # $linkmode = prog... if test prog,link = "$linkmode,$pass"; then if test -n "$library_names" && { { test no = "$prefer_static_libs" || test built,yes = "$prefer_static_libs,$installed"; } || test -z "$old_library"; }; then # We need to hardcode the library path if test -n "$shlibpath_var" && test -z "$avoidtemprpath"; then # Make sure the rpath contains only unique directories. case $temp_rpath: in *"$absdir:"*) ;; *) func_append temp_rpath "$absdir:" ;; esac fi # Hardcode the library path. # Skip directories that are in the system default run-time # search path. case " $sys_lib_dlsearch_path " in *" $absdir "*) ;; *) case "$compile_rpath " in *" $absdir "*) ;; *) func_append compile_rpath " $absdir" ;; esac ;; esac case " $sys_lib_dlsearch_path " in *" $libdir "*) ;; *) case "$finalize_rpath " in *" $libdir "*) ;; *) func_append finalize_rpath " $libdir" ;; esac ;; esac fi # $linkmode,$pass = prog,link... if $alldeplibs && { test pass_all = "$deplibs_check_method" || { test yes = "$build_libtool_libs" && test -n "$library_names"; }; }; then # We only need to search for static libraries continue fi fi link_static=no # Whether the deplib will be linked statically use_static_libs=$prefer_static_libs if test built = "$use_static_libs" && test yes = "$installed"; then use_static_libs=no fi if test -n "$library_names" && { test no = "$use_static_libs" || test -z "$old_library"; }; then case $host in *cygwin* | *mingw* | *cegcc* | *os2*) # No point in relinking DLLs because paths are not encoded func_append notinst_deplibs " $lib" need_relink=no ;; *) if test no = "$installed"; then func_append notinst_deplibs " $lib" need_relink=yes fi ;; esac # This is a shared library # Warn about portability, can't link against -module's on some # systems (darwin). Don't bleat about dlopened modules though! dlopenmodule= for dlpremoduletest in $dlprefiles; do if test "X$dlpremoduletest" = "X$lib"; then dlopenmodule=$dlpremoduletest break fi done if test -z "$dlopenmodule" && test yes = "$shouldnotlink" && test link = "$pass"; then echo if test prog = "$linkmode"; then $ECHO "*** Warning: Linking the executable $output against the loadable module" else $ECHO "*** Warning: Linking the shared library $output against the loadable module" fi $ECHO "*** $linklib is not portable!" fi if test lib = "$linkmode" && test yes = "$hardcode_into_libs"; then # Hardcode the library path. # Skip directories that are in the system default run-time # search path. case " $sys_lib_dlsearch_path " in *" $absdir "*) ;; *) case "$compile_rpath " in *" $absdir "*) ;; *) func_append compile_rpath " $absdir" ;; esac ;; esac case " $sys_lib_dlsearch_path " in *" $libdir "*) ;; *) case "$finalize_rpath " in *" $libdir "*) ;; *) func_append finalize_rpath " $libdir" ;; esac ;; esac fi if test -n "$old_archive_from_expsyms_cmds"; then # figure out the soname set dummy $library_names shift realname=$1 shift libname=`eval "\\$ECHO \"$libname_spec\""` # use dlname if we got it. it's perfectly good, no? if test -n "$dlname"; then soname=$dlname elif test -n "$soname_spec"; then # bleh windows case $host in *cygwin* | mingw* | *cegcc* | *os2*) func_arith $current - $age major=$func_arith_result versuffix=-$major ;; esac eval soname=\"$soname_spec\" else soname=$realname fi # Make a new name for the extract_expsyms_cmds to use soroot=$soname func_basename "$soroot" soname=$func_basename_result func_stripname 'lib' '.dll' "$soname" newlib=libimp-$func_stripname_result.a # If the library has no export list, then create one now if test -f "$output_objdir/$soname-def"; then : else func_verbose "extracting exported symbol list from '$soname'" func_execute_cmds "$extract_expsyms_cmds" 'exit $?' fi # Create $newlib if test -f "$output_objdir/$newlib"; then :; else func_verbose "generating import library for '$soname'" func_execute_cmds "$old_archive_from_expsyms_cmds" 'exit $?' fi # make sure the library variables are pointing to the new library dir=$output_objdir linklib=$newlib fi # test -n "$old_archive_from_expsyms_cmds" if test prog = "$linkmode" || test relink != "$opt_mode"; then add_shlibpath= add_dir= add= lib_linked=yes case $hardcode_action in immediate | unsupported) if test no = "$hardcode_direct"; then add=$dir/$linklib case $host in *-*-sco3.2v5.0.[024]*) add_dir=-L$dir ;; *-*-sysv4*uw2*) add_dir=-L$dir ;; *-*-sysv5OpenUNIX* | *-*-sysv5UnixWare7.[01].[10]* | \ *-*-unixware7*) add_dir=-L$dir ;; *-*-darwin* ) # if the lib is a (non-dlopened) module then we cannot # link against it, someone is ignoring the earlier warnings if /usr/bin/file -L $add 2> /dev/null | $GREP ": [^:]* bundle" >/dev/null; then if test "X$dlopenmodule" != "X$lib"; then $ECHO "*** Warning: lib $linklib is a module, not a shared library" if test -z "$old_library"; then echo echo "*** And there doesn't seem to be a static archive available" echo "*** The link will probably fail, sorry" else add=$dir/$old_library fi elif test -n "$old_library"; then add=$dir/$old_library fi fi esac elif test no = "$hardcode_minus_L"; then case $host in *-*-sunos*) add_shlibpath=$dir ;; esac add_dir=-L$dir add=-l$name elif test no = "$hardcode_shlibpath_var"; then add_shlibpath=$dir add=-l$name else lib_linked=no fi ;; relink) if test yes = "$hardcode_direct" && test no = "$hardcode_direct_absolute"; then add=$dir/$linklib elif test yes = "$hardcode_minus_L"; then add_dir=-L$absdir # Try looking first in the location we're being installed to. if test -n "$inst_prefix_dir"; then case $libdir in [\\/]*) func_append add_dir " -L$inst_prefix_dir$libdir" ;; esac fi add=-l$name elif test yes = "$hardcode_shlibpath_var"; then add_shlibpath=$dir add=-l$name else lib_linked=no fi ;; *) lib_linked=no ;; esac if test yes != "$lib_linked"; then func_fatal_configuration "unsupported hardcode properties" fi if test -n "$add_shlibpath"; then case :$compile_shlibpath: in *":$add_shlibpath:"*) ;; *) func_append compile_shlibpath "$add_shlibpath:" ;; esac fi if test prog = "$linkmode"; then test -n "$add_dir" && compile_deplibs="$add_dir $compile_deplibs" test -n "$add" && compile_deplibs="$add $compile_deplibs" else test -n "$add_dir" && deplibs="$add_dir $deplibs" test -n "$add" && deplibs="$add $deplibs" if test yes != "$hardcode_direct" && test yes != "$hardcode_minus_L" && test yes = "$hardcode_shlibpath_var"; then case :$finalize_shlibpath: in *":$libdir:"*) ;; *) func_append finalize_shlibpath "$libdir:" ;; esac fi fi fi if test prog = "$linkmode" || test relink = "$opt_mode"; then add_shlibpath= add_dir= add= # Finalize command for both is simple: just hardcode it. if test yes = "$hardcode_direct" && test no = "$hardcode_direct_absolute"; then add=$libdir/$linklib elif test yes = "$hardcode_minus_L"; then add_dir=-L$libdir add=-l$name elif test yes = "$hardcode_shlibpath_var"; then case :$finalize_shlibpath: in *":$libdir:"*) ;; *) func_append finalize_shlibpath "$libdir:" ;; esac add=-l$name elif test yes = "$hardcode_automatic"; then if test -n "$inst_prefix_dir" && test -f "$inst_prefix_dir$libdir/$linklib"; then add=$inst_prefix_dir$libdir/$linklib else add=$libdir/$linklib fi else # We cannot seem to hardcode it, guess we'll fake it. add_dir=-L$libdir # Try looking first in the location we're being installed to. if test -n "$inst_prefix_dir"; then case $libdir in [\\/]*) func_append add_dir " -L$inst_prefix_dir$libdir" ;; esac fi add=-l$name fi if test prog = "$linkmode"; then test -n "$add_dir" && finalize_deplibs="$add_dir $finalize_deplibs" test -n "$add" && finalize_deplibs="$add $finalize_deplibs" else test -n "$add_dir" && deplibs="$add_dir $deplibs" test -n "$add" && deplibs="$add $deplibs" fi fi elif test prog = "$linkmode"; then # Here we assume that one of hardcode_direct or hardcode_minus_L # is not unsupported. This is valid on all known static and # shared platforms. if test unsupported != "$hardcode_direct"; then test -n "$old_library" && linklib=$old_library compile_deplibs="$dir/$linklib $compile_deplibs" finalize_deplibs="$dir/$linklib $finalize_deplibs" else compile_deplibs="-l$name -L$dir $compile_deplibs" finalize_deplibs="-l$name -L$dir $finalize_deplibs" fi elif test yes = "$build_libtool_libs"; then # Not a shared library if test pass_all != "$deplibs_check_method"; then # We're trying link a shared library against a static one # but the system doesn't support it. # Just print a warning and add the library to dependency_libs so # that the program can be linked against the static library. echo $ECHO "*** Warning: This system cannot link to static lib archive $lib." echo "*** I have the capability to make that library automatically link in when" echo "*** you link to this library. But I can only do this if you have a" echo "*** shared version of the library, which you do not appear to have." if test yes = "$module"; then echo "*** But as you try to build a module library, libtool will still create " echo "*** a static module, that should work as long as the dlopening application" echo "*** is linked with the -dlopen flag to resolve symbols at runtime." if test -z "$global_symbol_pipe"; then echo echo "*** However, this would only work if libtool was able to extract symbol" echo "*** lists from a program, using 'nm' or equivalent, but libtool could" echo "*** not find such a program. So, this module is probably useless." echo "*** 'nm' from GNU binutils and a full rebuild may help." fi if test no = "$build_old_libs"; then build_libtool_libs=module build_old_libs=yes else build_libtool_libs=no fi fi else deplibs="$dir/$old_library $deplibs" link_static=yes fi fi # link shared/static library? if test lib = "$linkmode"; then if test -n "$dependency_libs" && { test yes != "$hardcode_into_libs" || test yes = "$build_old_libs" || test yes = "$link_static"; }; then # Extract -R from dependency_libs temp_deplibs= for libdir in $dependency_libs; do case $libdir in -R*) func_stripname '-R' '' "$libdir" temp_xrpath=$func_stripname_result case " $xrpath " in *" $temp_xrpath "*) ;; *) func_append xrpath " $temp_xrpath";; esac;; *) func_append temp_deplibs " $libdir";; esac done dependency_libs=$temp_deplibs fi func_append newlib_search_path " $absdir" # Link against this library test no = "$link_static" && newdependency_libs="$abs_ladir/$laname $newdependency_libs" # ... and its dependency_libs tmp_libs= for deplib in $dependency_libs; do newdependency_libs="$deplib $newdependency_libs" case $deplib in -L*) func_stripname '-L' '' "$deplib" func_resolve_sysroot "$func_stripname_result";; *) func_resolve_sysroot "$deplib" ;; esac if $opt_preserve_dup_deps; then case "$tmp_libs " in *" $func_resolve_sysroot_result "*) func_append specialdeplibs " $func_resolve_sysroot_result" ;; esac fi func_append tmp_libs " $func_resolve_sysroot_result" done if test no != "$link_all_deplibs"; then # Add the search paths of all dependency libraries for deplib in $dependency_libs; do path= case $deplib in -L*) path=$deplib ;; *.la) func_resolve_sysroot "$deplib" deplib=$func_resolve_sysroot_result func_dirname "$deplib" "" "." dir=$func_dirname_result # We need an absolute path. case $dir in [\\/]* | [A-Za-z]:[\\/]*) absdir=$dir ;; *) absdir=`cd "$dir" && pwd` if test -z "$absdir"; then func_warning "cannot determine absolute directory name of '$dir'" absdir=$dir fi ;; esac if $GREP "^installed=no" $deplib > /dev/null; then case $host in *-*-darwin*) depdepl= eval deplibrary_names=`$SED -n -e 's/^library_names=\(.*\)$/\1/p' $deplib` if test -n "$deplibrary_names"; then for tmp in $deplibrary_names; do depdepl=$tmp done if test -f "$absdir/$objdir/$depdepl"; then depdepl=$absdir/$objdir/$depdepl darwin_install_name=`$OTOOL -L $depdepl | awk '{if (NR == 2) {print $1;exit}}'` if test -z "$darwin_install_name"; then darwin_install_name=`$OTOOL64 -L $depdepl | awk '{if (NR == 2) {print $1;exit}}'` fi func_append compiler_flags " $wl-dylib_file $wl$darwin_install_name:$depdepl" func_append linker_flags " -dylib_file $darwin_install_name:$depdepl" path= fi fi ;; *) path=-L$absdir/$objdir ;; esac else eval libdir=`$SED -n -e 's/^libdir=\(.*\)$/\1/p' $deplib` test -z "$libdir" && \ func_fatal_error "'$deplib' is not a valid libtool archive" test "$absdir" != "$libdir" && \ func_warning "'$deplib' seems to be moved" path=-L$absdir fi ;; esac case " $deplibs " in *" $path "*) ;; *) deplibs="$path $deplibs" ;; esac done fi # link_all_deplibs != no fi # linkmode = lib done # for deplib in $libs if test link = "$pass"; then if test prog = "$linkmode"; then compile_deplibs="$new_inherited_linker_flags $compile_deplibs" finalize_deplibs="$new_inherited_linker_flags $finalize_deplibs" else compiler_flags="$compiler_flags "`$ECHO " $new_inherited_linker_flags" | $SED 's% \([^ $]*\).ltframework% -framework \1%g'` fi fi dependency_libs=$newdependency_libs if test dlpreopen = "$pass"; then # Link the dlpreopened libraries before other libraries for deplib in $save_deplibs; do deplibs="$deplib $deplibs" done fi if test dlopen != "$pass"; then test conv = "$pass" || { # Make sure lib_search_path contains only unique directories. lib_search_path= for dir in $newlib_search_path; do case "$lib_search_path " in *" $dir "*) ;; *) func_append lib_search_path " $dir" ;; esac done newlib_search_path= } if test prog,link = "$linkmode,$pass"; then vars="compile_deplibs finalize_deplibs" else vars=deplibs fi for var in $vars dependency_libs; do # Add libraries to $var in reverse order eval tmp_libs=\"\$$var\" new_libs= for deplib in $tmp_libs; do # FIXME: Pedantically, this is the right thing to do, so # that some nasty dependency loop isn't accidentally # broken: #new_libs="$deplib $new_libs" # Pragmatically, this seems to cause very few problems in # practice: case $deplib in -L*) new_libs="$deplib $new_libs" ;; -R*) ;; *) # And here is the reason: when a library appears more # than once as an explicit dependence of a library, or # is implicitly linked in more than once by the # compiler, it is considered special, and multiple # occurrences thereof are not removed. Compare this # with having the same library being listed as a # dependency of multiple other libraries: in this case, # we know (pedantically, we assume) the library does not # need to be listed more than once, so we keep only the # last copy. This is not always right, but it is rare # enough that we require users that really mean to play # such unportable linking tricks to link the library # using -Wl,-lname, so that libtool does not consider it # for duplicate removal. case " $specialdeplibs " in *" $deplib "*) new_libs="$deplib $new_libs" ;; *) case " $new_libs " in *" $deplib "*) ;; *) new_libs="$deplib $new_libs" ;; esac ;; esac ;; esac done tmp_libs= for deplib in $new_libs; do case $deplib in -L*) case " $tmp_libs " in *" $deplib "*) ;; *) func_append tmp_libs " $deplib" ;; esac ;; *) func_append tmp_libs " $deplib" ;; esac done eval $var=\"$tmp_libs\" done # for var fi # Add Sun CC postdeps if required: test CXX = "$tagname" && { case $host_os in linux*) case `$CC -V 2>&1 | sed 5q` in *Sun\ C*) # Sun C++ 5.9 func_suncc_cstd_abi if test no != "$suncc_use_cstd_abi"; then func_append postdeps ' -library=Cstd -library=Crun' fi ;; esac ;; solaris*) func_cc_basename "$CC" case $func_cc_basename_result in CC* | sunCC*) func_suncc_cstd_abi if test no != "$suncc_use_cstd_abi"; then func_append postdeps ' -library=Cstd -library=Crun' fi ;; esac ;; esac } # Last step: remove runtime libs from dependency_libs # (they stay in deplibs) tmp_libs= for i in $dependency_libs; do case " $predeps $postdeps $compiler_lib_search_path " in *" $i "*) i= ;; esac if test -n "$i"; then func_append tmp_libs " $i" fi done dependency_libs=$tmp_libs done # for pass if test prog = "$linkmode"; then dlfiles=$newdlfiles fi if test prog = "$linkmode" || test lib = "$linkmode"; then dlprefiles=$newdlprefiles fi case $linkmode in oldlib) if test -n "$dlfiles$dlprefiles" || test no != "$dlself"; then func_warning "'-dlopen' is ignored for archives" fi case " $deplibs" in *\ -l* | *\ -L*) func_warning "'-l' and '-L' are ignored for archives" ;; esac test -n "$rpath" && \ func_warning "'-rpath' is ignored for archives" test -n "$xrpath" && \ func_warning "'-R' is ignored for archives" test -n "$vinfo" && \ func_warning "'-version-info/-version-number' is ignored for archives" test -n "$release" && \ func_warning "'-release' is ignored for archives" test -n "$export_symbols$export_symbols_regex" && \ func_warning "'-export-symbols' is ignored for archives" # Now set the variables for building old libraries. build_libtool_libs=no oldlibs=$output func_append objs "$old_deplibs" ;; lib) # Make sure we only generate libraries of the form 'libNAME.la'. case $outputname in lib*) func_stripname 'lib' '.la' "$outputname" name=$func_stripname_result eval shared_ext=\"$shrext_cmds\" eval libname=\"$libname_spec\" ;; *) test no = "$module" \ && func_fatal_help "libtool library '$output' must begin with 'lib'" if test no != "$need_lib_prefix"; then # Add the "lib" prefix for modules if required func_stripname '' '.la' "$outputname" name=$func_stripname_result eval shared_ext=\"$shrext_cmds\" eval libname=\"$libname_spec\" else func_stripname '' '.la' "$outputname" libname=$func_stripname_result fi ;; esac if test -n "$objs"; then if test pass_all != "$deplibs_check_method"; then func_fatal_error "cannot build libtool library '$output' from non-libtool objects on this host:$objs" else echo $ECHO "*** Warning: Linking the shared library $output against the non-libtool" $ECHO "*** objects $objs is not portable!" func_append libobjs " $objs" fi fi test no = "$dlself" \ || func_warning "'-dlopen self' is ignored for libtool libraries" set dummy $rpath shift test 1 -lt "$#" \ && func_warning "ignoring multiple '-rpath's for a libtool library" install_libdir=$1 oldlibs= if test -z "$rpath"; then if test yes = "$build_libtool_libs"; then # Building a libtool convenience library. # Some compilers have problems with a '.al' extension so # convenience libraries should have the same extension an # archive normally would. oldlibs="$output_objdir/$libname.$libext $oldlibs" build_libtool_libs=convenience build_old_libs=yes fi test -n "$vinfo" && \ func_warning "'-version-info/-version-number' is ignored for convenience libraries" test -n "$release" && \ func_warning "'-release' is ignored for convenience libraries" else # Parse the version information argument. save_ifs=$IFS; IFS=: set dummy $vinfo 0 0 0 shift IFS=$save_ifs test -n "$7" && \ func_fatal_help "too many parameters to '-version-info'" # convert absolute version numbers to libtool ages # this retains compatibility with .la files and attempts # to make the code below a bit more comprehensible case $vinfo_number in yes) number_major=$1 number_minor=$2 number_revision=$3 # # There are really only two kinds -- those that # use the current revision as the major version # and those that subtract age and use age as # a minor version. But, then there is irix # that has an extra 1 added just for fun # case $version_type in # correct linux to gnu/linux during the next big refactor darwin|freebsd-elf|linux|osf|windows|none) func_arith $number_major + $number_minor current=$func_arith_result age=$number_minor revision=$number_revision ;; freebsd-aout|qnx|sunos) current=$number_major revision=$number_minor age=0 ;; irix|nonstopux) func_arith $number_major + $number_minor current=$func_arith_result age=$number_minor revision=$number_minor lt_irix_increment=no ;; *) func_fatal_configuration "$modename: unknown library version type '$version_type'" ;; esac ;; no) current=$1 revision=$2 age=$3 ;; esac # Check that each of the things are valid numbers. case $current in 0|[1-9]|[1-9][0-9]|[1-9][0-9][0-9]|[1-9][0-9][0-9][0-9]|[1-9][0-9][0-9][0-9][0-9]) ;; *) func_error "CURRENT '$current' must be a nonnegative integer" func_fatal_error "'$vinfo' is not valid version information" ;; esac case $revision in 0|[1-9]|[1-9][0-9]|[1-9][0-9][0-9]|[1-9][0-9][0-9][0-9]|[1-9][0-9][0-9][0-9][0-9]) ;; *) func_error "REVISION '$revision' must be a nonnegative integer" func_fatal_error "'$vinfo' is not valid version information" ;; esac case $age in 0|[1-9]|[1-9][0-9]|[1-9][0-9][0-9]|[1-9][0-9][0-9][0-9]|[1-9][0-9][0-9][0-9][0-9]) ;; *) func_error "AGE '$age' must be a nonnegative integer" func_fatal_error "'$vinfo' is not valid version information" ;; esac if test "$age" -gt "$current"; then func_error "AGE '$age' is greater than the current interface number '$current'" func_fatal_error "'$vinfo' is not valid version information" fi # Calculate the version variables. major= versuffix= verstring= case $version_type in none) ;; darwin) # Like Linux, but with the current version available in # verstring for coding it into the library header func_arith $current - $age major=.$func_arith_result versuffix=$major.$age.$revision # Darwin ld doesn't like 0 for these options... func_arith $current + 1 minor_current=$func_arith_result xlcverstring="$wl-compatibility_version $wl$minor_current $wl-current_version $wl$minor_current.$revision" verstring="-compatibility_version $minor_current -current_version $minor_current.$revision" # On Darwin other compilers case $CC in nagfor*) verstring="$wl-compatibility_version $wl$minor_current $wl-current_version $wl$minor_current.$revision" ;; *) verstring="-compatibility_version $minor_current -current_version $minor_current.$revision" ;; esac ;; freebsd-aout) major=.$current versuffix=.$current.$revision ;; freebsd-elf) func_arith $current - $age major=.$func_arith_result versuffix=$major.$age.$revision ;; irix | nonstopux) if test no = "$lt_irix_increment"; then func_arith $current - $age else func_arith $current - $age + 1 fi major=$func_arith_result case $version_type in nonstopux) verstring_prefix=nonstopux ;; *) verstring_prefix=sgi ;; esac verstring=$verstring_prefix$major.$revision # Add in all the interfaces that we are compatible with. loop=$revision while test 0 -ne "$loop"; do func_arith $revision - $loop iface=$func_arith_result func_arith $loop - 1 loop=$func_arith_result verstring=$verstring_prefix$major.$iface:$verstring done # Before this point, $major must not contain '.'. major=.$major versuffix=$major.$revision ;; linux) # correct to gnu/linux during the next big refactor func_arith $current - $age major=.$func_arith_result versuffix=$major.$age.$revision ;; osf) func_arith $current - $age major=.$func_arith_result versuffix=.$current.$age.$revision verstring=$current.$age.$revision # Add in all the interfaces that we are compatible with. loop=$age while test 0 -ne "$loop"; do func_arith $current - $loop iface=$func_arith_result func_arith $loop - 1 loop=$func_arith_result verstring=$verstring:$iface.0 done # Make executables depend on our current version. func_append verstring ":$current.0" ;; qnx) major=.$current versuffix=.$current ;; sco) major=.$current versuffix=.$current ;; sunos) major=.$current versuffix=.$current.$revision ;; windows) # Use '-' rather than '.', since we only want one # extension on DOS 8.3 file systems. func_arith $current - $age major=$func_arith_result versuffix=-$major ;; *) func_fatal_configuration "unknown library version type '$version_type'" ;; esac # Clear the version info if we defaulted, and they specified a release. if test -z "$vinfo" && test -n "$release"; then major= case $version_type in darwin) # we can't check for "0.0" in archive_cmds due to quoting # problems, so we reset it completely verstring= ;; *) verstring=0.0 ;; esac if test no = "$need_version"; then versuffix= else versuffix=.0.0 fi fi # Remove version info from name if versioning should be avoided if test yes,no = "$avoid_version,$need_version"; then major= versuffix= verstring= fi # Check to see if the archive will have undefined symbols. if test yes = "$allow_undefined"; then if test unsupported = "$allow_undefined_flag"; then if test yes = "$build_old_libs"; then func_warning "undefined symbols not allowed in $host shared libraries; building static only" build_libtool_libs=no else func_fatal_error "can't build $host shared library unless -no-undefined is specified" fi fi else # Don't allow undefined symbols. allow_undefined_flag=$no_undefined_flag fi fi func_generate_dlsyms "$libname" "$libname" : func_append libobjs " $symfileobj" test " " = "$libobjs" && libobjs= if test relink != "$opt_mode"; then # Remove our outputs, but don't remove object files since they # may have been created when compiling PIC objects. removelist= tempremovelist=`$ECHO "$output_objdir/*"` for p in $tempremovelist; do case $p in *.$objext | *.gcno) ;; $output_objdir/$outputname | $output_objdir/$libname.* | $output_objdir/$libname$release.*) if test -n "$precious_files_regex"; then if $ECHO "$p" | $EGREP -e "$precious_files_regex" >/dev/null 2>&1 then continue fi fi func_append removelist " $p" ;; *) ;; esac done test -n "$removelist" && \ func_show_eval "${RM}r \$removelist" fi # Now set the variables for building old libraries. if test yes = "$build_old_libs" && test convenience != "$build_libtool_libs"; then func_append oldlibs " $output_objdir/$libname.$libext" # Transform .lo files to .o files. oldobjs="$objs "`$ECHO "$libobjs" | $SP2NL | $SED "/\.$libext$/d; $lo2o" | $NL2SP` fi # Eliminate all temporary directories. #for path in $notinst_path; do # lib_search_path=`$ECHO "$lib_search_path " | $SED "s% $path % %g"` # deplibs=`$ECHO "$deplibs " | $SED "s% -L$path % %g"` # dependency_libs=`$ECHO "$dependency_libs " | $SED "s% -L$path % %g"` #done if test -n "$xrpath"; then # If the user specified any rpath flags, then add them. temp_xrpath= for libdir in $xrpath; do func_replace_sysroot "$libdir" func_append temp_xrpath " -R$func_replace_sysroot_result" case "$finalize_rpath " in *" $libdir "*) ;; *) func_append finalize_rpath " $libdir" ;; esac done if test yes != "$hardcode_into_libs" || test yes = "$build_old_libs"; then dependency_libs="$temp_xrpath $dependency_libs" fi fi # Make sure dlfiles contains only unique files that won't be dlpreopened old_dlfiles=$dlfiles dlfiles= for lib in $old_dlfiles; do case " $dlprefiles $dlfiles " in *" $lib "*) ;; *) func_append dlfiles " $lib" ;; esac done # Make sure dlprefiles contains only unique files old_dlprefiles=$dlprefiles dlprefiles= for lib in $old_dlprefiles; do case "$dlprefiles " in *" $lib "*) ;; *) func_append dlprefiles " $lib" ;; esac done if test yes = "$build_libtool_libs"; then if test -n "$rpath"; then case $host in *-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-os2* | *-*-beos* | *-cegcc* | *-*-haiku*) # these systems don't actually have a c library (as such)! ;; *-*-rhapsody* | *-*-darwin1.[012]) # Rhapsody C library is in the System framework func_append deplibs " System.ltframework" ;; *-*-netbsd*) # Don't link with libc until the a.out ld.so is fixed. ;; *-*-openbsd* | *-*-freebsd* | *-*-dragonfly*) # Do not include libc due to us having libc/libc_r. ;; *-*-sco3.2v5* | *-*-sco5v6*) # Causes problems with __ctype ;; *-*-sysv4.2uw2* | *-*-sysv5* | *-*-unixware* | *-*-OpenUNIX*) # Compiler inserts libc in the correct place for threads to work ;; *) # Add libc to deplibs on all other systems if necessary. if test yes = "$build_libtool_need_lc"; then func_append deplibs " -lc" fi ;; esac fi # Transform deplibs into only deplibs that can be linked in shared. name_save=$name libname_save=$libname release_save=$release versuffix_save=$versuffix major_save=$major # I'm not sure if I'm treating the release correctly. I think # release should show up in the -l (ie -lgmp5) so we don't want to # add it in twice. Is that correct? release= versuffix= major= newdeplibs= droppeddeps=no case $deplibs_check_method in pass_all) # Don't check for shared/static. Everything works. # This might be a little naive. We might want to check # whether the library exists or not. But this is on # osf3 & osf4 and I'm not really sure... Just # implementing what was already the behavior. newdeplibs=$deplibs ;; test_compile) # This code stresses the "libraries are programs" paradigm to its # limits. Maybe even breaks it. We compile a program, linking it # against the deplibs as a proxy for the library. Then we can check # whether they linked in statically or dynamically with ldd. $opt_dry_run || $RM conftest.c cat > conftest.c </dev/null` $nocaseglob else potential_libs=`ls $i/$libnameglob[.-]* 2>/dev/null` fi for potent_lib in $potential_libs; do # Follow soft links. if ls -lLd "$potent_lib" 2>/dev/null | $GREP " -> " >/dev/null; then continue fi # The statement above tries to avoid entering an # endless loop below, in case of cyclic links. # We might still enter an endless loop, since a link # loop can be closed while we follow links, # but so what? potlib=$potent_lib while test -h "$potlib" 2>/dev/null; do potliblink=`ls -ld $potlib | $SED 's/.* -> //'` case $potliblink in [\\/]* | [A-Za-z]:[\\/]*) potlib=$potliblink;; *) potlib=`$ECHO "$potlib" | $SED 's|[^/]*$||'`"$potliblink";; esac done if eval $file_magic_cmd \"\$potlib\" 2>/dev/null | $SED -e 10q | $EGREP "$file_magic_regex" > /dev/null; then func_append newdeplibs " $a_deplib" a_deplib= break 2 fi done done fi if test -n "$a_deplib"; then droppeddeps=yes echo $ECHO "*** Warning: linker path does not have real file for library $a_deplib." echo "*** I have the capability to make that library automatically link in when" echo "*** you link to this library. But I can only do this if you have a" echo "*** shared version of the library, which you do not appear to have" echo "*** because I did check the linker path looking for a file starting" if test -z "$potlib"; then $ECHO "*** with $libname but no candidates were found. (...for file magic test)" else $ECHO "*** with $libname and none of the candidates passed a file format test" $ECHO "*** using a file magic. Last file checked: $potlib" fi fi ;; *) # Add a -L argument. func_append newdeplibs " $a_deplib" ;; esac done # Gone through all deplibs. ;; match_pattern*) set dummy $deplibs_check_method; shift match_pattern_regex=`expr "$deplibs_check_method" : "$1 \(.*\)"` for a_deplib in $deplibs; do case $a_deplib in -l*) func_stripname -l '' "$a_deplib" name=$func_stripname_result if test yes = "$allow_libtool_libs_with_static_runtimes"; then case " $predeps $postdeps " in *" $a_deplib "*) func_append newdeplibs " $a_deplib" a_deplib= ;; esac fi if test -n "$a_deplib"; then libname=`eval "\\$ECHO \"$libname_spec\""` for i in $lib_search_path $sys_lib_search_path $shlib_search_path; do potential_libs=`ls $i/$libname[.-]* 2>/dev/null` for potent_lib in $potential_libs; do potlib=$potent_lib # see symlink-check above in file_magic test if eval "\$ECHO \"$potent_lib\"" 2>/dev/null | $SED 10q | \ $EGREP "$match_pattern_regex" > /dev/null; then func_append newdeplibs " $a_deplib" a_deplib= break 2 fi done done fi if test -n "$a_deplib"; then droppeddeps=yes echo $ECHO "*** Warning: linker path does not have real file for library $a_deplib." echo "*** I have the capability to make that library automatically link in when" echo "*** you link to this library. But I can only do this if you have a" echo "*** shared version of the library, which you do not appear to have" echo "*** because I did check the linker path looking for a file starting" if test -z "$potlib"; then $ECHO "*** with $libname but no candidates were found. (...for regex pattern test)" else $ECHO "*** with $libname and none of the candidates passed a file format test" $ECHO "*** using a regex pattern. Last file checked: $potlib" fi fi ;; *) # Add a -L argument. func_append newdeplibs " $a_deplib" ;; esac done # Gone through all deplibs. ;; none | unknown | *) newdeplibs= tmp_deplibs=`$ECHO " $deplibs" | $SED 's/ -lc$//; s/ -[LR][^ ]*//g'` if test yes = "$allow_libtool_libs_with_static_runtimes"; then for i in $predeps $postdeps; do # can't use Xsed below, because $i might contain '/' tmp_deplibs=`$ECHO " $tmp_deplibs" | $SED "s|$i||"` done fi case $tmp_deplibs in *[!\ \ ]*) echo if test none = "$deplibs_check_method"; then echo "*** Warning: inter-library dependencies are not supported in this platform." else echo "*** Warning: inter-library dependencies are not known to be supported." fi echo "*** All declared inter-library dependencies are being dropped." droppeddeps=yes ;; esac ;; esac versuffix=$versuffix_save major=$major_save release=$release_save libname=$libname_save name=$name_save case $host in *-*-rhapsody* | *-*-darwin1.[012]) # On Rhapsody replace the C library with the System framework newdeplibs=`$ECHO " $newdeplibs" | $SED 's/ -lc / System.ltframework /'` ;; esac if test yes = "$droppeddeps"; then if test yes = "$module"; then echo echo "*** Warning: libtool could not satisfy all declared inter-library" $ECHO "*** dependencies of module $libname. Therefore, libtool will create" echo "*** a static module, that should work as long as the dlopening" echo "*** application is linked with the -dlopen flag." if test -z "$global_symbol_pipe"; then echo echo "*** However, this would only work if libtool was able to extract symbol" echo "*** lists from a program, using 'nm' or equivalent, but libtool could" echo "*** not find such a program. So, this module is probably useless." echo "*** 'nm' from GNU binutils and a full rebuild may help." fi if test no = "$build_old_libs"; then oldlibs=$output_objdir/$libname.$libext build_libtool_libs=module build_old_libs=yes else build_libtool_libs=no fi else echo "*** The inter-library dependencies that have been dropped here will be" echo "*** automatically added whenever a program is linked with this library" echo "*** or is declared to -dlopen it." if test no = "$allow_undefined"; then echo echo "*** Since this library must not contain undefined symbols," echo "*** because either the platform does not support them or" echo "*** it was explicitly requested with -no-undefined," echo "*** libtool will only create a static version of it." if test no = "$build_old_libs"; then oldlibs=$output_objdir/$libname.$libext build_libtool_libs=module build_old_libs=yes else build_libtool_libs=no fi fi fi fi # Done checking deplibs! deplibs=$newdeplibs fi # Time to change all our "foo.ltframework" stuff back to "-framework foo" case $host in *-*-darwin*) newdeplibs=`$ECHO " $newdeplibs" | $SED 's% \([^ $]*\).ltframework% -framework \1%g'` new_inherited_linker_flags=`$ECHO " $new_inherited_linker_flags" | $SED 's% \([^ $]*\).ltframework% -framework \1%g'` deplibs=`$ECHO " $deplibs" | $SED 's% \([^ $]*\).ltframework% -framework \1%g'` ;; esac # move library search paths that coincide with paths to not yet # installed libraries to the beginning of the library search list new_libs= for path in $notinst_path; do case " $new_libs " in *" -L$path/$objdir "*) ;; *) case " $deplibs " in *" -L$path/$objdir "*) func_append new_libs " -L$path/$objdir" ;; esac ;; esac done for deplib in $deplibs; do case $deplib in -L*) case " $new_libs " in *" $deplib "*) ;; *) func_append new_libs " $deplib" ;; esac ;; *) func_append new_libs " $deplib" ;; esac done deplibs=$new_libs # All the library-specific variables (install_libdir is set above). library_names= old_library= dlname= # Test again, we may have decided not to build it any more if test yes = "$build_libtool_libs"; then # Remove $wl instances when linking with ld. # FIXME: should test the right _cmds variable. case $archive_cmds in *\$LD\ *) wl= ;; esac if test yes = "$hardcode_into_libs"; then # Hardcode the library paths hardcode_libdirs= dep_rpath= rpath=$finalize_rpath test relink = "$opt_mode" || rpath=$compile_rpath$rpath for libdir in $rpath; do if test -n "$hardcode_libdir_flag_spec"; then if test -n "$hardcode_libdir_separator"; then func_replace_sysroot "$libdir" libdir=$func_replace_sysroot_result if test -z "$hardcode_libdirs"; then hardcode_libdirs=$libdir else # Just accumulate the unique libdirs. case $hardcode_libdir_separator$hardcode_libdirs$hardcode_libdir_separator in *"$hardcode_libdir_separator$libdir$hardcode_libdir_separator"*) ;; *) func_append hardcode_libdirs "$hardcode_libdir_separator$libdir" ;; esac fi else eval flag=\"$hardcode_libdir_flag_spec\" func_append dep_rpath " $flag" fi elif test -n "$runpath_var"; then case "$perm_rpath " in *" $libdir "*) ;; *) func_append perm_rpath " $libdir" ;; esac fi done # Substitute the hardcoded libdirs into the rpath. if test -n "$hardcode_libdir_separator" && test -n "$hardcode_libdirs"; then libdir=$hardcode_libdirs eval "dep_rpath=\"$hardcode_libdir_flag_spec\"" fi if test -n "$runpath_var" && test -n "$perm_rpath"; then # We should set the runpath_var. rpath= for dir in $perm_rpath; do func_append rpath "$dir:" done eval "$runpath_var='$rpath\$$runpath_var'; export $runpath_var" fi test -n "$dep_rpath" && deplibs="$dep_rpath $deplibs" fi shlibpath=$finalize_shlibpath test relink = "$opt_mode" || shlibpath=$compile_shlibpath$shlibpath if test -n "$shlibpath"; then eval "$shlibpath_var='$shlibpath\$$shlibpath_var'; export $shlibpath_var" fi # Get the real and link names of the library. eval shared_ext=\"$shrext_cmds\" eval library_names=\"$library_names_spec\" set dummy $library_names shift realname=$1 shift if test -n "$soname_spec"; then eval soname=\"$soname_spec\" else soname=$realname fi if test -z "$dlname"; then dlname=$soname fi lib=$output_objdir/$realname linknames= for link do func_append linknames " $link" done # Use standard objects if they are pic test -z "$pic_flag" && libobjs=`$ECHO "$libobjs" | $SP2NL | $SED "$lo2o" | $NL2SP` test "X$libobjs" = "X " && libobjs= delfiles= if test -n "$export_symbols" && test -n "$include_expsyms"; then $opt_dry_run || cp "$export_symbols" "$output_objdir/$libname.uexp" export_symbols=$output_objdir/$libname.uexp func_append delfiles " $export_symbols" fi orig_export_symbols= case $host_os in cygwin* | mingw* | cegcc*) if test -n "$export_symbols" && test -z "$export_symbols_regex"; then # exporting using user supplied symfile func_dll_def_p "$export_symbols" || { # and it's NOT already a .def file. Must figure out # which of the given symbols are data symbols and tag # them as such. So, trigger use of export_symbols_cmds. # export_symbols gets reassigned inside the "prepare # the list of exported symbols" if statement, so the # include_expsyms logic still works. orig_export_symbols=$export_symbols export_symbols= always_export_symbols=yes } fi ;; esac # Prepare the list of exported symbols if test -z "$export_symbols"; then if test yes = "$always_export_symbols" || test -n "$export_symbols_regex"; then func_verbose "generating symbol list for '$libname.la'" export_symbols=$output_objdir/$libname.exp $opt_dry_run || $RM $export_symbols cmds=$export_symbols_cmds save_ifs=$IFS; IFS='~' for cmd1 in $cmds; do IFS=$save_ifs # Take the normal branch if the nm_file_list_spec branch # doesn't work or if tool conversion is not needed. case $nm_file_list_spec~$to_tool_file_cmd in *~func_convert_file_noop | *~func_convert_file_msys_to_w32 | ~*) try_normal_branch=yes eval cmd=\"$cmd1\" func_len " $cmd" len=$func_len_result ;; *) try_normal_branch=no ;; esac if test yes = "$try_normal_branch" \ && { test "$len" -lt "$max_cmd_len" \ || test "$max_cmd_len" -le -1; } then func_show_eval "$cmd" 'exit $?' skipped_export=false elif test -n "$nm_file_list_spec"; then func_basename "$output" output_la=$func_basename_result save_libobjs=$libobjs save_output=$output output=$output_objdir/$output_la.nm func_to_tool_file "$output" libobjs=$nm_file_list_spec$func_to_tool_file_result func_append delfiles " $output" func_verbose "creating $NM input file list: $output" for obj in $save_libobjs; do func_to_tool_file "$obj" $ECHO "$func_to_tool_file_result" done > "$output" eval cmd=\"$cmd1\" func_show_eval "$cmd" 'exit $?' output=$save_output libobjs=$save_libobjs skipped_export=false else # The command line is too long to execute in one step. func_verbose "using reloadable object file for export list..." skipped_export=: # Break out early, otherwise skipped_export may be # set to false by a later but shorter cmd. break fi done IFS=$save_ifs if test -n "$export_symbols_regex" && test : != "$skipped_export"; then func_show_eval '$EGREP -e "$export_symbols_regex" "$export_symbols" > "${export_symbols}T"' func_show_eval '$MV "${export_symbols}T" "$export_symbols"' fi fi fi if test -n "$export_symbols" && test -n "$include_expsyms"; then tmp_export_symbols=$export_symbols test -n "$orig_export_symbols" && tmp_export_symbols=$orig_export_symbols $opt_dry_run || eval '$ECHO "$include_expsyms" | $SP2NL >> "$tmp_export_symbols"' fi if test : != "$skipped_export" && test -n "$orig_export_symbols"; then # The given exports_symbols file has to be filtered, so filter it. func_verbose "filter symbol list for '$libname.la' to tag DATA exports" # FIXME: $output_objdir/$libname.filter potentially contains lots of # 's' commands, which not all seds can handle. GNU sed should be fine # though. Also, the filter scales superlinearly with the number of # global variables. join(1) would be nice here, but unfortunately # isn't a blessed tool. $opt_dry_run || $SED -e '/[ ,]DATA/!d;s,\(.*\)\([ \,].*\),s|^\1$|\1\2|,' < $export_symbols > $output_objdir/$libname.filter func_append delfiles " $export_symbols $output_objdir/$libname.filter" export_symbols=$output_objdir/$libname.def $opt_dry_run || $SED -f $output_objdir/$libname.filter < $orig_export_symbols > $export_symbols fi tmp_deplibs= for test_deplib in $deplibs; do case " $convenience " in *" $test_deplib "*) ;; *) func_append tmp_deplibs " $test_deplib" ;; esac done deplibs=$tmp_deplibs if test -n "$convenience"; then if test -n "$whole_archive_flag_spec" && test yes = "$compiler_needs_object" && test -z "$libobjs"; then # extract the archives, so we have objects to list. # TODO: could optimize this to just extract one archive. whole_archive_flag_spec= fi if test -n "$whole_archive_flag_spec"; then save_libobjs=$libobjs eval libobjs=\"\$libobjs $whole_archive_flag_spec\" test "X$libobjs" = "X " && libobjs= else gentop=$output_objdir/${outputname}x func_append generated " $gentop" func_extract_archives $gentop $convenience func_append libobjs " $func_extract_archives_result" test "X$libobjs" = "X " && libobjs= fi fi if test yes = "$thread_safe" && test -n "$thread_safe_flag_spec"; then eval flag=\"$thread_safe_flag_spec\" func_append linker_flags " $flag" fi # Make a backup of the uninstalled library when relinking if test relink = "$opt_mode"; then $opt_dry_run || eval '(cd $output_objdir && $RM ${realname}U && $MV $realname ${realname}U)' || exit $? fi # Do each of the archive commands. if test yes = "$module" && test -n "$module_cmds"; then if test -n "$export_symbols" && test -n "$module_expsym_cmds"; then eval test_cmds=\"$module_expsym_cmds\" cmds=$module_expsym_cmds else eval test_cmds=\"$module_cmds\" cmds=$module_cmds fi else if test -n "$export_symbols" && test -n "$archive_expsym_cmds"; then eval test_cmds=\"$archive_expsym_cmds\" cmds=$archive_expsym_cmds else eval test_cmds=\"$archive_cmds\" cmds=$archive_cmds fi fi if test : != "$skipped_export" && func_len " $test_cmds" && len=$func_len_result && test "$len" -lt "$max_cmd_len" || test "$max_cmd_len" -le -1; then : else # The command line is too long to link in one step, link piecewise # or, if using GNU ld and skipped_export is not :, use a linker # script. # Save the value of $output and $libobjs because we want to # use them later. If we have whole_archive_flag_spec, we # want to use save_libobjs as it was before # whole_archive_flag_spec was expanded, because we can't # assume the linker understands whole_archive_flag_spec. # This may have to be revisited, in case too many # convenience libraries get linked in and end up exceeding # the spec. if test -z "$convenience" || test -z "$whole_archive_flag_spec"; then save_libobjs=$libobjs fi save_output=$output func_basename "$output" output_la=$func_basename_result # Clear the reloadable object creation command queue and # initialize k to one. test_cmds= concat_cmds= objlist= last_robj= k=1 if test -n "$save_libobjs" && test : != "$skipped_export" && test yes = "$with_gnu_ld"; then output=$output_objdir/$output_la.lnkscript func_verbose "creating GNU ld script: $output" echo 'INPUT (' > $output for obj in $save_libobjs do func_to_tool_file "$obj" $ECHO "$func_to_tool_file_result" >> $output done echo ')' >> $output func_append delfiles " $output" func_to_tool_file "$output" output=$func_to_tool_file_result elif test -n "$save_libobjs" && test : != "$skipped_export" && test -n "$file_list_spec"; then output=$output_objdir/$output_la.lnk func_verbose "creating linker input file list: $output" : > $output set x $save_libobjs shift firstobj= if test yes = "$compiler_needs_object"; then firstobj="$1 " shift fi for obj do func_to_tool_file "$obj" $ECHO "$func_to_tool_file_result" >> $output done func_append delfiles " $output" func_to_tool_file "$output" output=$firstobj\"$file_list_spec$func_to_tool_file_result\" else if test -n "$save_libobjs"; then func_verbose "creating reloadable object files..." output=$output_objdir/$output_la-$k.$objext eval test_cmds=\"$reload_cmds\" func_len " $test_cmds" len0=$func_len_result len=$len0 # Loop over the list of objects to be linked. for obj in $save_libobjs do func_len " $obj" func_arith $len + $func_len_result len=$func_arith_result if test -z "$objlist" || test "$len" -lt "$max_cmd_len"; then func_append objlist " $obj" else # The command $test_cmds is almost too long, add a # command to the queue. if test 1 -eq "$k"; then # The first file doesn't have a previous command to add. reload_objs=$objlist eval concat_cmds=\"$reload_cmds\" else # All subsequent reloadable object files will link in # the last one created. reload_objs="$objlist $last_robj" eval concat_cmds=\"\$concat_cmds~$reload_cmds~\$RM $last_robj\" fi last_robj=$output_objdir/$output_la-$k.$objext func_arith $k + 1 k=$func_arith_result output=$output_objdir/$output_la-$k.$objext objlist=" $obj" func_len " $last_robj" func_arith $len0 + $func_len_result len=$func_arith_result fi done # Handle the remaining objects by creating one last # reloadable object file. All subsequent reloadable object # files will link in the last one created. test -z "$concat_cmds" || concat_cmds=$concat_cmds~ reload_objs="$objlist $last_robj" eval concat_cmds=\"\$concat_cmds$reload_cmds\" if test -n "$last_robj"; then eval concat_cmds=\"\$concat_cmds~\$RM $last_robj\" fi func_append delfiles " $output" else output= fi ${skipped_export-false} && { func_verbose "generating symbol list for '$libname.la'" export_symbols=$output_objdir/$libname.exp $opt_dry_run || $RM $export_symbols libobjs=$output # Append the command to create the export file. test -z "$concat_cmds" || concat_cmds=$concat_cmds~ eval concat_cmds=\"\$concat_cmds$export_symbols_cmds\" if test -n "$last_robj"; then eval concat_cmds=\"\$concat_cmds~\$RM $last_robj\" fi } test -n "$save_libobjs" && func_verbose "creating a temporary reloadable object file: $output" # Loop through the commands generated above and execute them. save_ifs=$IFS; IFS='~' for cmd in $concat_cmds; do IFS=$save_ifs $opt_quiet || { func_quote_for_expand "$cmd" eval "func_echo $func_quote_for_expand_result" } $opt_dry_run || eval "$cmd" || { lt_exit=$? # Restore the uninstalled library and exit if test relink = "$opt_mode"; then ( cd "$output_objdir" && \ $RM "${realname}T" && \ $MV "${realname}U" "$realname" ) fi exit $lt_exit } done IFS=$save_ifs if test -n "$export_symbols_regex" && ${skipped_export-false}; then func_show_eval '$EGREP -e "$export_symbols_regex" "$export_symbols" > "${export_symbols}T"' func_show_eval '$MV "${export_symbols}T" "$export_symbols"' fi fi ${skipped_export-false} && { if test -n "$export_symbols" && test -n "$include_expsyms"; then tmp_export_symbols=$export_symbols test -n "$orig_export_symbols" && tmp_export_symbols=$orig_export_symbols $opt_dry_run || eval '$ECHO "$include_expsyms" | $SP2NL >> "$tmp_export_symbols"' fi if test -n "$orig_export_symbols"; then # The given exports_symbols file has to be filtered, so filter it. func_verbose "filter symbol list for '$libname.la' to tag DATA exports" # FIXME: $output_objdir/$libname.filter potentially contains lots of # 's' commands, which not all seds can handle. GNU sed should be fine # though. Also, the filter scales superlinearly with the number of # global variables. join(1) would be nice here, but unfortunately # isn't a blessed tool. $opt_dry_run || $SED -e '/[ ,]DATA/!d;s,\(.*\)\([ \,].*\),s|^\1$|\1\2|,' < $export_symbols > $output_objdir/$libname.filter func_append delfiles " $export_symbols $output_objdir/$libname.filter" export_symbols=$output_objdir/$libname.def $opt_dry_run || $SED -f $output_objdir/$libname.filter < $orig_export_symbols > $export_symbols fi } libobjs=$output # Restore the value of output. output=$save_output if test -n "$convenience" && test -n "$whole_archive_flag_spec"; then eval libobjs=\"\$libobjs $whole_archive_flag_spec\" test "X$libobjs" = "X " && libobjs= fi # Expand the library linking commands again to reset the # value of $libobjs for piecewise linking. # Do each of the archive commands. if test yes = "$module" && test -n "$module_cmds"; then if test -n "$export_symbols" && test -n "$module_expsym_cmds"; then cmds=$module_expsym_cmds else cmds=$module_cmds fi else if test -n "$export_symbols" && test -n "$archive_expsym_cmds"; then cmds=$archive_expsym_cmds else cmds=$archive_cmds fi fi fi if test -n "$delfiles"; then # Append the command to remove temporary files to $cmds. eval cmds=\"\$cmds~\$RM $delfiles\" fi # Add any objects from preloaded convenience libraries if test -n "$dlprefiles"; then gentop=$output_objdir/${outputname}x func_append generated " $gentop" func_extract_archives $gentop $dlprefiles func_append libobjs " $func_extract_archives_result" test "X$libobjs" = "X " && libobjs= fi save_ifs=$IFS; IFS='~' for cmd in $cmds; do IFS=$sp$nl eval cmd=\"$cmd\" IFS=$save_ifs $opt_quiet || { func_quote_for_expand "$cmd" eval "func_echo $func_quote_for_expand_result" } $opt_dry_run || eval "$cmd" || { lt_exit=$? # Restore the uninstalled library and exit if test relink = "$opt_mode"; then ( cd "$output_objdir" && \ $RM "${realname}T" && \ $MV "${realname}U" "$realname" ) fi exit $lt_exit } done IFS=$save_ifs # Restore the uninstalled library and exit if test relink = "$opt_mode"; then $opt_dry_run || eval '(cd $output_objdir && $RM ${realname}T && $MV $realname ${realname}T && $MV ${realname}U $realname)' || exit $? if test -n "$convenience"; then if test -z "$whole_archive_flag_spec"; then func_show_eval '${RM}r "$gentop"' fi fi exit $EXIT_SUCCESS fi # Create links to the real library. for linkname in $linknames; do if test "$realname" != "$linkname"; then func_show_eval '(cd "$output_objdir" && $RM "$linkname" && $LN_S "$realname" "$linkname")' 'exit $?' fi done # If -module or -export-dynamic was specified, set the dlname. if test yes = "$module" || test yes = "$export_dynamic"; then # On all known operating systems, these are identical. dlname=$soname fi fi ;; obj) if test -n "$dlfiles$dlprefiles" || test no != "$dlself"; then func_warning "'-dlopen' is ignored for objects" fi case " $deplibs" in *\ -l* | *\ -L*) func_warning "'-l' and '-L' are ignored for objects" ;; esac test -n "$rpath" && \ func_warning "'-rpath' is ignored for objects" test -n "$xrpath" && \ func_warning "'-R' is ignored for objects" test -n "$vinfo" && \ func_warning "'-version-info' is ignored for objects" test -n "$release" && \ func_warning "'-release' is ignored for objects" case $output in *.lo) test -n "$objs$old_deplibs" && \ func_fatal_error "cannot build library object '$output' from non-libtool objects" libobj=$output func_lo2o "$libobj" obj=$func_lo2o_result ;; *) libobj= obj=$output ;; esac # Delete the old objects. $opt_dry_run || $RM $obj $libobj # Objects from convenience libraries. This assumes # single-version convenience libraries. Whenever we create # different ones for PIC/non-PIC, this we'll have to duplicate # the extraction. reload_conv_objs= gentop= # if reload_cmds runs $LD directly, get rid of -Wl from # whole_archive_flag_spec and hope we can get by with turning comma # into space. case $reload_cmds in *\$LD[\ \$]*) wl= ;; esac if test -n "$convenience"; then if test -n "$whole_archive_flag_spec"; then eval tmp_whole_archive_flags=\"$whole_archive_flag_spec\" test -n "$wl" || tmp_whole_archive_flags=`$ECHO "$tmp_whole_archive_flags" | $SED 's|,| |g'` reload_conv_objs=$reload_objs\ $tmp_whole_archive_flags else gentop=$output_objdir/${obj}x func_append generated " $gentop" func_extract_archives $gentop $convenience reload_conv_objs="$reload_objs $func_extract_archives_result" fi fi # If we're not building shared, we need to use non_pic_objs test yes = "$build_libtool_libs" || libobjs=$non_pic_objects # Create the old-style object. reload_objs=$objs$old_deplibs' '`$ECHO "$libobjs" | $SP2NL | $SED "/\.$libext$/d; /\.lib$/d; $lo2o" | $NL2SP`' '$reload_conv_objs output=$obj func_execute_cmds "$reload_cmds" 'exit $?' # Exit if we aren't doing a library object file. if test -z "$libobj"; then if test -n "$gentop"; then func_show_eval '${RM}r "$gentop"' fi exit $EXIT_SUCCESS fi test yes = "$build_libtool_libs" || { if test -n "$gentop"; then func_show_eval '${RM}r "$gentop"' fi # Create an invalid libtool object if no PIC, so that we don't # accidentally link it into a program. # $show "echo timestamp > $libobj" # $opt_dry_run || eval "echo timestamp > $libobj" || exit $? exit $EXIT_SUCCESS } if test -n "$pic_flag" || test default != "$pic_mode"; then # Only do commands if we really have different PIC objects. reload_objs="$libobjs $reload_conv_objs" output=$libobj func_execute_cmds "$reload_cmds" 'exit $?' fi if test -n "$gentop"; then func_show_eval '${RM}r "$gentop"' fi exit $EXIT_SUCCESS ;; prog) case $host in *cygwin*) func_stripname '' '.exe' "$output" output=$func_stripname_result.exe;; esac test -n "$vinfo" && \ func_warning "'-version-info' is ignored for programs" test -n "$release" && \ func_warning "'-release' is ignored for programs" $preload \ && test unknown,unknown,unknown = "$dlopen_support,$dlopen_self,$dlopen_self_static" \ && func_warning "'LT_INIT([dlopen])' not used. Assuming no dlopen support." case $host in *-*-rhapsody* | *-*-darwin1.[012]) # On Rhapsody replace the C library is the System framework compile_deplibs=`$ECHO " $compile_deplibs" | $SED 's/ -lc / System.ltframework /'` finalize_deplibs=`$ECHO " $finalize_deplibs" | $SED 's/ -lc / System.ltframework /'` ;; esac case $host in *-*-darwin*) # Don't allow lazy linking, it breaks C++ global constructors # But is supposedly fixed on 10.4 or later (yay!). if test CXX = "$tagname"; then case ${MACOSX_DEPLOYMENT_TARGET-10.0} in 10.[0123]) func_append compile_command " $wl-bind_at_load" func_append finalize_command " $wl-bind_at_load" ;; esac fi # Time to change all our "foo.ltframework" stuff back to "-framework foo" compile_deplibs=`$ECHO " $compile_deplibs" | $SED 's% \([^ $]*\).ltframework% -framework \1%g'` finalize_deplibs=`$ECHO " $finalize_deplibs" | $SED 's% \([^ $]*\).ltframework% -framework \1%g'` ;; esac # move library search paths that coincide with paths to not yet # installed libraries to the beginning of the library search list new_libs= for path in $notinst_path; do case " $new_libs " in *" -L$path/$objdir "*) ;; *) case " $compile_deplibs " in *" -L$path/$objdir "*) func_append new_libs " -L$path/$objdir" ;; esac ;; esac done for deplib in $compile_deplibs; do case $deplib in -L*) case " $new_libs " in *" $deplib "*) ;; *) func_append new_libs " $deplib" ;; esac ;; *) func_append new_libs " $deplib" ;; esac done compile_deplibs=$new_libs func_append compile_command " $compile_deplibs" func_append finalize_command " $finalize_deplibs" if test -n "$rpath$xrpath"; then # If the user specified any rpath flags, then add them. for libdir in $rpath $xrpath; do # This is the magic to use -rpath. case "$finalize_rpath " in *" $libdir "*) ;; *) func_append finalize_rpath " $libdir" ;; esac done fi # Now hardcode the library paths rpath= hardcode_libdirs= for libdir in $compile_rpath $finalize_rpath; do if test -n "$hardcode_libdir_flag_spec"; then if test -n "$hardcode_libdir_separator"; then if test -z "$hardcode_libdirs"; then hardcode_libdirs=$libdir else # Just accumulate the unique libdirs. case $hardcode_libdir_separator$hardcode_libdirs$hardcode_libdir_separator in *"$hardcode_libdir_separator$libdir$hardcode_libdir_separator"*) ;; *) func_append hardcode_libdirs "$hardcode_libdir_separator$libdir" ;; esac fi else eval flag=\"$hardcode_libdir_flag_spec\" func_append rpath " $flag" fi elif test -n "$runpath_var"; then case "$perm_rpath " in *" $libdir "*) ;; *) func_append perm_rpath " $libdir" ;; esac fi case $host in *-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-os2* | *-cegcc*) testbindir=`$ECHO "$libdir" | $SED -e 's*/lib$*/bin*'` case :$dllsearchpath: in *":$libdir:"*) ;; ::) dllsearchpath=$libdir;; *) func_append dllsearchpath ":$libdir";; esac case :$dllsearchpath: in *":$testbindir:"*) ;; ::) dllsearchpath=$testbindir;; *) func_append dllsearchpath ":$testbindir";; esac ;; esac done # Substitute the hardcoded libdirs into the rpath. if test -n "$hardcode_libdir_separator" && test -n "$hardcode_libdirs"; then libdir=$hardcode_libdirs eval rpath=\" $hardcode_libdir_flag_spec\" fi compile_rpath=$rpath rpath= hardcode_libdirs= for libdir in $finalize_rpath; do if test -n "$hardcode_libdir_flag_spec"; then if test -n "$hardcode_libdir_separator"; then if test -z "$hardcode_libdirs"; then hardcode_libdirs=$libdir else # Just accumulate the unique libdirs. case $hardcode_libdir_separator$hardcode_libdirs$hardcode_libdir_separator in *"$hardcode_libdir_separator$libdir$hardcode_libdir_separator"*) ;; *) func_append hardcode_libdirs "$hardcode_libdir_separator$libdir" ;; esac fi else eval flag=\"$hardcode_libdir_flag_spec\" func_append rpath " $flag" fi elif test -n "$runpath_var"; then case "$finalize_perm_rpath " in *" $libdir "*) ;; *) func_append finalize_perm_rpath " $libdir" ;; esac fi done # Substitute the hardcoded libdirs into the rpath. if test -n "$hardcode_libdir_separator" && test -n "$hardcode_libdirs"; then libdir=$hardcode_libdirs eval rpath=\" $hardcode_libdir_flag_spec\" fi finalize_rpath=$rpath if test -n "$libobjs" && test yes = "$build_old_libs"; then # Transform all the library objects into standard objects. compile_command=`$ECHO "$compile_command" | $SP2NL | $SED "$lo2o" | $NL2SP` finalize_command=`$ECHO "$finalize_command" | $SP2NL | $SED "$lo2o" | $NL2SP` fi func_generate_dlsyms "$outputname" "@PROGRAM@" false # template prelinking step if test -n "$prelink_cmds"; then func_execute_cmds "$prelink_cmds" 'exit $?' fi wrappers_required=: case $host in *cegcc* | *mingw32ce*) # Disable wrappers for cegcc and mingw32ce hosts, we are cross compiling anyway. wrappers_required=false ;; *cygwin* | *mingw* ) test yes = "$build_libtool_libs" || wrappers_required=false ;; *) if test no = "$need_relink" || test yes != "$build_libtool_libs"; then wrappers_required=false fi ;; esac $wrappers_required || { # Replace the output file specification. compile_command=`$ECHO "$compile_command" | $SED 's%@OUTPUT@%'"$output"'%g'` link_command=$compile_command$compile_rpath # We have no uninstalled library dependencies, so finalize right now. exit_status=0 func_show_eval "$link_command" 'exit_status=$?' if test -n "$postlink_cmds"; then func_to_tool_file "$output" postlink_cmds=`func_echo_all "$postlink_cmds" | $SED -e 's%@OUTPUT@%'"$output"'%g' -e 's%@TOOL_OUTPUT@%'"$func_to_tool_file_result"'%g'` func_execute_cmds "$postlink_cmds" 'exit $?' fi # Delete the generated files. if test -f "$output_objdir/${outputname}S.$objext"; then func_show_eval '$RM "$output_objdir/${outputname}S.$objext"' fi exit $exit_status } if test -n "$compile_shlibpath$finalize_shlibpath"; then compile_command="$shlibpath_var=\"$compile_shlibpath$finalize_shlibpath\$$shlibpath_var\" $compile_command" fi if test -n "$finalize_shlibpath"; then finalize_command="$shlibpath_var=\"$finalize_shlibpath\$$shlibpath_var\" $finalize_command" fi compile_var= finalize_var= if test -n "$runpath_var"; then if test -n "$perm_rpath"; then # We should set the runpath_var. rpath= for dir in $perm_rpath; do func_append rpath "$dir:" done compile_var="$runpath_var=\"$rpath\$$runpath_var\" " fi if test -n "$finalize_perm_rpath"; then # We should set the runpath_var. rpath= for dir in $finalize_perm_rpath; do func_append rpath "$dir:" done finalize_var="$runpath_var=\"$rpath\$$runpath_var\" " fi fi if test yes = "$no_install"; then # We don't need to create a wrapper script. link_command=$compile_var$compile_command$compile_rpath # Replace the output file specification. link_command=`$ECHO "$link_command" | $SED 's%@OUTPUT@%'"$output"'%g'` # Delete the old output file. $opt_dry_run || $RM $output # Link the executable and exit func_show_eval "$link_command" 'exit $?' if test -n "$postlink_cmds"; then func_to_tool_file "$output" postlink_cmds=`func_echo_all "$postlink_cmds" | $SED -e 's%@OUTPUT@%'"$output"'%g' -e 's%@TOOL_OUTPUT@%'"$func_to_tool_file_result"'%g'` func_execute_cmds "$postlink_cmds" 'exit $?' fi exit $EXIT_SUCCESS fi case $hardcode_action,$fast_install in relink,*) # Fast installation is not supported link_command=$compile_var$compile_command$compile_rpath relink_command=$finalize_var$finalize_command$finalize_rpath func_warning "this platform does not like uninstalled shared libraries" func_warning "'$output' will be relinked during installation" ;; *,yes) link_command=$finalize_var$compile_command$finalize_rpath relink_command=`$ECHO "$compile_var$compile_command$compile_rpath" | $SED 's%@OUTPUT@%\$progdir/\$file%g'` ;; *,no) link_command=$compile_var$compile_command$compile_rpath relink_command=$finalize_var$finalize_command$finalize_rpath ;; *,needless) link_command=$finalize_var$compile_command$finalize_rpath relink_command= ;; esac # Replace the output file specification. link_command=`$ECHO "$link_command" | $SED 's%@OUTPUT@%'"$output_objdir/$outputname"'%g'` # Delete the old output files. $opt_dry_run || $RM $output $output_objdir/$outputname $output_objdir/lt-$outputname func_show_eval "$link_command" 'exit $?' if test -n "$postlink_cmds"; then func_to_tool_file "$output_objdir/$outputname" postlink_cmds=`func_echo_all "$postlink_cmds" | $SED -e 's%@OUTPUT@%'"$output_objdir/$outputname"'%g' -e 's%@TOOL_OUTPUT@%'"$func_to_tool_file_result"'%g'` func_execute_cmds "$postlink_cmds" 'exit $?' fi # Now create the wrapper script. func_verbose "creating $output" # Quote the relink command for shipping. if test -n "$relink_command"; then # Preserve any variables that may affect compiler behavior for var in $variables_saved_for_relink; do if eval test -z \"\${$var+set}\"; then relink_command="{ test -z \"\${$var+set}\" || $lt_unset $var || { $var=; export $var; }; }; $relink_command" elif eval var_value=\$$var; test -z "$var_value"; then relink_command="$var=; export $var; $relink_command" else func_quote_for_eval "$var_value" relink_command="$var=$func_quote_for_eval_result; export $var; $relink_command" fi done relink_command="(cd `pwd`; $relink_command)" relink_command=`$ECHO "$relink_command" | $SED "$sed_quote_subst"` fi # Only actually do things if not in dry run mode. $opt_dry_run || { # win32 will think the script is a binary if it has # a .exe suffix, so we strip it off here. case $output in *.exe) func_stripname '' '.exe' "$output" output=$func_stripname_result ;; esac # test for cygwin because mv fails w/o .exe extensions case $host in *cygwin*) exeext=.exe func_stripname '' '.exe' "$outputname" outputname=$func_stripname_result ;; *) exeext= ;; esac case $host in *cygwin* | *mingw* ) func_dirname_and_basename "$output" "" "." output_name=$func_basename_result output_path=$func_dirname_result cwrappersource=$output_path/$objdir/lt-$output_name.c cwrapper=$output_path/$output_name.exe $RM $cwrappersource $cwrapper trap "$RM $cwrappersource $cwrapper; exit $EXIT_FAILURE" 1 2 15 func_emit_cwrapperexe_src > $cwrappersource # The wrapper executable is built using the $host compiler, # because it contains $host paths and files. If cross- # compiling, it, like the target executable, must be # executed on the $host or under an emulation environment. $opt_dry_run || { $LTCC $LTCFLAGS -o $cwrapper $cwrappersource $STRIP $cwrapper } # Now, create the wrapper script for func_source use: func_ltwrapper_scriptname $cwrapper $RM $func_ltwrapper_scriptname_result trap "$RM $func_ltwrapper_scriptname_result; exit $EXIT_FAILURE" 1 2 15 $opt_dry_run || { # note: this script will not be executed, so do not chmod. if test "x$build" = "x$host"; then $cwrapper --lt-dump-script > $func_ltwrapper_scriptname_result else func_emit_wrapper no > $func_ltwrapper_scriptname_result fi } ;; * ) $RM $output trap "$RM $output; exit $EXIT_FAILURE" 1 2 15 func_emit_wrapper no > $output chmod +x $output ;; esac } exit $EXIT_SUCCESS ;; esac # See if we need to build an old-fashioned archive. for oldlib in $oldlibs; do case $build_libtool_libs in convenience) oldobjs="$libobjs_save $symfileobj" addlibs=$convenience build_libtool_libs=no ;; module) oldobjs=$libobjs_save addlibs=$old_convenience build_libtool_libs=no ;; *) oldobjs="$old_deplibs $non_pic_objects" $preload && test -f "$symfileobj" \ && func_append oldobjs " $symfileobj" addlibs=$old_convenience ;; esac if test -n "$addlibs"; then gentop=$output_objdir/${outputname}x func_append generated " $gentop" func_extract_archives $gentop $addlibs func_append oldobjs " $func_extract_archives_result" fi # Do each command in the archive commands. if test -n "$old_archive_from_new_cmds" && test yes = "$build_libtool_libs"; then cmds=$old_archive_from_new_cmds else # Add any objects from preloaded convenience libraries if test -n "$dlprefiles"; then gentop=$output_objdir/${outputname}x func_append generated " $gentop" func_extract_archives $gentop $dlprefiles func_append oldobjs " $func_extract_archives_result" fi # POSIX demands no paths to be encoded in archives. We have # to avoid creating archives with duplicate basenames if we # might have to extract them afterwards, e.g., when creating a # static archive out of a convenience library, or when linking # the entirety of a libtool archive into another (currently # not supported by libtool). if (for obj in $oldobjs do func_basename "$obj" $ECHO "$func_basename_result" done | sort | sort -uc >/dev/null 2>&1); then : else echo "copying selected object files to avoid basename conflicts..." gentop=$output_objdir/${outputname}x func_append generated " $gentop" func_mkdir_p "$gentop" save_oldobjs=$oldobjs oldobjs= counter=1 for obj in $save_oldobjs do func_basename "$obj" objbase=$func_basename_result case " $oldobjs " in " ") oldobjs=$obj ;; *[\ /]"$objbase "*) while :; do # Make sure we don't pick an alternate name that also # overlaps. newobj=lt$counter-$objbase func_arith $counter + 1 counter=$func_arith_result case " $oldobjs " in *[\ /]"$newobj "*) ;; *) if test ! -f "$gentop/$newobj"; then break; fi ;; esac done func_show_eval "ln $obj $gentop/$newobj || cp $obj $gentop/$newobj" func_append oldobjs " $gentop/$newobj" ;; *) func_append oldobjs " $obj" ;; esac done fi func_to_tool_file "$oldlib" func_convert_file_msys_to_w32 tool_oldlib=$func_to_tool_file_result eval cmds=\"$old_archive_cmds\" func_len " $cmds" len=$func_len_result if test "$len" -lt "$max_cmd_len" || test "$max_cmd_len" -le -1; then cmds=$old_archive_cmds elif test -n "$archiver_list_spec"; then func_verbose "using command file archive linking..." for obj in $oldobjs do func_to_tool_file "$obj" $ECHO "$func_to_tool_file_result" done > $output_objdir/$libname.libcmd func_to_tool_file "$output_objdir/$libname.libcmd" oldobjs=" $archiver_list_spec$func_to_tool_file_result" cmds=$old_archive_cmds else # the command line is too long to link in one step, link in parts func_verbose "using piecewise archive linking..." save_RANLIB=$RANLIB RANLIB=: objlist= concat_cmds= save_oldobjs=$oldobjs oldobjs= # Is there a better way of finding the last object in the list? for obj in $save_oldobjs do last_oldobj=$obj done eval test_cmds=\"$old_archive_cmds\" func_len " $test_cmds" len0=$func_len_result len=$len0 for obj in $save_oldobjs do func_len " $obj" func_arith $len + $func_len_result len=$func_arith_result func_append objlist " $obj" if test "$len" -lt "$max_cmd_len"; then : else # the above command should be used before it gets too long oldobjs=$objlist if test "$obj" = "$last_oldobj"; then RANLIB=$save_RANLIB fi test -z "$concat_cmds" || concat_cmds=$concat_cmds~ eval concat_cmds=\"\$concat_cmds$old_archive_cmds\" objlist= len=$len0 fi done RANLIB=$save_RANLIB oldobjs=$objlist if test -z "$oldobjs"; then eval cmds=\"\$concat_cmds\" else eval cmds=\"\$concat_cmds~\$old_archive_cmds\" fi fi fi func_execute_cmds "$cmds" 'exit $?' done test -n "$generated" && \ func_show_eval "${RM}r$generated" # Now create the libtool archive. case $output in *.la) old_library= test yes = "$build_old_libs" && old_library=$libname.$libext func_verbose "creating $output" # Preserve any variables that may affect compiler behavior for var in $variables_saved_for_relink; do if eval test -z \"\${$var+set}\"; then relink_command="{ test -z \"\${$var+set}\" || $lt_unset $var || { $var=; export $var; }; }; $relink_command" elif eval var_value=\$$var; test -z "$var_value"; then relink_command="$var=; export $var; $relink_command" else func_quote_for_eval "$var_value" relink_command="$var=$func_quote_for_eval_result; export $var; $relink_command" fi done # Quote the link command for shipping. relink_command="(cd `pwd`; $SHELL \"$progpath\" $preserve_args --mode=relink $libtool_args @inst_prefix_dir@)" relink_command=`$ECHO "$relink_command" | $SED "$sed_quote_subst"` if test yes = "$hardcode_automatic"; then relink_command= fi # Only create the output if not a dry run. $opt_dry_run || { for installed in no yes; do if test yes = "$installed"; then if test -z "$install_libdir"; then break fi output=$output_objdir/${outputname}i # Replace all uninstalled libtool libraries with the installed ones newdependency_libs= for deplib in $dependency_libs; do case $deplib in *.la) func_basename "$deplib" name=$func_basename_result func_resolve_sysroot "$deplib" eval libdir=`$SED -n -e 's/^libdir=\(.*\)$/\1/p' $func_resolve_sysroot_result` test -z "$libdir" && \ func_fatal_error "'$deplib' is not a valid libtool archive" func_append newdependency_libs " ${lt_sysroot:+=}$libdir/$name" ;; -L*) func_stripname -L '' "$deplib" func_replace_sysroot "$func_stripname_result" func_append newdependency_libs " -L$func_replace_sysroot_result" ;; -R*) func_stripname -R '' "$deplib" func_replace_sysroot "$func_stripname_result" func_append newdependency_libs " -R$func_replace_sysroot_result" ;; *) func_append newdependency_libs " $deplib" ;; esac done dependency_libs=$newdependency_libs newdlfiles= for lib in $dlfiles; do case $lib in *.la) func_basename "$lib" name=$func_basename_result eval libdir=`$SED -n -e 's/^libdir=\(.*\)$/\1/p' $lib` test -z "$libdir" && \ func_fatal_error "'$lib' is not a valid libtool archive" func_append newdlfiles " ${lt_sysroot:+=}$libdir/$name" ;; *) func_append newdlfiles " $lib" ;; esac done dlfiles=$newdlfiles newdlprefiles= for lib in $dlprefiles; do case $lib in *.la) # Only pass preopened files to the pseudo-archive (for # eventual linking with the app. that links it) if we # didn't already link the preopened objects directly into # the library: func_basename "$lib" name=$func_basename_result eval libdir=`$SED -n -e 's/^libdir=\(.*\)$/\1/p' $lib` test -z "$libdir" && \ func_fatal_error "'$lib' is not a valid libtool archive" func_append newdlprefiles " ${lt_sysroot:+=}$libdir/$name" ;; esac done dlprefiles=$newdlprefiles else newdlfiles= for lib in $dlfiles; do case $lib in [\\/]* | [A-Za-z]:[\\/]*) abs=$lib ;; *) abs=`pwd`"/$lib" ;; esac func_append newdlfiles " $abs" done dlfiles=$newdlfiles newdlprefiles= for lib in $dlprefiles; do case $lib in [\\/]* | [A-Za-z]:[\\/]*) abs=$lib ;; *) abs=`pwd`"/$lib" ;; esac func_append newdlprefiles " $abs" done dlprefiles=$newdlprefiles fi $RM $output # place dlname in correct position for cygwin # In fact, it would be nice if we could use this code for all target # systems that can't hard-code library paths into their executables # and that have no shared library path variable independent of PATH, # but it turns out we can't easily determine that from inspecting # libtool variables, so we have to hard-code the OSs to which it # applies here; at the moment, that means platforms that use the PE # object format with DLL files. See the long comment at the top of # tests/bindir.at for full details. tdlname=$dlname case $host,$output,$installed,$module,$dlname in *cygwin*,*lai,yes,no,*.dll | *mingw*,*lai,yes,no,*.dll | *cegcc*,*lai,yes,no,*.dll) # If a -bindir argument was supplied, place the dll there. if test -n "$bindir"; then func_relative_path "$install_libdir" "$bindir" tdlname=$func_relative_path_result/$dlname else # Otherwise fall back on heuristic. tdlname=../bin/$dlname fi ;; esac $ECHO > $output "\ # $outputname - a libtool library file # Generated by $PROGRAM (GNU $PACKAGE) $VERSION # # Please DO NOT delete this file! # It is necessary for linking the library. # The name that we can dlopen(3). dlname='$tdlname' # Names of this library. library_names='$library_names' # The name of the static archive. old_library='$old_library' # Linker flags that cannot go in dependency_libs. inherited_linker_flags='$new_inherited_linker_flags' # Libraries that this one depends upon. dependency_libs='$dependency_libs' # Names of additional weak libraries provided by this library weak_library_names='$weak_libs' # Version information for $libname. current=$current age=$age revision=$revision # Is this an already installed library? installed=$installed # Should we warn about portability when linking against -modules? shouldnotlink=$module # Files to dlopen/dlpreopen dlopen='$dlfiles' dlpreopen='$dlprefiles' # Directory that this library needs to be installed in: libdir='$install_libdir'" if test no,yes = "$installed,$need_relink"; then $ECHO >> $output "\ relink_command=\"$relink_command\"" fi done } # Do a symbolic link so that the libtool archive can be found in # LD_LIBRARY_PATH before the program is installed. func_show_eval '( cd "$output_objdir" && $RM "$outputname" && $LN_S "../$outputname" "$outputname" )' 'exit $?' ;; esac exit $EXIT_SUCCESS } if test link = "$opt_mode" || test relink = "$opt_mode"; then func_mode_link ${1+"$@"} fi # func_mode_uninstall arg... func_mode_uninstall () { $debug_cmd RM=$nonopt files= rmforce=false exit_status=0 # This variable tells wrapper scripts just to set variables rather # than running their programs. libtool_install_magic=$magic for arg do case $arg in -f) func_append RM " $arg"; rmforce=: ;; -*) func_append RM " $arg" ;; *) func_append files " $arg" ;; esac done test -z "$RM" && \ func_fatal_help "you must specify an RM program" rmdirs= for file in $files; do func_dirname "$file" "" "." dir=$func_dirname_result if test . = "$dir"; then odir=$objdir else odir=$dir/$objdir fi func_basename "$file" name=$func_basename_result test uninstall = "$opt_mode" && odir=$dir # Remember odir for removal later, being careful to avoid duplicates if test clean = "$opt_mode"; then case " $rmdirs " in *" $odir "*) ;; *) func_append rmdirs " $odir" ;; esac fi # Don't error if the file doesn't exist and rm -f was used. if { test -L "$file"; } >/dev/null 2>&1 || { test -h "$file"; } >/dev/null 2>&1 || test -f "$file"; then : elif test -d "$file"; then exit_status=1 continue elif $rmforce; then continue fi rmfiles=$file case $name in *.la) # Possibly a libtool archive, so verify it. if func_lalib_p "$file"; then func_source $dir/$name # Delete the libtool libraries and symlinks. for n in $library_names; do func_append rmfiles " $odir/$n" done test -n "$old_library" && func_append rmfiles " $odir/$old_library" case $opt_mode in clean) case " $library_names " in *" $dlname "*) ;; *) test -n "$dlname" && func_append rmfiles " $odir/$dlname" ;; esac test -n "$libdir" && func_append rmfiles " $odir/$name $odir/${name}i" ;; uninstall) if test -n "$library_names"; then # Do each command in the postuninstall commands. func_execute_cmds "$postuninstall_cmds" '$rmforce || exit_status=1' fi if test -n "$old_library"; then # Do each command in the old_postuninstall commands. func_execute_cmds "$old_postuninstall_cmds" '$rmforce || exit_status=1' fi # FIXME: should reinstall the best remaining shared library. ;; esac fi ;; *.lo) # Possibly a libtool object, so verify it. if func_lalib_p "$file"; then # Read the .lo file func_source $dir/$name # Add PIC object to the list of files to remove. if test -n "$pic_object" && test none != "$pic_object"; then func_append rmfiles " $dir/$pic_object" fi # Add non-PIC object to the list of files to remove. if test -n "$non_pic_object" && test none != "$non_pic_object"; then func_append rmfiles " $dir/$non_pic_object" fi fi ;; *) if test clean = "$opt_mode"; then noexename=$name case $file in *.exe) func_stripname '' '.exe' "$file" file=$func_stripname_result func_stripname '' '.exe' "$name" noexename=$func_stripname_result # $file with .exe has already been added to rmfiles, # add $file without .exe func_append rmfiles " $file" ;; esac # Do a test to see if this is a libtool program. if func_ltwrapper_p "$file"; then if func_ltwrapper_executable_p "$file"; then func_ltwrapper_scriptname "$file" relink_command= func_source $func_ltwrapper_scriptname_result func_append rmfiles " $func_ltwrapper_scriptname_result" else relink_command= func_source $dir/$noexename fi # note $name still contains .exe if it was in $file originally # as does the version of $file that was added into $rmfiles func_append rmfiles " $odir/$name $odir/${name}S.$objext" if test yes = "$fast_install" && test -n "$relink_command"; then func_append rmfiles " $odir/lt-$name" fi if test "X$noexename" != "X$name"; then func_append rmfiles " $odir/lt-$noexename.c" fi fi fi ;; esac func_show_eval "$RM $rmfiles" 'exit_status=1' done # Try to remove the $objdir's in the directories where we deleted files for dir in $rmdirs; do if test -d "$dir"; then func_show_eval "rmdir $dir >/dev/null 2>&1" fi done exit $exit_status } if test uninstall = "$opt_mode" || test clean = "$opt_mode"; then func_mode_uninstall ${1+"$@"} fi test -z "$opt_mode" && { help=$generic_help func_fatal_help "you must specify a MODE" } test -z "$exec_cmd" && \ func_fatal_help "invalid operation mode '$opt_mode'" if test -n "$exec_cmd"; then eval exec "$exec_cmd" exit $EXIT_FAILURE fi exit $exit_status # The TAGs below are defined such that we never get into a situation # where we disable both kinds of libraries. Given conflicting # choices, we go for a static library, that is the most portable, # since we can't tell whether shared libraries were disabled because # the user asked for that or because the platform doesn't support # them. This is particularly important on AIX, because we don't # support having both static and shared libraries enabled at the same # time on that platform, so we default to a shared-only configuration. # If a disable-shared tag is given, we'll fallback to a static-only # configuration. But we'll never go from static-only to shared-only. # ### BEGIN LIBTOOL TAG CONFIG: disable-shared build_libtool_libs=no build_old_libs=yes # ### END LIBTOOL TAG CONFIG: disable-shared # ### BEGIN LIBTOOL TAG CONFIG: disable-static build_old_libs=`case $build_libtool_libs in yes) echo no;; *) echo yes;; esac` # ### END LIBTOOL TAG CONFIG: disable-static # Local Variables: # mode:shell-script # sh-indentation:2 # End: intel-gpu-tools-1.14/build-aux/py-compile0000755000175000017500000001107612665336443015341 00000000000000#!/bin/sh # py-compile - Compile a Python program scriptversion=2011-06-08.12; # UTC # Copyright (C) 2000-2014 Free Software Foundation, Inc. # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2, or (at your option) # any later version. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # You should have received a copy of the GNU General Public License # along with this program. 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Use --destdir to specify any leading directory path to the FILES that you don't want to include in the byte compiled file. Specify --basedir for any additional path information you do want to be shown in the byte compiled file. Example: py-compile --destdir /tmp/pkg-root --basedir /usr/share/test test.py test2.py Report bugs to . EOF exit $? ;; -v|--version) echo "$me $scriptversion" exit $? ;; --) shift break ;; -*) usage_error "unrecognized option '$1'" ;; *) break ;; esac shift done files=$* if test -z "$files"; then usage_error "no files given" fi # if basedir was given, then it should be prepended to filenames before # byte compilation. if [ -z "$basedir" ]; then pathtrans="path = file" else pathtrans="path = os.path.join('$basedir', file)" fi # if destdir was given, then it needs to be prepended to the filename to # byte compile but not go into the compiled file. if [ -z "$destdir" ]; then filetrans="filepath = path" else filetrans="filepath = os.path.normpath('$destdir' + os.sep + path)" fi $PYTHON -c " import sys, os, py_compile, imp files = '''$files''' sys.stdout.write('Byte-compiling python modules...\n') for file in files.split(): $pathtrans $filetrans if not os.path.exists(filepath) or not (len(filepath) >= 3 and filepath[-3:] == '.py'): continue sys.stdout.write(file) sys.stdout.flush() if hasattr(imp, 'get_tag'): py_compile.compile(filepath, imp.cache_from_source(filepath), path) else: py_compile.compile(filepath, filepath + 'c', path) sys.stdout.write('\n')" || exit $? # this will fail for python < 1.5, but that doesn't matter ... $PYTHON -O -c " import sys, os, py_compile, imp # pypy does not use .pyo optimization if hasattr(sys, 'pypy_translation_info'): sys.exit(0) files = '''$files''' sys.stdout.write('Byte-compiling python modules (optimized versions) ...\n') for file in files.split(): $pathtrans $filetrans if not os.path.exists(filepath) or not (len(filepath) >= 3 and filepath[-3:] == '.py'): continue sys.stdout.write(file) sys.stdout.flush() if hasattr(imp, 'get_tag'): py_compile.compile(filepath, imp.cache_from_source(filepath, False), path) else: py_compile.compile(filepath, filepath + 'o', path) sys.stdout.write('\n')" 2>/dev/null || : # Local Variables: # mode: shell-script # sh-indentation: 2 # eval: (add-hook 'write-file-hooks 'time-stamp) # time-stamp-start: "scriptversion=" # time-stamp-format: "%:y-%02m-%02d.%02H" # time-stamp-time-zone: "UTC" # time-stamp-end: "; # UTC" # End: intel-gpu-tools-1.14/build-aux/compile0000755000175000017500000001624512665336443014716 00000000000000#! /bin/sh # Wrapper for compilers which do not understand '-c -o'. scriptversion=2012-10-14.11; # UTC # Copyright (C) 1999-2014 Free Software Foundation, Inc. # Written by Tom Tromey . # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2, or (at your option) # any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program. If not, see . # As a special exception to the GNU General Public License, if you # distribute this file as part of a program that contains a # configuration script generated by Autoconf, you may include it under # the same distribution terms that you use for the rest of that program. # This file is maintained in Automake, please report # bugs to or send patches to # . nl=' ' # We need space, tab and new line, in precisely that order. Quoting is # there to prevent tools from complaining about whitespace usage. IFS=" "" $nl" file_conv= # func_file_conv build_file lazy # Convert a $build file to $host form and store it in $file # Currently only supports Windows hosts. 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EOF exit $? ;; -v | --v*) echo "compile $scriptversion" exit $? ;; cl | *[/\\]cl | cl.exe | *[/\\]cl.exe ) func_cl_wrapper "$@" # Doesn't return... ;; esac ofile= cfile= for arg do if test -n "$eat"; then eat= else case $1 in -o) # configure might choose to run compile as 'compile cc -o foo foo.c'. # So we strip '-o arg' only if arg is an object. eat=1 case $2 in *.o | *.obj) ofile=$2 ;; *) set x "$@" -o "$2" shift ;; esac ;; *.c) cfile=$1 set x "$@" "$1" shift ;; *) set x "$@" "$1" shift ;; esac fi shift done if test -z "$ofile" || test -z "$cfile"; then # If no '-o' option was seen then we might have been invoked from a # pattern rule where we don't need one. That is ok -- this is a # normal compilation that the losing compiler can handle. If no # '.c' file was seen then we are probably linking. That is also # ok. exec "$@" fi # Name of file we expect compiler to create. cofile=`echo "$cfile" | sed 's|^.*[\\/]||; s|^[a-zA-Z]:||; s/\.c$/.o/'` # Create the lock directory. # Note: use '[/\\:.-]' here to ensure that we don't use the same name # that we are using for the .o file. Also, base the name on the expected # object file name, since that is what matters with a parallel build. lockdir=`echo "$cofile" | sed -e 's|[/\\:.-]|_|g'`.d while true; do if mkdir "$lockdir" >/dev/null 2>&1; then break fi sleep 1 done # FIXME: race condition here if user kills between mkdir and trap. trap "rmdir '$lockdir'; exit 1" 1 2 15 # Run the compile. "$@" ret=$? if test -f "$cofile"; then test "$cofile" = "$ofile" || mv "$cofile" "$ofile" elif test -f "${cofile}bj"; then test "${cofile}bj" = "$ofile" || mv "${cofile}bj" "$ofile" fi rmdir "$lockdir" exit $ret # Local Variables: # mode: shell-script # sh-indentation: 2 # eval: (add-hook 'write-file-hooks 'time-stamp) # time-stamp-start: "scriptversion=" # time-stamp-format: "%:y-%02m-%02d.%02H" # time-stamp-time-zone: "UTC" # time-stamp-end: "; # UTC" # End: intel-gpu-tools-1.14/tools/0000755000175000017500000000000012665337376012664 500000000000000intel-gpu-tools-1.14/tools/intel_reg.c0000644000175000017500000005051612665336131014713 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ #include #include #include #include #include #include #include #include #include #include #include "intel_io.h" #include "intel_chipset.h" #include "intel_reg_spec.h" #ifdef HAVE_SYS_IO_H #include #else static inline int _not_supported(void) { fprintf(stderr, "portio-vga not supported\n"); exit(EXIT_FAILURE); } #define inb(port) _not_supported() #define outb(value, port) _not_supported() #define iopl(level) #endif /* HAVE_SYS_IO_H */ struct config { struct pci_device *pci_dev; char *mmiofile; uint32_t devid; /* read: number of registers to read */ uint32_t count; /* write: do a posting read */ bool post; /* decode register for all platforms */ bool all_platforms; /* spread out bits for convenience */ bool binary; /* register spec */ char *specfile; struct reg *regs; ssize_t regcount; int verbosity; }; /* port desc must have been set */ static int set_reg_by_addr(struct config *config, struct reg *reg, uint32_t addr) { int i; reg->addr = addr; if (reg->name) free(reg->name); reg->name = NULL; for (i = 0; i < config->regcount; i++) { struct reg *r = &config->regs[i]; if (reg->port_desc.port != r->port_desc.port) continue; /* ->mmio_offset should be 0 for non-MMIO ports. */ if (addr + reg->mmio_offset == r->addr + r->mmio_offset) { /* Always output the "normalized" offset+addr. */ reg->mmio_offset = r->mmio_offset; reg->addr = r->addr; reg->name = r->name ? strdup(r->name) : NULL; break; } } return 0; } /* port desc must have been set */ static int set_reg_by_name(struct config *config, struct reg *reg, const char *name) { int i; reg->name = strdup(name); reg->addr = 0; for (i = 0; i < config->regcount; i++) { struct reg *r = &config->regs[i]; if (reg->port_desc.port != r->port_desc.port) continue; if (!r->name) continue; if (strcasecmp(name, r->name) == 0) { reg->addr = r->addr; /* Also get MMIO offset if not already specified. */ if (!reg->mmio_offset && r->mmio_offset) reg->mmio_offset = r->mmio_offset; return 0; } } return -1; } static void to_binary(char *buf, size_t buflen, uint32_t val) { int i; if (!buflen) return; *buf = '\0'; /* XXX: This quick and dirty implementation makes eyes hurt. */ for (i = 31; i >= 0; i--) { if (i % 8 == 0) snprintf(buf, buflen, " %2d", i); else snprintf(buf, buflen, " "); buflen -= strlen(buf); buf += strlen(buf); } snprintf(buf, buflen, "\n"); buflen -= strlen(buf); buf += strlen(buf); for (i = 31; i >= 0; i--) { snprintf(buf, buflen, " %s%d", i % 8 == 7 ? " " : "", !!(val & (1 << i))); buflen -= strlen(buf); buf += strlen(buf); } snprintf(buf, buflen, "\n"); } static void dump_decode(struct config *config, struct reg *reg, uint32_t val) { char decode[1024]; char tmp[1024]; char bin[1024]; if (config->binary) to_binary(bin, sizeof(bin), val); else *bin = '\0'; intel_reg_spec_decode(tmp, sizeof(tmp), reg, val, config->all_platforms ? 0 : config->devid); if (*tmp) { /* We have a decode result, and maybe binary decode. */ if (config->all_platforms) snprintf(decode, sizeof(decode), "\n%s%s", tmp, bin); else snprintf(decode, sizeof(decode), " (%s)\n%s", tmp, bin); } else if (*bin) { /* No decode result, but binary decode. */ snprintf(decode, sizeof(decode), "\n%s", bin); } else { /* No decode nor binary decode. */ snprintf(decode, sizeof(decode), "\n"); } if (reg->port_desc.port == PORT_MMIO) { /* Omit port name for MMIO, optionally include MMIO offset. */ if (reg->mmio_offset) printf("%24s (0x%08x:0x%08x): 0x%08x%s", reg->name ?: "", reg->mmio_offset, reg->addr, val, decode); else printf("%35s (0x%08x): 0x%08x%s", reg->name ?: "", reg->addr, val, decode); } else { char name[100], addr[100]; /* If no name, use addr as name for easier copy pasting. */ if (reg->name) snprintf(name, sizeof(name), "%s:%s", reg->port_desc.name, reg->name); else snprintf(name, sizeof(name), "%s:0x%08x", reg->port_desc.name, reg->addr); /* Negative port numbers are not real sideband ports. */ if (reg->port_desc.port > PORT_NONE) snprintf(addr, sizeof(addr), "0x%02x:0x%08x", reg->port_desc.port, reg->addr); else snprintf(addr, sizeof(addr), "%s:0x%08x", reg->port_desc.name, reg->addr); printf("%24s (%s): 0x%08x%s", name, addr, val, decode); } } static int read_register(struct config *config, struct reg *reg, uint32_t *valp) { uint32_t val = 0; switch (reg->port_desc.port) { case PORT_MMIO: val = INREG(reg->mmio_offset + reg->addr); break; case PORT_PORTIO_VGA: iopl(3); val = inb(reg->addr); iopl(0); break; case PORT_MMIO_VGA: val = INREG8(reg->addr); break; case PORT_BUNIT: case PORT_PUNIT: case PORT_NC: case PORT_DPIO: case PORT_GPIO_NC: case PORT_CCK: case PORT_CCU: case PORT_DPIO2: case PORT_FLISDSI: if (!IS_VALLEYVIEW(config->devid) && !IS_CHERRYVIEW(config->devid)) { fprintf(stderr, "port %s only supported on vlv/chv\n", reg->port_desc.name); return -1; } val = intel_iosf_sb_read(reg->port_desc.port, reg->addr); break; default: fprintf(stderr, "port %d not supported\n", reg->port_desc.port); return -1; } if (valp) *valp = val; return 0; } static void dump_register(struct config *config, struct reg *reg) { uint32_t val; if (read_register(config, reg, &val) == 0) dump_decode(config, reg, val); } static int write_register(struct config *config, struct reg *reg, uint32_t val) { int ret = 0; if (config->verbosity > 0) { printf("Before:\n"); dump_register(config, reg); } switch (reg->port_desc.port) { case PORT_MMIO: OUTREG(reg->mmio_offset + reg->addr, val); break; case PORT_PORTIO_VGA: if (val > 0xff) { fprintf(stderr, "value 0x%08x out of range for port %s\n", val, reg->port_desc.name); return -1; } iopl(3); outb(val, reg->addr); iopl(0); break; case PORT_MMIO_VGA: if (val > 0xff) { fprintf(stderr, "value 0x%08x out of range for port %s\n", val, reg->port_desc.name); return -1; } OUTREG8(reg->addr, val); break; case PORT_BUNIT: case PORT_PUNIT: case PORT_NC: case PORT_DPIO: case PORT_GPIO_NC: case PORT_CCK: case PORT_CCU: case PORT_DPIO2: case PORT_FLISDSI: if (!IS_VALLEYVIEW(config->devid) && !IS_CHERRYVIEW(config->devid)) { fprintf(stderr, "port %s only supported on vlv/chv\n", reg->port_desc.name); return -1; } intel_iosf_sb_write(reg->port_desc.port, reg->addr, val); break; default: fprintf(stderr, "port %d not supported\n", reg->port_desc.port); ret = -1; } if (config->verbosity > 0) { printf("After:\n"); dump_register(config, reg); } else if (config->post) { read_register(config, reg, NULL); } return ret; } /* s has [(PORTNAME|PORTNUM|MMIO-OFFSET):](REGNAME|REGADDR) */ static int parse_reg(struct config *config, struct reg *reg, const char *s) { unsigned long addr; char *endp; const char *p; int ret; memset(reg, 0, sizeof(*reg)); p = strchr(s, ':'); if (p == s) { ret = -1; } else if (p) { char *port_name = strndup(s, p - s); ret = parse_port_desc(reg, port_name); free(port_name); p++; } else { /* * XXX: If port is not specified in input, see if the register * matches by name, and initialize port desc based on that. */ ret = parse_port_desc(reg, NULL); p = s; } if (ret) { fprintf(stderr, "invalid port in '%s'\n", s); return ret; } addr = strtoul(p, &endp, 16); if (endp > p && *endp == 0) { /* It's a number. */ ret = set_reg_by_addr(config, reg, addr); } else { /* Not a number, it's a name. */ ret = set_reg_by_name(config, reg, p); } return ret; } /* XXX: add support for register ranges, maybe REGISTER..REGISTER */ static int intel_reg_read(struct config *config, int argc, char *argv[]) { int i, j; if (argc == 1) { fprintf(stderr, "read: no registers specified\n"); return EXIT_FAILURE; } if (config->mmiofile) intel_mmio_use_dump_file(config->mmiofile); else intel_register_access_init(config->pci_dev, 0); for (i = 1; i < argc; i++) { struct reg reg; if (parse_reg(config, ®, argv[i])) continue; for (j = 0; j < config->count; j++) { dump_register(config, ®); /* Update addr and name. */ set_reg_by_addr(config, ®, reg.addr + reg.port_desc.stride); } } intel_register_access_fini(); return EXIT_SUCCESS; } static int intel_reg_write(struct config *config, int argc, char *argv[]) { int i; if (argc == 1) { fprintf(stderr, "write: no registers specified\n"); return EXIT_FAILURE; } intel_register_access_init(config->pci_dev, 0); for (i = 1; i < argc; i += 2) { struct reg reg; uint32_t val; char *endp; if (parse_reg(config, ®, argv[i])) continue; if (i + 1 == argc) { fprintf(stderr, "write: no value\n"); break; } val = strtoul(argv[i + 1], &endp, 16); if (endp == argv[i + 1] || *endp) { fprintf(stderr, "write: invalid value '%s'\n", argv[i + 1]); continue; } write_register(config, ®, val); } intel_register_access_fini(); return EXIT_SUCCESS; } static int intel_reg_dump(struct config *config, int argc, char *argv[]) { struct reg *reg; int i; if (config->mmiofile) intel_mmio_use_dump_file(config->mmiofile); else intel_register_access_init(config->pci_dev, 0); for (i = 0; i < config->regcount; i++) { reg = &config->regs[i]; /* can't dump sideband with mmiofile */ if (config->mmiofile && reg->port_desc.port != PORT_MMIO) continue; dump_register(config, &config->regs[i]); } intel_register_access_fini(); return EXIT_FAILURE; } static int intel_reg_snapshot(struct config *config, int argc, char *argv[]) { int mmio_bar = IS_GEN2(config->devid) ? 1 : 0; if (config->mmiofile) { fprintf(stderr, "specifying --mmio=FILE is not compatible\n"); return EXIT_FAILURE; } intel_mmio_use_pci_bar(config->pci_dev); /* XXX: error handling */ if (write(1, igt_global_mmio, config->pci_dev->regions[mmio_bar].size) == -1) fprintf(stderr, "Error writing snapshot: %s", strerror(errno)); if (config->verbosity > 0) printf("use this with --mmio=FILE --devid=0x%04X\n", config->devid); return EXIT_SUCCESS; } /* XXX: add support for reading and re-decoding a previously done dump */ static int intel_reg_decode(struct config *config, int argc, char *argv[]) { int i; if (argc == 1) { fprintf(stderr, "decode: no registers specified\n"); return EXIT_FAILURE; } for (i = 1; i < argc; i += 2) { struct reg reg; uint32_t val; char *endp; if (parse_reg(config, ®, argv[i])) continue; if (i + 1 == argc) { fprintf(stderr, "decode: no value\n"); break; } val = strtoul(argv[i + 1], &endp, 16); if (endp == argv[i + 1] || *endp) { fprintf(stderr, "decode: invalid value '%s'\n", argv[i + 1]); continue; } dump_decode(config, ®, val); } return EXIT_SUCCESS; } static int intel_reg_list(struct config *config, int argc, char *argv[]) { int i; for (i = 0; i < config->regcount; i++) { printf("%s\n", config->regs[i].name); } return EXIT_SUCCESS; } static int intel_reg_help(struct config *config, int argc, char *argv[]); struct command { const char *name; const char *description; const char *synopsis; int (*function)(struct config *config, int argc, char *argv[]); }; static const struct command commands[] = { { .name = "read", .function = intel_reg_read, .synopsis = "[--count=N] REGISTER [...]", .description = "read and decode specified register(s)", }, { .name = "write", .function = intel_reg_write, .synopsis = "[--post] REGISTER VALUE [REGISTER VALUE ...]", .description = "write value(s) to specified register(s)", }, { .name = "dump", .function = intel_reg_dump, .description = "dump all known registers", }, { .name = "decode", .function = intel_reg_decode, .synopsis = "REGISTER VALUE [REGISTER VALUE ...]", .description = "decode value(s) for specified register(s)", }, { .name = "snapshot", .function = intel_reg_snapshot, .description = "create a snapshot of the MMIO bar to stdout", }, { .name = "list", .function = intel_reg_list, .description = "list all known register names", }, { .name = "help", .function = intel_reg_help, .description = "show this help", }, }; static int intel_reg_help(struct config *config, int argc, char *argv[]) { int i; printf("Intel graphics register multitool\n\n"); printf("Usage: intel_reg [OPTION ...] COMMAND\n\n"); printf("COMMAND is one of:\n"); for (i = 0; i < ARRAY_SIZE(commands); i++) { printf(" %-14s%s\n", commands[i].name, commands[i].synopsis ?: ""); printf(" %-14s%s\n", "", commands[i].description); } printf("\n"); printf("REGISTER is defined as:\n"); printf(" [(PORTNAME|PORTNUM|MMIO-OFFSET):](REGNAME|REGADDR)\n"); printf("\n"); printf("PORTNAME is one of:\n"); intel_reg_spec_print_ports(); printf("\n"); printf("\n"); printf("OPTIONS common to most COMMANDS:\n"); printf(" --spec=PATH Read register spec from directory or file\n"); printf(" --mmio=FILE Use an MMIO snapshot\n"); printf(" --devid=DEVID Specify PCI device ID for --mmio=FILE\n"); printf(" --all Decode registers for all known platforms\n"); printf(" --binary Binary dump registers\n"); printf(" --verbose Increase verbosity\n"); printf(" --quiet Reduce verbosity\n"); printf("\n"); printf("Environment variables:\n"); printf(" INTEL_REG_SPEC Read register spec from directory or file\n"); return EXIT_SUCCESS; } /* * Get codename for a gen5+ platform to be used for finding register spec file. */ static const char *get_codename(uint32_t devid) { if (IS_GEN5(devid)) return "ironlake"; else if (IS_GEN6(devid)) return "sandybridge"; else if (IS_IVYBRIDGE(devid)) return "ivybridge"; else if (IS_HASWELL(devid)) return "haswell"; else if (IS_BROADWELL(devid)) return "broadwell"; else if (IS_SKYLAKE(devid)) return "skylake"; else if (IS_CHERRYVIEW(devid)) return "cherryview"; else if (IS_VALLEYVIEW(devid)) return "valleyview"; return NULL; } /* * Get register definitions filename for devid in dir. Return 0 if found, * negative error code otherwise. */ static int get_reg_spec_file(char *buf, size_t buflen, const char *dir, uint32_t devid) { const char *codename; /* First, try file named after devid, e.g. "0412" for Haswell GT2. */ snprintf(buf, buflen, "%s/%04x", dir, devid); if (!access(buf, F_OK)) return 0; /* * Second, for gen5+, try file named after codename, e.g. "haswell" for * Haswell. */ codename = get_codename(devid); if (codename) { snprintf(buf, buflen, "%s/%s", dir, codename); if (!access(buf, F_OK)) return 0; } /* * Third, try file named after gen, e.g. "gen7" for Haswell (which is * technically 7.5 but this is how it works). */ snprintf(buf, buflen, "%s/gen%d", dir, intel_gen(devid)); if (!access(buf, F_OK)) return 0; return -ENOENT; } /* * Read register spec. */ static int read_reg_spec(struct config *config) { char buf[PATH_MAX]; const char *path; struct stat st; int r; path = config->specfile; if (!path) path = getenv("INTEL_REG_SPEC"); if (!path) path = PKGDATADIR"/registers"; r = stat(path, &st); if (r) { fprintf(stderr, "Warning: stat '%s' failed: %s. " "Using builtin register spec.\n", path, strerror(errno)); goto builtin; } if (S_ISDIR(st.st_mode)) { r = get_reg_spec_file(buf, sizeof(buf), path, config->devid); if (r) { fprintf(stderr, "Warning: register spec not found in " "'%s'. Using builtin register spec.\n", path); goto builtin; } path = buf; } config->regcount = intel_reg_spec_file(&config->regs, path); if (config->regcount <= 0) { fprintf(stderr, "Warning: reading '%s' failed. " "Using builtin register spec.\n", path); goto builtin; } return config->regcount; builtin: /* Fallback to builtin register spec. */ config->regcount = intel_reg_spec_builtin(&config->regs, config->devid); return config->regcount; } enum opt { OPT_UNKNOWN = '?', OPT_END = -1, OPT_MMIO, OPT_DEVID, OPT_COUNT, OPT_POST, OPT_ALL, OPT_BINARY, OPT_SPEC, OPT_VERBOSE, OPT_QUIET, OPT_HELP, }; int main(int argc, char *argv[]) { int ret, i, index; char *endp; enum opt opt; const struct command *command = NULL; struct config config = { .count = 1, }; bool help = false; static struct option options[] = { /* global options */ { "spec", required_argument, NULL, OPT_SPEC }, { "verbose", no_argument, NULL, OPT_VERBOSE }, { "quiet", no_argument, NULL, OPT_QUIET }, { "help", no_argument, NULL, OPT_HELP }, /* options specific to read and dump */ { "mmio", required_argument, NULL, OPT_MMIO }, { "devid", required_argument, NULL, OPT_DEVID }, /* options specific to read */ { "count", required_argument, NULL, OPT_COUNT }, /* options specific to write */ { "post", no_argument, NULL, OPT_POST }, /* options specific to read, dump and decode */ { "all", no_argument, NULL, OPT_ALL }, { "binary", no_argument, NULL, OPT_BINARY }, { 0 } }; for (opt = 0; opt != OPT_END; ) { opt = getopt_long(argc, argv, "", options, &index); switch (opt) { case OPT_MMIO: config.mmiofile = strdup(optarg); if (!config.mmiofile) { fprintf(stderr, "strdup: %s\n", strerror(errno)); return EXIT_FAILURE; } break; case OPT_DEVID: config.devid = strtoul(optarg, &endp, 16); if (*endp) { fprintf(stderr, "invalid devid '%s'\n", optarg); return EXIT_FAILURE; } break; case OPT_COUNT: config.count = strtol(optarg, &endp, 10); if (*endp) { fprintf(stderr, "invalid count '%s'\n", optarg); return EXIT_FAILURE; } break; case OPT_POST: config.post = true; break; case OPT_SPEC: config.specfile = strdup(optarg); if (!config.specfile) { fprintf(stderr, "strdup: %s\n", strerror(errno)); return EXIT_FAILURE; } break; case OPT_ALL: config.all_platforms = true; break; case OPT_BINARY: config.binary = true; break; case OPT_VERBOSE: config.verbosity++; break; case OPT_QUIET: config.verbosity--; break; case OPT_HELP: help = true; break; case OPT_END: break; case OPT_UNKNOWN: return EXIT_FAILURE; } } argc -= optind; argv += optind; if (help || (argc > 0 && strcmp(argv[0], "help") == 0)) return intel_reg_help(&config, argc, argv); if (argc == 0) { fprintf(stderr, "Command missing. Try intel_reg help.\n"); return EXIT_FAILURE; } if (config.mmiofile) { if (!config.devid) { fprintf(stderr, "--mmio requires --devid\n"); return EXIT_FAILURE; } } else { /* XXX: devid without --mmio could be useful for decode. */ if (config.devid) { fprintf(stderr, "--devid without --mmio\n"); return EXIT_FAILURE; } config.pci_dev = intel_get_pci_device(); config.devid = config.pci_dev->device_id; } if (read_reg_spec(&config) < 0) { return EXIT_FAILURE; } for (i = 0; i < ARRAY_SIZE(commands); i++) { if (strcmp(argv[0], commands[i].name) == 0) { command = &commands[i]; break; } } if (!command) { fprintf(stderr, "'%s' is not an intel-reg command\n", argv[0]); return EXIT_FAILURE; } ret = command->function(&config, argc, argv); free(config.mmiofile); return ret; } intel-gpu-tools-1.14/tools/intel_bios.h0000644000175000017500000006312312665336131015075 00000000000000/* * Copyright 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Eric Anholt * */ #ifndef _INTEL_BIOS_H_ #define _INTEL_BIOS_H_ #include struct vbt_header { char signature[20]; /**< Always starts with 'VBT$' */ uint16_t version; /**< decimal */ uint16_t header_size; /**< in bytes */ uint16_t vbt_size; /**< in bytes */ uint8_t vbt_checksum; uint8_t reserved0; uint32_t bdb_offset; /**< from beginning of VBT */ uint32_t aim_offset[4]; /**< from beginning of VBT */ } __attribute__ ((packed)); struct bdb_header { char signature[16]; /**< Always 'BIOS_DATA_BLOCK' */ uint16_t version; /**< decimal */ uint16_t header_size; /**< in bytes */ uint16_t bdb_size; /**< in bytes */ } __attribute__ ((packed)); /* * There are several types of BIOS data blocks (BDBs), each block has * an ID and size in the first 3 bytes (ID in first, size in next 2). * Known types are listed below. */ #define BDB_GENERAL_FEATURES 1 #define BDB_GENERAL_DEFINITIONS 2 #define BDB_OLD_TOGGLE_LIST 3 #define BDB_MODE_SUPPORT_LIST 4 #define BDB_GENERIC_MODE_TABLE 5 #define BDB_EXT_MMIO_REGS 6 #define BDB_SWF_IO 7 #define BDB_SWF_MMIO 8 #define BDB_DOT_CLOCK_TABLE 9 #define BDB_MODE_REMOVAL_TABLE 10 #define BDB_CHILD_DEVICE_TABLE 11 #define BDB_DRIVER_FEATURES 12 #define BDB_DRIVER_PERSISTENCE 13 #define BDB_EXT_TABLE_PTRS 14 #define BDB_DOT_CLOCK_OVERRIDE 15 #define BDB_DISPLAY_SELECT 16 /* 17 rsvd */ #define BDB_DRIVER_ROTATION 18 #define BDB_DISPLAY_REMOVE 19 #define BDB_OEM_CUSTOM 20 #define BDB_EFP_LIST 21 /* workarounds for VGA hsync/vsync */ #define BDB_SDVO_LVDS_OPTIONS 22 #define BDB_SDVO_PANEL_DTDS 23 #define BDB_SDVO_LVDS_PNP_IDS 24 #define BDB_SDVO_LVDS_POWER_SEQ 25 #define BDB_TV_OPTIONS 26 #define BDB_EDP 27 #define BDB_LVDS_OPTIONS 40 #define BDB_LVDS_LFP_DATA_PTRS 41 #define BDB_LVDS_LFP_DATA 42 #define BDB_LVDS_BACKLIGHT 43 #define BDB_LVDS_POWER 44 #define BDB_MIPI_CONFIG 52 #define BDB_MIPI_SEQUENCE 53 #define BDB_SKIP 254 /* VBIOS private block, ignore */ struct bdb_general_features { /* bits 1 */ unsigned char panel_fitting:2; unsigned char flexaim:1; unsigned char msg_enable:1; unsigned char clear_screen:3; unsigned char color_flip:1; /* bits 2 */ unsigned char download_ext_vbt:1; unsigned char enable_ssc:1; unsigned char ssc_freq:1; unsigned char enable_lfp_on_override:1; unsigned char disable_ssc_ddt:1; unsigned char rsvd8:3; /* finish byte */ /* bits 3 */ unsigned char disable_smooth_vision:1; unsigned char single_dvi:1; unsigned char rsvd9:6; /* finish byte */ /* bits 4 */ unsigned char legacy_monitor_detect; /* bits 5 */ unsigned char int_crt_support:1; unsigned char int_tv_support:1; unsigned char rsvd11:6; /* finish byte */ } __attribute__ ((packed)); #define GPIO_PIN_NONE 0x00 /* "N/A" */ #define GPIO_PIN_I2C 0x01 /* "I2C GPIO pins" */ #define GPIO_PIN_CRT_DDC 0x02 /* "Analog CRT DDC GPIO pins" */ /* 915+ */ #define GPIO_PIN_LVDS 0x03 /* "Integrated LVDS DDC GPIO pins" */ #define GPIO_PIN_SDVO_I2C 0x05 /* "sDVO I2C GPIO pins" */ #define GPIO_PIN_SDVO_DDC1 0x1D /* "SDVO DDC1 GPIO pins" */ #define GPIO_PIN_SDVO_DDC2 0x2D /* "SDVO DDC2 GPIO pins" */ /* pre-915 */ #define GPIO_PIN_DVI_LVDS 0x03 /* "DVI/LVDS DDC GPIO pins" */ #define GPIO_PIN_ADD_I2C 0x05 /* "ADDCARD I2C GPIO pins" */ #define GPIO_PIN_ADD_DDC 0x04 /* "ADDCARD DDC GPIO pins" */ #define GPIO_PIN_ADD_DDC_I2C 0x06 /* "ADDCARD DDC/I2C GPIO pins" */ #define DEVICE_HANDLE_CRT 0x01 #define DEVICE_HANDLE_EFP1 0x04 #define DEVICE_HANDLE_EFP2 0x40 #define DEVICE_HANDLE_EFP3 0x20 #define DEVICE_HANDLE_EFP4 0x10 #define DEVICE_HANDLE_LPF1 0x08 #define DEVICE_HANDLE_LFP2 0x80 /* device type bits */ #define DEVICE_TYPE_CLASS_EXTENSION 15 #define DEVICE_TYPE_POWER_MANAGEMENT 14 #define DEVICE_TYPE_HOTPLUG_SIGNALING 13 #define DEVICE_TYPE_INTERNAL_CONNECTOR 12 #define DEVICE_TYPE_NOT_HDMI_OUTPUT 11 #define DEVICE_TYPE_MIPI_OUTPUT 10 #define DEVICE_TYPE_COMPOSITE_OUTPUT 9 #define DEVICE_TYPE_DIAL_CHANNEL 8 #define DEVICE_TYPE_CONTENT_PROTECTION 7 #define DEVICE_TYPE_HIGH_SPEED_LINK 6 #define DEVICE_TYPE_LVDS_SIGNALING 5 #define DEVICE_TYPE_TMDS_DVI_SIGNALING 4 #define DEVICE_TYPE_VIDEO_SIGNALING 3 #define DEVICE_TYPE_DISPLAYPORT_OUTPUT 2 #define DEVICE_TYPE_DIGITAL_OUTPUT 1 #define DEVICE_TYPE_ANALOG_OUTPUT 0 /* Pre 915 */ #define DEVICE_TYPE_NONE 0x00 #define DEVICE_TYPE_CRT 0x01 #define DEVICE_TYPE_TV 0x09 #define DEVICE_TYPE_EFP 0x12 #define DEVICE_TYPE_LFP 0x22 /* On 915+ */ #define DEVICE_TYPE_CRT_DPMS 0x6001 #define DEVICE_TYPE_CRT_DPMS_HOTPLUG 0x4001 #define DEVICE_TYPE_TV_COMPOSITE 0x0209 #define DEVICE_TYPE_TV_MACROVISION 0x0289 #define DEVICE_TYPE_TV_RF_COMPOSITE 0x020c #define DEVICE_TYPE_TV_SVIDEO_COMPOSITE 0x0609 #define DEVICE_TYPE_TV_SCART 0x0209 #define DEVICE_TYPE_TV_CODEC_HOTPLUG_PWR 0x6009 #define DEVICE_TYPE_EFP_HOTPLUG_PWR 0x6012 #define DEVICE_TYPE_EFP_DVI_HOTPLUG_PWR 0x6052 #define DEVICE_TYPE_EFP_DVI_I 0x6053 #define DEVICE_TYPE_EFP_DVI_D_DUAL 0x6152 #define DEVICE_TYPE_EFP_DVI_D_HDCP 0x60d2 #define DEVICE_TYPE_OPENLDI_HOTPLUG_PWR 0x6062 #define DEVICE_TYPE_OPENLDI_DUALPIX 0x6162 #define DEVICE_TYPE_LFP_PANELLINK 0x5012 #define DEVICE_TYPE_LFP_CMOS_PWR 0x5042 #define DEVICE_TYPE_LFP_LVDS_PWR 0x5062 #define DEVICE_TYPE_LFP_LVDS_DUAL 0x5162 #define DEVICE_TYPE_LFP_LVDS_DUAL_HDCP 0x51e2 #define DEVICE_TYPE_INT_HDMI 0xf0D2 #define DEVICE_TYPE_INT_LFP 0x1022 #define DEVICE_TYPE_INT_TV 0x1009 #define DEVICE_TYPE_DP 0x68C6 #define DEVICE_TYPE_DP_HDMI_DVI 0x60d6 #define DEVICE_TYPE_DP_DVI 0x68d6 #define DEVICE_TYPE_HDMI_DVI 0x60d2 #define DEVICE_TYPE_DVI 0x68d2 #define DEVICE_TYPE_eDP 0x78C6 #define DEVICE_TYPE_MIPI 0x7cc2 #define DEVICE_CFG_NONE 0x00 #define DEVICE_CFG_12BIT_DVOB 0x01 #define DEVICE_CFG_12BIT_DVOC 0x02 #define DEVICE_CFG_24BIT_DVOBC 0x09 #define DEVICE_CFG_24BIT_DVOCB 0x0a #define DEVICE_CFG_DUAL_DVOB 0x11 #define DEVICE_CFG_DUAL_DVOC 0x12 #define DEVICE_CFG_DUAL_DVOBC 0x13 #define DEVICE_CFG_DUAL_LINK_DVOBC 0x19 #define DEVICE_CFG_DUAL_LINK_DVOCB 0x1a #define DEVICE_WIRE_NONE 0x00 #define DEVICE_WIRE_DVOB 0x01 #define DEVICE_WIRE_DVOC 0x02 #define DEVICE_WIRE_DVOBC 0x03 #define DEVICE_WIRE_DVOBB 0x05 #define DEVICE_WIRE_DVOCC 0x06 #define DEVICE_WIRE_DVOB_MASTER 0x0d #define DEVICE_WIRE_DVOC_MASTER 0x0e #define DEVICE_PORT_DVOA 0x00 /* none on 845+ */ #define DEVICE_PORT_DVOB 0x01 #define DEVICE_PORT_DVOC 0x02 #define DEVICE_PORT_NONE 0 #define DEVICE_PORT_HDMIB 1 #define DEVICE_PORT_HDMIC 2 #define DEVICE_PORT_HDMID 3 #define DEVICE_PORT_DPB 7 #define DEVICE_PORT_DPC 8 #define DEVICE_PORT_DPD 9 #define DEVICE_INFO_NONE 0 #define DEVICE_INFO_HDMI_CERT 1 #define DEVICE_INFO_DP 2 #define DEVICE_INFO_DVI 3 struct child_device_config { uint16_t handle; uint16_t device_type; /* See DEVICE_TYPE_* above */ uint8_t device_id[10]; uint16_t addin_offset; uint8_t dvo_port; /* See DEVICE_PORT_* above */ uint8_t i2c_pin; uint8_t slave_addr; uint8_t ddc_pin; uint16_t edid_ptr; uint8_t dvo_cfg; /* See DEVICE_CFG_* above */ uint8_t dvo2_port; uint8_t i2c2_pin; uint8_t slave2_addr; uint8_t ddc2_pin; uint8_t capabilities; uint8_t dvo_wiring; /* See DEVICE_WIRE_* above */ uint8_t dvo2_wiring; uint16_t extended_type; uint8_t dvo_function; } __attribute__ ((packed)); struct efp_child_device_config { uint16_t handle; uint16_t device_type; uint8_t skip1[12]; uint8_t port; uint8_t skip2[2]; uint8_t ddc_pin; uint8_t skip3[3]; uint8_t docked_port; uint8_t hdmi_compat:1; uint8_t conn_info:3; uint8_t skip4:4; uint8_t aux_chan; uint8_t dongle_detect; uint8_t skip5[6]; } __attribute__ ((packed)); struct bdb_general_definitions { unsigned char crt_ddc_gmbus_pin; /* see GPIO_PIN_* above */ /* DPMS bits */ unsigned char dpms_acpi:1; unsigned char skip_boot_crt_detect:1; unsigned char dpms_aim:1; unsigned char rsvd1:5; /* finish byte */ /* boot device bits */ unsigned char boot_display[2]; unsigned char child_dev_size; /* * Device info: * If TV is present, it'll be at devices[0] * LVDS will be next, either devices[0] or [1], if present * Max total will be 6, but could be as few as 4 if both * TV and LVDS are missing, so be careful when interpreting * [4] and [5]. */ uint8_t devices[0]; /* may be another device block here on some platforms */ } __attribute__ ((packed)); #define DEVICE_CHILD_SIZE 7 struct bdb_child_devices { uint8_t child_structure_size; struct child_device_config children[DEVICE_CHILD_SIZE]; } __attribute__ ((packed)); struct bdb_lvds_options { uint8_t panel_type; uint8_t rsvd1; /* LVDS capabilities, stored in a dword */ uint8_t pfit_mode:2; uint8_t pfit_text_mode_enhanced:1; uint8_t pfit_gfx_mode_enhanced:1; uint8_t pfit_ratio_auto:1; uint8_t pixel_dither:1; uint8_t lvds_edid:1; uint8_t rsvd2:1; uint8_t rsvd4; } __attribute__ ((packed)); /* 915+ only */ struct bdb_tv_features { /* need to verify bit ordering */ uint16_t under_over_scan_via_yprpb:2; uint16_t rsvd1:10; uint16_t under_over_scan_via_dvi:2; uint16_t add_overscan_mode:1; uint16_t rsvd2:1; } __attribute__ ((packed)); struct lvds_fp_timing { uint16_t x_res; uint16_t y_res; uint32_t lvds_reg; uint32_t lvds_reg_val; uint32_t pp_on_reg; uint32_t pp_on_reg_val; uint32_t pp_off_reg; uint32_t pp_off_reg_val; uint32_t pp_cycle_reg; uint32_t pp_cycle_reg_val; uint32_t pfit_reg; uint32_t pfit_reg_val; uint16_t terminator; } __attribute__ ((packed)); struct lvds_dvo_timing { uint16_t dclk; /**< In 10khz */ uint8_t hactive; uint8_t hblank; uint8_t high_h; /**< 7:4 = hactive 11:8, 3:0 = hblank 11:8 */ uint8_t vactive; uint8_t vblank; uint8_t high_v; /**< 7:4 = vactive 11:8, 3:0 = vblank 11:8 */ uint8_t hsync_off; uint8_t hsync_pulse_width; uint8_t vsync_off; uint8_t high_hsync_off; /**< 7:6 = hsync off 9:8 */ uint8_t h_image; uint8_t v_image; uint8_t max_hv; uint8_t h_border; uint8_t v_border; uint8_t flags; } __attribute__ ((packed)); struct lvds_dvo_timing2 { uint16_t clock; /**< In 10khz */ uint8_t hactive_lo; uint8_t hblank_lo; uint8_t hblank_hi:4; uint8_t hactive_hi:4; uint8_t vactive_lo; uint8_t vblank_lo; uint8_t vblank_hi:4; uint8_t vactive_hi:4; uint8_t hsync_off_lo; uint8_t hsync_pulse_width; uint8_t vsync_pulse_width:4; uint8_t vsync_off:4; uint8_t rsvd0:6; uint8_t hsync_off_hi:2; uint8_t h_image; uint8_t v_image; uint8_t max_hv; uint8_t h_border; uint8_t v_border; uint8_t rsvd1:3; uint8_t digital:2; uint8_t vsync_positive:1; uint8_t hsync_positive:1; uint8_t rsvd2:1; } __attribute__((packed)); struct lvds_pnp_id { uint16_t mfg_name; uint16_t product_code; uint32_t serial; uint8_t mfg_week; uint8_t mfg_year; } __attribute__ ((packed));; /* LFP pointer table contains entries to the struct below */ struct bdb_lvds_lfp_data_ptr { uint16_t fp_timing_offset; /* offsets are from start of bdb */ uint8_t fp_table_size; uint16_t dvo_timing_offset; uint8_t dvo_table_size; uint16_t panel_pnp_id_offset; uint8_t pnp_table_size; } __attribute__ ((packed)); struct bdb_lvds_lfp_data_ptrs { uint8_t lvds_entries; struct bdb_lvds_lfp_data_ptr ptr[16]; } __attribute__ ((packed)); struct bdb_lvds_lfp_data_entry { struct lvds_fp_timing fp_timing; struct lvds_dvo_timing dvo_timing; struct lvds_pnp_id pnp_id; } __attribute__ ((packed)); struct bdb_lvds_lfp_data { struct bdb_lvds_lfp_data_entry data[16]; } __attribute__ ((packed)); #define BACKLIGHT_TYPE_NONE 0 #define BACKLIGHT_TYPE_I2C 1 #define BACKLIGHT_TYPE_PWM 2 #define BACKLIGHT_GMBUS_100KHZ 0 #define BACKLIGHT_GMBUS_50KHZ 1 #define BACKLIGHT_GMBUS_400KHZ 2 #define BACKLIGHT_GMBUS_1MHZ 3 struct backlight_info { uint8_t inverter_type:2; /* see BACKLIGHT_TYPE_* above */ uint8_t inverter_polarity:1; /* 1 means 0 is max, 255 is min */ uint8_t gpio_pins:3; /* see GPIO_PIN_* above */ uint8_t gmbus_speed:2; uint16_t pwm_frequency; /* in Hz */ uint8_t min_brightness; /* Next two are only for 915+ systems */ uint8_t i2c_addr; uint8_t i2c_cmd; } __attribute((packed)); struct bdb_backlight_control { uint8_t row_size; struct backlight_info lfps[16]; } __attribute__ ((packed)); struct bdb_bia { uint8_t bia_enable:1; uint8_t bia_level:3; uint8_t rsvd1:3; uint8_t als_enable:1; uint8_t als_response_data[20]; } __attribute((packed)); struct aimdb_header { char signature[16]; char oem_device[20]; uint16_t aimdb_version; uint16_t aimdb_header_size; uint16_t aimdb_size; } __attribute__ ((packed)); struct aimdb_block { uint8_t aimdb_id; uint16_t aimdb_size; } __attribute__ ((packed)); struct vch_panel_data { uint16_t fp_timing_offset; uint8_t fp_timing_size; uint16_t dvo_timing_offset; uint8_t dvo_timing_size; uint16_t text_fitting_offset; uint8_t text_fitting_size; uint16_t graphics_fitting_offset; uint8_t graphics_fitting_size; } __attribute__ ((packed)); struct vch_bdb_22 { struct aimdb_block aimdb_block; struct vch_panel_data panels[16]; } __attribute__ ((packed)); #define BLC_INVERTER_TYPE_NONE 0 #define BLC_INVERTER_TYPE_I2C 1 #define BLC_INVERTER_TYPE_PWM 2 #define BLC_GPIO_NONE 0 #define BLC_GPIO_I2C 1 #define BLC_GPIO_CRT_DDC 2 #define BLC_GPIO_DVI_DDC 3 #define BLC_GPIO_SDVO_I2C 5 struct blc_struct { uint8_t inverter_type:2; uint8_t inverter_polarity:1; /* 1 means inverted (0 = max brightness) */ uint8_t gpio_pins:3; uint8_t gmbus_speed:2; uint16_t pwm_freq; /* in Hz */ uint8_t min_brightness; /* (0-255) */ uint8_t i2c_slave_addr; uint8_t i2c_cmd; } __attribute__ ((packed)); struct bdb_lvds_backlight { uint8_t blcstruct_size; struct blc_struct panels[16]; } __attribute__ ((packed)); struct bdb_lvds_power { uint8_t dpst_enabled:1; uint8_t pwr_prefs:3; uint8_t rsvd1:3; uint8_t als_enabled:1; uint16_t als_backlight1; uint16_t als_backlight2; uint16_t als_backlight3; uint16_t als_backlight4; uint16_t als_backlight5; } __attribute__ ((packed)); #define BDB_DRIVER_NO_LVDS 0 #define BDB_DRIVER_INT_LVDS 1 #define BDB_DRIVER_SDVO_LVDS 2 #define BDB_DRIVER_EDP 3 struct bdb_driver_feature { uint8_t boot_dev_algorithm:1; uint8_t block_display_switch:1; uint8_t allow_display_switch:1; uint8_t hotplug_dvo:1; uint8_t dual_view_zoom:1; uint8_t int15h_hook:1; uint8_t sprite_in_clone:1; uint8_t primary_lfp_id:1; uint16_t boot_mode_x; uint16_t boot_mode_y; uint8_t boot_mode_bpp; uint8_t boot_mode_refresh; uint16_t enable_lfp_primary:1; uint16_t selective_mode_pruning:1; uint16_t dual_frequency:1; uint16_t render_clock_freq:1; /* 0: high freq; 1: low freq */ uint16_t nt_clone_support:1; uint16_t power_scheme_ui:1; /* 0: CUI; 1: 3rd party */ uint16_t sprite_display_assign:1; /* 0: secondary; 1: primary */ uint16_t cui_aspect_scaling:1; uint16_t preserve_aspect_ratio:1; uint16_t sdvo_device_power_down:1; uint16_t crt_hotplug:1; uint16_t lvds_config:2; uint16_t reserved:3; uint8_t static_display:1; uint8_t reserved2:7; uint16_t legacy_crt_max_x; uint16_t legacy_crt_max_y; uint8_t legacy_crt_max_refresh; } __attribute__ ((packed)); struct bdb_sdvo_lvds_options { uint8_t panel_backlight; uint8_t h40_set_panel_type; uint8_t panel_type; uint8_t ssc_clk_freq; uint16_t als_low_trip; uint16_t als_high_trip; uint8_t sclalarcoeff_tab_row_num; uint8_t sclalarcoeff_tab_row_size; uint8_t coefficient[8]; uint8_t panel_misc_bits_1; uint8_t panel_misc_bits_2; uint8_t panel_misc_bits_3; uint8_t panel_misc_bits_4; } __attribute__ ((packed)); #define EDP_18BPP 0 #define EDP_24BPP 1 #define EDP_30BPP 2 #define EDP_RATE_1_62 0 #define EDP_RATE_2_7 1 #define EDP_LANE_1 0 #define EDP_LANE_2 1 #define EDP_LANE_4 3 #define EDP_PREEMPHASIS_NONE 0 #define EDP_PREEMPHASIS_3_5dB 1 #define EDP_PREEMPHASIS_6dB 2 #define EDP_PREEMPHASIS_9_5dB 3 #define EDP_VSWING_0_4V 0 #define EDP_VSWING_0_6V 1 #define EDP_VSWING_0_8V 2 #define EDP_VSWING_1_2V 3 struct edp_power_seq { uint16_t t3; uint16_t t7; uint16_t t9; uint16_t t10; uint16_t t12; } __attribute__ ((packed)); struct edp_link_params { uint8_t rate:4; uint8_t lanes:4; uint8_t preemphasis:4; uint8_t vswing:4; } __attribute__ ((packed)); struct bdb_edp { struct edp_power_seq power_seqs[16]; uint32_t color_depth; struct edp_link_params link_params[16]; uint32_t sdrrs_msa_timing_delay; uint16_t edp_s3d_feature; uint16_t edp_t3_optimization; } __attribute__ ((packed)); /* Block 52 contains MiPi Panel info * 6 such enteries will there. Index into correct * entery is based on the panel_index in #40 LFP */ #define MAX_MIPI_CONFIGURATIONS 6 struct mipi_config { uint16_t panel_id; /* General Params */ uint32_t dithering:1; uint32_t rsvd1:1; uint32_t panel_type:1; uint32_t panel_arch_type:2; uint32_t cmd_mode:1; uint32_t vtm:2; uint32_t cabc:1; uint32_t pwm_blc:1; /* Bit 13:10 * 000 - Reserved, 001 - RGB565, 002 - RGB666, * 011 - RGB666Loosely packed, 100 - RGB888, * others - rsvd */ uint32_t videomode_color_format:4; /* Bit 15:14 * 0 - No rotation, 1 - 90 degree * 2 - 180 degree, 3 - 270 degree */ uint32_t rotation:2; uint32_t bta:1; uint32_t rsvd2:15; /* 2 byte Port Description */ uint16_t dual_link:2; uint16_t lane_cnt:2; uint16_t rsvd3:12; /* 2 byte DSI COntroller params */ /* 0 - Using DSI PHY, 1 - TE usage */ uint16_t dsi_usage:1; uint16_t rsvd4:15; uint8_t rsvd5[5]; uint32_t dsi_ddr_clk; uint32_t bridge_ref_clk; uint8_t byte_clk_sel:2; uint8_t rsvd6:6; /* DPHY Flags */ uint16_t dphy_param_valid:1; uint16_t eot_disabled:1; uint16_t clk_stop:1; uint16_t rsvd7:13; uint32_t hs_tx_timeout; uint32_t lp_rx_timeout; uint32_t turn_around_timeout; uint32_t device_reset_timer; uint32_t master_init_timer; uint32_t dbi_bw_timer; uint32_t lp_byte_clk_val; /* 4 byte Dphy Params */ uint32_t prepare_cnt:6; uint32_t rsvd8:2; uint32_t clk_zero_cnt:8; uint32_t trail_cnt:5; uint32_t rsvd9:3; uint32_t exit_zero_cnt:6; uint32_t rsvd10:2; uint32_t clk_lane_switch_cnt; uint32_t hl_switch_cnt; uint32_t rsvd11[6]; /* timings based on dphy spec */ uint8_t tclk_miss; uint8_t tclk_post; uint8_t rsvd12; uint8_t tclk_pre; uint8_t tclk_prepare; uint8_t tclk_settle; uint8_t tclk_term_enable; uint8_t tclk_trail; uint16_t tclk_prepare_clkzero; uint8_t rsvd13; uint8_t td_term_enable; uint8_t teot; uint8_t ths_exit; uint8_t ths_prepare; uint16_t ths_prepare_hszero; uint8_t rsvd14; uint8_t ths_settle; uint8_t ths_skip; uint8_t ths_trail; uint8_t tinit; uint8_t tlpx; uint8_t rsvd15[3]; /* GPIOs */ uint8_t panel_enable; uint8_t bl_enable; uint8_t pwm_enable; uint8_t reset_r_n; uint8_t pwr_down_r; uint8_t stdby_r_n; } __attribute__ ((packed)); /* Block 52 contains MiPi configuration block * 6 * bdb_mipi_config, followed by 6 pps data * block below */ struct mipi_pps_data { uint16_t panel_on_delay; uint16_t bl_enable_delay; uint16_t bl_disable_delay; uint16_t panel_off_delay; uint16_t panel_power_cycle_delay; } __attribute__ ((packed)); struct bdb_mipi_config { struct mipi_config config[MAX_MIPI_CONFIGURATIONS]; struct mipi_pps_data pps[MAX_MIPI_CONFIGURATIONS]; } __attribute__ ((packed)); /* variable number of these - max 6 */ struct bdb_mipi_sequence { uint8_t version; uint8_t data[0]; } __attribute__ ((packed)); /* MIPI Sequence Block definitions */ enum mipi_seq { MIPI_SEQ_END = 0, MIPI_SEQ_ASSERT_RESET, MIPI_SEQ_INIT_OTP, MIPI_SEQ_DISPLAY_ON, MIPI_SEQ_DISPLAY_OFF, MIPI_SEQ_DEASSERT_RESET, MIPI_SEQ_BACKLIGHT_ON, /* sequence block v2+ */ MIPI_SEQ_BACKLIGHT_OFF, /* sequence block v2+ */ MIPI_SEQ_TEAR_ON, /* sequence block v2+ */ MIPI_SEQ_TEAR_OFF, /* sequence block v3+ */ MIPI_SEQ_POWER_ON, /* sequence block v3+ */ MIPI_SEQ_POWER_OFF, /* sequence block v3+ */ MIPI_SEQ_MAX }; enum mipi_seq_element { MIPI_SEQ_ELEM_END = 0, MIPI_SEQ_ELEM_SEND_PKT, MIPI_SEQ_ELEM_DELAY, MIPI_SEQ_ELEM_GPIO, MIPI_SEQ_ELEM_I2C, /* sequence block v2+ */ MIPI_SEQ_ELEM_SPI, /* sequence block v3+ */ MIPI_SEQ_ELEM_PMIC, /* sequence block v3+ */ MIPI_SEQ_ELEM_MAX }; /* * Driver<->VBIOS interaction occurs through scratch bits in * GR18 & SWF*. * * The VBIOS/firmware will signal to the gfx driver through the ASLE interrupt * (visible in the interupt regs at bit 0) when it wants something done. * * Pre-965: * The gfx driver can make calls to the VBIOS/firmware through an SMI request, * generated by writing to offset 0xe0 of the device's config space (see the * publically available 915 PRM for details). * * 965 and above: * IGD OpRegion requests to the VBIOS/firmware are made using SWSCI, which can * be triggered by writing to offset 0xe4 (see the publically available * 965 graphics PRM for details). */ /* GR18 bits are set on display switch and hotkey events */ #define GR18_DRIVER_SWITCH_EN (1<<7) /* 0: VBIOS control, 1: driver control */ #define GR18_HOTKEY_MASK 0x78 /* See also SWF4 15:0 */ #define GR18_HK_NONE (0x0<<3) #define GR18_HK_LFP_STRETCH (0x1<<3) #define GR18_HK_TOGGLE_DISP (0x2<<3) #define GR18_HK_DISP_SWITCH (0x4<<3) /* see SWF14 15:0 for what to enable */ #define GR18_HK_POPUP_DISABLED (0x6<<3) #define GR18_HK_POPUP_ENABLED (0x7<<3) #define GR18_HK_PFIT (0x8<<3) #define GR18_HK_APM_CHANGE (0xa<<3) #define GR18_HK_MULTIPLE (0xc<<3) #define GR18_USER_INT_EN (1<<2) #define GR18_A0000_FLUSH_EN (1<<1) #define GR18_SMM_EN (1<<0) /* Set by driver, cleared by VBIOS */ #define SWF00_YRES_SHIFT 16 #define SWF00_XRES_SHIFT 0 #define SWF00_RES_MASK 0xffff /* Set by VBIOS at boot time and driver at runtime */ #define SWF01_TV2_FORMAT_SHIFT 8 #define SWF01_TV1_FORMAT_SHIFT 0 #define SWF01_TV_FORMAT_MASK 0xffff #define SWF10_VBIOS_BLC_I2C_EN (1<<29) #define SWF10_GTT_OVERRIDE_EN (1<<28) #define SWF10_LFP_DPMS_OVR (1<<27) /* override DPMS on display switch */ #define SWF10_ACTIVE_TOGGLE_LIST_MASK (7<<24) #define SWF10_OLD_TOGGLE 0x0 #define SWF10_TOGGLE_LIST_1 0x1 #define SWF10_TOGGLE_LIST_2 0x2 #define SWF10_TOGGLE_LIST_3 0x3 #define SWF10_TOGGLE_LIST_4 0x4 #define SWF10_PANNING_EN (1<<23) #define SWF10_DRIVER_LOADED (1<<22) #define SWF10_EXTENDED_DESKTOP (1<<21) #define SWF10_EXCLUSIVE_MODE (1<<20) #define SWF10_OVERLAY_EN (1<<19) #define SWF10_PLANEB_HOLDOFF (1<<18) #define SWF10_PLANEA_HOLDOFF (1<<17) #define SWF10_VGA_HOLDOFF (1<<16) #define SWF10_ACTIVE_DISP_MASK 0xffff #define SWF10_PIPEB_LFP2 (1<<15) #define SWF10_PIPEB_EFP2 (1<<14) #define SWF10_PIPEB_TV2 (1<<13) #define SWF10_PIPEB_CRT2 (1<<12) #define SWF10_PIPEB_LFP (1<<11) #define SWF10_PIPEB_EFP (1<<10) #define SWF10_PIPEB_TV (1<<9) #define SWF10_PIPEB_CRT (1<<8) #define SWF10_PIPEA_LFP2 (1<<7) #define SWF10_PIPEA_EFP2 (1<<6) #define SWF10_PIPEA_TV2 (1<<5) #define SWF10_PIPEA_CRT2 (1<<4) #define SWF10_PIPEA_LFP (1<<3) #define SWF10_PIPEA_EFP (1<<2) #define SWF10_PIPEA_TV (1<<1) #define SWF10_PIPEA_CRT (1<<0) #define SWF11_MEMORY_SIZE_SHIFT 16 #define SWF11_SV_TEST_EN (1<<15) #define SWF11_IS_AGP (1<<14) #define SWF11_DISPLAY_HOLDOFF (1<<13) #define SWF11_DPMS_REDUCED (1<<12) #define SWF11_IS_VBE_MODE (1<<11) #define SWF11_PIPEB_ACCESS (1<<10) /* 0 here means pipe a */ #define SWF11_DPMS_MASK 0x07 #define SWF11_DPMS_OFF (1<<2) #define SWF11_DPMS_SUSPEND (1<<1) #define SWF11_DPMS_STANDBY (1<<0) #define SWF11_DPMS_ON 0 #define SWF14_GFX_PFIT_EN (1<<31) #define SWF14_TEXT_PFIT_EN (1<<30) #define SWF14_LID_SWITCH_EN (1<<29) #define SWF14_POPUP_EN (1<<28) #define SWF14_DISPLAY_HOLDOFF (1<<27) #define SWF14_DISP_DETECT_EN (1<<26) #define SWF14_DOCKING_STATUS_DOCKED (1<<25) /* 0 here means undocked */ #define SWF14_DRIVER_STATUS (1<<24) #define SWF14_OS_TYPE_WIN9X (1<<23) #define SWF14_OS_TYPE_WINNT (1<<22) /* 21:19 rsvd */ #define SWF14_PM_TYPE_MASK 0x00070000 #define SWF14_PM_ACPI_VIDEO (0x4 << 16) #define SWF14_PM_ACPI (0x3 << 16) #define SWF14_PM_APM_12 (0x2 << 16) #define SWF14_PM_APM_11 (0x1 << 16) #define SWF14_HK_REQUEST_MASK 0x0000ffff /* see GR18 6:3 for event type */ /* if GR18 indicates a display switch */ #define SWF14_DS_PIPEB_LFP2_EN (1<<15) #define SWF14_DS_PIPEB_EFP2_EN (1<<14) #define SWF14_DS_PIPEB_TV2_EN (1<<13) #define SWF14_DS_PIPEB_CRT2_EN (1<<12) #define SWF14_DS_PIPEB_LFP_EN (1<<11) #define SWF14_DS_PIPEB_EFP_EN (1<<10) #define SWF14_DS_PIPEB_TV_EN (1<<9) #define SWF14_DS_PIPEB_CRT_EN (1<<8) #define SWF14_DS_PIPEA_LFP2_EN (1<<7) #define SWF14_DS_PIPEA_EFP2_EN (1<<6) #define SWF14_DS_PIPEA_TV2_EN (1<<5) #define SWF14_DS_PIPEA_CRT2_EN (1<<4) #define SWF14_DS_PIPEA_LFP_EN (1<<3) #define SWF14_DS_PIPEA_EFP_EN (1<<2) #define SWF14_DS_PIPEA_TV_EN (1<<1) #define SWF14_DS_PIPEA_CRT_EN (1<<0) /* if GR18 indicates a panel fitting request */ #define SWF14_PFIT_EN (1<<0) /* 0 means disable */ /* if GR18 indicates an APM change request */ #define SWF14_APM_HIBERNATE 0x4 #define SWF14_APM_SUSPEND 0x3 #define SWF14_APM_STANDBY 0x1 #define SWF14_APM_RESTORE 0x0 #endif /* _INTEL_BIOS_H_ */ intel-gpu-tools-1.14/tools/intel_bios_reader.c0000644000175000017500000012416612665336131016417 00000000000000/* * Copyright 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Eric Anholt * */ #include #include #include #include #include #include #include #include #include #include "intel_bios.h" #include "intel_io.h" #include "intel_chipset.h" #include "drmtest.h" static uint32_t devid = -1; /* no bother to include "edid.h" */ #define _H_ACTIVE(x) (x[2] + ((x[4] & 0xF0) << 4)) #define _H_SYNC_OFF(x) (x[8] + ((x[11] & 0xC0) << 2)) #define _H_SYNC_WIDTH(x) (x[9] + ((x[11] & 0x30) << 4)) #define _H_BLANK(x) (x[3] + ((x[4] & 0x0F) << 8)) #define _V_ACTIVE(x) (x[5] + ((x[7] & 0xF0) << 4)) #define _V_SYNC_OFF(x) ((x[10] >> 4) + ((x[11] & 0x0C) << 2)) #define _V_SYNC_WIDTH(x) ((x[10] & 0x0F) + ((x[11] & 0x03) << 4)) #define _V_BLANK(x) (x[6] + ((x[7] & 0x0F) << 8)) #define _PIXEL_CLOCK(x) (x[0] + (x[1] << 8)) * 10000 uint8_t *VBIOS; #define INTEL_BIOS_8(_addr) (VBIOS[_addr]) #define INTEL_BIOS_16(_addr) (VBIOS[_addr] | \ (VBIOS[_addr + 1] << 8)) #define INTEL_BIOS_32(_addr) (VBIOS[_addr] | \ (VBIOS[_addr + 1] << 8) | \ (VBIOS[_addr + 2] << 16) | \ (VBIOS[_addr + 3] << 24)) #define YESNO(val) ((val) ? "yes" : "no") /* This is not for mapping to memory layout. */ struct bdb_block { uint8_t id; uint32_t size; const void *data; }; const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs; static int tv_present; static int lvds_present; static int panel_type; /* Get BDB block size given a pointer to Block ID. */ static uint32_t _get_blocksize(const uint8_t *block_base) { /* The MIPI Sequence Block v3+ has a separate size field. */ if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3) return *((const uint32_t *)(block_base + 4)); else return *((const uint16_t *)(block_base + 1)); } static struct bdb_block *find_section(const struct bdb_header *bdb, int section_id, int length) { struct bdb_block *block; const uint8_t *base = (const uint8_t *)bdb; int index = 0; uint32_t total, current_size; unsigned char current_id; /* skip to first section */ index += bdb->header_size; total = bdb->bdb_size; if (total > length) total = length; block = malloc(sizeof(*block)); if (!block) { fprintf(stderr, "out of memory\n"); exit(-1); } /* walk the sections looking for section_id */ while (index + 3 < total) { current_id = *(base + index); current_size = _get_blocksize(base + index); index += 3; if (index + current_size > total) return NULL; if (current_id == section_id) { block->id = current_id; block->size = current_size; block->data = base + index; return block; } index += current_size; } free(block); return NULL; } static void dump_general_features(const struct bdb_header *bdb, const struct bdb_block *block) { const struct bdb_general_features *features = block->data; printf("\tPanel fitting: "); switch (features->panel_fitting) { case 0: printf("disabled\n"); break; case 1: printf("text only\n"); break; case 2: printf("graphics only\n"); break; case 3: printf("text & graphics\n"); break; } printf("\tFlexaim: %s\n", YESNO(features->flexaim)); printf("\tMessage: %s\n", YESNO(features->msg_enable)); printf("\tClear screen: %d\n", features->clear_screen); printf("\tDVO color flip required: %s\n", YESNO(features->color_flip)); printf("\tExternal VBT: %s\n", YESNO(features->download_ext_vbt)); printf("\tEnable SSC: %s\n", YESNO(features->enable_ssc)); if (features->enable_ssc) { if (IS_VALLEYVIEW(devid) || IS_CHERRYVIEW(devid) || IS_BROXTON(devid)) printf("\tSSC frequency: 100 MHz\n"); else if (HAS_PCH_SPLIT(devid)) printf("\tSSC frequency: %s\n", features->ssc_freq ? "100 MHz" : "120 MHz"); else printf("\tSSC frequency: %s\n", features->ssc_freq ? "100 MHz (66 MHz on 855)" : "96 MHz (48 MHz on 855)"); } printf("\tLFP on override: %s\n", YESNO(features->enable_lfp_on_override)); printf("\tDisable SSC on clone: %s\n", YESNO(features->disable_ssc_ddt)); printf("\tDisable smooth vision: %s\n", YESNO(features->disable_smooth_vision)); printf("\tSingle DVI for CRT/DVI: %s\n", YESNO(features->single_dvi)); printf("\tLegacy monitor detect: %s\n", YESNO(features->legacy_monitor_detect)); printf("\tIntegrated CRT: %s\n", YESNO(features->int_crt_support)); printf("\tIntegrated TV: %s\n", YESNO(features->int_tv_support)); tv_present = 1; /* should be based on whether TV DAC exists */ lvds_present = 1; /* should be based on IS_MOBILE() */ } static void dump_backlight_info(const struct bdb_header *bdb, const struct bdb_block *block) { const struct bdb_lvds_backlight *backlight = block->data; const struct blc_struct *blc; if (sizeof(struct blc_struct) != backlight->blcstruct_size) { printf("\tBacklight struct sizes don't match (expected %zu, got %u), skipping\n", sizeof(struct blc_struct), backlight->blcstruct_size); return; } blc = &backlight->panels[panel_type]; printf("\tInverter type: %d\n", blc->inverter_type); printf("\t polarity: %d\n", blc->inverter_polarity); printf("\t GPIO pins: %d\n", blc->gpio_pins); printf("\t GMBUS speed: %d\n", blc->gmbus_speed); printf("\t PWM freq: %d\n", blc->pwm_freq); printf("\tMinimum brightness: %d\n", blc->min_brightness); printf("\tI2C slave addr: 0x%02x\n", blc->i2c_slave_addr); printf("\tI2C command: 0x%02x\n", blc->i2c_cmd); } static const struct { unsigned short type; const char *name; } child_device_types[] = { { DEVICE_TYPE_NONE, "none" }, { DEVICE_TYPE_CRT, "CRT" }, { DEVICE_TYPE_TV, "TV" }, { DEVICE_TYPE_EFP, "EFP" }, { DEVICE_TYPE_LFP, "LFP" }, { DEVICE_TYPE_CRT_DPMS, "CRT" }, { DEVICE_TYPE_CRT_DPMS_HOTPLUG, "CRT" }, { DEVICE_TYPE_TV_COMPOSITE, "TV composite" }, { DEVICE_TYPE_TV_MACROVISION, "TV" }, { DEVICE_TYPE_TV_RF_COMPOSITE, "TV" }, { DEVICE_TYPE_TV_SVIDEO_COMPOSITE, "TV S-Video" }, { DEVICE_TYPE_TV_SCART, "TV SCART" }, { DEVICE_TYPE_TV_CODEC_HOTPLUG_PWR, "TV" }, { DEVICE_TYPE_EFP_HOTPLUG_PWR, "EFP" }, { DEVICE_TYPE_EFP_DVI_HOTPLUG_PWR, "DVI" }, { DEVICE_TYPE_EFP_DVI_I, "DVI-I" }, { DEVICE_TYPE_EFP_DVI_D_DUAL, "DL-DVI-D" }, { DEVICE_TYPE_EFP_DVI_D_HDCP, "DVI-D" }, { DEVICE_TYPE_OPENLDI_HOTPLUG_PWR, "OpenLDI" }, { DEVICE_TYPE_OPENLDI_DUALPIX, "OpenLDI" }, { DEVICE_TYPE_LFP_PANELLINK, "PanelLink" }, { DEVICE_TYPE_LFP_CMOS_PWR, "CMOS LFP" }, { DEVICE_TYPE_LFP_LVDS_PWR, "LVDS" }, { DEVICE_TYPE_LFP_LVDS_DUAL, "LVDS" }, { DEVICE_TYPE_LFP_LVDS_DUAL_HDCP, "LVDS" }, { DEVICE_TYPE_INT_LFP, "LFP" }, { DEVICE_TYPE_INT_TV, "TV" }, { DEVICE_TYPE_DP, "DisplayPort" }, { DEVICE_TYPE_DP_HDMI_DVI, "DisplayPort/HDMI/DVI" }, { DEVICE_TYPE_DP_DVI, "DisplayPort/DVI" }, { DEVICE_TYPE_HDMI_DVI, "HDMI/DVI" }, { DEVICE_TYPE_DVI, "DVI" }, { DEVICE_TYPE_eDP, "eDP" }, { DEVICE_TYPE_MIPI, "MIPI" }, }; static const int num_child_device_types = sizeof(child_device_types) / sizeof(child_device_types[0]); static const char *child_device_type(unsigned short type) { int i; for (i = 0; i < num_child_device_types; i++) if (child_device_types[i].type == type) return child_device_types[i].name; return "unknown"; } static const char * const child_device_type_bits[] = { [DEVICE_TYPE_CLASS_EXTENSION] = "Class extension", [DEVICE_TYPE_POWER_MANAGEMENT] = "Power management", [DEVICE_TYPE_HOTPLUG_SIGNALING] = "Hotplug signaling", [DEVICE_TYPE_INTERNAL_CONNECTOR] = "Internal connector", [DEVICE_TYPE_NOT_HDMI_OUTPUT] = "HDMI output", /* decoded as inverse */ [DEVICE_TYPE_MIPI_OUTPUT] = "MIPI output", [DEVICE_TYPE_COMPOSITE_OUTPUT] = "Composite output", [DEVICE_TYPE_DIAL_CHANNEL] = "Dual channel", [DEVICE_TYPE_CONTENT_PROTECTION] = "Content protection", [DEVICE_TYPE_HIGH_SPEED_LINK] = "High speel link", [DEVICE_TYPE_LVDS_SIGNALING] = "LVDS signaling", [DEVICE_TYPE_TMDS_DVI_SIGNALING] = "TMDS/DVI signaling", [DEVICE_TYPE_VIDEO_SIGNALING] = "Video signaling", [DEVICE_TYPE_DISPLAYPORT_OUTPUT] = "DisplayPort output", [DEVICE_TYPE_DIGITAL_OUTPUT] = "Digital output", [DEVICE_TYPE_ANALOG_OUTPUT] = "Analog output", }; static void dump_child_device_type_bits(uint16_t type) { int bit; type ^= 1 << DEVICE_TYPE_NOT_HDMI_OUTPUT; for (bit = 15; bit >= 0; bit--) { if (type & (1 << bit)) printf("\t\t\t%s\n", child_device_type_bits[bit]); } } static const struct { unsigned char handle; const char *name; } child_device_handles[] = { { DEVICE_HANDLE_CRT, "CRT" }, { DEVICE_HANDLE_EFP1, "EFP 1 (HDMI/DVI/DP)" }, { DEVICE_HANDLE_EFP2, "EFP 2 (HDMI/DVI/DP)" }, { DEVICE_HANDLE_EFP3, "EFP 3 (HDMI/DVI/DP)" }, { DEVICE_HANDLE_EFP4, "EFP 4 (HDMI/DVI/DP)" }, { DEVICE_HANDLE_LPF1, "LFP 1 (eDP)" }, { DEVICE_HANDLE_LFP2, "LFP 2 (eDP)" }, }; static const int num_child_device_handles = sizeof(child_device_handles) / sizeof(child_device_handles[0]); static const char *child_device_handle(unsigned char handle) { int i; for (i = 0; i < num_child_device_handles; i++) if (child_device_handles[i].handle == handle) return child_device_handles[i].name; return "unknown"; } static const struct { unsigned short type; const char *name; } efp_ports[] = { { DEVICE_PORT_NONE, "N/A" }, { DEVICE_PORT_HDMIB, "HDMI-B" }, { DEVICE_PORT_HDMIC, "HDMI-C" }, { DEVICE_PORT_HDMID, "HDMI-D" }, { DEVICE_PORT_DPB, "DP-B" }, { DEVICE_PORT_DPC, "DP-C" }, { DEVICE_PORT_DPD, "DP-D" }, }; static const int num_efp_ports = sizeof(efp_ports) / sizeof(efp_ports[0]); static const char *efp_port(uint8_t type) { int i; for (i = 0; i < num_efp_ports; i++) if (efp_ports[i].type == type) return efp_ports[i].name; return "unknown"; } static const struct { unsigned short type; const char *name; } efp_conn_info[] = { { DEVICE_INFO_NONE, "N/A" }, { DEVICE_INFO_HDMI_CERT, "HDMI certified" }, { DEVICE_INFO_DP, "DisplayPort" }, { DEVICE_INFO_DVI, "DVI" }, }; static const int num_efp_conn_info = sizeof(efp_conn_info) / sizeof(efp_conn_info[0]); static const char *efp_conn(uint8_t type) { int i; for (i = 0; i < num_efp_conn_info; i++) if (efp_conn_info[i].type == type) return efp_conn_info[i].name; return "unknown"; } static void dump_child_device(const struct bdb_header *bdb, struct child_device_config *child) { char child_id[11]; if (!child->device_type) return; if (bdb->version < 152) { strncpy(child_id, (char *)child->device_id, 10); child_id[10] = 0; printf("\tChild device info:\n"); printf("\t\tDevice type: %04x (%s)\n", child->device_type, child_device_type(child->device_type)); printf("\t\tSignature: %s\n", child_id); printf("\t\tAIM offset: %d\n", child->addin_offset); printf("\t\tDVO port: 0x%02x\n", child->dvo_port); } else { /* 152+ have EFP blocks here */ struct efp_child_device_config *efp = (struct efp_child_device_config *)child; printf("\tEFP device info:\n"); printf("\t\tDevice handle: 0x%04x (%s)\n", efp->handle, child_device_handle(efp->handle)); printf("\t\tDevice type: 0x%04x (%s)\n", efp->device_type, child_device_type(efp->device_type)); dump_child_device_type_bits(efp->device_type); printf("\t\tPort: 0x%02x (%s)\n", efp->port, efp_port(efp->port)); printf("\t\tDDC pin: 0x%02x\n", efp->ddc_pin); printf("\t\tDock port: 0x%02x (%s)\n", efp->docked_port, efp_port(efp->docked_port)); printf("\t\tHDMI compatible? %s\n", efp->hdmi_compat ? "Yes" : "No"); printf("\t\tInfo: %s\n", efp_conn(efp->conn_info)); printf("\t\tAux channel: 0x%02x\n", efp->aux_chan); printf("\t\tDongle detect: 0x%02x\n", efp->dongle_detect); } } static void dump_general_definitions(const struct bdb_header *bdb, const struct bdb_block *block) { const struct bdb_general_definitions *defs = block->data; int i; int child_device_num; printf("\tCRT DDC GMBUS addr: 0x%02x\n", defs->crt_ddc_gmbus_pin); printf("\tUse ACPI DPMS CRT power states: %s\n", YESNO(defs->dpms_acpi)); printf("\tSkip CRT detect at boot: %s\n", YESNO(defs->skip_boot_crt_detect)); printf("\tUse DPMS on AIM devices: %s\n", YESNO(defs->dpms_aim)); printf("\tBoot display type: 0x%02x%02x\n", defs->boot_display[1], defs->boot_display[0]); printf("\tTV data block present: %s\n", YESNO(tv_present)); printf("\tChild device size: %d\n", defs->child_dev_size); child_device_num = (block->size - sizeof(*defs)) / defs->child_dev_size; for (i = 0; i < child_device_num; i++) dump_child_device(bdb,(void*)&defs->devices[i * defs->child_dev_size]); } static void dump_child_devices(const struct bdb_header *bdb, const struct bdb_block *block) { const struct bdb_child_devices *child_devs = block->data; const struct child_device_config *child; int i; for (i = 0; i < DEVICE_CHILD_SIZE; i++) { child = &child_devs->children[i]; /* Skip nonexistent children */ if (!child->device_type) continue; printf("\tChild device %d\n", i); printf("\t\tType: 0x%04x (%s)\n", child->device_type, child_device_type(child->device_type)); printf("\t\tDVO port: 0x%02x\n", child->dvo_port); printf("\t\tI2C pin: 0x%02x\n", child->i2c_pin); printf("\t\tSlave addr: 0x%02x\n", child->slave_addr); printf("\t\tDDC pin: 0x%02x\n", child->ddc_pin); printf("\t\tDVO config: 0x%02x\n", child->dvo_cfg); printf("\t\tDVO wiring: 0x%02x\n", child->dvo_wiring); } } static void dump_lvds_options(const struct bdb_header *bdb, const struct bdb_block *block) { const struct bdb_lvds_options *options = block->data; panel_type = options->panel_type; printf("\tPanel type: %d\n", panel_type); printf("\tLVDS EDID available: %s\n", YESNO(options->lvds_edid)); printf("\tPixel dither: %s\n", YESNO(options->pixel_dither)); printf("\tPFIT auto ratio: %s\n", YESNO(options->pfit_ratio_auto)); printf("\tPFIT enhanced graphics mode: %s\n", YESNO(options->pfit_gfx_mode_enhanced)); printf("\tPFIT enhanced text mode: %s\n", YESNO(options->pfit_text_mode_enhanced)); printf("\tPFIT mode: %d\n", options->pfit_mode); } static void dump_lvds_ptr_data(const struct bdb_header *bdb, const struct bdb_block *block) { const struct bdb_lvds_lfp_data_ptrs *ptrs = block->data; printf("\tNumber of entries: %d\n", ptrs->lvds_entries); /* save for use by dump_lvds_data() */ lvds_lfp_data_ptrs = ptrs; } static void dump_lvds_data(const struct bdb_header *bdb, const struct bdb_block *block) { const struct bdb_lvds_lfp_data *lvds_data = block->data; const struct bdb_lvds_lfp_data_ptrs *ptrs = lvds_lfp_data_ptrs; int num_entries; int i; int hdisplay, hsyncstart, hsyncend, htotal; int vdisplay, vsyncstart, vsyncend, vtotal; float clock; int lfp_data_size, dvo_offset; if (!ptrs) { printf("No LVDS ptr block\n"); return; } lfp_data_size = ptrs->ptr[1].fp_timing_offset - ptrs->ptr[0].fp_timing_offset; dvo_offset = ptrs->ptr[0].dvo_timing_offset - ptrs->ptr[0].fp_timing_offset; num_entries = block->size / lfp_data_size; printf(" Number of entries: %d (preferred block marked with '*')\n", num_entries); for (i = 0; i < num_entries; i++) { const uint8_t *lfp_data_ptr = (const uint8_t *) lvds_data->data + lfp_data_size * i; const uint8_t *timing_data = lfp_data_ptr + dvo_offset; const struct bdb_lvds_lfp_data_entry *lfp_data = (const struct bdb_lvds_lfp_data_entry *)lfp_data_ptr; char marker; if (i == panel_type) marker = '*'; else marker = ' '; hdisplay = _H_ACTIVE(timing_data); hsyncstart = hdisplay + _H_SYNC_OFF(timing_data); hsyncend = hsyncstart + _H_SYNC_WIDTH(timing_data); htotal = hdisplay + _H_BLANK(timing_data); vdisplay = _V_ACTIVE(timing_data); vsyncstart = vdisplay + _V_SYNC_OFF(timing_data); vsyncend = vsyncstart + _V_SYNC_WIDTH(timing_data); vtotal = vdisplay + _V_BLANK(timing_data); clock = _PIXEL_CLOCK(timing_data) / 1000; printf("%c\tpanel type %02i: %dx%d clock %d\n", marker, i, lfp_data->fp_timing.x_res, lfp_data->fp_timing.y_res, _PIXEL_CLOCK(timing_data)); printf("\t\tinfo:\n"); printf("\t\t LVDS: 0x%08lx\n", (unsigned long)lfp_data->fp_timing.lvds_reg_val); printf("\t\t PP_ON_DELAYS: 0x%08lx\n", (unsigned long)lfp_data->fp_timing.pp_on_reg_val); printf("\t\t PP_OFF_DELAYS: 0x%08lx\n", (unsigned long)lfp_data->fp_timing.pp_off_reg_val); printf("\t\t PP_DIVISOR: 0x%08lx\n", (unsigned long)lfp_data->fp_timing.pp_cycle_reg_val); printf("\t\t PFIT: 0x%08lx\n", (unsigned long)lfp_data->fp_timing.pfit_reg_val); printf("\t\ttimings: %d %d %d %d %d %d %d %d %.2f (%s)\n", hdisplay, hsyncstart, hsyncend, htotal, vdisplay, vsyncstart, vsyncend, vtotal, clock, (hsyncend > htotal || vsyncend > vtotal) ? "BAD!" : "good"); } } static void dump_driver_feature(const struct bdb_header *bdb, const struct bdb_block *block) { const struct bdb_driver_feature *feature = block->data; printf("\tBoot Device Algorithm: %s\n", feature->boot_dev_algorithm ? "driver default" : "os default"); printf("\tBlock display switching when DVD active: %s\n", YESNO(feature->block_display_switch)); printf("\tAllow display switching when in Full Screen DOS: %s\n", YESNO(feature->allow_display_switch)); printf("\tHot Plug DVO: %s\n", YESNO(feature->hotplug_dvo)); printf("\tDual View Zoom: %s\n", YESNO(feature->dual_view_zoom)); printf("\tDriver INT 15h hook: %s\n", YESNO(feature->int15h_hook)); printf("\tEnable Sprite in Clone Mode: %s\n", YESNO(feature->sprite_in_clone)); printf("\tUse 00000110h ID for Primary LFP: %s\n", YESNO(feature->primary_lfp_id)); printf("\tBoot Mode X: %u\n", feature->boot_mode_x); printf("\tBoot Mode Y: %u\n", feature->boot_mode_y); printf("\tBoot Mode Bpp: %u\n", feature->boot_mode_bpp); printf("\tBoot Mode Refresh: %u\n", feature->boot_mode_refresh); printf("\tEnable LFP as primary: %s\n", YESNO(feature->enable_lfp_primary)); printf("\tSelective Mode Pruning: %s\n", YESNO(feature->selective_mode_pruning)); printf("\tDual-Frequency Graphics Technology: %s\n", YESNO(feature->dual_frequency)); printf("\tDefault Render Clock Frequency: %s\n", feature->render_clock_freq ? "low" : "high"); printf("\tNT 4.0 Dual Display Clone Support: %s\n", YESNO(feature->nt_clone_support)); printf("\tDefault Power Scheme user interface: %s\n", feature->power_scheme_ui ? "3rd party" : "CUI"); printf ("\tSprite Display Assignment when Overlay is Active in Clone Mode: %s\n", feature->sprite_display_assign ? "primary" : "secondary"); printf("\tDisplay Maintain Aspect Scaling via CUI: %s\n", YESNO(feature->cui_aspect_scaling)); printf("\tPreserve Aspect Ratio: %s\n", YESNO(feature->preserve_aspect_ratio)); printf("\tEnable SDVO device power down: %s\n", YESNO(feature->sdvo_device_power_down)); printf("\tCRT hotplug: %s\n", YESNO(feature->crt_hotplug)); printf("\tLVDS config: "); switch (feature->lvds_config) { case BDB_DRIVER_NO_LVDS: printf("No LVDS\n"); break; case BDB_DRIVER_INT_LVDS: printf("Integrated LVDS\n"); break; case BDB_DRIVER_SDVO_LVDS: printf("SDVO LVDS\n"); break; case BDB_DRIVER_EDP: printf("Embedded DisplayPort\n"); break; } printf("\tDefine Display statically: %s\n", YESNO(feature->static_display)); printf("\tLegacy CRT max X: %d\n", feature->legacy_crt_max_x); printf("\tLegacy CRT max Y: %d\n", feature->legacy_crt_max_y); printf("\tLegacy CRT max refresh: %d\n", feature->legacy_crt_max_refresh); } static void dump_edp(const struct bdb_header *bdb, const struct bdb_block *block) { const struct bdb_edp *edp = block->data; int bpp, msa; int i; for (i = 0; i < 16; i++) { printf("\tPanel %d%s\n", i, panel_type == i ? " *" : ""); printf("\t\tPower Sequence: T3 %d T7 %d T9 %d T10 %d T12 %d\n", edp->power_seqs[i].t3, edp->power_seqs[i].t7, edp->power_seqs[i].t9, edp->power_seqs[i].t10, edp->power_seqs[i].t12); bpp = (edp->color_depth >> (i * 2)) & 3; printf("\t\tPanel color depth: "); switch (bpp) { case EDP_18BPP: printf("18 bpp\n"); break; case EDP_24BPP: printf("24 bpp\n"); break; case EDP_30BPP: printf("30 bpp\n"); break; default: printf("(unknown value %d)\n", bpp); break; } msa = (edp->sdrrs_msa_timing_delay >> (i * 2)) & 3; printf("\t\teDP sDRRS MSA Delay: Lane %d\n", msa + 1); printf("\t\tLink params:\n"); printf("\t\t\trate: "); if (edp->link_params[i].rate == EDP_RATE_1_62) printf("1.62G\n"); else if (edp->link_params[i].rate == EDP_RATE_2_7) printf("2.7G\n"); printf("\t\t\tlanes: "); switch (edp->link_params[i].lanes) { case EDP_LANE_1: printf("x1 mode\n"); break; case EDP_LANE_2: printf("x2 mode\n"); break; case EDP_LANE_4: printf("x4 mode\n"); break; default: printf("(unknown value %d)\n", edp->link_params[i].lanes); break; } printf("\t\t\tpre-emphasis: "); switch (edp->link_params[i].preemphasis) { case EDP_PREEMPHASIS_NONE: printf("none\n"); break; case EDP_PREEMPHASIS_3_5dB: printf("3.5dB\n"); break; case EDP_PREEMPHASIS_6dB: printf("6dB\n"); break; case EDP_PREEMPHASIS_9_5dB: printf("9.5dB\n"); break; default: printf("(unknown value %d)\n", edp->link_params[i].preemphasis); break; } printf("\t\t\tvswing: "); switch (edp->link_params[i].vswing) { case EDP_VSWING_0_4V: printf("0.4V\n"); break; case EDP_VSWING_0_6V: printf("0.6V\n"); break; case EDP_VSWING_0_8V: printf("0.8V\n"); break; case EDP_VSWING_1_2V: printf("1.2V\n"); break; default: printf("(unknown value %d)\n", edp->link_params[i].vswing); break; } } } static void print_detail_timing_data(const struct lvds_dvo_timing2 *dvo_timing) { int display, sync_start, sync_end, total; display = (dvo_timing->hactive_hi << 8) | dvo_timing->hactive_lo; sync_start = display + ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo); sync_end = sync_start + dvo_timing->hsync_pulse_width; total = display + ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo); printf("\thdisplay: %d\n", display); printf("\thsync [%d, %d] %s\n", sync_start, sync_end, dvo_timing->hsync_positive ? "+sync" : "-sync"); printf("\thtotal: %d\n", total); display = (dvo_timing->vactive_hi << 8) | dvo_timing->vactive_lo; sync_start = display + dvo_timing->vsync_off; sync_end = sync_start + dvo_timing->vsync_pulse_width; total = display + ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo); printf("\tvdisplay: %d\n", display); printf("\tvsync [%d, %d] %s\n", sync_start, sync_end, dvo_timing->vsync_positive ? "+sync" : "-sync"); printf("\tvtotal: %d\n", total); printf("\tclock: %d\n", dvo_timing->clock * 10); } static void dump_sdvo_panel_dtds(const struct bdb_header *bdb, const struct bdb_block *block) { const struct lvds_dvo_timing2 *dvo_timing = block->data; int n, count; count = block->size / sizeof(struct lvds_dvo_timing2); for (n = 0; n < count; n++) { printf("%d:\n", n); print_detail_timing_data(dvo_timing++); } } static void dump_sdvo_lvds_options(const struct bdb_header *bdb, const struct bdb_block *block) { const struct bdb_sdvo_lvds_options *options = block->data; printf("\tbacklight: %d\n", options->panel_backlight); printf("\th40 type: %d\n", options->h40_set_panel_type); printf("\ttype: %d\n", options->panel_type); printf("\tssc_clk_freq: %d\n", options->ssc_clk_freq); printf("\tals_low_trip: %d\n", options->als_low_trip); printf("\tals_high_trip: %d\n", options->als_high_trip); /* u8 sclalarcoeff_tab_row_num; u8 sclalarcoeff_tab_row_size; u8 coefficient[8]; */ printf("\tmisc[0]: %x\n", options->panel_misc_bits_1); printf("\tmisc[1]: %x\n", options->panel_misc_bits_2); printf("\tmisc[2]: %x\n", options->panel_misc_bits_3); printf("\tmisc[3]: %x\n", options->panel_misc_bits_4); } static void dump_mipi_config(const struct bdb_header *bdb, const struct bdb_block *block) { const struct bdb_mipi_config *start = block->data; const struct mipi_config *config; const struct mipi_pps_data *pps; config = &start->config[panel_type]; pps = &start->pps[panel_type]; printf("\tGeneral Param\n"); printf("\t\t BTA disable: %s\n", config->bta ? "Disabled" : "Enabled"); printf("\t\t Video Mode Color Format: "); if (config->videomode_color_format == 0) printf("Not supported\n"); else if (config->videomode_color_format == 1) printf("RGB565\n"); else if (config->videomode_color_format == 2) printf("RGB666\n"); else if (config->videomode_color_format == 3) printf("RGB666 Loosely Packed\n"); else if (config->videomode_color_format == 4) printf("RGB888\n"); printf("\t\t PPS GPIO Pins: %s \n", config->pwm_blc ? "Using SOC" : "Using PMIC"); printf("\t\t CABC Support: %s\n", config->cabc ? "supported" : "not supported"); //insert video mode type printf("\t\t Mode: %s\n", config->cmd_mode ? "COMMAND" : "VIDEO"); printf("\t\t Dithering: %s\n", config->dithering ? "done in Display Controller" : "done in Panel Controller"); printf("\tPort Desc\n"); //insert pixel overlap count printf("\t\t Lane Count: %d\n", config->lane_cnt + 1); printf("\t\t Dual Link Support: "); if (config->dual_link == 0) printf("not supported\n"); else if (config->dual_link == 1) printf("Front Back mode\n"); else printf("Pixel Alternative Mode\n"); printf("\tDphy Flags\n"); printf("\t\t Clock Stop: %s\n", config->clk_stop ? "ENABLED" : "DISABLED"); printf("\t\t EOT disabled: %s\n\n", config->eot_disabled ? "EOT not to be sent" : "EOT to be sent"); printf("\tHSTxTimeOut: 0x%x\n", config->hs_tx_timeout); printf("\tLPRXTimeOut: 0x%x\n", config->lp_rx_timeout); printf("\tTurnAroundTimeOut: 0x%x\n", config->turn_around_timeout); printf("\tDeviceResetTimer: 0x%x\n", config->device_reset_timer); printf("\tMasterinitTimer: 0x%x\n", config->master_init_timer); printf("\tDBIBandwidthTimer: 0x%x\n", config->dbi_bw_timer); printf("\tLpByteClkValue: 0x%x\n\n", config->lp_byte_clk_val); printf("\tDphy Params\n"); printf("\t\tExit to zero Count: 0x%x\n", config->exit_zero_cnt); printf("\t\tTrail Count: 0x%X\n", config->trail_cnt); printf("\t\tClk zero count: 0x%x\n", config->clk_zero_cnt); printf("\t\tPrepare count:0x%x\n\n", config->prepare_cnt); printf("\tClockLaneSwitchingCount: 0x%x\n", config->clk_lane_switch_cnt); printf("\tHighToLowSwitchingCount: 0x%x\n\n", config->hl_switch_cnt); printf("\tTimings based on Dphy spec\n"); printf("\t\tTClkMiss: 0x%x\n", config->tclk_miss); printf("\t\tTClkPost: 0x%x\n", config->tclk_post); printf("\t\tTClkPre: 0x%x\n", config->tclk_pre); printf("\t\tTClkPrepare: 0x%x\n", config->tclk_prepare); printf("\t\tTClkSettle: 0x%x\n", config->tclk_settle); printf("\t\tTClkTermEnable: 0x%x\n\n", config->tclk_term_enable); printf("\tTClkTrail: 0x%x\n", config->tclk_trail); printf("\tTClkPrepareTClkZero: 0x%x\n", config->tclk_prepare_clkzero); printf("\tTHSExit: 0x%x\n", config->ths_exit); printf("\tTHsPrepare: 0x%x\n", config->ths_prepare); printf("\tTHsPrepareTHsZero: 0x%x\n", config->ths_prepare_hszero); printf("\tTHSSettle: 0x%x\n", config->ths_settle); printf("\tTHSSkip: 0x%x\n", config->ths_skip); printf("\tTHsTrail: 0x%x\n", config->ths_trail); printf("\tTInit: 0x%x\n", config->tinit); printf("\tTLPX: 0x%x\n", config->tlpx); printf("\tMIPI PPS\n"); printf("\t\tPanel power ON delay: %d\n", pps->panel_on_delay); printf("\t\tPanel power on to Backlight enable delay: %d\n", pps->bl_enable_delay); printf("\t\tBacklight disable to Panel power OFF delay: %d\n", pps->bl_disable_delay); printf("\t\tPanel power OFF delay: %d\n", pps->panel_off_delay); printf("\t\tPanel power cycle delay: %d\n", pps->panel_power_cycle_delay); } static const uint8_t *mipi_dump_send_packet(const uint8_t *data) { uint8_t flags, type; uint16_t len, i; flags = *data++; type = *data++; len = *((uint16_t *) data); data += 2; printf("\t\tSend DCS: Port %s, VC %d, %s, Type %02x, Length %u, Data", (flags >> 3) & 1 ? "C" : "A", (flags >> 1) & 3, flags & 1 ? "HS" : "LP", type, len); for (i = 0; i < len; i++) printf(" %02x", *data++); printf("\n"); return data; } static const uint8_t *mipi_dump_delay(const uint8_t *data) { printf("\t\tDelay: %u us\n", *((const uint32_t *)data)); return data + 4; } static const uint8_t *mipi_dump_gpio(const uint8_t *data) { uint8_t index, flags; index = *data++; flags = *data++; printf("\t\tGPIO index %u, source %d, set %d\n", index, (flags >> 1) & 3, flags & 1); return data; } static const uint8_t *mipi_dump_i2c(const uint8_t *data) { uint8_t flags, index, bus, offset, len, i; uint16_t address; flags = *data++; index = *data++; bus = *data++; address = *((uint16_t *) data); data += 2; offset = *data++; len = *data++; printf("\t\tSend I2C: Flags %02x, Index %02x, Bus %02x, Address %04x, Offset %02x, Length %u, Data", flags, index, bus, address, offset, len); for (i = 0; i < len; i++) printf(" %02x", *data++); printf("\n"); return data; } typedef const uint8_t * (*fn_mipi_elem_dump)(const uint8_t *data); static const fn_mipi_elem_dump dump_elem[] = { [MIPI_SEQ_ELEM_SEND_PKT] = mipi_dump_send_packet, [MIPI_SEQ_ELEM_DELAY] = mipi_dump_delay, [MIPI_SEQ_ELEM_GPIO] = mipi_dump_gpio, [MIPI_SEQ_ELEM_I2C] = mipi_dump_i2c, }; static const char * const seq_name[] = { [MIPI_SEQ_ASSERT_RESET] = "MIPI_SEQ_ASSERT_RESET", [MIPI_SEQ_INIT_OTP] = "MIPI_SEQ_INIT_OTP", [MIPI_SEQ_DISPLAY_ON] = "MIPI_SEQ_DISPLAY_ON", [MIPI_SEQ_DISPLAY_OFF] = "MIPI_SEQ_DISPLAY_OFF", [MIPI_SEQ_DEASSERT_RESET] = "MIPI_SEQ_DEASSERT_RESET", [MIPI_SEQ_BACKLIGHT_ON] = "MIPI_SEQ_BACKLIGHT_ON", [MIPI_SEQ_BACKLIGHT_OFF] = "MIPI_SEQ_BACKLIGHT_OFF", [MIPI_SEQ_TEAR_ON] = "MIPI_SEQ_TEAR_ON", [MIPI_SEQ_TEAR_OFF] = "MIPI_SEQ_TEAR_OFF", [MIPI_SEQ_POWER_ON] = "MIPI_SEQ_POWER_ON", [MIPI_SEQ_POWER_OFF] = "MIPI_SEQ_POWER_OFF", }; static const char *sequence_name(enum mipi_seq seq_id) { if (seq_id < ARRAY_SIZE(seq_name) && seq_name[seq_id]) return seq_name[seq_id]; else return "(unknown)"; } static const uint8_t *dump_sequence(const uint8_t *data, uint8_t seq_version) { fn_mipi_elem_dump mipi_elem_dump; printf("\tSequence %u - %s\n", *data, sequence_name(*data)); /* Skip Sequence Byte. */ data++; /* Skip Size of Sequence. */ if (seq_version >= 3) data += 4; while (1) { uint8_t operation_byte = *data++; uint8_t operation_size = 0; if (operation_byte == MIPI_SEQ_ELEM_END) break; if (operation_byte < ARRAY_SIZE(dump_elem)) mipi_elem_dump = dump_elem[operation_byte]; else mipi_elem_dump = NULL; /* Size of Operation. */ if (seq_version >= 3) operation_size = *data++; if (mipi_elem_dump) { data = mipi_elem_dump(data); } else if (operation_size) { /* We have size, skip. */ data += operation_size; } else { /* No size, can't skip without parsing. */ printf("Error: Unsupported MIPI element %u\n", operation_byte); return NULL; } } return data; } /* Find the sequence block and size for the given panel. */ static const uint8_t * find_panel_sequence_block(const struct bdb_mipi_sequence *sequence, uint16_t panel_id, uint32_t total, uint32_t *seq_size) { const uint8_t *data = &sequence->data[0]; uint8_t current_id; uint32_t current_size; int header_size = sequence->version >= 3 ? 5 : 3; int index = 0; int i; /* skip new block size */ if (sequence->version >= 3) data += 4; for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) { if (index + header_size > total) { fprintf(stderr, "Invalid sequence block (header)\n"); return NULL; } current_id = *(data + index); if (sequence->version >= 3) current_size = *((const uint32_t *)(data + index + 1)); else current_size = *((const uint16_t *)(data + index + 1)); index += header_size; if (index + current_size > total) { fprintf(stderr, "Invalid sequence block\n"); return NULL; } if (current_id == panel_id) { *seq_size = current_size; return data + index; } index += current_size; } fprintf(stderr, "Sequence block detected but no valid configuration\n"); return NULL; } static int goto_next_sequence(const uint8_t *data, int index, int total) { uint16_t len; /* Skip Sequence Byte. */ for (index = index + 1; index < total; index += len) { uint8_t operation_byte = *(data + index); index++; switch (operation_byte) { case MIPI_SEQ_ELEM_END: return index; case MIPI_SEQ_ELEM_SEND_PKT: if (index + 4 > total) return 0; len = *((const uint16_t *)(data + index + 2)) + 4; break; case MIPI_SEQ_ELEM_DELAY: len = 4; break; case MIPI_SEQ_ELEM_GPIO: len = 2; break; case MIPI_SEQ_ELEM_I2C: if (index + 7 > total) return 0; len = *(data + index + 6) + 7; break; default: fprintf(stderr, "Unknown operation byte\n"); return 0; } } return 0; } static int goto_next_sequence_v3(const uint8_t *data, int index, int total) { int seq_end; uint16_t len; uint32_t size_of_sequence; /* * Could skip sequence based on Size of Sequence alone, but also do some * checking on the structure. */ if (total < 5) { fprintf(stderr, "Too small sequence size\n"); return 0; } /* Skip Sequence Byte. */ index++; /* * Size of Sequence. Excludes the Sequence Byte and the size itself, * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END * byte. */ size_of_sequence = *((const uint32_t *)(data + index)); index += 4; seq_end = index + size_of_sequence; if (seq_end > total) { fprintf(stderr, "Invalid sequence size\n"); return 0; } for (; index < total; index += len) { uint8_t operation_byte = *(data + index); index++; if (operation_byte == MIPI_SEQ_ELEM_END) { if (index != seq_end) { fprintf(stderr, "Invalid element structure\n"); return 0; } return index; } len = *(data + index); index++; /* * FIXME: Would be nice to check elements like for v1/v2 in * goto_next_sequence() above. */ switch (operation_byte) { case MIPI_SEQ_ELEM_SEND_PKT: case MIPI_SEQ_ELEM_DELAY: case MIPI_SEQ_ELEM_GPIO: case MIPI_SEQ_ELEM_I2C: case MIPI_SEQ_ELEM_SPI: case MIPI_SEQ_ELEM_PMIC: break; default: fprintf(stderr, "Unknown operation byte %u\n", operation_byte); break; } } return 0; } static void dump_mipi_sequence(const struct bdb_header *bdb, const struct bdb_block *block) { const struct bdb_mipi_sequence *sequence = block->data; const uint8_t *data; uint32_t seq_size; int index = 0, i; const uint8_t *sequence_ptrs[MIPI_SEQ_MAX] = {}; /* Check if we have sequence block as well */ if (!sequence) { printf("No MIPI Sequence found\n"); return; } printf("\tSequence block version v%u\n", sequence->version); /* Fail gracefully for forward incompatible sequence block. */ if (sequence->version >= 4) { fprintf(stderr, "Unable to parse MIPI Sequence Block v%u\n", sequence->version); return; } data = find_panel_sequence_block(sequence, panel_type, block->size, &seq_size); if (!data) return; /* Parse the sequences. Corresponds to VBT parsing in the kernel. */ for (;;) { uint8_t seq_id = *(data + index); if (seq_id == MIPI_SEQ_END) break; if (seq_id >= MIPI_SEQ_MAX) { fprintf(stderr, "Unknown sequence %u\n", seq_id); return; } sequence_ptrs[seq_id] = data + index; if (sequence->version >= 3) index = goto_next_sequence_v3(data, index, seq_size); else index = goto_next_sequence(data, index, seq_size); if (!index) { fprintf(stderr, "Invalid sequence %u\n", seq_id); return; } } /* Dump the sequences. Corresponds to sequence execution in kernel. */ for (i = 0; i < ARRAY_SIZE(sequence_ptrs); i++) if (sequence_ptrs[i]) dump_sequence(sequence_ptrs[i], sequence->version); } static int get_device_id(unsigned char *bios, int size) { int device; int offset = (bios[0x19] << 8) + bios[0x18]; if (offset + 7 >= size) return -1; if (bios[offset] != 'P' || bios[offset+1] != 'C' || bios[offset+2] != 'I' || bios[offset+3] != 'R') return -1; device = (bios[offset+7] << 8) + bios[offset+6]; return device; } struct dumper { uint8_t id; const char *name; void (*dump)(const struct bdb_header *bdb, const struct bdb_block *block); }; struct dumper dumpers[] = { { .id = BDB_GENERAL_FEATURES, .name = "General features block", .dump = dump_general_features, }, { .id = BDB_GENERAL_DEFINITIONS, .name = "General definitions block", .dump = dump_general_definitions, }, { .id = BDB_CHILD_DEVICE_TABLE, .name = "Child devices block", .dump = dump_child_devices, }, { .id = BDB_LVDS_OPTIONS, .name = "LVDS options block", .dump = dump_lvds_options, }, { .id = BDB_LVDS_LFP_DATA_PTRS, .name = "LVDS timing pointer data", .dump = dump_lvds_ptr_data, }, { .id = BDB_LVDS_LFP_DATA, .name = "LVDS panel data block", .dump = dump_lvds_data, }, { .id = BDB_LVDS_BACKLIGHT, .name = "Backlight info block", .dump = dump_backlight_info, }, { .id = BDB_SDVO_LVDS_OPTIONS, .name = "SDVO LVDS options block", .dump = dump_sdvo_lvds_options, }, { .id = BDB_SDVO_PANEL_DTDS, .name = "SDVO panel dtds", .dump = dump_sdvo_panel_dtds, }, { .id = BDB_DRIVER_FEATURES, .name = "Driver feature data block", .dump = dump_driver_feature, }, { .id = BDB_EDP, .name = "eDP block", .dump = dump_edp, }, { .id = BDB_MIPI_CONFIG, .name = "MIPI configuration block", .dump = dump_mipi_config, }, { .id = BDB_MIPI_SEQUENCE, .name = "MIPI sequence block", .dump = dump_mipi_sequence, }, }; static void hex_dump(const struct bdb_block *block) { int i; const uint8_t *p = block->data; for (i = 0; i < block->size; i++) { if (i % 16 == 0) printf("\t%04x: ", i); printf("%02x", p[i]); if (i % 16 == 15) { if (i + 1 < block->size) printf("\n"); } else if (i % 8 == 7) { printf(" "); } else { printf(" "); } } printf("\n\n"); } static void dump_section(const struct bdb_header *bdb, int section_id, int size) { struct dumper *dumper = NULL; const struct bdb_block *block; static int done[256]; int i; if (done[section_id]) return; done[section_id] = 1; block = find_section(bdb, section_id, size); if (!block) return; for (i = 0; i < ARRAY_SIZE(dumpers); i++) { if (block->id == dumpers[i].id) { dumper = &dumpers[i]; break; } } if (dumper && dumper->name) printf("BDB block %d - %s:\n", block->id, dumper->name); else printf("BDB block %d:\n", block->id); hex_dump(block); if (dumper && dumper->dump) dumper->dump(bdb, block); printf("\n"); } int main(int argc, char **argv) { int fd; struct vbt_header *vbt = NULL; int vbt_off, bdb_off, i; const char *filename = "bios"; struct stat finfo; int size; struct bdb_block *block; struct bdb_header *bdb; char signature[17]; char *devid_string; if (argc != 2) { printf("usage: %s \n", argv[0]); return 1; } if ((devid_string = getenv("DEVICE"))) devid = strtoul(devid_string, NULL, 0); filename = argv[1]; fd = open(filename, O_RDONLY); if (fd == -1) { printf("Couldn't open \"%s\": %s\n", filename, strerror(errno)); return 1; } if (stat(filename, &finfo)) { printf("failed to stat \"%s\": %s\n", filename, strerror(errno)); return 1; } size = finfo.st_size; if (size == 0) { int len = 0, ret; size = 8192; VBIOS = malloc (size); while ((ret = read(fd, VBIOS + len, size - len))) { if (ret < 0) { printf("failed to read \"%s\": %s\n", filename, strerror(errno)); return 1; } len += ret; if (len == size) { size *= 2; VBIOS = realloc(VBIOS, size); } } } else { VBIOS = mmap(NULL, size, PROT_READ, MAP_SHARED, fd, 0); if (VBIOS == MAP_FAILED) { printf("failed to map \"%s\": %s\n", filename, strerror(errno)); return 1; } } /* Scour memory looking for the VBT signature */ for (i = 0; i + 4 < size; i++) { if (!memcmp(VBIOS + i, "$VBT", 4)) { vbt_off = i; vbt = (struct vbt_header *)(VBIOS + i); break; } } if (!vbt) { printf("VBT signature missing\n"); return 1; } printf("VBT vers: %d.%d\n", vbt->version / 100, vbt->version % 100); bdb_off = vbt_off + vbt->bdb_offset; if (bdb_off >= size - sizeof(struct bdb_header)) { printf("Invalid VBT found, BDB points beyond end of data block\n"); return 1; } bdb = (struct bdb_header *)(VBIOS + bdb_off); strncpy(signature, (char *)bdb->signature, 16); signature[16] = 0; printf("BDB sig: %s\n", signature); printf("BDB vers: %d\n", bdb->version); printf("Available sections: "); for (i = 0; i < 256; i++) { block = find_section(bdb, i, size); if (!block) continue; printf("%d ", i); free(block); } printf("\n"); if (devid == -1) devid = get_device_id(VBIOS, size); if (devid == -1) printf("Warning: could not find PCI device ID!\n"); dump_section(bdb, BDB_GENERAL_FEATURES, size); dump_section(bdb, BDB_GENERAL_DEFINITIONS, size); dump_section(bdb, BDB_CHILD_DEVICE_TABLE, size); dump_section(bdb, BDB_LVDS_OPTIONS, size); dump_section(bdb, BDB_LVDS_LFP_DATA_PTRS, size); dump_section(bdb, BDB_LVDS_LFP_DATA, size); dump_section(bdb, BDB_LVDS_BACKLIGHT, size); dump_section(bdb, BDB_SDVO_LVDS_OPTIONS, size); dump_section(bdb, BDB_SDVO_PANEL_DTDS, size); dump_section(bdb, BDB_DRIVER_FEATURES, size); dump_section(bdb, BDB_EDP, size); dump_section(bdb, BDB_MIPI_CONFIG, size); dump_section(bdb, BDB_MIPI_SEQUENCE, size); for (i = 0; i < 256; i++) dump_section(bdb, i, size); return 0; } intel-gpu-tools-1.14/tools/intel_display_poller.c0000644000175000017500000006757412665336131017174 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. * */ #include #include #include #include #include #include #include #include #include #include #include "intel_chipset.h" #include "intel_io.h" #include "igt_debugfs.h" #include "drmtest.h" #include "igt_aux.h" enum test { TEST_INVALID, TEST_PIPESTAT, TEST_IIR, TEST_IIR_GEN2, TEST_IIR_GEN3, TEST_DEIIR, TEST_FRAMECOUNT, TEST_FRAMECOUNT_GEN3, TEST_FRAMECOUNT_G4X, TEST_FLIPCOUNT, TEST_PAN, TEST_FLIP, TEST_SURFLIVE, TEST_WRAP, TEST_FIELD, }; static uint32_t vlv_offset; static uint16_t pipe_offset[3] = { 0, 0x1000, 0x2000, }; #define PIPE_REG(pipe, reg_a) (pipe_offset[(pipe)] + (reg_a)) static volatile bool quit; static void sighandler(int x) { quit = true; } static uint16_t read_reg_16(uint32_t reg) { return INREG16(vlv_offset + reg); } static uint32_t read_reg(uint32_t reg) { return INREG(vlv_offset + reg); } static void write_reg_16(uint32_t reg, uint16_t val) { OUTREG16(vlv_offset + reg, val); } static void write_reg(uint32_t reg, uint32_t val) { OUTREG(vlv_offset + reg, val); } static char pipe_name(int pipe) { return pipe + 'A'; } static int pipe_to_plane(uint32_t devid, int pipe) { if (!IS_GEN2(devid) && !IS_GEN3(devid)) return pipe; switch (pipe) { case 0: if ((read_reg(DSPACNTR) & DISPPLANE_SEL_PIPE_MASK) == DISPPLANE_SEL_PIPE_A) return 0; if ((read_reg(DSPBCNTR) & DISPPLANE_SEL_PIPE_MASK) == DISPPLANE_SEL_PIPE_A) return 1; fprintf(stderr, "no plane assigned to pipe %c, assuming %c\n", pipe_name(pipe), pipe_name(pipe)); return pipe; case 1: if ((read_reg(DSPACNTR) & DISPPLANE_SEL_PIPE_MASK) == DISPPLANE_SEL_PIPE_B) return 0; if ((read_reg(DSPBCNTR) & DISPPLANE_SEL_PIPE_MASK) == DISPPLANE_SEL_PIPE_B) return 1; fprintf(stderr, "no plane assigned to pipe %c, assuming %c\n", pipe_name(pipe), pipe_name(pipe)); return pipe; } assert(0); return 0; } static uint32_t dspoffset_reg(uint32_t devid, int pipe) { bool use_tileoff; int plane = pipe_to_plane(devid, pipe); if (IS_GEN2(devid) || IS_GEN3(devid)) use_tileoff = false; else if (IS_HASWELL(devid) || IS_BROADWELL(devid)) use_tileoff = true; else use_tileoff = read_reg(PIPE_REG(plane, DSPACNTR)) & DISPLAY_PLANE_TILED; if (use_tileoff) return PIPE_REG(plane, DSPATILEOFF); else return PIPE_REG(plane, DSPABASE); } static uint32_t dspsurf_reg(uint32_t devid, int pipe) { int plane = pipe_to_plane(devid, pipe); if (IS_GEN2(devid) || IS_GEN3(devid)) return PIPE_REG(plane, DSPABASE); else return PIPE_REG(plane, DSPASURF); } static void poll_pixel_pipestat(int pipe, int bit, uint32_t *min, uint32_t *max, const int count) { uint32_t pix, pix1, pix2, iir, iir1, iir2, iir_bit, iir_mask; int i = 0; pix = PIPE_REG(pipe, PIPEAFRAMEPIXEL); iir_bit = 1 << bit; iir = PIPE_REG(pipe, PIPEASTAT); iir_mask = read_reg(iir) & 0x7fff0000; write_reg(iir, iir_mask | iir_bit); while (!quit) { pix1 = read_reg(pix); iir1 = read_reg(iir); iir2 = read_reg(iir); pix2 = read_reg(pix); if (!(iir2 & iir_bit)) continue; if (iir1 & iir_bit) { write_reg(iir, iir_mask | iir_bit); continue; } pix1 &= PIPE_PIXEL_MASK; pix2 &= PIPE_PIXEL_MASK; min[i] = pix1; max[i] = pix2; if (++i >= count) break; } } static void poll_pixel_iir_gen3(int pipe, int bit, uint32_t *min, uint32_t *max, const int count) { uint32_t pix, pix1, pix2, iir1, iir2, imr_save, ier_save; int i = 0; bit = 1 << bit; pix = PIPE_REG(pipe, PIPEAFRAMEPIXEL); imr_save = read_reg(IMR); ier_save = read_reg(IER); write_reg(IER, ier_save & ~bit); write_reg(IMR, imr_save & ~bit); write_reg(IIR, bit); while (!quit) { pix1 = read_reg(pix); iir1 = read_reg(IIR); iir2 = read_reg(IIR); pix2 = read_reg(pix); if (!(iir2 & bit)) continue; write_reg(IIR, bit); if (iir1 & bit) continue; pix1 &= PIPE_PIXEL_MASK; pix2 &= PIPE_PIXEL_MASK; min[i] = pix1; max[i] = pix2; if (++i >= count) break; } write_reg(IMR, imr_save); write_reg(IER, ier_save); } static void poll_pixel_framecount_gen3(int pipe, uint32_t *min, uint32_t *max, const int count) { uint32_t pix, pix1, pix2, frm1, frm2; int i = 0; pix = PIPE_REG(pipe, PIPEAFRAMEPIXEL); while (!quit) { pix1 = read_reg(pix); pix2 = read_reg(pix); frm1 = pix1 >> 24; frm2 = pix2 >> 24; if (frm1 + 1 != frm2) continue; pix1 &= PIPE_PIXEL_MASK; pix2 &= PIPE_PIXEL_MASK; min[i] = pix1; max[i] = pix2; if (++i >= count) break; } } static void poll_pixel_pan(uint32_t devid, int pipe, int target_pixel, int target_fuzz, uint32_t *min, uint32_t *max, const int count) { uint32_t pix, pix1 = 0, pix2 = 0; uint32_t saved, surf = 0; int i = 0; pix = PIPE_REG(pipe, PIPEAFRAMEPIXEL); surf = dspoffset_reg(devid, pipe); saved = read_reg(surf); while (!quit) { while (!quit){ pix1 = read_reg(pix) & PIPE_PIXEL_MASK; if (pix1 == target_pixel) break; } write_reg(surf, saved+256); while (!quit){ pix2 = read_reg(pix) & PIPE_PIXEL_MASK; if (pix2 >= target_pixel + target_fuzz) break; } write_reg(surf, saved); min[i] = pix1; max[i] = pix2; if (++i >= count) break; } write_reg(surf, saved); } static void poll_pixel_flip(uint32_t devid, int pipe, int target_pixel, int target_fuzz, uint32_t *min, uint32_t *max, const int count) { uint32_t pix, pix1 = 0, pix2 = 0; uint32_t saved, surf = 0; int i = 0; pix = PIPE_REG(pipe, PIPEAFRAMEPIXEL); surf = dspsurf_reg(devid, pipe); saved = read_reg(surf); while (!quit) { while (!quit){ pix1 = read_reg(pix) & PIPE_PIXEL_MASK; if (pix1 == target_pixel) break; } write_reg(surf, saved+128*1024); while (!quit){ pix2 = read_reg(pix) & PIPE_PIXEL_MASK; if (pix2 >= target_pixel + target_fuzz) break; } write_reg(surf, saved); min[i] = pix1; max[i] = pix2; if (++i >= count) break; } write_reg(surf, saved); } static void poll_pixel_wrap(int pipe, uint32_t *min, uint32_t *max, const int count) { uint32_t pix, pix1, pix2; int i = 0; pix = PIPE_REG(pipe, PIPEAFRAMEPIXEL); while (!quit) { pix1 = read_reg(pix); pix2 = read_reg(pix); pix1 &= PIPE_PIXEL_MASK; pix2 &= PIPE_PIXEL_MASK; if (pix2 >= pix1) continue; min[i] = pix1; max[i] = pix2; if (++i >= count) break; } } static void poll_dsl_pipestat(int pipe, int bit, uint32_t *min, uint32_t *max, const int count) { uint32_t dsl, dsl1, dsl2, iir, iir1, iir2, iir_bit, iir_mask; bool field1, field2; int i[2] = {}; iir_bit = 1 << bit; iir = PIPE_REG(pipe, PIPEASTAT); dsl = PIPE_REG(pipe, PIPEA_DSL); iir_mask = read_reg(iir) & 0x7fff0000; write_reg(iir, iir_mask | iir_bit); while (!quit) { dsl1 = read_reg(dsl); iir1 = read_reg(iir); iir2 = read_reg(iir); dsl2 = read_reg(dsl); field1 = dsl1 & 0x80000000; field2 = dsl2 & 0x80000000; dsl1 &= ~0x80000000; dsl2 &= ~0x80000000; if (!(iir2 & iir_bit)) continue; if (iir1 & iir_bit) { write_reg(iir, iir_mask | iir_bit); continue; } if (field1 != field2) printf("fields are different (%u:%u -> %u:%u)\n", field1, dsl1, field2, dsl2); min[field1*count+i[field1]] = dsl1; max[field1*count+i[field1]] = dsl2; if (++i[field1] >= count) break; } } static void poll_dsl_iir_gen2(int pipe, int bit, uint32_t *min, uint32_t *max, const int count) { uint32_t dsl, dsl1, dsl2, iir1, iir2, imr_save, ier_save; bool field1, field2; int i[2] = {}; bit = 1 << bit; dsl = PIPE_REG(pipe, PIPEA_DSL); imr_save = read_reg_16(IMR); ier_save = read_reg_16(IER); write_reg_16(IER, ier_save & ~bit); write_reg_16(IMR, imr_save & ~bit); write_reg_16(IIR, bit); while (!quit) { dsl1 = read_reg(dsl); iir1 = read_reg_16(IIR); iir2 = read_reg_16(IIR); dsl2 = read_reg(dsl); field1 = dsl1 & 0x80000000; field2 = dsl2 & 0x80000000; dsl1 &= ~0x80000000; dsl2 &= ~0x80000000; if (!(iir2 & bit)) continue; write_reg_16(IIR, bit); if (iir1 & bit) continue; if (field1 != field2) printf("fields are different (%u:%u -> %u:%u)\n", field1, dsl1, field2, dsl2); min[field1*count+i[field1]] = dsl1; max[field1*count+i[field1]] = dsl2; if (++i[field1] >= count) break; } write_reg_16(IMR, imr_save); write_reg_16(IER, ier_save); } static void poll_dsl_iir_gen3(int pipe, int bit, uint32_t *min, uint32_t *max, const int count) { uint32_t dsl, dsl1, dsl2, iir1, iir2, imr_save, ier_save; bool field1, field2; int i[2] = {}; bit = 1 << bit; dsl = PIPE_REG(pipe, PIPEA_DSL); imr_save = read_reg(IMR); ier_save = read_reg(IER); write_reg(IER, ier_save & ~bit); write_reg(IMR, imr_save & ~bit); write_reg(IIR, bit); while (!quit) { dsl1 = read_reg(dsl); iir1 = read_reg(IIR); iir2 = read_reg(IIR); dsl2 = read_reg(dsl); field1 = dsl1 & 0x80000000; field2 = dsl2 & 0x80000000; dsl1 &= ~0x80000000; dsl2 &= ~0x80000000; if (!(iir2 & bit)) continue; write_reg(IIR, bit); if (iir1 & bit) continue; if (field1 != field2) printf("fields are different (%u:%u -> %u:%u)\n", field1, dsl1, field2, dsl2); min[field1*count+i[field1]] = dsl1; max[field1*count+i[field1]] = dsl2; if (++i[field1] >= count) break; } write_reg(IMR, imr_save); write_reg(IER, ier_save); } static void poll_dsl_deiir(uint32_t devid, int pipe, int bit, uint32_t *min, uint32_t *max, const int count) { uint32_t dsl, dsl1, dsl2, iir1, iir2, imr_save, ier_save; bool field1, field2; uint32_t iir, ier, imr; int i[2] = {}; bit = 1 << bit; dsl = PIPE_REG(pipe, PIPEA_DSL); if (IS_GEN8(devid)) { iir = GEN8_DE_PIPE_IIR(pipe); ier = GEN8_DE_PIPE_IER(pipe); imr = GEN8_DE_PIPE_IMR(pipe); } else { iir = DEIIR; ier = DEIER; imr = DEIMR; } imr_save = read_reg(imr); ier_save = read_reg(ier); write_reg(ier, ier_save & ~bit); write_reg(imr, imr_save & ~bit); write_reg(iir, bit); while (!quit) { dsl1 = read_reg(dsl); iir1 = read_reg(iir); iir2 = read_reg(iir); dsl2 = read_reg(dsl); field1 = dsl1 & 0x80000000; field2 = dsl2 & 0x80000000; dsl1 &= ~0x80000000; dsl2 &= ~0x80000000; if (!(iir2 & bit)) continue; write_reg(iir, bit); if (iir1 & bit) continue; if (field1 != field2) printf("fields are different (%u:%u -> %u:%u)\n", field1, dsl1, field2, dsl2); min[field1*count+i[field1]] = dsl1; max[field1*count+i[field1]] = dsl2; if (++i[field1] >= count) break; } write_reg(imr, imr_save); write_reg(ier, ier_save); } static void poll_dsl_framecount_g4x(int pipe, uint32_t *min, uint32_t *max, const int count) { uint32_t dsl, dsl1, dsl2, frm, frm1, frm2; bool field1, field2; int i[2] = {}; frm = PIPE_REG(pipe, PIPEAFRMCOUNT_G4X); dsl = PIPE_REG(pipe, PIPEA_DSL); while (!quit) { dsl1 = read_reg(dsl); frm1 = read_reg(frm); frm2 = read_reg(frm); dsl2 = read_reg(dsl); field1 = dsl1 & 0x80000000; field2 = dsl2 & 0x80000000; dsl1 &= ~0x80000000; dsl2 &= ~0x80000000; if (frm1 + 1 != frm2) continue; if (field1 != field2) printf("fields are different (%u:%u -> %u:%u)\n", field1, dsl1, field2, dsl2); min[field1*count+i[field1]] = dsl1; max[field1*count+i[field1]] = dsl2; if (++i[field1] >= count) break; } } static void poll_dsl_flipcount_g4x(uint32_t devid, int pipe, uint32_t *min, uint32_t *max, const int count) { uint32_t dsl, dsl1, dsl2, flp, flp1, flp2, surf; bool field1, field2; int i[2] = {}; flp = PIPE_REG(pipe, PIPEAFLIPCOUNT_G4X); dsl = PIPE_REG(pipe, PIPEA_DSL); surf = dspsurf_reg(devid, pipe); while (!quit) { usleep(10); dsl1 = read_reg(dsl); flp1 = read_reg(flp); dsl2 = read_reg(dsl); field1 = dsl1 & 0x80000000; field2 = dsl2 & 0x80000000; dsl1 &= ~0x80000000; dsl2 &= ~0x80000000; if (field1 != field2) printf("fields are different (%u:%u -> %u:%u)\n", field1, dsl1, field2, dsl2); min[field1*count+i[field1]] = dsl1; max[field1*count+i[field1]] = dsl2; if (++i[field1] >= count) return; write_reg(surf, read_reg(surf)); while (!quit) { dsl1 = read_reg(dsl); flp2 = read_reg(flp); dsl2 = read_reg(dsl); field1 = dsl1 & 0x80000000; field2 = dsl2 & 0x80000000; dsl1 &= ~0x80000000; dsl2 &= ~0x80000000; if (flp1 == flp2) continue; if (field1 != field2) printf("fields are different (%u:%u -> %u:%u)\n", field1, dsl1, field2, dsl2); min[field1*count+i[field1]] = dsl1; max[field1*count+i[field1]] = dsl2; if (++i[field1] >= count) break; } if (i[field1] >= count) break; } } static void poll_dsl_framecount_gen3(int pipe, uint32_t *min, uint32_t *max, const int count) { uint32_t dsl, dsl1, dsl2, frm, frm1, frm2; bool field1, field2; int i[2] = {}; frm = PIPE_REG(pipe, PIPEAFRAMEPIXEL); dsl = PIPE_REG(pipe, PIPEA_DSL); while (!quit) { dsl1 = read_reg(dsl); frm1 = read_reg(frm) >> 24; frm2 = read_reg(frm) >> 24; dsl2 = read_reg(dsl); field1 = dsl1 & 0x80000000; field2 = dsl2 & 0x80000000; dsl1 &= ~0x80000000; dsl2 &= ~0x80000000; if (frm1 + 1 != frm2) continue; if (field1 != field2) printf("fields are different (%u:%u -> %u:%u)\n", field1, dsl1, field2, dsl2); min[field1*count+i[field1]] = dsl1; max[field1*count+i[field1]] = dsl2; if (++i[field1] >= count) break; } } static void poll_dsl_pan(uint32_t devid, int pipe, int target_scanline, int target_fuzz, uint32_t *min, uint32_t *max, const int count) { uint32_t dsl, dsl1 = 0, dsl2 = 0; bool field1 = false, field2 = false; uint32_t saved, surf = 0; int i[2] = {}; dsl = PIPE_REG(pipe, PIPEA_DSL); surf = dspoffset_reg(devid, pipe); saved = read_reg(surf); while (!quit) { while (!quit) { dsl1 = read_reg(dsl); field1 = dsl1 & 0x80000000; dsl1 &= ~0x80000000; if (dsl1 == target_scanline) break; } write_reg(surf, saved+256); while (!quit) { dsl2 = read_reg(dsl); field2 = dsl1 & 0x80000000; dsl2 &= ~0x80000000; if (dsl2 == target_scanline + target_fuzz) break; } write_reg(surf, saved); if (field1 != field2) printf("fields are different (%u:%u -> %u:%u)\n", field1, dsl1, field2, dsl2); min[field1*count+i[field1]] = dsl1; max[field1*count+i[field1]] = dsl2; if (++i[field1] >= count) break; } write_reg(surf, saved); } static void poll_dsl_flip(uint32_t devid, int pipe, int target_scanline, int target_fuzz, uint32_t *min, uint32_t *max, const int count) { uint32_t dsl, dsl1 = 0, dsl2 = 0; bool field1 = false, field2 = false; uint32_t saved, surf = 0; int i[2] = {}; dsl = PIPE_REG(pipe, PIPEA_DSL); surf = dspsurf_reg(devid, pipe); saved = read_reg(surf); while (!quit) { while (!quit) { dsl1 = read_reg(dsl); field1 = dsl1 & 0x80000000; dsl1 &= ~0x80000000; if (dsl1 == target_scanline) break; } write_reg(surf, saved+128*1024); while (!quit) { dsl2 = read_reg(dsl); field2 = dsl1 & 0x80000000; dsl2 &= ~0x80000000; if (dsl2 == target_scanline + target_fuzz) break; } write_reg(surf, saved); if (field1 != field2) printf("fields are different (%u:%u -> %u:%u)\n", field1, dsl1, field2, dsl2); min[field1*count+i[field1]] = dsl1; max[field1*count+i[field1]] = dsl2; if (++i[field1] >= count) break; } write_reg(surf, saved); } static void poll_dsl_surflive(uint32_t devid, int pipe, uint32_t *min, uint32_t *max, const int count) { uint32_t dsl, dsl1 = 0, dsl2 = 0, surf, surf1, surf2, surflive, surfl1 = 0, surfl2, saved, tmp; bool field1 = false, field2 = false; int i[2] = {}; surflive = PIPE_REG(pipe, DSPASURFLIVE); dsl = PIPE_REG(pipe, PIPEA_DSL); surf = dspsurf_reg(devid, pipe); saved = read_reg(surf); surf1 = saved & ~0xfff; surf2 = surf1 + 128*1024; while (!quit) { write_reg(surf, surf2); while (!quit) { dsl1 = read_reg(dsl); surfl1 = read_reg(surflive) & ~0xfff; surfl2 = read_reg(surflive) & ~0xfff; dsl2 = read_reg(dsl); field1 = dsl1 & 0x80000000; field2 = dsl2 & 0x80000000; dsl1 &= ~0x80000000; dsl2 &= ~0x80000000; if (surfl2 == surf2) break; } if (surfl1 != surf2) { if (field1 != field2) printf("fields are different (%u:%u -> %u:%u)\n", field1, dsl1, field2, dsl2); min[field1*count+i[field1]] = dsl1; max[field1*count+i[field1]] = dsl2; if (++i[field1] >= count) break; } tmp = surf1; surf1 = surf2; surf2 = tmp; } write_reg(surf, saved); } static void poll_dsl_wrap(int pipe, uint32_t *min, uint32_t *max, const int count) { uint32_t dsl, dsl1, dsl2; bool field1, field2; int i[2] = {}; dsl = PIPE_REG(pipe, PIPEA_DSL); while (!quit) { dsl1 = read_reg(dsl); dsl2 = read_reg(dsl); field1 = dsl1 & 0x80000000; field2 = dsl2 & 0x80000000; dsl1 &= ~0x80000000; dsl2 &= ~0x80000000; if (dsl2 >= dsl1) continue; if (field1 != field2) printf("fields are different (%u:%u -> %u:%u)\n", field1, dsl1, field2, dsl2); min[field1*count+i[field1]] = dsl1; max[field1*count+i[field1]] = dsl2; if (++i[field1] >= count) break; } } static void poll_dsl_field(int pipe, uint32_t *min, uint32_t *max, const int count) { uint32_t dsl, dsl1, dsl2; bool field1, field2; int i[2] = {}; dsl = PIPE_REG(pipe, PIPEA_DSL); while (!quit) { dsl1 = read_reg(dsl); dsl2 = read_reg(dsl); field1 = dsl1 & 0x80000000; field2 = dsl2 & 0x80000000; dsl1 &= ~0x80000000; dsl2 &= ~0x80000000; if (field1 == field2) continue; min[field1*count+i[field1]] = dsl1; max[field1*count+i[field1]] = dsl2; if (++i[field1] >= count) break; } } static const char *test_name(enum test test, int pipe, int bit, bool test_pixel_count) { static char str[32]; const char *type = test_pixel_count ? "pixel" : "dsl"; switch (test) { case TEST_PIPESTAT: snprintf(str, sizeof str, "%s / pipe %c / PIPESTAT[%d] (gmch)", type, pipe_name(pipe), bit); return str; case TEST_IIR_GEN2: snprintf(str, sizeof str, "%s / pipe %c / IIR[%d] (gen2)", type, pipe_name(pipe), bit); return str; case TEST_IIR_GEN3: snprintf(str, sizeof str, "%s / pipe %c / IIR[%d] (gen3+)", type, pipe_name(pipe), bit); return str; case TEST_DEIIR: snprintf(str, sizeof str, "%s / pipe %c / DEIIR[%d] (pch)", type, pipe_name(pipe), bit); return str; case TEST_FRAMECOUNT_GEN3: snprintf(str, sizeof str, "%s / pipe %c / Frame count (gen3/4)", type, pipe_name(pipe)); return str; case TEST_FRAMECOUNT_G4X: snprintf(str, sizeof str, "%s / pipe %c / Frame count (g4x+)", type, pipe_name(pipe)); return str; case TEST_FLIPCOUNT: snprintf(str, sizeof str, "%s / pipe %c / Flip count (g4x+)", type, pipe_name(pipe)); return str; case TEST_PAN: snprintf(str, sizeof str, "%s / pipe %c / Pan", type, pipe_name(pipe)); return str; case TEST_FLIP: snprintf(str, sizeof str, "%s / pipe %c / Flip", type, pipe_name(pipe)); return str; case TEST_SURFLIVE: snprintf(str, sizeof str, "%s / pipe %c / Surflive", type, pipe_name(pipe)); return str; case TEST_WRAP: snprintf(str, sizeof str, "%s / pipe %c / Wrap", type, pipe_name(pipe)); return str; case TEST_FIELD: snprintf(str, sizeof str, "%s / pipe %c / Field", type, pipe_name(pipe)); return str; default: return ""; } } static void __attribute__((noreturn)) usage(const char *name) { fprintf(stderr, "Usage: %s [options]\n" " -t,--test \n" " -p,--pipe \n" " -b,--bit \n" " -l,--line \n" " -f,--fuzz \n" " -x,--pixel\n", name); exit(1); } int main(int argc, char *argv[]) { int fd, i; int pipe = 0, bit = 0, target_scanline = 0, target_fuzz = 1; bool test_pixelcount = false; uint32_t devid; uint32_t min[2*128] = {}; uint32_t max[2*128] = {}; uint32_t a, b; enum test test = TEST_INVALID; const int count = ARRAY_SIZE(min)/2; for (;;) { static const struct option long_options[] = { { .name = "test", .has_arg = required_argument, }, { .name = "pipe", .has_arg = required_argument, }, { .name = "bit", .has_arg = required_argument, }, { .name = "line", .has_arg = required_argument, }, { .name = "fuzz", .has_arg = required_argument, }, { .name = "pixel", .has_arg = no_argument, }, { }, }; int opt = getopt_long(argc, argv, "t:p:b:l:f:x", long_options, NULL); if (opt == -1) break; switch (opt) { case 't': if (!strcmp(optarg, "pipestat")) test = TEST_PIPESTAT; else if (!strcmp(optarg, "iir")) test = TEST_IIR; else if (!strcmp(optarg, "framecount")) test = TEST_FRAMECOUNT; else if (!strcmp(optarg, "flipcount")) test = TEST_FLIPCOUNT; else if (!strcmp(optarg, "pan")) test = TEST_PAN; else if (!strcmp(optarg, "flip")) test = TEST_FLIP; else if (!strcmp(optarg, "surflive")) test = TEST_SURFLIVE; else if (!strcmp(optarg, "wrap")) test = TEST_WRAP; else if (!strcmp(optarg, "field")) test = TEST_FIELD; else usage(argv[0]); break; case 'p': if (optarg[1] != '\0') usage(argv[0]); pipe = optarg[0]; if (pipe >= 'a') pipe -= 'a'; else if (pipe >= 'A') pipe -= 'A'; else if (pipe >= '0') pipe -= '0'; else usage(argv[0]); if (pipe < 0 || pipe > 2) usage(argv[0]); break; case 'b': bit = atoi(optarg); if (bit < 0 || bit > 31) usage(argv[0]); break; case 'l': target_scanline = atoi(optarg); if (target_scanline < 0) usage(argv[0]); break; case 'f': target_fuzz = atoi(optarg); if (target_fuzz <= 0) usage(argv[0]); break; case 'x': test_pixelcount = true; break; } } fd = drm_open_driver(DRIVER_INTEL); devid = intel_get_drm_devid(fd); close(fd); /* * check if the requires registers are * avilable on the current platform. */ if (IS_GEN2(devid)) { if (pipe > 1) usage(argv[0]); if (test_pixelcount) usage(argv[0]); switch (test) { case TEST_IIR: test = TEST_IIR_GEN2; break; case TEST_PIPESTAT: case TEST_PAN: break; case TEST_FLIP: test = TEST_PAN; break; default: usage(argv[0]); } } else if (IS_GEN3(devid) || (IS_GEN4(devid) && !IS_G4X(devid))) { if (pipe > 1) usage(argv[0]); switch (test) { case TEST_IIR: test = TEST_IIR_GEN3; break; case TEST_FRAMECOUNT: test = TEST_FRAMECOUNT_GEN3; break; case TEST_PIPESTAT: case TEST_PAN: case TEST_WRAP: case TEST_FIELD: break; case TEST_FLIP: if (IS_GEN3(devid)) test = TEST_PAN; break; default: usage(argv[0]); } } else if (IS_G4X(devid) || IS_VALLEYVIEW(devid) || IS_CHERRYVIEW(devid)) { if (IS_VALLEYVIEW(devid) || IS_CHERRYVIEW(devid)) vlv_offset = 0x180000; if (IS_CHERRYVIEW(devid)) pipe_offset[2] = 0x4000; if (pipe > 1 && !IS_CHERRYVIEW(devid)) usage(argv[0]); if (test_pixelcount) usage(argv[0]); switch (test) { case TEST_IIR: test = TEST_IIR_GEN3; break; case TEST_FRAMECOUNT: test = TEST_FRAMECOUNT_G4X; break; case TEST_FLIPCOUNT: case TEST_PIPESTAT: case TEST_PAN: case TEST_FLIP: case TEST_SURFLIVE: case TEST_WRAP: case TEST_FIELD: break; default: usage(argv[0]); } } else if (HAS_PCH_SPLIT(devid) && (IS_GEN5(devid) || IS_GEN6(devid) || IS_GEN7(devid))) { if (pipe > 1 && (IS_GEN5(devid) || IS_GEN6(devid))) usage(argv[0]); if (test_pixelcount) usage(argv[0]); switch (test) { case TEST_IIR: test = TEST_DEIIR; break; case TEST_FRAMECOUNT: test = TEST_FRAMECOUNT_G4X; break; case TEST_FLIPCOUNT: case TEST_PAN: case TEST_FLIP: case TEST_SURFLIVE: case TEST_WRAP: case TEST_FIELD: break; default: usage(argv[0]); } } else if (IS_GEN8(devid)) { if (test_pixelcount) usage(argv[0]); switch (test) { case TEST_IIR: test = TEST_DEIIR; break; case TEST_FRAMECOUNT: test = TEST_FRAMECOUNT_G4X; break; case TEST_FLIPCOUNT: case TEST_PAN: case TEST_FLIP: case TEST_SURFLIVE: case TEST_WRAP: case TEST_FIELD: break; default: usage(argv[0]); } } else { usage(argv[0]); } switch (test) { case TEST_IIR: case TEST_FRAMECOUNT: /* should no longer have the generic tests here */ assert(0); default: break; } intel_register_access_init(intel_get_pci_device(), 0); printf("%s?\n", test_name(test, pipe, bit, test_pixelcount)); signal(SIGHUP, sighandler); signal(SIGINT, sighandler); signal(SIGTERM, sighandler); switch (test) { case TEST_PIPESTAT: if (test_pixelcount) poll_pixel_pipestat(pipe, bit, min, max, count); else poll_dsl_pipestat(pipe, bit, min, max, count); break; case TEST_IIR_GEN2: assert(!test_pixelcount); poll_dsl_iir_gen2(pipe, bit, min, max, count); break; case TEST_IIR_GEN3: if (test_pixelcount) poll_pixel_iir_gen3(pipe, bit, min, max, count); else poll_dsl_iir_gen3(pipe, bit, min, max, count); break; case TEST_DEIIR: assert(!test_pixelcount); poll_dsl_deiir(devid, pipe, bit, min, max, count); break; case TEST_FRAMECOUNT_GEN3: if (test_pixelcount) poll_pixel_framecount_gen3(pipe, min, max, count); else poll_dsl_framecount_gen3(pipe, min, max, count); break; case TEST_FRAMECOUNT_G4X: assert(!test_pixelcount); poll_dsl_framecount_g4x(pipe, min, max, count); break; case TEST_FLIPCOUNT: assert(!test_pixelcount); poll_dsl_flipcount_g4x(devid, pipe, min, max, count); break; case TEST_PAN: if (test_pixelcount) poll_pixel_pan(devid, pipe, target_scanline, target_fuzz, min, max, count); else poll_dsl_pan(devid, pipe, target_scanline, target_fuzz, min, max, count); break; case TEST_FLIP: if (test_pixelcount) poll_pixel_flip(devid, pipe, target_scanline, target_fuzz, min, max, count); else poll_dsl_flip(devid, pipe, target_scanline, target_fuzz, min, max, count); break; case TEST_SURFLIVE: poll_dsl_surflive(devid, pipe, min, max, count); break; case TEST_WRAP: if (test_pixelcount) poll_pixel_wrap(pipe, min, max, count); else poll_dsl_wrap(pipe, min, max, count); break; case TEST_FIELD: poll_dsl_field(pipe, min, max, count); break; default: assert(0); } intel_register_access_fini(); if (quit) return 0; for (i = 0; i < count; i++) { if (min[0*count+i] == 0 && max[0*count+i] == 0) break; printf("[%u] %4u - %4u (%4u)\n", 0, min[0*count+i], max[0*count+i], (min[0*count+i] + max[0*count+i] + 1) >> 1); } for (i = 0; i < count; i++) { if (min[1*count+i] == 0 && max[1*count+i] == 0) break; printf("[%u] %4u - %4u (%4u)\n", 1, min[1*count+i], max[1*count+i], (min[1*count+i] + max[1*count+i] + 1) >> 1); } a = 0; b = 0xffffffff; for (i = 0; i < count; i++) { if (min[0*count+i] == 0 && max[0*count+i] == 0) break; a = max(a, min[0*count+i]); b = min(b, max[0*count+i]); } printf("%s: [%u] %6u - %6u\n", test_name(test, pipe, bit, test_pixelcount), 0, a, b); a = 0; b = 0xffffffff; for (i = 0; i < count; i++) { if (min[1*count+i] == 0 && max[1*count+i] == 0) break; a = max(a, min[1*count+i]); b = min(b, max[1*count+i]); } printf("%s: [%u] %6u - %6u\n", test_name(test, pipe, bit, test_pixelcount), 1, a, b); return 0; } intel-gpu-tools-1.14/tools/intel_l3_parity.h0000644000175000017500000000117212665336131016043 00000000000000#ifndef INTEL_L3_PARITY_H_ #define INTEL_L3_PARITY_H_ #include #include struct l3_parity { struct udev *udev; struct udev_monitor *uevent_monitor; int fd; fd_set fdset; }; struct l3_location { uint8_t slice; uint16_t row; uint8_t bank; uint8_t subbank; }; #if HAVE_UDEV int l3_uevent_setup(struct l3_parity *par); /* Listens (blocks) for an l3 parity event. Returns the location of the error. */ int l3_listen(struct l3_parity *par, bool daemon, struct l3_location *loc); #define l3_uevent_teardown(par) {} #else #define l3_uevent_setup(par, daemon, loc) -1 #define l3_listen(par) -1 #endif #endif intel-gpu-tools-1.14/tools/intel_reg_spec.c0000644000175000017500000001521612665336131015723 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ #include #include #include #include #include #include #include #include #include "intel_reg_spec.h" static const struct port_desc port_descs[] = { { .name = "mmio", .port = PORT_MMIO, .stride = 4, }, { .name = "portio-vga", .port = PORT_PORTIO_VGA, .stride = 1, }, { .name = "mmio-vga", .port = PORT_MMIO_VGA, .stride = 1, }, { .name = "bunit", .port = PORT_BUNIT, .stride = 1, }, { .name = "punit", .port = PORT_PUNIT, .stride = 1, }, { .name = "nc", .port = PORT_NC, .stride = 4, }, { .name = "dpio", .port = PORT_DPIO, .stride = 4, }, { .name = "gpio-nc", .port = PORT_GPIO_NC, .stride = 4, }, { .name = "gpio_nc", .port = PORT_GPIO_NC, .stride = 4, }, { .name = "cck", .port = PORT_CCK, .stride = 1, }, { .name = "ccu", .port = PORT_CCU, .stride = 4, }, { .name = "dpio2", .port = PORT_DPIO2, .stride = 4, }, { .name = "flisdsi", .port = PORT_FLISDSI, .stride = 1, }, }; /* * Parse port desc of the form (PORTNAME|PORTNUM|MMIO-OFFSET) into reg. NULL or * zero length s is regarded as MMIO. */ int parse_port_desc(struct reg *reg, const char *s) { enum port_addr port = PORT_NONE; int i; if (s && *s) { /* See if port is specified by number. */ char *endp; unsigned long n = strtoul(s, &endp, 16); if (endp > s && *endp == 0) { if (n > PORT_MAX) { /* Not a sideband port, assume MMIO offset. */ port = PORT_MMIO; reg->mmio_offset = n; } else { port = n; reg->mmio_offset = 0; } } else { reg->mmio_offset = 0; } } else { /* No port, default to searching for MMIO. */ port = PORT_MMIO; reg->mmio_offset = 0; } for (i = 0; i < ARRAY_SIZE(port_descs); i++) { if ((port != PORT_NONE && port_descs[i].port == port) || (s && strcasecmp(s, port_descs[i].name) == 0)) { reg->port_desc = port_descs[i]; return 0; } } return -1; } static const char *skip_space(const char *line) { while (*line && isspace(*line)) line++; return line; } static bool ignore_line(const char *line) { line = skip_space(line); switch (*line) { case '\0': case '#': case ';': return true; case '/': return *(line + 1) == '/'; } return false; } static char *include_file(const char *line, const char *source) { char *filename, *p; line = skip_space(line); if (*line == '(') return NULL; /* this'll be plenty */ filename = malloc(strlen(source) + strlen(line) + 1); if (!filename) return NULL; p = strrchr(source, '/'); if (p && *line != '/') { int len = p - source + 1; memcpy(filename, source, len); strcpy(filename + len, line); } else { strcpy(filename, line); } p = strchr(filename, '\n'); if (p) *p = '\0'; return filename; } #define SPC "[[:space:]]*" #define SEP SPC "," SPC #define BEG "^" SPC "\\(" SPC #define END SPC "\\)" SPC "$" #define VALUE "([[:print:]]*)" #define QVALUE "'" VALUE "'" #define REGEXP BEG QVALUE SEP QVALUE SEP QVALUE END static int parse_line(struct reg *reg, const char *line) { static regex_t regex; static bool initialized = false; regmatch_t match[4]; int i, ret; if (!initialized) { if (regcomp (®ex, REGEXP, REG_EXTENDED)) { fprintf(stderr, "regcomp %s\n", REGEXP); return -1; } initialized = true; } memset(reg, 0, sizeof(*reg)); ret = regexec(®ex, line, ARRAY_SIZE(match), match, 0); if (ret) ret = -1; for (i = 1; i < ARRAY_SIZE(match) && ret == 0; i++) { char *p, *e; p = strndup(line + match[i].rm_so, match[i].rm_eo - match[i].rm_so); if (i == 1) { reg->name = p; } else if (i == 2) { reg->addr = strtoul(p, &e, 16); free(p); if (*e) ret = -1; } else if (i == 3) { ret = parse_port_desc(reg, p); free(p); } } if (ret) free(reg->name); return ret; } static ssize_t parse_file(struct reg **regs, size_t *nregs, ssize_t index, const char *filename) { FILE *file; char *line = NULL, *include; size_t linesize = 0; int lineno = 0, r; ssize_t ret = -1; file = fopen(filename, "r"); if (!file) { fprintf(stderr, "Error: fopen '%s': %s\n", filename, strerror(errno)); return -1; } while (getline(&line, &linesize, file) != -1) { struct reg reg; lineno++; if (ignore_line(line)) continue; include = include_file(line, filename); if (include) { index = parse_file(regs, nregs, index, include); free(include); if (index < 0) { fprintf(stderr, "Error: %s:%d: %s", filename, lineno, line); goto out; } continue; } r = parse_line(®, line); if (r < 0) { fprintf(stderr, "Error: %s:%d: %s", filename, lineno, line); goto out; } else if (r) { continue; } if (!*regs || index >= *nregs) { if (!*regs) *nregs = 64; else *nregs *= 2; *regs = recalloc(*regs, *nregs, sizeof(**regs)); if (!*regs) { fprintf(stderr, "Error: %s\n", strerror(ENOMEM)); goto out; } } (*regs)[index++] = reg; } ret = index; out: free(line); fclose(file); return ret; } /* * Get register definitions from file. */ ssize_t intel_reg_spec_file(struct reg **regs, const char *file) { size_t nregs = 0; *regs = NULL; return parse_file(regs, &nregs, 0, file); } /* * Free the memory allocated for register definitions. */ void intel_reg_spec_free(struct reg *regs, size_t n) { size_t i; for (i = 0; i < n; i++) { free(regs[i].name); } free(regs); } void intel_reg_spec_print_ports(void) { int i; for (i = 0; i < ARRAY_SIZE(port_descs); i++) printf("%s%s", i == 0 ? "" : ", ", port_descs[i].name); } intel-gpu-tools-1.14/tools/intel_framebuffer_dump.c0000644000175000017500000000620712665336131017445 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. * */ /* * Read back all the KMS framebuffers attached to the CRTC and record as PNG. */ #define _GNU_SOURCE #include #include #include #include #include #include #include #include "intel_io.h" #include "drmtest.h" int main(int argc, char **argv) { drmModeResPtr res; int fd, n; fd = drmOpen("i915", NULL); if (fd < 0) return ENOENT; res = drmModeGetResources(fd); if (res == NULL) return ENOMEM; for (n = 0; n < res->count_crtcs; n++) { struct drm_gem_open open_arg; struct drm_gem_flink flink; drmModeCrtcPtr crtc; drmModeFBPtr fb; crtc = drmModeGetCrtc(fd, res->crtcs[n]); if (crtc == NULL) continue; fb = drmModeGetFB(fd, crtc->buffer_id); drmModeFreeCrtc(crtc); if (fb == NULL) continue; flink.handle = fb->handle; if (drmIoctl(fd, DRM_IOCTL_GEM_FLINK, &flink)) { drmModeFreeFB(fb); continue; } open_arg.name = flink.name; if (drmIoctl(fd, DRM_IOCTL_GEM_OPEN, &open_arg) == 0) { struct drm_i915_gem_mmap_gtt mmap_arg; void *ptr; mmap_arg.handle = open_arg.handle; if (drmIoctl(fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &mmap_arg) == 0 && (ptr = mmap(0, open_arg.size, PROT_READ, MAP_SHARED, fd, mmap_arg.offset)) != (void *)-1) { cairo_surface_t *surface; cairo_format_t format; char name[80]; snprintf(name, sizeof(name), "fb-%d.png", fb->fb_id); switch (fb->depth) { case 16: format = CAIRO_FORMAT_RGB16_565; break; case 24: format = CAIRO_FORMAT_RGB24; break; case 30: format = CAIRO_FORMAT_RGB30; break; case 32: format = CAIRO_FORMAT_ARGB32; break; default: format = CAIRO_FORMAT_INVALID; break; } surface = cairo_image_surface_create_for_data(ptr, format, fb->width, fb->height, fb->pitch); cairo_surface_write_to_png(surface, name); cairo_surface_destroy(surface); munmap(ptr, open_arg.size); } drmIoctl(fd, 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without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. * */ #include #include #include #include #include #include #include "intel_io.h" #include "intel_chipset.h" static uint32_t display_base; static uint32_t devid; #define ARRAY_SIZE(a) (sizeof(a)/sizeof((a)[0])) static uint32_t read_reg(uint32_t addr) { return INREG(display_base + addr); } struct gmch_wm { int wm, wm1, dl, fifo, fbc, burst; bool dl_prec, valid; }; enum plane { PRI_HPLL_SR, CUR_HPLL_SR, PRI_SR, CUR_SR, PRI_A, CUR_A, SPR_A, SPR_B, PRI_B, CUR_B, SPR_C, SPR_D, PRI_C, CUR_C, SPR_E, SPR_F, MAX_PLANE, }; #define NAME(x) [x] = #x static const char * const plane_name[] = { NAME(PRI_HPLL_SR), NAME(CUR_HPLL_SR), NAME(PRI_SR), NAME(CUR_SR), NAME(PRI_A), NAME(CUR_A), NAME(SPR_A), NAME(SPR_B), NAME(PRI_B), NAME(CUR_B), NAME(SPR_C), NAME(SPR_D), NAME(PRI_C), NAME(CUR_C), NAME(SPR_E), NAME(SPR_F), }; struct ilk_wm_level { int primary, sprite, cursor, latency, fbc; bool enabled, sprite_enabled; bool primary_trickle_feed_dis, sprite_trickle_feed_dis; }; struct ilk_wm { struct ilk_wm_level pipe[3]; struct ilk_wm_level lp[3]; }; #define MASK(size) ((1 << (size)) - 1) #define REG_DECODE1(x, shift, size) \ (((x) >> (shift)) & MASK(size)) #define REG_DECODE2(lo, shift_lo, size_lo, hi, shift_hi, size_hi) \ ((((lo) >> (shift_lo)) & MASK(size_lo)) | \ ((((hi) >> (shift_hi)) & MASK(size_hi)) << (size_lo))) static const char pipe_name(int pipe) { return 'A' + pipe; } static const char *endis(bool enabled) { return enabled ? "enabled" : "disabled"; } static int is_gen7_plus(uint32_t d) { return !(IS_GEN5(d) || IS_GEN6(d)); } static int is_hsw_plus(uint32_t d) { return !(IS_GEN5(d) || IS_GEN6(d) || IS_IVYBRIDGE(d)); } static void ilk_wm_dump(void) { int i; uint32_t dspcntr[3]; uint32_t spcntr[3]; uint32_t wm_pipe[3]; uint32_t wm_lp[3]; uint32_t wm_lp_spr[3]; uint32_t arb_ctl, arb_ctl2, wm_misc = 0; int num_pipes = is_gen7_plus(devid) ? 3 : 2; struct ilk_wm wm = {}; intel_register_access_init(intel_get_pci_device(), 0); for (i = 0; i < num_pipes; i++) { dspcntr[i] = read_reg(0x70180 + i * 0x1000); if (is_gen7_plus(devid)) spcntr[i] = read_reg(0x70280 + i * 0x1000); else spcntr[i] = read_reg(0x72180 + i * 0x1000); } wm_pipe[0] = read_reg(0x45100); wm_pipe[1] = read_reg(0x45104); if (num_pipes == 3) wm_pipe[2] = read_reg(0x45200); wm_lp[0] = read_reg(0x45108); wm_lp[1] = read_reg(0x4510c); wm_lp[2] = read_reg(0x45110); wm_lp_spr[0] = read_reg(0x45120); if (is_gen7_plus(devid)) { wm_lp_spr[1] = read_reg(0x45124); wm_lp_spr[2] = read_reg(0x45128); } arb_ctl = read_reg(0x45000); arb_ctl2 = read_reg(0x45004); if (is_hsw_plus(devid)) wm_misc = read_reg(0x45260); intel_register_access_fini(); for (i = 0; i < num_pipes; i++) printf(" WM_PIPE_%c = 0x%08x\n", pipe_name(i), wm_pipe[i]); printf(" WM_LP1 = 0x%08x\n", wm_lp[0]); printf(" WM_LP2 = 0x%08x\n", wm_lp[1]); printf(" WM_LP3 = 0x%08x\n", wm_lp[2]); printf(" WM_LP1_SPR = 0x%08x\n", wm_lp_spr[0]); if (is_gen7_plus(devid)) { printf(" WM_LP2_SPR = 0x%08x\n", wm_lp_spr[1]); printf(" WM_LP3_SPR = 0x%08x\n", wm_lp_spr[2]); } printf(" ARB_CTL = 0x%08x\n", arb_ctl); printf(" ARB_CTL2 = 0x%08x\n", arb_ctl2); if (is_hsw_plus(devid)) printf(" WM_MISC = 0x%08x\n", wm_misc); for (i = 0 ; i < num_pipes; i++) { wm.pipe[i].primary = REG_DECODE1(wm_pipe[i], 16, 8); wm.pipe[i].sprite = REG_DECODE1(wm_pipe[i], 8, 8); wm.pipe[i].cursor = REG_DECODE1(wm_pipe[i], 0, 6); wm.pipe[i].primary_trickle_feed_dis = REG_DECODE1(dspcntr[i], 14, 1); if (!IS_GEN5(devid)) wm.pipe[i].sprite_trickle_feed_dis = REG_DECODE1(spcntr[i], 14, 1); } for (i = 0; i < 3; i++) { wm.lp[i].enabled = REG_DECODE1(wm_lp[i], 31, 1); wm.lp[i].latency = REG_DECODE1(wm_lp[i], 24, 7); if (IS_GEN8(devid)) wm.lp[i].fbc = REG_DECODE1(wm_lp[i], 19, 5); else wm.lp[i].fbc = REG_DECODE1(wm_lp[i], 20, 4); wm.lp[i].primary = REG_DECODE1(wm_lp[i], 8, 11); wm.lp[i].cursor = REG_DECODE1(wm_lp[i], 0, 8); if (i == 0 || is_gen7_plus(devid)) { if (!is_gen7_plus(devid)) wm.lp[i].sprite_enabled = REG_DECODE1(wm_lp_spr[i], 31, 1); wm.lp[i].sprite = REG_DECODE1(wm_lp_spr[i], 0, 11); } } for (i = 0; i < num_pipes; i++) { printf("WM_PIPE_%c: primary=%d, cursor=%d, sprite=%d\n", pipe_name(i), wm.pipe[i].primary, wm.pipe[i].cursor, wm.pipe[i].sprite); } if (is_gen7_plus(devid)) { for (i = 0; i < 3; i++) { printf("WM_LP%d: %s, latency=%d, fbc=%d, primary=%d, cursor=%d, sprite=%d\n", i + 1, endis(wm.lp[i].enabled), wm.lp[i].latency, wm.lp[i].fbc, wm.lp[i].primary, wm.lp[i].cursor, wm.lp[i].sprite); } } else { i = 0; printf("WM_LP%d: %s, latency=%d, fbc=%d, primary=%d, cursor=%d, sprite=%d (%s)\n", i + 1, endis(wm.lp[i].enabled), wm.lp[i].latency, wm.lp[i].fbc, wm.lp[i].primary, wm.lp[i].cursor, wm.lp[i].sprite, endis(wm.lp[i].sprite_enabled)); for (i = 1; i < 3; i++) { printf("WM_LP%d: %s, latency=%d, fbc=%d, primary=%d, cursor=%d\n", i + 1, endis(wm.lp[i].enabled), wm.lp[i].latency, wm.lp[i].fbc, wm.lp[i].primary, wm.lp[i].cursor); } } for (i = 0; i < num_pipes; i++) { printf("Primary %c trickle feed = %s\n", pipe_name(i), endis(!wm.pipe[i].primary_trickle_feed_dis)); if (!IS_GEN5(devid)) printf("Sprite %c trickle feed = %s\n", pipe_name(i), endis(!wm.pipe[i].sprite_trickle_feed_dis)); } if (is_hsw_plus(devid)) { printf("DDB partitioning = %s\n", REG_DECODE1(wm_misc, 0, 1) ? "5/6" : "1/2"); } else if (is_gen7_plus(devid)) { printf("DDB partitioning = %s\n", REG_DECODE1(arb_ctl2, 6, 1) ? "5/6" : "1/2"); } printf("FBC watermark = %s\n", endis(!REG_DECODE1(arb_ctl, 15, 1))); } static void vlv_wm_dump(void) { int i; unsigned int num_pipes = IS_CHERRYVIEW(devid) ? 3 : 2; uint32_t dsparb, dsparb2, dsparb3; uint32_t fw1, fw2, fw3, fw4, fw5, fw6, fw7, fw8, fw9, howm, howm1; uint32_t ddl1, ddl2, ddl3; uint32_t fw_blc_self, mi_arb,cbr1; uint32_t dsp_ss_pm, ddr_setup2; struct gmch_wm wms[MAX_PLANE] = {}; intel_register_access_init(intel_get_pci_device(), 0); dsparb = read_reg(0x70030); dsparb2 = read_reg(0x70060); fw1 = read_reg(0x70034); fw2 = read_reg(0x70038); fw3 = read_reg(0x7003c); fw4 = read_reg(0x70070); fw5 = read_reg(0x70074); fw6 = read_reg(0x70078); howm = read_reg(0x70064); howm1 = read_reg(0x70068); ddl1 = read_reg(0x70050); ddl2 = read_reg(0x70054); fw_blc_self = read_reg(0x6500); mi_arb = read_reg(0x6504); cbr1 = read_reg(0x70400); if (IS_CHERRYVIEW(devid)) { dsparb3 = read_reg(0x7006c); fw7 = read_reg(0x700b4); fw8 = read_reg(0x700b8); fw9 = read_reg(0x7007c); ddl3 = read_reg(0x70058); intel_punit_read(0x36, &dsp_ss_pm); intel_punit_read(0x139, &ddr_setup2); } else { fw7 = read_reg(0x7007c); } intel_register_access_fini(); printf(" FW1 = 0x%08x\n", fw1); printf(" FW2 = 0x%08x\n", fw2); printf(" FW3 = 0x%08x\n", fw3); printf(" FW4 = 0x%08x\n", fw4); printf(" FW5 = 0x%08x\n", fw5); printf(" FW6 = 0x%08x\n", fw6); printf(" FW7 = 0x%08x\n", fw7); if (IS_CHERRYVIEW(devid)) { printf(" FW8 = 0x%08x\n", fw8); printf(" FW9 = 0x%08x\n", fw9); } printf(" HOWM = 0x%08x\n", howm); printf(" HOWM1 = 0x%08x\n", howm1); printf(" DDL1 = 0x%08x\n", ddl1); printf(" DDL2 = 0x%08x\n", ddl2); if (IS_CHERRYVIEW(devid)) printf(" DDL3 = 0x%08x\n", ddl3); printf(" DSPARB = 0x%08x\n", dsparb); printf(" DSPARB2 = 0x%08x\n", dsparb2); if (IS_CHERRYVIEW(devid)) printf(" DSPARB3 = 0x%08x\n", dsparb3); printf("FW_BLC_SELF = 0x%08x\n", fw_blc_self); printf(" MI_ARB = 0x%08x\n", mi_arb); printf(" CBR1 = 0x%08x\n", cbr1); if (IS_CHERRYVIEW(devid)) { printf(" DSP_SS_PM = 0x%08x\n", dsp_ss_pm); printf(" DDR_SETUP2 = 0x%08x\n", ddr_setup2); } wms[PRI_A].valid = true; wms[PRI_B].valid = true; wms[CUR_A].valid = true; wms[CUR_B].valid = true; wms[SPR_A].valid = true; wms[SPR_B].valid = true; wms[SPR_C].valid = true; wms[SPR_D].valid = true; wms[PRI_SR].valid = true; wms[CUR_SR].valid = true; if (IS_CHERRYVIEW(devid)) { wms[PRI_C].valid = true; wms[CUR_C].valid = true; wms[SPR_E].valid = true; wms[SPR_F].valid = true; } wms[PRI_A].fifo = REG_DECODE2(dsparb, 0, 8, dsparb2, 0, 1) - 0; wms[SPR_A].fifo = REG_DECODE2(dsparb, 8, 8, dsparb2, 4, 1) - wms[PRI_A].fifo; wms[SPR_B].fifo = 512 - 1 - wms[SPR_A].fifo - wms[PRI_A].fifo; wms[CUR_A].fifo = 0x3f; wms[PRI_B].fifo = REG_DECODE2(dsparb, 16, 8, dsparb2, 8, 1) - 0; wms[SPR_C].fifo = REG_DECODE2(dsparb, 24, 8, dsparb2, 12, 1) - wms[PRI_B].fifo; wms[SPR_D].fifo = 512 - 1 - wms[SPR_C].fifo - wms[PRI_B].fifo; wms[CUR_B].fifo = 0x3f; if (IS_CHERRYVIEW(devid)) { wms[PRI_C].fifo = REG_DECODE2(dsparb3, 0, 8, dsparb2, 16, 1) - 0; wms[SPR_E].fifo = REG_DECODE2(dsparb3, 8, 8, dsparb2, 20, 1) - wms[PRI_C].fifo; wms[SPR_F].fifo = 512 - 1 - wms[SPR_E].fifo - wms[PRI_C].fifo; wms[CUR_C].fifo = 0x3f; } wms[PRI_SR].fifo = 512 * num_pipes - 1; wms[CUR_SR].fifo = 0x3f; wms[PRI_HPLL_SR].fifo = 512 * num_pipes - 1; wms[CUR_HPLL_SR].fifo = 0x3f; wms[PRI_A].wm = REG_DECODE2(fw1, 0, 8, howm, 0, 1); wms[PRI_B].wm = REG_DECODE2(fw1, 8, 8, howm, 12, 1); wms[CUR_B].wm = REG_DECODE1(fw1, 16, 6); wms[PRI_SR].wm = REG_DECODE2(fw1, 23, 9, howm, 24, 2); wms[SPR_A].wm = REG_DECODE2(fw2, 0, 8, howm, 4, 1); wms[CUR_A].wm = REG_DECODE1(fw2, 8, 6); wms[SPR_B].wm = REG_DECODE2(fw2, 16, 8, howm, 8, 1); wms[CUR_SR].wm = REG_DECODE1(fw3, 24, 6); wms[SPR_A].wm1 = REG_DECODE2(fw4, 0, 8, howm1, 4, 1); wms[CUR_A].wm1 = REG_DECODE1(fw4, 8, 6); wms[SPR_B].wm1 = REG_DECODE2(fw4, 16, 8, howm1, 8, 1); wms[CUR_SR].wm1 = REG_DECODE1(fw5, 0, 6); wms[CUR_B].wm1 = REG_DECODE1(fw5, 8, 6); wms[PRI_A].wm1 = REG_DECODE2(fw5, 16, 8, howm1, 0, 1); wms[PRI_B].wm1 = REG_DECODE2(fw5, 24, 8, howm1, 12, 1); wms[PRI_SR].wm1 = REG_DECODE2(fw6, 0, 9, howm1, 24, 2); wms[SPR_C].wm = REG_DECODE2(fw7, 0, 8, howm, 16, 1); wms[SPR_C].wm1 = REG_DECODE2(fw7, 8, 8, howm1, 16, 1); wms[SPR_D].wm = REG_DECODE2(fw7, 16, 8, howm, 20, 1); wms[SPR_D].wm1 = REG_DECODE2(fw7, 24, 8, howm1, 20, 1); if (IS_CHERRYVIEW(devid)) { wms[SPR_E].wm = REG_DECODE2(fw8, 0, 8, howm, 22, 1); wms[SPR_E].wm1 = REG_DECODE2(fw8, 8, 8, howm1, 22, 1); wms[SPR_F].wm = REG_DECODE2(fw8, 16, 8, howm, 23, 1); wms[SPR_F].wm1 = REG_DECODE2(fw8, 24, 8, howm1, 23, 1); wms[CUR_C].wm = REG_DECODE1(fw9, 0, 6); wms[CUR_C].wm1 = REG_DECODE1(fw9, 8, 6); wms[PRI_C].wm = REG_DECODE2(fw9, 16, 8, howm, 21, 1); wms[PRI_C].wm1 = REG_DECODE2(fw9, 24, 8, howm1, 21, 1); } wms[PRI_A].dl = REG_DECODE1(ddl1, 0, 7); wms[SPR_A].dl = REG_DECODE1(ddl1, 8, 7); wms[SPR_B].dl = REG_DECODE1(ddl1, 16, 7); wms[CUR_A].dl = REG_DECODE1(ddl1, 24, 7); wms[PRI_A].dl_prec = REG_DECODE1(ddl1, 7, 1); wms[SPR_A].dl_prec = REG_DECODE1(ddl1, 15, 1); wms[SPR_B].dl_prec = REG_DECODE1(ddl1, 23, 1); wms[CUR_A].dl_prec = REG_DECODE1(ddl1, 31, 1); wms[PRI_B].dl = REG_DECODE1(ddl2, 0, 7); wms[SPR_C].dl = REG_DECODE1(ddl2, 8, 7); wms[SPR_D].dl = REG_DECODE1(ddl2, 16, 7); wms[CUR_B].dl = REG_DECODE1(ddl2, 24, 7); wms[PRI_B].dl_prec = REG_DECODE1(ddl2, 7, 1); wms[SPR_C].dl_prec = REG_DECODE1(ddl2, 15, 1); wms[SPR_D].dl_prec = REG_DECODE1(ddl2, 23, 1); wms[CUR_B].dl_prec = REG_DECODE1(ddl2, 31, 1); if (IS_CHERRYVIEW(devid)) { wms[PRI_C].dl = REG_DECODE1(ddl3, 0, 7); wms[SPR_E].dl = REG_DECODE1(ddl3, 8, 7); wms[SPR_F].dl = REG_DECODE1(ddl3, 16, 7); wms[CUR_C].dl = REG_DECODE1(ddl3, 24, 7); wms[PRI_C].dl_prec = REG_DECODE1(ddl3, 7, 1); wms[SPR_E].dl_prec = REG_DECODE1(ddl3, 15, 1); wms[SPR_F].dl_prec = REG_DECODE1(ddl3, 23, 1); wms[CUR_C].dl_prec = REG_DECODE1(ddl3, 31, 1); } for (i = 0; i < ARRAY_SIZE(wms); i++) { if (!wms[i].valid) continue; printf("%s: WM = %d, WM1 = %d, DDL = %d (prec=%d), FIFO = %d\n", plane_name[i], wms[i].wm, wms[i].wm1, wms[i].dl, wms[i].dl_prec, wms[i].fifo); } printf("CxSR = %s\n", endis(REG_DECODE1(fw_blc_self, 15, 1))); printf("Trickle feed = %s\n", endis(!REG_DECODE1(mi_arb, 2, 1))); printf("PND deadline = %s\n", endis(!REG_DECODE1(cbr1, 31, 1))); if (IS_CHERRYVIEW(devid)) { printf("PM5 = %s\n", endis(REG_DECODE1(dsp_ss_pm, 6, 1))); printf("PM5 state = %s\n", endis(REG_DECODE1(dsp_ss_pm, 22, 1))); printf("DDR force high frequency = %s\n", endis(REG_DECODE1(ddr_setup2, 0, 1))); printf("DDR force low frequency = %s\n", endis(REG_DECODE1(ddr_setup2, 1, 1))); } } static void g4x_wm_dump(void) { int i; uint32_t dspacntr, dspbcntr; uint32_t dsparb; uint32_t fw1, fw2, fw3; uint32_t mi_display_power_down; uint32_t mi_arb_state; struct gmch_wm wms[MAX_PLANE] = {}; intel_register_access_init(intel_get_pci_device(), 0); dspacntr = read_reg(0x70180); dspbcntr = read_reg(0x71180); dsparb = read_reg(0x70030); fw1 = read_reg(0x70034); fw2 = read_reg(0x70038); fw3 = read_reg(0x7003c); mi_display_power_down = read_reg(0x20e0); mi_arb_state = read_reg(0x20e4); intel_register_access_fini(); printf(" DSPACNTR = 0x%08x\n", dspacntr); printf(" DSPBCNTR = 0x%08x\n", dspbcntr); printf(" FW1 = 0x%08x\n", fw1); printf(" FW2 = 0x%08x\n", fw2); printf(" FW3 = 0x%08x\n", fw3); printf(" DSPARB = 0x%08x\n", dsparb); printf("MI_DISPLAY_POWER_DOWN = 0x%08x\n", mi_display_power_down); printf(" MI_ARB_STATE = 0x%08x\n", mi_arb_state); wms[PRI_A].valid = true; wms[PRI_B].valid = true; wms[CUR_A].valid = true; wms[CUR_B].valid = true; wms[SPR_A].valid = true; wms[SPR_B].valid = true; wms[PRI_SR].valid = true; wms[CUR_SR].valid = true; wms[PRI_HPLL_SR].valid = true; wms[CUR_HPLL_SR].valid = true; wms[PRI_A].fifo = REG_DECODE1(dsparb, 0, 7) - 0; wms[PRI_B].fifo = REG_DECODE1(dsparb, 7, 7) - wms[PRI_A].fifo; wms[PRI_A].wm = REG_DECODE1(fw1, 0, 7); wms[PRI_B].wm = REG_DECODE1(fw1, 8, 7); wms[CUR_B].wm = REG_DECODE1(fw1, 16, 6); wms[PRI_SR].wm = REG_DECODE1(fw1, 23, 9); wms[PRI_SR].fbc = REG_DECODE1(fw2, 0, 8); wms[PRI_HPLL_SR].fbc = REG_DECODE1(fw2, 8, 6); wms[SPR_B].wm = REG_DECODE1(fw2, 16, 7); wms[CUR_A].wm = REG_DECODE1(fw2, 8, 6); wms[SPR_A].wm = REG_DECODE1(fw2, 0, 7); wms[CUR_SR].wm = REG_DECODE1(fw3, 24, 6); wms[CUR_HPLL_SR].wm = REG_DECODE1(fw3, 16, 6); wms[PRI_HPLL_SR].wm = REG_DECODE1(fw3, 0, 9); for (i = 0; i < ARRAY_SIZE(wms); i++) { if (!wms[i].valid) continue; printf("%s: WM = %d, FBC = %d, FIFO = %d\n", plane_name[i], wms[i].wm, wms[i].fbc, wms[i].fifo); } printf("CxSR = %s\n", endis(REG_DECODE1(mi_display_power_down, 15, 1))); printf("HPLL SR = %s\n", endis(REG_DECODE1(fw3, 31, 1))); printf("FBC SR = %s\n", endis(REG_DECODE1(fw2, 31, 1))); printf("Display A trickle feed = %s\n", endis(!REG_DECODE1(dspacntr, 14, 1))); printf("Display B trickle feed = %s\n", endis(!REG_DECODE1(dspbcntr, 14, 1))); printf("Display A uses sprite data buffer = %s\n", endis(!REG_DECODE1(dspacntr, 13, 1))); printf("Display B uses sprite data buffer = %s\n", endis(!REG_DECODE1(dspbcntr, 13, 1))); printf("Primary display = %c\n", REG_DECODE1(mi_arb_state, 0, 1) ? 'B' : 'A'); } static void gen4_wm_dump(void) { int i; int totalsize = IS_CRESTLINE(devid) ? 128 : 96; uint32_t dsparb; uint32_t fw1, fw2, fw3; uint32_t mi_display_power_down; uint32_t mi_arb_state; struct gmch_wm wms[MAX_PLANE] = {}; intel_register_access_init(intel_get_pci_device(), 0); dsparb = read_reg(0x70030); fw1 = read_reg(0x70034); fw2 = read_reg(0x70038); fw3 = read_reg(0x7003c); mi_display_power_down = read_reg(0x20e0); mi_arb_state = read_reg(0x20e4); intel_register_access_fini(); printf(" FW1 = 0x%08x\n", fw1); printf(" FW2 = 0x%08x\n", fw2); printf(" FW3 = 0x%08x\n", fw3); printf(" DSPARB = 0x%08x\n", dsparb); printf("MI_DISPLAY_POWER_DOWN = 0x%08x\n", mi_display_power_down); printf(" MI_ARB_STATE = 0x%08x\n", mi_arb_state); wms[PRI_A].valid = true; wms[PRI_B].valid = true; wms[PRI_C].valid = true; wms[CUR_A].valid = true; wms[CUR_B].valid = true; wms[PRI_SR].valid = true; wms[CUR_SR].valid = true; wms[PRI_HPLL_SR].valid = true; wms[CUR_HPLL_SR].valid = true; wms[PRI_A].fifo = REG_DECODE1(dsparb, 0, 7) - 0; wms[PRI_B].fifo = REG_DECODE1(dsparb, 7, 7) - wms[PRI_A].fifo; wms[PRI_C].fifo = totalsize - wms[PRI_B].fifo - wms[PRI_A].fifo - 1; wms[PRI_A].wm = REG_DECODE1(fw1, 0, 7); wms[PRI_B].wm = REG_DECODE1(fw1, 8, 7); wms[CUR_B].wm = REG_DECODE1(fw1, 16, 6); wms[PRI_SR].wm = REG_DECODE1(fw1, 23, 9); wms[CUR_A].wm = REG_DECODE1(fw2, 8, 6); wms[PRI_C].wm = REG_DECODE1(fw2, 0, 7); wms[CUR_SR].wm = REG_DECODE1(fw3, 24, 6); wms[CUR_HPLL_SR].wm = REG_DECODE1(fw3, 16, 6); wms[PRI_HPLL_SR].wm = REG_DECODE1(fw3, 0, 9); for (i = 0; i < ARRAY_SIZE(wms); i++) { if (!wms[i].valid) continue; printf("%s: WM = %d, FIFO = %d\n", plane_name[i], wms[i].wm, wms[i].fifo); } printf("CxSR = %s\n", endis(REG_DECODE1(mi_display_power_down, 15, 1))); printf("HPLL SR enable = %s\n", endis(REG_DECODE1(fw3, 31, 1))); printf("Trickle feed = %s\n", endis(!REG_DECODE1(mi_arb_state, 2, 1))); printf("Primary display = %c\n", REG_DECODE1(mi_arb_state, 0, 1) + 'A'); } static void pnv_wm_dump(void) { int i; int totalsize = 96; /* FIXME? */ uint32_t dsparb; uint32_t fw1, fw2, fw3; uint32_t mi_display_power_down; uint32_t mi_arb_state; uint32_t cbr; struct gmch_wm wms[MAX_PLANE] = {}; intel_register_access_init(intel_get_pci_device(), 0); dsparb = read_reg(0x70030); fw1 = read_reg(0x70034); fw2 = read_reg(0x70038); fw3 = read_reg(0x7003c); cbr = read_reg(0x70400); mi_display_power_down = read_reg(0x20e0); mi_arb_state = read_reg(0x20e4); intel_register_access_fini(); printf(" DSPARB = 0x%08x\n", dsparb); printf(" FW1 = 0x%08x\n", fw1); printf(" FW2 = 0x%08x\n", fw2); printf(" FW3 = 0x%08x\n", fw3); printf(" CBR = 0x%08x\n", cbr); printf("MI_DISPLAY_POWER_DOWN = 0x%08x\n", mi_display_power_down); printf(" MI_ARB_STATE = 0x%08x\n", mi_arb_state); wms[PRI_A].valid = true; wms[PRI_B].valid = true; wms[PRI_C].valid = true; wms[CUR_A].valid = true; wms[CUR_B].valid = true; wms[PRI_SR].valid = true; wms[CUR_SR].valid = true; wms[PRI_HPLL_SR].valid = true; wms[CUR_HPLL_SR].valid = true; wms[PRI_A].fifo = REG_DECODE1(dsparb, 0, 7) - 0; wms[PRI_B].fifo = REG_DECODE1(dsparb, 7, 7) - wms[PRI_A].fifo; wms[PRI_C].fifo = totalsize - wms[PRI_B].fifo - wms[PRI_A].fifo - 1; wms[PRI_A].wm = REG_DECODE1(fw1, 0, 7); wms[PRI_B].wm = REG_DECODE1(fw1, 8, 7); wms[CUR_B].wm = REG_DECODE1(fw1, 16, 6); wms[PRI_SR].wm = REG_DECODE1(fw1, 23, 9); wms[CUR_A].wm = REG_DECODE1(fw2, 8, 6); wms[PRI_C].wm = REG_DECODE1(fw2, 0, 7); switch ((REG_DECODE1(cbr, 30, 1) << 1) | REG_DECODE1(cbr, 25, 1)) { case 3: case 2: wms[PRI_SR].fifo = 8 * 1024 / 64; break; case 1: wms[PRI_SR].fifo = 16 * 1024 / 64; break; case 0: wms[PRI_SR].fifo = 32 * 1024 / 64; break; } wms[CUR_SR].wm = REG_DECODE1(fw3, 24, 6); wms[CUR_HPLL_SR].wm = REG_DECODE1(fw3, 16, 6); wms[PRI_HPLL_SR].wm = REG_DECODE1(fw3, 0, 9); for (i = 0; i < ARRAY_SIZE(wms); i++) { if (!wms[i].valid) continue; printf("%s: WM = %d, FIFO = %d\n", plane_name[i], wms[i].wm, wms[i].fifo); } printf("CxSR enable = %s\n", endis(REG_DECODE1(fw3, 30, 1))); printf("HPLL SR enable = %s\n", endis(REG_DECODE1(fw3, 31, 1))); printf("Trickle feed = %s\n", endis(!REG_DECODE1(mi_arb_state, 2, 1))); printf("Primary display = %c\n", REG_DECODE1(mi_arb_state, 0, 1) + 'A'); printf("Display plane A throttling = %s\n", endis(!REG_DECODE1(cbr, 0, 1))); printf("Display plane B throttling = %s\n", endis(!REG_DECODE1(cbr, 1, 1))); } static void gen3_wm_dump(void) { int i; int totalsize = IS_945GM(devid) ? 128 : 96; /* FIXME? */ uint32_t dsparb; uint32_t instpm; uint64_t fw_blc; uint32_t fw_blc_self; uint32_t mi_arb_state; struct gmch_wm wms[MAX_PLANE] = {}; intel_register_access_init(intel_get_pci_device(), 0); dsparb = read_reg(0x70030); instpm = read_reg(0x20c0); fw_blc = read_reg(0x20d8) | ((uint64_t)read_reg(0x20dc) << 32); fw_blc_self = read_reg(0x20e0); mi_arb_state = read_reg(0x20e4); intel_register_access_fini(); printf(" DSPARB = 0x%08x\n", dsparb); printf(" FW_BLC = 0x%016" PRIx64 "\n", fw_blc); printf(" FW_BLC_SELF = 0x%08x\n", fw_blc_self); printf("MI_ARB_STATE = 0x%08x\n", mi_arb_state); wms[PRI_A].valid = true; wms[PRI_B].valid = true; wms[PRI_C].valid = true; wms[PRI_SR].valid = true; wms[PRI_SR].wm = REG_DECODE1(fw_blc_self, 0, 8); wms[PRI_C].burst = (REG_DECODE1(fw_blc, 40, 2) + 1) * 4; wms[PRI_C].wm = REG_DECODE1(fw_blc, 32, 8); wms[PRI_B].burst = (REG_DECODE1(fw_blc, 24, 2) + 1) * 4; wms[PRI_B].wm = REG_DECODE1(fw_blc, 16, 8); wms[PRI_A].burst = (REG_DECODE1(fw_blc, 8, 2) + 1) * 4; wms[PRI_A].wm = REG_DECODE1(fw_blc, 0, 8); wms[PRI_A].fifo = REG_DECODE1(dsparb, 0, 7) - 0; wms[PRI_B].fifo = REG_DECODE1(dsparb, 7, 7) - wms[PRI_A].fifo; wms[PRI_C].fifo = totalsize - wms[PRI_B].fifo - wms[PRI_A].fifo - 1; for (i = 0; i < ARRAY_SIZE(wms); i++) { if (!wms[i].valid) continue; printf("%s: WM = %d, FIFO = %d, burst = %d\n", plane_name[i], wms[i].wm, wms[i].fifo, wms[i].burst); } /* FIXME G33 too perhaps? */ if (devid == PCI_CHIP_I945_G || devid == PCI_CHIP_I945_GM || devid == PCI_CHIP_I945_GME) { printf("CxSR = %s\n", endis(REG_DECODE1(fw_blc_self, 15, 1))); } else if (devid == PCI_CHIP_I915_GM) { printf("CxSR = %s\n", endis(REG_DECODE1(instpm, 12, 1))); } printf("Trickle feed = %s\n", endis(!REG_DECODE1(mi_arb_state, 2, 1))); printf("Primary display = %c\n", REG_DECODE1(mi_arb_state, 0, 1) + 'A'); printf("Display plane capability = %d planes\n", 3 - REG_DECODE1(mi_arb_state, 12, 2)); } static void gen2_wm_dump(void) { int i; int totalsize; uint32_t dsparb; uint32_t mem_mode; uint64_t fw_blc; uint32_t fw_blc_self; uint32_t mi_state; struct gmch_wm wms[MAX_PLANE] = {}; intel_register_access_init(intel_get_pci_device(), 0); dsparb = read_reg(0x70030); mem_mode = read_reg(0x20cc); fw_blc = read_reg(0x20d8) | ((uint64_t)read_reg(0x20dc) << 32); fw_blc_self = read_reg(0x20e0); mi_state = read_reg(0x20e4); intel_register_access_fini(); printf(" DSPARB = 0x%08x\n", dsparb); printf(" MEM_MODE = 0x%08x\n", mem_mode); printf(" FW_BLC = 0x%016" PRIx64 "\n", fw_blc); printf("FW_BLC_SELF = 0x%08x\n", fw_blc_self); printf(" MI_STATE = 0x%08x\n", mi_state); wms[PRI_C].burst = (REG_DECODE1(fw_blc, 40, 2) + 1) * 4; wms[PRI_C].wm = REG_DECODE1(fw_blc, 32, 8); wms[PRI_B].burst = (REG_DECODE1(fw_blc, 24, 2) + 1) * 4; wms[PRI_B].wm = REG_DECODE1(fw_blc, 16, 8); wms[PRI_A].burst = (REG_DECODE1(fw_blc, 8, 2) + 1) * 4; wms[PRI_A].wm = REG_DECODE1(fw_blc, 0, 8); if (devid == PCI_CHIP_845_G || devid == PCI_CHIP_I865_G) { wms[PRI_A].valid = true; wms[PRI_C].valid = true; totalsize = 96; /* FIXME? */ wms[PRI_A].fifo = REG_DECODE1(dsparb, 0, 7) - 0; wms[PRI_C].fifo = totalsize - wms[PRI_A].fifo - 1; } else { wms[PRI_A].valid = true; wms[PRI_B].valid = true; wms[PRI_C].valid = true; if (devid == PCI_CHIP_I830_M) totalsize = 288; else totalsize = 256; totalsize = (devid == PCI_CHIP_I855_GM) ? 256 : 288; wms[PRI_A].fifo = REG_DECODE1(dsparb, 0, 9) - 0; wms[PRI_B].fifo = REG_DECODE1(dsparb, 9, 9) - wms[PRI_A].fifo; wms[PRI_C].fifo = totalsize - wms[PRI_B].fifo - wms[PRI_A].fifo - 1; } for (i = 0; i < ARRAY_SIZE(wms); i++) { if (!wms[i].valid) continue; printf("%s: WM = %d, FIFO = %d, burst = %d\n", plane_name[i], wms[i].wm, wms[i].fifo, wms[i].burst); } if (devid == PCI_CHIP_I855_GM || devid == PCI_CHIP_I854_G) { printf("CxSR = %s (%d)\n", endis(REG_DECODE1(mi_state, 3, 2)), REG_DECODE1(mi_state, 3, 2)); printf("Trickle feed = %s\n", endis(!REG_DECODE1(mem_mode, 2, 1))); printf("Display round robin = %s\n", endis(REG_DECODE1(mem_mode, 14, 1))); printf("Primary display = %c\n", REG_DECODE1(mem_mode, 15, 1) + 'A'); } else { printf("Display A trickle feed = %s\n", endis(!REG_DECODE1(mem_mode, 2, 1))); printf("Display B trickle feed = %s\n", endis(!REG_DECODE1(mem_mode, 3, 1))); printf("Water mark fix = %s\n", endis(!REG_DECODE1(mem_mode, 14, 1))); } } int main(int argc, char *argv[]) { devid = intel_get_pci_device()->device_id; if (HAS_PCH_SPLIT(devid)) { ilk_wm_dump(); } else if (IS_VALLEYVIEW(devid) || IS_CHERRYVIEW(devid)) { display_base = 0x180000; vlv_wm_dump(); } else if (IS_G4X(devid)) { g4x_wm_dump(); } else if (IS_GEN4(devid)) { gen4_wm_dump(); } else if (IS_IGD(devid)) { pnv_wm_dump(); } else if (IS_GEN3(devid)) { gen3_wm_dump(); } else if (IS_GEN2(devid)) { gen2_wm_dump(); } else { printf("unknown chip 0x%x\n", devid); return 1; } return 0; } intel-gpu-tools-1.14/tools/intel_audio_dump.c0000644000175000017500000031411012665336131016255 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. * * Authors: * Zhenyu Wang * Wu Fengguang * */ #define _GNU_SOURCE #include #include #include #include #include #include #include "intel_io.h" #include "intel_reg.h" #include "intel_chipset.h" #include "drmtest.h" static uint32_t devid; static int aud_reg_base = 0; /* base address of audio registers */ static int disp_reg_base = 0; /* base address of display registers */ #define IS_HASWELL_PLUS(devid) (IS_HASWELL(devid) || IS_BROADWELL(devid)) #define BITSTO(n) (n >= sizeof(long) * 8 ? ~0 : (1UL << (n)) - 1) #define BITMASK(high, low) (BITSTO(high+1) & ~BITSTO(low)) #define BITS(reg, high, low) (((reg) & (BITMASK(high, low))) >> (low)) #define BIT(reg, n) BITS(reg, n, n) #define min_t(type, x, y) ({ \ type __min1 = (x); \ type __min2 = (y); \ __min1 < __min2 ? __min1 : __min2; }) #define OPNAME(names, index) \ names[min_t(unsigned int, index, ARRAY_SIZE(names) - 1)] #define set_aud_reg_base(base) (aud_reg_base = (base)) #define set_reg_base(base, audio_offset) \ do { \ disp_reg_base = (base); \ set_aud_reg_base((base) + (audio_offset)); \ } while (0) #define dump_reg(reg, desc) \ do { \ dword = INREG(reg); \ printf("%-21s(%#x) 0x%08x %s\n", # reg, reg, dword, desc); \ } while (0) #define dump_disp_reg(reg, desc) \ do { \ dword = INREG(disp_reg_base + reg); \ printf("%-21s(%#x) 0x%08x %s\n", # reg, reg, dword, desc); \ } while (0) #define dump_aud_reg(reg, desc) \ do { \ dword = INREG(aud_reg_base + reg); \ printf("%-21s(%#x) 0x%08x %s\n", # reg, reg, dword, desc); \ } while (0) #define read_aud_reg(reg) INREG(aud_reg_base + (reg)) static int get_num_pipes(void) { int num_pipes; if (IS_VALLEYVIEW(devid)) num_pipes = 2; /* Valleyview is Gen 7 but only has 2 pipes */ else if (IS_G4X(devid) || IS_GEN5(devid)) num_pipes = 2; else num_pipes = 3; return num_pipes; } static const char * const cts_m_value_index[] = { [0] = "CTS", [1] = "M", }; static const char * const pixel_clock[] = { [0] = "25.2 / 1.001 MHz", [1] = "25.2 MHz", [2] = "27 MHz", [3] = "27 * 1.001 MHz", [4] = "54 MHz", [5] = "54 * 1.001 MHz", [6] = "74.25 / 1.001 MHz", [7] = "74.25 MHz", [8] = "148.5 / 1.001 MHz", [9] = "148.5 MHz", [10] = "Reserved", }; static const char * const power_state[] = { [0] = "D0", [1] = "D1", [2] = "D2", [3] = "D3", }; static const char * const stream_type[] = { [0] = "default samples", [1] = "one bit stream", [2] = "DST stream", [3] = "MLP stream", [4] = "Reserved", }; static const char * const dip_port[] = { [0] = "Reserved", [1] = "Digital Port B", [2] = "Digital Port C", [3] = "Digital Port D", }; static const char * const dip_type[] = { [0] = "Audio DIP Disabled", [1] = "Audio DIP Enabled", }; static const char * const dip_gen1_state[] = { [0] = "Generic 1 (ACP) DIP Disabled", [1] = "Generic 1 (ACP) DIP Enabled", }; static const char * const dip_gen2_state[] = { [0] = "Generic 2 DIP Disabled", [1] = "Generic 2 DIP Enabled", }; static const char * const dip_index[] = { [0] = "Audio DIP", [1] = "ACP DIP", [2] = "ISRC1 DIP", [3] = "ISRC2 DIP", [4] = "Reserved", }; static const char * const dip_trans[] = { [0] = "disabled", [1] = "reserved", [2] = "send once", [3] = "best effort", }; static const char * const video_dip_index[] = { [0] = "AVI DIP", [1] = "Vendor-specific DIP", [2] = "Gamut Metadata DIP", [3] = "Source Product Description DIP", }; static const char * const video_dip_trans[] = { [0] = "send once", [1] = "send every vsync", [2] = "send at least every other vsync", [3] = "reserved", }; static const char * const trans_to_port_sel[] = { [0] = "no port", [1] = "Digital Port B", [2] = "Digital Port C", [3] = "Digital Port D", [4] = "reserved", [5] = "reserved", [6] = "reserved", [7] = "reserved", }; static const char * const ddi_mode[] = { [0] = "HDMI mode", [1] = "DVI mode", [2] = "DP SST mode", [3] = "DP MST mode", [4] = "DP FDI mode", [5] = "reserved", [6] = "reserved", [7] = "reserved", }; static const char * const bits_per_color[] = { [0] = "8 bpc", [1] = "10 bpc", [2] = "6 bpc", [3] = "12 bpc", [4] = "reserved", [5] = "reserved", [6] = "reserved", [7] = "reserved", }; static const char * const transcoder_select[] = { [0] = "Transcoder A", [1] = "Transcoder B", [2] = "Transcoder C", [3] = "reserved", }; static const char * const dp_port_width[] = { [0] = "x1 mode", [1] = "x2 mode", [2] = "reserved", [3] = "x4 mode", [4] = "reserved", [5] = "reserved", [6] = "reserved", [7] = "reserved", }; static const char * const sample_base_rate[] = { [0] = "48 kHz", [1] = "44.1 kHz", }; static const char * const sample_base_rate_mult[] = { [0] = "x1 (48 kHz, 44.1 kHz or less)", [1] = "x2 (96 kHz, 88.2 kHz, 32 kHz)", [2] = "x3 (144 kHz)", [3] = "x4 (192 kHz, 176.4 kHz)", [4] = "Reserved", }; static const char * const sample_base_rate_divisor[] = { [0] = "Divided by 1 (48 kHz, 44.1 kHz)", [1] = "Divided by 2 (24 kHz, 22.05 kHz)", [2] = "Divided by 3 (16 kHz, 32 kHz)", [3] = "Divided by 4 (11.025 kHz)", [4] = "Divided by 5 (9.6 kHz)", [5] = "Divided by 6 (8 kHz)", [6] = "Divided by 7", [7] = "Divided by 8 (6 kHz)", }; static const char * const connect_list_form[] = { [0] = "Short Form", [1] = "Long Form", }; static const char * const bits_per_sample[] = { [0] = "reserved", [1] = "16 bits", [2] = "24 bits", [3] = "32 bits", [4] = "20 bits", [5] = "reserved", }; static const char * const sdvo_hdmi_encoding[] = { [0] = "SDVO", [1] = "reserved", [2] = "TMDS", [3] = "reserved", }; static const char * const n_index_value[] = { [0] = "HDMI", [1] = "DisplayPort", }; static const char * const immed_result_valid[] = { [0] = "No immediate response is available", [1] = "Immediate response is available", }; static const char * const immed_cmd_busy[] = { [0] = "Can accept an immediate command", [1] = "Immediate command is available", }; static const char * const vanilla_dp12_en[] = { [0] = "DP 1.2 features are disabled", [1] = "DP 1.2 features are enabled", }; static const char * const vanilla_3_widgets_en[] = { [0] = "2nd & 3rd pin/convertor widgets are disabled", [1] = "All three pin/convertor widgets are enabled", }; static const char * const block_audio[] = { [0] = "Allow audio data to reach the port", [1] = "Block audio data from reaching the port", }; static const char * const dis_eld_valid_pulse_trans[] = { [0] = "Enable ELD valid pulse transition when unsol is disabled", [1] = "Disable ELD valid pulse transition when unsol is disabled", }; static const char * const dis_pd_pulse_trans[] = { [0] = "Enable Presense Detect pulse transition when unsol is disabled", [1] = "Disable Presense Detect pulse transition when unsol is disabled", }; static const char * const dis_ts_delta_err[] = { [0] = "Enable timestamp delta error for 32/44 KHz", [1] = "Disable timestamp delta error for 32/44 KHz", }; static const char * const dis_ts_fix_dp_hbr[] = { [0] = "Enable timestamp fix for DP HBR", [1] = "Disable timestamp fix for DP HBR", }; static const char * const pattern_gen_8_ch_en[] = { [0] = "Disable 8-channel pattern generator", [1] = "Enable 8-channel pattern generator", }; static const char * const pattern_gen_2_ch_en[] = { [0] = "Disable 2-channel pattern generator", [1] = "Enable 2-channel pattern generator", }; static const char * const fabric_32_44_dis[] = { [0] = "Allow sample fabrication for 32/44 KHz", [1] = "Disable sample fabrication for 32/44 KHz", }; static const char * const epss_dis[] = { [0] = "Allow audio EPSS", [1] = "Disable audio EPSS", }; static const char * const ts_test_mode[] = { [0] = "Default time stamp mode", [1] = "Audio time stamp test mode for audio only feature", }; static const char * const en_mmio_program[] = { [0] = "Programming by HD-Audio Azalia", [1] = "Programming by MMIO debug registers", }; static const char * const sdi_operate_mode[] = { [0] = "2T mode with sdi data held for 2 bit clocks", [1] = "1T mode with sdi data held for 1 bit clock only", }; static const char * const bclk_96mhz[] = { [0] = "iDisplay audio link 96MHz bclk off", [1] = "iDisplay audio link 96MHz bclk on", }; static const char * const bclk_48mhz[] = { [0] = "iDisplay audio link 48MHz bclk off", [1] = "iDisplay audio link 48MHz bclk on", }; static const char * const audio_dp_dip_status[] = { [0] = "audfc dp fifo full", [1] = "audfc dp fifo empty", [2] = "audfc dp fifo overrun", [3] = "audfc dip fifo full", [4] = "audfc dp fifo empty cd", [5] = "audfb dp fifo full", [6] = "audfb dp fifo empty", [7] = "audfb dp fifo overrun", [8] = "audfb dip fifo full", [9] = "audfb dp fifo empty cd", [10] = "audfa dp fifo full", [11] = "audfa dp fifo empty", [12] = "audfa dp fifo overrun", [13] = "audfa dip fifo full", [14] = "audfa dp fifo empty cd", [15] = "Pipe c audio overflow", [16] = "Pipe b audio overflow", [17] = "Pipe a audio overflow", [31] = 0, }; #undef TRANSCODER_A #undef TRANSCODER_B #undef TRANSCODER_C enum { TRANSCODER_A = 0, TRANSCODER_B, TRANSCODER_C, }; enum { PIPE_A = 0, PIPE_B, PIPE_C, }; enum { PORT_A = 0, PORT_B, PORT_C, PORT_D, PORT_E, }; enum { CONVERTER_1 = 0, CONVERTER_2, CONVERTER_3, }; static void do_self_tests(void) { if (BIT(1, 0) != 1) exit(1); if (BIT(0x80000000, 31) != 1) exit(2); if (BITS(0xc0000000, 31, 30) != 3) exit(3); } /* * EagleLake registers */ #define AUD_CONFIG 0x62000 #define AUD_DEBUG 0x62010 #define AUD_VID_DID 0x62020 #define AUD_RID 0x62024 #define AUD_SUBN_CNT 0x62028 #define AUD_FUNC_GRP 0x62040 #define AUD_SUBN_CNT2 0x62044 #define AUD_GRP_CAP 0x62048 #define AUD_PWRST 0x6204c #define AUD_SUPPWR 0x62050 #define AUD_SID 0x62054 #define AUD_OUT_CWCAP 0x62070 #define AUD_OUT_PCMSIZE 0x62074 #define AUD_OUT_STR 0x62078 #define AUD_OUT_DIG_CNVT 0x6207c #define AUD_OUT_CH_STR 0x62080 #define AUD_OUT_STR_DESC 0x62084 #define AUD_PINW_CAP 0x620a0 #define AUD_PIN_CAP 0x620a4 #define AUD_PINW_CONNLNG 0x620a8 #define AUD_PINW_CONNLST 0x620ac #define AUD_PINW_CNTR 0x620b0 #define AUD_PINW_UNSOLRESP 0x620b8 #define AUD_CNTL_ST 0x620b4 #define AUD_PINW_CONFIG 0x620bc #define AUD_HDMIW_STATUS 0x620d4 #define AUD_HDMIW_HDMIEDID 0x6210c #define AUD_HDMIW_INFOFR 0x62118 #define AUD_CONV_CHCNT 0x62120 #define AUD_CTS_ENABLE 0x62128 #define VIDEO_DIP_CTL 0x61170 #define VIDEO_DIP_ENABLE (1<<31) #define VIDEO_DIP_ENABLE_AVI (1<<21) #define VIDEO_DIP_ENABLE_VENDOR (1<<22) #define VIDEO_DIP_ENABLE_SPD (1<<24) #define VIDEO_DIP_BUF_AVI (0<<19) #define VIDEO_DIP_BUF_VENDOR (1<<19) #define VIDEO_DIP_BUF_SPD (3<<19) #define VIDEO_DIP_TRANS_ONCE (0<<16) #define VIDEO_DIP_TRANS_1 (1<<16) #define VIDEO_DIP_TRANS_2 (2<<16) #define AUDIO_HOTPLUG_EN (1<<24) static void dump_eaglelake(void) { uint32_t dword; int i; /* printf("%-18s %8s %s\n\n", "register name", "raw value", "description"); */ dump_reg(VIDEO_DIP_CTL, "Video DIP Control"); dump_reg(SDVOB, "Digital Display Port B Control Register"); dump_reg(SDVOC, "Digital Display Port C Control Register"); dump_reg(PORT_HOTPLUG_EN, "Hot Plug Detect Enable"); dump_reg(AUD_CONFIG, "Audio Configuration"); dump_reg(AUD_DEBUG, "Audio Debug"); dump_reg(AUD_VID_DID, "Audio Vendor ID / Device ID"); dump_reg(AUD_RID, "Audio Revision ID"); dump_reg(AUD_SUBN_CNT, "Audio Subordinate Node Count"); dump_reg(AUD_FUNC_GRP, "Audio Function Group Type"); dump_reg(AUD_SUBN_CNT2, "Audio Subordinate Node Count"); dump_reg(AUD_GRP_CAP, "Audio Function Group Capabilities"); dump_reg(AUD_PWRST, "Audio Power State"); dump_reg(AUD_SUPPWR, "Audio Supported Power States"); dump_reg(AUD_SID, "Audio Root Node Subsystem ID"); dump_reg(AUD_OUT_CWCAP, "Audio Output Converter Widget Capabilities"); dump_reg(AUD_OUT_PCMSIZE, "Audio PCM Size and Rates"); dump_reg(AUD_OUT_STR, "Audio Stream Formats"); dump_reg(AUD_OUT_DIG_CNVT, "Audio Digital Converter"); dump_reg(AUD_OUT_CH_STR, "Audio Channel ID and Stream ID"); dump_reg(AUD_OUT_STR_DESC, "Audio Stream Descriptor Format"); dump_reg(AUD_PINW_CAP, "Audio Pin Complex Widget Capabilities"); dump_reg(AUD_PIN_CAP, "Audio Pin Capabilities"); dump_reg(AUD_PINW_CONNLNG, "Audio Connection List Length"); dump_reg(AUD_PINW_CONNLST, "Audio Connection List Entry"); dump_reg(AUD_PINW_CNTR, "Audio Pin Widget Control"); dump_reg(AUD_PINW_UNSOLRESP, "Audio Unsolicited Response Enable"); dump_reg(AUD_CNTL_ST, "Audio Control State Register"); dump_reg(AUD_PINW_CONFIG, "Audio Configuration Default"); dump_reg(AUD_HDMIW_STATUS, "Audio HDMI Status"); dump_reg(AUD_HDMIW_HDMIEDID, "Audio HDMI Data EDID Block"); dump_reg(AUD_HDMIW_INFOFR, "Audio HDMI Widget Data Island Packet"); dump_reg(AUD_CONV_CHCNT, "Audio Converter Channel Count"); dump_reg(AUD_CTS_ENABLE, "Audio CTS Programming Enable"); printf("\nDetails:\n\n"); dword = INREG(AUD_VID_DID); printf("AUD_VID_DID vendor id\t\t\t0x%x\n", dword >> 16); printf("AUD_VID_DID device id\t\t\t0x%x\n", dword & 0xffff); dword = INREG(AUD_RID); printf("AUD_RID major revision\t\t\t0x%lx\n", BITS(dword, 23, 20)); printf("AUD_RID minor revision\t\t\t0x%lx\n", BITS(dword, 19, 16)); printf("AUD_RID revision id\t\t\t0x%lx\n", BITS(dword, 15, 8)); printf("AUD_RID stepping id\t\t\t0x%lx\n", BITS(dword, 7, 0)); dword = INREG(SDVOB); printf("SDVOB enable\t\t\t\t%u\n", !!(dword & SDVO_ENABLE)); printf("SDVOB HDMI encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_HDMI)); printf("SDVOB SDVO encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_SDVO)); printf("SDVOB null packets\t\t\t%u\n", !!(dword & SDVO_NULL_PACKETS_DURING_VSYNC)); printf("SDVOB audio enabled\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE)); dword = INREG(SDVOC); printf("SDVOC enable\t\t\t\t%u\n", !!(dword & SDVO_ENABLE)); printf("SDVOC HDMI encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_HDMI)); printf("SDVOC SDVO encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_SDVO)); printf("SDVOC null packets\t\t\t%u\n", !!(dword & SDVO_NULL_PACKETS_DURING_VSYNC)); printf("SDVOC audio enabled\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE)); dword = INREG(PORT_HOTPLUG_EN); printf("PORT_HOTPLUG_EN DisplayPort/HDMI port B\t%ld\n", BIT(dword, 29)), printf("PORT_HOTPLUG_EN DisplayPort/HDMI port C\t%ld\n", BIT(dword, 28)), printf("PORT_HOTPLUG_EN DisplayPort port D\t%ld\n", BIT(dword, 27)), printf("PORT_HOTPLUG_EN SDVOB\t\t\t%ld\n", BIT(dword, 26)), printf("PORT_HOTPLUG_EN SDVOC\t\t\t%ld\n", BIT(dword, 25)), printf("PORT_HOTPLUG_EN audio\t\t\t%ld\n", BIT(dword, 24)), printf("PORT_HOTPLUG_EN TV\t\t\t%ld\n", BIT(dword, 23)), printf("PORT_HOTPLUG_EN CRT\t\t\t%ld\n", BIT(dword, 9)), dword = INREG(VIDEO_DIP_CTL); printf("VIDEO_DIP_CTL enable graphics DIP\t%ld\n", BIT(dword, 31)), printf("VIDEO_DIP_CTL port select\t\t[0x%lx] %s\n", BITS(dword, 30, 29), dip_port[BITS(dword, 30, 29)]); printf("VIDEO_DIP_CTL DIP buffer trans active\t%lu\n", BIT(dword, 28)); printf("VIDEO_DIP_CTL AVI DIP enabled\t\t%lu\n", BIT(dword, 21)); printf("VIDEO_DIP_CTL vendor DIP enabled\t%lu\n", BIT(dword, 22)); printf("VIDEO_DIP_CTL SPD DIP enabled\t\t%lu\n", BIT(dword, 24)); printf("VIDEO_DIP_CTL DIP buffer index\t\t[0x%lx] %s\n", BITS(dword, 20, 19), video_dip_index[BITS(dword, 20, 19)]); printf("VIDEO_DIP_CTL DIP trans freq\t\t[0x%lx] %s\n", BITS(dword, 17, 16), video_dip_trans[BITS(dword, 17, 16)]); printf("VIDEO_DIP_CTL DIP buffer size\t\t%lu\n", BITS(dword, 11, 8)); printf("VIDEO_DIP_CTL DIP address\t\t%lu\n", BITS(dword, 3, 0)); dword = INREG(AUD_CONFIG); printf("AUD_CONFIG pixel clock\t\t\t[0x%lx] %s\n", BITS(dword, 19, 16), OPNAME(pixel_clock, BITS(dword, 19, 16))); printf("AUD_CONFIG fabrication enabled\t\t%lu\n", BITS(dword, 2, 2)); printf("AUD_CONFIG professional use allowed\t%lu\n", BIT(dword, 1)); printf("AUD_CONFIG fuse enabled\t\t\t%lu\n", BIT(dword, 0)); dword = INREG(AUD_DEBUG); printf("AUD_DEBUG function reset\t\t%lu\n", BIT(dword, 0)); dword = INREG(AUD_SUBN_CNT); printf("AUD_SUBN_CNT starting node number\t0x%lx\n", BITS(dword, 23, 16)); printf("AUD_SUBN_CNT total number of nodes\t0x%lx\n", BITS(dword, 7, 0)); dword = INREG(AUD_SUBN_CNT2); printf("AUD_SUBN_CNT2 starting node number\t0x%lx\n", BITS(dword, 24, 16)); printf("AUD_SUBN_CNT2 total number of nodes\t0x%lx\n", BITS(dword, 7, 0)); dword = INREG(AUD_FUNC_GRP); printf("AUD_FUNC_GRP unsol capable\t\t%lu\n", BIT(dword, 8)); printf("AUD_FUNC_GRP node type\t\t\t0x%lx\n", BITS(dword, 7, 0)); dword = INREG(AUD_GRP_CAP); printf("AUD_GRP_CAP beep 0\t\t\t%lu\n", BIT(dword, 16)); printf("AUD_GRP_CAP input delay\t\t\t%lu\n", BITS(dword, 11, 8)); printf("AUD_GRP_CAP output delay\t\t%lu\n", BITS(dword, 3, 0)); dword = INREG(AUD_PWRST); printf("AUD_PWRST device power state\t\t%s\n", power_state[BITS(dword, 5, 4)]); printf("AUD_PWRST device power state setting\t%s\n", power_state[BITS(dword, 1, 0)]); dword = INREG(AUD_SUPPWR); printf("AUD_SUPPWR support D0\t\t\t%lu\n", BIT(dword, 0)); printf("AUD_SUPPWR support D1\t\t\t%lu\n", BIT(dword, 1)); printf("AUD_SUPPWR support D2\t\t\t%lu\n", BIT(dword, 2)); printf("AUD_SUPPWR support D3\t\t\t%lu\n", BIT(dword, 3)); dword = INREG(AUD_OUT_CWCAP); printf("AUD_OUT_CWCAP widget type\t\t0x%lx\n", BITS(dword, 23, 20)); printf("AUD_OUT_CWCAP sample delay\t\t0x%lx\n", BITS(dword, 19, 16)); printf("AUD_OUT_CWCAP channel count\t\t%lu\n", BITS(dword, 15, 13) * 2 + BIT(dword, 0) + 1); printf("AUD_OUT_CWCAP L-R swap\t\t\t%lu\n", BIT(dword, 11)); printf("AUD_OUT_CWCAP power control\t\t%lu\n", BIT(dword, 10)); printf("AUD_OUT_CWCAP digital\t\t\t%lu\n", BIT(dword, 9)); printf("AUD_OUT_CWCAP conn list\t\t\t%lu\n", BIT(dword, 8)); printf("AUD_OUT_CWCAP unsol\t\t\t%lu\n", BIT(dword, 7)); printf("AUD_OUT_CWCAP mute\t\t\t%lu\n", BIT(dword, 5)); printf("AUD_OUT_CWCAP format override\t\t%lu\n", BIT(dword, 4)); printf("AUD_OUT_CWCAP amp param override\t%lu\n", BIT(dword, 3)); printf("AUD_OUT_CWCAP out amp present\t\t%lu\n", BIT(dword, 2)); printf("AUD_OUT_CWCAP in amp present\t\t%lu\n", BIT(dword, 1)); dword = INREG(AUD_OUT_DIG_CNVT); printf("AUD_OUT_DIG_CNVT SPDIF category\t\t0x%lx\n", BITS(dword, 14, 8)); printf("AUD_OUT_DIG_CNVT SPDIF level\t\t%lu\n", BIT(dword, 7)); printf("AUD_OUT_DIG_CNVT professional\t\t%lu\n", BIT(dword, 6)); printf("AUD_OUT_DIG_CNVT non PCM\t\t%lu\n", BIT(dword, 5)); printf("AUD_OUT_DIG_CNVT copyright asserted\t%lu\n", BIT(dword, 4)); printf("AUD_OUT_DIG_CNVT filter preemphasis\t%lu\n", BIT(dword, 3)); printf("AUD_OUT_DIG_CNVT validity config\t%lu\n", BIT(dword, 2)); printf("AUD_OUT_DIG_CNVT validity flag\t\t%lu\n", BIT(dword, 1)); printf("AUD_OUT_DIG_CNVT digital enable\t\t%lu\n", BIT(dword, 0)); dword = INREG(AUD_OUT_CH_STR); printf("AUD_OUT_CH_STR stream id\t\t0x%lx\n", BITS(dword, 7, 4)); printf("AUD_OUT_CH_STR lowest channel\t\t%lu\n", BITS(dword, 3, 0)); dword = INREG(AUD_OUT_STR_DESC); printf("AUD_OUT_STR_DESC stream channels\t%lu\n", BITS(dword, 3, 0) + 1); printf("AUD_OUT_STR_DESC Bits per Sample\t[%#lx] %s\n", BITS(dword, 6, 4), OPNAME(bits_per_sample, BITS(dword, 6, 4))); dword = INREG(AUD_PINW_CAP); printf("AUD_PINW_CAP widget type\t\t0x%lx\n", BITS(dword, 23, 20)); printf("AUD_PINW_CAP sample delay\t\t0x%lx\n", BITS(dword, 19, 16)); printf("AUD_PINW_CAP channel count\t\t%lu\n", BITS(dword, 15, 13) * 2 + BIT(dword, 0) + 1); printf("AUD_PINW_CAP HDCP\t\t\t%lu\n", BIT(dword, 12)); printf("AUD_PINW_CAP L-R swap\t\t\t%lu\n", BIT(dword, 11)); printf("AUD_PINW_CAP power control\t\t%lu\n", BIT(dword, 10)); printf("AUD_PINW_CAP digital\t\t\t%lu\n", BIT(dword, 9)); printf("AUD_PINW_CAP conn list\t\t\t%lu\n", BIT(dword, 8)); printf("AUD_PINW_CAP unsol\t\t\t%lu\n", BIT(dword, 7)); printf("AUD_PINW_CAP mute\t\t\t%lu\n", BIT(dword, 5)); printf("AUD_PINW_CAP format override\t\t%lu\n", BIT(dword, 4)); printf("AUD_PINW_CAP amp param override\t\t%lu\n", BIT(dword, 3)); printf("AUD_PINW_CAP out amp present\t\t%lu\n", BIT(dword, 2)); printf("AUD_PINW_CAP in amp present\t\t%lu\n", BIT(dword, 1)); dword = INREG(AUD_PIN_CAP); printf("AUD_PIN_CAP EAPD\t\t\t%lu\n", BIT(dword, 16)); printf("AUD_PIN_CAP HDMI\t\t\t%lu\n", BIT(dword, 7)); printf("AUD_PIN_CAP output\t\t\t%lu\n", BIT(dword, 4)); printf("AUD_PIN_CAP presence detect\t\t%lu\n", BIT(dword, 2)); dword = INREG(AUD_PINW_CNTR); printf("AUD_PINW_CNTR mute status\t\t%lu\n", BIT(dword, 8)); printf("AUD_PINW_CNTR out enable\t\t%lu\n", BIT(dword, 6)); printf("AUD_PINW_CNTR amp mute status\t\t%lu\n", BIT(dword, 8)); printf("AUD_PINW_CNTR amp mute status\t\t%lu\n", BIT(dword, 8)); printf("AUD_PINW_CNTR stream type\t\t[0x%lx] %s\n", BITS(dword, 2, 0), OPNAME(stream_type, BITS(dword, 2, 0))); dword = INREG(AUD_PINW_UNSOLRESP); printf("AUD_PINW_UNSOLRESP enable unsol resp\t%lu\n", BIT(dword, 31)); dword = INREG(AUD_CNTL_ST); printf("AUD_CNTL_ST DIP audio enabled\t\t%lu\n", BIT(dword, 21)); printf("AUD_CNTL_ST DIP ACP enabled\t\t%lu\n", BIT(dword, 22)); printf("AUD_CNTL_ST DIP ISRCx enabled\t\t%lu\n", BIT(dword, 23)); printf("AUD_CNTL_ST DIP port select\t\t[0x%lx] %s\n", BITS(dword, 30, 29), dip_port[BITS(dword, 30, 29)]); printf("AUD_CNTL_ST DIP buffer index\t\t[0x%lx] %s\n", BITS(dword, 20, 18), OPNAME(dip_index, BITS(dword, 20, 18))); printf("AUD_CNTL_ST DIP trans freq\t\t[0x%lx] %s\n", BITS(dword, 17, 16), dip_trans[BITS(dword, 17, 16)]); printf("AUD_CNTL_ST DIP address\t\t\t%lu\n", BITS(dword, 3, 0)); printf("AUD_CNTL_ST CP ready\t\t\t%lu\n", BIT(dword, 15)); printf("AUD_CNTL_ST ELD valid\t\t\t%lu\n", BIT(dword, 14)); printf("AUD_CNTL_ST ELD ack\t\t\t%lu\n", BIT(dword, 4)); printf("AUD_CNTL_ST ELD bufsize\t\t\t%lu\n", BITS(dword, 13, 9)); printf("AUD_CNTL_ST ELD address\t\t\t%lu\n", BITS(dword, 8, 5)); dword = INREG(AUD_HDMIW_STATUS); printf("AUD_HDMIW_STATUS CDCLK/DOTCLK underrun\t%lu\n", BIT(dword, 31)); printf("AUD_HDMIW_STATUS CDCLK/DOTCLK overrun\t%lu\n", BIT(dword, 30)); printf("AUD_HDMIW_STATUS BCLK/CDCLK underrun\t%lu\n", BIT(dword, 29)); printf("AUD_HDMIW_STATUS BCLK/CDCLK overrun\t%lu\n", BIT(dword, 28)); dword = INREG(AUD_CONV_CHCNT); printf("AUD_CONV_CHCNT HDMI HBR enabled\t\t%lu\n", BITS(dword, 15, 14)); printf("AUD_CONV_CHCNT HDMI channel count\t%lu\n", BITS(dword, 11, 8) + 1); printf("AUD_CONV_CHCNT HDMI channel mapping:\n"); for (i = 0; i < 8; i++) { OUTREG(AUD_CONV_CHCNT, i); dword = INREG(AUD_CONV_CHCNT); printf("\t\t\t\t\t[0x%x] %u => %lu\n", dword, i, BITS(dword, 7, 4)); } printf("AUD_HDMIW_HDMIEDID HDMI ELD:\n\t"); dword = INREG(AUD_CNTL_ST); dword &= ~BITMASK(8, 5); OUTREG(AUD_CNTL_ST, dword); for (i = 0; i < BITS(dword, 14, 10) / 4; i++) printf("%08x ", htonl(INREG(AUD_HDMIW_HDMIEDID))); printf("\n"); printf("AUD_HDMIW_INFOFR HDMI audio Infoframe:\n\t"); dword = INREG(AUD_CNTL_ST); dword &= ~BITMASK(20, 18); dword &= ~BITMASK(3, 0); OUTREG(AUD_CNTL_ST, dword); for (i = 0; i < 8; i++) printf("%08x ", htonl(INREG(AUD_HDMIW_INFOFR))); printf("\n"); } #undef AUD_RID #undef AUD_VID_DID #undef AUD_PWRST #undef AUD_OUT_CH_STR #undef AUD_HDMIW_STATUS /* * CougarPoint registers */ #define DP_CTL_B 0xE4100 #define DP_CTL_C 0xE4200 #define DP_AUX_CTL_C 0xE4210 #define DP_AUX_TST_C 0xE4228 #define SPORT_DDI_CRC_C 0xE4250 #define SPORT_DDI_CRC_R 0xE4264 #define DP_CTL_D 0xE4300 #define DP_AUX_CTL_D 0xE4310 #define DP_AUX_TST_D 0xE4328 #define SPORT_DDI_CRC_CTL_D 0xE4350 #define AUD_CONFIG_A 0xE5000 #define AUD_MISC_CTRL_A 0xE5010 #define AUD_VID_DID 0xE5020 #define AUD_RID 0xE5024 #define AUD_CTS_ENABLE_A 0xE5028 #define AUD_PWRST 0xE504C #define AUD_HDMIW_HDMIEDID_A 0xE5050 #define AUD_HDMIW_INFOFR_A 0xE5054 #define AUD_PORT_EN_HD_CFG 0xE507C #define AUD_OUT_DIG_CNVT_A 0xE5080 #define AUD_OUT_STR_DESC_A 0xE5084 #define AUD_OUT_CH_STR 0xE5088 #define AUD_PINW_CONNLNG_LIST 0xE50A8 #define AUD_PINW_CONNLNG_SEL 0xE50AC #define AUD_CNTL_ST_A 0xE50B4 #define AUD_CNTRL_ST2 0xE50C0 #define AUD_CNTRL_ST3 0xE50C4 #define AUD_HDMIW_STATUS 0xE50D4 #define AUD_CONFIG_B 0xE5100 #define AUD_MISC_CTRL_B 0xE5110 #define AUD_CTS_ENABLE_B 0xE5128 #define AUD_HDMIW_HDMIEDID_B 0xE5150 #define AUD_HDMIW_INFOFR_B 0xE5154 #define AUD_OUT_DIG_CNVT_B 0xE5180 #define AUD_OUT_STR_DESC_B 0xE5184 #define AUD_CNTL_ST_B 0xE51B4 #define AUD_CONFIG_C 0xE5200 #define AUD_MISC_CTRL_C 0xE5210 #define AUD_CTS_ENABLE_C 0xE5228 #define AUD_HDMIW_HDMIEDID_C 0xE5250 #define AUD_HDMIW_INFOFR_C 0xE5254 #define AUD_OUT_DIG_CNVT_C 0xE5280 #define AUD_OUT_STR_DESC_C 0xE5284 #define AUD_CNTL_ST_C 0xE52B4 #define AUD_CONFIG_D 0xE5300 #define AUD_MISC_CTRL_D 0xE5310 #define AUD_CTS_ENABLE_D 0xE5328 #define AUD_HDMIW_HDMIEDID_D 0xE5350 #define AUD_HDMIW_INFOFR_D 0xE5354 #define AUD_OUT_DIG_CNVT_D 0xE5380 #define AUD_OUT_STR_DESC_D 0xE5384 #define AUD_CNTL_ST_D 0xE53B4 #define VIDEO_DIP_CTL_A 0xE0200 #define VIDEO_DIP_CTL_B 0xE1200 #define VIDEO_DIP_CTL_C 0xE2200 #define VIDEO_DIP_CTL_D 0xE3200 static void dump_cpt(void) { uint32_t dword; int i; dump_reg(HDMIB, "sDVO/HDMI Port B Control"); dump_reg(HDMIC, "HDMI Port C Control"); dump_reg(HDMID, "HDMI Port D Control"); dump_reg(DP_CTL_B, "DisplayPort B Control"); dump_reg(DP_CTL_C, "DisplayPort C Control"); dump_reg(DP_CTL_D, "DisplayPort D Control"); dump_reg(TRANS_DP_CTL_A, "Transcoder A DisplayPort Control"); dump_reg(TRANS_DP_CTL_B, "Transcoder B DisplayPort Control"); dump_reg(TRANS_DP_CTL_C, "Transcoder C DisplayPort Control"); dump_reg(AUD_CONFIG_A, "Audio Configuration - Transcoder A"); dump_reg(AUD_CONFIG_B, "Audio Configuration - Transcoder B"); dump_reg(AUD_CONFIG_C, "Audio Configuration - Transcoder C"); dump_reg(AUD_CTS_ENABLE_A, "Audio CTS Programming Enable - Transcoder A"); dump_reg(AUD_CTS_ENABLE_B, "Audio CTS Programming Enable - Transcoder B"); dump_reg(AUD_CTS_ENABLE_C, "Audio CTS Programming Enable - Transcoder C"); dump_reg(AUD_MISC_CTRL_A, "Audio MISC Control for Transcoder A"); dump_reg(AUD_MISC_CTRL_B, "Audio MISC Control for Transcoder B"); dump_reg(AUD_MISC_CTRL_C, "Audio MISC Control for Transcoder C"); dump_reg(AUD_VID_DID, "Audio Vendor ID / Device ID"); dump_reg(AUD_RID, "Audio Revision ID"); dump_reg(AUD_PWRST, "Audio Power State (Function Group, Convertor, Pin Widget)"); dump_reg(AUD_PORT_EN_HD_CFG, "Audio Port Enable HDAudio Config"); dump_reg(AUD_OUT_DIG_CNVT_A, "Audio Digital Converter - Conv A"); dump_reg(AUD_OUT_DIG_CNVT_B, "Audio Digital Converter - Conv B"); dump_reg(AUD_OUT_DIG_CNVT_C, "Audio Digital Converter - Conv C"); dump_reg(AUD_OUT_CH_STR, "Audio Channel ID and Stream ID"); dump_reg(AUD_OUT_STR_DESC_A, "Audio Stream Descriptor Format - Conv A"); dump_reg(AUD_OUT_STR_DESC_B, "Audio Stream Descriptor Format - Conv B"); dump_reg(AUD_OUT_STR_DESC_C, "Audio Stream Descriptor Format - Conv C"); dump_reg(AUD_PINW_CONNLNG_LIST, "Audio Connection List"); dump_reg(AUD_PINW_CONNLNG_SEL, "Audio Connection Select"); dump_reg(AUD_CNTL_ST_A, "Audio Control State Register - Transcoder A"); dump_reg(AUD_CNTL_ST_B, "Audio Control State Register - Transcoder B"); dump_reg(AUD_CNTL_ST_C, "Audio Control State Register - Transcoder C"); dump_reg(AUD_CNTRL_ST2, "Audio Control State 2"); dump_reg(AUD_CNTRL_ST3, "Audio Control State 3"); dump_reg(AUD_HDMIW_STATUS, "Audio HDMI Status"); dump_reg(AUD_HDMIW_HDMIEDID_A, "HDMI Data EDID Block - Transcoder A"); dump_reg(AUD_HDMIW_HDMIEDID_B, "HDMI Data EDID Block - Transcoder B"); dump_reg(AUD_HDMIW_HDMIEDID_C, "HDMI Data EDID Block - Transcoder C"); dump_reg(AUD_HDMIW_INFOFR_A, "Audio Widget Data Island Packet - Transcoder A"); dump_reg(AUD_HDMIW_INFOFR_B, "Audio Widget Data Island Packet - Transcoder B"); dump_reg(AUD_HDMIW_INFOFR_C, "Audio Widget Data Island Packet - Transcoder C"); printf("\nDetails:\n\n"); dword = INREG(VIDEO_DIP_CTL_A); printf("VIDEO_DIP_CTL_A Enable_Graphics_DIP\t\t\t%ld\n", BIT(dword, 31)), printf("VIDEO_DIP_CTL_A GCP_DIP_enable\t\t\t\t%ld\n", BIT(dword, 25)), printf("VIDEO_DIP_CTL_A Video_DIP_type_enable AVI\t\t%lu\n", BIT(dword, 21)); printf("VIDEO_DIP_CTL_A Video_DIP_type_enable Vendor\t\t%lu\n", BIT(dword, 22)); printf("VIDEO_DIP_CTL_A Video_DIP_type_enable Gamut\t\t%lu\n", BIT(dword, 23)); printf("VIDEO_DIP_CTL_A Video_DIP_type_enable Source \t\t%lu\n", BIT(dword, 24)); printf("VIDEO_DIP_CTL_A Video_DIP_buffer_index\t\t\t[0x%lx] %s\n", BITS(dword, 20, 19), video_dip_index[BITS(dword, 20, 19)]); printf("VIDEO_DIP_CTL_A Video_DIP_frequency\t\t\t[0x%lx] %s\n", BITS(dword, 17, 16), video_dip_trans[BITS(dword, 17, 16)]); printf("VIDEO_DIP_CTL_A Video_DIP_buffer_size\t\t\t%lu\n", BITS(dword, 11, 8)); printf("VIDEO_DIP_CTL_A Video_DIP_access_address\t\t%lu\n", BITS(dword, 3, 0)); dword = INREG(VIDEO_DIP_CTL_B); printf("VIDEO_DIP_CTL_B Enable_Graphics_DIP\t\t\t%ld\n", BIT(dword, 31)), printf("VIDEO_DIP_CTL_B GCP_DIP_enable\t\t\t\t%ld\n", BIT(dword, 25)), printf("VIDEO_DIP_CTL_B Video_DIP_type_enable AVI\t\t%lu\n", BIT(dword, 21)); printf("VIDEO_DIP_CTL_B Video_DIP_type_enable Vendor\t\t%lu\n", BIT(dword, 22)); printf("VIDEO_DIP_CTL_B Video_DIP_type_enable Gamut\t\t%lu\n", BIT(dword, 23)); printf("VIDEO_DIP_CTL_B Video_DIP_type_enable Source \t\t%lu\n", BIT(dword, 24)); printf("VIDEO_DIP_CTL_B Video_DIP_buffer_index\t\t\t[0x%lx] %s\n", BITS(dword, 20, 19), video_dip_index[BITS(dword, 20, 19)]); printf("VIDEO_DIP_CTL_B Video_DIP_frequency\t\t\t[0x%lx] %s\n", BITS(dword, 17, 16), video_dip_trans[BITS(dword, 17, 16)]); printf("VIDEO_DIP_CTL_B Video_DIP_buffer_size\t\t\t%lu\n", BITS(dword, 11, 8)); printf("VIDEO_DIP_CTL_B Video_DIP_access_address\t\t%lu\n", BITS(dword, 3, 0)); dword = INREG(VIDEO_DIP_CTL_C); printf("VIDEO_DIP_CTL_C Enable_Graphics_DIP\t\t\t%ld\n", BIT(dword, 31)), printf("VIDEO_DIP_CTL_C GCP_DIP_enable\t\t\t\t%ld\n", BIT(dword, 25)), printf("VIDEO_DIP_CTL_C Video_DIP_type_enable AVI\t\t%lu\n", BIT(dword, 21)); printf("VIDEO_DIP_CTL_C Video_DIP_type_enable Vendor\t\t%lu\n", BIT(dword, 22)); printf("VIDEO_DIP_CTL_C Video_DIP_type_enable Gamut\t\t%lu\n", BIT(dword, 23)); printf("VIDEO_DIP_CTL_C Video_DIP_type_enable Source \t\t%lu\n", BIT(dword, 24)); printf("VIDEO_DIP_CTL_C Video_DIP_buffer_index\t\t\t[0x%lx] %s\n", BITS(dword, 20, 19), video_dip_index[BITS(dword, 20, 19)]); printf("VIDEO_DIP_CTL_C Video_DIP_frequency\t\t\t[0x%lx] %s\n", BITS(dword, 17, 16), video_dip_trans[BITS(dword, 17, 16)]); printf("VIDEO_DIP_CTL_C Video_DIP_buffer_size\t\t\t%lu\n", BITS(dword, 11, 8)); printf("VIDEO_DIP_CTL_C Video_DIP_access_address\t\t%lu\n", BITS(dword, 3, 0)); dword = INREG(AUD_VID_DID); printf("AUD_VID_DID vendor id\t\t\t\t\t0x%x\n", dword >> 16); printf("AUD_VID_DID device id\t\t\t\t\t0x%x\n", dword & 0xffff); dword = INREG(AUD_RID); printf("AUD_RID Major_Revision\t\t\t\t\t0x%lx\n", BITS(dword, 23, 20)); printf("AUD_RID Minor_Revision\t\t\t\t\t0x%lx\n", BITS(dword, 19, 16)); printf("AUD_RID Revision_Id\t\t\t\t\t0x%lx\n", BITS(dword, 15, 8)); printf("AUD_RID Stepping_Id\t\t\t\t\t0x%lx\n", BITS(dword, 7, 0)); dword = INREG(HDMIB); printf("HDMIB Port_Enable\t\t\t\t\t%u\n", !!(dword & SDVO_ENABLE)); printf("HDMIB Transcoder_Select\t\t\t\t\t[0x%lx] %s\n", BITS(dword, 30, 29), transcoder_select[BITS(dword, 30, 29)]); printf("HDMIB sDVO_Border_Enable\t\t\t\t%lu\n", BIT(dword, 7)); printf("HDMIB HDCP_Port_Select\t\t\t\t\t%lu\n", BIT(dword, 5)); printf("HDMIB SDVO_HPD_Interrupt_Enable\t\t\t\t%lu\n", BIT(dword, 23)); printf("HDMIB Port_Detected\t\t\t\t\t%lu\n", BIT(dword, 2)); printf("HDMIB Encoding\t\t\t\t\t\t[0x%lx] %s\n", BITS(dword, 11, 10), sdvo_hdmi_encoding[BITS(dword, 11, 10)]); printf("HDMIB HDMI_or_DVI_Select\t\t\t\t%s\n", BIT(dword, 9) ? "HDMI" : "DVI"); printf("HDMIB Audio_Output_Enable\t\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE)); dword = INREG(HDMIC); printf("HDMIC Port_Enable\t\t\t\t\t%u\n", !!(dword & SDVO_ENABLE)); printf("HDMIC Transcoder_Select\t\t\t\t\t[0x%lx] %s\n", BITS(dword, 30, 29), transcoder_select[BITS(dword, 30, 29)]); printf("HDMIC sDVO_Border_Enable\t\t\t\t%lu\n", BIT(dword, 7)); printf("HDMIC HDCP_Port_Select\t\t\t\t\t%lu\n", BIT(dword, 5)); printf("HDMIC SDVO_HPD_Interrupt_Enable\t\t\t\t%lu\n", BIT(dword, 23)); printf("HDMIC Port_Detected\t\t\t\t\t%lu\n", BIT(dword, 2)); printf("HDMIC Encoding\t\t\t\t\t\t[0x%lx] %s\n", BITS(dword, 11, 10), sdvo_hdmi_encoding[BITS(dword, 11, 10)]); printf("HDMIC HDMI_or_DVI_Select\t\t\t\t%s\n", BIT(dword, 9) ? "HDMI" : "DVI"); printf("HDMIC Audio_Output_Enable\t\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE)); dword = INREG(HDMID); printf("HDMID Port_Enable\t\t\t\t\t%u\n", !!(dword & SDVO_ENABLE)); printf("HDMID Transcoder_Select\t\t\t\t\t[0x%lx] %s\n", BITS(dword, 30, 29), transcoder_select[BITS(dword, 30, 29)]); printf("HDMID sDVO_Border_Enable\t\t\t\t%lu\n", BIT(dword, 7)); printf("HDMID HDCP_Port_Select\t\t\t\t\t%lu\n", BIT(dword, 5)); printf("HDMID SDVO_HPD_Interrupt_Enable\t\t\t\t%lu\n", BIT(dword, 23)); printf("HDMID Port_Detected\t\t\t\t\t%lu\n", BIT(dword, 2)); printf("HDMID Encoding\t\t\t\t\t\t[0x%lx] %s\n", BITS(dword, 11, 10), sdvo_hdmi_encoding[BITS(dword, 11, 10)]); printf("HDMID HDMI_or_DVI_Select\t\t\t\t%s\n", BIT(dword, 9) ? "HDMI" : "DVI"); printf("HDMID Audio_Output_Enable\t\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE)); dword = INREG(DP_CTL_B); printf("DP_CTL_B DisplayPort_Enable\t\t\t\t%lu\n", BIT(dword, 31)); printf("DP_CTL_B Port_Width_Selection\t\t\t\t[0x%lx] %s\n", BITS(dword, 21, 19), dp_port_width[BITS(dword, 21, 19)]); printf("DP_CTL_B Port_Detected\t\t\t\t\t%lu\n", BIT(dword, 2)); printf("DP_CTL_B HDCP_Port_Select\t\t\t\t%lu\n", BIT(dword, 5)); printf("DP_CTL_B Audio_Output_Enable\t\t\t\t%lu\n", BIT(dword, 6)); dword = INREG(DP_CTL_C); printf("DP_CTL_C DisplayPort_Enable\t\t\t\t%lu\n", BIT(dword, 31)); printf("DP_CTL_C Port_Width_Selection\t\t\t\t[0x%lx] %s\n", BITS(dword, 21, 19), dp_port_width[BITS(dword, 21, 19)]); printf("DP_CTL_C Port_Detected\t\t\t\t\t%lu\n", BIT(dword, 2)); printf("DP_CTL_C HDCP_Port_Select\t\t\t\t%lu\n", BIT(dword, 5)); printf("DP_CTL_C Audio_Output_Enable\t\t\t\t%lu\n", BIT(dword, 6)); dword = INREG(DP_CTL_D); printf("DP_CTL_D DisplayPort_Enable\t\t\t\t%lu\n", BIT(dword, 31)); printf("DP_CTL_D Port_Width_Selection\t\t\t\t[0x%lx] %s\n", BITS(dword, 21, 19), dp_port_width[BITS(dword, 21, 19)]); printf("DP_CTL_D Port_Detected\t\t\t\t\t%lu\n", BIT(dword, 2)); printf("DP_CTL_D HDCP_Port_Select\t\t\t\t%lu\n", BIT(dword, 5)); printf("DP_CTL_D Audio_Output_Enable\t\t\t\t%lu\n", BIT(dword, 6)); dword = INREG(AUD_CONFIG_A); printf("AUD_CONFIG_A N_index_value\t\t\t\t[0x%lx] %s\n", BIT(dword, 29), n_index_value[BIT(dword, 29)]); printf("AUD_CONFIG_A N_programming_enable\t\t\t%lu\n", BIT(dword, 28)); printf("AUD_CONFIG_A Upper_N_value\t\t\t\t0x%02lx\n", BITS(dword, 27, 20)); printf("AUD_CONFIG_A Lower_N_value\t\t\t\t0x%03lx\n", BITS(dword, 15, 4)); printf("AUD_CONFIG_A Pixel_Clock_HDMI\t\t\t\t[0x%lx] %s\n", BITS(dword, 19, 16), OPNAME(pixel_clock, BITS(dword, 19, 16))); printf("AUD_CONFIG_A Disable_NCTS\t\t\t\t%lu\n", BIT(dword, 3)); dword = INREG(AUD_CONFIG_B); printf("AUD_CONFIG_B N_index_value\t\t\t\t[0x%lx] %s\n", BIT(dword, 29), n_index_value[BIT(dword, 29)]); printf("AUD_CONFIG_B N_programming_enable\t\t\t%lu\n", BIT(dword, 28)); printf("AUD_CONFIG_B Upper_N_value\t\t\t\t0x%02lx\n", BITS(dword, 27, 20)); printf("AUD_CONFIG_B Lower_N_value\t\t\t\t0x%03lx\n", BITS(dword, 15, 4)); printf("AUD_CONFIG_B Pixel_Clock_HDMI\t\t\t\t[0x%lx] %s\n", BITS(dword, 19, 16), OPNAME(pixel_clock, BITS(dword, 19, 16))); printf("AUD_CONFIG_B Disable_NCTS\t\t\t\t%lu\n", BIT(dword, 3)); dword = INREG(AUD_CONFIG_C); printf("AUD_CONFIG_C N_index_value\t\t\t\t[0x%lx] %s\n", BIT(dword, 29), n_index_value[BIT(dword, 29)]); printf("AUD_CONFIG_C N_programming_enable\t\t\t%lu\n", BIT(dword, 28)); printf("AUD_CONFIG_C Upper_N_value\t\t\t\t0x%02lx\n", BITS(dword, 27, 20)); printf("AUD_CONFIG_C Lower_N_value\t\t\t\t0x%03lx\n", BITS(dword, 15, 4)); printf("AUD_CONFIG_C Pixel_Clock_HDMI\t\t\t\t[0x%lx] %s\n", BITS(dword, 19, 16), OPNAME(pixel_clock, BITS(dword, 19, 16))); printf("AUD_CONFIG_C Disable_NCTS\t\t\t\t%lu\n", BIT(dword, 3)); dword = INREG(AUD_CTS_ENABLE_A); printf("AUD_CTS_ENABLE_A Enable_CTS_or_M_programming\t\t%lu\n", BIT(dword, 20)); printf("AUD_CTS_ENABLE_A CTS_M value Index\t\t\t%s\n", BIT(dword, 21) ? "CTS" : "M"); printf("AUD_CTS_ENABLE_A CTS_programming\t\t\t%#lx\n", BITS(dword, 19, 0)); dword = INREG(AUD_CTS_ENABLE_B); printf("AUD_CTS_ENABLE_B Enable_CTS_or_M_programming\t\t%lu\n", BIT(dword, 20)); printf("AUD_CTS_ENABLE_B CTS_M value Index\t\t\t%s\n", BIT(dword, 21) ? "CTS" : "M"); printf("AUD_CTS_ENABLE_B CTS_programming\t\t\t%#lx\n", BITS(dword, 19, 0)); dword = INREG(AUD_CTS_ENABLE_C); printf("AUD_CTS_ENABLE_C Enable_CTS_or_M_programming\t\t%lu\n", BIT(dword, 20)); printf("AUD_CTS_ENABLE_C CTS_M value Index\t\t\t%s\n", BIT(dword, 21) ? "CTS" : "M"); printf("AUD_CTS_ENABLE_C CTS_programming\t\t\t%#lx\n", BITS(dword, 19, 0)); dword = INREG(AUD_MISC_CTRL_A); printf("AUD_MISC_CTRL_A Sample_Fabrication_EN_bit\t\t%lu\n", BIT(dword, 2)); printf("AUD_MISC_CTRL_A Sample_present_Disable\t\t\t%lu\n", BIT(dword, 8)); printf("AUD_MISC_CTRL_A Output_Delay\t\t\t\t%lu\n", BITS(dword, 7, 4)); printf("AUD_MISC_CTRL_A Pro_Allowed\t\t\t\t%lu\n", BIT(dword, 1)); dword = INREG(AUD_MISC_CTRL_B); printf("AUD_MISC_CTRL_B Sample_Fabrication_EN_bit\t\t%lu\n", BIT(dword, 2)); printf("AUD_MISC_CTRL_B Sample_present_Disable\t\t\t%lu\n", BIT(dword, 8)); printf("AUD_MISC_CTRL_B Output_Delay\t\t\t\t%lu\n", BITS(dword, 7, 4)); printf("AUD_MISC_CTRL_B Pro_Allowed\t\t\t\t%lu\n", BIT(dword, 1)); dword = INREG(AUD_MISC_CTRL_C); printf("AUD_MISC_CTRL_C Sample_Fabrication_EN_bit\t\t%lu\n", BIT(dword, 2)); printf("AUD_MISC_CTRL_C Sample_present_Disable\t\t\t%lu\n", BIT(dword, 8)); printf("AUD_MISC_CTRL_C Output_Delay\t\t\t\t%lu\n", BITS(dword, 7, 4)); printf("AUD_MISC_CTRL_C Pro_Allowed\t\t\t\t%lu\n", BIT(dword, 1)); dword = INREG(AUD_PWRST); printf("AUD_PWRST Func_Grp_Dev_PwrSt_Curr \t%s\n", power_state[BITS(dword, 27, 26)]); printf("AUD_PWRST Func_Grp_Dev_PwrSt_Set \t%s\n", power_state[BITS(dword, 25, 24)]); printf("AUD_PWRST ConvertorA_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 15, 14)]); printf("AUD_PWRST ConvertorA_Widget_Power_State_Requsted \t%s\n", power_state[BITS(dword, 13, 12)]); printf("AUD_PWRST ConvertorB_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 19, 18)]); printf("AUD_PWRST ConvertorB_Widget_Power_State_Requested \t%s\n", power_state[BITS(dword, 17, 16)]); printf("AUD_PWRST ConvC_Widget_PwrSt_Curr \t%s\n", power_state[BITS(dword, 23, 22)]); printf("AUD_PWRST ConvC_Widget_PwrSt_Req \t%s\n", power_state[BITS(dword, 21, 20)]); printf("AUD_PWRST PinB_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 3, 2)]); printf("AUD_PWRST PinB_Widget_Power_State_Set \t%s\n", power_state[BITS(dword, 1, 0)]); printf("AUD_PWRST PinC_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 7, 6)]); printf("AUD_PWRST PinC_Widget_Power_State_Set \t%s\n", power_state[BITS(dword, 5, 4)]); printf("AUD_PWRST PinD_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 11, 10)]); printf("AUD_PWRST PinD_Widget_Power_State_Set \t%s\n", power_state[BITS(dword, 9, 8)]); dword = INREG(AUD_PORT_EN_HD_CFG); printf("AUD_PORT_EN_HD_CFG Convertor_A_Digen\t\t\t%lu\n", BIT(dword, 0)); printf("AUD_PORT_EN_HD_CFG Convertor_B_Digen\t\t\t%lu\n", BIT(dword, 1)); printf("AUD_PORT_EN_HD_CFG Convertor_C_Digen\t\t\t%lu\n", BIT(dword, 2)); printf("AUD_PORT_EN_HD_CFG ConvertorA_Stream_ID\t\t%lu\n", BITS(dword, 7, 4)); printf("AUD_PORT_EN_HD_CFG ConvertorB_Stream_ID\t\t%lu\n", BITS(dword, 11, 8)); printf("AUD_PORT_EN_HD_CFG ConvertorC_Stream_ID\t\t%lu\n", BITS(dword, 15, 12)); printf("AUD_PORT_EN_HD_CFG Port_B_Out_Enable\t\t\t%lu\n", BIT(dword, 16)); printf("AUD_PORT_EN_HD_CFG Port_C_Out_Enable\t\t\t%lu\n", BIT(dword, 17)); printf("AUD_PORT_EN_HD_CFG Port_D_Out_Enable\t\t\t%lu\n", BIT(dword, 18)); printf("AUD_PORT_EN_HD_CFG Port_B_Amp_Mute_Status\t\t%lu\n", BIT(dword, 20)); printf("AUD_PORT_EN_HD_CFG Port_C_Amp_Mute_Status\t\t%lu\n", BIT(dword, 21)); printf("AUD_PORT_EN_HD_CFG Port_D_Amp_Mute_Status\t\t%lu\n", BIT(dword, 22)); dword = INREG(AUD_OUT_DIG_CNVT_A); printf("AUD_OUT_DIG_CNVT_A V\t\t\t\t\t%lu\n", BIT(dword, 1)); printf("AUD_OUT_DIG_CNVT_A VCFG\t\t\t\t%lu\n", BIT(dword, 2)); printf("AUD_OUT_DIG_CNVT_A PRE\t\t\t\t\t%lu\n", BIT(dword, 3)); printf("AUD_OUT_DIG_CNVT_A Copy\t\t\t\t%lu\n", BIT(dword, 4)); printf("AUD_OUT_DIG_CNVT_A NonAudio\t\t\t\t%lu\n", BIT(dword, 5)); printf("AUD_OUT_DIG_CNVT_A PRO\t\t\t\t\t%lu\n", BIT(dword, 6)); printf("AUD_OUT_DIG_CNVT_A Level\t\t\t\t%lu\n", BIT(dword, 7)); printf("AUD_OUT_DIG_CNVT_A Category_Code\t\t\t%lu\n", BITS(dword, 14, 8)); printf("AUD_OUT_DIG_CNVT_A Lowest_Channel_Number\t\t%lu\n", BITS(dword, 19, 16)); printf("AUD_OUT_DIG_CNVT_A Stream_ID\t\t\t\t%lu\n", BITS(dword, 23, 20)); dword = INREG(AUD_OUT_DIG_CNVT_B); printf("AUD_OUT_DIG_CNVT_B V\t\t\t\t\t%lu\n", BIT(dword, 1)); printf("AUD_OUT_DIG_CNVT_B VCFG\t\t\t\t%lu\n", BIT(dword, 2)); printf("AUD_OUT_DIG_CNVT_B PRE\t\t\t\t\t%lu\n", BIT(dword, 3)); printf("AUD_OUT_DIG_CNVT_B Copy\t\t\t\t%lu\n", BIT(dword, 4)); printf("AUD_OUT_DIG_CNVT_B NonAudio\t\t\t\t%lu\n", BIT(dword, 5)); printf("AUD_OUT_DIG_CNVT_B PRO\t\t\t\t\t%lu\n", BIT(dword, 6)); printf("AUD_OUT_DIG_CNVT_B Level\t\t\t\t%lu\n", BIT(dword, 7)); printf("AUD_OUT_DIG_CNVT_B Category_Code\t\t\t%lu\n", BITS(dword, 14, 8)); printf("AUD_OUT_DIG_CNVT_B Lowest_Channel_Number\t\t%lu\n", BITS(dword, 19, 16)); printf("AUD_OUT_DIG_CNVT_B Stream_ID\t\t\t\t%lu\n", BITS(dword, 23, 20)); dword = INREG(AUD_OUT_DIG_CNVT_C); printf("AUD_OUT_DIG_CNVT_C V\t\t\t\t\t%lu\n", BIT(dword, 1)); printf("AUD_OUT_DIG_CNVT_C VCFG\t\t\t\t%lu\n", BIT(dword, 2)); printf("AUD_OUT_DIG_CNVT_C PRE\t\t\t\t\t%lu\n", BIT(dword, 3)); printf("AUD_OUT_DIG_CNVT_C Copy\t\t\t\t%lu\n", BIT(dword, 4)); printf("AUD_OUT_DIG_CNVT_C NonAudio\t\t\t\t%lu\n", BIT(dword, 5)); printf("AUD_OUT_DIG_CNVT_C PRO\t\t\t\t\t%lu\n", BIT(dword, 6)); printf("AUD_OUT_DIG_CNVT_C Level\t\t\t\t%lu\n", BIT(dword, 7)); printf("AUD_OUT_DIG_CNVT_C Category_Code\t\t\t%lu\n", BITS(dword, 14, 8)); printf("AUD_OUT_DIG_CNVT_C Lowest_Channel_Number\t\t%lu\n", BITS(dword, 19, 16)); printf("AUD_OUT_DIG_CNVT_C Stream_ID\t\t\t\t%lu\n", BITS(dword, 23, 20)); printf("AUD_OUT_CH_STR Converter_Channel_MAP PORTB PORTC PORTD\n"); for (i = 0; i < 8; i++) { OUTREG(AUD_OUT_CH_STR, i | (i << 8) | (i << 16)); dword = INREG(AUD_OUT_CH_STR); printf("\t\t\t\t%lu\t%lu\t%lu\t%lu\n", 1 + BITS(dword, 3, 0), 1 + BITS(dword, 7, 4), 1 + BITS(dword, 15, 12), 1 + BITS(dword, 23, 20)); } dword = INREG(AUD_OUT_STR_DESC_A); printf("AUD_OUT_STR_DESC_A HBR_enable\t\t\t\t%lu\n", BITS(dword, 28, 27)); printf("AUD_OUT_STR_DESC_A Convertor_Channel_Count\t\t%lu\n", BITS(dword, 20, 16) + 1); printf("AUD_OUT_STR_DESC_A Bits_per_Sample\t\t\t[%#lx] %s\n", BITS(dword, 6, 4), OPNAME(bits_per_sample, BITS(dword, 6, 4))); printf("AUD_OUT_STR_DESC_A Number_of_Channels_in_a_Stream\t%lu\n", 1 + BITS(dword, 3, 0)); dword = INREG(AUD_OUT_STR_DESC_B); printf("AUD_OUT_STR_DESC_B HBR_enable\t\t\t\t%lu\n", BITS(dword, 28, 27)); printf("AUD_OUT_STR_DESC_B Convertor_Channel_Count\t\t%lu\n", BITS(dword, 20, 16) + 1); printf("AUD_OUT_STR_DESC_B Bits_per_Sample\t\t\t[%#lx] %s\n", BITS(dword, 6, 4), OPNAME(bits_per_sample, BITS(dword, 6, 4))); printf("AUD_OUT_STR_DESC_B Number_of_Channels_in_a_Stream\t%lu\n", 1 + BITS(dword, 3, 0)); dword = INREG(AUD_OUT_STR_DESC_C); printf("AUD_OUT_STR_DESC_C HBR_enable\t\t\t\t%lu\n", BITS(dword, 28, 27)); printf("AUD_OUT_STR_DESC_C Convertor_Channel_Count\t\t%lu\n", BITS(dword, 20, 16) + 1); printf("AUD_OUT_STR_DESC_C Bits_per_Sample\t\t\t[%#lx] %s\n", BITS(dword, 6, 4), OPNAME(bits_per_sample, BITS(dword, 6, 4))); printf("AUD_OUT_STR_DESC_C Number_of_Channels_in_a_Stream\t%lu\n", 1 + BITS(dword, 3, 0)); dword = INREG(AUD_PINW_CONNLNG_SEL); printf("AUD_PINW_CONNLNG_SEL Connection_select_Control_B\t%#lx\n", BITS(dword, 7, 0)); printf("AUD_PINW_CONNLNG_SEL Connection_select_Control_C\t%#lx\n", BITS(dword, 15, 8)); printf("AUD_PINW_CONNLNG_SEL Connection_select_Control_D\t%#lx\n", BITS(dword, 23, 16)); dword = INREG(AUD_CNTL_ST_A); printf("AUD_CNTL_ST_A DIP_Port_Select\t\t\t\t[%#lx] %s\n", BITS(dword, 30, 29), dip_port[BITS(dword, 30, 29)]); printf("AUD_CNTL_ST_A DIP_type_enable_status Audio DIP\t\t%lu\n", BIT(dword, 21)); printf("AUD_CNTL_ST_A DIP_type_enable_status ACP DIP\t\t%lu\n", BIT(dword, 22)); printf("AUD_CNTL_ST_A DIP_type_enable_status Generic 2 DIP\t%lu\n", BIT(dword, 23)); printf("AUD_CNTL_ST_A DIP_transmission_frequency\t\t[0x%lx] %s\n", BITS(dword, 17, 16), dip_trans[BITS(dword, 17, 16)]); printf("AUD_CNTL_ST_A ELD_ACK\t\t\t\t\t%lu\n", BIT(dword, 4)); printf("AUD_CNTL_ST_A ELD_buffer_size\t\t\t\t%lu\n", BITS(dword, 14, 10)); dword = INREG(AUD_CNTL_ST_B); printf("AUD_CNTL_ST_B DIP_Port_Select\t\t\t\t[%#lx] %s\n", BITS(dword, 30, 29), dip_port[BITS(dword, 30, 29)]); printf("AUD_CNTL_ST_B DIP_type_enable_status Audio DIP\t\t%lu\n", BIT(dword, 21)); printf("AUD_CNTL_ST_B DIP_type_enable_status ACP DIP\t\t%lu\n", BIT(dword, 22)); printf("AUD_CNTL_ST_B DIP_type_enable_status Generic 2 DIP\t%lu\n", BIT(dword, 23)); printf("AUD_CNTL_ST_B DIP_transmission_frequency\t\t[0x%lx] %s\n", BITS(dword, 17, 16), dip_trans[BITS(dword, 17, 16)]); printf("AUD_CNTL_ST_B ELD_ACK\t\t\t\t\t%lu\n", BIT(dword, 4)); printf("AUD_CNTL_ST_B ELD_buffer_size\t\t\t\t%lu\n", BITS(dword, 14, 10)); dword = INREG(AUD_CNTL_ST_C); printf("AUD_CNTL_ST_C DIP_Port_Select\t\t\t\t[%#lx] %s\n", BITS(dword, 30, 29), dip_port[BITS(dword, 30, 29)]); printf("AUD_CNTL_ST_C DIP_type_enable_status Audio DIP\t\t%lu\n", BIT(dword, 21)); printf("AUD_CNTL_ST_C DIP_type_enable_status ACP DIP\t\t%lu\n", BIT(dword, 22)); printf("AUD_CNTL_ST_C DIP_type_enable_status Generic 2 DIP\t%lu\n", BIT(dword, 23)); printf("AUD_CNTL_ST_C DIP_transmission_frequency\t\t[0x%lx] %s\n", BITS(dword, 17, 16), dip_trans[BITS(dword, 17, 16)]); printf("AUD_CNTL_ST_C ELD_ACK\t\t\t\t\t%lu\n", BIT(dword, 4)); printf("AUD_CNTL_ST_C ELD_buffer_size\t\t\t\t%lu\n", BITS(dword, 14, 10)); dword = INREG(AUD_CNTRL_ST2); printf("AUD_CNTRL_ST2 CP_ReadyB\t\t\t\t%lu\n", BIT(dword, 1)); printf("AUD_CNTRL_ST2 ELD_validB\t\t\t\t%lu\n", BIT(dword, 0)); printf("AUD_CNTRL_ST2 CP_ReadyC\t\t\t\t%lu\n", BIT(dword, 5)); printf("AUD_CNTRL_ST2 ELD_validC\t\t\t\t%lu\n", BIT(dword, 4)); printf("AUD_CNTRL_ST2 CP_ReadyD\t\t\t\t%lu\n", BIT(dword, 9)); printf("AUD_CNTRL_ST2 ELD_validD\t\t\t\t%lu\n", BIT(dword, 8)); dword = INREG(AUD_CNTRL_ST3); printf("AUD_CNTRL_ST3 TransA_DPT_Audio_Output_En\t\t%lu\n", BIT(dword, 3)); printf("AUD_CNTRL_ST3 TransA_to_Port_Sel\t\t\t[%#lx] %s\n", BITS(dword, 2, 0), trans_to_port_sel[BITS(dword, 2, 0)]); printf("AUD_CNTRL_ST3 TransB_DPT_Audio_Output_En\t\t%lu\n", BIT(dword, 7)); printf("AUD_CNTRL_ST3 TransB_to_Port_Sel\t\t\t[%#lx] %s\n", BITS(dword, 6, 4), trans_to_port_sel[BITS(dword, 6, 4)]); printf("AUD_CNTRL_ST3 TransC_DPT_Audio_Output_En\t\t%lu\n", BIT(dword, 11)); printf("AUD_CNTRL_ST3 TransC_to_Port_Sel\t\t\t[%#lx] %s\n", BITS(dword, 10, 8), trans_to_port_sel[BITS(dword, 10, 8)]); dword = INREG(AUD_HDMIW_STATUS); printf("AUD_HDMIW_STATUS Conv_A_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", BIT(dword, 27)); printf("AUD_HDMIW_STATUS Conv_A_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n", BIT(dword, 26)); printf("AUD_HDMIW_STATUS Conv_B_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", BIT(dword, 29)); printf("AUD_HDMIW_STATUS Conv_B_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n", BIT(dword, 28)); printf("AUD_HDMIW_STATUS Conv_C_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", BIT(dword, 31)); printf("AUD_HDMIW_STATUS Conv_C_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n", BIT(dword, 30)); printf("AUD_HDMIW_STATUS BCLK/CDCLK_FIFO_Overrun\t\t%lu\n", BIT(dword, 25)); printf("AUD_HDMIW_STATUS Function_Reset\t\t\t%lu\n", BIT(dword, 24)); printf("AUD_HDMIW_HDMIEDID_A HDMI ELD:\n\t"); dword = INREG(AUD_CNTL_ST_A); dword &= ~BITMASK(9, 5); OUTREG(AUD_CNTL_ST_A, dword); for (i = 0; i < BITS(dword, 14, 10) / 4; i++) printf("%08x ", htonl(INREG(AUD_HDMIW_HDMIEDID_A))); printf("\n"); printf("AUD_HDMIW_HDMIEDID_B HDMI ELD:\n\t"); dword = INREG(AUD_CNTL_ST_B); dword &= ~BITMASK(9, 5); OUTREG(AUD_CNTL_ST_B, dword); for (i = 0; i < BITS(dword, 14, 10) / 4; i++) printf("%08x ", htonl(INREG(AUD_HDMIW_HDMIEDID_B))); printf("\n"); printf("AUD_HDMIW_HDMIEDID_C HDMI ELD:\n\t"); dword = INREG(AUD_CNTL_ST_C); dword &= ~BITMASK(9, 5); OUTREG(AUD_CNTL_ST_C, dword); for (i = 0; i < BITS(dword, 14, 10) / 4; i++) printf("%08x ", htonl(INREG(AUD_HDMIW_HDMIEDID_C))); printf("\n"); printf("AUD_HDMIW_INFOFR_A HDMI audio Infoframe:\n\t"); dword = INREG(AUD_CNTL_ST_A); dword &= ~BITMASK(20, 18); dword &= ~BITMASK(3, 0); OUTREG(AUD_CNTL_ST_A, dword); for (i = 0; i < 8; i++) printf("%08x ", htonl(INREG(AUD_HDMIW_INFOFR_A))); printf("\n"); printf("AUD_HDMIW_INFOFR_B HDMI audio Infoframe:\n\t"); dword = INREG(AUD_CNTL_ST_B); dword &= ~BITMASK(20, 18); dword &= ~BITMASK(3, 0); OUTREG(AUD_CNTL_ST_B, dword); for (i = 0; i < 8; i++) printf("%08x ", htonl(INREG(AUD_HDMIW_INFOFR_B))); printf("\n"); printf("AUD_HDMIW_INFOFR_C HDMI audio Infoframe:\n\t"); dword = INREG(AUD_CNTL_ST_C); dword &= ~BITMASK(20, 18); dword &= ~BITMASK(3, 0); OUTREG(AUD_CNTL_ST_C, dword); for (i = 0; i < 8; i++) printf("%08x ", htonl(INREG(AUD_HDMIW_INFOFR_C))); printf("\n"); } /* Audio config registers of Ironlake */ #undef AUD_CONFIG_A #undef AUD_CONFIG_B #undef AUD_MISC_CTRL_A #undef AUD_MISC_CTRL_B #undef AUD_VID_DID #undef AUD_RID #undef AUD_CTS_ENABLE_A #undef AUD_CTS_ENABLE_B #undef AUD_PWRST #undef AUD_HDMIW_HDMIEDID_A #undef AUD_HDMIW_HDMIEDID_B #undef AUD_HDMIW_INFOFR_A #undef AUD_HDMIW_INFOFR_B #undef AUD_PORT_EN_HD_CFG #undef AUD_OUT_DIG_CNVT_A #undef AUD_OUT_DIG_CNVT_B #undef AUD_OUT_STR_DESC_A #undef AUD_OUT_STR_DESC_B #undef AUD_OUT_CH_STR #undef AUD_PINW_CONNLNG_LIST #undef AUD_PINW_CONNLNG_SEL #undef AUD_CNTL_ST_A #undef AUD_CNTL_ST_B #undef AUD_CNTL_ST2 #undef AUD_HDMIW_STATUS #define PIPE_OFS 0x100 #define AUD_CONFIG_A 0x0 #define AUD_CONFIG_B (AUD_CONFIG_A + PIPE_OFS) #define AUD_MISC_CTRL_A 0x010 #define AUD_MISC_CTRL_B (AUD_MISC_CTRL_A + PIPE_OFS) #define AUD_VID_DID 0x020 #define AUD_RID 0x024 #define AUD_CTS_ENABLE_A 0x028 #define AUD_CTS_ENABLE_B (AUD_CTS_ENABLE_A + PIPE_OFS) #define AUD_PWRST 0x04C #define AUD_HDMIW_HDMIEDID_A 0x050 #define AUD_HDMIW_HDMIEDID_B (AUD_HDMIW_HDMIEDID_A + PIPE_OFS) #define AUD_HDMIW_INFOFR_A 0x054 #define AUD_HDMIW_INFOFR_B (AUD_HDMIW_INFOFR_A + PIPE_OFS) #define AUD_PORT_EN_HD_CFG 0x07c #define AUD_OUT_DIG_CNVT_A 0x080 #define AUD_OUT_DIG_CNVT_B (AUD_OUT_DIG_CNVT_A + PIPE_OFS) #define AUD_OUT_STR_DESC_A 0x084 #define AUD_OUT_STR_DESC_B (AUD_OUT_STR_DESC_A + PIPE_OFS) #define AUD_OUT_CH_STR 0x088 #define AUD_PINW_CONNLNG_LIST 0x0a8 #define AUD_PINW_CONNLNG_SEL 0x0aC #define AUD_CNTL_ST_A 0x0b4 #define AUD_CNTL_ST_B (AUD_CNTL_ST_A + PIPE_OFS) #define AUD_CNTL_ST2 0x0c0 #define AUD_HDMIW_STATUS 0x0d4 #define AUD_FREQ_CNTRL 0x900 /* Audio config registers of Haswell+ */ #define AUD_TCA_CONFIG AUD_CONFIG_A #define AUD_TCB_CONFIG (AUD_TCA_CONFIG + PIPE_OFS) #define AUD_TCC_CONFIG (AUD_TCA_CONFIG + PIPE_OFS * 2) #define AUD_C1_MISC_CTRL AUD_MISC_CTRL_A #define AUD_C2_MISC_CTRL (AUD_MISC_CTRL_A + PIPE_OFS) #define AUD_C3_MISC_CTRL (AUD_MISC_CTRL_A + PIPE_OFS * 2) #define AUD_TCA_M_CTS_ENABLE AUD_CTS_ENABLE_A #define AUD_TCB_M_CTS_ENABLE (AUD_TCA_M_CTS_ENABLE + PIPE_OFS) #define AUD_TCC_M_CTS_ENABLE (AUD_TCA_M_CTS_ENABLE + PIPE_OFS * 2) #define AUD_TCA_EDID_DATA AUD_HDMIW_HDMIEDID_A #define AUD_TCB_EDID_DATA (AUD_TCA_EDID_DATA + PIPE_OFS) #define AUD_TCC_EDID_DATA (AUD_TCA_EDID_DATA + PIPE_OFS * 2) #define AUD_TCA_INFOFR AUD_HDMIW_INFOFR_A #define AUD_TCB_INFOFR (AUD_TCA_INFOFR + PIPE_OFS) #define AUD_TCC_INFOFR (AUD_TCA_INFOFR + PIPE_OFS * 2) #define AUD_PIPE_CONV_CFG AUD_PORT_EN_HD_CFG #define AUD_C1_DIG_CNVT AUD_OUT_DIG_CNVT_A #define AUD_C2_DIG_CNVT (AUD_C1_DIG_CNVT + PIPE_OFS) #define AUD_C3_DIG_CNVT (AUD_C1_DIG_CNVT + PIPE_OFS * 2) #define AUD_C1_STR_DESC AUD_OUT_STR_DESC_A #define AUD_C2_STR_DESC (AUD_C1_STR_DESC + PIPE_OFS) #define AUD_C3_STR_DESC (AUD_C1_STR_DESC + PIPE_OFS * 2) #define AUD_OUT_CHAN_MAP AUD_OUT_CH_STR #define AUD_TCA_PIN_PIPE_CONN_ENTRY_LNGTH AUD_PINW_CONNLNG_LIST #define AUD_TCB_PIN_PIPE_CONN_ENTRY_LNGTH (AUD_TCA_PIN_PIPE_CONN_ENTRY_LNGTH + PIPE_OFS) #define AUD_TCC_PIN_PIPE_CONN_ENTRY_LNGTH (AUD_TCA_PIN_PIPE_CONN_ENTRY_LNGTH + PIPE_OFS * 2) #define AUD_PIPE_CONN_SEL_CTRL AUD_PINW_CONNLNG_SEL #define AUD_TCA_DIP_ELD_CTRL_ST AUD_CNTL_ST_A #define AUD_TCB_DIP_ELD_CTRL_ST (AUD_TCA_DIP_ELD_CTRL_ST + PIPE_OFS) #define AUD_TCC_DIP_ELD_CTRL_ST (AUD_TCA_DIP_ELD_CTRL_ST + PIPE_OFS * 2) #define AUD_PIN_ELD_CP_VLD AUD_CNTL_ST2 #define AUD_HDMI_FIFO_STATUS AUD_HDMIW_STATUS #define AUD_ICOI 0xf00 #define AUD_IRII 0xf04 #define AUD_ICS 0xf08 #define AUD_CHICKENBIT_REG 0xf10 #define AUD_DP_DIP_STATUS 0xf20 #define AUD_TCA_M_CTS 0xf44 #define AUD_TCB_M_CTS 0xf54 #define AUD_TCC_M_CTS 0xf64 #define AUD_HDA_DMA_REG 0xe00 #define AUD_HDA_LPIB0_REG 0xe04 #define AUD_HDA_LPIB1_REG 0xe08 #define AUD_HDA_LPIB2_REG 0xe0c #define AUD_HDA_EXTRA_REG 0xe10 #define AUD_FPGA_CRC_CTL_A 0xf14 #define AUD_FPGA_CRC_CTL_B 0xf24 #define AUD_FPGA_CRC_CTL_C 0xf34 #define AUD_FPGA_CRC_RESULT_A 0xf18 #define AUD_FPGA_CRC_RESULT_B 0xf28 #define AUD_FPGA_CRC_RESULT_C 0xf38 #define AUD_DFT_MVAL_REG 0xe20 #define AUD_DFT_NVAL_REG 0xe24 #define AUD_DFT_LOAD_REG 0xe28 /* Common functions to dump audio registers */ #define MAX_PREFIX_SIZE 128 static void dump_aud_config(int index) { uint32_t dword; char prefix[MAX_PREFIX_SIZE]; if (!IS_HASWELL_PLUS(devid)) { dword = INREG(aud_reg_base + AUD_CONFIG_A + (index - PIPE_A) * 0x100); sprintf(prefix, "AUD_CONFIG_%c ", 'A' + index - PIPE_A); } else { dword = INREG(aud_reg_base + AUD_TCA_CONFIG + (index - TRANSCODER_A) * 0x100); sprintf(prefix, "AUD_TC%c_CONFIG", 'A' + index - TRANSCODER_A); } printf("%s Disable_NCTS\t\t\t\t%lu\n", prefix, BIT(dword, 3)); printf("%s Lower_N_value\t\t\t\t0x%03lx\n", prefix, BITS(dword, 15, 4)); printf("%s Pixel_Clock_HDMI\t\t\t[0x%lx] %s\n", prefix, BITS(dword, 19, 16), OPNAME(pixel_clock, BITS(dword, 19, 16))); printf("%s Upper_N_value\t\t\t\t0x%02lx\n", prefix, BITS(dword, 27, 20)); printf("%s N_programming_enable\t\t\t%lu\n", prefix, BIT(dword, 28)); printf("%s N_index_value\t\t\t\t[0x%lx] %s\n", prefix, BIT(dword, 29), OPNAME(n_index_value, BIT(dword, 29))); } static void dump_aud_misc_control(int index) { uint32_t dword; char prefix[MAX_PREFIX_SIZE]; if (!IS_HASWELL_PLUS(devid)) { dword = INREG(aud_reg_base + AUD_MISC_CTRL_A + (index - PIPE_A) * 0x100); sprintf(prefix, "AUD_MISC_CTRL_%c ", 'A' + index - PIPE_A); } else { dword = INREG(aud_reg_base + AUD_C1_MISC_CTRL + (index - CONVERTER_1) * 0x100); sprintf(prefix, "AUD_C%c_MISC_CTRL", '1' + index - CONVERTER_1); } printf("%s Pro_Allowed\t\t\t\t%lu\n", prefix, BIT(dword, 1)); printf("%s Sample_Fabrication_EN_bit\t\t%lu\n", prefix, BIT(dword, 2)); printf("%s Output_Delay\t\t\t\t%lu\n", prefix, BITS(dword, 7, 4)); printf("%s Sample_present_Disable\t\t%lu\n", prefix, BIT(dword, 8)); } static void dump_aud_vendor_device_id(void) { uint32_t dword; dword = INREG(aud_reg_base + AUD_VID_DID); printf("AUD_VID_DID device id\t\t\t\t\t0x%lx\n", BITS(dword, 15, 0)); printf("AUD_VID_DID vendor id\t\t\t\t\t0x%lx\n", BITS(dword, 31, 16)); } static void dump_aud_revision_id(void) { uint32_t dword; dword = INREG(aud_reg_base + AUD_RID); printf("AUD_RID Stepping_Id\t\t\t\t\t0x%lx\n", BITS(dword, 7, 0)); printf("AUD_RID Revision_Id\t\t\t\t\t0x%lx\n", BITS(dword, 15, 8)); printf("AUD_RID Minor_Revision\t\t\t\t\t0x%lx\n", BITS(dword, 19, 16)); printf("AUD_RID Major_Revision\t\t\t\t\t0x%lx\n", BITS(dword, 23, 20)); } static void dump_aud_m_cts_enable(int index) { uint32_t dword; char prefix[MAX_PREFIX_SIZE]; if (!IS_HASWELL_PLUS(devid)) { dword = INREG(aud_reg_base + AUD_CTS_ENABLE_A + (index - PIPE_A) * 0x100); sprintf(prefix, "AUD_CTS_ENABLE_%c ", 'A' + index - PIPE_A); } else { dword = INREG(aud_reg_base + AUD_TCA_M_CTS_ENABLE + (index - TRANSCODER_A) * 0x100); sprintf(prefix, "AUD_TC%c_M_CTS_ENABLE", 'A' + index - TRANSCODER_A); } printf("%s CTS_programming\t\t\t%#lx\n", prefix, BITS(dword, 19, 0)); printf("%s Enable_CTS_or_M_programming\t%lu\n", prefix, BIT(dword, 20)); printf("%s CTS_M value Index\t\t\t[0x%lx] %s\n",prefix, BIT(dword, 21), OPNAME(cts_m_value_index, BIT(dword, 21))); } static void dump_aud_power_state(void) { uint32_t dword; int num_pipes; dword = INREG(aud_reg_base + AUD_PWRST); printf("AUD_PWRST PinB_Widget_Power_State_Set \t%s\n", power_state[BITS(dword, 1, 0)]); printf("AUD_PWRST PinB_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 3, 2)]); printf("AUD_PWRST PinC_Widget_Power_State_Set \t%s\n", power_state[BITS(dword, 5, 4)]); printf("AUD_PWRST PinC_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 7, 6)]); printf("AUD_PWRST PinD_Widget_Power_State_Set \t%s\n", power_state[BITS(dword, 9, 8)]); printf("AUD_PWRST PinD_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 11, 10)]); if (!IS_HASWELL_PLUS(devid)) { printf("AUD_PWRST ConvertorA_Widget_Power_State_Requsted \t%s\n", power_state[BITS(dword, 13, 12)]); printf("AUD_PWRST ConvertorA_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 15, 14)]); printf("AUD_PWRST ConvertorB_Widget_Power_State_Requested \t%s\n", power_state[BITS(dword, 17, 16)]); printf("AUD_PWRST ConvertorB_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 19, 18)]); } else { printf("AUD_PWRST Convertor1_Widget_Power_State_Requsted \t%s\n", power_state[BITS(dword, 13, 12)]); printf("AUD_PWRST Convertor1_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 15, 14)]); printf("AUD_PWRST Convertor2_Widget_Power_State_Requested \t%s\n", power_state[BITS(dword, 17, 16)]); printf("AUD_PWRST Convertor2_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 19, 18)]); } num_pipes = get_num_pipes(); if (num_pipes == 2) { printf("AUD_PWRST Func_Grp_Dev_PwrSt_Set \t%s\n", power_state[BITS(dword, 21, 20)]); printf("AUD_PWRST Func_Grp_Dev_PwrSt_Curr \t%s\n", power_state[BITS(dword, 23, 22)]); } else { /* 3 pipes */ if (!IS_HASWELL_PLUS(devid)) { printf("AUD_PWRST ConvertorC_Widget_Power_State_Requested \t%s\n", power_state[BITS(dword, 21, 20)]); printf("AUD_PWRST ConvertorC_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 23, 22)]); } else { printf("AUD_PWRST Convertor3_Widget_Power_State_Requested \t%s\n", power_state[BITS(dword, 21, 20)]); printf("AUD_PWRST Convertor3_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 23, 22)]); } printf("AUD_PWRST Func_Grp_Dev_PwrSt_Set \t%s\n", power_state[BITS(dword, 25, 24)]); printf("AUD_PWRST Func_Grp_Dev_PwrSt_Curr \t%s\n", power_state[BITS(dword, 27, 26)]); } } static void dump_aud_edid_data(int index) { uint32_t dword; int i; int offset; int aud_ctrl_st, edid_data; if (IS_HASWELL_PLUS(devid)) { offset = (index - TRANSCODER_A) * 0x100; aud_ctrl_st = aud_reg_base + AUD_TCA_DIP_ELD_CTRL_ST + offset; edid_data = aud_reg_base + AUD_TCA_EDID_DATA + offset; printf("AUD_TC%c_EDID_DATA ELD:\n\t", 'A' + index - TRANSCODER_A); } else { offset = (index - PIPE_A) * 0x100; aud_ctrl_st = aud_reg_base + AUD_CNTL_ST_A + offset; edid_data = aud_reg_base + AUD_HDMIW_HDMIEDID_A + offset; printf("AUD_HDMIW_HDMIEDID_%c HDMI ELD:\n\t", 'A' + index - PIPE_A); } dword = INREG(aud_ctrl_st); dword &= ~BITMASK(9, 5); OUTREG(aud_ctrl_st, dword); for (i = 0; i < BITS(dword, 14, 10) / 4; i++) printf("%08x ", htonl(INREG(edid_data))); printf("\n"); } static void dump_aud_infoframe(int index) { uint32_t dword; int i; int offset; int aud_ctrl_st, info_frm; if (IS_HASWELL_PLUS(devid)) { offset = (index - TRANSCODER_A) * 0x100; aud_ctrl_st = aud_reg_base + AUD_TCA_DIP_ELD_CTRL_ST + offset; info_frm = aud_reg_base + AUD_TCA_INFOFR + offset; printf("AUD_TC%c_INFOFR audio Infoframe:\n\t", 'A' + index - TRANSCODER_A); } else { offset = (index - PIPE_A) * 0x100; aud_ctrl_st = aud_reg_base + AUD_CNTL_ST_A + offset; info_frm = aud_reg_base + AUD_HDMIW_INFOFR_A + offset; printf("AUD_HDMIW_INFOFR_%c HDMI audio Infoframe:\n\t", 'A' + index - PIPE_A); } dword = INREG(aud_ctrl_st); dword &= ~BITMASK(20, 18); dword &= ~BITMASK(3, 0); OUTREG(aud_ctrl_st, dword); for (i = 0; i < 8; i++) printf("%08x ", htonl(INREG(info_frm))); printf("\n"); } static void dump_aud_port_en_hd_cfg(void) { uint32_t dword; int num_pipes = get_num_pipes(); dword = INREG(aud_reg_base + AUD_PORT_EN_HD_CFG); if (num_pipes == 2) { printf("AUD_PORT_EN_HD_CFG Convertor_A_Digen\t\t\t%lu\n", BIT(dword, 0)); printf("AUD_PORT_EN_HD_CFG Convertor_B_Digen\t\t\t%lu\n", BIT(dword, 1)); printf("AUD_PORT_EN_HD_CFG Convertor_A_Stream_ID\t\t%lu\n", BITS(dword, 7, 4)); printf("AUD_PORT_EN_HD_CFG Convertor_B_Stream_ID\t\t%lu\n", BITS(dword, 11, 8)); printf("AUD_PORT_EN_HD_CFG Port_B_Out_Enable\t\t\t%lu\n", BIT(dword, 12)); printf("AUD_PORT_EN_HD_CFG Port_C_Out_Enable\t\t\t%lu\n", BIT(dword, 13)); printf("AUD_PORT_EN_HD_CFG Port_D_Out_Enable\t\t\t%lu\n", BIT(dword, 14)); printf("AUD_PORT_EN_HD_CFG Port_B_Amp_Mute_Status\t\t%lu\n", BIT(dword, 16)); printf("AUD_PORT_EN_HD_CFG Port_C_Amp_Mute_Status\t\t%lu\n", BIT(dword, 17)); printf("AUD_PORT_EN_HD_CFG Port_D_Amp_Mute_Status\t\t%lu\n", BIT(dword, 18)); } else { /* three pipes */ printf("AUD_PORT_EN_HD_CFG Convertor_A_Digen\t\t\t%lu\n", BIT(dword, 0)); printf("AUD_PORT_EN_HD_CFG Convertor_B_Digen\t\t\t%lu\n", BIT(dword, 1)); printf("AUD_PORT_EN_HD_CFG Convertor_C_Digen\t\t\t%lu\n", BIT(dword, 2)); printf("AUD_PORT_EN_HD_CFG Convertor_A_Stream_ID\t\t%lu\n", BITS(dword, 7, 4)); printf("AUD_PORT_EN_HD_CFG Convertor_B_Stream_ID\t\t%lu\n", BITS(dword, 11, 8)); printf("AUD_PORT_EN_HD_CFG Convertor_C_Stream_ID\t\t%lu\n", BITS(dword, 15, 12)); printf("AUD_PORT_EN_HD_CFG Port_B_Out_Enable\t\t\t%lu\n", BIT(dword, 16)); printf("AUD_PORT_EN_HD_CFG Port_C_Out_Enable\t\t\t%lu\n", BIT(dword, 17)); printf("AUD_PORT_EN_HD_CFG Port_D_Out_Enable\t\t\t%lu\n", BIT(dword, 18)); printf("AUD_PORT_EN_HD_CFG Port_B_Amp_Mute_Status\t\t%lu\n", BIT(dword, 20)); printf("AUD_PORT_EN_HD_CFG Port_C_Amp_Mute_Status\t\t%lu\n", BIT(dword, 21)); printf("AUD_PORT_EN_HD_CFG Port_D_Amp_Mute_Status\t\t%lu\n", BIT(dword, 22)); } } static void dump_aud_pipe_conv_cfg(void) { uint32_t dword; dword = INREG(aud_reg_base + AUD_PIPE_CONV_CFG); printf("AUD_PIPE_CONV_CFG Convertor_1_Digen\t\t\t%lu\n", BIT(dword, 0)); printf("AUD_PIPE_CONV_CFG Convertor_2_Digen\t\t\t%lu\n", BIT(dword, 1)); printf("AUD_PIPE_CONV_CFG Convertor_3_Digen\t\t\t%lu\n", BIT(dword, 2)); printf("AUD_PIPE_CONV_CFG Convertor_1_Stream_ID\t\t%lu\n", BITS(dword, 7, 4)); printf("AUD_PIPE_CONV_CFG Convertor_2_Stream_ID\t\t%lu\n", BITS(dword, 11, 8)); printf("AUD_PIPE_CONV_CFG Convertor_3_Stream_ID\t\t%lu\n", BITS(dword, 15, 12)); printf("AUD_PIPE_CONV_CFG Port_B_Out_Enable\t\t\t%lu\n", BIT(dword, 16)); printf("AUD_PIPE_CONV_CFG Port_C_Out_Enable\t\t\t%lu\n", BIT(dword, 17)); printf("AUD_PIPE_CONV_CFG Port_D_Out_Enable\t\t\t%lu\n", BIT(dword, 18)); printf("AUD_PIPE_CONV_CFG Port_B_Amp_Mute_Status\t\t%lu\n", BIT(dword, 20)); printf("AUD_PIPE_CONV_CFG Port_C_Amp_Mute_Status\t\t%lu\n", BIT(dword, 21)); printf("AUD_PIPE_CONV_CFG Port_D_Amp_Mute_Status\t\t%lu\n", BIT(dword, 22)); } static void dump_aud_dig_cnvt(int index) { uint32_t dword; char prefix[MAX_PREFIX_SIZE]; if (!IS_HASWELL_PLUS(devid)) { dword = INREG(aud_reg_base + AUD_OUT_DIG_CNVT_A + (index - PIPE_A) * 0x100); sprintf(prefix, "AUD_OUT_DIG_CNVT_%c", 'A' + index - PIPE_A); } else { dword = INREG(aud_reg_base + AUD_C1_DIG_CNVT + (index - CONVERTER_1) * 0x100); sprintf(prefix, "AUD_C%c_DIG_CNVT ", '1' + index - CONVERTER_1); } printf("%s V\t\t\t\t\t%lu\n", prefix, BIT(dword, 1)); printf("%s VCFG\t\t\t\t%lu\n", prefix, BIT(dword, 2)); printf("%s PRE\t\t\t\t\t%lu\n", prefix, BIT(dword, 3)); printf("%s Copy\t\t\t\t%lu\n", prefix, BIT(dword, 4)); printf("%s NonAudio\t\t\t\t%lu\n", prefix, BIT(dword, 5)); printf("%s PRO\t\t\t\t\t%lu\n", prefix, BIT(dword, 6)); printf("%s Level\t\t\t\t%lu\n", prefix, BIT(dword, 7)); printf("%s Category_Code\t\t\t%lu\n", prefix, BITS(dword, 14, 8)); printf("%s Lowest_Channel_Number\t\t%lu\n", prefix, BITS(dword, 19, 16)); printf("%s Stream_ID\t\t\t\t%lu\n", prefix, BITS(dword, 23, 20)); } static void dump_aud_str_desc(int index) { uint32_t dword; char prefix[MAX_PREFIX_SIZE]; uint32_t rate; if (!IS_HASWELL_PLUS(devid)) { dword = INREG(aud_reg_base + AUD_OUT_STR_DESC_A + (index - PIPE_A) * 0x100); sprintf(prefix, "AUD_OUT_STR_DESC_%c", 'A' + index - PIPE_A); } else { dword = INREG(aud_reg_base + AUD_C1_STR_DESC + (index - CONVERTER_1) * 0x100); sprintf(prefix, "AUD_C%c_STR_DESC ", '1' + index - CONVERTER_1); } printf("%s Number_of_Channels_in_a_Stream\t%lu\n", prefix, BITS(dword, 3, 0) + 1); printf("%s Bits_per_Sample\t\t\t[%#lx] %s\n", prefix, BITS(dword, 6, 4), OPNAME(bits_per_sample, BITS(dword, 6, 4))); printf("%s Sample_Base_Rate_Divisor\t\t[%#lx] %s\n", prefix, BITS(dword, 10, 8), OPNAME(sample_base_rate_divisor, BITS(dword, 10, 8))); printf("%s Sample_Base_Rate_Mult\t\t[%#lx] %s\n", prefix, BITS(dword, 13, 11), OPNAME(sample_base_rate_mult, BITS(dword, 13, 11))); printf("%s Sample_Base_Rate\t\t\t[%#lx] %s\t", prefix, BIT(dword, 14), OPNAME(sample_base_rate, BIT(dword, 14))); rate = (BIT(dword, 14) ? 44100 : 48000) * (BITS(dword, 13, 11) + 1) /(BITS(dword, 10, 8) + 1); printf("=> Sample Rate %d Hz\n", rate); printf("%s Convertor_Channel_Count\t\t%lu\n", prefix, BITS(dword, 20, 16) + 1); if (!IS_HASWELL_PLUS(devid)) printf("%s HBR_enable\t\t\t\t%lu\n", prefix, BITS(dword, 28, 27)); } #define dump_aud_out_ch_str dump_aud_out_chan_map static void dump_aud_out_chan_map(void) { uint32_t dword; int i; printf("AUD_OUT_CHAN_MAP Converter_Channel_MAP PORTB PORTC PORTD\n"); for (i = 0; i < 8; i++) { OUTREG(aud_reg_base + AUD_OUT_CHAN_MAP, i | (i << 8) | (i << 16)); dword = INREG(aud_reg_base + AUD_OUT_CHAN_MAP); printf("\t\t\t\t%lu\t%lu\t%lu\t%lu\n", 1 + BITS(dword, 3, 0), 1 + BITS(dword, 7, 4), 1 + BITS(dword, 15, 12), 1 + BITS(dword, 23, 20)); } } static void dump_aud_connect_list(void) { uint32_t dword; char prefix[MAX_PREFIX_SIZE]; dword = INREG(aud_reg_base + AUD_PINW_CONNLNG_LIST); sprintf(prefix, "AUD_PINW_CONNLNG_LIST"); printf("%s Connect_List_Length\t\t%lu\n", prefix, BITS(dword, 6, 0)); printf("%s Form \t\t\t\t[%#lx] %s\n", prefix, BIT(dword, 7), OPNAME(connect_list_form, BIT(dword, 7))); printf("%s Connect_List_Entry\t\t%lu, %lu\n", prefix, BITS(dword, 15, 8), BITS(dword, 23, 16)); } static void dump_aud_connect_select(void) { uint32_t dword; char prefix[MAX_PREFIX_SIZE]; if (IS_HASWELL_PLUS(devid)) { dword = INREG(aud_reg_base + AUD_PIPE_CONN_SEL_CTRL); sprintf(prefix, "AUD_PIPE_CONN_SEL_CTRL"); } else { dword = INREG(aud_reg_base + AUD_PINW_CONNLNG_SEL); sprintf(prefix, "AUD_PINW_CONNLNG_SEL "); } printf("%s Connection_select_Port_B\t%#lx\n", prefix, BITS(dword, 7, 0)); printf("%s Connection_select_Port_C\t%#lx\n", prefix, BITS(dword, 15, 8)); printf("%s Connection_select_Port_D\t%#lx\n", prefix, BITS(dword, 23, 16)); } static void dump_aud_ctrl_state(int index) { uint32_t dword; int offset; if (IS_HASWELL_PLUS(devid)) { offset = (index - TRANSCODER_A) * 0x100; dword = INREG(aud_reg_base + AUD_TCA_DIP_ELD_CTRL_ST + offset); printf("Audio DIP and ELD control state for Transcoder %c\n", 'A' + index - TRANSCODER_A); } else { offset = (index - PIPE_A) * 0x100; dword = INREG(aud_reg_base + AUD_CNTL_ST_A + offset); printf("Audio control state - Pipe %c\n", 'A' + index - PIPE_A); } printf("\tELD_ACK\t\t\t\t\t\t%lu\n", BIT(dword, 4)); printf("\tELD_buffer_size\t\t\t\t\t%lu\n", BITS(dword, 14, 10)); printf("\tDIP_transmission_frequency\t\t\t[0x%lx] %s\n", BITS(dword, 17, 16), dip_trans[BITS(dword, 17, 16)]); printf("\tDIP Buffer Index \t\t\t\t[0x%lx] %s\n", BITS(dword, 20, 18), dip_index[BITS(dword, 20, 18)]); printf("\tAudio DIP type enable status\t\t\t[0x%04lx] %s, %s, %s\n", BITS(dword, 24, 21), dip_type[BIT(dword, 21)], dip_gen1_state[BIT(dword, 22)], dip_gen2_state[BIT(dword, 23)]); printf("\tAudio DIP port select\t\t\t\t[0x%lx] %s\n", BITS(dword, 30, 29), dip_port[BITS(dword, 30, 29)]); printf("\n"); } static void dump_aud_ctrl_state2(void) { uint32_t dword; dword = INREG(aud_reg_base + AUD_CNTL_ST2); printf("AUD_CNTL_ST2 ELD_validB\t\t\t\t%lu\n", BIT(dword, 0)); printf("AUD_CNTL_ST2 CP_ReadyB\t\t\t\t\t%lu\n", BIT(dword, 1)); printf("AUD_CNTL_ST2 ELD_validC\t\t\t\t%lu\n", BIT(dword, 4)); printf("AUD_CNTL_ST2 CP_ReadyC\t\t\t\t\t%lu\n", BIT(dword, 5)); printf("AUD_CNTL_ST2 ELD_validD\t\t\t\t%lu\n", BIT(dword, 8)); printf("AUD_CNTL_ST2 CP_ReadyD\t\t\t\t\t%lu\n", BIT(dword, 9)); } /* for hsw+ */ static void dump_aud_eld_cp_vld(void) { uint32_t dword; dword = INREG(aud_reg_base + AUD_PIN_ELD_CP_VLD); printf("AUD_PIN_ELD_CP_VLD Transcoder_A ELD_valid\t\t%lu\n", BIT(dword, 0)); printf("AUD_PIN_ELD_CP_VLD Transcoder_A CP_Ready \t\t%lu\n", BIT(dword, 1)); printf("AUD_PIN_ELD_CP_VLD Transcoder_A Out_enable\t\t%lu\n", BIT(dword, 2)); printf("AUD_PIN_ELD_CP_VLD Transcoder_A Inactive\t\t%lu\n", BIT(dword, 3)); printf("AUD_PIN_ELD_CP_VLD Transcoder_B ELD_valid\t\t%lu\n", BIT(dword, 4)); printf("AUD_PIN_ELD_CP_VLD Transcoder_B CP_Ready\t\t%lu\n", BIT(dword, 5)); printf("AUD_PIN_ELD_CP_VLD Transcoder_B OUT_enable\t\t%lu\n", BIT(dword, 6)); printf("AUD_PIN_ELD_CP_VLD Transcoder_B Inactive\t\t%lu\n", BIT(dword, 7)); printf("AUD_PIN_ELD_CP_VLD Transcoder_C ELD_valid\t\t%lu\n", BIT(dword, 8)); printf("AUD_PIN_ELD_CP_VLD Transcoder_C CP_Ready\t\t%lu\n", BIT(dword, 9)); printf("AUD_PIN_ELD_CP_VLD Transcoder_C OUT_enable\t\t%lu\n", BIT(dword, 10)); printf("AUD_PIN_ELD_CP_VLD Transcoder_C Inactive\t\t%lu\n", BIT(dword, 11)); } static void dump_aud_hdmi_status(void) { uint32_t dword; dword = INREG(aud_reg_base + AUD_HDMIW_STATUS); printf("AUD_HDMIW_STATUS Function_Reset\t\t\t%lu\n", BIT(dword, 24)); printf("AUD_HDMIW_STATUS BCLK/CDCLK_FIFO_Overrun\t\t%lu\n", BIT(dword, 25)); printf("AUD_HDMIW_STATUS Conv_A_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n", BIT(dword, 28)); printf("AUD_HDMIW_STATUS Conv_A_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", BIT(dword, 29)); printf("AUD_HDMIW_STATUS Conv_B_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n", BIT(dword, 30)); printf("AUD_HDMIW_STATUS Conv_B_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", BIT(dword, 31)); } /* * Display registers of Ironlake and Valleyview */ #undef DP_CTL_B #undef DP_CTL_C #undef DP_CTL_D #define DP_CTL_B 0x4100 #define DP_CTL_C 0x4200 #define DP_CTL_D 0x4300 /* ILK HDMI port ctrl */ #define HDMI_CTL_B 0x1140 #define HDMI_CTL_C 0x1150 #define HDMI_CTL_D 0x1160 #define BSW_HDMI_CTL_B 0x1140 #define BSW_HDMI_CTL_C 0x1160 #define BSW_HDMI_CTL_D 0x116c /* VLV HDMI port ctrl */ #define SDVO_HDMI_CTL_B 0x1140 #define SDVO_HDMI_CTL_C 0x1160 static void dump_dp_port_ctrl(int port) { uint32_t dword; int port_ctrl; char prefix[MAX_PREFIX_SIZE]; sprintf(prefix, "DP_%c", 'B' + port - PORT_B); port_ctrl = disp_reg_base + DP_CTL_B + (port - PORT_B) * 0x100; dword = INREG(port_ctrl); printf("%s DisplayPort_Enable\t\t\t\t\t%lu\n", prefix, BIT(dword, 31)); printf("%s Transcoder_Select\t\t\t\t\t%s\n", prefix, BIT(dword, 30) ? "Transcoder B" : "Transcoder A"); printf("%s Port_Width_Selection\t\t\t\t[0x%lx] %s\n", prefix, BITS(dword, 21, 19), dp_port_width[BITS(dword, 21, 19)]); printf("%s Port_Detected\t\t\t\t\t%lu\n", prefix, BIT(dword, 2)); printf("%s HDCP_Port_Select\t\t\t\t\t%lu\n", prefix, BIT(dword, 5)); printf("%s Audio_Output_Enable\t\t\t\t%lu\n", prefix, BIT(dword, 6)); } static void dump_hdmi_port_ctrl(int port) { uint32_t dword; int port_ctrl; char prefix[MAX_PREFIX_SIZE]; if (IS_VALLEYVIEW(devid)) { sprintf(prefix, "SDVO/HDMI%c", 'B' + port - PORT_B); port_ctrl = disp_reg_base + SDVO_HDMI_CTL_B + (port - PORT_B) * 0x20; } else { sprintf(prefix, "HDMI%c ", 'B' + port - PORT_B); port_ctrl = disp_reg_base + HDMI_CTL_B + (port - PORT_B) * 0x10; } dword = INREG(port_ctrl); printf("%s HDMI_Enable\t\t\t\t\t%u\n", prefix, !!(dword & SDVO_ENABLE)); printf("%s Transcoder_Select\t\t\t\t%s\n", prefix, BIT(dword, 30) ? "Transcoder B" : "Transcoder A"); printf("%s HDCP_Port_Select\t\t\t\t%lu\n", prefix, BIT(dword, 5)); if (port == PORT_B) /* TODO: check spec, not found in Ibx b-spec, and only for port B? */ printf("%s SDVO Hot Plug Interrupt Detect Enable\t%lu\n", prefix, BIT(dword, 23)); printf("%s Digital_Port_Detected\t\t\t%lu\n", prefix, BIT(dword, 2)); printf("%s Encoding\t\t\t\t\t[0x%lx] %s\n", prefix, BITS(dword, 11, 10), sdvo_hdmi_encoding[BITS(dword, 11, 10)]); printf("%s Null_packets_enabled_during_Vsync\t\t%u\n", prefix, !!(dword & SDVO_NULL_PACKETS_DURING_VSYNC)); printf("%s Audio_Output_Enable\t\t\t\t%u\n", prefix, !!(dword & SDVO_AUDIO_ENABLE)); } static void dump_ironlake(void) { uint32_t dword; if (!IS_VALLEYVIEW(devid)) set_reg_base(0xe0000, 0x2000); /* ironlake */ else set_reg_base(0x60000 + VLV_DISPLAY_BASE, 0x2000); if (!IS_VALLEYVIEW(devid)) { dump_disp_reg(HDMI_CTL_B, "sDVO/HDMI Port B Control"); dump_disp_reg(HDMI_CTL_C, "HDMI Port C Control"); dump_disp_reg(HDMI_CTL_D, "HDMI Port D Control"); } else { dump_disp_reg(SDVO_HDMI_CTL_B, "sDVO/HDMI Port B Control"); dump_disp_reg(SDVO_HDMI_CTL_C, "sDVO/HDMI Port C Control"); } dump_disp_reg(DP_CTL_B, "DisplayPort B Control Register"); dump_disp_reg(DP_CTL_C, "DisplayPort C Control Register"); if (!IS_VALLEYVIEW(devid)) dump_disp_reg(DP_CTL_D, "DisplayPort D Control Register"); dump_aud_reg(AUD_CONFIG_A, "Audio Configuration - Transcoder A"); dump_aud_reg(AUD_CONFIG_B, "Audio Configuration - Transcoder B"); dump_aud_reg(AUD_CTS_ENABLE_A, "Audio CTS Programming Enable - Transcoder A"); dump_aud_reg(AUD_CTS_ENABLE_B, "Audio CTS Programming Enable - Transcoder B"); dump_aud_reg(AUD_MISC_CTRL_A, "Audio MISC Control for Transcoder A"); dump_aud_reg(AUD_MISC_CTRL_B, "Audio MISC Control for Transcoder B"); dump_aud_reg(AUD_VID_DID, "Audio Vendor ID / Device ID"); dump_aud_reg(AUD_RID, "Audio Revision ID"); dump_aud_reg(AUD_PWRST, "Audio Power State (Function Group, Convertor, Pin Widget)"); dump_aud_reg(AUD_PORT_EN_HD_CFG, "Audio Port Enable HDAudio Config"); dump_aud_reg(AUD_OUT_DIG_CNVT_A, "Audio Digital Converter - Conv A"); dump_aud_reg(AUD_OUT_DIG_CNVT_B, "Audio Digital Converter - Conv B"); dump_aud_reg(AUD_OUT_CH_STR, "Audio Channel ID and Stream ID"); dump_aud_reg(AUD_OUT_STR_DESC_A, "Audio Stream Descriptor Format - Conv A"); dump_aud_reg(AUD_OUT_STR_DESC_B, "Audio Stream Descriptor Format - Conv B"); dump_aud_reg(AUD_PINW_CONNLNG_LIST, "Audio Connection List"); dump_aud_reg(AUD_PINW_CONNLNG_SEL, "Audio Connection Select"); dump_aud_reg(AUD_CNTL_ST_A, "Audio Control State Register - Transcoder A"); dump_aud_reg(AUD_CNTL_ST_B, "Audio Control State Register - Transcoder B"); dump_aud_reg(AUD_CNTL_ST2, "Audio Control State 2"); dump_aud_reg(AUD_HDMIW_STATUS, "Audio HDMI Status"); dump_aud_reg(AUD_HDMIW_HDMIEDID_A, "HDMI Data EDID Block - Transcoder A"); dump_aud_reg(AUD_HDMIW_HDMIEDID_B, "HDMI Data EDID Block - Transcoder B"); dump_aud_reg(AUD_HDMIW_INFOFR_A, "Audio Widget Data Island Packet - Transcoder A"); dump_aud_reg(AUD_HDMIW_INFOFR_B, "Audio Widget Data Island Packet - Transcoder B"); printf("\nDetails:\n\n"); dump_aud_vendor_device_id(); dump_aud_revision_id(); dump_hdmi_port_ctrl(PORT_B); dump_hdmi_port_ctrl(PORT_C); if (!IS_VALLEYVIEW(devid)) dump_hdmi_port_ctrl(PORT_D); dump_dp_port_ctrl(PORT_B); dump_dp_port_ctrl(PORT_C); if (!IS_VALLEYVIEW(devid)) dump_dp_port_ctrl(PORT_D); dump_aud_config(PIPE_A); dump_aud_config(PIPE_B); dump_aud_m_cts_enable(PIPE_A); dump_aud_m_cts_enable(PIPE_B); dump_aud_misc_control(PIPE_A); dump_aud_misc_control(PIPE_B); dump_aud_power_state(); dump_aud_port_en_hd_cfg(); dump_aud_dig_cnvt(PIPE_A); dump_aud_dig_cnvt(PIPE_B); dump_aud_out_ch_str(); dump_aud_str_desc(PIPE_A); dump_aud_str_desc(PIPE_B); dump_aud_connect_list(); dump_aud_connect_select(); dump_aud_ctrl_state(PIPE_A); dump_aud_ctrl_state(PIPE_B); dump_aud_ctrl_state2(); dump_aud_hdmi_status(); dump_aud_edid_data(PIPE_A); dump_aud_edid_data(PIPE_B); dump_aud_infoframe(PIPE_A); dump_aud_infoframe(PIPE_B); } #undef VIDEO_DIP_CTL_A #undef VIDEO_DIP_CTL_B #undef VIDEO_DIP_CTL_C #undef VIDEO_DIP_CTL_D #undef VIDEO_DIP_DATA /* * Haswell+ display registers */ /* DisplayPort Transport Control */ #define DP_TP_CTL_A 0x64040 #define DP_TP_CTL_B 0x64140 #define DP_TP_CTL_C 0x64240 #define DP_TP_CTL_D 0x64340 #define DP_TP_CTL_E 0x64440 /* DisplayPort Transport Status */ #define DP_TP_ST_A 0x64044 #define DP_TP_ST_B 0x64144 #define DP_TP_ST_C 0x64244 #define DP_TP_ST_D 0x64344 #define DP_TP_ST_E 0x64444 /* DDI Buffer Control */ #define DDI_BUF_CTL_A 0x64000 #define DDI_BUF_CTL_B 0x64100 #define DDI_BUF_CTL_C 0x64200 #define DDI_BUF_CTL_D 0x64300 #define DDI_BUF_CTL_E 0x64400 /* DDI Buffer Translation */ #define DDI_BUF_TRANS_A 0x64e00 #define DDI_BUF_TRANS_B 0x64e60 #define DDI_BUF_TRANS_C 0x64ec0 #define DDI_BUF_TRANS_D 0x64f20 #define DDI_BUF_TRANS_E 0x64f80 /* DDI Aux Channel */ #define DDI_AUX_CHANNEL_CTRL 0x64010 #define DDI_AUX_DATA 0x64014 #define DDI_AUX_TST 0x64028 /* DDI CRC Control */ #define DDI_CRC_CTL_A 0x64050 #define DDI_CRC_CTL_B 0x64150 #define DDI_CRC_CTL_C 0x64250 #define DDI_CRC_CTL_D 0x64350 #define DDI_CRC_CTL_E 0x64450 /* Pipe DDI Function Control */ #define PIPE_DDI_FUNC_CTL_A 0x60400 #define PIPE_DDI_FUNC_CTL_B 0x61400 #define PIPE_DDI_FUNC_CTL_C 0x62400 #define PIPE_DDI_FUNC_CTL_EDP 0x6F400 /* Pipe Configuration */ #define PIPE_CONF_A 0x70008 #define PIPE_CONF_B 0x71008 #define PIPE_CONF_C 0x72008 #define PIPE_CONF_EDP 0x7F008 /* Video DIP Control */ #define VIDEO_DIP_CTL_A 0x60200 #define VIDEO_DIP_CTL_B 0x61200 #define VIDEO_DIP_CTL_C 0x62200 #define VIDEO_DIP_CTL_D 0x63200 #define VIDEO_DIP_DATA 0x60220 #define VIDEO_DIP_ECC 0x60240 static void dump_ddi_buf_ctl(int port) { uint32_t dword; dword = INREG(DDI_BUF_CTL_A + (port - PORT_A) * 0x100); printf("DDI %c Buffer control\n", 'A' + port - PORT_A); printf("\tDP port width\t\t\t\t\t[0x%lx] %s\n", BITS(dword, 3, 1), OPNAME(dp_port_width, BITS(dword, 3, 1))); printf("\tDDI Buffer Enable\t\t\t\t%ld\n", BIT(dword, 31)); } static void dump_ddi_func_ctl(int pipe) { uint32_t dword; dword = INREG(PIPE_DDI_FUNC_CTL_A + (pipe - PIPE_A) * 0x1000); printf("Pipe %c DDI Function Control\n", 'A' + pipe - PIPE_A); printf("\tBITS per color\t\t\t\t\t[0x%lx] %s\n", BITS(dword, 22, 20), OPNAME(bits_per_color, BITS(dword, 22, 20))); printf("\tPIPE DDI Mode\t\t\t\t\t[0x%lx] %s\n", BITS(dword, 26, 24), OPNAME(ddi_mode, BITS(dword, 26, 24))); printf("\tPIPE DDI selection\t\t\t\t[0x%lx] %s\n", BITS(dword, 30, 28), OPNAME(trans_to_port_sel, BITS(dword, 30, 28))); printf("\tPIPE DDI Function Enable\t\t\t[0x%lx]\n", BIT(dword, 31)); } static void dump_aud_connect_list_entry_length(int transcoder) { uint32_t dword; char prefix[MAX_PREFIX_SIZE]; dword = INREG(aud_reg_base + AUD_TCA_PIN_PIPE_CONN_ENTRY_LNGTH + (transcoder - TRANSCODER_A) * 0x100); sprintf(prefix, "AUD_TC%c_PIN_PIPE_CONN_ENTRY_LNGTH", 'A' + transcoder - TRANSCODER_A); printf("%s Connect_List_Length\t%lu\n", prefix, BITS(dword, 6, 0)); printf("%s Form \t\t[%#lx] %s\n", prefix, BIT(dword, 7), OPNAME(connect_list_form, BIT(dword, 7))); printf("%s Connect_List_Entry\t%lu\n", prefix, BITS(dword, 15, 8)); } static void dump_aud_connect_select_ctrl(void) { uint32_t dword; dword = INREG(aud_reg_base + AUD_PIPE_CONN_SEL_CTRL); printf("AUD_PIPE_CONN_SEL_CTRL Connection_select_Port_B\t%#lx\n", BITS(dword, 7, 0)); printf("AUD_PIPE_CONN_SEL_CTRL Connection_select_Port_C\t%#lx\n", BITS(dword, 15, 8)); printf("AUD_PIPE_CONN_SEL_CTRL Connection_select_Port_D\t%#lx\n", BITS(dword, 23, 16)); } static void dump_aud_dip_eld_ctrl_st(int transcoder) { uint32_t dword; int offset = (transcoder - TRANSCODER_A) * 0x100; dword = INREG(aud_reg_base + AUD_TCA_DIP_ELD_CTRL_ST + offset); printf("Audio DIP and ELD control state for Transcoder %c\n", 'A' + transcoder - TRANSCODER_A); printf("\tELD_ACK\t\t\t\t\t\t%lu\n", BIT(dword, 4)); printf("\tELD_buffer_size\t\t\t\t\t%lu\n", BITS(dword, 14, 10)); printf("\tDIP_transmission_frequency\t\t\t[0x%lx] %s\n", BITS(dword, 17, 16), dip_trans[BITS(dword, 17, 16)]); printf("\tDIP Buffer Index \t\t\t\t[0x%lx] %s\n", BITS(dword, 20, 18), dip_index[BITS(dword, 20, 18)]); printf("\tAudio DIP type enable status\t\t\t[0x%04lx] %s, %s, %s\n", BITS(dword, 24, 21), dip_type[BIT(dword, 21)], dip_gen1_state[BIT(dword, 22)], dip_gen2_state[BIT(dword, 23)]); printf("\tAudio DIP port select\t\t\t\t[0x%lx] %s\n", BITS(dword, 30, 29), dip_port[BITS(dword, 30, 29)]); printf("\n"); } static void dump_aud_hdmi_fifo_status(void) { uint32_t dword; dword = INREG(aud_reg_base + AUD_HDMI_FIFO_STATUS); printf("AUD_HDMI_FIFO_STATUS Function_Reset\t\t\t%lu\n", BIT(dword, 24)); printf("AUD_HDMI_FIFO_STATUS Conv_1_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n", BIT(dword, 26)); printf("AUD_HDMI_FIFO_STATUS Conv_1_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", BIT(dword, 27)); printf("AUD_HDMI_FIFO_STATUS Conv_2_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n", BIT(dword, 28)); printf("AUD_HDMI_FIFO_STATUS Conv_2_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", BIT(dword, 29)); printf("AUD_HDMI_FIFO_STATUS Conv_3_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n", BIT(dword, 30)); printf("AUD_HDMI_FIFO_STATUS Conv_3_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", BIT(dword, 31)); } static void parse_bdw_audio_chicken_bit_reg(uint32_t dword) { printf("\t"); printf("%s\n\t", OPNAME(vanilla_dp12_en, BIT(dword, 31))); printf("%s\n\t", OPNAME(vanilla_3_widgets_en, BIT(dword, 30))); printf("%s\n\t", OPNAME(block_audio, BIT(dword, 10))); printf("%s\n\t", OPNAME(dis_eld_valid_pulse_trans, BIT(dword, 9))); printf("%s\n\t", OPNAME(dis_pd_pulse_trans, BIT(dword, 8))); printf("%s\n\t", OPNAME(dis_ts_delta_err, BIT(dword, 7))); printf("%s\n\t", OPNAME(dis_ts_fix_dp_hbr, BIT(dword, 6))); printf("%s\n\t", OPNAME(pattern_gen_8_ch_en, BIT(dword, 5))); printf("%s\n\t", OPNAME(pattern_gen_2_ch_en, BIT(dword, 4))); printf("%s\n\t", OPNAME(fabric_32_44_dis, BIT(dword, 3))); printf("%s\n\t", OPNAME(epss_dis, BIT(dword, 2))); printf("%s\n\t", OPNAME(ts_test_mode, BIT(dword, 1))); printf("%s\n", OPNAME(en_mmio_program, BIT(dword, 0))); } static void parse_skl_audio_freq_cntrl_reg(uint32_t dword) { printf("\t"); printf("%s\n\t", OPNAME(sdi_operate_mode, BIT(dword, 15))); printf("%s\n\t", OPNAME(bclk_96mhz, BIT(dword, 4))); printf("%s\n", OPNAME(bclk_48mhz, BIT(dword, 3))); } /* Dump audio registers for Haswell and its successors (eg. Broadwell). * Their register layout are same in the north display engine. */ static void dump_hsw_plus(void) { uint32_t dword; int i; set_aud_reg_base(0x65000); dump_reg(PORT_HOTPLUG_EN, "port hotplug enable"); dump_reg(PORT_HOTPLUG_STAT, "port hotplug status"); dump_reg(DISPLAY_HOTPLUG_CTL, "display hotplug control"); /* HSW DDI Buffer */ dump_reg(DDI_BUF_CTL_A, "DDI Buffer Controler A"); dump_reg(DDI_BUF_CTL_B, "DDI Buffer Controler B"); dump_reg(DDI_BUF_CTL_C, "DDI Buffer Controler C"); dump_reg(DDI_BUF_CTL_D, "DDI Buffer Controler D"); dump_reg(DDI_BUF_CTL_E, "DDI Buffer Controler E"); /* HSW Pipe Function */ dump_reg(PIPE_CONF_A, "PIPE Configuration A"); dump_reg(PIPE_CONF_B, "PIPE Configuration B"); dump_reg(PIPE_CONF_C, "PIPE Configuration C"); dump_reg(PIPE_CONF_EDP, "PIPE Configuration EDP"); dump_reg(PIPE_DDI_FUNC_CTL_A, "PIPE DDI Function Control A"); dump_reg(PIPE_DDI_FUNC_CTL_B, "PIPE DDI Function Control B"); dump_reg(PIPE_DDI_FUNC_CTL_C, "PIPE DDI Function Control C"); dump_reg(PIPE_DDI_FUNC_CTL_EDP, "PIPE DDI Function Control EDP"); /* HSW Display port */ dump_reg(DP_TP_CTL_A, "DisplayPort Transport A Control"); dump_reg(DP_TP_CTL_B, "DisplayPort Transport B Control"); dump_reg(DP_TP_CTL_C, "DisplayPort Transport C Control"); dump_reg(DP_TP_CTL_D, "DisplayPort Transport D Control"); dump_reg(DP_TP_CTL_E, "DisplayPort Transport E Control"); dump_reg(DP_TP_ST_A, "DisplayPort Transport A Status"); dump_reg(DP_TP_ST_B, "DisplayPort Transport B Status"); dump_reg(DP_TP_ST_C, "DisplayPort Transport C Status"); dump_reg(DP_TP_ST_D, "DisplayPort Transport D Status"); dump_reg(DP_TP_ST_E, "DisplayPort Transport E Status"); /* HSW North Display Audio */ dump_aud_reg(AUD_TCA_CONFIG, "Audio Configuration - Transcoder A"); dump_aud_reg(AUD_TCB_CONFIG, "Audio Configuration - Transcoder B"); dump_aud_reg(AUD_TCC_CONFIG, "Audio Configuration - Transcoder C"); dump_aud_reg(AUD_C1_MISC_CTRL, "Audio Converter 1 MISC Control"); dump_aud_reg(AUD_C2_MISC_CTRL, "Audio Converter 2 MISC Control"); dump_aud_reg(AUD_C3_MISC_CTRL, "Audio Converter 3 MISC Control"); dump_aud_reg(AUD_VID_DID, "Audio Vendor ID / Device ID"); dump_aud_reg(AUD_RID, "Audio Revision ID"); dump_aud_reg(AUD_TCA_M_CTS_ENABLE, "Audio M & CTS Programming Enable - Transcoder A"); dump_aud_reg(AUD_TCB_M_CTS_ENABLE, "Audio M & CTS Programming Enable - Transcoder B"); dump_aud_reg(AUD_TCC_M_CTS_ENABLE, "Audio M & CTS Programming Enable - Transcoder C"); dump_aud_reg(AUD_PWRST, "Audio Power State (Function Group, Convertor, Pin Widget)"); dump_aud_reg(AUD_TCA_EDID_DATA, "Audio EDID Data Block - Transcoder A"); dump_aud_reg(AUD_TCB_EDID_DATA, "Audio EDID Data Block - Transcoder B"); dump_aud_reg(AUD_TCC_EDID_DATA, "Audio EDID Data Block - Transcoder C"); if (IS_GEN9(devid)) dump_aud_reg(AUD_FREQ_CNTRL, "Audio BCLK Frequency Control"); dump_aud_reg(AUD_TCA_INFOFR, "Audio Widget Data Island Packet - Transcoder A"); dump_aud_reg(AUD_TCB_INFOFR, "Audio Widget Data Island Packet - Transcoder B"); dump_aud_reg(AUD_TCC_INFOFR, "Audio Widget Data Island Packet - Transcoder C"); dump_aud_reg(AUD_PIPE_CONV_CFG, "Audio Pipe and Converter Configs"); dump_aud_reg(AUD_C1_DIG_CNVT, "Audio Digital Converter - Converter 1"); dump_aud_reg(AUD_C2_DIG_CNVT, "Audio Digital Converter - Converter 2"); dump_aud_reg(AUD_C3_DIG_CNVT, "Audio Digital Converter - Converter 3"); dump_aud_reg(AUD_C1_STR_DESC, "Audio Stream Descriptor Format - Converter 1"); dump_aud_reg(AUD_C2_STR_DESC, "Audio Stream Descriptor Format - Converter 2"); dump_aud_reg(AUD_C3_STR_DESC, "Audio Stream Descriptor Format - Converter 3"); dump_aud_reg(AUD_OUT_CHAN_MAP, "Audio Output Channel Mapping"); dump_aud_reg(AUD_TCA_PIN_PIPE_CONN_ENTRY_LNGTH, "Audio Connection List entry and Length - Transcoder A"); dump_aud_reg(AUD_TCB_PIN_PIPE_CONN_ENTRY_LNGTH, "Audio Connection List entry and Length - Transcoder B"); dump_aud_reg(AUD_TCC_PIN_PIPE_CONN_ENTRY_LNGTH, "Audio Connection List entry and Length - Transcoder C"); dump_aud_reg(AUD_PIPE_CONN_SEL_CTRL, "Audio Pipe Connection Select Control"); dump_aud_reg(AUD_TCA_DIP_ELD_CTRL_ST, "Audio DIP and ELD control state - Transcoder A"); dump_aud_reg(AUD_TCB_DIP_ELD_CTRL_ST, "Audio DIP and ELD control state - Transcoder B"); dump_aud_reg(AUD_TCC_DIP_ELD_CTRL_ST, "Audio DIP and ELD control state - Transcoder C"); dump_aud_reg(AUD_PIN_ELD_CP_VLD, "Audio pin ELD valid and CP ready status"); dump_aud_reg(AUD_HDMI_FIFO_STATUS, "Audio HDMI FIFO Status"); /* Audio debug registers */ dump_aud_reg(AUD_ICOI, "Audio Immediate Command Output Interface"); dump_aud_reg(AUD_IRII, "Audio Immediate Response Input Interface"); dump_aud_reg(AUD_ICS, "Audio Immediate Command Status"); dump_aud_reg(AUD_CHICKENBIT_REG, "Audio Chicken Bit Register"); dump_aud_reg(AUD_DP_DIP_STATUS, "Audio DP and DIP FIFO Debug Status"); dump_aud_reg(AUD_TCA_M_CTS, "Audio M CTS Read Back Transcoder A"); dump_aud_reg(AUD_TCB_M_CTS, "Audio M CTS Read Back Transcoder B"); dump_aud_reg(AUD_TCC_M_CTS, "Audio M CTS Read Back Transcoder C"); if (IS_GEN9(devid)) { dump_aud_reg(AUD_HDA_DMA_REG, "Audio HD Audio DMA Control Register"); dump_aud_reg(AUD_HDA_LPIB0_REG, "Audio HD Audio Stream0 Link Position in Buffer"); dump_aud_reg(AUD_HDA_LPIB1_REG, "Audio HD Audio Stream1 Link Position in Buffer"); dump_aud_reg(AUD_HDA_LPIB2_REG, "Audio HD Audio Stream2 Link Position in Buffer"); dump_aud_reg(AUD_HDA_EXTRA_REG, "Audio HD Audio Extra Register"); dump_aud_reg(AUD_FPGA_CRC_CTL_A, "Audio FPGA Pipe A CRC Control"); dump_aud_reg(AUD_FPGA_CRC_CTL_B, "Audio FPGA Pipe B CRC Control"); dump_aud_reg(AUD_FPGA_CRC_CTL_C, "Audio FPGA Pipe C CRC Control"); dump_aud_reg(AUD_FPGA_CRC_RESULT_A, "Audio FPGA Pipe A CRC Result"); dump_aud_reg(AUD_FPGA_CRC_RESULT_B, "Audio FPGA Pipe B CRC Result"); dump_aud_reg(AUD_FPGA_CRC_RESULT_C, "Audio FPGA Pipe C CRC Result"); dump_aud_reg(AUD_DFT_MVAL_REG, "Audio DFT M Value Register"); dump_aud_reg(AUD_DFT_NVAL_REG, "Audio DFT N Value Register"); dump_aud_reg(AUD_DFT_LOAD_REG, "Audio DFT LOAD Register"); } printf("\nDetails:\n\n"); dump_ddi_buf_ctl(PORT_A); dump_ddi_buf_ctl(PORT_B); dump_ddi_buf_ctl(PORT_C); dump_ddi_buf_ctl(PORT_D); dump_ddi_buf_ctl(PORT_E); dump_ddi_func_ctl(PIPE_A); dump_ddi_func_ctl(PIPE_B); dump_ddi_func_ctl(PIPE_C); /* audio configuration - details */ dump_aud_config(TRANSCODER_A); dump_aud_config(TRANSCODER_B); dump_aud_config(TRANSCODER_C); dump_aud_misc_control(CONVERTER_1); dump_aud_misc_control(CONVERTER_2); dump_aud_misc_control(CONVERTER_3); dump_aud_vendor_device_id(); dump_aud_revision_id(); dump_aud_m_cts_enable(TRANSCODER_A); dump_aud_m_cts_enable(TRANSCODER_B); dump_aud_m_cts_enable(TRANSCODER_C); dump_aud_power_state(); dump_aud_edid_data(TRANSCODER_A); dump_aud_edid_data(TRANSCODER_B); dump_aud_edid_data(TRANSCODER_C); dump_aud_infoframe(TRANSCODER_A); dump_aud_infoframe(TRANSCODER_B); dump_aud_infoframe(TRANSCODER_C); dump_aud_pipe_conv_cfg(); dump_aud_dig_cnvt(CONVERTER_1); dump_aud_dig_cnvt(CONVERTER_2); dump_aud_dig_cnvt(CONVERTER_3); dump_aud_str_desc(CONVERTER_1); dump_aud_str_desc(CONVERTER_2); dump_aud_str_desc(CONVERTER_3); dump_aud_out_chan_map(); dump_aud_connect_list_entry_length(TRANSCODER_A); dump_aud_connect_list_entry_length(TRANSCODER_B); dump_aud_connect_list_entry_length(TRANSCODER_C); dump_aud_connect_select_ctrl(); dump_aud_dip_eld_ctrl_st(TRANSCODER_A); dump_aud_dip_eld_ctrl_st(TRANSCODER_B); dump_aud_dip_eld_ctrl_st(TRANSCODER_C); dump_aud_eld_cp_vld(); dump_aud_hdmi_fifo_status(); dword = read_aud_reg(AUD_ICS); printf("IRV [%1lx] %s\t", BIT(dword, 1), OPNAME(immed_result_valid, BIT(dword, 1))); printf("ICB [%1lx] %s\n", BIT(dword, 1), OPNAME(immed_cmd_busy, BIT(dword, 0))); dword = read_aud_reg(AUD_CHICKENBIT_REG); printf("AUD_CHICKENBIT_REG Audio Chicken Bits: %08x\n", dword); if (IS_BROADWELL(devid)) parse_bdw_audio_chicken_bit_reg(dword); dword = read_aud_reg(AUD_DP_DIP_STATUS); printf("AUD_DP_DIP_STATUS Audio DP & DIP FIFO Status: %08x\n\t", dword); for (i = 31; i >= 0; i--) if (BIT(dword, i)) printf("%s\n\t", audio_dp_dip_status[i]); printf("\n"); dword = read_aud_reg(AUD_FREQ_CNTRL); printf("AUD_FREQ_CNTRL Audio BCLK Frequency Control: %08x\n", dword); if (IS_GEN9(devid)) parse_skl_audio_freq_cntrl_reg(dword); } /* offset of hotplug enable */ #define PORT_HOTPLUG_EN_OFFSET 0x1110 /* offset of hotplug status */ #define PORT_HOTPLUG_STAT_OFFSET 0x1114 /* offset of hotplug control*/ #define DISPLAY_HOTPLUG_CTL_OFFSET 0x1164 /* dump the braswell registers for audio */ static void dump_braswell(void) { uint32_t dword; /* set_aud_reg_base(0x62000 + VLV_DISPLAY_BASE); */ set_reg_base(0x60000 + VLV_DISPLAY_BASE, 0x2000); dump_disp_reg(PORT_HOTPLUG_EN_OFFSET, "port hotplug enable"); dump_disp_reg(PORT_HOTPLUG_STAT_OFFSET, "port hotplug status"); dump_disp_reg(DISPLAY_HOTPLUG_CTL_OFFSET, "display hotplug control"); dump_disp_reg(BSW_HDMI_CTL_B, "sDVO/HDMI Port B Control"); dump_disp_reg(BSW_HDMI_CTL_C, "HDMI Port C Control"); // The address is wrong? dump_disp_reg(BSW_HDMI_CTL_D, "HDMI Port D Control"); dump_disp_reg(DP_CTL_B, "DisplayPort B Control Register"); dump_disp_reg(DP_CTL_C, "DisplayPort C Control Register"); dump_disp_reg(DP_CTL_D, "DisplayPort D Control Register"); /* HSW North Display Audio */ dump_aud_reg(AUD_TCA_CONFIG, "Audio Configuration - Transcoder A"); dump_aud_reg(AUD_TCB_CONFIG, "Audio Configuration - Transcoder B"); dump_aud_reg(AUD_TCC_CONFIG, "Audio Configuration - Transcoder C"); dump_aud_reg(AUD_C1_MISC_CTRL, "Audio Converter 1 MISC Control"); dump_aud_reg(AUD_C2_MISC_CTRL, "Audio Converter 2 MISC Control"); dump_aud_reg(AUD_C3_MISC_CTRL, "Audio Converter 3 MISC Control"); dump_aud_reg(AUD_VID_DID, "Audio Vendor ID / Device ID"); dump_aud_reg(AUD_RID, "Audio Revision ID"); dump_aud_reg(AUD_TCA_M_CTS_ENABLE, "Audio M & CTS Programming Enable - Transcoder A"); dump_aud_reg(AUD_TCB_M_CTS_ENABLE, "Audio M & CTS Programming Enable - Transcoder B"); dump_aud_reg(AUD_TCC_M_CTS_ENABLE, "Audio M & CTS Programming Enable - Transcoder C"); dump_aud_reg(AUD_PWRST, "Audio Power State (Function Group, Convertor, Pin Widget)"); dump_aud_reg(AUD_TCA_EDID_DATA, "Audio EDID Data Block - Transcoder A"); dump_aud_reg(AUD_TCB_EDID_DATA, "Audio EDID Data Block - Transcoder B"); dump_aud_reg(AUD_TCC_EDID_DATA, "Audio EDID Data Block - Transcoder C"); dump_aud_reg(AUD_TCA_INFOFR, "Audio Widget Data Island Packet - Transcoder A"); dump_aud_reg(AUD_TCB_INFOFR, "Audio Widget Data Island Packet - Transcoder B"); dump_aud_reg(AUD_TCC_INFOFR, "Audio Widget Data Island Packet - Transcoder C"); dump_aud_reg(AUD_PIPE_CONV_CFG, "Audio Pipe and Converter Configs"); dump_aud_reg(AUD_C1_DIG_CNVT, "Audio Digital Converter - Converter 1"); dump_aud_reg(AUD_C2_DIG_CNVT, "Audio Digital Converter - Converter 2"); dump_aud_reg(AUD_C3_DIG_CNVT, "Audio Digital Converter - Converter 3"); dump_aud_reg(AUD_C1_STR_DESC, "Audio Stream Descriptor Format - Converter 1"); dump_aud_reg(AUD_C2_STR_DESC, "Audio Stream Descriptor Format - Converter 2"); dump_aud_reg(AUD_C3_STR_DESC, "Audio Stream Descriptor Format - Converter 3"); dump_aud_reg(AUD_OUT_CHAN_MAP, "Audio Output Channel Mapping"); dump_aud_reg(AUD_TCA_PIN_PIPE_CONN_ENTRY_LNGTH, "Audio Connection List entry and Length - Transcoder A"); dump_aud_reg(AUD_TCB_PIN_PIPE_CONN_ENTRY_LNGTH, "Audio Connection List entry and Length - Transcoder B"); dump_aud_reg(AUD_TCC_PIN_PIPE_CONN_ENTRY_LNGTH, "Audio Connection List entry and Length - Transcoder C"); dump_aud_reg(AUD_PIPE_CONN_SEL_CTRL, "Audio Pipe Connection Select Control"); dump_aud_reg(AUD_TCA_DIP_ELD_CTRL_ST, "Audio DIP and ELD control state - Transcoder A"); dump_aud_reg(AUD_TCB_DIP_ELD_CTRL_ST, "Audio DIP and ELD control state - Transcoder B"); dump_aud_reg(AUD_TCC_DIP_ELD_CTRL_ST, "Audio DIP and ELD control state - Transcoder C"); dump_aud_reg(AUD_PIN_ELD_CP_VLD, "Audio pin ELD valid and CP ready status"); dump_aud_reg(AUD_HDMI_FIFO_STATUS, "Audio HDMI FIFO Status"); /* Audio debug registers */ dump_aud_reg(AUD_ICOI, "Audio Immediate Command Output Interface"); dump_aud_reg(AUD_IRII, "Audio Immediate Response Input Interface"); dump_aud_reg(AUD_ICS, "Audio Immediate Command Status"); dump_aud_reg(AUD_CHICKENBIT_REG, "Audio Chicken Bit Register"); dump_aud_reg(AUD_DP_DIP_STATUS, "Audio DP and DIP FIFO Debug Status"); dump_aud_reg(AUD_TCA_M_CTS, "Audio M CTS Read Back Transcoder A"); dump_aud_reg(AUD_TCB_M_CTS, "Audio M CTS Read Back Transcoder B"); dump_aud_reg(AUD_TCC_M_CTS, "Audio M CTS Read Back Transcoder C"); printf("\n"); printf("\nDetails:\n\n"); dump_aud_vendor_device_id(); dump_aud_revision_id(); dump_hdmi_port_ctrl(PORT_B); dump_hdmi_port_ctrl(PORT_C); if (!IS_VALLEYVIEW(devid)) dump_hdmi_port_ctrl(PORT_D); dump_dp_port_ctrl(PORT_B); dump_dp_port_ctrl(PORT_C); if (!IS_VALLEYVIEW(devid)) dump_dp_port_ctrl(PORT_D); dump_aud_config(PIPE_A); dump_aud_config(PIPE_B); dump_aud_m_cts_enable(PIPE_A); dump_aud_m_cts_enable(PIPE_B); dump_aud_misc_control(PIPE_A); dump_aud_misc_control(PIPE_B); dump_aud_power_state(); dump_aud_port_en_hd_cfg(); dump_aud_dig_cnvt(PIPE_A); dump_aud_dig_cnvt(PIPE_B); dump_aud_out_ch_str(); dump_aud_str_desc(PIPE_A); dump_aud_str_desc(PIPE_B); dump_aud_connect_list(); dump_aud_connect_select(); dump_aud_ctrl_state(PIPE_A); dump_aud_ctrl_state(PIPE_B); dump_aud_ctrl_state2(); dump_aud_hdmi_status(); dump_aud_edid_data(PIPE_A); dump_aud_edid_data(PIPE_B); dump_aud_infoframe(PIPE_A); dump_aud_infoframe(PIPE_B); } int main(int argc, char **argv) { struct pci_device *pci_dev; pci_dev = intel_get_pci_device(); devid = pci_dev->device_id; /* XXX not true when mapping! */ do_self_tests(); if (argc == 2) intel_mmio_use_dump_file(argv[1]); else intel_mmio_use_pci_bar(pci_dev); if (IS_VALLEYVIEW(devid)) { printf("Valleyview audio registers:\n\n"); dump_ironlake(); } else if (IS_GEN9(devid) || IS_BROADWELL(devid) || IS_HASWELL(devid)) { printf("%s audio registers:\n\n", IS_BROXTON(devid) ? "Broxton" : (IS_SKYLAKE(devid) ? "Skylake" : (IS_BROADWELL(devid) ? "Broadwell" : "Haswell"))); dump_hsw_plus(); } else if (IS_GEN6(devid) || IS_GEN7(devid) || getenv("HAS_PCH_SPLIT")) { printf("%s audio registers:\n\n", IS_GEN6(devid) ? "SandyBridge" : "IvyBridge"); intel_check_pch(); dump_cpt(); } else if (IS_GEN5(devid)) { printf("Ironlake audio registers:\n\n"); dump_ironlake(); } else if (IS_G4X(devid)) { printf("G45 audio registers:\n\n"); dump_eaglelake(); } else if (IS_CHERRYVIEW(devid)) { printf("Braswell audio registers:\n\n"); dump_braswell(); } return 0; } intel-gpu-tools-1.14/tools/intel_perf_counters.c0000644000175000017500000004042412665336131017011 00000000000000/* * Copyright © 2010, 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. * * Authors: * Eric Anholt * Kenneth Graunke * * While documentation for performance counters is suspiciously missing from the * Sandybridge PRM, they were documented in Volume 1 Part 3 of the Ironlake PRM. * * A lot of the Ironlake PRM actually unintentionally documents Sandybridge * due to mistakes made when updating the documentation for Gen6+. Many of * these mislabeled sections carried forward to the public documentation. * * The Ironlake PRMs have been publicly available since 2010 and are online at: * https://01.org/linuxgraphics/documentation/2010-intel-core-processor-family */ #include #include #include #include #include #include #include "drm.h" #include "i915_drm.h" #include "drmtest.h" #include "intel_io.h" #include "intel_bufmgr.h" #include "intel_batchbuffer.h" #include "intel_chipset.h" #define GEN5_COUNTER_COUNT 29 const char *gen5_counter_names[GEN5_COUNTER_COUNT] = { "cycles the CS unit is starved", "cycles the CS unit is stalled", "cycles the VF unit is starved", "cycles the VF unit is stalled", "cycles the VS unit is starved", "cycles the VS unit is stalled", "cycles the GS unit is starved", "cycles the GS unit is stalled", "cycles the CL unit is starved", "cycles the CL unit is stalled", "cycles the SF unit is starved", "cycles the SF unit is stalled", "cycles the WZ unit is starved", "cycles the WZ unit is stalled", "Z buffer read/write ", "cycles each EU was active ", "cycles each EU was suspended ", "cycles threads loaded all EUs", "cycles filtering active ", "cycles PS threads executed ", "subspans written to RC ", "bytes read for texture reads ", "texels returned from sampler ", "polygons not culled ", "clocks MASF has valid message", "64b writes/reads from RC ", "reads on dataport ", "clocks MASF has valid msg not consumed by sampler", "cycles any EU is stalled for math", }; #define GEN6_COUNTER_COUNT 29 /** * Sandybridge: Counter Select = 001 * A0 A1 A2 A3 A4 TIMESTAMP RPT_ID * A5 A6 A7 A8 A9 A10 A11 A12 * A13 A14 A15 A16 A17 A18 A19 A20 * A21 A22 A23 A24 A25 A26 A27 A28 */ const int gen6_counter_format = 1; /** * Names for aggregating counters A0-A28. * * While the Ironlake PRM clearly documents that there are 29 counters (A0-A28), * it only lists the names for 28 of them; one is missing. However, careful * examination reveals a pattern: there are five GS counters (Active, Stall, * Core Stall, # threads loaded, and ready but not running time). There are * also five PS counters, in the same order. But there are only four VS * counters listed - the number of VS threads loaded is missing. Presumably, * it exists and is counter 5, and the rest are shifted over one place. */ const char *gen6_counter_names[GEN6_COUNTER_COUNT] = { [0] = "Aggregated Core Array Active", [1] = "Aggregated Core Array Stalled", [2] = "Vertex Shader Active Time", [3] = "Vertex Shader Stall Time", [4] = "Vertex Shader Stall Time - Core Stall", [5] = "# VS threads loaded", [6] = "Vertex Shader Ready but not running time", [7] = "Geometry Shader Active Time", [8] = "Geometry Shader Stall Time", [9] = "Geometry Shader Stall Time - Core Stall", [10] = "# GS threads loaded", [11] = "Geometry Shader ready but not running Time", [12] = "Pixel Shader Active Time", [13] = "Pixel Shader Stall Time", [14] = "Pixel Shader Stall Time - Core Stall", [15] = "# PS threads loaded", [16] = "Pixel Shader ready but not running Time", [17] = "Early Z Test Pixels Passing", [18] = "Early Z Test Pixels Failing", [19] = "Early Stencil Test Pixels Passing", [20] = "Early Stencil Test Pixels Failing", [21] = "Pixel Kill Count", [22] = "Alpha Test Pixels Failed", [23] = "Post PS Stencil Pixels Failed", [24] = "Post PS Z buffer Pixels Failed", [25] = "Pixels/samples Written in the frame buffer", [26] = "GPU Busy", [27] = "CL active and not stalled", [28] = "SF active and stalled", }; #define GEN7_COUNTER_COUNT 44 /** * Names for aggregating counters A0-A44. Uninitialized fields are "Reserved." */ const char *gen7_counter_names[GEN7_COUNTER_COUNT] = { /* A0: * The sum of all cycles on all cores actively executing instructions * This does not count the time taken to service Send instructions. * This time is considered by shader active counters to give the result. */ [0] = "Aggregated Core Array Active", /* A1: * The sum of all cycles on all cores where the EU is not idle and is * not actively executing ISA instructions. Generally this means that * all loaded threads on the EU are stalled on some data dependency, * but this also includes the time during which the TS is loading the * thread dispatch header into the EU prior to thread execution and no * other thread is fully loaded. */ [1] = "Aggregated Core Array Stalled", /* A2: * Total time in clocks the vertex shader spent active on all cores. */ [2] = "Vertex Shader Active Time", /* A4: * Total time in clocks the vertex shader spent stalled on all cores - * and the entire core was stalled as well. */ [4] = "Vertex Shader Stall Time - Core Stall", /* A5: Number of VS threads loaded at any given time in the EUs. */ [5] = "# VS threads loaded", /* A7: * Total time in clocks the Hull shader spent active on all cores. */ [7] = "Hull Shader Active Time", /* A9: * Total time in clocks the Hull shader spent stalled on all cores - * and the entire core was stalled as well. */ [9] = "Hull Shader Stall Time - Core Stall", /* A10: Number of HS threads loaded at any given time in the EUs. */ [10] = "# HS threads loaded", /* A12: * Total time in clocks the Domain shader spent active on all cores. */ [12] = "Domain Shader Active Time", /* A14: * Total time in clocks the domain shader spent stalled on all cores - * and the entire core was stalled as well. */ [14] = "Domain Shader Stall Time - Core Stall", /* A15: Number of DS threads loaded at any given time in the EUs. */ [15] = "# DS threads loaded", /* A17: * Total time in clocks the compute shader spent active on all cores. */ [17] = "Compute Shader Active Time", /* A19: * Total time in clocks the compute shader spent stalled on all cores - * and the entire core was stalled as well. */ [19] = "Compute Shader Stall Time - Core Stall", /* A20: Number of CS threads loaded at any given time in the EUs. */ [20] = "# CS threads loaded", /* A22: * Total time in clocks the geometry shader spent active on all cores. */ [22] = "Geometry Shader Active Time", /* A24: * Total time in clocks the geometry shader spent stalled on all cores - * and the entire core was stalled as well. */ [24] = "Geometry Shader Stall Time - Core Stall", /* A25: Number of GS threads loaded at any time in the EUs. */ [25] = "# GS threads loaded", /* A27: * Total time in clocks the pixel shader spent active on all cores. */ [27] = "Pixel Shader Active Time", /* A29: * Total time in clocks the pixel shader spent stalled on all cores - * and the entire core was stalled as well. */ [29] = "Pixel Shader Stall Time - Core Stall", /* A30: Number of PS threads loaded at any given time in the EUs. */ [30] = "# PS threads loaded", /* A32: Count of pixels that pass the fast check (8x8). */ [32] = "HiZ Fast Z Test Pixels Passing", /* A33: Count of pixels that fail the fast check (8x8). */ [33] = "HiZ Fast Z Test Pixels Failing", /* A34: Count of pixels passing the slow check (2x2). */ [34] = "Slow Z Test Pixels Passing", /* A35: Count of pixels that fail the slow check (2x2). */ [35] = "Slow Z Test Pixels Failing", /* A36: Number of pixels/samples killed in the pixel shader. * Ivybridge/Baytrail Erratum: Count reported is 2X the actual count for * dual source render target messages i.e. when PS has two output colors. */ [36] = "Pixel Kill Count", /* A37: * Number of pixels/samples that fail alpha-test. Alpha to coverage * may have some challenges in per-pixel invocation. */ [37] = "Alpha Test Pixels Failed", /* A38: * Number of pixels/samples failing stencil test after the pixel shader * has executed. */ [38] = "Post PS Stencil Pixels Failed", /* A39: * Number of pixels/samples fail Z test after the pixel shader has * executed. */ [39] = "Post PS Z buffer Pixels Failed", /* A40: * Number of render target writes. MRT scenarios will cause this * counter to increment multiple times. */ [40] = "3D/GPGPU Render Target Writes", /* A41: Render engine is not idle. * * GPU Busy aggregate counter doesn't increment under the following * conditions: * * 1. Context Switch in Progress. * 2. GPU stalled on executing MI_WAIT_FOR_EVENT. * 3. GPU stalled on execution MI_SEMAPHORE_MBOX. * 4. RCS idle but other parts of GPU active (e.g. only media engines * active) */ [41] = "Render Engine Busy", /* A42: * VSunit is stalling VF (upstream unit) and starving HS (downstream * unit). */ [42] = "VS bottleneck", /* A43: * GSunit is stalling DS (upstream unit) and starving SOL (downstream * unit). */ [43] = "GS bottleneck", }; /** * Ivybridge - Counter Select = 101 * A4 A3 A2 A1 A0 TIMESTAMP ReportID * A12 A11 A10 A9 A8 A7 A6 A5 * A20 A19 A18 A17 A16 A15 A14 A13 * A28 A27 A26 A25 A24 A23 A22 A21 * A36 A35 A34 A33 A32 A31 A30 A29 * A44 A43 A42 A41 A40 A39 A38 A37 * C3 C2 C1 C0 B3 B2 B1 B0 * C11 C10 C9 C8 C7 C6 C5 C4 */ const int gen7_counter_format = 5; /* 0b101 */ int have_totals = 0; uint32_t *totals; uint32_t *last_counter; static drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; /* DW0 */ #define GEN5_MI_REPORT_PERF_COUNT ((0x26 << 23) | (3 - 2)) #define MI_COUNTER_SET_0 (0 << 6) #define MI_COUNTER_SET_1 (1 << 6) /* DW1 */ #define MI_COUNTER_ADDRESS_GTT (1 << 0) /* DW2: report ID */ /** * According to the Sandybridge PRM, Volume 1, Part 1, page 48, * MI_REPORT_PERF_COUNT is now opcode 0x28. The Ironlake PRM, Volume 1, * Part 3 details how it works. */ /* DW0 */ #define GEN6_MI_REPORT_PERF_COUNT (0x28 << 23) /* DW1 and 2 are the same as above */ /* OACONTROL exists on Gen6+ but is documented in the Ironlake PRM */ #define OACONTROL 0x2360 # define OACONTROL_COUNTER_SELECT_SHIFT 2 # define PERFORMANCE_COUNTER_ENABLE (1 << 0) static void gen5_get_counters(void) { int i; drm_intel_bo *stats_bo; uint32_t *stats_result; stats_bo = drm_intel_bo_alloc(bufmgr, "stats", 4096, 4096); BEGIN_BATCH(6, 2); OUT_BATCH(GEN5_MI_REPORT_PERF_COUNT | MI_COUNTER_SET_0); OUT_RELOC(stats_bo, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, 0); OUT_BATCH(0); OUT_BATCH(GEN5_MI_REPORT_PERF_COUNT | MI_COUNTER_SET_1); OUT_RELOC(stats_bo, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, 64); OUT_BATCH(0); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); drm_intel_bo_map(stats_bo, 0); stats_result = stats_bo->virtual; /* skip REPORT_ID, TIMESTAMP */ stats_result += 3; for (i = 0 ; i < GEN5_COUNTER_COUNT; i++) { totals[i] += stats_result[i] - last_counter[i]; last_counter[i] = stats_result[i]; } drm_intel_bo_unmap(stats_bo); drm_intel_bo_unreference(stats_bo); } static void gen6_get_counters(void) { int i; drm_intel_bo *stats_bo; uint32_t *stats_result; /* Map from counter names to their index in the buffer object */ static const int buffer_index[GEN6_COUNTER_COUNT] = { 7, 6, 5, 4, 3, 15, 14, 13, 12, 11, 10, 9, 8, 23, 22, 21, 20, 19, 18, 17, 16, 31, 30, 29, 28, 27, 26, 25, 24, }; stats_bo = drm_intel_bo_alloc(bufmgr, "stats", 4096, 4096); BEGIN_BATCH(3, 1); OUT_BATCH(GEN6_MI_REPORT_PERF_COUNT | (3 - 2)); OUT_RELOC(stats_bo, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, MI_COUNTER_ADDRESS_GTT); OUT_BATCH(0); ADVANCE_BATCH(); intel_batchbuffer_flush_on_ring(batch, I915_EXEC_RENDER); drm_intel_bo_map(stats_bo, 0); stats_result = stats_bo->virtual; for (i = 0; i < GEN6_COUNTER_COUNT; i++) { totals[i] += stats_result[buffer_index[i]] - last_counter[i]; last_counter[i] = stats_result[buffer_index[i]]; } drm_intel_bo_unmap(stats_bo); drm_intel_bo_unreference(stats_bo); } static void gen7_get_counters(void) { int i; drm_intel_bo *stats_bo; uint32_t *stats_result; stats_bo = drm_intel_bo_alloc(bufmgr, "stats", 4096, 4096); BEGIN_BATCH(3, 1); OUT_BATCH(GEN6_MI_REPORT_PERF_COUNT | (3 - 2)); OUT_RELOC(stats_bo, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, 0); OUT_BATCH(0); ADVANCE_BATCH(); intel_batchbuffer_flush_on_ring(batch, I915_EXEC_RENDER); drm_intel_bo_map(stats_bo, 0); stats_result = stats_bo->virtual; /* skip REPORT_ID, TIMESTAMP */ stats_result += 3; for (i = 0; i < GEN7_COUNTER_COUNT; i++) { /* Ignore "Reserved" counters */ if (!gen7_counter_names[i]) continue; totals[i] += stats_result[i] - last_counter[i]; last_counter[i] = stats_result[i]; } drm_intel_bo_unmap(stats_bo); drm_intel_bo_unreference(stats_bo); } #define STATS_CHECK_FREQUENCY 100 #define STATS_REPORT_FREQUENCY 2 int main(int argc, char **argv) { uint32_t devid; int counter_format; int counter_count; const char **counter_name; void (*get_counters)(void); int i; char clear_screen[] = {0x1b, '[', 'H', 0x1b, '[', 'J', 0x0}; bool oacontrol = true; int fd; int l; fd = drm_open_driver(DRIVER_INTEL); devid = intel_get_drm_devid(fd); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); drm_intel_bufmgr_gem_enable_reuse(bufmgr); batch = intel_batchbuffer_alloc(bufmgr, devid); if (IS_GEN5(devid)) { counter_name = gen5_counter_names; counter_count = GEN5_COUNTER_COUNT; get_counters = gen5_get_counters; oacontrol = false; } else if (IS_GEN6(devid)) { counter_name = gen6_counter_names; counter_count = GEN6_COUNTER_COUNT; counter_format = gen6_counter_format; get_counters = gen6_get_counters; } else if (IS_GEN7(devid)) { counter_name = gen7_counter_names; counter_count = GEN7_COUNTER_COUNT; counter_format = gen7_counter_format; get_counters = gen7_get_counters; } else { printf("This tool is not yet supported on your platform.\n"); abort(); } if (oacontrol) { /* Forcewake */ intel_register_access_init(intel_get_pci_device(), 0); /* Enable performance counters */ intel_register_write(OACONTROL, counter_format << OACONTROL_COUNTER_SELECT_SHIFT | PERFORMANCE_COUNTER_ENABLE); } totals = calloc(counter_count, sizeof(uint32_t)); last_counter = calloc(counter_count, sizeof(uint32_t)); for (;;) { for (l = 0; l < STATS_CHECK_FREQUENCY; l++) { printf("%s", clear_screen); if (l % (STATS_CHECK_FREQUENCY / STATS_REPORT_FREQUENCY) == 0) { if (have_totals) { for (i = 0; i < counter_count; i++) { /* Ignore "Reserved" counters */ if (!counter_name[i]) continue; printf("%s: %u\n", counter_name[i], totals[i]); totals[i] = 0; } } } get_counters(); have_totals = 1; usleep(1000000 / STATS_CHECK_FREQUENCY); } } if (oacontrol) { /* Disable performance counters */ intel_register_write(OACONTROL, 0); /* Forcewake */ intel_register_access_fini(); } free(totals); free(last_counter); return 0; } intel-gpu-tools-1.14/tools/intel_gpu_top.c0000644000175000017500000003712312665336131015612 00000000000000/* * Copyright © 2007 Intel Corporation * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. * * Authors: * Eric Anholt * Eugeni Dodonov * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include #include #include #include #include #include #ifdef HAVE_TERMIOS_H #include #endif #include "intel_io.h" #include "instdone.h" #include "intel_reg.h" #include "intel_chipset.h" #define FORCEWAKE 0xA18C #define FORCEWAKE_ACK 0x130090 #define SAMPLES_PER_SEC 10000 #define SAMPLES_TO_PERCENT_RATIO (SAMPLES_PER_SEC / 100) #define MAX_NUM_TOP_BITS 100 #define HAS_STATS_REGS(devid) IS_965(devid) struct top_bit { struct instdone_bit *bit; int count; } top_bits[MAX_NUM_TOP_BITS]; struct top_bit *top_bits_sorted[MAX_NUM_TOP_BITS]; static uint32_t instdone, instdone1; static const char *bars[] = { " ", "▏", "▎", "▍", "▌", "▋", "▊", "▉", "█" }; enum stats_counts { IA_VERTICES, IA_PRIMITIVES, VS_INVOCATION, GS_INVOCATION, GS_PRIMITIVES, CL_INVOCATION, CL_PRIMITIVES, PS_INVOCATION, PS_DEPTH, STATS_COUNT }; const uint32_t stats_regs[STATS_COUNT] = { IA_VERTICES_COUNT_QW, IA_PRIMITIVES_COUNT_QW, VS_INVOCATION_COUNT_QW, GS_INVOCATION_COUNT_QW, GS_PRIMITIVES_COUNT_QW, CL_INVOCATION_COUNT_QW, CL_PRIMITIVES_COUNT_QW, PS_INVOCATION_COUNT_QW, PS_DEPTH_COUNT_QW, }; const char *stats_reg_names[STATS_COUNT] = { "vert fetch", "prim fetch", "VS invocations", "GS invocations", "GS prims", "CL invocations", "CL prims", "PS invocations", "PS depth pass", }; uint64_t stats[STATS_COUNT]; uint64_t last_stats[STATS_COUNT]; static unsigned long gettime(void) { struct timeval t; gettimeofday(&t, NULL); return (t.tv_usec + (t.tv_sec * 1000000)); } static int top_bits_sort(const void *a, const void *b) { struct top_bit * const *bit_a = a; struct top_bit * const *bit_b = b; int a_count = (*bit_a)->count; int b_count = (*bit_b)->count; if (a_count < b_count) return 1; else if (a_count == b_count) return 0; else return -1; } static void update_idle_bit(struct top_bit *top_bit) { uint32_t reg_val; if (top_bit->bit->reg == INSTDONE_1) reg_val = instdone1; else reg_val = instdone; if ((reg_val & top_bit->bit->bit) == 0) top_bit->count++; } static void print_clock(const char *name, int clock) { if (clock == -1) printf("%s clock: unknown", name); else printf("%s clock: %d Mhz", name, clock); } static int print_clock_info(struct pci_device *pci_dev) { uint32_t devid = pci_dev->device_id; uint16_t gcfgc; if (IS_GM45(devid)) { int core_clock = -1; pci_device_cfg_read_u16(pci_dev, &gcfgc, I915_GCFGC); switch (gcfgc & 0xf) { case 8: core_clock = 266; break; case 9: core_clock = 320; break; case 11: core_clock = 400; break; case 13: core_clock = 533; break; } print_clock("core", core_clock); } else if (IS_965(devid) && IS_MOBILE(devid)) { int render_clock = -1, sampler_clock = -1; pci_device_cfg_read_u16(pci_dev, &gcfgc, I915_GCFGC); switch (gcfgc & 0xf) { case 2: render_clock = 250; sampler_clock = 267; break; case 3: render_clock = 320; sampler_clock = 333; break; case 4: render_clock = 400; sampler_clock = 444; break; case 5: render_clock = 500; sampler_clock = 533; break; } print_clock("render", render_clock); printf(" "); print_clock("sampler", sampler_clock); } else if (IS_945(devid) && IS_MOBILE(devid)) { int render_clock = -1, display_clock = -1; pci_device_cfg_read_u16(pci_dev, &gcfgc, I915_GCFGC); switch (gcfgc & 0x7) { case 0: render_clock = 166; break; case 1: render_clock = 200; break; case 3: render_clock = 250; break; case 5: render_clock = 400; break; } switch (gcfgc & 0x70) { case 0: display_clock = 200; break; case 4: display_clock = 320; break; } if (gcfgc & (1 << 7)) display_clock = 133; print_clock("render", render_clock); printf(" "); print_clock("display", display_clock); } else if (IS_915(devid) && IS_MOBILE(devid)) { int render_clock = -1, display_clock = -1; pci_device_cfg_read_u16(pci_dev, &gcfgc, I915_GCFGC); switch (gcfgc & 0x7) { case 0: render_clock = 160; break; case 1: render_clock = 190; break; case 4: render_clock = 333; break; } if (gcfgc & (1 << 13)) render_clock = 133; switch (gcfgc & 0x70) { case 0: display_clock = 190; break; case 4: display_clock = 333; break; } if (gcfgc & (1 << 7)) display_clock = 133; print_clock("render", render_clock); printf(" "); print_clock("display", display_clock); } printf("\n"); return -1; } #define STATS_LEN (20) #define PERCENTAGE_BAR_END (79 - STATS_LEN) static void print_percentage_bar(float percent, int cur_line_len) { int bar_avail_len = (PERCENTAGE_BAR_END - cur_line_len - 1) * 8; int bar_len = bar_avail_len * (percent + .5) / 100.0; int i; for (i = bar_len; i >= 8; i -= 8) { printf("%s", bars[8]); cur_line_len++; } if (i) { printf("%s", bars[i]); cur_line_len++; } /* NB: We can't use a field width with utf8 so we manually * guarantee a field with of 45 chars for any bar. */ printf("%*s", PERCENTAGE_BAR_END - cur_line_len, ""); } struct ring { const char *name; uint32_t mmio; int head, tail, size; uint64_t full; int idle; }; static uint32_t ring_read(struct ring *ring, uint32_t reg) { return INREG(ring->mmio + reg); } static void ring_init(struct ring *ring) { ring->size = (((ring_read(ring, RING_LEN) & RING_NR_PAGES) >> 12) + 1) * 4096; } static void ring_reset(struct ring *ring) { ring->idle = ring->full = 0; } static void ring_sample(struct ring *ring) { int full; if (!ring->size) return; ring->head = ring_read(ring, RING_HEAD) & HEAD_ADDR; ring->tail = ring_read(ring, RING_TAIL) & TAIL_ADDR; if (ring->tail == ring->head) ring->idle++; full = ring->tail - ring->head; if (full < 0) full += ring->size; ring->full += full; } static void ring_print_header(FILE *out, struct ring *ring) { fprintf(out, "%.6s%%\tops\t", ring->name ); } static void ring_print(struct ring *ring, unsigned long samples_per_sec) { int percent_busy, len; if (!ring->size) return; percent_busy = 100 - 100 * ring->idle / samples_per_sec; len = printf("%25s busy: %3d%%: ", ring->name, percent_busy); print_percentage_bar (percent_busy, len); printf("%24s space: %d/%d\n", ring->name, (int)(ring->full / samples_per_sec), ring->size); } static void ring_log(struct ring *ring, unsigned long samples_per_sec, FILE *output) { if (ring->size) fprintf(output, "%3d\t%d\t", (int)(100 - 100 * ring->idle / samples_per_sec), (int)(ring->full / samples_per_sec)); else fprintf(output, "-1\t-1\t"); } static void usage(const char *appname) { printf("intel_gpu_top - Display a top-like summary of Intel GPU usage\n" "\n" "usage: %s [parameters]\n" "\n" "The following parameters apply:\n" "[-s ] samples per seconds (default %d)\n" "[-e ] command to profile\n" "[-o ] output statistics to file. If file is '-'," " run in batch mode and output statistics to stdio only \n" "[-h] show this help screen\n" "\n", appname, SAMPLES_PER_SEC ); return; } int main(int argc, char **argv) { uint32_t devid; struct pci_device *pci_dev; struct ring render_ring = { .name = "render", .mmio = 0x2030, }, bsd_ring = { .name = "bitstream", .mmio = 0x4030, }, bsd6_ring = { .name = "bitstream", .mmio = 0x12030, }, blt_ring = { .name = "blitter", .mmio = 0x22030, }; int i, ch; int samples_per_sec = SAMPLES_PER_SEC; FILE *output = NULL; double elapsed_time=0; int print_headers=1; pid_t child_pid=-1; int child_stat; char *cmd=NULL; int interactive=1; /* Parse options? */ while ((ch = getopt(argc, argv, "s:o:e:h")) != -1) { switch (ch) { case 'e': cmd = strdup(optarg); break; case 's': samples_per_sec = atoi(optarg); if (samples_per_sec < 100) { fprintf(stderr, "Error: samples per second must be >= 100\n"); exit(1); } break; case 'o': if (!strcmp(optarg, "-")) { /* Running in non-interactive mode */ interactive = 0; output = stdout; } else output = fopen(optarg, "w"); if (!output) { perror("fopen"); exit(1); } break; case 'h': usage(argv[0]); exit(0); break; default: fprintf(stderr, "Invalid flag %c!\n", (char)optopt); usage(argv[0]); exit(1); break; } } pci_dev = intel_get_pci_device(); devid = pci_dev->device_id; intel_mmio_use_pci_bar(pci_dev); init_instdone_definitions(devid); /* Do we have a command to run? */ if (cmd != NULL) { if (output) { fprintf(output, "# Profiling: %s\n", cmd); fflush(output); } child_pid = fork(); if (child_pid < 0) { perror("fork"); exit(1); } else if (child_pid == 0) { int res; res = system(cmd); if (res < 0) perror("running command"); if (output) { fflush(output); fprintf(output, "# %s exited with status %d\n", cmd, res); fflush(output); } free(cmd); exit(0); } else { free(cmd); } } for (i = 0; i < num_instdone_bits; i++) { top_bits[i].bit = &instdone_bits[i]; top_bits[i].count = 0; top_bits_sorted[i] = &top_bits[i]; } /* Grab access to the registers */ intel_register_access_init(pci_dev, 0); ring_init(&render_ring); if (IS_GEN4(devid) || IS_GEN5(devid)) ring_init(&bsd_ring); if (IS_GEN6(devid) || IS_GEN7(devid)) { ring_init(&bsd6_ring); ring_init(&blt_ring); } /* Initialize GPU stats */ if (HAS_STATS_REGS(devid)) { for (i = 0; i < STATS_COUNT; i++) { uint32_t stats_high, stats_low, stats_high_2; do { stats_high = INREG(stats_regs[i] + 4); stats_low = INREG(stats_regs[i]); stats_high_2 = INREG(stats_regs[i] + 4); } while (stats_high != stats_high_2); last_stats[i] = (uint64_t)stats_high << 32 | stats_low; } } for (;;) { int j; unsigned long long t1, ti, tf, t2; unsigned long long def_sleep = 1000000 / samples_per_sec; unsigned long long last_samples_per_sec = samples_per_sec; unsigned short int max_lines; struct winsize ws; char clear_screen[] = {0x1b, '[', 'H', 0x1b, '[', 'J', 0x0}; int percent; int len; t1 = gettime(); ring_reset(&render_ring); ring_reset(&bsd_ring); ring_reset(&bsd6_ring); ring_reset(&blt_ring); for (i = 0; i < samples_per_sec; i++) { long long interval; ti = gettime(); if (IS_965(devid)) { instdone = INREG(INSTDONE_I965); instdone1 = INREG(INSTDONE_1); } else instdone = INREG(INSTDONE); for (j = 0; j < num_instdone_bits; j++) update_idle_bit(&top_bits[j]); ring_sample(&render_ring); ring_sample(&bsd_ring); ring_sample(&bsd6_ring); ring_sample(&blt_ring); tf = gettime(); if (tf - t1 >= 1000000) { /* We are out of sync, bail out */ last_samples_per_sec = i+1; break; } interval = def_sleep - (tf - ti); if (interval > 0) usleep(interval); } if (HAS_STATS_REGS(devid)) { for (i = 0; i < STATS_COUNT; i++) { uint32_t stats_high, stats_low, stats_high_2; do { stats_high = INREG(stats_regs[i] + 4); stats_low = INREG(stats_regs[i]); stats_high_2 = INREG(stats_regs[i] + 4); } while (stats_high != stats_high_2); stats[i] = (uint64_t)stats_high << 32 | stats_low; } } qsort(top_bits_sorted, num_instdone_bits, sizeof(struct top_bit *), top_bits_sort); /* Limit the number of lines printed to the terminal height so the * most important info (at the top) will stay on screen. */ max_lines = -1; if (ioctl(0, TIOCGWINSZ, &ws) != -1) max_lines = ws.ws_row - 6; /* exclude header lines */ if (max_lines >= num_instdone_bits) max_lines = num_instdone_bits; t2 = gettime(); elapsed_time += (t2 - t1) / 1000000.0; if (interactive) { printf("%s", clear_screen); print_clock_info(pci_dev); ring_print(&render_ring, last_samples_per_sec); ring_print(&bsd_ring, last_samples_per_sec); ring_print(&bsd6_ring, last_samples_per_sec); ring_print(&blt_ring, last_samples_per_sec); printf("\n%30s %s\n", "task", "percent busy"); for (i = 0; i < max_lines; i++) { if (top_bits_sorted[i]->count > 0) { percent = (top_bits_sorted[i]->count * 100) / last_samples_per_sec; len = printf("%30s: %3d%%: ", top_bits_sorted[i]->bit->name, percent); print_percentage_bar (percent, len); } else { printf("%*s", PERCENTAGE_BAR_END, ""); } if (i < STATS_COUNT && HAS_STATS_REGS(devid)) { printf("%13s: %llu (%lld/sec)", stats_reg_names[i], (long long)stats[i], (long long)(stats[i] - last_stats[i])); last_stats[i] = stats[i]; } else { if (!top_bits_sorted[i]->count) break; } printf("\n"); } } if (output) { /* Print headers for columns at first run */ if (print_headers) { fprintf(output, "# time\t"); ring_print_header(output, &render_ring); ring_print_header(output, &bsd_ring); ring_print_header(output, &bsd6_ring); ring_print_header(output, &blt_ring); for (i = 0; i < MAX_NUM_TOP_BITS; i++) { if (i < STATS_COUNT && HAS_STATS_REGS(devid)) { fprintf(output, "%.6s\t", stats_reg_names[i] ); } if (!top_bits[i].count) continue; } fprintf(output, "\n"); print_headers = 0; } /* Print statistics */ fprintf(output, "%.2f\t", elapsed_time); ring_log(&render_ring, last_samples_per_sec, output); ring_log(&bsd_ring, last_samples_per_sec, output); ring_log(&bsd6_ring, last_samples_per_sec, output); ring_log(&blt_ring, last_samples_per_sec, output); for (i = 0; i < MAX_NUM_TOP_BITS; i++) { if (i < STATS_COUNT && HAS_STATS_REGS(devid)) { fprintf(output, "%"PRIu64"\t", stats[i] - last_stats[i]); last_stats[i] = stats[i]; } if (!top_bits[i].count) continue; } fprintf(output, "\n"); fflush(output); } for (i = 0; i < num_instdone_bits; i++) { top_bits_sorted[i]->count = 0; if (i < STATS_COUNT) last_stats[i] = stats[i]; } /* Check if child has gone */ if (child_pid > 0) { int res; if ((res = waitpid(child_pid, &child_stat, WNOHANG)) == -1) { perror("waitpid"); exit(1); } if (res == 0) continue; if (WIFEXITED(child_stat)) break; } } fclose(output); intel_register_access_fini(); return 0; } intel-gpu-tools-1.14/tools/intel_l3_udev_listener.c0000644000175000017500000000674312665336131017407 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #if HAVE_UDEV #include #ifndef _GNU_SOURCE #define _GNU_SOURCE #endif #include #include #include #include #include #include #include "i915_drm.h" #include "intel_l3_parity.h" #ifndef I915_L3_PARITY_UEVENT #define I915_L3_PARITY_UEVENT "L3_PARITY_ERROR" #endif int l3_uevent_setup(struct l3_parity *par) { struct udev *udev; struct udev_monitor *uevent_monitor; fd_set fdset; int fd, ret = -1; udev = udev_new(); if (!udev) { return -1; } uevent_monitor = udev_monitor_new_from_netlink(udev, "udev"); if (!uevent_monitor) goto err_out; ret = udev_monitor_filter_add_match_subsystem_devtype(uevent_monitor, "drm", "drm_minor"); if (ret < 0) goto err_out; ret = udev_monitor_enable_receiving(uevent_monitor); if (ret < 0) goto err_out; fd = udev_monitor_get_fd(uevent_monitor); FD_ZERO(&fdset); FD_SET(fd, &fdset); par->udev = udev; par->fd = fd; par->fdset = fdset; par->uevent_monitor = uevent_monitor; return 0; err_out: udev_unref(udev); return ret; } int l3_listen(struct l3_parity *par, bool daemon, struct l3_location *loc) { struct udev_device *udev_dev; const char *parity_status; char *err_msg; int ret; again: ret = select(par->fd + 1, &par->fdset, NULL, NULL, NULL); /* Number of bits set is returned, must be >= 1 */ if (ret <= 0) { return ret; } assert(FD_ISSET(par->fd, &par->fdset)); udev_dev = udev_monitor_receive_device(par->uevent_monitor); if (!udev_dev) return -1; parity_status = udev_device_get_property_value(udev_dev, I915_L3_PARITY_UEVENT); if (strncmp(parity_status, "1", 1)) goto again; loc->slice = atoi(udev_device_get_property_value(udev_dev, "SLICE")); loc->row = atoi(udev_device_get_property_value(udev_dev, "ROW")); loc->bank = atoi(udev_device_get_property_value(udev_dev, "BANK")); loc->subbank = atoi(udev_device_get_property_value(udev_dev, "SUBBANK")); udev_device_unref(udev_dev); assert(asprintf(&err_msg, "Parity error detected on: %d,%d,%d,%d. " "Try to run intel_l3_parity -r %d -b %d -s %d -w %d -d", loc->slice, loc->row, loc->bank, loc->subbank, loc->row, loc->bank, loc->subbank, loc->slice) != -1); if (daemon) { syslog(LOG_INFO, "%s\n", err_msg); goto again; } fprintf(stderr, "%s\n", err_msg); free(err_msg); return 0; } #endif intel-gpu-tools-1.14/tools/intel_backlight.c0000644000175000017500000000365012665336131016063 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. * * Authors: * Chris Wilson * */ #include #include #include #include #include "intel_io.h" #include "intel_chipset.h" #include "intel_reg.h" /* XXX PCH only today */ int main(int argc, char** argv) { uint32_t current, max; intel_mmio_use_pci_bar(intel_get_pci_device()); current = INREG(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; max = INREG(BLC_PWM_PCH_CTL2) >> 16; printf ("current backlight value: %d%%\n", current * 100 / max); if (argc > 1) { uint32_t v = atoi (argv[1]) * max / 100; if (v > max) v = max; OUTREG(BLC_PWM_CPU_CTL, (INREG(BLC_PWM_CPU_CTL) &~ BACKLIGHT_DUTY_CYCLE_MASK) | v); (void) INREG(BLC_PWM_CPU_CTL); printf ("set backlight to %d%%\n", v * 100 / max); } return 0; } intel-gpu-tools-1.14/tools/intel_gpu_frequency.c0000644000175000017500000002166312665336131017013 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. * * Example: * Get all frequencies: * intel_gpu_frequency --get * * Same as above: * intel_gpu_frequency -g * * Lock the GPU frequency to 300MHz: * intel_gpu_frequency --set 300 * * Set the maximum frequency to 900MHz: * intel_gpu_frequency --custom max=900 * * Lock the GPU frequency to its maximum frequency: * intel_gpu_frequency --max * * Lock the GPU frequency to its most efficient frequency: * intel_gpu_frequency -e * * Lock The GPU frequency to its minimum frequency: * intel_gpu_frequency --min * * Reset the GPU to hardware defaults * intel_gpu_frequency -d */ #define _GNU_SOURCE #include #include #include #include #include #include "drmtest.h" #include "intel_chipset.h" #define VERSION "1.0" static int device, devid; enum { CUR=0, MIN, EFF, MAX, RP0, RPn }; struct freq_info { const char *name; const char *mode; FILE *filp; char *path; }; static struct freq_info info[] = { { "cur", "r" }, { "min", "rb+" }, { "RP1", "r" }, { "max", "rb+" }, { "RP0", "r" }, { "RPn", "r" } }; static char * get_sysfs_path(const char *which) { static const char fmt[] = "/sys/class/drm/card%1d/gt_%3s_freq_mhz"; char *path; int ret; #define STATIC_STRLEN(string) (sizeof(string) / sizeof(string [0])) ret = asprintf(&path, fmt, device, which); assert(ret == (STATIC_STRLEN(fmt) - 3)); #undef STATIC_STRLEN return path; } static void initialize_freq_info(struct freq_info *freq_info) { if (freq_info->filp) return; freq_info->path = get_sysfs_path(freq_info->name); assert(freq_info->path); freq_info->filp = fopen(freq_info->path, freq_info->mode); assert(freq_info->filp); } static void wait_freq_settle(void) { struct timespec ts; /* FIXME: Lazy sleep without check. */ ts.tv_sec = 0; ts.tv_nsec = 20000; clock_nanosleep(CLOCK_MONOTONIC, 0, &ts, NULL); } static void set_frequency(struct freq_info *freq_info, int val) { initialize_freq_info(freq_info); rewind(freq_info->filp); assert(fprintf(freq_info->filp, "%d", val) > 0); wait_freq_settle(); } static int get_frequency(struct freq_info *freq_info) { int val; initialize_freq_info(freq_info); rewind(freq_info->filp); assert(fscanf(freq_info->filp, "%d", &val)==1); return val; } static void __attribute__((noreturn)) usage(const char *prog) { printf("%s A program to manipulate Intel GPU frequencies.\n\n", prog); printf("Usage: %s [-e] [--min | --max] [-g (min|max|efficient)] [-s frequency_mhz]\n\n", prog); printf("Options: \n"); printf(" -e Lock frequency to the most efficient frequency\n"); printf(" -g, --get Get all the frequency settings\n"); printf(" -s, --set Lock frequency to an absolute value (MHz)\n"); printf(" -c, --custom Set a min, or max frequency \"min=X | max=Y\"\n"); printf(" -m --max Lock frequency to max frequency\n"); printf(" -i --min Lock frequency to min (never a good idea, DEBUG ONLY)\n"); printf(" -d --defaults Return the system to hardware defaults\n"); printf(" -h --help Returns this\n"); printf(" -v --version Version\n"); printf("\n"); printf("Examples:\n"); printf(" intel_gpu_frequency -gmin,cur\tGet the current and minimum frequency\n"); printf(" intel_gpu_frequency -s 400\tLock frequency to 400Mhz\n"); printf(" intel_gpu_frequency -c max=750\tSet the max frequency to 750MHz\n"); printf("\n"); printf("Report bugs to \n"); exit(EXIT_FAILURE); } static void version(const char *prog) { printf("%s: %s\n", prog, VERSION); printf("Copyright © 2015 Intel Corporation\n"); } /* Returns read or write operation */ static bool parse(int argc, char *argv[], bool *act_upon, size_t act_upon_n, int *new_freq) { int c, tmp; bool write = false; /* No args means -g" */ if (argc == 1) { for (c = 0; c < act_upon_n; c++) act_upon[c] = true; goto done; } while (1) { int option_index = 0; static struct option long_options[] = { { "get", no_argument, NULL, 'g' }, { "set", required_argument, NULL, 's' }, { "custom", required_argument, NULL, 'c'}, { "min", no_argument, NULL, 'i' }, { "max", no_argument, NULL, 'm' }, { "defaults", no_argument, NULL, 'd' }, { "help", no_argument, NULL, 'h' }, { "version", no_argument, NULL, 'v' }, { NULL, 0, NULL, 0} }; c = getopt_long(argc, argv, "egs:c:midh", long_options, &option_index); if (c == -1) break; switch (c) { case 'g': if (write == true) fprintf(stderr, "Read and write operations not support simultaneously.\n"); { int i; for (i = 0; i < act_upon_n; i++) act_upon[i] = true; } break; case 's': if (!optarg) usage(argv[0]); if (write == true) { fprintf(stderr, "Only one write may be specified at a time\n"); exit(EXIT_FAILURE); } write = true; act_upon[MIN] = true; act_upon[MAX] = true; sscanf(optarg, "%d", &new_freq[MAX]); new_freq[MIN] = new_freq[MAX]; break; case 'c': if (!optarg) usage(argv[0]); if (write == true) { fprintf(stderr, "Only one write may be specified at a time\n"); exit(EXIT_FAILURE); } write = true; if (!strncmp("min=", optarg, 4)) { act_upon[MIN] = true; sscanf(optarg+4, "%d", &new_freq[MIN]); } else if (!strncmp("max=", optarg, 4)) { act_upon[MAX] = true; sscanf(optarg+4, "%d", &new_freq[MAX]); } else { fprintf(stderr, "Selected unmodifiable frequency\n"); exit(EXIT_FAILURE); } break; case 'e': /* efficient */ if (IS_VALLEYVIEW(devid) || IS_CHERRYVIEW(devid)) { /* the LP parts have special efficient frequencies */ fprintf(stderr, "FIXME: Warning efficient frequency information is incorrect.\n"); exit(EXIT_FAILURE); } tmp = get_frequency(&info[EFF]); new_freq[MIN] = tmp; new_freq[MAX] = tmp; act_upon[MIN] = true; act_upon[MAX] = true; write = true; break; case 'i': /* mIn */ tmp = get_frequency(&info[RPn]); new_freq[MIN] = tmp; new_freq[MAX] = tmp; act_upon[MIN] = true; act_upon[MAX] = true; write = true; break; case 'm': /* max */ tmp = get_frequency(&info[RP0]); new_freq[MIN] = tmp; new_freq[MAX] = tmp; act_upon[MIN] = true; act_upon[MAX] = true; write = true; break; case 'd': /* defaults */ new_freq[MIN] = get_frequency(&info[RPn]); new_freq[MAX] = get_frequency(&info[RP0]); act_upon[MIN] = true; act_upon[MAX] = true; write = true; break; case 'v': version(argv[0]); exit(0); case 'h': default: usage(argv[0]); } } done: return write; } int main(int argc, char *argv[]) { bool write, fail, targets[MAX+1] = {false}; int i, try = 1, set_freq[MAX+1] = {0}; devid = intel_get_drm_devid(drm_open_driver(DRIVER_INTEL)); device = drm_get_card(); write = parse(argc, argv, targets, ARRAY_SIZE(targets), set_freq); fail = write; /* If we've previously locked the frequency, we need to make sure to set things * in the correct order, or else the operation will fail (ie. min = max = 200, * and we set min to 300, we fail because it would try to set min > * max). This can be accomplished be going either forward or reverse * through the loop. MIN is always before MAX. * * XXX: Since only min and max are at play, the super lazy way is to do this * 3 times and if we still fail after 3, it's for real. */ again: if (try > 2) { fprintf(stderr, "Did not achieve desired freq.\n"); exit(EXIT_FAILURE); } for (i = 0; i < ARRAY_SIZE(targets); i++) { if (targets[i] == false) continue; if (write) { set_frequency(&info[i], set_freq[i]); if (get_frequency(&info[i]) != set_freq[i]) fail = true; else fail = false; } else { printf("%s: %d MHz\n", info[i].name, get_frequency(&info[i])); } } if (fail) { try++; goto again; } for (i = 0; i < ARRAY_SIZE(targets); i++) { if (info[i].filp) { fclose(info[i].filp); free(info[i].path); } } return EXIT_SUCCESS; } intel-gpu-tools-1.14/tools/hsw_compute_wrpll.c0000644000175000017500000003730412665336131016520 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ #include #include #include #include #include "intel_io.h" #include "drmtest.h" #define LC_FREQ 2700 #define LC_FREQ_2K (LC_FREQ * 2000) #define P_MIN 2 #define P_MAX 64 #define P_INC 2 /* Constraints for PLL good behavior */ #define REF_MIN 48 #define REF_MAX 400 #define VCO_MIN 2400 #define VCO_MAX 4800 #define ABS_DIFF(a, b) ((a > b) ? (a - b) : (b - a)) struct wrpll_rnp { unsigned p, n2, r2; }; static unsigned wrpll_get_budget_for_freq(int clock) { unsigned budget; switch (clock) { case 25175000: case 25200000: case 27000000: case 27027000: case 37762500: case 37800000: case 40500000: case 40541000: case 54000000: case 54054000: case 59341000: case 59400000: case 72000000: case 74176000: case 74250000: case 81000000: case 81081000: case 89012000: case 89100000: case 108000000: case 108108000: case 111264000: case 111375000: case 148352000: case 148500000: case 162000000: case 162162000: case 222525000: case 222750000: case 296703000: case 297000000: budget = 0; break; case 233500000: case 245250000: case 247750000: case 253250000: case 298000000: budget = 1500; break; case 169128000: case 169500000: case 179500000: case 202000000: budget = 2000; break; case 256250000: case 262500000: case 270000000: case 272500000: case 273750000: case 280750000: case 281250000: case 286000000: case 291750000: budget = 4000; break; case 267250000: case 268500000: budget = 5000; break; default: budget = 1000; break; } return budget; } static void wrpll_update_rnp(uint64_t freq2k, unsigned budget, unsigned r2, unsigned n2, unsigned p, struct wrpll_rnp *best) { uint64_t a, b, c, d, diff, diff_best; /* No best (r,n,p) yet */ if (best->p == 0) { best->p = p; best->n2 = n2; best->r2 = r2; return; } /* * Output clock is (LC_FREQ_2K / 2000) * N / (P * R), which compares to * freq2k. * * delta = 1e6 * * abs(freq2k - (LC_FREQ_2K * n2/(p * r2))) / * freq2k; * * and we would like delta <= budget. * * If the discrepancy is above the PPM-based budget, always prefer to * improve upon the previous solution. However, if you're within the * budget, try to maximize Ref * VCO, that is N / (P * R^2). */ a = freq2k * budget * p * r2; b = freq2k * budget * best->p * best->r2; diff = ABS_DIFF((freq2k * p * r2), (LC_FREQ_2K * n2)); diff_best = ABS_DIFF((freq2k * best->p * best->r2), (LC_FREQ_2K * best->n2)); c = 1000000 * diff; d = 1000000 * diff_best; if (a < c && b < d) { /* If both are above the budget, pick the closer */ if (best->p * best->r2 * diff < p * r2 * diff_best) { best->p = p; best->n2 = n2; best->r2 = r2; } } else if (a >= c && b < d) { /* If A is below the threshold but B is above it? Update. */ best->p = p; best->n2 = n2; best->r2 = r2; } else if (a >= c && b >= d) { /* Both are below the limit, so pick the higher n2/(r2*r2) */ if (n2 * best->r2 * best->r2 > best->n2 * r2 * r2) { best->p = p; best->n2 = n2; best->r2 = r2; } } /* Otherwise a < c && b >= d, do nothing */ } static void wrpll_compute_rnp(int clock /* in Hz */, unsigned *r2_out, unsigned *n2_out, unsigned *p_out) { uint64_t freq2k; unsigned p, n2, r2; struct wrpll_rnp best = { 0, 0, 0 }; unsigned budget; freq2k = clock / 100; budget = wrpll_get_budget_for_freq(clock); /* Special case handling for 540 pixel clock: bypass WR PLL entirely * and directly pass the LC PLL to it. */ if (freq2k == 5400000) { *n2_out = 2; *p_out = 1; *r2_out = 2; return; } /* * Ref = LC_FREQ / R, where Ref is the actual reference input seen by * the WR PLL. * * We want R so that REF_MIN <= Ref <= REF_MAX. * Injecting R2 = 2 * R gives: * REF_MAX * r2 > LC_FREQ * 2 and * REF_MIN * r2 < LC_FREQ * 2 * * Which means the desired boundaries for r2 are: * LC_FREQ * 2 / REF_MAX < r2 < LC_FREQ * 2 / REF_MIN * */ for (r2 = LC_FREQ * 2 / REF_MAX + 1; r2 <= LC_FREQ * 2 / REF_MIN; r2++) { /* * VCO = N * Ref, that is: VCO = N * LC_FREQ / R * * Once again we want VCO_MIN <= VCO <= VCO_MAX. * Injecting R2 = 2 * R and N2 = 2 * N, we get: * VCO_MAX * r2 > n2 * LC_FREQ and * VCO_MIN * r2 < n2 * LC_FREQ) * * Which means the desired boundaries for n2 are: * VCO_MIN * r2 / LC_FREQ < n2 < VCO_MAX * r2 / LC_FREQ */ for (n2 = VCO_MIN * r2 / LC_FREQ + 1; n2 <= VCO_MAX * r2 / LC_FREQ; n2++) { for (p = P_MIN; p <= P_MAX; p += P_INC) wrpll_update_rnp(freq2k, budget, r2, n2, p, &best); } } *n2_out = best.n2; *p_out = best.p; *r2_out = best.r2; } /* WRPLL clock dividers */ struct wrpll_tmds_clock { uint32_t clock; uint16_t p; /* Post divider */ uint16_t n2; /* Feedback divider */ uint16_t r2; /* Reference divider */ }; /* Table of matching values for WRPLL clocks programming for each frequency. * The code assumes this table is sorted. */ static const struct wrpll_tmds_clock wrpll_tmds_clock_table[] = { {19750000, 38, 25, 18}, {20000000, 48, 32, 18}, {21000000, 36, 21, 15}, {21912000, 42, 29, 17}, {22000000, 36, 22, 15}, {23000000, 36, 23, 15}, {23500000, 40, 40, 23}, {23750000, 26, 16, 14}, {24000000, 36, 24, 15}, {25000000, 36, 25, 15}, {25175000, 26, 40, 33}, {25200000, 30, 21, 15}, {26000000, 36, 26, 15}, {27000000, 30, 21, 14}, {27027000, 18, 100, 111}, {27500000, 30, 29, 19}, {28000000, 34, 30, 17}, {28320000, 26, 30, 22}, {28322000, 32, 42, 25}, {28750000, 24, 23, 18}, {29000000, 30, 29, 18}, {29750000, 32, 30, 17}, {30000000, 30, 25, 15}, {30750000, 30, 41, 24}, {31000000, 30, 31, 18}, {31500000, 30, 28, 16}, {32000000, 30, 32, 18}, {32500000, 28, 32, 19}, {33000000, 24, 22, 15}, {34000000, 28, 30, 17}, {35000000, 26, 32, 19}, {35500000, 24, 30, 19}, {36000000, 26, 26, 15}, {36750000, 26, 46, 26}, {37000000, 24, 23, 14}, {37762500, 22, 40, 26}, {37800000, 20, 21, 15}, {38000000, 24, 27, 16}, {38250000, 24, 34, 20}, {39000000, 24, 26, 15}, {40000000, 24, 32, 18}, {40500000, 20, 21, 14}, {40541000, 22, 147, 89}, {40750000, 18, 19, 14}, {41000000, 16, 17, 14}, {41500000, 22, 44, 26}, {41540000, 22, 44, 26}, {42000000, 18, 21, 15}, {42500000, 22, 45, 26}, {43000000, 20, 43, 27}, {43163000, 20, 24, 15}, {44000000, 18, 22, 15}, {44900000, 20, 108, 65}, {45000000, 20, 25, 15}, {45250000, 20, 52, 31}, {46000000, 18, 23, 15}, {46750000, 20, 45, 26}, {47000000, 20, 40, 23}, {48000000, 18, 24, 15}, {49000000, 18, 49, 30}, {49500000, 16, 22, 15}, {50000000, 18, 25, 15}, {50500000, 18, 32, 19}, {51000000, 18, 34, 20}, {52000000, 18, 26, 15}, {52406000, 14, 34, 25}, {53000000, 16, 22, 14}, {54000000, 16, 24, 15}, {54054000, 16, 173, 108}, {54500000, 14, 24, 17}, {55000000, 12, 22, 18}, {56000000, 14, 45, 31}, {56250000, 16, 25, 15}, {56750000, 14, 25, 17}, {57000000, 16, 27, 16}, {58000000, 16, 43, 25}, {58250000, 16, 38, 22}, {58750000, 16, 40, 23}, {59000000, 14, 26, 17}, {59341000, 14, 40, 26}, {59400000, 16, 44, 25}, {60000000, 16, 32, 18}, {60500000, 12, 39, 29}, {61000000, 14, 49, 31}, {62000000, 14, 37, 23}, {62250000, 14, 42, 26}, {63000000, 12, 21, 15}, {63500000, 14, 28, 17}, {64000000, 12, 27, 19}, {65000000, 14, 32, 19}, {65250000, 12, 29, 20}, {65500000, 12, 32, 22}, {66000000, 12, 22, 15}, {66667000, 14, 38, 22}, {66750000, 10, 21, 17}, {67000000, 14, 33, 19}, {67750000, 14, 58, 33}, {68000000, 14, 30, 17}, {68179000, 14, 46, 26}, {68250000, 14, 46, 26}, {69000000, 12, 23, 15}, {70000000, 12, 28, 18}, {71000000, 12, 30, 19}, {72000000, 12, 24, 15}, {73000000, 10, 23, 17}, {74000000, 12, 23, 14}, {74176000, 8, 100, 91}, {74250000, 10, 22, 16}, {74481000, 12, 43, 26}, {74500000, 10, 29, 21}, {75000000, 12, 25, 15}, {75250000, 10, 39, 28}, {76000000, 12, 27, 16}, {77000000, 12, 53, 31}, {78000000, 12, 26, 15}, {78750000, 12, 28, 16}, {79000000, 10, 38, 26}, {79500000, 10, 28, 19}, {80000000, 12, 32, 18}, {81000000, 10, 21, 14}, {81081000, 6, 100, 111}, {81624000, 8, 29, 24}, {82000000, 8, 17, 14}, {83000000, 10, 40, 26}, {83950000, 10, 28, 18}, {84000000, 10, 28, 18}, {84750000, 6, 16, 17}, {85000000, 6, 17, 18}, {85250000, 10, 30, 19}, {85750000, 10, 27, 17}, {86000000, 10, 43, 27}, {87000000, 10, 29, 18}, {88000000, 10, 44, 27}, {88500000, 10, 41, 25}, {89000000, 10, 28, 17}, {89012000, 6, 90, 91}, {89100000, 10, 33, 20}, {90000000, 10, 25, 15}, {91000000, 10, 32, 19}, {92000000, 10, 46, 27}, {93000000, 10, 31, 18}, {94000000, 10, 40, 23}, {94500000, 10, 28, 16}, {95000000, 10, 44, 25}, {95654000, 10, 39, 22}, {95750000, 10, 39, 22}, {96000000, 10, 32, 18}, {97000000, 8, 23, 16}, {97750000, 8, 42, 29}, {98000000, 8, 45, 31}, {99000000, 8, 22, 15}, {99750000, 8, 34, 23}, {100000000, 6, 20, 18}, {100500000, 6, 19, 17}, {101000000, 6, 37, 33}, {101250000, 8, 21, 14}, {102000000, 6, 17, 15}, {102250000, 6, 25, 22}, {103000000, 8, 29, 19}, {104000000, 8, 37, 24}, {105000000, 8, 28, 18}, {106000000, 8, 22, 14}, {107000000, 8, 46, 29}, {107214000, 8, 27, 17}, {108000000, 8, 24, 15}, {108108000, 8, 173, 108}, {109000000, 6, 23, 19}, {110000000, 6, 22, 18}, {110013000, 6, 22, 18}, {110250000, 8, 49, 30}, {110500000, 8, 36, 22}, {111000000, 8, 23, 14}, {111264000, 8, 150, 91}, {111375000, 8, 33, 20}, {112000000, 8, 63, 38}, {112500000, 8, 25, 15}, {113100000, 8, 57, 34}, {113309000, 8, 42, 25}, {114000000, 8, 27, 16}, {115000000, 6, 23, 18}, {116000000, 8, 43, 25}, {117000000, 8, 26, 15}, {117500000, 8, 40, 23}, {118000000, 6, 38, 29}, {119000000, 8, 30, 17}, {119500000, 8, 46, 26}, {119651000, 8, 39, 22}, {120000000, 8, 32, 18}, {121000000, 6, 39, 29}, {121250000, 6, 31, 23}, {121750000, 6, 23, 17}, {122000000, 6, 42, 31}, {122614000, 6, 30, 22}, {123000000, 6, 41, 30}, {123379000, 6, 37, 27}, {124000000, 6, 51, 37}, {125000000, 6, 25, 18}, {125250000, 4, 13, 14}, {125750000, 4, 27, 29}, {126000000, 6, 21, 15}, {127000000, 6, 24, 17}, {127250000, 6, 41, 29}, {128000000, 6, 27, 19}, {129000000, 6, 43, 30}, {129859000, 4, 25, 26}, {130000000, 6, 26, 18}, {130250000, 6, 42, 29}, {131000000, 6, 32, 22}, {131500000, 6, 38, 26}, {131850000, 6, 41, 28}, {132000000, 6, 22, 15}, {132750000, 6, 28, 19}, {133000000, 6, 34, 23}, {133330000, 6, 37, 25}, {134000000, 6, 61, 41}, {135000000, 6, 21, 14}, {135250000, 6, 167, 111}, {136000000, 6, 62, 41}, {137000000, 6, 35, 23}, {138000000, 6, 23, 15}, {138500000, 6, 40, 26}, {138750000, 6, 37, 24}, {139000000, 6, 34, 22}, {139050000, 6, 34, 22}, {139054000, 6, 34, 22}, {140000000, 6, 28, 18}, {141000000, 6, 36, 23}, {141500000, 6, 22, 14}, {142000000, 6, 30, 19}, {143000000, 6, 27, 17}, {143472000, 4, 17, 16}, {144000000, 6, 24, 15}, {145000000, 6, 29, 18}, {146000000, 6, 47, 29}, {146250000, 6, 26, 16}, {147000000, 6, 49, 30}, {147891000, 6, 23, 14}, {148000000, 6, 23, 14}, {148250000, 6, 28, 17}, {148352000, 4, 100, 91}, {148500000, 6, 33, 20}, {149000000, 6, 48, 29}, {150000000, 6, 25, 15}, {151000000, 4, 19, 17}, {152000000, 6, 27, 16}, {152280000, 6, 44, 26}, {153000000, 6, 34, 20}, {154000000, 6, 53, 31}, {155000000, 6, 31, 18}, {155250000, 6, 50, 29}, {155750000, 6, 45, 26}, {156000000, 6, 26, 15}, {157000000, 6, 61, 35}, {157500000, 6, 28, 16}, {158000000, 6, 65, 37}, {158250000, 6, 44, 25}, {159000000, 6, 53, 30}, {159500000, 6, 39, 22}, {160000000, 6, 32, 18}, {161000000, 4, 31, 26}, {162000000, 4, 18, 15}, {162162000, 4, 131, 109}, {162500000, 4, 53, 44}, {163000000, 4, 29, 24}, {164000000, 4, 17, 14}, {165000000, 4, 22, 18}, {166000000, 4, 32, 26}, {167000000, 4, 26, 21}, {168000000, 4, 46, 37}, {169000000, 4, 104, 83}, {169128000, 4, 64, 51}, {169500000, 4, 39, 31}, {170000000, 4, 34, 27}, {171000000, 4, 19, 15}, {172000000, 4, 51, 40}, {172750000, 4, 32, 25}, {172800000, 4, 32, 25}, {173000000, 4, 41, 32}, {174000000, 4, 49, 38}, {174787000, 4, 22, 17}, {175000000, 4, 35, 27}, {176000000, 4, 30, 23}, {177000000, 4, 38, 29}, {178000000, 4, 29, 22}, {178500000, 4, 37, 28}, {179000000, 4, 53, 40}, {179500000, 4, 73, 55}, {180000000, 4, 20, 15}, {181000000, 4, 55, 41}, {182000000, 4, 31, 23}, {183000000, 4, 42, 31}, {184000000, 4, 30, 22}, {184750000, 4, 26, 19}, {185000000, 4, 37, 27}, {186000000, 4, 51, 37}, {187000000, 4, 36, 26}, {188000000, 4, 32, 23}, {189000000, 4, 21, 15}, {190000000, 4, 38, 27}, {190960000, 4, 41, 29}, {191000000, 4, 41, 29}, {192000000, 4, 27, 19}, {192250000, 4, 37, 26}, {193000000, 4, 20, 14}, {193250000, 4, 53, 37}, {194000000, 4, 23, 16}, {194208000, 4, 23, 16}, {195000000, 4, 26, 18}, {196000000, 4, 45, 31}, {197000000, 4, 35, 24}, {197750000, 4, 41, 28}, {198000000, 4, 22, 15}, {198500000, 4, 25, 17}, {199000000, 4, 28, 19}, {200000000, 4, 37, 25}, {201000000, 4, 61, 41}, {202000000, 4, 112, 75}, {202500000, 4, 21, 14}, {203000000, 4, 146, 97}, {204000000, 4, 62, 41}, {204750000, 4, 44, 29}, {205000000, 4, 38, 25}, {206000000, 4, 29, 19}, {207000000, 4, 23, 15}, {207500000, 4, 40, 26}, {208000000, 4, 37, 24}, {208900000, 4, 48, 31}, {209000000, 4, 48, 31}, {209250000, 4, 31, 20}, {210000000, 4, 28, 18}, {211000000, 4, 25, 16}, {212000000, 4, 22, 14}, {213000000, 4, 30, 19}, {213750000, 4, 38, 24}, {214000000, 4, 46, 29}, {214750000, 4, 35, 22}, {215000000, 4, 43, 27}, {216000000, 4, 24, 15}, {217000000, 4, 37, 23}, {218000000, 4, 42, 26}, {218250000, 4, 42, 26}, {218750000, 4, 34, 21}, {219000000, 4, 47, 29}, {220000000, 4, 44, 27}, {220640000, 4, 49, 30}, {220750000, 4, 36, 22}, {221000000, 4, 36, 22}, {222000000, 4, 23, 14}, {222525000, 4, 150, 91}, {222750000, 4, 33, 20}, {227000000, 4, 37, 22}, {230250000, 4, 29, 17}, {233500000, 4, 38, 22}, {235000000, 4, 40, 23}, {238000000, 4, 30, 17}, {241500000, 2, 17, 19}, {245250000, 2, 20, 22}, {247750000, 2, 22, 24}, {253250000, 2, 15, 16}, {256250000, 2, 18, 19}, {262500000, 2, 31, 32}, {267250000, 2, 66, 67}, {268500000, 2, 94, 95}, {270000000, 2, 14, 14}, {272500000, 2, 77, 76}, {273750000, 2, 57, 56}, {280750000, 2, 24, 23}, {281250000, 2, 23, 22}, {286000000, 2, 17, 16}, {291750000, 2, 26, 24}, {296703000, 2, 100, 91}, {297000000, 2, 22, 20}, {298000000, 2, 21, 19}, }; int main(void) { int i; for (i = 0; i < ARRAY_SIZE(wrpll_tmds_clock_table); i++) { const struct wrpll_tmds_clock *ref = &wrpll_tmds_clock_table[i]; unsigned r2, n2, p; wrpll_compute_rnp(ref->clock, &r2, &n2, &p); igt_fail_on_f(ref->r2 != r2 || ref->n2 != n2 || ref->p != p, "Computed value differs for %"PRId64" Hz:\n"" Reference: (%u,%u,%u)\n"" Computed: (%u,%u,%u)\n", (int64_t)ref->clock * 1000, ref->r2, ref->n2, ref->p, r2, n2, p); } return 0; } intel-gpu-tools-1.14/tools/aubdump.c0000644000175000017500000003423712665336131014402 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ #define _GNU_SOURCE /* for RTLD_NEXT */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "intel_aub.h" #include "intel_chipset.h" static int close_init_helper(int fd); static int ioctl_init_helper(int fd, unsigned long request, ...); static int (*libc_close)(int fd) = close_init_helper; static int (*libc_ioctl)(int fd, unsigned long request, ...) = ioctl_init_helper; static int drm_fd = -1; static char *filename; static FILE *file; static int gen = 0; static int verbose = 0; static const uint32_t gtt_size = 0x10000; static bool device_override; static uint32_t device; #define MAX_BO_COUNT 64 * 1024 struct bo { uint32_t size; uint64_t offset; void *map; }; static struct bo *bos; #define DRM_MAJOR 226 #ifndef DRM_I915_GEM_USERPTR #define DRM_I915_GEM_USERPTR 0x33 #define DRM_IOCTL_I915_GEM_USERPTR DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_USERPTR, struct drm_i915_gem_userptr) struct drm_i915_gem_userptr { __u64 user_ptr; __u64 user_size; __u32 flags; #define I915_USERPTR_READ_ONLY 0x1 #define I915_USERPTR_UNSYNCHRONIZED 0x80000000 /** * Returned handle for the object. * * Object handles are nonzero. */ __u32 handle; }; #endif /* We set bit 0 in the map pointer for userptr BOs so we know not to * munmap them on DRM_IOCTL_GEM_CLOSE. */ #define USERPTR_FLAG 1 #define IS_USERPTR(p) ((uintptr_t) (p) & USERPTR_FLAG) #define GET_PTR(p) ( (void *) ((uintptr_t) p & ~(uintptr_t) 1) ) static void __attribute__ ((format(__printf__, 2, 3))) fail_if(int cond, const char *format, ...) { va_list args; if (!cond) return; va_start(args, format); vfprintf(stderr, format, args); va_end(args); raise(SIGTRAP); } static struct bo * get_bo(uint32_t handle) { struct bo *bo; fail_if(handle >= MAX_BO_COUNT, "bo handle too large\n"); bo = &bos[handle]; fail_if(bo->size == 0, "invalid bo handle (%d) in execbuf\n", handle); return bo; } static inline uint32_t align_u32(uint32_t v, uint32_t a) { return (v + a - 1) & ~(a - 1); } static inline uint64_t align_u64(uint64_t v, uint64_t a) { return (v + a - 1) & ~(a - 1); } static void dword_out(uint32_t data) { fwrite(&data, 1, 4, file); } static void data_out(const void *data, size_t size) { fwrite(data, 1, size, file); } static void write_header(void) { uint32_t entry = 0x200003; /* Start with a (required) version packet. */ dword_out(CMD_AUB_HEADER | (13 - 2)); dword_out((4 << AUB_HEADER_MAJOR_SHIFT) | (0 << AUB_HEADER_MINOR_SHIFT)); for (int i = 0; i < 8; i++) dword_out(0); /* app name */ dword_out(0); /* timestamp */ dword_out(0); /* timestamp */ dword_out(0); /* comment len */ /* Set up the GTT. The max we can handle is 256M */ dword_out(CMD_AUB_TRACE_HEADER_BLOCK | ((gen >= 8 ? 6 : 5) - 2)); dword_out(AUB_TRACE_MEMTYPE_GTT_ENTRY | AUB_TRACE_TYPE_NOTYPE | AUB_TRACE_OP_DATA_WRITE); dword_out(0); /* subtype */ dword_out(0); /* offset */ dword_out(gtt_size); /* size */ if (gen >= 8) dword_out(0); for (uint32_t i = 0; i < gtt_size; i += 4, entry += 0x1000) dword_out(entry); } /** * Break up large objects into multiple writes. Otherwise a 128kb VBO * would overflow the 16 bits of size field in the packet header and * everything goes badly after that. */ static void aub_write_trace_block(uint32_t type, void *virtual, uint32_t size, uint64_t gtt_offset) { uint32_t block_size; uint32_t subtype = 0; static const char null_block[8 * 4096]; for (uint32_t offset = 0; offset < size; offset += block_size) { block_size = size - offset; if (block_size > 8 * 4096) block_size = 8 * 4096; dword_out(CMD_AUB_TRACE_HEADER_BLOCK | ((gen >= 8 ? 6 : 5) - 2)); dword_out(AUB_TRACE_MEMTYPE_GTT | type | AUB_TRACE_OP_DATA_WRITE); dword_out(subtype); dword_out(gtt_offset + offset); dword_out(align_u32(block_size, 4)); if (gen >= 8) dword_out((gtt_offset + offset) >> 32); if (virtual) data_out(((char *) GET_PTR(virtual)) + offset, block_size); else data_out(null_block, block_size); /* Pad to a multiple of 4 bytes. */ data_out(null_block, -block_size & 3); } } static void aub_dump_ringbuffer(uint64_t batch_offset, uint64_t offset, int ring_flag) { uint32_t ringbuffer[4096]; int ring = AUB_TRACE_TYPE_RING_PRB0; /* The default ring */ int ring_count = 0; if (ring_flag == I915_EXEC_BSD) ring = AUB_TRACE_TYPE_RING_PRB1; else if (ring_flag == I915_EXEC_BLT) ring = AUB_TRACE_TYPE_RING_PRB2; /* Make a ring buffer to execute our batchbuffer. */ memset(ringbuffer, 0, sizeof(ringbuffer)); if (gen >= 8) { ringbuffer[ring_count++] = AUB_MI_BATCH_BUFFER_START | (3 - 2); ringbuffer[ring_count++] = batch_offset; ringbuffer[ring_count++] = batch_offset >> 32; } else { ringbuffer[ring_count++] = AUB_MI_BATCH_BUFFER_START; ringbuffer[ring_count++] = batch_offset; } /* Write out the ring. This appears to trigger execution of * the ring in the simulator. */ dword_out(CMD_AUB_TRACE_HEADER_BLOCK | ((gen >= 8 ? 6 : 5) - 2)); dword_out(AUB_TRACE_MEMTYPE_GTT | ring | AUB_TRACE_OP_COMMAND_WRITE); dword_out(0); /* general/surface subtype */ dword_out(offset); dword_out(ring_count * 4); if (gen >= 8) dword_out(offset >> 32); data_out(ringbuffer, ring_count * 4); } static void * relocate_bo(struct bo *bo, const struct drm_i915_gem_execbuffer2 *execbuffer2, const struct drm_i915_gem_exec_object2 *obj) { const struct drm_i915_gem_exec_object2 *exec_objects = (struct drm_i915_gem_exec_object2 *) (uintptr_t) execbuffer2->buffers_ptr; const struct drm_i915_gem_relocation_entry *relocs = (const struct drm_i915_gem_relocation_entry *) (uintptr_t) obj->relocs_ptr; void *relocated; uint32_t *dw; int handle; relocated = malloc(bo->size); fail_if(relocated == NULL, "intel_aubdump: out of memory\n"); memcpy(relocated, GET_PTR(bo->map), bo->size); for (size_t i = 0; i < obj->relocation_count; i++) { fail_if(relocs[i].offset >= bo->size, "intel_aubdump: reloc outside bo\n"); if (execbuffer2->flags & I915_EXEC_HANDLE_LUT) handle = exec_objects[relocs[i].target_handle].handle; else handle = relocs[i].target_handle; dw = (uint32_t*)(((char *) relocated) + relocs[i].offset); *dw = get_bo(handle)->offset + relocs[i].delta; } return relocated; } static int gem_ioctl(int fd, unsigned long request, void *argp) { int ret; do { ret = libc_ioctl(fd, request, argp); } while (ret == -1 && (errno == EINTR || errno == EAGAIN)); return ret; } static void * gem_mmap(int fd, uint32_t handle, uint64_t offset, uint64_t size) { struct drm_i915_gem_mmap mmap = { .handle = handle, .offset = offset, .size = size }; if (gem_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &mmap) == -1) return MAP_FAILED; return (void *)(uintptr_t) mmap.addr_ptr; } static int gem_get_param(int fd, uint32_t param) { int value; drm_i915_getparam_t gp = { .param = param, .value = &value }; if (gem_ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp) == -1) return 0; return value; } static void dump_execbuffer2(int fd, struct drm_i915_gem_execbuffer2 *execbuffer2) { struct drm_i915_gem_exec_object2 *exec_objects = (struct drm_i915_gem_exec_object2 *) (uintptr_t) execbuffer2->buffers_ptr; uint32_t ring_flag = execbuffer2->flags & I915_EXEC_RING_MASK; uint32_t offset = gtt_size; struct drm_i915_gem_exec_object2 *obj; struct bo *bo, *batch_bo; void *data; /* We can't do this at open time as we're not yet authenticated. */ if (device == 0) { device = gem_get_param(fd, I915_PARAM_CHIPSET_ID); fail_if(device == 0 || gen == -1, "failed to identify chipset\n"); } if (gen == 0) { gen = intel_gen(device); write_header(); if (verbose) printf("[intel_aubdump: running, " "output file %s, chipset id 0x%04x, gen %d]\n", filename, device, gen); } for (uint32_t i = 0; i < execbuffer2->buffer_count; i++) { obj = &exec_objects[i]; bo = get_bo(obj->handle); bo->offset = offset; offset = align_u32(offset + bo->size + 4095, 4096); if (bo->map == NULL) bo->map = gem_mmap(fd, obj->handle, 0, bo->size); fail_if(bo->map == MAP_FAILED, "intel_aubdump: bo mmap failed\n"); } batch_bo = get_bo(exec_objects[execbuffer2->buffer_count - 1].handle); for (uint32_t i = 0; i < execbuffer2->buffer_count; i++) { obj = &exec_objects[i]; bo = get_bo(obj->handle); if (obj->relocation_count > 0) data = relocate_bo(bo, execbuffer2, obj); else data = bo->map; if (bo == batch_bo) { aub_write_trace_block(AUB_TRACE_TYPE_BATCH, data, bo->size, bo->offset); } else { aub_write_trace_block(AUB_TRACE_TYPE_NOTYPE, data, bo->size, bo->offset); } if (data != bo->map) free(data); } /* Dump ring buffer */ aub_dump_ringbuffer(batch_bo->offset + execbuffer2->batch_start_offset, offset, ring_flag); fflush(file); } static void add_new_bo(int handle, uint64_t size, void *map) { struct bo *bo = &bos[handle]; fail_if(handle >= MAX_BO_COUNT, "intel_aubdump: bo handle out of range\n"); bo->size = size; bo->map = map; } static void remove_bo(int handle) { struct bo *bo = get_bo(handle); if (bo->map && !IS_USERPTR(bo->map)) munmap(bo->map, bo->size); bo->map = NULL; } int close(int fd) { if (fd == drm_fd) drm_fd = -1; return libc_close(fd); } int ioctl(int fd, unsigned long request, ...) { va_list args; void *argp; int ret; struct stat buf; va_start(args, request); argp = va_arg(args, void *); va_end(args); if (_IOC_TYPE(request) == DRM_IOCTL_BASE && drm_fd != fd && fstat(fd, &buf) == 0 && (buf.st_mode & S_IFMT) == S_IFCHR && major(buf.st_rdev) == DRM_MAJOR) { drm_fd = fd; if (verbose) printf("[intel_aubdump: intercept drm ioctl on fd %d]\n", fd); } if (fd == drm_fd) { switch (request) { case DRM_IOCTL_I915_GETPARAM: { struct drm_i915_getparam *getparam = argp; if (device_override && getparam->param == I915_PARAM_CHIPSET_ID) { *getparam->value = device; return 0; } ret = libc_ioctl(fd, request, argp); /* If the application looks up chipset_id * (they typically do), we'll piggy-back on * their ioctl and store the id for later * use. */ if (getparam->param == I915_PARAM_CHIPSET_ID) device = *getparam->value; return ret; } case DRM_IOCTL_I915_GEM_EXECBUFFER: { static bool once; if (!once) { fprintf(stderr, "intel_aubdump: " "application uses DRM_IOCTL_I915_GEM_EXECBUFFER, not handled\n"); once = true; } return libc_ioctl(fd, request, argp); } case DRM_IOCTL_I915_GEM_EXECBUFFER2: { dump_execbuffer2(fd, argp); if (device_override) return 0; return libc_ioctl(fd, request, argp); } case DRM_IOCTL_I915_GEM_CREATE: { struct drm_i915_gem_create *create = argp; ret = libc_ioctl(fd, request, argp); if (ret == 0) add_new_bo(create->handle, create->size, NULL); return ret; } case DRM_IOCTL_I915_GEM_USERPTR: { struct drm_i915_gem_userptr *userptr = argp; ret = libc_ioctl(fd, request, argp); if (ret == 0) add_new_bo(userptr->handle, userptr->user_size, (void *) (uintptr_t) (userptr->user_ptr | USERPTR_FLAG)); return ret; } case DRM_IOCTL_GEM_CLOSE: { struct drm_gem_close *close = argp; remove_bo(close->handle); return libc_ioctl(fd, request, argp); } case DRM_IOCTL_GEM_OPEN: { struct drm_gem_open *open = argp; ret = libc_ioctl(fd, request, argp); if (ret == 0) add_new_bo(open->handle, open->size, NULL); return ret; } case DRM_IOCTL_PRIME_FD_TO_HANDLE: { struct drm_prime_handle *prime = argp; ret = libc_ioctl(fd, request, argp); if (ret == 0) { off_t size; size = lseek(prime->fd, 0, SEEK_END); fail_if(size == -1, "intel_aubdump: failed to get prime bo size\n"); add_new_bo(prime->handle, size, NULL); } return ret; } default: return libc_ioctl(fd, request, argp); } } else { return libc_ioctl(fd, request, argp); } } static void init(void) { const char *args = getenv("INTEL_AUBDUMP_ARGS"); libc_close = dlsym(RTLD_NEXT, "close"); libc_ioctl = dlsym(RTLD_NEXT, "ioctl"); fail_if(libc_close == NULL || libc_ioctl == NULL, "intel_aubdump: failed to get libc ioctl or close\n"); if (sscanf(args, "verbose=%d;file=%m[^;];device=%i", &verbose, &filename, &device) != 3) filename = strdup("intel.aub"); fail_if(filename == NULL, "intel_aubdump: out of memory\n"); if (device) device_override = true; bos = malloc(MAX_BO_COUNT * sizeof(bos[0])); fail_if(bos == NULL, "intel_aubdump: out of memory\n"); file = fopen(filename, "w+"); fail_if(file == NULL, "intel_aubdump: failed to open file '%s'\n", filename); } static int close_init_helper(int fd) { init(); return libc_close(fd); } static int ioctl_init_helper(int fd, unsigned long request, ...) { va_list args; void *argp; va_start(args, request); argp = va_arg(args, void *); va_end(args); init(); return libc_ioctl(fd, request, argp); } static void __attribute__ ((destructor)) fini(void) { free(filename); fclose(file); free(bos); } intel-gpu-tools-1.14/tools/skl_ddb_allocation.c0000644000175000017500000002517512665336131016555 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ #include #include #include #include #include /** * container_of - cast a member of a structure out to the containing structure * @ptr: the pointer to the member. * @type: the type of the container struct this is embedded in. * @member: the name of the member within the struct. * */ #define container_of(ptr, type, member) ({ \ typeof( ((type *)0)->member ) *__mptr = (ptr); \ (type *)( (char *)__mptr - offsetof(type,member) );}) #define div_u64(a, b) ((a) / (b)) /* * Stub a few defines/structures */ #define I915_MAX_PIPES 3 #define I915_MAX_PLANES 3 #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0])) #define for_each_pipe(p) for ((p) = 0; (p) < 3; (p)++) #define for_each_plane(pipe, p) for ((p) = 0; (p) < 3; (p)++) #define for_each_crtc(dev, crtc) \ for (int i = 0; i < 3 && (crtc = &crtcs[i].base); i++) #define for_each_intel_crtc(dev, intel_crtc) \ for (int i = 0; i < 3, intel_crtc = &crtcs[i]; i++) enum pipe { PIPE_A, PIPE_B, PIPE_C, }; enum plane { PLANE_1, PLANE_2, PLANE_3, }; #define pipe_name(p) ((p) + 'A') struct drm_device { void *dev_private; }; struct drm_i915_private { struct drm_device *dev; }; struct drm_crtc { struct drm_device *dev; bool active; }; static bool intel_crtc_active(struct drm_crtc *crtc) { return crtc->active; } struct intel_crtc { struct drm_crtc base; enum pipe pipe; }; static int intel_num_planes(struct intel_crtc *crtc) { return 3; } struct intel_crtc crtcs[I915_MAX_PIPES]; #define to_intel_crtc(x) container_of(x, struct intel_crtc, base) /* * DDB code */ struct intel_wm_config { unsigned int num_pipes_active; }; struct intel_plane_wm_parameters { uint32_t horiz_pixels; uint32_t vert_pixels; uint8_t bytes_per_pixel; bool enabled; bool scaled; }; struct skl_pipe_wm_parameters { bool active; uint32_t pipe_htotal; uint32_t pixel_rate; /* in KHz */ struct intel_plane_wm_parameters plane[I915_MAX_PLANES]; struct intel_plane_wm_parameters cursor; }; struct skl_ddb_entry { uint16_t start, end; /* in number of blocks. 'end' is exclusive */ }; static inline uint16_t skl_ddb_entry_size(const struct skl_ddb_entry *entry) { /* end not set, clearly no allocation here. start can be 0 though */ if (entry->end == 0) return 0; return entry->end - entry->start; } static inline bool skl_ddb_entry_equal(const struct skl_ddb_entry *e1, const struct skl_ddb_entry *e2) { if (e1->start == e2->start && e1->end == e2->end) return true; return false; } struct skl_ddb_allocation { struct skl_ddb_entry plane[I915_MAX_PIPES][I915_MAX_PLANES]; struct skl_ddb_entry cursor[I915_MAX_PIPES]; }; /* * On gen9, we need to allocate Display Data Buffer (DDB) portions to the * different active planes. */ #define SKL_DDB_SIZE 896 /* in blocks */ static void skl_ddb_get_pipe_allocation_limits(struct drm_device *dev, struct drm_crtc *for_crtc, const struct intel_wm_config *config, const struct skl_pipe_wm_parameters *params, struct skl_ddb_entry *alloc /* out */) { struct drm_crtc *crtc; unsigned int pipe_size, ddb_size; int nth_active_pipe; if (!params->active) { alloc->start = 0; alloc->end = 0; return; } ddb_size = SKL_DDB_SIZE; ddb_size -= 4; /* 4 blocks for bypass path allocation */ nth_active_pipe = 0; for_each_crtc(dev, crtc) { if (!intel_crtc_active(crtc)) continue; if (crtc == for_crtc) break; nth_active_pipe++; } pipe_size = ddb_size / config->num_pipes_active; alloc->start = nth_active_pipe * ddb_size / config->num_pipes_active; alloc->end = alloc->start + pipe_size; } static unsigned int skl_cursor_allocation(const struct intel_wm_config *config) { if (config->num_pipes_active == 1) return 32; return 8; } static unsigned int skl_plane_relative_data_rate(const struct intel_plane_wm_parameters *p) { return p->horiz_pixels * p->vert_pixels * p->bytes_per_pixel; } /* * We don't overflow 32 bits. Worst case is 3 planes enabled, each fetching * a 8192x4096@32bpp framebuffer: * 3 * 4096 * 8192 * 4 < 2^32 */ static unsigned int skl_get_total_relative_data_rate(struct intel_crtc *intel_crtc, const struct skl_pipe_wm_parameters *params) { unsigned int total_data_rate = 0; int plane; for (plane = 0; plane < intel_num_planes(intel_crtc); plane++) { const struct intel_plane_wm_parameters *p; p = ¶ms->plane[plane]; if (!p->enabled) continue; total_data_rate += skl_plane_relative_data_rate(p); } return total_data_rate; } static void skl_allocate_pipe_ddb(struct drm_crtc *crtc, const struct intel_wm_config *config, const struct skl_pipe_wm_parameters *params, struct skl_ddb_allocation *ddb /* out */) { struct drm_device *dev = crtc->dev; struct intel_crtc *intel_crtc = to_intel_crtc(crtc); enum pipe pipe = intel_crtc->pipe; struct skl_ddb_entry alloc; uint16_t alloc_size, start, cursor_blocks; uint16_t minimum[I915_MAX_PLANES]; unsigned int total_data_rate; int plane; skl_ddb_get_pipe_allocation_limits(dev, crtc, config, params, &alloc); alloc_size = skl_ddb_entry_size(&alloc); if (alloc_size == 0) { memset(ddb->plane[pipe], 0, sizeof(ddb->plane[pipe])); memset(&ddb->cursor[pipe], 0, sizeof(ddb->cursor[pipe])); return; } cursor_blocks = skl_cursor_allocation(config); ddb->cursor[pipe].start = alloc.end - cursor_blocks; ddb->cursor[pipe].end = alloc.end; alloc_size -= cursor_blocks; alloc.end -= cursor_blocks; /* 1. Allocate the mininum required blocks for each active plane */ for_each_plane(pipe, plane) { const struct intel_plane_wm_parameters *p; p = ¶ms->plane[plane]; if (!p->enabled) continue; minimum[plane] = 8; alloc_size -= minimum[plane]; } /* * 2. Distribute the remaining space in proportion to the amount of * data each plane needs to fetch from memory. * * FIXME: we may not allocate every single block here. */ total_data_rate = skl_get_total_relative_data_rate(intel_crtc, params); start = alloc.start; for (plane = 0; plane < intel_num_planes(intel_crtc); plane++) { const struct intel_plane_wm_parameters *p; unsigned int data_rate; uint16_t plane_blocks; p = ¶ms->plane[plane]; if (!p->enabled) continue; data_rate = skl_plane_relative_data_rate(p); /* * promote the expression to 64 bits to avoid overflowing, the * result is < available as data_rate / total_data_rate < 1 */ plane_blocks = minimum[plane]; plane_blocks += div_u64((uint64_t)alloc_size * data_rate, total_data_rate); ddb->plane[pipe][plane].start = start; ddb->plane[pipe][plane].end = start + plane_blocks; start += plane_blocks; } } static void skl_ddb_check_entry(struct skl_ddb_entry *entry, int16_t *cursor) { if (skl_ddb_entry_size(entry) == 0) return; /* check that ->start is the next available block */ if (entry->start < *cursor) printf("error: allocation overlaps previous block\n"); else if (entry->start >= *cursor + 1) printf("warning: allocation leaves a hole\n"); *cursor = entry->end; } static void skl_ddb_check_last_allocation(int16_t cursor) { uint16_t last_offset = SKL_DDB_SIZE - 4; if (cursor < last_offset) printf("warning: %d blocks not allocated\n", last_offset - cursor); else if (cursor > last_offset) printf("error: allocation greater than available space\n"); } static void skl_ddb_print(struct skl_ddb_allocation *ddb) { struct skl_ddb_entry *entry; enum pipe pipe; int plane; int16_t cursor = 0; printf("%-15s%8s%8s%8s\n", "", "Start", "End", "Size"); for_each_pipe(pipe) { printf("Pipe %c\n", pipe_name(pipe)); for_each_plane(pipe, plane) { entry = &ddb->plane[pipe][plane]; printf(" Plane%-8d%8u%8u%8u\n", plane + 1, entry->start, entry->end, skl_ddb_entry_size(entry)); skl_ddb_check_entry(entry, &cursor); } entry = &ddb->cursor[pipe]; printf(" %-13s%8u%8u%8u\n", "Cursor", entry->start, entry->end, skl_ddb_entry_size(entry)); skl_ddb_check_entry(entry, &cursor); } skl_ddb_check_last_allocation(cursor); } static struct drm_device drm_device; static struct drm_i915_private drm_i915_private; static void init_stub(void) { int i; drm_device.dev_private = &drm_i915_private; drm_i915_private.dev = &drm_device; for (i = 0; i < I915_MAX_PIPES; i++) { crtcs[i].base.dev = &drm_device; crtcs[i].pipe = i; } } struct wm_input { struct intel_wm_config config; struct skl_pipe_wm_parameters params[I915_MAX_PIPES]; }; static void wm_input_reset(struct wm_input *in) { memset(in, 0, sizeof(*in)); } static void wm_enable_plane(struct wm_input *in, enum pipe pipe, enum plane plane, uint32_t width, uint32_t height, int bpp) { enum pipe i; in->params[pipe].active = 1; in->config.num_pipes_active = 0; for_each_pipe(i) if (in->params[i].active) in->config.num_pipes_active++; in->params[pipe].plane[plane].horiz_pixels = width; in->params[pipe].plane[plane].vert_pixels = height; in->params[pipe].plane[plane].bytes_per_pixel = bpp; in->params[pipe].plane[plane].enabled = true; } static void skl_ddb_allocate(struct wm_input *in, struct skl_ddb_allocation *out) { struct drm_crtc *crtc; for_each_crtc(, crtc) { enum pipe pipe = to_intel_crtc(crtc)->pipe; skl_allocate_pipe_ddb(crtc, &in->config, &in->params[pipe], out); } } int main(int argc, char **argv) { struct wm_input in; static struct skl_ddb_allocation ddb; init_stub(); wm_input_reset(&in); wm_enable_plane(&in, PIPE_A, PLANE_1, 1280, 1024, 4); wm_enable_plane(&in, PIPE_A, PLANE_2, 100, 100, 4); skl_ddb_allocate(&in, &ddb); skl_ddb_print(&ddb); return 0; } intel-gpu-tools-1.14/tools/intel_aub.h0000644000175000017500000001345512665336131014713 00000000000000/* * Copyright © 2010 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * */ /** @file intel_aub.h * * The AUB file is a file format used by Intel's internal simulation * and other validation tools. It can be used at various levels by a * driver to input state to the simulated hardware or a replaying * debugger. * * We choose to dump AUB files using the trace block format for ease * of implementation -- dump out the blocks of memory as plain blobs * and insert ring commands to execute the batchbuffer blob. */ #ifndef _INTEL_AUB_H #define _INTEL_AUB_H #define AUB_MI_NOOP (0) #define AUB_MI_BATCH_BUFFER_START (0x31 << 23) #define AUB_PIPE_CONTROL (0x7a000002) /* DW0: instruction type. */ #define CMD_AUB (7 << 29) #define CMD_AUB_HEADER (CMD_AUB | (1 << 23) | (0x05 << 16)) /* DW1 */ # define AUB_HEADER_MAJOR_SHIFT 24 # define AUB_HEADER_MINOR_SHIFT 16 #define CMD_AUB_TRACE_HEADER_BLOCK (CMD_AUB | (1 << 23) | (0x41 << 16)) #define CMD_AUB_DUMP_BMP (CMD_AUB | (1 << 23) | (0x9e << 16)) /* DW1 */ #define AUB_TRACE_OPERATION_MASK 0x000000ff #define AUB_TRACE_OP_COMMENT 0x00000000 #define AUB_TRACE_OP_DATA_WRITE 0x00000001 #define AUB_TRACE_OP_COMMAND_WRITE 0x00000002 #define AUB_TRACE_OP_MMIO_WRITE 0x00000003 // operation = TRACE_DATA_WRITE, Type #define AUB_TRACE_TYPE_MASK 0x0000ff00 #define AUB_TRACE_TYPE_NOTYPE (0 << 8) #define AUB_TRACE_TYPE_BATCH (1 << 8) #define AUB_TRACE_TYPE_VERTEX_BUFFER (5 << 8) #define AUB_TRACE_TYPE_2D_MAP (6 << 8) #define AUB_TRACE_TYPE_CUBE_MAP (7 << 8) #define AUB_TRACE_TYPE_VOLUME_MAP (9 << 8) #define AUB_TRACE_TYPE_1D_MAP (10 << 8) #define AUB_TRACE_TYPE_CONSTANT_BUFFER (11 << 8) #define AUB_TRACE_TYPE_CONSTANT_URB (12 << 8) #define AUB_TRACE_TYPE_INDEX_BUFFER (13 << 8) #define AUB_TRACE_TYPE_GENERAL (14 << 8) #define AUB_TRACE_TYPE_SURFACE (15 << 8) // operation = TRACE_COMMAND_WRITE, Type = #define AUB_TRACE_TYPE_RING_HWB (1 << 8) #define AUB_TRACE_TYPE_RING_PRB0 (2 << 8) #define AUB_TRACE_TYPE_RING_PRB1 (3 << 8) #define AUB_TRACE_TYPE_RING_PRB2 (4 << 8) // Address space #define AUB_TRACE_ADDRESS_SPACE_MASK 0x00ff0000 #define AUB_TRACE_MEMTYPE_GTT (0 << 16) #define AUB_TRACE_MEMTYPE_LOCAL (1 << 16) #define AUB_TRACE_MEMTYPE_NONLOCAL (2 << 16) #define AUB_TRACE_MEMTYPE_PCI (3 << 16) #define AUB_TRACE_MEMTYPE_GTT_ENTRY (4 << 16) /* DW2 */ /** * aub_state_struct_type enum values are encoded with the top 16 bits * representing the type to be delivered to the .aub file, and the bottom 16 * bits representing the subtype. This macro performs the encoding. */ #define ENCODE_SS_TYPE(type, subtype) (((type) << 16) | (subtype)) enum aub_state_struct_type { AUB_TRACE_VS_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 1), AUB_TRACE_GS_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 2), AUB_TRACE_CLIP_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 3), AUB_TRACE_SF_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 4), AUB_TRACE_WM_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 5), AUB_TRACE_CC_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 6), AUB_TRACE_CLIP_VP_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 7), AUB_TRACE_SF_VP_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 8), AUB_TRACE_CC_VP_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 0x9), AUB_TRACE_SAMPLER_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 0xa), AUB_TRACE_KERNEL_INSTRUCTIONS = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 0xb), AUB_TRACE_SCRATCH_SPACE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 0xc), AUB_TRACE_SAMPLER_DEFAULT_COLOR = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 0xd), AUB_TRACE_SCISSOR_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 0x15), AUB_TRACE_BLEND_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 0x16), AUB_TRACE_DEPTH_STENCIL_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 0x17), AUB_TRACE_VERTEX_BUFFER = ENCODE_SS_TYPE(AUB_TRACE_TYPE_VERTEX_BUFFER, 0), AUB_TRACE_BINDING_TABLE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_SURFACE, 0x100), AUB_TRACE_SURFACE_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_SURFACE, 0x200), AUB_TRACE_VS_CONSTANTS = ENCODE_SS_TYPE(AUB_TRACE_TYPE_CONSTANT_BUFFER, 0), AUB_TRACE_WM_CONSTANTS = ENCODE_SS_TYPE(AUB_TRACE_TYPE_CONSTANT_BUFFER, 1), }; #undef ENCODE_SS_TYPE /** * Decode a aub_state_struct_type value to determine the type that should be * stored in the .aub file. */ static inline uint32_t AUB_TRACE_TYPE(enum aub_state_struct_type ss_type) { return (ss_type & 0xFFFF0000) >> 16; } /** * Decode a state_struct_type value to determine the subtype that should be * stored in the .aub file. */ static inline uint32_t AUB_TRACE_SUBTYPE(enum aub_state_struct_type ss_type) { return ss_type & 0xFFFF; } /* DW3: address */ /* DW4: len */ #endif /* _INTEL_AUB_H */ intel-gpu-tools-1.14/tools/intel_l3_parity.c0000644000175000017500000002630412665336131016042 00000000000000/* * Copyright © 2012 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Ben Widawsky * */ #define _GNU_SOURCE #include #include #include #include #include #include #include #include #include #include "intel_chipset.h" #include "intel_io.h" #include "drmtest.h" #ifdef HAVE_CONFIG_H #include "config.h" #endif #if HAVE_UDEV #include #include #endif #include "intel_l3_parity.h" static unsigned int devid; /* L3 size is always a function of banks. The number of banks cannot be * determined by number of slices however */ static inline int num_banks(void) { if (IS_HSW_GT3(devid)) return 8; /* 4 per each slice */ else if (IS_HSW_GT1(devid) || devid == PCI_CHIP_IVYBRIDGE_GT1 || devid == PCI_CHIP_IVYBRIDGE_M_GT1) return 2; else return 4; } #define NUM_SUBBANKS 8 #define BYTES_PER_BANK (128 << 10) /* Each row addresses [up to] 4b. This multiplied by the number of subbanks * will give the L3 size per bank. * TODO: Row size is fixed on IVB, and variable on HSW.*/ #define MAX_ROW (1<<12) #define MAX_BANKS_PER_SLICE 4 #define NUM_REGS (MAX_BANKS_PER_SLICE * NUM_SUBBANKS) #define MAX_SLICES (IS_HSW_GT3(devid) ? 2 : 1) #define REAL_MAX_SLICES 2 /* TODO support SLM config */ #define L3_SIZE ((MAX_ROW * 4) * NUM_SUBBANKS * num_banks()) struct __attribute__ ((__packed__)) l3_log_register { uint32_t row0_enable : 1; uint32_t rsvd2 : 4; uint32_t row0 : 11; uint32_t row1_enable : 1; uint32_t rsvd1 : 4; uint32_t row1 : 11; } l3logs[REAL_MAX_SLICES][MAX_BANKS_PER_SLICE][NUM_SUBBANKS]; static int which_slice = -1; #define for_each_slice(__i) \ for ((__i) = (which_slice == -1) ? 0 : which_slice; \ (__i) < ((which_slice == -1) ? MAX_SLICES : (which_slice + 1)); \ (__i)++) static void decode_dft(uint32_t dft) { if (IS_IVYBRIDGE(devid) || !(dft & 1)) { printf("Error injection disabled\n"); return; } printf("Error injection enabled\n"); printf(" Hang = %s\n", (dft >> 28) & 0x1 ? "yes" : "no"); printf(" Row = %d\n", (dft >> 7) & 0x7ff); printf(" Bank = %d\n", (dft >> 2) & 0x3); printf(" Subbank = %d\n", (dft >> 4) & 0x7); printf(" Slice = %d\n", (dft >> 1) & 0x1); } static void dumpit(int slice) { int i, j; for (i = 0; i < MAX_BANKS_PER_SLICE; i++) { for (j = 0; j < NUM_SUBBANKS; j++) { struct l3_log_register *reg = &l3logs[slice][i][j]; if (reg->row0_enable) printf("Slice %d, Row %d, Bank %d, Subbank %d is disabled\n", slice, reg->row0, i, j); if (reg->row1_enable) printf("Slice %d, Row %d, Bank %d, Subbank %d is disabled\n", slice, reg->row1, i, j); } } } static int disable_rbs(int row, int bank, int sbank, int slice) { struct l3_log_register *reg = &l3logs[slice][bank][sbank]; // can't map more than 2 rows if (reg->row0_enable && reg->row1_enable) return -1; // can't remap the same row twice if ((reg->row0_enable && reg->row0 == row) || (reg->row1_enable && reg->row1 == row)) { return -1; } if (reg->row0_enable) { reg->row1 = row; reg->row1_enable = 1; } else { reg->row0 = row; reg->row0_enable = 1; } return 0; } static void enables_rbs(int row, int bank, int sbank, int slice) { struct l3_log_register *reg = &l3logs[slice][bank][sbank]; if (!reg->row0_enable && !reg->row1_enable) return; if (reg->row1_enable && reg->row1 == row) reg->row1_enable = 0; else if (reg->row0_enable && reg->row0 == row) reg->row0_enable = 0; } static void usage(const char *name) { printf("usage: %s [OPTIONS] [ACTION]\n" "Operate on the i915 L3 GPU cache (should be run as root)\n\n" " OPTIONS:\n" " -r, --row=[row] The row to act upon (default 0)\n" " -b, --bank=[bank] The bank to act upon (default 0)\n" " -s, --subbank=[subbank] The subbank to act upon (default 0)\n" " -w, --slice=[slice] Which slice to act on (default: -1 [all])\n" " , --daemon Run the listener (-L) as a daemon\n" " ACTIONS (only 1 may be specified at a time):\n" " -h, --help Display this help\n" " -H, --hw-info Display the current L3 properties\n" " -l, --list List the current L3 logs\n" " -a, --clear-all Clear all disabled rows\n" " -e, --enable Enable row, bank, subbank (undo -d)\n" " -d, --disable= Disable row, bank, subbank (inline arguments are deprecated. Please use -r, -b, -s instead\n" " -i, --inject [HSW only] Cause hardware to inject a row errors\n" " -u, --uninject [HSW only] Turn off hardware error injectection (undo -i)\n" " -L, --listen Listen for uevent errors\n", name); } int main(int argc, char *argv[]) { const int device = drm_get_card(); char *path[REAL_MAX_SLICES]; uint32_t dft; int row = 0, bank = 0, sbank = 0; int fd[REAL_MAX_SLICES] = {0}, ret, i; int action = '0'; int drm_fd = drm_open_driver(DRIVER_INTEL); int daemonize = 0; devid = intel_get_drm_devid(drm_fd); if (intel_gen(devid) < 7 || IS_VALLEYVIEW(devid)) exit(EXIT_SUCCESS); assert(intel_register_access_init(intel_get_pci_device(), 0) == 0); ret = asprintf(&path[0], "/sys/class/drm/card%d/l3_parity", device); assert(ret != -1); ret = asprintf(&path[1], "/sys/class/drm/card%d/l3_parity_slice_1", device); assert(ret != -1); for_each_slice(i) { fd[i] = open(path[i], O_RDWR); assert(fd[i]); ret = read(fd[i], l3logs[i], NUM_REGS * sizeof(uint32_t)); if (ret == -1) { perror("Reading sysfs"); exit(EXIT_FAILURE); } assert(lseek(fd[i], 0, SEEK_SET) == 0); } /* NB: It is potentially unsafe to read this register if the kernel is * actively using this register range, or we're running multiple * instances of this tool. Since neither of those cases should occur * (and the tool should be root only) we can safely ignore this for * now. Just be aware of this if for some reason a hang is reported * when using this tool. */ dft = intel_register_read(0xb038); while (1) { int c, option_index = 0; struct option long_options[] = { { "help", no_argument, 0, 'h' }, { "list", no_argument, 0, 'l' }, { "clear-all", no_argument, 0, 'a' }, { "enable", no_argument, 0, 'e' }, { "disable", optional_argument, 0, 'd' }, { "inject", no_argument, 0, 'i' }, { "uninject", no_argument, 0, 'u' }, { "hw-info", no_argument, 0, 'H' }, { "listen", no_argument, 0, 'L' }, { "row", required_argument, 0, 'r' }, { "bank", required_argument, 0, 'b' }, { "subbank", required_argument, 0, 's' }, { "slice", required_argument, 0, 'w' }, { "daemon", no_argument, &daemonize, 1 }, {0, 0, 0, 0} }; c = getopt_long(argc, argv, "hHr:b:s:w:aled::iuL", long_options, &option_index); if (c == -1) break; if (c == 0) continue; switch (c) { case '?': case 'h': usage(argv[0]); exit(EXIT_SUCCESS); case 'H': printf("Number of slices: %d\n", MAX_SLICES); printf("Number of banks: %d\n", num_banks()); printf("Subbanks per bank: %d\n", NUM_SUBBANKS); printf("Max L3 size: %dK\n", L3_SIZE >> 10); printf("Has error injection: %s\n", IS_HASWELL(devid) ? "yes" : "no"); exit(EXIT_SUCCESS); case 'r': row = atoi(optarg); if (row >= MAX_ROW) exit(EXIT_FAILURE); break; case 'b': bank = atoi(optarg); if (bank >= num_banks() || bank >= MAX_BANKS_PER_SLICE) exit(EXIT_FAILURE); break; case 's': sbank = atoi(optarg); if (sbank >= NUM_SUBBANKS) exit(EXIT_FAILURE); break; case 'w': which_slice = atoi(optarg); if (which_slice >= MAX_SLICES) exit(EXIT_FAILURE); break; case 'i': case 'u': if (!IS_HASWELL(devid)) { fprintf(stderr, "Error injection supported on HSW+ only\n"); exit(EXIT_FAILURE); } case 'd': if (optarg) { ret = sscanf(optarg, "%d,%d,%d", &row, &bank, &sbank); if (ret != 3) exit(EXIT_FAILURE); } case 'a': case 'l': case 'e': case 'L': if (action != '0') { fprintf(stderr, "Only one action may be specified\n"); exit(EXIT_FAILURE); } action = c; break; default: abort(); } } if (action == 'i') { if (((dft >> 1) & 1) != which_slice) { fprintf(stderr, "DFT register already has slice %d enabled, and we don't support multiple slices. Try modifying -w; but sometimes the register sticks in the wrong way\n", (dft >> 1) & 1); exit(EXIT_FAILURE); } if (which_slice == -1) { fprintf(stderr, "Cannot inject errors to multiple slices (modify -w)\n"); exit(EXIT_FAILURE); } if (dft & 1 && ((dft >> 1) && 1) == which_slice) printf("warning: overwriting existing injections. This is very dangerous.\n"); } /* Daemon doesn't work like the other commands */ if (action == 'L') { #ifndef HAVE_UDEV fprintf(stderr, "Daemon requires udev support. Please reconfigure.\n"); exit(EXIT_FAILURE); #else struct l3_parity par; struct l3_location loc; if (daemonize) { assert(daemon(0, 0) == 0); openlog(argv[0], LOG_CONS | LOG_PID, LOG_USER); } memset(&par, 0, sizeof(par)); assert(l3_uevent_setup(&par) == 0); assert(l3_listen(&par, daemonize == 1, &loc) == 0); exit(EXIT_SUCCESS); #endif } if (action == 'l') decode_dft(dft); /* Per slice operations */ for_each_slice(i) { switch (action) { case 'l': dumpit(i); break; case 'a': memset(l3logs[i], 0, NUM_REGS * sizeof(struct l3_log_register)); break; case 'e': enables_rbs(row, bank, sbank, i); break; case 'd': assert(disable_rbs(row, bank, sbank, i) == 0); break; case 'i': if (bank == 3) { fprintf(stderr, "The hardware does not support error inject on bank 3.\n"); exit(EXIT_FAILURE); } dft |= row << 7; dft |= sbank << 4; dft |= bank << 2; assert(i < 2); dft |= i << 1; /* slice */ dft |= 1 << 0; /* enable */ intel_register_write(0xb038, dft); break; case 'u': intel_register_write(0xb038, dft & ~(1<<0)); break; case 'L': break; default: abort(); } } intel_register_access_fini(); if (action == 'l') exit(EXIT_SUCCESS); for_each_slice(i) { ret = write(fd[i], l3logs[i], NUM_REGS * sizeof(uint32_t)); if (ret == -1) { perror("Writing sysfs"); exit(EXIT_FAILURE); } close(fd[i]); } exit(EXIT_SUCCESS); } intel-gpu-tools-1.14/tools/intel_forcewaked.c0000644000175000017500000000550512665336131016246 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. * * Authors: * Ben Widawsky * */ #include #include #include #include #include #include #include #include #include #include "intel_io.h" #include "intel_chipset.h" bool daemonized; #define INFO_PRINT(...) \ do { \ if (daemonized) \ syslog(LOG_INFO, ##__VA_ARGS__); \ else \ fprintf(stdout, ##__VA_ARGS__); \ } while(0) static void help(char *prog) { printf("%s Prevents the GT from sleeping.\n\n", prog); printf("usage: %s [options] \n\n", prog); printf("Options: \n"); printf(" -b Run in background/daemon mode\n"); } static int is_alive(void) { /* Read the timestamp, which should *almost* always be !0 */ return (intel_register_read(0x2358) != 0); } int main(int argc, char *argv[]) { int ret; if (argc > 2 || (argc == 2 && !strncmp(argv[1], "-h", 2))) { help(argv[1]); exit(0); } if (argc == 2 && (!strncmp(argv[1], "-b", 2))) daemonized = true; if (daemonized) { assert(daemon(0, 0) == 0); openlog(argv[0], LOG_CONS | LOG_PID, LOG_USER); INFO_PRINT("started daemon"); } ret = intel_register_access_init(intel_get_pci_device(), 1); if (ret) { INFO_PRINT("Couldn't init register access\n"); exit(1); } else { INFO_PRINT("Forcewake locked\n"); } while(1) { if (!is_alive()) { INFO_PRINT("gpu reset? restarting daemon\n"); intel_register_access_fini(); ret = intel_register_access_init(intel_get_pci_device(), 1); if (ret) INFO_PRINT("Reg access init fail\n"); } sleep(1); } intel_register_access_fini(); INFO_PRINT("Forcewake unlock\n"); if (daemonized) { INFO_PRINT("finished\n"); closelog(); } return 0; } intel-gpu-tools-1.14/tools/Makefile.sources0000644000175000017500000000216112665336131015712 00000000000000noinst_PROGRAMS = \ hsw_compute_wrpll \ skl_compute_wrpll \ skl_ddb_allocation \ $(NULL) bin_PROGRAMS = \ igt_stats \ intel_audio_dump \ intel_reg \ intel_backlight \ intel_bios_dumper \ intel_bios_reader \ intel_display_crc \ intel_display_poller \ intel_dump_decode \ intel_error_decode \ intel_forcewaked \ intel_gpu_frequency \ intel_framebuffer_dump \ intel_firmware_decode \ intel_gpu_time \ intel_gpu_top \ intel_gtt \ intel_infoframes \ intel_l3_parity \ intel_lid \ intel_opregion_decode \ intel_panel_fitter \ intel_perf_counters \ intel_reg_checker \ intel_residency \ intel_stepping \ intel_watermark dist_bin_SCRIPTS = intel_gpu_abrt intel_dump_decode_SOURCES = \ intel_dump_decode.c intel_reg_SOURCES = \ intel_reg.c \ intel_reg_decode.c \ intel_reg_spec.c \ intel_reg_spec.h intel_error_decode_SOURCES = \ intel_error_decode.c intel_error_decode_LDFLAGS = -lz intel_bios_reader_SOURCES = \ intel_bios_reader.c \ intel_bios.h intel_l3_parity_SOURCES = \ intel_l3_parity.c \ intel_l3_parity.h \ intel_l3_udev_listener.c intel-gpu-tools-1.14/tools/igt_stats.c0000644000175000017500000000472612665336131014746 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ /* Simple tool to print statistics on incoming line buffers intervals */ #define _ISOC99_SOURCE #include #include #include #include #include #include #include "igt_stats.h" static void statify(FILE *file, const char *name) { igt_stats_t stats; char *line = NULL; size_t line_len = 0; igt_stats_init(&stats); while (getline(&line, &line_len, file) != -1) { char *end, *start = line; union { unsigned long long u64; double fp; } u; int is_float; is_float = 0; u.u64 = strtoull(start, &end, 0); if (*end == '.') { u.fp = strtod(start, &end); is_float = 1; } while (start != end) { if (is_float) igt_stats_push_float(&stats, u.fp); else igt_stats_push(&stats, u.u64); is_float = 0; u.u64 = strtoull(start = end, &end, 0); if (*end == '.') { u.fp = strtod(start, &end); is_float = 1; } } } free(line); if (name) printf("%s: ", name); printf("%f\n", igt_stats_get_trimean(&stats)); igt_stats_fini(&stats); } int main(int argc, char **argv) { if (argc == 1) { statify(stdin, NULL); } else { int i; for (i = 1; i < argc; i++) { FILE *file; file = fopen(argv[i], "r"); if (file == NULL) { perror(argv[i]); continue; } statify(file, argv[i]); fclose(file); } } return 0; } intel-gpu-tools-1.14/tools/intel_gpu_time.c0000644000175000017500000000600012665336131015734 00000000000000/* * Copyright © 2007,2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. * * Authors: * Eric Anholt * Chris Wilson * */ #include #include #include #include #include #include #include #include "intel_io.h" #include "intel_chipset.h" #include "intel_reg.h" #define SAMPLES_PER_SEC 10000 static volatile int goddo; static pid_t spawn(char **argv) { pid_t pid; pid = fork(); if (pid != 0) return pid; execvp(argv[0], argv); exit(1); } static void sighandler(int sig) { goddo = sig; } int main(int argc, char **argv) { pid_t child; uint64_t ring_idle = 0, ring_time = 0; struct timeval start, end; static struct rusage rusage; int status; intel_mmio_use_pci_bar(intel_get_pci_device()); if (argc == 1) { fprintf(stderr, "usage: %s cmd [args...]\n", argv[0]); return 1; } signal(SIGCHLD, sighandler); signal(SIGINT, SIG_IGN); signal(SIGQUIT, SIG_IGN); gettimeofday(&start, NULL); child = spawn(argv+1); if (child < 0) return 127; while (!goddo) { uint32_t ring_head, ring_tail; ring_head = INREG(LP_RING + RING_HEAD) & HEAD_ADDR; ring_tail = INREG(LP_RING + RING_TAIL) & TAIL_ADDR; if (ring_tail == ring_head) ring_idle++; ring_time++; usleep(1000000 / SAMPLES_PER_SEC); } gettimeofday(&end, NULL); timersub(&end, &start, &end); waitpid(child, &status, 0); getrusage(RUSAGE_CHILDREN, &rusage); printf("user: %ld.%06lds, sys: %ld.%06lds, elapsed: %ld.%06lds, CPU: %.1f%%, GPU: %.1f%%\n", rusage.ru_utime.tv_sec, rusage.ru_utime.tv_usec, rusage.ru_stime.tv_sec, rusage.ru_stime.tv_usec, end.tv_sec, end.tv_usec, 100*(rusage.ru_utime.tv_sec + 1e-6*rusage.ru_utime.tv_usec + rusage.ru_stime.tv_sec + 1e-6*rusage.ru_stime.tv_usec) / (end.tv_sec + 1e-6*end.tv_usec), 100 - ring_idle * 100. / ring_time); return WEXITSTATUS(status); } intel-gpu-tools-1.14/tools/intel_opregion_decode.c0000644000175000017500000002771112665336131017264 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. * * Authors: * Jani Nikula * */ #include #include #include #include #include #include #include #include #include #include #include #include "intel_io.h" #include "drmtest.h" #define OPREGION_HEADER_OFFSET 0 #define OPREGION_ACPI_OFFSET 0x100 #define OPREGION_SWSCI_OFFSET 0x200 #define OPREGION_ASLE_OFFSET 0x300 #define OPREGION_VBT_OFFSET 0x400 #define OPREGION_ASLE_EXT_OFFSET 0x1C00 #define MBOX_ACPI (1 << 0) #define MBOX_SWSCI (1 << 1) #define MBOX_ASLE (1 << 2) #define MBOX_VBT (1 << 3) #define MBOX_ASLE_EXT (1 << 4) struct opregion_header { char sign[16]; uint32_t size; uint32_t over; char sver[32]; char vver[16]; char gver[16]; uint32_t mbox; uint32_t dmod; uint32_t pcon; char dver[32]; uint8_t rsv1[124]; } __attribute__((packed)); /* OpRegion mailbox #1: public ACPI methods */ struct opregion_acpi { uint32_t drdy; /* driver readiness */ uint32_t csts; /* notification status */ uint32_t cevt; /* current event */ uint8_t rsvd1[20]; uint32_t didl[8]; /* supported display devices ID list */ uint32_t cpdl[8]; /* currently presented display list */ uint32_t cadl[8]; /* currently active display list */ uint32_t nadl[8]; /* next active devices list */ uint32_t aslp; /* ASL sleep time-out */ uint32_t tidx; /* toggle table index */ uint32_t chpd; /* current hotplug enable indicator */ uint32_t clid; /* current lid state*/ uint32_t cdck; /* current docking state */ uint32_t sxsw; /* Sx state resume */ uint32_t evts; /* ASL supported events */ uint32_t cnot; /* current OS notification */ uint32_t nrdy; /* driver status */ uint32_t did2[7]; uint32_t cpd2[7]; uint8_t rsvd2[4]; } __attribute__((packed)); /* OpRegion mailbox #2: SWSCI */ struct opregion_swsci { uint32_t scic; /* SWSCI command|status|data */ uint32_t parm; /* command parameters */ uint32_t dslp; /* driver sleep time-out */ uint8_t rsvd[244]; } __attribute__((packed)); /* OpRegion mailbox #3: ASLE */ struct opregion_asle { uint32_t ardy; /* driver readiness */ uint32_t aslc; /* ASLE interrupt command */ uint32_t tche; /* technology enabled indicator */ uint32_t alsi; /* current ALS illuminance reading */ uint32_t bclp; /* backlight brightness to set */ uint32_t pfit; /* panel fitting state */ uint32_t cblv; /* current brightness level */ uint16_t bclm[20]; /* backlight level duty cycle mapping table */ uint32_t cpfm; /* current panel fitting mode */ uint32_t epfm; /* enabled panel fitting modes */ uint8_t plut_header; /* panel LUT and identifier */ uint8_t plut_identifier[10]; /* panel LUT and identifier */ uint8_t plut[63]; /* panel LUT and identifier */ uint32_t pfmb; /* PWM freq and min brightness */ uint32_t ccdv; uint32_t pcft; uint32_t srot; uint32_t iuer; uint8_t fdss[8]; uint32_t fdsp; uint32_t stat; uint64_t rvda; /* Physical address of raw vbt data */ uint32_t rvds; /* Size of raw vbt data */ uint8_t rsvd[58]; } __attribute__((packed)); /* OpRegion mailbox #4: VBT */ struct opregion_vbt { char product_string[20]; /* rest ignored */ } __attribute__((packed)); /* OpRegion mailbox #5: ASLE extension */ struct opregion_asle_ext { uint32_t phed; uint8_t bddc[256]; } __attribute__((packed)); static uint32_t decode_header(const void *buffer) { const struct opregion_header *header = buffer; char *s; if (strncmp("IntelGraphicsMem", header->sign, sizeof(header->sign))) { fprintf(stderr, "invalid opregion signature\n"); return 0; } printf("OpRegion Header:\n"); s = strndup(header->sign, sizeof(header->sign)); printf("\tsign:\t%s\n", s); free(s); printf("\tsize:\t0x%08x\n", header->size); printf("\tover:\t0x%08x\n", header->over); s = strndup(header->sver, sizeof(header->sver)); printf("\tsver:\t%s\n", s); free(s); s = strndup(header->vver, sizeof(header->vver)); printf("\tvver:\t%s\n", s); free(s); s = strndup(header->gver, sizeof(header->gver)); printf("\tgver:\t%s\n", s); free(s); printf("\tmbox:\t0x%08x\n", header->mbox); printf("\tdmod:\t0x%08x\n", header->dmod); printf("\tpcon:\t0x%08x\n", header->pcon); s = strndup(header->dver, sizeof(header->dver)); printf("\tdver:\t%s\n", s); free(s); printf("\n"); return header->mbox; } static void decode_acpi(const void *buffer) { const struct opregion_acpi *acpi = buffer; int i; printf("OpRegion Mailbox 1: Public ACPI Methods:\n"); printf("\tdrdy:\t0x%08x\n", acpi->drdy); printf("\tcsts:\t0x%08x\n", acpi->csts); printf("\tcevt:\t0x%08x\n", acpi->cevt); printf("\tdidl:\n"); for (i = 0; i < ARRAY_SIZE(acpi->didl); i++) printf("\t\tdidl[%d]:\t0x%08x\n", i, acpi->didl[i]); printf("\tcpdl:\n"); for (i = 0; i < ARRAY_SIZE(acpi->cpdl); i++) printf("\t\tcpdl[%d]:\t0x%08x\n", i, acpi->cpdl[i]); printf("\tcadl:\n"); for (i = 0; i < ARRAY_SIZE(acpi->cadl); i++) printf("\t\tcadl[%d]:\t0x%08x\n", i, acpi->cadl[i]); printf("\tnadl:\n"); for (i = 0; i < ARRAY_SIZE(acpi->nadl); i++) printf("\t\tnadl[%d]:\t0x%08x\n", i, acpi->nadl[i]); printf("\taslp:\t0x%08x\n", acpi->aslp); printf("\ttidx:\t0x%08x\n", acpi->tidx); printf("\tchpd:\t0x%08x\n", acpi->chpd); printf("\tclid:\t0x%08x\n", acpi->clid); printf("\tcdck:\t0x%08x\n", acpi->cdck); printf("\tsxsw:\t0x%08x\n", acpi->sxsw); printf("\tevts:\t0x%08x\n", acpi->evts); printf("\tcnot:\t0x%08x\n", acpi->cnot); printf("\tnrdy:\t0x%08x\n", acpi->nrdy); printf("\tdid2:\n"); for (i = 0; i < ARRAY_SIZE(acpi->did2); i++) printf("\t\tdid2[%d]:\t0x%08x\n", i, acpi->did2[i]); printf("\tcpd2:\n"); for (i = 0; i < ARRAY_SIZE(acpi->cpd2); i++) printf("\t\tcpd2[%d]:\t0x%08x\n", i, acpi->cpd2[i]); printf("\n"); } static void decode_swsci(const void *buffer) { const struct opregion_swsci *swsci = buffer; printf("OpRegion Mailbox 2: Software SCI Interface (SWSCI):\n"); printf("\tscic:\t0x%08x\n", swsci->scic); printf("\tparm:\t0x%08x\n", swsci->parm); printf("\tdslp:\t0x%08x\n", swsci->dslp); printf("\n"); } static void decode_asle(const void *buffer) { const struct opregion_asle *asle = buffer; int i; printf("OpRegion Mailbox 3: BIOS to Driver Notification (ASLE):\n"); printf("\tardy:\t0x%08x\n", asle->ardy); printf("\taslc:\t0x%08x\n", asle->aslc); printf("\ttche:\t0x%08x\n", asle->tche); printf("\talsi:\t0x%08x\n", asle->alsi); printf("\tbclp:\t0x%08x\n", asle->bclp); printf("\tpfit:\t0x%08x\n", asle->pfit); printf("\tcblv:\t0x%08x\n", asle->cblv); printf("\tbclm:\n"); for (i = 0; i < ARRAY_SIZE(asle->bclm); i++) { int valid = asle->bclm[i] & (1 << 15); int percentage = (asle->bclm[i] & 0x7f00) >> 8; int duty_cycle = asle->bclm[i] & 0xff; printf("\t\tbclm[%d]:\t0x%04x", i, asle->bclm[i]); if (valid) printf(" (%3d%% -> 0x%02x)\n", percentage, duty_cycle); else printf("\n"); } printf("\tcpfm:\t0x%08x\n", asle->cpfm); printf("\tepfm:\t0x%08x\n", asle->epfm); printf("\tplut header:\t0x%02x\n", asle->plut_header); printf("\tplut identifier:"); for (i = 0; i < ARRAY_SIZE(asle->plut_identifier); i++) printf(" %02x", asle->plut_identifier[i]); printf("\n"); printf("\tplut:\n"); for (i = 0; i < ARRAY_SIZE(asle->plut); i++) { const int COLUMNS = 7; if (i % COLUMNS == 0) printf("\t\tplut[%d]:\t", i / COLUMNS); printf("%02x ", asle->plut[i]); if (i % COLUMNS == COLUMNS - 1) printf("\n"); } printf("\tpfmb:\t0x%08x\n", asle->pfmb); printf("\tccdv:\t0x%08x\n", asle->ccdv); printf("\tpcft:\t0x%08x\n", asle->pcft); printf("\tsrot:\t0x%08x\n", asle->srot); printf("\tiuer:\t0x%08x\n", asle->iuer); printf("\tfdss:\t"); for (i = 0; i < ARRAY_SIZE(asle->fdss); i++) printf("%02x ", asle->fdss[i]); printf("\n"); printf("\tfdsp:\t0x%08x\n", asle->fdsp); printf("\tstat:\t0x%08x\n", asle->stat); printf("\trvda:\t0x%016lx\n", asle->rvda); printf("\trvds:\t0x%08x\n", asle->rvds); printf("\n"); } static void decode_vbt(const void *buffer) { const struct opregion_vbt *vbt = buffer; char *s; printf("OpRegion Mailbox 4: Video BIOS Table (VBT):\n"); s = strndup(vbt->product_string, sizeof(vbt->product_string)); printf("\tproduct string:\t%s\n", s); free(s); printf("\t(use intel_bios_reader to decode the VBT)\n"); printf("\n"); } static void decode_asle_ext(const void *buffer) { const struct opregion_asle_ext *asle_ext = buffer; int i; printf("OpRegion Mailbox 5: BIOS to Driver Notification Extension:\n"); printf("\tphed:\t0x%08x\n", asle_ext->phed); printf("\tbddc:\n"); for (i = 0; i < ARRAY_SIZE(asle_ext->bddc); i++) { const int COLUMNS = 16; if (i % COLUMNS == 0) printf("\t\tbddc[0x%02x]:\t", i); printf("%02x ", asle_ext->bddc[i]); if (i % COLUMNS == COLUMNS - 1) printf("\n"); } printf("\n"); } static void decode_opregion(const uint8_t *opregion, int size) { uint32_t mbox; /* XXX: allow decoding up to size */ if (OPREGION_ASLE_EXT_OFFSET + sizeof(struct opregion_asle_ext) > size) { fprintf(stderr, "buffer too small\n"); return; } mbox = decode_header(opregion + OPREGION_HEADER_OFFSET); if (mbox & MBOX_ACPI) decode_acpi(opregion + OPREGION_ACPI_OFFSET); if (mbox & MBOX_SWSCI) decode_swsci(opregion + OPREGION_SWSCI_OFFSET); if (mbox & MBOX_ASLE) decode_asle(opregion + OPREGION_ASLE_OFFSET); if (mbox & MBOX_VBT) decode_vbt(opregion + OPREGION_VBT_OFFSET); if (mbox & MBOX_ASLE_EXT) decode_asle_ext(opregion + OPREGION_ASLE_EXT_OFFSET); } int main(int argc, char *argv[]) { const char *filename = "/sys/kernel/debug/dri/0/i915_opregion"; int fd; struct stat finfo; uint8_t *opregion; int c, option_index = 0; static struct option long_options[] = { { "file", required_argument, 0, 'f' }, { "help", no_argument, 0, 'h' }, { 0 }, }; while ((c = getopt_long(argc, argv, "hf:", long_options, &option_index)) != -1) { switch (c) { case 'h': printf("usage: intel_opregion_decode [-f|--file=]\n"); return 0; case 'f': filename = optarg; break; default: fprintf(stderr, "unkown command options\n"); return 1; } } fd = open(filename, O_RDONLY); if (fd == -1) { printf("Couldn't open \"%s\": %s\n", filename, strerror(errno)); return 1; } if (stat(filename, &finfo)) { printf("failed to stat \"%s\": %s\n", filename, strerror(errno)); return 1; } if (finfo.st_size == 0) { int len = 0, ret; finfo.st_size = 8192; opregion = malloc(finfo.st_size); while ((ret = read(fd, opregion + len, finfo.st_size - len))) { if (ret < 0) { printf("failed to read \"%s\": %s\n", filename, strerror(errno)); return 1; } len += ret; if (len == finfo.st_size) { finfo.st_size *= 2; opregion = realloc(opregion, finfo.st_size); } } } else { opregion = mmap(NULL, finfo.st_size, PROT_READ, MAP_SHARED, fd, 0); if (opregion == MAP_FAILED) { printf("failed to map \"%s\": %s\n", filename, strerror(errno)); return 1; } } decode_opregion(opregion, finfo.st_size); return 0; } intel-gpu-tools-1.14/tools/registers/0000755000175000017500000000000012665337376014673 500000000000000intel-gpu-tools-1.14/tools/registers/vlv_pipe_a.txt0000644000175000017500000001535612665336131017476 00000000000000('PIPEA_DSL', '0x70000', '0x180000') ('PIPEA_SLC', '0x70004', '0x180000') ('PIPEACONF', '0x70008', '0x180000') ('PIPEAGCMAXRED', '0x70010', '0x180000') ('PIPEAGCMAXGREEN', '0x70014', '0x180000') ('PIPEAGCMAXBLUE', '0x70018', '0x180000') ('PIPEASTAT', '0x70024', '0x180000') ('PIPEAFRAMECOUNT', '0x70040', '0x180000') ('PIPEAFLIPCOUNT', '0x70044', '0x180000') ('PIPEAMSAMISC', '0x70048', '0x180000') ('DSPAADDR', '0x7017C', '0x180000') ('DSPACNTR', '0x70180', '0x180000') ('DSPALINOFF', '0x70184', '0x180000') ('DSPASTRIDE', '0x70188', '0x180000') ('DSPAKEYVAL', '0x70194', '0x180000') ('DSPAKEYMSK', '0x70198', '0x180000') ('DSPASURF', '0x7019C', '0x180000') ('DSPATILEOFF', '0x701A4', '0x180000') ('DSPASURFLIVE', '0x701AC', '0x180000') ('DSPAFLPQSTAT', '0x70200', '0x180000') ('CURACNTR', '0x70080', '0x180000') ('CURABASE', '0x70084', '0x180000') ('CURAPOS', '0x70088', '0x180000') ('CURARESV', '0x7008C', '0x180000') ('CURAPALET0', '0x70090', '0x180000') ('CURAPALET1', '0x70094', '0x180000') ('CURAPALET2', '0x70098', '0x180000') ('CURAPALET3', '0x7009C', '0x180000') ('CURALIVEBASE', '0x700AC', '0x180000') ('SPACNTR', '0x72180', '0x180000') ('SPALINOFF', '0x72184', '0x180000') ('SPASTRIDE', '0x72188', '0x180000') ('SPAPOS', '0x7218C', '0x180000') ('SPASIZE', '0x72190', '0x180000') ('SPAKEYMINVAL', '0x72194', '0x180000') ('SPAKEYMSK', '0x72198', '0x180000') ('SPASURF', '0x7219C', '0x180000') ('SPAKEYMAXVAL', '0x721A0', '0x180000') ('SPATILEOFF', '0x721A4', '0x180000') ('SPACONTALPHA', '0x721A8', '0x180000') ('SPALIVESURF', '0x721AC', '0x180000') ('SPACLRC0', '0x721D0', '0x180000') ('SPACLRC1', '0x721D4', '0x180000') ('SPAGAMC5', '0x721E0', '0x180000') ('SPAGAMC4', '0x721E4', '0x180000') ('SPAGAMC3', '0x721E8', '0x180000') ('SPAGAMC2', '0x721EC', '0x180000') ('SPAGAMC1', '0x721F0', '0x180000') ('SPAGAMC0', '0x721F4', '0x180000') ('SPBCNTR', '0x72280', '0x180000') ('SPBLINOFF', '0x72284', '0x180000') ('SPBSTRIDE', '0x72288', '0x180000') ('SPBPOS', '0x7228C', '0x180000') ('SPBSIZE', '0x72290', '0x180000') ('SPBKEYMINVAL', '0x72294', '0x180000') ('SPBKEYMSK', '0x72298', '0x180000') ('SPBSURF', '0x7229C', '0x180000') ('SPBKEYMAXVAL', '0x722A0', '0x180000') ('SPBTILEOFF', '0x722A4', '0x180000') ('SPBCONTALPHA', '0x722A8', '0x180000') ('SPBLIVESURF', '0x722AC', '0x180000') ('SPBCLRC0', '0x722D0', '0x180000') ('SPBCLRC1', '0x722D4', '0x180000') ('SPBGAMC5', '0x722E0', '0x180000') ('SPBGAMC4', '0x722E4', '0x180000') ('SPBGAMC3', '0x722E8', '0x180000') ('SPBGAMC2', '0x722EC', '0x180000') ('SPBGAMC1', '0x722F0', '0x180000') ('SPBGAMC0', '0x722F4', '0x180000') ('DPALETTE_A', '0xA000', '0x180000') ('DPLLA_CTRL', '0x6014', '0x180000') ('DPLLAMD', '0x601C', '0x180000') ('HTOTAL_A', '0x60000', '0x180000') ('HBLANK_A', '0x60004', '0x180000') ('HSYNC_A', '0x60008', '0x180000') ('VTOTAL_A', '0x6000C', '0x180000') ('VBLANK_A', '0x60010', '0x180000') ('VSYNC_A', '0x60014', '0x180000') ('PIPESRCA', '0x6001C', '0x180000') ('BCLRPAT_A', '0x60020', '0x180000') ('VSYNCSHIFT_A', '0x60028', '0x180000') ('TRANSA_DATA_M1', '0x60030', '0x180000') ('TRANSA_DATA_N1', '0x60034', '0x180000') ('TRANSA_DATA_M2', '0x60038', '0x180000') ('TRANSA_DATA_N2', '0x6003C', '0x180000') ('TRANSA_LINK_M1', '0x60040', '0x180000') ('TRANSA_LINK_N1', '0x60044', '0x180000') ('TRANSA_LINK_M2', '0x60048', '0x180000') ('TRANSA_LINK_N2', '0x6004C', '0x180000') ('CRC_CTRL_RED_A', '0x60050', '0x180000') ('CRC_CTRL_GREEN_A', '0x60054', '0x180000') ('CRC_CTRL_BLUE_A', '0x60058', '0x180000') ('CRC_CTRL_ALPHA_A', '0x6005C', '0x180000') ('CRC_CTRL_RESIDUE2_A', '0x60070', '0x180000') ('CRC_RES_RED_A', '0x60060', '0x180000') ('CRC_RES_GREEN_A', '0x60064', '0x180000') ('CRC_RES_BLUE_A', '0x60068', '0x180000') ('CRC_RES_ALPHA_A', '0x6006C', '0x180000') ('CRC_RES_RESIDUE2_A', '0x60080', '0x180000') ('PSRCTLA', '0x60090', '0x180000') ('PSRSTATA', '0x60094', '0x180000') ('PSRCRC1A', '0x60098', '0x180000') ('PSRCRC2A', '0x6009C', '0x180000') ('VSCSDPA', '0x600A0', '0x180000') ('PIPEA_WGCC_C01_C00', '0x600B0', '0x180000') ('PIPEA_WGCC_C02', '0x600B4', '0x180000') ('PIPEA_WGCC_C11_C10', '0x600B8', '0x180000') ('PIPEA_WGCC_C12', '0x600BC', '0x180000') ('PIPEA_WGCC_C21_C20', '0x600C0', '0x180000') ('PIPEA_WGCC_C22', '0x600C4', '0x180000') ('VIDEO_DIP_CTL_A', '0x60200', '0x180000') ('VIDEO_DIP_DATA_A', '0x60208', '0x180000') ('VIDEO_DIP_GDCP_PAYLOAD_A', '0x60210', '0x180000') ('PIPEA_CGM_DEGAMMA', '0x66000', '0x180000') ('PIPEA_CGM_GAMMA', '0x67000', '0x180000') ('PIPEA_CGM_CSC_COEFF01', '0x67900', '0x180000') ('PIPEA_CGM_CSC_COEFF23', '0x67904', '0x180000') ('PIPEA_CGM_CSC_COEFF45', '0x67908', '0x180000') ('PIPEA_CGM_CSC_COEFF67', '0x6790C', '0x180000') ('PIPEA_CGM_CSC_COEFF8', '0x67910', '0x180000') ('PIPEA_CGM_CONTROL', '0x67A00', '0x180000') ('PIPEA_PP_STATUS', '0x61200', '0x180000') ('PIPEA_PP_CONTROL', '0x61204', '0x180000') ('PIPEA_PP_ON_DELAYS', '0x61208', '0x180000') ('PIPEA_PP_OFF_DELAYS', '0x6120C', '0x180000') ('PIPEA_PP_DIVISOR', '0x61210', '0x180000') ('PIPEA_BLC_PWM_CLT2', '0x61250', '0x180000') ('PIPEA_BLC_PWM_CTL', '0x61254', '0x180000') ('PIPEA_BLM_HIST_CTL', '0x61260', '0x180000') ('PIPEA_IMG_ENH_BIN_DATA', '0x61264', '0x180000') ('PIPEA_HIST_THRESH_GUARD', '0x61268', '0x180000') ('AUD_CONFIG_A', '0x62000', '0x180000') ('AUD_MISC_CTRL_A', '0x62010', '0x180000') ('AUD_CTS_ENABLE_A', '0x62028', '0x180000') ('AUD_HDMIW_HDMIEDID_A', '0x62050', '0x180000') ('AUD_HDMIW_INFOFR_A', '0x62054', '0x180000') ('AUD_OUT_DIG_CNVT_A', '0x62080', '0x180000') ('AUD_OUT_STR_DESC_A', '0x62084', '0x180000') ('AUD_CNTL_ST_A', '0x620B4', '0x180000') ('AUD_OUT_STR_DESC_A_DBG', '0x62F08', '0x180000') ('AUD_OUT_DIG_CNVTA_DBG', '0x62F40', '0x180000') ('STREAM_A_LPE_AUD_CONFIG', '0x65000', '0x180000') ('STREAM_A_LPE_AUD_CH_STATUS_0', '0x65008', '0x180000') ('STREAM_A_LPE_AUD_CH_STATUS_1', '0x6500C', '0x180000') ('STREAM_A_LPE_AUD_HDMI_CTS_DP_MAUD', '0x65010', '0x180000') ('STREAM_A_LPE_AUD_HDMI_N_DP_NAUD', '0x65014', '0x180000') ('STREAM_A_LPE_AUD_BUFFER_CONFIG', '0x65020', '0x180000') ('STREAM_A_LPE_AUD_BUF_CH_SWP', '0x65024', '0x180000') ('STREAM_A_LPE_AUD_BUF_A_ADDR', '0x65040', '0x180000') ('STREAM_A_LPE_AUD_BUF_A_LENGTH', '0x65044', '0x180000') ('STREAM_A_LPE_AUD_BUF_B_ADDR', '0x65048', '0x180000') ('STREAM_A_LPE_AUD_BUF_B_LENGTH', '0x6504C', '0x180000') ('STREAM_A_LPE_AUD_BUF_C_ADDR', '0x65050', '0x180000') ('STREAM_A_LPE_AUD_BUF_C_LENGTH', '0x65054', '0x180000') ('STREAM_A_LPE_AUD_BUF_D_ADDR', '0x65058', '0x180000') ('STREAM_A_LPE_AUD_BUF_D_LENGTH', '0x6505C', '0x180000') ('STREAM_A_LPE_AUD_CNTL_ST', '0x65060', '0x180000') ('STREAM_A_LPE_AUD_HDMI_STATUS', '0x65064', '0x180000') ('STREAM_A_LPE_AUD_HDMIW_INFOFR', '0x65068', '0x180000') intel-gpu-tools-1.14/tools/registers/cherryview0000644000175000017500000000020512665336131016706 00000000000000vlv_pipe_a.txt vlv_pipe_b.txt chv_pipe_c.txt chv_display_base.txt chv_dpio_phy_x2.txt chv_dpio_phy_x1.txt vlv_dsi.txt gen7_other.txt intel-gpu-tools-1.14/tools/registers/skl_powerwells.txt0000644000175000017500000000022212665336131020410 00000000000000('PWR_WELL_BIOS', '0x00045400', '') ('PWR_WELL_DRIVER', '0x00045404', '') ('PWR_WELL_KVM', '0x00045408', '') ('PWR_WELL_DEBUG', '0x0004540c', '') intel-gpu-tools-1.14/tools/registers/vlv_display_base.txt0000644000175000017500000001432412665336131020672 00000000000000('DPFLIPSTAT', '0x70028', '0x180000') ('DPINVGTT', '0x7002C', '0x180000') ('DSPARB', '0x70030', '0x180000') ('DSPARB2', '0x70060', '0x180000') ('DSPHOWM', '0x70064', '0x180000') ('DSPHOWM1', '0x70068', '0x180000') ('FW1', '0x70034', '0x180000') ('FW2', '0x70038', '0x180000') ('FW3', '0x7003C', '0x180000') ('FW4', '0x70070', '0x180000') ('FW5', '0x70074', '0x180000') ('FW6', '0x70078', '0x180000') ('FW7', '0x7007C', '0x180000') ('DDL1', '0x70050', '0x180000') ('DDL2', '0x70054', '0x180000') ('VGACNTRL', '0x71400', '0x180000') ('CBR1', '0x70400', '0x180000') ('CBR2', '0x70404', '0x180000') ('CBR3', '0x7040C', '0x180000') ('CBR4', '0x70450', '0x180000') ('CCBR', '0x70408', '0x180000') ('SWF00', '0x70410', '0x180000') ('SWF01', '0x70414', '0x180000') ('SWF02', '0x70418', '0x180000') ('SWF03', '0x7041C', '0x180000') ('SWF04', '0x70420', '0x180000') ('SWF05', '0x70424', '0x180000') ('SWF06', '0x70428', '0x180000') ('SWF07', '0x7042C', '0x180000') ('SWF08', '0x70430', '0x180000') ('SWF09', '0x70434', '0x180000') ('SWF0A', '0x70438', '0x180000') ('SWF0B', '0x7043C', '0x180000') ('SWF0C', '0x70440', '0x180000') ('SWF0D', '0x70444', '0x180000') ('SWF0E', '0x70448', '0x180000') ('SWF0F', '0x7044C', '0x180000') ('SWF10', '0x71410', '0x180000') ('SWF11', '0x71414', '0x180000') ('SWF12', '0x71418', '0x180000') ('SWF13', '0x7141C', '0x180000') ('SWF14', '0x71420', '0x180000') ('SWF15', '0x71424', '0x180000') ('SWF16', '0x71428', '0x180000') ('SWF17', '0x7142C', '0x180000') ('SWF18', '0x71430', '0x180000') ('SWF19', '0x71434', '0x180000') ('SWF1A', '0x71438', '0x180000') ('SWF1B', '0x7143C', '0x180000') ('SWF1C', '0x71440', '0x180000') ('SWF1D', '0x71444', '0x180000') ('SWF1E', '0x71448', '0x180000') ('SWF1F', '0x7144C', '0x180000') ('SWF30', '0x72414', '0x180000') ('SWF31', '0x72418', '0x180000') ('SWF32', '0x7241C', '0x180000') ('PCSRC', '0x73000', '0x180000') ('PCSTAT', '0x73004', '0x180000') ('PCSRC2', '0x73008', '0x180000') ('PCSTAT2', '0x7300C', '0x180000') ('PFIT_CONTROL', '0x61230', '0x180000') ('PFIT_PGM_RATIOS', '0x61234', '0x180000') ('PFIT_AUTO_RATION', '0x61238', '0x180000') ('PFIT_INIT_PHASE', '0x6123C', '0x180000') ('GPIOCTL_0', '0x5010', '0x180000') ('GPIOCTL_1', '0x5014', '0x180000') ('GPIOCTL_2', '0x5018', '0x180000') ('GPIOCTL_3', '0x501C', '0x180000') ('GPIOCTL_4', '0x5020', '0x180000') ('GMBUS0', '0x5100', '0x180000') ('GMBUS1', '0x5104', '0x180000') ('GMBUS2', '0x5108', '0x180000') ('GMBUS3', '0x510C', '0x180000') ('GMBUS4', '0x5110', '0x180000') ('GMBUS5', '0x5120', '0x180000') ('GMBUS6', '0x5130', '0x180000') ('GMBUS7', '0x5134', '0x180000') ('RAWCLK_FREQ', '0x6024', '0x180000') ('GMBUSFREQ', '0x6510', '0x180000') ('DSPCLK_GATE_D', '0x6200', '0x180000') ('RAMCLK_GATE_D', '0x6210', '0x180000') ('D_STATE', '0x6104', '0x180000') ('DPPSR_CGDIS', '0x6204', '0x180000') ('FW_BLC_SELF', '0x6500', '0x180000') ('MI_ARB', '0x6504', '0x180000') ('CZCLK_CDCLK_FREQ_RATIO', '0x6508', '0x180000') ('GCI_CONTROL', '0x650C', '0x180000') ('ADPA', '0x61100', '0x180000') ('CRTIO_DFX', '0x61104', '0x180000') ('PORT_HOTPLUG_EN', '0x61110', '0x180000') ('PORT_HOTPLUG_STAT', '0x61114', '0x180000') ('HDMIB', '0x61140', '0x180000') ('HDMIC', '0x61160', '0x180000') ('DP2', '0x61154', '0x180000') ('DIGITAL_HPD_CTRL', '0x61164', '0x180000') ('DV_DETERM', '0x61168', '0x180000') ('DP_AUX_CH_AKSV_HI', '0x64130', '0x180000') ('DP_AUX_CH_AKSV_LO', '0x64134', '0x180000') ('DP_B', '0x64100', '0x180000') ('DPB_AUX_CH_CTL', '0x64110', '0x180000') ('DPB_AUX_CH_DATA1', '0x64114', '0x180000') ('DPB_AUX_CH_DATA2', '0x64118', '0x180000') ('DPB_AUX_CH_DATA3', '0x6411C', '0x180000') ('DPB_AUX_CH_DATA4', '0x64120', '0x180000') ('DPB_AUX_CH_DATA5', '0x64124', '0x180000') ('DPB_AUX_TST', '0x64150', '0x180000') ('DP_C', '0x64200', '0x180000') ('DPC_AUX_CH_CTL', '0x64210', '0x180000') ('DPC_AUX_CH_DATA1', '0x64214', '0x180000') ('DPC_AUX_CH_DATA2', '0x64218', '0x180000') ('DPC_AUX_CH_DATA3', '0x6421C', '0x180000') ('DPC_AUX_CH_DATA4', '0x64220', '0x180000') ('DPC_AUX_CH_DATA5', '0x64224', '0x180000') ('DPC_AUX_TST', '0x64228', '0x180000') ('DPIO_BONUS0', '0x64138', '0x180000') ('DPIO_BONUS1', '0x6413C', '0x180000') ('DPIO_BONUS2', '0x64140', '0x180000') ('DPIO_BONUS0_READ_BACK', '0x64144', '0x180000') ('DPIO_BONUS1_READ_BACK', '0x64148', '0x180000') ('DPIO_BONUS2_READ_BACK', '0x6414C', '0x180000') ('DPA_PIX_GEN_CTRL', '0x61198', '0x180000') ('DPA_PROG_PIXEL_DATA_1', '0x6119C', '0x180000') ('DPA_PROG_PIXEL_DATA_2', '0x611A0', '0x180000') ('DPA_PROG_PIXEL_DATA_3', '0x611A4', '0x180000') ('DPA_PROG_PIXEL_DATA_4', '0x611A8', '0x180000') ('DPB_PIX_GEN_CTRL', '0x611B0', '0x180000') ('DPB_PROG_PIXEL_DATA_1', '0x611B4', '0x180000') ('DPB_PROG_PIXEL_DATA_2', '0x611B8', '0x180000') ('DPB_PROG_PIXEL_DATA_3', '0x611BC', '0x180000') ('DPB_PROG_PIXEL_DATA_4', '0x611C0', '0x180000') ('AUD_VID_DID', '0x62020', '0x180000') ('AUD_RID', '0x62024', '0x180000') ('AUD_PWRST', '0x6204C', '0x180000') ('AUD_PORT_EN_HD_CFG', '0x6207C', '0x180000') ('AUD_OUT_CH_STR', '0x62088', '0x180000') ('AUD_PINW_CONNLNG_LIST', '0x620A8', '0x180000') ('AUD_PINW_CONNLNG_SEL', '0x620AC', '0x180000') ('AUD_CNTL_ST2', '0x620C0', '0x180000') ('AUD_HDMIW_STATUS', '0x620D4', '0x180000') ('AUD_SSID_DBG', '0x62F00', '0x180000') ('AUD_PWST1_DBG', '0x62F04', '0x180000') ('AUD_PWST2_DBG', '0x62F14', '0x180000') ('AUD_PORT_EN_B_DBG', '0x62F20', '0x180000') ('AUD_PWST3_DBG', '0x62F24', '0x180000') ('AUD_PORT_EN_C_DBG', '0x62F28', '0x180000') ('AUD_PORT_EN_D_DBG', '0x62F2C', '0x180000') ('AUD_CHICKENBIT', '0x62F38', '0x180000') ('AUD_CNTL_ST_B_DBG', '0x62F60', '0x180000') ('AUD_HDMIW_INFOFR_B_DBG', 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'FLISDSI') ('DSI_MISRDOUT2', '0x001e', 'FLISDSI') ('DSI_RCOMPCTL2', '0x001f', 'FLISDSI') ('DSI_ALL01', '0x0020', 'FLISDSI') ('DSI_DLLCTL3', '0x0021', 'FLISDSI') ('DSI_DATAEYE1', '0x0022', 'FLISDSI') ('DSI_DATAEYE2', '0x0023', 'FLISDSI') ('DSI_DATAEYE3', '0x0024', 'FLISDSI') ('DSI_DATAEYE4', '0x0025', 'FLISDSI') ('DSI_DATAEYE5', '0x0026', 'FLISDSI') intel-gpu-tools-1.14/tools/registers/common_display.txt0000644000175000017500000001541212665336131020360 00000000000000('CPU_VGACNTRL', '0x00041000', '') ('PORT_DBG', '0x00042308', '') ('DIGITAL_PORT_HOTPLUG_CNTRL', '0x00044030', '') ('FDI_PLL_BIOS_0', '0x00046000', '') ('FDI_PLL_BIOS_1', '0x00046004', '') ('FDI_PLL_BIOS_2', '0x00046008', '') ('DISPLAY_PORT_PLL_BIOS_0', '0x0004600c', '') ('DISPLAY_PORT_PLL_BIOS_1', '0x00046010', '') ('DISPLAY_PORT_PLL_BIOS_2', '0x00046014', '') ('FDI_PLL_FREQ_CTL', '0x00046030', '') ('BLC_PWM_CPU_CTL2', '0x00048250', '') ('BLC_PWM_CPU_CTL', '0x00048254', '') ('HTOTAL_A', '0x00060000', '') ('HBLANK_A', '0x00060004', '') ('HSYNC_A', '0x00060008', '') ('VTOTAL_A', '0x0006000c', '') ('VBLANK_A', '0x00060010', '') ('VSYNC_A', '0x00060014', '') ('PIPEASRC', '0x0006001c', '') ('VSYNCSHIFT_A', '0x00060028', '') ('PIPEA_DATA_M1', '0x00060030', '') ('PIPEA_DATA_N1', '0x00060034', '') ('PIPEA_DATA_M2', '0x00060038', '') ('PIPEA_DATA_N2', '0x0006003c', '') ('PIPEA_LINK_M1', '0x00060040', '') ('PIPEA_LINK_N1', '0x00060044', '') ('PIPEA_LINK_M2', '0x00060048', '') ('PIPEA_LINK_N2', '0x0006004c', '') ('FDI_TXA_CTL', '0x00060100', '') ('HTOTAL_B', '0x00061000', '') ('HBLANK_B', '0x00061004', '') ('HSYNC_B', '0x00061008', '') ('VTOTAL_B', '0x0006100c', '') ('VBLANK_B', '0x00061010', '') ('VSYNC_B', '0x00061014', '') ('PIPEBSRC', '0x0006101c', '') ('VSYNCSHIFT_B', '0x00061028', '') ('PIPEB_DATA_M1', '0x00061030', '') ('PIPEB_DATA_N1', '0x00061034', '') ('PIPEB_DATA_M2', '0x00061038', '') ('PIPEB_DATA_N2', '0x0006103c', '') ('PIPEB_LINK_M1', '0x00061040', '') ('PIPEB_LINK_N1', '0x00061044', '') ('PIPEB_LINK_M2', '0x00061048', '') ('PIPEB_LINK_N2', '0x0006104c', '') ('FDI_TXB_CTL', '0x00061100', '') ('HTOTAL_C', '0x00062000', '') ('HBLANK_C', '0x00062004', '') ('HSYNC_C', '0x00062008', '') ('VTOTAL_C', '0x0006200c', '') ('VBLANK_C', '0x00062010', '') ('VSYNC_C', '0x00062014', '') ('PIPECSRC', '0x0006201c', '') ('VSYNCSHIFT_C', '0x00062028', '') ('PIPEC_DATA_M1', '0x00062030', '') ('PIPEC_DATA_N1', '0x00062034', '') ('PIPEC_DATA_M2', '0x00062038', '') ('PIPEC_DATA_N2', '0x0006203c', '') ('PIPEC_LINK_M1', '0x00062040', '') ('PIPEC_LINK_N1', '0x00062044', '') ('PIPEC_LINK_M2', '0x00062048', '') ('PIPEC_LINK_N2', '0x0006204c', '') ('FDI_TXC_CTL', '0x00062100', '') ('CPU_eDP_A', '0x00064000', '') ('PFA_WIN_POS', '0x00068070', '') ('PFA_WIN_SIZE', '0x00068074', '') ('PFA_CTL_1', '0x00068080', '') ('PFA_CTL_2', '0x00068084', '') ('PFA_CTL_3', '0x00068088', '') ('PFA_CTL_4', '0x00068090', '') ('PFB_WIN_POS', '0x00068870', '') ('PFB_WIN_SIZE', '0x00068874', '') ('PFB_CTL_1', '0x00068880', '') ('PFB_CTL_2', '0x00068884', '') ('PFB_CTL_3', '0x00068888', '') ('PFB_CTL_4', '0x00068890', '') ('PFC_WIN_POS', '0x00069070', '') ('PFC_WIN_SIZE', '0x00069074', '') ('PFC_CTL_1', '0x00069080', '') ('PFC_CTL_2', '0x00069084', '') ('PFC_CTL_3', '0x00069088', '') ('PFC_CTL_4', '0x00069090', '') ('PIPEACONF', '0x00070008', '') ('DSPACNTR', '0x00070180', '') ('DSPABASE', '0x00070184', '') ('DSPASTRIDE', '0x00070188', '') ('DSPASURF', '0x0007019c', '') ('DSPATILEOFF', '0x000701a4', '') ('PIPEBCONF', '0x00071008', '') ('DSPBCNTR', '0x00071180', '') ('DSPBBASE', '0x00071184', '') ('DSPBSTRIDE', '0x00071188', '') ('DSPBSURF', '0x0007119c', '') ('DSPBTILEOFF', '0x000711a4', '') ('PIPECCONF', '0x00072008', '') ('DSPCCNTR', '0x00072180', '') ('DSPCBASE', '0x00072184', '') ('DSPCSTRIDE', '0x00072188', '') ('DSPCSURF', '0x0007219c', '') ('DSPCTILEOFF', '0x000721a4', '') ('PCH_DPLL_A', '0x000c6014', '') ('PCH_DPLL_B', '0x000c6018', '') ('PCH_FPA0', '0x000c6040', '') ('PCH_FPA1', '0x000c6044', '') ('PCH_FPB0', '0x000c6048', '') ('PCH_FPB1', '0x000c604c', '') ('PCH_DREF_CONTROL', '0x000c6200', '') ('PCH_RAWCLK_FREQ', '0x000c6204', '') ('PCH_DPLL_TMR_CFG', '0x000c6208', '') ('PCH_SSC4_PARMS', '0x000c6210', '') ('PCH_SSC4_AUX_PARMS', '0x000c6214', '') ('PCH_DPLL_ANALOG_CTL', '0x000c6300', '') ('PCH_DPLL_SEL', '0x000c7000', '') ('PCH_PP_STATUS', '0x000c7200', '') ('PCH_PP_CONTROL', '0x000c7204', '') ('PCH_PP_ON_DELAYS', '0x000c7208', '') ('PCH_PP_OFF_DELAYS', '0x000c720c', '') ('PCH_PP_DIVISOR', '0x000c7210', '') ('BLC_PWM_PCH_CTL1', '0x000c8250', '') ('BLC_PWM_PCH_CTL2', '0x000c8254', '') ('TRANS_HTOTAL_A', '0x000e0000', '') ('TRANS_HBLANK_A', '0x000e0004', '') ('TRANS_HSYNC_A', '0x000e0008', '') ('TRANS_VTOTAL_A', '0x000e000c', '') ('TRANS_VBLANK_A', '0x000e0010', '') ('TRANS_VSYNC_A', '0x000e0014', '') ('TRANS_VSYNCSHIFT_A', '0x000e0028', '') ('TRANSA_DATA_M1', '0x000e0030', '') ('TRANSA_DATA_N1', '0x000e0034', '') ('TRANSA_DATA_M2', '0x000e0038', '') ('TRANSA_DATA_N2', '0x000e003c', '') ('TRANSA_DP_LINK_M1', '0x000e0040', '') ('TRANSA_DP_LINK_N1', '0x000e0044', '') ('TRANSA_DP_LINK_M2', '0x000e0048', '') ('TRANSA_DP_LINK_N2', '0x000e004c', '') ('TRANS_DP_CTL_A', '0x000e0300', '') ('TRANS_HTOTAL_B', '0x000e1000', '') ('TRANS_HBLANK_B', '0x000e1004', '') ('TRANS_HSYNC_B', '0x000e1008', '') ('TRANS_VTOTAL_B', '0x000e100c', '') ('TRANS_VBLANK_B', '0x000e1010', '') ('TRANS_VSYNC_B', '0x000e1014', '') ('TRANS_VSYNCSHIFT_B', '0x000e1028', '') ('TRANSB_DATA_M1', '0x000e1030', '') ('TRANSB_DATA_N1', '0x000e1034', '') ('TRANSB_DATA_M2', '0x000e1038', '') ('TRANSB_DATA_N2', '0x000e103c', '') ('TRANSB_DP_LINK_M1', '0x000e1040', '') ('TRANSB_DP_LINK_N1', '0x000e1044', '') ('TRANSB_DP_LINK_M2', '0x000e1048', '') ('TRANSB_DP_LINK_N2', '0x000e104c', '') ('PCH_ADPA', '0x000e1100', '') ('HDMIB', '0x000e1140', '') ('HDMIC', '0x000e1150', '') ('HDMID', '0x000e1160', '') ('PCH_LVDS', '0x000e1180', '') ('TRANS_DP_CTL_B', '0x000e1300', '') ('TRANS_HTOTAL_C', '0x000e2000', '') ('TRANS_HBLANK_C', '0x000e2004', '') ('TRANS_HSYNC_C', '0x000e2008', '') ('TRANS_VTOTAL_C', '0x000e200c', '') ('TRANS_VBLANK_C', '0x000e2010', '') ('TRANS_VSYNC_C', '0x000e2014', '') ('TRANS_VSYNCSHIFT_C', '0x000e2028', '') ('TRANSC_DATA_M1', '0x000e2030', '') ('TRANSC_DATA_N1', '0x000e2034', '') ('TRANSC_DATA_M2', '0x000e2038', '') ('TRANSC_DATA_N2', '0x000e203c', '') ('TRANSC_DP_LINK_M1', '0x000e2040', '') ('TRANSC_DP_LINK_N1', '0x000e2044', '') ('TRANSC_DP_LINK_M2', '0x000e2048', '') ('TRANSC_DP_LINK_N2', '0x000e204c', '') ('TRANS_DP_CTL_C', '0x000e2300', '') ('PCH_DP_B', '0x000e4100', '') ('PCH_DP_C', '0x000e4200', '') ('PCH_DP_D', '0x000e4300', '') ('TRANSACONF', '0x000f0008', '') ('FDI_RXA_CTL', '0x000f000c', '') ('FDI_RXA_MISC', '0x000f0010', '') ('FDI_RXA_IIR', '0x000f0014', '') ('FDI_RXA_IMR', '0x000f0018', '') ('FDI_RXA_TUSIZE1', '0x000f0030', '') ('FDI_RXA_TUSIZE2', '0x000f0038', '') ('TRANSBCONF', '0x000f1008', '') ('FDI_RXB_CTL', '0x000f100c', '') ('FDI_RXB_MISC', '0x000f1010', '') ('FDI_RXB_IIR', '0x000f1014', '') ('FDI_RXB_IMR', '0x000f1018', '') ('FDI_RXB_TUSIZE1', '0x000f1030', '') ('FDI_RXB_TUSIZE2', '0x000f1038', '') ('TRANSCCONF', '0x000f2008', '') ('FDI_RXC_CTL', '0x000f200c', '') ('FDI_RXC_MISC', '0x000f2010', '') ('FDI_RXC_TUSIZE1', '0x000f2030', '') ('FDI_RXC_TUSIZE2', '0x000f2038', '') ('FDI_PLL_CTL_1', '0x000fe000', '') ('FDI_PLL_CTL_2', '0x000fe004', '') intel-gpu-tools-1.14/tools/registers/gen7_other.txt0000644000175000017500000000015412665336131017401 00000000000000('RCS_MODE_GEN7', '0x0000229c', '') ('VCS_MODE_GEN7', '0x0001229c', '') ('BCS_MODE_GEN7', '0x0002229c', '') intel-gpu-tools-1.14/tools/registers/chv_dpio_phy_x1.txt0000644000175000017500000001635612665336131020436 00000000000000('PLL1_DW0', '0x8000', 'DPIO') ('PLL1_DW1', '0x8004', 'DPIO') ('PLL1_DW2', '0x8008', 'DPIO') ('PLL1_DW3', '0x800C', 'DPIO') ('PLL1_DW4', '0x8010', 'DPIO') ('PLL1_DW5', '0x8014', 'DPIO') ('PLL1_DW6', '0x8018', 'DPIO') ('PLL1_DW7', '0x801C', 'DPIO') ('PLL1_DW8', '0x8020', 'DPIO') ('PLL1_DW9', '0x8024', 'DPIO') ('PLL1_DW10', '0x8028', 'DPIO') ('PLL1_DW11', '0x802C', 'DPIO') ('PLL1_DW12', '0x8030', 'DPIO') ('PLL1_DW13', '0x8034', 'DPIO') ('PLL1_DW14', '0x8038', 'DPIO') ('PLL1_DW15', '0x803C', 'DPIO') ('PLL1_DW16', '0x8040', 'DPIO') ('PLL1_DW17', '0x8044', 'DPIO') ('PLL1_DW18', '0x8048', 'DPIO') ('PLL1_DW19', '0x804C', 'DPIO') ('PLL1_DW20', '0x8050', 'DPIO') ('PLL1_DW21', '0x8054', 'DPIO') ('PLL1_DW22', '0x8058', 'DPIO') ('PLL1_DW23', '0x805C', 'DPIO') ('PLL1_DW24', '0x8060', 'DPIO') ('PLL1_DW25', '0x8064', 'DPIO') ('PLL1_DW26', '0x8068', 'DPIO') ('PLL1_DW27', '0x806C', 'DPIO') ('PLL1_DW28', '0x8070', 'DPIO') ('PLL1_DW29', '0x8074', 'DPIO') ('PLL1_DW30', '0x8078', 'DPIO') ('PLL1_DW31', '0x807C', 'DPIO') ('REF_DW0', '0x80A0', 'DPIO') ('REF_DW1', '0x80A4', 'DPIO') ('REF_DW2', '0x80A8', 'DPIO') ('REF_DW3', '0x80AC', 'DPIO') ('REF_DW4', '0x80B0', 'DPIO') ('REF_DW5', '0x80B4', 'DPIO') ('REF_DW6', '0x80B8', 'DPIO') ('REF_DW7', '0x80BC', 'DPIO') ('REF_DW8', '0x80C0', 'DPIO') ('REF_DW9', '0x80C4', 'DPIO') ('REF_DW10', '0x80C8', 'DPIO') ('REF_DW11', '0x80CC', 'DPIO') ('REF_DW12', '0x80D0', 'DPIO') ('REF_DW13', '0x80D4', 'DPIO') ('REF_DW14', '0x80D8', 'DPIO') ('REF_DW15', '0x80DC', 'DPIO') ('CL1_DW0', '0x8100', 'DPIO') ('CL1_DW1', '0x8104', 'DPIO') ('CL1_DW2', '0x8108', 'DPIO') ('CL1_DW3', '0x810C', 'DPIO') ('CL1_DW4', '0x8110', 'DPIO') ('CL1_DW5', '0x8114', 'DPIO') ('CL1_DW6', '0x8118', 'DPIO') ('CL1_DW7', '0x811C', 'DPIO') ('CL1_DW8', '0x8120', 'DPIO') ('CL1_DW9', '0x8124', 'DPIO') ('CL1_DW10', '0x8128', 'DPIO') ('CL1_DW11', '0x812C', 'DPIO') ('CL1_DW12', '0x8130', 'DPIO') ('CL1_DW13', '0x8134', 'DPIO') ('CL1_DW14', '0x8138', 'DPIO') ('CL1_DW15', '0x813C', 'DPIO') ('CL1_DW16', '0x8140', 'DPIO') ('CL1_DW17', '0x8144', 'DPIO') ('CL1_DW18', '0x8148', 'DPIO') ('CL1_DW19', '0x814C', 'DPIO') ('CL1_DW20', '0x8150', 'DPIO') ('CL1_DW21', '0x8154', 'DPIO') ('CL1_DW22', '0x8158', 'DPIO') ('CL1_DW23', '0x815C', 'DPIO') ('CL1_DW24', '0x8160', 'DPIO') ('CL1_DW25', '0x8164', 'DPIO') ('CL1_DW26', '0x8168', 'DPIO') ('CL1_DW27', '0x816C', 'DPIO') ('CL1_DW28', '0x8170', 'DPIO') ('CL1_DW29', '0x8174', 'DPIO') ('CL1_DW30', '0x8178', 'DPIO') ('CL1_DW31', '0x817C', 'DPIO') ('PCS01_CH0_DW0', '0x0200', 'DPIO') ('PCS01_CH0_DW1', '0x0204', 'DPIO') ('PCS01_CH0_DW2', '0x0208', 'DPIO') ('PCS01_CH0_DW3', '0x020C', 'DPIO') ('PCS01_CH0_DW4', '0x0210', 'DPIO') ('PCS01_CH0_DW5', '0x0214', 'DPIO') ('PCS01_CH0_DW6', '0x0218', 'DPIO') ('PCS01_CH0_DW7', '0x021C', 'DPIO') ('PCS01_CH0_DW8', '0x0220', 'DPIO') ('PCS01_CH0_DW9', '0x0224', 'DPIO') ('PCS01_CH0_DW10', '0x0228', 'DPIO') ('PCS01_CH0_DW11', '0x022C', 'DPIO') ('PCS01_CH0_DW12', '0x0230', 'DPIO') ('PCS01_CH0_DW13', '0x0234', 'DPIO') ('PCS01_CH0_DW14', '0x0238', 'DPIO') ('PCS01_CH0_DW15', '0x023C', 'DPIO') ('PCS01_CH0_DW16', '0x0240', 'DPIO') ('PCS01_CH0_DW17', '0x0244', 'DPIO') ('PCS01_CH0_DW18', '0x0248', 'DPIO') ('PCS01_CH0_DW19', '0x024C', 'DPIO') ('PCS01_CH0_DW20', '0x0250', 'DPIO') ('PCS01_CH0_DW21', '0x0254', 'DPIO') ('PCS01_CH0_DW22', '0x0258', 'DPIO') ('PCS01_CH0_DW23', '0x025C', 'DPIO') ('PCS01_CH0_DW24', '0x0260', 'DPIO') ('PCS01_CH0_DW25', '0x0264', 'DPIO') ('TX0_CH0_DW0', '0x0080', 'DPIO') ('TX0_CH0_DW1', '0x0084', 'DPIO') ('TX0_CH0_DW2', '0x0088', 'DPIO') ('TX0_CH0_DW3', '0x008C', 'DPIO') ('TX0_CH0_DW4', '0x0090', 'DPIO') ('TX0_CH0_DW5', '0x0094', 'DPIO') ('TX0_CH0_DW6', '0x0098', 'DPIO') ('TX0_CH0_DW7', '0x009C', 'DPIO') ('TX0_CH0_DW8', '0x00A0', 'DPIO') ('TX0_CH0_DW9', '0x00A4', 'DPIO') ('TX0_CH0_DW10', '0x00A8', 'DPIO') ('TX0_CH0_DW11', '0x00AC', 'DPIO') ('TX0_CH0_DW12', '0x00B0', 'DPIO') ('TX0_CH0_DW13', '0x00B4', 'DPIO') ('TX0_CH0_DW14', '0x00B8', 'DPIO') ('TX0_CH0_DW15', '0x00BC', 'DPIO') ('TX0_CH0_DW16', '0x00C0', 'DPIO') ('TX0_CH0_DW17', '0x00C4', 'DPIO') ('TX0_CH0_DW18', '0x00C8', 'DPIO') ('TX0_CH0_DW19', '0x00CC', 'DPIO') ('TX0_CH0_DW20', '0x00D0', 'DPIO') ('TX1_CH0_DW0', '0x0280', 'DPIO') ('TX1_CH0_DW1', '0x0284', 'DPIO') ('TX1_CH0_DW2', '0x0288', 'DPIO') ('TX1_CH0_DW3', '0x028C', 'DPIO') ('TX1_CH0_DW4', '0x0290', 'DPIO') ('TX1_CH0_DW5', '0x0294', 'DPIO') ('TX1_CH0_DW6', '0x0298', 'DPIO') ('TX1_CH0_DW7', '0x029C', 'DPIO') ('TX1_CH0_DW8', '0x02A0', 'DPIO') ('TX1_CH0_DW9', '0x02A4', 'DPIO') ('TX1_CH0_DW10', '0x02A8', 'DPIO') ('TX1_CH0_DW11', '0x02AC', 'DPIO') ('TX1_CH0_DW12', '0x02B0', 'DPIO') ('TX1_CH0_DW13', '0x02B4', 'DPIO') ('TX1_CH0_DW14', '0x02B8', 'DPIO') ('TX1_CH0_DW15', '0x02BC', 'DPIO') ('TX1_CH0_DW16', '0x02C0', 'DPIO') ('TX1_CH0_DW17', '0x02C4', 'DPIO') ('TX1_CH0_DW18', '0x02C8', 'DPIO') ('TX1_CH0_DW19', '0x02CC', 'DPIO') ('TX1_CH0_DW20', '0x02D0', 'DPIO') ('PCS23_CH0_DW0', '0x0400', 'DPIO') ('PCS23_CH0_DW1', '0x0404', 'DPIO') ('PCS23_CH0_DW2', '0x0408', 'DPIO') ('PCS23_CH0_DW3', '0x040C', 'DPIO') ('PCS23_CH0_DW4', '0x0410', 'DPIO') ('PCS23_CH0_DW5', '0x0414', 'DPIO') ('PCS23_CH0_DW6', '0x0418', 'DPIO') ('PCS23_CH0_DW7', '0x041C', 'DPIO') ('PCS23_CH0_DW8', '0x0420', 'DPIO') ('PCS23_CH0_DW9', '0x0424', 'DPIO') ('PCS23_CH0_DW10', '0x0428', 'DPIO') ('PCS23_CH0_DW11', '0x042C', 'DPIO') ('PCS23_CH0_DW12', '0x0430', 'DPIO') ('PCS23_CH0_DW13', '0x0434', 'DPIO') ('PCS23_CH0_DW14', '0x0438', 'DPIO') ('PCS23_CH0_DW15', '0x043C', 'DPIO') ('PCS23_CH0_DW16', '0x0440', 'DPIO') ('PCS23_CH0_DW17', '0x0444', 'DPIO') ('PCS23_CH0_DW18', '0x0448', 'DPIO') ('PCS23_CH0_DW19', '0x044C', 'DPIO') ('PCS23_CH0_DW20', '0x0450', 'DPIO') ('PCS23_CH0_DW21', '0x0454', 'DPIO') ('PCS23_CH0_DW22', '0x0458', 'DPIO') ('PCS23_CH0_DW23', '0x045C', 'DPIO') ('PCS23_CH0_DW24', '0x0460', 'DPIO') ('PCS23_CH0_DW25', '0x0464', 'DPIO') ('TX2_CH0_DW0', '0x0480', 'DPIO') ('TX2_CH0_DW1', '0x0484', 'DPIO') ('TX2_CH0_DW2', '0x0488', 'DPIO') ('TX2_CH0_DW3', '0x048C', 'DPIO') ('TX2_CH0_DW4', '0x0490', 'DPIO') ('TX2_CH0_DW5', '0x0494', 'DPIO') ('TX2_CH0_DW6', '0x0498', 'DPIO') ('TX2_CH0_DW7', '0x049C', 'DPIO') ('TX2_CH0_DW8', '0x04A0', 'DPIO') ('TX2_CH0_DW9', '0x04A4', 'DPIO') ('TX2_CH0_DW10', '0x04A8', 'DPIO') ('TX2_CH0_DW11', '0x04AC', 'DPIO') ('TX2_CH0_DW12', '0x04B0', 'DPIO') ('TX2_CH0_DW13', '0x04B4', 'DPIO') ('TX2_CH0_DW14', '0x04B8', 'DPIO') ('TX2_CH0_DW15', '0x04BC', 'DPIO') ('TX2_CH0_DW16', '0x04C0', 'DPIO') ('TX2_CH0_DW17', '0x04C4', 'DPIO') ('TX2_CH0_DW18', '0x04C8', 'DPIO') ('TX2_CH0_DW19', '0x04CC', 'DPIO') ('TX2_CH0_DW20', '0x04D0', 'DPIO') ('TX3_CH0_DW0', '0x0680', 'DPIO') ('TX3_CH0_DW1', '0x0684', 'DPIO') ('TX3_CH0_DW2', '0x0688', 'DPIO') ('TX3_CH0_DW3', '0x068C', 'DPIO') ('TX3_CH0_DW4', '0x0690', 'DPIO') ('TX3_CH0_DW5', '0x0694', 'DPIO') ('TX3_CH0_DW6', '0x0698', 'DPIO') ('TX3_CH0_DW7', '0x069C', 'DPIO') ('TX3_CH0_DW8', '0x06A0', 'DPIO') ('TX3_CH0_DW9', '0x06A4', 'DPIO') ('TX3_CH0_DW10', '0x06A8', 'DPIO') ('TX3_CH0_DW11', '0x06AC', 'DPIO') ('TX3_CH0_DW12', '0x06B0', 'DPIO') ('TX3_CH0_DW13', '0x06B4', 'DPIO') ('TX3_CH0_DW14', '0x06B8', 'DPIO') ('TX3_CH0_DW15', '0x06BC', 'DPIO') ('TX3_CH0_DW16', '0x06C0', 'DPIO') ('TX3_CH0_DW17', '0x06C4', 'DPIO') ('TX3_CH0_DW18', '0x06C8', 'DPIO') ('TX3_CH0_DW19', '0x06CC', 'DPIO') ('TX3_CH0_DW20', '0x06D0', 'DPIO') intel-gpu-tools-1.14/tools/registers/vlv_dpio_phy.txt0000644000175000017500000001515612665336131020052 00000000000000('PLL1_DW0', '0x8000', 'DPIO') ('PLL1_DW1', '0x8004', 'DPIO') ('PLL1_DW2', '0x8008', 'DPIO') ('PLL1_DW3', '0x800C', 'DPIO') ('PLL1_DW4', '0x8010', 'DPIO') ('PLL1_DW5', '0x8014', 'DPIO') ('PLL1_DW6', '0x8018', 'DPIO') ('PLL1_DW7', '0x801C', 'DPIO') ('PLL2_DW0', '0x8020', 'DPIO') ('PLL2_DW1', '0x8024', 'DPIO') ('PLL2_DW2', '0x8028', 'DPIO') ('PLL2_DW3', '0x802C', 'DPIO') ('PLL2_DW4', '0x8030', 'DPIO') ('PLL2_DW5', '0x8034', 'DPIO') ('PLL2_DW6', '0x8038', 'DPIO') ('PLL2_DW7', '0x803C', 'DPIO') ('PLL1_EXT_DW0', '0x8040', 'DPIO') ('PLL1_EXT_DW1', '0x8044', 'DPIO') ('PLL1_EXT_DW2', '0x8048', 'DPIO') ('PLL1_EXT_DW3', '0x804C', 'DPIO') ('PLL1_EXT_DW4', '0x8050', 'DPIO') ('PLL1_EXT_DW5', '0x8054', 'DPIO') ('PLL1_EXT_DW6', '0x8058', 'DPIO') ('PLL1_EXT_DW7', '0x805C', 'DPIO') ('PLL2_EXT_DW0', '0x8060', 'DPIO') ('PLL2_EXT_DW1', '0x8064', 'DPIO') ('PLL2_EXT_DW2', '0x8068', 'DPIO') ('PLL2_EXT_DW3', '0x806C', 'DPIO') ('PLL2_EXT_DW4', '0x8070', 'DPIO') ('PLL2_EXT_DW5', '0x8074', 'DPIO') ('PLL2_EXT_DW6', '0x8078', 'DPIO') ('PLL2_EXT_DW7', '0x807C', 'DPIO') ('REF_DW0', '0x80A0', 'DPIO') ('REF_DW1', '0x80A4', 'DPIO') ('REF_DW2', '0x80A8', 'DPIO') ('REF_DW3', '0x80AC', 'DPIO') ('REF_DW4', '0x80B0', 'DPIO') ('REF_DW5', '0x80B4', 'DPIO') ('REF_DW6', '0x80B8', 'DPIO') ('REF_DW7', '0x80BC', 'DPIO') ('REF_DW8', '0x80C0', 'DPIO') ('REF_DW9', '0x80C4', 'DPIO') ('REF_DW10', '0x80C8', 'DPIO') ('REF_DW11', '0x80CC', 'DPIO') ('REF_DW12', '0x80D0', 'DPIO') ('REF_DW13', '0x80D4', 'DPIO') ('REF_DW14', '0x80D8', 'DPIO') ('REF_DW15', '0x80DC', 'DPIO') ('CL_DW0', '0x8100', 'DPIO') ('CL_DW1', '0x8104', 'DPIO') ('CL_DW2', '0x8108', 'DPIO') ('CL_DW3', '0x810C', 'DPIO') ('CL_DW4', '0x8110', 'DPIO') ('CL_DW5', '0x8114', 'DPIO') ('CL_DW6', '0x8118', 'DPIO') ('CL_DW7', '0x811C', 'DPIO') ('CL_DW8', '0x8120', 'DPIO') ('CL_DW9', '0x8124', 'DPIO') ('CL_DW10', '0x8128', 'DPIO') ('CL_DW11', '0x812C', 'DPIO') ('CL_DW12', '0x8130', 'DPIO') ('CL_DW13', '0x8134', 'DPIO') ('CL_DW14', '0x8138', 'DPIO') ('CL_DW15', '0x813C', 'DPIO') ('CL_DW16', '0x8140', 'DPIO') ('CL_DW17', '0x8144', 'DPIO') ('CL_DW18', '0x8148', 'DPIO') ('CL_DW19', '0x814C', 'DPIO') ('CL_DW20', '0x8150', 'DPIO') ('CL_DW21', '0x8154', 'DPIO') ('CL_DW22', '0x8158', 'DPIO') ('CL_DW23', '0x815C', 'DPIO') ('CL_DW24', '0x8160', 'DPIO') ('CL_DW25', '0x8164', 'DPIO') ('CL_DW26', '0x8168', 'DPIO') ('CL_DW27', '0x816C', 'DPIO') ('CL_DW28', '0x8170', 'DPIO') ('CL_DW29', '0x8174', 'DPIO') ('CL_DW30', '0x8178', 'DPIO') ('CL_DW31', '0x817C', 'DPIO') ('PCS01_CH0_DW0', '0x0200', 'DPIO') ('PCS01_CH0_DW1', '0x0204', 'DPIO') ('PCS01_CH0_DW2', '0x0208', 'DPIO') ('PCS01_CH0_DW3', '0x020C', 'DPIO') ('PCS01_CH0_DW4', '0x0210', 'DPIO') ('PCS01_CH0_DW5', '0x0214', 'DPIO') ('PCS01_CH0_DW6', '0x0218', 'DPIO') ('PCS01_CH0_DW7', '0x021C', 'DPIO') ('PCS01_CH0_DW8', '0x0220', 'DPIO') ('PCS01_CH0_DW9', '0x0224', 'DPIO') ('PCS01_CH0_DW10', '0x0228', 'DPIO') ('PCS01_CH0_DW11', '0x022C', 'DPIO') ('PCS01_CH0_DW12', '0x0230', 'DPIO') ('PCS01_CH0_DW13', '0x0234', 'DPIO') ('PCS01_CH0_DW14', '0x0238', 'DPIO') ('PCS01_CH0_DW15', '0x023C', 'DPIO') ('PCS01_CH0_DW16', '0x0240', 'DPIO') ('PCS01_CH0_DW17', '0x0244', 'DPIO') ('PCS01_CH0_DW18', '0x0248', 'DPIO') ('PCS01_CH0_DW19', '0x024C', 'DPIO') ('PCS01_CH0_DW20', '0x0250', 'DPIO') ('PCS01_CH0_DW21', '0x0254', 'DPIO') ('PCS01_CH0_DW22', '0x0258', 'DPIO') ('PCS01_CH0_DW23', '0x025C', 'DPIO') ('PCS01_CH0_DW24', '0x0260', 'DPIO') ('TX0_CH0_DW0', '0x0080', 'DPIO') ('TX0_CH0_DW1', '0x0084', 'DPIO') ('TX0_CH0_DW2', '0x0088', 'DPIO') ('TX0_CH0_DW3', '0x008C', 'DPIO') ('TX0_CH0_DW4', '0x0090', 'DPIO') ('TX0_CH0_DW5', '0x0094', 'DPIO') ('TX0_CH0_DW6', '0x0098', 'DPIO') ('TX0_CH0_DW7', '0x009C', 'DPIO') ('TX0_CH0_DW8', '0x00A0', 'DPIO') ('TX0_CH0_DW9', '0x00A4', 'DPIO') ('TX0_CH0_DW10', '0x00A8', 'DPIO') ('TX0_CH0_DW11', '0x00AC', 'DPIO') ('TX0_CH0_DW12', '0x00B0', 'DPIO') ('TX0_CH0_DW13', '0x00B4', 'DPIO') ('TX0_CH0_DW14', '0x00B8', 'DPIO') ('TX0_CH0_DW15', '0x00BC', 'DPIO') ('TX0_CH0_DW16', '0x00C0', 'DPIO') ('TX1_CH0_DW0', '0x0280', 'DPIO') ('TX1_CH0_DW1', '0x0284', 'DPIO') ('TX1_CH0_DW2', '0x0288', 'DPIO') ('TX1_CH0_DW3', '0x028C', 'DPIO') ('TX1_CH0_DW4', '0x0290', 'DPIO') ('TX1_CH0_DW5', '0x0294', 'DPIO') ('TX1_CH0_DW6', '0x0298', 'DPIO') ('TX1_CH0_DW7', '0x029C', 'DPIO') ('TX1_CH0_DW8', '0x02A0', 'DPIO') ('TX1_CH0_DW9', '0x02A4', 'DPIO') ('TX1_CH0_DW10', '0x02A8', 'DPIO') ('TX1_CH0_DW11', '0x02AC', 'DPIO') ('TX1_CH0_DW12', '0x02B0', 'DPIO') ('TX1_CH0_DW13', '0x02B4', 'DPIO') ('TX1_CH0_DW14', '0x02B8', 'DPIO') ('TX1_CH0_DW15', '0x02BC', 'DPIO') ('TX1_CH0_DW16', '0x02C0', 'DPIO') ('PCS23_CH0_DW0', '0x0400', 'DPIO') ('PCS23_CH0_DW1', '0x0404', 'DPIO') ('PCS23_CH0_DW2', '0x0408', 'DPIO') ('PCS23_CH0_DW3', '0x040C', 'DPIO') ('PCS23_CH0_DW4', '0x0410', 'DPIO') ('PCS23_CH0_DW5', '0x0414', 'DPIO') ('PCS23_CH0_DW6', '0x0418', 'DPIO') ('PCS23_CH0_DW7', '0x041C', 'DPIO') ('PCS23_CH0_DW8', '0x0420', 'DPIO') ('PCS23_CH0_DW9', '0x0424', 'DPIO') ('PCS23_CH0_DW10', '0x0428', 'DPIO') ('PCS23_CH0_DW11', '0x042C', 'DPIO') ('PCS23_CH0_DW12', '0x0430', 'DPIO') ('PCS23_CH0_DW13', '0x0434', 'DPIO') ('PCS23_CH0_DW14', '0x0438', 'DPIO') ('PCS23_CH0_DW15', '0x043C', 'DPIO') ('PCS23_CH0_DW16', '0x0440', 'DPIO') ('PCS23_CH0_DW17', '0x0444', 'DPIO') ('PCS23_CH0_DW18', '0x0448', 'DPIO') ('PCS23_CH0_DW19', '0x044C', 'DPIO') ('PCS23_CH0_DW20', '0x0450', 'DPIO') ('PCS23_CH0_DW21', '0x0454', 'DPIO') ('PCS23_CH0_DW22', '0x0458', 'DPIO') ('PCS23_CH0_DW23', '0x045C', 'DPIO') ('PCS23_CH0_DW24', '0x0460', 'DPIO') ('TX2_CH0_DW0', '0x0480', 'DPIO') ('TX2_CH0_DW1', '0x0484', 'DPIO') ('TX2_CH0_DW2', '0x0488', 'DPIO') ('TX2_CH0_DW3', '0x048C', 'DPIO') ('TX2_CH0_DW4', '0x0490', 'DPIO') ('TX2_CH0_DW5', '0x0494', 'DPIO') ('TX2_CH0_DW6', '0x0498', 'DPIO') ('TX2_CH0_DW7', '0x049C', 'DPIO') ('TX2_CH0_DW8', '0x04A0', 'DPIO') ('TX2_CH0_DW9', '0x04A4', 'DPIO') ('TX2_CH0_DW10', '0x04A8', 'DPIO') ('TX2_CH0_DW11', '0x04AC', 'DPIO') ('TX2_CH0_DW12', '0x04B0', 'DPIO') ('TX2_CH0_DW13', '0x04B4', 'DPIO') ('TX2_CH0_DW14', '0x04B8', 'DPIO') ('TX2_CH0_DW15', '0x04BC', 'DPIO') ('TX2_CH0_DW16', '0x04C0', 'DPIO') ('TX3_CH0_DW0', '0x0680', 'DPIO') ('TX3_CH0_DW1', '0x0684', 'DPIO') ('TX3_CH0_DW2', '0x0688', 'DPIO') ('TX3_CH0_DW3', '0x068C', 'DPIO') ('TX3_CH0_DW4', '0x0690', 'DPIO') ('TX3_CH0_DW5', '0x0694', 'DPIO') ('TX3_CH0_DW6', '0x0698', 'DPIO') ('TX3_CH0_DW7', '0x069C', 'DPIO') ('TX3_CH0_DW8', '0x06A0', 'DPIO') ('TX3_CH0_DW9', '0x06A4', 'DPIO') ('TX3_CH0_DW10', '0x06A8', 'DPIO') ('TX3_CH0_DW11', '0x06AC', 'DPIO') ('TX3_CH0_DW12', '0x06B0', 'DPIO') ('TX3_CH0_DW13', '0x06B4', 'DPIO') ('TX3_CH0_DW14', '0x06B8', 'DPIO') ('TX3_CH0_DW15', '0x06BC', 'DPIO') ('TX3_CH0_DW16', '0x06C0', 'DPIO') intel-gpu-tools-1.14/tools/registers/haswell0000644000175000017500000000015712665336131016164 00000000000000common_display.txt gen7_other.txt haswell_other.txt audio_config_haswell_plus.txt audio_debug_haswell_plus.txt intel-gpu-tools-1.14/tools/registers/chv_display_base.txt0000644000175000017500000001664412665336131020652 00000000000000('DPFLIPSTAT', '0x70028', '0x180000') ('DPINVGTT', '0x7002C', '0x180000') ('DSPARB', '0x70030', '0x180000') ('DSPARB2', '0x70060', '0x180000') ('DSPARB3', '0x7006C', '0x180000') ('DSPHOWM', '0x70064', '0x180000') ('DSPHOWM1', '0x70068', '0x180000') ('FW1', '0x70034', '0x180000') ('FW2', '0x70038', '0x180000') ('FW3', '0x7003C', '0x180000') ('FW4', '0x70070', '0x180000') ('FW5', '0x70074', '0x180000') ('FW6', '0x70078', '0x180000') ('FW7', '0x7007C', '0x180000') ('FW8', '0x700B8', '0x180000') ('FW9', '0x700BC', '0x180000') ('DDL1', '0x70050', '0x180000') ('DDL2', '0x70054', '0x180000') ('DDL3', '0x70058', '0x180000') ('VGACNTRL', '0x71400', '0x180000') ('CBR1', '0x70400', '0x180000') ('CBR2', '0x70404', '0x180000') ('CBR3', '0x7040C', '0x180000') ('CBR4', '0x70450', '0x180000') ('CCBR', '0x70408', '0x180000') ('SWF00', '0x70410', '0x180000') ('SWF01', '0x70414', '0x180000') ('SWF02', '0x70418', '0x180000') ('SWF03', '0x7041C', '0x180000') ('SWF04', '0x70420', '0x180000') ('SWF05', '0x70424', '0x180000') ('SWF06', '0x70428', '0x180000') ('SWF07', '0x7042C', '0x180000') ('SWF08', '0x70430', '0x180000') ('SWF09', '0x70434', '0x180000') ('SWF0A', '0x70438', '0x180000') ('SWF0B', '0x7043C', '0x180000') ('SWF0C', '0x70440', '0x180000') ('SWF0D', '0x70444', '0x180000') ('SWF0E', '0x70448', '0x180000') ('SWF0F', '0x7044C', '0x180000') ('SWF10', '0x71410', '0x180000') ('SWF11', '0x71414', '0x180000') ('SWF12', '0x71418', '0x180000') ('SWF13', '0x7141C', '0x180000') ('SWF14', '0x71420', '0x180000') ('SWF15', '0x71424', '0x180000') ('SWF16', '0x71428', '0x180000') ('SWF17', '0x7142C', '0x180000') ('SWF18', '0x71430', '0x180000') ('SWF19', '0x71434', '0x180000') ('SWF1A', '0x71438', '0x180000') ('SWF1B', '0x7143C', '0x180000') ('SWF1C', '0x71440', '0x180000') ('SWF1D', '0x71444', '0x180000') ('SWF1E', '0x71448', '0x180000') ('SWF1F', '0x7144C', '0x180000') ('SWF30', '0x72414', '0x180000') ('SWF31', '0x72418', '0x180000') ('SWF32', '0x7241C', '0x180000') ('PCSRC', '0x73000', '0x180000') ('PCSTAT', '0x73004', '0x180000') ('PCSRC2', '0x73008', '0x180000') ('PCSTAT2', '0x7300C', '0x180000') ('PCSRC3', '0x73010', '0x180000') ('PCSTAT3', '0x73014', '0x180000') ('PFIT_CONTROL', '0x61230', '0x180000') ('PFIT_PGM_RATIOS', '0x61234', '0x180000') ('PFIT_AUTO_RATION', '0x61238', '0x180000') ('PFIT_INIT_PHASE', '0x6123C', '0x180000') ('GPIOCTL_0', '0x5010', '0x180000') ('GPIOCTL_1', '0x5014', '0x180000') ('GPIOCTL_2', '0x5018', '0x180000') ('GPIOCTL_3', '0x501C', '0x180000') ('GPIOCTL_4', '0x5020', '0x180000') ('GMBUS0', '0x5100', '0x180000') ('GMBUS1', '0x5104', '0x180000') ('GMBUS2', '0x5108', '0x180000') ('GMBUS3', '0x510C', '0x180000') ('GMBUS4', '0x5110', '0x180000') ('GMBUS5', '0x5120', '0x180000') ('GMBUS6', '0x5130', '0x180000') ('GMBUS7', '0x5134', '0x180000') ('RAWCLK_FREQ', '0x6024', '0x180000') ('GMBUSFREQ', '0x6510', '0x180000') ('DSPCLK_GATE_D', '0x6200', '0x180000') ('DSPCLK1_GATE_D', '0x6034', '0x180000') ('RAMCLK_GATE_D', '0x6210', '0x180000') ('D_STATE', '0x6104', '0x180000') ('DPPSR_CGDIS', '0x6204', '0x180000') ('DPPSR1_CGDIS', '0x6220', '0x180000') ('FW_BLC_SELF', '0x6500', '0x180000') ('MI_ARB', '0x6504', '0x180000') ('CZCLK_CDCLK_FREQ_RATIO', '0x6508', '0x180000') ('GCI_CONTROL', '0x650C', '0x180000') ('DOT_MIPI', '0x6038', '0x180000') ('PORT_HOTPLUG_EN', '0x61110', '0x180000') ('PORT_HOTPLUG_STAT', '0x61114', '0x180000') ('HPD_LONG_VALUE', '0x61120', '0x180000') ('HPD_FILTER_VALUE', '0x61124', '0x180000') ('HDMIB', '0x61140', '0x180000') ('HDMIC', '0x61160', '0x180000') ('HDMID', '0x6116C', '0x180000') ('DP2', '0x61154', '0x180000') ('DIGITAL_HPD_CTRL', '0x61164', '0x180000') ('DV_DETERM', '0x61168', '0x180000') ('DP_AUX_CH_AKSV_HI', '0x64130', '0x180000') ('DP_AUX_CH_AKSV_LO', '0x64134', '0x180000') ('DP_B', '0x64100', '0x180000') ('DPB_AUX_CH_CTL', '0x64110', '0x180000') ('DPB_AUX_CH_DATA1', '0x64114', '0x180000') ('DPB_AUX_CH_DATA2', '0x64118', '0x180000') ('DPB_AUX_CH_DATA3', '0x6411C', '0x180000') ('DPB_AUX_CH_DATA4', '0x64120', '0x180000') ('DPB_AUX_CH_DATA5', '0x64124', '0x180000') ('DPB_AUX_TST', '0x64150', '0x180000') ('DP_C', '0x64200', '0x180000') ('DPC_AUX_CH_CTL', '0x64210', '0x180000') ('DPC_AUX_CH_DATA1', '0x64214', '0x180000') ('DPC_AUX_CH_DATA2', '0x64218', '0x180000') ('DPC_AUX_CH_DATA3', '0x6421C', '0x180000') ('DPC_AUX_CH_DATA4', '0x64220', '0x180000') ('DPC_AUX_CH_DATA5', '0x64224', '0x180000') ('DPC_AUX_TST', '0x64228', '0x180000') ('DP_D', '0x64300', '0x180000') ('DPD_AUX_CH_CTL', '0x64310', '0x180000') ('DPD_AUX_CH_DATA1', '0x64314', '0x180000') ('DPD_AUX_CH_DATA2', '0x64318', '0x180000') ('DPD_AUX_CH_DATA3', '0x6431C', '0x180000') ('DPD_AUX_CH_DATA4', '0x64320', '0x180000') ('DPD_AUX_CH_DATA5', '0x64324', '0x180000') ('DPD_AUX_TST', '0x64328', '0x180000') ('DPIO_PHY_CONTROL', '0x60100', '0x180000') ('DPIO_PHY_GPIO_DATA', '0x60108', '0x180000') ('DPIO_PHY_STATUS', '0x6240', '0x180000') ('DPIO_PHY_STATUS1', '0x60104', '0x180000') ('DPIO_PHY_STATUS2', '0x6010C', '0x180000') ('DPIO_BONUS0', '0x64138', '0x180000') ('DPIO_BONUS1', '0x6413C', '0x180000') ('DPIO_BONUS2', '0x64140', '0x180000') ('DPIO_BONUS0_READ_BACK', '0x64144', '0x180000') ('DPIO_BONUS1_READ_BACK', '0x64148', '0x180000') ('DPIO_BONUS2_READ_BACK', '0x6414C', '0x180000') ('DPA_PIX_GEN_CTRL', '0x61198', '0x180000') ('DPA_PROG_PIXEL_DATA_1', '0x6119C', '0x180000') ('DPA_PROG_PIXEL_DATA_2', '0x611A0', '0x180000') ('DPA_PROG_PIXEL_DATA_3', '0x611A4', '0x180000') ('DPA_PROG_PIXEL_DATA_4', '0x611A8', '0x180000') ('DPB_PIX_GEN_CTRL', '0x611B0', '0x180000') ('DPB_PROG_PIXEL_DATA_1', '0x611B4', '0x180000') ('DPB_PROG_PIXEL_DATA_2', '0x611B8', '0x180000') ('DPB_PROG_PIXEL_DATA_3', '0x611BC', '0x180000') ('DPB_PROG_PIXEL_DATA_4', '0x611C0', '0x180000') ('DPC_PIX_GEN_CTRL', '0x611D0', '0x180000') ('DPC_PROG_PIXEL_DATA_1', '0x611D4', '0x180000') ('DPC_PROG_PIXEL_DATA_2', '0x611D8', '0x180000') ('DPC_PROG_PIXEL_DATA_3', '0x611DC', '0x180000') ('DPC_PROG_PIXEL_DATA_4', '0x611E0', '0x180000') ('AUD_VID_DID', '0x62020', '0x180000') ('AUD_RID', '0x62024', '0x180000') ('AUD_PWRST', '0x6204C', '0x180000') ('AUD_PORT_EN_HD_CFG', '0x6207C', '0x180000') ('AUD_OUT_CH_STR', '0x62088', '0x180000') ('AUD_PINW_CONNLNG_LIST', '0x620A8', '0x180000') ('AUD_PINW_CONNLNG_SEL', '0x620AC', '0x180000') ('AUD_CNTL_ST2', '0x620C0', '0x180000') ('AUD_HDMIW_STATUS', '0x620D4', '0x180000') ('AUD_SSID_DBG', '0x62F00', '0x180000') ('AUD_PWST1_DBG', '0x62F04', '0x180000') ('AUD_PWST2_DBG', '0x62F14', '0x180000') ('AUD_PORT_EN_B_DBG', '0x62F20', '0x180000') ('AUD_PWST3_DBG', '0x62F24', '0x180000') ('AUD_PORT_EN_C_DBG', '0x62F28', '0x180000') ('AUD_PORT_EN_D_DBG', '0x62F2C', '0x180000') ('AUD_CHICKENBIT', '0x62F38', '0x180000') ('AUD_CNTL_ST_B_DBG', '0x62F60', '0x180000') ('AUD_HDMIW_INFOFR_B_DBG', '0x62F64', '0x180000') ('AUD_CNTL_ST_C_DBG', '0x62F70', '0x180000') ('AUD_HDMIW_INFOFR_C_DBG', '0x62F74', '0x180000') ('AUD_CNTL_ST_D_DBG', '0x62F80', '0x180000') ('AUD_HDMIW_INFOFR_D_DBG', '0x62F84', '0x180000') ('AUD_CONFIG_DEFAULT2_REG_PORTB', '0x62F88', '0x180000') ('AUD_CONFIG_DEFAULT2_REG_PORTC', '0x62F8C', '0x180000') ('AUD_CONFIG_DEFAULT2_REG_PORTD', '0x62F90', '0x180000') ('AUD_MCTSA', '0x62F94', '0x180000') ('AUD_MCTSB', '0x62F98', '0x180000') ('AUD_MCTSC', '0x62F9C', '0x180000') intel-gpu-tools-1.14/tools/registers/haswell_other.txt0000644000175000017500000000135112665336131020200 00000000000000('VECS_MODE_GEN7', '0x0001a29c', '') ('HSW_FUSE_STRAP', '0x00042014', '') ('HSW_PWR_WELL_BIOS', '0x00045400', '') ('HSW_PWR_WELL_DRIVER', '0x00045404', '') ('HSW_PWR_WELL_KVMR', '0x00045408', '') ('HSW_PWR_WELL_DEBUG', '0x0004540c', '') ('HSW_PWR_WELL_CTL5', '0x00045410', '') ('HSW_PWR_WELL_CTL6', '0x00045414', '') # Watermarks ('WM_PIPE_A', '0x45100', '') ('WM_LINETIME_A', '0x45270', '') ('WM_PIPE_B', '0x45104', '') ('WM_LINETIME_B', '0x45274', '') ('WM_PIPE_C', '0x45200', '') ('WM_LINETIME_C', '0x45278', '') ('WM_LP_1', '0x45108', '') ('WM_LP_2', '0x4510c', '') ('WM_LP_3', '0x45110', '') ('WM_LP_SPR_1', '0x45120', '') ('WM_LP_SPR_2', '0x45124', '') ('WM_LP_SPR_3', '0x45128', '') ('WM_MISC', '0x45260', '') ('WM_DBG', '0x45280', '') intel-gpu-tools-1.14/tools/registers/chv_pipe_c.txt0000644000175000017500000001471312665336131017445 00000000000000('PIPEC_DSL', '0x74000', '0x180000') ('PIPEC_SLC', '0x74004', '0x180000') ('PIPECCONF', '0x74008', '0x180000') ('PIPECGCMAXRED', '0x74010', '0x180000') ('PIPECGCMAXGREEN', '0x74014', '0x180000') ('PIPECGCMAXBLUE', '0x74018', '0x180000') ('PIPECSTAT', '0x74024', '0x180000') ('PIPECFRAMECOUNT', '0x74040', '0x180000') ('PIPECFLIPCOUNT', '0x74044', '0x180000') ('PIPECMSAMISC', '0x74048', '0x180000') ('DSPCADDR', '0x7417C', '0x180000') ('DSPCCNTR', '0x74180', '0x180000') ('DSPCLINOFF', '0x74184', '0x180000') ('DSPCSTRIDE', '0x74188', '0x180000') ('DSPCKEYVAL', '0x74194', '0x180000') ('DSPCKEYMSK', '0x74198', '0x180000') ('DSPCSURF', '0x7419C', '0x180000') ('DSPCTILEOFF', '0x741A4', '0x180000') ('DSPCSURFLIVE', '0x741AC', '0x180000') ('DSPCFLPQSTAT', '0x74200', '0x180000') ('CURCCNTR', '0x700E0', '0x180000') ('CURCBASE', '0x700E4', '0x180000') ('CURCPOS', '0x700E8', '0x180000') ('CURCRESV', '0x700EC', '0x180000') ('CURCPALET0', '0x700F0', '0x180000') ('CURCPALET1', '0x700F4', '0x180000') ('CURCPALET2', '0x700F8', '0x180000') ('CURCPALET3', '0x700FC', '0x180000') ('CURCLIVEBASE', '0x700B0', '0x180000') ('SPECNTR', '0x72580', '0x180000') ('SPELINOFF', '0x72584', '0x180000') ('SPESTRIDE', '0x72588', '0x180000') ('SPEPOS', '0x7258C', '0x180000') ('SPESIZE', '0x72590', '0x180000') ('SPEKEYMINVAL', '0x72594', '0x180000') ('SPEKEYMSK', '0x72598', '0x180000') ('SPESURF', '0x7259C', '0x180000') ('SPEKEYMAXVAL', '0x725A0', '0x180000') ('SPETILEOFF', '0x725A4', '0x180000') ('SPECONTALPHA', '0x725A8', '0x180000') ('SPELIVESURF', '0x725AC', '0x180000') ('SPECLRC0', '0x725D0', '0x180000') ('SPECLRC1', '0x725D4', '0x180000') ('SPEGAMC5', '0x725E0', '0x180000') ('SPEGAMC4', '0x725E4', '0x180000') ('SPEGAMC3', '0x725E8', '0x180000') ('SPEGAMC2', '0x725EC', '0x180000') ('SPEGAMC1', '0x725F0', '0x180000') ('SPEGAMC0', '0x725F4', '0x180000') ('SPFCNTR', '0x72680', '0x180000') ('SPFLINOFF', '0x72684', '0x180000') ('SPFSTRIDE', '0x72688', '0x180000') ('SPFPOS', '0x7268C', '0x180000') ('SPFSIZE', '0x72690', '0x180000') ('SPFKEYMINVAL', '0x72694', '0x180000') ('SPFKEYMSK', '0x72698', '0x180000') ('SPFSURF', '0x7269C', '0x180000') ('SPFKEYMAXVAL', '0x726A0', '0x180000') ('SPFTILEOFF', '0x726A4', '0x180000') ('SPFCONTALPHA', '0x726A8', '0x180000') ('SPFLIVESURF', '0x726AC', '0x180000') ('SPFCLRC0', '0x726D0', '0x180000') ('SPFCLRC1', '0x726D4', '0x180000') ('SPFGAMC5', '0x726E0', '0x180000') ('SPFGAMC4', '0x726E4', '0x180000') ('SPFGAMC3', '0x726E8', '0x180000') ('SPFGAMC2', '0x726EC', '0x180000') ('SPFGAMC1', '0x726F0', '0x180000') ('SPFGAMC0', '0x726F4', '0x180000') ('DPALETTE_C', '0xC000', '0x180000') ('DPLLC_CTRL', '0x6030', '0x180000') ('DPLLCMD', '0x603C', '0x180000') ('HTOTAL_C', '0x63000', '0x180000') ('HBLANK_C', '0x63004', '0x180000') ('HSYNC_C', '0x63008', '0x180000') ('VTOTAL_C', '0x6300C', '0x180000') ('VBLANK_C', '0x63010', '0x180000') ('VSYNC_C', '0x63014', '0x180000') ('PIPECSRC', '0x6301C', '0x180000') ('BCLRPAT_C', '0x63020', '0x180000') ('VSYNCSHIFT_C', '0x63028', '0x180000') ('TRANSC_DATA_M1', '0x63030', '0x180000') ('TRANSC_DATA_N1', '0x63034', '0x180000') ('TRANSC_DATA_M2', '0x63038', '0x180000') ('TRANSC_DATA_N2', '0x6303C', '0x180000') ('TRANSC_LINK_M1', '0x63040', '0x180000') ('TRANSC_LINK_N1', '0x63044', '0x180000') ('TRANSC_LINK_M2', '0x63048', '0x180000') ('TRANSC_LINK_N2', '0x6304C', '0x180000') ('CRC_CTRL_RED_C', '0x63050', '0x180000') ('CRC_CTRL_GREEN_C', '0x63054', '0x180000') ('CRC_CTRL_BLUE_C', '0x63058', '0x180000') ('CRC_CTRL_ALPHA_C', '0x6305C', '0x180000') ('CRC_CTRL_RESIDUE2_C', '0x63070', '0x180000') ('CRC_RES_RED_C', '0x63060', '0x180000') ('CRC_RES_GREEN_C', '0x63064', '0x180000') ('CRC_RES_BLUE_C', '0x63068', '0x180000') ('CRC_RES_ALPHA_C', '0x6306C', '0x180000') ('CRC_RES_RESIDUAL2_C', '0x63080', '0x180000') ('PSRCTLC', '0x63090', '0x180000') ('PSRSTATC', '0x63094', '0x180000') ('PSRCRC1C', '0x63098', '0x180000') ('PSRCRC2C', '0x6309C', '0x180000') ('VSCSDPC', '0x630A0', '0x180000') ('PIPEC_WGCC_C01_C00', '0x630B0', '0x180000') ('PIPEC_WGCC_C02', '0x630B4', '0x180000') ('PIPEC_WGCC_C11_C10', '0x630B8', '0x180000') ('PIPEC_WGCC_C12', '0x630BC', '0x180000') ('PIPEC_WGCC_C21_C20', '0x630C0', '0x180000') ('PIPEC_WGCC_C22', '0x630C4', '0x180000') ('VIDEO_DIP_CTL_C', '0x611F0', '0x180000') ('VIDEO_DIP_DATA_C', '0x611F4', '0x180000') ('VIDEO_DIP_GDCP_PAYLOAD_C', '0x611F8', '0x180000') ('PIPEC_CGM_DEGAMMA', '0x6A000', '0x180000') ('PIPEC_CGM_GAMMA', '0x6B000', '0x180000') ('PIPEC_CGM_CSC_COEFF01', '0x6B900', '0x180000') ('PIPEC_CGM_CSC_COEFF23', '0x6B904', '0x180000') ('PIPEC_CGM_CSC_COEFF45', '0x6B908', '0x180000') ('PIPEC_CGM_CSC_COEFF67', '0x6B90C', '0x180000') ('PIPEC_CGM_CSC_COEFF8', '0x6B910', '0x180000') ('PIPEC_CGM_CONTROL', '0x6BA00', '0x180000') ('PIPEC_PP_STATUS', '0x61900', '0x180000') ('PIPEC_PP_CONTROL', '0x61904', '0x180000') ('PIPEC_PP_ON_DELAYS', '0x61908', '0x180000') ('PIPEC_PP_OFF_DELAYS', '0x6190C', '0x180000') ('PIPEC_PP_DIVISOR', '0x61910', '0x180000') ('AUD_CONFIG_C', '0x62200', '0x180000') ('AUD_MISC_CTRL_C', '0x62210', '0x180000') ('AUD_CTS_ENABLE_C', '0x62228', '0x180000') ('AUD_HDMIW_HDMIEDID_C', '0x62250', '0x180000') ('AUD_HDMIW_INFOFR_C', '0x62254', '0x180000') ('AUD_OUT_DIG_CNVT_C', '0x62280', '0x180000') ('AUD_OUT_STR_DESC_C', '0x62284', '0x180000') ('AUD_CNTL_ST_C', '0x622B4', '0x180000') ('AUD_OUT_DIG_CNVTC_DBG', '0x62F48', '0x180000') ('STREAM_C_LPE_AUD_CONFIG', '0x65900', '0x180000') ('STREAM_C_LPE_AUD_CH_STATUS_0', '0x65908', '0x180000') ('STREAM_C_LPE_AUD_CH_STATUS_1', '0x6590C', '0x180000') ('STREAM_C_LPE_AUD_HDMI_CTS_DP_MAUD', '0x65910', '0x180000') ('STREAM_C_LPE_AUD_HDMI_N_DP_NAUD', '0x65914', '0x180000') ('STREAM_C_LPE_AUD_BUFFER_CONFIG', '0x65920', '0x180000') ('STREAM_C_LPE_AUD_BUF_CH_SWP', '0x65924', '0x180000') ('STREAM_C_LPE_AUD_BUF_A_ADDR', '0x65940', '0x180000') ('STREAM_C_LPE_AUD_BUF_A_LENGTH', '0x65944', '0x180000') ('STREAM_C_LPE_AUD_BUF_B_ADDR', '0x65948', '0x180000') ('STREAM_C_LPE_AUD_BUF_B_LENGTH', '0x6594C', '0x180000') ('STREAM_C_LPE_AUD_BUF_C_ADDR', '0x65950', '0x180000') ('STREAM_C_LPE_AUD_BUF_C_LENGTH', '0x65954', '0x180000') ('STREAM_C_LPE_AUD_BUF_D_ADDR', '0x65958', '0x180000') ('STREAM_C_LPE_AUD_BUF_D_LENGTH', '0x6595C', '0x180000') ('STREAM_C_LPE_AUD_CNTL_ST', '0x65960', '0x180000') ('STREAM_C_LPE_AUD_HDMI_STATUS', '0x65964', '0x180000') ('STREAM_C_LPE_AUD_HDMIW_INFOFR', '0x65968', '0x180000') intel-gpu-tools-1.14/tools/registers/Makefile.am0000644000175000017500000000014312665336131016631 00000000000000register_definitiondir = ${pkgdatadir}/registers dist_register_definition_DATA = ${REGISTER_FILES} intel-gpu-tools-1.14/tools/registers/vlv_dsi.txt0000644000175000017500000001212112665336131017003 00000000000000('MIPIA_PORT_CTRL', '0x61190', '0x180000') ('MIPIA_TEARING_CTRL', '0x61194', '0x180000') ('MIPIA_AUTOPWG', '0x611A0', '0x180000') ('MIPIA_DEVICE_READY', '0xB000', '0x180000') ('MIPIA_INTR_STAT', '0xB004', '0x180000') ('MIPIA_INTR_EN', '0xB008', '0x180000') ('MIPIA_DSI_FUNC_PRG', '0xB00C', '0x180000') ('MIPIA_HS_TX_TIMEOUT', '0xB010', '0x180000') ('MIPIA_LP_RX_TIMEOUT', '0xB014', '0x180000') ('MIPIA_TURN_AROUND_TIMEOUT', '0xB018', '0x180000') ('MIPIA_DEVICE_RESET_TIMER', '0xB01C', '0x180000') ('MIPIA_DPI_RESOLUTION', '0xB020', '0x180000') ('MIPIA_DBI_FIFO_THROTTLE', '0xB024', '0x180000') ('MIPIA_HSYNC_PADDING_COUNT', '0xB028', '0x180000') ('MIPIA_HBP_COUNT', '0xB02C', '0x180000') ('MIPIA_HFP_COUNT', '0xB030', '0x180000') ('MIPIA_HACTIVE_AREA_COUNT', '0xB034', '0x180000') ('MIPIA_VSYNC_PADDING_COUNT', '0xB038', '0x180000') ('MIPIA_VBP_COUNT', '0xB03C', '0x180000') ('MIPIA_VFP_COUNT', '0xB040', '0x180000') ('MIPIA_HIGH_LOW_SWITCH_COUNT', '0xB044', '0x180000') ('MIPIA_DPI_CONTROL', '0xB048', '0x180000') ('MIPIA_DPI_DATA', '0xB04C', '0x180000') ('MIPIA_INIT_COUNT', '0xB050', '0x180000') ('MIPIA_MAX_RETURN_PKT_SIZE', '0xB054', '0x180000') ('MIPIA_VIDEO_MODE_FORMAT', '0xB058', '0x180000') ('MIPIA_EOT_DISABLE', '0xB05C', '0x180000') ('MIPIA_LP_BYTECLK', '0xB060', '0x180000') ('MIPIA_LP_GEN_DATA', '0xB064', '0x180000') ('MIPIA_HS_GEN_DATA', '0xB068', '0x180000') ('MIPIA_LP_GEN_CTRL', '0xB06C', '0x180000') ('MIPIA_HS_GEN_CTRL', '0xB070', '0x180000') ('MIPIA_GEN_FIFO_STAT', '0xB074', '0x180000') ('MIPIA_HS_LS_DBI_ENABLE', '0xB078', '0x180000') ('MIPIA_DPHY_PARAM', '0xB080', '0x180000') ('MIPIA_DBI_BW_CTRL', '0xB084', '0x180000') ('MIPIA_CLK_LANE_SWITCH_TIME_CNT', '0xB088', '0x180000') ('MIPIA_STOP_STATE_STALL', '0xB08C', '0x180000') ('MIPIA_INTR_STAT_REG_1', '0xB090', '0x180000') ('MIPIA_INTR_EN_REG_1', '0xB094', '0x180000') ('MIPIA_DBI_TYPEC_CTRL', '0xB100', '0x180000') ('MIPIA_CTRL', '0xB104', '0x180000') ('MIPIA_DATA_ADDRESS', '0xB108', '0x180000') ('MIPIA_DATA_LENGTH', '0xB10C', '0x180000') ('MIPIA_COMMAND_ADDRESS', '0xB110', '0x180000') ('MIPIA_COMMAND_LENGTH', '0xB114', '0x180000') ('MIPIA_READ_DATA_RETURN0', '0xB118', '0x180000') ('MIPIA_READ_DATA_RETURN1', '0xB11C', '0x180000') ('MIPIA_READ_DATA_RETURN2', '0xB120', '0x180000') ('MIPIA_READ_DATA_RETURN3', '0xB124', '0x180000') ('MIPIA_READ_DATA_RETURN4', '0xB128', '0x180000') ('MIPIA_READ_DATA_RETURN5', '0xB12C', '0x180000') ('MIPIA_READ_DATA_RETURN6', '0xB130', '0x180000') ('MIPIA_READ_DATA_RETURN7', '0xB134', '0x180000') ('MIPIA_READ_DATA_VALID', '0xB138', '0x180000') ('MIPIC_PORT_CTRL', '0x61700', '0x180000') ('MIPIC_TEARING_CTRL', '0x61704', '0x180000') ('MIPIC_DEVICE_READY', '0xB800', '0x180000') ('MIPIC_INTR_STAT', '0xB804', '0x180000') ('MIPIC_INTR_EN', '0xB808', '0x180000') ('MIPIC_DSI_FUNC_PRG', '0xB80C', '0x180000') ('MIPIC_HS_TX_TIMEOUT', '0xB810', '0x180000') ('MIPIC_LP_RX_TIMEOUT', '0xB814', '0x180000') ('MIPIC_TURN_AROUND_TIMEOUT', '0xB818', '0x180000') ('MIPIC_DEVICE_RESET_TIMER', '0xB81C', '0x180000') ('MIPIC_DPI_RESOLUTION', '0xB820', '0x180000') ('MIPIC_DBI_FIFO_THROTTLE', '0xB824', '0x180000') ('MIPIC_HSYNC_PADDING_COUNT', '0xB828', '0x180000') ('MIPIC_HBP_COUNT', '0xB82C', '0x180000') ('MIPIC_HFP_COUNT', '0xB830', '0x180000') ('MIPIC_HACTIVE_AREA_COUNT', '0xB834', '0x180000') ('MIPIC_VSYNC_PADDING_COUNT', '0xB838', '0x180000') ('MIPIC_VBP_COUNT', '0xB83C', '0x180000') ('MIPIC_VFP_COUNT', '0xB840', '0x180000') ('MIPIC_HIGH_LOW_SWITCH_COUNT', '0xB844', '0x180000') ('MIPIC_DPI_CONTROL', '0xB848', '0x180000') ('MIPIC_DPI_DATA', '0xB84C', '0x180000') ('MIPIC_INIT_COUNT', '0xB850', '0x180000') ('MIPIC_MAX_RETURN_PKT_SIZE', '0xB854', '0x180000') ('MIPIC_VIDEO_MODE_FORMAT', '0xB858', '0x180000') ('MIPIC_EOT_DISABLE', '0xB85C', '0x180000') ('MIPIC_LP_BYTECLK', '0xB860', '0x180000') ('MIPIC_LP_GEN_DATA', '0xB864', '0x180000') ('MIPIC_HS_GEN_DATA', '0xB868', '0x180000') ('MIPIC_LP_GEN_CTRL', '0xB86C', '0x180000') ('MIPIC_HS_GEN_CTRL', '0xB870', '0x180000') ('MIPIC_GEN_FIFO_STAT', '0xB874', '0x180000') ('MIPIC_HS_LS_DBI_ENABLE', '0xB878', '0x180000') ('MIPIC_DPHY_PARAM', '0xB880', '0x180000') ('MIPIC_DBI_BW_CTRL', '0xB884', '0x180000') ('MIPIC_CLK_LANE_SWITCH_TIME_CNT', '0xB888', '0x180000') ('MIPIC_STOP_STATE_STALL', '0xB88C', '0x180000') ('MIPIC_INTR_STAT_REG_1', '0xB890', '0x180000') ('MIPIC_INTR_EN_REG_1', '0xB894', '0x180000') ('MIPIC_CTRL', '0xB904', '0x180000') ('MIPIC_DATA_ADDRESS', '0xB908', '0x180000') ('MIPIC_DATA_LENGTH', '0xB90C', '0x180000') ('MIPIC_COMMAND_ADDRESS', '0xB910', '0x180000') ('MIPIC_COMMAND_LENGTH', '0xB914', '0x180000') ('MIPIC_READ_DATA_RETURN0', '0xB918', '0x180000') ('MIPIC_READ_DATA_RETURN1', '0xB91C', '0x180000') ('MIPIC_READ_DATA_RETURN2', '0xB920', '0x180000') ('MIPIC_READ_DATA_RETURN3', '0xB924', '0x180000') ('MIPIC_READ_DATA_RETURN4', '0xB928', '0x180000') ('MIPIC_READ_DATA_RETURN5', '0xB92C', '0x180000') ('MIPIC_READ_DATA_RETURN6', '0xB930', '0x180000') ('MIPIC_READ_DATA_RETURN7', '0xB934', '0x180000') ('MIPIC_READ_DATA_VALID', '0xB938', '0x180000') intel-gpu-tools-1.14/tools/registers/skylake0000644000175000017500000000010512665336131016161 00000000000000gen8_interrupt.txt gen8_other.txt skl_powerwells.txt skl_display.txt intel-gpu-tools-1.14/tools/registers/vlv_pipe_b.txt0000644000175000017500000001527412665336131017476 00000000000000('PIPEB_DSL', '0x71000', '0x180000') ('PIPEB_SLC', '0x71004', '0x180000') ('PIPEBCONF', '0x71008', '0x180000') ('PIPEBGCMAXRED', '0x71010', '0x180000') ('PIPEBGCMAXGREEN', '0x71014', '0x180000') ('PIPEBGCMAXBLUE', '0x71018', '0x180000') ('PIPEBSTAT', '0x71024', '0x180000') ('PIPEBFRAMECOUNT', '0x71040', '0x180000') ('PIPEBFLIPCOUNT', '0x71044', '0x180000') ('PIPEBMSAMISC', '0x71048', '0x180000') ('DSPBADDR', '0x7117C', '0x180000') ('DSPBCNTR', '0x71180', '0x180000') ('DSPBLINOFF', '0x71184', '0x180000') ('DSPBSTRIDE', '0x71188', '0x180000') ('DSPBKEYVAL', '0x71194', '0x180000') ('DSPBKEYMSK', '0x71198', '0x180000') ('DSPBSURF', '0x7119C', '0x180000') ('DSPBTILEOFF', '0x711A4', '0x180000') ('DSPBSURFLIVE', '0x711AC', '0x180000') ('DSPBFLPQSTAT', '0x71200', '0x180000') ('CURBCNTR', '0x700C0', '0x180000') ('CURBBASE', '0x700C4', '0x180000') ('CURBPOS', '0x700C8', '0x180000') ('CURBRESV', '0x700CC', '0x180000') ('CURBPALET0', '0x700D0', '0x180000') ('CURBPALET1', '0x700D4', '0x180000') ('CURBPALET2', '0x700D8', '0x180000') ('CURBPALET3', '0x700DC', '0x180000') ('CURBLIVEBASE', '0x700EC', '0x180000') ('SPCCNTR', '0x72380', '0x180000') ('SPCLINOFF', '0x72384', '0x180000') ('SPCSTRIDE', '0x72388', '0x180000') ('SPCPOS', '0x7238C', '0x180000') ('SPCSIZE', '0x72390', '0x180000') ('SPCKEYMINVAL', '0x72394', '0x180000') ('SPCKEYMSK', '0x72398', '0x180000') ('SPCSURF', '0x7239C', '0x180000') ('SPCKEYMAXVAL', '0x723A0', '0x180000') ('SPCTILEOFF', '0x723A4', '0x180000') ('SPCCONTALPHA', '0x723A8', '0x180000') ('SPCLIVESURF', '0x723AC', '0x180000') ('SPCCLRC0', '0x723D0', '0x180000') ('SPCCLRC1', '0x723D4', '0x180000') ('SPCGAMC5', '0x723E0', '0x180000') ('SPCGAMC4', '0x723E4', '0x180000') ('SPCGAMC3', '0x723E8', '0x180000') ('SPCGAMC2', '0x723EC', '0x180000') ('SPCGAMC1', '0x723F0', '0x180000') ('SPCGAMC0', '0x723F4', '0x180000') ('SPDCNTR', '0x72480', '0x180000') ('SPDLINOFF', '0x72484', '0x180000') ('SPDSTRIDE', '0x72488', '0x180000') ('SPDPOS', '0x7248C', '0x180000') ('SPDSIZE', '0x72490', '0x180000') ('SPDKEYMINVAL', '0x72494', '0x180000') ('SPDKEYMSK', '0x72498', '0x180000') ('SPDSURF', '0x7249C', '0x180000') ('SPDKEYMAXVAL', '0x724A0', '0x180000') ('SPDTILEOFF', '0x724A4', '0x180000') ('SPDCONTALPHA', '0x724A8', '0x180000') ('SPDLIVESURF', '0x724AC', '0x180000') ('SPDCLRC0', '0x724D0', '0x180000') ('SPDCLRC1', '0x724D4', '0x180000') ('SPDGAMC5', '0x724E0', '0x180000') ('SPDGAMC4', '0x724E4', '0x180000') ('SPDGAMC3', '0x724E8', '0x180000') ('SPDGAMC2', '0x724EC', '0x180000') ('SPDGAMC1', '0x724F0', '0x180000') ('SPDGAMC0', '0x724F4', '0x180000') ('DPALETTE_B', '0xA800', '0x180000') ('DPLLB_CTRL', '0x6018', '0x180000') ('DPLLBMD', '0x6020', '0x180000') ('HTOTAL_B', '0x61000', '0x180000') ('HBLANK_B', '0x61004', '0x180000') ('HSYNC_B', '0x61008', '0x180000') ('VTOTAL_B', '0x6100C', '0x180000') ('VBLANK_B', '0x61010', '0x180000') ('VSYNC_B', '0x61014', '0x180000') ('PIPEBSRC', '0x6101C', '0x180000') ('BCLRPAT_B', '0x61020', '0x180000') ('VSYNCSHIFT_B', '0x61028', '0x180000') ('TRANSB_DATA_M1', '0x61030', '0x180000') ('TRANSB_DATA_N1', '0x61034', '0x180000') ('TRANSB_DATA_M2', '0x61038', '0x180000') ('TRANSB_DATA_N2', '0x6103C', '0x180000') ('TRANSB_LINK_M1', '0x61040', '0x180000') ('TRANSB_LINK_N1', '0x61044', '0x180000') ('TRANSB_LINK_M2', '0x61048', '0x180000') ('TRANSB_LINK_N2', '0x6104C', '0x180000') ('CRC_CTRL_RED_B', '0x61050', '0x180000') ('CRC_CTRL_GREEN_B', '0x61054', '0x180000') ('CRC_CTRL_BLUE_B', '0x61058', '0x180000') ('CRC_CTRL_ALPHA_B', '0x6105C', '0x180000') ('CRC_CTRL_RESIDUE2_B', '0x61070', '0x180000') ('CRC_RES_RED_B', '0x61060', '0x180000') ('CRC_RES_GREEN_B', '0x61064', '0x180000') ('CRC_RES_BLUE_V', '0x61068', '0x180000') ('CRC_RES_ALPHAB', '0x6106C', '0x180000') ('CRC_RES_RESIDUAL2_B', '0x61080', '0x180000') ('PSRCTLB', '0x61090', '0x180000') ('PSRSTATB', '0x61094', '0x180000') ('PSRCRC1B', '0x61098', '0x180000') ('PSRCRC2B', '0x6109C', '0x180000') ('VSCSDPB', '0x610A0', '0x180000') ('PIPEB_WGCC_C01_C00', '0x610B0', '0x180000') ('PIPEB_WGCC_C02', '0x610B4', '0x180000') ('PIPEB_WGCC_C11_C10', '0x610B8', '0x180000') ('PIPEB_WGCC_C12', '0x610BC', '0x180000') ('PIPEB_WGCC_C21_C20', '0x610C0', '0x180000') ('PIPEB_WGCC_C22', '0x610C4', '0x180000') ('VIDEO_DIP_CTL_B', '0x61170', '0x180000') ('VIDEO_DIP_DATA_B', '0x61174', '0x180000') ('VIDEO_DIP_GDCP_PAYLOAD_B', '0x61178', '0x180000') ('PIPEB_CGM_DEGAMMA', '0x68000', '0x180000') ('PIPEB_CGM_GAMMA', '0x69000', '0x180000') ('PIPEB_CGM_CSC_COEFF01', '0x69900', '0x180000') ('PIPEB_CGM_CSC_COEFF23', '0x69904', '0x180000') ('PIPEB_CGM_CSC_COEFF45', '0x69908', '0x180000') ('PIPEB_CGM_CSC_COEFF67', '0x6990C', '0x180000') ('PIPEB_CGM_CSC_COEFF8', '0x69910', '0x180000') ('PIPEB_CGM_CONTROL', '0x69A00', '0x180000') ('PIPEB_PP_STATUS', '0x61300', '0x180000') ('PIPEB_PP_CONTROL', '0x61304', '0x180000') ('PIPEB_PP_ON_DELAYS', '0x61308', '0x180000') ('PIPEB_PP_OFF_DELAYS', '0x6130C', '0x180000') ('PIPEB_PP_DIVISOR', '0x61310', '0x180000') ('PIPEB_BLC_PWM_CLT2', '0x61350', '0x180000') ('PIPEB_BLC_PWM_CTL', '0x61354', '0x180000') ('PIPEB_BLM_HIST_CTL', '0x61360', '0x180000') ('PIPEB_IMG_ENH_BIN_DATA', '0x61364', '0x180000') ('PIPEB_HIST_THRESH_GUARD', '0x61368', '0x180000') ('AUD_CONFIG_B', '0x62100', '0x180000') ('AUD_MISC_CTRL_B', '0x62110', '0x180000') ('AUD_CTS_ENABLE_B', '0x62128', '0x180000') ('AUD_HDMIW_HDMIEDID_B', '0x62150', '0x180000') ('AUD_HDMIW_INFOFR_B', '0x62154', '0x180000') ('AUD_OUT_DIG_CNVT_B', '0x62180', '0x180000') ('AUD_OUT_STR_DESC_B', '0x62184', '0x180000') ('AUD_CNTL_ST_B', '0x621B4', '0x180000') ('AUD_OUT_DIG_CNVTB_DBG', '0x62F44', '0x180000') ('STREAM_B_LPE_AUD_CONFIG', '0x65800', '0x180000') ('STREAM_B_LPE_AUD_CH_STATUS_0', '0x65808', '0x180000') ('STREAM_B_LPE_AUD_CH_STATUS_1', '0x6580C', '0x180000') ('STREAM_B_LPE_AUD_HDMI_CTS_DP_MAUD', '0x65810', '0x180000') ('STREAM_B_LPE_AUD_HDMI_N_DP_NAUD', '0x65814', '0x180000') ('STREAM_B_LPE_AUD_BUFFER_CONFIG', '0x65820', '0x180000') ('STREAM_B_LPE_AUD_BUF_CH_SWP', '0x65824', '0x180000') ('STREAM_B_LPE_AUD_BUF_A_ADDR', '0x65840', '0x180000') ('STREAM_B_LPE_AUD_BUF_A_LENGTH', '0x65844', '0x180000') ('STREAM_B_LPE_AUD_BUF_B_ADDR', '0x65848', '0x180000') ('STREAM_B_LPE_AUD_BUF_B_LENGTH', '0x6584C', '0x180000') ('STREAM_B_LPE_AUD_BUF_C_ADDR', '0x65850', '0x180000') ('STREAM_B_LPE_AUD_BUF_C_LENGTH', '0x65854', '0x180000') ('STREAM_B_LPE_AUD_BUF_D_ADDR', '0x65858', '0x180000') ('STREAM_B_LPE_AUD_BUF_D_LENGTH', '0x6585C', '0x180000') ('STREAM_B_LPE_AUD_CNTL_ST', '0x65860', '0x180000') ('STREAM_B_LPE_AUD_HDMI_STATUS', '0x65864', '0x180000') ('STREAM_B_LPE_AUD_HDMIW_INFOFR', '0x65868', '0x180000') intel-gpu-tools-1.14/tools/registers/sandybridge0000644000175000017500000000004212665336131017011 00000000000000common_display.txt gen6_other.txt intel-gpu-tools-1.14/tools/registers/gen8_interrupt.txt0000644000175000017500000000301712665336131020316 00000000000000('GEN8_MASTER_IRQ', '0x00044200', '') ('GEN8_GT_ISR0', '0x00044300', '') ('GEN8_GT_IMR0', '0x00044304', '') ('GEN8_GT_IIR0', '0x00044308', '') ('GEN8_GT_IER0', '0x0004430c', '') ('GEN8_GT_ISR1', '0x00044310', '') ('GEN8_GT_IMR1', '0x00044314', '') ('GEN8_GT_IIR1', '0x00044318', '') ('GEN8_GT_IER1', '0x0004431c', '') ('GEN8_GT_ISR2', '0x00044320', '') ('GEN8_GT_IMR2', '0x00044324', '') ('GEN8_GT_IIR2', '0x00044328', '') ('GEN8_GT_IER2', '0x0004432c', '') ('GEN8_GT_ISR3', '0x00044330', '') ('GEN8_GT_IMR3', '0x00044334', '') ('GEN8_GT_IIR3', '0x00044338', '') ('GEN8_GT_IER3', '0x0004433c', '') ('GEN8_DE_PIPE_ISR0', '0x44400', '') ('GEN8_DE_PIPE_IMR0', '0x44404', '') ('GEN8_DE_PIPE_IIR0', '0x44408', '') ('GEN8_DE_PIPE_IER0', '0x4440c', '') ('GEN8_DE_PIPE_ISR1', '0x44410', '') ('GEN8_DE_PIPE_IMR1', '0x44414', '') ('GEN8_DE_PIPE_IIR1', '0x44418', '') ('GEN8_DE_PIPE_IER1', '0x4441c', '') ('GEN8_DE_PIPE_ISR2', '0x44420', '') ('GEN8_DE_PIPE_IMR2', '0x44424', '') ('GEN8_DE_PIPE_IIR2', '0x44428', '') ('GEN8_DE_PIPE_IER2', '0x4442c', '') ('GEN8_DE_PORT_ISR', '0x44440', '') ('GEN8_DE_PORT_IMR', '0x44444', '') ('GEN8_DE_PORT_IIR', '0x44448', '') ('GEN8_DE_PORT_IER', '0x4444c', '') ('GEN8_DE_MISC_ISR', '0x44460', '') ('GEN8_DE_MISC_IMR', '0x44464', '') ('GEN8_DE_MISC_IIR', '0x44468', '') ('GEN8_DE_MISC_IER', '0x4446c', '') ('GEN8_PCU_ISR', '0x444e0', '') ('GEN8_PCU_IMR', '0x444e4', '') ('GEN8_PCU_IIR', '0x444e8', '') ('GEN8_PCU_IER', '0x444ec', '') ('RENDER_IMR', '0x000020a8', '') ('BSD_IMR', '0x000120a8', '') ('BLT_IMR', '0x000220a8', '') intel-gpu-tools-1.14/tools/registers/ivybridge0000644000175000017500000000004212665336131016502 00000000000000common_display.txt gen7_other.txt intel-gpu-tools-1.14/tools/registers/chv_dpio_phy_x2.txt0000644000175000017500000003316012665336131020427 00000000000000('PLL1_DW0', '0x8000', 'DPIO2') ('PLL1_DW1', '0x8004', 'DPIO2') ('PLL1_DW2', '0x8008', 'DPIO2') ('PLL1_DW3', '0x800C', 'DPIO2') ('PLL1_DW4', '0x8010', 'DPIO2') ('PLL1_DW5', '0x8014', 'DPIO2') ('PLL1_DW6', '0x8018', 'DPIO2') ('PLL1_DW7', '0x801C', 'DPIO2') ('PLL1_DW8', '0x8020', 'DPIO2') ('PLL1_DW9', '0x8024', 'DPIO2') ('PLL1_DW10', '0x8028', 'DPIO2') ('PLL1_DW11', '0x802C', 'DPIO2') ('PLL1_DW12', '0x8030', 'DPIO2') ('PLL1_DW13', '0x8034', 'DPIO2') ('PLL1_DW14', '0x8038', 'DPIO2') ('PLL1_DW15', '0x803C', 'DPIO2') ('PLL1_DW16', '0x8040', 'DPIO2') ('PLL1_DW17', '0x8044', 'DPIO2') ('PLL1_DW18', '0x8048', 'DPIO2') ('PLL1_DW19', '0x804C', 'DPIO2') ('PLL1_DW20', '0x8050', 'DPIO2') ('PLL1_DW21', '0x8054', 'DPIO2') ('PLL1_DW22', '0x8058', 'DPIO2') ('PLL1_DW23', '0x805C', 'DPIO2') ('PLL1_DW24', '0x8060', 'DPIO2') ('PLL1_DW25', '0x8064', 'DPIO2') ('PLL1_DW26', '0x8068', 'DPIO2') ('PLL1_DW27', '0x806C', 'DPIO2') ('PLL1_DW28', '0x8070', 'DPIO2') ('PLL1_DW29', '0x8074', 'DPIO2') ('PLL1_DW30', '0x8078', 'DPIO2') ('PLL1_DW31', '0x807C', 'DPIO2') ('CL2_DW0', '0x8080', 'DPIO2') ('CL2_DW1', '0x8084', 'DPIO2') ('CL2_DW2', '0x8088', 'DPIO2') ('CL2_DW3', '0x808C', 'DPIO2') ('CL2_DW4', '0x8090', 'DPIO2') ('CL2_DW5', '0x8094', 'DPIO2') ('CL2_DW6', '0x8098', 'DPIO2') ('CL2_DW7', '0x809C', 'DPIO2') ('REF_DW0', '0x80A0', 'DPIO2') ('REF_DW1', '0x80A4', 'DPIO2') ('REF_DW2', '0x80A8', 'DPIO2') ('REF_DW3', '0x80AC', 'DPIO2') ('REF_DW4', '0x80B0', 'DPIO2') ('REF_DW5', '0x80B4', 'DPIO2') ('REF_DW6', '0x80B8', 'DPIO2') ('REF_DW7', '0x80BC', 'DPIO2') ('REF_DW8', '0x80C0', 'DPIO2') ('REF_DW9', '0x80C4', 'DPIO2') ('REF_DW10', '0x80C8', 'DPIO2') ('REF_DW11', '0x80CC', 'DPIO2') ('REF_DW12', '0x80D0', 'DPIO2') ('REF_DW13', '0x80D4', 'DPIO2') ('REF_DW14', '0x80D8', 'DPIO2') ('REF_DW15', '0x80DC', 'DPIO2') ('CL1_DW0', '0x8100', 'DPIO2') ('CL1_DW1', '0x8104', 'DPIO2') ('CL1_DW2', '0x8108', 'DPIO2') ('CL1_DW3', '0x810C', 'DPIO2') ('CL1_DW4', '0x8110', 'DPIO2') ('CL1_DW5', '0x8114', 'DPIO2') ('CL1_DW6', '0x8118', 'DPIO2') ('CL1_DW7', '0x811C', 'DPIO2') ('CL1_DW8', '0x8120', 'DPIO2') ('CL1_DW9', '0x8124', 'DPIO2') ('CL1_DW10', '0x8128', 'DPIO2') ('CL1_DW11', '0x812C', 'DPIO2') ('CL1_DW12', '0x8130', 'DPIO2') ('CL1_DW13', '0x8134', 'DPIO2') ('CL1_DW14', '0x8138', 'DPIO2') ('CL1_DW15', '0x813C', 'DPIO2') ('CL1_DW16', '0x8140', 'DPIO2') ('CL1_DW17', '0x8144', 'DPIO2') ('CL1_DW18', '0x8148', 'DPIO2') ('CL1_DW19', '0x814C', 'DPIO2') ('CL1_DW20', '0x8150', 'DPIO2') ('CL1_DW21', '0x8154', 'DPIO2') ('CL1_DW22', '0x8158', 'DPIO2') ('CL1_DW23', '0x815C', 'DPIO2') ('CL1_DW24', '0x8160', 'DPIO2') ('CL1_DW25', '0x8164', 'DPIO2') ('CL1_DW26', '0x8168', 'DPIO2') ('CL1_DW27', '0x816C', 'DPIO2') ('CL1_DW28', '0x8170', 'DPIO2') ('CL1_DW29', '0x8174', 'DPIO2') ('CL1_DW30', '0x8178', 'DPIO2') ('CL1_DW31', '0x817C', 'DPIO2') ('PLL2_DW0', '0x8180', 'DPIO2') ('PLL2_DW1', '0x8184', 'DPIO2') ('PLL2_DW2', '0x8188', 'DPIO2') ('PLL2_DW3', '0x818C', 'DPIO2') ('PLL2_DW4', '0x8190', 'DPIO2') ('PLL2_DW5', '0x8194', 'DPIO2') ('PLL2_DW6', '0x8198', 'DPIO2') ('PLL2_DW7', '0x819C', 'DPIO2') ('PLL2_DW8', '0x81A0', 'DPIO2') ('PLL2_DW9', '0x81A4', 'DPIO2') ('PLL2_DW10', '0x81A8', 'DPIO2') ('PLL2_DW11', '0x81AC', 'DPIO2') ('PLL2_DW12', '0x81B0', 'DPIO2') ('PLL2_DW13', '0x81B4', 'DPIO2') ('PLL2_DW14', '0x81B8', 'DPIO2') ('PLL2_DW15', '0x81BC', 'DPIO2') ('PLL2_DW16', '0x81C0', 'DPIO2') ('PLL2_DW17', '0x81C4', 'DPIO2') ('PLL2_DW18', '0x81C8', 'DPIO2') ('PLL2_DW19', '0x81CC', 'DPIO2') ('PLL2_DW20', '0x81D0', 'DPIO2') ('PLL2_DW21', '0x81D4', 'DPIO2') ('PLL2_DW22', '0x81D8', 'DPIO2') ('PLL2_DW23', '0x81DC', 'DPIO2') ('PLL2_DW24', '0x81E0', 'DPIO2') ('PLL2_DW25', '0x81E4', 'DPIO2') ('PLL2_DW26', '0x81E8', 'DPIO2') ('PLL2_DW27', '0x81EC', 'DPIO2') ('PLL2_DW28', '0x81F0', 'DPIO2') ('PLL2_DW29', '0x81F4', 'DPIO2') ('PLL2_DW30', '0x81F8', 'DPIO2') ('PLL2_DW31', '0x81FC', 'DPIO2') ('PCS01_CH0_DW0', '0x0200', 'DPIO2') ('PCS01_CH0_DW1', '0x0204', 'DPIO2') ('PCS01_CH0_DW2', '0x0208', 'DPIO2') ('PCS01_CH0_DW3', '0x020C', 'DPIO2') ('PCS01_CH0_DW4', '0x0210', 'DPIO2') ('PCS01_CH0_DW5', '0x0214', 'DPIO2') ('PCS01_CH0_DW6', '0x0218', 'DPIO2') ('PCS01_CH0_DW7', '0x021C', 'DPIO2') ('PCS01_CH0_DW8', '0x0220', 'DPIO2') ('PCS01_CH0_DW9', '0x0224', 'DPIO2') ('PCS01_CH0_DW10', '0x0228', 'DPIO2') ('PCS01_CH0_DW11', '0x022C', 'DPIO2') ('PCS01_CH0_DW12', '0x0230', 'DPIO2') ('PCS01_CH0_DW13', '0x0234', 'DPIO2') ('PCS01_CH0_DW14', '0x0238', 'DPIO2') ('PCS01_CH0_DW15', '0x023C', 'DPIO2') ('PCS01_CH0_DW16', '0x0240', 'DPIO2') ('PCS01_CH0_DW17', '0x0244', 'DPIO2') ('PCS01_CH0_DW18', '0x0248', 'DPIO2') ('PCS01_CH0_DW19', '0x024C', 'DPIO2') ('PCS01_CH0_DW20', '0x0250', 'DPIO2') ('PCS01_CH0_DW21', '0x0254', 'DPIO2') ('PCS01_CH0_DW22', '0x0258', 'DPIO2') ('PCS01_CH0_DW23', '0x025C', 'DPIO2') ('PCS01_CH0_DW24', '0x0260', 'DPIO2') ('PCS01_CH0_DW25', '0x0264', 'DPIO2') ('TX0_CH0_DW0', '0x0080', 'DPIO2') ('TX0_CH0_DW1', '0x0084', 'DPIO2') ('TX0_CH0_DW2', '0x0088', 'DPIO2') ('TX0_CH0_DW3', '0x008C', 'DPIO2') ('TX0_CH0_DW4', '0x0090', 'DPIO2') ('TX0_CH0_DW5', '0x0094', 'DPIO2') ('TX0_CH0_DW6', '0x0098', 'DPIO2') ('TX0_CH0_DW7', '0x009C', 'DPIO2') ('TX0_CH0_DW8', '0x00A0', 'DPIO2') ('TX0_CH0_DW9', '0x00A4', 'DPIO2') ('TX0_CH0_DW10', '0x00A8', 'DPIO2') ('TX0_CH0_DW11', '0x00AC', 'DPIO2') ('TX0_CH0_DW12', '0x00B0', 'DPIO2') ('TX0_CH0_DW13', '0x00B4', 'DPIO2') ('TX0_CH0_DW14', '0x00B8', 'DPIO2') ('TX0_CH0_DW15', '0x00BC', 'DPIO2') ('TX0_CH0_DW16', '0x00C0', 'DPIO2') ('TX0_CH0_DW17', '0x00C4', 'DPIO2') ('TX0_CH0_DW18', '0x00C8', 'DPIO2') ('TX0_CH0_DW19', '0x00CC', 'DPIO2') ('TX0_CH0_DW20', '0x00D0', 'DPIO2') ('TX1_CH0_DW0', '0x0280', 'DPIO2') ('TX1_CH0_DW1', '0x0284', 'DPIO2') ('TX1_CH0_DW2', '0x0288', 'DPIO2') ('TX1_CH0_DW3', '0x028C', 'DPIO2') ('TX1_CH0_DW4', '0x0290', 'DPIO2') ('TX1_CH0_DW5', '0x0294', 'DPIO2') ('TX1_CH0_DW6', '0x0298', 'DPIO2') ('TX1_CH0_DW7', '0x029C', 'DPIO2') ('TX1_CH0_DW8', '0x02A0', 'DPIO2') ('TX1_CH0_DW9', '0x02A4', 'DPIO2') ('TX1_CH0_DW10', '0x02A8', 'DPIO2') ('TX1_CH0_DW11', '0x02AC', 'DPIO2') ('TX1_CH0_DW12', '0x02B0', 'DPIO2') ('TX1_CH0_DW13', '0x02B4', 'DPIO2') ('TX1_CH0_DW14', '0x02B8', 'DPIO2') ('TX1_CH0_DW15', '0x02BC', 'DPIO2') ('TX1_CH0_DW16', '0x02C0', 'DPIO2') ('TX1_CH0_DW17', '0x02C4', 'DPIO2') ('TX1_CH0_DW18', '0x02C8', 'DPIO2') ('TX1_CH0_DW19', '0x02CC', 'DPIO2') ('TX1_CH0_DW20', '0x02D0', 'DPIO2') ('PCS23_CH0_DW0', '0x0400', 'DPIO2') ('PCS23_CH0_DW1', '0x0404', 'DPIO2') ('PCS23_CH0_DW2', '0x0408', 'DPIO2') ('PCS23_CH0_DW3', '0x040C', 'DPIO2') ('PCS23_CH0_DW4', '0x0410', 'DPIO2') ('PCS23_CH0_DW5', '0x0414', 'DPIO2') ('PCS23_CH0_DW6', '0x0418', 'DPIO2') ('PCS23_CH0_DW7', '0x041C', 'DPIO2') ('PCS23_CH0_DW8', '0x0420', 'DPIO2') ('PCS23_CH0_DW9', '0x0424', 'DPIO2') ('PCS23_CH0_DW10', '0x0428', 'DPIO2') ('PCS23_CH0_DW11', '0x042C', 'DPIO2') ('PCS23_CH0_DW12', '0x0430', 'DPIO2') ('PCS23_CH0_DW13', '0x0434', 'DPIO2') ('PCS23_CH0_DW14', '0x0438', 'DPIO2') ('PCS23_CH0_DW15', '0x043C', 'DPIO2') ('PCS23_CH0_DW16', '0x0440', 'DPIO2') ('PCS23_CH0_DW17', '0x0444', 'DPIO2') ('PCS23_CH0_DW18', '0x0448', 'DPIO2') ('PCS23_CH0_DW19', '0x044C', 'DPIO2') ('PCS23_CH0_DW20', '0x0450', 'DPIO2') ('PCS23_CH0_DW21', '0x0454', 'DPIO2') ('PCS23_CH0_DW22', '0x0458', 'DPIO2') ('PCS23_CH0_DW23', '0x045C', 'DPIO2') ('PCS23_CH0_DW24', '0x0460', 'DPIO2') ('PCS23_CH0_DW25', '0x0464', 'DPIO2') ('TX2_CH0_DW0', '0x0480', 'DPIO2') ('TX2_CH0_DW1', '0x0484', 'DPIO2') ('TX2_CH0_DW2', '0x0488', 'DPIO2') ('TX2_CH0_DW3', '0x048C', 'DPIO2') ('TX2_CH0_DW4', '0x0490', 'DPIO2') ('TX2_CH0_DW5', '0x0494', 'DPIO2') ('TX2_CH0_DW6', '0x0498', 'DPIO2') ('TX2_CH0_DW7', '0x049C', 'DPIO2') ('TX2_CH0_DW8', '0x04A0', 'DPIO2') ('TX2_CH0_DW9', '0x04A4', 'DPIO2') ('TX2_CH0_DW10', '0x04A8', 'DPIO2') ('TX2_CH0_DW11', '0x04AC', 'DPIO2') ('TX2_CH0_DW12', '0x04B0', 'DPIO2') ('TX2_CH0_DW13', '0x04B4', 'DPIO2') ('TX2_CH0_DW14', '0x04B8', 'DPIO2') ('TX2_CH0_DW15', '0x04BC', 'DPIO2') ('TX2_CH0_DW16', '0x04C0', 'DPIO2') ('TX2_CH0_DW17', '0x04C4', 'DPIO2') ('TX2_CH0_DW18', '0x04C8', 'DPIO2') ('TX2_CH0_DW19', '0x04CC', 'DPIO2') ('TX2_CH0_DW20', '0x04D0', 'DPIO2') ('TX3_CH0_DW0', '0x0680', 'DPIO2') ('TX3_CH0_DW1', '0x0684', 'DPIO2') ('TX3_CH0_DW2', '0x0688', 'DPIO2') ('TX3_CH0_DW3', '0x068C', 'DPIO2') ('TX3_CH0_DW4', '0x0690', 'DPIO2') ('TX3_CH0_DW5', '0x0694', 'DPIO2') ('TX3_CH0_DW6', '0x0698', 'DPIO2') ('TX3_CH0_DW7', '0x069C', 'DPIO2') ('TX3_CH0_DW8', '0x06A0', 'DPIO2') ('TX3_CH0_DW9', '0x06A4', 'DPIO2') ('TX3_CH0_DW10', '0x06A8', 'DPIO2') ('TX3_CH0_DW11', '0x06AC', 'DPIO2') ('TX3_CH0_DW12', '0x06B0', 'DPIO2') ('TX3_CH0_DW13', '0x06B4', 'DPIO2') ('TX3_CH0_DW14', '0x06B8', 'DPIO2') ('TX3_CH0_DW15', '0x06BC', 'DPIO2') ('TX3_CH0_DW16', '0x06C0', 'DPIO2') ('TX3_CH0_DW17', '0x06C4', 'DPIO2') ('TX3_CH0_DW18', '0x06C8', 'DPIO2') ('TX3_CH0_DW19', '0x06CC', 'DPIO2') ('TX3_CH0_DW20', '0x06D0', 'DPIO2') ('PCS01_CH1_DW0', '0x2600', 'DPIO2') ('PCS01_CH1_DW1', '0x2604', 'DPIO2') ('PCS01_CH1_DW2', '0x2608', 'DPIO2') ('PCS01_CH1_DW3', '0x260C', 'DPIO2') ('PCS01_CH1_DW4', '0x2610', 'DPIO2') ('PCS01_CH1_DW5', '0x2614', 'DPIO2') ('PCS01_CH1_DW6', '0x2618', 'DPIO2') ('PCS01_CH1_DW7', '0x261C', 'DPIO2') ('PCS01_CH1_DW8', '0x2620', 'DPIO2') ('PCS01_CH1_DW9', '0x2624', 'DPIO2') ('PCS01_CH1_DW10', '0x2628', 'DPIO2') ('PCS01_CH1_DW11', '0x262C', 'DPIO2') ('PCS01_CH1_DW12', '0x2630', 'DPIO2') ('PCS01_CH1_DW13', '0x2634', 'DPIO2') ('PCS01_CH1_DW14', '0x2638', 'DPIO2') ('PCS01_CH1_DW15', '0x263C', 'DPIO2') ('PCS01_CH1_DW16', '0x2640', 'DPIO2') ('PCS01_CH1_DW17', '0x2644', 'DPIO2') ('PCS01_CH1_DW18', '0x2648', 'DPIO2') ('PCS01_CH1_DW19', '0x264C', 'DPIO2') ('PCS01_CH1_DW20', '0x2650', 'DPIO2') ('PCS01_CH1_DW21', '0x2654', 'DPIO2') ('PCS01_CH1_DW22', '0x2658', 'DPIO2') ('PCS01_CH1_DW23', '0x265C', 'DPIO2') ('PCS01_CH1_DW24', '0x2660', 'DPIO2') ('PCS01_CH1_DW25', '0x2664', 'DPIO2') ('TX0_CH1_DW0', '0x2480', 'DPIO2') ('TX0_CH1_DW1', '0x2484', 'DPIO2') ('TX0_CH1_DW2', '0x2488', 'DPIO2') ('TX0_CH1_DW3', '0x248C', 'DPIO2') ('TX0_CH1_DW4', '0x2490', 'DPIO2') ('TX0_CH1_DW5', '0x2494', 'DPIO2') ('TX0_CH1_DW6', '0x2498', 'DPIO2') ('TX0_CH1_DW7', '0x249C', 'DPIO2') ('TX0_CH1_DW8', '0x24A0', 'DPIO2') ('TX0_CH1_DW9', '0x24A4', 'DPIO2') ('TX0_CH1_DW10', '0x24A8', 'DPIO2') ('TX0_CH1_DW11', '0x24AC', 'DPIO2') ('TX0_CH1_DW12', '0x24B0', 'DPIO2') ('TX0_CH1_DW13', '0x24B4', 'DPIO2') ('TX0_CH1_DW14', '0x24B8', 'DPIO2') ('TX0_CH1_DW15', '0x24BC', 'DPIO2') ('TX0_CH1_DW16', '0x24C0', 'DPIO2') ('TX0_CH1_DW17', '0x24C4', 'DPIO2') ('TX0_CH1_DW18', '0x24C8', 'DPIO2') ('TX0_CH1_DW19', '0x24CC', 'DPIO2') ('TX0_CH1_DW20', '0x24D0', 'DPIO2') ('TX1_CH1_DW0', '0x2680', 'DPIO2') ('TX1_CH1_DW1', '0x2684', 'DPIO2') ('TX1_CH1_DW2', '0x2688', 'DPIO2') ('TX1_CH1_DW3', '0x268C', 'DPIO2') ('TX1_CH1_DW4', '0x2690', 'DPIO2') ('TX1_CH1_DW5', '0x2694', 'DPIO2') ('TX1_CH1_DW6', '0x2698', 'DPIO2') ('TX1_CH1_DW7', '0x269C', 'DPIO2') ('TX1_CH1_DW8', '0x26A0', 'DPIO2') ('TX1_CH1_DW9', '0x26A4', 'DPIO2') ('TX1_CH1_DW10', '0x26A8', 'DPIO2') ('TX1_CH1_DW11', '0x26AC', 'DPIO2') ('TX1_CH1_DW12', '0x26B0', 'DPIO2') ('TX1_CH1_DW13', '0x26B4', 'DPIO2') ('TX1_CH1_DW14', '0x26B8', 'DPIO2') ('TX1_CH1_DW15', '0x26BC', 'DPIO2') ('TX1_CH1_DW16', '0x26C0', 'DPIO2') ('TX1_CH1_DW17', '0x26C4', 'DPIO2') ('TX1_CH1_DW18', '0x26C8', 'DPIO2') ('TX1_CH1_DW19', '0x26CC', 'DPIO2') ('TX1_CH1_DW20', '0x26D0', 'DPIO2') ('PCS23_CH1_DW0', '0x2800', 'DPIO2') ('PCS23_CH1_DW1', '0x2804', 'DPIO2') ('PCS23_CH1_DW2', '0x2808', 'DPIO2') ('PCS23_CH1_DW3', '0x280C', 'DPIO2') ('PCS23_CH1_DW4', '0x2810', 'DPIO2') ('PCS23_CH1_DW5', '0x2814', 'DPIO2') ('PCS23_CH1_DW6', '0x2818', 'DPIO2') ('PCS23_CH1_DW7', '0x281C', 'DPIO2') ('PCS23_CH1_DW8', '0x2820', 'DPIO2') ('PCS23_CH1_DW9', '0x2824', 'DPIO2') ('PCS23_CH1_DW10', '0x2828', 'DPIO2') ('PCS23_CH1_DW11', '0x282C', 'DPIO2') ('PCS23_CH1_DW12', '0x2830', 'DPIO2') ('PCS23_CH1_DW13', '0x2834', 'DPIO2') ('PCS23_CH1_DW14', '0x2838', 'DPIO2') ('PCS23_CH1_DW15', '0x283C', 'DPIO2') ('PCS23_CH1_DW16', '0x2840', 'DPIO2') ('PCS23_CH1_DW17', '0x2844', 'DPIO2') ('PCS23_CH1_DW18', '0x2848', 'DPIO2') ('PCS23_CH1_DW19', '0x284C', 'DPIO2') ('PCS23_CH1_DW20', '0x2850', 'DPIO2') ('PCS23_CH1_DW21', '0x2854', 'DPIO2') ('PCS23_CH1_DW22', '0x2858', 'DPIO2') ('PCS23_CH1_DW23', '0x285C', 'DPIO2') ('PCS23_CH1_DW24', '0x2860', 'DPIO2') ('PCS23_CH1_DW25', '0x2864', 'DPIO2') ('TX2_CH1_DW0', '0x2880', 'DPIO2') ('TX2_CH1_DW1', '0x2884', 'DPIO2') ('TX2_CH1_DW2', '0x2888', 'DPIO2') ('TX2_CH1_DW3', '0x288C', 'DPIO2') ('TX2_CH1_DW4', '0x2890', 'DPIO2') ('TX2_CH1_DW5', '0x2894', 'DPIO2') ('TX2_CH1_DW6', '0x2898', 'DPIO2') ('TX2_CH1_DW7', '0x289C', 'DPIO2') ('TX2_CH1_DW8', '0x28A0', 'DPIO2') ('TX2_CH1_DW9', '0x28A4', 'DPIO2') ('TX2_CH1_DW10', '0x28A8', 'DPIO2') ('TX2_CH1_DW11', '0x28AC', 'DPIO2') ('TX2_CH1_DW12', '0x28B0', 'DPIO2') ('TX2_CH1_DW13', '0x28B4', 'DPIO2') ('TX2_CH1_DW14', '0x28B8', 'DPIO2') ('TX2_CH1_DW15', '0x28BC', 'DPIO2') ('TX2_CH1_DW16', '0x28C0', 'DPIO2') ('TX2_CH1_DW17', '0x28C4', 'DPIO2') ('TX2_CH1_DW18', '0x28C8', 'DPIO2') ('TX2_CH1_DW19', '0x28CC', 'DPIO2') ('TX2_CH1_DW20', '0x28D0', 'DPIO2') ('TX3_CH1_DW0', '0x2A80', 'DPIO2') ('TX3_CH1_DW1', '0x2A84', 'DPIO2') ('TX3_CH1_DW2', '0x2A88', 'DPIO2') ('TX3_CH1_DW3', '0x2A8C', 'DPIO2') ('TX3_CH1_DW4', '0x2A90', 'DPIO2') ('TX3_CH1_DW5', '0x2A94', 'DPIO2') ('TX3_CH1_DW6', '0x2A98', 'DPIO2') ('TX3_CH1_DW7', '0x2A9C', 'DPIO2') ('TX3_CH1_DW8', '0x2AA0', 'DPIO2') ('TX3_CH1_DW9', '0x2AA4', 'DPIO2') ('TX3_CH1_DW10', '0x2AA8', 'DPIO2') ('TX3_CH1_DW11', '0x2AAC', 'DPIO2') ('TX3_CH1_DW12', '0x2AB0', 'DPIO2') ('TX3_CH1_DW13', '0x2AB4', 'DPIO2') ('TX3_CH1_DW14', '0x2AB8', 'DPIO2') ('TX3_CH1_DW15', '0x2ABC', 'DPIO2') ('TX3_CH1_DW16', '0x2AC0', 'DPIO2') ('TX3_CH1_DW17', '0x2AC4', 'DPIO2') ('TX3_CH1_DW18', '0x2AC8', 'DPIO2') ('TX3_CH1_DW19', '0x2ACC', 'DPIO2') ('TX3_CH1_DW20', '0x2AD0', 'DPIO2') intel-gpu-tools-1.14/tools/registers/skl_display.txt0000644000175000017500000003207412665336131017664 00000000000000# CLOCKS ('DPLL_STATUS', '0x6c060', '') ('DPLL1_CFGCR1', '0x6c040', '') ('DPLL2_CFGCR1', '0x6c048', '') ('DPLL3_CFGCR1', '0x6c050', '') ('DPLL1_CFGCR2', '0x6c044', '') ('DPLL2_CFGCR2', '0x6c04c', '') ('DPLL3_CFGCR2', '0x6c054', '') ('DPLL_CTRL1', '0x6c058', '') ('DPLL_CTRL2', '0x6c05c', '') ('CDCLK_CTL', '0x46000', '') ('LCPLL1_CTL', '0x46010', '') ('LCPLL2_CTL', '0x46014', '') ('TRANS_CLK_SEL_A', '0x46140', '') ('TRANS_CLK_SEL_B', '0x46144', '') ('TRANS_CLK_SEL_C', '0x46148', '') ('WRPLL_CTL1', '0x46040', '') ('WRPLL_CTL2', '0x46060', '') # PIPE_A_PLANE ('PLANE_BUF_CFG_1_A', '0x7027c', '') ('PLANE_BUF_CFG_2_A', '0x7037c', '') ('PLANE_BUF_CFG_3_A', '0x7047c', '') ('PLANE_NV12_BUF_CFG_1_A', '0x70278', '') ('PLANE_NV12_BUF_CFG_2_A', '0x70378', '') ('PLANE_NV12_BUF_CFG_3_A', '0x70478', '') ('PLANE_CTL_1_A', '0x70180', '') ('PLANE_CTL_2_A', '0x70280', '') ('PLANE_CTL_3_A', '0x70380', '') ('PLANE_KEYMAX_1_A', '0x701a0', '') ('PLANE_KEYMAX_2_A', '0x702a0', '') ('PLANE_KEYMAX_3_A', '0x703a0', '') ('PLANE_KEYMSK_1_A', '0x70198', '') ('PLANE_KEYMSK_2_A', '0x70298', '') ('PLANE_KEYMSK_3_A', '0x70398', '') ('PLANE_KEYVAL_1_A', '0x70194', '') ('PLANE_KEYVAL_2_A', '0x70294', '') ('PLANE_KEYVAL_3_A', '0x70394', '') ('PLANE_OFFSET_1_A', '0x701a4', '') ('PLANE_OFFSET_2_A', '0x702a4', '') ('PLANE_OFFSET_3_A', '0x703a4', '') ('PLANE_AUX_OFFSET_1_A', '0x701c4', '') ('PLANE_AUX_OFFSET_2_A', '0x702c4', '') ('PLANE_AUX_OFFSET_3_A', '0x703c4', '') ('PLANE_POS_1_A', '0x7018c', '') ('PLANE_POS_2_A', '0x7028c', '') ('PLANE_POS_3_A', '0x7038c', '') ('PLANE_SIZE_1_A', '0x70190', '') ('PLANE_SIZE_2_A', '0x70290', '') ('PLANE_SIZE_3_A', '0x70390', '') ('PLANE_STRIDE_1_A', '0x70188', '') ('PLANE_STRIDE_2_A', '0x70288', '') ('PLANE_STRIDE_3_A', '0x70388', '') ('PLANE_SURF_1_A', '0x7019c', '') ('PLANE_SURF_2_A', '0x7029c', '') ('PLANE_SURF_3_A', '0x7039c', '') ('PLANE_SURFLIVE_1_A', '0x701ac', '') ('PLANE_SURFLIVE_2_A', '0x702ac', '') ('PLANE_SURFLIVE_3_A', '0x703ac', '') ('PLANE_WM_1_A_0', '0x70240', '') ('PLANE_WM_1_A_1', '0x70244', '') ('PLANE_WM_1_A_2', '0x70248', '') ('PLANE_WM_1_A_3', '0x7024c', '') ('PLANE_WM_1_A_4', '0x70250', '') ('PLANE_WM_1_A_5', '0x70254', '') ('PLANE_WM_1_A_6', '0x70258', '') ('PLANE_WM_1_A_7', '0x7025c', '') ('PLANE_WM_2_A_0', '0x70340', '') ('PLANE_WM_2_A_1', '0x70344', '') ('PLANE_WM_2_A_2', '0x70348', '') ('PLANE_WM_2_A_3', '0x7034c', '') ('PLANE_WM_2_A_4', '0x70350', '') ('PLANE_WM_2_A_5', '0x70354', '') ('PLANE_WM_2_A_6', '0x70358', '') ('PLANE_WM_2_A_7', '0x7035c', '') ('PLANE_WM_3_A_0', '0x70440', '') ('PLANE_WM_3_A_1', '0x70444', '') ('PLANE_WM_3_A_2', '0x70448', '') ('PLANE_WM_3_A_3', '0x7044c', '') ('PLANE_WM_3_A_4', '0x70450', '') ('PLANE_WM_3_A_5', '0x70454', '') ('PLANE_WM_3_A_6', '0x70458', '') ('PLANE_WM_3_A_7', '0x7045c', '') ('PLANE_WM_TRANS_1_A', '0x70268', '') ('PLANE_WM_TRANS_2_A', '0x70368', '') ('PLANE_WM_TRANS_3_A', '0x70468', '') # PIPE_A_CURSOR_PLANE ('CUR_BUF_CFG_A', '0x7017c', '') ('CUR_BASE_A', '0x70084', '') ('CUR_CTL_A', '0x70080', '') ('CUR_FBC_CTL_A', '0x700a0', '') ('CUR_POS_A', '0x70088', '') ('CUR_SURFLIVE_A', '0x700ac', '') ('CUR_WM_A_0', '0x70140', '') ('CUR_WM_A_1', '0x70144', '') ('CUR_WM_A_2', '0x70148', '') ('CUR_WM_A_3', '0x7014c', '') ('CUR_WM_A_4', '0x70150', '') ('CUR_WM_A_5', '0x70154', '') ('CUR_WM_A_6', '0x70158', '') ('CUR_WM_A_7', '0x7015c', '') ('CUR_WM_TRANS_A', '0x70168', '') # PIPE_SCALER_A ('PS_CTRL_1_A', '0x68180', '') ('PS_CTRL_2_A', '0x68280', '') ('PS_ECC_STAT_1_A', '0x681d0', '') ('PS_ECC_STAT_2_A', '0x682d0', '') ('PS_HPHASE_1_A', '0x68194', '') ('PS_HPHASE_2_A', '0x68294', '') ('PS_HSCALE_1_A', '0x68190', '') ('PS_HSCALE_2_A', '0x68290', '') ('PS_PWR_GATE_1_A', '0x68160', '') ('PS_PWR_GATE_2_A', '0x68260', '') ('PS_VPHASE_1_A', '0x68188', '') ('PS_VPHASE_2_A', '0x68288', '') ('PS_VSCALE_1_A', '0x68184', '') ('PS_VSCALE_2_A', '0x68284', '') ('PS_WIN_POS_1_A', '0x68170', '') ('PS_WIN_POS_2_A', '0x68270', '') ('PS_WIN_SZ_1_A', '0x68174', '') ('PS_WIN_SZ_2_A', '0x68274', '') # PIPE_B_PLANE ('PLANE_BUF_CFG_1_B', '0x7127c', '') ('PLANE_BUF_CFG_2_B', '0x7137c', '') ('PLANE_BUF_CFG_3_B', '0x7147c', '') ('PLANE_NV12_BUF_CFG_1_B', '0x71278', '') ('PLANE_NV12_BUF_CFG_2_B', '0x71378', '') ('PLANE_NV12_BUF_CFG_3_B', '0x71478', '') ('PLANE_CTL_1_B', '0x71180', '') ('PLANE_CTL_2_B', '0x71280', '') ('PLANE_CTL_3_B', '0x71380', '') ('PLANE_KEYMAX_1_B', '0x711a0', '') ('PLANE_KEYMAX_2_B', '0x712a0', '') ('PLANE_KEYMAX_3_B', '0x713a0', '') ('PLANE_KEYMSK_1_B', '0x71198', '') ('PLANE_KEYMSK_2_B', '0x71298', '') ('PLANE_KEYMSK_3_B', '0x71398', '') ('PLANE_KEYVAL_1_B', '0x71194', '') ('PLANE_KEYVAL_2_B', '0x71294', '') ('PLANE_KEYVAL_3_B', '0x71394', '') ('PLANE_OFFSET_1_B', '0x711a4', '') ('PLANE_OFFSET_2_B', '0x712a4', '') ('PLANE_OFFSET_3_B', '0x713a4', '') ('PLANE_AUX_OFFSET_1_B', '0x711c4', '') ('PLANE_AUX_OFFSET_2_B', '0x712c4', '') ('PLANE_AUX_OFFSET_3_B', '0x713c4', '') ('PLANE_POS_1_B', '0x7118c', '') ('PLANE_POS_2_B', '0x7128c', '') ('PLANE_POS_3_B', '0x7138c', '') ('PLANE_SIZE_1_B', '0x71190', '') ('PLANE_SIZE_2_B', '0x71290', '') ('PLANE_SIZE_3_B', '0x71390', '') ('PLANE_STRIDE_1_B', '0x71188', '') ('PLANE_STRIDE_2_B', '0x71288', '') ('PLANE_STRIDE_3_B', '0x71388', '') ('PLANE_SURF_1_B', '0x7119c', '') ('PLANE_SURF_2_B', '0x7129c', '') ('PLANE_SURF_3_B', '0x7139c', '') ('PLANE_SURFLIVE_1_B', '0x711ac', '') ('PLANE_SURFLIVE_2_B', '0x712ac', '') ('PLANE_SURFLIVE_3_B', '0x713ac', '') ('PLANE_WM_1_B_0', '0x71240', '') ('PLANE_WM_1_B_1', '0x71244', '') ('PLANE_WM_1_B_2', '0x71248', '') ('PLANE_WM_1_B_3', '0x7124c', '') ('PLANE_WM_1_B_4', '0x71250', '') ('PLANE_WM_1_B_5', '0x71254', '') ('PLANE_WM_1_B_6', '0x71258', '') ('PLANE_WM_1_B_7', '0x7125c', '') ('PLANE_WM_2_B_0', '0x71340', '') ('PLANE_WM_2_B_1', '0x71344', '') ('PLANE_WM_2_B_2', '0x71348', '') ('PLANE_WM_2_B_3', '0x7134c', '') ('PLANE_WM_2_B_4', '0x71350', '') ('PLANE_WM_2_B_5', '0x71354', '') ('PLANE_WM_2_B_6', '0x71358', '') ('PLANE_WM_2_B_7', '0x7135c', '') ('PLANE_WM_3_B_0', '0x71440', '') ('PLANE_WM_3_B_1', '0x71444', '') ('PLANE_WM_3_B_2', '0x71448', '') ('PLANE_WM_3_B_3', '0x7144c', '') ('PLANE_WM_3_B_4', '0x71450', '') ('PLANE_WM_3_B_5', '0x71454', '') ('PLANE_WM_3_B_6', '0x71458', '') ('PLANE_WM_3_B_7', '0x7145c', '') ('PLANE_WM_TRANS_1_B', '0x71268', '') ('PLANE_WM_TRANS_2_B', '0x71368', '') ('PLANE_WM_TRANS_3_B', '0x71468', '') # PIPE_B_CURSOR_PLANE ('CUR_BUF_CFG_B', '0x7117c', '') ('CUR_BASE_B', '0x71084', '') ('CUR_CTL_B', '0x71080', '') ('CUR_FBC_CTL_B', '0x710a0', '') ('CUR_POS_B', '0x71088', '') ('CUR_SURFLIVE_B', '0x710ac', '') ('CUR_WM_B_0', '0x71140', '') ('CUR_WM_B_1', '0x71144', '') ('CUR_WM_B_2', '0x71148', '') ('CUR_WM_B_3', '0x7114c', '') ('CUR_WM_B_4', '0x71150', '') ('CUR_WM_B_5', '0x71154', '') ('CUR_WM_B_6', '0x71158', '') ('CUR_WM_B_7', '0x7115c', '') ('CUR_WM_TRANS_B', '0x71168', '') # PIPE_SCALER_B ('PS_CTRL_1_B', '0x68980', '') ('PS_CTRL_2_B', '0x68a80', '') ('PS_ECC_STAT_1_B', '0x689d0', '') ('PS_ECC_STAT_2_B', '0x68ad0', '') ('PS_HPHASE_1_B', '0x68994', '') ('PS_HPHASE_2_B', '0x68a94', '') ('PS_HSCALE_1_B', '0x68990', '') ('PS_HSCALE_2_B', '0x68a90', '') ('PS_PWR_GATE_1_B', '0x68960', '') ('PS_PWR_GATE_2_B', '0x68a60', '') ('PS_VPHASE_1_B', '0x68988', '') ('PS_VPHASE_2_B', '0x68a88', '') ('PS_VSCALE_1_B', '0x68984', '') ('PS_VSCALE_2_B', '0x68a84', '') ('PS_WIN_POS_1_B', '0x68970', '') ('PS_WIN_POS_2_B', '0x68a70', '') # PIPE_C_PLANE ('PLANE_BUF_CFG_1_C', '0x7227c', '') ('PLANE_BUF_CFG_2_C', '0x7237c', '') ('PLANE_BUF_CFG_3_C', '0x7247c', '') ('PLANE_NV12_BUF_CFG_1_C', '0x72278', '') ('PLANE_NV12_BUF_CFG_2_C', '0x72378', '') ('PLANE_NV12_BUF_CFG_3_C', '0x72478', '') ('PLANE_AUX_DIST_1_C', '0x721c0', '') ('PLANE_AUX_DIST_2_C', '0x722c0', '') ('PLANE_AUX_DIST_3_C', '0x723c0', '') ('PLANE_CTL_1_C', '0x72180', '') ('PLANE_CTL_2_C', '0x72280', '') ('PLANE_CTL_3_C', '0x72380', '') ('PLANE_KEYMAX_1_C', '0x721a0', '') ('PLANE_KEYMAX_2_C', '0x722a0', '') ('PLANE_KEYMAX_3_C', '0x723a0', '') ('PLANE_KEYMSK_1_C', '0x72198', '') ('PLANE_KEYMSK_2_C', '0x72298', '') ('PLANE_KEYMSK_3_C', '0x72398', '') ('PLANE_KEYVAL_1_C', '0x72194', '') ('PLANE_KEYVAL_2_C', '0x72294', '') ('PLANE_KEYVAL_3_C', '0x72394', '') ('PLANE_OFFSET_1_C', '0x721a4', '') ('PLANE_OFFSET_2_C', '0x722a4', '') ('PLANE_OFFSET_3_C', '0x723a4', '') ('PLANE_AUX_OFFSET_1_C', '0x721c4', '') ('PLANE_AUX_OFFSET_2_C', '0x722c4', '') ('PLANE_AUX_OFFSET_3_C', '0x723c4', '') ('PLANE_POS_1_C', '0x7218c', '') ('PLANE_POS_2_C', '0x7228c', '') ('PLANE_POS_3_C', '0x7238c', '') ('PLANE_SIZE_1_C', '0x72190', '') ('PLANE_SIZE_2_C', '0x72290', '') ('PLANE_SIZE_3_C', '0x72390', '') ('PLANE_STRIDE_1_C', '0x72188', '') ('PLANE_STRIDE_2_C', '0x72288', '') ('PLANE_STRIDE_3_C', '0x72388', '') ('PLANE_SURF_1_C', '0x7219c', '') ('PLANE_SURF_2_C', '0x7229c', '') ('PLANE_SURF_3_C', '0x7239c', '') ('PLANE_SURFLIVE_1_C', '0x721ac', '') ('PLANE_SURFLIVE_2_C', '0x722ac', '') ('PLANE_SURFLIVE_3_C', '0x723ac', '') ('PLANE_WM_1_C_0', '0x72240', '') ('PLANE_WM_1_C_1', '0x72244', '') ('PLANE_WM_1_C_2', '0x72248', '') ('PLANE_WM_1_C_3', '0x7224c', '') ('PLANE_WM_1_C_4', '0x72250', '') ('PLANE_WM_1_C_5', '0x72254', '') ('PLANE_WM_1_C_6', '0x72258', '') ('PLANE_WM_1_C_7', '0x7225c', '') ('PLANE_WM_2_C_0', '0x72340', '') ('PLANE_WM_2_C_1', '0x72344', '') ('PLANE_WM_2_C_2', '0x72348', '') ('PLANE_WM_2_C_3', '0x7234c', '') ('PLANE_WM_2_C_4', '0x72350', '') ('PLANE_WM_2_C_5', '0x72354', '') ('PLANE_WM_2_C_6', '0x72358', '') ('PLANE_WM_2_C_7', '0x7235c', '') ('PLANE_WM_3_C_0', '0x72440', '') ('PLANE_WM_3_C_1', '0x72444', '') ('PLANE_WM_3_C_2', '0x72448', '') ('PLANE_WM_3_C_3', '0x7244c', '') ('PLANE_WM_3_C_4', '0x72450', '') ('PLANE_WM_3_C_5', '0x72454', '') ('PLANE_WM_3_C_6', '0x72458', '') ('PLANE_WM_3_C_7', '0x7245c', '') ('PLANE_WM_TRANS_1_C', '0x72268', '') ('PLANE_WM_TRANS_2_C', '0x72368', '') ('PLANE_WM_TRANS_3_C', '0x72468', '') # PIPE_C_CURSOR_PLANE ('CUR_BUF_CFG_C', '0x7217c', '') ('CUR_BASE_C', '0x72084', '') ('CUR_CTL_C', '0x72080', '') ('CUR_FBC_CTL_C', '0x720a0', '') ('CUR_POS_C', '0x72088', '') ('CUR_SURFLIVE_C', '0x720ac', '') ('CUR_WM_C_0', '0x72140', '') ('CUR_WM_C_1', '0x72144', '') ('CUR_WM_C_2', '0x72148', '') ('CUR_WM_C_3', '0x7214c', '') ('CUR_WM_C_4', '0x72150', '') ('CUR_WM_C_5', '0x72154', '') ('CUR_WM_C_6', '0x72158', '') ('CUR_WM_C_7', '0x7215c', '') ('CUR_WM_TRANS_C', '0x72168', '') # PIPE_SCALER_C ('PS_CTRL_1_C', '0x69180', '') ('PS_ECC_STAT_1_C', '0x691d0', '') ('PS_HPHASE_1_C', '0x69194', '') ('PS_HSCALE_1_C', '0x69190', '') ('PS_PWR_GATE_1_C', '0x69160', '') ('PS_VPHASE_1_C', '0x69188', '') ('PS_VSCALE_1_C', '0x69184', '') ('PS_WIN_POS_1_C', '0x69170', '') ('PS_WIN_SZ_1_C', '0x69174', '') # TRANSCODER_EDP_CONTROL ('TRANS_CONF_EDP', '0x7f008', '') # TRANSCODER_EDP_TIMING ('TRANS_HBLANK_EDP', '0x6f004', '') ('TRANS_HSYNC_EDP', '0x6f008', '') ('TRANS_HTOTAL_EDP', '0x6f000', '') ('TRANS_SPACE_EDP', '0x6f024', '') ('TRANS_VBLANK_EDP', '0x6f010', '') ('TRANS_VSYNC_EDP', '0x6f014', '') ('TRANS_VSYNCSHIFT_EDP', '0x6f028', '') ('TRANS_VTOTAL_EDP', '0x6f00c', '') # TRANSCODER_EDP_M_N ('TRANS_DATAM1_EDP', '0x6f030', '') ('TRANS_DATAN1_EDP', '0x6f034', '') ('TRANS_LINKM1_EDP', '0x6f040', '') ('TRANS_LINKN1_EDP', '0x6f044', '') # TRANSCODER_EDP_DDI_CONTROL ('TRANS_DDI_FUNC_CTL_EDP', '0x6f400', '') ('TRANS_MSA_MISC_EDP', '0x6f410', '') # TRANSCODER_A_CONTROL ('TRANS_CONF_A', '0x70008', '') # TRANSCODER_A_TIMING ('TRANS_HBLANK_A', '0x60004', '') ('TRANS_HSYNC_A', '0x60008', '') ('TRANS_HTOTAL_A', '0x60000', '') ('TRANS_MULT_A', '0x6002c', '') ('TRANS_SPACE_A', '0x60024', '') ('TRANS_VBLANK_A', '0x60010', '') ('TRANS_VSYNC_A', '0x60014', '') ('TRANS_VSYNCSHIFT_A', '0x60028', '') ('TRANS_VTOTAL_A', '0x6000c', '') # TRANSCODER_A_M_N ('TRANS_DATAM1_A', '0x60030', '') ('TRANS_DATAN1_A', '0x60034', '') ('TRANS_LINKM1_A', '0x60040', '') ('TRANS_LINKN1_A', '0x60044', '') # TRANSCODER_A_DDI_CONTROL ('TRANS_DDI_FUNC_CTL_A', '0x60400', '') ('TRANS_MSA_MISC_A', '0x60410', '') # TRANSCODER_B_CONTROL ('TRANS_CONF_B', '0x71008', '') # TRANSCODER_B_TIMING ('TRANS_HBLANK_B', '0x61004', '') ('TRANS_HSYNC_B', '0x61008', '') ('TRANS_HTOTAL_B', '0x61000', '') ('TRANS_MULT_B', '0x6102c', '') ('TRANS_SPACE_B', '0x61024', '') ('TRANS_VBLANK_B', '0x61010', '') ('TRANS_VSYNC_B', '0x61014', '') ('TRANS_VSYNCSHIFT_B', '0x61028', '') ('TRANS_VTOTAL_B', '0x6100c', '') # TRANSCODER_B_M_N ('TRANS_DATAM1_B', '0x61030', '') ('TRANS_DATAN1_B', '0x61034', '') ('TRANS_LINKM1_B', '0x61040', '') ('TRANS_LINKN1_B', '0x61044', '') # TRANSCODER_B_DDI_CONTROL ('TRANS_DDI_FUNC_CTL_B', '0x61400', '') ('TRANS_MSA_MISC_B', '0x61410', '') # TRANSCODER_C_CONTROL ('TRANS_CONF_C', '0x72008', '') # TRANSCODER_C_TIMING ('TRANS_HBLANK_C', '0x62004', '') ('TRANS_HSYNC_C', '0x62008', '') ('TRANS_HTOTAL_C', '0x62000', '') ('TRANS_MULT_C', '0x6202c', '') ('TRANS_SPACE_C', '0x62024', '') ('TRANS_VBLANK_C', '0x62010', '') ('TRANS_VSYNC_C', '0x62014', '') ('TRANS_VSYNCSHIFT_C', '0x62028', '') ('TRANS_VTOTAL_C', '0x6200c', '') # TRANSCODER_C_M_N ('TRANS_DATAM1_C', '0x62030', '') ('TRANS_DATAN1_C', '0x62034', '') ('TRANS_LINKM1_C', '0x62040', '') ('TRANS_LINKN1_C', '0x62044', '') # TRANSCODER_C_DDI_CONTROL ('TRANS_DDI_FUNC_CTL_C', '0x62400', '') ('TRANS_MSA_MISC_C', '0x62410', '') # WATERMARK ('WM_LINETIME_A', '0x45270', '') ('WM_LINETIME_B', '0x45274', '') ('WM_LINETIME_C', '0x45278', '') ('WM_MISC', '0x45260', '') intel-gpu-tools-1.14/tools/registers/broadwell0000644000175000017500000000022112665336131016470 00000000000000common_display.txt gen7_other.txt haswell_other.txt gen8_interrupt.txt gen8_other.txt audio_config_haswell_plus.txt audio_debug_haswell_plus.txt intel-gpu-tools-1.14/tools/intel_bios_dumper.c0000644000175000017500000000566612665336131016454 00000000000000/* * Copyright © 2007 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. * * Authors: * Eric Anholt * */ #include #include #include #include #include #include #include #include #include #include #ifndef DEFFILEMODE #define DEFFILEMODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP|S_IROTH|S_IWOTH) /* 0666 */ #endif static void __attribute__((noreturn)) usage(void) { fprintf(stderr, "usage: bios_dumper \n"); exit(1); } int main(int argc, char **argv) { struct pci_device *dev; void *bios; int error, fd; if (argc != 2) usage(); error = pci_system_init(); if (error != 0) { fprintf(stderr, "Couldn't initialize PCI system: %s\n", strerror(error)); exit(1); } /* Grab the graphics card */ dev = pci_device_find_by_slot(0, 0, 2, 0); if (dev == NULL) errx(1, "Couldn't find graphics card"); error = pci_device_probe(dev); if (error != 0) { fprintf(stderr, "Couldn't probe graphics card: %s\n", strerror(error)); exit(1); } if (dev->vendor_id != 0x8086) errx(1, "Graphics card is non-intel"); /* Some versions of libpciaccess correct this automatically, but some * don't. */ if (dev->rom_size == 0) dev->rom_size = 64 * 1024; bios = malloc(dev->rom_size); if (bios == NULL) errx(1, "Couldn't allocate memory for BIOS data\n"); error = pci_device_read_rom(dev, bios); if (error != 0) { fprintf(stderr, "Couldn't read graphics card ROM: %s\n", strerror(error)); exit(1); } fd = open(argv[1], O_RDWR | O_CREAT | O_TRUNC, DEFFILEMODE); if (fd < 0) { fprintf(stderr, "Couldn't open output: %s\n", strerror(errno)); exit(1); } if (write(fd, bios, dev->rom_size) < dev->rom_size) { fprintf(stderr, "Couldn't write BIOS data: %s\n", strerror(errno)); exit(1); } close(fd); pci_system_cleanup(); return 0; } intel-gpu-tools-1.14/tools/intel_dump_decode.c0000644000175000017500000001107012665336131016376 00000000000000/* * Copyright © 2010 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ #define _GNU_SOURCE #include #include #include #include #include #include #include #include #include struct drm_intel_decode *ctx; static void read_bin_file(const char * filename) { uint32_t buf[16384]; int fd, offset, ret; if (!strcmp(filename, "-")) fd = fileno(stdin); else fd = open (filename, O_RDONLY); if (fd < 0) { fprintf (stderr, "Failed to open %s: %s\n", filename, strerror (errno)); exit (1); } drm_intel_decode_set_dump_past_end(ctx, 1); offset = 0; while ((ret = read (fd, buf, sizeof(buf))) > 0) { drm_intel_decode_set_batch_pointer(ctx, buf, offset, ret/4); drm_intel_decode(ctx); offset += ret; } close (fd); } static void read_data_file(const char * filename) { FILE *file; uint32_t *data = NULL; int data_size = 0, count = 0, line_number = 0, matched; char *line = NULL; size_t line_size; uint32_t offset, value; uint32_t gtt_offset = 0; if (!strcmp(filename, "-")) file = stdin; else file = fopen (filename, "r"); if (file == NULL) { fprintf (stderr, "Failed to open %s: %s\n", filename, strerror (errno)); exit (1); } while (getline (&line, &line_size, file) > 0) { line_number++; matched = sscanf (line, "%08x : %08x", &offset, &value); if (matched != 2) { printf("ignoring line %s", line); continue; } count++; if (count > data_size) { data_size = data_size ? data_size * 2 : 1024; data = realloc (data, data_size * sizeof (uint32_t)); if (data == NULL) { fprintf (stderr, "Out of memory.\n"); exit (1); } } data[count-1] = value; } if (count) { drm_intel_decode_set_batch_pointer(ctx, data, gtt_offset, count); drm_intel_decode(ctx); } free (data); free (line); fclose (file); } static void read_autodetect_file(const char * filename) { int binary = 0, c; FILE *file; file = fopen (filename, "r"); if (file == NULL) { fprintf (stderr, "Failed to open %s: %s\n", filename, strerror (errno)); exit (1); } while ((c = fgetc(file)) != EOF) { /* totally lazy binary detector */ if (c < 10) { binary = 1; break; } } fclose(file); if (binary == 1) read_bin_file(filename); else read_data_file(filename); } int main (int argc, char *argv[]) { uint32_t devid = 0xa011; char *devid_str = NULL; int i, c; int option_index = 0; int binary = -1; static struct option long_options[] = { {"devid", 1, 0, 'd'}, {"ascii", 0, 0, 'a'}, {"binary", 0, 0, 'b'}, { 0 } }; devid_str = getenv("INTEL_DEVID_OVERRIDE"); while((c = getopt_long(argc, argv, "ad:b", long_options, &option_index)) != -1) { switch(c) { case 'd': devid_str = optarg; break; case 'b': binary = 1; break; case 'a': binary = 0; break; default: printf("unkown command options\n"); break; } } if (devid_str) devid = strtoul(devid_str, NULL, 0); ctx = drm_intel_decode_context_alloc(devid); if (optind == argc) { fprintf(stderr, "no input file given\n"); exit(-1); } for (i = optind; i < argc; i++) { /* For stdin input, let's read as data file */ if (!strcmp(argv[i], "-")) { read_data_file(argv[i]); continue; } if (binary == 1) read_bin_file(argv[i]); else if (binary == 0) read_data_file(argv[i]); else read_autodetect_file(argv[i]); } return 0; } intel-gpu-tools-1.14/tools/intel_gtt.c0000644000175000017500000001314712665336131014733 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. * * Authors: * Eric Anholt * */ #define __STDC_FORMAT_MACROS #include #include #include #include #include #include #include #include "intel_io.h" #include "intel_chipset.h" #define KB(x) ((x) * 1024) #define MB(x) ((x) * 1024 * 1024) unsigned char *gtt; uint32_t devid; typedef uint32_t gen6_gtt_pte_t; typedef uint64_t gen8_gtt_pte_t; static gen6_gtt_pte_t gen6_gtt_pte(const unsigned i) { return *((volatile gen6_gtt_pte_t *)(gtt) + i); } static gen8_gtt_pte_t gen8_gtt_pte(const unsigned i) { return *((volatile gen8_gtt_pte_t *)(gtt) + i); } static uint64_t ingtt(const unsigned offset) { if (intel_gen(devid) < 8) return gen6_gtt_pte(offset/KB(4)); return gen8_gtt_pte(offset/KB(4)); } static uint64_t get_phys(uint32_t pt_offset) { uint64_t pae = 0; uint64_t phys = ingtt(pt_offset); if (intel_gen(devid) < 4 && !IS_G33(devid)) return phys & ~0xfff; switch (intel_gen(devid)) { case 3: case 4: case 5: pae = (phys & 0xf0) << 28; break; case 6: case 7: if (IS_HASWELL(devid)) pae = (phys & 0x7f0) << 28; else pae = (phys & 0xff0) << 28; break; case 8: case 9: phys = phys & 0x7ffffff000; break; default: fprintf(stderr, "Unsupported platform\n"); exit(-1); } return (phys | pae) & ~0xfff; } static void pte_dump(int size, uint32_t offset) { int pte_size; int entries; unsigned int i; /* Want to print 4 ptes at a time (4b PTE assumed). */ if (size % 16) size = (size + 16) & ~0xffff; if (intel_gen(devid) < 8) pte_size = 4; else pte_size = 8; entries = size / pte_size; printf("GTT offset | %d PTEs (%d MB)\n", entries, entries * 4096 / 1024 / 1024); printf("----------------------------------------------------------\n"); for (i = 0; i < entries; i += 4) { if (intel_gen(devid) < 8) { printf(" 0x%08x | 0x%08x 0x%08x 0x%08x 0x%08x\n", KB(4 * i), gen6_gtt_pte(i + 0), gen6_gtt_pte(i + 1), gen6_gtt_pte(i + 2), gen6_gtt_pte(i + 3) ); } else { printf(" 0x%08x | 0x%016" PRIx64 " 0x%016" PRIx64 " 0x%016" PRIx64 " 0x%016" PRIx64 " \n", KB(4 * i), gen8_gtt_pte(i + 0), gen8_gtt_pte(i + 1), gen8_gtt_pte(i + 2), gen8_gtt_pte(i + 3) ); } } } int main(int argc, char **argv) { struct pci_device *pci_dev; unsigned int start, gtt_size; int flag[] = { PCI_DEV_MAP_FLAG_WRITE_COMBINE, PCI_DEV_MAP_FLAG_WRITABLE, 0 }, f; pci_dev = intel_get_pci_device(); devid = pci_dev->device_id; if (IS_GEN2(devid)) { printf("Unsupported chipset for gtt dumper\n"); exit(1); } for (f = 0; flag[f] != 0; f++) { if (IS_GEN3(devid)) { /* 915/945 chips has GTT range in bar 3 */ if (pci_device_map_range(pci_dev, pci_dev->regions[3].base_addr, pci_dev->regions[3].size, flag[f], (void **)>t) == 0) break; } else { unsigned offset; offset = pci_dev->regions[0].size / 2; if (IS_GEN4(devid)) offset = KB(512); if (pci_device_map_range(pci_dev, pci_dev->regions[0].base_addr + offset, offset, flag[f], (void **)>t) == 0) break; } } if (flag[f] == 0) { printf("Failed to map gtt\n"); exit(1); } gtt_size = pci_dev->regions[0].size / 2; if (argc > 1 && !strncmp("-d", argv[1], 2)) { pte_dump(gtt_size, 0); return 0; } for (start = 0; start < gtt_size; start += KB(4)) { uint64_t start_phys = get_phys(start); uint32_t end; int constant_length = 0; int linear_length = 0; /* Check if it's a linear sequence */ for (end = start + KB(4); end < gtt_size; end += KB(4)) { uint64_t end_phys = get_phys(end); if (end_phys == start_phys + (end - start)) linear_length++; else break; } if (linear_length > 0) { printf("0x%08x - 0x%08x: linear from " "0x%" PRIx64 " to 0x%" PRIx64 "\n", start, end - KB(4), start_phys, start_phys + (end - start) - KB(4)); start = end - KB(4); continue; } /* Check if it's a constant sequence */ for (end = start + KB(4); end < gtt_size; end += KB(4)) { uint64_t end_phys = get_phys(end); if (end_phys == start_phys) constant_length++; else break; } if (constant_length > 0) { printf("0x%08x - 0x%08x: constant 0x%" PRIx64 "\n", start, end - KB(4), start_phys); start = end - KB(4); continue; } printf("0x%08x: 0x%" PRIx64 "\n", start, start_phys); } return 0; } intel-gpu-tools-1.14/tools/Makefile.am0000644000175000017500000000132712665336131014627 00000000000000include Makefile.sources SUBDIRS = null_state_gen registers AM_CPPFLAGS = -I$(top_srcdir) -I$(top_srcdir)/lib AM_CFLAGS = $(DEBUG_CFLAGS) $(DRM_CFLAGS) $(PCIACCESS_CFLAGS) $(CWARNFLAGS) $(CAIRO_CFLAGS) $(LIBUNWIND_CFLAGS) -DPKGDATADIR=\"$(pkgdatadir)\" LDADD = $(top_builddir)/lib/libintel_tools.la $(DRM_LIBS) $(PCIACCESS_LIBS) $(CAIRO_LIBS) $(LIBUDEV_LIBS) $(LIBUNWIND_LIBS) -lm AM_LDFLAGS = -Wl,--as-needed # aubdumper module_LTLIBRARIES = intel_aubdump.la moduledir = $(libdir) intel_aubdump_la_LDFLAGS = -module -avoid-version -no-undefined intel_aubdump_la_SOURCES = aubdump.c intel_aub.h intel_aubdump_la_LIBADD = $(top_builddir)/lib/libintel_tools.la -ldl bin_SCRIPTS = intel_aubdump CLEANFILES = $(bin_SCRIPTS) intel-gpu-tools-1.14/tools/intel_firmware_decode.c0000644000175000017500000001510712665336131017252 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Damien Lespiau */ #include #include #include #include #include #include #include #include #include #include #include "igt_core.h" #define __packed __attribute__((packed)) struct intel_css_header { /* 0x09 for DMC */ uint32_t module_type; /* Includes the DMC specific header in dwords */ uint32_t header_len; /* always value would be 0x10000 */ uint32_t header_ver; /* Not used */ uint32_t module_id; /* Not used */ uint32_t module_vendor; /* in YYYYMMDD format */ uint32_t date; /* Size in dwords (CSS_Headerlen + PackageHeaderLen + dmc FWsLen)/4 */ uint32_t size; /* Not used */ uint32_t key_size; /* Not used */ uint32_t modulus_size; /* Not used */ uint32_t exponent_size; /* Not used */ uint32_t reserved1[12]; /* Major Minor */ uint32_t version; /* Not used */ uint32_t reserved2[8]; /* Not used */ uint32_t kernel_header_info; } __packed; struct intel_fw_info { uint16_t reserved1; /* Stepping (A, B, C, ..., *). * is a wildcard */ char stepping; /* Sub-stepping (0, 1, ..., *). * is a wildcard */ char substepping; uint32_t offset; uint32_t reserved2; } __packed; struct intel_package_header { /* DMC container header length in dwords */ unsigned char header_len; /* always value would be 0x01 */ unsigned char header_ver; unsigned char reserved[10]; /* Number of valid entries in the FWInfo array below */ uint32_t num_entries; struct intel_fw_info fw_info[20]; } __packed; struct intel_dmc_header { /* always value would be 0x40403E3E */ uint32_t signature; /* DMC binary header length */ unsigned char header_len; /* 0x01 */ unsigned char header_ver; /* Reserved */ uint16_t dmcc_ver; /* Major, Minor */ uint32_t project; /* Firmware program size (excluding header) in dwords */ uint32_t fw_size; /* Major Minor version */ uint32_t fw_version; /* Number of valid MMIO cycles present. */ uint32_t mmio_count; /* MMIO address */ uint32_t mmioaddr[8]; /* MMIO data */ uint32_t mmiodata[8]; /* FW filename */ unsigned char dfile[32]; uint32_t reserved1[2]; } __packed; typedef struct { int fd; uint8_t *base; struct intel_css_header *css_header; struct intel_package_header *package_header; } csr_t; static void csr_open(csr_t *ctx, const char *filename) { struct stat st; ctx->fd = open(filename, O_RDWR); igt_fail_on_f(ctx->fd == -1, "Couldn't open %s\n", filename); fstat(ctx->fd, &st); ctx->base = mmap(NULL, st.st_size, PROT_READ | PROT_WRITE, MAP_PRIVATE, ctx->fd, 0); igt_fail_on_f(ctx->base == MAP_FAILED, "Couldn't mmap %s\n", filename); printf("Firmware: %s (%"PRId64" bytes)\n", filename, (int64_t)st.st_size); ctx->css_header = (struct intel_css_header *)ctx->base; ctx->package_header = (struct intel_package_header *) (ctx->base + sizeof(*ctx->css_header)); } #define print_d32(p, field) \ printf(" "#field": %u\n", (p)->field) #define print_x32(p, field) \ printf(" "#field": 0x%x\n", (p)->field) #define print_s(p, field) \ printf(" "#field": %s\n", (p)->field) static const char *module_type_name(uint32_t module_type) { switch (module_type) { case 0x9: return "DMC"; default: return "Unknown"; } } static void dump_css(csr_t *ctx) { struct intel_css_header *css = ctx->css_header; printf("CSS header (%zd bytes)\n", sizeof(*css)); printf(" module_type: %s (%d)\n", module_type_name(css->module_type), css->module_type); print_d32(css, header_len); print_x32(css, header_ver); print_x32(css, module_id); print_x32(css, module_vendor); print_x32(css, date); print_d32(css, size); print_d32(css, key_size); print_d32(css, modulus_size); print_d32(css, exponent_size); /* uint32_t reserved1[12]; */ printf(" version: %d.%d (0x%x)\n", css->version >> 16, css->version & 0xffff, css->version); /* uint32_t reserved2[8]; */ print_x32(css, kernel_header_info); } static void dump_dmc(csr_t *ctx, struct intel_fw_info *info) { struct intel_dmc_header *dmc; unsigned int i; if (info->offset == 0xffffffff) return; dmc = (struct intel_dmc_header *)(ctx->base + sizeof(*ctx->css_header) + sizeof(*ctx->package_header) + info->offset); print_x32(dmc, signature); print_d32(dmc, header_len); print_d32(dmc, header_ver); print_d32(dmc, dmcc_ver); print_x32(dmc, project); print_d32(dmc, fw_size); print_x32(dmc, fw_version); print_d32(dmc, mmio_count); for (i = 0; i < dmc->mmio_count; i++) { printf(" write(0x%08x, 0x%08x)\n", dmc->mmioaddr[i], dmc->mmiodata[i]); } } static void dump_package(csr_t *ctx) { struct intel_package_header *package = ctx->package_header; unsigned int i; printf("Package header (%zd bytes)\n", sizeof(*package)); print_d32(package, header_len); print_d32(package, header_ver); /* unsigned char reserved[10]; */ print_d32(package, num_entries); for (i = 0; i < package->num_entries; i++) { struct intel_fw_info *info = &package->fw_info[i]; printf("Firmware #%d\n", i + 1); printf(" stepping: %c.%c\n", info->stepping, info->substepping); print_d32(info, offset); dump_dmc(ctx, info); } } static void csr_dump(csr_t *ctx) { dump_css(ctx); dump_package(ctx); } static csr_t ctx; int main(int argc, char **argv) { if (argc != 2) { fprintf(stderr, "Usage: %s firmware.bin\n", argv[0]); return 1; } csr_open(&ctx, argv[1]); csr_dump(&ctx); return 0; } intel-gpu-tools-1.14/tools/intel_panel_fitter.c0000644000175000017500000002100312665336131016577 00000000000000/* * Copyright © 2012 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. * * Authors: * Paulo Zanoni */ #include #include #include #include #include #include #include "intel_io.h" #include "intel_chipset.h" #include "intel_reg.h" int gen; uint32_t HTOTAL[] = { 0x60000, 0x61000, 0x62000 }; uint32_t VTOTAL[] = { 0x6000C, 0x6100C, 0x6200C }; uint32_t PIPECONF[] = { 0x70008, 0x71008, 0x72008 }; uint32_t PIPESRC[] = { 0x6001C, 0x6101C, 0x6201C }; uint32_t PF_CTRL1[] = { 0x68080, 0x68880, 0x69080 }; uint32_t PF_WIN_POS[] = { 0x68070, 0x68870, 0x69070 }; uint32_t PF_WIN_SZ[] = { 0x68074, 0x68874, 0x69074 }; #define PIPECONF_ENABLE (1 << 31) #define PIPECONF_INTERLACE_MASK (7 << 21) #define PIPECONF_PF_PD (0 << 21) #define PIPECONF_PF_ID (1 << 21) #define PIPECONF_IF_ID (3 << 21) #define HTOTAL_ACTIVE_MASK (0xFFF << 0) #define VTOTAL_ACTIVE_MASK (0xFFF << 0) #define PIPESRC_HORIZ_MASK (0xFFF << 16) #define PIPESRC_VERT_MASK (0xFFF << 0) /*#define PF_ENABLE (1 << 31)*/ #define PF_PIPE_MASK (3 << 29) #define PF_FILTER_MASK (3 << 23) #define PF_FILTER_MED (1 << 23) #define PF_PIPE_A (0 << 29) #define PF_PIPE_B (1 << 29) #define PF_PIPE_C (2 << 29) #define PF_WIN_SZ_X_MASK (0x1FFF << 16) #define PF_WIN_SZ_Y_MASK (0xFFF << 0) struct pipe_info { bool enabled; bool pf_enabled; uint32_t interlace_mode; uint32_t tot_width; /* htotal */ uint32_t tot_height; /* vtotal */ uint32_t src_width; /* pipesrc.x */ uint32_t src_height; /* pipesrc.y */ uint32_t dst_width; /* pf_win_sz.x */ uint32_t dst_height; /* pf_win_sz.y */ }; static void read_pipe_info(int intel_pipe, struct pipe_info *info) { uint32_t conf, vtotal, htotal, src, ctrl1, win_sz; conf = INREG(PIPECONF[intel_pipe]); htotal = INREG(HTOTAL[intel_pipe]); vtotal = INREG(VTOTAL[intel_pipe]); src = INREG(PIPESRC[intel_pipe]); ctrl1 = INREG(PF_CTRL1[intel_pipe]); win_sz = INREG(PF_WIN_SZ[intel_pipe]); info->enabled = (conf & PIPECONF_ENABLE) ? true : false; info->tot_width = (htotal & HTOTAL_ACTIVE_MASK) + 1; info->tot_height = (vtotal & VTOTAL_ACTIVE_MASK) + 1; info->src_width = ((src & PIPESRC_HORIZ_MASK) >> 16) + 1; info->src_height = (src & PIPESRC_VERT_MASK) + 1; info->interlace_mode = conf & PIPECONF_INTERLACE_MASK; info->pf_enabled = ctrl1 & PF_ENABLE; info->dst_width = (win_sz & PF_WIN_SZ_X_MASK) >> 16; info->dst_height = win_sz & PF_WIN_SZ_Y_MASK; } static void dump_pipe(int intel_pipe) { struct pipe_info info; read_pipe_info(intel_pipe, &info); printf("\nPipe %c:\n", intel_pipe + 'A'); printf("- %s\n", info.enabled ? "enabled" : "disabled"); if (!info.enabled) return; switch (info.interlace_mode) { case PIPECONF_PF_PD: printf("- progressive\n"); break; case PIPECONF_PF_ID: printf("- interlaced (progressive fetch)\n"); break; case PIPECONF_IF_ID: printf("- interlaced (interlaced fetch)\n"); break; default: assert(0); } printf("- pf %s\n", info.pf_enabled ? "enabled" : "disabled"); if (!info.pf_enabled) return; printf("- tot %dx%d\n", info.tot_width, info.tot_height); printf("- src %dx%d\n", info.src_width, info.src_height); printf("- dst %dx%d\n", info.dst_width, info.dst_height); } static void dump_info(void) { int i; int pipes; if (gen < 7) pipes = 2; else pipes = 3; for (i = 0; i < pipes; i++) { dump_pipe(i); } } static int change_screen_size(int intel_pipe, int x, int y) { struct pipe_info info; uint32_t dst_width, dst_height, pos_x, pos_y; uint32_t ctrl1_val; uint32_t win_pos_val; uint32_t win_sz_val; read_pipe_info(intel_pipe, &info); if (x == 0) { if (info.dst_width != 0) dst_width = info.dst_width; else dst_width = info.src_width; } else { dst_width = x; } if (y == 0) { if (info.dst_height != 0) dst_height = info.dst_height; else dst_height = info.src_height; } else { dst_height = y; } pos_x = abs((info.tot_width - dst_width)) / 2; pos_y = abs((info.tot_height - dst_height)) / 2; if (pos_x == 1) pos_x = 0; if (info.src_width / (double) dst_width > 1.125) { printf("X is too small\n"); return 1; } else if (info.tot_width < dst_width) { printf("X is too big\n"); return 1; } else if (dst_width & 1) { printf("X must be even\n"); return 1; } else if (info.src_height / (double) dst_height > 1.125) { printf("Y is too small\n"); return 1; } else if (info.tot_height < dst_height) { printf("Y is too big\n"); return 1; } else if (dst_height & 1) { printf("Y must be even\n"); return 1; } printf("Changing size for pipe %c:\n" "- width: %d -> %d\n" "- height: %d -> %d\n" "- pos: %dx%d\n", intel_pipe + 'A', info.src_width, dst_width, info.src_height, dst_height, pos_x, pos_y); ctrl1_val = PF_ENABLE | PF_FILTER_MED; /* This can break stuff if the panel fitter is already enabled for * another pipe */ if (gen >= 7) { switch (intel_pipe) { case 0: ctrl1_val |= PF_PIPE_A; break; case 1: ctrl1_val |= PF_PIPE_B; break; case 2: ctrl1_val |= PF_PIPE_C; break; default: assert(0); } } OUTREG(PF_CTRL1[intel_pipe], ctrl1_val); win_pos_val = pos_x << 16; win_pos_val |= pos_y; OUTREG(PF_WIN_POS[intel_pipe], win_pos_val); win_sz_val = dst_width << 16; win_sz_val |= dst_height; OUTREG(PF_WIN_SZ[intel_pipe], win_sz_val); return 0; } static int disable_panel_fitter(int intel_pipe) { OUTREG(PF_CTRL1[intel_pipe], 0); OUTREG(PF_WIN_POS[intel_pipe], 0); OUTREG(PF_WIN_SZ[intel_pipe], 0); return 0; } static void print_usage(void) { printf("Options:\n" " -p pipe: pipe to be used (A, B or C)\n" " -x value: final screen width size in pixels\n" " -y value: final screen height size in pixels\n" " -d: disable panel fitter\n" " -l: list the current state of each pipe\n" " -h: prints this message\n"); } int main (int argc, char *argv[]) { int opt; int ret = 0; char intel_pipe = '\0'; int x = 0, y = 0; bool do_disable = false, do_dump = false, do_usage = false; struct pci_device *pci_dev; uint32_t devid; printf("WARNING:\n" "This tool is a workaround for people that don't have a Kernel " "with overscan compensation properties: it is just a temporary " "solution that may or may not work. Use it at your own risk.\n"); pci_dev = intel_get_pci_device(); intel_register_access_init(pci_dev, 0); devid = pci_dev->device_id; if (!HAS_PCH_SPLIT(devid)) { printf("This tool was only tested on Ironlake and newer\n"); ret = 1; goto out; } if (IS_GEN5(devid)) gen = 5; else if (IS_GEN6(devid)) gen = 6; else gen = 7; while ((opt = getopt(argc, argv, "p:x:y:dlh")) != -1) { switch (opt) { case 'p': intel_pipe = optarg[0]; if (intel_pipe != 'A' && intel_pipe != 'B' && (gen <= 6 || intel_pipe != 'C')) { printf("Invalid pipe\n"); ret = 1; goto out; } break; case 'x': x = atoi(optarg); break; case 'y': y = atoi(optarg); break; case 'd': do_disable = true; break; case 'l': do_dump = true; break; case 'h': do_usage = true; break; default: do_usage = true; ret = 1; } } if (do_usage) { print_usage(); } else if (do_dump) { dump_info(); } else if (intel_pipe) { if (do_disable) ret = disable_panel_fitter(intel_pipe - 'A'); else ret = change_screen_size(intel_pipe - 'A', x, y); } else { print_usage(); ret = 1; } out: intel_register_access_fini(); return ret; } intel-gpu-tools-1.14/tools/intel_aubdump.in0000644000175000017500000000244512665336131015755 00000000000000#!/bin/bash # -*- mode: sh -*- function show_help() { cat < * */ #include #include #include #include #include #include #include "intel_chipset.h" #include "intel_io.h" #include "intel_reg.h" static void print_clock(const char *name, int clock) { if (clock == -1) printf("%s clock: unknown", name); else printf("%s clock: %d Mhz", name, clock); } static int print_clock_info(struct pci_device *pci_dev) { uint32_t devid = pci_dev->device_id; uint16_t gcfgc; if (IS_GM45(devid)) { int core_clock = -1; pci_device_cfg_read_u16(pci_dev, &gcfgc, I915_GCFGC); switch (gcfgc & 0xf) { case 8: core_clock = 266; break; case 9: core_clock = 320; break; case 11: core_clock = 400; break; case 13: core_clock = 533; break; } print_clock("core", core_clock); } else if (IS_965(devid) && IS_MOBILE(devid)) { int render_clock = -1, sampler_clock = -1; pci_device_cfg_read_u16(pci_dev, &gcfgc, I915_GCFGC); switch (gcfgc & 0xf) { case 2: render_clock = 250; sampler_clock = 267; break; case 3: render_clock = 320; sampler_clock = 333; break; case 4: render_clock = 400; sampler_clock = 444; break; case 5: render_clock = 500; sampler_clock = 533; break; } print_clock("render", render_clock); printf(" "); print_clock("sampler", sampler_clock); } else if (IS_945(devid) && IS_MOBILE(devid)) { int render_clock = -1, display_clock = -1; pci_device_cfg_read_u16(pci_dev, &gcfgc, I915_GCFGC); switch (gcfgc & 0x7) { case 0: render_clock = 166; break; case 1: render_clock = 200; break; case 3: render_clock = 250; break; case 5: render_clock = 400; break; } switch (gcfgc & 0x70) { case 0: display_clock = 200; break; case 4: display_clock = 320; break; } if (gcfgc & (1 << 7)) display_clock = 133; print_clock("render", render_clock); printf(" "); print_clock("display", display_clock); } else if (IS_915(devid) && IS_MOBILE(devid)) { int render_clock = -1, display_clock = -1; pci_device_cfg_read_u16(pci_dev, &gcfgc, I915_GCFGC); switch (gcfgc & 0x7) { case 0: render_clock = 160; break; case 1: render_clock = 190; break; case 4: render_clock = 333; break; } if (gcfgc & (1 << 13)) render_clock = 133; switch (gcfgc & 0x70) { case 0: display_clock = 190; break; case 4: display_clock = 333; break; } if (gcfgc & (1 << 7)) display_clock = 133; print_clock("render", render_clock); printf(" "); print_clock("display", display_clock); } printf("\n"); return -1; } int main(int argc, char **argv) { struct pci_device *dev, *bridge; int error; uint8_t stepping; const char *step_desc = "??"; error = pci_system_init(); if (error != 0) { fprintf(stderr, "Couldn't initialize PCI system: %s\n", strerror(error)); exit(1); } /* Grab the graphics card */ dev = pci_device_find_by_slot(0, 0, 2, 0); if (dev == NULL) errx(1, "Couldn't find graphics card"); error = pci_device_probe(dev); if (error != 0) { fprintf(stderr, "Couldn't probe graphics card: %s\n", strerror(error)); exit(1); } if (dev->vendor_id != 0x8086) errx(1, "Graphics card is non-intel"); bridge = pci_device_find_by_slot(0, 0, 0, 0); if (dev == NULL) errx(1, "Couldn't bridge"); error = pci_device_cfg_read_u8(bridge, &stepping, 8); if (error != 0) { fprintf(stderr, "Couldn't read revision ID: %s\n", strerror(error)); exit(1); } switch (dev->device_id) { case PCI_CHIP_I915_G: if (stepping < 0x04) step_desc = " 0x0e) step_desc = ">C2"; else step_desc = ">B1 vendor_id, dev->device_id, stepping, step_desc); print_clock_info(dev); return 0; } intel-gpu-tools-1.14/tools/null_state_gen/0000755000175000017500000000000012665337376015667 500000000000000intel-gpu-tools-1.14/tools/null_state_gen/intel_batchbuffer.c0000644000175000017500000001572712665336131021421 00000000000000/************************************************************************** * * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. * * Copyright 2014, 2015 Intel Corporation * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * **************************************************************************/ #include #include #include #include #include #include "intel_batchbuffer.h" void bb_area_emit(struct bb_area *a, uint32_t dword, item_type type, const char *str) { struct bb_item *item; assert(a != NULL); assert(a->num_items < MAX_ITEMS); item = &a->item[a->num_items]; item->data = dword; item->type = type; strncpy(item->str, str, MAX_STRLEN); item->str[MAX_STRLEN - 1] = 0; a->num_items++; } void bb_area_emit_offset(struct bb_area *a, unsigned offset, uint32_t dword, item_type type, const char *str) { const unsigned i = offset / 4; struct bb_item *item; assert(a != NULL); assert(a->num_items < MAX_ITEMS); assert(i < a->num_items); item = &a->item[i]; item->data = dword; item->type = type; strncpy(item->str, str, MAX_STRLEN); item->str[MAX_STRLEN - 1] = 0; } static struct bb_item *bb_area_get(struct bb_area *a, unsigned i) { assert (i < a->num_items); return &a->item[i]; } static unsigned bb_area_items(struct bb_area *a) { return a->num_items; } static unsigned long bb_area_used(struct bb_area *a) { assert(a != NULL); assert(a->num_items <= MAX_ITEMS); return a->num_items * 4; } static unsigned long bb_area_room(struct bb_area *a) { assert (a != NULL); assert (a->num_items <= MAX_ITEMS); return (MAX_ITEMS - a->num_items) * 4; } struct intel_batchbuffer *intel_batchbuffer_create(void) { struct intel_batchbuffer *batch; batch = calloc(1, sizeof(*batch)); if (batch == NULL) return NULL; batch->cmds = calloc(1, sizeof(struct bb_area)); if (batch->cmds == NULL) { free(batch); return NULL; } batch->state = calloc(1, sizeof(struct bb_area)); if (batch->state == NULL) { free(batch->cmds); free(batch); return NULL; } batch->state_start_offset = -1; batch->cmds_end_offset = -1; return batch; } static void bb_area_align(struct bb_area *a, unsigned align) { if (align == 0) return; assert((align % 4) == 0); while ((a->num_items * 4) % align != 0) bb_area_emit(a, 0, PAD, "align pad"); } static int reloc_exists(struct intel_batchbuffer *batch, uint32_t offset) { int i; for (i = 0; i < batch->cmds->num_items; i++) if ((batch->cmds->item[i].type == RELOC || batch->cmds->item[i].type == RELOC_STATE) && i * 4 == offset) return 1; return 0; } int intel_batch_is_reloc(struct intel_batchbuffer *batch, unsigned i) { return reloc_exists(batch, i * 4); } static void intel_batch_cmd_align(struct intel_batchbuffer *batch, unsigned align) { bb_area_align(batch->cmds, align); } static void intel_batch_state_align(struct intel_batchbuffer *batch, unsigned align) { bb_area_align(batch->state, align); } unsigned intel_batch_num_cmds(struct intel_batchbuffer *batch) { return bb_area_items(batch->cmds); } unsigned intel_batch_num_state(struct intel_batchbuffer *batch) { return bb_area_items(batch->state); } struct bb_item *intel_batch_cmd_get(struct intel_batchbuffer *batch, unsigned i) { return bb_area_get(batch->cmds, i); } struct bb_item *intel_batch_state_get(struct intel_batchbuffer *batch, unsigned i) { return bb_area_get(batch->state, i); } uint32_t intel_batch_state_offset(struct intel_batchbuffer *batch, unsigned align) { intel_batch_state_align(batch, align); return bb_area_used(batch->state); } uint32_t intel_batch_state_alloc(struct intel_batchbuffer *batch, unsigned bytes, unsigned align, const char *str) { unsigned offset; unsigned dwords = bytes/4; assert ((bytes % 4) == 0); assert (bb_area_room(batch->state) >= bytes); offset = intel_batch_state_offset(batch, align); while (dwords--) bb_area_emit(batch->state, 0, UNINITIALIZED, str); return offset; } uint32_t intel_batch_state_copy(struct intel_batchbuffer *batch, const void *d, unsigned bytes, unsigned align, const char *str) { unsigned offset; unsigned i; unsigned dwords = bytes/4; assert (d); assert ((bytes % 4) == 0); assert (bb_area_room(batch->state) >= bytes); offset = intel_batch_state_offset(batch, align); for (i = 0; i < dwords; i++) { char offsetinside[80]; const uint32_t *s; sprintf(offsetinside, "%s: 0x%x", str, i * 4); s = (const uint32_t *)(const uint8_t *)d + i; bb_area_emit(batch->state, *s, STATE, offsetinside); } return offset; } void intel_batch_relocate_state(struct intel_batchbuffer *batch) { unsigned int i; assert (batch->state_start_offset == -1); batch->cmds_end_offset = bb_area_used(batch->cmds) - 4; /* Hardcoded, could track max align done also */ intel_batch_cmd_align(batch, 64); batch->state_start_offset = bb_area_used(batch->cmds); for (i = 0; i < bb_area_items(batch->state); i++) { const struct bb_item *s = bb_area_get(batch->state, i); bb_area_emit(batch->cmds, s->data, s->type, s->str); } for (i = 0; i < bb_area_items(batch->cmds); i++) { struct bb_item *s = bb_area_get(batch->cmds, i); if (s->type == STATE_OFFSET || s->type == RELOC_STATE) s->data += batch->state_start_offset; } } const char *intel_batch_type_as_str(const struct bb_item *item) { switch (item->type) { case UNINITIALIZED: return "UNINITIALIZED"; case CMD: return "CMD"; case STATE: return "STATE"; case PAD: return "PAD"; case RELOC: return "RELOC"; case RELOC_STATE: return "RELOC_STATE"; case STATE_OFFSET: return "STATE_OFFSET"; } return "UNKNOWN"; } void intel_batch_cmd_emit_null(struct intel_batchbuffer *batch, const int cmd, const int len, const int len_bias, const char *str) { int i; assert(len > 1); assert((len - len_bias) >= 0); bb_area_emit(batch->cmds, (cmd | (len - len_bias)), CMD, str); for (i = len_bias-1; i < len; i++) OUT_BATCH(0); } intel-gpu-tools-1.14/tools/null_state_gen/intel_null_state_gen.c0000644000175000017500000001052112665336131022134 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. * * Authors: * Mika Kuoppala * Armin Reese */ #include #include #include #include #include "intel_renderstate.h" #include "intel_batchbuffer.h" static int debug = 0; static void print_usage(char *s) { fprintf(stderr, "%s: \n" " gen: gen to generate for (6,7,8,9)\n", s); } /* Creates the intel_renderstate_genX.c file for the particular * GEN product */ static int print_state(int gen, struct intel_batchbuffer *batch) { int i; unsigned long cmds; fprintf(stderr, "Generating for gen%d\n", gen); printf("#include \"intel_renderstate.h\"\n\n"); /* Relocation offsets. These are byte offsets in the golden context * batch buffer where the BB graphics address will be added to * the indirect state offset already stored in those locations. The * resulting value will inform the GPU where the indirect states are. */ printf("static const u32 gen%d_null_state_relocs[] = {\n", gen); for (i = 0; i < batch->cmds->num_items; i++) { if (intel_batch_is_reloc(batch, i)) printf("\t0x%08x,\n", i * 4); } printf("\t-1,\n};\n\n"); /* GPU commands to execute to set up the RCS golden state. This * state will become the default config. */ printf("static const u32 gen%d_null_state_batch[] = {\n", gen); for (i = 0; i < intel_batch_num_cmds(batch); i++) { const int offset = i * 4; const struct bb_item *cmd = intel_batch_cmd_get(batch, i); printf("\t0x%08x,", cmd->data); if (debug) printf("\t /* 0x%08x %s '%s' */", offset, intel_batch_type_as_str(cmd), cmd->str); if (offset == batch->cmds_end_offset) { cmds = i + 1; printf("\t /* cmds end */"); } if (intel_batch_is_reloc(batch, i)) printf("\t /* reloc */"); if (offset == batch->state_start_offset) printf("\t /* state start */"); if (i == intel_batch_num_cmds(batch) - 1) printf("\t /* state end */"); printf("\n"); } printf("};\n\nRO_RENDERSTATE(%d);\n", gen); fprintf(stderr, "Commands %lu (%lu bytes)\n", cmds, cmds * 4); fprintf(stderr, "State %lu (%lu bytes)\n", batch->state->num_items, batch->state->num_items * 4); fprintf(stderr, "Total %lu (%lu bytes)\n", batch->cmds->num_items, batch->cmds->num_items * 4); fprintf(stderr, "\n"); return 0; } /* Selects generator function for the given product and executes it. */ static int do_generate(int gen) { struct intel_batchbuffer *batch; int ret = -EINVAL; void (*null_state_gen)(struct intel_batchbuffer *batch) = NULL; batch = intel_batchbuffer_create(); if (batch == NULL) return -ENOMEM; switch (gen) { case 6: null_state_gen = gen6_setup_null_render_state; break; case 7: null_state_gen = gen7_setup_null_render_state; break; case 8: null_state_gen = gen8_setup_null_render_state; break; case 9: null_state_gen = gen9_setup_null_render_state; break; } if (null_state_gen == NULL) { printf("no generator found for %d\n", gen); return -EINVAL; } null_state_gen(batch); intel_batch_relocate_state(batch); ret = print_state(gen, batch); return ret; } int main(int argc, char *argv[]) { if (argc < 2) { print_usage(argv[0]); return 1; } if (argc > 2) debug = 1; return do_generate(atoi(argv[1])); } intel-gpu-tools-1.14/tools/null_state_gen/Makefile.in0000644000175000017500000005200212665336444017646 00000000000000# Makefile.in generated by automake 1.15 from Makefile.am. # @configure_input@ # Copyright (C) 1994-2014 Free Software Foundation, Inc. # This Makefile.in is free software; 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Makefile states: intel_null_state_gen for gen in $(gens); do \ head -n 22 intel_null_state_gen.c >$(h); \ if test -d $(GPU_TOOLS_PATH)/.git; then \ echo -n " * Generated by: " >>$(h); \ git describe >>$(h); \ fi; \ echo " */" >>$(h); \ echo "" >>$(h); \ ./intel_null_state_gen $$gen >>$(h); \ done # Tell versions [3.59,3.63) of GNU make to not export all variables. # Otherwise a system limit (for SysV at least) may be exceeded. .NOEXPORT: intel-gpu-tools-1.14/tools/null_state_gen/intel_renderstate_gen6.c0000644000175000017500000003362612665336131022403 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. * * Authors: * Mika Kuoppala */ #include "intel_renderstate.h" #include #include #include static const uint32_t ps_kernel_nomask_affine[][4] = { { 0x0060005a, 0x204077be, 0x000000c0, 0x008d0040 }, { 0x0060005a, 0x206077be, 0x000000c0, 0x008d0080 }, { 0x0060005a, 0x208077be, 0x000000d0, 0x008d0040 }, { 0x0060005a, 0x20a077be, 0x000000d0, 0x008d0080 }, { 0x00000201, 0x20080061, 0x00000000, 0x00000000 }, { 0x00600001, 0x20200022, 0x008d0000, 0x00000000 }, { 0x02800031, 0x21c01cc9, 0x00000020, 0x0a8a0001 }, { 0x00600001, 0x204003be, 0x008d01c0, 0x00000000 }, { 0x00600001, 0x206003be, 0x008d01e0, 0x00000000 }, { 0x00600001, 0x208003be, 0x008d0200, 0x00000000 }, { 0x00600001, 0x20a003be, 0x008d0220, 0x00000000 }, { 0x00600001, 0x20c003be, 0x008d0240, 0x00000000 }, { 0x00600001, 0x20e003be, 0x008d0260, 0x00000000 }, { 0x00600001, 0x210003be, 0x008d0280, 0x00000000 }, { 0x00600001, 0x212003be, 0x008d02a0, 0x00000000 }, { 0x05800031, 0x24001cc8, 0x00000040, 0x90019000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, }; static uint32_t gen6_bind_buf_null(struct intel_batchbuffer *batch) { struct gen6_surface_state ss; memset(&ss, 0, sizeof(ss)); return OUT_STATE_STRUCT(ss, 32); } static uint32_t gen6_bind_surfaces(struct intel_batchbuffer *batch) { unsigned offset; offset = intel_batch_state_alloc(batch, 32, 32, "bind surfaces"); bb_area_emit_offset(batch->state, offset, gen6_bind_buf_null(batch), STATE_OFFSET, "bind 1"); bb_area_emit_offset(batch->state, offset + 4, gen6_bind_buf_null(batch), STATE_OFFSET, "bind 2"); return offset; } static void gen6_emit_sip(struct intel_batchbuffer *batch) { OUT_BATCH(GEN6_STATE_SIP | 0); OUT_BATCH(0); } static void gen6_emit_urb(struct intel_batchbuffer *batch) { OUT_BATCH(GEN6_3DSTATE_URB | (3 - 2)); OUT_BATCH((1 - 1) << GEN6_3DSTATE_URB_VS_SIZE_SHIFT | 24 << GEN6_3DSTATE_URB_VS_ENTRIES_SHIFT); /* at least 24 on GEN6 */ OUT_BATCH(0 << GEN6_3DSTATE_URB_GS_SIZE_SHIFT | 0 << GEN6_3DSTATE_URB_GS_ENTRIES_SHIFT); /* no GS thread */ } static void gen6_emit_state_base_address(struct intel_batchbuffer *batch) { OUT_BATCH(GEN6_STATE_BASE_ADDRESS | (10 - 2)); OUT_BATCH(0); /* general */ OUT_RELOC(batch, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); OUT_RELOC(batch, /* instruction */ I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); OUT_BATCH(0); /* indirect */ OUT_RELOC(batch, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* upper bounds, disable */ OUT_BATCH(0); OUT_BATCH(BASE_ADDRESS_MODIFY); OUT_BATCH(0); OUT_BATCH(BASE_ADDRESS_MODIFY); } static void gen6_emit_viewports(struct intel_batchbuffer *batch, uint32_t cc_vp) { OUT_BATCH(GEN6_3DSTATE_VIEWPORT_STATE_POINTERS | GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_CC | (4 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH_STATE_OFFSET(cc_vp); } static void gen6_emit_vs(struct intel_batchbuffer *batch) { /* disable VS constant buffer */ OUT_BATCH(GEN6_3DSTATE_CONSTANT_VS | (5 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN6_3DSTATE_VS | (6 - 2)); OUT_BATCH(0); /* no VS kernel */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* pass-through */ } static void gen6_emit_gs(struct intel_batchbuffer *batch) { /* disable GS constant buffer */ OUT_BATCH(GEN6_3DSTATE_CONSTANT_GS | (5 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN6_3DSTATE_GS | (7 - 2)); OUT_BATCH(0); /* no GS kernel */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* pass-through */ } static void gen6_emit_clip(struct intel_batchbuffer *batch) { OUT_BATCH(GEN6_3DSTATE_CLIP | (4 - 2)); OUT_BATCH(0); OUT_BATCH(0); /* pass-through */ OUT_BATCH(0); } static void gen6_emit_wm_constants(struct intel_batchbuffer *batch) { /* disable WM constant buffer */ OUT_BATCH(GEN6_3DSTATE_CONSTANT_PS | (5 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } static void gen6_emit_null_depth_buffer(struct intel_batchbuffer *batch) { OUT_BATCH(GEN6_3DSTATE_DEPTH_BUFFER | (7 - 2)); OUT_BATCH(GEN6_SURFACE_NULL << GEN6_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT | GEN6_DEPTHFORMAT_D32_FLOAT << GEN6_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN6_3DSTATE_CLEAR_PARAMS | (2 - 2)); OUT_BATCH(0); } static void gen6_emit_invariant(struct intel_batchbuffer *batch) { OUT_BATCH(GEN6_PIPELINE_SELECT | PIPELINE_SELECT_3D); OUT_BATCH(GEN6_3DSTATE_MULTISAMPLE | (3 - 2)); OUT_BATCH(GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER | GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_1); /* 1 sample/pixel */ OUT_BATCH(0); OUT_BATCH(GEN6_3DSTATE_SAMPLE_MASK | (2 - 2)); OUT_BATCH(1); } static void gen6_emit_cc(struct intel_batchbuffer *batch, uint32_t blend) { OUT_BATCH(GEN6_3DSTATE_CC_STATE_POINTERS | (4 - 2)); OUT_BATCH_STATE_OFFSET(blend | 1); OUT_BATCH(1024 | 1); OUT_BATCH(1024 | 1); } static void gen6_emit_sampler(struct intel_batchbuffer *batch, uint32_t state) { OUT_BATCH(GEN6_3DSTATE_SAMPLER_STATE_POINTERS | GEN6_3DSTATE_SAMPLER_STATE_MODIFY_PS | (4 - 2)); OUT_BATCH(0); /* VS */ OUT_BATCH(0); /* GS */ OUT_BATCH_STATE_OFFSET(state); } static void gen6_emit_sf(struct intel_batchbuffer *batch) { OUT_BATCH(GEN6_3DSTATE_SF | (20 - 2)); OUT_BATCH(1 << GEN6_3DSTATE_SF_NUM_OUTPUTS_SHIFT | 1 << GEN6_3DSTATE_SF_URB_ENTRY_READ_LENGTH_SHIFT | 1 << GEN6_3DSTATE_SF_URB_ENTRY_READ_OFFSET_SHIFT); OUT_BATCH(0); OUT_BATCH(GEN6_3DSTATE_SF_CULL_NONE); OUT_BATCH(2 << GEN6_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT); /* DW4 */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* DW9 */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* DW14 */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* DW19 */ } static void gen6_emit_wm(struct intel_batchbuffer *batch, int kernel) { OUT_BATCH(GEN6_3DSTATE_WM | (9 - 2)); OUT_BATCH_STATE_OFFSET(kernel); OUT_BATCH(1 << GEN6_3DSTATE_WM_SAMPLER_COUNT_SHIFT | 2 << GEN6_3DSTATE_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT); OUT_BATCH(0); OUT_BATCH(6 << GEN6_3DSTATE_WM_DISPATCH_START_GRF_0_SHIFT); /* DW4 */ OUT_BATCH((40 - 1) << GEN6_3DSTATE_WM_MAX_THREADS_SHIFT | GEN6_3DSTATE_WM_DISPATCH_ENABLE | GEN6_3DSTATE_WM_16_DISPATCH_ENABLE); OUT_BATCH(1 << GEN6_3DSTATE_WM_NUM_SF_OUTPUTS_SHIFT | GEN6_3DSTATE_WM_PERSPECTIVE_PIXEL_BARYCENTRIC); OUT_BATCH(0); OUT_BATCH(0); } static void gen6_emit_binding_table(struct intel_batchbuffer *batch, uint32_t wm_table) { OUT_BATCH(GEN6_3DSTATE_BINDING_TABLE_POINTERS | GEN6_3DSTATE_BINDING_TABLE_MODIFY_PS | (4 - 2)); OUT_BATCH(0); /* vs */ OUT_BATCH(0); /* gs */ OUT_BATCH_STATE_OFFSET(wm_table); } static void gen6_emit_drawing_rectangle(struct intel_batchbuffer *batch) { OUT_BATCH(GEN6_3DSTATE_DRAWING_RECTANGLE | (4 - 2)); OUT_BATCH(0xffffffff); OUT_BATCH(0 | 0); OUT_BATCH(0); } static void gen6_emit_vertex_elements(struct intel_batchbuffer *batch) { /* The VUE layout * dword 0-3: pad (0.0, 0.0, 0.0. 0.0) * dword 4-7: position (x, y, 1.0, 1.0), * dword 8-11: texture coordinate 0 (u0, v0, 0, 0) * * dword 4-11 are fetched from vertex buffer */ OUT_BATCH(GEN6_3DSTATE_VERTEX_ELEMENTS | (2 * 3 + 1 - 2)); OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | GEN6_SURFACEFORMAT_R32G32B32A32_FLOAT << VE0_FORMAT_SHIFT | 0 << VE0_OFFSET_SHIFT); OUT_BATCH(GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_0_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_1_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_3_SHIFT); /* x,y */ OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | GEN6_SURFACEFORMAT_R16G16_SSCALED << VE0_FORMAT_SHIFT | 0 << VE0_OFFSET_SHIFT); /* offsets vb in bytes */ OUT_BATCH(GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT | GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT | GEN6_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT | GEN6_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT); /* u0, v0 */ OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | GEN6_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT | 4 << VE0_OFFSET_SHIFT); /* offset vb in bytes */ OUT_BATCH(GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT | GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_3_SHIFT); } static uint32_t gen6_create_cc_viewport(struct intel_batchbuffer *batch) { struct gen6_cc_viewport vp; memset(&vp, 0, sizeof(vp)); vp.min_depth = -1.e35; vp.max_depth = 1.e35; return OUT_STATE_STRUCT(vp, 32); } static uint32_t gen6_create_cc_blend(struct intel_batchbuffer *batch) { struct gen6_blend_state blend; memset(&blend, 0, sizeof(blend)); blend.blend0.dest_blend_factor = GEN6_BLENDFACTOR_ZERO; blend.blend0.source_blend_factor = GEN6_BLENDFACTOR_ONE; blend.blend0.blend_func = GEN6_BLENDFUNCTION_ADD; blend.blend0.blend_enable = 1; blend.blend1.post_blend_clamp_enable = 1; blend.blend1.pre_blend_clamp_enable = 1; return OUT_STATE_STRUCT(blend, 64); } static uint32_t gen6_create_kernel(struct intel_batchbuffer *batch) { return intel_batch_state_copy(batch, ps_kernel_nomask_affine, sizeof(ps_kernel_nomask_affine), 64, "ps_kernel"); } static uint32_t gen6_create_sampler(struct intel_batchbuffer *batch, sampler_filter_t filter, sampler_extend_t extend) { struct gen6_sampler_state ss; memset(&ss, 0, sizeof(ss)); ss.ss0.lod_preclamp = 1; /* GL mode */ /* We use the legacy mode to get the semantics specified by * the Render extension. */ ss.ss0.border_color_mode = GEN6_BORDER_COLOR_MODE_LEGACY; switch (filter) { default: case SAMPLER_FILTER_NEAREST: ss.ss0.min_filter = GEN6_MAPFILTER_NEAREST; ss.ss0.mag_filter = GEN6_MAPFILTER_NEAREST; break; case SAMPLER_FILTER_BILINEAR: ss.ss0.min_filter = GEN6_MAPFILTER_LINEAR; ss.ss0.mag_filter = GEN6_MAPFILTER_LINEAR; break; } switch (extend) { default: case SAMPLER_EXTEND_NONE: ss.ss1.r_wrap_mode = GEN6_TEXCOORDMODE_CLAMP_BORDER; ss.ss1.s_wrap_mode = GEN6_TEXCOORDMODE_CLAMP_BORDER; ss.ss1.t_wrap_mode = GEN6_TEXCOORDMODE_CLAMP_BORDER; break; case SAMPLER_EXTEND_REPEAT: ss.ss1.r_wrap_mode = GEN6_TEXCOORDMODE_WRAP; ss.ss1.s_wrap_mode = GEN6_TEXCOORDMODE_WRAP; ss.ss1.t_wrap_mode = GEN6_TEXCOORDMODE_WRAP; break; case SAMPLER_EXTEND_PAD: ss.ss1.r_wrap_mode = GEN6_TEXCOORDMODE_CLAMP; ss.ss1.s_wrap_mode = GEN6_TEXCOORDMODE_CLAMP; ss.ss1.t_wrap_mode = GEN6_TEXCOORDMODE_CLAMP; break; case SAMPLER_EXTEND_REFLECT: ss.ss1.r_wrap_mode = GEN6_TEXCOORDMODE_MIRROR; ss.ss1.s_wrap_mode = GEN6_TEXCOORDMODE_MIRROR; ss.ss1.t_wrap_mode = GEN6_TEXCOORDMODE_MIRROR; break; } return OUT_STATE_STRUCT(ss, 32); } static uint32_t gen6_create_vertex_buffer(struct intel_batchbuffer *batch) { uint16_t v[2]; v[0] = 0; v[1] = 0; return intel_batch_state_copy(batch, v, sizeof(v), 8, "vertex buffer"); } static void gen6_emit_vertex_buffer(struct intel_batchbuffer *batch) { uint32_t offset; offset = gen6_create_vertex_buffer(batch); OUT_BATCH(GEN6_3DSTATE_VERTEX_BUFFERS | 3); OUT_BATCH(VB0_VERTEXDATA | 0 << VB0_BUFFER_INDEX_SHIFT | VB0_NULL_VERTEX_BUFFER | 0 << VB0_BUFFER_PITCH_SHIFT); OUT_RELOC_STATE(batch, I915_GEM_DOMAIN_VERTEX, 0, offset); OUT_RELOC_STATE(batch, I915_GEM_DOMAIN_VERTEX, 0, offset); OUT_BATCH(0); } void gen6_setup_null_render_state(struct intel_batchbuffer *batch) { uint32_t wm_state, wm_kernel, wm_table; uint32_t cc_vp, cc_blend; wm_table = gen6_bind_surfaces(batch); wm_kernel = gen6_create_kernel(batch); wm_state = gen6_create_sampler(batch, SAMPLER_FILTER_NEAREST, SAMPLER_EXTEND_NONE); cc_vp = gen6_create_cc_viewport(batch); cc_blend = gen6_create_cc_blend(batch); gen6_emit_invariant(batch); gen6_emit_state_base_address(batch); gen6_emit_sip(batch); gen6_emit_urb(batch); gen6_emit_viewports(batch, cc_vp); gen6_emit_vs(batch); gen6_emit_gs(batch); gen6_emit_clip(batch); gen6_emit_wm_constants(batch); gen6_emit_null_depth_buffer(batch); gen6_emit_drawing_rectangle(batch); gen6_emit_cc(batch, cc_blend); gen6_emit_sampler(batch, wm_state); gen6_emit_sf(batch); gen6_emit_wm(batch, wm_kernel); gen6_emit_vertex_elements(batch); gen6_emit_binding_table(batch, wm_table); gen6_emit_vertex_buffer(batch); OUT_BATCH(MI_BATCH_BUFFER_END); } intel-gpu-tools-1.14/tools/null_state_gen/intel_renderstate_gen7.c0000644000175000017500000003052012665336131022372 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. * * Authors: * Mika Kuoppala */ #include "intel_renderstate.h" #include #include #include static const uint32_t ps_kernel[][4] = { { 0x0080005a, 0x2e2077bd, 0x000000c0, 0x008d0040 }, { 0x0080005a, 0x2e6077bd, 0x000000d0, 0x008d0040 }, { 0x02800031, 0x21801fa9, 0x008d0e20, 0x08840001 }, { 0x00800001, 0x2e2003bd, 0x008d0180, 0x00000000 }, { 0x00800001, 0x2e6003bd, 0x008d01c0, 0x00000000 }, { 0x00800001, 0x2ea003bd, 0x008d0200, 0x00000000 }, { 0x00800001, 0x2ee003bd, 0x008d0240, 0x00000000 }, { 0x05800031, 0x20001fa8, 0x008d0e20, 0x90031000 }, }; static uint32_t gen7_bind_buf_null(struct intel_batchbuffer *batch) { return intel_batch_state_alloc(batch, 32, 32, "bind buf null"); } static void gen7_emit_vertex_elements(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_VERTEX_ELEMENTS | ((2 * (1 + 2)) + 1 - 2)); OUT_BATCH(0 << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID | GEN7_SURFACEFORMAT_R32G32B32A32_FLOAT << GEN7_VE0_FORMAT_SHIFT | 0 << GEN7_VE0_OFFSET_SHIFT); OUT_BATCH(GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_0_SHIFT | GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_1_SHIFT | GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_2_SHIFT | GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_3_SHIFT); /* x,y */ OUT_BATCH(0 << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID | GEN7_SURFACEFORMAT_R16G16_SSCALED << GEN7_VE0_FORMAT_SHIFT | 0 << GEN7_VE0_OFFSET_SHIFT); /* offsets vb in bytes */ OUT_BATCH(GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_0_SHIFT | GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_1_SHIFT | GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_2_SHIFT | GEN7_VFCOMPONENT_STORE_1_FLT << GEN7_VE1_VFCOMPONENT_3_SHIFT); /* s,t */ OUT_BATCH(0 << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID | GEN7_SURFACEFORMAT_R16G16_SSCALED << GEN7_VE0_FORMAT_SHIFT | 4 << GEN7_VE0_OFFSET_SHIFT); /* offset vb in bytes */ OUT_BATCH(GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_0_SHIFT | GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_1_SHIFT | GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_2_SHIFT | GEN7_VFCOMPONENT_STORE_1_FLT << GEN7_VE1_VFCOMPONENT_3_SHIFT); } static uint32_t gen7_create_vertex_buffer(struct intel_batchbuffer *batch) { uint16_t *v; return intel_batch_state_alloc(batch, 12*sizeof(*v), 8, "vertex buffer"); } static void gen7_emit_vertex_buffer(struct intel_batchbuffer *batch) { uint32_t offset; offset = gen7_create_vertex_buffer(batch); OUT_BATCH(GEN7_3DSTATE_VERTEX_BUFFERS | (5 - 2)); OUT_BATCH(0 << GEN7_VB0_BUFFER_INDEX_SHIFT | GEN7_VB0_VERTEXDATA | GEN7_VB0_ADDRESS_MODIFY_ENABLE | GEN7_VB0_NULL_VERTEX_BUFFER | 4*2 << GEN7_VB0_BUFFER_PITCH_SHIFT); OUT_RELOC_STATE(batch, I915_GEM_DOMAIN_VERTEX, 0, offset); OUT_BATCH(~0); OUT_BATCH(0); } static uint32_t gen7_bind_surfaces(struct intel_batchbuffer *batch) { unsigned offset; offset = intel_batch_state_alloc(batch, 8, 32, "bind surfaces"); bb_area_emit_offset(batch->state, offset, gen7_bind_buf_null(batch), STATE_OFFSET, "bind 1"); bb_area_emit_offset(batch->state, offset + 4, gen7_bind_buf_null(batch), STATE_OFFSET, "bind 2"); return offset; } static void gen7_emit_binding_table(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS | (2 - 2)); OUT_BATCH_STATE_OFFSET(gen7_bind_surfaces(batch)); } static void gen7_emit_drawing_rectangle(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_DRAWING_RECTANGLE | (4 - 2)); /* Purposedly set min > max for null rectangle */ OUT_BATCH(0xffffffff); OUT_BATCH(0 | 0); OUT_BATCH(0); } static uint32_t gen7_create_blend_state(struct intel_batchbuffer *batch) { struct gen7_blend_state blend; memset(&blend, 0, sizeof(blend)); blend.blend0.dest_blend_factor = GEN7_BLENDFACTOR_ZERO; blend.blend0.source_blend_factor = GEN7_BLENDFACTOR_ONE; blend.blend0.blend_func = GEN7_BLENDFUNCTION_ADD; blend.blend1.post_blend_clamp_enable = 1; blend.blend1.pre_blend_clamp_enable = 1; return OUT_STATE_STRUCT(blend, 64); } static void gen7_emit_state_base_address(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_STATE_BASE_ADDRESS | (10 - 2)); OUT_BATCH(0); OUT_RELOC(batch, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); OUT_RELOC(batch, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); OUT_BATCH(0); OUT_RELOC(batch, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); OUT_BATCH(0); OUT_BATCH(0 | BASE_ADDRESS_MODIFY); OUT_BATCH(0); OUT_BATCH(0 | BASE_ADDRESS_MODIFY); } static uint32_t gen7_create_cc_viewport(struct intel_batchbuffer *batch) { struct gen7_cc_viewport vp; memset(&vp, 0, sizeof(vp)); vp.min_depth = -1.e35; vp.max_depth = 1.e35; return OUT_STATE_STRUCT(vp, 32); } static void gen7_emit_cc(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_BLEND_STATE_POINTERS | (2 - 2)); OUT_BATCH_STATE_OFFSET(gen7_create_blend_state(batch)); OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC | (2 - 2)); OUT_BATCH_STATE_OFFSET(gen7_create_cc_viewport(batch)); } static uint32_t gen7_create_sampler(struct intel_batchbuffer *batch) { struct gen7_sampler_state ss; memset(&ss, 0, sizeof(ss)); ss.ss0.min_filter = GEN7_MAPFILTER_NEAREST; ss.ss0.mag_filter = GEN7_MAPFILTER_NEAREST; ss.ss3.r_wrap_mode = GEN7_TEXCOORDMODE_CLAMP; ss.ss3.s_wrap_mode = GEN7_TEXCOORDMODE_CLAMP; ss.ss3.t_wrap_mode = GEN7_TEXCOORDMODE_CLAMP; ss.ss3.non_normalized_coord = 1; return OUT_STATE_STRUCT(ss, 32); } static void gen7_emit_sampler(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS | (2 - 2)); OUT_BATCH_STATE_OFFSET(gen7_create_sampler(batch)); } static void gen7_emit_multisample(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_MULTISAMPLE | (4 - 2)); OUT_BATCH(GEN7_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER | GEN7_3DSTATE_MULTISAMPLE_NUMSAMPLES_1); /* 1 sample/pixel */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_SAMPLE_MASK | (2 - 2)); OUT_BATCH(1); } static void gen7_emit_urb(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS | (2 - 2)); OUT_BATCH(8); /* in 1KBs */ /* num of VS entries must be divisible by 8 if size < 9 */ OUT_BATCH(GEN7_3DSTATE_URB_VS | (2 - 2)); OUT_BATCH((64 << GEN7_URB_ENTRY_NUMBER_SHIFT) | (2 - 1) << GEN7_URB_ENTRY_SIZE_SHIFT | (1 << GEN7_URB_STARTING_ADDRESS_SHIFT)); OUT_BATCH(GEN7_3DSTATE_URB_HS | (2 - 2)); OUT_BATCH((0 << GEN7_URB_ENTRY_SIZE_SHIFT) | (2 << GEN7_URB_STARTING_ADDRESS_SHIFT)); OUT_BATCH(GEN7_3DSTATE_URB_DS | (2 - 2)); OUT_BATCH((0 << GEN7_URB_ENTRY_SIZE_SHIFT) | (2 << GEN7_URB_STARTING_ADDRESS_SHIFT)); OUT_BATCH(GEN7_3DSTATE_URB_GS | (2 - 2)); OUT_BATCH((0 << GEN7_URB_ENTRY_SIZE_SHIFT) | (1 << GEN7_URB_STARTING_ADDRESS_SHIFT)); } static void gen7_emit_vs(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_VS | (6 - 2)); OUT_BATCH(0); /* no VS kernel */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* pass-through */ } static void gen7_emit_hs(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_HS | (7 - 2)); OUT_BATCH(0); /* no HS kernel */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* pass-through */ } static void gen7_emit_te(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_TE | (4 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } static void gen7_emit_ds(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_DS | (6 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } static void gen7_emit_gs(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_GS | (7 - 2)); OUT_BATCH(0); /* no GS kernel */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* pass-through */ } static void gen7_emit_streamout(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_STREAMOUT | (3 - 2)); OUT_BATCH(0); OUT_BATCH(0); } static void gen7_emit_sf(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_SF | (7 - 2)); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_SF_CULL_NONE); OUT_BATCH(2 << GEN7_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } static void gen7_emit_sbe(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_SBE | (14 - 2)); OUT_BATCH(1 << GEN7_SBE_NUM_OUTPUTS_SHIFT | 1 << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT | 1 << GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT); OUT_BATCH(0); OUT_BATCH(0); /* dw4 */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* dw8 */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* dw12 */ OUT_BATCH(0); OUT_BATCH(0); } static void gen7_emit_ps(struct intel_batchbuffer *batch) { int threads; #if 0 /* XXX: Do we need separate state for hsw or not */ if (IS_HASWELL(batch->dev)) threads = 40 << HSW_PS_MAX_THREADS_SHIFT | 1 << HSW_PS_SAMPLE_MASK_SHIFT; else #endif threads = 40 << IVB_PS_MAX_THREADS_SHIFT; OUT_BATCH(GEN7_3DSTATE_PS | (8 - 2)); OUT_BATCH_STATE_OFFSET(intel_batch_state_copy(batch, ps_kernel, sizeof(ps_kernel), 64, "ps kernel")); OUT_BATCH(1 << GEN7_PS_SAMPLER_COUNT_SHIFT | 2 << GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT); OUT_BATCH(0); /* scratch address */ OUT_BATCH(threads | GEN7_PS_16_DISPATCH_ENABLE | GEN7_PS_ATTRIBUTE_ENABLE); OUT_BATCH(6 << GEN7_PS_DISPATCH_START_GRF_SHIFT_0); OUT_BATCH(0); OUT_BATCH(0); } static void gen7_emit_clip(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_CLIP | (4 - 2)); OUT_BATCH(0); OUT_BATCH(0); /* pass-through */ OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL | (2 - 2)); OUT_BATCH(0); } static void gen7_emit_wm(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_WM | (3 - 2)); OUT_BATCH(GEN7_WM_DISPATCH_ENABLE | GEN7_WM_PERSPECTIVE_PIXEL_BARYCENTRIC); OUT_BATCH(0); } static void gen7_emit_null_depth_buffer(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_DEPTH_BUFFER | (7 - 2)); OUT_BATCH(GEN7_SURFACE_NULL << GEN7_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT | GEN7_DEPTHFORMAT_D32_FLOAT << GEN7_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT); OUT_BATCH(0); /* disable depth, stencil and hiz */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_CLEAR_PARAMS | (3 - 2)); OUT_BATCH(0); OUT_BATCH(0); } void gen7_setup_null_render_state(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_3D); gen7_emit_state_base_address(batch); gen7_emit_multisample(batch); gen7_emit_urb(batch); gen7_emit_vs(batch); gen7_emit_hs(batch); gen7_emit_te(batch); gen7_emit_ds(batch); gen7_emit_gs(batch); gen7_emit_clip(batch); gen7_emit_sf(batch); gen7_emit_wm(batch); gen7_emit_streamout(batch); gen7_emit_null_depth_buffer(batch); gen7_emit_cc(batch); gen7_emit_sampler(batch); gen7_emit_sbe(batch); gen7_emit_ps(batch); gen7_emit_vertex_elements(batch); gen7_emit_vertex_buffer(batch); gen7_emit_binding_table(batch); gen7_emit_drawing_rectangle(batch); OUT_BATCH(GEN7_3DPRIMITIVE | (7 - 2)); OUT_BATCH(GEN7_3DPRIMITIVE_VERTEX_SEQUENTIAL | _3DPRIM_RECTLIST); OUT_BATCH(3); OUT_BATCH(0); OUT_BATCH(1); /* single instance */ OUT_BATCH(0); /* start instance location */ OUT_BATCH(0); /* index buffer offset, ignored */ OUT_BATCH(MI_BATCH_BUFFER_END); } intel-gpu-tools-1.14/tools/null_state_gen/intel_renderstate_gen8.c0000644000175000017500000002711012665336131022374 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. * * Authors: * Mika Kuoppala */ #include "intel_renderstate.h" #include "intel_batchbuffer.h" #include #include #include static void gen8_emit_wm(struct intel_batchbuffer *batch) { OUT_BATCH(GEN6_3DSTATE_WM | (2 - 2)); OUT_BATCH(GEN7_WM_LEGACY_DIAMOND_LINE_RASTERIZATION); } static void gen8_emit_ps(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_PS | (12 - 2)); OUT_BATCH(0); OUT_BATCH(0); /* kernel hi */ OUT_BATCH(GEN7_PS_SPF_MODE); OUT_BATCH(0); /* scratch space stuff */ OUT_BATCH(0); /* scratch hi */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); // kernel 1 OUT_BATCH(0); /* kernel 1 hi */ OUT_BATCH(0); // kernel 2 OUT_BATCH(0); /* kernel 2 hi */ } static void gen8_emit_sf(struct intel_batchbuffer *batch) { OUT_BATCH(GEN6_3DSTATE_SF | (4 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(1 << GEN6_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT | 1 << GEN6_3DSTATE_SF_VERTEX_SUB_PIXEL_PRECISION_SHIFT | GEN7_SF_POINT_WIDTH_FROM_SOURCE | 8); } static void gen8_emit_vs(struct intel_batchbuffer *batch) { OUT_BATCH(GEN6_3DSTATE_VS | (9 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_VS_FLOATING_POINT_MODE_ALTERNATE); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } static void gen8_emit_hs(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_HS | (9 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(1 << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT); OUT_BATCH(0); } static void gen8_emit_raster(struct intel_batchbuffer *batch) { OUT_BATCH(GEN8_3DSTATE_RASTER | (5 - 2)); OUT_BATCH(0); OUT_BATCH(0.0); OUT_BATCH(0.0); OUT_BATCH(0.0); } static void gen8_emit_urb(struct intel_batchbuffer *batch) { const int vs_entries = 64; const int vs_size = 2; const int vs_start = 4; OUT_BATCH(GEN7_3DSTATE_URB_VS); OUT_BATCH(vs_entries | ((vs_size - 1) << 16) | (vs_start << 25)); OUT_BATCH(GEN7_3DSTATE_URB_HS); OUT_BATCH(0x0f << 25); OUT_BATCH(GEN7_3DSTATE_URB_DS); OUT_BATCH(0x0f << 25); OUT_BATCH(GEN7_3DSTATE_URB_GS); OUT_BATCH(0x0f << 25); } static void gen8_emit_vf_topology(struct intel_batchbuffer *batch) { OUT_BATCH(GEN8_3DSTATE_VF_TOPOLOGY); OUT_BATCH(_3DPRIM_TRILIST); } static void gen8_emit_so_decl_list(struct intel_batchbuffer *batch) { const int num_decls = 128; int i; OUT_BATCH(GEN8_3DSTATE_SO_DECL_LIST | ((2 * num_decls) + 1)); OUT_BATCH(0); OUT_BATCH(num_decls); for (i = 0; i < num_decls; i++) { OUT_BATCH(0); OUT_BATCH(0); } } static void gen8_emit_so_buffer(struct intel_batchbuffer *batch, const int index) { OUT_BATCH(GEN8_3DSTATE_SO_BUFFER | (8 - 2)); OUT_BATCH(index << 29); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } static void gen8_emit_state_base_address(struct intel_batchbuffer *batch) { const unsigned offset = 0; OUT_BATCH(GEN6_STATE_BASE_ADDRESS | (16 - 2)); /* general */ OUT_RELOC(batch, 0, 0, offset | BASE_ADDRESS_MODIFY); OUT_BATCH(0); /* stateless data port */ OUT_BATCH(0); /* surface state base addess */ OUT_RELOC(batch, 0, 0, offset | BASE_ADDRESS_MODIFY); OUT_BATCH(0); /* dynamic state base address */ OUT_RELOC(batch, 0, 0, offset | BASE_ADDRESS_MODIFY); OUT_BATCH(0); /* indirect */ OUT_BATCH(BASE_ADDRESS_MODIFY); OUT_BATCH(0); /* instruction */ OUT_RELOC(batch, 0, 0, offset | BASE_ADDRESS_MODIFY); OUT_BATCH(0); /* general state buffer size */ OUT_BATCH(GEN8_STATE_SIZE_PAGES(1) | BUFFER_SIZE_MODIFY); /* dynamic state buffer size */ OUT_BATCH(GEN8_STATE_SIZE_PAGES(1) | BUFFER_SIZE_MODIFY); /* indirect object buffer size */ OUT_BATCH(0 | BUFFER_SIZE_MODIFY); /* intruction buffer size */ OUT_BATCH(GEN8_STATE_SIZE_PAGES(1) | BUFFER_SIZE_MODIFY); } static void gen8_emit_chroma_key(struct intel_batchbuffer *batch, const int index) { OUT_BATCH(GEN6_3DSTATE_CHROMA_KEY | (4 - 2)); OUT_BATCH(index << 30); OUT_BATCH(0); OUT_BATCH(0); } static void gen8_emit_vertex_buffers(struct intel_batchbuffer *batch) { const int buffers = 33; int i; OUT_BATCH(GEN6_3DSTATE_VERTEX_BUFFERS | ((4 * buffers) - 1)); for (i = 0; i < buffers; i++) { OUT_BATCH(i << VB0_BUFFER_INDEX_SHIFT | GEN7_VB0_BUFFER_ADDR_MOD_EN); OUT_BATCH(0); /* Addr */ OUT_BATCH(0); OUT_BATCH(0); } } static void gen6_emit_vertex_elements(struct intel_batchbuffer *batch) { const int elements = 34; int i; OUT_BATCH(GEN6_3DSTATE_VERTEX_ELEMENTS | ((2 * elements - 1))); for (i = 0; i < elements; i++) { if (i == 0) { OUT_BATCH(VE0_VALID | i); OUT_BATCH( GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_0_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_1_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_3_SHIFT ); } else { OUT_BATCH(0); OUT_BATCH(0); } } } static void gen8_emit_cc_state_pointers(struct intel_batchbuffer *batch) { union { float fval; uint32_t uval; } u; unsigned offset; u.fval = 1.0f; offset = intel_batch_state_offset(batch, 64); OUT_STATE(0); OUT_STATE(0); /* Alpha reference value */ OUT_STATE(u.uval); /* Blend constant color RED */ OUT_STATE(u.uval); /* Blend constant color BLUE */ OUT_STATE(u.uval); /* Blend constant color GREEN */ OUT_STATE(u.uval); /* Blend constant color ALPHA */ OUT_BATCH(GEN6_3DSTATE_CC_STATE_POINTERS); OUT_BATCH_STATE_OFFSET(offset | 1); } static void gen8_emit_blend_state_pointers(struct intel_batchbuffer *batch) { unsigned offset; int i; offset = intel_batch_state_offset(batch, 64); for (i = 0; i < 17; i++) OUT_STATE(0); OUT_BATCH(GEN7_3DSTATE_BLEND_STATE_POINTERS | (2 - 2)); OUT_BATCH_STATE_OFFSET(offset | 1); } static void gen8_emit_ps_extra(struct intel_batchbuffer *batch) { OUT_BATCH(GEN8_3DSTATE_PS_EXTRA | (2 - 2)); OUT_BATCH(GEN8_PSX_PIXEL_SHADER_VALID | GEN8_PSX_ATTRIBUTE_ENABLE); } static void gen8_emit_ps_blend(struct intel_batchbuffer *batch) { OUT_BATCH(GEN8_3DSTATE_PS_BLEND | (2 - 2)); OUT_BATCH(GEN8_PS_BLEND_HAS_WRITEABLE_RT); } static void gen8_emit_viewport_state_pointers_cc(struct intel_batchbuffer *batch) { unsigned offset; offset = intel_batch_state_offset(batch, 32); OUT_STATE((uint32_t)0.0f); /* Minimum depth */ OUT_STATE((uint32_t)0.0f); /* Maximum depth */ OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC | (2 - 2)); OUT_BATCH_STATE_OFFSET(offset); } static void gen8_emit_viewport_state_pointers_sf_clip(struct intel_batchbuffer *batch) { unsigned offset; int i; offset = intel_batch_state_offset(batch, 64); for (i = 0; i < 16; i++) OUT_STATE(0); OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP | (2 - 2)); OUT_BATCH_STATE_OFFSET(offset); } static void gen8_emit_primitive(struct intel_batchbuffer *batch) { OUT_BATCH(GEN6_3DPRIMITIVE | (7-2)); OUT_BATCH(4); /* gen8+ ignore the topology type field */ OUT_BATCH(1); /* vertex count */ OUT_BATCH(0); OUT_BATCH(1); /* single instance */ OUT_BATCH(0); /* start instance location */ OUT_BATCH(0); /* index buffer offset, ignored */ } void gen8_setup_null_render_state(struct intel_batchbuffer *batch) { #define GEN8_PIPE_CONTROL_GLOBAL_GTT (1 << 24) OUT_BATCH(GEN6_PIPE_CONTROL | (6 - 2)); OUT_BATCH(GEN8_PIPE_CONTROL_GLOBAL_GTT); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN6_PIPELINE_SELECT | PIPELINE_SELECT_3D); gen8_emit_wm(batch); gen8_emit_ps(batch); gen8_emit_sf(batch); OUT_CMD(GEN7_3DSTATE_SBE, 4); OUT_CMD(GEN8_3DSTATE_SBE_SWIZ, 11); gen8_emit_vs(batch); gen8_emit_hs(batch); OUT_CMD(GEN7_3DSTATE_GS, 10); OUT_CMD(GEN7_3DSTATE_STREAMOUT, 5); OUT_CMD(GEN7_3DSTATE_DS, 9); OUT_CMD(GEN6_3DSTATE_CLIP, 4); gen8_emit_raster(batch); OUT_CMD(GEN7_3DSTATE_TE, 4); OUT_CMD(GEN8_3DSTATE_VF, 2); OUT_CMD(GEN8_3DSTATE_WM_HZ_OP, 5); gen8_emit_urb(batch); OUT_CMD(GEN8_3DSTATE_BIND_TABLE_POOL_ALLOC, 4); OUT_CMD(GEN8_3DSTATE_GATHER_POOL_ALLOC, 4); OUT_CMD(GEN8_3DSTATE_DX9_CONSTANT_BUFFER_POOL_ALLOC, 4); OUT_CMD(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS, 2); OUT_CMD(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS, 2); OUT_CMD(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS, 2); OUT_CMD(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS, 2); OUT_CMD(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS, 2); OUT_CMD(GEN6_3DSTATE_CONSTANT_VS, 11); OUT_CMD(GEN7_3DSTATE_CONSTANT_HS, 11); OUT_CMD(GEN7_3DSTATE_CONSTANT_DS, 11); OUT_CMD(GEN7_3DSTATE_CONSTANT_GS, 11); OUT_CMD(GEN7_3DSTATE_CONSTANT_PS, 11); OUT_CMD(GEN8_3DSTATE_VF_INSTANCING, 3); OUT_CMD(GEN8_3DSTATE_VF_SGVS, 2); gen8_emit_vf_topology(batch); gen8_emit_so_decl_list(batch); gen8_emit_so_buffer(batch, 0); gen8_emit_so_buffer(batch, 1); gen8_emit_so_buffer(batch, 2); gen8_emit_so_buffer(batch, 3); gen8_emit_state_base_address(batch); OUT_CMD(GEN6_STATE_SIP, 3); OUT_CMD(GEN6_3DSTATE_DRAWING_RECTANGLE, 4); OUT_CMD(GEN7_3DSTATE_DEPTH_BUFFER, 8); gen8_emit_chroma_key(batch, 0); gen8_emit_chroma_key(batch, 1); gen8_emit_chroma_key(batch, 2); gen8_emit_chroma_key(batch, 3); OUT_CMD(GEN6_3DSTATE_LINE_STIPPLE, 3); OUT_CMD(GEN6_3DSTATE_AA_LINE_PARAMS, 3); OUT_CMD(GEN7_3DSTATE_STENCIL_BUFFER, 5); OUT_CMD(GEN7_3DSTATE_HIER_DEPTH_BUFFER, 5); OUT_CMD(GEN7_3DSTATE_CLEAR_PARAMS, 3); OUT_CMD(GEN6_3DSTATE_MONOFILTER_SIZE, 2); OUT_CMD(GEN8_3DSTATE_MULTISAMPLE, 2); OUT_CMD(GEN8_3DSTATE_POLY_STIPPLE_OFFSET, 2); OUT_CMD(GEN8_3DSTATE_POLY_STIPPLE_PATTERN, 33); OUT_CMD(GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0, 16 + 1); OUT_CMD(GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1, 16 + 1); OUT_CMD(GEN6_3DSTATE_INDEX_BUFFER, 5); gen8_emit_vertex_buffers(batch); gen6_emit_vertex_elements(batch); OUT_BATCH(GEN6_3DSTATE_VF_STATISTICS | 1); /* Enable */ OUT_CMD(GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS, 2); OUT_CMD(GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS, 2); OUT_CMD(GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS, 2); OUT_CMD(GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS, 2); OUT_CMD(GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS, 2); gen8_emit_cc_state_pointers(batch); gen8_emit_blend_state_pointers(batch); gen8_emit_ps_extra(batch); gen8_emit_ps_blend(batch); OUT_CMD(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS, 2); OUT_CMD(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS, 2); OUT_CMD(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS, 2); OUT_CMD(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS, 2); OUT_CMD(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS, 2); OUT_CMD(GEN6_3DSTATE_SCISSOR_STATE_POINTERS, 2); gen8_emit_viewport_state_pointers_cc(batch); gen8_emit_viewport_state_pointers_sf_clip(batch); gen8_emit_primitive(batch); OUT_BATCH(MI_BATCH_BUFFER_END); } intel-gpu-tools-1.14/tools/null_state_gen/Makefile.am0000644000175000017500000000135512665336131017633 00000000000000GPU_TOOLS_PATH := $(top_srcdir) AM_CPPFLAGS = -I$(top_srcdir) AM_CFLAGS = $(DEBUG_CFLAGS) $(CWARNFLAGS) noinst_PROGRAMS = intel_null_state_gen intel_null_state_gen_SOURCES = \ intel_batchbuffer.c \ intel_batchbuffer.h \ intel_renderstate.h \ intel_renderstate_gen6.c \ intel_renderstate_gen7.c \ intel_renderstate_gen8.c \ intel_renderstate_gen9.c \ intel_null_state_gen.c gens := 6 7 8 9 h = /tmp/intel_renderstate_gen$$gen.c states: intel_null_state_gen for gen in $(gens); do \ head -n 22 intel_null_state_gen.c >$(h); \ if test -d $(GPU_TOOLS_PATH)/.git; then \ echo -n " * Generated by: " >>$(h); \ git describe >>$(h); \ fi; \ echo " */" >>$(h); \ echo "" >>$(h); \ ./intel_null_state_gen $$gen >>$(h); \ done intel-gpu-tools-1.14/tools/null_state_gen/intel_renderstate_gen9.c0000644000175000017500000003124412665336131022400 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. * * Authors: * Armin Reese * Mika Kuoppala */ #include "intel_renderstate.h" #include #include static void gen8_emit_wm(struct intel_batchbuffer *batch) { OUT_BATCH(GEN6_3DSTATE_WM | (2 - 2)); OUT_BATCH(GEN7_WM_LEGACY_DIAMOND_LINE_RASTERIZATION); } static void gen8_emit_ps(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_PS | (12 - 2)); OUT_BATCH(0); OUT_BATCH(0); /* kernel hi */ OUT_BATCH(GEN7_PS_SPF_MODE); OUT_BATCH(0); /* scratch space stuff */ OUT_BATCH(0); /* scratch hi */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); // kernel 1 OUT_BATCH(0); /* kernel 1 hi */ OUT_BATCH(0); // kernel 2 OUT_BATCH(0); /* kernel 2 hi */ } static void gen8_emit_sf(struct intel_batchbuffer *batch) { OUT_BATCH(GEN6_3DSTATE_SF | (4 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(1 << GEN6_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT | 1 << GEN6_3DSTATE_SF_VERTEX_SUB_PIXEL_PRECISION_SHIFT | GEN7_SF_POINT_WIDTH_FROM_SOURCE | 8); } static void gen8_emit_vs(struct intel_batchbuffer *batch) { OUT_BATCH(GEN6_3DSTATE_VS | (9 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_VS_FLOATING_POINT_MODE_ALTERNATE); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } static void gen8_emit_hs(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_HS | (9 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(1 << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT); OUT_BATCH(0); } static void gen8_emit_raster(struct intel_batchbuffer *batch) { OUT_BATCH(GEN8_3DSTATE_RASTER | (5 - 2)); OUT_BATCH(0); OUT_BATCH(0.0); OUT_BATCH(0.0); OUT_BATCH(0.0); } static void gen8_emit_urb(struct intel_batchbuffer *batch) { const int vs_entries = 64; const int vs_size = 2; const int vs_start = 4; OUT_BATCH(GEN7_3DSTATE_URB_VS); OUT_BATCH(vs_entries | ((vs_size - 1) << 16) | (vs_start << 25)); OUT_BATCH(GEN7_3DSTATE_URB_HS); OUT_BATCH(0x0f << 25); OUT_BATCH(GEN7_3DSTATE_URB_DS); OUT_BATCH(0x0f << 25); OUT_BATCH(GEN7_3DSTATE_URB_GS); OUT_BATCH(0x0f << 25); } static void gen8_emit_vf_topology(struct intel_batchbuffer *batch) { OUT_BATCH(GEN8_3DSTATE_VF_TOPOLOGY); OUT_BATCH(_3DPRIM_TRILIST); } static void gen8_emit_so_decl_list(struct intel_batchbuffer *batch) { const int num_decls = 128; int i; OUT_BATCH(GEN8_3DSTATE_SO_DECL_LIST | (((2 * num_decls) + 3) - 2) /* DWORD count - 2 */); OUT_BATCH(0); OUT_BATCH(num_decls); for (i = 0; i < num_decls; i++) { OUT_BATCH(0); OUT_BATCH(0); } } static void gen8_emit_so_buffer(struct intel_batchbuffer *batch, const int index) { OUT_BATCH(GEN8_3DSTATE_SO_BUFFER | (8 - 2)); OUT_BATCH(index << 29); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } static void gen8_emit_chroma_key(struct intel_batchbuffer *batch, const int index) { OUT_BATCH(GEN6_3DSTATE_CHROMA_KEY | (4 - 2)); OUT_BATCH(index << 30); OUT_BATCH(0); OUT_BATCH(0); } static void gen8_emit_vertex_buffers(struct intel_batchbuffer *batch) { const int buffers = 33; int i; OUT_BATCH(GEN6_3DSTATE_VERTEX_BUFFERS | (((4 * buffers) + 1)- 2) /* DWORD count - 2 */); for (i = 0; i < buffers; i++) { OUT_BATCH(i << VB0_BUFFER_INDEX_SHIFT | GEN7_VB0_BUFFER_ADDR_MOD_EN); OUT_BATCH(0); /* Address */ OUT_BATCH(0); OUT_BATCH(0); } } static void gen8_emit_vertex_elements(struct intel_batchbuffer *batch) { const int elements = 34; int i; OUT_BATCH(GEN6_3DSTATE_VERTEX_ELEMENTS | (((2 * elements) + 1) - 2) /* DWORD count - 2 */); /* Element 0 */ OUT_BATCH(VE0_VALID); OUT_BATCH( GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_0_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_1_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_3_SHIFT); /* Elements 1 -> 33 */ for (i = 1; i < elements; i++) { OUT_BATCH(0); OUT_BATCH(0); } } static void gen8_emit_cc_state_pointers(struct intel_batchbuffer *batch) { union { float fval; uint32_t uval; } u; unsigned offset; u.fval = 1.0f; offset = intel_batch_state_offset(batch, 64); OUT_STATE(0); OUT_STATE(0); /* Alpha reference value */ OUT_STATE(u.uval); /* Blend constant color RED */ OUT_STATE(u.uval); /* Blend constant color BLUE */ OUT_STATE(u.uval); /* Blend constant color GREEN */ OUT_STATE(u.uval); /* Blend constant color ALPHA */ OUT_BATCH(GEN6_3DSTATE_CC_STATE_POINTERS); OUT_BATCH_STATE_OFFSET(offset | 1); } static void gen8_emit_blend_state_pointers(struct intel_batchbuffer *batch) { unsigned offset; int i; offset = intel_batch_state_offset(batch, 64); for (i = 0; i < 17; i++) OUT_STATE(0); OUT_BATCH(GEN7_3DSTATE_BLEND_STATE_POINTERS | (2 - 2)); OUT_BATCH_STATE_OFFSET(offset | 1); } static void gen8_emit_ps_extra(struct intel_batchbuffer *batch) { OUT_BATCH(GEN8_3DSTATE_PS_EXTRA | (2 - 2)); OUT_BATCH(GEN8_PSX_PIXEL_SHADER_VALID | GEN8_PSX_ATTRIBUTE_ENABLE); } static void gen8_emit_ps_blend(struct intel_batchbuffer *batch) { OUT_BATCH(GEN8_3DSTATE_PS_BLEND | (2 - 2)); OUT_BATCH(GEN8_PS_BLEND_HAS_WRITEABLE_RT); } static void gen8_emit_viewport_state_pointers_cc(struct intel_batchbuffer *batch) { unsigned offset; offset = intel_batch_state_offset(batch, 32); OUT_STATE((uint32_t)0.0f); /* Minimum depth */ OUT_STATE((uint32_t)0.0f); /* Maximum depth */ OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC | (2 - 2)); OUT_BATCH_STATE_OFFSET(offset); } static void gen8_emit_viewport_state_pointers_sf_clip(struct intel_batchbuffer *batch) { unsigned offset; int i; offset = intel_batch_state_offset(batch, 64); for (i = 0; i < 16; i++) OUT_STATE(0); OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP | (2 - 2)); OUT_BATCH_STATE_OFFSET(offset); } static void gen8_emit_primitive(struct intel_batchbuffer *batch) { OUT_BATCH(GEN6_3DPRIMITIVE | (7-2)); OUT_BATCH(4); /* gen8+ ignore the topology type field */ OUT_BATCH(1); /* vertex count */ OUT_BATCH(0); OUT_BATCH(1); /* single instance */ OUT_BATCH(0); /* start instance location */ OUT_BATCH(0); /* index buffer offset, ignored */ } static void gen9_emit_state_base_address(struct intel_batchbuffer *batch) { const unsigned offset = 0; OUT_BATCH(GEN6_STATE_BASE_ADDRESS | (19 - 2) /* DWORD count - 2 */); /* general state base address - requires BB address * added to state offset to be stored in this location */ OUT_RELOC(batch, 0, 0, offset | BASE_ADDRESS_MODIFY); OUT_BATCH(0); /* stateless data port */ OUT_BATCH(0); /* surface state base address - requires BB address * added to state offset to be stored in this location */ OUT_RELOC(batch, 0, 0, offset | BASE_ADDRESS_MODIFY); OUT_BATCH(0); /* dynamic state base address - requires BB address * added to state offset to be stored in this location */ OUT_RELOC(batch, 0, 0, offset | BASE_ADDRESS_MODIFY); OUT_BATCH(0); /* indirect state base address */ OUT_BATCH(BASE_ADDRESS_MODIFY); OUT_BATCH(0); /* instruction state base address - requires BB address * added to state offset to be stored in this location */ OUT_RELOC(batch, 0, 0, offset | BASE_ADDRESS_MODIFY); OUT_BATCH(0); /* general state buffer size */ OUT_BATCH(GEN8_STATE_SIZE_PAGES(1) | BUFFER_SIZE_MODIFY); /* dynamic state buffer size */ OUT_BATCH(GEN8_STATE_SIZE_PAGES(1) | BUFFER_SIZE_MODIFY); /* indirect object buffer size */ OUT_BATCH(0x0 | BUFFER_SIZE_MODIFY); /* intruction buffer size */ OUT_BATCH(GEN8_STATE_SIZE_PAGES(1) | BUFFER_SIZE_MODIFY); /* bindless surface state base address */ OUT_BATCH(0); OUT_BATCH(0); /* bindless surface state size */ OUT_BATCH(0); } /* * Generate the batch buffer commands needed to initialize the 3D engine * to its "golden state". */ void gen9_setup_null_render_state(struct intel_batchbuffer *batch) { int i; #define GEN8_PIPE_CONTROL_GLOBAL_GTT (1 << 24) /* PIPE_CONTROL */ OUT_BATCH(GEN6_PIPE_CONTROL | (6 - 2)); /* DWORD count - 2 */ OUT_BATCH(GEN8_PIPE_CONTROL_GLOBAL_GTT); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* PIPELINE_SELECT */ OUT_BATCH(GEN9_PIPELINE_SELECT | PIPELINE_SELECT_3D); gen8_emit_wm(batch); gen8_emit_ps(batch); gen8_emit_sf(batch); OUT_CMD(GEN7_3DSTATE_SBE, 6); /* Check w/ Gen8 code */ OUT_CMD(GEN8_3DSTATE_SBE_SWIZ, 11); gen8_emit_vs(batch); gen8_emit_hs(batch); OUT_CMD(GEN7_3DSTATE_GS, 10); OUT_CMD(GEN7_3DSTATE_STREAMOUT, 5); OUT_CMD(GEN7_3DSTATE_DS, 11); /* Check w/ Gen8 code */ OUT_CMD(GEN6_3DSTATE_CLIP, 4); gen8_emit_raster(batch); OUT_CMD(GEN7_3DSTATE_TE, 4); OUT_CMD(GEN8_3DSTATE_VF, 2); OUT_CMD(GEN8_3DSTATE_WM_HZ_OP, 5); /* URB States */ gen8_emit_urb(batch); OUT_CMD(GEN8_3DSTATE_BIND_TABLE_POOL_ALLOC, 4); OUT_CMD(GEN8_3DSTATE_GATHER_POOL_ALLOC, 4); OUT_CMD(GEN8_3DSTATE_DX9_CONSTANT_BUFFER_POOL_ALLOC, 4); /* Push Constants */ OUT_CMD(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS, 2); OUT_CMD(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS, 2); OUT_CMD(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS, 2); OUT_CMD(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS, 2); OUT_CMD(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS, 2); /* Constants */ OUT_CMD(GEN6_3DSTATE_CONSTANT_VS, 11); OUT_CMD(GEN7_3DSTATE_CONSTANT_HS, 11); OUT_CMD(GEN7_3DSTATE_CONSTANT_DS, 11); OUT_CMD(GEN7_3DSTATE_CONSTANT_GS, 11); OUT_CMD(GEN7_3DSTATE_CONSTANT_PS, 11); OUT_CMD(GEN8_3DSTATE_VF_INSTANCING, 3); OUT_CMD(GEN8_3DSTATE_VF_SGVS, 2); gen8_emit_vf_topology(batch); /* Streamer out declaration list */ gen8_emit_so_decl_list(batch); /* Streamer out buffers */ for (i = 0; i < 4; i++) { gen8_emit_so_buffer(batch, i); } /* State base addresses */ gen9_emit_state_base_address(batch); OUT_CMD(GEN6_STATE_SIP, 3); OUT_CMD(GEN6_3DSTATE_DRAWING_RECTANGLE, 4); OUT_CMD(GEN7_3DSTATE_DEPTH_BUFFER, 8); /* Chroma key */ for (i = 0; i < 4; i++) { gen8_emit_chroma_key(batch, i); } OUT_CMD(GEN6_3DSTATE_LINE_STIPPLE, 3); OUT_CMD(GEN6_3DSTATE_AA_LINE_PARAMS, 3); OUT_CMD(GEN7_3DSTATE_STENCIL_BUFFER, 5); OUT_CMD(GEN7_3DSTATE_HIER_DEPTH_BUFFER, 5); OUT_CMD(GEN7_3DSTATE_CLEAR_PARAMS, 3); OUT_CMD(GEN6_3DSTATE_MONOFILTER_SIZE, 2); OUT_CMD(GEN8_3DSTATE_MULTISAMPLE, 2); OUT_CMD(GEN8_3DSTATE_POLY_STIPPLE_OFFSET, 2); OUT_CMD(GEN8_3DSTATE_POLY_STIPPLE_PATTERN, 1 + 32); OUT_CMD(GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0, 1 + 16); OUT_CMD(GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1, 1 + 16); OUT_CMD(GEN6_3DSTATE_INDEX_BUFFER, 5); /* Vertex buffers */ gen8_emit_vertex_buffers(batch); gen8_emit_vertex_elements(batch); OUT_BATCH(GEN9_3DSTATE_COMPONENT_PACKING | 3); OUT_BATCH(0xf); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN6_3DSTATE_VF_STATISTICS | 1 /* Enable */); gen8_emit_cc_state_pointers(batch); gen8_emit_blend_state_pointers(batch); gen8_emit_ps_extra(batch); gen8_emit_ps_blend(batch); /* 3D state sampler state pointers */ OUT_CMD(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS, 2); OUT_CMD(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS, 2); OUT_CMD(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS, 2); OUT_CMD(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS, 2); OUT_CMD(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS, 2); OUT_CMD(GEN6_3DSTATE_SCISSOR_STATE_POINTERS, 2); gen8_emit_viewport_state_pointers_cc(batch); gen8_emit_viewport_state_pointers_sf_clip(batch); /* 3D state binding table pointers */ OUT_CMD(GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS, 2); OUT_CMD(GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS, 2); OUT_CMD(GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS, 2); OUT_CMD(GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS, 2); OUT_CMD(GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS, 2); /* Launch 3D operation */ gen8_emit_primitive(batch); OUT_BATCH(MI_BATCH_BUFFER_END); } intel-gpu-tools-1.14/tools/null_state_gen/intel_batchbuffer.h0000644000175000017500000000774112665336131021423 00000000000000/************************************************************************** * * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. * * Copyright 2014, 2015 Intel Corporation * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * **************************************************************************/ #ifndef _INTEL_BATCHBUFFER_H #define _INTEL_BATCHBUFFER_H #include #define MAX_RELOCS 64 #define MAX_ITEMS 1024 #define MAX_STRLEN 256 #define ALIGN(x, y) (((x) + (y)-1) & ~((y)-1)) typedef enum { UNINITIALIZED, CMD, STATE, RELOC, RELOC_STATE, STATE_OFFSET, PAD, } item_type; struct bb_item { uint32_t data; item_type type; char str[MAX_STRLEN]; }; struct bb_area { struct bb_item item[MAX_ITEMS]; unsigned long num_items; }; struct intel_batchbuffer { struct bb_area *cmds; struct bb_area *state; unsigned long cmds_end_offset; unsigned long state_start_offset; }; struct intel_batchbuffer *intel_batchbuffer_create(void); #define OUT_CMD_B(cmd, len, bias) intel_batch_cmd_emit_null(batch, (cmd), (len), (bias), #cmd " " #len) #define OUT_CMD(cmd, len) OUT_CMD_B(cmd, len, 2) #define OUT_BATCH(d) bb_area_emit(batch->cmds, d, CMD, #d) #define OUT_BATCH_STATE_OFFSET(d) bb_area_emit(batch->cmds, d, STATE_OFFSET, #d) #define OUT_RELOC(batch, read_domain, write_domain, d) bb_area_emit(batch->cmds, d, RELOC, #d) #define OUT_RELOC_STATE(batch, read_domain, write_domain, d) bb_area_emit(batch->cmds, d, RELOC_STATE, #d); #define OUT_STATE(d) bb_area_emit(batch->state, d, STATE, #d) #define OUT_STATE_OFFSET(offset) bb_area_emit(batch->state, offset, STATE_OFFSET, #offset) #define OUT_STATE_STRUCT(name, align) intel_batch_state_copy(batch, &name, sizeof(name), align, #name " " #align) uint32_t intel_batch_state_copy(struct intel_batchbuffer *batch, const void *d, unsigned bytes, unsigned align, const char *name); uint32_t intel_batch_state_alloc(struct intel_batchbuffer *batch, unsigned bytes, unsigned align, const char *name); uint32_t intel_batch_state_offset(struct intel_batchbuffer *batch, unsigned align); unsigned intel_batch_num_cmds(struct intel_batchbuffer *batch); struct bb_item *intel_batch_state_get(struct intel_batchbuffer *batch, unsigned i); unsigned intel_batch_num_state(struct intel_batchbuffer *batch); struct bb_item *intel_batch_cmd_get(struct intel_batchbuffer *batch, unsigned i); int intel_batch_is_reloc(struct intel_batchbuffer *batch, unsigned i); void intel_batch_relocate_state(struct intel_batchbuffer *batch); const char *intel_batch_type_as_str(const struct bb_item *item); void bb_area_emit(struct bb_area *a, uint32_t dword, item_type type, const char *str); void bb_area_emit_offset(struct bb_area *a, unsigned i, uint32_t dword, item_type type, const char *str); void intel_batch_cmd_emit_null(struct intel_batchbuffer *batch, const int cmd, const int len, const int len_bias, const char *str); #endif intel-gpu-tools-1.14/tools/null_state_gen/intel_renderstate.h0000644000175000017500000000303412665336131021457 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ #ifndef __INTEL_RENDERSTATE_H__ #define __INTEL_RENDERSTATE_H__ #include "intel_batchbuffer.h" void gen6_setup_null_render_state(struct intel_batchbuffer *batch); void gen7_setup_null_render_state(struct intel_batchbuffer *batch); void gen8_setup_null_render_state(struct intel_batchbuffer *batch); void gen9_setup_null_render_state(struct intel_batchbuffer *batch); #endif /* __INTEL_RENDERSTATE_H__ */ intel-gpu-tools-1.14/tools/intel_error_decode.c0000644000175000017500000005303512665336131016571 00000000000000/* * Copyright © 2007 Intel Corporation * Copyright © 2009 Intel Corporation * Copyright © 2010 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * Carl Worth * Chris Wilson * */ /** @file intel_decode.c * This file contains code to print out batchbuffer contents in a * human-readable format. * * The current version only supports i915 packets, and only pretty-prints a * subset of them. The intention is for it to make just a best attempt to * decode, but never crash in the process. */ #define _GNU_SOURCE #include #include #include #include #include #include #include #include #include #include #include #include #include #include "intel_chipset.h" #include "intel_io.h" #include "instdone.h" #include "intel_reg.h" #include "drmtest.h" static uint32_t print_head(unsigned int reg) { printf(" head = 0x%08x, wraps = %d\n", reg & (0x7ffff<<2), reg >> 21); return reg & (0x7ffff<<2); } static uint32_t print_ctl(unsigned int reg) { uint32_t ring_length = (((reg & (0x1ff << 12)) >> 12) + 1) * 4096; #define BIT_STR(reg, x, on, off) ((1 << (x)) & reg) ? on : off printf(" len=%d%s%s%s\n", ring_length, BIT_STR(reg, 0, ", enabled", ", disabled"), BIT_STR(reg, 10, ", semaphore wait ", ""), BIT_STR(reg, 11, ", rb wait ", "") ); #undef BIT_STR return ring_length; } static void print_acthd(unsigned int reg, unsigned int ring_length) { if ((reg & (0x7ffff << 2)) < ring_length) printf(" at ring: 0x%08x\n", reg & (0x7ffff << 2)); else printf(" at batch: 0x%08x\n", reg); } static void print_instdone(uint32_t devid, unsigned int instdone, unsigned int instdone1) { int i; static int once; if (!once) { if (!init_instdone_definitions(devid)) return; once = 1; } for (i = 0; i < num_instdone_bits; i++) { int busy = 0; if (instdone_bits[i].reg == INSTDONE_1) { if (!(instdone1 & instdone_bits[i].bit)) busy = 1; } else { if (!(instdone & instdone_bits[i].bit)) busy = 1; } if (busy) printf(" busy: %s\n", instdone_bits[i].name); } } static void print_i830_pgtbl_err(unsigned int reg) { const char *str; switch((reg >> 3) & 0xf) { case 0x1: str = "Overlay TLB"; break; case 0x2: str = "Display A TLB"; break; case 0x3: str = "Host TLB"; break; case 0x4: str = "Render TLB"; break; case 0x5: str = "Display C TLB"; break; case 0x6: str = "Mapping TLB"; break; case 0x7: str = "Command Stream TLB"; break; case 0x8: str = "Vertex Buffer TLB"; break; case 0x9: str = "Display B TLB"; break; case 0xa: str = "Reserved System Memory"; break; case 0xb: str = "Compressor TLB"; break; case 0xc: str = "Binner TLB"; break; default: str = "unknown"; break; } if (str) printf(" source = %s\n", str); switch(reg & 0x7) { case 0x0: str = "Invalid GTT"; break; case 0x1: str = "Invalid GTT PTE"; break; case 0x2: str = "Invalid Memory"; break; case 0x3: str = "Invalid TLB miss"; break; case 0x4: str = "Invalid PTE data"; break; case 0x5: str = "Invalid LocalMemory not present"; break; case 0x6: str = "Invalid Tiling"; break; case 0x7: str = "Host to CAM"; break; } printf(" error = %s\n", str); } static void print_i915_pgtbl_err(unsigned int reg) { if (reg & (1 << 29)) printf(" Cursor A: Invalid GTT PTE\n"); if (reg & (1 << 28)) printf(" Cursor B: Invalid GTT PTE\n"); if (reg & (1 << 27)) printf(" MT: Invalid tiling\n"); if (reg & (1 << 26)) printf(" MT: Invalid GTT PTE\n"); if (reg & (1 << 25)) printf(" LC: Invalid tiling\n"); if (reg & (1 << 24)) printf(" LC: Invalid GTT PTE\n"); if (reg & (1 << 23)) printf(" BIN VertexData: Invalid GTT PTE\n"); if (reg & (1 << 22)) printf(" BIN Instruction: Invalid GTT PTE\n"); if (reg & (1 << 21)) printf(" CS VertexData: Invalid GTT PTE\n"); if (reg & (1 << 20)) printf(" CS Instruction: Invalid GTT PTE\n"); if (reg & (1 << 19)) printf(" CS: Invalid GTT\n"); if (reg & (1 << 18)) printf(" Overlay: Invalid tiling\n"); if (reg & (1 << 16)) printf(" Overlay: Invalid GTT PTE\n"); if (reg & (1 << 14)) printf(" Display C: Invalid tiling\n"); if (reg & (1 << 12)) printf(" Display C: Invalid GTT PTE\n"); if (reg & (1 << 10)) printf(" Display B: Invalid tiling\n"); if (reg & (1 << 8)) printf(" Display B: Invalid GTT PTE\n"); if (reg & (1 << 6)) printf(" Display A: Invalid tiling\n"); if (reg & (1 << 4)) printf(" Display A: Invalid GTT PTE\n"); if (reg & (1 << 1)) printf(" Host Invalid PTE data\n"); if (reg & (1 << 0)) printf(" Host Invalid GTT PTE\n"); } static void print_i965_pgtbl_err(unsigned int reg) { if (reg & (1 << 26)) printf(" Invalid Sampler Cache GTT entry\n"); if (reg & (1 << 24)) printf(" Invalid Render Cache GTT entry\n"); if (reg & (1 << 23)) printf(" Invalid Instruction/State Cache GTT entry\n"); if (reg & (1 << 22)) printf(" There is no ROC, this cannot occur!\n"); if (reg & (1 << 21)) printf(" Invalid GTT entry during Vertex Fetch\n"); if (reg & (1 << 20)) printf(" Invalid GTT entry during Command Fetch\n"); if (reg & (1 << 19)) printf(" Invalid GTT entry during CS\n"); if (reg & (1 << 18)) printf(" Invalid GTT entry during Cursor Fetch\n"); if (reg & (1 << 17)) printf(" Invalid GTT entry during Overlay Fetch\n"); if (reg & (1 << 8)) printf(" Invalid GTT entry during Display B Fetch\n"); if (reg & (1 << 4)) printf(" Invalid GTT entry during Display A Fetch\n"); if (reg & (1 << 1)) printf(" Valid PTE references illegal memory\n"); if (reg & (1 << 0)) printf(" Invalid GTT entry during fetch for host\n"); } static void print_pgtbl_err(unsigned int reg, unsigned int devid) { if (IS_965(devid)) { return print_i965_pgtbl_err(reg); } else if (IS_GEN3(devid)) { return print_i915_pgtbl_err(reg); } else { return print_i830_pgtbl_err(reg); } } static void print_ivb_error(unsigned int reg, unsigned int devid) { if (reg & (1 << 0)) printf(" TLB page fault error (GTT entry not valid)\n"); if (reg & (1 << 1)) printf(" Invalid physical address in RSTRM interface (PAVP)\n"); if (reg & (1 << 2)) printf(" Invalid page directory entry error\n"); if (reg & (1 << 3)) printf(" Invalid physical address in ROSTRM interface (PAVP)\n"); if (reg & (1 << 4)) printf(" TLB page VTD translation generated an error\n"); if (reg & (1 << 5)) printf(" Invalid physical address in WRITE interface (PAVP)\n"); if (reg & (1 << 6)) printf(" Page directory VTD translation generated error\n"); if (reg & (1 << 8)) printf(" Cacheline containing a PD was marked as invalid\n"); if (IS_HASWELL(devid) && (reg >> 10) & 0x1f) printf(" %d pending page faults\n", (reg >> 10) & 0x1f); } static void print_snb_error(unsigned int reg) { if (reg & (1 << 0)) printf(" TLB page fault error (GTT entry not valid)\n"); if (reg & (1 << 1)) printf(" Context page GTT translation generated a fault (GTT entry not valid)\n"); if (reg & (1 << 2)) printf(" Invalid page directory entry error\n"); if (reg & (1 << 3)) printf(" HWS page GTT translation generated a page fault (GTT entry not valid)\n"); if (reg & (1 << 4)) printf(" TLB page VTD translation generated an error\n"); if (reg & (1 << 5)) printf(" Context page VTD translation generated an error\n"); if (reg & (1 << 6)) printf(" Page directory VTD translation generated error\n"); if (reg & (1 << 7)) printf(" HWS page VTD translation generated an error\n"); if (reg & (1 << 8)) printf(" Cacheline containing a PD was marked as invalid\n"); } static void print_bdw_error(unsigned int reg, unsigned int devid) { print_ivb_error(reg, devid); if (reg & (1 << 10)) printf(" Non WB memory type for Advanced Context\n"); if (reg & (1 << 11)) printf(" PASID not enabled\n"); if (reg & (1 << 12)) printf(" PASID boundary violation\n"); if (reg & (1 << 13)) printf(" PASID not valid\n"); if (reg & (1 << 14)) printf(" PASID was zero for untranslated request\n"); if (reg & (1 << 15)) printf(" Context was not marked as present when doing DMA\n"); } static void print_error(unsigned int reg, unsigned int devid) { switch (intel_gen(devid)) { case 8: return print_bdw_error(reg, devid); case 7: return print_ivb_error(reg, devid); case 6: return print_snb_error(reg); } } static void print_snb_fence(unsigned int devid, uint64_t fence) { printf(" %svalid, %c-tiled, pitch: %i, start: 0x%08x, size: %u\n", fence & 1 ? "" : "in", fence & (1<<1) ? 'y' : 'x', (int)(((fence>>32)&0xfff)+1)*128, (uint32_t)fence & 0xfffff000, (uint32_t)(((fence>>32)&0xfffff000) - (fence&0xfffff000) + 4096)); } static void print_i965_fence(unsigned int devid, uint64_t fence) { printf(" %svalid, %c-tiled, pitch: %i, start: 0x%08x, size: %u\n", fence & 1 ? "" : "in", fence & (1<<1) ? 'y' : 'x', (int)(((fence>>2)&0x1ff)+1)*128, (uint32_t)fence & 0xfffff000, (uint32_t)(((fence>>32)&0xfffff000) - (fence&0xfffff000) + 4096)); } static void print_i915_fence(unsigned int devid, uint64_t fence) { unsigned tile_width; if ((fence & 12) && !IS_915(devid)) tile_width = 128; else tile_width = 512; printf(" %svalid, %c-tiled, pitch: %i, start: 0x%08x, size: %i\n", fence & 1 ? "" : "in", fence & (1<<12) ? 'y' : 'x', (1<<((fence>>4)&0xf))*tile_width, (uint32_t)fence & 0xff00000, 1<<(20 + ((fence>>8)&0xf))); } static void print_i830_fence(unsigned int devid, uint64_t fence) { printf(" %svalid, %c-tiled, pitch: %i, start: 0x%08x, size: %i\n", fence & 1 ? "" : "in", fence & (1<<12) ? 'y' : 'x', (1<<((fence>>4)&0xf))*128, (uint32_t)fence & 0x7f80000, 1<<(19 + ((fence>>8)&0xf))); } static void print_fence(unsigned int devid, uint64_t fence) { if (IS_GEN6(devid) || IS_GEN7(devid)) { return print_snb_fence(devid, fence); } else if (IS_GEN4(devid) || IS_GEN5(devid)) { return print_i965_fence(devid, fence); } else if (IS_GEN3(devid)) { return print_i915_fence(devid, fence); } else { return print_i830_fence(devid, fence); } } static void print_fault_reg(unsigned devid, uint32_t reg) { const char *gen7_types[] = { "Page", "Invalid PD", "Unloaded PD", "Invalid and Unloaded PD" }; const char *gen8_types[] = { "PTE", "PDE", "PDPE", "PML4E" }; const char *engine[] = { "GFX", "MFX0", "MFX1", "VEBX", "BLT", "Unknown", "Unknown", "Unknown" }; if (intel_gen(devid) < 7) return; if (reg & (1 << 0)) printf(" Valid\n"); else return; if (intel_gen(devid) < 8) printf(" %s Fault (%s)\n", gen7_types[reg >> 1 & 0x3], reg & (1 << 11) ? "GGTT" : "PPGTT"); else printf(" Invalid %s Fault\n", gen8_types[reg >> 1 & 0x3]); if (intel_gen(devid) < 8) printf(" Address 0x%08x\n", reg & ~((1 << 12)-1)); else printf(" Engine %s\n", engine[reg >> 12 & 0x7]); printf(" Source ID %d\n", reg >> 3 & 0xff); } static void print_fault_data(unsigned devid, uint32_t data1, uint32_t data0) { uint64_t address; if (intel_gen(devid) < 8) return; address = ((uint64_t)(data0) << 12) | ((uint64_t)data1 & 0xf) << 44; printf(" Address 0x%016" PRIx64 " %s\n", address, data1 & (1 << 4) ? "GGTT" : "PPGTT"); } #define MAX_RINGS 10 /* I really hope this never... */ static void decode(struct drm_intel_decode *ctx, const char *buffer_name, const char *ring_name, uint64_t gtt_offset, uint32_t head_offset, uint32_t *data, int *count) { if (!*count) return; printf("%s (%s) at 0x%08x_%08x", buffer_name, ring_name, (unsigned)(gtt_offset >> 32), (unsigned)(gtt_offset & 0xffffffff)); if (head_offset != -1) printf("; HEAD points to: 0x%08x_%08x", (unsigned)((head_offset + gtt_offset) >> 32), (unsigned)((head_offset + gtt_offset) & 0xffffffff)); printf("\n"); drm_intel_decode_set_batch_pointer(ctx, data, gtt_offset, *count); drm_intel_decode(ctx); *count = 0; } static int zlib_inflate(uint32_t **ptr, int len) { struct z_stream_s zstream; void *out; memset(&zstream, 0, sizeof(zstream)); zstream.next_in = (unsigned char *)*ptr; zstream.avail_in = 4*len; if (inflateInit(&zstream) != Z_OK) return 0; out = malloc(128*4096); /* approximate obj size */ zstream.next_out = out; zstream.avail_out = 40*len; do { switch (inflate(&zstream, Z_SYNC_FLUSH)) { case Z_STREAM_END: goto end; case Z_OK: break; default: inflateEnd(&zstream); return 0; } if (zstream.avail_out) break; out = realloc(out, 2*zstream.total_out); if (out == NULL) { inflateEnd(&zstream); return 0; } zstream.next_out = (unsigned char *)out + zstream.total_out; zstream.avail_out = zstream.total_out; } while (1); end: inflateEnd(&zstream); free(*ptr); *ptr = out; return zstream.total_out / 4; } static int ascii85_decode(const char *in, uint32_t **out) { int len = 0, size = 1024; *out = realloc(*out, sizeof(uint32_t)*size); if (*out == NULL) return 0; while (*in >= '!' && *in <= 'z') { uint32_t v = 0; if (len == size) { size *= 2; *out = realloc(*out, sizeof(uint32_t)*size); if (*out == NULL) return 0; } if (*in == 'z') { in++; } else { v += in[0] - 33; v *= 85; v += in[1] - 33; v *= 85; v += in[2] - 33; v *= 85; v += in[3] - 33; v *= 85; v += in[4] - 33; in += 5; } (*out)[len++] = v; } return zlib_inflate(out, len); } static void read_data_file(FILE *file) { struct drm_intel_decode *decode_ctx = NULL; uint32_t devid = PCI_CHIP_I855_GM; uint32_t *data = NULL; uint32_t head[MAX_RINGS]; int head_idx = 0; int num_rings = 0; long long unsigned fence; int data_size = 0, count = 0, line_number = 0, matched; char *line = NULL; size_t line_size; uint32_t offset, value, ring_length = 0; uint64_t gtt_offset = 0, new_gtt_offset; uint32_t head_offset = -1; const char *buffer_name = "batch buffer"; char *ring_name = NULL; while (getline(&line, &line_size, file) > 0) { char *dashes; line_number++; dashes = strstr(line, "---"); if (dashes) { uint32_t lo, hi; char *new_ring_name = malloc(dashes - line); strncpy(new_ring_name, line, dashes - line); new_ring_name[dashes - line - 1] = '\0'; matched = sscanf(dashes, "--- gtt_offset = 0x%08x %08x\n", &hi, &lo); if (matched > 0) { new_gtt_offset = hi; if (matched == 2) { new_gtt_offset <<= 32; new_gtt_offset |= lo; } decode(decode_ctx, buffer_name, ring_name, gtt_offset, head_offset, data, &count); gtt_offset = new_gtt_offset; head_offset = -1; free(ring_name); ring_name = new_ring_name; buffer_name = "batch buffer"; continue; } matched = sscanf(dashes, "--- ringbuffer = 0x%08x %08x\n", &hi, &lo); if (matched > 0) { new_gtt_offset = hi; if (matched == 2) { new_gtt_offset <<= 32; new_gtt_offset |= lo; } decode(decode_ctx, buffer_name, ring_name, gtt_offset, head_offset, data, &count); gtt_offset = new_gtt_offset; if (head_idx < num_rings) head_offset = head[head_idx++]; else head_offset = -1; free(ring_name); ring_name = new_ring_name; buffer_name = "ring buffer"; continue; } matched = sscanf(dashes, "--- HW Context = 0x%08x %08x\n", &hi, &lo); if (matched > 0) { new_gtt_offset = hi; if (matched == 2) { new_gtt_offset <<= 32; new_gtt_offset |= lo; } decode(decode_ctx, buffer_name, ring_name, gtt_offset, head_offset, data, &count); gtt_offset = new_gtt_offset; head_offset = -1; free(ring_name); ring_name = new_ring_name; buffer_name = "HW Context"; continue; } } if (line[0] == ':') { count = ascii85_decode(line+1, &data); if (count == 0) { fprintf(stderr, "ASCII85 decode failed.\n"); exit(1); } decode(decode_ctx, buffer_name, ring_name, gtt_offset, head_offset, data, &count); continue; } matched = sscanf(line, "%08x : %08x", &offset, &value); if (matched != 2) { unsigned int reg, reg2; /* display reg section is after the ringbuffers, don't mix them */ decode(decode_ctx, buffer_name, ring_name, gtt_offset, head_offset, data, &count); printf("%s", line); matched = sscanf(line, "PCI ID: 0x%04x\n", ®); if (matched == 0) matched = sscanf(line, " PCI ID: 0x%04x\n", ®); if (matched == 0) { const char *pci_id_start = strstr(line, "PCI ID"); if (pci_id_start) matched = sscanf(pci_id_start, "PCI ID: 0x%04x\n", ®); } if (matched == 1) { devid = reg; printf("Detected GEN%i chipset\n", intel_gen(devid)); decode_ctx = drm_intel_decode_context_alloc(devid); } matched = sscanf(line, " CTL: 0x%08x\n", ®); if (matched == 1) ring_length = print_ctl(reg); matched = sscanf(line, " HEAD: 0x%08x\n", ®); if (matched == 1) { head[num_rings++] = print_head(reg); } matched = sscanf(line, " ACTHD: 0x%08x\n", ®); if (matched == 1) { print_acthd(reg, ring_length); drm_intel_decode_set_head_tail(decode_ctx, reg, 0xffffffff); } matched = sscanf(line, " PGTBL_ER: 0x%08x\n", ®); if (matched == 1 && reg) print_pgtbl_err(reg, devid); matched = sscanf(line, " ERROR: 0x%08x\n", ®); if (matched == 1 && reg) print_error(reg, devid); matched = sscanf(line, " INSTDONE: 0x%08x\n", ®); if (matched == 1) print_instdone(devid, reg, -1); matched = sscanf(line, " INSTDONE1: 0x%08x\n", ®); if (matched == 1) print_instdone(devid, -1, reg); matched = sscanf(line, " fence[%i] = %Lx\n", ®, &fence); if (matched == 2) print_fence(devid, fence); matched = sscanf(line, " FAULT_REG: 0x%08x\n", ®); if (matched == 1 && reg) print_fault_reg(devid, reg); matched = sscanf(line, " FAULT_TLB_DATA: 0x%08x 0x%08x\n", ®, ®2); if (matched == 2) print_fault_data(devid, reg, reg2); continue; } count++; if (count > data_size) { data_size = data_size ? data_size * 2 : 1024; data = realloc(data, data_size * sizeof (uint32_t)); if (data == NULL) { fprintf(stderr, "Out of memory.\n"); exit(1); } } data[count-1] = value; } decode(decode_ctx, buffer_name, ring_name, gtt_offset, head_offset, data, &count); free(data); free(line); free(ring_name); } int main(int argc, char *argv[]) { FILE *file; const char *path; char *filename = NULL; struct stat st; int error; if (argc > 2) { fprintf(stderr, "intel_gpu_decode: Parse an Intel GPU i915_error_state\n" "Usage:\n" "\t%s []\n" "\n" "With no arguments, debugfs-dri-directory is probed for in " "/debug and \n" "/sys/kernel/debug. Otherwise, it may be " "specified. If a file is given,\n" "it is parsed as an GPU dump in the format of " "/debug/dri/0/i915_error_state.\n", argv[0]); return 1; } if (argc == 1) { if (isatty(0)) { path = "/sys/class/drm/card0/error"; error = stat(path, &st); if (error != 0) { path = "/debug/dri"; error = stat(path, &st); } if (error != 0) { path = "/sys/kernel/debug/dri"; error = stat(path, &st); } if (error != 0) { errx(1, "Couldn't find i915 debugfs directory.\n\n" "Is debugfs mounted? You might try mounting it with a command such as:\n\n" "\tsudo mount -t debugfs debugfs /sys/kernel/debug\n"); } } else { read_data_file(stdin); exit(0); } } else { path = argv[1]; error = stat(path, &st); if (error != 0) { fprintf(stderr, "Error opening %s: %s\n", path, strerror(errno)); exit(1); } } if (S_ISDIR(st.st_mode)) { int ret; ret = asprintf(&filename, "%s/i915_error_state", path); assert(ret > 0); file = fopen(filename, "r"); if (!file) { int minor; for (minor = 0; minor < 64; minor++) { free(filename); ret = asprintf(&filename, "%s/%d/i915_error_state", path, minor); assert(ret > 0); file = fopen(filename, "r"); if (file) break; } } if (!file) { fprintf(stderr, "Failed to find i915_error_state beneath %s\n", path); exit (1); } } else { file = fopen(path, "r"); if (!file) { fprintf(stderr, "Failed to open %s: %s\n", path, strerror(errno)); exit (1); } } read_data_file(file); fclose(file); if (filename != path) free(filename); return 0; } /* vim: set ts=8 sw=8 tw=0 noet :*/ intel-gpu-tools-1.14/tools/intel_reg_spec.h0000644000175000017500000000457112665336131015732 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ #ifndef __INTEL_REG_SPEC_H__ #define __INTEL_REG_SPEC_H__ enum port_addr { PORT_NONE = 0, PORT_MMIO = -1, PORT_PORTIO_VGA = -2, /* see vga reg read/write */ PORT_MMIO_VGA = -3, /* see vga reg read/write */ /* vlv */ PORT_BUNIT = 0x03, PORT_PUNIT = 0x04, PORT_NC = 0x11, PORT_DPIO = 0x12, PORT_GPIO_NC = 0x13, PORT_CCK = 0x14, PORT_CCU = 0xa9, PORT_DPIO2 = 0x1a, PORT_FLISDSI = 0x1b, /* threshold for interpreting port as mmio offset */ PORT_MAX = 0xff, }; struct port_desc { enum port_addr port; const char *name; uint32_t stride; }; struct reg { struct port_desc port_desc; uint32_t mmio_offset; uint32_t addr; char *name; }; #ifndef ARRAY_SIZE #define ARRAY_SIZE(x) (sizeof(x)/sizeof(x[0])) #endif static inline void *recalloc(void *ptr, size_t nmemb, size_t size) { return realloc(ptr, nmemb * size); } int parse_port_desc(struct reg *reg, const char *s); ssize_t intel_reg_spec_builtin(struct reg **regs, uint32_t devid); ssize_t intel_reg_spec_file(struct reg **regs, const char *filename); void intel_reg_spec_free(struct reg *regs, size_t n); int intel_reg_spec_decode(char *buf, size_t bufsize, const struct reg *reg, uint32_t val, uint32_t devid); void intel_reg_spec_print_ports(void); #endif /* __INTEL_REG_SPEC_H__ */ intel-gpu-tools-1.14/tools/intel_display_crc.c0000644000175000017500000000501312665336131016422 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Damien Lespiau */ #include #include #include #include #include "igt_core.h" #include "igt_debugfs.h" #include "igt_kms.h" typedef struct { int fd; int pipe; int n_crcs; } display_crc_t; static int pipe_from_str(const char *str) { unsigned char c; if (!str || strlen(str) != 1) return -1; c = str[0]; if (c >= 'A' && c <= 'C') return c - 'A'; if (c >= 'a' && c <= 'c') return c - 'a'; if (c >= '0' && c <= '3') return c - '0'; return -1; } static void print_crcs(display_crc_t *ctx) { igt_pipe_crc_t *pipe_crc; igt_crc_t crc; char *crc_str; int i; pipe_crc = igt_pipe_crc_new(ctx->pipe, INTEL_PIPE_CRC_SOURCE_AUTO); for (i = 0; i < ctx->n_crcs; i++) { igt_pipe_crc_collect_crc(pipe_crc, &crc); crc_str = igt_crc_to_string(&crc); printf("CRC on pipe %s: %s\n", kmstest_pipe_name(ctx->pipe), crc_str); free(crc_str); } igt_pipe_crc_free(pipe_crc); } static display_crc_t ctx; int main(int argc, char **argv) { int opt; ctx.n_crcs = 1; while ((opt = getopt(argc, argv, "p:n:")) != -1) { switch (opt) { case 'p': ctx.pipe = pipe_from_str(optarg); if (ctx.pipe == -1) { fprintf(stderr, "Unknown pipe %s\n", optarg); exit(1); } break; case 'n': ctx.n_crcs = atoi(optarg); break; default: igt_assert(0); } } print_crcs(&ctx); } intel-gpu-tools-1.14/tools/intel_lid.c0000644000175000017500000000675512665336131014714 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. * * Authors: * Zhenyu Wang * */ #include #include #include #include #include #include #include #include #include #include #include #include "intel_io.h" #include "intel_reg.h" #include "intel_bios.h" #include "intel_chipset.h" enum lid_status { LID_UNKNOWN = -1, LID_OPEN, LID_CLOSE, }; #define ACPI_BUTTON "/proc/acpi/button/" #define ACPI_LID "/proc/acpi/button/lid/" static int i830_lvds_acpi_lid_state(void) { int fd; DIR *button_dir; DIR *lid_dir; struct dirent *lid_dent; char *state_name; char state[64]; enum lid_status ret = LID_UNKNOWN; button_dir = opendir(ACPI_BUTTON); /* If acpi button driver is not loaded, bypass ACPI check method */ if (button_dir == NULL) goto out; closedir(button_dir); lid_dir = opendir(ACPI_LID); /* no acpi lid object found */ if (lid_dir == NULL) goto out; while (1) { lid_dent = readdir(lid_dir); if (lid_dent == NULL) { /* no LID object */ closedir(lid_dir); goto out; } if (strcmp(lid_dent->d_name, ".") && strcmp(lid_dent->d_name, "..")) { break; } } state_name = malloc(strlen(ACPI_LID) + strlen(lid_dent->d_name) + 7); memset(state_name, 0, strlen(ACPI_LID) + strlen(lid_dent->d_name) + 7); strcat(state_name, ACPI_LID); strcat(state_name, lid_dent->d_name); strcat(state_name, "/state"); closedir(lid_dir); if ((fd = open(state_name, O_RDONLY)) == -1) { free(state_name); goto out; } free(state_name); if (read(fd, state, 64) == -1) { close(fd); goto out; } close(fd); if (strstr(state, "open")) ret = LID_OPEN; else if (strstr(state, "closed")) ret = LID_CLOSE; else /* "unsupported" */ ret = LID_UNKNOWN; out: return ret; } int main(int argc, char **argv) { int swf14, acpi_lid; intel_mmio_use_pci_bar(intel_get_pci_device()); while (1) { swf14 = INREG(SWF14); printf("Intel LVDS Lid status:\n"); printf("\tSWF14(0x%x) : %s\n", swf14, swf14 & SWF14_LID_SWITCH_EN ? "close" : "open"); acpi_lid = i830_lvds_acpi_lid_state(); switch (acpi_lid) { case LID_UNKNOWN: printf("\tACPI Lid state : unknown\n"); break; case LID_OPEN: printf("\tACPI Lid state : open\n"); break; case LID_CLOSE: printf("\tACPI Lid state : close\n"); break; } sleep(2); } return 0; } intel-gpu-tools-1.14/tools/skl_compute_wrpll.c0000644000175000017500000004622312665336131016510 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ #include #include #include #include #include #include #include #include #include "igt_stats.h" #define U64_MAX ((uint64_t)~0ULL) #define ARRAY_SIZE(arr) (sizeof(arr)/sizeof(arr[0])) #define WARN(cond, msg) printf(msg) #define KHz(x) (1000 * (x)) #define MHz(x) KHz(1000 * (x)) #define abs_diff(a, b) ({ \ typeof(a) __a = (a); \ typeof(b) __b = (b); \ (void) (&__a == &__b); \ __a > __b ? (__a - __b) : (__b - __a); }) static inline uint64_t div64_u64(uint64_t dividend, uint64_t divisor) { return dividend / divisor; } static inline uint64_t div_u64(uint64_t dividend, uint32_t divisor) { return dividend / divisor; } struct skl_wrpll_params { uint32_t dco_fraction; uint32_t dco_integer; uint32_t qdiv_ratio; uint32_t qdiv_mode; uint32_t kdiv; uint32_t pdiv; uint32_t central_freq; /* for this test code only */ uint64_t central_freq_hz; unsigned int p0, p1, p2; }; static bool skl_ddi_calculate_wrpll1(int clock /* in Hz */, struct skl_wrpll_params *wrpll_params) { uint64_t afe_clock = clock * 5; /* AFE Clock is 5x Pixel clock */ uint64_t dco_central_freq[3] = {8400000000ULL, 9000000000ULL, 9600000000ULL}; uint32_t min_dco_pdeviation = 100; /* DCO freq must be within +1%/-6% */ uint32_t min_dco_ndeviation = 600; /* of the DCO central freq */ uint32_t min_dco_index = 3; uint32_t P0[4] = {1, 2, 3, 7}; uint32_t P2[4] = {1, 2, 3, 5}; bool found = false; uint32_t candidate_p = 0; uint32_t candidate_p0[3] = {0}, candidate_p1[3] = {0}; uint32_t candidate_p2[3] = {0}; uint32_t dco_central_freq_deviation[3]; uint32_t i, P1, k, dco_count; bool retry_with_odd = false; /* Determine P0, P1 or P2 */ for (dco_count = 0; dco_count < 3; dco_count++) { found = false; candidate_p = div64_u64(dco_central_freq[dco_count], afe_clock); if (retry_with_odd == false) candidate_p = (candidate_p % 2 == 0 ? candidate_p : candidate_p + 1); for (P1 = 1; P1 < candidate_p; P1++) { for (i = 0; i < 4; i++) { if (!(P0[i] != 1 || P1 == 1)) continue; for (k = 0; k < 4; k++) { if (P1 != 1 && P2[k] != 2) continue; if (candidate_p == P0[i] * P1 * P2[k]) { /* Found possible P0, P1, P2 */ found = true; candidate_p0[dco_count] = P0[i]; candidate_p1[dco_count] = P1; candidate_p2[dco_count] = P2[k]; goto found; } } } } found: if (found) { uint64_t dco_freq = candidate_p * afe_clock; #if 0 printf("Trying with (%d,%d,%d)\n", candidate_p0[dco_count], candidate_p1[dco_count], candidate_p2[dco_count]); #endif dco_central_freq_deviation[dco_count] = div64_u64(10000 * abs_diff(dco_freq, dco_central_freq[dco_count]), dco_central_freq[dco_count]); #if 0 printf("Deviation %d\n", dco_central_freq_deviation[dco_count]); printf("dco_freq: %"PRIu64", " "dco_central_freq %"PRIu64"\n", dco_freq, dco_central_freq[dco_count]); #endif /* positive deviation */ if (dco_freq > dco_central_freq[dco_count]) { if (dco_central_freq_deviation[dco_count] < min_dco_pdeviation) { min_dco_pdeviation = dco_central_freq_deviation[dco_count]; min_dco_index = dco_count; } /* negative deviation */ } else if (dco_central_freq_deviation[dco_count] < min_dco_ndeviation) { min_dco_ndeviation = dco_central_freq_deviation[dco_count]; min_dco_index = dco_count; } } if (min_dco_index > 2 && dco_count == 2) { /* oh well, we tried... */ if (retry_with_odd) break; retry_with_odd = true; dco_count = 0; } } if (min_dco_index > 2) { WARN(1, "No valid values found for the given pixel clock\n"); return false; } else { uint64_t dco_freq; wrpll_params->central_freq = dco_central_freq[min_dco_index]; switch (dco_central_freq[min_dco_index]) { case 9600000000ULL: wrpll_params->central_freq = 0; break; case 9000000000ULL: wrpll_params->central_freq = 1; break; case 8400000000ULL: wrpll_params->central_freq = 3; } switch (candidate_p0[min_dco_index]) { case 1: wrpll_params->pdiv = 0; break; case 2: wrpll_params->pdiv = 1; break; case 3: wrpll_params->pdiv = 2; break; case 7: wrpll_params->pdiv = 4; break; default: WARN(1, "Incorrect PDiv\n"); } switch (candidate_p2[min_dco_index]) { case 5: wrpll_params->kdiv = 0; break; case 2: wrpll_params->kdiv = 1; break; case 3: wrpll_params->kdiv = 2; break; case 1: wrpll_params->kdiv = 3; break; default: WARN(1, "Incorrect KDiv\n"); } wrpll_params->qdiv_ratio = candidate_p1[min_dco_index]; wrpll_params->qdiv_mode = (wrpll_params->qdiv_ratio == 1) ? 0 : 1; dco_freq = candidate_p0[min_dco_index] * candidate_p1[min_dco_index] * candidate_p2[min_dco_index] * afe_clock; /* * Intermediate values are in Hz. * Divide by MHz to match bsepc */ wrpll_params->dco_integer = div_u64(dco_freq, (24 * MHz(1))); wrpll_params->dco_fraction = div_u64(((div_u64(dco_freq, 24) - wrpll_params->dco_integer * MHz(1)) * 0x8000), MHz(1)); } /* for this unit test only */ wrpll_params->central_freq_hz = dco_central_freq[min_dco_index]; wrpll_params->p0 = candidate_p0[min_dco_index]; wrpll_params->p1 = candidate_p1[min_dco_index]; wrpll_params->p2 = candidate_p2[min_dco_index]; return true; } struct skl_wrpll_context { uint64_t min_deviation; /* current minimal deviation */ uint64_t central_freq; /* chosen central freq */ uint64_t dco_freq; /* chosen dco freq */ unsigned int p; /* chosen divider */ }; static void skl_wrpll_context_init(struct skl_wrpll_context *ctx) { memset(ctx, 0, sizeof(*ctx)); ctx->min_deviation = U64_MAX; } /* DCO freq must be within +1%/-6% of the DCO central freq */ #define SKL_MAX_PDEVIATION 100 #define SKL_MAX_NDEVIATION 600 /* * Returns true if we're sure to have found the definitive divider (ie * deviation == 0). */ static bool skl_wrpll_try_divider(struct skl_wrpll_context *ctx, uint64_t central_freq, uint64_t dco_freq, unsigned int divider) { uint64_t deviation; bool found = false; deviation = div64_u64(10000 * abs_diff(dco_freq, central_freq), central_freq); /* positive deviation */ if (dco_freq >= central_freq) { if (deviation < SKL_MAX_PDEVIATION && deviation < ctx->min_deviation) { ctx->min_deviation = deviation; ctx->central_freq = central_freq; ctx->dco_freq = dco_freq; ctx->p = divider; #if 0 found = true; #endif } /* we can't improve a 0 deviation */ if (deviation == 0) return true; /* negative deviation */ } else if (deviation < SKL_MAX_NDEVIATION && deviation < ctx->min_deviation) { ctx->min_deviation = deviation; ctx->central_freq = central_freq; ctx->dco_freq = dco_freq; ctx->p = divider; #if 0 found = true; #endif } if (found) { printf("Divider %d\n", divider); printf("Deviation %"PRIu64"\n", deviation); printf("dco_freq: %"PRIu64", dco_central_freq %"PRIu64"\n", dco_freq, central_freq); } return false; } static void skl_wrpll_get_multipliers(unsigned int p, unsigned int *p0 /* out */, unsigned int *p1 /* out */, unsigned int *p2 /* out */) { /* even dividers */ if (p % 2 == 0) { unsigned int half = p / 2; if (half == 1 || half == 2 || half == 3 || half == 5) { *p0 = 2; *p1 = 1; *p2 = half; } else if (half % 2 == 0) { *p0 = 2; *p1 = half / 2; *p2 = 2; } else if (half % 3 == 0) { *p0 = 3; *p1 = half / 3; *p2 = 2; } else if (half % 7 == 0) { *p0 = 7; *p1 = half / 7; *p2 = 2; } } else if (p == 3 || p == 9) { /* 3, 5, 7, 9, 15, 21, 35 */ *p0 = 3; *p1 = 1; *p2 = p / 3; } else if (p == 5 || p == 7) { *p0 = p; *p1 = 1; *p2 = 1; } else if (p == 15) { *p0 = 3; *p1 = 1; *p2 = 5; } else if (p == 21) { *p0 = 7; *p1 = 1; *p2 = 3; } else if (p == 35) { *p0 = 7; *p1 = 1; *p2 = 5; } } static void test_multipliers(void) { static const int even_dividers[] = { 4, 6, 8, 10, 12, 14, 16, 18, 20, 24, 28, 30, 32, 36, 40, 42, 44, 48, 52, 54, 56, 60, 64, 66, 68, 70, 72, 76, 78, 80, 84, 88, 90, 92, 96, 98 }; static const int odd_dividers[] = { 3, 5, 7, 9, 15, 21, 35 }; static const struct { const int *list; int n_dividers; } dividers[] = { { even_dividers, ARRAY_SIZE(even_dividers) }, { odd_dividers, ARRAY_SIZE(odd_dividers) }, }; unsigned int d, i; for (d = 0; d < ARRAY_SIZE(dividers); d++) { for (i = 0; i < dividers[d].n_dividers; i++) { unsigned int p = dividers[d].list[i]; unsigned p0, p1, p2; p0 = p1 = p2 = 0; skl_wrpll_get_multipliers(p, &p0, &p1, &p2); assert(p0); assert(p1); assert(p2); assert(p == p0 * p1 * p2); } } } static bool skl_ddi_calculate_wrpll2(int clock /* in Hz */, struct skl_wrpll_params *wrpll_params) { uint64_t afe_clock = clock * 5; /* AFE Clock is 5x Pixel clock */ uint64_t dco_central_freq[3] = {8400000000ULL, 9000000000ULL, 9600000000ULL}; static const int even_dividers[] = { 4, 6, 8, 10, 12, 14, 16, 18, 20, 24, 28, 30, 32, 36, 40, 42, 44, 48, 52, 54, 56, 60, 64, 66, 68, 70, 72, 76, 78, 80, 84, 88, 90, 92, 96, 98 }; static const int odd_dividers[] = { 3, 5, 7, 9, 15, 21, 35 }; static const struct { const int *list; int n_dividers; } dividers[] = { { even_dividers, ARRAY_SIZE(even_dividers) }, { odd_dividers, ARRAY_SIZE(odd_dividers) }, }; struct skl_wrpll_context ctx; unsigned int dco, d, i; unsigned int p0, p1, p2; skl_wrpll_context_init(&ctx); for (d = 0; d < ARRAY_SIZE(dividers); d++) { for (dco = 0; dco < ARRAY_SIZE(dco_central_freq); dco++) { for (i = 0; i < dividers[d].n_dividers; i++) { unsigned int p = dividers[d].list[i]; uint64_t dco_freq = p * afe_clock; if (skl_wrpll_try_divider(&ctx, dco_central_freq[dco], dco_freq, p)) goto skip_remaining_dividers; } } skip_remaining_dividers: /* * If a solution is found with an even divider, prefer * this one. */ if (d == 0 && ctx.p) break; } if (!ctx.p) return false; skl_wrpll_get_multipliers(ctx.p, &p0, &p1, &p2); /* for this unit test only */ wrpll_params->central_freq_hz = ctx.central_freq; wrpll_params->p0 = p0; wrpll_params->p1 = p1; wrpll_params->p2 = p2; return true; } static const struct { uint32_t clock; /* in Hz */ } modes[] = { { 19750000 }, { 20000000 }, { 21000000 }, { 21912000 }, { 22000000 }, { 23000000 }, { 23500000 }, { 23750000 }, { 24000000 }, { 25000000 }, { 25175000 }, { 25200000 }, { 26000000 }, { 27000000 }, { 27027000 }, { 27500000 }, { 28000000 }, { 28320000 }, { 28322000 }, { 28750000 }, { 29000000 }, { 29750000 }, { 30000000 }, { 30750000 }, { 31000000 }, { 31500000 }, { 32000000 }, { 32500000 }, { 33000000 }, { 34000000 }, { 35000000 }, { 35500000 }, { 36000000 }, { 36750000 }, { 37000000 }, { 37762500 }, { 37800000 }, { 38000000 }, { 38250000 }, { 39000000 }, { 40000000 }, { 40500000 }, { 40541000 }, { 40750000 }, { 41000000 }, { 41500000 }, { 41540000 }, { 42000000 }, { 42500000 }, { 43000000 }, { 43163000 }, { 44000000 }, { 44900000 }, { 45000000 }, { 45250000 }, { 46000000 }, { 46750000 }, { 47000000 }, { 48000000 }, { 49000000 }, { 49500000 }, { 50000000 }, { 50500000 }, { 51000000 }, { 52000000 }, { 52406000 }, { 53000000 }, { 54000000 }, { 54054000 }, { 54500000 }, { 55000000 }, { 56000000 }, { 56250000 }, { 56750000 }, { 57000000 }, { 58000000 }, { 58250000 }, { 58750000 }, { 59000000 }, { 59341000 }, { 59400000 }, { 60000000 }, { 60500000 }, { 61000000 }, { 62000000 }, { 62250000 }, { 63000000 }, { 63500000 }, { 64000000 }, { 65000000 }, { 65250000 }, { 65500000 }, { 66000000 }, { 66667000 }, { 66750000 }, { 67000000 }, { 67750000 }, { 68000000 }, { 68179000 }, { 68250000 }, { 69000000 }, { 70000000 }, { 71000000 }, { 72000000 }, { 73000000 }, { 74000000 }, { 74176000 }, { 74250000 }, { 74481000 }, { 74500000 }, { 75000000 }, { 75250000 }, { 76000000 }, { 77000000 }, { 78000000 }, { 78750000 }, { 79000000 }, { 79500000 }, { 80000000 }, { 81000000 }, { 81081000 }, { 81624000 }, { 82000000 }, { 83000000 }, { 83950000 }, { 84000000 }, { 84750000 }, { 85000000 }, { 85250000 }, { 85750000 }, { 86000000 }, { 87000000 }, { 88000000 }, { 88500000 }, { 89000000 }, { 89012000 }, { 89100000 }, { 90000000 }, { 91000000 }, { 92000000 }, { 93000000 }, { 94000000 }, { 94500000 }, { 95000000 }, { 95654000 }, { 95750000 }, { 96000000 }, { 97000000 }, { 97750000 }, { 98000000 }, { 99000000 }, { 99750000 }, { 100000000 }, { 100500000 }, { 101000000 }, { 101250000 }, { 102000000 }, { 102250000 }, { 103000000 }, { 104000000 }, { 105000000 }, { 106000000 }, { 107000000 }, { 107214000 }, { 108000000 }, { 108108000 }, { 109000000 }, { 110000000 }, { 110013000 }, { 110250000 }, { 110500000 }, { 111000000 }, { 111264000 }, { 111375000 }, { 112000000 }, { 112500000 }, { 113100000 }, { 113309000 }, { 114000000 }, { 115000000 }, { 116000000 }, { 117000000 }, { 117500000 }, { 118000000 }, { 119000000 }, { 119500000 }, { 119651000 }, { 120000000 }, { 121000000 }, { 121250000 }, { 121750000 }, { 122000000 }, { 122614000 }, { 123000000 }, { 123379000 }, { 124000000 }, { 125000000 }, { 125250000 }, { 125750000 }, { 126000000 }, { 127000000 }, { 127250000 }, { 128000000 }, { 129000000 }, { 129859000 }, { 130000000 }, { 130250000 }, { 131000000 }, { 131500000 }, { 131850000 }, { 132000000 }, { 132750000 }, { 133000000 }, { 133330000 }, { 134000000 }, { 135000000 }, { 135250000 }, { 136000000 }, { 137000000 }, { 138000000 }, { 138500000 }, { 138750000 }, { 139000000 }, { 139050000 }, { 139054000 }, { 140000000 }, { 141000000 }, { 141500000 }, { 142000000 }, { 143000000 }, { 143472000 }, { 144000000 }, { 145000000 }, { 146000000 }, { 146250000 }, { 147000000 }, { 147891000 }, { 148000000 }, { 148250000 }, { 148352000 }, { 148500000 }, { 149000000 }, { 150000000 }, { 151000000 }, { 152000000 }, { 152280000 }, { 153000000 }, { 154000000 }, { 155000000 }, { 155250000 }, { 155750000 }, { 156000000 }, { 157000000 }, { 157500000 }, { 158000000 }, { 158250000 }, { 159000000 }, { 159500000 }, { 160000000 }, { 161000000 }, { 162000000 }, { 162162000 }, { 162500000 }, { 163000000 }, { 164000000 }, { 165000000 }, { 166000000 }, { 167000000 }, { 168000000 }, { 169000000 }, { 169128000 }, { 169500000 }, { 170000000 }, { 171000000 }, { 172000000 }, { 172750000 }, { 172800000 }, { 173000000 }, { 174000000 }, { 174787000 }, { 175000000 }, { 176000000 }, { 177000000 }, { 178000000 }, { 178500000 }, { 179000000 }, { 179500000 }, { 180000000 }, { 181000000 }, { 182000000 }, { 183000000 }, { 184000000 }, { 184750000 }, { 185000000 }, { 186000000 }, { 187000000 }, { 188000000 }, { 189000000 }, { 190000000 }, { 190960000 }, { 191000000 }, { 192000000 }, { 192250000 }, { 193000000 }, { 193250000 }, { 194000000 }, { 194208000 }, { 195000000 }, { 196000000 }, { 197000000 }, { 197750000 }, { 198000000 }, { 198500000 }, { 199000000 }, { 200000000 }, { 201000000 }, { 202000000 }, { 202500000 }, { 203000000 }, { 204000000 }, { 204750000 }, { 205000000 }, { 206000000 }, { 207000000 }, { 207500000 }, { 208000000 }, { 208900000 }, { 209000000 }, { 209250000 }, { 210000000 }, { 211000000 }, { 212000000 }, { 213000000 }, { 213750000 }, { 214000000 }, { 214750000 }, { 215000000 }, { 216000000 }, { 217000000 }, { 218000000 }, { 218250000 }, { 218750000 }, { 219000000 }, { 220000000 }, { 220640000 }, { 220750000 }, { 221000000 }, { 222000000 }, { 222525000 }, { 222750000 }, { 227000000 }, { 230250000 }, { 233500000 }, { 235000000 }, { 238000000 }, { 241500000 }, { 245250000 }, { 247750000 }, { 253250000 }, { 256250000 }, { 262500000 }, { 267250000 }, { 268500000 }, { 270000000 }, { 272500000 }, { 273750000 }, { 280750000 }, { 281250000 }, { 286000000 }, { 291750000 }, { 296703000 }, { 297000000 }, { 298000000 }, }; struct test_ops { bool (*compute)(int clock, struct skl_wrpll_params *params); } tests[] = { { .compute = skl_ddi_calculate_wrpll1 }, { .compute = skl_ddi_calculate_wrpll2 }, }; static void test_run(struct test_ops *test) { unsigned int m; unsigned p_odd_even[2] = { 0, 0 }; igt_stats_t stats; igt_stats_init_with_size(&stats, ARRAY_SIZE(modes)); igt_stats_set_population(&stats, true); for (m = 0; m < ARRAY_SIZE(modes); m++) { struct skl_wrpll_params params = {}; int clock = modes[m].clock; unsigned int p; if (!test->compute(clock, ¶ms)) { fprintf(stderr, "Couldn't compute divider for %dHz\n", clock); continue; } p = params.p0 * params.p1 * params.p2; /* * make sure we respect the +1%/-6% contraint around the * central frequency */ { uint64_t dco_freq = (uint64_t)p * clock * 5; uint64_t central_freq = params.central_freq_hz; uint64_t deviation; uint64_t diff; diff = abs_diff(dco_freq, central_freq); deviation = div64_u64(10000 * diff, central_freq); igt_stats_push(&stats, deviation); if (dco_freq > central_freq) { if (deviation > 100) printf("failed constraint for %dHz " "deviation=%"PRIu64"\n", clock, deviation); } else if (deviation > 600) printf("failed constraint for %dHz " "deviation=%"PRIu64"\n", clock, deviation); } /* * count how many even/odd dividers we have through the whole * list of tested frequencies */ { p_odd_even[p % 2]++; } } printf("even/odd dividers: %d/%d\n", p_odd_even[0], p_odd_even[1]); printf("mean central freq deviation: %.2lf\n", igt_stats_get_mean(&stats)); igt_stats_fini(&stats); } int main(int argc, char **argv) { unsigned int t; test_multipliers(); for (t = 0; t < ARRAY_SIZE(tests); t++) { printf("=== Testing algorithm #%d\n", t + 1); test_run(&tests[t]); } return 0; } intel-gpu-tools-1.14/tools/intel_gpu_abrt0000755000175000017500000000411112665336131015511 00000000000000#!/bin/sh if [ $(id -ru) -ne 0 ]; then echo "$0 must be run as root" exit 1 fi get(){ if [ ! -e $tardir/${@:$#} ] ; then mkdir -p $tardir/${@:$#} fi if [ -e $1 ] ; then cp -a ${@:1:$#-1} $tardir/${@:$#} 2>/dev/null fi } igtdir=`dirname $0` if [ -d /debug/dri ] ; then debugfs_path=/debug_dri fi if [ -d /sys/kernel/debug/dri ] ; then debugfs_path=/sys/kernel/debug/dri fi i915_debugfs=x for dir in `ls $debugfs_path` ; do if [ -f $debugfs_path/$dir/i915_error_state ] ; then i915_debugfs=$debugfs_path/$dir break fi done if [ $i915_debugfs = "x" ] ; then echo i915 debugfs path not found. exit 1 fi tmpdir=`mktemp -d` tardir=$tmpdir/intel_gpu_abrt mkdir $tardir get $i915_debugfs/* debugfs get /sys/module/i915/parameters/* mod_opts mkdir $tardir/X xrandr --verbose > $tardir/X/xrandr get /var/log/Xorg.0.log X get /var/log/Xorg.0.log.old X get /etc/X11/xorg.conf X get /etc/X11/xorg.conf.d/ X dmesg > $tardir/dmesg lspci -nn > $tardir/lspci $igtdir/intel_reg dump > $tardir/intel_reg_dump.txt $igtdir/intel_bios_dumper $tardir/intel_bios_dump $igtdir/intel_stepping > $tardir/intel_stepping echo 1 > /sys/devices/pci0000:00/0000:00:02.0/rom cat /sys/devices/pci0000:00/0000:00:02.0/rom > $tardir/vbios.dump echo 0 > /sys/devices/pci0000:00/0000:00:02.0/rom (cd $tmpdir; tar -c intel_gpu_abrt ) > intel_gpu_abrt.tar rm $tmpdir -Rf if [ -f intel_gpu_abrt.tar ] ; then cat < #include #include #include #include #include #include "intel_io.h" #include "intel_chipset.h" static uint32_t devid; static int gen; static uint32_t read_and_print_reg(const char *name, uint32_t reg) { uint32_t val = INREG(reg); printf("%s (0x%x): 0x%08x\n", name, reg, val); return val; } static void check_chicken_unset(const char *name, uint32_t reg) { uint32_t val = read_and_print_reg(name, reg); if (val != 0) { fprintf(stderr, " WARN: chicken bits set\n"); } else { printf(" OK: chicken bits unset\n"); } } static void check_bit(uint32_t val, int bit, const char *bitname, bool set) { if (!!(val & (1 << bit)) != set) { fprintf(stderr, " (bit %2d) FAIL: %s must be %s\n", bit, bitname, set ? "set" : "unset"); } else { printf(" (bit %2d) OK: %s\n", bit, bitname); } } static void check_perf_bit(uint32_t val, int bit, const char *bitname, bool set) { if (!!(val & (1 << bit)) != set) { printf(" (bit %2d) PERF: %s should be %s\n", bit, bitname, set ? "set" : "unset"); } else { printf(" (bit %2d) OK: %s\n", bit, bitname); } } static void check_mi_mode(void) { /* Described in page 14-16 of the IHD_OS_Vol1_Part3.pdf * specification. */ uint32_t mi_mode = read_and_print_reg("MI_MODE", 0x209c); /* From page 14: * * Async Flip Performance mode * Project: All * Default Value: 0h * Format: U1 * [DevSNB] This bit must be set to ‘1’ */ if (gen == 6) check_bit(mi_mode, 14, "Async Flip Performance mode", true); else check_perf_bit(mi_mode, 14, "Async Flip Performance mode", false); check_perf_bit(mi_mode, 13, "Flush Performance Mode", false); /* Our driver relies on MI_FLUSH, unfortunately. */ if (gen >= 6) check_bit(mi_mode, 12, "MI_FLUSH enable", true); /* From page 15: * * "1h: LRA mode of allocation. Used for validation purposes" */ if (gen < 7) check_bit(mi_mode, 7, "Vertex Shader Cache Mode", false); /* From page 16: * * "To avoid deadlock conditions in hardware this bit * needs to be set for normal operation. */ check_bit(mi_mode, 6, "Vertex Shader Timer Dispatch Enable", true); } static void check_gfx_mode(void) { /* Described in page 17-19 of the IHD_OS_Vol1_Part3.pdf * specification. */ uint32_t gfx_mode; if (gen < 6) return; if (gen == 6) gfx_mode = read_and_print_reg("GFX_MODE", 0x2520); else gfx_mode = read_and_print_reg("GFX_MODE", 0x229c); /* Our driver only updates page tables at batchbuffer * boundaries, so we don't need TLB flushes at other times. */ check_perf_bit(gfx_mode, 13, "Flush TLB Invalidation Mode", true); } static void check_gt_mode(void) { /* Described in page 20-22 of the IHD_OS_Vol1_Part3.pdf * specification. */ uint32_t gt_mode; if (gen < 6) return; if (gen == 6) gt_mode = read_and_print_reg("GT_MODE", 0x20d0); else gt_mode = read_and_print_reg("GT_MODE", 0x7008); if (gen == 6) check_perf_bit(gt_mode, 8, "Full Rate Sampler Disable", false); /* For DevSmallGT, this bit must be set, which means disable * hashing. */ if (devid == PCI_CHIP_SANDYBRIDGE_GT1 || devid == PCI_CHIP_SANDYBRIDGE_M_GT1) check_bit(gt_mode, 6, "WIZ Hashing disable", true); else if (gen == 6) check_perf_bit(gt_mode, 6, "WIZ Hashing disable", false); if (gen == 6) { check_perf_bit(gt_mode, 5, "TD Four Row Dispatch Disable", false); check_perf_bit(gt_mode, 4, "Full Size URB Disable", false); check_perf_bit(gt_mode, 3, "Full Size SF FIFO Disable", false); check_perf_bit(gt_mode, 1, "VS Quad Thread Dispatch Disable", false); } } static void check_cache_mode_0(void) { /* Described in page 23-25 of the IHD_OS_Vol1_Part3.pdf * specification. */ uint32_t cache_mode_0; if (gen >= 7) cache_mode_0 = read_and_print_reg("CACHE_MODE_0", 0x7000); else cache_mode_0 = read_and_print_reg("CACHE_MODE_0", 0x2120); check_perf_bit(cache_mode_0, 15, "Sampler L2 Disable", false); check_perf_bit(cache_mode_0, 9, "Sampler L2 TLB Prefetch Enable", true); check_perf_bit(cache_mode_0, 8, "Depth Related Cache Pipelined Flush Disable", false); /* From page 24: * * "If this bit is set, RCCunit will have LRA as * replacement policy. The default value i.e. ( when this * bit is reset ) indicates that non-LRA eviction * policy. This bit must be reset. LRA replacement policy * is not supported." * * And the same for STC Eviction Policy. */ check_bit(cache_mode_0, 5, "STC LRA Eviction Policy", false); if (gen >= 6) check_bit(cache_mode_0, 4, "RCC LRA Eviction Policy", false); check_perf_bit(cache_mode_0, 3, "Hierarchical Z Disable", false); if (gen == 6) { check_perf_bit(cache_mode_0, 2, "Hierarchical Z RAW Stall Optimization " "Disable", false); } /* From page 25: * * "This bit must be 0. Operational Flushes [DevSNB] are * not supported in [DevSNB]. SW must flush the render * target after front buffer rendering." */ check_bit(cache_mode_0, 0, "Render Cache Operational Flush", false); } static void check_cache_mode_1(void) { /* Described in page 23-25 of the IHD_OS_Vol1_Part3.pdf * specification. */ uint32_t cache_mode_1; if (gen >= 7) cache_mode_1 = read_and_print_reg("CACHE_MODE_1", 0x7004); else cache_mode_1 = read_and_print_reg("CACHE_MODE_1", 0x2124); if (gen >= 7) { check_perf_bit(cache_mode_1, 13, "STC Address Lookup Optimization Disable", false); } /* From page 24: * * "If this bit is set, Hizunit will have LRA as * replacement policy. The default value i.e. (when this * bit is reset) indicates the non-LRA eviction * policy. For performance reasons, this bit must be * reset." */ check_bit(cache_mode_1, 12, "HIZ LRA Eviction Policy", false); /* Page 26 describes these bits as reserved (debug only). */ check_bit(cache_mode_1, 11, "DAP Instruction and State Cache Invalidate", false); check_bit(cache_mode_1, 10, "Instruction L1 Cache and In-Flight Queue Disable", false); check_bit(cache_mode_1, 9, "Instruction L2 Cache Fill Buffers Disable", false); if (gen >= 7) { check_perf_bit(cache_mode_1, 6, "Pixel Backend sub-span collection " "Optimization Disable", false); check_perf_bit(cache_mode_1, 5, "MCS Cache Disable", false); } check_perf_bit(cache_mode_1, 4, "Data Disable", false); if (gen == 6) { /* In a later update of the documentation, it says: * * "[DevSNB:A0{WKA1}] [DevSNB]: This bit must be * set for depth buffer format * D24_UNORM_S8_UINT." * * XXX: Does that mean A0 only, or all DevSNB? */ check_perf_bit(cache_mode_1, 3, "Depth Read Hit Write-Only Optimization " "Disable", false); check_perf_bit(cache_mode_1, 2, "Depth Cache LRA Hunt Feature Disable", false); } check_bit(cache_mode_1, 1, "Instruction and State L2 Cache Disable", false); check_bit(cache_mode_1, 0, "Instruction and State L1 Cache Disable", false); } static void check_3d_chicken4(void) { /* Described in page 23-25 of the IHD_OS_Vol1_Part3.pdf * specification. */ uint32_t _3d_chicken4 = read_and_print_reg("3D_CHICKEN4", 0x20d4); check_perf_bit(_3d_chicken4, 6, "3D Scoreboard Hashing Enable", true); if (_3d_chicken4 & 0x0fbf) { fprintf(stderr, " WARN: other non-thread deps bits set\n"); } else { printf(" OK: other non-thread deps bits unset\n"); } } static void check_dpfc_control_sa(void) { uint32_t dpfc_control_sa; if (gen != 6) return; dpfc_control_sa = read_and_print_reg("DPFC_CONTROL_SA", 0x100100); /* This is needed for framebuffer compression for us to be * able to access the framebuffer by the CPU through the GTT. */ check_bit(dpfc_control_sa, 29, "CPU Fence Enable", true); } int main(int argc, char** argv) { struct pci_device *dev; dev = intel_get_pci_device(); devid = dev->device_id; intel_mmio_use_pci_bar(dev); if (IS_GEN7(devid)) gen = 7; else if (IS_GEN6(devid)) gen = 6; else if (IS_GEN5(devid)) gen = 5; else gen = 4; check_mi_mode(); check_gfx_mode(); check_gt_mode(); check_cache_mode_0(); check_cache_mode_1(); if (gen < 7) { check_chicken_unset("3D_CHICKEN", 0x2084); check_chicken_unset("3D_CHICKEN2", 0x208c); } else { check_chicken_unset("FF_SLICE_CHICKEN", 0x2088); } if (gen >= 6) check_chicken_unset("3D_CHICKEN3", 0x2090); if (gen == 6) check_3d_chicken4(); if (gen >= 7) { check_chicken_unset("FF_SLICE_CS_CHICKEN1", 0x20e0); check_chicken_unset("FF_SLICE_CS_CHICKEN2", 0x20e4); check_chicken_unset("FF_SLICE_CS_CHICKEN3", 0x20e8); check_chicken_unset("COMMON_SLICE_CHICKEN1", 0x7010); check_chicken_unset("COMMON_SLICE_CHICKEN2", 0x7014); check_chicken_unset("WM_CHICKEN", 0x5580); check_chicken_unset("HALF_SLICE_CHICKEN", 0xe100); check_chicken_unset("HALF_SLICE_CHICKEN2", 0xe180); check_chicken_unset("ROW_CHICKEN", 0xe4f0); check_chicken_unset("ROW_CHICKEN2", 0xe4f4); } check_chicken_unset("ECOSKPD", 0x21d0); check_dpfc_control_sa(); return 0; } intel-gpu-tools-1.14/tools/intel_reg_decode.c0000644000175000017500000021042612665336131016214 00000000000000/* * Copyright © 2006,2009,2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Eric Anholt * */ #include #include #include #include #include #include #include #include "intel_chipset.h" #include "intel_reg.h" #include "intel_reg_spec.h" #define _DEBUGSTRING(func) \ void func(char *result, int len, int reg, uint32_t val, uint32_t devid) #define DEBUGSTRING(func) static _DEBUGSTRING(func) DEBUGSTRING(i830_16bit_func) { snprintf(result, len, "0x%04x", (uint16_t) val); } DEBUGSTRING(i830_debug_dcc) { const char *addressing = NULL; if (!IS_MOBILE(devid)) return; if (IS_965(devid)) { if (val & (1 << 1)) addressing = "dual channel interleaved"; else addressing = "single or dual channel asymmetric"; } else { switch (val & 3) { case 0: addressing = "single channel"; break; case 1: addressing = "dual channel asymmetric"; break; case 2: addressing = "dual channel interleaved"; break; case 3: addressing = "unknown channel layout"; break; } } snprintf(result, len, "%s, XOR randomization: %sabled, XOR bit: %d", addressing, (val & (1 << 10)) ? "dis" : "en", (val & (1 << 9)) ? 17 : 11); } DEBUGSTRING(i830_debug_chdecmisc) { const char *enhmodesel = NULL; switch ((val >> 5) & 3) { case 1: enhmodesel = "XOR bank/rank"; break; case 2: enhmodesel = "swap bank"; break; case 3: enhmodesel = "XOR bank"; break; case 0: enhmodesel = "none"; break; } snprintf(result, len, "%s, ch2 enh %sabled, ch1 enh %sabled, " "ch0 enh %sabled, " "flex %sabled, ep %spresent", enhmodesel, (val & (1 << 4)) ? "en" : "dis", (val & (1 << 3)) ? "en" : "dis", (val & (1 << 2)) ? "en" : "dis", (val & (1 << 1)) ? "en" : "dis", (val & (1 << 0)) ? "" : "not "); } DEBUGSTRING(i830_debug_xyminus1) { snprintf(result, len, "%d, %d", (val & 0xffff) + 1, ((val & 0xffff0000) >> 16) + 1); } DEBUGSTRING(i830_debug_yxminus1) { snprintf(result, len, "%d, %d", ((val & 0xffff0000) >> 16) + 1, (val & 0xffff) + 1); } DEBUGSTRING(i830_debug_xy) { snprintf(result, len, "%d, %d", (val & 0xffff), ((val & 0xffff0000) >> 16)); } DEBUGSTRING(i830_debug_dspstride) { snprintf(result, len, "%d bytes", val); } DEBUGSTRING(i830_debug_dspcntr) { const char *enabled = val & DISPLAY_PLANE_ENABLE ? "enabled" : "disabled"; char plane = val & DISPPLANE_SEL_PIPE_B ? 'B' : 'A'; if (HAS_PCH_SPLIT(devid) || IS_BROXTON(devid)) snprintf(result, len, "%s", enabled); else snprintf(result, len, "%s, pipe %c", enabled, plane); } DEBUGSTRING(i830_debug_pipeconf) { const char *enabled = val & PIPEACONF_ENABLE ? "enabled" : "disabled"; const char *bit30; char buf[256]; int buf_len; if (IS_965(devid)) bit30 = val & I965_PIPECONF_ACTIVE ? "active" : "inactive"; else bit30 = val & PIPEACONF_DOUBLE_WIDE ? "double-wide" : "single-wide"; buf_len = snprintf(buf, sizeof(buf), "%s, %s", enabled, bit30); if (HAS_PCH_SPLIT(devid) || IS_BROXTON(devid)) { const char *interlace; int interlace_mode; if ((IS_IVYBRIDGE(devid) || IS_HASWELL(devid) || IS_BROADWELL(devid) || IS_GEN9(devid))) interlace_mode = (val >> 21) & 3; else interlace_mode = (val >> 21) & 7; switch (interlace_mode) { case 0: interlace = "pf-pd"; break; case 1: interlace = "pf-id"; break; case 3: interlace = "if-id"; break; case 4: interlace = "if-id-dbl"; break; case 5: interlace = "pf-id-dbl"; break; default: interlace = "rsvd"; break; } if (buf_len < sizeof(buf)) buf_len += snprintf(&buf[buf_len], sizeof(buf) - buf_len, ", %s", interlace); } else if (IS_GEN4(devid) || IS_VALLEYVIEW(devid) || IS_CHERRYVIEW(devid)) { const char *interlace; switch ((val >> 21) & 7) { case 0: case 1: case 2: case 3: interlace = "progressive"; break; case 4: interlace = "interlaced embedded"; break; case 5: interlace = "interlaced"; break; case 6: interlace = "interlaced sdvo"; break; case 7: interlace = "interlaced legacy"; break; } if (buf_len < sizeof(buf)) buf_len += snprintf(&buf[buf_len], sizeof(buf) - buf_len, ", %s", interlace); } if (IS_HASWELL(devid) || IS_IVYBRIDGE(devid) || IS_GEN6(devid) || IS_GEN5(devid)) { const char *rotation; switch ((val >> 14) & 3) { case 0: rotation = "rotate 0"; break; case 1: rotation = "rotate 90"; break; case 2: rotation = "rotate 180"; break; case 3: rotation = "rotate 270"; break; } if (buf_len < sizeof(buf)) buf_len += snprintf(&buf[buf_len], sizeof(buf) - buf_len, ", %s", rotation); } if (IS_IVYBRIDGE(devid) || IS_GEN6(devid) || IS_GEN5(devid)) { const char *bpc; switch (val & (7 << 5)) { case PIPECONF_8BPP: bpc = "8bpc"; break; case PIPECONF_10BPP: bpc = "10bpc"; break; case PIPECONF_6BPP: bpc = "6bpc"; break; case PIPECONF_12BPP: bpc = "12bpc"; break; default: bpc = "invalid bpc"; break; } if (buf_len < sizeof(buf)) buf_len += snprintf(&buf[buf_len], sizeof(buf) - buf_len, ", %s", bpc); } snprintf(result, len, "%s", buf); } DEBUGSTRING(i830_debug_pipestat) { const char *_FIFO_UNDERRUN = val & FIFO_UNDERRUN ? " FIFO_UNDERRUN" : ""; const char *_CRC_ERROR_ENABLE = val & CRC_ERROR_ENABLE ? " CRC_ERROR_ENABLE" : ""; const char *_CRC_DONE_ENABLE = val & CRC_DONE_ENABLE ? " CRC_DONE_ENABLE" : ""; const char *_GMBUS_EVENT_ENABLE = val & GMBUS_EVENT_ENABLE ? " GMBUS_EVENT_ENABLE" : ""; const char *_VSYNC_INT_ENABLE = val & VSYNC_INT_ENABLE ? " VSYNC_INT_ENABLE" : ""; const char *_DLINE_COMPARE_ENABLE = val & DLINE_COMPARE_ENABLE ? " DLINE_COMPARE_ENABLE" : ""; const char *_DPST_EVENT_ENABLE = val & DPST_EVENT_ENABLE ? " DPST_EVENT_ENABLE" : ""; const char *_LBLC_EVENT_ENABLE = val & LBLC_EVENT_ENABLE ? " LBLC_EVENT_ENABLE" : ""; const char *_OFIELD_INT_ENABLE = val & OFIELD_INT_ENABLE ? " OFIELD_INT_ENABLE" : ""; const char *_EFIELD_INT_ENABLE = val & EFIELD_INT_ENABLE ? " EFIELD_INT_ENABLE" : ""; const char *_SVBLANK_INT_ENABLE = val & SVBLANK_INT_ENABLE ? " SVBLANK_INT_ENABLE" : ""; const char *_VBLANK_INT_ENABLE = val & VBLANK_INT_ENABLE ? " VBLANK_INT_ENABLE" : ""; const char *_OREG_UPDATE_ENABLE = val & OREG_UPDATE_ENABLE ? " OREG_UPDATE_ENABLE" : ""; const char *_CRC_ERROR_INT_STATUS = val & CRC_ERROR_INT_STATUS ? " CRC_ERROR_INT_STATUS" : ""; const char *_CRC_DONE_INT_STATUS = val & CRC_DONE_INT_STATUS ? " CRC_DONE_INT_STATUS" : ""; const char *_GMBUS_INT_STATUS = val & GMBUS_INT_STATUS ? " GMBUS_INT_STATUS" : ""; const char *_VSYNC_INT_STATUS = val & VSYNC_INT_STATUS ? " VSYNC_INT_STATUS" : ""; const char *_DLINE_COMPARE_STATUS = val & DLINE_COMPARE_STATUS ? " DLINE_COMPARE_STATUS" : ""; const char *_DPST_EVENT_STATUS = val & DPST_EVENT_STATUS ? " DPST_EVENT_STATUS" : ""; const char *_LBLC_EVENT_STATUS = val & LBLC_EVENT_STATUS ? " LBLC_EVENT_STATUS" : ""; const char *_OFIELD_INT_STATUS = val & OFIELD_INT_STATUS ? " OFIELD_INT_STATUS" : ""; const char *_EFIELD_INT_STATUS = val & EFIELD_INT_STATUS ? " EFIELD_INT_STATUS" : ""; const char *_SVBLANK_INT_STATUS = val & SVBLANK_INT_STATUS ? " SVBLANK_INT_STATUS" : ""; const char *_VBLANK_INT_STATUS = val & VBLANK_INT_STATUS ? " VBLANK_INT_STATUS" : ""; const char *_OREG_UPDATE_STATUS = val & OREG_UPDATE_STATUS ? " OREG_UPDATE_STATUS" : ""; snprintf(result, len, "status:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s", _FIFO_UNDERRUN, _CRC_ERROR_ENABLE, _CRC_DONE_ENABLE, _GMBUS_EVENT_ENABLE, _VSYNC_INT_ENABLE, _DLINE_COMPARE_ENABLE, _DPST_EVENT_ENABLE, _LBLC_EVENT_ENABLE, _OFIELD_INT_ENABLE, _EFIELD_INT_ENABLE, _SVBLANK_INT_ENABLE, _VBLANK_INT_ENABLE, _OREG_UPDATE_ENABLE, _CRC_ERROR_INT_STATUS, _CRC_DONE_INT_STATUS, _GMBUS_INT_STATUS, _VSYNC_INT_STATUS, _DLINE_COMPARE_STATUS, _DPST_EVENT_STATUS, _LBLC_EVENT_STATUS, _OFIELD_INT_STATUS, _EFIELD_INT_STATUS, _SVBLANK_INT_STATUS, _VBLANK_INT_STATUS, _OREG_UPDATE_STATUS); } DEBUGSTRING(ivb_debug_port) { const char *drrs = NULL; switch (val & (2 << 30)) { case PORT_DBG_DRRS_HW_STATE_OFF: drrs = "off"; break; case PORT_DBG_DRRS_HW_STATE_LOW: drrs = "low"; break; case PORT_DBG_DRRS_HW_STATE_HIGH: drrs = "high"; break; } snprintf(result, len, "HW DRRS %s", drrs); } DEBUGSTRING(i830_debug_hvtotal) { snprintf(result, len, "%d active, %d total", (val & 0xffff) + 1, ((val & 0xffff0000) >> 16) + 1); } DEBUGSTRING(i830_debug_hvsyncblank) { snprintf(result, len, "%d start, %d end", (val & 0xffff) + 1, ((val & 0xffff0000) >> 16) + 1); } DEBUGSTRING(i830_debug_vgacntrl) { snprintf(result, len, "%s", val & VGA_DISP_DISABLE ? "disabled" : "enabled"); } DEBUGSTRING(i830_debug_fp) { if (IS_IGD(devid)) { snprintf(result, len, "n = %d, m1 = %d, m2 = %d", ffs((val & FP_N_IGD_DIV_MASK) >> FP_N_DIV_SHIFT) - 1, ((val & FP_M1_DIV_MASK) >> FP_M1_DIV_SHIFT), ((val & FP_M2_IGD_DIV_MASK) >> FP_M2_DIV_SHIFT)); } snprintf(result, len, "n = %d, m1 = %d, m2 = %d", ((val & FP_N_DIV_MASK) >> FP_N_DIV_SHIFT), ((val & FP_M1_DIV_MASK) >> FP_M1_DIV_SHIFT), ((val & FP_M2_DIV_MASK) >> FP_M2_DIV_SHIFT)); } DEBUGSTRING(i830_debug_vga_pd) { int vga0_p1, vga0_p2, vga1_p1, vga1_p2; /* XXX: i9xx version */ if (val & VGA0_PD_P1_DIV_2) vga0_p1 = 2; else vga0_p1 = ((val & VGA0_PD_P1_MASK) >> VGA0_PD_P1_SHIFT) + 2; vga0_p2 = (val & VGA0_PD_P2_DIV_4) ? 4 : 2; if (val & VGA1_PD_P1_DIV_2) vga1_p1 = 2; else vga1_p1 = ((val & VGA1_PD_P1_MASK) >> VGA1_PD_P1_SHIFT) + 2; vga1_p2 = (val & VGA1_PD_P2_DIV_4) ? 4 : 2; snprintf(result, len, "vga0 p1 = %d, p2 = %d, vga1 p1 = %d, p2 = %d", vga0_p1, vga0_p2, vga1_p1, vga1_p2); } DEBUGSTRING(i830_debug_pp_status) { const char *status = val & PP_ON ? "on" : "off"; const char *ready = val & PP_READY ? "ready" : "not ready"; const char *seq = "unknown"; switch (val & PP_SEQUENCE_MASK) { case PP_SEQUENCE_NONE: seq = "idle"; break; case PP_SEQUENCE_ON: seq = "on"; break; case PP_SEQUENCE_OFF: seq = "off"; break; } snprintf(result, len, "%s, %s, sequencing %s", status, ready, seq); } DEBUGSTRING(i830_debug_pp_control) { snprintf(result, len, "power target: %s", val & POWER_TARGET_ON ? "on" : "off"); } DEBUGSTRING(i830_debug_dpll) { const char *enabled = val & DPLL_VCO_ENABLE ? "enabled" : "disabled"; const char *dvomode = val & DPLL_DVO_HIGH_SPEED ? "dvo" : "non-dvo"; const char *vgamode = val & DPLL_VGA_MODE_DIS ? "" : ", VGA"; const char *mode = "unknown"; const char *clock = "unknown"; const char *fpextra = val & DISPLAY_RATE_SELECT_FPA1 ? ", using FPx1!" : ""; char sdvoextra[20]; int p1 = 0, p2 = 0; if (IS_GEN2(devid)) { #if 0 /* removed due to use of INREG */ char is_lvds = (INREG(LVDS) & LVDS_PORT_EN) && (reg == DPLL_B); if (is_lvds) { mode = "LVDS"; p1 = ffs((val & DPLL_FPA01_P1_POST_DIV_MASK_I830_LVDS) >> DPLL_FPA01_P1_POST_DIV_SHIFT); if ((INREG(LVDS) & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP) p2 = 7; else p2 = 14; } else { mode = "DAC/serial"; if (val & PLL_P1_DIVIDE_BY_TWO) { p1 = 2; } else { /* Map the number in the field to (3, 33) */ p1 = ((val & DPLL_FPA01_P1_POST_DIV_MASK_I830) >> DPLL_FPA01_P1_POST_DIV_SHIFT) + 2; } if (val & PLL_P2_DIVIDE_BY_4) p2 = 4; else p2 = 2; } #endif } else { if (IS_IGD(devid)) { p1 = ffs((val & DPLL_FPA01_P1_POST_DIV_MASK_IGD) >> DPLL_FPA01_P1_POST_DIV_SHIFT_IGD); } else { p1 = ffs((val & DPLL_FPA01_P1_POST_DIV_MASK) >> DPLL_FPA01_P1_POST_DIV_SHIFT); } switch (val & DPLL_MODE_MASK) { case DPLLB_MODE_DAC_SERIAL: mode = "DAC/serial"; p2 = val & DPLL_DAC_SERIAL_P2_CLOCK_DIV_5 ? 5 : 10; break; case DPLLB_MODE_LVDS: mode = "LVDS"; p2 = val & DPLLB_LVDS_P2_CLOCK_DIV_7 ? 7 : 14; break; } } switch (val & PLL_REF_INPUT_MASK) { case PLL_REF_INPUT_DREFCLK: clock = "default"; break; case PLL_REF_INPUT_TVCLKINA: clock = "TV A"; break; case PLL_REF_INPUT_TVCLKINBC: clock = "TV B/C"; break; case PLLB_REF_INPUT_SPREADSPECTRUMIN: if (reg == DPLL_B) clock = "spread spectrum"; break; } if (IS_945(devid)) { sprintf(sdvoextra, ", SDVO mult %d", (int)((val & SDVO_MULTIPLIER_MASK) >> SDVO_MULTIPLIER_SHIFT_HIRES) + 1); } else { sdvoextra[0] = '\0'; } snprintf(result, len, "%s, %s%s, %s clock, %s mode, p1 = %d, " "p2 = %d%s%s", enabled, dvomode, vgamode, clock, mode, p1, p2, fpextra, sdvoextra); } DEBUGSTRING(i830_debug_dpll_test) { const char *dpllandiv = val & DPLLA_TEST_N_BYPASS ? ", DPLLA N bypassed" : ""; const char *dpllamdiv = val & DPLLA_TEST_M_BYPASS ? ", DPLLA M bypassed" : ""; const char *dpllainput = val & DPLLA_INPUT_BUFFER_ENABLE ? "" : ", DPLLA input buffer disabled"; const char *dpllbndiv = val & DPLLB_TEST_N_BYPASS ? ", DPLLB N bypassed" : ""; const char *dpllbmdiv = val & DPLLB_TEST_M_BYPASS ? ", DPLLB M bypassed" : ""; const char *dpllbinput = val & DPLLB_INPUT_BUFFER_ENABLE ? "" : ", DPLLB input buffer disabled"; snprintf(result, len, "%s%s%s%s%s%s", dpllandiv, dpllamdiv, dpllainput, dpllbndiv, dpllbmdiv, dpllbinput); } DEBUGSTRING(i830_debug_adpa) { char disp_pipe = (val & ADPA_PIPE_B_SELECT) ? 'B' : 'A'; const char *enable = (val & ADPA_DAC_ENABLE) ? "enabled" : "disabled"; char hsync = (val & ADPA_HSYNC_ACTIVE_HIGH) ? '+' : '-'; char vsync = (val & ADPA_VSYNC_ACTIVE_HIGH) ? '+' : '-'; if (HAS_CPT) disp_pipe = val & (1<<29) ? 'B' : 'A'; if (HAS_PCH_SPLIT(devid)) snprintf(result, len, "%s, transcoder %c, %chsync, %cvsync", enable, disp_pipe, hsync, vsync); else snprintf(result, len, "%s, pipe %c, %chsync, %cvsync", enable, disp_pipe, hsync, vsync); } DEBUGSTRING(i830_debug_lvds) { char disp_pipe = val & LVDS_PIPEB_SELECT ? 'B' : 'A'; const char *enable = val & LVDS_PORT_EN ? "enabled" : "disabled"; int depth; const char *channels; if ((val & LVDS_A3_POWER_MASK) == LVDS_A3_POWER_UP) depth = 24; else depth = 18; if ((val & LVDS_B0B3_POWER_MASK) == LVDS_B0B3_POWER_UP) channels = "2 channels"; else channels = "1 channel"; if (HAS_CPT) disp_pipe = val & (1<<29) ? 'B' : 'A'; snprintf(result, len, "%s, pipe %c, %d bit, %s", enable, disp_pipe, depth, channels); } DEBUGSTRING(i830_debug_dvo) { const char *enable = val & DVO_ENABLE ? "enabled" : "disabled"; char disp_pipe = val & DVO_PIPE_B_SELECT ? 'B' : 'A'; const char *stall; char hsync = val & DVO_HSYNC_ACTIVE_HIGH ? '+' : '-'; char vsync = val & DVO_VSYNC_ACTIVE_HIGH ? '+' : '-'; switch (val & DVO_PIPE_STALL_MASK) { case DVO_PIPE_STALL_UNUSED: stall = "no stall"; break; case DVO_PIPE_STALL: stall = "stall"; break; case DVO_PIPE_STALL_TV: stall = "TV stall"; break; default: stall = "unknown stall"; break; } snprintf(result, len, "%s, pipe %c, %s, %chsync, %cvsync", enable, disp_pipe, stall, hsync, vsync); } DEBUGSTRING(i830_debug_sdvo) { const char *enable = val & SDVO_ENABLE ? "enabled" : "disabled"; char disp_pipe = val & SDVO_PIPE_B_SELECT ? 'B' : 'A'; const char *stall = val & SDVO_STALL_SELECT ? "enabled" : "disabled"; const char *detected = val & SDVO_DETECTED ? "" : "not "; const char *gang = val & SDVOC_GANG_MODE ? ", gang mode" : ""; char sdvoextra[20]; if (IS_915(devid)) { sprintf(sdvoextra, ", SDVO mult %d", (int)((val & SDVO_PORT_MULTIPLY_MASK) >> SDVO_PORT_MULTIPLY_SHIFT) + 1); } else { sdvoextra[0] = '\0'; } snprintf(result, len, "%s, pipe %c, stall %s, %sdetected%s%s", enable, disp_pipe, stall, detected, sdvoextra, gang); } DEBUGSTRING(i830_debug_dspclk_gate_d) { const char *DPUNIT_B = val & DPUNIT_B_CLOCK_GATE_DISABLE ? " DPUNIT_B" : ""; const char *VSUNIT = val & VSUNIT_CLOCK_GATE_DISABLE ? " VSUNIT" : ""; const char *VRHUNIT = val & VRHUNIT_CLOCK_GATE_DISABLE ? " VRHUNIT" : ""; const char *VRDUNIT = val & VRDUNIT_CLOCK_GATE_DISABLE ? " VRDUNIT" : ""; const char *AUDUNIT = val & AUDUNIT_CLOCK_GATE_DISABLE ? " AUDUNIT" : ""; const char *DPUNIT_A = val & DPUNIT_A_CLOCK_GATE_DISABLE ? " DPUNIT_A" : ""; const char *DPCUNIT = val & DPCUNIT_CLOCK_GATE_DISABLE ? " DPCUNIT" : ""; const char *TVRUNIT = val & TVRUNIT_CLOCK_GATE_DISABLE ? " TVRUNIT" : ""; const char *TVCUNIT = val & TVCUNIT_CLOCK_GATE_DISABLE ? " TVCUNIT" : ""; const char *TVFUNIT = val & TVFUNIT_CLOCK_GATE_DISABLE ? " TVFUNIT" : ""; const char *TVEUNIT = val & TVEUNIT_CLOCK_GATE_DISABLE ? " TVEUNIT" : ""; const char *DVSUNIT = val & DVSUNIT_CLOCK_GATE_DISABLE ? " DVSUNIT" : ""; const char *DSSUNIT = val & DSSUNIT_CLOCK_GATE_DISABLE ? " DSSUNIT" : ""; const char *DDBUNIT = val & DDBUNIT_CLOCK_GATE_DISABLE ? " DDBUNIT" : ""; const char *DPRUNIT = val & DPRUNIT_CLOCK_GATE_DISABLE ? " DPRUNIT" : ""; const char *DPFUNIT = val & DPFUNIT_CLOCK_GATE_DISABLE ? " DPFUNIT" : ""; const char *DPBMUNIT = val & DPBMUNIT_CLOCK_GATE_DISABLE ? " DPBMUNIT" : ""; const char *DPLSUNIT = val & DPLSUNIT_CLOCK_GATE_DISABLE ? " DPLSUNIT" : ""; const char *DPLUNIT = val & DPLUNIT_CLOCK_GATE_DISABLE ? " DPLUNIT" : ""; const char *DPOUNIT = val & DPOUNIT_CLOCK_GATE_DISABLE ? " DPOUNIT" : ""; const char *DPBUNIT = val & DPBUNIT_CLOCK_GATE_DISABLE ? " DPBUNIT" : ""; const char *DCUNIT = val & DCUNIT_CLOCK_GATE_DISABLE ? " DCUNIT" : ""; const char *DPUNIT = val & DPUNIT_CLOCK_GATE_DISABLE ? " DPUNIT" : ""; const char *VRUNIT = val & VRUNIT_CLOCK_GATE_DISABLE ? " VRUNIT" : ""; const char *OVHUNIT = val & OVHUNIT_CLOCK_GATE_DISABLE ? " OVHUNIT" : ""; const char *DPIOUNIT = val & DPIOUNIT_CLOCK_GATE_DISABLE ? " DPIOUNIT" : ""; const char *OVFUNIT = val & OVFUNIT_CLOCK_GATE_DISABLE ? " OVFUNIT" : ""; const char *OVBUNIT = val & OVBUNIT_CLOCK_GATE_DISABLE ? " OVBUNIT" : ""; const char *OVRUNIT = val & OVRUNIT_CLOCK_GATE_DISABLE ? " OVRUNIT" : ""; const char *OVCUNIT = val & OVCUNIT_CLOCK_GATE_DISABLE ? " OVCUNIT" : ""; const char *OVUUNIT = val & OVUUNIT_CLOCK_GATE_DISABLE ? " OVUUNIT" : ""; const char *OVLUNIT = val & OVLUNIT_CLOCK_GATE_DISABLE ? " OVLUNIT" : ""; snprintf(result, len, "clock gates disabled:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s", DPUNIT_B, VSUNIT, VRHUNIT, VRDUNIT, AUDUNIT, DPUNIT_A, DPCUNIT, TVRUNIT, TVCUNIT, TVFUNIT, TVEUNIT, DVSUNIT, DSSUNIT, DDBUNIT, DPRUNIT, DPFUNIT, DPBMUNIT, DPLSUNIT, DPLUNIT, DPOUNIT, DPBUNIT, DCUNIT, DPUNIT, VRUNIT, OVHUNIT, DPIOUNIT, OVFUNIT, OVBUNIT, OVRUNIT, OVCUNIT, OVUUNIT, OVLUNIT); } DEBUGSTRING(i810_debug_915_fence) { char format = (val & 1 << 12) ? 'Y' : 'X'; int pitch = 128 << ((val & 0x70) >> 4); unsigned int offset = val & 0x0ff00000; int size = (1024 * 1024) << ((val & 0x700) >> 8); if (IS_965(devid) || (IS_915(devid) && reg >= FENCE_NEW)) return; if (format == 'X') pitch *= 4; if (val & 1) { snprintf(result, len, "enabled, %c tiled, %4d pitch, 0x%08x - 0x%08x (%dkb)", format, pitch, offset, offset + size, size / 1024); } else { snprintf(result, len, "disabled"); } } DEBUGSTRING(i810_debug_965_fence_start) { const char *enable = (val & FENCE_VALID) ? " enabled" : "disabled"; char format = (val & I965_FENCE_Y_MAJOR) ? 'Y' : 'X'; int pitch = ((val & 0xffc) >> 2) * 128 + 128; unsigned int offset = val & 0xfffff000; if (!IS_965(devid)) return; snprintf(result, len, "%s, %c tile walk, %4d pitch, 0x%08x start", enable, format, pitch, offset); } DEBUGSTRING(i810_debug_965_fence_end) { unsigned int end = val & 0xfffff000; if (!IS_965(devid)) return; snprintf(result, len, " 0x%08x end", end); } #define DEFINEREG(reg) \ { reg, #reg, NULL } #define DEFINEREG_16BIT(reg) \ { reg, #reg, i830_16bit_func } #define DEFINEREG2(reg, func) \ { reg, #reg, func } struct reg_debug { int reg; const char *name; _DEBUGSTRING((*debug_output)); }; static const struct reg_debug intel_debug_regs[] = { DEFINEREG2(DCC, i830_debug_dcc), DEFINEREG2(CHDECMISC, i830_debug_chdecmisc), DEFINEREG_16BIT(C0DRB0), DEFINEREG_16BIT(C0DRB1), DEFINEREG_16BIT(C0DRB2), DEFINEREG_16BIT(C0DRB3), DEFINEREG_16BIT(C1DRB0), DEFINEREG_16BIT(C1DRB1), DEFINEREG_16BIT(C1DRB2), DEFINEREG_16BIT(C1DRB3), DEFINEREG_16BIT(C0DRA01), DEFINEREG_16BIT(C0DRA23), DEFINEREG_16BIT(C1DRA01), DEFINEREG_16BIT(C1DRA23), DEFINEREG(PGETBL_CTL), DEFINEREG2(VCLK_DIVISOR_VGA0, i830_debug_fp), DEFINEREG2(VCLK_DIVISOR_VGA1, i830_debug_fp), DEFINEREG2(VCLK_POST_DIV, i830_debug_vga_pd), DEFINEREG2(DPLL_TEST, i830_debug_dpll_test), DEFINEREG(CACHE_MODE_0), DEFINEREG(D_STATE), DEFINEREG2(DSPCLK_GATE_D, i830_debug_dspclk_gate_d), DEFINEREG(RENCLK_GATE_D1), DEFINEREG(RENCLK_GATE_D2), /* DEFINEREG(RAMCLK_GATE_D), CRL only */ DEFINEREG2(SDVOB, i830_debug_sdvo), DEFINEREG2(SDVOC, i830_debug_sdvo), /* DEFINEREG(UDIB_SVB_SHB_CODES), CRL only */ /* DEFINEREG(UDIB_SHA_BLANK_CODES), CRL only */ DEFINEREG(SDVOUDI), DEFINEREG(DSPARB), DEFINEREG(FW_BLC), DEFINEREG(FW_BLC2), DEFINEREG(FW_BLC_SELF), DEFINEREG(DSPFW1), DEFINEREG(DSPFW2), DEFINEREG(DSPFW3), DEFINEREG2(ADPA, i830_debug_adpa), DEFINEREG2(LVDS, i830_debug_lvds), DEFINEREG2(DVOA, i830_debug_dvo), DEFINEREG2(DVOB, i830_debug_dvo), DEFINEREG2(DVOC, i830_debug_dvo), DEFINEREG(DVOA_SRCDIM), DEFINEREG(DVOB_SRCDIM), DEFINEREG(DVOC_SRCDIM), DEFINEREG(BLC_PWM_CTL), DEFINEREG(BLC_PWM_CTL2), DEFINEREG2(PP_CONTROL, i830_debug_pp_control), DEFINEREG2(PP_STATUS, i830_debug_pp_status), DEFINEREG(PP_ON_DELAYS), DEFINEREG(PP_OFF_DELAYS), DEFINEREG(PP_DIVISOR), DEFINEREG(PFIT_CONTROL), DEFINEREG(PFIT_PGM_RATIOS), DEFINEREG(PORT_HOTPLUG_EN), DEFINEREG(PORT_HOTPLUG_STAT), DEFINEREG2(DSPACNTR, i830_debug_dspcntr), DEFINEREG2(DSPASTRIDE, i830_debug_dspstride), DEFINEREG2(DSPAPOS, i830_debug_xy), DEFINEREG2(DSPASIZE, i830_debug_xyminus1), DEFINEREG(DSPABASE), DEFINEREG(DSPASURF), DEFINEREG(DSPATILEOFF), DEFINEREG2(PIPEACONF, i830_debug_pipeconf), DEFINEREG2(PIPEASRC, i830_debug_yxminus1), DEFINEREG2(PIPEASTAT, i830_debug_pipestat), DEFINEREG(PIPEA_GMCH_DATA_M), DEFINEREG(PIPEA_GMCH_DATA_N), DEFINEREG(PIPEA_DP_LINK_M), DEFINEREG(PIPEA_DP_LINK_N), DEFINEREG(CURSOR_A_BASE), DEFINEREG(CURSOR_A_CONTROL), DEFINEREG(CURSOR_A_POSITION), DEFINEREG2(FPA0, i830_debug_fp), DEFINEREG2(FPA1, i830_debug_fp), DEFINEREG2(DPLL_A, i830_debug_dpll), DEFINEREG(DPLL_A_MD), DEFINEREG2(HTOTAL_A, i830_debug_hvtotal), DEFINEREG2(HBLANK_A, i830_debug_hvsyncblank), DEFINEREG2(HSYNC_A, i830_debug_hvsyncblank), DEFINEREG2(VTOTAL_A, i830_debug_hvtotal), DEFINEREG2(VBLANK_A, i830_debug_hvsyncblank), DEFINEREG2(VSYNC_A, i830_debug_hvsyncblank), DEFINEREG(BCLRPAT_A), DEFINEREG(VSYNCSHIFT_A), DEFINEREG2(DSPBCNTR, i830_debug_dspcntr), DEFINEREG2(DSPBSTRIDE, i830_debug_dspstride), DEFINEREG2(DSPBPOS, i830_debug_xy), DEFINEREG2(DSPBSIZE, i830_debug_xyminus1), DEFINEREG(DSPBBASE), DEFINEREG(DSPBSURF), DEFINEREG(DSPBTILEOFF), DEFINEREG2(PIPEBCONF, i830_debug_pipeconf), DEFINEREG2(PIPEBSRC, i830_debug_yxminus1), DEFINEREG2(PIPEBSTAT, i830_debug_pipestat), DEFINEREG(PIPEB_GMCH_DATA_M), DEFINEREG(PIPEB_GMCH_DATA_N), DEFINEREG(PIPEB_DP_LINK_M), DEFINEREG(PIPEB_DP_LINK_N), DEFINEREG(CURSOR_B_BASE), DEFINEREG(CURSOR_B_CONTROL), DEFINEREG(CURSOR_B_POSITION), DEFINEREG2(FPB0, i830_debug_fp), DEFINEREG2(FPB1, i830_debug_fp), DEFINEREG2(DPLL_B, i830_debug_dpll), DEFINEREG(DPLL_B_MD), DEFINEREG2(HTOTAL_B, i830_debug_hvtotal), DEFINEREG2(HBLANK_B, i830_debug_hvsyncblank), DEFINEREG2(HSYNC_B, i830_debug_hvsyncblank), DEFINEREG2(VTOTAL_B, i830_debug_hvtotal), DEFINEREG2(VBLANK_B, i830_debug_hvsyncblank), DEFINEREG2(VSYNC_B, i830_debug_hvsyncblank), DEFINEREG(BCLRPAT_B), DEFINEREG(VSYNCSHIFT_B), DEFINEREG(VCLK_DIVISOR_VGA0), DEFINEREG(VCLK_DIVISOR_VGA1), DEFINEREG(VCLK_POST_DIV), DEFINEREG2(VGACNTRL, i830_debug_vgacntrl), DEFINEREG(TV_CTL), DEFINEREG(TV_DAC), DEFINEREG(TV_CSC_Y), DEFINEREG(TV_CSC_Y2), DEFINEREG(TV_CSC_U), DEFINEREG(TV_CSC_U2), DEFINEREG(TV_CSC_V), DEFINEREG(TV_CSC_V2), DEFINEREG(TV_CLR_KNOBS), DEFINEREG(TV_CLR_LEVEL), DEFINEREG(TV_H_CTL_1), DEFINEREG(TV_H_CTL_2), DEFINEREG(TV_H_CTL_3), DEFINEREG(TV_V_CTL_1), DEFINEREG(TV_V_CTL_2), DEFINEREG(TV_V_CTL_3), DEFINEREG(TV_V_CTL_4), DEFINEREG(TV_V_CTL_5), DEFINEREG(TV_V_CTL_6), DEFINEREG(TV_V_CTL_7), DEFINEREG(TV_SC_CTL_1), DEFINEREG(TV_SC_CTL_2), DEFINEREG(TV_SC_CTL_3), DEFINEREG(TV_WIN_POS), DEFINEREG(TV_WIN_SIZE), DEFINEREG(TV_FILTER_CTL_1), DEFINEREG(TV_FILTER_CTL_2), DEFINEREG(TV_FILTER_CTL_3), DEFINEREG(TV_CC_CONTROL), DEFINEREG(TV_CC_DATA), DEFINEREG(TV_H_LUMA_0), DEFINEREG(TV_H_LUMA_59), DEFINEREG(TV_H_CHROMA_0), DEFINEREG(TV_H_CHROMA_59), DEFINEREG(FBC_CFB_BASE), DEFINEREG(FBC_LL_BASE), DEFINEREG(FBC_CONTROL), DEFINEREG(FBC_COMMAND), DEFINEREG(FBC_STATUS), DEFINEREG(FBC_CONTROL2), DEFINEREG(FBC_FENCE_OFF), DEFINEREG(FBC_MOD_NUM), DEFINEREG(MI_MODE), /* DEFINEREG(MI_DISPLAY_POWER_DOWN), CRL only */ DEFINEREG(MI_ARB_STATE), DEFINEREG(MI_RDRET_STATE), DEFINEREG(ECOSKPD), DEFINEREG(DP_B), DEFINEREG(DPB_AUX_CH_CTL), DEFINEREG(DPB_AUX_CH_DATA1), DEFINEREG(DPB_AUX_CH_DATA2), DEFINEREG(DPB_AUX_CH_DATA3), DEFINEREG(DPB_AUX_CH_DATA4), DEFINEREG(DPB_AUX_CH_DATA5), DEFINEREG(DP_C), DEFINEREG(DPC_AUX_CH_CTL), DEFINEREG(DPC_AUX_CH_DATA1), DEFINEREG(DPC_AUX_CH_DATA2), DEFINEREG(DPC_AUX_CH_DATA3), DEFINEREG(DPC_AUX_CH_DATA4), DEFINEREG(DPC_AUX_CH_DATA5), DEFINEREG(DP_D), DEFINEREG(DPD_AUX_CH_CTL), DEFINEREG(DPD_AUX_CH_DATA1), DEFINEREG(DPD_AUX_CH_DATA2), DEFINEREG(DPD_AUX_CH_DATA3), DEFINEREG(DPD_AUX_CH_DATA4), DEFINEREG(DPD_AUX_CH_DATA5), DEFINEREG(AUD_CONFIG), DEFINEREG(AUD_HDMIW_STATUS), DEFINEREG(AUD_CONV_CHCNT), DEFINEREG(VIDEO_DIP_CTL), DEFINEREG(AUD_PINW_CNTR), DEFINEREG(AUD_CNTL_ST), DEFINEREG(AUD_PIN_CAP), DEFINEREG(AUD_PINW_CAP), DEFINEREG(AUD_PINW_UNSOLRESP), DEFINEREG(AUD_OUT_DIG_CNVT), DEFINEREG(AUD_OUT_CWCAP), DEFINEREG(AUD_GRP_CAP), #define DEFINEFENCE_915(i) \ { FENCE+i*4, "FENCE " #i, i810_debug_915_fence } #define DEFINEFENCE_945(i) \ { FENCE_NEW+(i - 8) * 4, "FENCE " #i, i810_debug_915_fence } DEFINEFENCE_915(0), DEFINEFENCE_915(1), DEFINEFENCE_915(2), DEFINEFENCE_915(3), DEFINEFENCE_915(4), DEFINEFENCE_915(5), DEFINEFENCE_915(6), DEFINEFENCE_915(7), DEFINEFENCE_945(8), DEFINEFENCE_945(9), DEFINEFENCE_945(10), DEFINEFENCE_945(11), DEFINEFENCE_945(12), DEFINEFENCE_945(13), DEFINEFENCE_945(14), DEFINEFENCE_945(15), #define DEFINEFENCE_965(i) \ { FENCE_NEW+i*8, "FENCE START " #i, i810_debug_965_fence_start }, \ { FENCE_NEW+i*8+4, "FENCE END " #i, i810_debug_965_fence_end } DEFINEFENCE_965(0), DEFINEFENCE_965(1), DEFINEFENCE_965(2), DEFINEFENCE_965(3), DEFINEFENCE_965(4), DEFINEFENCE_965(5), DEFINEFENCE_965(6), DEFINEFENCE_965(7), DEFINEFENCE_965(8), DEFINEFENCE_965(9), DEFINEFENCE_965(10), DEFINEFENCE_965(11), DEFINEFENCE_965(12), DEFINEFENCE_965(13), DEFINEFENCE_965(14), DEFINEFENCE_965(15), DEFINEREG(INST_PM), }; DEBUGSTRING(ironlake_debug_rr_hw_ctl) { snprintf(result, len, "low %d, high %d", val & RR_HW_LOW_POWER_FRAMES_MASK, (val & RR_HW_HIGH_POWER_FRAMES_MASK) >> 8); } DEBUGSTRING(ironlake_debug_m_tu) { snprintf(result, len, "TU %d, val 0x%x %d", (val >> 25) + 1, val & 0xffffff, val & 0xffffff); } DEBUGSTRING(ironlake_debug_n) { snprintf(result, len, "val 0x%x %d", val & 0xffffff, val & 0xffffff); } DEBUGSTRING(ironlake_debug_fdi_tx_ctl) { const char *train = NULL, *voltage = NULL, *pre_emphasis = NULL, *portw = NULL; switch (val & FDI_LINK_TRAIN_NONE) { case FDI_LINK_TRAIN_PATTERN_1: train = "pattern_1"; break; case FDI_LINK_TRAIN_PATTERN_2: train = "pattern_2"; break; case FDI_LINK_TRAIN_PATTERN_IDLE: train = "pattern_idle"; break; case FDI_LINK_TRAIN_NONE: train = "not train"; break; } if (HAS_CPT) { /* SNB B0 */ switch (val & (0x3f << 22)) { case FDI_LINK_TRAIN_400MV_0DB_SNB_B: voltage = "0.4V"; pre_emphasis = "0dB"; break; case FDI_LINK_TRAIN_400MV_6DB_SNB_B: voltage = "0.4V"; pre_emphasis = "6dB"; break; case FDI_LINK_TRAIN_600MV_3_5DB_SNB_B: voltage = "0.6V"; pre_emphasis = "3.5dB"; break; case FDI_LINK_TRAIN_800MV_0DB_SNB_B: voltage = "0.8V"; pre_emphasis = "0dB"; break; } } else { switch (val & (7 << 25)) { case FDI_LINK_TRAIN_VOLTAGE_0_4V: voltage = "0.4V"; break; case FDI_LINK_TRAIN_VOLTAGE_0_6V: voltage = "0.6V"; break; case FDI_LINK_TRAIN_VOLTAGE_0_8V: voltage = "0.8V"; break; case FDI_LINK_TRAIN_VOLTAGE_1_2V: voltage = "1.2V"; break; default: voltage = "reserved"; } switch (val & (7 << 22)) { case FDI_LINK_TRAIN_PRE_EMPHASIS_NONE: pre_emphasis = "none"; break; case FDI_LINK_TRAIN_PRE_EMPHASIS_1_5X: pre_emphasis = "1.5x"; break; case FDI_LINK_TRAIN_PRE_EMPHASIS_2X: pre_emphasis = "2x"; break; case FDI_LINK_TRAIN_PRE_EMPHASIS_3X: pre_emphasis = "3x"; break; default: pre_emphasis = "reserved"; } } switch (val & (7 << 19)) { case FDI_DP_PORT_WIDTH_X1: portw = "X1"; break; case FDI_DP_PORT_WIDTH_X2: portw = "X2"; break; case FDI_DP_PORT_WIDTH_X3: portw = "X3"; break; case FDI_DP_PORT_WIDTH_X4: portw = "X4"; break; } snprintf(result, len, "%s, train pattern %s, voltage swing %s," "pre-emphasis %s, port width %s, enhanced framing %s, FDI PLL %s, scrambing %s, master mode %s", val & FDI_TX_ENABLE ? "enable" : "disable", train, voltage, pre_emphasis, portw, val & FDI_TX_ENHANCE_FRAME_ENABLE ? "enable" : "disable", val & FDI_TX_PLL_ENABLE ? "enable" : "disable", val & (1 << 7) ? "disable" : "enable", val & (1 << 0) ? "enable" : "disable"); } DEBUGSTRING(ironlake_debug_fdi_rx_ctl) { const char *train = NULL, *portw = NULL, *bpc = NULL; if (HAS_CPT) { switch (val & FDI_LINK_TRAIN_PATTERN_MASK_CPT) { case FDI_LINK_TRAIN_PATTERN_1_CPT: train = "pattern_1"; break; case FDI_LINK_TRAIN_PATTERN_2_CPT: train = "pattern_2"; break; case FDI_LINK_TRAIN_PATTERN_IDLE_CPT: train = "pattern_idle"; break; case FDI_LINK_TRAIN_NORMAL_CPT: train = "not train"; break; } } else { switch (val & FDI_LINK_TRAIN_NONE) { case FDI_LINK_TRAIN_PATTERN_1: train = "pattern_1"; break; case FDI_LINK_TRAIN_PATTERN_2: train = "pattern_2"; break; case FDI_LINK_TRAIN_PATTERN_IDLE: train = "pattern_idle"; break; case FDI_LINK_TRAIN_NONE: train = "not train"; break; } } switch (val & (7 << 19)) { case FDI_DP_PORT_WIDTH_X1: portw = "X1"; break; case FDI_DP_PORT_WIDTH_X2: portw = "X2"; break; case FDI_DP_PORT_WIDTH_X3: portw = "X3"; break; case FDI_DP_PORT_WIDTH_X4: portw = "X4"; break; } switch (val & (7 << 16)) { case FDI_8BPC: bpc = "8bpc"; break; case FDI_10BPC: bpc = "10bpc"; break; case FDI_6BPC: bpc = "6bpc"; break; case FDI_12BPC: bpc = "12bpc"; break; } snprintf(result, len, "%s, train pattern %s, port width %s, %s," "link_reverse_strap_overwrite %s, dmi_link_reverse %s, FDI PLL %s," "FS ecc %s, FE ecc %s, FS err report %s, FE err report %s," "scrambing %s, enhanced framing %s, %s", val & FDI_RX_ENABLE ? "enable" : "disable", train, portw, bpc, val & FDI_LINK_REVERSE_OVERWRITE ? "yes" : "no", val & FDI_DMI_LINK_REVERSE_MASK ? "yes" : "no", val & FDI_RX_PLL_ENABLE ? "enable" : "disable", val & FDI_FS_ERR_CORRECT_ENABLE ? "enable" : "disable", val & FDI_FE_ERR_CORRECT_ENABLE ? "enable" : "disable", val & FDI_FS_ERR_REPORT_ENABLE ? "enable" : "disable", val & FDI_FE_ERR_REPORT_ENABLE ? "enable" : "disable", val & (1 << 7) ? "disable" : "enable", val & FDI_RX_ENHANCE_FRAME_ENABLE ? "enable" : "disable", val & FDI_SEL_PCDCLK ? "PCDClk" : "RawClk"); } DEBUGSTRING(ironlake_debug_dspstride) { snprintf(result, len, "%d", val >> 6); } DEBUGSTRING(ironlake_debug_pch_dpll) { const char *enable = val & DPLL_VCO_ENABLE ? "enable" : "disable"; const char *highspeed = val & DPLL_DVO_HIGH_SPEED ? "yes" : "no"; const char *mode = NULL; const char *p2 = NULL; int fpa0_p1, fpa1_p1; const char *refclk = NULL; int sdvo_mul; if ((val & DPLLB_MODE_LVDS) == DPLLB_MODE_LVDS) { mode = "LVDS"; if (val & DPLLB_LVDS_P2_CLOCK_DIV_7) p2 = "Div 7"; else p2 = "Div 14"; } else if ((val & DPLLB_MODE_LVDS) == DPLLB_MODE_DAC_SERIAL) { mode = "Non-LVDS"; if (val & DPLL_DAC_SERIAL_P2_CLOCK_DIV_5) p2 = "Div 5"; else p2 = "Div 10"; } fpa0_p1 = ffs((val & DPLL_FPA01_P1_POST_DIV_MASK) >> 16); fpa1_p1 = ffs((val & DPLL_FPA1_P1_POST_DIV_MASK)); switch (val & PLL_REF_INPUT_MASK) { case PLL_REF_INPUT_DREFCLK: refclk = "default 120Mhz"; break; case PLL_REF_INPUT_SUPER_SSC: refclk = "SuperSSC 120Mhz"; break; case PLL_REF_INPUT_TVCLKINBC: refclk = "SDVO TVClkIn"; break; case PLLB_REF_INPUT_SPREADSPECTRUMIN: refclk = "SSC"; break; case PLL_REF_INPUT_DMICLK: refclk = "DMI RefCLK"; break; } sdvo_mul = ((val & PLL_REF_SDVO_HDMI_MULTIPLIER_MASK) >> 9) + 1; snprintf(result, len, "%s, sdvo high speed %s, mode %s, p2 %s, " "FPA0 P1 %d, FPA1 P1 %d, refclk %s, sdvo/hdmi mul %d", enable, highspeed, mode, p2, fpa0_p1, fpa1_p1, refclk, sdvo_mul); } DEBUGSTRING(ironlake_debug_dref_ctl) { const char *cpu_source; const char *ssc_source = val & DREF_SSC_SOURCE_ENABLE ? "enable" : "disable"; const char *nonspread_source = val & DREF_NONSPREAD_SOURCE_ENABLE ? "enable" : "disable"; const char *superspread_source = val & DREF_SUPERSPREAD_SOURCE_ENABLE ? "enable" : "disable"; const char *ssc4_mode = val & DREF_SSC4_CENTERSPREAD ? "centerspread" : "downspread"; const char *ssc1 = val & DREF_SSC1_ENABLE ? "enable" : "disable"; const char *ssc4 = val & DREF_SSC4_ENABLE ? "enable" : "disable"; switch (val & DREF_CPU_SOURCE_OUTPUT_NONSPREAD) { case DREF_CPU_SOURCE_OUTPUT_DISABLE: cpu_source = "disable"; break; case DREF_CPU_SOURCE_OUTPUT_DOWNSPREAD: cpu_source = "downspread"; break; case DREF_CPU_SOURCE_OUTPUT_NONSPREAD: cpu_source = "nonspread"; break; default: cpu_source = "reserved"; } snprintf(result, len, "cpu source %s, ssc_source %s, nonspread_source %s, " "superspread_source %s, ssc4_mode %s, ssc1 %s, ssc4 %s", cpu_source, ssc_source, nonspread_source, superspread_source, ssc4_mode, ssc1, ssc4); } DEBUGSTRING(ironlake_debug_rawclk_freq) { const char *tp1 = NULL, *tp2 = NULL; switch (val & FDL_TP1_TIMER_MASK) { case 0: tp1 = "0.5us"; break; case (1 << 12): tp1 = "1.0us"; break; case (2 << 12): tp1 = "2.0us"; break; case (3 << 12): tp1 = "4.0us"; break; } switch (val & FDL_TP2_TIMER_MASK) { case 0: tp2 = "1.5us"; break; case (1 << 10): tp2 = "3.0us"; break; case (2 << 10): tp2 = "6.0us"; break; case (3 << 10): tp2 = "12.0us"; break; } snprintf(result, len, "FDL_TP1 timer %s, FDL_TP2 timer %s, freq %d", tp1, tp2, val & RAWCLK_FREQ_MASK); } DEBUGSTRING(ironlake_debug_fdi_rx_misc) { snprintf(result, len, "FDI Delay %d", val & ((1 << 13) - 1)); } DEBUGSTRING(ironlake_debug_transconf) { const char *enable = val & TRANS_ENABLE ? "enable" : "disable"; const char *state = val & TRANS_STATE_ENABLE ? "active" : "inactive"; const char *interlace; switch ((val >> 21) & 7) { case 0: interlace = "progressive"; break; case 2: if (IS_GEN5(devid)) interlace = "interlaced sdvo"; else interlace = "rsvd"; break; case 3: interlace = "interlaced"; break; default: interlace = "rsvd"; } snprintf(result, len, "%s, %s, %s", enable, state, interlace); } DEBUGSTRING(ironlake_debug_panel_fitting) { const char *vadapt = NULL, *filter_sel = NULL; switch (val & (3 << 25)) { case 0: vadapt = "least"; break; case (1 << 25): vadapt = "moderate"; break; case (2 << 25): vadapt = "reserved"; break; case (3 << 25): vadapt = "most"; break; } switch (val & (3 << 23)) { case 0: filter_sel = "programmed"; break; case (1 << 23): filter_sel = "hardcoded"; break; case (2 << 23): filter_sel = "edge_enhance"; break; case (3 << 23): filter_sel = "edge_soften"; break; } snprintf(result, len, "%s, auto_scale %s, auto_scale_cal %s, v_filter %s, vadapt %s, mode %s, filter_sel %s," "chroma pre-filter %s, vert3tap %s, v_inter_invert %s", val & PF_ENABLE ? "enable" : "disable", val & (1 << 30) ? "no" : "yes", val & (1 << 29) ? "yes" : "no", val & (1 << 28) ? "bypass" : "enable", val & (1 << 27) ? "enable" : "disable", vadapt, filter_sel, val & (1 << 22) ? "enable" : "disable", val & (1 << 21) ? "force" : "auto", val & (1 << 20) ? "field 0" : "field 1"); } DEBUGSTRING(ironlake_debug_panel_fitting_2) { snprintf(result, len, "vscale %f", val / (float) (1<<15)); } DEBUGSTRING(ironlake_debug_panel_fitting_3) { snprintf(result, len, "vscale initial phase %f", val / (float) (1<<15)); } DEBUGSTRING(ironlake_debug_panel_fitting_4) { snprintf(result, len, "hscale %f", val / (float) (1<<15)); } DEBUGSTRING(ironlake_debug_pf_win) { int a, b; a = (val >> 16) & 0x1fff; b = val & 0xfff; snprintf(result, len, "%d, %d", a, b); } DEBUGSTRING(ironlake_debug_hdmi) { int disp_pipe; const char *enable, *bpc = NULL, *encoding; const char *mode, *audio, *vsync, *hsync, *detect; if (val & PORT_ENABLE) enable = "enabled"; else enable = "disabled"; if (HAS_CPT) disp_pipe = (val & (3<<29)) >> 29; else disp_pipe = (val & TRANSCODER_B) >> 29; switch (val & (7 << 26)) { case COLOR_FORMAT_8bpc: bpc = "8bpc"; break; case COLOR_FORMAT_12bpc: bpc = "12bpc"; break; } if ((val & (3 << 10)) == TMDS_ENCODING) encoding = "TMDS"; else encoding = "SDVO"; if (val & (1 << 9)) mode = "HDMI"; else mode = "DVI"; if (val & AUDIO_ENABLE) audio = "enabled"; else audio = "disabled"; if (val & VSYNC_ACTIVE_HIGH) vsync = "+vsync"; else vsync = "-vsync"; if (val & HSYNC_ACTIVE_HIGH) hsync = "+hsync"; else hsync = "-hsync"; if (val & PORT_DETECTED) detect = "detected"; else detect = "non-detected"; snprintf(result, len, "%s pipe %c %s %s %s audio %s %s %s %s", enable, disp_pipe + 'A', bpc, encoding, mode, audio, vsync, hsync, detect); } DEBUGSTRING(snb_debug_dpll_sel) { const char *transa, *transb; const char *dplla = NULL, *dpllb = NULL; if (!HAS_CPT) return; if (val & TRANSA_DPLL_ENABLE) { transa = "enable"; if (val & TRANSA_DPLLB_SEL) dplla = "B"; else dplla = "A"; } else transa = "disable"; if (val & TRANSB_DPLL_ENABLE) { transb = "enable"; if (val & TRANSB_DPLLB_SEL) dpllb = "B"; else dpllb = "A"; } else transb = "disable"; snprintf(result, len, "TransA DPLL %s (DPLL %s), TransB DPLL %s (DPLL %s)", transa, dplla, transb, dpllb); } DEBUGSTRING(snb_debug_trans_dp_ctl) { const char *enable, *port = NULL, *bpc = NULL, *vsync, *hsync; if (!HAS_CPT) return; if (val & TRANS_DP_OUTPUT_ENABLE) enable = "enable"; else enable = "disable"; switch (val & TRANS_DP_PORT_SEL_MASK) { case TRANS_DP_PORT_SEL_B: port = "B"; break; case TRANS_DP_PORT_SEL_C: port = "C"; break; case TRANS_DP_PORT_SEL_D: port = "D"; break; default: port = "none"; break; } switch (val & (7<<9)) { case TRANS_DP_8BPC: bpc = "8bpc"; break; case TRANS_DP_10BPC: bpc = "10bpc"; break; case TRANS_DP_6BPC: bpc = "6bpc"; break; case TRANS_DP_12BPC: bpc = "12bpc"; break; } if (val & TRANS_DP_VSYNC_ACTIVE_HIGH) vsync = "+vsync"; else vsync = "-vsync"; if (val & TRANS_DP_HSYNC_ACTIVE_HIGH) hsync = "+hsync"; else hsync = "-hsync"; snprintf(result, len, "%s port %s %s %s %s", enable, port, bpc, vsync, hsync); } DEBUGSTRING(ilk_debug_pp_control) { snprintf(result, len, "blacklight %s, %spower down on reset, panel %s", (val & (1 << 2)) ? "enabled" : "disabled", (val & (1 << 1)) ? "" : "do not ", (val & (1 << 0)) ? "on" : "off"); } DEBUGSTRING(hsw_debug_port_clk_sel) { const char *clock = NULL; switch ((val >> 29 ) & 7) { case 0: clock = "LCPLL 2700"; break; case 1: clock = "LCPLL 1350"; break; case 2: clock = "LCPLL 810"; break; case 3: clock = "SPLL"; break; case 4: clock = "WRPLL 1"; break; case 5: clock = "WRPLL 2"; break; case 6: clock = "Reserved"; break; case 7: clock = "None"; break; } snprintf(result, len, "%s", clock); } DEBUGSTRING(hsw_debug_pipe_clk_sel) { const char *clock; switch ((val >> 29) & 7) { case 0: clock = "None"; break; case 2: clock = "DDIB"; break; case 3: clock = "DDIC"; break; case 4: clock = "DDID"; break; case 5: clock = "DDIE"; break; default: clock = "Reserved"; break; } snprintf(result, len, "%s", clock); } DEBUGSTRING(hsw_debug_ddi_buf_ctl) { const char *enable, *reversal, *width, *detected; enable = (val & (1<<31)) ? "enabled" : "disabled"; reversal = (val & (1<<16)) ? "reversed" : "not reversed"; switch ((val >> 1) & 7) { case 0: width = "x1"; break; case 1: width = "x2"; break; case 3: width = "x4"; break; default: width = "reserved"; break; } detected = (val & 1) ? "detected" : "not detected"; snprintf(result, len, "%s %s %s %s", enable, reversal, width, detected); } DEBUGSTRING(hsw_debug_sfuse_strap) { const char *display, *crt, *lane_reversal, *portb, *portc, *portd; display = (val & (1<<7)) ? "disabled" : "enabled"; crt = (val & (1<<6)) ? "yes" : "no"; lane_reversal = (val & (1<<4)) ? "yes" : "no"; portb = (val & (1<<2)) ? "yes" : "no"; portc = (val & (1<<1)) ? "yes" : "no"; portd = (val & (1<<0)) ? "yes" : "no"; snprintf(result, len, "display %s, crt %s, lane reversal %s, " "port b %s, port c %s, port d %s", display, crt, lane_reversal, portb, portc, portd); } DEBUGSTRING(hsw_debug_pipe_ddi_func_ctl) { const char *enable, *port, *mode, *bpc, *vsync, *hsync, *edp_input; const char *width; enable = (val & (1<<31)) ? "enabled" : "disabled"; switch ((val >> 28) & 7) { case 0: port = "no port"; break; case 1: port = "DDIB"; break; case 2: port = "DDIC"; break; case 3: port = "DDID"; break; case 4: port = "DDIE"; break; default: port = "port reserved"; break; } switch ((val >> 24) & 7) { case 0: mode = "HDMI"; break; case 1: mode = "DVI"; break; case 2: mode = "DP SST"; break; case 3: mode = "DP MST"; break; case 4: mode = "FDI"; break; case 5: default: mode = "mode reserved"; break; } switch ((val >> 20) & 7) { case 0: bpc = "8 bpc"; break; case 1: bpc = "10 bpc"; break; case 2: bpc = "6 bpc"; break; case 3: bpc = "12 bpc"; break; default: bpc = "bpc reserved"; break; } hsync = (val & (1<<16)) ? "+HSync" : "-HSync"; vsync = (val & (1<<17)) ? "+VSync" : "-VSync"; switch ((val >> 12) & 7) { case 0: edp_input = "EDP A ON"; break; case 4: edp_input = "EDP A ONOFF"; break; case 5: edp_input = "EDP B ONOFF"; break; case 6: edp_input = "EDP C ONOFF"; break; default: edp_input = "EDP input reserved"; break; } switch ((val >> 1) & 7) { case 0: width = "x1"; break; case 1: width = "x2"; break; case 3: width = "x4"; break; default: width = "reserved width"; break; } snprintf(result, len, "%s, %s, %s, %s, %s, %s, %s, %s", enable, port, mode, bpc, vsync, hsync, edp_input, width); } DEBUGSTRING(hsw_debug_wm_pipe) { uint32_t primary, sprite, cursor; primary = (val >> 16) & 0x7F; sprite = (val >> 8) & 0x7F; cursor = val & 0x3F; snprintf(result, len, "primary %d, sprite %d, pipe %d", primary, sprite, cursor); } DEBUGSTRING(hsw_debug_lp_wm) { const char *enable; uint32_t latency, fbc, pri, cur; enable = ((val >> 31) & 1) ? "enabled" : "disabled"; latency = (val >> 24) & 0x7F; fbc = (val >> 20) & 0xF; pri = (val >> 8) & 0x3FF; cur = val & 0xFF; snprintf(result, len, "%s, latency %d, fbc %d, pri %d, cur %d", enable, latency, fbc, pri, cur); } DEBUGSTRING(hsw_debug_sinterrupt) { int portd, portc, portb, crt; portd = (val >> 23) & 1; portc = (val >> 22) & 1; portb = (val >> 21) & 1; crt = (val >> 19) & 1; snprintf(result, len, "port d:%d, port c:%d, port b:%d, crt:%d", portd, portc, portb, crt); } DEBUGSTRING(ilk_debug_blc_pwm_cpu_ctl2) { int enable, blinking, granularity; const char *pipe; enable = (val >> 31) & 1; if (IS_GEN5(devid) || IS_GEN6(devid)) { pipe = ((val >> 29) & 1) ? "B" : "A"; } else { switch ((val >> 29) & 3) { case 0: pipe = "A"; break; case 1: pipe = "B"; break; case 2: pipe = "C"; break; case 3: if (IS_IVYBRIDGE(devid)) pipe = "reserved"; else pipe = "EDP"; break; } } if (IS_GEN5(devid) || IS_GEN6(devid) || IS_IVYBRIDGE(devid)) { snprintf(result, len, "enable %d, pipe %s", enable, pipe); } else { blinking = (val >> 28) & 1; granularity = ((val >> 27) & 1) ? 8 : 128; snprintf(result, len, "enable %d, pipe %s, blinking %d, " "granularity %d", enable, pipe, blinking, granularity); } } DEBUGSTRING(ilk_debug_blc_pwm_cpu_ctl) { int cycle, freq; cycle = (val & 0xFFFF); if (IS_GEN5(devid) || IS_GEN6(devid) || IS_IVYBRIDGE(devid)) { snprintf(result, len, "cycle %d", cycle); } else { freq = (val >> 16) & 0xFFFF; snprintf(result, len, "cycle %d, freq %d", cycle, freq); } } DEBUGSTRING(ibx_debug_blc_pwm_ctl1) { int enable, override, inverted_polarity; enable = (val >> 31) & 1; override = (val >> 30) & 1; inverted_polarity = (val >> 29) & 1; snprintf(result, len, "enable %d, override %d, inverted polarity %d", enable, override, inverted_polarity); } DEBUGSTRING(ibx_debug_blc_pwm_ctl2) { int freq, cycle; freq = (val >> 16) & 0xFFFF; cycle = val & 0xFFFF; snprintf(result, len, "freq %d, cycle %d", freq, cycle); } DEBUGSTRING(hsw_debug_blc_misc_ctl) { const char *sel; sel = (val & 1) ? "PWM1-CPU PWM2-PCH" : "PWM1-PCH PWM2-CPU"; snprintf(result, len, "%s", sel); } DEBUGSTRING(hsw_debug_util_pin_ctl) { int enable, data, inverted_polarity; const char *transcoder, *mode; enable = (val >> 31) & 1; switch ((val >> 29) & 3) { case 0: transcoder = "A"; break; case 1: transcoder = "B"; break; case 2: transcoder = "C"; break; case 3: transcoder = "EDP"; break; } switch ((val >> 24) & 0xF) { case 0: mode = "data"; break; case 1: mode = "PWM"; break; case 4: mode = "Vblank"; break; case 5: mode = "Vsync"; break; default: mode = "reserved"; break; } data = (val >> 23) & 1; inverted_polarity = (val >> 22) & 1; snprintf(result, len, "enable %d, transcoder %s, mode %s, data %d " "inverted polarity %d", enable, transcoder, mode, data, inverted_polarity); } static const struct reg_debug gen6_fences[] = { #define DEFINEFENCE_SNB(i) \ { FENCE_REG_SANDYBRIDGE_0 + (i) * 8, "FENCE START "#i, NULL }, \ { FENCE_REG_SANDYBRIDGE_0 + (i) * 8 + 4, "FENCE END "#i, NULL } DEFINEFENCE_SNB(0), DEFINEFENCE_SNB(1), DEFINEFENCE_SNB(2), DEFINEFENCE_SNB(3), DEFINEFENCE_SNB(4), DEFINEFENCE_SNB(5), DEFINEFENCE_SNB(6), DEFINEFENCE_SNB(7), DEFINEFENCE_SNB(8), DEFINEFENCE_SNB(9), DEFINEFENCE_SNB(10), DEFINEFENCE_SNB(11), DEFINEFENCE_SNB(12), DEFINEFENCE_SNB(13), DEFINEFENCE_SNB(14), DEFINEFENCE_SNB(15), DEFINEFENCE_SNB(16), DEFINEFENCE_SNB(17), DEFINEFENCE_SNB(18), DEFINEFENCE_SNB(19), DEFINEFENCE_SNB(20), DEFINEFENCE_SNB(20), DEFINEFENCE_SNB(21), DEFINEFENCE_SNB(22), DEFINEFENCE_SNB(23), DEFINEFENCE_SNB(24), DEFINEFENCE_SNB(25), DEFINEFENCE_SNB(26), DEFINEFENCE_SNB(27), DEFINEFENCE_SNB(28), DEFINEFENCE_SNB(29), DEFINEFENCE_SNB(30), DEFINEFENCE_SNB(31), }; static const struct reg_debug ironlake_debug_regs[] = { DEFINEREG(PGETBL_CTL), DEFINEREG(INSTDONE_I965), DEFINEREG(INSTDONE_1), DEFINEREG2(CPU_VGACNTRL, i830_debug_vgacntrl), DEFINEREG(DIGITAL_PORT_HOTPLUG_CNTRL), DEFINEREG2(RR_HW_CTL, ironlake_debug_rr_hw_ctl), DEFINEREG(FDI_PLL_BIOS_0), DEFINEREG(FDI_PLL_BIOS_1), DEFINEREG(FDI_PLL_BIOS_2), DEFINEREG(DISPLAY_PORT_PLL_BIOS_0), DEFINEREG(DISPLAY_PORT_PLL_BIOS_1), DEFINEREG(DISPLAY_PORT_PLL_BIOS_2), DEFINEREG(FDI_PLL_FREQ_CTL), /* pipe B */ DEFINEREG2(PIPEACONF, i830_debug_pipeconf), DEFINEREG2(HTOTAL_A, i830_debug_hvtotal), DEFINEREG2(HBLANK_A, i830_debug_hvsyncblank), DEFINEREG2(HSYNC_A, i830_debug_hvsyncblank), DEFINEREG2(VTOTAL_A, i830_debug_hvtotal), DEFINEREG2(VBLANK_A, i830_debug_hvsyncblank), DEFINEREG2(VSYNC_A, i830_debug_hvsyncblank), DEFINEREG(VSYNCSHIFT_A), DEFINEREG2(PIPEASRC, i830_debug_yxminus1), DEFINEREG2(PIPEA_DATA_M1, ironlake_debug_m_tu), DEFINEREG2(PIPEA_DATA_N1, ironlake_debug_n), DEFINEREG2(PIPEA_DATA_M2, ironlake_debug_m_tu), DEFINEREG2(PIPEA_DATA_N2, ironlake_debug_n), DEFINEREG2(PIPEA_LINK_M1, ironlake_debug_n), DEFINEREG2(PIPEA_LINK_N1, ironlake_debug_n), DEFINEREG2(PIPEA_LINK_M2, ironlake_debug_n), DEFINEREG2(PIPEA_LINK_N2, ironlake_debug_n), DEFINEREG2(DSPACNTR, i830_debug_dspcntr), DEFINEREG(DSPABASE), DEFINEREG2(DSPASTRIDE, ironlake_debug_dspstride), DEFINEREG(DSPASURF), DEFINEREG2(DSPATILEOFF, i830_debug_xy), /* pipe B */ DEFINEREG2(PIPEBCONF, i830_debug_pipeconf), DEFINEREG2(HTOTAL_B, i830_debug_hvtotal), DEFINEREG2(HBLANK_B, i830_debug_hvsyncblank), DEFINEREG2(HSYNC_B, i830_debug_hvsyncblank), DEFINEREG2(VTOTAL_B, i830_debug_hvtotal), DEFINEREG2(VBLANK_B, i830_debug_hvsyncblank), DEFINEREG2(VSYNC_B, i830_debug_hvsyncblank), DEFINEREG(VSYNCSHIFT_B), DEFINEREG2(PIPEBSRC, i830_debug_yxminus1), DEFINEREG2(PIPEB_DATA_M1, ironlake_debug_m_tu), DEFINEREG2(PIPEB_DATA_N1, ironlake_debug_n), DEFINEREG2(PIPEB_DATA_M2, ironlake_debug_m_tu), DEFINEREG2(PIPEB_DATA_N2, ironlake_debug_n), DEFINEREG2(PIPEB_LINK_M1, ironlake_debug_n), DEFINEREG2(PIPEB_LINK_N1, ironlake_debug_n), DEFINEREG2(PIPEB_LINK_M2, ironlake_debug_n), DEFINEREG2(PIPEB_LINK_N2, ironlake_debug_n), DEFINEREG2(DSPBCNTR, i830_debug_dspcntr), DEFINEREG(DSPBBASE), DEFINEREG2(DSPBSTRIDE, ironlake_debug_dspstride), DEFINEREG(DSPBSURF), DEFINEREG2(DSPBTILEOFF, i830_debug_xy), /* pipe C */ DEFINEREG2(PIPECCONF, i830_debug_pipeconf), DEFINEREG2(HTOTAL_C, i830_debug_hvtotal), DEFINEREG2(HBLANK_C, i830_debug_hvsyncblank), DEFINEREG2(HSYNC_C, i830_debug_hvsyncblank), DEFINEREG2(VTOTAL_C, i830_debug_hvtotal), DEFINEREG2(VBLANK_C, i830_debug_hvsyncblank), DEFINEREG2(VSYNC_C, i830_debug_hvsyncblank), DEFINEREG(VSYNCSHIFT_C), DEFINEREG2(PIPECSRC, i830_debug_yxminus1), DEFINEREG2(PIPEC_DATA_M1, ironlake_debug_m_tu), DEFINEREG2(PIPEC_DATA_N1, ironlake_debug_n), DEFINEREG2(PIPEC_DATA_M2, ironlake_debug_m_tu), DEFINEREG2(PIPEC_DATA_N2, ironlake_debug_n), DEFINEREG2(PIPEC_LINK_M1, ironlake_debug_n), DEFINEREG2(PIPEC_LINK_N1, ironlake_debug_n), DEFINEREG2(PIPEC_LINK_M2, ironlake_debug_n), DEFINEREG2(PIPEC_LINK_N2, ironlake_debug_n), DEFINEREG2(DSPCCNTR, i830_debug_dspcntr), DEFINEREG(DSPCBASE), DEFINEREG2(DSPCSTRIDE, ironlake_debug_dspstride), DEFINEREG(DSPCSURF), DEFINEREG2(DSPCTILEOFF, i830_debug_xy), /* Panel fitter */ DEFINEREG2(PFA_CTL_1, ironlake_debug_panel_fitting), DEFINEREG2(PFA_CTL_2, ironlake_debug_panel_fitting_2), DEFINEREG2(PFA_CTL_3, ironlake_debug_panel_fitting_3), DEFINEREG2(PFA_CTL_4, ironlake_debug_panel_fitting_4), DEFINEREG2(PFA_WIN_POS, ironlake_debug_pf_win), DEFINEREG2(PFA_WIN_SIZE, ironlake_debug_pf_win), DEFINEREG2(PFB_CTL_1, ironlake_debug_panel_fitting), DEFINEREG2(PFB_CTL_2, ironlake_debug_panel_fitting_2), DEFINEREG2(PFB_CTL_3, ironlake_debug_panel_fitting_3), DEFINEREG2(PFB_CTL_4, ironlake_debug_panel_fitting_4), DEFINEREG2(PFB_WIN_POS, ironlake_debug_pf_win), DEFINEREG2(PFB_WIN_SIZE, ironlake_debug_pf_win), DEFINEREG2(PFC_CTL_1, ironlake_debug_panel_fitting), DEFINEREG2(PFC_CTL_2, ironlake_debug_panel_fitting_2), DEFINEREG2(PFC_CTL_3, ironlake_debug_panel_fitting_3), DEFINEREG2(PFC_CTL_4, ironlake_debug_panel_fitting_4), DEFINEREG2(PFC_WIN_POS, ironlake_debug_pf_win), DEFINEREG2(PFC_WIN_SIZE, ironlake_debug_pf_win), /* PCH */ DEFINEREG2(PCH_DREF_CONTROL, ironlake_debug_dref_ctl), DEFINEREG2(PCH_RAWCLK_FREQ, ironlake_debug_rawclk_freq), DEFINEREG(PCH_DPLL_TMR_CFG), DEFINEREG(PCH_SSC4_PARMS), DEFINEREG(PCH_SSC4_AUX_PARMS), DEFINEREG2(PCH_DPLL_SEL, snb_debug_dpll_sel), DEFINEREG(PCH_DPLL_ANALOG_CTL), DEFINEREG2(PCH_DPLL_A, ironlake_debug_pch_dpll), DEFINEREG2(PCH_DPLL_B, ironlake_debug_pch_dpll), DEFINEREG2(PCH_FPA0, i830_debug_fp), DEFINEREG2(PCH_FPA1, i830_debug_fp), DEFINEREG2(PCH_FPB0, i830_debug_fp), DEFINEREG2(PCH_FPB1, i830_debug_fp), DEFINEREG2(TRANS_HTOTAL_A, i830_debug_hvtotal), DEFINEREG2(TRANS_HBLANK_A, i830_debug_hvsyncblank), DEFINEREG2(TRANS_HSYNC_A, i830_debug_hvsyncblank), DEFINEREG2(TRANS_VTOTAL_A, i830_debug_hvtotal), DEFINEREG2(TRANS_VBLANK_A, i830_debug_hvsyncblank), DEFINEREG2(TRANS_VSYNC_A, i830_debug_hvsyncblank), DEFINEREG(TRANS_VSYNCSHIFT_A), DEFINEREG2(TRANSA_DATA_M1, ironlake_debug_m_tu), DEFINEREG2(TRANSA_DATA_N1, ironlake_debug_n), DEFINEREG2(TRANSA_DATA_M2, ironlake_debug_m_tu), DEFINEREG2(TRANSA_DATA_N2, ironlake_debug_n), DEFINEREG2(TRANSA_DP_LINK_M1, ironlake_debug_n), DEFINEREG2(TRANSA_DP_LINK_N1, ironlake_debug_n), DEFINEREG2(TRANSA_DP_LINK_M2, ironlake_debug_n), DEFINEREG2(TRANSA_DP_LINK_N2, ironlake_debug_n), DEFINEREG2(TRANS_HTOTAL_B, i830_debug_hvtotal), DEFINEREG2(TRANS_HBLANK_B, i830_debug_hvsyncblank), DEFINEREG2(TRANS_HSYNC_B, i830_debug_hvsyncblank), DEFINEREG2(TRANS_VTOTAL_B, i830_debug_hvtotal), DEFINEREG2(TRANS_VBLANK_B, i830_debug_hvsyncblank), DEFINEREG2(TRANS_VSYNC_B, i830_debug_hvsyncblank), DEFINEREG(TRANS_VSYNCSHIFT_B), DEFINEREG2(TRANSB_DATA_M1, ironlake_debug_m_tu), DEFINEREG2(TRANSB_DATA_N1, ironlake_debug_n), DEFINEREG2(TRANSB_DATA_M2, ironlake_debug_m_tu), DEFINEREG2(TRANSB_DATA_N2, ironlake_debug_n), DEFINEREG2(TRANSB_DP_LINK_M1, ironlake_debug_n), DEFINEREG2(TRANSB_DP_LINK_N1, ironlake_debug_n), DEFINEREG2(TRANSB_DP_LINK_M2, ironlake_debug_n), DEFINEREG2(TRANSB_DP_LINK_N2, ironlake_debug_n), DEFINEREG2(TRANS_HTOTAL_C, i830_debug_hvtotal), DEFINEREG2(TRANS_HBLANK_C, i830_debug_hvsyncblank), DEFINEREG2(TRANS_HSYNC_C, i830_debug_hvsyncblank), DEFINEREG2(TRANS_VTOTAL_C, i830_debug_hvtotal), DEFINEREG2(TRANS_VBLANK_C, i830_debug_hvsyncblank), DEFINEREG2(TRANS_VSYNC_C, i830_debug_hvsyncblank), DEFINEREG(TRANS_VSYNCSHIFT_C), DEFINEREG2(TRANSC_DATA_M1, ironlake_debug_m_tu), DEFINEREG2(TRANSC_DATA_N1, ironlake_debug_n), DEFINEREG2(TRANSC_DATA_M2, ironlake_debug_m_tu), DEFINEREG2(TRANSC_DATA_N2, ironlake_debug_n), DEFINEREG2(TRANSC_DP_LINK_M1, ironlake_debug_n), DEFINEREG2(TRANSC_DP_LINK_N1, ironlake_debug_n), DEFINEREG2(TRANSC_DP_LINK_M2, ironlake_debug_n), DEFINEREG2(TRANSC_DP_LINK_N2, ironlake_debug_n), DEFINEREG2(TRANSACONF, ironlake_debug_transconf), DEFINEREG2(TRANSBCONF, ironlake_debug_transconf), DEFINEREG2(TRANSCCONF, ironlake_debug_transconf), DEFINEREG2(FDI_TXA_CTL, ironlake_debug_fdi_tx_ctl), DEFINEREG2(FDI_TXB_CTL, ironlake_debug_fdi_tx_ctl), DEFINEREG2(FDI_TXC_CTL, ironlake_debug_fdi_tx_ctl), DEFINEREG2(FDI_RXA_CTL, ironlake_debug_fdi_rx_ctl), DEFINEREG2(FDI_RXB_CTL, ironlake_debug_fdi_rx_ctl), DEFINEREG2(FDI_RXC_CTL, ironlake_debug_fdi_rx_ctl), DEFINEREG(DPAFE_BMFUNC), DEFINEREG(DPAFE_DL_IREFCAL0), DEFINEREG(DPAFE_DL_IREFCAL1), DEFINEREG(DPAFE_DP_IREFCAL), DEFINEREG(PCH_DSPCLK_GATE_D), DEFINEREG(PCH_DSP_CHICKEN1), DEFINEREG(PCH_DSP_CHICKEN2), DEFINEREG(PCH_DSP_CHICKEN3), DEFINEREG2(FDI_RXA_MISC, ironlake_debug_fdi_rx_misc), DEFINEREG2(FDI_RXB_MISC, ironlake_debug_fdi_rx_misc), DEFINEREG2(FDI_RXC_MISC, ironlake_debug_fdi_rx_misc), DEFINEREG(FDI_RXA_TUSIZE1), DEFINEREG(FDI_RXA_TUSIZE2), DEFINEREG(FDI_RXB_TUSIZE1), DEFINEREG(FDI_RXB_TUSIZE2), DEFINEREG(FDI_RXC_TUSIZE1), DEFINEREG(FDI_RXC_TUSIZE2), DEFINEREG(FDI_PLL_CTL_1), DEFINEREG(FDI_PLL_CTL_2), DEFINEREG(FDI_RXA_IIR), DEFINEREG(FDI_RXA_IMR), DEFINEREG(FDI_RXB_IIR), DEFINEREG(FDI_RXB_IMR), DEFINEREG2(PCH_ADPA, i830_debug_adpa), DEFINEREG2(HDMIB, ironlake_debug_hdmi), DEFINEREG2(HDMIC, ironlake_debug_hdmi), DEFINEREG2(HDMID, ironlake_debug_hdmi), DEFINEREG2(PCH_LVDS, i830_debug_lvds), DEFINEREG(CPU_eDP_A), DEFINEREG(PCH_DP_B), DEFINEREG(PCH_DP_C), DEFINEREG(PCH_DP_D), DEFINEREG2(TRANS_DP_CTL_A, snb_debug_trans_dp_ctl), DEFINEREG2(TRANS_DP_CTL_B, snb_debug_trans_dp_ctl), DEFINEREG2(TRANS_DP_CTL_C, snb_debug_trans_dp_ctl), DEFINEREG2(BLC_PWM_CPU_CTL2, ilk_debug_blc_pwm_cpu_ctl2), DEFINEREG2(BLC_PWM_CPU_CTL, ilk_debug_blc_pwm_cpu_ctl), DEFINEREG2(BLC_PWM_PCH_CTL1, ibx_debug_blc_pwm_ctl1), DEFINEREG2(BLC_PWM_PCH_CTL2, ibx_debug_blc_pwm_ctl2), DEFINEREG2(PCH_PP_STATUS, i830_debug_pp_status), DEFINEREG2(PCH_PP_CONTROL, ilk_debug_pp_control), DEFINEREG(PCH_PP_ON_DELAYS), DEFINEREG(PCH_PP_OFF_DELAYS), DEFINEREG(PCH_PP_DIVISOR), DEFINEREG2(PORT_DBG, ivb_debug_port), DEFINEREG(RC6_RESIDENCY_TIME), DEFINEREG(RC6p_RESIDENCY_TIME), DEFINEREG(RC6pp_RESIDENCY_TIME), }; static const struct reg_debug haswell_debug_regs[] = { /* Power wells */ DEFINEREG(HSW_PWR_WELL_CTL1), DEFINEREG(HSW_PWR_WELL_CTL2), DEFINEREG(HSW_PWR_WELL_CTL3), DEFINEREG(HSW_PWR_WELL_CTL4), DEFINEREG(HSW_PWR_WELL_CTL5), DEFINEREG(HSW_PWR_WELL_CTL6), /* DDI pipe function */ DEFINEREG2(PIPE_DDI_FUNC_CTL_A, hsw_debug_pipe_ddi_func_ctl), DEFINEREG2(PIPE_DDI_FUNC_CTL_B, hsw_debug_pipe_ddi_func_ctl), DEFINEREG2(PIPE_DDI_FUNC_CTL_C, hsw_debug_pipe_ddi_func_ctl), DEFINEREG2(PIPE_DDI_FUNC_CTL_EDP, hsw_debug_pipe_ddi_func_ctl), /* DP transport control */ DEFINEREG(DP_TP_CTL_A), DEFINEREG(DP_TP_CTL_B), DEFINEREG(DP_TP_CTL_C), DEFINEREG(DP_TP_CTL_D), DEFINEREG(DP_TP_CTL_E), /* DP status */ DEFINEREG(DP_TP_STATUS_B), DEFINEREG(DP_TP_STATUS_C), DEFINEREG(DP_TP_STATUS_D), DEFINEREG(DP_TP_STATUS_E), /* DDI buffer control */ DEFINEREG2(DDI_BUF_CTL_A, hsw_debug_ddi_buf_ctl), DEFINEREG2(DDI_BUF_CTL_B, hsw_debug_ddi_buf_ctl), DEFINEREG2(DDI_BUF_CTL_C, hsw_debug_ddi_buf_ctl), DEFINEREG2(DDI_BUF_CTL_D, hsw_debug_ddi_buf_ctl), DEFINEREG2(DDI_BUF_CTL_E, hsw_debug_ddi_buf_ctl), /* Clocks */ DEFINEREG(SPLL_CTL), DEFINEREG(LCPLL_CTL), DEFINEREG(WRPLL_CTL1), DEFINEREG(WRPLL_CTL2), /* DDI port clock control */ DEFINEREG2(PORT_CLK_SEL_A, hsw_debug_port_clk_sel), DEFINEREG2(PORT_CLK_SEL_B, hsw_debug_port_clk_sel), DEFINEREG2(PORT_CLK_SEL_C, hsw_debug_port_clk_sel), DEFINEREG2(PORT_CLK_SEL_D, hsw_debug_port_clk_sel), DEFINEREG2(PORT_CLK_SEL_E, hsw_debug_port_clk_sel), /* Pipe clock control */ DEFINEREG2(PIPE_CLK_SEL_A, hsw_debug_pipe_clk_sel), DEFINEREG2(PIPE_CLK_SEL_B, hsw_debug_pipe_clk_sel), DEFINEREG2(PIPE_CLK_SEL_C, hsw_debug_pipe_clk_sel), /* Watermarks */ DEFINEREG2(WM_PIPE_A, hsw_debug_wm_pipe), DEFINEREG2(WM_PIPE_B, hsw_debug_wm_pipe), DEFINEREG2(WM_PIPE_C, hsw_debug_wm_pipe), DEFINEREG2(WM_LP1, hsw_debug_lp_wm), DEFINEREG2(WM_LP2, hsw_debug_lp_wm), DEFINEREG2(WM_LP3, hsw_debug_lp_wm), DEFINEREG(WM_LP1_SPR), DEFINEREG(WM_LP2_SPR), DEFINEREG(WM_LP3_SPR), DEFINEREG(WM_MISC), DEFINEREG(WM_SR_CNT), DEFINEREG(PIPE_WM_LINETIME_A), DEFINEREG(PIPE_WM_LINETIME_B), DEFINEREG(PIPE_WM_LINETIME_C), DEFINEREG(WM_DBG), /* Fuses */ DEFINEREG2(SFUSE_STRAP, hsw_debug_sfuse_strap), /* Pipe A */ DEFINEREG2(PIPEASRC, i830_debug_yxminus1), DEFINEREG2(DSPACNTR, i830_debug_dspcntr), DEFINEREG2(DSPASTRIDE, ironlake_debug_dspstride), DEFINEREG(DSPASURF), DEFINEREG2(DSPATILEOFF, i830_debug_xy), /* Pipe B */ DEFINEREG2(PIPEBSRC, i830_debug_yxminus1), DEFINEREG2(DSPBCNTR, i830_debug_dspcntr), DEFINEREG2(DSPBSTRIDE, ironlake_debug_dspstride), DEFINEREG(DSPBSURF), DEFINEREG2(DSPBTILEOFF, i830_debug_xy), /* Pipe C */ DEFINEREG2(PIPECSRC, i830_debug_yxminus1), DEFINEREG2(DSPCCNTR, i830_debug_dspcntr), DEFINEREG2(DSPCSTRIDE, ironlake_debug_dspstride), DEFINEREG(DSPCSURF), DEFINEREG2(DSPCTILEOFF, i830_debug_xy), /* Transcoder A */ DEFINEREG2(PIPEACONF, i830_debug_pipeconf), DEFINEREG2(HTOTAL_A, i830_debug_hvtotal), DEFINEREG2(HBLANK_A, i830_debug_hvsyncblank), DEFINEREG2(HSYNC_A, i830_debug_hvsyncblank), DEFINEREG2(VTOTAL_A, i830_debug_hvtotal), DEFINEREG2(VBLANK_A, i830_debug_hvsyncblank), DEFINEREG2(VSYNC_A, i830_debug_hvsyncblank), DEFINEREG(VSYNCSHIFT_A), DEFINEREG2(PIPEA_DATA_M1, ironlake_debug_m_tu), DEFINEREG2(PIPEA_DATA_N1, ironlake_debug_n), DEFINEREG2(PIPEA_LINK_M1, ironlake_debug_n), DEFINEREG2(PIPEA_LINK_N1, ironlake_debug_n), /* Transcoder B */ DEFINEREG2(PIPEBCONF, i830_debug_pipeconf), DEFINEREG2(HTOTAL_B, i830_debug_hvtotal), DEFINEREG2(HBLANK_B, i830_debug_hvsyncblank), DEFINEREG2(HSYNC_B, i830_debug_hvsyncblank), DEFINEREG2(VTOTAL_B, i830_debug_hvtotal), DEFINEREG2(VBLANK_B, i830_debug_hvsyncblank), DEFINEREG2(VSYNC_B, i830_debug_hvsyncblank), DEFINEREG(VSYNCSHIFT_B), DEFINEREG2(PIPEB_DATA_M1, ironlake_debug_m_tu), DEFINEREG2(PIPEB_DATA_N1, ironlake_debug_n), DEFINEREG2(PIPEB_LINK_M1, ironlake_debug_n), DEFINEREG2(PIPEB_LINK_N1, ironlake_debug_n), /* Transcoder C */ DEFINEREG2(PIPECCONF, i830_debug_pipeconf), DEFINEREG2(HTOTAL_C, i830_debug_hvtotal), DEFINEREG2(HBLANK_C, i830_debug_hvsyncblank), DEFINEREG2(HSYNC_C, i830_debug_hvsyncblank), DEFINEREG2(VTOTAL_C, i830_debug_hvtotal), DEFINEREG2(VBLANK_C, i830_debug_hvsyncblank), DEFINEREG2(VSYNC_C, i830_debug_hvsyncblank), DEFINEREG(VSYNCSHIFT_C), DEFINEREG2(PIPEC_DATA_M1, ironlake_debug_m_tu), DEFINEREG2(PIPEC_DATA_N1, ironlake_debug_n), DEFINEREG2(PIPEC_LINK_M1, ironlake_debug_n), DEFINEREG2(PIPEC_LINK_N1, ironlake_debug_n), /* Transcoder EDP */ DEFINEREG2(PIPEEDPCONF, i830_debug_pipeconf), DEFINEREG2(HTOTAL_EDP, i830_debug_hvtotal), DEFINEREG2(HBLANK_EDP, i830_debug_hvsyncblank), DEFINEREG2(HSYNC_EDP, i830_debug_hvsyncblank), DEFINEREG2(VTOTAL_EDP, i830_debug_hvtotal), DEFINEREG2(VBLANK_EDP, i830_debug_hvsyncblank), DEFINEREG2(VSYNC_EDP, i830_debug_hvsyncblank), DEFINEREG(VSYNCSHIFT_EDP), DEFINEREG2(PIPEEDP_DATA_M1, ironlake_debug_m_tu), DEFINEREG2(PIPEEDP_DATA_N1, ironlake_debug_n), DEFINEREG2(PIPEEDP_LINK_M1, ironlake_debug_n), DEFINEREG2(PIPEEDP_LINK_N1, ironlake_debug_n), /* Panel fitter */ DEFINEREG2(PFA_CTL_1, ironlake_debug_panel_fitting), DEFINEREG2(PFA_WIN_POS, ironlake_debug_pf_win), DEFINEREG2(PFA_WIN_SIZE, ironlake_debug_pf_win), DEFINEREG2(PFB_CTL_1, ironlake_debug_panel_fitting), DEFINEREG2(PFB_WIN_POS, ironlake_debug_pf_win), DEFINEREG2(PFB_WIN_SIZE, ironlake_debug_pf_win), DEFINEREG2(PFC_CTL_1, ironlake_debug_panel_fitting), DEFINEREG2(PFC_WIN_POS, ironlake_debug_pf_win), DEFINEREG2(PFC_WIN_SIZE, ironlake_debug_pf_win), /* LPT */ DEFINEREG2(TRANS_HTOTAL_A, i830_debug_hvtotal), DEFINEREG2(TRANS_HBLANK_A, i830_debug_hvsyncblank), DEFINEREG2(TRANS_HSYNC_A, i830_debug_hvsyncblank), DEFINEREG2(TRANS_VTOTAL_A, i830_debug_hvtotal), DEFINEREG2(TRANS_VBLANK_A, i830_debug_hvsyncblank), DEFINEREG2(TRANS_VSYNC_A, i830_debug_hvsyncblank), DEFINEREG(TRANS_VSYNCSHIFT_A), DEFINEREG2(TRANSACONF, ironlake_debug_transconf), DEFINEREG2(FDI_RXA_MISC, ironlake_debug_fdi_rx_misc), DEFINEREG(FDI_RXA_TUSIZE1), DEFINEREG(FDI_RXA_IIR), DEFINEREG(FDI_RXA_IMR), DEFINEREG2(BLC_PWM_CPU_CTL2, ilk_debug_blc_pwm_cpu_ctl2), DEFINEREG2(BLC_PWM_CPU_CTL, ilk_debug_blc_pwm_cpu_ctl), DEFINEREG2(BLC_PWM2_CPU_CTL2, ilk_debug_blc_pwm_cpu_ctl2), DEFINEREG2(BLC_PWM2_CPU_CTL, ilk_debug_blc_pwm_cpu_ctl), DEFINEREG2(BLC_MISC_CTL, hsw_debug_blc_misc_ctl), DEFINEREG2(BLC_PWM_PCH_CTL1, ibx_debug_blc_pwm_ctl1), DEFINEREG2(BLC_PWM_PCH_CTL2, ibx_debug_blc_pwm_ctl2), DEFINEREG2(UTIL_PIN_CTL, hsw_debug_util_pin_ctl), DEFINEREG2(PCH_PP_STATUS, i830_debug_pp_status), DEFINEREG2(PCH_PP_CONTROL, ilk_debug_pp_control), DEFINEREG(PCH_PP_ON_DELAYS), DEFINEREG(PCH_PP_OFF_DELAYS), DEFINEREG(PCH_PP_DIVISOR), DEFINEREG(PIXCLK_GATE), DEFINEREG2(SDEISR, hsw_debug_sinterrupt), DEFINEREG(RC6_RESIDENCY_TIME), }; static const struct reg_debug i945gm_mi_regs[] = { DEFINEREG(PGETBL_CTL), DEFINEREG(PGTBL_ER), DEFINEREG(EXCC), DEFINEREG(HWS_PGA), DEFINEREG(IPEIR), DEFINEREG(IPEHR), DEFINEREG(INSTDONE), DEFINEREG(NOP_ID), DEFINEREG(HWSTAM), DEFINEREG(SCPD0), DEFINEREG(IER), DEFINEREG(IIR), DEFINEREG(IMR), DEFINEREG(ISR), DEFINEREG(EIR), DEFINEREG(EMR), DEFINEREG(ESR), DEFINEREG(INST_PM), DEFINEREG(ECOSKPD), }; DEBUGSTRING(gen6_rp_control) { snprintf(result, len, "%s", (val & (1 << 7)) ? "enabled" : "disabled"); } static const struct reg_debug gen6_rp_debug_regs[] = { DEFINEREG2(GEN6_RP_CONTROL, gen6_rp_control), DEFINEREG(GEN6_RPNSWREQ), DEFINEREG(GEN6_RP_DOWN_TIMEOUT), DEFINEREG(GEN6_RP_INTERRUPT_LIMITS), DEFINEREG(GEN6_RP_UP_THRESHOLD), DEFINEREG(GEN6_RP_UP_EI), DEFINEREG(GEN6_RP_DOWN_EI), DEFINEREG(GEN6_RP_IDLE_HYSTERSIS), DEFINEREG(GEN6_RC_STATE), DEFINEREG(GEN6_RC_CONTROL), DEFINEREG(GEN6_RC1_WAKE_RATE_LIMIT), DEFINEREG(GEN6_RC6_WAKE_RATE_LIMIT), DEFINEREG(GEN6_RC_EVALUATION_INTERVAL), DEFINEREG(GEN6_RC_IDLE_HYSTERSIS), DEFINEREG(GEN6_RC_SLEEP), DEFINEREG(GEN6_RC1e_THRESHOLD), DEFINEREG(GEN6_RC6_THRESHOLD), DEFINEREG(GEN6_RC_VIDEO_FREQ), DEFINEREG(GEN6_PMIER), DEFINEREG(GEN6_PMIMR), DEFINEREG(GEN6_PMINTRMSK), }; static bool is_hsw_plus(uint32_t devid, uint32_t pch) { return IS_HASWELL(devid) || intel_gen(devid) >= 8; } static bool is_gen6_plus(uint32_t devid, uint32_t pch) { return intel_gen(devid) >= 6; } static bool is_gen56ivb(uint32_t devid, uint32_t pch) { return IS_GEN5(devid) || IS_GEN6(devid) || IS_IVYBRIDGE(devid); } static bool is_945gm(uint32_t devid, uint32_t pch) { return IS_945GM(devid); } static bool is_gen234(uint32_t devid, uint32_t pch) { return IS_GEN2(devid) || IS_GEN3(devid) || IS_GEN3(devid); } #define DECLARE_REGS(d,r,m) \ { .description = d, .regs = r, .count = ARRAY_SIZE(r), .match = m } static struct { const char *description; const struct reg_debug *regs; bool (*match)(uint32_t devid, uint32_t pch); int count; } known_registers[] = { DECLARE_REGS("Gen2", intel_debug_regs, is_gen234), DECLARE_REGS("i945GM", i945gm_mi_regs, is_945gm), DECLARE_REGS("Gen5", ironlake_debug_regs, is_gen56ivb), DECLARE_REGS("Gen6", gen6_rp_debug_regs, is_gen6_plus), DECLARE_REGS("Gen6+", gen6_fences, is_gen6_plus), DECLARE_REGS("Gen7.5", haswell_debug_regs, is_hsw_plus), }; #undef DECLARE_REGS /* * Decode register value into buffer for devid. * * If devid is 0, decode for all known platforms, with newline after each * decode. */ int intel_reg_spec_decode(char *buf, size_t bufsize, const struct reg *reg, uint32_t val, uint32_t devid) { char tmp[1024]; int i, j; if (!bufsize) return -1; *buf = 0; for (i = 0; i < ARRAY_SIZE(known_registers); i++) { const struct reg_debug *regs = known_registers[i].regs; if (devid) { if (known_registers[i].match && !known_registers[i].match(devid, 0)) continue; } for (j = 0; j < known_registers[i].count; j++) { const struct reg_debug *r = ®s[j]; if (reg->addr != r->reg) continue; if (r->debug_output) r->debug_output(tmp, sizeof(tmp), r->reg, val, devid); else if (devid) return 0; else continue; if (devid) { strncpy(buf, tmp, bufsize); return 0; } strncat(buf, known_registers[i].description, bufsize); strncat(buf, "\t", bufsize); strncat(buf, tmp, bufsize); strncat(buf, "\n", bufsize); } } return 0; } static ssize_t get_regs(struct reg **regs, size_t *nregs, ssize_t index, uint32_t devid) { ssize_t ret = -1; int i, j; if (!devid) return 0; for (i = 0; i < ARRAY_SIZE(known_registers); i++) { if (known_registers[i].match && !known_registers[i].match(devid, 0)) continue; for (j = 0; j < known_registers[i].count; j++) { const struct reg_debug *reg_in = &known_registers[i].regs[j]; struct reg reg; /* XXX: Could be optimized. */ parse_port_desc(®, NULL); reg.name = strdup(reg_in->name); reg.addr = reg_in->reg; if (!*regs || index >= *nregs) { if (!*regs) *nregs = 64; else *nregs *= 2; *regs = recalloc(*regs, *nregs, sizeof(**regs)); if (!*regs) { fprintf(stderr, "Error: %s\n", strerror(ENOMEM)); goto out; } } (*regs)[index++] = reg; } } ret = index; out: return ret; } /* * Get builtin register definitions for devid. */ ssize_t intel_reg_spec_builtin(struct reg **regs, uint32_t devid) { size_t nregs = 0; *regs = NULL; return get_regs(regs, &nregs, 0, devid); } intel-gpu-tools-1.14/tools/intel_infoframes.c0000644000175000017500000010102012665336131016252 00000000000000/* * Copyright © 2012 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. * * Authors: * Paulo Zanoni * */ #include #include #include #include #include #include "intel_io.h" #include "intel_chipset.h" #include "drmtest.h" typedef enum { TRANSC_A = 0, TRANSC_B = 1, TRANSC_C = 2, TRANSC_INVALID } Transcoder; typedef enum { REG_HDMIB_GEN4 = 0x61140, REG_HDMIC_GEN4 = 0x61160, REG_HDMIB_VLV = 0x1e1140, REG_HDMIC_VLV = 0x1e1160, REG_HDMIB_PCH = 0xe1140, REG_HDMIC_PCH = 0xe1150, REG_HDMID_PCH = 0xe1160, REG_DIP_CTL_GEN4 = 0x61170, REG_DIP_CTL_A_VLV = 0x1e0200, REG_DIP_CTL_B_VLV = 0x1e1170, REG_DIP_CTL_A = 0xe0200, REG_DIP_CTL_B = 0xe1200, REG_DIP_CTL_C = 0xe2200, REG_DIP_DATA_GEN4 = 0x61178, REG_DIP_DATA_A_VLV = 0x1e0208, REG_DIP_DATA_B_VLV = 0x1e1174, REG_DIP_DATA_A = 0xe0208, REG_DIP_DATA_B = 0xe1208, REG_DIP_DATA_C = 0xe2208, } Register; typedef enum { DIP_AVI = 0, DIP_VENDOR = 1, DIP_GAMUT = 2, DIP_SPD = 3, DIP_INVALID, } DipType; typedef enum { DIP_FREQ_ONCE = 0, DIP_FREQ_EVERY_VSYNC = 1, DIP_FREQ_EVERY_OTHER_VSYNC = 2, DIP_FREQ_RESERVED = 3, } DipFrequency; typedef enum { SOURCE_DEVICE_UNKNOWN = 0x00, SOURCE_DEVICE_DIGITAL_STB = 0x01, SOURCE_DEVICE_DVD_PLAYER = 0x02, SOURCE_DEVICE_D_VHS = 0x03, SOURCE_DEVICE_HDD_VIDEORECORDER = 0x04, SOURCE_DEVICE_DVC = 0x05, SOURCE_DEVICE_DSC = 0x06, SOURCE_DEVICE_VIDEO_CD = 0x07, SOURCE_DEVICE_GAME = 0x08, SOURCE_DEVICE_PC_GENERAL = 0x09, SOURCE_DEVICE_BLU_RAY_DISK = 0x0a, SOURCE_DEVICE_SUPER_AUDIO_CD = 0x0b, SOURCE_DEVICE_RESERVED = 0x0c } SourceDevice; #define HDMI_PORT_ENABLE (1 << 31) #define HDMI_PORT_TRANSCODER_GEN4 (1 << 30) #define HDMI_PORT_TRANSCODER_IBX (1 << 30) #define HDMI_PORT_TRANSCODER_CPT (3 << 29) #define HDMI_PORT_ENCODING (3 << 10) #define HDMI_PORT_MODE (1 << 9) #define HDMI_PORT_AUDIO (1 << 6) #define HDMI_PORT_DETECTED (1 << 2) #define DIP_CTL_ENABLE (1 << 31) #define DIP_CTL_GCP_ENABLE (1 << 25) #define DIP_CTL_SPD_ENABLE (1 << 24) #define DIP_CTL_GAMUT_ENABLE (1 << 23) #define DIP_CTL_VENDOR_ENABLE (1 << 22) #define DIP_CTL_AVI_ENABLE (1 << 21) #define DIP_CTL_BUFFER_INDEX (3 << 19) #define DIP_CTL_BUFFER_AVI (0 << 19) #define DIP_CTL_BUFFER_VENDOR (1 << 19) #define DIP_CTL_BUFFER_GAMUT (2 << 19) #define DIP_CTL_BUFFER_SPD (3 << 19) #define DIP_CTL_FREQUENCY (3 << 16) #define DIP_CTL_FREQ_ONCE (0 << 16) #define DIP_CTL_FREQ_EVERY (1 << 16) #define DIP_CTL_FREQ_EVERY_OTHER (2 << 16) #define DIP_CTL_BUFFER_SIZE (15 << 8) #define DIP_CTL_ACCESS_ADDR (15 << 0) #define DIP_CTL_PORT_SEL_MASK_GEN4 (3 << 29) #define DIP_CTL_PORT_SEL_B_GEN4 (1 << 29) #define DIP_CTL_PORT_SEL_C_GEN4 (2 << 29) #define DIP_CTL_BUFFER_TRANS_ACTIVE_GEN4 (1 << 28) #define AVI_INFOFRAME_TYPE 0x82 #define AVI_INFOFRAME_VERSION 0x02 #define AVI_INFOFRAME_LENGTH 0x0d #define SPD_INFOFRAME_TYPE 0x83 #define SPD_INFOFRAME_VERSION 0x01 #define SPD_INFOFRAME_LENGTH 0x19 #define VENDOR_ID_HDMI 0x000c03 typedef struct { uint8_t type; uint8_t version; uint8_t length; uint8_t ecc; } DipInfoFrameHeader; typedef union { struct { DipInfoFrameHeader header; uint8_t checksum; uint8_t S :2; uint8_t B :2; uint8_t A :1; uint8_t Y :2; uint8_t Rsvd0 :1; uint8_t R :4; uint8_t M :2; uint8_t C :2; uint8_t SC :2; uint8_t Q :2; uint8_t EC :3; uint8_t ITC :1; uint8_t VIC :7; uint8_t Rsvd1 :1; uint8_t PR :4; uint8_t Rsvd2 :4; uint16_t top; uint16_t bottom; uint16_t left; uint16_t right; uint16_t Rsvd3; uint32_t Rsvd4[3]; } avi; struct { DipInfoFrameHeader header; uint8_t checksum; uint8_t vendor[8]; uint8_t description[16]; uint8_t source; } __attribute__((packed)) spd; struct { DipInfoFrameHeader header; uint8_t checksum; uint8_t id[3]; uint8_t Rsvd0 :5; uint8_t video_format :3; union { uint8_t vic; struct { uint8_t Rsvd1 :4; uint8_t s3d_structure :4; } s3d; } pb5; uint8_t Rsvd2 :4; uint8_t s3d_ext_data :4; } __attribute__((packed)) vendor; struct { DipInfoFrameHeader header; uint8_t body[27]; } generic; uint8_t data8[128]; uint32_t data32[16]; } DipInfoFrame; Register vlv_hdmi_ports[] = { REG_HDMIB_VLV, REG_HDMIC_VLV, }; Register vlv_dip_ctl_regs[] = { REG_DIP_CTL_A_VLV, REG_DIP_CTL_B_VLV, }; Register vlv_dip_data_regs[] = { REG_DIP_DATA_A_VLV, REG_DIP_DATA_B_VLV, }; Register gen4_hdmi_ports[] = { REG_HDMIB_GEN4, REG_HDMIC_GEN4, }; Register pch_hdmi_ports[] = { REG_HDMIB_PCH, REG_HDMIC_PCH, REG_HDMID_PCH }; Register pch_dip_ctl_regs[] = { REG_DIP_CTL_A, REG_DIP_CTL_B, REG_DIP_CTL_C }; Register pch_dip_data_regs[] = { REG_DIP_DATA_A, REG_DIP_DATA_B, REG_DIP_DATA_C }; const char *hdmi_port_names[] = { "HDMIB", "HDMIC", "HDMID" }; const char *transcoder_names[] = { "A", "B", "C" }; const char *dip_frequency_names[] = { "once", "every vsync", "every other vsync", "reserved (invalid)" }; struct pci_device *pci_dev; int gen = 0; static const char *spd_source_to_string(SourceDevice source) { switch (source) { case SOURCE_DEVICE_UNKNOWN: return "unknown"; case SOURCE_DEVICE_DIGITAL_STB: return "digital stb"; case SOURCE_DEVICE_DVD_PLAYER: return "dvd player"; case SOURCE_DEVICE_D_VHS: return "d vhs"; case SOURCE_DEVICE_HDD_VIDEORECORDER: return "hdd videorecorder"; case SOURCE_DEVICE_DVC: return "dvc"; case SOURCE_DEVICE_DSC: return "dsc"; case SOURCE_DEVICE_VIDEO_CD: return "video cd"; case SOURCE_DEVICE_GAME: return "game"; case SOURCE_DEVICE_PC_GENERAL: return "pc general"; case SOURCE_DEVICE_BLU_RAY_DISK: return "blu-ray disk"; case SOURCE_DEVICE_SUPER_AUDIO_CD: return "super audio cd"; default: return "reserved"; } } static Register get_dip_ctl_reg(Transcoder transcoder) { if (IS_VALLEYVIEW(pci_dev->device_id)) return vlv_dip_ctl_regs[transcoder]; else if (gen == 4) return REG_DIP_CTL_GEN4; else return pch_dip_ctl_regs[transcoder]; } static Register get_dip_data_reg(Transcoder transcoder) { if (IS_VALLEYVIEW(pci_dev->device_id)) return vlv_dip_data_regs[transcoder]; else if (gen == 4) return REG_DIP_DATA_GEN4; else return pch_dip_data_regs[transcoder]; } static Register get_hdmi_port(int hdmi_port_index) { if (IS_VALLEYVIEW(pci_dev->device_id)) return vlv_hdmi_ports[hdmi_port_index]; else if (gen == 4) { assert(hdmi_port_index < 2); return gen4_hdmi_ports[hdmi_port_index]; } else { return pch_hdmi_ports[hdmi_port_index]; } } static void load_infoframe(Transcoder transcoder, DipInfoFrame *frame, DipType type) { Register ctl_reg = get_dip_ctl_reg(transcoder); Register data_reg = get_dip_data_reg(transcoder); uint32_t ctl_val; uint32_t i; ctl_val = INREG(ctl_reg); ctl_val &= ~DIP_CTL_BUFFER_INDEX; ctl_val |= type << 19; OUTREG(ctl_reg, ctl_val); ctl_val = INREG(ctl_reg); ctl_val &= ~DIP_CTL_ACCESS_ADDR; OUTREG(ctl_reg, ctl_val); for (i = 0; i < 16; i++) { ctl_val = INREG(ctl_reg); assert((ctl_val & DIP_CTL_ACCESS_ADDR) == i); frame->data32[i] = INREG(data_reg); } } static int infoframe_valid_checksum(DipInfoFrame *frame) { int i; int length = frame->generic.header.length; uint8_t csum; csum = frame->generic.header.type + frame->generic.header.version + frame->generic.header.length; /* no ecc */ for (i = 0; i < length + 1; i++) csum += frame->generic.body[i]; return (csum == 0); } static void infoframe_fix_checksum(DipInfoFrame *frame) { int i; int length = frame->generic.header.length; uint8_t csum; csum = frame->generic.header.type + frame->generic.header.version + frame->generic.header.length; /* no ecc */ /* Length does not include the header field nor the checksum */ for (i = 1; i < length + 1; i++) csum += frame->generic.body[i]; frame->generic.body[0] = 0x100 - csum; } static void dump_port_info(int hdmi_port_index) { Register port = get_hdmi_port(hdmi_port_index); uint32_t val = INREG(port); Transcoder transcoder; printf("\nPort %s:\n", hdmi_port_names[hdmi_port_index]); printf("- %sdetected\n", val & HDMI_PORT_DETECTED ? "" : "not "); printf("- %s\n", val & HDMI_PORT_ENABLE ? "enabled" : "disabled"); if (!(val & HDMI_PORT_ENABLE)) return; if (gen == 4 || IS_VALLEYVIEW(pci_dev->device_id)) transcoder = (val & HDMI_PORT_TRANSCODER_GEN4) >> 30; else if (intel_pch >= PCH_CPT) transcoder = (val & HDMI_PORT_TRANSCODER_CPT) >> 29; else transcoder = (val & HDMI_PORT_TRANSCODER_IBX) >> 30; printf("- transcoder: %s\n", transcoder_names[transcoder]); switch ((val & HDMI_PORT_ENCODING) >> 10) { case 0: printf("- mode: SDVO\n"); break; case 2: printf("- mode: TMDS\n"); break; default: printf("- mode: INVALID!\n"); } printf("- mode: %s\n", val & HDMI_PORT_MODE ? "HDMI" : "DVI"); printf("- audio: %s\n", val & HDMI_PORT_AUDIO ? "enabled" : "disabled"); } static void dump_raw_infoframe(DipInfoFrame *frame) { unsigned int i; printf("- raw:"); for (i = 0; i < 16; i++) { if (i % 4 == 0) printf("\n "); printf(" %08x", frame->data32[i]); } printf("\n"); } static void dump_avi_info(Transcoder transcoder) { Register reg = get_dip_ctl_reg(transcoder); uint32_t val; DipFrequency freq; DipInfoFrame frame; load_infoframe(transcoder, &frame, DIP_AVI); val = INREG(reg); printf("AVI InfoFrame:\n"); if (gen == 4) { printf("- %sbeing transmitted\n", val & DIP_CTL_BUFFER_TRANS_ACTIVE_GEN4 ? "" : "not "); } freq = (val & DIP_CTL_FREQUENCY) >> 16; printf("- frequency: %s\n", dip_frequency_names[freq]); dump_raw_infoframe(&frame); printf("- type: %x, version: %x, length: %x, ecc: %x, checksum: %x\n", frame.avi.header.type, frame.avi.header.version, frame.avi.header.length, frame.avi.header.ecc, frame.avi.checksum); printf("- S: %x, B: %x, A: %x, Y: %x, Rsvd0: %x\n", frame.avi.S, frame.avi.B, frame.avi.A, frame.avi.Y, frame.avi.Rsvd0); printf("- R: %x, M: %x, C: %x\n", frame.avi.R, frame.avi.M, frame.avi.C); printf("- SC: %x, Q: %x, EC: %x, ITC: %x\n", frame.avi.SC, frame.avi.Q, frame.avi.EC, frame.avi.ITC); printf("- VIC: %d, Rsvd1: %x\n", frame.avi.VIC, frame.avi.Rsvd1); printf("- PR: %x, Rsvd2: %x\n", frame.avi.PR, frame.avi.Rsvd2); printf("- top: %x, bottom: %x, left: %x, right: %x\n", frame.avi.top, frame.avi.bottom, frame.avi.left, frame.avi.right); printf("- Rsvd3: %x, Rsvd4[0]: %x, Rsvd4[1]: %x, Rsvd4[2]: %x\n", frame.avi.Rsvd3, frame.avi.Rsvd4[0], frame.avi.Rsvd4[1], frame.avi.Rsvd4[2]); if (!infoframe_valid_checksum(&frame)) printf("Invalid InfoFrame checksum!\n"); } static const char *vendor_id_to_string(uint32_t id) { switch (id) { case VENDOR_ID_HDMI: return "HDMI"; default: return "Unknown"; } } static const char *s3d_structure_to_string(int format) { switch (format) { case 0: return "Frame Packing"; case 6: return "Top Bottom"; case 8: return "Side By Side (half)"; default: return "Reserved"; } } static void dump_vendor_hdmi(DipInfoFrame *frame) { int vic_present = frame->vendor.video_format & 0x1; int s3d_present = frame->vendor.video_format & 0x2; printf("- video format: 0x%03x %s\n", frame->vendor.video_format, s3d_present ? "(3D)" : ""); if (vic_present && s3d_present) { printf("Error: HDMI VIC and S3D bits set. Only one of those " " at a time is valid\n"); return; } if (vic_present) printf("- HDMI VIC: %d\n", frame->vendor.pb5.vic); else if (s3d_present) { int s3d_structure = frame->vendor.pb5.s3d.s3d_structure; printf("- 3D Format: %s\n", s3d_structure_to_string(s3d_structure)); /* Side-by-side (half) */ if (s3d_structure >= 8) printf("- 3D Ext Data 0x%x\n", frame->vendor.s3d_ext_data); } } static void dump_vendor_info(Transcoder transcoder) { Register reg = get_dip_ctl_reg(transcoder); uint32_t val, vendor_id; DipFrequency freq; DipInfoFrame frame; load_infoframe(transcoder, &frame, DIP_VENDOR); val = INREG(reg); printf("Vendor InfoFrame:\n"); if (gen == 4) { printf("- %sbeing transmitted\n", val & DIP_CTL_BUFFER_TRANS_ACTIVE_GEN4 ? "" : "not "); } freq = (val & DIP_CTL_FREQUENCY) >> 16; printf("- frequency: %s\n", dip_frequency_names[freq]); dump_raw_infoframe(&frame); vendor_id = frame.vendor.id[2] << 16 | frame.vendor.id[1] << 8 | frame.vendor.id[0]; printf("- vendor Id: 0x%06x (%s)\n", vendor_id, vendor_id_to_string(vendor_id)); if (vendor_id == VENDOR_ID_HDMI) dump_vendor_hdmi(&frame); if (!infoframe_valid_checksum(&frame)) printf("Invalid InfoFrame checksum!\n"); } static void dump_gamut_info(Transcoder transcoder) { Register reg = get_dip_ctl_reg(transcoder); uint32_t val; DipFrequency freq; DipInfoFrame frame; load_infoframe(transcoder, &frame, DIP_GAMUT); val = INREG(reg); printf("Gamut InfoFrame:\n"); if (gen == 4) { printf("- %sbeing transmitted\n", val & DIP_CTL_BUFFER_TRANS_ACTIVE_GEN4 ? "" : "not "); } freq = (val & DIP_CTL_FREQUENCY) >> 16; printf("- frequency: %s\n", dip_frequency_names[freq]); dump_raw_infoframe(&frame); if (!infoframe_valid_checksum(&frame)) printf("Invalid InfoFrame checksum!\n"); } static void dump_spd_info(Transcoder transcoder) { Register reg = get_dip_ctl_reg(transcoder); uint32_t val; DipFrequency freq; DipInfoFrame frame; char vendor[9]; char description[17]; load_infoframe(transcoder, &frame, DIP_SPD); val = INREG(reg); printf("SPD InfoFrame:\n"); if (gen == 4) { printf("- %sbeing transmitted\n", val & DIP_CTL_BUFFER_TRANS_ACTIVE_GEN4 ? "" : "not "); } freq = (val & DIP_CTL_FREQUENCY) >> 16; printf("- frequency: %s\n", dip_frequency_names[freq]); dump_raw_infoframe(&frame); printf("- type: %x, version: %x, length: %x, ecc: %x, checksum: %x\n", frame.spd.header.type, frame.spd.header.version, frame.spd.header.length, frame.spd.header.ecc, frame.spd.checksum); memcpy(vendor, frame.spd.vendor, 8); vendor[8] = '\0'; memcpy(description, frame.spd.description, 16); description[16] = '\0'; printf("- vendor: %s\n", vendor); printf("- description: %s\n", description); printf("- source: %s\n", spd_source_to_string(frame.spd.source)); if (!infoframe_valid_checksum(&frame)) printf("Invalid InfoFrame checksum!\n"); } static void dump_transcoder_info(Transcoder transcoder) { Register reg = get_dip_ctl_reg(transcoder); uint32_t val = INREG(reg); if (gen == 4) { printf("\nDIP information:\n"); switch (val & DIP_CTL_PORT_SEL_MASK_GEN4) { case DIP_CTL_PORT_SEL_B_GEN4: printf("- port B\n"); break; case DIP_CTL_PORT_SEL_C_GEN4: printf("- port C\n"); break; default: printf("- INVALID port!\n"); } } else { printf("\nTranscoder %s:\n", transcoder_names[transcoder]); } printf("- %s\n", val & DIP_CTL_ENABLE ? "enabled" : "disabled"); if (!(val & DIP_CTL_ENABLE)) return; printf("- GCP: %s\n", val & DIP_CTL_GCP_ENABLE ? "enabled" : "disabled"); if (val & DIP_CTL_AVI_ENABLE) dump_avi_info(transcoder); if (val & DIP_CTL_VENDOR_ENABLE) dump_vendor_info(transcoder); if (val & DIP_CTL_GAMUT_ENABLE) dump_gamut_info(transcoder); if (val & DIP_CTL_SPD_ENABLE) dump_spd_info(transcoder); } static void dump_all_info(void) { unsigned int i; if (IS_VALLEYVIEW(pci_dev->device_id)) { for (i = 0; i < ARRAY_SIZE(vlv_hdmi_ports); i++) dump_port_info(i); for (i = 0; i < ARRAY_SIZE(vlv_dip_ctl_regs); i++) dump_transcoder_info(i); } else if (gen == 4) { for (i = 0; i < ARRAY_SIZE(gen4_hdmi_ports); i++) dump_port_info(i); dump_transcoder_info(0); } else { for (i = 0; i < ARRAY_SIZE(pch_hdmi_ports); i++) dump_port_info(i); for (i = 0; i < ARRAY_SIZE(pch_dip_ctl_regs); i++) dump_transcoder_info(i); } } static void write_infoframe(Transcoder transcoder, DipType type, DipInfoFrame *frame) { Register ctl_reg = get_dip_ctl_reg(transcoder); Register data_reg = get_dip_data_reg(transcoder); uint32_t ctl_val; unsigned int i; ctl_val = INREG(ctl_reg); ctl_val &= ~DIP_CTL_BUFFER_INDEX; ctl_val |= (type << 19); ctl_val &= ~DIP_CTL_ACCESS_ADDR; OUTREG(ctl_reg, ctl_val); for (i = 0; i < 8; i++) { ctl_val = INREG(ctl_reg); assert((ctl_val & DIP_CTL_ACCESS_ADDR) == i); OUTREG(data_reg, frame->data32[i]); } } static void disable_infoframe(Transcoder transcoder, DipType type) { Register reg = get_dip_ctl_reg(transcoder); uint32_t val = INREG(reg); if (gen != 4 && type == DIP_AVI) val &= ~DIP_CTL_ENABLE; val &= ~(1 << (21 + type)); OUTREG(reg, val); } static void enable_infoframe(Transcoder transcoder, DipType type) { Register reg = get_dip_ctl_reg(transcoder); uint32_t val = INREG(reg); if (gen != 4 && type == DIP_AVI) val |= DIP_CTL_ENABLE; val |= (1 << (21 + type)); OUTREG(reg, val); } static int parse_infoframe_option_u(const char *name, const char *s, uint32_t min, uint32_t max, uint32_t *value, char **commands) { int read, rc; if (!strcmp(name, s)) { rc = sscanf(*commands, "%x%n", value, &read); *commands = &(*commands)[read]; if (rc != 1) { printf("Invalid value.\n"); return 0; } if (*value < min || *value > max) { printf("Value outside allowed range.\n"); return 0; } return 1; } return 0; } static int parse_infoframe_option_s(const char *name, const char *s, int min_size, int max_size, char *value, char **commands) { int size, read, rc; if (!strcmp(name, s)) { rc = sscanf(*commands, "%31s%n", value, &read); *commands = &(*commands)[read]; if (rc != 1) { printf("Invalid value.\n"); return 0; } size = strlen(value); if (size < min_size || size > max_size) { printf("String either too big or too small.\n"); return 0; } return 1; } return 0; } static void change_avi_infoframe(Transcoder transcoder, char *commands) { Register reg = get_dip_ctl_reg(transcoder); uint32_t val; DipInfoFrame frame; char option[32]; uint32_t option_val; int rc, read; char *current = commands; load_infoframe(transcoder, &frame, DIP_AVI); val = INREG(reg); while (1) { rc = sscanf(current, "%31s%n", option, &read); current = ¤t[read]; if (rc == EOF) { break; } else if (rc != 1) { printf("Invalid option: %s\n", option); continue; } if (parse_infoframe_option_u("S", option, 0, 2, &option_val, ¤t)) frame.avi.S = option_val; else if (parse_infoframe_option_u("B", option, 0, 3, &option_val, ¤t)) frame.avi.B = option_val; else if (parse_infoframe_option_u("A", option, 0, 1, &option_val, ¤t)) frame.avi.A = option_val; else if (parse_infoframe_option_u("Y", option, 0, 2, &option_val, ¤t)) frame.avi.Y = option_val; else if (parse_infoframe_option_u("R", option, 0, 15, &option_val, ¤t)) frame.avi.R = option_val; else if (parse_infoframe_option_u("M", option, 0, 2, &option_val, ¤t)) frame.avi.M = option_val; else if (parse_infoframe_option_u("C", option, 0, 3, &option_val, ¤t)) frame.avi.C = option_val; else if (parse_infoframe_option_u("SC", option, 0, 3, &option_val, ¤t)) frame.avi.SC = option_val; else if (parse_infoframe_option_u("Q", option, 0, 2, &option_val, ¤t)) frame.avi.Q = option_val; else if (parse_infoframe_option_u("EC", option, 0, 1, &option_val,¤t)) frame.avi.EC = option_val; else if (parse_infoframe_option_u("ITC", option, 0, 1, &option_val, ¤t)) frame.avi.ITC = option_val; else if (parse_infoframe_option_u("VIC", option, 0, 127, &option_val, ¤t)) frame.avi.VIC = option_val; else if (parse_infoframe_option_u("PR", option, 0, 15, &option_val, ¤t)) frame.avi.PR = option_val; else if (parse_infoframe_option_u("top", option, 0, 65535, &option_val, ¤t)) frame.avi.top = option_val; else if (parse_infoframe_option_u("bottom", option, 0, 65535, &option_val, ¤t)) frame.avi.bottom = option_val; else if (parse_infoframe_option_u("left", option, 0, 65535, &option_val, ¤t)) frame.avi.left = option_val; else if (parse_infoframe_option_u("right", option, 0, 65535, &option_val, ¤t)) frame.avi.right = option_val; else printf("Unrecognized option: %s\n", option); } val &= ~DIP_CTL_FREQUENCY; val |= DIP_CTL_FREQ_EVERY; OUTREG(reg, val); frame.avi.header.type = AVI_INFOFRAME_TYPE; frame.avi.header.version = AVI_INFOFRAME_VERSION; frame.avi.header.length = AVI_INFOFRAME_LENGTH; frame.avi.Rsvd0 = 0; frame.avi.Rsvd1 = 0; frame.avi.Rsvd2 = 0; frame.avi.Rsvd3 = 0; frame.avi.Rsvd4[0] = 0; frame.avi.Rsvd4[1] = 0; frame.avi.Rsvd4[2] = 0; infoframe_fix_checksum(&frame); disable_infoframe(transcoder, DIP_AVI); write_infoframe(transcoder, DIP_AVI, &frame); enable_infoframe(transcoder, DIP_AVI); } static void change_spd_infoframe(Transcoder transcoder, char *commands) { Register reg = get_dip_ctl_reg(transcoder); uint32_t val; DipInfoFrame frame; char option[16]; char option_val_s[32]; uint32_t option_val_i; int rc, read; char *current = commands; load_infoframe(transcoder, &frame, DIP_SPD); val = INREG(reg); while (1) { rc = sscanf(current, "%15s%n", option, &read); current = ¤t[read]; if (rc == EOF) { break; } else if (rc != 1) { printf("Invalid option: %s\n", option); continue; } memset(option_val_s, 0, 32); if (parse_infoframe_option_s("vendor", option, 0, 8, option_val_s, ¤t)) memcpy(frame.spd.vendor, option_val_s, 8); else if (parse_infoframe_option_s("description", option, 0, 16, option_val_s, ¤t)) memcpy(frame.spd.description, option_val_s, 16); else if (parse_infoframe_option_u("source", option, 0, 0x0c, &option_val_i, ¤t)) frame.spd.source = option_val_i; else printf("Unrecognized option: %s\n", option); } val &= ~DIP_CTL_FREQUENCY; val |= DIP_CTL_FREQ_EVERY_OTHER; OUTREG(reg, val); frame.spd.header.type = SPD_INFOFRAME_TYPE; frame.spd.header.version = SPD_INFOFRAME_VERSION; frame.spd.header.length = SPD_INFOFRAME_LENGTH; infoframe_fix_checksum(&frame); disable_infoframe(transcoder, DIP_SPD); write_infoframe(transcoder, DIP_SPD, &frame); enable_infoframe(transcoder, DIP_SPD); } static void change_infoframe_checksum(Transcoder transcoder, DipType type, uint32_t selected_csum) { DipInfoFrame frame; load_infoframe(transcoder, &frame, type); frame.generic.body[0] = selected_csum; disable_infoframe(transcoder, type); write_infoframe(transcoder, type, &frame); enable_infoframe(transcoder, type); } static void change_infoframe_frequency(Transcoder transcoder, DipType type, DipFrequency frequency) { Register reg = get_dip_ctl_reg(transcoder); uint32_t val = INREG(reg); if (type == DIP_AVI && frequency != DIP_FREQ_EVERY_VSYNC) { printf("Error: AVI infoframe must be sent every VSync!\n"); frequency = DIP_FREQ_EVERY_VSYNC; } val &= ~DIP_CTL_FREQUENCY; val |= (frequency << 16); OUTREG(reg, val); } static void disable_dip(Transcoder transcoder) { Register reg = get_dip_ctl_reg(transcoder); uint32_t val = INREG(reg); val &= ~DIP_CTL_ENABLE; OUTREG(reg, val); } static void enable_dip(Transcoder transcoder) { Register reg = get_dip_ctl_reg(transcoder); uint32_t val = INREG(reg); val |= DIP_CTL_ENABLE; OUTREG(reg, val); } static void disable_hdmi_port(Register reg) { uint32_t val = INREG(reg); val &= ~HDMI_PORT_ENABLE; OUTREG(reg, val); } static void enable_hdmi_port(Register reg) { uint32_t val = INREG(reg); val |= HDMI_PORT_ENABLE; OUTREG(reg, val); } static void print_usage(void) { printf("Options:\n" " -d, --dump\n" " dump information about all transcoders\n" " -c, --change-fields [fields]\n" " change infoframe fields from selected transcoder\n" " -k, --change-checksum [checksum]\n" " change infoframe checksum (value in hex)\n" " -q, --change-frequency [frequency]\n" " change infoframe frequency (once, everyvsync or everyothervsync)\n" " -n, --disable\n" " disable the selected infoframe from the selected transcoder\n" " -N, --enable\n" " enable the selected infoframe from the selected transcoder\n" " -x, --disable-infoframes\n" " disable all infoframes from selected transcoder\n" " -X, --enable-infoframes\n" " enable sending infoframes on the selected transcoder\n" " -p, --disable-hdmi-port [port]\n" " disable hdmi port on the selected transcoder (B, C or D)\n" " -P, --enable-hdmi-port [port]\n" " enable hdmi port on the selected transcoder (B, C or D)\n" " -t, --transcoder\n" " select transcoder (A, B or C)\n" " -f, --infoframe\n" " select infoframe (AVI, Vendor, Gamut or SPD)\n" " -h, --help\n" " prints this message\n" "\n" "Examples:\n" "\n" " Dump information:\n" " intel_infoframes\n" "\n" " Disable overscan and set ITC on transcoder B:\n" " intel_infoframes -t B -f AVI -c 'S 2 ITC 1'\n" "\n" " Many actions on the same command:\n" " - enable overscan on transcoder A\n" " - enable overscan and change description on transcoder B\n" " - disable all infoframes on transcoder C\n" " - dump the resulting state:\n" " intel_infoframes -t A -f AVI -c 'S 1' \\\n" " -t B -f AVI -c 'S 2' \\\n" " -f SPD -c 'description Linux' \\\n" " -t C --disable-infoframes \\\n" " -d\n" "\n" " Even more:\n" " - print the help message\n" " - completely disable all infoframes on all transcoders\n" " - dump the state" " - enable sending infoframes on transcoder B, but disable all infoframes\n" " - enable AVI infoframes transcoder B, use underscan and declare ITC\n" " - also enable SPD infoframes on the same transcoder, change frequency to\n" " every vsync and change vendor, description and source\n" " - dump the state again\n" " intel_infoframes -h \\\n" " -t A -x -t B -x -t C -x \\\n" " -d \\\n" " -t A -X -f AVI -n -f Vendor -n \\\n" " -f Gamut -n -f SPD -n \\\n" " -f AVI -N -c 'S 2 ITC 1'\\\n" " -f SPD -q everyvsync \\\n" " -c 'vendor me description mine source 0x09' \\\n" " -d\n" "\n" "Infoframe fields used by the --change-fields option:\n" " - AVI infoframe fields:\n" " S B A Y R M C SC Q EC ITC VIC PR top bottom left right\n" " - SPD infoframe fields:\n" " vendor description source\n" " - Other infoframe fields are not implemented yet.\n"); } #define CHECK_TRANSCODER(transcoder) \ if (transcoder == TRANSC_INVALID) { \ printf("Transcoder not selected.\n"); \ ret = 1; \ goto out; \ } #define CHECK_DIP(dip) \ if (dip == DIP_INVALID) { \ printf("Infoframe not selected.\n"); \ ret = 1; \ goto out; \ } int main(int argc, char *argv[]) { int opt; int ret = 0; Transcoder transcoder = TRANSC_INVALID; DipType dip = DIP_INVALID; Register hdmi_port; char short_opts[] = "dc:k:q:nNxXp:P:t:f:h"; struct option long_opts[] = { { "dump", no_argument, NULL, 'd' }, { "change-fields", required_argument, NULL, 'c' }, { "change-checksum", required_argument, NULL, 'k' }, { "change-frequency", required_argument, NULL, 'q' }, { "disable", no_argument, NULL, 'n' }, { "enable", no_argument, NULL, 'N' }, { "disable-infoframes", no_argument, NULL, 'x' }, { "enable-infoframes", no_argument, NULL, 'X' }, { "disable-hdmi-port", required_argument, NULL, 'p' }, { "enable-hdmi-port", required_argument, NULL, 'P' }, { "transcoder" , required_argument, NULL, 't' }, { "infoframe", required_argument, NULL, 'f' }, { "help", no_argument, NULL, 'h' }, { 0 } }; printf("WARNING: This is just a debugging tool! Don't expect it to work" " perfectly: the Kernel might undo our changes.\n"); pci_dev = intel_get_pci_device(); intel_register_access_init(pci_dev, 0); intel_check_pch(); if (IS_GEN4(pci_dev->device_id)) gen = 4; else if (IS_GEN5(pci_dev->device_id)) gen = 5; else if (IS_GEN6(pci_dev->device_id)) gen = 6; else if (IS_GEN7(pci_dev->device_id)) gen = 7; else { printf("This program does not support your hardware yet.\n"); ret = 1; goto out; } while (1) { opt = getopt_long(argc, argv, short_opts, long_opts, NULL); if (opt == -1) break; switch (opt) { case 'd': dump_all_info(); break; case 'c': if (transcoder == TRANSC_INVALID) { printf("Transcoder not selected.\n"); ret = 1; goto out; } switch (dip) { case DIP_AVI: change_avi_infoframe(transcoder, optarg); break; case DIP_VENDOR: case DIP_GAMUT: printf("Option not implemented yet.\n"); ret = 1; goto out; case DIP_SPD: change_spd_infoframe(transcoder, optarg); break; case DIP_INVALID: printf("Infoframe not selected.\n"); ret = 1; goto out; } break; case 'k': CHECK_TRANSCODER(transcoder); CHECK_DIP(dip); change_infoframe_checksum(transcoder, dip, atoi(optarg)); break; case 'q': CHECK_TRANSCODER(transcoder); CHECK_DIP(dip); if (!strcmp(optarg, "once")) change_infoframe_frequency(transcoder, dip, DIP_FREQ_ONCE); else if (!strcmp(optarg, "everyvsync")) change_infoframe_frequency(transcoder, dip, DIP_FREQ_EVERY_VSYNC); else if (!strcmp(optarg, "everyothervsync")) change_infoframe_frequency(transcoder, dip, DIP_FREQ_EVERY_OTHER_VSYNC); else { printf("Invalid frequency.\n"); ret = 1; goto out; } break; case 'n': CHECK_TRANSCODER(transcoder); CHECK_DIP(dip); disable_infoframe(transcoder, dip); break; case 'N': CHECK_TRANSCODER(transcoder); CHECK_DIP(dip); enable_infoframe(transcoder, dip); break; case 'x': CHECK_TRANSCODER(transcoder); disable_dip(transcoder); break; case 'X': CHECK_TRANSCODER(transcoder); enable_dip(transcoder); break; case 'p': case 'P': if (!strcmp(optarg, "B")) hdmi_port = get_hdmi_port(0); else if (!strcmp(optarg, "C")) hdmi_port = get_hdmi_port(1); else if (!strcmp(optarg, "D")) hdmi_port = get_hdmi_port(2); else { printf("Invalid HDMI port.\n"); ret = 1; goto out; } if (opt == 'p') disable_hdmi_port(hdmi_port); else enable_hdmi_port(hdmi_port); break; case 't': if (!strcmp(optarg, "A")) transcoder = TRANSC_A; else if (!strcmp(optarg, "B")) transcoder = TRANSC_B; else if (intel_pch >= PCH_CPT && !strcmp(optarg, "C")) { transcoder = TRANSC_C; } else { printf("Invalid transcoder.\n"); ret = 1; goto out; } break; case 'f': if (!strcmp(optarg, "AVI")) dip = DIP_AVI; else if (!strcmp(optarg, "Vendor")) dip = DIP_VENDOR; else if (!strcmp(optarg, "Gamut")) dip = DIP_GAMUT; else if (!strcmp(optarg, "SPD")) dip = DIP_SPD; else { printf("Invalid infoframe.\n"); ret = 1; goto out; } break; case 'h': print_usage(); break; default: print_usage(); ret = 1; goto out; } } out: intel_register_access_fini(); return ret; } intel-gpu-tools-1.14/tools/intel_residency.c0000644000175000017500000003667312665336131016133 00000000000000/* * Copyright © 2016 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: Paulo Zanoni * */ #include #include #include #include #include #include #include #include #include "igt.h" #define IA32_TIME_STAMP_COUNTER 0x10 #define MSR_PKG_CST_CONFIG_CONTROL 0xE2 #define PKG_CST_LIMIT_MASK 0x7 #define PKG_CST_LIMIT_C0 0x0 #define PKG_CST_LIMIT_C2 0x1 #define PKG_CST_LIMIT_C3 0x2 #define PKG_CST_LIMIT_C6 0x3 #define PKG_CST_LIMIT_C7 0x4 #define PKG_CST_LIMIT_C7s 0x5 #define PKG_CST_NO_LIMIT 0x7 #define MSR_PKG_C2_RESIDENCY 0x60D #define MSR_PKG_C3_RESIDENCY 0x3F8 #define MSR_PKG_C6_RESIDENCY 0x3F9 #define MSR_PKG_C7_RESIDENCY 0x3FA #define MSR_PKG_C8_RESIDENCY 0x630 #define MSR_PKG_C9_RESIDENCY 0x631 #define MSR_PKG_C10_RESIDENCY 0x632 #define NUM_PC_STATES 7 const char *res_msr_names[] = { "PC2", "PC3", "PC6", "PC7", "PC8", "PC9", "PC10" }; const uint32_t res_msr_addrs[] = { MSR_PKG_C2_RESIDENCY, MSR_PKG_C3_RESIDENCY, MSR_PKG_C6_RESIDENCY, MSR_PKG_C7_RESIDENCY, MSR_PKG_C8_RESIDENCY, MSR_PKG_C9_RESIDENCY, MSR_PKG_C10_RESIDENCY, }; int msr_fd; uint32_t deepest_pc_state; uint64_t idle_res; #define MAX_CONNECTORS 32 #define MAX_PLANES 32 struct { int fd; drmModeResPtr res; drmModeConnectorPtr connectors[MAX_CONNECTORS]; drm_intel_bufmgr *bufmgr; } drm; struct { uint32_t crtc_id; uint32_t connector_id; drmModeModeInfoPtr mode; } modeset; int vblank_interval_us; struct igt_fb fbs[2], cursor, *front_fb, *back_fb; struct { int draw_size; bool do_page_flip; bool do_draw; bool do_draw_and_flip; int res_warm_time; int res_calc_time; int loop_inc; char *test_name; } opts = { .draw_size = 0, .do_page_flip = true, .do_draw = true, .do_draw_and_flip = true, .res_warm_time = 1, .res_calc_time = 4, .loop_inc = 2, .test_name = NULL, }; static uint64_t msr_read(uint32_t addr) { int rc; uint64_t ret; rc = pread(msr_fd, &ret, sizeof(uint64_t), addr); igt_assert(rc == sizeof(ret)); return ret; } static void setup_msr(void) { #if 0 uint64_t control; const char *limit; #endif /* Make sure our Kernel supports MSR and the module is loaded. */ igt_assert(system("modprobe -q msr > /dev/null 2>&1") != -1); msr_fd = open("/dev/cpu/0/msr", O_RDONLY); igt_assert_f(msr_fd >= 0, "Can't open /dev/cpu/0/msr.\n"); #if 0 /* FIXME: why is this code not printing the truth? */ control = msr_read(MSR_PKG_CST_CONFIG_CONTROL); printf("Control: 0x016%" PRIx64 "\n", control); switch (control & PKG_CST_LIMIT_MASK) { case PKG_CST_LIMIT_C0: limit = "C0"; break; case PKG_CST_LIMIT_C2: limit = "C2"; break; case PKG_CST_LIMIT_C3: limit = "C3"; break; case PKG_CST_LIMIT_C6: limit = "C6"; break; case PKG_CST_LIMIT_C7: limit = "C7"; break; case PKG_CST_LIMIT_C7s: limit = "C7s"; break; case PKG_CST_NO_LIMIT: limit = "no limit"; break; default: limit = "unknown"; break; } printf("Package C state limit: %s\n", limit); #endif } static void teardown_msr(void) { close(msr_fd); } static void setup_drm(void) { int i; drm.fd = drm_open_driver_master(DRIVER_INTEL); drm.res = drmModeGetResources(drm.fd); igt_assert(drm.res->count_connectors <= MAX_CONNECTORS); for (i = 0; i < drm.res->count_connectors; i++) drm.connectors[i] = drmModeGetConnector(drm.fd, drm.res->connectors[i]); drm.bufmgr = drm_intel_bufmgr_gem_init(drm.fd, 4096); igt_assert(drm.bufmgr); drm_intel_bufmgr_gem_enable_reuse(drm.bufmgr); } static void teardown_drm(void) { int i; drm_intel_bufmgr_destroy(drm.bufmgr); for (i = 0; i < drm.res->count_connectors; i++) drmModeFreeConnector(drm.connectors[i]); drmModeFreeResources(drm.res); close(drm.fd); } static void draw_rect(struct igt_fb *fb, enum igt_draw_method method, uint32_t color) { drmModeClip clip; int rc; switch (opts.draw_size) { case 0: clip.x1 = fb->width / 2 - 32; clip.x2 = fb->width / 2 + 32; clip.y1 = fb->height / 2 - 32; clip.y2 = fb->height / 2 + 32; break; case 1: clip.x1 = fb->width / 4; clip.x2 = fb->width / 4 + fb->width / 2; clip.y1 = fb->height / 4; clip.y2 = fb->height / 4 + fb->height / 2; break; case 2: clip.x1 = 0; clip.x2 = fb->width; clip.y1 = 0; clip.y2 = fb->height; break; default: igt_assert(false); } igt_draw_rect_fb(drm.fd, drm.bufmgr, NULL, fb, method, clip.x1, clip.y1, clip.x2 - clip.x1, clip.y2 - clip.y1, color); if (method == IGT_DRAW_MMAP_WC) { rc = drmModeDirtyFB(drm.fd, fb->fb_id, &clip, 1); igt_assert(rc == 0 || rc == -ENOSYS); } } static void setup_modeset(void) { int i; for (i = 0; i < drm.res->count_connectors; i++) { drmModeConnectorPtr c = drm.connectors[i]; if (c->connection == DRM_MODE_CONNECTED && c->count_modes > 0) { modeset.connector_id = c->connector_id; modeset.mode = &c->modes[0]; break; } } igt_assert(i < drm.res->count_connectors); modeset.crtc_id = drm.res->crtcs[0]; for (i = 0; i < 2; i++) { igt_create_fb(drm.fd, modeset.mode->hdisplay, modeset.mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_I915_FORMAT_MOD_X_TILED, &fbs[i]); igt_draw_fill_fb(drm.fd, &fbs[i], 0x80); } draw_rect(&fbs[1], IGT_DRAW_BLT, 0x800000); igt_create_fb(drm.fd, 64, 64, DRM_FORMAT_ARGB8888, LOCAL_DRM_FORMAT_MOD_NONE, &cursor); igt_draw_fill_fb(drm.fd, &cursor, 0xFF008000); } static void teardown_modeset(void) { igt_remove_fb(drm.fd, &fbs[0]); igt_remove_fb(drm.fd, &fbs[1]); igt_remove_fb(drm.fd, &cursor); } static void setup_vblank_interval(void) { uint64_t vrefresh, interval; vrefresh = ((uint64_t) modeset.mode->clock * 1000 * 1000) / (modeset.mode->htotal * modeset.mode->vtotal); interval = 1000000000 / vrefresh; vblank_interval_us = interval; printf("Interval between vblanks:\t%dus\n", vblank_interval_us); } bool alarm_received; static void alarm_handler(int signal) { alarm_received = true; } static void setup_alarm(void) { struct sigaction sa; sa.sa_handler = alarm_handler; sigemptyset(&sa.sa_mask); sa.sa_flags = 0; sigaction(SIGALRM, &sa, NULL); } static void set_alarm(time_t sec, suseconds_t usec) { struct itimerval timerval = {{0, 0}, {sec, usec}}; alarm_received = false; igt_assert(setitimer(ITIMER_REAL, &timerval, NULL) == 0); } static void unset_mode(void) { int rc; kmstest_unset_all_crtcs(drm.fd, drm.res); rc = drmModeSetCursor(drm.fd, modeset.crtc_id, 0, 0, 0); igt_assert(rc == 0); } static void set_mode(void) { int rc; front_fb = &fbs[0]; back_fb = &fbs[1]; rc = drmModeSetCrtc(drm.fd, modeset.crtc_id, front_fb->fb_id, 0, 0, &modeset.connector_id, 1, modeset.mode); igt_assert(rc == 0); /* TODO: it seems we need a cursor in order to reach PC7 on BDW. Why? */ rc = drmModeMoveCursor(drm.fd, modeset.crtc_id, 0, 0); igt_assert(rc == 0); rc = drmModeSetCursor(drm.fd, modeset.crtc_id, cursor.gem_handle, cursor.width, cursor.height); igt_assert(rc == 0); } static void wait_vblanks(int n_vblanks) { drmVBlank vblank; if (!n_vblanks) return; vblank.request.type = DRM_VBLANK_RELATIVE; vblank.request.sequence = n_vblanks; vblank.request.signal = 0; drmWaitVBlank(drm.fd, &vblank); } static void page_flip(void) { struct igt_fb *tmp_fb; int rc; rc = drmModePageFlip(drm.fd, modeset.crtc_id, back_fb->fb_id, 0, NULL); igt_assert(rc == 0); tmp_fb = front_fb; front_fb = back_fb; back_fb = tmp_fb; } static void wait_until_idle(void) { uint64_t tsc, pc, res; do { set_alarm(0, 500 * 1000); tsc = msr_read(IA32_TIME_STAMP_COUNTER); pc = msr_read(deepest_pc_state); while (!alarm_received) pause(); pc = msr_read(deepest_pc_state) - pc; tsc = msr_read(IA32_TIME_STAMP_COUNTER) - tsc; res = pc * 100 / tsc; /*printf("res:%02"PRIu64"\n", res);*/ } while (res < idle_res && idle_res - res > 3); if (res > idle_res && res - idle_res > 3) fprintf(stderr, "The calculated idle residency may be too low " "(got %02"PRIu64"%%)\n", res); } static uint64_t do_measurement(void (*callback)(void *ptr), void *ptr) { uint64_t tsc, pc; wait_until_idle(); set_alarm(opts.res_warm_time, 0); callback(ptr); set_alarm(opts.res_calc_time, 0); tsc = msr_read(IA32_TIME_STAMP_COUNTER); pc = msr_read(deepest_pc_state); callback(ptr); pc = msr_read(deepest_pc_state) - pc; tsc = msr_read(IA32_TIME_STAMP_COUNTER) - tsc; return pc * 100 / tsc; } static void setup_idle(void) { uint64_t tsc, pc[NUM_PC_STATES], res, best_res; int pc_i, best_pc_i = 0, retries, consecutive_not_best; for (retries = 0; ; retries++) { set_alarm(opts.res_warm_time, 0); while (!alarm_received) pause(); set_alarm(opts.res_calc_time, 0); tsc = msr_read(IA32_TIME_STAMP_COUNTER); for (pc_i = best_pc_i; pc_i < NUM_PC_STATES; pc_i++) pc[pc_i] = msr_read(res_msr_addrs[pc_i]); while (!alarm_received) pause(); for (pc_i = best_pc_i; pc_i < NUM_PC_STATES; pc_i++) pc[pc_i] = msr_read(res_msr_addrs[pc_i]) - pc[pc_i]; tsc = msr_read(IA32_TIME_STAMP_COUNTER) - tsc; for (pc_i = NUM_PC_STATES -1; pc_i >= best_pc_i; pc_i--) if (pc[pc_i] != 0) break; igt_require_f(pc_i >= 0, "We're not reaching any PC states!\n"); res = pc[pc_i] * 100 / tsc; if (retries == 0 || pc_i > best_pc_i || res > best_res) { best_pc_i = pc_i; best_res = res; consecutive_not_best = 0; } else { consecutive_not_best++; if (consecutive_not_best > 2) break; } } deepest_pc_state = res_msr_addrs[best_pc_i]; idle_res = best_res; printf("Stable idle residency retries:\t%d\n", retries); printf("Deepest PC state reached when idle:\t%s\n", res_msr_names[best_pc_i]); printf("Idle residency for this state:\t%02"PRIu64"%%\n", idle_res); } static void print_result(int ops, int vblanks, uint64_t res) { printf("- %02d ops every %02d vblanks:\t%02"PRIu64"%%\n", ops, vblanks, res); fflush(stdout); } struct page_flip_data { int n_vblanks; }; static void page_flip_cb(void *ptr) { struct page_flip_data *data = ptr; while (!alarm_received) { page_flip(); wait_vblanks(data->n_vblanks); } } static void page_flip_test(void) { struct page_flip_data data; int n_vblanks; uint64_t res; printf("\nPage flip test:\n"); for (n_vblanks = 1; n_vblanks <= 64; n_vblanks *= opts.loop_inc) { data.n_vblanks = n_vblanks; res = do_measurement(page_flip_cb, &data); print_result(1, n_vblanks, res); } } struct draw_data { enum igt_draw_method method; int n_vblanks; int ops_per_vblank; }; static void draw_cb(void *ptr) { struct draw_data *data = ptr; struct timespec req; int i, ops; req.tv_sec = 0; req.tv_nsec = vblank_interval_us * 1000 / data->ops_per_vblank; for (i = 0; !alarm_received; i++) { for (ops = 0; ops < data->ops_per_vblank; ops++) { draw_rect(front_fb, data->method, i << 8); /* The code that stops the callbacks relies on SIGALRM, * so we have to use nanosleep since it doesn't use * signals. */ if (data->ops_per_vblank > 1) nanosleep(&req, NULL); } if (data->n_vblanks) wait_vblanks(data->n_vblanks); } } static void draw_test(void) { struct draw_data data; enum igt_draw_method method; int i; uint64_t res; for (method = 0; method < IGT_DRAW_METHOD_COUNT; method++) { data.method = method; printf("\nDraw %s test:\n", igt_draw_get_method_name(method)); data.n_vblanks = 0; for (i = 32; i >= 2; i /= opts.loop_inc) { data.ops_per_vblank = i; res = do_measurement(draw_cb, &data); print_result(i, 1, res); } data.ops_per_vblank = 1; for (i = 1; i <= 64; i *= opts.loop_inc) { data.n_vblanks = i ; res = do_measurement(draw_cb, &data); print_result(1, i, res); } } } static void draw_and_flip_cb(void *ptr) { struct draw_data *data = ptr; int i, ops; for (i = 0; !alarm_received; i++) { for (ops = 0; ops < data->ops_per_vblank; ops++) draw_rect(back_fb, data->method, i << 8); page_flip(); wait_vblanks(1); } } static void draw_and_flip_test(void) { struct draw_data data; enum igt_draw_method method; int i; uint64_t res; for (method = 0; method < IGT_DRAW_METHOD_COUNT; method++) { data.method = method; /* Doing everything consumes too much time! */ if (method != IGT_DRAW_MMAP_CPU && method != IGT_DRAW_BLT) continue; printf("\nDraw and flip %s test:\n", igt_draw_get_method_name(method)); for (i = 16; i >= 1; i /= opts.loop_inc) { data.ops_per_vblank = 1; res = do_measurement(draw_and_flip_cb, &data); print_result(i, 1, res); } } } static void parse_opts(int argc, char *argv[]) { int opt; char short_opts[] = "d:lrbw:c:i:fsn:"; struct option long_opts[] = { { "draw-size", required_argument, NULL, 'd'}, { "no-flip", no_argument, NULL, 'l'}, { "no-draw", no_argument, NULL, 'r'}, { "no-draw-and-flip", no_argument, NULL, 'b'}, { "warm-time", required_argument, NULL, 'w'}, { "calc-time", required_argument, NULL, 'c'}, { "loop-increment", required_argument, NULL, 'i'}, { "fast", no_argument, NULL, 'f'}, { "slow", no_argument, NULL, 's'}, { "name", required_argument, NULL, 'n'}, { 0 }, }; while (1) { opt = getopt_long(argc, argv, short_opts, long_opts, NULL); switch (opt) { case 'd': if (strcmp(optarg, "s") == 0) opts.draw_size = 0; else if (strcmp(optarg, "m") == 0) opts.draw_size = 1; else if (strcmp(optarg, "l") == 0) opts.draw_size = 2; else igt_assert(false); break; case 'l': opts.do_page_flip = false; break; case 'r': opts.do_draw = false; break; case 'b': opts.do_draw_and_flip = false; break; case 'w': opts.res_warm_time = atoi(optarg); break; case 'c': opts.res_calc_time = atoi(optarg); break; case 'i': opts.loop_inc = atoi(optarg); break; case 'f': opts.res_warm_time = 1; opts.res_calc_time = 2; opts.loop_inc = 4; break; case 's': opts.res_warm_time = 2; opts.res_calc_time = 6; opts.loop_inc = 2; break; case 'n': opts.test_name = optarg; break; case -1: return; default: igt_assert(false); } } } int main(int argc, char *argv[]) { parse_opts(argc, argv); setup_msr(); setup_drm(); setup_modeset(); setup_vblank_interval(); setup_alarm(); printf("Test name:\t%s\n", opts.test_name); unset_mode(); set_mode(); setup_idle(); if (opts.do_page_flip) page_flip_test(); if (opts.do_draw) draw_test(); if (opts.do_draw_and_flip) draw_and_flip_test(); teardown_modeset(); teardown_drm(); teardown_msr(); return 0; } intel-gpu-tools-1.14/assembler/0000755000175000017500000000000012665337377013502 500000000000000intel-gpu-tools-1.14/assembler/gram.h0000644000175000017500000002453312665336502014515 00000000000000/* A Bison parser, made by GNU Bison 3.0.4. */ /* Bison interface for Yacc-like parsers in C Copyright (C) 1984, 1989-1990, 2000-2015 Free Software Foundation, Inc. This program is free software: you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation, either version 3 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program. If not, see . */ /* As a special exception, you may create a larger work that contains part or all of the Bison parser skeleton and distribute that work under terms of your choice, so long as that work isn't itself a parser generator using the skeleton or a modified version thereof as a parser skeleton. Alternatively, if you modify or redistribute the parser skeleton itself, you may (at your option) remove this special exception, which will cause the skeleton and the resulting Bison output files to be licensed under the GNU General Public License without this special exception. This special exception was added by the Free Software Foundation in version 2.2 of Bison. */ #ifndef YY_YY_GRAM_H_INCLUDED # define YY_YY_GRAM_H_INCLUDED /* Debug traces. */ #ifndef YYDEBUG # define YYDEBUG 0 #endif #if YYDEBUG extern int yydebug; #endif /* Token type. */ #ifndef YYTOKENTYPE # define YYTOKENTYPE enum yytokentype { COLON = 258, SEMICOLON = 259, LPAREN = 260, RPAREN = 261, LANGLE = 262, RANGLE = 263, LCURLY = 264, RCURLY = 265, LSQUARE = 266, RSQUARE = 267, COMMA = 268, EQ = 269, ABS = 270, DOT = 271, PLUS = 272, MINUS = 273, MULTIPLY = 274, DIVIDE = 275, TYPE_UD = 276, TYPE_D = 277, TYPE_UW = 278, TYPE_W = 279, TYPE_UB = 280, TYPE_B = 281, TYPE_VF = 282, TYPE_HF = 283, TYPE_V = 284, TYPE_F = 285, ALIGN1 = 286, ALIGN16 = 287, SECHALF = 288, COMPR = 289, SWITCH = 290, ATOMIC = 291, NODDCHK = 292, NODDCLR = 293, MASK_DISABLE = 294, BREAKPOINT = 295, ACCWRCTRL = 296, EOT = 297, SEQ = 298, ANY2H = 299, ALL2H = 300, ANY4H = 301, ALL4H = 302, ANY8H = 303, ALL8H = 304, ANY16H = 305, ALL16H = 306, ANYV = 307, ALLV = 308, ZERO = 309, EQUAL = 310, NOT_ZERO = 311, NOT_EQUAL = 312, GREATER = 313, GREATER_EQUAL = 314, LESS = 315, LESS_EQUAL = 316, ROUND_INCREMENT = 317, OVERFLOW = 318, UNORDERED = 319, GENREG = 320, MSGREG = 321, ADDRESSREG = 322, ACCREG = 323, FLAGREG = 324, MASKREG = 325, AMASK = 326, IMASK = 327, LMASK = 328, CMASK = 329, MASKSTACKREG = 330, LMS = 331, IMS = 332, MASKSTACKDEPTHREG = 333, IMSD = 334, LMSD = 335, NOTIFYREG = 336, STATEREG = 337, CONTROLREG = 338, IPREG = 339, GENREGFILE = 340, MSGREGFILE = 341, MOV = 342, FRC = 343, RNDU = 344, RNDD = 345, RNDE = 346, RNDZ = 347, NOT = 348, LZD = 349, MUL = 350, MAC = 351, MACH = 352, LINE = 353, SAD2 = 354, SADA2 = 355, DP4 = 356, DPH = 357, DP3 = 358, DP2 = 359, AVG = 360, ADD = 361, SEL = 362, AND = 363, OR = 364, XOR = 365, SHR = 366, SHL = 367, ASR = 368, CMP = 369, CMPN = 370, PLN = 371, ADDC = 372, BFI1 = 373, BFREV = 374, CBIT = 375, F16TO32 = 376, F32TO16 = 377, FBH = 378, FBL = 379, SEND = 380, SENDC = 381, NOP = 382, JMPI = 383, IF = 384, IFF = 385, WHILE = 386, ELSE = 387, BREAK = 388, CONT = 389, HALT = 390, MSAVE = 391, PUSH = 392, MREST = 393, POP = 394, WAIT = 395, DO = 396, ENDIF = 397, ILLEGAL = 398, MATH_INST = 399, MAD = 400, LRP = 401, BFE = 402, BFI2 = 403, SUBB = 404, CALL = 405, RET = 406, BRD = 407, BRC = 408, NULL_TOKEN = 409, MATH = 410, SAMPLER = 411, GATEWAY = 412, READ = 413, WRITE = 414, URB = 415, THREAD_SPAWNER = 416, VME = 417, DATA_PORT = 418, CRE = 419, MSGLEN = 420, RETURNLEN = 421, ALLOCATE = 422, USED = 423, COMPLETE = 424, TRANSPOSE = 425, INTERLEAVE = 426, SATURATE = 427, INTEGER = 428, STRING = 429, NUMBER = 430, INV = 431, LOG = 432, EXP = 433, SQRT = 434, RSQ = 435, POW = 436, SIN = 437, COS = 438, SINCOS = 439, INTDIV = 440, INTMOD = 441, INTDIVMOD = 442, SIGNED = 443, SCALAR = 444, X = 445, Y = 446, Z = 447, W = 448, KERNEL_PRAGMA = 449, END_KERNEL_PRAGMA = 450, CODE_PRAGMA = 451, END_CODE_PRAGMA = 452, REG_COUNT_PAYLOAD_PRAGMA = 453, REG_COUNT_TOTAL_PRAGMA = 454, DECLARE_PRAGMA = 455, BASE = 456, ELEMENTSIZE = 457, SRCREGION = 458, DSTREGION = 459, TYPE = 460, DEFAULT_EXEC_SIZE_PRAGMA = 461, DEFAULT_REG_TYPE_PRAGMA = 462, SUBREGNUM = 463, SNDOPR = 464, UMINUS = 465, STR_SYMBOL_REG = 466, EMPTEXECSIZE = 467 }; #endif /* Tokens. */ #define COLON 258 #define SEMICOLON 259 #define LPAREN 260 #define RPAREN 261 #define LANGLE 262 #define RANGLE 263 #define LCURLY 264 #define RCURLY 265 #define LSQUARE 266 #define RSQUARE 267 #define COMMA 268 #define EQ 269 #define ABS 270 #define DOT 271 #define PLUS 272 #define MINUS 273 #define MULTIPLY 274 #define DIVIDE 275 #define TYPE_UD 276 #define TYPE_D 277 #define TYPE_UW 278 #define TYPE_W 279 #define TYPE_UB 280 #define TYPE_B 281 #define TYPE_VF 282 #define TYPE_HF 283 #define TYPE_V 284 #define TYPE_F 285 #define ALIGN1 286 #define ALIGN16 287 #define SECHALF 288 #define COMPR 289 #define SWITCH 290 #define ATOMIC 291 #define NODDCHK 292 #define NODDCLR 293 #define MASK_DISABLE 294 #define BREAKPOINT 295 #define ACCWRCTRL 296 #define EOT 297 #define SEQ 298 #define ANY2H 299 #define ALL2H 300 #define ANY4H 301 #define ALL4H 302 #define ANY8H 303 #define ALL8H 304 #define ANY16H 305 #define ALL16H 306 #define ANYV 307 #define ALLV 308 #define ZERO 309 #define EQUAL 310 #define NOT_ZERO 311 #define NOT_EQUAL 312 #define GREATER 313 #define GREATER_EQUAL 314 #define LESS 315 #define LESS_EQUAL 316 #define ROUND_INCREMENT 317 #define OVERFLOW 318 #define UNORDERED 319 #define GENREG 320 #define MSGREG 321 #define ADDRESSREG 322 #define ACCREG 323 #define FLAGREG 324 #define MASKREG 325 #define AMASK 326 #define IMASK 327 #define LMASK 328 #define CMASK 329 #define MASKSTACKREG 330 #define LMS 331 #define IMS 332 #define MASKSTACKDEPTHREG 333 #define IMSD 334 #define LMSD 335 #define NOTIFYREG 336 #define STATEREG 337 #define CONTROLREG 338 #define IPREG 339 #define GENREGFILE 340 #define MSGREGFILE 341 #define MOV 342 #define FRC 343 #define RNDU 344 #define RNDD 345 #define RNDE 346 #define RNDZ 347 #define NOT 348 #define LZD 349 #define MUL 350 #define MAC 351 #define MACH 352 #define LINE 353 #define SAD2 354 #define SADA2 355 #define DP4 356 #define DPH 357 #define DP3 358 #define DP2 359 #define AVG 360 #define ADD 361 #define SEL 362 #define AND 363 #define OR 364 #define XOR 365 #define SHR 366 #define SHL 367 #define ASR 368 #define CMP 369 #define CMPN 370 #define PLN 371 #define ADDC 372 #define BFI1 373 #define BFREV 374 #define CBIT 375 #define F16TO32 376 #define F32TO16 377 #define FBH 378 #define FBL 379 #define SEND 380 #define SENDC 381 #define NOP 382 #define JMPI 383 #define IF 384 #define IFF 385 #define WHILE 386 #define ELSE 387 #define BREAK 388 #define CONT 389 #define HALT 390 #define MSAVE 391 #define PUSH 392 #define MREST 393 #define POP 394 #define WAIT 395 #define DO 396 #define ENDIF 397 #define ILLEGAL 398 #define MATH_INST 399 #define MAD 400 #define LRP 401 #define BFE 402 #define BFI2 403 #define SUBB 404 #define CALL 405 #define RET 406 #define BRD 407 #define BRC 408 #define NULL_TOKEN 409 #define MATH 410 #define SAMPLER 411 #define GATEWAY 412 #define READ 413 #define WRITE 414 #define URB 415 #define THREAD_SPAWNER 416 #define VME 417 #define DATA_PORT 418 #define CRE 419 #define MSGLEN 420 #define RETURNLEN 421 #define ALLOCATE 422 #define USED 423 #define COMPLETE 424 #define TRANSPOSE 425 #define INTERLEAVE 426 #define SATURATE 427 #define INTEGER 428 #define STRING 429 #define NUMBER 430 #define INV 431 #define LOG 432 #define EXP 433 #define SQRT 434 #define RSQ 435 #define POW 436 #define SIN 437 #define COS 438 #define SINCOS 439 #define INTDIV 440 #define INTMOD 441 #define INTDIVMOD 442 #define SIGNED 443 #define SCALAR 444 #define X 445 #define Y 446 #define Z 447 #define W 448 #define KERNEL_PRAGMA 449 #define END_KERNEL_PRAGMA 450 #define CODE_PRAGMA 451 #define END_CODE_PRAGMA 452 #define REG_COUNT_PAYLOAD_PRAGMA 453 #define REG_COUNT_TOTAL_PRAGMA 454 #define DECLARE_PRAGMA 455 #define BASE 456 #define ELEMENTSIZE 457 #define SRCREGION 458 #define DSTREGION 459 #define TYPE 460 #define DEFAULT_EXEC_SIZE_PRAGMA 461 #define DEFAULT_REG_TYPE_PRAGMA 462 #define SUBREGNUM 463 #define SNDOPR 464 #define UMINUS 465 #define STR_SYMBOL_REG 466 #define EMPTEXECSIZE 467 /* Value type. */ #if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED union YYSTYPE { #line 437 "gram.y" /* yacc.c:1909 */ char *string; int integer; double number; struct brw_program_instruction instruction; struct brw_program program; struct region region; struct regtype regtype; struct brw_reg reg; struct condition condition; struct predicate predicate; struct options options; struct declared_register symbol_reg; imm32_t imm32; struct src_operand src_operand; #line 496 "gram.h" /* yacc.c:1909 */ }; typedef union YYSTYPE YYSTYPE; # define YYSTYPE_IS_TRIVIAL 1 # define YYSTYPE_IS_DECLARED 1 #endif /* Location type. */ #if ! defined YYLTYPE && ! defined YYLTYPE_IS_DECLARED typedef struct YYLTYPE YYLTYPE; struct YYLTYPE { int first_line; int first_column; int last_line; int last_column; }; # define YYLTYPE_IS_DECLARED 1 # define YYLTYPE_IS_TRIVIAL 1 #endif extern YYSTYPE yylval; extern YYLTYPE yylloc; int yyparse (void); #endif /* !YY_YY_GRAM_H_INCLUDED */ intel-gpu-tools-1.14/assembler/brw_defines.h0000644000175000017500000020347512665336131016060 00000000000000/* Copyright (C) Intel Corp. 2006. All Rights Reserved. Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to develop this 3D driver. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **********************************************************************/ /* * Authors: * Keith Whitwell */ #define INTEL_MASK(high, low) (((1<<((high)-(low)+1))-1)<<(low)) #define SET_FIELD(value, field) (((value) << field ## _SHIFT) & field ## _MASK) #define GET_FIELD(word, field) (((word) & field ## _MASK) >> field ## _SHIFT) #ifndef BRW_DEFINES_H #define BRW_DEFINES_H /* 3D state: */ #define PIPE_CONTROL_NOWRITE 0x00 #define PIPE_CONTROL_WRITEIMMEDIATE 0x01 #define PIPE_CONTROL_WRITEDEPTH 0x02 #define PIPE_CONTROL_WRITETIMESTAMP 0x03 #define PIPE_CONTROL_GTTWRITE_PROCESS_LOCAL 0x00 #define PIPE_CONTROL_GTTWRITE_GLOBAL 0x01 #define CMD_3D_PRIM 0x7b00 /* 3DPRIMITIVE */ /* DW0 */ # define GEN4_3DPRIM_TOPOLOGY_TYPE_SHIFT 10 # define GEN4_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL (0 << 15) # define GEN4_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM (1 << 15) /* DW1 */ # define GEN7_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL (0 << 8) # define GEN7_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM (1 << 8) #define _3DPRIM_POINTLIST 0x01 #define _3DPRIM_LINELIST 0x02 #define _3DPRIM_LINESTRIP 0x03 #define _3DPRIM_TRILIST 0x04 #define _3DPRIM_TRISTRIP 0x05 #define _3DPRIM_TRIFAN 0x06 #define _3DPRIM_QUADLIST 0x07 #define _3DPRIM_QUADSTRIP 0x08 #define _3DPRIM_LINELIST_ADJ 0x09 #define _3DPRIM_LINESTRIP_ADJ 0x0A #define _3DPRIM_TRILIST_ADJ 0x0B #define _3DPRIM_TRISTRIP_ADJ 0x0C #define _3DPRIM_TRISTRIP_REVERSE 0x0D #define _3DPRIM_POLYGON 0x0E #define _3DPRIM_RECTLIST 0x0F #define _3DPRIM_LINELOOP 0x10 #define _3DPRIM_POINTLIST_BF 0x11 #define _3DPRIM_LINESTRIP_CONT 0x12 #define _3DPRIM_LINESTRIP_BF 0x13 #define _3DPRIM_LINESTRIP_CONT_BF 0x14 #define _3DPRIM_TRIFAN_NOSTIPPLE 0x15 #define BRW_ANISORATIO_2 0 #define BRW_ANISORATIO_4 1 #define BRW_ANISORATIO_6 2 #define BRW_ANISORATIO_8 3 #define BRW_ANISORATIO_10 4 #define BRW_ANISORATIO_12 5 #define BRW_ANISORATIO_14 6 #define BRW_ANISORATIO_16 7 #define BRW_BLENDFACTOR_ONE 0x1 #define BRW_BLENDFACTOR_SRC_COLOR 0x2 #define BRW_BLENDFACTOR_SRC_ALPHA 0x3 #define BRW_BLENDFACTOR_DST_ALPHA 0x4 #define BRW_BLENDFACTOR_DST_COLOR 0x5 #define BRW_BLENDFACTOR_SRC_ALPHA_SATURATE 0x6 #define BRW_BLENDFACTOR_CONST_COLOR 0x7 #define BRW_BLENDFACTOR_CONST_ALPHA 0x8 #define BRW_BLENDFACTOR_SRC1_COLOR 0x9 #define BRW_BLENDFACTOR_SRC1_ALPHA 0x0A #define BRW_BLENDFACTOR_ZERO 0x11 #define BRW_BLENDFACTOR_INV_SRC_COLOR 0x12 #define BRW_BLENDFACTOR_INV_SRC_ALPHA 0x13 #define BRW_BLENDFACTOR_INV_DST_ALPHA 0x14 #define BRW_BLENDFACTOR_INV_DST_COLOR 0x15 #define BRW_BLENDFACTOR_INV_CONST_COLOR 0x17 #define BRW_BLENDFACTOR_INV_CONST_ALPHA 0x18 #define BRW_BLENDFACTOR_INV_SRC1_COLOR 0x19 #define BRW_BLENDFACTOR_INV_SRC1_ALPHA 0x1A #define BRW_BLENDFUNCTION_ADD 0 #define BRW_BLENDFUNCTION_SUBTRACT 1 #define BRW_BLENDFUNCTION_REVERSE_SUBTRACT 2 #define BRW_BLENDFUNCTION_MIN 3 #define BRW_BLENDFUNCTION_MAX 4 #define BRW_ALPHATEST_FORMAT_UNORM8 0 #define BRW_ALPHATEST_FORMAT_FLOAT32 1 #define BRW_CHROMAKEY_KILL_ON_ANY_MATCH 0 #define BRW_CHROMAKEY_REPLACE_BLACK 1 #define BRW_CLIP_API_OGL 0 #define BRW_CLIP_API_DX 1 #define BRW_CLIPMODE_NORMAL 0 #define BRW_CLIPMODE_CLIP_ALL 1 #define BRW_CLIPMODE_CLIP_NON_REJECTED 2 #define BRW_CLIPMODE_REJECT_ALL 3 #define BRW_CLIPMODE_ACCEPT_ALL 4 #define BRW_CLIPMODE_KERNEL_CLIP 5 #define BRW_CLIP_NDCSPACE 0 #define BRW_CLIP_SCREENSPACE 1 #define BRW_COMPAREFUNCTION_ALWAYS 0 #define BRW_COMPAREFUNCTION_NEVER 1 #define BRW_COMPAREFUNCTION_LESS 2 #define BRW_COMPAREFUNCTION_EQUAL 3 #define BRW_COMPAREFUNCTION_LEQUAL 4 #define BRW_COMPAREFUNCTION_GREATER 5 #define BRW_COMPAREFUNCTION_NOTEQUAL 6 #define BRW_COMPAREFUNCTION_GEQUAL 7 #define BRW_COVERAGE_PIXELS_HALF 0 #define BRW_COVERAGE_PIXELS_1 1 #define BRW_COVERAGE_PIXELS_2 2 #define BRW_COVERAGE_PIXELS_4 3 #define BRW_CULLMODE_BOTH 0 #define BRW_CULLMODE_NONE 1 #define BRW_CULLMODE_FRONT 2 #define BRW_CULLMODE_BACK 3 #define BRW_DEFAULTCOLOR_R8G8B8A8_UNORM 0 #define BRW_DEFAULTCOLOR_R32G32B32A32_FLOAT 1 #define BRW_DEPTHFORMAT_D32_FLOAT_S8X24_UINT 0 #define BRW_DEPTHFORMAT_D32_FLOAT 1 #define BRW_DEPTHFORMAT_D24_UNORM_S8_UINT 2 #define BRW_DEPTHFORMAT_D24_UNORM_X8_UINT 3 /* GEN5 */ #define BRW_DEPTHFORMAT_D16_UNORM 5 #define BRW_FLOATING_POINT_IEEE_754 0 #define BRW_FLOATING_POINT_NON_IEEE_754 1 #define BRW_FRONTWINDING_CW 0 #define BRW_FRONTWINDING_CCW 1 #define BRW_SPRITE_POINT_ENABLE 16 #define BRW_CUT_INDEX_ENABLE (1 << 10) #define BRW_INDEX_BYTE 0 #define BRW_INDEX_WORD 1 #define BRW_INDEX_DWORD 2 #define BRW_LOGICOPFUNCTION_CLEAR 0 #define BRW_LOGICOPFUNCTION_NOR 1 #define BRW_LOGICOPFUNCTION_AND_INVERTED 2 #define BRW_LOGICOPFUNCTION_COPY_INVERTED 3 #define BRW_LOGICOPFUNCTION_AND_REVERSE 4 #define BRW_LOGICOPFUNCTION_INVERT 5 #define BRW_LOGICOPFUNCTION_XOR 6 #define BRW_LOGICOPFUNCTION_NAND 7 #define BRW_LOGICOPFUNCTION_AND 8 #define BRW_LOGICOPFUNCTION_EQUIV 9 #define BRW_LOGICOPFUNCTION_NOOP 10 #define BRW_LOGICOPFUNCTION_OR_INVERTED 11 #define BRW_LOGICOPFUNCTION_COPY 12 #define BRW_LOGICOPFUNCTION_OR_REVERSE 13 #define BRW_LOGICOPFUNCTION_OR 14 #define BRW_LOGICOPFUNCTION_SET 15 #define BRW_MAPFILTER_NEAREST 0x0 #define BRW_MAPFILTER_LINEAR 0x1 #define BRW_MAPFILTER_ANISOTROPIC 0x2 #define BRW_MIPFILTER_NONE 0 #define BRW_MIPFILTER_NEAREST 1 #define BRW_MIPFILTER_LINEAR 3 #define BRW_ADDRESS_ROUNDING_ENABLE_U_MAG 0x20 #define BRW_ADDRESS_ROUNDING_ENABLE_U_MIN 0x10 #define BRW_ADDRESS_ROUNDING_ENABLE_V_MAG 0x08 #define BRW_ADDRESS_ROUNDING_ENABLE_V_MIN 0x04 #define BRW_ADDRESS_ROUNDING_ENABLE_R_MAG 0x02 #define BRW_ADDRESS_ROUNDING_ENABLE_R_MIN 0x01 #define BRW_POLYGON_FRONT_FACING 0 #define BRW_POLYGON_BACK_FACING 1 #define BRW_PREFILTER_ALWAYS 0x0 #define BRW_PREFILTER_NEVER 0x1 #define BRW_PREFILTER_LESS 0x2 #define BRW_PREFILTER_EQUAL 0x3 #define BRW_PREFILTER_LEQUAL 0x4 #define BRW_PREFILTER_GREATER 0x5 #define BRW_PREFILTER_NOTEQUAL 0x6 #define BRW_PREFILTER_GEQUAL 0x7 #define BRW_PROVOKING_VERTEX_0 0 #define BRW_PROVOKING_VERTEX_1 1 #define BRW_PROVOKING_VERTEX_2 2 #define BRW_RASTRULE_UPPER_LEFT 0 #define BRW_RASTRULE_UPPER_RIGHT 1 /* These are listed as "Reserved, but not seen as useful" * in Intel documentation (page 212, "Point Rasterization Rule", * section 7.4 "SF Pipeline State Summary", of document * "Intel® 965 Express Chipset Family and Intel® G35 Express * Chipset Graphics Controller Programmer's Reference Manual, * Volume 2: 3D/Media", Revision 1.0b as of January 2008, * available at * http://intellinuxgraphics.org/documentation.html * at the time of this writing). * * These appear to be supported on at least some * i965-family devices, and the BRW_RASTRULE_LOWER_RIGHT * is useful when using OpenGL to render to a FBO * (which has the pixel coordinate Y orientation inverted * with respect to the normal OpenGL pixel coordinate system). */ #define BRW_RASTRULE_LOWER_LEFT 2 #define BRW_RASTRULE_LOWER_RIGHT 3 #define BRW_RENDERTARGET_CLAMPRANGE_UNORM 0 #define BRW_RENDERTARGET_CLAMPRANGE_SNORM 1 #define BRW_RENDERTARGET_CLAMPRANGE_FORMAT 2 #define BRW_STENCILOP_KEEP 0 #define BRW_STENCILOP_ZERO 1 #define BRW_STENCILOP_REPLACE 2 #define BRW_STENCILOP_INCRSAT 3 #define BRW_STENCILOP_DECRSAT 4 #define BRW_STENCILOP_INCR 5 #define BRW_STENCILOP_DECR 6 #define BRW_STENCILOP_INVERT 7 /* Surface state DW0 */ #define BRW_SURFACE_RC_READ_WRITE (1 << 8) #define BRW_SURFACE_MIPLAYOUT_SHIFT 10 #define BRW_SURFACE_MIPMAPLAYOUT_BELOW 0 #define BRW_SURFACE_MIPMAPLAYOUT_RIGHT 1 #define BRW_SURFACE_CUBEFACE_ENABLES 0x3f #define BRW_SURFACE_BLEND_ENABLED (1 << 13) #define BRW_SURFACE_WRITEDISABLE_B_SHIFT 14 #define BRW_SURFACE_WRITEDISABLE_G_SHIFT 15 #define BRW_SURFACE_WRITEDISABLE_R_SHIFT 16 #define BRW_SURFACE_WRITEDISABLE_A_SHIFT 17 #define BRW_SURFACEFORMAT_R32G32B32A32_FLOAT 0x000 #define BRW_SURFACEFORMAT_R32G32B32A32_SINT 0x001 #define BRW_SURFACEFORMAT_R32G32B32A32_UINT 0x002 #define BRW_SURFACEFORMAT_R32G32B32A32_UNORM 0x003 #define BRW_SURFACEFORMAT_R32G32B32A32_SNORM 0x004 #define BRW_SURFACEFORMAT_R64G64_FLOAT 0x005 #define BRW_SURFACEFORMAT_R32G32B32X32_FLOAT 0x006 #define BRW_SURFACEFORMAT_R32G32B32A32_SSCALED 0x007 #define BRW_SURFACEFORMAT_R32G32B32A32_USCALED 0x008 #define BRW_SURFACEFORMAT_R32G32B32A32_SFIXED 0x020 #define BRW_SURFACEFORMAT_R32G32B32_FLOAT 0x040 #define BRW_SURFACEFORMAT_R32G32B32_SINT 0x041 #define BRW_SURFACEFORMAT_R32G32B32_UINT 0x042 #define BRW_SURFACEFORMAT_R32G32B32_UNORM 0x043 #define BRW_SURFACEFORMAT_R32G32B32_SNORM 0x044 #define BRW_SURFACEFORMAT_R32G32B32_SSCALED 0x045 #define BRW_SURFACEFORMAT_R32G32B32_USCALED 0x046 #define BRW_SURFACEFORMAT_R32G32B32_SFIXED 0x050 #define BRW_SURFACEFORMAT_R16G16B16A16_UNORM 0x080 #define BRW_SURFACEFORMAT_R16G16B16A16_SNORM 0x081 #define BRW_SURFACEFORMAT_R16G16B16A16_SINT 0x082 #define BRW_SURFACEFORMAT_R16G16B16A16_UINT 0x083 #define BRW_SURFACEFORMAT_R16G16B16A16_FLOAT 0x084 #define BRW_SURFACEFORMAT_R32G32_FLOAT 0x085 #define BRW_SURFACEFORMAT_R32G32_SINT 0x086 #define BRW_SURFACEFORMAT_R32G32_UINT 0x087 #define BRW_SURFACEFORMAT_R32_FLOAT_X8X24_TYPELESS 0x088 #define BRW_SURFACEFORMAT_X32_TYPELESS_G8X24_UINT 0x089 #define BRW_SURFACEFORMAT_L32A32_FLOAT 0x08A #define BRW_SURFACEFORMAT_R32G32_UNORM 0x08B #define BRW_SURFACEFORMAT_R32G32_SNORM 0x08C #define BRW_SURFACEFORMAT_R64_FLOAT 0x08D #define BRW_SURFACEFORMAT_R16G16B16X16_UNORM 0x08E #define BRW_SURFACEFORMAT_R16G16B16X16_FLOAT 0x08F #define BRW_SURFACEFORMAT_A32X32_FLOAT 0x090 #define BRW_SURFACEFORMAT_L32X32_FLOAT 0x091 #define BRW_SURFACEFORMAT_I32X32_FLOAT 0x092 #define BRW_SURFACEFORMAT_R16G16B16A16_SSCALED 0x093 #define BRW_SURFACEFORMAT_R16G16B16A16_USCALED 0x094 #define BRW_SURFACEFORMAT_R32G32_SSCALED 0x095 #define BRW_SURFACEFORMAT_R32G32_USCALED 0x096 #define BRW_SURFACEFORMAT_R32G32_SFIXED 0x0A0 #define BRW_SURFACEFORMAT_B8G8R8A8_UNORM 0x0C0 #define BRW_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB 0x0C1 #define BRW_SURFACEFORMAT_R10G10B10A2_UNORM 0x0C2 #define BRW_SURFACEFORMAT_R10G10B10A2_UNORM_SRGB 0x0C3 #define BRW_SURFACEFORMAT_R10G10B10A2_UINT 0x0C4 #define BRW_SURFACEFORMAT_R10G10B10_SNORM_A2_UNORM 0x0C5 #define BRW_SURFACEFORMAT_R8G8B8A8_UNORM 0x0C7 #define BRW_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB 0x0C8 #define BRW_SURFACEFORMAT_R8G8B8A8_SNORM 0x0C9 #define BRW_SURFACEFORMAT_R8G8B8A8_SINT 0x0CA #define BRW_SURFACEFORMAT_R8G8B8A8_UINT 0x0CB #define BRW_SURFACEFORMAT_R16G16_UNORM 0x0CC #define BRW_SURFACEFORMAT_R16G16_SNORM 0x0CD #define BRW_SURFACEFORMAT_R16G16_SINT 0x0CE #define BRW_SURFACEFORMAT_R16G16_UINT 0x0CF #define BRW_SURFACEFORMAT_R16G16_FLOAT 0x0D0 #define BRW_SURFACEFORMAT_B10G10R10A2_UNORM 0x0D1 #define BRW_SURFACEFORMAT_B10G10R10A2_UNORM_SRGB 0x0D2 #define BRW_SURFACEFORMAT_R11G11B10_FLOAT 0x0D3 #define BRW_SURFACEFORMAT_R32_SINT 0x0D6 #define BRW_SURFACEFORMAT_R32_UINT 0x0D7 #define BRW_SURFACEFORMAT_R32_FLOAT 0x0D8 #define BRW_SURFACEFORMAT_R24_UNORM_X8_TYPELESS 0x0D9 #define BRW_SURFACEFORMAT_X24_TYPELESS_G8_UINT 0x0DA #define BRW_SURFACEFORMAT_L16A16_UNORM 0x0DF #define BRW_SURFACEFORMAT_I24X8_UNORM 0x0E0 #define BRW_SURFACEFORMAT_L24X8_UNORM 0x0E1 #define BRW_SURFACEFORMAT_A24X8_UNORM 0x0E2 #define BRW_SURFACEFORMAT_I32_FLOAT 0x0E3 #define BRW_SURFACEFORMAT_L32_FLOAT 0x0E4 #define BRW_SURFACEFORMAT_A32_FLOAT 0x0E5 #define BRW_SURFACEFORMAT_B8G8R8X8_UNORM 0x0E9 #define BRW_SURFACEFORMAT_B8G8R8X8_UNORM_SRGB 0x0EA #define BRW_SURFACEFORMAT_R8G8B8X8_UNORM 0x0EB #define BRW_SURFACEFORMAT_R8G8B8X8_UNORM_SRGB 0x0EC #define BRW_SURFACEFORMAT_R9G9B9E5_SHAREDEXP 0x0ED #define BRW_SURFACEFORMAT_B10G10R10X2_UNORM 0x0EE #define BRW_SURFACEFORMAT_L16A16_FLOAT 0x0F0 #define BRW_SURFACEFORMAT_R32_UNORM 0x0F1 #define BRW_SURFACEFORMAT_R32_SNORM 0x0F2 #define BRW_SURFACEFORMAT_R10G10B10X2_USCALED 0x0F3 #define BRW_SURFACEFORMAT_R8G8B8A8_SSCALED 0x0F4 #define BRW_SURFACEFORMAT_R8G8B8A8_USCALED 0x0F5 #define BRW_SURFACEFORMAT_R16G16_SSCALED 0x0F6 #define BRW_SURFACEFORMAT_R16G16_USCALED 0x0F7 #define BRW_SURFACEFORMAT_R32_SSCALED 0x0F8 #define BRW_SURFACEFORMAT_R32_USCALED 0x0F9 #define BRW_SURFACEFORMAT_B5G6R5_UNORM 0x100 #define BRW_SURFACEFORMAT_B5G6R5_UNORM_SRGB 0x101 #define BRW_SURFACEFORMAT_B5G5R5A1_UNORM 0x102 #define BRW_SURFACEFORMAT_B5G5R5A1_UNORM_SRGB 0x103 #define BRW_SURFACEFORMAT_B4G4R4A4_UNORM 0x104 #define BRW_SURFACEFORMAT_B4G4R4A4_UNORM_SRGB 0x105 #define BRW_SURFACEFORMAT_R8G8_UNORM 0x106 #define BRW_SURFACEFORMAT_R8G8_SNORM 0x107 #define BRW_SURFACEFORMAT_R8G8_SINT 0x108 #define BRW_SURFACEFORMAT_R8G8_UINT 0x109 #define BRW_SURFACEFORMAT_R16_UNORM 0x10A #define BRW_SURFACEFORMAT_R16_SNORM 0x10B #define BRW_SURFACEFORMAT_R16_SINT 0x10C #define BRW_SURFACEFORMAT_R16_UINT 0x10D #define BRW_SURFACEFORMAT_R16_FLOAT 0x10E #define BRW_SURFACEFORMAT_I16_UNORM 0x111 #define BRW_SURFACEFORMAT_L16_UNORM 0x112 #define BRW_SURFACEFORMAT_A16_UNORM 0x113 #define BRW_SURFACEFORMAT_L8A8_UNORM 0x114 #define BRW_SURFACEFORMAT_I16_FLOAT 0x115 #define BRW_SURFACEFORMAT_L16_FLOAT 0x116 #define BRW_SURFACEFORMAT_A16_FLOAT 0x117 #define BRW_SURFACEFORMAT_L8A8_UNORM_SRGB 0x118 #define BRW_SURFACEFORMAT_R5G5_SNORM_B6_UNORM 0x119 #define BRW_SURFACEFORMAT_B5G5R5X1_UNORM 0x11A #define BRW_SURFACEFORMAT_B5G5R5X1_UNORM_SRGB 0x11B #define BRW_SURFACEFORMAT_R8G8_SSCALED 0x11C #define BRW_SURFACEFORMAT_R8G8_USCALED 0x11D #define BRW_SURFACEFORMAT_R16_SSCALED 0x11E #define BRW_SURFACEFORMAT_R16_USCALED 0x11F #define BRW_SURFACEFORMAT_R8_UNORM 0x140 #define BRW_SURFACEFORMAT_R8_SNORM 0x141 #define BRW_SURFACEFORMAT_R8_SINT 0x142 #define BRW_SURFACEFORMAT_R8_UINT 0x143 #define BRW_SURFACEFORMAT_A8_UNORM 0x144 #define BRW_SURFACEFORMAT_I8_UNORM 0x145 #define BRW_SURFACEFORMAT_L8_UNORM 0x146 #define BRW_SURFACEFORMAT_P4A4_UNORM 0x147 #define BRW_SURFACEFORMAT_A4P4_UNORM 0x148 #define BRW_SURFACEFORMAT_R8_SSCALED 0x149 #define BRW_SURFACEFORMAT_R8_USCALED 0x14A #define BRW_SURFACEFORMAT_L8_UNORM_SRGB 0x14C #define BRW_SURFACEFORMAT_DXT1_RGB_SRGB 0x180 #define BRW_SURFACEFORMAT_R1_UINT 0x181 #define BRW_SURFACEFORMAT_YCRCB_NORMAL 0x182 #define BRW_SURFACEFORMAT_YCRCB_SWAPUVY 0x183 #define BRW_SURFACEFORMAT_BC1_UNORM 0x186 #define BRW_SURFACEFORMAT_BC2_UNORM 0x187 #define BRW_SURFACEFORMAT_BC3_UNORM 0x188 #define BRW_SURFACEFORMAT_BC4_UNORM 0x189 #define BRW_SURFACEFORMAT_BC5_UNORM 0x18A #define BRW_SURFACEFORMAT_BC1_UNORM_SRGB 0x18B #define BRW_SURFACEFORMAT_BC2_UNORM_SRGB 0x18C #define BRW_SURFACEFORMAT_BC3_UNORM_SRGB 0x18D #define BRW_SURFACEFORMAT_MONO8 0x18E #define BRW_SURFACEFORMAT_YCRCB_SWAPUV 0x18F #define BRW_SURFACEFORMAT_YCRCB_SWAPY 0x190 #define BRW_SURFACEFORMAT_DXT1_RGB 0x191 #define BRW_SURFACEFORMAT_FXT1 0x192 #define BRW_SURFACEFORMAT_R8G8B8_UNORM 0x193 #define BRW_SURFACEFORMAT_R8G8B8_SNORM 0x194 #define BRW_SURFACEFORMAT_R8G8B8_SSCALED 0x195 #define BRW_SURFACEFORMAT_R8G8B8_USCALED 0x196 #define BRW_SURFACEFORMAT_R64G64B64A64_FLOAT 0x197 #define BRW_SURFACEFORMAT_R64G64B64_FLOAT 0x198 #define BRW_SURFACEFORMAT_BC4_SNORM 0x199 #define BRW_SURFACEFORMAT_BC5_SNORM 0x19A #define BRW_SURFACEFORMAT_R16G16B16_UNORM 0x19C #define BRW_SURFACEFORMAT_R16G16B16_SNORM 0x19D #define BRW_SURFACEFORMAT_R16G16B16_SSCALED 0x19E #define BRW_SURFACEFORMAT_R16G16B16_USCALED 0x19F #define BRW_SURFACEFORMAT_R32_SFIXED 0x1B2 #define BRW_SURFACEFORMAT_R10G10B10A2_SNORM 0x1B3 #define BRW_SURFACEFORMAT_R10G10B10A2_USCALED 0x1B4 #define BRW_SURFACEFORMAT_R10G10B10A2_SSCALED 0x1B5 #define BRW_SURFACEFORMAT_R10G10B10A2_SINT 0x1B6 #define BRW_SURFACEFORMAT_B10G10R10A2_SNORM 0x1B7 #define BRW_SURFACEFORMAT_B10G10R10A2_USCALED 0x1B8 #define BRW_SURFACEFORMAT_B10G10R10A2_SSCALED 0x1B9 #define BRW_SURFACEFORMAT_B10G10R10A2_UINT 0x1BA #define BRW_SURFACEFORMAT_B10G10R10A2_SINT 0x1BB #define BRW_SURFACE_FORMAT_SHIFT 18 #define BRW_SURFACE_FORMAT_MASK INTEL_MASK(26, 18) #define BRW_SURFACERETURNFORMAT_FLOAT32 0 #define BRW_SURFACERETURNFORMAT_S1 1 #define BRW_SURFACE_TYPE_SHIFT 29 #define BRW_SURFACE_TYPE_MASK INTEL_MASK(31, 29) #define BRW_SURFACE_1D 0 #define BRW_SURFACE_2D 1 #define BRW_SURFACE_3D 2 #define BRW_SURFACE_CUBE 3 #define BRW_SURFACE_BUFFER 4 #define BRW_SURFACE_NULL 7 #define GEN7_SURFACE_IS_ARRAY (1 << 28) #define GEN7_SURFACE_VALIGN_2 (0 << 16) #define GEN7_SURFACE_VALIGN_4 (1 << 16) #define GEN7_SURFACE_HALIGN_4 (0 << 15) #define GEN7_SURFACE_HALIGN_8 (1 << 15) #define GEN7_SURFACE_TILING_NONE (0 << 13) #define GEN7_SURFACE_TILING_X (2 << 13) #define GEN7_SURFACE_TILING_Y (3 << 13) #define GEN7_SURFACE_ARYSPC_FULL (0 << 10) #define GEN7_SURFACE_ARYSPC_LOD0 (1 << 10) /* Surface state DW2 */ #define BRW_SURFACE_HEIGHT_SHIFT 19 #define BRW_SURFACE_HEIGHT_MASK INTEL_MASK(31, 19) #define BRW_SURFACE_WIDTH_SHIFT 6 #define BRW_SURFACE_WIDTH_MASK INTEL_MASK(18, 6) #define BRW_SURFACE_LOD_SHIFT 2 #define BRW_SURFACE_LOD_MASK INTEL_MASK(5, 2) #define GEN7_SURFACE_HEIGHT_SHIFT 16 #define GEN7_SURFACE_HEIGHT_MASK INTEL_MASK(29, 16) #define GEN7_SURFACE_WIDTH_SHIFT 0 #define GEN7_SURFACE_WIDTH_MASK INTEL_MASK(13, 0) /* Surface state DW3 */ #define BRW_SURFACE_DEPTH_SHIFT 21 #define BRW_SURFACE_DEPTH_MASK INTEL_MASK(31, 21) #define BRW_SURFACE_PITCH_SHIFT 3 #define BRW_SURFACE_PITCH_MASK INTEL_MASK(19, 3) #define BRW_SURFACE_TILED (1 << 1) #define BRW_SURFACE_TILED_Y (1 << 0) /* Surface state DW4 */ #define BRW_SURFACE_MIN_LOD_SHIFT 28 #define BRW_SURFACE_MIN_LOD_MASK INTEL_MASK(31, 28) #define BRW_SURFACE_MULTISAMPLECOUNT_1 (0 << 4) #define BRW_SURFACE_MULTISAMPLECOUNT_4 (2 << 4) #define GEN7_SURFACE_MULTISAMPLECOUNT_1 (0 << 3) #define GEN7_SURFACE_MULTISAMPLECOUNT_4 (2 << 3) #define GEN7_SURFACE_MULTISAMPLECOUNT_8 (3 << 3) #define GEN7_SURFACE_MSFMT_MSS (0 << 6) #define GEN7_SURFACE_MSFMT_DEPTH_STENCIL (1 << 6) /* Surface state DW5 */ #define BRW_SURFACE_X_OFFSET_SHIFT 25 #define BRW_SURFACE_X_OFFSET_MASK INTEL_MASK(31, 25) #define BRW_SURFACE_VERTICAL_ALIGN_ENABLE (1 << 24) #define BRW_SURFACE_Y_OFFSET_SHIFT 20 #define BRW_SURFACE_Y_OFFSET_MASK INTEL_MASK(23, 20) #define GEN7_SURFACE_MIN_LOD_SHIFT 4 #define GEN7_SURFACE_MIN_LOD_MASK INTEL_MASK(7, 4) /* Surface state DW6 */ #define GEN7_SURFACE_MCS_ENABLE (1 << 0) #define GEN7_SURFACE_MCS_PITCH_SHIFT 3 #define GEN7_SURFACE_MCS_PITCH_MASK INTEL_MASK(11, 3) /* Surface state DW7 */ #define GEN7_SURFACE_SCS_R_SHIFT 25 #define GEN7_SURFACE_SCS_R_MASK INTEL_MASK(27, 25) #define GEN7_SURFACE_SCS_G_SHIFT 22 #define GEN7_SURFACE_SCS_G_MASK INTEL_MASK(24, 22) #define GEN7_SURFACE_SCS_B_SHIFT 19 #define GEN7_SURFACE_SCS_B_MASK INTEL_MASK(21, 19) #define GEN7_SURFACE_SCS_A_SHIFT 16 #define GEN7_SURFACE_SCS_A_MASK INTEL_MASK(18, 16) /* The actual swizzle values/what channel to use */ #define HSW_SCS_ZERO 0 #define HSW_SCS_ONE 1 #define HSW_SCS_RED 4 #define HSW_SCS_GREEN 5 #define HSW_SCS_BLUE 6 #define HSW_SCS_ALPHA 7 #define BRW_TEXCOORDMODE_WRAP 0 #define BRW_TEXCOORDMODE_MIRROR 1 #define BRW_TEXCOORDMODE_CLAMP 2 #define BRW_TEXCOORDMODE_CUBE 3 #define BRW_TEXCOORDMODE_CLAMP_BORDER 4 #define BRW_TEXCOORDMODE_MIRROR_ONCE 5 #define BRW_THREAD_PRIORITY_NORMAL 0 #define BRW_THREAD_PRIORITY_HIGH 1 #define BRW_TILEWALK_XMAJOR 0 #define BRW_TILEWALK_YMAJOR 1 #define BRW_VERTEX_SUBPIXEL_PRECISION_8BITS 0 #define BRW_VERTEX_SUBPIXEL_PRECISION_4BITS 1 /* Execution Unit (EU) defines */ #define BRW_ALIGN_1 0 #define BRW_ALIGN_16 1 #define BRW_ADDRESS_DIRECT 0 #define BRW_ADDRESS_REGISTER_INDIRECT_REGISTER 1 #define BRW_CHANNEL_X 0 #define BRW_CHANNEL_Y 1 #define BRW_CHANNEL_Z 2 #define BRW_CHANNEL_W 3 enum brw_compression { BRW_COMPRESSION_NONE = 0, BRW_COMPRESSION_2NDHALF = 1, BRW_COMPRESSION_COMPRESSED = 2, }; #define GEN6_COMPRESSION_1Q 0 #define GEN6_COMPRESSION_2Q 1 #define GEN6_COMPRESSION_3Q 2 #define GEN6_COMPRESSION_4Q 3 #define GEN6_COMPRESSION_1H 0 #define GEN6_COMPRESSION_2H 2 #define BRW_CONDITIONAL_NONE 0 #define BRW_CONDITIONAL_Z 1 #define BRW_CONDITIONAL_NZ 2 #define BRW_CONDITIONAL_EQ 1 /* Z */ #define BRW_CONDITIONAL_NEQ 2 /* NZ */ #define BRW_CONDITIONAL_G 3 #define BRW_CONDITIONAL_GE 4 #define BRW_CONDITIONAL_L 5 #define BRW_CONDITIONAL_LE 6 #define BRW_CONDITIONAL_R 7 #define BRW_CONDITIONAL_O 8 #define BRW_CONDITIONAL_U 9 #define BRW_DEBUG_NONE 0 #define BRW_DEBUG_BREAKPOINT 1 #define BRW_DEPENDENCY_NORMAL 0 #define BRW_DEPENDENCY_NOTCLEARED 1 #define BRW_DEPENDENCY_NOTCHECKED 2 #define BRW_DEPENDENCY_DISABLE 3 #define BRW_EXECUTE_1 0 #define BRW_EXECUTE_2 1 #define BRW_EXECUTE_4 2 #define BRW_EXECUTE_8 3 #define BRW_EXECUTE_16 4 #define BRW_EXECUTE_32 5 #define BRW_HORIZONTAL_STRIDE_0 0 #define BRW_HORIZONTAL_STRIDE_1 1 #define BRW_HORIZONTAL_STRIDE_2 2 #define BRW_HORIZONTAL_STRIDE_4 3 #define BRW_INSTRUCTION_NORMAL 0 #define BRW_INSTRUCTION_SATURATE 1 #define BRW_MASK_ENABLE 0 #define BRW_MASK_DISABLE 1 #define BRW_ACCUMULATOR_WRITE_DISABLE 0 #define BRW_ACCUMULATOR_WRITE_ENABLE 1 /** @{ * * Gen6 has replaced "mask enable/disable" with WECtrl, which is * effectively the same but much simpler to think about. Now, there * are two contributors ANDed together to whether channels are * executed: The predication on the instruction, and the channel write * enable. */ /** * This is the default value. It means that a channel's write enable is set * if the per-channel IP is pointing at this instruction. */ #define BRW_WE_NORMAL 0 /** * This is used like BRW_MASK_DISABLE, and causes all channels to have * their write enable set. Note that predication still contributes to * whether the channel actually gets written. */ #define BRW_WE_ALL 1 /** @} */ enum opcode { /* These are the actual hardware opcodes. */ BRW_OPCODE_MOV = 1, BRW_OPCODE_SEL = 2, BRW_OPCODE_NOT = 4, BRW_OPCODE_AND = 5, BRW_OPCODE_OR = 6, BRW_OPCODE_XOR = 7, BRW_OPCODE_SHR = 8, BRW_OPCODE_SHL = 9, BRW_OPCODE_RSR = 10, BRW_OPCODE_RSL = 11, BRW_OPCODE_ASR = 12, BRW_OPCODE_CMP = 16, BRW_OPCODE_CMPN = 17, BRW_OPCODE_F32TO16 = 19, BRW_OPCODE_F16TO32 = 20, BRW_OPCODE_BFREV = 23, BRW_OPCODE_BFE = 24, BRW_OPCODE_BFI1 = 25, BRW_OPCODE_BFI2 = 26, BRW_OPCODE_JMPI = 32, BRW_OPCODE_BRD = 33, BRW_OPCODE_IF = 34, BRW_OPCODE_IFF = 35, BRW_OPCODE_BRC = 35, BRW_OPCODE_ELSE = 36, BRW_OPCODE_ENDIF = 37, BRW_OPCODE_DO = 38, BRW_OPCODE_WHILE = 39, BRW_OPCODE_BREAK = 40, BRW_OPCODE_CONTINUE = 41, BRW_OPCODE_HALT = 42, BRW_OPCODE_MSAVE = 44, BRW_OPCODE_CALL = 44, BRW_OPCODE_MRESTORE = 45, BRW_OPCODE_RET = 45, BRW_OPCODE_PUSH = 46, BRW_OPCODE_POP = 47, BRW_OPCODE_WAIT = 48, BRW_OPCODE_SEND = 49, BRW_OPCODE_SENDC = 50, BRW_OPCODE_MATH = 56, BRW_OPCODE_ADD = 64, BRW_OPCODE_MUL = 65, BRW_OPCODE_AVG = 66, BRW_OPCODE_FRC = 67, BRW_OPCODE_RNDU = 68, BRW_OPCODE_RNDD = 69, BRW_OPCODE_RNDE = 70, BRW_OPCODE_RNDZ = 71, BRW_OPCODE_MAC = 72, BRW_OPCODE_MACH = 73, BRW_OPCODE_LZD = 74, BRW_OPCODE_FBH = 75, BRW_OPCODE_FBL = 76, BRW_OPCODE_CBIT = 77, BRW_OPCODE_ADDC = 78, BRW_OPCODE_SUBB = 79, BRW_OPCODE_SAD2 = 80, BRW_OPCODE_SADA2 = 81, BRW_OPCODE_DP4 = 84, BRW_OPCODE_DPH = 85, BRW_OPCODE_DP3 = 86, BRW_OPCODE_DP2 = 87, BRW_OPCODE_DPA2 = 88, BRW_OPCODE_LINE = 89, BRW_OPCODE_PLN = 90, BRW_OPCODE_MAD = 91, BRW_OPCODE_LRP = 92, BRW_OPCODE_NOP = 126, /* These are compiler backend opcodes that get translated into other * instructions. */ FS_OPCODE_FB_WRITE = 128, SHADER_OPCODE_RCP, SHADER_OPCODE_RSQ, SHADER_OPCODE_SQRT, SHADER_OPCODE_EXP2, SHADER_OPCODE_LOG2, SHADER_OPCODE_POW, SHADER_OPCODE_INT_QUOTIENT, SHADER_OPCODE_INT_REMAINDER, SHADER_OPCODE_SIN, SHADER_OPCODE_COS, SHADER_OPCODE_TEX, SHADER_OPCODE_TXD, SHADER_OPCODE_TXF, SHADER_OPCODE_TXL, SHADER_OPCODE_TXS, FS_OPCODE_TXB, SHADER_OPCODE_SHADER_TIME_ADD, FS_OPCODE_DDX, FS_OPCODE_DDY, FS_OPCODE_PIXEL_X, FS_OPCODE_PIXEL_Y, FS_OPCODE_CINTERP, FS_OPCODE_LINTERP, FS_OPCODE_SPILL, FS_OPCODE_UNSPILL, FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD, FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD_GEN7, FS_OPCODE_VARYING_PULL_CONSTANT_LOAD, FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_GEN7, FS_OPCODE_MOV_DISPATCH_TO_FLAGS, FS_OPCODE_DISCARD_JUMP, FS_OPCODE_SET_GLOBAL_OFFSET, VS_OPCODE_URB_WRITE, VS_OPCODE_SCRATCH_READ, VS_OPCODE_SCRATCH_WRITE, VS_OPCODE_PULL_CONSTANT_LOAD, }; #define BRW_PREDICATE_NONE 0 #define BRW_PREDICATE_NORMAL 1 #define BRW_PREDICATE_ALIGN1_ANYV 2 #define BRW_PREDICATE_ALIGN1_ALLV 3 #define BRW_PREDICATE_ALIGN1_ANY2H 4 #define BRW_PREDICATE_ALIGN1_ALL2H 5 #define BRW_PREDICATE_ALIGN1_ANY4H 6 #define BRW_PREDICATE_ALIGN1_ALL4H 7 #define BRW_PREDICATE_ALIGN1_ANY8H 8 #define BRW_PREDICATE_ALIGN1_ALL8H 9 #define BRW_PREDICATE_ALIGN1_ANY16H 10 #define BRW_PREDICATE_ALIGN1_ALL16H 11 #define BRW_PREDICATE_ALIGN16_REPLICATE_X 2 #define BRW_PREDICATE_ALIGN16_REPLICATE_Y 3 #define BRW_PREDICATE_ALIGN16_REPLICATE_Z 4 #define BRW_PREDICATE_ALIGN16_REPLICATE_W 5 #define BRW_PREDICATE_ALIGN16_ANY4H 6 #define BRW_PREDICATE_ALIGN16_ALL4H 7 #define BRW_ARCHITECTURE_REGISTER_FILE 0 #define BRW_GENERAL_REGISTER_FILE 1 #define BRW_MESSAGE_REGISTER_FILE 2 #define BRW_IMMEDIATE_VALUE 3 #define BRW_REGISTER_TYPE_UD 0 #define BRW_REGISTER_TYPE_D 1 #define BRW_REGISTER_TYPE_UW 2 #define BRW_REGISTER_TYPE_W 3 #define BRW_REGISTER_TYPE_UB 4 #define BRW_REGISTER_TYPE_B 5 #define BRW_REGISTER_TYPE_VF 5 /* packed float vector, immediates only? */ #define BRW_REGISTER_TYPE_HF 6 #define BRW_REGISTER_TYPE_V 6 /* packed int vector, immediates only, uword dest only */ #define BRW_REGISTER_TYPE_F 7 #define BRW_REGISTER_3SRC_TYPE_F 0 #define BRW_REGISTER_3SRC_TYPE_D 1 #define BRW_REGISTER_3SRC_TYPE_UD 2 #define BRW_REGISTER_3SRC_TYPE_DF 3 #define BRW_ARF_NULL 0x00 #define BRW_ARF_ADDRESS 0x10 #define BRW_ARF_ACCUMULATOR 0x20 #define BRW_ARF_FLAG 0x30 #define BRW_ARF_MASK 0x40 #define BRW_ARF_MASK_STACK 0x50 #define BRW_ARF_MASK_STACK_DEPTH 0x60 #define BRW_ARF_STATE 0x70 #define BRW_ARF_CONTROL 0x80 #define BRW_ARF_NOTIFICATION_COUNT 0x90 #define BRW_ARF_IP 0xA0 #define BRW_ARF_TDR 0xB0 #define BRW_ARF_TIMESTAMP 0xC0 #define BRW_MRF_COMPR4 (1 << 7) #define BRW_AMASK 0 #define BRW_IMASK 1 #define BRW_LMASK 2 #define BRW_CMASK 3 #define BRW_THREAD_NORMAL 0 #define BRW_THREAD_ATOMIC 1 #define BRW_THREAD_SWITCH 2 #define BRW_VERTICAL_STRIDE_0 0 #define BRW_VERTICAL_STRIDE_1 1 #define BRW_VERTICAL_STRIDE_2 2 #define BRW_VERTICAL_STRIDE_4 3 #define BRW_VERTICAL_STRIDE_8 4 #define BRW_VERTICAL_STRIDE_16 5 #define BRW_VERTICAL_STRIDE_32 6 #define BRW_VERTICAL_STRIDE_64 7 #define BRW_VERTICAL_STRIDE_128 8 #define BRW_VERTICAL_STRIDE_256 9 #define BRW_VERTICAL_STRIDE_ONE_DIMENSIONAL 0xF #define BRW_WIDTH_1 0 #define BRW_WIDTH_2 1 #define BRW_WIDTH_4 2 #define BRW_WIDTH_8 3 #define BRW_WIDTH_16 4 #define BRW_STATELESS_BUFFER_BOUNDARY_1K 0 #define BRW_STATELESS_BUFFER_BOUNDARY_2K 1 #define BRW_STATELESS_BUFFER_BOUNDARY_4K 2 #define BRW_STATELESS_BUFFER_BOUNDARY_8K 3 #define BRW_STATELESS_BUFFER_BOUNDARY_16K 4 #define BRW_STATELESS_BUFFER_BOUNDARY_32K 5 #define BRW_STATELESS_BUFFER_BOUNDARY_64K 6 #define BRW_STATELESS_BUFFER_BOUNDARY_128K 7 #define BRW_STATELESS_BUFFER_BOUNDARY_256K 8 #define BRW_STATELESS_BUFFER_BOUNDARY_512K 9 #define BRW_STATELESS_BUFFER_BOUNDARY_1M 10 #define BRW_STATELESS_BUFFER_BOUNDARY_2M 11 #define BRW_POLYGON_FACING_FRONT 0 #define BRW_POLYGON_FACING_BACK 1 /** * Message target: Shared Function ID for where to SEND a message. * * These are enumerated in the ISA reference under "send - Send Message". * In particular, see the following tables: * - G45 PRM, Volume 4, Table 14-15 "Message Descriptor Definition" * - Sandybridge PRM, Volume 4 Part 2, Table 8-16 "Extended Message Descriptor" * - BSpec, Volume 1a (GPU Overview) / Graphics Processing Engine (GPE) / * Overview / GPE Function IDs */ enum brw_message_target { BRW_SFID_NULL = 0, BRW_SFID_MATH = 1, /* Only valid on Gen4-5 */ BRW_SFID_SAMPLER = 2, BRW_SFID_MESSAGE_GATEWAY = 3, BRW_SFID_DATAPORT_READ = 4, BRW_SFID_DATAPORT_WRITE = 5, BRW_SFID_URB = 6, BRW_SFID_THREAD_SPAWNER = 7, GEN6_SFID_DATAPORT_SAMPLER_CACHE = 4, GEN6_SFID_DATAPORT_RENDER_CACHE = 5, GEN6_SFID_VME = 8, GEN6_SFID_DATAPORT_CONSTANT_CACHE = 9, GEN7_SFID_DATAPORT_DATA_CACHE = 10, HSW_SFID_DATAPORT_DATA_CACHE1 = 0x0c, HSW_SFID_CRE = 0x0d, /* There is no Sampler data port cache(0x04) on SKL and it is used * as the extension of DP_DC0/DP_DC1. */ SKL_SFID_DATAPORT_DATA_CACHE2 = 0x4, /* Data Read only Data port cache */ SKL_SFID_DATAPORT_DCR0 = 0x9, }; #define BRW_SAMPLER_RETURN_FORMAT_FLOAT32 0 #define BRW_SAMPLER_RETURN_FORMAT_UINT32 2 #define BRW_SAMPLER_RETURN_FORMAT_SINT32 3 #define BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE 0 #define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE 0 #define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_BIAS 0 #define BRW_SAMPLER_MESSAGE_SIMD8_KILLPIX 1 #define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_LOD 1 #define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_LOD 1 #define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_GRADIENTS 2 #define BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE_GRADIENTS 2 #define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_COMPARE 0 #define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_COMPARE 2 #define BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE_BIAS_COMPARE 0 #define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_LOD_COMPARE 1 #define BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE_LOD_COMPARE 1 #define BRW_SAMPLER_MESSAGE_SIMD4X2_RESINFO 2 #define BRW_SAMPLER_MESSAGE_SIMD16_RESINFO 2 #define BRW_SAMPLER_MESSAGE_SIMD4X2_LD 3 #define BRW_SAMPLER_MESSAGE_SIMD8_LD 3 #define BRW_SAMPLER_MESSAGE_SIMD16_LD 3 #define GEN5_SAMPLER_MESSAGE_SAMPLE 0 #define GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS 1 #define GEN5_SAMPLER_MESSAGE_SAMPLE_LOD 2 #define GEN5_SAMPLER_MESSAGE_SAMPLE_COMPARE 3 #define GEN5_SAMPLER_MESSAGE_SAMPLE_DERIVS 4 #define GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS_COMPARE 5 #define GEN5_SAMPLER_MESSAGE_SAMPLE_LOD_COMPARE 6 #define GEN5_SAMPLER_MESSAGE_SAMPLE_LD 7 #define GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO 10 #define HSW_SAMPLER_MESSAGE_SAMPLE_DERIV_COMPARE 20 #define GEN7_SAMPLER_MESSAGE_SAMPLE_LD_MCS 29 #define GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DMS 30 #define GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DSS 31 /* for GEN5 only */ #define BRW_SAMPLER_SIMD_MODE_SIMD4X2 0 #define BRW_SAMPLER_SIMD_MODE_SIMD8 1 #define BRW_SAMPLER_SIMD_MODE_SIMD16 2 #define BRW_SAMPLER_SIMD_MODE_SIMD32_64 3 #define BRW_DATAPORT_OWORD_BLOCK_1_OWORDLOW 0 #define BRW_DATAPORT_OWORD_BLOCK_1_OWORDHIGH 1 #define BRW_DATAPORT_OWORD_BLOCK_2_OWORDS 2 #define BRW_DATAPORT_OWORD_BLOCK_4_OWORDS 3 #define BRW_DATAPORT_OWORD_BLOCK_8_OWORDS 4 #define BRW_DATAPORT_OWORD_DUAL_BLOCK_1OWORD 0 #define BRW_DATAPORT_OWORD_DUAL_BLOCK_4OWORDS 2 #define BRW_DATAPORT_DWORD_SCATTERED_BLOCK_8DWORDS 2 #define BRW_DATAPORT_DWORD_SCATTERED_BLOCK_16DWORDS 3 /* This one stays the same across generations. */ #define BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ 0 /* GEN4 */ #define BRW_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ 1 #define BRW_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ 2 #define BRW_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ 3 /* G45, GEN5 */ #define G45_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ 1 #define G45_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ 2 #define G45_DATAPORT_READ_MESSAGE_AVC_LOOP_FILTER_READ 3 #define G45_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ 4 #define G45_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ 6 /* GEN6 */ #define GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ 1 #define GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ 2 #define GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ 4 #define GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ 5 #define GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ 6 #define BRW_DATAPORT_READ_TARGET_DATA_CACHE 0 #define BRW_DATAPORT_READ_TARGET_RENDER_CACHE 1 #define BRW_DATAPORT_READ_TARGET_SAMPLER_CACHE 2 #define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE 0 #define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE_REPLICATED 1 #define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN01 2 #define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN23 3 #define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_SINGLE_SOURCE_SUBSPAN01 4 #define BRW_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE 0 #define BRW_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE 1 #define BRW_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE 2 #define BRW_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE 3 #define BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE 4 #define BRW_DATAPORT_WRITE_MESSAGE_STREAMED_VERTEX_BUFFER_WRITE 5 #define BRW_DATAPORT_WRITE_MESSAGE_FLUSH_RENDER_CACHE 7 /* GEN6 */ #define GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE 7 #define GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE 8 #define GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE 9 #define GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE 10 #define GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE 11 #define GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE 12 #define GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE 13 #define GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE 14 /* GEN7 */ #define GEN7_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE 10 #define GEN7_DATAPORT_DC_DWORD_SCATTERED_READ 3 /* dataport atomic operations. */ #define BRW_AOP_AND 1 #define BRW_AOP_OR 2 #define BRW_AOP_XOR 3 #define BRW_AOP_MOV 4 #define BRW_AOP_INC 5 #define BRW_AOP_DEC 6 #define BRW_AOP_ADD 7 #define BRW_AOP_SUB 8 #define BRW_AOP_REVSUB 9 #define BRW_AOP_IMAX 10 #define BRW_AOP_IMIN 11 #define BRW_AOP_UMAX 12 #define BRW_AOP_UMIN 13 #define BRW_AOP_CMPWR 14 #define BRW_AOP_PREDEC 15 #define BRW_MATH_FUNCTION_INV 1 #define BRW_MATH_FUNCTION_LOG 2 #define BRW_MATH_FUNCTION_EXP 3 #define BRW_MATH_FUNCTION_SQRT 4 #define BRW_MATH_FUNCTION_RSQ 5 #define BRW_MATH_FUNCTION_SIN 6 /* was 7 */ #define BRW_MATH_FUNCTION_COS 7 /* was 8 */ #define BRW_MATH_FUNCTION_SINCOS 8 /* was 6 */ #define BRW_MATH_FUNCTION_TAN 9 /* gen4 */ #define BRW_MATH_FUNCTION_FDIV 9 /* gen6+ */ #define BRW_MATH_FUNCTION_POW 10 #define BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER 11 #define BRW_MATH_FUNCTION_INT_DIV_QUOTIENT 12 #define BRW_MATH_FUNCTION_INT_DIV_REMAINDER 13 #define BRW_MATH_INTEGER_UNSIGNED 0 #define BRW_MATH_INTEGER_SIGNED 1 #define BRW_MATH_PRECISION_FULL 0 #define BRW_MATH_PRECISION_PARTIAL 1 #define BRW_MATH_SATURATE_NONE 0 #define BRW_MATH_SATURATE_SATURATE 1 #define BRW_MATH_DATA_VECTOR 0 #define BRW_MATH_DATA_SCALAR 1 #define BRW_URB_OPCODE_WRITE 0 #define BRW_URB_SWIZZLE_NONE 0 #define BRW_URB_SWIZZLE_INTERLEAVE 1 #define BRW_URB_SWIZZLE_TRANSPOSE 2 #define BRW_SCRATCH_SPACE_SIZE_1K 0 #define BRW_SCRATCH_SPACE_SIZE_2K 1 #define BRW_SCRATCH_SPACE_SIZE_4K 2 #define BRW_SCRATCH_SPACE_SIZE_8K 3 #define BRW_SCRATCH_SPACE_SIZE_16K 4 #define BRW_SCRATCH_SPACE_SIZE_32K 5 #define BRW_SCRATCH_SPACE_SIZE_64K 6 #define BRW_SCRATCH_SPACE_SIZE_128K 7 #define BRW_SCRATCH_SPACE_SIZE_256K 8 #define BRW_SCRATCH_SPACE_SIZE_512K 9 #define BRW_SCRATCH_SPACE_SIZE_1M 10 #define BRW_SCRATCH_SPACE_SIZE_2M 11 #define CMD_URB_FENCE 0x6000 #define CMD_CS_URB_STATE 0x6001 #define CMD_CONST_BUFFER 0x6002 #define CMD_STATE_BASE_ADDRESS 0x6101 #define CMD_STATE_SIP 0x6102 #define CMD_PIPELINE_SELECT_965 0x6104 #define CMD_PIPELINE_SELECT_GM45 0x6904 #define _3DSTATE_PIPELINED_POINTERS 0x7800 #define _3DSTATE_BINDING_TABLE_POINTERS 0x7801 # define GEN6_BINDING_TABLE_MODIFY_VS (1 << 8) # define GEN6_BINDING_TABLE_MODIFY_GS (1 << 9) # define GEN6_BINDING_TABLE_MODIFY_PS (1 << 12) #define _3DSTATE_BINDING_TABLE_POINTERS_VS 0x7826 /* GEN7+ */ #define _3DSTATE_BINDING_TABLE_POINTERS_HS 0x7827 /* GEN7+ */ #define _3DSTATE_BINDING_TABLE_POINTERS_DS 0x7828 /* GEN7+ */ #define _3DSTATE_BINDING_TABLE_POINTERS_GS 0x7829 /* GEN7+ */ #define _3DSTATE_BINDING_TABLE_POINTERS_PS 0x782A /* GEN7+ */ #define _3DSTATE_SAMPLER_STATE_POINTERS 0x7802 /* GEN6+ */ # define PS_SAMPLER_STATE_CHANGE (1 << 12) # define GS_SAMPLER_STATE_CHANGE (1 << 9) # define VS_SAMPLER_STATE_CHANGE (1 << 8) /* DW1: VS */ /* DW2: GS */ /* DW3: PS */ #define _3DSTATE_SAMPLER_STATE_POINTERS_VS 0x782B /* GEN7+ */ #define _3DSTATE_SAMPLER_STATE_POINTERS_GS 0x782E /* GEN7+ */ #define _3DSTATE_SAMPLER_STATE_POINTERS_PS 0x782F /* GEN7+ */ #define _3DSTATE_VERTEX_BUFFERS 0x7808 # define BRW_VB0_INDEX_SHIFT 27 # define GEN6_VB0_INDEX_SHIFT 26 # define BRW_VB0_ACCESS_VERTEXDATA (0 << 26) # define BRW_VB0_ACCESS_INSTANCEDATA (1 << 26) # define GEN6_VB0_ACCESS_VERTEXDATA (0 << 20) # define GEN6_VB0_ACCESS_INSTANCEDATA (1 << 20) # define GEN7_VB0_ADDRESS_MODIFYENABLE (1 << 14) # define BRW_VB0_PITCH_SHIFT 0 #define _3DSTATE_VERTEX_ELEMENTS 0x7809 # define BRW_VE0_INDEX_SHIFT 27 # define GEN6_VE0_INDEX_SHIFT 26 # define BRW_VE0_FORMAT_SHIFT 16 # define BRW_VE0_VALID (1 << 26) # define GEN6_VE0_VALID (1 << 25) # define GEN6_VE0_EDGE_FLAG_ENABLE (1 << 15) # define BRW_VE0_SRC_OFFSET_SHIFT 0 # define BRW_VE1_COMPONENT_NOSTORE 0 # define BRW_VE1_COMPONENT_STORE_SRC 1 # define BRW_VE1_COMPONENT_STORE_0 2 # define BRW_VE1_COMPONENT_STORE_1_FLT 3 # define BRW_VE1_COMPONENT_STORE_1_INT 4 # define BRW_VE1_COMPONENT_STORE_VID 5 # define BRW_VE1_COMPONENT_STORE_IID 6 # define BRW_VE1_COMPONENT_STORE_PID 7 # define BRW_VE1_COMPONENT_0_SHIFT 28 # define BRW_VE1_COMPONENT_1_SHIFT 24 # define BRW_VE1_COMPONENT_2_SHIFT 20 # define BRW_VE1_COMPONENT_3_SHIFT 16 # define BRW_VE1_DST_OFFSET_SHIFT 0 #define CMD_INDEX_BUFFER 0x780a #define GEN4_3DSTATE_VF_STATISTICS 0x780b #define GM45_3DSTATE_VF_STATISTICS 0x680b #define _3DSTATE_CC_STATE_POINTERS 0x780e /* GEN6+ */ #define _3DSTATE_BLEND_STATE_POINTERS 0x7824 /* GEN7+ */ #define _3DSTATE_DEPTH_STENCIL_STATE_POINTERS 0x7825 /* GEN7+ */ #define _3DSTATE_URB 0x7805 /* GEN6 */ # define GEN6_URB_VS_SIZE_SHIFT 16 # define GEN6_URB_VS_ENTRIES_SHIFT 0 # define GEN6_URB_GS_ENTRIES_SHIFT 8 # define GEN6_URB_GS_SIZE_SHIFT 0 #define _3DSTATE_VF 0x780c /* GEN7.5+ */ #define HSW_CUT_INDEX_ENABLE (1 << 8) #define _3DSTATE_URB_VS 0x7830 /* GEN7+ */ #define _3DSTATE_URB_HS 0x7831 /* GEN7+ */ #define _3DSTATE_URB_DS 0x7832 /* GEN7+ */ #define _3DSTATE_URB_GS 0x7833 /* GEN7+ */ # define GEN7_URB_ENTRY_SIZE_SHIFT 16 # define GEN7_URB_STARTING_ADDRESS_SHIFT 25 #define _3DSTATE_PUSH_CONSTANT_ALLOC_VS 0x7912 /* GEN7+ */ #define _3DSTATE_PUSH_CONSTANT_ALLOC_PS 0x7916 /* GEN7+ */ # define GEN7_PUSH_CONSTANT_BUFFER_OFFSET_SHIFT 16 #define _3DSTATE_VIEWPORT_STATE_POINTERS 0x780d /* GEN6+ */ # define GEN6_CC_VIEWPORT_MODIFY (1 << 12) # define GEN6_SF_VIEWPORT_MODIFY (1 << 11) # define GEN6_CLIP_VIEWPORT_MODIFY (1 << 10) #define _3DSTATE_VIEWPORT_STATE_POINTERS_CC 0x7823 /* GEN7+ */ #define _3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL 0x7821 /* GEN7+ */ #define _3DSTATE_SCISSOR_STATE_POINTERS 0x780f /* GEN6+ */ #define _3DSTATE_VS 0x7810 /* GEN6+ */ /* DW2 */ # define GEN6_VS_SPF_MODE (1 << 31) # define GEN6_VS_VECTOR_MASK_ENABLE (1 << 30) # define GEN6_VS_SAMPLER_COUNT_SHIFT 27 # define GEN6_VS_BINDING_TABLE_ENTRY_COUNT_SHIFT 18 # define GEN6_VS_FLOATING_POINT_MODE_IEEE_754 (0 << 16) # define GEN6_VS_FLOATING_POINT_MODE_ALT (1 << 16) /* DW4 */ # define GEN6_VS_DISPATCH_START_GRF_SHIFT 20 # define GEN6_VS_URB_READ_LENGTH_SHIFT 11 # define GEN6_VS_URB_ENTRY_READ_OFFSET_SHIFT 4 /* DW5 */ # define GEN6_VS_MAX_THREADS_SHIFT 25 # define HSW_VS_MAX_THREADS_SHIFT 23 # define GEN6_VS_STATISTICS_ENABLE (1 << 10) # define GEN6_VS_CACHE_DISABLE (1 << 1) # define GEN6_VS_ENABLE (1 << 0) #define _3DSTATE_GS 0x7811 /* GEN6+ */ /* DW2 */ # define GEN6_GS_SPF_MODE (1 << 31) # define GEN6_GS_VECTOR_MASK_ENABLE (1 << 30) # define GEN6_GS_SAMPLER_COUNT_SHIFT 27 # define GEN6_GS_BINDING_TABLE_ENTRY_COUNT_SHIFT 18 # define GEN6_GS_FLOATING_POINT_MODE_IEEE_754 (0 << 16) # define GEN6_GS_FLOATING_POINT_MODE_ALT (1 << 16) /* DW4 */ # define GEN6_GS_URB_READ_LENGTH_SHIFT 11 # define GEN7_GS_INCLUDE_VERTEX_HANDLES (1 << 10) # define GEN6_GS_URB_ENTRY_READ_OFFSET_SHIFT 4 # define GEN6_GS_DISPATCH_START_GRF_SHIFT 0 /* DW5 */ # define GEN6_GS_MAX_THREADS_SHIFT 25 # define GEN6_GS_STATISTICS_ENABLE (1 << 10) # define GEN6_GS_SO_STATISTICS_ENABLE (1 << 9) # define GEN6_GS_RENDERING_ENABLE (1 << 8) # define GEN7_GS_ENABLE (1 << 0) /* DW6 */ # define GEN6_GS_REORDER (1 << 30) # define GEN6_GS_DISCARD_ADJACENCY (1 << 29) # define GEN6_GS_SVBI_PAYLOAD_ENABLE (1 << 28) # define GEN6_GS_SVBI_POSTINCREMENT_ENABLE (1 << 27) # define GEN6_GS_SVBI_POSTINCREMENT_VALUE_SHIFT 16 # define GEN6_GS_SVBI_POSTINCREMENT_VALUE_MASK INTEL_MASK(25, 16) # define GEN6_GS_ENABLE (1 << 15) # define BRW_GS_EDGE_INDICATOR_0 (1 << 8) # define BRW_GS_EDGE_INDICATOR_1 (1 << 9) #define _3DSTATE_HS 0x781B /* GEN7+ */ #define _3DSTATE_TE 0x781C /* GEN7+ */ #define _3DSTATE_DS 0x781D /* GEN7+ */ #define _3DSTATE_CLIP 0x7812 /* GEN6+ */ /* DW1 */ # define GEN7_CLIP_WINDING_CW (0 << 20) # define GEN7_CLIP_WINDING_CCW (1 << 20) # define GEN7_CLIP_VERTEX_SUBPIXEL_PRECISION_8 (0 << 19) # define GEN7_CLIP_VERTEX_SUBPIXEL_PRECISION_4 (1 << 19) # define GEN7_CLIP_EARLY_CULL (1 << 18) # define GEN7_CLIP_CULLMODE_BOTH (0 << 16) # define GEN7_CLIP_CULLMODE_NONE (1 << 16) # define GEN7_CLIP_CULLMODE_FRONT (2 << 16) # define GEN7_CLIP_CULLMODE_BACK (3 << 16) # define GEN6_CLIP_STATISTICS_ENABLE (1 << 10) /** * Just does cheap culling based on the clip distance. Bits must be * disjoint with USER_CLIP_CLIP_DISTANCE bits. */ # define GEN6_USER_CLIP_CULL_DISTANCES_SHIFT 0 /* DW2 */ # define GEN6_CLIP_ENABLE (1 << 31) # define GEN6_CLIP_API_OGL (0 << 30) # define GEN6_CLIP_API_D3D (1 << 30) # define GEN6_CLIP_XY_TEST (1 << 28) # define GEN6_CLIP_Z_TEST (1 << 27) # define GEN6_CLIP_GB_TEST (1 << 26) /** 8-bit field of which user clip distances to clip aganist. */ # define GEN6_USER_CLIP_CLIP_DISTANCES_SHIFT 16 # define GEN6_CLIP_MODE_NORMAL (0 << 13) # define GEN6_CLIP_MODE_REJECT_ALL (3 << 13) # define GEN6_CLIP_MODE_ACCEPT_ALL (4 << 13) # define GEN6_CLIP_PERSPECTIVE_DIVIDE_DISABLE (1 << 9) # define GEN6_CLIP_NON_PERSPECTIVE_BARYCENTRIC_ENABLE (1 << 8) # define GEN6_CLIP_TRI_PROVOKE_SHIFT 4 # define GEN6_CLIP_LINE_PROVOKE_SHIFT 2 # define GEN6_CLIP_TRIFAN_PROVOKE_SHIFT 0 /* DW3 */ # define GEN6_CLIP_MIN_POINT_WIDTH_SHIFT 17 # define GEN6_CLIP_MAX_POINT_WIDTH_SHIFT 6 # define GEN6_CLIP_FORCE_ZERO_RTAINDEX (1 << 5) #define _3DSTATE_SF 0x7813 /* GEN6+ */ /* DW1 (for gen6) */ # define GEN6_SF_NUM_OUTPUTS_SHIFT 22 # define GEN6_SF_SWIZZLE_ENABLE (1 << 21) # define GEN6_SF_POINT_SPRITE_UPPERLEFT (0 << 20) # define GEN6_SF_POINT_SPRITE_LOWERLEFT (1 << 20) # define GEN6_SF_URB_ENTRY_READ_LENGTH_SHIFT 11 # define GEN6_SF_URB_ENTRY_READ_OFFSET_SHIFT 4 /* DW2 */ # define GEN6_SF_LEGACY_GLOBAL_DEPTH_BIAS (1 << 11) # define GEN6_SF_STATISTICS_ENABLE (1 << 10) # define GEN6_SF_GLOBAL_DEPTH_OFFSET_SOLID (1 << 9) # define GEN6_SF_GLOBAL_DEPTH_OFFSET_WIREFRAME (1 << 8) # define GEN6_SF_GLOBAL_DEPTH_OFFSET_POINT (1 << 7) # define GEN6_SF_FRONT_SOLID (0 << 5) # define GEN6_SF_FRONT_WIREFRAME (1 << 5) # define GEN6_SF_FRONT_POINT (2 << 5) # define GEN6_SF_BACK_SOLID (0 << 3) # define GEN6_SF_BACK_WIREFRAME (1 << 3) # define GEN6_SF_BACK_POINT (2 << 3) # define GEN6_SF_VIEWPORT_TRANSFORM_ENABLE (1 << 1) # define GEN6_SF_WINDING_CCW (1 << 0) /* DW3 */ # define GEN6_SF_LINE_AA_ENABLE (1 << 31) # define GEN6_SF_CULL_BOTH (0 << 29) # define GEN6_SF_CULL_NONE (1 << 29) # define GEN6_SF_CULL_FRONT (2 << 29) # define GEN6_SF_CULL_BACK (3 << 29) # define GEN6_SF_LINE_WIDTH_SHIFT 18 /* U3.7 */ # define GEN6_SF_LINE_END_CAP_WIDTH_0_5 (0 << 16) # define GEN6_SF_LINE_END_CAP_WIDTH_1_0 (1 << 16) # define GEN6_SF_LINE_END_CAP_WIDTH_2_0 (2 << 16) # define GEN6_SF_LINE_END_CAP_WIDTH_4_0 (3 << 16) # define GEN6_SF_SCISSOR_ENABLE (1 << 11) # define GEN6_SF_MSRAST_OFF_PIXEL (0 << 8) # define GEN6_SF_MSRAST_OFF_PATTERN (1 << 8) # define GEN6_SF_MSRAST_ON_PIXEL (2 << 8) # define GEN6_SF_MSRAST_ON_PATTERN (3 << 8) /* DW4 */ # define GEN6_SF_TRI_PROVOKE_SHIFT 29 # define GEN6_SF_LINE_PROVOKE_SHIFT 27 # define GEN6_SF_TRIFAN_PROVOKE_SHIFT 25 # define GEN6_SF_LINE_AA_MODE_MANHATTAN (0 << 14) # define GEN6_SF_LINE_AA_MODE_TRUE (1 << 14) # define GEN6_SF_VERTEX_SUBPIXEL_8BITS (0 << 12) # define GEN6_SF_VERTEX_SUBPIXEL_4BITS (1 << 12) # define GEN6_SF_USE_STATE_POINT_WIDTH (1 << 11) # define GEN6_SF_POINT_WIDTH_SHIFT 0 /* U8.3 */ /* DW5: depth offset constant */ /* DW6: depth offset scale */ /* DW7: depth offset clamp */ /* DW8 */ # define ATTRIBUTE_1_OVERRIDE_W (1 << 31) # define ATTRIBUTE_1_OVERRIDE_Z (1 << 30) # define ATTRIBUTE_1_OVERRIDE_Y (1 << 29) # define ATTRIBUTE_1_OVERRIDE_X (1 << 28) # define ATTRIBUTE_1_CONST_SOURCE_SHIFT 25 # define ATTRIBUTE_1_SWIZZLE_SHIFT 22 # define ATTRIBUTE_1_SOURCE_SHIFT 16 # define ATTRIBUTE_0_OVERRIDE_W (1 << 15) # define ATTRIBUTE_0_OVERRIDE_Z (1 << 14) # define ATTRIBUTE_0_OVERRIDE_Y (1 << 13) # define ATTRIBUTE_0_OVERRIDE_X (1 << 12) # define ATTRIBUTE_0_CONST_SOURCE_SHIFT 9 # define ATTRIBUTE_0_SWIZZLE_SHIFT 6 # define ATTRIBUTE_0_SOURCE_SHIFT 0 # define ATTRIBUTE_SWIZZLE_INPUTATTR 0 # define ATTRIBUTE_SWIZZLE_INPUTATTR_FACING 1 # define ATTRIBUTE_SWIZZLE_INPUTATTR_W 2 # define ATTRIBUTE_SWIZZLE_INPUTATTR_FACING_W 3 # define ATTRIBUTE_SWIZZLE_SHIFT 6 /* DW16: Point sprite texture coordinate enables */ /* DW17: Constant interpolation enables */ /* DW18: attr 0-7 wrap shortest enables */ /* DW19: attr 8-16 wrap shortest enables */ /* On GEN7, many fields of 3DSTATE_SF were split out into a new command: * 3DSTATE_SBE. The remaining fields live in different DWords, but retain * the same bit-offset. The only new field: */ /* GEN7/DW1: */ # define GEN7_SF_DEPTH_BUFFER_SURFACE_FORMAT_SHIFT 12 /* GEN7/DW2: */ # define HSW_SF_LINE_STIPPLE_ENABLE 14 #define _3DSTATE_SBE 0x781F /* GEN7+ */ /* DW1 */ # define GEN7_SBE_SWIZZLE_CONTROL_MODE (1 << 28) # define GEN7_SBE_NUM_OUTPUTS_SHIFT 22 # define GEN7_SBE_SWIZZLE_ENABLE (1 << 21) # define GEN7_SBE_POINT_SPRITE_LOWERLEFT (1 << 20) # define GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT 11 # define GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT 4 /* DW2-9: Attribute setup (same as DW8-15 of gen6 _3DSTATE_SF) */ /* DW10: Point sprite texture coordinate enables */ /* DW11: Constant interpolation enables */ /* DW12: attr 0-7 wrap shortest enables */ /* DW13: attr 8-16 wrap shortest enables */ enum brw_wm_barycentric_interp_mode { BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC = 0, BRW_WM_PERSPECTIVE_CENTROID_BARYCENTRIC = 1, BRW_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC = 2, BRW_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC = 3, BRW_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC = 4, BRW_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC = 5, BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT = 6 }; #define BRW_WM_NONPERSPECTIVE_BARYCENTRIC_BITS \ ((1 << BRW_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC) | \ (1 << BRW_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC) | \ (1 << BRW_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC)) #define _3DSTATE_WM 0x7814 /* GEN6+ */ /* DW1: kernel pointer */ /* DW2 */ # define GEN6_WM_SPF_MODE (1 << 31) # define GEN6_WM_VECTOR_MASK_ENABLE (1 << 30) # define GEN6_WM_SAMPLER_COUNT_SHIFT 27 # define GEN6_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT 18 # define GEN6_WM_FLOATING_POINT_MODE_IEEE_754 (0 << 16) # define GEN6_WM_FLOATING_POINT_MODE_ALT (1 << 16) /* DW3: scratch space */ /* DW4 */ # define GEN6_WM_STATISTICS_ENABLE (1 << 31) # define GEN6_WM_DEPTH_CLEAR (1 << 30) # define GEN6_WM_DEPTH_RESOLVE (1 << 28) # define GEN6_WM_HIERARCHICAL_DEPTH_RESOLVE (1 << 27) # define GEN6_WM_DISPATCH_START_GRF_SHIFT_0 16 # define GEN6_WM_DISPATCH_START_GRF_SHIFT_1 8 # define GEN6_WM_DISPATCH_START_GRF_SHIFT_2 0 /* DW5 */ # define GEN6_WM_MAX_THREADS_SHIFT 25 # define GEN6_WM_KILL_ENABLE (1 << 22) # define GEN6_WM_COMPUTED_DEPTH (1 << 21) # define GEN6_WM_USES_SOURCE_DEPTH (1 << 20) # define GEN6_WM_DISPATCH_ENABLE (1 << 19) # define GEN6_WM_LINE_END_CAP_AA_WIDTH_0_5 (0 << 16) # define GEN6_WM_LINE_END_CAP_AA_WIDTH_1_0 (1 << 16) # define GEN6_WM_LINE_END_CAP_AA_WIDTH_2_0 (2 << 16) # define GEN6_WM_LINE_END_CAP_AA_WIDTH_4_0 (3 << 16) # define GEN6_WM_LINE_AA_WIDTH_0_5 (0 << 14) # define GEN6_WM_LINE_AA_WIDTH_1_0 (1 << 14) # define GEN6_WM_LINE_AA_WIDTH_2_0 (2 << 14) # define GEN6_WM_LINE_AA_WIDTH_4_0 (3 << 14) # define GEN6_WM_POLYGON_STIPPLE_ENABLE (1 << 13) # define GEN6_WM_LINE_STIPPLE_ENABLE (1 << 11) # define GEN6_WM_OMASK_TO_RENDER_TARGET (1 << 9) # define GEN6_WM_USES_SOURCE_W (1 << 8) # define GEN6_WM_DUAL_SOURCE_BLEND_ENABLE (1 << 7) # define GEN6_WM_32_DISPATCH_ENABLE (1 << 2) # define GEN6_WM_16_DISPATCH_ENABLE (1 << 1) # define GEN6_WM_8_DISPATCH_ENABLE (1 << 0) /* DW6 */ # define GEN6_WM_NUM_SF_OUTPUTS_SHIFT 20 # define GEN6_WM_POSOFFSET_NONE (0 << 18) # define GEN6_WM_POSOFFSET_CENTROID (2 << 18) # define GEN6_WM_POSOFFSET_SAMPLE (3 << 18) # define GEN6_WM_POSITION_ZW_PIXEL (0 << 16) # define GEN6_WM_POSITION_ZW_CENTROID (2 << 16) # define GEN6_WM_POSITION_ZW_SAMPLE (3 << 16) # define GEN6_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 15) # define GEN6_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC (1 << 14) # define GEN6_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC (1 << 13) # define GEN6_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 12) # define GEN6_WM_PERSPECTIVE_CENTROID_BARYCENTRIC (1 << 11) # define GEN6_WM_PERSPECTIVE_PIXEL_BARYCENTRIC (1 << 10) # define GEN6_WM_BARYCENTRIC_INTERPOLATION_MODE_SHIFT 10 # define GEN6_WM_POINT_RASTRULE_UPPER_RIGHT (1 << 9) # define GEN6_WM_MSRAST_OFF_PIXEL (0 << 1) # define GEN6_WM_MSRAST_OFF_PATTERN (1 << 1) # define GEN6_WM_MSRAST_ON_PIXEL (2 << 1) # define GEN6_WM_MSRAST_ON_PATTERN (3 << 1) # define GEN6_WM_MSDISPMODE_PERSAMPLE (0 << 0) # define GEN6_WM_MSDISPMODE_PERPIXEL (1 << 0) /* DW7: kernel 1 pointer */ /* DW8: kernel 2 pointer */ #define _3DSTATE_CONSTANT_VS 0x7815 /* GEN6+ */ #define _3DSTATE_CONSTANT_GS 0x7816 /* GEN6+ */ #define _3DSTATE_CONSTANT_PS 0x7817 /* GEN6+ */ # define GEN6_CONSTANT_BUFFER_3_ENABLE (1 << 15) # define GEN6_CONSTANT_BUFFER_2_ENABLE (1 << 14) # define GEN6_CONSTANT_BUFFER_1_ENABLE (1 << 13) # define GEN6_CONSTANT_BUFFER_0_ENABLE (1 << 12) #define _3DSTATE_CONSTANT_HS 0x7819 /* GEN7+ */ #define _3DSTATE_CONSTANT_DS 0x781A /* GEN7+ */ #define _3DSTATE_STREAMOUT 0x781e /* GEN7+ */ /* DW1 */ # define SO_FUNCTION_ENABLE (1 << 31) # define SO_RENDERING_DISABLE (1 << 30) /* This selects which incoming rendering stream goes down the pipeline. The * rendering stream is 0 if not defined by special cases in the GS state. */ # define SO_RENDER_STREAM_SELECT_SHIFT 27 # define SO_RENDER_STREAM_SELECT_MASK INTEL_MASK(28, 27) /* Controls reordering of TRISTRIP_* elements in stream output (not rendering). */ # define SO_REORDER_TRAILING (1 << 26) /* Controls SO_NUM_PRIMS_WRITTEN_* and SO_PRIM_STORAGE_* */ # define SO_STATISTICS_ENABLE (1 << 25) # define SO_BUFFER_ENABLE(n) (1 << (8 + (n))) /* DW2 */ # define SO_STREAM_3_VERTEX_READ_OFFSET_SHIFT 29 # define SO_STREAM_3_VERTEX_READ_OFFSET_MASK INTEL_MASK(29, 29) # define SO_STREAM_3_VERTEX_READ_LENGTH_SHIFT 24 # define SO_STREAM_3_VERTEX_READ_LENGTH_MASK INTEL_MASK(28, 24) # define SO_STREAM_2_VERTEX_READ_OFFSET_SHIFT 21 # define SO_STREAM_2_VERTEX_READ_OFFSET_MASK INTEL_MASK(21, 21) # define SO_STREAM_2_VERTEX_READ_LENGTH_SHIFT 16 # define SO_STREAM_2_VERTEX_READ_LENGTH_MASK INTEL_MASK(20, 16) # define SO_STREAM_1_VERTEX_READ_OFFSET_SHIFT 13 # define SO_STREAM_1_VERTEX_READ_OFFSET_MASK INTEL_MASK(13, 13) # define SO_STREAM_1_VERTEX_READ_LENGTH_SHIFT 8 # define SO_STREAM_1_VERTEX_READ_LENGTH_MASK INTEL_MASK(12, 8) # define SO_STREAM_0_VERTEX_READ_OFFSET_SHIFT 5 # define SO_STREAM_0_VERTEX_READ_OFFSET_MASK INTEL_MASK(5, 5) # define SO_STREAM_0_VERTEX_READ_LENGTH_SHIFT 0 # define SO_STREAM_0_VERTEX_READ_LENGTH_MASK INTEL_MASK(4, 0) /* 3DSTATE_WM for Gen7 */ /* DW1 */ # define GEN7_WM_STATISTICS_ENABLE (1 << 31) # define GEN7_WM_DEPTH_CLEAR (1 << 30) # define GEN7_WM_DISPATCH_ENABLE (1 << 29) # define GEN7_WM_DEPTH_RESOLVE (1 << 28) # define GEN7_WM_HIERARCHICAL_DEPTH_RESOLVE (1 << 27) # define GEN7_WM_KILL_ENABLE (1 << 25) # define GEN7_WM_PSCDEPTH_OFF (0 << 23) # define GEN7_WM_PSCDEPTH_ON (1 << 23) # define GEN7_WM_PSCDEPTH_ON_GE (2 << 23) # define GEN7_WM_PSCDEPTH_ON_LE (3 << 23) # define GEN7_WM_USES_SOURCE_DEPTH (1 << 20) # define GEN7_WM_USES_SOURCE_W (1 << 19) # define GEN7_WM_POSITION_ZW_PIXEL (0 << 17) # define GEN7_WM_POSITION_ZW_CENTROID (2 << 17) # define GEN7_WM_POSITION_ZW_SAMPLE (3 << 17) # define GEN7_WM_BARYCENTRIC_INTERPOLATION_MODE_SHIFT 11 # define GEN7_WM_USES_INPUT_COVERAGE_MASK (1 << 10) # define GEN7_WM_LINE_END_CAP_AA_WIDTH_0_5 (0 << 8) # define GEN7_WM_LINE_END_CAP_AA_WIDTH_1_0 (1 << 8) # define GEN7_WM_LINE_END_CAP_AA_WIDTH_2_0 (2 << 8) # define GEN7_WM_LINE_END_CAP_AA_WIDTH_4_0 (3 << 8) # define GEN7_WM_LINE_AA_WIDTH_0_5 (0 << 6) # define GEN7_WM_LINE_AA_WIDTH_1_0 (1 << 6) # define GEN7_WM_LINE_AA_WIDTH_2_0 (2 << 6) # define GEN7_WM_LINE_AA_WIDTH_4_0 (3 << 6) # define GEN7_WM_POLYGON_STIPPLE_ENABLE (1 << 4) # define GEN7_WM_LINE_STIPPLE_ENABLE (1 << 3) # define GEN7_WM_POINT_RASTRULE_UPPER_RIGHT (1 << 2) # define GEN7_WM_MSRAST_OFF_PIXEL (0 << 0) # define GEN7_WM_MSRAST_OFF_PATTERN (1 << 0) # define GEN7_WM_MSRAST_ON_PIXEL (2 << 0) # define GEN7_WM_MSRAST_ON_PATTERN (3 << 0) /* DW2 */ # define GEN7_WM_MSDISPMODE_PERSAMPLE (0 << 31) # define GEN7_WM_MSDISPMODE_PERPIXEL (1 << 31) #define _3DSTATE_PS 0x7820 /* GEN7+ */ /* DW1: kernel pointer */ /* DW2 */ # define GEN7_PS_SPF_MODE (1 << 31) # define GEN7_PS_VECTOR_MASK_ENABLE (1 << 30) # define GEN7_PS_SAMPLER_COUNT_SHIFT 27 # define GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT 18 # define GEN7_PS_FLOATING_POINT_MODE_IEEE_754 (0 << 16) # define GEN7_PS_FLOATING_POINT_MODE_ALT (1 << 16) /* DW3: scratch space */ /* DW4 */ # define IVB_PS_MAX_THREADS_SHIFT 24 # define HSW_PS_MAX_THREADS_SHIFT 23 # define HSW_PS_SAMPLE_MASK_SHIFT 12 # define HSW_PS_SAMPLE_MASK_MASK INTEL_MASK(19, 12) # define GEN7_PS_PUSH_CONSTANT_ENABLE (1 << 11) # define GEN7_PS_ATTRIBUTE_ENABLE (1 << 10) # define GEN7_PS_OMASK_TO_RENDER_TARGET (1 << 9) # define GEN7_PS_DUAL_SOURCE_BLEND_ENABLE (1 << 7) # define GEN7_PS_POSOFFSET_NONE (0 << 3) # define GEN7_PS_POSOFFSET_CENTROID (2 << 3) # define GEN7_PS_POSOFFSET_SAMPLE (3 << 3) # define GEN7_PS_32_DISPATCH_ENABLE (1 << 2) # define GEN7_PS_16_DISPATCH_ENABLE (1 << 1) # define GEN7_PS_8_DISPATCH_ENABLE (1 << 0) /* DW5 */ # define GEN7_PS_DISPATCH_START_GRF_SHIFT_0 16 # define GEN7_PS_DISPATCH_START_GRF_SHIFT_1 8 # define GEN7_PS_DISPATCH_START_GRF_SHIFT_2 0 /* DW6: kernel 1 pointer */ /* DW7: kernel 2 pointer */ #define _3DSTATE_SAMPLE_MASK 0x7818 /* GEN6+ */ #define _3DSTATE_DRAWING_RECTANGLE 0x7900 #define _3DSTATE_BLEND_CONSTANT_COLOR 0x7901 #define _3DSTATE_CHROMA_KEY 0x7904 #define _3DSTATE_DEPTH_BUFFER 0x7905 /* GEN4-6 */ #define _3DSTATE_POLY_STIPPLE_OFFSET 0x7906 #define _3DSTATE_POLY_STIPPLE_PATTERN 0x7907 #define _3DSTATE_LINE_STIPPLE_PATTERN 0x7908 #define _3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP 0x7909 #define _3DSTATE_AA_LINE_PARAMETERS 0x790a /* G45+ */ #define _3DSTATE_GS_SVB_INDEX 0x790b /* CTG+ */ /* DW1 */ # define SVB_INDEX_SHIFT 29 # define SVB_LOAD_INTERNAL_VERTEX_COUNT (1 << 0) /* SNB+ */ /* DW2: SVB index */ /* DW3: SVB maximum index */ #define _3DSTATE_MULTISAMPLE 0x790d /* GEN6+ */ /* DW1 */ # define MS_PIXEL_LOCATION_CENTER (0 << 4) # define MS_PIXEL_LOCATION_UPPER_LEFT (1 << 4) # define MS_NUMSAMPLES_1 (0 << 1) # define MS_NUMSAMPLES_4 (2 << 1) # define MS_NUMSAMPLES_8 (3 << 1) #define _3DSTATE_STENCIL_BUFFER 0x790e /* ILK, SNB */ #define _3DSTATE_HIER_DEPTH_BUFFER 0x790f /* ILK, SNB */ #define GEN7_3DSTATE_CLEAR_PARAMS 0x7804 #define GEN7_3DSTATE_DEPTH_BUFFER 0x7805 #define GEN7_3DSTATE_STENCIL_BUFFER 0x7806 # define HSW_STENCIL_ENABLED (1 << 31) #define GEN7_3DSTATE_HIER_DEPTH_BUFFER 0x7807 #define _3DSTATE_CLEAR_PARAMS 0x7910 /* ILK, SNB */ # define GEN5_DEPTH_CLEAR_VALID (1 << 15) /* DW1: depth clear value */ /* DW2 */ # define GEN7_DEPTH_CLEAR_VALID (1 << 0) #define _3DSTATE_SO_DECL_LIST 0x7917 /* GEN7+ */ /* DW1 */ # define SO_STREAM_TO_BUFFER_SELECTS_3_SHIFT 12 # define SO_STREAM_TO_BUFFER_SELECTS_3_MASK INTEL_MASK(15, 12) # define SO_STREAM_TO_BUFFER_SELECTS_2_SHIFT 8 # define SO_STREAM_TO_BUFFER_SELECTS_2_MASK INTEL_MASK(11, 8) # define SO_STREAM_TO_BUFFER_SELECTS_1_SHIFT 4 # define SO_STREAM_TO_BUFFER_SELECTS_1_MASK INTEL_MASK(7, 4) # define SO_STREAM_TO_BUFFER_SELECTS_0_SHIFT 0 # define SO_STREAM_TO_BUFFER_SELECTS_0_MASK INTEL_MASK(3, 0) /* DW2 */ # define SO_NUM_ENTRIES_3_SHIFT 24 # define SO_NUM_ENTRIES_3_MASK INTEL_MASK(31, 24) # define SO_NUM_ENTRIES_2_SHIFT 16 # define SO_NUM_ENTRIES_2_MASK INTEL_MASK(23, 16) # define SO_NUM_ENTRIES_1_SHIFT 8 # define SO_NUM_ENTRIES_1_MASK INTEL_MASK(15, 8) # define SO_NUM_ENTRIES_0_SHIFT 0 # define SO_NUM_ENTRIES_0_MASK INTEL_MASK(7, 0) /* SO_DECL DW0 */ # define SO_DECL_OUTPUT_BUFFER_SLOT_SHIFT 12 # define SO_DECL_OUTPUT_BUFFER_SLOT_MASK INTEL_MASK(13, 12) # define SO_DECL_HOLE_FLAG (1 << 11) # define SO_DECL_REGISTER_INDEX_SHIFT 4 # define SO_DECL_REGISTER_INDEX_MASK INTEL_MASK(9, 4) # define SO_DECL_COMPONENT_MASK_SHIFT 0 # define SO_DECL_COMPONENT_MASK_MASK INTEL_MASK(3, 0) #define _3DSTATE_SO_BUFFER 0x7918 /* GEN7+ */ /* DW1 */ # define SO_BUFFER_INDEX_SHIFT 29 # define SO_BUFFER_INDEX_MASK INTEL_MASK(30, 29) # define SO_BUFFER_PITCH_SHIFT 0 # define SO_BUFFER_PITCH_MASK INTEL_MASK(11, 0) /* DW2: start address */ /* DW3: end address. */ #define CMD_PIPE_CONTROL 0x7a00 #define CMD_MI_FLUSH 0x0200 /* Bitfields for the URB_WRITE message, DW2 of message header: */ #define URB_WRITE_PRIM_END 0x1 #define URB_WRITE_PRIM_START 0x2 #define URB_WRITE_PRIM_TYPE_SHIFT 2 /* Maximum number of entries that can be addressed using a binding table * pointer of type SURFTYPE_BUFFER */ #define BRW_MAX_NUM_BUFFER_ENTRIES (1 << 27) #define EX_DESC_SFID_MASK 0xF #define EX_DESC_EOT_MASK 0x20 #define EX_DESC_FUNC_MASK 0xFFFFFFC0 #endif intel-gpu-tools-1.14/assembler/gram.c0000644000175000017500000072204012665336502014506 00000000000000/* A Bison parser, made by GNU Bison 3.0.4. */ /* Bison implementation for Yacc-like parsers in C Copyright (C) 1984, 1989-1990, 2000-2015 Free Software Foundation, Inc. This program is free software: you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation, either version 3 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program. If not, see . */ /* As a special exception, you may create a larger work that contains part or all of the Bison parser skeleton and distribute that work under terms of your choice, so long as that work isn't itself a parser generator using the skeleton or a modified version thereof as a parser skeleton. Alternatively, if you modify or redistribute the parser skeleton itself, you may (at your option) remove this special exception, which will cause the skeleton and the resulting Bison output files to be licensed under the GNU General Public License without this special exception. This special exception was added by the Free Software Foundation in version 2.2 of Bison. */ /* C LALR(1) parser skeleton written by Richard Stallman, by simplifying the original so-called "semantic" parser. */ /* All symbols defined below should begin with yy or YY, to avoid infringing on user name space. This should be done even for local variables, as they might otherwise be expanded by user macros. There are some unavoidable exceptions within include files to define necessary library symbols; they are noted "INFRINGES ON USER NAME SPACE" below. */ /* Identify Bison output. */ #define YYBISON 1 /* Bison version. */ #define YYBISON_VERSION "3.0.4" /* Skeleton name. */ #define YYSKELETON_NAME "yacc.c" /* Pure parsers. */ #define YYPURE 0 /* Push parsers. */ #define YYPUSH 0 /* Pull parsers. */ #define YYPULL 1 /* Copy the first part of user declarations. */ #line 1 "gram.y" /* yacc.c:339 */ /* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Eric Anholt * */ #include #include #include #include #include #include #include "gen4asm.h" #include "brw_eu.h" #include "gen8_instruction.h" #define DEFAULT_EXECSIZE (ffs(program_defaults.execute_size) - 1) #define DEFAULT_DSTREGION -1 #define SWIZZLE(reg) (reg.dw1.bits.swizzle) #define GEN(i) (&(i)->insn.gen) #define GEN8(i) (&(i)->insn.gen8) #define YYLTYPE YYLTYPE typedef struct YYLTYPE { int first_line; int first_column; int last_line; int last_column; } YYLTYPE; extern int need_export; static struct src_operand src_null_reg = { .reg.file = BRW_ARCHITECTURE_REGISTER_FILE, .reg.nr = BRW_ARF_NULL, .reg.type = BRW_REGISTER_TYPE_UD, }; static struct brw_reg dst_null_reg = { .file = BRW_ARCHITECTURE_REGISTER_FILE, .nr = BRW_ARF_NULL, }; static struct brw_reg ip_dst = { .file = BRW_ARCHITECTURE_REGISTER_FILE, .nr = BRW_ARF_IP, .type = BRW_REGISTER_TYPE_UD, .address_mode = BRW_ADDRESS_DIRECT, .hstride = 1, .dw1.bits.writemask = BRW_WRITEMASK_XYZW, }; static struct src_operand ip_src = { .reg.file = BRW_ARCHITECTURE_REGISTER_FILE, .reg.nr = BRW_ARF_IP, .reg.type = BRW_REGISTER_TYPE_UD, .reg.address_mode = BRW_ADDRESS_DIRECT, .reg.dw1.bits.swizzle = BRW_SWIZZLE_NOOP, }; static int get_type_size(unsigned type); static void set_instruction_opcode(struct brw_program_instruction *instr, unsigned opcode); static int set_instruction_dest(struct brw_program_instruction *instr, struct brw_reg *dest); static int set_instruction_src0(struct brw_program_instruction *instr, struct src_operand *src, YYLTYPE *location); static int set_instruction_src1(struct brw_program_instruction *instr, struct src_operand *src, YYLTYPE *location); static int set_instruction_dest_three_src(struct brw_program_instruction *instr, struct brw_reg *dest); static int set_instruction_src0_three_src(struct brw_program_instruction *instr, struct src_operand *src); static int set_instruction_src1_three_src(struct brw_program_instruction *instr, struct src_operand *src); static int set_instruction_src2_three_src(struct brw_program_instruction *instr, struct src_operand *src); static void set_instruction_saturate(struct brw_program_instruction *instr, int saturate); static void set_instruction_options(struct brw_program_instruction *instr, struct options options); static void set_instruction_predicate(struct brw_program_instruction *instr, struct predicate *p); static void set_instruction_pred_cond(struct brw_program_instruction *instr, struct predicate *p, struct condition *c, YYLTYPE *location); static void set_direct_dst_operand(struct brw_reg *dst, struct brw_reg *reg, int type); static void set_direct_src_operand(struct src_operand *src, struct brw_reg *reg, int type); void set_branch_two_offsets(struct brw_program_instruction *insn, int jip_offset, int uip_offset); void set_branch_one_offset(struct brw_program_instruction *insn, int jip_offset); enum message_level { WARN, ERROR, }; static void message(enum message_level level, YYLTYPE *location, const char *fmt, ...) { static const char *level_str[] = { "warning", "error" }; va_list args; if (location) fprintf(stderr, "%s:%d:%d: %s: ", input_filename, location->first_line, location->first_column, level_str[level]); else fprintf(stderr, "%s:%s: ", input_filename, level_str[level]); va_start(args, fmt); vfprintf(stderr, fmt, args); va_end(args); } #define warn(flag, l, fmt, ...) \ do { \ if (warning_flags & WARN_ ## flag) \ message(WARN, l, fmt, ## __VA_ARGS__); \ } while(0) #define error(l, fmt, ...) \ do { \ message(ERROR, l, fmt, ## __VA_ARGS__); \ } while(0) /* like strcmp, but handles NULL pointers */ static bool strcmp0(const char *s1, const char* s2) { if (!s1) return -(s1 != s2); if (!s2) return s1 != s2; return strcmp (s1, s2); } static bool region_equal(struct region *r1, struct region *r2) { return memcmp(r1, r2, sizeof(struct region)) == 0; } static bool reg_equal(struct brw_reg *r1, struct brw_reg *r2) { return memcmp(r1, r2, sizeof(struct brw_reg)) == 0; } static bool declared_register_equal(struct declared_register *r1, struct declared_register *r2) { if (strcmp0(r1->name, r2->name) != 0) return false; if (!reg_equal(&r1->reg, &r2->reg)) return false; if (!region_equal(&r1->src_region, &r2->src_region)) return false; if (r1->element_size != r2->element_size || r1->dst_region != r2->dst_region) return false; return true; } static void brw_program_init(struct brw_program *p) { memset(p, 0, sizeof(struct brw_program)); } static void brw_program_append_entry(struct brw_program *p, struct brw_program_instruction *entry) { entry->next = NULL; if (p->last) p->last->next = entry; else p->first = entry; p->last = entry; } static void brw_program_add_instruction(struct brw_program *p, struct brw_program_instruction *instruction) { struct brw_program_instruction *list_entry; list_entry = calloc(sizeof(struct brw_program_instruction), 1); list_entry->type = GEN4ASM_INSTRUCTION_GEN; list_entry->insn.gen = instruction->insn.gen; brw_program_append_entry(p, list_entry); } static void brw_program_add_relocatable(struct brw_program *p, struct brw_program_instruction *instruction) { struct brw_program_instruction *list_entry; list_entry = calloc(sizeof(struct brw_program_instruction), 1); list_entry->type = GEN4ASM_INSTRUCTION_GEN_RELOCATABLE; list_entry->insn.gen = instruction->insn.gen; list_entry->reloc = instruction->reloc; brw_program_append_entry(p, list_entry); } static void brw_program_add_label(struct brw_program *p, const char *label) { struct brw_program_instruction *list_entry; list_entry = calloc(sizeof(struct brw_program_instruction), 1); list_entry->type = GEN4ASM_INSTRUCTION_LABEL; list_entry->insn.label.name = strdup(label); brw_program_append_entry(p, list_entry); } static int resolve_dst_region(struct declared_register *reference, int region) { int resolved = region; if (resolved == DEFAULT_DSTREGION) { if (reference) resolved = reference->dst_region; else resolved = 1; } assert(resolved == 1 || resolved == 2 || resolved == 3); return resolved; } static inline int access_mode(struct brw_program_instruction *insn) { if (IS_GENp(8)) return gen8_access_mode(GEN8(insn)); else return GEN(insn)->header.access_mode; } static inline int exec_size(struct brw_program_instruction *insn) { if (IS_GENp(8)) return gen8_exec_size(GEN8(insn)); else return GEN(insn)->header.execution_size; } static void set_execsize(struct brw_program_instruction *insn, int execsize) { if (IS_GENp(8)) gen8_set_exec_size(GEN8(insn), execsize); else GEN(insn)->header.execution_size = execsize; } static bool validate_dst_reg(struct brw_program_instruction *insn, struct brw_reg *reg) { if (reg->address_mode == BRW_ADDRESS_DIRECT && access_mode(insn) == BRW_ALIGN_1 && reg->dw1.bits.writemask != 0 && reg->dw1.bits.writemask != BRW_WRITEMASK_XYZW) { fprintf(stderr, "error: write mask set in align1 instruction\n"); return false; } if (reg->address_mode == BRW_ADDRESS_REGISTER_INDIRECT_REGISTER && access_mode(insn) == BRW_ALIGN_16) { fprintf(stderr, "error: indirect Dst addr mode in align16 instruction\n"); return false; } return true; } static bool validate_src_reg(struct brw_program_instruction *insn, struct brw_reg reg, YYLTYPE *location) { int hstride_for_reg[] = {0, 1, 2, 4}; int vstride_for_reg[] = {0, 1, 2, 4, 8, 16, 32, 64, 128, 256}; int width_for_reg[] = {1, 2, 4, 8, 16}; int execsize_for_reg[] = {1, 2, 4, 8, 16, 32}; int width, hstride, vstride, execsize; if (reg.file == BRW_IMMEDIATE_VALUE) return true; if (access_mode(insn) == BRW_ALIGN_1 && SWIZZLE(reg) && SWIZZLE(reg) != BRW_SWIZZLE_NOOP) { error(location, "swizzle bits set in align1 instruction\n"); return false; } if (reg.address_mode == BRW_ADDRESS_REGISTER_INDIRECT_REGISTER && access_mode(insn) == BRW_ALIGN_16) { fprintf(stderr, "error: indirect Source addr mode in align16 instruction\n"); return false; } assert(reg.hstride >= 0 && reg.hstride < ARRAY_SIZE(hstride_for_reg)); hstride = hstride_for_reg[reg.hstride]; if (reg.vstride == 0xf) { vstride = -1; } else { assert(reg.vstride >= 0 && reg.vstride < ARRAY_SIZE(vstride_for_reg)); vstride = vstride_for_reg[reg.vstride]; } assert(reg.width >= 0 && reg.width < ARRAY_SIZE(width_for_reg)); width = width_for_reg[reg.width]; assert(exec_size(insn) >= 0 && exec_size(insn) < ARRAY_SIZE(execsize_for_reg)); execsize = execsize_for_reg[exec_size(insn)]; /* Register Region Restrictions */ /* B. If ExecSize = Width and HorzStride ≠ 0, VertStride must be set to * Width * HorzStride. */ if (execsize == width && hstride != 0) { if (vstride != -1 && vstride != width * hstride) warn(ALL, location, "execution size == width and hstride != 0 but " "vstride is not width * hstride\n"); } /* D. If Width = 1, HorzStride must be 0 regardless of the values of * ExecSize and VertStride. * * FIXME: In "advanced mode" hstride is set to 1, this is probably a bug * to fix, but it changes the generated opcodes and thus needs validation. */ if (width == 1 && hstride != 0) warn(ALL, location, "region width is 1 but horizontal stride is %d " " (should be 0)\n", hstride); /* E. If ExecSize = Width = 1, both VertStride and HorzStride must be 0. * This defines a scalar. */ if (execsize == 1 && width == 1) { if (hstride != 0) warn(ALL, location, "execution size and region width are 1 but " "horizontal stride is %d (should be 0)\n", hstride); if (vstride != 0) warn(ALL, location, "execution size and region width are 1 but " "vertical stride is %d (should be 0)\n", vstride); } return true; } static int get_subreg_address(unsigned regfile, unsigned type, unsigned subreg, unsigned address_mode) { int unit_size = 1; assert(address_mode == BRW_ADDRESS_DIRECT); assert(regfile != BRW_IMMEDIATE_VALUE); if (advanced_flag) unit_size = get_type_size(type); return subreg * unit_size; } /* only used in indirect address mode. * input: sub-register number of an address register * output: the value of AddrSubRegNum in the instruction binary code * * input output(advanced_flag==0) output(advanced_flag==1) * a0.0 0 0 * a0.1 invalid input 1 * a0.2 1 2 * a0.3 invalid input 3 * a0.4 2 4 * a0.5 invalid input 5 * a0.6 3 6 * a0.7 invalid input 7 * a0.8 4 invalid input * a0.10 5 invalid input * a0.12 6 invalid input * a0.14 7 invalid input */ static int get_indirect_subreg_address(unsigned subreg) { return advanced_flag == 0 ? subreg / 2 : subreg; } static void resolve_subnr(struct brw_reg *reg) { if (reg->file == BRW_IMMEDIATE_VALUE) return; if (reg->address_mode == BRW_ADDRESS_DIRECT) reg->subnr = get_subreg_address(reg->file, reg->type, reg->subnr, reg->address_mode); else reg->subnr = get_indirect_subreg_address(reg->subnr); } #line 499 "gram.c" /* yacc.c:339 */ # ifndef YY_NULLPTR # if defined __cplusplus && 201103L <= __cplusplus # define YY_NULLPTR nullptr # else # define YY_NULLPTR 0 # endif # endif /* Enabling verbose error messages. */ #ifdef YYERROR_VERBOSE # undef YYERROR_VERBOSE # define YYERROR_VERBOSE 1 #else # define YYERROR_VERBOSE 0 #endif /* In a future release of Bison, this section will be replaced by #include "y.tab.h". */ #ifndef YY_YY_GRAM_H_INCLUDED # define YY_YY_GRAM_H_INCLUDED /* Debug traces. */ #ifndef YYDEBUG # define YYDEBUG 0 #endif #if YYDEBUG extern int yydebug; #endif /* Token type. */ #ifndef YYTOKENTYPE # define YYTOKENTYPE enum yytokentype { COLON = 258, SEMICOLON = 259, LPAREN = 260, RPAREN = 261, LANGLE = 262, RANGLE = 263, LCURLY = 264, RCURLY = 265, LSQUARE = 266, RSQUARE = 267, COMMA = 268, EQ = 269, ABS = 270, DOT = 271, PLUS = 272, MINUS = 273, MULTIPLY = 274, DIVIDE = 275, TYPE_UD = 276, TYPE_D = 277, TYPE_UW = 278, TYPE_W = 279, TYPE_UB = 280, TYPE_B = 281, TYPE_VF = 282, TYPE_HF = 283, TYPE_V = 284, TYPE_F = 285, ALIGN1 = 286, ALIGN16 = 287, SECHALF = 288, COMPR = 289, SWITCH = 290, ATOMIC = 291, NODDCHK = 292, NODDCLR = 293, MASK_DISABLE = 294, BREAKPOINT = 295, ACCWRCTRL = 296, EOT = 297, SEQ = 298, ANY2H = 299, ALL2H = 300, ANY4H = 301, ALL4H = 302, ANY8H = 303, ALL8H = 304, ANY16H = 305, ALL16H = 306, ANYV = 307, ALLV = 308, ZERO = 309, EQUAL = 310, NOT_ZERO = 311, NOT_EQUAL = 312, GREATER = 313, GREATER_EQUAL = 314, LESS = 315, LESS_EQUAL = 316, ROUND_INCREMENT = 317, OVERFLOW = 318, UNORDERED = 319, GENREG = 320, MSGREG = 321, ADDRESSREG = 322, ACCREG = 323, FLAGREG = 324, MASKREG = 325, AMASK = 326, IMASK = 327, LMASK = 328, CMASK = 329, MASKSTACKREG = 330, LMS = 331, IMS = 332, MASKSTACKDEPTHREG = 333, IMSD = 334, LMSD = 335, NOTIFYREG = 336, STATEREG = 337, CONTROLREG = 338, IPREG = 339, GENREGFILE = 340, MSGREGFILE = 341, MOV = 342, FRC = 343, RNDU = 344, RNDD = 345, RNDE = 346, RNDZ = 347, NOT = 348, LZD = 349, MUL = 350, MAC = 351, MACH = 352, LINE = 353, SAD2 = 354, SADA2 = 355, DP4 = 356, DPH = 357, DP3 = 358, DP2 = 359, AVG = 360, ADD = 361, SEL = 362, AND = 363, OR = 364, XOR = 365, SHR = 366, SHL = 367, ASR = 368, CMP = 369, CMPN = 370, PLN = 371, ADDC = 372, BFI1 = 373, BFREV = 374, CBIT = 375, F16TO32 = 376, F32TO16 = 377, FBH = 378, FBL = 379, SEND = 380, SENDC = 381, NOP = 382, JMPI = 383, IF = 384, IFF = 385, WHILE = 386, ELSE = 387, BREAK = 388, CONT = 389, HALT = 390, MSAVE = 391, PUSH = 392, MREST = 393, POP = 394, WAIT = 395, DO = 396, ENDIF = 397, ILLEGAL = 398, MATH_INST = 399, MAD = 400, LRP = 401, BFE = 402, BFI2 = 403, SUBB = 404, CALL = 405, RET = 406, BRD = 407, BRC = 408, NULL_TOKEN = 409, MATH = 410, SAMPLER = 411, GATEWAY = 412, READ = 413, WRITE = 414, URB = 415, THREAD_SPAWNER = 416, VME = 417, DATA_PORT = 418, CRE = 419, MSGLEN = 420, RETURNLEN = 421, ALLOCATE = 422, USED = 423, COMPLETE = 424, TRANSPOSE = 425, INTERLEAVE = 426, SATURATE = 427, INTEGER = 428, STRING = 429, NUMBER = 430, INV = 431, LOG = 432, EXP = 433, SQRT = 434, RSQ = 435, POW = 436, SIN = 437, COS = 438, SINCOS = 439, INTDIV = 440, INTMOD = 441, INTDIVMOD = 442, SIGNED = 443, SCALAR = 444, X = 445, Y = 446, Z = 447, W = 448, KERNEL_PRAGMA = 449, END_KERNEL_PRAGMA = 450, CODE_PRAGMA = 451, END_CODE_PRAGMA = 452, REG_COUNT_PAYLOAD_PRAGMA = 453, REG_COUNT_TOTAL_PRAGMA = 454, DECLARE_PRAGMA = 455, BASE = 456, ELEMENTSIZE = 457, SRCREGION = 458, DSTREGION = 459, TYPE = 460, DEFAULT_EXEC_SIZE_PRAGMA = 461, DEFAULT_REG_TYPE_PRAGMA = 462, SUBREGNUM = 463, SNDOPR = 464, UMINUS = 465, STR_SYMBOL_REG = 466, EMPTEXECSIZE = 467 }; #endif /* Tokens. */ #define COLON 258 #define SEMICOLON 259 #define LPAREN 260 #define RPAREN 261 #define LANGLE 262 #define RANGLE 263 #define LCURLY 264 #define RCURLY 265 #define LSQUARE 266 #define RSQUARE 267 #define COMMA 268 #define EQ 269 #define ABS 270 #define DOT 271 #define PLUS 272 #define MINUS 273 #define MULTIPLY 274 #define DIVIDE 275 #define TYPE_UD 276 #define TYPE_D 277 #define TYPE_UW 278 #define TYPE_W 279 #define TYPE_UB 280 #define TYPE_B 281 #define TYPE_VF 282 #define TYPE_HF 283 #define TYPE_V 284 #define TYPE_F 285 #define ALIGN1 286 #define ALIGN16 287 #define SECHALF 288 #define COMPR 289 #define SWITCH 290 #define ATOMIC 291 #define NODDCHK 292 #define NODDCLR 293 #define MASK_DISABLE 294 #define BREAKPOINT 295 #define ACCWRCTRL 296 #define EOT 297 #define SEQ 298 #define ANY2H 299 #define ALL2H 300 #define ANY4H 301 #define ALL4H 302 #define ANY8H 303 #define ALL8H 304 #define ANY16H 305 #define ALL16H 306 #define ANYV 307 #define ALLV 308 #define ZERO 309 #define EQUAL 310 #define NOT_ZERO 311 #define NOT_EQUAL 312 #define GREATER 313 #define GREATER_EQUAL 314 #define LESS 315 #define LESS_EQUAL 316 #define ROUND_INCREMENT 317 #define OVERFLOW 318 #define UNORDERED 319 #define GENREG 320 #define MSGREG 321 #define ADDRESSREG 322 #define ACCREG 323 #define FLAGREG 324 #define MASKREG 325 #define AMASK 326 #define IMASK 327 #define LMASK 328 #define CMASK 329 #define MASKSTACKREG 330 #define LMS 331 #define IMS 332 #define MASKSTACKDEPTHREG 333 #define IMSD 334 #define LMSD 335 #define NOTIFYREG 336 #define STATEREG 337 #define CONTROLREG 338 #define IPREG 339 #define GENREGFILE 340 #define MSGREGFILE 341 #define MOV 342 #define FRC 343 #define RNDU 344 #define RNDD 345 #define RNDE 346 #define RNDZ 347 #define NOT 348 #define LZD 349 #define MUL 350 #define MAC 351 #define MACH 352 #define LINE 353 #define SAD2 354 #define SADA2 355 #define DP4 356 #define DPH 357 #define DP3 358 #define DP2 359 #define AVG 360 #define ADD 361 #define SEL 362 #define AND 363 #define OR 364 #define XOR 365 #define SHR 366 #define SHL 367 #define ASR 368 #define CMP 369 #define CMPN 370 #define PLN 371 #define ADDC 372 #define BFI1 373 #define BFREV 374 #define CBIT 375 #define F16TO32 376 #define F32TO16 377 #define FBH 378 #define FBL 379 #define SEND 380 #define SENDC 381 #define NOP 382 #define JMPI 383 #define IF 384 #define IFF 385 #define WHILE 386 #define ELSE 387 #define BREAK 388 #define CONT 389 #define HALT 390 #define MSAVE 391 #define PUSH 392 #define MREST 393 #define POP 394 #define WAIT 395 #define DO 396 #define ENDIF 397 #define ILLEGAL 398 #define MATH_INST 399 #define MAD 400 #define LRP 401 #define BFE 402 #define BFI2 403 #define SUBB 404 #define CALL 405 #define RET 406 #define BRD 407 #define BRC 408 #define NULL_TOKEN 409 #define MATH 410 #define SAMPLER 411 #define GATEWAY 412 #define READ 413 #define WRITE 414 #define URB 415 #define THREAD_SPAWNER 416 #define VME 417 #define DATA_PORT 418 #define CRE 419 #define MSGLEN 420 #define RETURNLEN 421 #define ALLOCATE 422 #define USED 423 #define COMPLETE 424 #define TRANSPOSE 425 #define INTERLEAVE 426 #define SATURATE 427 #define INTEGER 428 #define STRING 429 #define NUMBER 430 #define INV 431 #define LOG 432 #define EXP 433 #define SQRT 434 #define RSQ 435 #define POW 436 #define SIN 437 #define COS 438 #define SINCOS 439 #define INTDIV 440 #define INTMOD 441 #define INTDIVMOD 442 #define SIGNED 443 #define SCALAR 444 #define X 445 #define Y 446 #define Z 447 #define W 448 #define KERNEL_PRAGMA 449 #define END_KERNEL_PRAGMA 450 #define CODE_PRAGMA 451 #define END_CODE_PRAGMA 452 #define REG_COUNT_PAYLOAD_PRAGMA 453 #define REG_COUNT_TOTAL_PRAGMA 454 #define DECLARE_PRAGMA 455 #define BASE 456 #define ELEMENTSIZE 457 #define SRCREGION 458 #define DSTREGION 459 #define TYPE 460 #define DEFAULT_EXEC_SIZE_PRAGMA 461 #define DEFAULT_REG_TYPE_PRAGMA 462 #define SUBREGNUM 463 #define SNDOPR 464 #define UMINUS 465 #define STR_SYMBOL_REG 466 #define EMPTEXECSIZE 467 /* Value type. */ #if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED union YYSTYPE { #line 437 "gram.y" /* yacc.c:355 */ char *string; int integer; double number; struct brw_program_instruction instruction; struct brw_program program; struct region region; struct regtype regtype; struct brw_reg reg; struct condition condition; struct predicate predicate; struct options options; struct declared_register symbol_reg; imm32_t imm32; struct src_operand src_operand; #line 981 "gram.c" /* yacc.c:355 */ }; typedef union YYSTYPE YYSTYPE; # define YYSTYPE_IS_TRIVIAL 1 # define YYSTYPE_IS_DECLARED 1 #endif /* Location type. */ #if ! defined YYLTYPE && ! defined YYLTYPE_IS_DECLARED typedef struct YYLTYPE YYLTYPE; struct YYLTYPE { int first_line; int first_column; int last_line; int last_column; }; # define YYLTYPE_IS_DECLARED 1 # define YYLTYPE_IS_TRIVIAL 1 #endif extern YYSTYPE yylval; extern YYLTYPE yylloc; int yyparse (void); #endif /* !YY_YY_GRAM_H_INCLUDED */ /* Copy the second part of user declarations. */ #line 1012 "gram.c" /* yacc.c:358 */ /* Unqualified %code blocks. */ #line 570 "gram.y" /* yacc.c:359 */ #undef error #define error(l, fmt, ...) \ do { \ message(ERROR, l, fmt, ## __VA_ARGS__); \ YYERROR; \ } while(0) static void add_option(struct options *options, int option) { switch (option) { case ALIGN1: options->access_mode = BRW_ALIGN_1; break; case ALIGN16: options->access_mode = BRW_ALIGN_16; break; case SECHALF: options->compression_control |= BRW_COMPRESSION_2NDHALF; break; case COMPR: if (!IS_GENp(6)) options->compression_control |= BRW_COMPRESSION_COMPRESSED; break; case SWITCH: options->thread_control |= BRW_THREAD_SWITCH; break; case ATOMIC: options->thread_control |= BRW_THREAD_ATOMIC; break; case NODDCHK: options->dependency_control |= BRW_DEPENDENCY_NOTCHECKED; break; case NODDCLR: options->dependency_control |= BRW_DEPENDENCY_NOTCLEARED; break; case MASK_DISABLE: options->mask_control = BRW_MASK_DISABLE; break; case BREAKPOINT: options->debug_control = BRW_DEBUG_BREAKPOINT; break; case ACCWRCTRL: options->acc_wr_control = BRW_ACCUMULATOR_WRITE_ENABLE; break; case EOT: options->end_of_thread = 1; break; } } #line 1068 "gram.c" /* yacc.c:359 */ #ifdef short # undef short #endif #ifdef YYTYPE_UINT8 typedef YYTYPE_UINT8 yytype_uint8; #else typedef unsigned char yytype_uint8; #endif #ifdef YYTYPE_INT8 typedef YYTYPE_INT8 yytype_int8; #else typedef signed char yytype_int8; #endif #ifdef YYTYPE_UINT16 typedef YYTYPE_UINT16 yytype_uint16; #else typedef unsigned short int yytype_uint16; #endif #ifdef YYTYPE_INT16 typedef YYTYPE_INT16 yytype_int16; #else typedef short int yytype_int16; #endif #ifndef YYSIZE_T # ifdef __SIZE_TYPE__ # define YYSIZE_T __SIZE_TYPE__ # elif defined size_t # define YYSIZE_T size_t # elif ! defined YYSIZE_T # include /* INFRINGES ON USER NAME SPACE */ # define YYSIZE_T size_t # else # define YYSIZE_T unsigned int # endif #endif #define YYSIZE_MAXIMUM ((YYSIZE_T) -1) #ifndef YY_ # if defined YYENABLE_NLS && YYENABLE_NLS # if ENABLE_NLS # include /* INFRINGES ON USER NAME SPACE */ # define YY_(Msgid) dgettext ("bison-runtime", Msgid) # endif # endif # ifndef YY_ # define YY_(Msgid) Msgid # endif #endif #ifndef YY_ATTRIBUTE # if (defined __GNUC__ \ && (2 < __GNUC__ || (__GNUC__ == 2 && 96 <= __GNUC_MINOR__))) \ || defined __SUNPRO_C && 0x5110 <= __SUNPRO_C # define YY_ATTRIBUTE(Spec) __attribute__(Spec) # else # define YY_ATTRIBUTE(Spec) /* empty */ # endif #endif #ifndef YY_ATTRIBUTE_PURE # define YY_ATTRIBUTE_PURE YY_ATTRIBUTE ((__pure__)) #endif #ifndef YY_ATTRIBUTE_UNUSED # define YY_ATTRIBUTE_UNUSED YY_ATTRIBUTE ((__unused__)) #endif #if !defined _Noreturn \ && (!defined __STDC_VERSION__ || __STDC_VERSION__ < 201112) # if defined _MSC_VER && 1200 <= _MSC_VER # define _Noreturn __declspec (noreturn) # else # define _Noreturn YY_ATTRIBUTE ((__noreturn__)) # endif #endif /* Suppress unused-variable warnings by "using" E. */ #if ! defined lint || defined __GNUC__ # define YYUSE(E) ((void) (E)) #else # define YYUSE(E) /* empty */ #endif #if defined __GNUC__ && 407 <= __GNUC__ * 100 + __GNUC_MINOR__ /* Suppress an incorrect diagnostic about yylval being uninitialized. */ # define YY_IGNORE_MAYBE_UNINITIALIZED_BEGIN \ _Pragma ("GCC diagnostic push") \ _Pragma ("GCC diagnostic ignored \"-Wuninitialized\"")\ _Pragma ("GCC diagnostic ignored \"-Wmaybe-uninitialized\"") # define YY_IGNORE_MAYBE_UNINITIALIZED_END \ _Pragma ("GCC diagnostic pop") #else # define YY_INITIAL_VALUE(Value) Value #endif #ifndef YY_IGNORE_MAYBE_UNINITIALIZED_BEGIN # define YY_IGNORE_MAYBE_UNINITIALIZED_BEGIN # define YY_IGNORE_MAYBE_UNINITIALIZED_END #endif #ifndef YY_INITIAL_VALUE # define YY_INITIAL_VALUE(Value) /* Nothing. */ #endif #if ! defined yyoverflow || YYERROR_VERBOSE /* The parser invokes alloca or malloc; define the necessary symbols. */ # ifdef YYSTACK_USE_ALLOCA # if YYSTACK_USE_ALLOCA # ifdef __GNUC__ # define YYSTACK_ALLOC __builtin_alloca # elif defined __BUILTIN_VA_ARG_INCR # include /* INFRINGES ON USER NAME SPACE */ # elif defined _AIX # define YYSTACK_ALLOC __alloca # elif defined _MSC_VER # include /* INFRINGES ON USER NAME SPACE */ # define alloca _alloca # else # define YYSTACK_ALLOC alloca # if ! defined _ALLOCA_H && ! defined EXIT_SUCCESS # include /* INFRINGES ON USER NAME SPACE */ /* Use EXIT_SUCCESS as a witness for stdlib.h. */ # ifndef EXIT_SUCCESS # define EXIT_SUCCESS 0 # endif # endif # endif # endif # endif # ifdef YYSTACK_ALLOC /* Pacify GCC's 'empty if-body' warning. */ # define YYSTACK_FREE(Ptr) do { /* empty */; } while (0) # ifndef YYSTACK_ALLOC_MAXIMUM /* The OS might guarantee only one guard page at the bottom of the stack, and a page size can be as small as 4096 bytes. So we cannot safely invoke alloca (N) if N exceeds 4096. Use a slightly smaller number to allow for a few compiler-allocated temporary stack slots. */ # define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2006 */ # endif # else # define YYSTACK_ALLOC YYMALLOC # define YYSTACK_FREE YYFREE # ifndef YYSTACK_ALLOC_MAXIMUM # define YYSTACK_ALLOC_MAXIMUM YYSIZE_MAXIMUM # endif # if (defined __cplusplus && ! defined EXIT_SUCCESS \ && ! ((defined YYMALLOC || defined malloc) \ && (defined YYFREE || defined free))) # include /* INFRINGES ON USER NAME SPACE */ # ifndef EXIT_SUCCESS # define EXIT_SUCCESS 0 # endif # endif # ifndef YYMALLOC # define YYMALLOC malloc # if ! defined malloc && ! defined EXIT_SUCCESS void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */ # endif # endif # ifndef YYFREE # define YYFREE free # if ! defined free && ! defined EXIT_SUCCESS void free (void *); /* INFRINGES ON USER NAME SPACE */ # endif # endif # endif #endif /* ! defined yyoverflow || YYERROR_VERBOSE */ #if (! defined yyoverflow \ && (! defined __cplusplus \ || (defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL \ && defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL))) /* A type that is properly aligned for any stack member. */ union yyalloc { yytype_int16 yyss_alloc; YYSTYPE yyvs_alloc; YYLTYPE yyls_alloc; }; /* The size of the maximum gap between one aligned stack and the next. */ # define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1) /* The size of an array large to enough to hold all stacks, each with N elements. */ # define YYSTACK_BYTES(N) \ ((N) * (sizeof (yytype_int16) + sizeof (YYSTYPE) + sizeof (YYLTYPE)) \ + 2 * YYSTACK_GAP_MAXIMUM) # define YYCOPY_NEEDED 1 /* Relocate STACK from its old location to the new one. The local variables YYSIZE and YYSTACKSIZE give the old and new number of elements in the stack, and YYPTR gives the new location of the stack. Advance YYPTR to a properly aligned location for the next stack. */ # define YYSTACK_RELOCATE(Stack_alloc, Stack) \ do \ { \ YYSIZE_T yynewbytes; \ YYCOPY (&yyptr->Stack_alloc, Stack, yysize); \ Stack = &yyptr->Stack_alloc; \ yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \ yyptr += yynewbytes / sizeof (*yyptr); \ } \ while (0) #endif #if defined YYCOPY_NEEDED && YYCOPY_NEEDED /* Copy COUNT objects from SRC to DST. The source and destination do not overlap. */ # ifndef YYCOPY # if defined __GNUC__ && 1 < __GNUC__ # define YYCOPY(Dst, Src, Count) \ __builtin_memcpy (Dst, Src, (Count) * sizeof (*(Src))) # else # define YYCOPY(Dst, Src, Count) \ do \ { \ YYSIZE_T yyi; \ for (yyi = 0; yyi < (Count); yyi++) \ (Dst)[yyi] = (Src)[yyi]; \ } \ while (0) # endif # endif #endif /* !YYCOPY_NEEDED */ /* YYFINAL -- State number of the termination state. */ #define YYFINAL 61 /* YYLAST -- Last index in YYTABLE. */ #define YYLAST 1040 /* YYNTOKENS -- Number of terminals. */ #define YYNTOKENS 213 /* YYNNTS -- Number of nonterminals. */ #define YYNNTS 117 /* YYNRULES -- Number of rules. */ #define YYNRULES 359 /* YYNSTATES -- Number of states. */ #define YYNSTATES 620 /* YYTRANSLATE[YYX] -- Symbol number corresponding to YYX as returned by yylex, with out-of-bounds checking. */ #define YYUNDEFTOK 2 #define YYMAXUTOK 467 #define YYTRANSLATE(YYX) \ ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK) /* YYTRANSLATE[TOKEN-NUM] -- Symbol number corresponding to TOKEN-NUM as returned by yylex, without out-of-bounds checking. */ static const yytype_uint8 yytranslate[] = { 0, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143, 144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, 160, 161, 162, 163, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191, 192, 193, 194, 195, 196, 197, 198, 199, 200, 201, 202, 203, 204, 205, 206, 207, 208, 209, 210, 211, 212 }; #if YYDEBUG /* YYRLINE[YYN] -- Source line where rule number YYN was defined. */ static const yytype_uint16 yyrline[] = { 0, 625, 625, 626, 629, 630, 631, 632, 633, 634, 635, 638, 645, 648, 653, 659, 666, 672, 675, 680, 685, 710, 712, 715, 720, 725, 726, 727, 728, 729, 732, 736, 741, 746, 751, 756, 760, 765, 770, 775, 783, 784, 785, 786, 787, 788, 789, 790, 794, 795, 796, 797, 798, 799, 800, 803, 815, 827, 853, 876, 893, 925, 932, 949, 964, 985, 1021, 1043, 1063, 1063, 1063, 1063, 1063, 1063, 1063, 1063, 1063, 1063, 1064, 1064, 1064, 1064, 1069, 1092, 1092, 1092, 1092, 1092, 1092, 1092, 1092, 1092, 1092, 1092, 1092, 1097, 1120, 1120, 1120, 1120, 1120, 1120, 1120, 1120, 1120, 1120, 1120, 1120, 1120, 1123, 1123, 1123, 1123, 1127, 1150, 1150, 1153, 1232, 1253, 1277, 1327, 1378, 1407, 1433, 1439, 1464, 1486, 1500, 1500, 1508, 1525, 1532, 1535, 1538, 1550, 1591, 1612, 1621, 1682, 1753, 1820, 1844, 1872, 1892, 1912, 1964, 1965, 1968, 1969, 1972, 1973, 1976, 1977, 1978, 1982, 1983, 1984, 1987, 1987, 1987, 1987, 1987, 1987, 1987, 1987, 1987, 1988, 1988, 1991, 1992, 1995, 1996, 2001, 2001, 2004, 2009, 2024, 2030, 2036, 2042, 2048, 2056, 2056, 2056, 2056, 2059, 2069, 2075, 2086, 2109, 2114, 2119, 2124, 2132, 2132, 2135, 2135, 2138, 2138, 2138, 2141, 2202, 2203, 2214, 2228, 2232, 2240, 2244, 2248, 2259, 2259, 2259, 2262, 2269, 2269, 2272, 2272, 2275, 2299, 2317, 2333, 2337, 2358, 2366, 2377, 2378, 2383, 2387, 2394, 2403, 2412, 2421, 2430, 2442, 2453, 2470, 2480, 2489, 2489, 2489, 2489, 2492, 2501, 2510, 2510, 2536, 2572, 2587, 2601, 2610, 2621, 2631, 2641, 2648, 2655, 2663, 2675, 2691, 2694, 2707, 2715, 2723, 2730, 2743, 2752, 2752, 2761, 2762, 2763, 2764, 2765, 2766, 2767, 2768, 2772, 2776, 2777, 2778, 2779, 2780, 2781, 2782, 2790, 2793, 2797, 2803, 2803, 2803, 2803, 2811, 2814, 2820, 2821, 2824, 2825, 2828, 2829, 2832, 2833, 2837, 2838, 2843, 2849, 2858, 2859, 2860, 2863, 2864, 2865, 2866, 2867, 2868, 2869, 2870, 2871, 2872, 2873, 2874, 2875, 2876, 2877, 2880, 2881, 2884, 2885, 2888, 2892, 2905, 2906, 2908, 2914, 2921, 2922, 2923, 2924, 2925, 2926, 2927, 2928, 2929, 2930, 2931, 2932, 2937, 2938, 2942, 2947, 2953, 2958, 2959, 2960, 2961, 2962, 2963, 2964, 2965, 2966, 2967, 2968, 2969 }; #endif #if YYDEBUG || YYERROR_VERBOSE || 0 /* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM. First, the terminals, then, starting at YYNTOKENS, nonterminals. */ static const char *const yytname[] = { "$end", "error", "$undefined", "COLON", "SEMICOLON", "LPAREN", "RPAREN", "LANGLE", "RANGLE", "LCURLY", "RCURLY", "LSQUARE", "RSQUARE", "COMMA", "EQ", "ABS", "DOT", "PLUS", "MINUS", "MULTIPLY", "DIVIDE", "TYPE_UD", "TYPE_D", "TYPE_UW", "TYPE_W", "TYPE_UB", "TYPE_B", "TYPE_VF", "TYPE_HF", "TYPE_V", "TYPE_F", "ALIGN1", "ALIGN16", "SECHALF", "COMPR", "SWITCH", "ATOMIC", "NODDCHK", "NODDCLR", "MASK_DISABLE", "BREAKPOINT", "ACCWRCTRL", "EOT", "SEQ", "ANY2H", "ALL2H", "ANY4H", "ALL4H", "ANY8H", "ALL8H", "ANY16H", "ALL16H", "ANYV", "ALLV", "ZERO", "EQUAL", "NOT_ZERO", "NOT_EQUAL", "GREATER", "GREATER_EQUAL", "LESS", "LESS_EQUAL", "ROUND_INCREMENT", "OVERFLOW", "UNORDERED", "GENREG", "MSGREG", "ADDRESSREG", "ACCREG", "FLAGREG", "MASKREG", "AMASK", "IMASK", "LMASK", "CMASK", "MASKSTACKREG", "LMS", "IMS", "MASKSTACKDEPTHREG", "IMSD", "LMSD", "NOTIFYREG", "STATEREG", "CONTROLREG", "IPREG", "GENREGFILE", "MSGREGFILE", "MOV", "FRC", "RNDU", "RNDD", "RNDE", "RNDZ", "NOT", "LZD", "MUL", "MAC", "MACH", "LINE", "SAD2", "SADA2", "DP4", "DPH", "DP3", "DP2", "AVG", "ADD", "SEL", "AND", "OR", "XOR", "SHR", "SHL", "ASR", "CMP", "CMPN", "PLN", "ADDC", "BFI1", "BFREV", "CBIT", "F16TO32", "F32TO16", "FBH", "FBL", "SEND", "SENDC", "NOP", "JMPI", "IF", "IFF", "WHILE", "ELSE", "BREAK", "CONT", "HALT", "MSAVE", "PUSH", "MREST", "POP", "WAIT", "DO", "ENDIF", "ILLEGAL", "MATH_INST", "MAD", "LRP", "BFE", "BFI2", "SUBB", "CALL", "RET", "BRD", "BRC", "NULL_TOKEN", "MATH", "SAMPLER", "GATEWAY", "READ", "WRITE", "URB", "THREAD_SPAWNER", "VME", "DATA_PORT", "CRE", "MSGLEN", "RETURNLEN", "ALLOCATE", "USED", "COMPLETE", "TRANSPOSE", "INTERLEAVE", "SATURATE", "INTEGER", "STRING", "NUMBER", "INV", "LOG", "EXP", "SQRT", "RSQ", "POW", "SIN", "COS", "SINCOS", "INTDIV", "INTMOD", "INTDIVMOD", "SIGNED", "SCALAR", "X", "Y", "Z", "W", "KERNEL_PRAGMA", "END_KERNEL_PRAGMA", "CODE_PRAGMA", "END_CODE_PRAGMA", "REG_COUNT_PAYLOAD_PRAGMA", "REG_COUNT_TOTAL_PRAGMA", "DECLARE_PRAGMA", "BASE", "ELEMENTSIZE", "SRCREGION", "DSTREGION", "TYPE", "DEFAULT_EXEC_SIZE_PRAGMA", "DEFAULT_REG_TYPE_PRAGMA", "SUBREGNUM", "SNDOPR", "UMINUS", "STR_SYMBOL_REG", "EMPTEXECSIZE", "$accept", "simple_int", "exp", "ROOT", "label", "declare_base", "declare_elementsize", "declare_srcregion", "declare_dstregion", "declare_type", "declare_pragma", "reg_count_total_pragma", "reg_count_payload_pragma", "default_exec_size_pragma", "default_reg_type_pragma", "pragma", "instrseq", "instruction", "relocatableinstruction", "ifelseinstruction", "loopinstruction", "haltinstruction", "multibranchinstruction", "subroutineinstruction", "unaryinstruction", "unaryop", "binaryinstruction", "binaryop", "binaryaccinstruction", "binaryaccop", "trinaryop", "trinaryinstruction", "sendop", "sendinstruction", "sndopr", "jumpinstruction", "mathinstruction", "breakinstruction", "breakop", "syncinstruction", "nopinstruction", "payload", "post_dst", "msgtarget", "urb_allocate", "urb_used", "urb_complete", "urb_swizzle", "sampler_datatype", "math_function", "math_signed", "math_scalar", "dst", "dstoperand", "dstoperandex", "dstoperandex_typed", "symbol_reg", "symbol_reg_p", "dstreg", "srcaccimm", "srcacc", "srcimm", "imm32reg", "directsrcaccoperand", "srcarchoperandex", "srcarchoperandex_typed", "sendleadreg", "src", "directsrcoperand", "indirectsrcoperand", "addrparam", "immaddroffset", "subregnum", "directgenreg", "indirectgenreg", "directmsgreg", "indirectmsgreg", "addrreg", "accreg", "flagreg", "maskreg", "mask_subreg", "maskstackreg", "maskstack_subreg", "notifyreg", "statereg", "controlreg", "ipreg", "nullreg", "relativelocation", "relativelocation2", "dstregion", "region", "region_wh", "indirectregion", "regtype", "srcimmtype", "swizzle", "chansel", "writemask", "writemask_x", "writemask_y", "writemask_z", "writemask_w", "imm32", "predicate", "predstate", "predctrl", "negate", "abs", "execsize", "saturate", "conditionalmodifier", "condition", "instoptions", "instoption_list", "instoption", YY_NULLPTR }; #endif # ifdef YYPRINT /* YYTOKNUM[NUM] -- (External) token number corresponding to the (internal) symbol number NUM (which must be that of a token). */ static const yytype_uint16 yytoknum[] = { 0, 256, 257, 258, 259, 260, 261, 262, 263, 264, 265, 266, 267, 268, 269, 270, 271, 272, 273, 274, 275, 276, 277, 278, 279, 280, 281, 282, 283, 284, 285, 286, 287, 288, 289, 290, 291, 292, 293, 294, 295, 296, 297, 298, 299, 300, 301, 302, 303, 304, 305, 306, 307, 308, 309, 310, 311, 312, 313, 314, 315, 316, 317, 318, 319, 320, 321, 322, 323, 324, 325, 326, 327, 328, 329, 330, 331, 332, 333, 334, 335, 336, 337, 338, 339, 340, 341, 342, 343, 344, 345, 346, 347, 348, 349, 350, 351, 352, 353, 354, 355, 356, 357, 358, 359, 360, 361, 362, 363, 364, 365, 366, 367, 368, 369, 370, 371, 372, 373, 374, 375, 376, 377, 378, 379, 380, 381, 382, 383, 384, 385, 386, 387, 388, 389, 390, 391, 392, 393, 394, 395, 396, 397, 398, 399, 400, 401, 402, 403, 404, 405, 406, 407, 408, 409, 410, 411, 412, 413, 414, 415, 416, 417, 418, 419, 420, 421, 422, 423, 424, 425, 426, 427, 428, 429, 430, 431, 432, 433, 434, 435, 436, 437, 438, 439, 440, 441, 442, 443, 444, 445, 446, 447, 448, 449, 450, 451, 452, 453, 454, 455, 456, 457, 458, 459, 460, 461, 462, 463, 464, 465, 466, 467 }; # endif #define YYPACT_NINF -505 #define yypact_value_is_default(Yystate) \ (!!((Yystate) == (-505))) #define YYTABLE_NINF -322 #define yytable_value_is_error(Yytable_value) \ 0 /* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing STATE-NUM. */ static const yytype_int16 yypact[] = { 51, 12, -505, 17, -505, 33, 57, 40, 40, -131, 40, 445, 52, -505, -505, -505, -505, -505, -505, -505, 425, 60, 65, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, 887, -505, -505, 3, 40, 53, 53, -505, 40, 40, -505, 419, 419, -126, 419, -505, -505, -505, -505, -505, -505, -505, -505, -505, 76, -505, -505, -505, 110, 112, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, 17, 17, 17, -505, -505, 17, 36, 17, -505, -505, -505, -505, -505, 17, 17, 17, 17, 870, 870, 870, 870, 17, 17, 105, 412, 286, -51, -505, -505, -505, 124, 124, 354, -505, 40, 40, 40, 40, 120, -66, -505, -505, -505, 242, 53, 53, 53, 445, -505, 799, 799, 667, 53, 53, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -30, 128, -30, -30, -30, 612, 53, 40, -505, 395, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, 139, -505, -505, -505, -505, -505, -505, 67, 67, -505, -505, -3, 134, -53, 105, 140, 150, 419, -505, 152, 155, -505, 53, 124, 53, -505, 105, 105, 105, 105, -505, -505, -505, -505, 105, -505, -505, 105, 445, 159, -505, 150, 769, -505, -505, 165, 165, -505, 165, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, 165, 53, 769, 124, 53, -505, 17, 3, 17, 17, 17, 707, -42, 53, 85, -505, -505, -505, -505, -505, 867, -505, 40, 160, -38, -505, 136, 40, 40, 445, 40, -505, -505, 445, -505, -505, 124, -505, -505, -505, -505, -505, -505, -505, 136, -505, 105, -505, 152, 592, -505, -505, -505, -505, -505, -505, -505, 152, -505, -505, 152, 162, 40, 445, -505, 179, 445, 124, 124, -505, 124, 799, -505, 799, 799, 799, 769, -505, -505, 635, -505, -505, 124, -505, 763, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, 419, 152, 197, 14, 216, 225, 71, 306, -505, 348, -505, -505, 236, -505, 445, 40, -505, 419, 734, -505, -505, -505, 591, 445, 445, -505, -54, 415, -505, 63, 445, -505, -505, -505, -505, 409, 769, 742, 769, 781, -505, 162, 419, 592, 592, -505, -505, -505, 165, 240, -505, -505, 40, -505, 40, 40, -505, 40, 40, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, 124, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, 152, 152, 155, -505, -505, 64, -505, 124, -505, -505, -505, -505, -505, 152, 592, 592, 769, -505, 734, 257, -505, 261, 271, 106, 281, 282, 284, 288, 126, -49, 124, 124, 574, 7, 124, 124, -505, 445, 419, -505, 377, 400, 483, 391, -505, 445, 279, 445, -505, 104, -505, 445, 124, 124, 769, -30, 125, 138, 142, -63, 143, 145, 169, 170, 40, -505, -505, 40, 124, 124, -505, -505, -505, -505, 40, 40, -505, -505, 410, 445, 279, -505, 116, -505, -505, -505, 124, 157, 300, 320, 325, -505, -505, 182, 342, 344, 345, 346, 1, -505, -505, 491, 587, -505, -505, -505, -505, 410, -505, -505, -505, -505, -505, -505, 175, 202, 203, 205, -505, 217, 211, 213, 215, 218, 40, -505, -505, 410, -505, -505, 376, 380, 385, -505, 232, 394, 399, 408, 418, 226, 410, 6, 258, 268, -505, -505, 270, 274, 275, -505, -505, -505, -505, -505, -505, 443, 438, 442, 466, 460, 461, -505, 314, 315, -505, 316, 321, 498, 20, 501, 484, -505, -505, 388, -505, 389, 558, 555, -505, 407, 575, -505 }; /* YYDEFACT[STATE-NUM] -- Default reduction number in state STATE-NUM. Performed when YYTABLE does not specify something else to do. Zero means the default is an error. */ static const yytype_uint16 yydefact[] = { 301, 303, 130, 325, 61, 325, 0, 0, 0, 0, 0, 266, 0, 37, 29, 25, 26, 27, 28, 38, 0, 0, 0, 48, 49, 50, 51, 52, 40, 41, 42, 43, 44, 53, 46, 54, 45, 47, 0, 304, 305, 0, 0, 0, 0, 12, 0, 0, 4, 22, 21, 0, 23, 268, 269, 270, 271, 272, 273, 267, 24, 1, 0, 35, 36, 30, 0, 0, 32, 34, 68, 69, 70, 71, 72, 73, 74, 75, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 93, 107, 94, 76, 77, 78, 79, 80, 81, 114, 115, 325, 325, 325, 127, 128, 325, 0, 325, 109, 110, 111, 112, 108, 325, 325, 325, 325, 331, 331, 331, 331, 325, 325, 227, 306, 0, 0, 2, 251, 250, 343, 343, 0, 9, 0, 0, 0, 0, 0, 0, 39, 31, 33, 0, 0, 0, 0, 266, 129, 0, 0, 0, 0, 0, 332, 333, 334, 335, 336, 337, 338, 339, 340, 341, 342, 327, 329, 327, 327, 327, 0, 0, 0, 234, 0, 313, 314, 315, 316, 317, 318, 319, 320, 311, 312, 0, 326, 3, 347, 57, 56, 10, 5, 6, 7, 8, 0, 0, 15, 227, 0, 252, 253, 255, 259, 259, 124, 58, 343, 0, 245, 227, 227, 227, 227, 237, 238, 239, 240, 227, 244, 243, 227, 266, 0, 249, 185, 321, 172, 173, 257, 257, 186, 257, 189, 191, 190, 192, 183, 181, 182, 184, 236, 177, 242, 178, 179, 257, 0, 321, 343, 0, 328, 325, 0, 325, 325, 325, 0, 0, 0, 226, 307, 308, 309, 310, 302, 0, 13, 0, 0, 17, 228, 0, 0, 0, 266, 0, 264, 265, 266, 59, 60, 343, 230, 232, 233, 235, 241, 247, 248, 0, 322, 227, 220, 259, 321, 215, 216, 210, 209, 211, 204, 206, 259, 205, 207, 259, 323, 0, 266, 174, 289, 266, 343, 343, 63, 343, 0, 330, 0, 0, 0, 321, 132, 212, 321, 213, 214, 343, 344, 0, 348, 349, 350, 351, 352, 353, 354, 355, 356, 357, 358, 359, 346, 14, 259, 0, 0, 0, 223, 0, 0, 254, 0, 256, 62, 0, 246, 266, 322, 300, 299, 0, 199, 197, 198, 274, 266, 266, 324, 0, 0, 176, 291, 266, 180, 65, 66, 64, 321, 321, 321, 321, 0, 131, 323, 123, 321, 321, 126, 345, 16, 257, 0, 20, 229, 224, 187, 0, 0, 260, 0, 0, 231, 203, 157, 158, 159, 160, 161, 162, 163, 164, 165, 166, 167, 343, 276, 277, 278, 279, 281, 280, 275, 200, 218, 208, 259, 259, 259, 258, 292, 293, 175, 343, 193, 194, 195, 201, 196, 259, 321, 321, 321, 133, 0, 0, 136, 0, 0, 0, 0, 0, 0, 0, 0, 0, 343, 343, 299, 0, 343, 343, 18, 266, 225, 222, 0, 0, 0, 0, 125, 266, 282, 266, 294, 295, 67, 266, 343, 343, 321, 327, 0, 0, 0, 153, 0, 0, 0, 0, 0, 119, 120, 322, 343, 343, 118, 117, 19, 188, 0, 0, 263, 217, 0, 266, 282, 296, 297, 202, 82, 95, 343, 168, 0, 0, 0, 151, 152, 146, 0, 0, 0, 0, 0, 122, 121, 0, 0, 285, 286, 287, 288, 283, 219, 221, 298, 290, 113, 169, 170, 0, 0, 0, 145, 148, 0, 0, 0, 0, 0, 262, 261, 0, 171, 135, 0, 0, 0, 147, 150, 0, 0, 0, 0, 343, 0, 0, 0, 0, 149, 140, 0, 0, 0, 143, 116, 284, 155, 156, 154, 0, 0, 0, 0, 0, 0, 134, 0, 0, 141, 0, 0, 0, 0, 0, 0, 137, 138, 0, 142, 0, 0, 0, 139, 0, 0, 144 }; /* YYPGOTO[NTERM-NUM]. */ static const yytype_int16 yypgoto[] = { -505, -505, -7, -505, 563, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, 570, -505, 576, 578, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, -505, 209, -505, -505, -505, -505, -505, -505, 273, -505, -505, -505, -505, -505, -505, -505, 163, -505, -505, 16, -505, 450, -505, -255, 463, 416, -505, 234, -341, -344, -505, -505, -505, -505, -250, -289, -221, 326, -505, -156, -145, -140, 359, -505, -67, -333, -31, -110, -505, -61, -505, 513, -505, 49, 114, 122, -2, -505, -209, -199, -505, 193, -155, -505, 117, -504, -505, -505, -505, -505, -505, -505, -505, -505, -505, -48, 238, 74, -172, -33, -505, -137, -505, 295 }; /* YYDEFGOTO[NTERM-NUM]. */ static const yytype_int16 yydefgoto[] = { -1, 139, 372, 12, 13, 149, 208, 281, 358, 405, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 127, 29, 128, 30, 129, 130, 31, 131, 32, 398, 33, 34, 35, 132, 36, 37, 394, 333, 466, 557, 572, 583, 531, 593, 427, 552, 567, 237, 238, 239, 240, 241, 242, 243, 445, 446, 373, 374, 448, 304, 305, 336, 306, 307, 308, 359, 477, 183, 244, 245, 246, 247, 309, 249, 310, 311, 252, 312, 254, 313, 314, 315, 316, 317, 140, 216, 320, 288, 289, 290, 60, 435, 517, 545, 385, 443, 487, 520, 549, 377, 38, 41, 195, 318, 381, 43, 263, 175, 176, 199, 277, 354 }; /* YYTABLE[YYPACT[STATE-NUM]] -- What to do in state STATE-NUM. If positive, shift that token. If negative, reduce the rule whose number is the opposite. If YYTABLE_NINF, syntax error. */ static const yytype_int16 yytable[] = { 49, 50, 220, 52, 200, 265, 266, 267, 214, 325, 134, 209, 46, 215, 335, 286, 209, 375, 144, 145, 146, 147, 42, 209, 221, 47, 610, 590, 591, 39, 40, 210, 321, 611, 322, 135, 592, -55, 42, 142, 143, 565, 141, 51, 395, 46, 447, 395, 323, 251, 251, 251, 61, 282, 468, 472, 1, 451, 47, 451, 45, 578, 209, 221, 68, 294, 295, 296, 297, 69, 251, 136, 133, 298, 589, 148, 299, 408, 300, 44, 150, 292, 210, 234, 409, 376, 146, 147, 144, 145, 146, 147, 248, 248, 248, 177, 178, 179, 253, 253, 253, 449, 144, 449, 146, 147, 369, 529, 530, 469, 473, 490, 491, 248, 151, 378, 152, 157, 379, 253, 236, 182, 197, 326, 337, 236, 438, 507, 250, 250, 250, 363, 236, 198, 206, 365, 207, 202, 203, 204, 205, 452, 262, 454, 264, 276, 212, 368, 279, 250, 280, 283, 217, 218, 219, 284, 366, 402, 251, 285, 260, 261, 287, 375, 375, 383, 357, 562, 386, 450, 301, 450, 319, 268, 356, 271, 258, 380, 2, 270, 48, 506, 371, 3, 153, 154, 155, 387, 388, 156, 389, 159, 4, 5, 474, 384, 269, 160, 161, 162, 163, 248, 400, 222, 492, 180, 181, 253, 255, 255, 255, 403, 438, 48, 415, 291, 360, 293, 251, 404, 251, 251, 251, 436, 437, 6, 137, 138, 406, 255, 444, 376, 376, 329, 360, 198, 439, 250, 407, 483, 484, 440, 524, 144, 145, 146, 147, 46, 414, 7, 8, 9, 489, 442, 475, 486, 324, 10, 11, 327, 47, 248, 494, 248, 248, 248, 495, 253, 339, 253, 253, 253, 355, 256, 256, 256, 496, 361, 362, 497, 364, 257, 257, 257, 334, 396, 498, 499, 396, 500, 482, 502, 196, 501, 256, 516, 519, 250, 526, 250, 250, 250, 257, 144, 145, 146, 147, 209, 488, 548, 410, 527, 382, 553, 411, 528, 532, 255, 533, 412, 510, 525, 439, 144, 145, 146, 147, 210, 515, 397, 518, 503, 504, 554, 521, 508, 509, 328, 555, 330, 331, 332, 534, 535, 390, 551, 391, 392, 393, 556, 396, 396, 410, 522, 523, 558, 411, 559, 560, 561, 201, 413, 546, 143, 566, 144, 145, 146, 147, 537, 538, 144, 145, 146, 147, 568, 569, 255, 570, 255, 255, 255, 256, 511, 573, 571, 574, 550, 575, 579, 257, 576, 470, 580, 144, 145, 146, 147, 581, 514, 476, 582, 478, 479, 513, 480, 481, 584, 144, 145, 146, 147, 585, 512, 46, 48, 211, 144, 145, 146, 147, 586, 396, 441, 587, -11, 62, 370, 184, 63, 1, 594, 144, 145, 146, 147, 144, 145, 146, 147, 588, 595, 256, 596, 256, 256, 256, 597, 598, 599, 257, 600, 257, 257, 257, 601, 185, 186, 187, 188, 189, 190, 191, 192, 193, 194, 53, 54, 55, 56, 57, 58, 602, 603, 604, 59, 222, 223, 133, 224, 225, 226, 227, 228, 229, 230, 231, 605, 606, 607, 157, 303, 232, 233, 608, 536, 513, 613, 203, 563, 144, 145, 146, 147, 609, 539, 540, 612, 144, 145, 146, 147, -301, -301, -301, -301, -301, -301, -301, -301, -301, -301, -301, -301, -301, -301, -301, -301, -301, -301, -301, -301, -301, -301, -301, -301, -301, -301, -301, -301, -301, -301, -301, -301, -301, -301, -301, -301, -301, -301, -301, -301, 2, -301, -301, 577, -301, 3, -301, -301, -301, 614, 615, 235, 616, -301, 4, 5, 617, -301, -301, -301, -301, -301, -301, -301, -301, -301, -301, -123, 618, 619, 48, 64, 371, 272, 273, 274, 275, -321, 65, 144, 505, 146, 147, 564, 66, 46, 67, 6, 541, 542, 543, 544, 144, 145, 146, 147, 471, 399, 370, 259, 428, 429, 430, 431, 213, 46, 432, 493, 433, 434, 278, 7, 8, 9, 453, 367, 338, 158, 47, 10, 11, 485, 467, 547, 401, 0, 0, -321, 46, 222, 0, 133, 224, 225, 226, 227, 228, 229, 230, 231, 0, 370, 0, 157, 303, 232, 233, 222, 0, 133, 224, 225, 226, 227, 228, 229, 230, 231, 0, 0, 0, 157, 303, 232, 233, 209, 221, 222, 223, 133, 224, 225, 226, 227, 228, 229, 230, 231, 0, 0, 0, 0, 0, 232, 233, 210, 234, 0, 0, 0, 222, 0, 133, 224, 225, 226, 227, 228, 229, 230, 231, 0, 0, 0, 157, 303, 232, 233, 0, 0, 0, 0, 144, 145, 146, 147, 235, 0, 0, 0, 0, 0, 222, 223, 133, 224, 225, 226, 227, 228, 229, 230, 231, 0, 235, -123, -321, -123, 232, 233, 0, 0, 0, 0, 0, 0, 0, 0, 302, 0, 0, 0, 0, 48, 235, 371, 0, 0, 0, 0, 209, 221, 222, 223, 133, 224, 225, 226, 227, 228, 229, 230, 231, 48, 236, 302, 0, 235, 232, 233, 210, 234, 342, 343, 344, 345, 346, 347, 348, 349, 350, 351, 352, 353, 0, 0, 48, 222, 223, 133, 224, 225, 226, 227, 228, 229, 230, 231, 0, 235, 0, 157, 303, 232, 233, 0, 0, 0, 0, 0, 0, 0, 0, 0, 222, 0, 133, 224, 225, 226, 227, 228, 229, 230, 231, 0, 0, 0, 157, 303, 232, 233, 0, 0, 0, 0, 0, 0, 0, 235, 0, 0, 209, 221, 222, 223, 133, 224, 225, 226, 227, 228, 229, 230, 231, 340, 0, 0, 341, 236, 232, 233, 210, 234, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 235, 0, 342, 343, 344, 345, 346, 347, 348, 349, 350, 351, 352, 353, 416, 417, 418, 419, 0, 420, 421, 422, 423, 424, 425, 426, 0, 235, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 455, 456, 457, 458, 459, 460, 461, 462, 463, 464, 465, 0, 0, 0, 0, 0, 0, 0, 235, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 236, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 0, 110, 111, 0, 112, 0, 113, 114, 115, 0, 0, 0, 0, 116, 0, 0, 0, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126 }; static const yytype_int16 yycheck[] = { 7, 8, 157, 10, 141, 177, 178, 179, 153, 259, 41, 65, 5, 153, 269, 214, 65, 306, 17, 18, 19, 20, 5, 65, 66, 18, 6, 21, 22, 17, 18, 85, 241, 13, 243, 42, 30, 4, 5, 46, 47, 545, 44, 174, 333, 5, 390, 336, 257, 159, 160, 161, 0, 209, 398, 399, 5, 390, 18, 392, 3, 565, 65, 66, 4, 221, 222, 223, 224, 4, 180, 18, 69, 229, 578, 201, 232, 6, 233, 5, 4, 218, 85, 86, 13, 306, 19, 20, 17, 18, 19, 20, 159, 160, 161, 128, 129, 130, 159, 160, 161, 390, 17, 392, 19, 20, 305, 170, 171, 398, 399, 452, 453, 180, 4, 314, 4, 81, 317, 180, 174, 16, 173, 260, 269, 174, 381, 471, 159, 160, 161, 286, 174, 9, 14, 290, 202, 144, 145, 146, 147, 391, 172, 393, 16, 6, 153, 303, 14, 180, 203, 11, 154, 155, 156, 5, 293, 356, 268, 7, 162, 163, 7, 452, 453, 320, 204, 166, 323, 390, 11, 392, 7, 180, 14, 182, 160, 15, 127, 181, 173, 470, 175, 132, 110, 111, 112, 324, 325, 115, 327, 117, 141, 142, 403, 16, 180, 123, 124, 125, 126, 268, 339, 67, 454, 131, 132, 268, 159, 160, 161, 14, 467, 173, 369, 217, 283, 219, 328, 205, 330, 331, 332, 378, 379, 174, 173, 174, 12, 180, 385, 452, 453, 264, 301, 9, 381, 268, 13, 438, 439, 381, 492, 17, 18, 19, 20, 5, 12, 198, 199, 200, 451, 190, 14, 191, 258, 206, 207, 261, 18, 328, 5, 330, 331, 332, 5, 328, 270, 330, 331, 332, 279, 159, 160, 161, 5, 284, 285, 173, 287, 159, 160, 161, 268, 333, 5, 5, 336, 5, 427, 165, 6, 5, 180, 16, 192, 328, 173, 330, 331, 332, 180, 17, 18, 19, 20, 65, 445, 193, 4, 173, 319, 13, 8, 173, 173, 268, 173, 13, 475, 493, 467, 17, 18, 19, 20, 85, 483, 336, 485, 468, 469, 13, 489, 472, 473, 263, 13, 265, 266, 267, 173, 173, 328, 188, 330, 331, 332, 167, 398, 399, 4, 490, 491, 13, 8, 13, 13, 13, 6, 13, 517, 370, 189, 17, 18, 19, 20, 506, 507, 17, 18, 19, 20, 173, 173, 328, 173, 330, 331, 332, 268, 6, 173, 168, 173, 524, 173, 13, 268, 173, 399, 13, 17, 18, 19, 20, 13, 8, 407, 169, 409, 410, 13, 412, 413, 13, 17, 18, 19, 20, 13, 13, 5, 173, 174, 17, 18, 19, 20, 13, 470, 8, 6, 0, 1, 18, 16, 4, 5, 173, 17, 18, 19, 20, 17, 18, 19, 20, 577, 173, 328, 173, 330, 331, 332, 173, 173, 6, 328, 13, 330, 331, 332, 13, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 21, 22, 23, 24, 25, 26, 6, 13, 13, 30, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 173, 173, 173, 81, 82, 83, 84, 173, 502, 13, 13, 505, 8, 17, 18, 19, 20, 6, 512, 513, 6, 17, 18, 19, 20, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 562, 131, 132, 133, 134, 135, 173, 173, 154, 6, 140, 141, 142, 13, 144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 5, 173, 6, 173, 20, 175, 190, 191, 192, 193, 15, 20, 17, 18, 19, 20, 8, 20, 5, 20, 174, 190, 191, 192, 193, 17, 18, 19, 20, 399, 336, 18, 161, 21, 22, 23, 24, 153, 5, 27, 456, 29, 30, 206, 198, 199, 200, 392, 301, 269, 116, 18, 206, 207, 440, 396, 518, 341, -1, -1, 65, 5, 67, -1, 69, 70, 71, 72, 73, 74, 75, 76, 77, -1, 18, -1, 81, 82, 83, 84, 67, -1, 69, 70, 71, 72, 73, 74, 75, 76, 77, -1, -1, -1, 81, 82, 83, 84, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, -1, -1, -1, -1, -1, 83, 84, 85, 86, -1, -1, -1, 67, -1, 69, 70, 71, 72, 73, 74, 75, 76, 77, -1, -1, -1, 81, 82, 83, 84, -1, -1, -1, -1, 17, 18, 19, 20, 154, -1, -1, -1, -1, -1, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, -1, 154, 173, 174, 175, 83, 84, -1, -1, -1, -1, -1, -1, -1, -1, 18, -1, -1, -1, -1, 173, 154, 175, -1, -1, -1, -1, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 173, 174, 18, -1, 154, 83, 84, 85, 86, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, -1, -1, 173, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, -1, 154, -1, 81, 82, 83, 84, -1, -1, -1, -1, -1, -1, -1, -1, -1, 67, -1, 69, 70, 71, 72, 73, 74, 75, 76, 77, -1, -1, -1, 81, 82, 83, 84, -1, -1, -1, -1, -1, -1, -1, 154, -1, -1, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 10, -1, -1, 13, 174, 83, 84, 85, 86, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 154, -1, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 176, 177, 178, 179, -1, 181, 182, 183, 184, 185, 186, 187, -1, 154, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 154, 155, 156, 157, 158, 159, 160, 161, 162, 163, 164, -1, -1, -1, -1, -1, -1, -1, 154, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 174, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, -1, 128, 129, -1, 131, -1, 133, 134, 135, -1, -1, -1, -1, 140, -1, -1, -1, 144, 145, 146, 147, 148, 149, 150, 151, 152, 153 }; /* YYSTOS[STATE-NUM] -- The (internal number of the) accessing symbol of state STATE-NUM. */ static const yytype_uint16 yystos[] = { 0, 5, 127, 132, 141, 142, 174, 198, 199, 200, 206, 207, 216, 217, 223, 224, 225, 226, 227, 228, 229, 230, 231, 232, 233, 234, 235, 236, 237, 239, 241, 244, 246, 248, 249, 250, 252, 253, 318, 17, 18, 319, 5, 323, 323, 3, 5, 18, 173, 215, 215, 174, 215, 21, 22, 23, 24, 25, 26, 30, 308, 0, 1, 4, 217, 228, 230, 231, 4, 4, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 128, 129, 131, 133, 134, 135, 140, 144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 238, 240, 242, 243, 245, 251, 69, 292, 215, 18, 173, 174, 214, 302, 302, 215, 215, 17, 18, 19, 20, 201, 218, 4, 4, 4, 323, 323, 323, 323, 81, 297, 323, 323, 323, 323, 323, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 325, 326, 325, 325, 325, 323, 323, 16, 285, 16, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 320, 6, 173, 9, 327, 327, 6, 215, 215, 215, 215, 14, 202, 219, 65, 85, 174, 215, 270, 286, 287, 303, 302, 302, 302, 308, 66, 67, 68, 70, 71, 72, 73, 74, 75, 76, 77, 83, 84, 86, 154, 174, 265, 266, 267, 268, 269, 270, 271, 286, 287, 288, 289, 290, 291, 292, 293, 294, 295, 296, 299, 300, 301, 265, 267, 302, 302, 172, 324, 16, 324, 324, 324, 215, 265, 302, 215, 190, 191, 192, 193, 6, 328, 271, 14, 203, 220, 285, 11, 5, 7, 305, 7, 305, 306, 307, 302, 327, 302, 285, 285, 285, 285, 285, 285, 308, 11, 18, 82, 277, 278, 280, 281, 282, 290, 292, 293, 295, 297, 298, 299, 300, 301, 321, 7, 304, 304, 304, 304, 302, 280, 327, 302, 323, 292, 323, 323, 323, 255, 265, 269, 279, 286, 288, 302, 10, 13, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 329, 215, 14, 204, 221, 283, 290, 215, 215, 308, 215, 308, 327, 283, 285, 305, 18, 175, 215, 274, 275, 281, 282, 317, 305, 305, 15, 322, 215, 308, 16, 312, 308, 327, 327, 327, 265, 265, 265, 265, 254, 281, 321, 215, 247, 254, 327, 329, 305, 14, 205, 222, 12, 13, 6, 13, 4, 8, 13, 13, 12, 308, 176, 177, 178, 179, 181, 182, 183, 184, 185, 186, 187, 262, 21, 22, 23, 24, 27, 29, 30, 309, 308, 308, 269, 286, 287, 8, 190, 313, 308, 272, 273, 275, 276, 281, 282, 291, 280, 273, 280, 154, 155, 156, 157, 158, 159, 160, 161, 162, 163, 164, 256, 322, 275, 281, 215, 247, 275, 281, 304, 14, 215, 284, 215, 215, 215, 215, 327, 305, 305, 307, 191, 314, 327, 305, 274, 274, 280, 262, 5, 5, 5, 173, 5, 5, 5, 5, 165, 327, 327, 18, 281, 275, 327, 327, 308, 6, 13, 13, 8, 308, 16, 310, 308, 192, 315, 308, 327, 327, 280, 324, 173, 173, 173, 170, 171, 260, 173, 173, 173, 173, 215, 327, 327, 215, 215, 190, 191, 192, 193, 311, 308, 310, 193, 316, 327, 188, 263, 13, 13, 13, 167, 257, 13, 13, 13, 13, 166, 8, 8, 311, 189, 264, 173, 173, 173, 168, 258, 173, 173, 173, 173, 215, 311, 13, 13, 13, 169, 259, 13, 13, 13, 6, 327, 311, 21, 22, 30, 261, 173, 173, 173, 173, 173, 6, 13, 13, 6, 13, 13, 173, 173, 173, 173, 6, 6, 13, 6, 13, 173, 173, 6, 13, 173, 6 }; /* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */ static const yytype_uint16 yyr1[] = { 0, 213, 214, 214, 215, 215, 215, 215, 215, 215, 215, 216, 217, 218, 219, 220, 220, 221, 221, 222, 223, 224, 225, 226, 227, 228, 228, 228, 228, 228, 229, 229, 229, 229, 229, 229, 229, 229, 229, 229, 230, 230, 230, 230, 230, 230, 230, 230, 231, 231, 231, 231, 231, 231, 231, 232, 232, 232, 232, 232, 233, 233, 234, 235, 235, 236, 236, 237, 238, 238, 238, 238, 238, 238, 238, 238, 238, 238, 238, 238, 238, 238, 239, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 241, 242, 242, 242, 242, 242, 242, 242, 242, 242, 242, 242, 242, 242, 243, 243, 243, 243, 244, 245, 245, 246, 246, 246, 246, 246, 246, 246, 247, 248, 249, 250, 251, 251, 252, 253, 254, 255, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 257, 257, 258, 258, 259, 259, 260, 260, 260, 261, 261, 261, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 263, 263, 264, 264, 265, 265, 266, 266, 267, 267, 267, 267, 267, 268, 268, 268, 268, 269, 269, 270, 270, 271, 271, 271, 271, 272, 272, 273, 273, 274, 274, 274, 275, 276, 276, 277, 277, 277, 277, 277, 277, 278, 278, 278, 279, 279, 279, 280, 280, 281, 281, 281, 281, 282, 283, 283, 284, 284, 285, 285, 286, 287, 288, 289, 290, 291, 292, 293, 293, 294, 294, 294, 294, 295, 295, 296, 296, 297, 298, 299, 300, 301, 302, 302, 303, 303, 303, 303, 303, 304, 304, 305, 305, 305, 305, 306, 307, 307, 308, 308, 308, 308, 308, 308, 308, 308, 309, 309, 309, 309, 309, 309, 309, 309, 310, 310, 310, 311, 311, 311, 311, 312, 312, 313, 313, 314, 314, 315, 315, 316, 316, 317, 317, 318, 318, 319, 319, 319, 320, 320, 320, 320, 320, 320, 320, 320, 320, 320, 320, 320, 320, 320, 320, 321, 321, 322, 322, 323, 323, 324, 324, 325, 325, 326, 326, 326, 326, 326, 326, 326, 326, 326, 326, 326, 326, 327, 327, 328, 328, 328, 329, 329, 329, 329, 329, 329, 329, 329, 329, 329, 329, 329 }; /* YYR2[YYN] -- Number of symbols on the right hand side of rule YYN. */ static const yytype_uint8 yyr2[] = { 0, 2, 1, 2, 1, 3, 3, 3, 3, 2, 3, 1, 2, 3, 3, 0, 3, 0, 3, 3, 7, 2, 2, 2, 2, 1, 1, 1, 1, 1, 2, 3, 2, 3, 2, 2, 2, 1, 1, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 4, 4, 4, 5, 5, 1, 6, 5, 6, 6, 6, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 10, 1, 1, 12, 8, 8, 8, 8, 9, 9, 1, 4, 8, 6, 1, 1, 3, 1, 1, 1, 1, 8, 5, 1, 10, 10, 12, 6, 8, 10, 6, 14, 1, 0, 1, 0, 1, 0, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 0, 1, 1, 1, 2, 4, 3, 1, 1, 1, 3, 1, 1, 1, 1, 1, 1, 4, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 1, 3, 3, 1, 1, 1, 1, 3, 1, 1, 1, 1, 1, 1, 1, 1, 5, 3, 6, 1, 6, 3, 1, 0, 1, 2, 0, 2, 4, 2, 4, 2, 2, 2, 2, 1, 1, 1, 1, 1, 2, 1, 1, 1, 2, 2, 2, 2, 1, 1, 1, 1, 1, 3, 1, 3, 0, 3, 0, 3, 7, 7, 5, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 0, 2, 5, 1, 1, 1, 1, 0, 5, 0, 1, 0, 1, 0, 1, 0, 1, 1, 1, 0, 5, 0, 1, 1, 0, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 0, 1, 0, 3, 0, 1, 1, 3, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 3, 3, 2, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }; #define yyerrok (yyerrstatus = 0) #define yyclearin (yychar = YYEMPTY) #define YYEMPTY (-2) #define YYEOF 0 #define YYACCEPT goto yyacceptlab #define YYABORT goto yyabortlab #define YYERROR goto yyerrorlab #define YYRECOVERING() (!!yyerrstatus) #define YYBACKUP(Token, Value) \ do \ if (yychar == YYEMPTY) \ { \ yychar = (Token); \ yylval = (Value); \ YYPOPSTACK (yylen); \ yystate = *yyssp; \ goto yybackup; \ } \ else \ { \ yyerror (YY_("syntax error: cannot back up")); \ YYERROR; \ } \ while (0) /* Error token number */ #define YYTERROR 1 #define YYERRCODE 256 /* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N]. If N is 0, then set CURRENT to the empty location which ends the previous symbol: RHS[0] (always defined). */ #ifndef YYLLOC_DEFAULT # define YYLLOC_DEFAULT(Current, Rhs, N) \ do \ if (N) \ { \ (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \ (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \ (Current).last_line = YYRHSLOC (Rhs, N).last_line; \ (Current).last_column = YYRHSLOC (Rhs, N).last_column; \ } \ else \ { \ (Current).first_line = (Current).last_line = \ YYRHSLOC (Rhs, 0).last_line; \ (Current).first_column = (Current).last_column = \ YYRHSLOC (Rhs, 0).last_column; \ } \ while (0) #endif #define YYRHSLOC(Rhs, K) ((Rhs)[K]) /* Enable debugging if requested. */ #if YYDEBUG # ifndef YYFPRINTF # include /* INFRINGES ON USER NAME SPACE */ # define YYFPRINTF fprintf # endif # define YYDPRINTF(Args) \ do { \ if (yydebug) \ YYFPRINTF Args; \ } while (0) /* YY_LOCATION_PRINT -- Print the location on the stream. This macro was not mandated originally: define only if we know we won't break user code: when these are the locations we know. */ #ifndef YY_LOCATION_PRINT # if defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL /* Print *YYLOCP on YYO. Private, do not rely on its existence. */ YY_ATTRIBUTE_UNUSED static unsigned yy_location_print_ (FILE *yyo, YYLTYPE const * const yylocp) { unsigned res = 0; int end_col = 0 != yylocp->last_column ? yylocp->last_column - 1 : 0; if (0 <= yylocp->first_line) { res += YYFPRINTF (yyo, "%d", yylocp->first_line); if (0 <= yylocp->first_column) res += YYFPRINTF (yyo, ".%d", yylocp->first_column); } if (0 <= yylocp->last_line) { if (yylocp->first_line < yylocp->last_line) { res += YYFPRINTF (yyo, "-%d", yylocp->last_line); if (0 <= end_col) res += YYFPRINTF (yyo, ".%d", end_col); } else if (0 <= end_col && yylocp->first_column < end_col) res += YYFPRINTF (yyo, "-%d", end_col); } return res; } # define YY_LOCATION_PRINT(File, Loc) \ yy_location_print_ (File, &(Loc)) # else # define YY_LOCATION_PRINT(File, Loc) ((void) 0) # endif #endif # define YY_SYMBOL_PRINT(Title, Type, Value, Location) \ do { \ if (yydebug) \ { \ YYFPRINTF (stderr, "%s ", Title); \ yy_symbol_print (stderr, \ Type, Value, Location); \ YYFPRINTF (stderr, "\n"); \ } \ } while (0) /*----------------------------------------. | Print this symbol's value on YYOUTPUT. | `----------------------------------------*/ static void yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep, YYLTYPE const * const yylocationp) { FILE *yyo = yyoutput; YYUSE (yyo); YYUSE (yylocationp); if (!yyvaluep) return; # ifdef YYPRINT if (yytype < YYNTOKENS) YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep); # endif YYUSE (yytype); } /*--------------------------------. | Print this symbol on YYOUTPUT. | `--------------------------------*/ static void yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep, YYLTYPE const * const yylocationp) { YYFPRINTF (yyoutput, "%s %s (", yytype < YYNTOKENS ? "token" : "nterm", yytname[yytype]); YY_LOCATION_PRINT (yyoutput, *yylocationp); YYFPRINTF (yyoutput, ": "); yy_symbol_value_print (yyoutput, yytype, yyvaluep, yylocationp); YYFPRINTF (yyoutput, ")"); } /*------------------------------------------------------------------. | yy_stack_print -- Print the state stack from its BOTTOM up to its | | TOP (included). | `------------------------------------------------------------------*/ static void yy_stack_print (yytype_int16 *yybottom, yytype_int16 *yytop) { YYFPRINTF (stderr, "Stack now"); for (; yybottom <= yytop; yybottom++) { int yybot = *yybottom; YYFPRINTF (stderr, " %d", yybot); } YYFPRINTF (stderr, "\n"); } # define YY_STACK_PRINT(Bottom, Top) \ do { \ if (yydebug) \ yy_stack_print ((Bottom), (Top)); \ } while (0) /*------------------------------------------------. | Report that the YYRULE is going to be reduced. | `------------------------------------------------*/ static void yy_reduce_print (yytype_int16 *yyssp, YYSTYPE *yyvsp, YYLTYPE *yylsp, int yyrule) { unsigned long int yylno = yyrline[yyrule]; int yynrhs = yyr2[yyrule]; int yyi; YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n", yyrule - 1, yylno); /* The symbols being reduced. */ for (yyi = 0; yyi < yynrhs; yyi++) { YYFPRINTF (stderr, " $%d = ", yyi + 1); yy_symbol_print (stderr, yystos[yyssp[yyi + 1 - yynrhs]], &(yyvsp[(yyi + 1) - (yynrhs)]) , &(yylsp[(yyi + 1) - (yynrhs)]) ); YYFPRINTF (stderr, "\n"); } } # define YY_REDUCE_PRINT(Rule) \ do { \ if (yydebug) \ yy_reduce_print (yyssp, yyvsp, yylsp, Rule); \ } while (0) /* Nonzero means print parse trace. It is left uninitialized so that multiple parsers can coexist. */ int yydebug; #else /* !YYDEBUG */ # define YYDPRINTF(Args) # define YY_SYMBOL_PRINT(Title, Type, Value, Location) # define YY_STACK_PRINT(Bottom, Top) # define YY_REDUCE_PRINT(Rule) #endif /* !YYDEBUG */ /* YYINITDEPTH -- initial size of the parser's stacks. */ #ifndef YYINITDEPTH # define YYINITDEPTH 200 #endif /* YYMAXDEPTH -- maximum size the stacks can grow to (effective only if the built-in stack extension method is used). Do not make this value too large; the results are undefined if YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH) evaluated with infinite-precision integer arithmetic. */ #ifndef YYMAXDEPTH # define YYMAXDEPTH 10000 #endif #if YYERROR_VERBOSE # ifndef yystrlen # if defined __GLIBC__ && defined _STRING_H # define yystrlen strlen # else /* Return the length of YYSTR. */ static YYSIZE_T yystrlen (const char *yystr) { YYSIZE_T yylen; for (yylen = 0; yystr[yylen]; yylen++) continue; return yylen; } # endif # endif # ifndef yystpcpy # if defined __GLIBC__ && defined _STRING_H && defined _GNU_SOURCE # define yystpcpy stpcpy # else /* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in YYDEST. */ static char * yystpcpy (char *yydest, const char *yysrc) { char *yyd = yydest; const char *yys = yysrc; while ((*yyd++ = *yys++) != '\0') continue; return yyd - 1; } # endif # endif # ifndef yytnamerr /* Copy to YYRES the contents of YYSTR after stripping away unnecessary quotes and backslashes, so that it's suitable for yyerror. The heuristic is that double-quoting is unnecessary unless the string contains an apostrophe, a comma, or backslash (other than backslash-backslash). YYSTR is taken from yytname. If YYRES is null, do not copy; instead, return the length of what the result would have been. */ static YYSIZE_T yytnamerr (char *yyres, const char *yystr) { if (*yystr == '"') { YYSIZE_T yyn = 0; char const *yyp = yystr; for (;;) switch (*++yyp) { case '\'': case ',': goto do_not_strip_quotes; case '\\': if (*++yyp != '\\') goto do_not_strip_quotes; /* Fall through. */ default: if (yyres) yyres[yyn] = *yyp; yyn++; break; case '"': if (yyres) yyres[yyn] = '\0'; return yyn; } do_not_strip_quotes: ; } if (! yyres) return yystrlen (yystr); return yystpcpy (yyres, yystr) - yyres; } # endif /* Copy into *YYMSG, which is of size *YYMSG_ALLOC, an error message about the unexpected token YYTOKEN for the state stack whose top is YYSSP. Return 0 if *YYMSG was successfully written. Return 1 if *YYMSG is not large enough to hold the message. In that case, also set *YYMSG_ALLOC to the required number of bytes. Return 2 if the required number of bytes is too large to store. */ static int yysyntax_error (YYSIZE_T *yymsg_alloc, char **yymsg, yytype_int16 *yyssp, int yytoken) { YYSIZE_T yysize0 = yytnamerr (YY_NULLPTR, yytname[yytoken]); YYSIZE_T yysize = yysize0; enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 }; /* Internationalized format string. */ const char *yyformat = YY_NULLPTR; /* Arguments of yyformat. */ char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM]; /* Number of reported tokens (one for the "unexpected", one per "expected"). */ int yycount = 0; /* There are many possibilities here to consider: - If this state is a consistent state with a default action, then the only way this function was invoked is if the default action is an error action. In that case, don't check for expected tokens because there are none. - The only way there can be no lookahead present (in yychar) is if this state is a consistent state with a default action. Thus, detecting the absence of a lookahead is sufficient to determine that there is no unexpected or expected token to report. In that case, just report a simple "syntax error". - Don't assume there isn't a lookahead just because this state is a consistent state with a default action. There might have been a previous inconsistent state, consistent state with a non-default action, or user semantic action that manipulated yychar. - Of course, the expected token list depends on states to have correct lookahead information, and it depends on the parser not to perform extra reductions after fetching a lookahead from the scanner and before detecting a syntax error. Thus, state merging (from LALR or IELR) and default reductions corrupt the expected token list. However, the list is correct for canonical LR with one exception: it will still contain any token that will not be accepted due to an error action in a later state. */ if (yytoken != YYEMPTY) { int yyn = yypact[*yyssp]; yyarg[yycount++] = yytname[yytoken]; if (!yypact_value_is_default (yyn)) { /* Start YYX at -YYN if negative to avoid negative indexes in YYCHECK. In other words, skip the first -YYN actions for this state because they are default actions. */ int yyxbegin = yyn < 0 ? -yyn : 0; /* Stay within bounds of both yycheck and yytname. */ int yychecklim = YYLAST - yyn + 1; int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS; int yyx; for (yyx = yyxbegin; yyx < yyxend; ++yyx) if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR && !yytable_value_is_error (yytable[yyx + yyn])) { if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM) { yycount = 1; yysize = yysize0; break; } yyarg[yycount++] = yytname[yyx]; { YYSIZE_T yysize1 = yysize + yytnamerr (YY_NULLPTR, yytname[yyx]); if (! (yysize <= yysize1 && yysize1 <= YYSTACK_ALLOC_MAXIMUM)) return 2; yysize = yysize1; } } } } switch (yycount) { # define YYCASE_(N, S) \ case N: \ yyformat = S; \ break YYCASE_(0, YY_("syntax error")); YYCASE_(1, YY_("syntax error, unexpected %s")); YYCASE_(2, YY_("syntax error, unexpected %s, expecting %s")); YYCASE_(3, YY_("syntax error, unexpected %s, expecting %s or %s")); YYCASE_(4, YY_("syntax error, unexpected %s, expecting %s or %s or %s")); YYCASE_(5, YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s")); # undef YYCASE_ } { YYSIZE_T yysize1 = yysize + yystrlen (yyformat); if (! (yysize <= yysize1 && yysize1 <= YYSTACK_ALLOC_MAXIMUM)) return 2; yysize = yysize1; } if (*yymsg_alloc < yysize) { *yymsg_alloc = 2 * yysize; if (! (yysize <= *yymsg_alloc && *yymsg_alloc <= YYSTACK_ALLOC_MAXIMUM)) *yymsg_alloc = YYSTACK_ALLOC_MAXIMUM; return 1; } /* Avoid sprintf, as that infringes on the user's name space. Don't have undefined behavior even if the translation produced a string with the wrong number of "%s"s. */ { char *yyp = *yymsg; int yyi = 0; while ((*yyp = *yyformat) != '\0') if (*yyp == '%' && yyformat[1] == 's' && yyi < yycount) { yyp += yytnamerr (yyp, yyarg[yyi++]); yyformat += 2; } else { yyp++; yyformat++; } } return 0; } #endif /* YYERROR_VERBOSE */ /*-----------------------------------------------. | Release the memory associated to this symbol. | `-----------------------------------------------*/ static void yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep, YYLTYPE *yylocationp) { YYUSE (yyvaluep); YYUSE (yylocationp); if (!yymsg) yymsg = "Deleting"; YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp); YY_IGNORE_MAYBE_UNINITIALIZED_BEGIN YYUSE (yytype); YY_IGNORE_MAYBE_UNINITIALIZED_END } /* The lookahead symbol. */ int yychar; /* The semantic value of the lookahead symbol. */ YYSTYPE yylval; /* Location data for the lookahead symbol. */ YYLTYPE yylloc # if defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL = { 1, 1, 1, 1 } # endif ; /* Number of syntax errors so far. */ int yynerrs; /*----------. | yyparse. | `----------*/ int yyparse (void) { int yystate; /* Number of tokens to shift before error messages enabled. */ int yyerrstatus; /* The stacks and their tools: 'yyss': related to states. 'yyvs': related to semantic values. 'yyls': related to locations. Refer to the stacks through separate pointers, to allow yyoverflow to reallocate them elsewhere. */ /* The state stack. */ yytype_int16 yyssa[YYINITDEPTH]; yytype_int16 *yyss; yytype_int16 *yyssp; /* The semantic value stack. */ YYSTYPE yyvsa[YYINITDEPTH]; YYSTYPE *yyvs; YYSTYPE *yyvsp; /* The location stack. */ YYLTYPE yylsa[YYINITDEPTH]; YYLTYPE *yyls; YYLTYPE *yylsp; /* The locations where the error started and ended. */ YYLTYPE yyerror_range[3]; YYSIZE_T yystacksize; int yyn; int yyresult; /* Lookahead token as an internal (translated) token number. */ int yytoken = 0; /* The variables used to return semantic value and location from the action routines. */ YYSTYPE yyval; YYLTYPE yyloc; #if YYERROR_VERBOSE /* Buffer for error messages, and its allocated size. */ char yymsgbuf[128]; char *yymsg = yymsgbuf; YYSIZE_T yymsg_alloc = sizeof yymsgbuf; #endif #define YYPOPSTACK(N) (yyvsp -= (N), yyssp -= (N), yylsp -= (N)) /* The number of symbols on the RHS of the reduced rule. Keep to zero when no symbol should be popped. */ int yylen = 0; yyssp = yyss = yyssa; yyvsp = yyvs = yyvsa; yylsp = yyls = yylsa; yystacksize = YYINITDEPTH; YYDPRINTF ((stderr, "Starting parse\n")); yystate = 0; yyerrstatus = 0; yynerrs = 0; yychar = YYEMPTY; /* Cause a token to be read. */ yylsp[0] = yylloc; goto yysetstate; /*------------------------------------------------------------. | yynewstate -- Push a new state, which is found in yystate. | `------------------------------------------------------------*/ yynewstate: /* In all cases, when you get here, the value and location stacks have just been pushed. So pushing a state here evens the stacks. */ yyssp++; yysetstate: *yyssp = yystate; if (yyss + yystacksize - 1 <= yyssp) { /* Get the current used size of the three stacks, in elements. */ YYSIZE_T yysize = yyssp - yyss + 1; #ifdef yyoverflow { /* Give user a chance to reallocate the stack. Use copies of these so that the &'s don't force the real ones into memory. */ YYSTYPE *yyvs1 = yyvs; yytype_int16 *yyss1 = yyss; YYLTYPE *yyls1 = yyls; /* Each stack pointer address is followed by the size of the data in use in that stack, in bytes. This used to be a conditional around just the two extra args, but that might be undefined if yyoverflow is a macro. */ yyoverflow (YY_("memory exhausted"), &yyss1, yysize * sizeof (*yyssp), &yyvs1, yysize * sizeof (*yyvsp), &yyls1, yysize * sizeof (*yylsp), &yystacksize); yyls = yyls1; yyss = yyss1; yyvs = yyvs1; } #else /* no yyoverflow */ # ifndef YYSTACK_RELOCATE goto yyexhaustedlab; # else /* Extend the stack our own way. */ if (YYMAXDEPTH <= yystacksize) goto yyexhaustedlab; yystacksize *= 2; if (YYMAXDEPTH < yystacksize) yystacksize = YYMAXDEPTH; { yytype_int16 *yyss1 = yyss; union yyalloc *yyptr = (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize)); if (! yyptr) goto yyexhaustedlab; YYSTACK_RELOCATE (yyss_alloc, yyss); YYSTACK_RELOCATE (yyvs_alloc, yyvs); YYSTACK_RELOCATE (yyls_alloc, yyls); # undef YYSTACK_RELOCATE if (yyss1 != yyssa) YYSTACK_FREE (yyss1); } # endif #endif /* no yyoverflow */ yyssp = yyss + yysize - 1; yyvsp = yyvs + yysize - 1; yylsp = yyls + yysize - 1; YYDPRINTF ((stderr, "Stack size increased to %lu\n", (unsigned long int) yystacksize)); if (yyss + yystacksize - 1 <= yyssp) YYABORT; } YYDPRINTF ((stderr, "Entering state %d\n", yystate)); if (yystate == YYFINAL) YYACCEPT; goto yybackup; /*-----------. | yybackup. | `-----------*/ yybackup: /* Do appropriate processing given the current state. Read a lookahead token if we need one and don't already have one. */ /* First try to decide what to do without reference to lookahead token. */ yyn = yypact[yystate]; if (yypact_value_is_default (yyn)) goto yydefault; /* Not known => get a lookahead token if don't already have one. */ /* YYCHAR is either YYEMPTY or YYEOF or a valid lookahead symbol. */ if (yychar == YYEMPTY) { YYDPRINTF ((stderr, "Reading a token: ")); yychar = yylex (); } if (yychar <= YYEOF) { yychar = yytoken = YYEOF; YYDPRINTF ((stderr, "Now at end of input.\n")); } else { yytoken = YYTRANSLATE (yychar); YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc); } /* If the proper action on seeing token YYTOKEN is to reduce or to detect an error, take that action. */ yyn += yytoken; if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken) goto yydefault; yyn = yytable[yyn]; if (yyn <= 0) { if (yytable_value_is_error (yyn)) goto yyerrlab; yyn = -yyn; goto yyreduce; } /* Count tokens shifted since error; after three, turn off error status. */ if (yyerrstatus) yyerrstatus--; /* Shift the lookahead token. */ YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc); /* Discard the shifted token. */ yychar = YYEMPTY; yystate = yyn; YY_IGNORE_MAYBE_UNINITIALIZED_BEGIN *++yyvsp = yylval; YY_IGNORE_MAYBE_UNINITIALIZED_END *++yylsp = yylloc; goto yynewstate; /*-----------------------------------------------------------. | yydefault -- do the default action for the current state. | `-----------------------------------------------------------*/ yydefault: yyn = yydefact[yystate]; if (yyn == 0) goto yyerrlab; goto yyreduce; /*-----------------------------. | yyreduce -- Do a reduction. | `-----------------------------*/ yyreduce: /* yyn is the number of a rule to reduce with. */ yylen = yyr2[yyn]; /* If YYLEN is nonzero, implement the default value of the action: '$$ = $1'. Otherwise, the following line sets YYVAL to garbage. This behavior is undocumented and Bison users should not rely upon it. Assigning to YYVAL unconditionally makes the parser a bit smaller, and it avoids a GCC warning that YYVAL may be used uninitialized. */ yyval = yyvsp[1-yylen]; /* Default location. */ YYLLOC_DEFAULT (yyloc, (yylsp - yylen), yylen); YY_REDUCE_PRINT (yyn); switch (yyn) { case 2: #line 625 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = (yyvsp[0].integer); } #line 2845 "gram.c" /* yacc.c:1646 */ break; case 3: #line 626 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = -(yyvsp[0].integer);} #line 2851 "gram.c" /* yacc.c:1646 */ break; case 4: #line 629 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = (yyvsp[0].integer); } #line 2857 "gram.c" /* yacc.c:1646 */ break; case 5: #line 630 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = (yyvsp[-2].integer) + (yyvsp[0].integer); } #line 2863 "gram.c" /* yacc.c:1646 */ break; case 6: #line 631 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = (yyvsp[-2].integer) - (yyvsp[0].integer); } #line 2869 "gram.c" /* yacc.c:1646 */ break; case 7: #line 632 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = (yyvsp[-2].integer) * (yyvsp[0].integer); } #line 2875 "gram.c" /* yacc.c:1646 */ break; case 8: #line 633 "gram.y" /* yacc.c:1646 */ { if ((yyvsp[0].integer)) (yyval.integer) = (yyvsp[-2].integer) / (yyvsp[0].integer); else YYERROR;} #line 2881 "gram.c" /* yacc.c:1646 */ break; case 9: #line 634 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = -(yyvsp[0].integer);} #line 2887 "gram.c" /* yacc.c:1646 */ break; case 10: #line 635 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = (yyvsp[-1].integer); } #line 2893 "gram.c" /* yacc.c:1646 */ break; case 11: #line 639 "gram.y" /* yacc.c:1646 */ { compiled_program = (yyvsp[0].program); } #line 2901 "gram.c" /* yacc.c:1646 */ break; case 13: #line 649 "gram.y" /* yacc.c:1646 */ { (yyval.reg) = (yyvsp[0].reg); } #line 2909 "gram.c" /* yacc.c:1646 */ break; case 14: #line 654 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = (yyvsp[0].integer); } #line 2917 "gram.c" /* yacc.c:1646 */ break; case 15: #line 659 "gram.y" /* yacc.c:1646 */ { /* XXX is this default correct?*/ memset (&(yyval.region), '\0', sizeof ((yyval.region))); (yyval.region).vert_stride = ffs(0); (yyval.region).width = BRW_WIDTH_1; (yyval.region).horiz_stride = ffs(0); } #line 2929 "gram.c" /* yacc.c:1646 */ break; case 16: #line 667 "gram.y" /* yacc.c:1646 */ { (yyval.region) = (yyvsp[0].region); } #line 2937 "gram.c" /* yacc.c:1646 */ break; case 17: #line 672 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = 1; } #line 2945 "gram.c" /* yacc.c:1646 */ break; case 18: #line 676 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = (yyvsp[0].integer); } #line 2953 "gram.c" /* yacc.c:1646 */ break; case 19: #line 681 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = (yyvsp[0].regtype).type; } #line 2961 "gram.c" /* yacc.c:1646 */ break; case 20: #line 686 "gram.y" /* yacc.c:1646 */ { struct declared_register reg, *found, *new_reg; reg.name = (yyvsp[-5].string); reg.reg = (yyvsp[-4].reg); reg.element_size = (yyvsp[-3].integer); reg.src_region = (yyvsp[-2].region); reg.dst_region = (yyvsp[-1].integer); reg.reg.type = (yyvsp[0].integer); found = find_register((yyvsp[-5].string)); if (found) { if (!declared_register_equal(®, found)) error(&(yylsp[-6]), "%s already defined and definitions " "don't agree\n", (yyvsp[-5].string)); free((yyvsp[-5].string)); // $2 has been malloc'ed by strdup } else { new_reg = malloc(sizeof(struct declared_register)); *new_reg = reg; insert_register(new_reg); } } #line 2988 "gram.c" /* yacc.c:1646 */ break; case 23: #line 716 "gram.y" /* yacc.c:1646 */ { program_defaults.execute_size = (yyvsp[0].integer); } #line 2996 "gram.c" /* yacc.c:1646 */ break; case 24: #line 721 "gram.y" /* yacc.c:1646 */ { program_defaults.register_type = (yyvsp[0].regtype).type; } #line 3004 "gram.c" /* yacc.c:1646 */ break; case 30: #line 733 "gram.y" /* yacc.c:1646 */ { (yyval.program) = (yyvsp[-1].program); } #line 3012 "gram.c" /* yacc.c:1646 */ break; case 31: #line 737 "gram.y" /* yacc.c:1646 */ { brw_program_add_instruction(&(yyvsp[-2].program), &(yyvsp[-1].instruction)); (yyval.program) = (yyvsp[-2].program); } #line 3021 "gram.c" /* yacc.c:1646 */ break; case 32: #line 742 "gram.y" /* yacc.c:1646 */ { brw_program_init(&(yyval.program)); brw_program_add_instruction(&(yyval.program), &(yyvsp[-1].instruction)); } #line 3030 "gram.c" /* yacc.c:1646 */ break; case 33: #line 747 "gram.y" /* yacc.c:1646 */ { brw_program_add_relocatable(&(yyvsp[-2].program), &(yyvsp[-1].instruction)); (yyval.program) = (yyvsp[-2].program); } #line 3039 "gram.c" /* yacc.c:1646 */ break; case 34: #line 752 "gram.y" /* yacc.c:1646 */ { brw_program_init(&(yyval.program)); brw_program_add_relocatable(&(yyval.program), &(yyvsp[-1].instruction)); } #line 3048 "gram.c" /* yacc.c:1646 */ break; case 35: #line 757 "gram.y" /* yacc.c:1646 */ { (yyval.program) = (yyvsp[-1].program); } #line 3056 "gram.c" /* yacc.c:1646 */ break; case 36: #line 761 "gram.y" /* yacc.c:1646 */ { brw_program_add_label(&(yyvsp[-1].program), (yyvsp[0].string)); (yyval.program) = (yyvsp[-1].program); } #line 3065 "gram.c" /* yacc.c:1646 */ break; case 37: #line 766 "gram.y" /* yacc.c:1646 */ { brw_program_init(&(yyval.program)); brw_program_add_label(&(yyval.program), (yyvsp[0].string)); } #line 3074 "gram.c" /* yacc.c:1646 */ break; case 38: #line 771 "gram.y" /* yacc.c:1646 */ { (yyval.program).first = NULL; (yyval.program).last = NULL; } #line 3083 "gram.c" /* yacc.c:1646 */ break; case 39: #line 775 "gram.y" /* yacc.c:1646 */ { (yyval.program) = (yyvsp[-2].program); } #line 3091 "gram.c" /* yacc.c:1646 */ break; case 55: #line 804 "gram.y" /* yacc.c:1646 */ { // for Gen4 if(IS_GENp(6)) // For gen6+. error(&(yylsp[0]), "should be 'ENDIF execsize relativelocation'\n"); memset(&(yyval.instruction), 0, sizeof((yyval.instruction))); set_instruction_opcode(&(yyval.instruction), (yyvsp[0].integer)); GEN(&(yyval.instruction))->header.thread_control |= BRW_THREAD_SWITCH; GEN(&(yyval.instruction))->bits1.da1.dest_horiz_stride = 1; GEN(&(yyval.instruction))->bits1.da1.src1_reg_file = BRW_ARCHITECTURE_REGISTER_FILE; GEN(&(yyval.instruction))->bits1.da1.src1_reg_type = BRW_REGISTER_TYPE_UD; } #line 3107 "gram.c" /* yacc.c:1646 */ break; case 56: #line 816 "gram.y" /* yacc.c:1646 */ { // for Gen6+ /* Gen6, Gen7 bspec: predication is prohibited */ if(!IS_GENp(6)) // for gen6- error(&(yylsp[-3]), "ENDIF Syntax error: should be 'ENDIF'\n"); memset(&(yyval.instruction), 0, sizeof((yyval.instruction))); set_instruction_opcode(&(yyval.instruction), (yyvsp[-3].integer)); set_execsize(&(yyval.instruction), (yyvsp[-2].integer)); (yyval.instruction).reloc.first_reloc_target = (yyvsp[-1].src_operand).reloc_target; (yyval.instruction).reloc.first_reloc_offset = (yyvsp[-1].src_operand).imm32; } #line 3123 "gram.c" /* yacc.c:1646 */ break; case 57: #line 828 "gram.y" /* yacc.c:1646 */ { if(!IS_GENp(6)) { // for Gen4, Gen5. gen_level < 60 /* Set the istack pop count, which must always be 1. */ (yyvsp[-1].src_operand).imm32 |= (1 << 16); memset(&(yyval.instruction), 0, sizeof((yyval.instruction))); set_instruction_opcode(&(yyval.instruction), (yyvsp[-3].integer)); GEN(&(yyval.instruction))->header.thread_control |= BRW_THREAD_SWITCH; ip_dst.width = (yyvsp[-2].integer); set_instruction_dest(&(yyval.instruction), &ip_dst); set_instruction_src0(&(yyval.instruction), &ip_src, NULL); set_instruction_src1(&(yyval.instruction), &(yyvsp[-1].src_operand), NULL); (yyval.instruction).reloc.first_reloc_target = (yyvsp[-1].src_operand).reloc_target; (yyval.instruction).reloc.first_reloc_offset = (yyvsp[-1].src_operand).imm32; } else if(IS_GENp(6)) { memset(&(yyval.instruction), 0, sizeof((yyval.instruction))); set_instruction_opcode(&(yyval.instruction), (yyvsp[-3].integer)); set_execsize(&(yyval.instruction), (yyvsp[-2].integer)); (yyval.instruction).reloc.first_reloc_target = (yyvsp[-1].src_operand).reloc_target; (yyval.instruction).reloc.first_reloc_offset = (yyvsp[-1].src_operand).imm32; } else { error(&(yylsp[-3]), "'ELSE' instruction is not implemented.\n"); } } #line 3153 "gram.c" /* yacc.c:1646 */ break; case 58: #line 854 "gram.y" /* yacc.c:1646 */ { /* The branch instructions require that the IP register * be the destination and first source operand, while the * offset is the second source operand. The offset is added * to the pre-incremented IP. */ if(IS_GENp(7)) /* Error in Gen7+. */ error(&(yylsp[-2]), "IF should be 'IF execsize JIP UIP'\n"); memset(&(yyval.instruction), 0, sizeof((yyval.instruction))); set_instruction_predicate(&(yyval.instruction), &(yyvsp[-3].predicate)); set_instruction_opcode(&(yyval.instruction), (yyvsp[-2].integer)); if(!IS_GENp(6)) { GEN(&(yyval.instruction))->header.thread_control |= BRW_THREAD_SWITCH; ip_dst.width = (yyvsp[-1].integer); set_instruction_dest(&(yyval.instruction), &ip_dst); set_instruction_src0(&(yyval.instruction), &ip_src, NULL); set_instruction_src1(&(yyval.instruction), &(yyvsp[0].src_operand), NULL); } (yyval.instruction).reloc.first_reloc_target = (yyvsp[0].src_operand).reloc_target; (yyval.instruction).reloc.first_reloc_offset = (yyvsp[0].src_operand).imm32; } #line 3180 "gram.c" /* yacc.c:1646 */ break; case 59: #line 877 "gram.y" /* yacc.c:1646 */ { /* for Gen7+ */ if(!IS_GENp(7)) error(&(yylsp[-3]), "IF should be 'IF execsize relativelocation'\n"); memset(&(yyval.instruction), 0, sizeof((yyval.instruction))); set_instruction_predicate(&(yyval.instruction), &(yyvsp[-4].predicate)); set_instruction_opcode(&(yyval.instruction), (yyvsp[-3].integer)); set_execsize(&(yyval.instruction), (yyvsp[-2].integer)); (yyval.instruction).reloc.first_reloc_target = (yyvsp[-1].src_operand).reloc_target; (yyval.instruction).reloc.first_reloc_offset = (yyvsp[-1].src_operand).imm32; (yyval.instruction).reloc.second_reloc_target = (yyvsp[0].src_operand).reloc_target; (yyval.instruction).reloc.second_reloc_offset = (yyvsp[0].src_operand).imm32; } #line 3199 "gram.c" /* yacc.c:1646 */ break; case 60: #line 894 "gram.y" /* yacc.c:1646 */ { if(!IS_GENp(6)) { /* The branch instructions require that the IP register * be the destination and first source operand, while the * offset is the second source operand. The offset is added * to the pre-incremented IP. */ ip_dst.width = (yyvsp[-2].integer); set_instruction_dest(&(yyval.instruction), &ip_dst); memset(&(yyval.instruction), 0, sizeof((yyval.instruction))); set_instruction_predicate(&(yyval.instruction), &(yyvsp[-4].predicate)); set_instruction_opcode(&(yyval.instruction), (yyvsp[-3].integer)); GEN(&(yyval.instruction))->header.thread_control |= BRW_THREAD_SWITCH; set_instruction_src0(&(yyval.instruction), &ip_src, NULL); set_instruction_src1(&(yyval.instruction), &(yyvsp[-1].src_operand), NULL); (yyval.instruction).reloc.first_reloc_target = (yyvsp[-1].src_operand).reloc_target; (yyval.instruction).reloc.first_reloc_offset = (yyvsp[-1].src_operand).imm32; } else if (IS_GENp(6)) { /* Gen6 spec: dest must have the same element size as src0. dest horizontal stride must be 1. */ memset(&(yyval.instruction), 0, sizeof((yyval.instruction))); set_instruction_predicate(&(yyval.instruction), &(yyvsp[-4].predicate)); set_instruction_opcode(&(yyval.instruction), (yyvsp[-3].integer)); set_execsize(&(yyval.instruction), (yyvsp[-2].integer)); (yyval.instruction).reloc.first_reloc_target = (yyvsp[-1].src_operand).reloc_target; (yyval.instruction).reloc.first_reloc_offset = (yyvsp[-1].src_operand).imm32; } else { error(&(yylsp[-3]), "'WHILE' instruction is not implemented!\n"); } } #line 3235 "gram.c" /* yacc.c:1646 */ break; case 61: #line 926 "gram.y" /* yacc.c:1646 */ { // deprecated memset(&(yyval.instruction), 0, sizeof((yyval.instruction))); set_instruction_opcode(&(yyval.instruction), (yyvsp[0].integer)); } #line 3245 "gram.c" /* yacc.c:1646 */ break; case 62: #line 933 "gram.y" /* yacc.c:1646 */ { // for Gen6, Gen7 /* Gen6, Gen7 bspec: dst and src0 must be the null reg. */ memset(&(yyval.instruction), 0, sizeof((yyval.instruction))); set_instruction_predicate(&(yyval.instruction), &(yyvsp[-5].predicate)); set_instruction_opcode(&(yyval.instruction), (yyvsp[-4].integer)); (yyval.instruction).reloc.first_reloc_target = (yyvsp[-2].src_operand).reloc_target; (yyval.instruction).reloc.first_reloc_offset = (yyvsp[-2].src_operand).imm32; (yyval.instruction).reloc.second_reloc_target = (yyvsp[-1].src_operand).reloc_target; (yyval.instruction).reloc.second_reloc_offset = (yyvsp[-1].src_operand).imm32; dst_null_reg.width = (yyvsp[-3].integer); set_instruction_dest(&(yyval.instruction), &dst_null_reg); set_instruction_src0(&(yyval.instruction), &src_null_reg, NULL); } #line 3264 "gram.c" /* yacc.c:1646 */ break; case 63: #line 950 "gram.y" /* yacc.c:1646 */ { /* Gen7 bspec: dest must be null. use Switch option */ memset(&(yyval.instruction), 0, sizeof((yyval.instruction))); set_instruction_predicate(&(yyval.instruction), &(yyvsp[-4].predicate)); set_instruction_opcode(&(yyval.instruction), (yyvsp[-3].integer)); if (IS_GENp(8)) gen8_set_thread_control(GEN8(&(yyval.instruction)), gen8_thread_control(GEN8(&(yyval.instruction))) | BRW_THREAD_SWITCH); else GEN(&(yyval.instruction))->header.thread_control |= BRW_THREAD_SWITCH; (yyval.instruction).reloc.first_reloc_target = (yyvsp[-1].src_operand).reloc_target; (yyval.instruction).reloc.first_reloc_offset = (yyvsp[-1].src_operand).imm32; dst_null_reg.width = (yyvsp[-2].integer); set_instruction_dest(&(yyval.instruction), &dst_null_reg); } #line 3283 "gram.c" /* yacc.c:1646 */ break; case 64: #line 965 "gram.y" /* yacc.c:1646 */ { /* Gen7 bspec: dest must be null. src0 must be null. use Switch option */ memset(&(yyval.instruction), 0, sizeof((yyval.instruction))); set_instruction_predicate(&(yyval.instruction), &(yyvsp[-5].predicate)); set_instruction_opcode(&(yyval.instruction), (yyvsp[-4].integer)); if (IS_GENp(8)) gen8_set_thread_control(GEN8(&(yyval.instruction)), gen8_thread_control(GEN8(&(yyval.instruction))) | BRW_THREAD_SWITCH); else GEN(&(yyval.instruction))->header.thread_control |= BRW_THREAD_SWITCH; (yyval.instruction).reloc.first_reloc_target = (yyvsp[-2].src_operand).reloc_target; (yyval.instruction).reloc.first_reloc_offset = (yyvsp[-2].src_operand).imm32; (yyval.instruction).reloc.second_reloc_target = (yyvsp[-1].src_operand).reloc_target; (yyval.instruction).reloc.second_reloc_offset = (yyvsp[-1].src_operand).imm32; dst_null_reg.width = (yyvsp[-3].integer); set_instruction_dest(&(yyval.instruction), &dst_null_reg); set_instruction_src0(&(yyval.instruction), &src_null_reg, NULL); } #line 3305 "gram.c" /* yacc.c:1646 */ break; case 65: #line 986 "gram.y" /* yacc.c:1646 */ { /* Gen6 bspec: source, dest type should be DWORD. dest must be QWord aligned. source0 region control must be <2,2,1>. execution size must be 2. QtrCtrl is prohibited. JIP is an immediate operand, must be of type W. Gen7 bspec: source, dest type should be DWORD. dest must be QWord aligned. source0 region control must be <2,2,1>. execution size must be 2. */ memset(&(yyval.instruction), 0, sizeof((yyval.instruction))); set_instruction_predicate(&(yyval.instruction), &(yyvsp[-5].predicate)); set_instruction_opcode(&(yyval.instruction), (yyvsp[-4].integer)); (yyvsp[-2].reg).type = BRW_REGISTER_TYPE_D; /* dest type should be DWORD */ (yyvsp[-2].reg).width = BRW_WIDTH_2; /* execution size must be 2. */ set_instruction_dest(&(yyval.instruction), &(yyvsp[-2].reg)); struct src_operand src0; memset(&src0, 0, sizeof(src0)); src0.reg.type = BRW_REGISTER_TYPE_D; /* source type should be DWORD */ /* source0 region control must be <2,2,1>. */ src0.reg.hstride = 1; /*encoded 1*/ src0.reg.width = BRW_WIDTH_2; src0.reg.vstride = 2; /*encoded 2*/ set_instruction_src0(&(yyval.instruction), &src0, NULL); (yyval.instruction).reloc.first_reloc_target = (yyvsp[-1].src_operand).reloc_target; (yyval.instruction).reloc.first_reloc_offset = (yyvsp[-1].src_operand).imm32; } #line 3345 "gram.c" /* yacc.c:1646 */ break; case 66: #line 1022 "gram.y" /* yacc.c:1646 */ { /* Gen6, 7: source cannot be accumulator. dest must be null. src0 region control must be <2,2,1> (not specified clearly. should be same as CALL) */ memset(&(yyval.instruction), 0, sizeof((yyval.instruction))); set_instruction_predicate(&(yyval.instruction), &(yyvsp[-5].predicate)); set_instruction_opcode(&(yyval.instruction), (yyvsp[-4].integer)); dst_null_reg.width = BRW_WIDTH_2; /* execution size of RET should be 2 */ set_instruction_dest(&(yyval.instruction), &dst_null_reg); (yyvsp[-1].src_operand).reg.type = BRW_REGISTER_TYPE_D; (yyvsp[-1].src_operand).reg.hstride = 1; /*encoded 1*/ (yyvsp[-1].src_operand).reg.width = BRW_WIDTH_2; (yyvsp[-1].src_operand).reg.vstride = 2; /*encoded 2*/ set_instruction_src0(&(yyval.instruction), &(yyvsp[-1].src_operand), NULL); } #line 3368 "gram.c" /* yacc.c:1646 */ break; case 67: #line 1045 "gram.y" /* yacc.c:1646 */ { memset(&(yyval.instruction), 0, sizeof((yyval.instruction))); set_instruction_opcode(&(yyval.instruction), (yyvsp[-6].integer)); set_instruction_saturate(&(yyval.instruction), (yyvsp[-4].integer)); (yyvsp[-2].reg).width = (yyvsp[-3].integer); set_instruction_options(&(yyval.instruction), (yyvsp[0].options)); set_instruction_pred_cond(&(yyval.instruction), &(yyvsp[-7].predicate), &(yyvsp[-5].condition), &(yylsp[-5])); if (set_instruction_dest(&(yyval.instruction), &(yyvsp[-2].reg)) != 0) YYERROR; if (set_instruction_src0(&(yyval.instruction), &(yyvsp[-1].src_operand), &(yylsp[-1])) != 0) YYERROR; if (!IS_GENp(6) && get_type_size(GEN(&(yyval.instruction))->bits1.da1.dest_reg_type) * (1 << (yyvsp[-2].reg).width) == 64) GEN(&(yyval.instruction))->header.compression_control = BRW_COMPRESSION_COMPRESSED; } #line 3389 "gram.c" /* yacc.c:1646 */ break; case 82: #line 1071 "gram.y" /* yacc.c:1646 */ { memset(&(yyval.instruction), 0, sizeof((yyval.instruction))); set_instruction_opcode(&(yyval.instruction), (yyvsp[-7].integer)); set_instruction_saturate(&(yyval.instruction), (yyvsp[-5].integer)); set_instruction_options(&(yyval.instruction), (yyvsp[0].options)); set_instruction_pred_cond(&(yyval.instruction), &(yyvsp[-8].predicate), &(yyvsp[-6].condition), &(yylsp[-6])); (yyvsp[-3].reg).width = (yyvsp[-4].integer); if (set_instruction_dest(&(yyval.instruction), &(yyvsp[-3].reg)) != 0) YYERROR; if (set_instruction_src0(&(yyval.instruction), &(yyvsp[-2].src_operand), &(yylsp[-2])) != 0) YYERROR; if (set_instruction_src1(&(yyval.instruction), &(yyvsp[-1].src_operand), &(yylsp[-1])) != 0) YYERROR; if (!IS_GENp(6) && get_type_size(GEN(&(yyval.instruction))->bits1.da1.dest_reg_type) * (1 << (yyvsp[-3].reg).width) == 64) GEN(&(yyval.instruction))->header.compression_control = BRW_COMPRESSION_COMPRESSED; } #line 3412 "gram.c" /* yacc.c:1646 */ break; case 95: #line 1099 "gram.y" /* yacc.c:1646 */ { memset(&(yyval.instruction), 0, sizeof((yyval.instruction))); set_instruction_opcode(&(yyval.instruction), (yyvsp[-7].integer)); set_instruction_saturate(&(yyval.instruction), (yyvsp[-5].integer)); (yyvsp[-3].reg).width = (yyvsp[-4].integer); set_instruction_options(&(yyval.instruction), (yyvsp[0].options)); set_instruction_pred_cond(&(yyval.instruction), &(yyvsp[-8].predicate), &(yyvsp[-6].condition), &(yylsp[-6])); if (set_instruction_dest(&(yyval.instruction), &(yyvsp[-3].reg)) != 0) YYERROR; if (set_instruction_src0(&(yyval.instruction), &(yyvsp[-2].src_operand), &(yylsp[-2])) != 0) YYERROR; if (set_instruction_src1(&(yyval.instruction), &(yyvsp[-1].src_operand), &(yylsp[-1])) != 0) YYERROR; if (!IS_GENp(6) && get_type_size(GEN(&(yyval.instruction))->bits1.da1.dest_reg_type) * (1 << (yyvsp[-3].reg).width) == 64) GEN(&(yyval.instruction))->header.compression_control = BRW_COMPRESSION_COMPRESSED; } #line 3435 "gram.c" /* yacc.c:1646 */ break; case 113: #line 1129 "gram.y" /* yacc.c:1646 */ { memset(&(yyval.instruction), 0, sizeof((yyval.instruction))); set_instruction_pred_cond(&(yyval.instruction), &(yyvsp[-9].predicate), &(yyvsp[-7].condition), &(yylsp[-7])); set_instruction_opcode(&(yyval.instruction), (yyvsp[-8].integer)); set_instruction_saturate(&(yyval.instruction), (yyvsp[-6].integer)); (yyvsp[-4].reg).width = (yyvsp[-5].integer); if (set_instruction_dest_three_src(&(yyval.instruction), &(yyvsp[-4].reg))) YYERROR; if (set_instruction_src0_three_src(&(yyval.instruction), &(yyvsp[-3].src_operand))) YYERROR; if (set_instruction_src1_three_src(&(yyval.instruction), &(yyvsp[-2].src_operand))) YYERROR; if (set_instruction_src2_three_src(&(yyval.instruction), &(yyvsp[-1].src_operand))) YYERROR; set_instruction_options(&(yyval.instruction), (yyvsp[0].options)); } #line 3459 "gram.c" /* yacc.c:1646 */ break; case 116: #line 1155 "gram.y" /* yacc.c:1646 */ { /* Send instructions are messy. The first argument is the * post destination -- the grf register that the response * starts from. The second argument is the current * destination, which is the start of the message arguments * to the shared function, and where src0 payload is loaded * to if not null. The payload is typically based on the * grf 0 thread payload of your current thread, and is * implicitly loaded if non-null. */ memset(&(yyval.instruction), 0, sizeof((yyval.instruction))); set_instruction_opcode(&(yyval.instruction), (yyvsp[-10].integer)); (yyvsp[-7].reg).width = (yyvsp[-9].integer); GEN(&(yyval.instruction))->header.destreg__conditionalmod = (yyvsp[-8].integer); /* msg reg index */ set_instruction_predicate(&(yyval.instruction), &(yyvsp[-11].predicate)); if (set_instruction_dest(&(yyval.instruction), &(yyvsp[-7].reg)) != 0) YYERROR; if (IS_GENp(6)) { struct src_operand src0; memset(&src0, 0, sizeof(src0)); src0.reg.address_mode = BRW_ADDRESS_DIRECT; if (IS_GENp(7)) src0.reg.file = BRW_GENERAL_REGISTER_FILE; else src0.reg.file = BRW_MESSAGE_REGISTER_FILE; src0.reg.type = BRW_REGISTER_TYPE_D; src0.reg.nr = (yyvsp[-8].integer); src0.reg.subnr = 0; set_instruction_src0(&(yyval.instruction), &src0, NULL); } else { if (set_instruction_src0(&(yyval.instruction), &(yyvsp[-6].src_operand), &(yylsp[-6])) != 0) YYERROR; } if (IS_GENp(9)) { gen8_set_src1_reg_file(GEN8(&(yyval.instruction)), BRW_IMMEDIATE_VALUE); gen8_set_src1_reg_type(GEN8(&(yyval.instruction)), BRW_REGISTER_TYPE_D); gen9_set_send_extdesc(GEN8(&(yyval.instruction)), 0); } else if (IS_GENp(8)) { gen8_set_src1_reg_file(GEN8(&(yyval.instruction)), BRW_IMMEDIATE_VALUE); gen8_set_src1_reg_type(GEN8(&(yyval.instruction)), BRW_REGISTER_TYPE_D); } else { GEN(&(yyval.instruction))->bits1.da1.src1_reg_file = BRW_IMMEDIATE_VALUE; GEN(&(yyval.instruction))->bits1.da1.src1_reg_type = BRW_REGISTER_TYPE_D; } if (IS_GENp(8)) { GEN8(&(yyval.instruction))->data[3] = GEN8(&(yyvsp[-5].instruction))->data[3]; gen8_set_sfid(GEN8(&(yyval.instruction)), gen8_sfid(GEN8(&(yyvsp[-5].instruction)))); gen8_set_mlen(GEN8(&(yyval.instruction)), (yyvsp[-3].integer)); gen8_set_rlen(GEN8(&(yyval.instruction)), (yyvsp[-1].integer)); gen8_set_eot(GEN8(&(yyval.instruction)), (yyvsp[0].options).end_of_thread); } else if (IS_GENp(5)) { if (IS_GENp(6)) { GEN(&(yyval.instruction))->header.destreg__conditionalmod = GEN(&(yyvsp[-5].instruction))->bits2.send_gen5.sfid; } else { GEN(&(yyval.instruction))->header.destreg__conditionalmod = (yyvsp[-8].integer); /* msg reg index */ GEN(&(yyval.instruction))->bits2.send_gen5.sfid = GEN(&(yyvsp[-5].instruction))->bits2.send_gen5.sfid; GEN(&(yyval.instruction))->bits2.send_gen5.end_of_thread = (yyvsp[0].options).end_of_thread; } GEN(&(yyval.instruction))->bits3.generic_gen5 = GEN(&(yyvsp[-5].instruction))->bits3.generic_gen5; GEN(&(yyval.instruction))->bits3.generic_gen5.msg_length = (yyvsp[-3].integer); GEN(&(yyval.instruction))->bits3.generic_gen5.response_length = (yyvsp[-1].integer); GEN(&(yyval.instruction))->bits3.generic_gen5.end_of_thread = (yyvsp[0].options).end_of_thread; } else { GEN(&(yyval.instruction))->header.destreg__conditionalmod = (yyvsp[-8].integer); /* msg reg index */ GEN(&(yyval.instruction))->bits3.generic = GEN(&(yyvsp[-5].instruction))->bits3.generic; GEN(&(yyval.instruction))->bits3.generic.msg_length = (yyvsp[-3].integer); GEN(&(yyval.instruction))->bits3.generic.response_length = (yyvsp[-1].integer); GEN(&(yyval.instruction))->bits3.generic.end_of_thread = (yyvsp[0].options).end_of_thread; } } #line 3541 "gram.c" /* yacc.c:1646 */ break; case 117: #line 1233 "gram.y" /* yacc.c:1646 */ { if (IS_GENp(6)) error(&(yylsp[-6]), "invalid syntax for send on gen6+\n"); memset(&(yyval.instruction), 0, sizeof((yyval.instruction))); set_instruction_opcode(&(yyval.instruction), (yyvsp[-6].integer)); GEN(&(yyval.instruction))->header.destreg__conditionalmod = (yyvsp[-3].reg).nr; /* msg reg index */ set_instruction_predicate(&(yyval.instruction), &(yyvsp[-7].predicate)); (yyvsp[-4].reg).width = (yyvsp[-5].integer); if (set_instruction_dest(&(yyval.instruction), &(yyvsp[-4].reg)) != 0) YYERROR; if (set_instruction_src0(&(yyval.instruction), &(yyvsp[-2].src_operand), &(yylsp[-2])) != 0) YYERROR; /* XXX is this correct? */ if (set_instruction_src1(&(yyval.instruction), &(yyvsp[-1].src_operand), &(yylsp[-1])) != 0) YYERROR; } #line 3566 "gram.c" /* yacc.c:1646 */ break; case 118: #line 1254 "gram.y" /* yacc.c:1646 */ { if (IS_GENp(6)) error(&(yylsp[-6]), "invalid syntax for send on gen6+\n"); if ((yyvsp[-1].src_operand).reg.type != BRW_REGISTER_TYPE_UD && (yyvsp[-1].src_operand).reg.type != BRW_REGISTER_TYPE_D && (yyvsp[-1].src_operand).reg.type != BRW_REGISTER_TYPE_V) { error (&(yylsp[-1]), "non-int D/UD/V representation: %d," "type=%d\n", (yyvsp[-1].src_operand).reg.dw1.ud, (yyvsp[-1].src_operand).reg.type); } memset(&(yyval.instruction), 0, sizeof((yyval.instruction))); set_instruction_opcode(&(yyval.instruction), (yyvsp[-6].integer)); GEN(&(yyval.instruction))->header.destreg__conditionalmod = (yyvsp[-3].reg).nr; /* msg reg index */ set_instruction_predicate(&(yyval.instruction), &(yyvsp[-7].predicate)); (yyvsp[-4].reg).width = (yyvsp[-5].integer); if (set_instruction_dest(&(yyval.instruction), &(yyvsp[-4].reg)) != 0) YYERROR; if (set_instruction_src0(&(yyval.instruction), &(yyvsp[-2].src_operand), &(yylsp[-2])) != 0) YYERROR; if (set_instruction_src1(&(yyval.instruction), &(yyvsp[-1].src_operand), &(yylsp[-1])) != 0) YYERROR; } #line 3594 "gram.c" /* yacc.c:1646 */ break; case 119: #line 1278 "gram.y" /* yacc.c:1646 */ { struct src_operand src0; if (!IS_GENp(6)) error(&(yylsp[-6]), "invalid syntax for send on gen6+\n"); if ((yyvsp[-1].src_operand).reg.type != BRW_REGISTER_TYPE_UD && (yyvsp[-1].src_operand).reg.type != BRW_REGISTER_TYPE_D && (yyvsp[-1].src_operand).reg.type != BRW_REGISTER_TYPE_V) { error(&(yylsp[-1]),"non-int D/UD/V representation: %d," "type=%d\n", (yyvsp[-1].src_operand).reg.dw1.ud, (yyvsp[-1].src_operand).reg.type); } memset(&(yyval.instruction), 0, sizeof((yyval.instruction))); set_instruction_opcode(&(yyval.instruction), (yyvsp[-6].integer)); set_instruction_predicate(&(yyval.instruction), &(yyvsp[-7].predicate)); (yyvsp[-4].reg).width = (yyvsp[-5].integer); if (set_instruction_dest(&(yyval.instruction), &(yyvsp[-4].reg)) != 0) YYERROR; memset(&src0, 0, sizeof(src0)); src0.reg.address_mode = BRW_ADDRESS_DIRECT; if (IS_GENp(7)) { src0.reg.file = BRW_GENERAL_REGISTER_FILE; src0.reg.type = BRW_REGISTER_TYPE_UB; } else { src0.reg.file = BRW_MESSAGE_REGISTER_FILE; src0.reg.type = BRW_REGISTER_TYPE_D; } src0.reg.nr = (yyvsp[-3].reg).nr; src0.reg.subnr = 0; set_instruction_src0(&(yyval.instruction), &src0, NULL); set_instruction_src1(&(yyval.instruction), &(yyvsp[-1].src_operand), NULL); if (IS_GENp(9)) { gen8_set_sfid(GEN8(&(yyval.instruction)), (yyvsp[-2].integer) & EX_DESC_SFID_MASK); gen8_set_eot(GEN8(&(yyval.instruction)), !!((yyvsp[-2].integer) & EX_DESC_EOT_MASK)); gen9_set_send_extdesc(GEN8(&(yyval.instruction)), (yyvsp[-2].integer) & EX_DESC_FUNC_MASK); } else if (IS_GENp(8)) { gen8_set_sfid(GEN8(&(yyval.instruction)), (yyvsp[-2].integer) & EX_DESC_SFID_MASK); gen8_set_eot(GEN8(&(yyval.instruction)), !!((yyvsp[-2].integer) & EX_DESC_EOT_MASK)); } else { GEN(&(yyval.instruction))->header.destreg__conditionalmod = ((yyvsp[-2].integer) & EX_DESC_SFID_MASK); /* SFID */ GEN(&(yyval.instruction))->bits3.generic_gen5.end_of_thread = !!((yyvsp[-2].integer) & EX_DESC_EOT_MASK); } } #line 3648 "gram.c" /* yacc.c:1646 */ break; case 120: #line 1328 "gram.y" /* yacc.c:1646 */ { struct src_operand src0; if (!IS_GENp(6)) error(&(yylsp[-6]), "invalid syntax for send on gen6+\n"); if ((yyvsp[-1].src_operand).reg.file != BRW_ARCHITECTURE_REGISTER_FILE || ((yyvsp[-1].src_operand).reg.nr & 0xF0) != BRW_ARF_ADDRESS || ((yyvsp[-1].src_operand).reg.nr & 0x0F) != 0 || (yyvsp[-1].src_operand).reg.subnr != 0) { error (&(yylsp[-1]), "scalar register must be a0.0<0;1,0>:ud\n"); } memset(&(yyval.instruction), 0, sizeof((yyval.instruction))); set_instruction_opcode(&(yyval.instruction), (yyvsp[-6].integer)); set_instruction_predicate(&(yyval.instruction), &(yyvsp[-7].predicate)); (yyvsp[-4].reg).width = (yyvsp[-5].integer); if (set_instruction_dest(&(yyval.instruction), &(yyvsp[-4].reg)) != 0) YYERROR; memset(&src0, 0, sizeof(src0)); src0.reg.address_mode = BRW_ADDRESS_DIRECT; if (IS_GENp(7)) { src0.reg.file = BRW_GENERAL_REGISTER_FILE; src0.reg.type = BRW_REGISTER_TYPE_UB; } else { src0.reg.file = BRW_MESSAGE_REGISTER_FILE; src0.reg.type = BRW_REGISTER_TYPE_D; } src0.reg.nr = (yyvsp[-3].reg).nr; src0.reg.subnr = 0; set_instruction_src0(&(yyval.instruction), &src0, NULL); set_instruction_src1(&(yyval.instruction), &(yyvsp[-1].src_operand), &(yylsp[-1])); if (IS_GENp(8)) { gen8_set_sfid(GEN8(&(yyval.instruction)), (yyvsp[-2].integer) & EX_DESC_SFID_MASK); gen8_set_eot(GEN8(&(yyval.instruction)), !!((yyvsp[-2].integer) & EX_DESC_EOT_MASK)); gen9_set_send_extdesc(GEN8(&(yyval.instruction)), (yyvsp[-2].integer) & EX_DESC_FUNC_MASK); } else if (IS_GENp(8)) { gen8_set_sfid(GEN8(&(yyval.instruction)), (yyvsp[-2].integer) & EX_DESC_SFID_MASK); gen8_set_eot(GEN8(&(yyval.instruction)), !!((yyvsp[-2].integer) & EX_DESC_EOT_MASK)); } else { GEN(&(yyval.instruction))->header.destreg__conditionalmod = ((yyvsp[-2].integer) & EX_DESC_SFID_MASK); /* SFID */ GEN(&(yyval.instruction))->bits3.generic_gen5.end_of_thread = !!((yyvsp[-2].integer) & EX_DESC_EOT_MASK); } } #line 3703 "gram.c" /* yacc.c:1646 */ break; case 121: #line 1379 "gram.y" /* yacc.c:1646 */ { if (IS_GENp(6)) error(&(yylsp[-7]), "invalid syntax for send on gen6+\n"); if ((yyvsp[-1].src_operand).reg.type != BRW_REGISTER_TYPE_UD && (yyvsp[-1].src_operand).reg.type != BRW_REGISTER_TYPE_D && (yyvsp[-1].src_operand).reg.type != BRW_REGISTER_TYPE_V) { error(&(yylsp[-1]), "non-int D/UD/V representation: %d," "type=%d\n", (yyvsp[-1].src_operand).reg.dw1.ud, (yyvsp[-1].src_operand).reg.type); } memset(&(yyval.instruction), 0, sizeof((yyval.instruction))); set_instruction_opcode(&(yyval.instruction), (yyvsp[-7].integer)); GEN(&(yyval.instruction))->header.destreg__conditionalmod = (yyvsp[-4].reg).nr; /* msg reg index */ set_instruction_predicate(&(yyval.instruction), &(yyvsp[-8].predicate)); (yyvsp[-5].reg).width = (yyvsp[-6].integer); if (set_instruction_dest(&(yyval.instruction), &(yyvsp[-5].reg)) != 0) YYERROR; if (set_instruction_src0(&(yyval.instruction), &(yyvsp[-3].src_operand), &(yylsp[-3])) != 0) YYERROR; if (set_instruction_src1(&(yyval.instruction), &(yyvsp[-1].src_operand), &(yylsp[-1])) != 0) YYERROR; if (IS_GENx(5)) { GEN(&(yyval.instruction))->bits2.send_gen5.sfid = ((yyvsp[-2].integer) & EX_DESC_SFID_MASK); GEN(&(yyval.instruction))->bits3.generic_gen5.end_of_thread = !!((yyvsp[-2].integer) & EX_DESC_EOT_MASK); } } #line 3736 "gram.c" /* yacc.c:1646 */ break; case 122: #line 1408 "gram.y" /* yacc.c:1646 */ { if (IS_GENp(6)) error(&(yylsp[-7]), "invalid syntax for send on gen6+\n"); memset(&(yyval.instruction), 0, sizeof((yyval.instruction))); set_instruction_opcode(&(yyval.instruction), (yyvsp[-7].integer)); GEN(&(yyval.instruction))->header.destreg__conditionalmod = (yyvsp[-4].reg).nr; /* msg reg index */ set_instruction_predicate(&(yyval.instruction), &(yyvsp[-8].predicate)); (yyvsp[-5].reg).width = (yyvsp[-6].integer); if (set_instruction_dest(&(yyval.instruction), &(yyvsp[-5].reg)) != 0) YYERROR; if (set_instruction_src0(&(yyval.instruction), &(yyvsp[-3].src_operand), &(yylsp[-3])) != 0) YYERROR; /* XXX is this correct? */ if (set_instruction_src1(&(yyval.instruction), &(yyvsp[-1].src_operand), &(yylsp[-1])) != 0) YYERROR; if (IS_GENx(5)) { GEN(&(yyval.instruction))->bits2.send_gen5.sfid = (yyvsp[-2].integer); } } #line 3763 "gram.c" /* yacc.c:1646 */ break; case 123: #line 1434 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = (yyvsp[0].integer); } #line 3771 "gram.c" /* yacc.c:1646 */ break; case 124: #line 1440 "gram.y" /* yacc.c:1646 */ { /* The jump instruction requires that the IP register * be the destination and first source operand, while the * offset is the second source operand. The next instruction * is the post-incremented IP plus the offset. */ memset(&(yyval.instruction), 0, sizeof((yyval.instruction))); set_instruction_opcode(&(yyval.instruction), (yyvsp[-2].integer)); if(advanced_flag) { if (IS_GENp(8)) gen8_set_mask_control(GEN8(&(yyval.instruction)), BRW_MASK_DISABLE); else GEN(&(yyval.instruction))->header.mask_control = BRW_MASK_DISABLE; } set_instruction_predicate(&(yyval.instruction), &(yyvsp[-3].predicate)); ip_dst.width = BRW_WIDTH_1; set_instruction_dest(&(yyval.instruction), &ip_dst); set_instruction_src0(&(yyval.instruction), &ip_src, NULL); set_instruction_src1(&(yyval.instruction), &(yyvsp[0].src_operand), NULL); (yyval.instruction).reloc.first_reloc_target = (yyvsp[0].src_operand).reloc_target; (yyval.instruction).reloc.first_reloc_offset = (yyvsp[0].src_operand).imm32; } #line 3798 "gram.c" /* yacc.c:1646 */ break; case 125: #line 1465 "gram.y" /* yacc.c:1646 */ { memset(&(yyval.instruction), 0, sizeof((yyval.instruction))); set_instruction_opcode(&(yyval.instruction), (yyvsp[-6].integer)); if (IS_GENp(8)) gen8_set_math_function(GEN8(&(yyval.instruction)), (yyvsp[-1].integer)); else GEN(&(yyval.instruction))->header.destreg__conditionalmod = (yyvsp[-1].integer); set_instruction_options(&(yyval.instruction), (yyvsp[0].options)); set_instruction_predicate(&(yyval.instruction), &(yyvsp[-7].predicate)); (yyvsp[-4].reg).width = (yyvsp[-5].integer); if (set_instruction_dest(&(yyval.instruction), &(yyvsp[-4].reg)) != 0) YYERROR; if (set_instruction_src0(&(yyval.instruction), &(yyvsp[-3].src_operand), &(yylsp[-3])) != 0) YYERROR; if (set_instruction_src1(&(yyval.instruction), &(yyvsp[-2].src_operand), &(yylsp[-2])) != 0) YYERROR; } #line 3822 "gram.c" /* yacc.c:1646 */ break; case 126: #line 1487 "gram.y" /* yacc.c:1646 */ { // for Gen6, Gen7 memset(&(yyval.instruction), 0, sizeof((yyval.instruction))); set_instruction_predicate(&(yyval.instruction), &(yyvsp[-5].predicate)); set_instruction_opcode(&(yyval.instruction), (yyvsp[-4].integer)); set_execsize(&(yyval.instruction), (yyvsp[-3].integer)); (yyval.instruction).reloc.first_reloc_target = (yyvsp[-2].src_operand).reloc_target; (yyval.instruction).reloc.first_reloc_offset = (yyvsp[-2].src_operand).imm32; (yyval.instruction).reloc.second_reloc_target = (yyvsp[-1].src_operand).reloc_target; (yyval.instruction).reloc.second_reloc_offset = (yyvsp[-1].src_operand).imm32; } #line 3838 "gram.c" /* yacc.c:1646 */ break; case 129: #line 1509 "gram.y" /* yacc.c:1646 */ { struct brw_reg notify_dst; struct src_operand notify_src; memset(&(yyval.instruction), 0, sizeof((yyval.instruction))); set_instruction_opcode(&(yyval.instruction), (yyvsp[-1].integer)); set_direct_dst_operand(¬ify_dst, &(yyvsp[0].reg), BRW_REGISTER_TYPE_D); notify_dst.width = BRW_WIDTH_1; set_instruction_dest(&(yyval.instruction), ¬ify_dst); set_direct_src_operand(¬ify_src, &(yyvsp[0].reg), BRW_REGISTER_TYPE_D); set_instruction_src0(&(yyval.instruction), ¬ify_src, NULL); set_instruction_src1(&(yyval.instruction), &src_null_reg, NULL); } #line 3856 "gram.c" /* yacc.c:1646 */ break; case 130: #line 1526 "gram.y" /* yacc.c:1646 */ { memset(&(yyval.instruction), 0, sizeof((yyval.instruction))); set_instruction_opcode(&(yyval.instruction), (yyvsp[0].integer)); } #line 3865 "gram.c" /* yacc.c:1646 */ break; case 133: #line 1539 "gram.y" /* yacc.c:1646 */ { if (IS_GENp(8)) { gen8_set_sfid(GEN8(&(yyval.instruction)), BRW_SFID_NULL); gen8_set_header_present(GEN8(&(yyval.instruction)), 0); } else if (IS_GENp(5)) { GEN(&(yyval.instruction))->bits2.send_gen5.sfid= BRW_SFID_NULL; GEN(&(yyval.instruction))->bits3.generic_gen5.header_present = 0; /* ??? */ } else { GEN(&(yyval.instruction))->bits3.generic.msg_target = BRW_SFID_NULL; } } #line 3881 "gram.c" /* yacc.c:1646 */ break; case 134: #line 1552 "gram.y" /* yacc.c:1646 */ { if (IS_GENp(8)) { gen8_set_sfid(GEN8(&(yyval.instruction)), BRW_SFID_SAMPLER); gen8_set_header_present(GEN8(&(yyval.instruction)), 1); /* ??? */ gen8_set_binding_table_index(GEN8(&(yyval.instruction)), (yyvsp[-5].integer)); gen8_set_sampler(GEN8(&(yyval.instruction)), (yyvsp[-3].integer)); gen8_set_sampler_simd_mode(GEN8(&(yyval.instruction)), 2); /* SIMD16 */ } else if (IS_GENp(7)) { GEN(&(yyval.instruction))->bits2.send_gen5.sfid = BRW_SFID_SAMPLER; GEN(&(yyval.instruction))->bits3.generic_gen5.header_present = 1; /* ??? */ GEN(&(yyval.instruction))->bits3.sampler_gen7.binding_table_index = (yyvsp[-5].integer); GEN(&(yyval.instruction))->bits3.sampler_gen7.sampler = (yyvsp[-3].integer); GEN(&(yyval.instruction))->bits3.sampler_gen7.simd_mode = 2; /* SIMD16, maybe we should add a new parameter */ } else if (IS_GENp(5)) { GEN(&(yyval.instruction))->bits2.send_gen5.sfid = BRW_SFID_SAMPLER; GEN(&(yyval.instruction))->bits3.generic_gen5.header_present = 1; /* ??? */ GEN(&(yyval.instruction))->bits3.sampler_gen5.binding_table_index = (yyvsp[-5].integer); GEN(&(yyval.instruction))->bits3.sampler_gen5.sampler = (yyvsp[-3].integer); GEN(&(yyval.instruction))->bits3.sampler_gen5.simd_mode = 2; /* SIMD16, maybe we should add a new parameter */ } else { GEN(&(yyval.instruction))->bits3.generic.msg_target = BRW_SFID_SAMPLER; GEN(&(yyval.instruction))->bits3.sampler.binding_table_index = (yyvsp[-5].integer); GEN(&(yyval.instruction))->bits3.sampler.sampler = (yyvsp[-3].integer); switch ((yyvsp[-1].integer)) { case TYPE_F: GEN(&(yyval.instruction))->bits3.sampler.return_format = BRW_SAMPLER_RETURN_FORMAT_FLOAT32; break; case TYPE_UD: GEN(&(yyval.instruction))->bits3.sampler.return_format = BRW_SAMPLER_RETURN_FORMAT_UINT32; break; case TYPE_D: GEN(&(yyval.instruction))->bits3.sampler.return_format = BRW_SAMPLER_RETURN_FORMAT_SINT32; break; } } } #line 3925 "gram.c" /* yacc.c:1646 */ break; case 135: #line 1592 "gram.y" /* yacc.c:1646 */ { if (IS_GENp(6)) { error (&(yylsp[-4]), "Gen6+ doesn't have math function\n"); } else if (IS_GENx(5)) { GEN(&(yyval.instruction))->bits2.send_gen5.sfid = BRW_SFID_MATH; GEN(&(yyval.instruction))->bits3.generic_gen5.header_present = 0; GEN(&(yyval.instruction))->bits3.math_gen5.function = (yyvsp[-3].integer); set_instruction_saturate(&(yyval.instruction), (yyvsp[-2].integer)); GEN(&(yyval.instruction))->bits3.math_gen5.int_type = (yyvsp[-1].integer); GEN(&(yyval.instruction))->bits3.math_gen5.precision = BRW_MATH_PRECISION_FULL; GEN(&(yyval.instruction))->bits3.math_gen5.data_type = (yyvsp[0].integer); } else { GEN(&(yyval.instruction))->bits3.generic.msg_target = BRW_SFID_MATH; GEN(&(yyval.instruction))->bits3.math.function = (yyvsp[-3].integer); set_instruction_saturate(&(yyval.instruction), (yyvsp[-2].integer)); GEN(&(yyval.instruction))->bits3.math.int_type = (yyvsp[-1].integer); GEN(&(yyval.instruction))->bits3.math.precision = BRW_MATH_PRECISION_FULL; GEN(&(yyval.instruction))->bits3.math.data_type = (yyvsp[0].integer); } } #line 3950 "gram.c" /* yacc.c:1646 */ break; case 136: #line 1613 "gram.y" /* yacc.c:1646 */ { if (IS_GENp(5)) { GEN(&(yyval.instruction))->bits2.send_gen5.sfid = BRW_SFID_MESSAGE_GATEWAY; GEN(&(yyval.instruction))->bits3.generic_gen5.header_present = 0; /* ??? */ } else { GEN(&(yyval.instruction))->bits3.generic.msg_target = BRW_SFID_MESSAGE_GATEWAY; } } #line 3963 "gram.c" /* yacc.c:1646 */ break; case 137: #line 1623 "gram.y" /* yacc.c:1646 */ { if (IS_GENp(9)) { if ((yyvsp[-5].integer) != 0 && (yyvsp[-5].integer) != GEN6_SFID_DATAPORT_RENDER_CACHE && (yyvsp[-5].integer) != GEN7_SFID_DATAPORT_DATA_CACHE && (yyvsp[-5].integer) != HSW_SFID_DATAPORT_DATA_CACHE1 && (yyvsp[-5].integer) != SKL_SFID_DATAPORT_DCR0 && (yyvsp[-5].integer) != SKL_SFID_DATAPORT_DATA_CACHE2) { error (&(yylsp[-1]), "error: wrong cache type\n"); } if ((yyvsp[-5].integer) == 0) gen8_set_sfid(GEN8(&(yyval.instruction)), HSW_SFID_DATAPORT_DATA_CACHE1); else gen8_set_sfid(GEN8(&(yyval.instruction)), (yyvsp[-5].integer)); gen8_set_header_present(GEN8(&(yyval.instruction)), 1); gen8_set_dp_binding_table_index(GEN8(&(yyval.instruction)), (yyvsp[-7].integer)); gen8_set_dp_message_control(GEN8(&(yyval.instruction)), (yyvsp[-3].integer)); gen8_set_dp_message_type(GEN8(&(yyval.instruction)), (yyvsp[-1].integer)); gen8_set_dp_category(GEN8(&(yyval.instruction)), 0); } else if (IS_GENp(8)) { gen8_set_sfid(GEN8(&(yyval.instruction)), GEN6_SFID_DATAPORT_SAMPLER_CACHE); gen8_set_header_present(GEN8(&(yyval.instruction)), 1); gen8_set_dp_binding_table_index(GEN8(&(yyval.instruction)), (yyvsp[-7].integer)); gen8_set_dp_message_control(GEN8(&(yyval.instruction)), (yyvsp[-3].integer)); gen8_set_dp_message_type(GEN8(&(yyval.instruction)), (yyvsp[-1].integer)); gen8_set_dp_category(GEN8(&(yyval.instruction)), 0); } else if (IS_GENx(7)) { GEN(&(yyval.instruction))->bits2.send_gen5.sfid = GEN6_SFID_DATAPORT_SAMPLER_CACHE; GEN(&(yyval.instruction))->bits3.generic_gen5.header_present = 1; GEN(&(yyval.instruction))->bits3.gen7_dp.binding_table_index = (yyvsp[-7].integer); GEN(&(yyval.instruction))->bits3.gen7_dp.msg_control = (yyvsp[-3].integer); GEN(&(yyval.instruction))->bits3.gen7_dp.msg_type = (yyvsp[-1].integer); } else if (IS_GENx(6)) { GEN(&(yyval.instruction))->bits2.send_gen5.sfid = GEN6_SFID_DATAPORT_SAMPLER_CACHE; GEN(&(yyval.instruction))->bits3.generic_gen5.header_present = 1; GEN(&(yyval.instruction))->bits3.gen6_dp_sampler_const_cache.binding_table_index = (yyvsp[-7].integer); GEN(&(yyval.instruction))->bits3.gen6_dp_sampler_const_cache.msg_control = (yyvsp[-3].integer); GEN(&(yyval.instruction))->bits3.gen6_dp_sampler_const_cache.msg_type = (yyvsp[-1].integer); } else if (IS_GENx(5)) { GEN(&(yyval.instruction))->bits2.send_gen5.sfid = BRW_SFID_DATAPORT_READ; GEN(&(yyval.instruction))->bits3.generic_gen5.header_present = 1; GEN(&(yyval.instruction))->bits3.dp_read_gen5.binding_table_index = (yyvsp[-7].integer); GEN(&(yyval.instruction))->bits3.dp_read_gen5.target_cache = (yyvsp[-5].integer); GEN(&(yyval.instruction))->bits3.dp_read_gen5.msg_control = (yyvsp[-3].integer); GEN(&(yyval.instruction))->bits3.dp_read_gen5.msg_type = (yyvsp[-1].integer); } else { GEN(&(yyval.instruction))->bits3.generic.msg_target = BRW_SFID_DATAPORT_READ; GEN(&(yyval.instruction))->bits3.dp_read.binding_table_index = (yyvsp[-7].integer); GEN(&(yyval.instruction))->bits3.dp_read.target_cache = (yyvsp[-5].integer); GEN(&(yyval.instruction))->bits3.dp_read.msg_control = (yyvsp[-3].integer); GEN(&(yyval.instruction))->bits3.dp_read.msg_type = (yyvsp[-1].integer); } } #line 4027 "gram.c" /* yacc.c:1646 */ break; case 138: #line 1684 "gram.y" /* yacc.c:1646 */ { if (IS_GENp(8)) { if (IS_GENp(9)) { if ((yyvsp[-1].integer) != 0 && (yyvsp[-1].integer) != GEN6_SFID_DATAPORT_RENDER_CACHE && (yyvsp[-1].integer) != GEN7_SFID_DATAPORT_DATA_CACHE && (yyvsp[-1].integer) != HSW_SFID_DATAPORT_DATA_CACHE1 && (yyvsp[-1].integer) != SKL_SFID_DATAPORT_DATA_CACHE2) { error (&(yylsp[-1]), "error: wrong cache type\n"); } } else { if ((yyvsp[-1].integer) != 0 && (yyvsp[-1].integer) != GEN6_SFID_DATAPORT_RENDER_CACHE && (yyvsp[-1].integer) != GEN7_SFID_DATAPORT_DATA_CACHE && (yyvsp[-1].integer) != HSW_SFID_DATAPORT_DATA_CACHE1) { error (&(yylsp[-1]), "error: wrong cache type\n"); } } if ((yyvsp[-1].integer) == 0) gen8_set_sfid(GEN8(&(yyval.instruction)), GEN6_SFID_DATAPORT_RENDER_CACHE); else gen8_set_sfid(GEN8(&(yyval.instruction)), (yyvsp[-1].integer)); gen8_set_header_present(GEN8(&(yyval.instruction)), 1); gen8_set_dp_binding_table_index(GEN8(&(yyval.instruction)), (yyvsp[-7].integer)); gen8_set_dp_message_control(GEN8(&(yyval.instruction)), (yyvsp[-5].integer)); gen8_set_dp_message_type(GEN8(&(yyval.instruction)), (yyvsp[-3].integer)); gen8_set_dp_category(GEN8(&(yyval.instruction)), 0); } else if (IS_GENx(7)) { GEN(&(yyval.instruction))->bits2.send_gen5.sfid = GEN6_SFID_DATAPORT_RENDER_CACHE; GEN(&(yyval.instruction))->bits3.generic_gen5.header_present = 1; GEN(&(yyval.instruction))->bits3.gen7_dp.binding_table_index = (yyvsp[-7].integer); GEN(&(yyval.instruction))->bits3.gen7_dp.msg_control = (yyvsp[-5].integer); GEN(&(yyval.instruction))->bits3.gen7_dp.msg_type = (yyvsp[-3].integer); } else if (IS_GENx(6)) { GEN(&(yyval.instruction))->bits2.send_gen5.sfid = GEN6_SFID_DATAPORT_RENDER_CACHE; /* Sandybridge supports headerlesss message for render target write. * Currently the GFX assembler doesn't support it. so the program must provide * message header */ GEN(&(yyval.instruction))->bits3.generic_gen5.header_present = 1; GEN(&(yyval.instruction))->bits3.gen6_dp.binding_table_index = (yyvsp[-7].integer); GEN(&(yyval.instruction))->bits3.gen6_dp.msg_control = (yyvsp[-5].integer); GEN(&(yyval.instruction))->bits3.gen6_dp.msg_type = (yyvsp[-3].integer); GEN(&(yyval.instruction))->bits3.gen6_dp.send_commit_msg = (yyvsp[-1].integer); } else if (IS_GENx(5)) { GEN(&(yyval.instruction))->bits2.send_gen5.sfid = BRW_SFID_DATAPORT_WRITE; GEN(&(yyval.instruction))->bits3.generic_gen5.header_present = 1; GEN(&(yyval.instruction))->bits3.dp_write_gen5.binding_table_index = (yyvsp[-7].integer); GEN(&(yyval.instruction))->bits3.dp_write_gen5.last_render_target = ((yyvsp[-5].integer) & 0x8) >> 3; GEN(&(yyval.instruction))->bits3.dp_write_gen5.msg_control = (yyvsp[-5].integer) & 0x7; GEN(&(yyval.instruction))->bits3.dp_write_gen5.msg_type = (yyvsp[-3].integer); GEN(&(yyval.instruction))->bits3.dp_write_gen5.send_commit_msg = (yyvsp[-1].integer); } else { GEN(&(yyval.instruction))->bits3.generic.msg_target = BRW_SFID_DATAPORT_WRITE; GEN(&(yyval.instruction))->bits3.dp_write.binding_table_index = (yyvsp[-7].integer); /* The msg control field of brw_struct.h is split into * msg control and last_render_target, even though * last_render_target isn't common to all write messages. */ GEN(&(yyval.instruction))->bits3.dp_write.last_render_target = ((yyvsp[-5].integer) & 0x8) >> 3; GEN(&(yyval.instruction))->bits3.dp_write.msg_control = (yyvsp[-5].integer) & 0x7; GEN(&(yyval.instruction))->bits3.dp_write.msg_type = (yyvsp[-3].integer); GEN(&(yyval.instruction))->bits3.dp_write.send_commit_msg = (yyvsp[-1].integer); } } #line 4101 "gram.c" /* yacc.c:1646 */ break; case 139: #line 1755 "gram.y" /* yacc.c:1646 */ { if (IS_GENp(8)) { if (IS_GENp(9)) { if ((yyvsp[-3].integer) != 0 && (yyvsp[-3].integer) != GEN6_SFID_DATAPORT_RENDER_CACHE && (yyvsp[-3].integer) != GEN7_SFID_DATAPORT_DATA_CACHE && (yyvsp[-3].integer) != HSW_SFID_DATAPORT_DATA_CACHE1 && (yyvsp[-3].integer) != SKL_SFID_DATAPORT_DATA_CACHE2) { error (&(yylsp[-3]), "error: wrong cache type\n"); } } else { if ((yyvsp[-3].integer) != 0 && (yyvsp[-3].integer) != GEN6_SFID_DATAPORT_RENDER_CACHE && (yyvsp[-3].integer) != GEN7_SFID_DATAPORT_DATA_CACHE && (yyvsp[-3].integer) != HSW_SFID_DATAPORT_DATA_CACHE1) { error (&(yylsp[-3]), "error: wrong cache type\n"); } } if ((yyvsp[-3].integer) == 0) gen8_set_sfid(GEN8(&(yyval.instruction)), GEN6_SFID_DATAPORT_RENDER_CACHE); else gen8_set_sfid(GEN8(&(yyval.instruction)), (yyvsp[-3].integer)); gen8_set_header_present(GEN8(&(yyval.instruction)), ((yyvsp[-1].integer) != 0)); gen8_set_dp_binding_table_index(GEN8(&(yyval.instruction)), (yyvsp[-9].integer)); gen8_set_dp_message_control(GEN8(&(yyval.instruction)), (yyvsp[-7].integer)); gen8_set_dp_message_type(GEN8(&(yyval.instruction)), (yyvsp[-5].integer)); gen8_set_dp_category(GEN8(&(yyval.instruction)), 0); } else if (IS_GENx(7)) { GEN(&(yyval.instruction))->bits2.send_gen5.sfid = GEN6_SFID_DATAPORT_RENDER_CACHE; GEN(&(yyval.instruction))->bits3.generic_gen5.header_present = ((yyvsp[-1].integer) != 0); GEN(&(yyval.instruction))->bits3.gen7_dp.binding_table_index = (yyvsp[-9].integer); GEN(&(yyval.instruction))->bits3.gen7_dp.msg_control = (yyvsp[-7].integer); GEN(&(yyval.instruction))->bits3.gen7_dp.msg_type = (yyvsp[-5].integer); } else if (IS_GENx(6)) { GEN(&(yyval.instruction))->bits2.send_gen5.sfid = GEN6_SFID_DATAPORT_RENDER_CACHE; GEN(&(yyval.instruction))->bits3.generic_gen5.header_present = ((yyvsp[-1].integer) != 0); GEN(&(yyval.instruction))->bits3.gen6_dp.binding_table_index = (yyvsp[-9].integer); GEN(&(yyval.instruction))->bits3.gen6_dp.msg_control = (yyvsp[-7].integer); GEN(&(yyval.instruction))->bits3.gen6_dp.msg_type = (yyvsp[-5].integer); GEN(&(yyval.instruction))->bits3.gen6_dp.send_commit_msg = (yyvsp[-3].integer); } else if (IS_GENx(5)) { GEN(&(yyval.instruction))->bits2.send_gen5.sfid = BRW_SFID_DATAPORT_WRITE; GEN(&(yyval.instruction))->bits3.generic_gen5.header_present = ((yyvsp[-1].integer) != 0); GEN(&(yyval.instruction))->bits3.dp_write_gen5.binding_table_index = (yyvsp[-9].integer); GEN(&(yyval.instruction))->bits3.dp_write_gen5.last_render_target = ((yyvsp[-7].integer) & 0x8) >> 3; GEN(&(yyval.instruction))->bits3.dp_write_gen5.msg_control = (yyvsp[-7].integer) & 0x7; GEN(&(yyval.instruction))->bits3.dp_write_gen5.msg_type = (yyvsp[-5].integer); GEN(&(yyval.instruction))->bits3.dp_write_gen5.send_commit_msg = (yyvsp[-3].integer); } else { GEN(&(yyval.instruction))->bits3.generic.msg_target = BRW_SFID_DATAPORT_WRITE; GEN(&(yyval.instruction))->bits3.dp_write.binding_table_index = (yyvsp[-9].integer); /* The msg control field of brw_struct.h is split into * msg control and last_render_target, even though * last_render_target isn't common to all write messages. */ GEN(&(yyval.instruction))->bits3.dp_write.last_render_target = ((yyvsp[-7].integer) & 0x8) >> 3; GEN(&(yyval.instruction))->bits3.dp_write.msg_control = (yyvsp[-7].integer) & 0x7; GEN(&(yyval.instruction))->bits3.dp_write.msg_type = (yyvsp[-5].integer); GEN(&(yyval.instruction))->bits3.dp_write.send_commit_msg = (yyvsp[-3].integer); } } #line 4171 "gram.c" /* yacc.c:1646 */ break; case 140: #line 1821 "gram.y" /* yacc.c:1646 */ { GEN(&(yyval.instruction))->bits3.generic.msg_target = BRW_SFID_URB; if (IS_GENp(5)) { GEN(&(yyval.instruction))->bits2.send_gen5.sfid = BRW_SFID_URB; GEN(&(yyval.instruction))->bits3.generic_gen5.header_present = 1; set_instruction_opcode(&(yyval.instruction), BRW_URB_OPCODE_WRITE); GEN(&(yyval.instruction))->bits3.urb_gen5.offset = (yyvsp[-4].integer); GEN(&(yyval.instruction))->bits3.urb_gen5.swizzle_control = (yyvsp[-3].integer); GEN(&(yyval.instruction))->bits3.urb_gen5.pad = 0; GEN(&(yyval.instruction))->bits3.urb_gen5.allocate = (yyvsp[-2].integer); GEN(&(yyval.instruction))->bits3.urb_gen5.used = (yyvsp[-1].integer); GEN(&(yyval.instruction))->bits3.urb_gen5.complete = (yyvsp[0].integer); } else { GEN(&(yyval.instruction))->bits3.generic.msg_target = BRW_SFID_URB; set_instruction_opcode(&(yyval.instruction), BRW_URB_OPCODE_WRITE); GEN(&(yyval.instruction))->bits3.urb.offset = (yyvsp[-4].integer); GEN(&(yyval.instruction))->bits3.urb.swizzle_control = (yyvsp[-3].integer); GEN(&(yyval.instruction))->bits3.urb.pad = 0; GEN(&(yyval.instruction))->bits3.urb.allocate = (yyvsp[-2].integer); GEN(&(yyval.instruction))->bits3.urb.used = (yyvsp[-1].integer); GEN(&(yyval.instruction))->bits3.urb.complete = (yyvsp[0].integer); } } #line 4199 "gram.c" /* yacc.c:1646 */ break; case 141: #line 1846 "gram.y" /* yacc.c:1646 */ { if (IS_GENp(8)) { gen8_set_sfid(GEN8(&(yyval.instruction)), BRW_SFID_THREAD_SPAWNER); gen8_set_header_present(GEN8(&(yyval.instruction)), 0); /* Must be 0 */ gen8_set_ts_opcode(GEN8(&(yyval.instruction)), (yyvsp[-5].integer)); gen8_set_ts_request_type(GEN8(&(yyval.instruction)), (yyvsp[-3].integer)); gen8_set_ts_resource_select(GEN8(&(yyval.instruction)), (yyvsp[-1].integer)); } else { GEN(&(yyval.instruction))->bits3.generic.msg_target = BRW_SFID_THREAD_SPAWNER; if (IS_GENp(5)) { GEN(&(yyval.instruction))->bits2.send_gen5.sfid = BRW_SFID_THREAD_SPAWNER; GEN(&(yyval.instruction))->bits3.generic_gen5.header_present = 0; GEN(&(yyval.instruction))->bits3.thread_spawner_gen5.opcode = (yyvsp[-5].integer); GEN(&(yyval.instruction))->bits3.thread_spawner_gen5.requester_type = (yyvsp[-3].integer); GEN(&(yyval.instruction))->bits3.thread_spawner_gen5.resource_select = (yyvsp[-1].integer); } else { GEN(&(yyval.instruction))->bits3.generic.msg_target = BRW_SFID_THREAD_SPAWNER; GEN(&(yyval.instruction))->bits3.thread_spawner.opcode = (yyvsp[-5].integer); GEN(&(yyval.instruction))->bits3.thread_spawner.requester_type = (yyvsp[-3].integer); GEN(&(yyval.instruction))->bits3.thread_spawner.resource_select = (yyvsp[-1].integer); } } } #line 4230 "gram.c" /* yacc.c:1646 */ break; case 142: #line 1873 "gram.y" /* yacc.c:1646 */ { GEN(&(yyval.instruction))->bits3.generic.msg_target = GEN6_SFID_VME; if (IS_GENp(8)) { gen8_set_sfid(GEN8(&(yyval.instruction)), GEN6_SFID_VME); gen8_set_header_present(GEN8(&(yyval.instruction)), 1); /* Must be 1 */ gen8_set_vme_binding_table_index(GEN8(&(yyval.instruction)), (yyvsp[-7].integer)); gen8_set_vme_message_type(GEN8(&(yyval.instruction)), (yyvsp[-1].integer)); } else if (IS_GENp(6)) { GEN(&(yyval.instruction))->bits2.send_gen5.sfid = GEN6_SFID_VME; GEN(&(yyval.instruction))->bits3.vme_gen6.binding_table_index = (yyvsp[-7].integer); GEN(&(yyval.instruction))->bits3.vme_gen6.search_path_index = (yyvsp[-5].integer); GEN(&(yyval.instruction))->bits3.vme_gen6.lut_subindex = (yyvsp[-3].integer); GEN(&(yyval.instruction))->bits3.vme_gen6.message_type = (yyvsp[-1].integer); GEN(&(yyval.instruction))->bits3.generic_gen5.header_present = 1; } else { error (&(yylsp[-9]), "Gen6- doesn't have vme function\n"); } } #line 4254 "gram.c" /* yacc.c:1646 */ break; case 143: #line 1893 "gram.y" /* yacc.c:1646 */ { if (IS_GENp(8)) { gen8_set_sfid(GEN8(&(yyval.instruction)), HSW_SFID_CRE); gen8_set_header_present(GEN8(&(yyval.instruction)), 1); /* Must be 1 */ gen8_set_cre_binding_table_index(GEN8(&(yyval.instruction)), (yyvsp[-3].integer)); gen8_set_cre_message_type(GEN8(&(yyval.instruction)), (yyvsp[-1].integer)); } else { if (gen_level < 75) error (&(yylsp[-5]), "Below Gen7.5 doesn't have CRE function\n"); GEN(&(yyval.instruction))->bits3.generic.msg_target = HSW_SFID_CRE; GEN(&(yyval.instruction))->bits2.send_gen5.sfid = HSW_SFID_CRE; GEN(&(yyval.instruction))->bits3.cre_gen75.binding_table_index = (yyvsp[-3].integer); GEN(&(yyval.instruction))->bits3.cre_gen75.message_type = (yyvsp[-1].integer); GEN(&(yyval.instruction))->bits3.generic_gen5.header_present = 1; } } #line 4277 "gram.c" /* yacc.c:1646 */ break; case 144: #line 1914 "gram.y" /* yacc.c:1646 */ { if (IS_GENp(8)) { if ((yyvsp[-11].integer) != GEN6_SFID_DATAPORT_SAMPLER_CACHE && (yyvsp[-11].integer) != GEN6_SFID_DATAPORT_RENDER_CACHE && (yyvsp[-11].integer) != GEN6_SFID_DATAPORT_CONSTANT_CACHE && (yyvsp[-11].integer) != GEN7_SFID_DATAPORT_DATA_CACHE && (yyvsp[-11].integer) != HSW_SFID_DATAPORT_DATA_CACHE1) { error (&(yylsp[-11]), "error: wrong cache type\n"); } gen8_set_sfid(GEN8(&(yyval.instruction)), (yyvsp[-11].integer)); gen8_set_header_present(GEN8(&(yyval.instruction)), ((yyvsp[-1].integer) != 0)); gen8_set_dp_binding_table_index(GEN8(&(yyval.instruction)), (yyvsp[-5].integer)); gen8_set_dp_message_control(GEN8(&(yyval.instruction)), (yyvsp[-7].integer)); gen8_set_dp_message_type(GEN8(&(yyval.instruction)), (yyvsp[-9].integer)); gen8_set_dp_category(GEN8(&(yyval.instruction)), (yyvsp[-3].integer)); } else { GEN(&(yyval.instruction))->bits2.send_gen5.sfid = (yyvsp[-11].integer); GEN(&(yyval.instruction))->bits3.generic_gen5.header_present = ((yyvsp[-1].integer) != 0); if (IS_GENp(7)) { if ((yyvsp[-11].integer) != GEN6_SFID_DATAPORT_SAMPLER_CACHE && (yyvsp[-11].integer) != GEN6_SFID_DATAPORT_RENDER_CACHE && (yyvsp[-11].integer) != GEN6_SFID_DATAPORT_CONSTANT_CACHE && (yyvsp[-11].integer) != GEN7_SFID_DATAPORT_DATA_CACHE) { error (&(yylsp[-11]), "error: wrong cache type\n"); } GEN(&(yyval.instruction))->bits3.gen7_dp.category = (yyvsp[-3].integer); GEN(&(yyval.instruction))->bits3.gen7_dp.binding_table_index = (yyvsp[-5].integer); GEN(&(yyval.instruction))->bits3.gen7_dp.msg_control = (yyvsp[-7].integer); GEN(&(yyval.instruction))->bits3.gen7_dp.msg_type = (yyvsp[-9].integer); } else if (IS_GENx(6)) { if ((yyvsp[-11].integer) != GEN6_SFID_DATAPORT_SAMPLER_CACHE && (yyvsp[-11].integer) != GEN6_SFID_DATAPORT_RENDER_CACHE && (yyvsp[-11].integer) != GEN6_SFID_DATAPORT_CONSTANT_CACHE) { error (&(yylsp[-11]), "error: wrong cache type\n"); } GEN(&(yyval.instruction))->bits3.gen6_dp.send_commit_msg = (yyvsp[-3].integer); GEN(&(yyval.instruction))->bits3.gen6_dp.binding_table_index = (yyvsp[-5].integer); GEN(&(yyval.instruction))->bits3.gen6_dp.msg_control = (yyvsp[-7].integer); GEN(&(yyval.instruction))->bits3.gen6_dp.msg_type = (yyvsp[-9].integer); } else if (!IS_GENp(5)) { error (&(yylsp[-13]), "Gen6- doesn't support data port for sampler/render/constant/data cache\n"); } } } #line 4330 "gram.c" /* yacc.c:1646 */ break; case 145: #line 1964 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = 1; } #line 4336 "gram.c" /* yacc.c:1646 */ break; case 146: #line 1965 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = 0; } #line 4342 "gram.c" /* yacc.c:1646 */ break; case 147: #line 1968 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = 1; } #line 4348 "gram.c" /* yacc.c:1646 */ break; case 148: #line 1969 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = 0; } #line 4354 "gram.c" /* yacc.c:1646 */ break; case 149: #line 1972 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = 1; } #line 4360 "gram.c" /* yacc.c:1646 */ break; case 150: #line 1973 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = 0; } #line 4366 "gram.c" /* yacc.c:1646 */ break; case 151: #line 1976 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = BRW_URB_SWIZZLE_TRANSPOSE; } #line 4372 "gram.c" /* yacc.c:1646 */ break; case 152: #line 1977 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = BRW_URB_SWIZZLE_INTERLEAVE; } #line 4378 "gram.c" /* yacc.c:1646 */ break; case 153: #line 1978 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = BRW_URB_SWIZZLE_NONE; } #line 4384 "gram.c" /* yacc.c:1646 */ break; case 168: #line 1991 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = 0; } #line 4390 "gram.c" /* yacc.c:1646 */ break; case 169: #line 1992 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = 1; } #line 4396 "gram.c" /* yacc.c:1646 */ break; case 170: #line 1995 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = 0; } #line 4402 "gram.c" /* yacc.c:1646 */ break; case 171: #line 1996 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = 1; } #line 4408 "gram.c" /* yacc.c:1646 */ break; case 174: #line 2005 "gram.y" /* yacc.c:1646 */ { (yyval.reg) = (yyvsp[-1].symbol_reg).reg; (yyval.reg).hstride = resolve_dst_region(&(yyvsp[-1].symbol_reg), (yyvsp[0].integer)); } #line 4417 "gram.c" /* yacc.c:1646 */ break; case 175: #line 2010 "gram.y" /* yacc.c:1646 */ { /* Returns an instruction with just the destination register * filled in. */ (yyval.reg) = (yyvsp[-3].reg); (yyval.reg).hstride = resolve_dst_region(NULL, (yyvsp[-2].integer)); (yyval.reg).dw1.bits.writemask = (yyvsp[-1].reg).dw1.bits.writemask; (yyval.reg).type = (yyvsp[0].regtype).type; } #line 4431 "gram.c" /* yacc.c:1646 */ break; case 176: #line 2025 "gram.y" /* yacc.c:1646 */ { (yyval.reg) = (yyvsp[-2].reg); (yyval.reg).hstride = resolve_dst_region(NULL, (yyvsp[-1].integer)); (yyval.reg).type = (yyvsp[0].regtype).type; } #line 4441 "gram.c" /* yacc.c:1646 */ break; case 177: #line 2031 "gram.y" /* yacc.c:1646 */ { (yyval.reg) = (yyvsp[0].reg); (yyval.reg).hstride = 1; (yyval.reg).type = BRW_REGISTER_TYPE_UW; } #line 4451 "gram.c" /* yacc.c:1646 */ break; case 178: #line 2037 "gram.y" /* yacc.c:1646 */ { (yyval.reg) = (yyvsp[0].reg); (yyval.reg).hstride = 1; (yyval.reg).type = BRW_REGISTER_TYPE_UD; } #line 4461 "gram.c" /* yacc.c:1646 */ break; case 179: #line 2043 "gram.y" /* yacc.c:1646 */ { (yyval.reg) = (yyvsp[0].reg); (yyval.reg).hstride = 1; (yyval.reg).type = BRW_REGISTER_TYPE_UD; } #line 4471 "gram.c" /* yacc.c:1646 */ break; case 180: #line 2049 "gram.y" /* yacc.c:1646 */ { (yyval.reg) = (yyvsp[-2].reg); (yyval.reg).hstride = resolve_dst_region(NULL, (yyvsp[-1].integer)); (yyval.reg).type = (yyvsp[0].regtype).type; } #line 4481 "gram.c" /* yacc.c:1646 */ break; case 185: #line 2060 "gram.y" /* yacc.c:1646 */ { struct declared_register *dcl_reg = find_register((yyvsp[0].string)); if (dcl_reg == NULL) error(&(yylsp[0]), "can't find register %s\n", (yyvsp[0].string)); memcpy(&(yyval.symbol_reg), dcl_reg, sizeof(*dcl_reg)); free((yyvsp[0].string)); // $1 has been malloc'ed by strdup } #line 4495 "gram.c" /* yacc.c:1646 */ break; case 186: #line 2070 "gram.y" /* yacc.c:1646 */ { (yyval.symbol_reg)=(yyvsp[0].symbol_reg); } #line 4503 "gram.c" /* yacc.c:1646 */ break; case 187: #line 2076 "gram.y" /* yacc.c:1646 */ { struct declared_register *dcl_reg = find_register((yyvsp[-3].string)); if (dcl_reg == NULL) error(&(yylsp[-3]), "can't find register %s\n", (yyvsp[-3].string)); memcpy(&(yyval.symbol_reg), dcl_reg, sizeof(*dcl_reg)); (yyval.symbol_reg).reg.nr += (yyvsp[-1].integer); free((yyvsp[-3].string)); } #line 4518 "gram.c" /* yacc.c:1646 */ break; case 188: #line 2087 "gram.y" /* yacc.c:1646 */ { struct declared_register *dcl_reg = find_register((yyvsp[-5].string)); if (dcl_reg == NULL) error(&(yylsp[-5]), "can't find register %s\n", (yyvsp[-5].string)); memcpy(&(yyval.symbol_reg), dcl_reg, sizeof(*dcl_reg)); (yyval.symbol_reg).reg.nr += (yyvsp[-3].integer); if(advanced_flag) { int size = get_type_size(dcl_reg->reg.type); (yyval.symbol_reg).reg.nr += ((yyval.symbol_reg).reg.subnr + (yyvsp[-1].integer)) / (32 / size); (yyval.symbol_reg).reg.subnr = ((yyval.symbol_reg).reg.subnr + (yyvsp[-1].integer)) % (32 / size); } else { (yyval.symbol_reg).reg.nr += ((yyval.symbol_reg).reg.subnr + (yyvsp[-1].integer)) / 32; (yyval.symbol_reg).reg.subnr = ((yyval.symbol_reg).reg.subnr + (yyvsp[-1].integer)) % 32; } free((yyvsp[-5].string)); } #line 4541 "gram.c" /* yacc.c:1646 */ break; case 189: #line 2110 "gram.y" /* yacc.c:1646 */ { (yyval.reg) = (yyvsp[0].reg); (yyval.reg).address_mode = BRW_ADDRESS_DIRECT; } #line 4550 "gram.c" /* yacc.c:1646 */ break; case 190: #line 2115 "gram.y" /* yacc.c:1646 */ { (yyval.reg) = (yyvsp[0].reg); (yyval.reg).address_mode = BRW_ADDRESS_DIRECT; } #line 4559 "gram.c" /* yacc.c:1646 */ break; case 191: #line 2120 "gram.y" /* yacc.c:1646 */ { (yyval.reg) = (yyvsp[0].reg); (yyval.reg).address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; } #line 4568 "gram.c" /* yacc.c:1646 */ break; case 192: #line 2125 "gram.y" /* yacc.c:1646 */ { (yyval.reg) = (yyvsp[0].reg); (yyval.reg).address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; } #line 4577 "gram.c" /* yacc.c:1646 */ break; case 200: #line 2142 "gram.y" /* yacc.c:1646 */ { union { int i; float f; } intfloat; uint32_t d; switch ((yyvsp[0].integer)) { case BRW_REGISTER_TYPE_UD: case BRW_REGISTER_TYPE_D: case BRW_REGISTER_TYPE_V: case BRW_REGISTER_TYPE_VF: switch ((yyvsp[-1].imm32).r) { case imm32_d: d = (yyvsp[-1].imm32).u.d; break; default: error (&(yylsp[0]), "non-int D/UD/V/VF representation: %d,type=%d\n", (yyvsp[-1].imm32).r, (yyvsp[0].integer)); } break; case BRW_REGISTER_TYPE_UW: case BRW_REGISTER_TYPE_W: switch ((yyvsp[-1].imm32).r) { case imm32_d: d = (yyvsp[-1].imm32).u.d; break; default: error (&(yylsp[0]), "non-int W/UW representation\n"); } d &= 0xffff; d |= d << 16; break; case BRW_REGISTER_TYPE_F: switch ((yyvsp[-1].imm32).r) { case imm32_f: intfloat.f = (yyvsp[-1].imm32).u.f; break; case imm32_d: intfloat.f = (float) (yyvsp[-1].imm32).u.d; break; default: error (&(yylsp[0]), "non-float F representation\n"); } d = intfloat.i; break; #if 0 case BRW_REGISTER_TYPE_VF: fprintf (stderr, "Immediate type VF not supported yet\n"); YYERROR; #endif default: error(&(yylsp[0]), "unknown immediate type %d\n", (yyvsp[0].integer)); } memset (&(yyval.src_operand), '\0', sizeof ((yyval.src_operand))); (yyval.src_operand).reg.file = BRW_IMMEDIATE_VALUE; (yyval.src_operand).reg.type = (yyvsp[0].integer); (yyval.src_operand).reg.dw1.ud = d; } #line 4640 "gram.c" /* yacc.c:1646 */ break; case 202: #line 2204 "gram.y" /* yacc.c:1646 */ { set_direct_src_operand(&(yyval.src_operand), &(yyvsp[-2].reg), (yyvsp[0].regtype).type); (yyval.src_operand).reg.vstride = (yyvsp[-1].region).vert_stride; (yyval.src_operand).reg.width = (yyvsp[-1].region).width; (yyval.src_operand).reg.hstride = (yyvsp[-1].region).horiz_stride; (yyval.src_operand).default_region = (yyvsp[-1].region).is_default; } #line 4652 "gram.c" /* yacc.c:1646 */ break; case 203: #line 2215 "gram.y" /* yacc.c:1646 */ { memset (&(yyval.src_operand), '\0', sizeof ((yyval.src_operand))); (yyval.src_operand).reg.file = (yyvsp[-2].reg).file; (yyval.src_operand).reg.type = (yyvsp[0].regtype).type; (yyval.src_operand).reg.subnr = (yyvsp[-2].reg).subnr; (yyval.src_operand).reg.nr = (yyvsp[-2].reg).nr; (yyval.src_operand).reg.vstride = (yyvsp[-1].region).vert_stride; (yyval.src_operand).reg.width = (yyvsp[-1].region).width; (yyval.src_operand).reg.hstride = (yyvsp[-1].region).horiz_stride; (yyval.src_operand).default_region = (yyvsp[-1].region).is_default; (yyval.src_operand).reg.negate = 0; (yyval.src_operand).reg.abs = 0; } #line 4670 "gram.c" /* yacc.c:1646 */ break; case 204: #line 2229 "gram.y" /* yacc.c:1646 */ { set_direct_src_operand(&(yyval.src_operand), &(yyvsp[0].reg), BRW_REGISTER_TYPE_UB); } #line 4678 "gram.c" /* yacc.c:1646 */ break; case 205: #line 2233 "gram.y" /* yacc.c:1646 */ { set_direct_src_operand(&(yyval.src_operand), &(yyvsp[0].reg), BRW_REGISTER_TYPE_UD); } #line 4686 "gram.c" /* yacc.c:1646 */ break; case 206: #line 2241 "gram.y" /* yacc.c:1646 */ { set_direct_src_operand(&(yyval.src_operand), &(yyvsp[0].reg), BRW_REGISTER_TYPE_UD); } #line 4694 "gram.c" /* yacc.c:1646 */ break; case 207: #line 2245 "gram.y" /* yacc.c:1646 */ { set_direct_src_operand(&(yyval.src_operand), &(yyvsp[0].reg), BRW_REGISTER_TYPE_UD); } #line 4702 "gram.c" /* yacc.c:1646 */ break; case 208: #line 2249 "gram.y" /* yacc.c:1646 */ { if ((yyvsp[0].regtype).is_default) { set_direct_src_operand(&(yyval.src_operand), &(yyvsp[-2].reg), BRW_REGISTER_TYPE_UD); } else { set_direct_src_operand(&(yyval.src_operand), &(yyvsp[-2].reg), (yyvsp[0].regtype).type); } (yyval.src_operand).default_region = 1; } #line 4715 "gram.c" /* yacc.c:1646 */ break; case 212: #line 2263 "gram.y" /* yacc.c:1646 */ { memset (&(yyval.reg), '\0', sizeof ((yyval.reg))); (yyval.reg).file = (yyvsp[0].symbol_reg).reg.file; (yyval.reg).nr = (yyvsp[0].symbol_reg).reg.nr; (yyval.reg).subnr = (yyvsp[0].symbol_reg).reg.subnr; } #line 4726 "gram.c" /* yacc.c:1646 */ break; case 217: #line 2276 "gram.y" /* yacc.c:1646 */ { memset (&(yyval.src_operand), '\0', sizeof ((yyval.src_operand))); (yyval.src_operand).reg.address_mode = BRW_ADDRESS_DIRECT; (yyval.src_operand).reg.file = (yyvsp[-2].symbol_reg).reg.file; (yyval.src_operand).reg.nr = (yyvsp[-2].symbol_reg).reg.nr; (yyval.src_operand).reg.subnr = (yyvsp[-2].symbol_reg).reg.subnr; if ((yyvsp[0].regtype).is_default) { (yyval.src_operand).reg.type = (yyvsp[-2].symbol_reg).reg.type; } else { (yyval.src_operand).reg.type = (yyvsp[0].regtype).type; } if ((yyvsp[-1].region).is_default) { (yyval.src_operand).reg.vstride = (yyvsp[-2].symbol_reg).src_region.vert_stride; (yyval.src_operand).reg.width = (yyvsp[-2].symbol_reg).src_region.width; (yyval.src_operand).reg.hstride = (yyvsp[-2].symbol_reg).src_region.horiz_stride; } else { (yyval.src_operand).reg.vstride = (yyvsp[-1].region).vert_stride; (yyval.src_operand).reg.width = (yyvsp[-1].region).width; (yyval.src_operand).reg.hstride = (yyvsp[-1].region).horiz_stride; } (yyval.src_operand).reg.negate = (yyvsp[-4].integer); (yyval.src_operand).reg.abs = (yyvsp[-3].integer); } #line 4754 "gram.c" /* yacc.c:1646 */ break; case 218: #line 2300 "gram.y" /* yacc.c:1646 */ { if((yyvsp[-1].region).is_default ==1 && (yyvsp[0].regtype).is_default == 1) { set_direct_src_operand(&(yyval.src_operand), &(yyvsp[-2].reg), BRW_REGISTER_TYPE_UD); } else{ memset (&(yyval.src_operand), '\0', sizeof ((yyval.src_operand))); (yyval.src_operand).reg.address_mode = BRW_ADDRESS_DIRECT; (yyval.src_operand).reg.file = (yyvsp[-2].reg).file; (yyval.src_operand).reg.nr = (yyvsp[-2].reg).nr; (yyval.src_operand).reg.subnr = (yyvsp[-2].reg).subnr; (yyval.src_operand).reg.vstride = (yyvsp[-1].region).vert_stride; (yyval.src_operand).reg.width = (yyvsp[-1].region).width; (yyval.src_operand).reg.hstride = (yyvsp[-1].region).horiz_stride; (yyval.src_operand).reg.type = (yyvsp[0].regtype).type; } } #line 4776 "gram.c" /* yacc.c:1646 */ break; case 219: #line 2318 "gram.y" /* yacc.c:1646 */ { memset (&(yyval.src_operand), '\0', sizeof ((yyval.src_operand))); (yyval.src_operand).reg.address_mode = BRW_ADDRESS_DIRECT; (yyval.src_operand).reg.file = (yyvsp[-3].reg).file; (yyval.src_operand).reg.nr = (yyvsp[-3].reg).nr; (yyval.src_operand).reg.subnr = (yyvsp[-3].reg).subnr; (yyval.src_operand).reg.type = (yyvsp[0].regtype).type; (yyval.src_operand).reg.vstride = (yyvsp[-2].region).vert_stride; (yyval.src_operand).reg.width = (yyvsp[-2].region).width; (yyval.src_operand).reg.hstride = (yyvsp[-2].region).horiz_stride; (yyval.src_operand).default_region = (yyvsp[-2].region).is_default; (yyval.src_operand).reg.negate = (yyvsp[-5].integer); (yyval.src_operand).reg.abs = (yyvsp[-4].integer); (yyval.src_operand).reg.dw1.bits.swizzle = (yyvsp[-1].src_operand).reg.dw1.bits.swizzle; } #line 4796 "gram.c" /* yacc.c:1646 */ break; case 221: #line 2338 "gram.y" /* yacc.c:1646 */ { memset (&(yyval.src_operand), '\0', sizeof ((yyval.src_operand))); (yyval.src_operand).reg.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; (yyval.src_operand).reg.file = (yyvsp[-3].reg).file; (yyval.src_operand).reg.subnr = (yyvsp[-3].reg).subnr; (yyval.src_operand).reg.dw1.bits.indirect_offset = (yyvsp[-3].reg).dw1.bits.indirect_offset; (yyval.src_operand).reg.type = (yyvsp[-1].regtype).type; (yyval.src_operand).reg.vstride = (yyvsp[-2].region).vert_stride; (yyval.src_operand).reg.width = (yyvsp[-2].region).width; (yyval.src_operand).reg.hstride = (yyvsp[-2].region).horiz_stride; (yyval.src_operand).reg.negate = (yyvsp[-5].integer); (yyval.src_operand).reg.abs = (yyvsp[-4].integer); (yyval.src_operand).reg.dw1.bits.swizzle = (yyvsp[0].src_operand).reg.dw1.bits.swizzle; } #line 4815 "gram.c" /* yacc.c:1646 */ break; case 222: #line 2359 "gram.y" /* yacc.c:1646 */ { if ((yyvsp[0].integer) < -512 || (yyvsp[0].integer) > 511) error(&(yylsp[0]), "Address immediate offset %d out of range\n", (yyvsp[0].integer)); memset (&(yyval.reg), '\0', sizeof ((yyval.reg))); (yyval.reg).subnr = (yyvsp[-2].reg).subnr; (yyval.reg).dw1.bits.indirect_offset = (yyvsp[0].integer); } #line 4827 "gram.c" /* yacc.c:1646 */ break; case 223: #line 2367 "gram.y" /* yacc.c:1646 */ { memset (&(yyval.reg), '\0', sizeof ((yyval.reg))); (yyval.reg).subnr = (yyvsp[0].reg).subnr; (yyval.reg).dw1.bits.indirect_offset = 0; } #line 4837 "gram.c" /* yacc.c:1646 */ break; case 224: #line 2377 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = 0; } #line 4843 "gram.c" /* yacc.c:1646 */ break; case 226: #line 2384 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = (yyvsp[0].integer); } #line 4851 "gram.c" /* yacc.c:1646 */ break; case 227: #line 2388 "gram.y" /* yacc.c:1646 */ { /* Default to subreg 0 if unspecified. */ (yyval.integer) = 0; } #line 4860 "gram.c" /* yacc.c:1646 */ break; case 228: #line 2395 "gram.y" /* yacc.c:1646 */ { memset (&(yyval.reg), '\0', sizeof ((yyval.reg))); (yyval.reg).file = BRW_GENERAL_REGISTER_FILE; (yyval.reg).nr = (yyvsp[-1].integer); (yyval.reg).subnr = (yyvsp[0].integer); } #line 4871 "gram.c" /* yacc.c:1646 */ break; case 229: #line 2404 "gram.y" /* yacc.c:1646 */ { memset (&(yyval.reg), '\0', sizeof ((yyval.reg))); (yyval.reg).file = BRW_GENERAL_REGISTER_FILE; (yyval.reg).subnr = (yyvsp[-1].reg).subnr; (yyval.reg).dw1.bits.indirect_offset = (yyvsp[-1].reg).dw1.bits.indirect_offset; } #line 4882 "gram.c" /* yacc.c:1646 */ break; case 230: #line 2413 "gram.y" /* yacc.c:1646 */ { memset (&(yyval.reg), '\0', sizeof ((yyval.reg))); (yyval.reg).file = BRW_MESSAGE_REGISTER_FILE; (yyval.reg).nr = (yyvsp[-1].integer); (yyval.reg).subnr = (yyvsp[0].integer); } #line 4893 "gram.c" /* yacc.c:1646 */ break; case 231: #line 2422 "gram.y" /* yacc.c:1646 */ { memset (&(yyval.reg), '\0', sizeof ((yyval.reg))); (yyval.reg).file = BRW_MESSAGE_REGISTER_FILE; (yyval.reg).subnr = (yyvsp[-1].reg).subnr; (yyval.reg).dw1.bits.indirect_offset = (yyvsp[-1].reg).dw1.bits.indirect_offset; } #line 4904 "gram.c" /* yacc.c:1646 */ break; case 232: #line 2431 "gram.y" /* yacc.c:1646 */ { if ((yyvsp[-1].integer) != 0) error(&(yylsp[0]), "address register number %d out of range", (yyvsp[-1].integer)); memset (&(yyval.reg), '\0', sizeof ((yyval.reg))); (yyval.reg).file = BRW_ARCHITECTURE_REGISTER_FILE; (yyval.reg).nr = BRW_ARF_ADDRESS | (yyvsp[-1].integer); (yyval.reg).subnr = (yyvsp[0].integer); } #line 4918 "gram.c" /* yacc.c:1646 */ break; case 233: #line 2443 "gram.y" /* yacc.c:1646 */ { if ((yyvsp[-1].integer) > 1) error(&(yylsp[-1]), "accumulator register number %d out of range", (yyvsp[-1].integer)); memset (&(yyval.reg), '\0', sizeof ((yyval.reg))); (yyval.reg).file = BRW_ARCHITECTURE_REGISTER_FILE; (yyval.reg).nr = BRW_ARF_ACCUMULATOR | (yyvsp[-1].integer); (yyval.reg).subnr = (yyvsp[0].integer); } #line 4931 "gram.c" /* yacc.c:1646 */ break; case 234: #line 2454 "gram.y" /* yacc.c:1646 */ { if ((!IS_GENp(7) && (yyvsp[-1].integer) > 0) || (IS_GENp(7) && (yyvsp[-1].integer) > 1)) { error(&(yylsp[0]), "flag register number %d out of range\n", (yyvsp[-1].integer)); } if ((yyvsp[0].integer) > 1) error(&(yylsp[0]), "flag subregister number %d out of range\n", (yyvsp[-1].integer)); memset (&(yyval.reg), '\0', sizeof ((yyval.reg))); (yyval.reg).file = BRW_ARCHITECTURE_REGISTER_FILE; (yyval.reg).nr = BRW_ARF_FLAG | (yyvsp[-1].integer); (yyval.reg).subnr = (yyvsp[0].integer); } #line 4950 "gram.c" /* yacc.c:1646 */ break; case 235: #line 2471 "gram.y" /* yacc.c:1646 */ { if ((yyvsp[-1].integer) > 0) error(&(yylsp[-1]), "mask register number %d out of range", (yyvsp[-1].integer)); memset (&(yyval.reg), '\0', sizeof ((yyval.reg))); (yyval.reg).file = BRW_ARCHITECTURE_REGISTER_FILE; (yyval.reg).nr = BRW_ARF_MASK; (yyval.reg).subnr = (yyvsp[0].integer); } #line 4964 "gram.c" /* yacc.c:1646 */ break; case 236: #line 2481 "gram.y" /* yacc.c:1646 */ { memset (&(yyval.reg), '\0', sizeof ((yyval.reg))); (yyval.reg).file = BRW_ARCHITECTURE_REGISTER_FILE; (yyval.reg).nr = BRW_ARF_MASK; (yyval.reg).subnr = (yyvsp[0].integer); } #line 4975 "gram.c" /* yacc.c:1646 */ break; case 241: #line 2493 "gram.y" /* yacc.c:1646 */ { if ((yyvsp[-1].integer) > 0) error(&(yylsp[-1]), "mask stack register number %d out of range", (yyvsp[-1].integer)); memset (&(yyval.reg), '\0', sizeof ((yyval.reg))); (yyval.reg).file = BRW_ARCHITECTURE_REGISTER_FILE; (yyval.reg).nr = BRW_ARF_MASK_STACK; (yyval.reg).subnr = (yyvsp[0].integer); } #line 4988 "gram.c" /* yacc.c:1646 */ break; case 242: #line 2502 "gram.y" /* yacc.c:1646 */ { memset (&(yyval.reg), '\0', sizeof ((yyval.reg))); (yyval.reg).file = BRW_ARCHITECTURE_REGISTER_FILE; (yyval.reg).nr = BRW_ARF_MASK_STACK; (yyval.reg).subnr = (yyvsp[0].integer); } #line 4999 "gram.c" /* yacc.c:1646 */ break; case 245: #line 2537 "gram.y" /* yacc.c:1646 */ { int num_notifyreg = (IS_GENp(6)) ? 3 : 2; if ((yyvsp[-1].integer) > num_notifyreg) error(&(yylsp[-1]), "notification register number %d out of range", (yyvsp[-1].integer)); memset (&(yyval.reg), '\0', sizeof ((yyval.reg))); (yyval.reg).file = BRW_ARCHITECTURE_REGISTER_FILE; if (IS_GENp(6)) { (yyval.reg).nr = BRW_ARF_NOTIFICATION_COUNT; (yyval.reg).subnr = (yyvsp[-1].integer); } else { (yyval.reg).nr = BRW_ARF_NOTIFICATION_COUNT | (yyvsp[-1].integer); (yyval.reg).subnr = 0; } } #line 5022 "gram.c" /* yacc.c:1646 */ break; case 246: #line 2573 "gram.y" /* yacc.c:1646 */ { if ((yyvsp[-1].integer) > 0) error(&(yylsp[-1]), "state register number %d out of range", (yyvsp[-1].integer)); if ((yyvsp[0].integer) > 1) error(&(yylsp[0]), "state subregister number %d out of range", (yyvsp[-1].integer)); memset (&(yyval.reg), '\0', sizeof ((yyval.reg))); (yyval.reg).file = BRW_ARCHITECTURE_REGISTER_FILE; (yyval.reg).nr = BRW_ARF_STATE | (yyvsp[-1].integer); (yyval.reg).subnr = (yyvsp[0].integer); } #line 5039 "gram.c" /* yacc.c:1646 */ break; case 247: #line 2588 "gram.y" /* yacc.c:1646 */ { if ((yyvsp[-1].integer) > 0) error(&(yylsp[-1]), "control register number %d out of range", (yyvsp[-1].integer)); if ((yyvsp[0].integer) > 2) error(&(yylsp[0]), "control subregister number %d out of range", (yyvsp[-1].integer)); memset (&(yyval.reg), '\0', sizeof ((yyval.reg))); (yyval.reg).file = BRW_ARCHITECTURE_REGISTER_FILE; (yyval.reg).nr = BRW_ARF_CONTROL | (yyvsp[-1].integer); (yyval.reg).subnr = (yyvsp[0].integer); } #line 5055 "gram.c" /* yacc.c:1646 */ break; case 248: #line 2602 "gram.y" /* yacc.c:1646 */ { memset (&(yyval.reg), '\0', sizeof ((yyval.reg))); (yyval.reg).file = BRW_ARCHITECTURE_REGISTER_FILE; (yyval.reg).nr = BRW_ARF_IP; (yyval.reg).subnr = 0; } #line 5066 "gram.c" /* yacc.c:1646 */ break; case 249: #line 2611 "gram.y" /* yacc.c:1646 */ { memset (&(yyval.reg), '\0', sizeof ((yyval.reg))); (yyval.reg).file = BRW_ARCHITECTURE_REGISTER_FILE; (yyval.reg).nr = BRW_ARF_NULL; (yyval.reg).subnr = 0; } #line 5077 "gram.c" /* yacc.c:1646 */ break; case 250: #line 2622 "gram.y" /* yacc.c:1646 */ { if (((yyvsp[0].integer) > 32767) || ((yyvsp[0].integer) < -32768)) error(&(yylsp[0]), "error: relative offset %d out of range \n", (yyvsp[0].integer)); memset (&(yyval.src_operand), '\0', sizeof ((yyval.src_operand))); (yyval.src_operand).reg.file = BRW_IMMEDIATE_VALUE; (yyval.src_operand).reg.type = BRW_REGISTER_TYPE_D; (yyval.src_operand).imm32 = (yyvsp[0].integer) & 0x0000ffff; } #line 5091 "gram.c" /* yacc.c:1646 */ break; case 251: #line 2632 "gram.y" /* yacc.c:1646 */ { memset (&(yyval.src_operand), '\0', sizeof ((yyval.src_operand))); (yyval.src_operand).reg.file = BRW_IMMEDIATE_VALUE; (yyval.src_operand).reg.type = BRW_REGISTER_TYPE_D; (yyval.src_operand).reloc_target = (yyvsp[0].string); } #line 5102 "gram.c" /* yacc.c:1646 */ break; case 252: #line 2642 "gram.y" /* yacc.c:1646 */ { memset (&(yyval.src_operand), '\0', sizeof ((yyval.src_operand))); (yyval.src_operand).reg.file = BRW_IMMEDIATE_VALUE; (yyval.src_operand).reg.type = BRW_REGISTER_TYPE_D; (yyval.src_operand).reloc_target = (yyvsp[0].string); } #line 5113 "gram.c" /* yacc.c:1646 */ break; case 253: #line 2649 "gram.y" /* yacc.c:1646 */ { memset (&(yyval.src_operand), '\0', sizeof ((yyval.src_operand))); (yyval.src_operand).reg.file = BRW_IMMEDIATE_VALUE; (yyval.src_operand).reg.type = BRW_REGISTER_TYPE_D; (yyval.src_operand).imm32 = (yyvsp[0].integer); } #line 5124 "gram.c" /* yacc.c:1646 */ break; case 254: #line 2656 "gram.y" /* yacc.c:1646 */ { set_direct_src_operand(&(yyval.src_operand), &(yyvsp[-2].reg), (yyvsp[0].regtype).type); (yyval.src_operand).reg.vstride = (yyvsp[-1].region).vert_stride; (yyval.src_operand).reg.width = (yyvsp[-1].region).width; (yyval.src_operand).reg.hstride = (yyvsp[-1].region).horiz_stride; (yyval.src_operand).default_region = (yyvsp[-1].region).is_default; } #line 5136 "gram.c" /* yacc.c:1646 */ break; case 255: #line 2664 "gram.y" /* yacc.c:1646 */ { memset (&(yyval.src_operand), '\0', sizeof ((yyval.src_operand))); (yyval.src_operand).reg.address_mode = BRW_ADDRESS_DIRECT; (yyval.src_operand).reg.file = (yyvsp[0].symbol_reg).reg.file; (yyval.src_operand).reg.nr = (yyvsp[0].symbol_reg).reg.nr; (yyval.src_operand).reg.subnr = (yyvsp[0].symbol_reg).reg.subnr; (yyval.src_operand).reg.type = (yyvsp[0].symbol_reg).reg.type; (yyval.src_operand).reg.vstride = (yyvsp[0].symbol_reg).src_region.vert_stride; (yyval.src_operand).reg.width = (yyvsp[0].symbol_reg).src_region.width; (yyval.src_operand).reg.hstride = (yyvsp[0].symbol_reg).src_region.horiz_stride; } #line 5152 "gram.c" /* yacc.c:1646 */ break; case 256: #line 2676 "gram.y" /* yacc.c:1646 */ { memset (&(yyval.src_operand), '\0', sizeof ((yyval.src_operand))); (yyval.src_operand).reg.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; (yyval.src_operand).reg.file = (yyvsp[-2].reg).file; (yyval.src_operand).reg.subnr = (yyvsp[-2].reg).subnr; (yyval.src_operand).reg.dw1.bits.indirect_offset = (yyvsp[-2].reg).dw1.bits.indirect_offset; (yyval.src_operand).reg.type = (yyvsp[0].regtype).type; (yyval.src_operand).reg.vstride = (yyvsp[-1].region).vert_stride; (yyval.src_operand).reg.width = (yyvsp[-1].region).width; (yyval.src_operand).reg.hstride = (yyvsp[-1].region).horiz_stride; } #line 5168 "gram.c" /* yacc.c:1646 */ break; case 257: #line 2691 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = DEFAULT_DSTREGION; } #line 5176 "gram.c" /* yacc.c:1646 */ break; case 258: #line 2695 "gram.y" /* yacc.c:1646 */ { /* Returns a value for a horiz_stride field of an * instruction. */ if ((yyvsp[-1].integer) != 1 && (yyvsp[-1].integer) != 2 && (yyvsp[-1].integer) != 4) error(&(yylsp[-1]), "Invalid horiz size %d\n", (yyvsp[-1].integer)); (yyval.integer) = ffs((yyvsp[-1].integer)); } #line 5190 "gram.c" /* yacc.c:1646 */ break; case 259: #line 2707 "gram.y" /* yacc.c:1646 */ { /* XXX is this default value correct?*/ memset (&(yyval.region), '\0', sizeof ((yyval.region))); (yyval.region).vert_stride = ffs(0); (yyval.region).width = BRW_WIDTH_1; (yyval.region).horiz_stride = ffs(0); (yyval.region).is_default = 1; } #line 5203 "gram.c" /* yacc.c:1646 */ break; case 260: #line 2716 "gram.y" /* yacc.c:1646 */ { /* XXX is this default value correct for accreg?*/ memset (&(yyval.region), '\0', sizeof ((yyval.region))); (yyval.region).vert_stride = ffs((yyvsp[-1].integer)); (yyval.region).width = BRW_WIDTH_1; (yyval.region).horiz_stride = ffs(0); } #line 5215 "gram.c" /* yacc.c:1646 */ break; case 261: #line 2724 "gram.y" /* yacc.c:1646 */ { memset (&(yyval.region), '\0', sizeof ((yyval.region))); (yyval.region).vert_stride = ffs((yyvsp[-5].integer)); (yyval.region).width = ffs((yyvsp[-3].integer)) - 1; (yyval.region).horiz_stride = ffs((yyvsp[-1].integer)); } #line 5226 "gram.c" /* yacc.c:1646 */ break; case 262: #line 2731 "gram.y" /* yacc.c:1646 */ { memset (&(yyval.region), '\0', sizeof ((yyval.region))); (yyval.region).vert_stride = ffs((yyvsp[-5].integer)); (yyval.region).width = ffs((yyvsp[-3].integer)) - 1; (yyval.region).horiz_stride = ffs((yyvsp[-1].integer)); } #line 5237 "gram.c" /* yacc.c:1646 */ break; case 263: #line 2744 "gram.y" /* yacc.c:1646 */ { memset (&(yyval.region), '\0', sizeof ((yyval.region))); (yyval.region).vert_stride = BRW_VERTICAL_STRIDE_ONE_DIMENSIONAL; (yyval.region).width = ffs((yyvsp[-3].integer)) - 1; (yyval.region).horiz_stride = ffs((yyvsp[-1].integer)); } #line 5248 "gram.c" /* yacc.c:1646 */ break; case 266: #line 2761 "gram.y" /* yacc.c:1646 */ { (yyval.regtype).type = program_defaults.register_type;(yyval.regtype).is_default = 1;} #line 5254 "gram.c" /* yacc.c:1646 */ break; case 267: #line 2762 "gram.y" /* yacc.c:1646 */ { (yyval.regtype).type = BRW_REGISTER_TYPE_F;(yyval.regtype).is_default = 0; } #line 5260 "gram.c" /* yacc.c:1646 */ break; case 268: #line 2763 "gram.y" /* yacc.c:1646 */ { (yyval.regtype).type = BRW_REGISTER_TYPE_UD;(yyval.regtype).is_default = 0; } #line 5266 "gram.c" /* yacc.c:1646 */ break; case 269: #line 2764 "gram.y" /* yacc.c:1646 */ { (yyval.regtype).type = BRW_REGISTER_TYPE_D;(yyval.regtype).is_default = 0; } #line 5272 "gram.c" /* yacc.c:1646 */ break; case 270: #line 2765 "gram.y" /* yacc.c:1646 */ { (yyval.regtype).type = BRW_REGISTER_TYPE_UW;(yyval.regtype).is_default = 0; } #line 5278 "gram.c" /* yacc.c:1646 */ break; case 271: #line 2766 "gram.y" /* yacc.c:1646 */ { (yyval.regtype).type = BRW_REGISTER_TYPE_W;(yyval.regtype).is_default = 0; } #line 5284 "gram.c" /* yacc.c:1646 */ break; case 272: #line 2767 "gram.y" /* yacc.c:1646 */ { (yyval.regtype).type = BRW_REGISTER_TYPE_UB;(yyval.regtype).is_default = 0; } #line 5290 "gram.c" /* yacc.c:1646 */ break; case 273: #line 2768 "gram.y" /* yacc.c:1646 */ { (yyval.regtype).type = BRW_REGISTER_TYPE_B;(yyval.regtype).is_default = 0; } #line 5296 "gram.c" /* yacc.c:1646 */ break; case 274: #line 2772 "gram.y" /* yacc.c:1646 */ { /* XXX change to default when pragma parse is done */ (yyval.integer) = BRW_REGISTER_TYPE_D; } #line 5305 "gram.c" /* yacc.c:1646 */ break; case 275: #line 2776 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = BRW_REGISTER_TYPE_F; } #line 5311 "gram.c" /* yacc.c:1646 */ break; case 276: #line 2777 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = BRW_REGISTER_TYPE_UD; } #line 5317 "gram.c" /* yacc.c:1646 */ break; case 277: #line 2778 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = BRW_REGISTER_TYPE_D; } #line 5323 "gram.c" /* yacc.c:1646 */ break; case 278: #line 2779 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = BRW_REGISTER_TYPE_UW; } #line 5329 "gram.c" /* yacc.c:1646 */ break; case 279: #line 2780 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = BRW_REGISTER_TYPE_W; } #line 5335 "gram.c" /* yacc.c:1646 */ break; case 280: #line 2781 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = BRW_REGISTER_TYPE_V; } #line 5341 "gram.c" /* yacc.c:1646 */ break; case 281: #line 2782 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = BRW_REGISTER_TYPE_VF; } #line 5347 "gram.c" /* yacc.c:1646 */ break; case 282: #line 2790 "gram.y" /* yacc.c:1646 */ { (yyval.src_operand).reg.dw1.bits.swizzle = BRW_SWIZZLE_NOOP; } #line 5355 "gram.c" /* yacc.c:1646 */ break; case 283: #line 2794 "gram.y" /* yacc.c:1646 */ { (yyval.src_operand).reg.dw1.bits.swizzle = BRW_SWIZZLE4((yyvsp[0].integer), (yyvsp[0].integer), (yyvsp[0].integer), (yyvsp[0].integer)); } #line 5363 "gram.c" /* yacc.c:1646 */ break; case 284: #line 2798 "gram.y" /* yacc.c:1646 */ { (yyval.src_operand).reg.dw1.bits.swizzle = BRW_SWIZZLE4((yyvsp[-3].integer), (yyvsp[-2].integer), (yyvsp[-1].integer), (yyvsp[0].integer)); } #line 5371 "gram.c" /* yacc.c:1646 */ break; case 289: #line 2811 "gram.y" /* yacc.c:1646 */ { (yyval.reg).dw1.bits.writemask = BRW_WRITEMASK_XYZW; } #line 5379 "gram.c" /* yacc.c:1646 */ break; case 290: #line 2815 "gram.y" /* yacc.c:1646 */ { (yyval.reg).dw1.bits.writemask = (yyvsp[-3].integer) | (yyvsp[-2].integer) | (yyvsp[-1].integer) | (yyvsp[0].integer); } #line 5387 "gram.c" /* yacc.c:1646 */ break; case 291: #line 2820 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = 0; } #line 5393 "gram.c" /* yacc.c:1646 */ break; case 292: #line 2821 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = 1 << BRW_CHANNEL_X; } #line 5399 "gram.c" /* yacc.c:1646 */ break; case 293: #line 2824 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = 0; } #line 5405 "gram.c" /* yacc.c:1646 */ break; case 294: #line 2825 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = 1 << BRW_CHANNEL_Y; } #line 5411 "gram.c" /* yacc.c:1646 */ break; case 295: #line 2828 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = 0; } #line 5417 "gram.c" /* yacc.c:1646 */ break; case 296: #line 2829 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = 1 << BRW_CHANNEL_Z; } #line 5423 "gram.c" /* yacc.c:1646 */ break; case 297: #line 2832 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = 0; } #line 5429 "gram.c" /* yacc.c:1646 */ break; case 298: #line 2833 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = 1 << BRW_CHANNEL_W; } #line 5435 "gram.c" /* yacc.c:1646 */ break; case 299: #line 2837 "gram.y" /* yacc.c:1646 */ { (yyval.imm32).r = imm32_d; (yyval.imm32).u.d = (yyvsp[0].integer); } #line 5441 "gram.c" /* yacc.c:1646 */ break; case 300: #line 2838 "gram.y" /* yacc.c:1646 */ { (yyval.imm32).r = imm32_f; (yyval.imm32).u.f = (yyvsp[0].number); } #line 5447 "gram.c" /* yacc.c:1646 */ break; case 301: #line 2843 "gram.y" /* yacc.c:1646 */ { (yyval.predicate).pred_control = BRW_PREDICATE_NONE; (yyval.predicate).flag_reg_nr = 0; (yyval.predicate).flag_subreg_nr = 0; (yyval.predicate).pred_inverse = 0; } #line 5458 "gram.c" /* yacc.c:1646 */ break; case 302: #line 2850 "gram.y" /* yacc.c:1646 */ { (yyval.predicate).pred_control = (yyvsp[-1].integer); (yyval.predicate).flag_reg_nr = (yyvsp[-2].reg).nr; (yyval.predicate).flag_subreg_nr = (yyvsp[-2].reg).subnr; (yyval.predicate).pred_inverse = (yyvsp[-3].integer); } #line 5469 "gram.c" /* yacc.c:1646 */ break; case 303: #line 2858 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = 0; } #line 5475 "gram.c" /* yacc.c:1646 */ break; case 304: #line 2859 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = 0; } #line 5481 "gram.c" /* yacc.c:1646 */ break; case 305: #line 2860 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = 1; } #line 5487 "gram.c" /* yacc.c:1646 */ break; case 306: #line 2863 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = BRW_PREDICATE_NORMAL; } #line 5493 "gram.c" /* yacc.c:1646 */ break; case 307: #line 2864 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = BRW_PREDICATE_ALIGN16_REPLICATE_X; } #line 5499 "gram.c" /* yacc.c:1646 */ break; case 308: #line 2865 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = BRW_PREDICATE_ALIGN16_REPLICATE_Y; } #line 5505 "gram.c" /* yacc.c:1646 */ break; case 309: #line 2866 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = BRW_PREDICATE_ALIGN16_REPLICATE_Z; } #line 5511 "gram.c" /* yacc.c:1646 */ break; case 310: #line 2867 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = BRW_PREDICATE_ALIGN16_REPLICATE_W; } #line 5517 "gram.c" /* yacc.c:1646 */ break; case 311: #line 2868 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = BRW_PREDICATE_ALIGN1_ANYV; } #line 5523 "gram.c" /* yacc.c:1646 */ break; case 312: #line 2869 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = BRW_PREDICATE_ALIGN1_ALLV; } #line 5529 "gram.c" /* yacc.c:1646 */ break; case 313: #line 2870 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = BRW_PREDICATE_ALIGN1_ANY2H; } #line 5535 "gram.c" /* yacc.c:1646 */ break; case 314: #line 2871 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = BRW_PREDICATE_ALIGN1_ALL2H; } #line 5541 "gram.c" /* yacc.c:1646 */ break; case 315: #line 2872 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = BRW_PREDICATE_ALIGN1_ANY4H; } #line 5547 "gram.c" /* yacc.c:1646 */ break; case 316: #line 2873 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = BRW_PREDICATE_ALIGN1_ALL4H; } #line 5553 "gram.c" /* yacc.c:1646 */ break; case 317: #line 2874 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = BRW_PREDICATE_ALIGN1_ANY8H; } #line 5559 "gram.c" /* yacc.c:1646 */ break; case 318: #line 2875 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = BRW_PREDICATE_ALIGN1_ALL8H; } #line 5565 "gram.c" /* yacc.c:1646 */ break; case 319: #line 2876 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = BRW_PREDICATE_ALIGN1_ANY16H; } #line 5571 "gram.c" /* yacc.c:1646 */ break; case 320: #line 2877 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = BRW_PREDICATE_ALIGN1_ALL16H; } #line 5577 "gram.c" /* yacc.c:1646 */ break; case 321: #line 2880 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = 0; } #line 5583 "gram.c" /* yacc.c:1646 */ break; case 322: #line 2881 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = 1; } #line 5589 "gram.c" /* yacc.c:1646 */ break; case 323: #line 2884 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = 0; } #line 5595 "gram.c" /* yacc.c:1646 */ break; case 324: #line 2885 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = 1; } #line 5601 "gram.c" /* yacc.c:1646 */ break; case 325: #line 2889 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = ffs(program_defaults.execute_size) - 1; } #line 5609 "gram.c" /* yacc.c:1646 */ break; case 326: #line 2893 "gram.y" /* yacc.c:1646 */ { /* Returns a value for the execution_size field of an * instruction. */ if ((yyvsp[-1].integer) != 1 && (yyvsp[-1].integer) != 2 && (yyvsp[-1].integer) != 4 && (yyvsp[-1].integer) != 8 && (yyvsp[-1].integer) != 16 && (yyvsp[-1].integer) != 32) error(&(yylsp[-1]), "Invalid execution size %d\n", (yyvsp[-1].integer)); (yyval.integer) = ffs((yyvsp[-1].integer)) - 1; } #line 5624 "gram.c" /* yacc.c:1646 */ break; case 327: #line 2905 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = BRW_INSTRUCTION_NORMAL; } #line 5630 "gram.c" /* yacc.c:1646 */ break; case 328: #line 2906 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = BRW_INSTRUCTION_SATURATE; } #line 5636 "gram.c" /* yacc.c:1646 */ break; case 329: #line 2909 "gram.y" /* yacc.c:1646 */ { (yyval.condition).cond = (yyvsp[0].integer); (yyval.condition).flag_reg_nr = 0; (yyval.condition).flag_subreg_nr = -1; } #line 5646 "gram.c" /* yacc.c:1646 */ break; case 330: #line 2915 "gram.y" /* yacc.c:1646 */ { (yyval.condition).cond = (yyvsp[-2].integer); (yyval.condition).flag_reg_nr = ((yyvsp[0].reg).nr & 0xF); (yyval.condition).flag_subreg_nr = (yyvsp[0].reg).subnr; } #line 5656 "gram.c" /* yacc.c:1646 */ break; case 331: #line 2921 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = BRW_CONDITIONAL_NONE; } #line 5662 "gram.c" /* yacc.c:1646 */ break; case 343: #line 2937 "gram.y" /* yacc.c:1646 */ { memset(&(yyval.options), 0, sizeof((yyval.options))); } #line 5668 "gram.c" /* yacc.c:1646 */ break; case 344: #line 2939 "gram.y" /* yacc.c:1646 */ { (yyval.options) = (yyvsp[-1].options); } #line 5674 "gram.c" /* yacc.c:1646 */ break; case 345: #line 2943 "gram.y" /* yacc.c:1646 */ { (yyval.options) = (yyvsp[-2].options); add_option(&(yyval.options), (yyvsp[0].integer)); } #line 5683 "gram.c" /* yacc.c:1646 */ break; case 346: #line 2948 "gram.y" /* yacc.c:1646 */ { (yyval.options) = (yyvsp[-1].options); add_option(&(yyval.options), (yyvsp[0].integer)); } #line 5692 "gram.c" /* yacc.c:1646 */ break; case 347: #line 2953 "gram.y" /* yacc.c:1646 */ { memset(&(yyval.options), 0, sizeof((yyval.options))); } #line 5700 "gram.c" /* yacc.c:1646 */ break; case 348: #line 2958 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = ALIGN1; } #line 5706 "gram.c" /* yacc.c:1646 */ break; case 349: #line 2959 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = ALIGN16; } #line 5712 "gram.c" /* yacc.c:1646 */ break; case 350: #line 2960 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = SECHALF; } #line 5718 "gram.c" /* yacc.c:1646 */ break; case 351: #line 2961 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = COMPR; } #line 5724 "gram.c" /* yacc.c:1646 */ break; case 352: #line 2962 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = SWITCH; } #line 5730 "gram.c" /* yacc.c:1646 */ break; case 353: #line 2963 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = ATOMIC; } #line 5736 "gram.c" /* yacc.c:1646 */ break; case 354: #line 2964 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = NODDCHK; } #line 5742 "gram.c" /* yacc.c:1646 */ break; case 355: #line 2965 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = NODDCLR; } #line 5748 "gram.c" /* yacc.c:1646 */ break; case 356: #line 2966 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = MASK_DISABLE; } #line 5754 "gram.c" /* yacc.c:1646 */ break; case 357: #line 2967 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = BREAKPOINT; } #line 5760 "gram.c" /* yacc.c:1646 */ break; case 358: #line 2968 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = ACCWRCTRL; } #line 5766 "gram.c" /* yacc.c:1646 */ break; case 359: #line 2969 "gram.y" /* yacc.c:1646 */ { (yyval.integer) = EOT; } #line 5772 "gram.c" /* yacc.c:1646 */ break; #line 5776 "gram.c" /* yacc.c:1646 */ default: break; } /* User semantic actions sometimes alter yychar, and that requires that yytoken be updated with the new translation. We take the approach of translating immediately before every use of yytoken. One alternative is translating here after every semantic action, but that translation would be missed if the semantic action invokes YYABORT, YYACCEPT, or YYERROR immediately after altering yychar or if it invokes YYBACKUP. In the case of YYABORT or YYACCEPT, an incorrect destructor might then be invoked immediately. In the case of YYERROR or YYBACKUP, subsequent parser actions might lead to an incorrect destructor call or verbose syntax error message before the lookahead is translated. */ YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc); YYPOPSTACK (yylen); yylen = 0; YY_STACK_PRINT (yyss, yyssp); *++yyvsp = yyval; *++yylsp = yyloc; /* Now 'shift' the result of the reduction. Determine what state that goes to, based on the state we popped back to and the rule number reduced by. */ yyn = yyr1[yyn]; yystate = yypgoto[yyn - YYNTOKENS] + *yyssp; if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp) yystate = yytable[yystate]; else yystate = yydefgoto[yyn - YYNTOKENS]; goto yynewstate; /*--------------------------------------. | yyerrlab -- here on detecting error. | `--------------------------------------*/ yyerrlab: /* Make sure we have latest lookahead translation. See comments at user semantic actions for why this is necessary. */ yytoken = yychar == YYEMPTY ? YYEMPTY : YYTRANSLATE (yychar); /* If not already recovering from an error, report this error. */ if (!yyerrstatus) { ++yynerrs; #if ! YYERROR_VERBOSE yyerror (YY_("syntax error")); #else # define YYSYNTAX_ERROR yysyntax_error (&yymsg_alloc, &yymsg, \ yyssp, yytoken) { char const *yymsgp = YY_("syntax error"); int yysyntax_error_status; yysyntax_error_status = YYSYNTAX_ERROR; if (yysyntax_error_status == 0) yymsgp = yymsg; else if (yysyntax_error_status == 1) { if (yymsg != yymsgbuf) YYSTACK_FREE (yymsg); yymsg = (char *) YYSTACK_ALLOC (yymsg_alloc); if (!yymsg) { yymsg = yymsgbuf; yymsg_alloc = sizeof yymsgbuf; yysyntax_error_status = 2; } else { yysyntax_error_status = YYSYNTAX_ERROR; yymsgp = yymsg; } } yyerror (yymsgp); if (yysyntax_error_status == 2) goto yyexhaustedlab; } # undef YYSYNTAX_ERROR #endif } yyerror_range[1] = yylloc; if (yyerrstatus == 3) { /* If just tried and failed to reuse lookahead token after an error, discard it. */ if (yychar <= YYEOF) { /* Return failure if at end of input. */ if (yychar == YYEOF) YYABORT; } else { yydestruct ("Error: discarding", yytoken, &yylval, &yylloc); yychar = YYEMPTY; } } /* Else will try to reuse lookahead token after shifting the error token. */ goto yyerrlab1; /*---------------------------------------------------. | yyerrorlab -- error raised explicitly by YYERROR. | `---------------------------------------------------*/ yyerrorlab: /* Pacify compilers like GCC when the user code never invokes YYERROR and the label yyerrorlab therefore never appears in user code. */ if (/*CONSTCOND*/ 0) goto yyerrorlab; yyerror_range[1] = yylsp[1-yylen]; /* Do not reclaim the symbols of the rule whose action triggered this YYERROR. */ YYPOPSTACK (yylen); yylen = 0; YY_STACK_PRINT (yyss, yyssp); yystate = *yyssp; goto yyerrlab1; /*-------------------------------------------------------------. | yyerrlab1 -- common code for both syntax error and YYERROR. | `-------------------------------------------------------------*/ yyerrlab1: yyerrstatus = 3; /* Each real token shifted decrements this. */ for (;;) { yyn = yypact[yystate]; if (!yypact_value_is_default (yyn)) { yyn += YYTERROR; if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR) { yyn = yytable[yyn]; if (0 < yyn) break; } } /* Pop the current state because it cannot handle the error token. */ if (yyssp == yyss) YYABORT; yyerror_range[1] = *yylsp; yydestruct ("Error: popping", yystos[yystate], yyvsp, yylsp); YYPOPSTACK (1); yystate = *yyssp; YY_STACK_PRINT (yyss, yyssp); } YY_IGNORE_MAYBE_UNINITIALIZED_BEGIN *++yyvsp = yylval; YY_IGNORE_MAYBE_UNINITIALIZED_END yyerror_range[2] = yylloc; /* Using YYLLOC is tempting, but would change the location of the lookahead. YYLOC is available though. */ YYLLOC_DEFAULT (yyloc, yyerror_range, 2); *++yylsp = yyloc; /* Shift the error token. */ YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp); yystate = yyn; goto yynewstate; /*-------------------------------------. | yyacceptlab -- YYACCEPT comes here. | `-------------------------------------*/ yyacceptlab: yyresult = 0; goto yyreturn; /*-----------------------------------. | yyabortlab -- YYABORT comes here. | `-----------------------------------*/ yyabortlab: yyresult = 1; goto yyreturn; #if !defined yyoverflow || YYERROR_VERBOSE /*-------------------------------------------------. | yyexhaustedlab -- memory exhaustion comes here. | `-------------------------------------------------*/ yyexhaustedlab: yyerror (YY_("memory exhausted")); yyresult = 2; /* Fall through. */ #endif yyreturn: if (yychar != YYEMPTY) { /* Make sure we have latest lookahead translation. See comments at user semantic actions for why this is necessary. */ yytoken = YYTRANSLATE (yychar); yydestruct ("Cleanup: discarding lookahead", yytoken, &yylval, &yylloc); } /* Do not reclaim the symbols of the rule whose action triggered this YYABORT or YYACCEPT. */ YYPOPSTACK (yylen); YY_STACK_PRINT (yyss, yyssp); while (yyssp != yyss) { yydestruct ("Cleanup: popping", yystos[*yyssp], yyvsp, yylsp); YYPOPSTACK (1); } #ifndef yyoverflow if (yyss != yyssa) YYSTACK_FREE (yyss); #endif #if YYERROR_VERBOSE if (yymsg != yymsgbuf) YYSTACK_FREE (yymsg); #endif return yyresult; } #line 2972 "gram.y" /* yacc.c:1906 */ extern int yylineno; void yyerror (char *msg) { fprintf(stderr, "%s: %d: %s at \"%s\"\n", input_filename, yylineno, msg, lex_text()); ++errors; } static int get_type_size(unsigned type) { int size = 1; switch (type) { case BRW_REGISTER_TYPE_F: case BRW_REGISTER_TYPE_UD: case BRW_REGISTER_TYPE_D: size = 4; break; case BRW_REGISTER_TYPE_UW: case BRW_REGISTER_TYPE_W: size = 2; break; case BRW_REGISTER_TYPE_UB: case BRW_REGISTER_TYPE_B: size = 1; break; default: assert(0); size = 1; break; } return size; } static void reset_instruction_src_region(struct brw_instruction *instr, struct src_operand *src) { if (IS_GENp(8)) return; if (!src->default_region) return; if (src->reg.file == BRW_ARCHITECTURE_REGISTER_FILE && ((src->reg.nr & 0xF0) == BRW_ARF_ADDRESS)) { src->reg.vstride = ffs(0); src->reg.width = BRW_WIDTH_1; src->reg.hstride = ffs(0); } else if (src->reg.file == BRW_ARCHITECTURE_REGISTER_FILE && ((src->reg.nr & 0xF0) == BRW_ARF_ACCUMULATOR)) { int horiz_stride = 1, width, vert_stride; if (instr->header.compression_control == BRW_COMPRESSION_COMPRESSED) { width = 16; } else { width = 8; } if (width > (1 << instr->header.execution_size)) width = (1 << instr->header.execution_size); vert_stride = horiz_stride * width; src->reg.vstride = ffs(vert_stride); src->reg.width = ffs(width) - 1; src->reg.hstride = ffs(horiz_stride); } else if ((src->reg.file == BRW_ARCHITECTURE_REGISTER_FILE) && (src->reg.nr == BRW_ARF_NULL) && (instr->header.opcode == BRW_OPCODE_SEND)) { src->reg.vstride = ffs(8); src->reg.width = BRW_WIDTH_8; src->reg.hstride = ffs(1); } else { int horiz_stride = 1, width, vert_stride; if (instr->header.execution_size == 0) { /* scalar */ horiz_stride = 0; width = 1; vert_stride = 0; } else { if ((instr->header.opcode == BRW_OPCODE_MUL) || (instr->header.opcode == BRW_OPCODE_MAC) || (instr->header.opcode == BRW_OPCODE_CMP) || (instr->header.opcode == BRW_OPCODE_ASR) || (instr->header.opcode == BRW_OPCODE_ADD) || (instr->header.opcode == BRW_OPCODE_SHL)) { horiz_stride = 0; width = 1; vert_stride = 0; } else { width = (1 << instr->header.execution_size) / horiz_stride; vert_stride = horiz_stride * width; if (get_type_size(src->reg.type) * (width + src->reg.subnr) > 32) { horiz_stride = 0; width = 1; vert_stride = 0; } } } src->reg.vstride = ffs(vert_stride); src->reg.width = ffs(width) - 1; src->reg.hstride = ffs(horiz_stride); } } static void set_instruction_opcode(struct brw_program_instruction *instr, unsigned opcode) { if (IS_GENp(8)) gen8_set_opcode(GEN8(instr), opcode); else GEN(instr)->header.opcode = opcode; } /** * Fills in the destination register information in instr from the bits in dst. */ static int set_instruction_dest(struct brw_program_instruction *instr, struct brw_reg *dest) { if (!validate_dst_reg(instr, dest)) return 1; /* the assembler support expressing subnr in bytes or in number of * elements. */ resolve_subnr(dest); if (IS_GENp(8)) { gen8_set_exec_size(GEN8(instr), dest->width); gen8_set_dst(GEN8(instr), *dest); } else { brw_set_dest(&genasm_compile, GEN(instr), *dest); } return 0; } /* Sets the first source operand for the instruction. Returns 0 on success. */ static int set_instruction_src0(struct brw_program_instruction *instr, struct src_operand *src, YYLTYPE *location) { if (advanced_flag) reset_instruction_src_region(GEN(instr), src); if (!validate_src_reg(instr, src->reg, location)) return 1; /* the assembler support expressing subnr in bytes or in number of * elements. */ resolve_subnr(&src->reg); if (IS_GENp(8)) gen8_set_src0(GEN8(instr), src->reg); else brw_set_src0(&genasm_compile, GEN(instr), src->reg); return 0; } /* Sets the second source operand for the instruction. Returns 0 on success. */ static int set_instruction_src1(struct brw_program_instruction *instr, struct src_operand *src, YYLTYPE *location) { if (advanced_flag) reset_instruction_src_region(GEN(instr), src); if (!validate_src_reg(instr, src->reg, location)) return 1; /* the assembler support expressing subnr in bytes or in number of * elements. */ resolve_subnr(&src->reg); if (IS_GENp(8)) gen8_set_src1(GEN8(instr), src->reg); else brw_set_src1(&genasm_compile, GEN(instr), src->reg); return 0; } static int set_instruction_dest_three_src(struct brw_program_instruction *instr, struct brw_reg *dest) { resolve_subnr(dest); brw_set_3src_dest(&genasm_compile, GEN(instr), *dest); return 0; } static int set_instruction_src0_three_src(struct brw_program_instruction *instr, struct src_operand *src) { if (advanced_flag) reset_instruction_src_region(GEN(instr), src); resolve_subnr(&src->reg); // TODO: src0 modifier, src0 rep_ctrl brw_set_3src_src0(&genasm_compile, GEN(instr), src->reg); return 0; } static int set_instruction_src1_three_src(struct brw_program_instruction *instr, struct src_operand *src) { if (advanced_flag) reset_instruction_src_region(GEN(instr), src); resolve_subnr(&src->reg); // TODO: src1 modifier, src1 rep_ctrl brw_set_3src_src1(&genasm_compile, GEN(instr), src->reg); return 0; } static int set_instruction_src2_three_src(struct brw_program_instruction *instr, struct src_operand *src) { if (advanced_flag) reset_instruction_src_region(GEN(instr), src); resolve_subnr(&src->reg); // TODO: src2 modifier, src2 rep_ctrl brw_set_3src_src2(&genasm_compile, GEN(instr), src->reg); return 0; } static void set_instruction_saturate(struct brw_program_instruction *instr, int saturate) { if (IS_GENp(8)) gen8_set_saturate(GEN8(instr), saturate); else GEN(instr)->header.saturate = saturate; } static void set_instruction_options(struct brw_program_instruction *instr, struct options options) { if (IS_GENp(8)) { gen8_set_access_mode(GEN8(instr), options.access_mode); gen8_set_thread_control(GEN8(instr), options.thread_control); gen8_set_dep_control(GEN8(instr), options.dependency_control); gen8_set_mask_control(GEN8(instr), options.mask_control); gen8_set_debug_control(GEN8(instr), options.debug_control); gen8_set_acc_wr_control(GEN8(instr), options.acc_wr_control); gen8_set_eot(GEN8(instr), options.end_of_thread); } else { GEN(instr)->header.access_mode = options.access_mode; GEN(instr)->header.compression_control = options.compression_control; GEN(instr)->header.thread_control = options.thread_control; GEN(instr)->header.dependency_control = options.dependency_control; GEN(instr)->header.mask_control = options.mask_control; GEN(instr)->header.debug_control = options.debug_control; GEN(instr)->header.acc_wr_control = options.acc_wr_control; GEN(instr)->bits3.generic.end_of_thread = options.end_of_thread; } } static void set_instruction_predicate(struct brw_program_instruction *instr, struct predicate *p) { if (IS_GENp(8)) { gen8_set_pred_control(GEN8(instr), p->pred_control); gen8_set_pred_inv(GEN8(instr), p->pred_inverse); gen8_set_flag_reg_nr(GEN8(instr), p->flag_reg_nr); gen8_set_flag_subreg_nr(GEN8(instr), p->flag_subreg_nr); } else { GEN(instr)->header.predicate_control = p->pred_control; GEN(instr)->header.predicate_inverse = p->pred_inverse; GEN(instr)->bits2.da1.flag_reg_nr = p->flag_reg_nr; GEN(instr)->bits2.da1.flag_subreg_nr = p->flag_subreg_nr; } } static void set_instruction_pred_cond(struct brw_program_instruction *instr, struct predicate *p, struct condition *c, YYLTYPE *location) { set_instruction_predicate(instr, p); if (IS_GENp(8)) gen8_set_cond_modifier(GEN8(instr), c->cond); else GEN(instr)->header.destreg__conditionalmod = c->cond; if (c->flag_subreg_nr == -1) return; if (p->pred_control != BRW_PREDICATE_NONE && (p->flag_reg_nr != c->flag_reg_nr || p->flag_subreg_nr != c->flag_subreg_nr)) { warn(ALWAYS, location, "must use the same flag register if both " "prediction and conditional modifier are enabled\n"); } if (IS_GENp(8)) { gen8_set_flag_reg_nr(GEN8(instr), c->flag_reg_nr); gen8_set_flag_subreg_nr(GEN8(instr), c->flag_subreg_nr); } else { GEN(instr)->bits2.da1.flag_reg_nr = c->flag_reg_nr; GEN(instr)->bits2.da1.flag_subreg_nr = c->flag_subreg_nr; } } static void set_direct_dst_operand(struct brw_reg *dst, struct brw_reg *reg, int type) { *dst = *reg; dst->address_mode = BRW_ADDRESS_DIRECT; dst->type = type; dst->hstride = 1; dst->dw1.bits.writemask = BRW_WRITEMASK_XYZW; } static void set_direct_src_operand(struct src_operand *src, struct brw_reg *reg, int type) { memset(src, 0, sizeof(*src)); src->reg.address_mode = BRW_ADDRESS_DIRECT; src->reg.file = reg->file; src->reg.type = type; src->reg.subnr = reg->subnr; src->reg.nr = reg->nr; src->reg.vstride = 0; src->reg.width = 0; src->reg.hstride = 0; src->reg.negate = 0; src->reg.abs = 0; SWIZZLE(src->reg) = BRW_SWIZZLE_NOOP; } static inline int instruction_opcode(struct brw_program_instruction *insn) { if (IS_GENp(8)) return gen8_opcode(GEN8(insn)); else return GEN(insn)->header.opcode; } /* * return the offset used in native flow control (branch) instructions */ static inline int branch_offset(struct brw_program_instruction *insn, int offset) { /* * bspec: Unlike other flow control instructions, the offset used by JMPI * is relative to the incremented instruction pointer rather than the IP * value for the instruction itself. */ if (instruction_opcode(insn) == BRW_OPCODE_JMPI) offset--; /* * Gen4- bspec: the jump distance is in number of sixteen-byte units * Gen5+ bspec: the jump distance is in number of eight-byte units * Gen7.5+: the offset is in unit of 8bits for JMPI, 64bits for other flow * control instructions */ if (gen_level >= 75 && (instruction_opcode(insn) == BRW_OPCODE_JMPI)) offset *= 16; else if (gen_level >= 50) offset *= 2; return offset; } void set_branch_two_offsets(struct brw_program_instruction *insn, int jip_offset, int uip_offset) { int jip = branch_offset(insn, jip_offset); int uip = branch_offset(insn, uip_offset); assert(instruction_opcode(insn) != BRW_OPCODE_JMPI); if (IS_GENp(8)) { gen8_set_jip(GEN8(insn), jip); gen8_set_uip(GEN8(insn), uip); } else { GEN(insn)->bits3.break_cont.jip = jip; GEN(insn)->bits3.break_cont.uip = uip; } } void set_branch_one_offset(struct brw_program_instruction *insn, int jip_offset) { int jip = branch_offset(insn, jip_offset); if (IS_GENp(8)) { gen8_set_jip(GEN8(insn), jip); } else if (IS_GENx(7)) { /* Gen7 JMPI Restrictions in bspec: * The JIP data type must be Signed DWord */ if (instruction_opcode(insn) == BRW_OPCODE_JMPI) GEN(insn)->bits3.JIP = jip; else GEN(insn)->bits3.break_cont.jip = jip; } else if (IS_GENx(6)) { if ((instruction_opcode(insn) == BRW_OPCODE_CALL) || (instruction_opcode(insn) == BRW_OPCODE_JMPI)) GEN(insn)->bits3.JIP = jip; else GEN(insn)->bits1.branch_gen6.jump_count = jip; // for CASE,ELSE,FORK,IF,WHILE } else { GEN(insn)->bits3.JIP = jip; if (instruction_opcode(insn) == BRW_OPCODE_ELSE) GEN(insn)->bits3.break_cont.uip = 1; // Set the istack pop count, which must always be 1. } } intel-gpu-tools-1.14/assembler/ralloc.c0000644000175000017500000002445612665336131015040 00000000000000/* * Copyright © 2010 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ #include #include #include #include #include #include /* Android defines SIZE_MAX in limits.h, instead of the standard stdint.h */ #ifdef ANDROID #include #endif /* Some versions of MinGW are missing _vscprintf's declaration, although they * still provide the symbol in the import library. */ #ifdef __MINGW32__ _CRTIMP int _vscprintf(const char *format, va_list argptr); #endif #include "ralloc.h" #ifndef va_copy #ifdef __va_copy #define va_copy(dest, src) __va_copy((dest), (src)) #else #define va_copy(dest, src) (dest) = (src) #endif #endif #define CANARY 0x5A1106 struct ralloc_header { /* A canary value used to determine whether a pointer is ralloc'd. */ unsigned canary; struct ralloc_header *parent; /* The first child (head of a linked list) */ struct ralloc_header *child; /* Linked list of siblings */ struct ralloc_header *prev; struct ralloc_header *next; void (*destructor)(void *); }; typedef struct ralloc_header ralloc_header; static void unlink_block(ralloc_header *info); static void unsafe_free(ralloc_header *info); static ralloc_header * get_header(const void *ptr) { ralloc_header *info = (ralloc_header *) (((char *) ptr) - sizeof(ralloc_header)); assert(info->canary == CANARY); return info; } #define PTR_FROM_HEADER(info) (((char *) info) + sizeof(ralloc_header)) static void add_child(ralloc_header *parent, ralloc_header *info) { if (parent != NULL) { info->parent = parent; info->next = parent->child; parent->child = info; if (info->next != NULL) info->next->prev = info; } } void * ralloc_context(const void *ctx) { return ralloc_size(ctx, 0); } void * ralloc_size(const void *ctx, size_t size) { void *block = calloc(1, size + sizeof(ralloc_header)); ralloc_header *info = (ralloc_header *) block; ralloc_header *parent = ctx != NULL ? get_header(ctx) : NULL; add_child(parent, info); info->canary = CANARY; return PTR_FROM_HEADER(info); } void * rzalloc_size(const void *ctx, size_t size) { void *ptr = ralloc_size(ctx, size); if (likely(ptr != NULL)) memset(ptr, 0, size); return ptr; } /* helper function - assumes ptr != NULL */ static void * resize(void *ptr, size_t size) { ralloc_header *child, *old, *info; old = get_header(ptr); info = realloc(old, size + sizeof(ralloc_header)); if (info == NULL) return NULL; /* Update parent and sibling's links to the reallocated node. */ if (info != old && info->parent != NULL) { if (info->parent->child == old) info->parent->child = info; if (info->prev != NULL) info->prev->next = info; if (info->next != NULL) info->next->prev = info; } /* Update child->parent links for all children */ for (child = info->child; child != NULL; child = child->next) child->parent = info; return PTR_FROM_HEADER(info); } void * reralloc_size(const void *ctx, void *ptr, size_t size) { if (unlikely(ptr == NULL)) return ralloc_size(ctx, size); assert(ralloc_parent(ptr) == ctx); return resize(ptr, size); } void * ralloc_array_size(const void *ctx, size_t size, unsigned count) { if (count > SIZE_MAX/size) return NULL; return ralloc_size(ctx, size * count); } void * rzalloc_array_size(const void *ctx, size_t size, unsigned count) { if (count > SIZE_MAX/size) return NULL; return rzalloc_size(ctx, size * count); } void * reralloc_array_size(const void *ctx, void *ptr, size_t size, unsigned count) { if (count > SIZE_MAX/size) return NULL; return reralloc_size(ctx, ptr, size * count); } void ralloc_free(void *ptr) { ralloc_header *info; if (ptr == NULL) return; info = get_header(ptr); unlink_block(info); unsafe_free(info); } static void unlink_block(ralloc_header *info) { /* Unlink from parent & siblings */ if (info->parent != NULL) { if (info->parent->child == info) info->parent->child = info->next; if (info->prev != NULL) info->prev->next = info->next; if (info->next != NULL) info->next->prev = info->prev; } info->parent = NULL; info->prev = NULL; info->next = NULL; } static void unsafe_free(ralloc_header *info) { /* Recursively free any children...don't waste time unlinking them. */ ralloc_header *temp; while (info->child != NULL) { temp = info->child; info->child = temp->next; unsafe_free(temp); } /* Free the block itself. Call the destructor first, if any. */ if (info->destructor != NULL) info->destructor(PTR_FROM_HEADER(info)); free(info); } void ralloc_steal(const void *new_ctx, void *ptr) { ralloc_header *info, *parent; if (unlikely(ptr == NULL)) return; info = get_header(ptr); parent = get_header(new_ctx); unlink_block(info); add_child(parent, info); } void * ralloc_parent(const void *ptr) { ralloc_header *info; if (unlikely(ptr == NULL)) return NULL; info = get_header(ptr); return info->parent ? PTR_FROM_HEADER(info->parent) : NULL; } static void *autofree_context = NULL; static void autofree(void) { ralloc_free(autofree_context); } void * ralloc_autofree_context(void) { if (unlikely(autofree_context == NULL)) { autofree_context = ralloc_context(NULL); atexit(autofree); } return autofree_context; } void ralloc_set_destructor(const void *ptr, void(*destructor)(void *)) { ralloc_header *info = get_header(ptr); info->destructor = destructor; } char * ralloc_strdup(const void *ctx, const char *str) { size_t n; char *ptr; if (unlikely(str == NULL)) return NULL; n = strlen(str); ptr = ralloc_array(ctx, char, n + 1); memcpy(ptr, str, n); ptr[n] = '\0'; return ptr; } char * ralloc_strndup(const void *ctx, const char *str, size_t max) { size_t n; char *ptr; if (unlikely(str == NULL)) return NULL; n = strlen(str); if (n > max) n = max; ptr = ralloc_array(ctx, char, n + 1); memcpy(ptr, str, n); ptr[n] = '\0'; return ptr; } /* helper routine for strcat/strncat - n is the exact amount to copy */ static bool cat(char **dest, const char *str, size_t n) { char *both; size_t existing_length; assert(dest != NULL && *dest != NULL); existing_length = strlen(*dest); both = resize(*dest, existing_length + n + 1); if (unlikely(both == NULL)) return false; memcpy(both + existing_length, str, n); both[existing_length + n] = '\0'; *dest = both; return true; } bool ralloc_strcat(char **dest, const char *str) { return cat(dest, str, strlen(str)); } bool ralloc_strncat(char **dest, const char *str, size_t n) { /* Clamp n to the string length */ size_t str_length = strlen(str); if (str_length < n) n = str_length; return cat(dest, str, n); } char * ralloc_asprintf(const void *ctx, const char *fmt, ...) { char *ptr; va_list args; va_start(args, fmt); ptr = ralloc_vasprintf(ctx, fmt, args); va_end(args); return ptr; } /* Return the length of the string that would be generated by a printf-style * format and argument list, not including the \0 byte. */ static size_t printf_length(const char *fmt, va_list untouched_args) { int size; char junk; /* Make a copy of the va_list so the original caller can still use it */ va_list args; va_copy(args, untouched_args); #ifdef _WIN32 /* We need to use _vcsprintf to calculate the size as vsnprintf returns -1 * if the number of characters to write is greater than count. */ size = _vscprintf(fmt, args); (void)junk; #else size = vsnprintf(&junk, 1, fmt, args); #endif assert(size >= 0); va_end(args); return size; } char * ralloc_vasprintf(const void *ctx, const char *fmt, va_list args) { size_t size = printf_length(fmt, args) + 1; char *ptr = ralloc_size(ctx, size); if (ptr != NULL) vsnprintf(ptr, size, fmt, args); return ptr; } bool ralloc_asprintf_append(char **str, const char *fmt, ...) { bool success; va_list args; va_start(args, fmt); success = ralloc_vasprintf_append(str, fmt, args); va_end(args); return success; } bool ralloc_vasprintf_append(char **str, const char *fmt, va_list args) { size_t existing_length; assert(str != NULL); existing_length = *str ? strlen(*str) : 0; return ralloc_vasprintf_rewrite_tail(str, &existing_length, fmt, args); } bool ralloc_asprintf_rewrite_tail(char **str, size_t *start, const char *fmt, ...) { bool success; va_list args; va_start(args, fmt); success = ralloc_vasprintf_rewrite_tail(str, start, fmt, args); va_end(args); return success; } bool ralloc_vasprintf_rewrite_tail(char **str, size_t *start, const char *fmt, va_list args) { size_t new_length; char *ptr; assert(str != NULL); if (unlikely(*str == NULL)) { // Assuming a NULL context is probably bad, but it's expected behavior. *str = ralloc_vasprintf(NULL, fmt, args); return true; } new_length = printf_length(fmt, args); ptr = resize(*str, *start + new_length + 1); if (unlikely(ptr == NULL)) return false; vsnprintf(ptr + *start, new_length + 1, fmt, args); *str = ptr; *start += new_length; return true; } intel-gpu-tools-1.14/assembler/intel-gen4asm.pc.in0000644000175000017500000000030612665336131017004 00000000000000prefix=@prefix@ exec_prefix=@exec_prefix@ libdir=@libdir@ includedir=@includedir@ Name: intel-gen4asm Description: An assembler compiler for the Intel 965+ Chipset Version: @VERSION@ Libs: Cflags: intel-gpu-tools-1.14/assembler/brw_structs.h0000644000175000017500000010447312665336131016150 00000000000000/* Copyright (C) Intel Corp. 2006. All Rights Reserved. Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to develop this 3D driver. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **********************************************************************/ /* * Authors: * Keith Whitwell */ #ifndef BRW_STRUCTS_H #define BRW_STRUCTS_H #include /* These seem to be passed around as function args, so it works out * better to keep them as #defines: */ #define BRW_FLUSH_READ_CACHE 0x1 #define BRW_FLUSH_STATE_CACHE 0x2 #define BRW_INHIBIT_FLUSH_RENDER_CACHE 0x4 #define BRW_FLUSH_SNAPSHOT_COUNTERS 0x8 struct brw_urb_fence { struct { unsigned length:8; unsigned vs_realloc:1; unsigned gs_realloc:1; unsigned clp_realloc:1; unsigned sf_realloc:1; unsigned vfe_realloc:1; unsigned cs_realloc:1; unsigned pad:2; unsigned opcode:16; } header; struct { unsigned vs_fence:10; unsigned gs_fence:10; unsigned clp_fence:10; unsigned pad:2; } bits0; struct { unsigned sf_fence:10; unsigned vf_fence:10; unsigned cs_fence:11; unsigned pad:1; } bits1; }; /* State structs for the various fixed function units: */ struct thread0 { unsigned pad0:1; unsigned grf_reg_count:3; unsigned pad1:2; unsigned kernel_start_pointer:26; /* Offset from GENERAL_STATE_BASE */ }; struct thread1 { unsigned ext_halt_exception_enable:1; unsigned sw_exception_enable:1; unsigned mask_stack_exception_enable:1; unsigned timeout_exception_enable:1; unsigned illegal_op_exception_enable:1; unsigned pad0:3; unsigned depth_coef_urb_read_offset:6; /* WM only */ unsigned pad1:2; unsigned floating_point_mode:1; unsigned thread_priority:1; unsigned binding_table_entry_count:8; unsigned pad3:5; unsigned single_program_flow:1; }; struct thread2 { unsigned per_thread_scratch_space:4; unsigned pad0:6; unsigned scratch_space_base_pointer:22; }; struct thread3 { unsigned dispatch_grf_start_reg:4; unsigned urb_entry_read_offset:6; unsigned pad0:1; unsigned urb_entry_read_length:6; unsigned pad1:1; unsigned const_urb_entry_read_offset:6; unsigned pad2:1; unsigned const_urb_entry_read_length:6; unsigned pad3:1; }; struct brw_clip_unit_state { struct thread0 thread0; struct { unsigned pad0:7; unsigned sw_exception_enable:1; unsigned pad1:3; unsigned mask_stack_exception_enable:1; unsigned pad2:1; unsigned illegal_op_exception_enable:1; unsigned pad3:2; unsigned floating_point_mode:1; unsigned thread_priority:1; unsigned binding_table_entry_count:8; unsigned pad4:5; unsigned single_program_flow:1; } thread1; struct thread2 thread2; struct thread3 thread3; struct { unsigned pad0:9; unsigned gs_output_stats:1; /* not always */ unsigned stats_enable:1; unsigned nr_urb_entries:7; unsigned pad1:1; unsigned urb_entry_allocation_size:5; unsigned pad2:1; unsigned max_threads:5; /* may be less */ unsigned pad3:2; } thread4; struct { unsigned pad0:13; unsigned clip_mode:3; unsigned userclip_enable_flags:8; unsigned userclip_must_clip:1; unsigned negative_w_clip_test:1; unsigned guard_band_enable:1; unsigned viewport_z_clip_enable:1; unsigned viewport_xy_clip_enable:1; unsigned vertex_position_space:1; unsigned api_mode:1; unsigned pad2:1; } clip5; struct { unsigned pad0:5; unsigned clipper_viewport_state_ptr:27; } clip6; float viewport_xmin; float viewport_xmax; float viewport_ymin; float viewport_ymax; }; struct gen6_blend_state { struct { unsigned dest_blend_factor:5; unsigned source_blend_factor:5; unsigned pad3:1; unsigned blend_func:3; unsigned pad2:1; unsigned ia_dest_blend_factor:5; unsigned ia_source_blend_factor:5; unsigned pad1:1; unsigned ia_blend_func:3; unsigned pad0:1; unsigned ia_blend_enable:1; unsigned blend_enable:1; } blend0; struct { unsigned post_blend_clamp_enable:1; unsigned pre_blend_clamp_enable:1; unsigned clamp_range:2; unsigned pad0:4; unsigned x_dither_offset:2; unsigned y_dither_offset:2; unsigned dither_enable:1; unsigned alpha_test_func:3; unsigned alpha_test_enable:1; unsigned pad1:1; unsigned logic_op_func:4; unsigned logic_op_enable:1; unsigned pad2:1; unsigned write_disable_b:1; unsigned write_disable_g:1; unsigned write_disable_r:1; unsigned write_disable_a:1; unsigned pad3:1; unsigned alpha_to_coverage_dither:1; unsigned alpha_to_one:1; unsigned alpha_to_coverage:1; } blend1; }; struct gen6_color_calc_state { struct { unsigned alpha_test_format:1; unsigned pad0:14; unsigned round_disable:1; unsigned bf_stencil_ref:8; unsigned stencil_ref:8; } cc0; union { float alpha_ref_f; struct { unsigned ui:8; unsigned pad0:24; } alpha_ref_fi; } cc1; float constant_r; float constant_g; float constant_b; float constant_a; }; struct gen6_depth_stencil_state { struct { unsigned pad0:3; unsigned bf_stencil_pass_depth_pass_op:3; unsigned bf_stencil_pass_depth_fail_op:3; unsigned bf_stencil_fail_op:3; unsigned bf_stencil_func:3; unsigned bf_stencil_enable:1; unsigned pad1:2; unsigned stencil_write_enable:1; unsigned stencil_pass_depth_pass_op:3; unsigned stencil_pass_depth_fail_op:3; unsigned stencil_fail_op:3; unsigned stencil_func:3; unsigned stencil_enable:1; } ds0; struct { unsigned bf_stencil_write_mask:8; unsigned bf_stencil_test_mask:8; unsigned stencil_write_mask:8; unsigned stencil_test_mask:8; } ds1; struct { unsigned pad0:26; unsigned depth_write_enable:1; unsigned depth_test_func:3; unsigned pad1:1; unsigned depth_test_enable:1; } ds2; }; struct brw_cc_unit_state { struct { unsigned pad0:3; unsigned bf_stencil_pass_depth_pass_op:3; unsigned bf_stencil_pass_depth_fail_op:3; unsigned bf_stencil_fail_op:3; unsigned bf_stencil_func:3; unsigned bf_stencil_enable:1; unsigned pad1:2; unsigned stencil_write_enable:1; unsigned stencil_pass_depth_pass_op:3; unsigned stencil_pass_depth_fail_op:3; unsigned stencil_fail_op:3; unsigned stencil_func:3; unsigned stencil_enable:1; } cc0; struct { unsigned bf_stencil_ref:8; unsigned stencil_write_mask:8; unsigned stencil_test_mask:8; unsigned stencil_ref:8; } cc1; struct { unsigned logicop_enable:1; unsigned pad0:10; unsigned depth_write_enable:1; unsigned depth_test_function:3; unsigned depth_test:1; unsigned bf_stencil_write_mask:8; unsigned bf_stencil_test_mask:8; } cc2; struct { unsigned pad0:8; unsigned alpha_test_func:3; unsigned alpha_test:1; unsigned blend_enable:1; unsigned ia_blend_enable:1; unsigned pad1:1; unsigned alpha_test_format:1; unsigned pad2:16; } cc3; struct { unsigned pad0:5; unsigned cc_viewport_state_offset:27; /* Offset from GENERAL_STATE_BASE */ } cc4; struct { unsigned pad0:2; unsigned ia_dest_blend_factor:5; unsigned ia_src_blend_factor:5; unsigned ia_blend_function:3; unsigned statistics_enable:1; unsigned logicop_func:4; unsigned pad1:11; unsigned dither_enable:1; } cc5; struct { unsigned clamp_post_alpha_blend:1; unsigned clamp_pre_alpha_blend:1; unsigned clamp_range:2; unsigned pad0:11; unsigned y_dither_offset:2; unsigned x_dither_offset:2; unsigned dest_blend_factor:5; unsigned src_blend_factor:5; unsigned blend_function:3; } cc6; struct { union { float f; uint8_t ub[4]; } alpha_ref; } cc7; }; struct brw_sf_unit_state { struct thread0 thread0; struct thread1 thread1; struct thread2 thread2; struct thread3 thread3; struct { unsigned pad0:10; unsigned stats_enable:1; unsigned nr_urb_entries:7; unsigned pad1:1; unsigned urb_entry_allocation_size:5; unsigned pad2:1; unsigned max_threads:6; unsigned pad3:1; } thread4; struct { unsigned front_winding:1; unsigned viewport_transform:1; unsigned pad0:3; unsigned sf_viewport_state_offset:27; /* Offset from GENERAL_STATE_BASE */ } sf5; struct { unsigned pad0:9; unsigned dest_org_vbias:4; unsigned dest_org_hbias:4; unsigned scissor:1; unsigned disable_2x2_trifilter:1; unsigned disable_zero_pix_trifilter:1; unsigned point_rast_rule:2; unsigned line_endcap_aa_region_width:2; unsigned line_width:4; unsigned fast_scissor_disable:1; unsigned cull_mode:2; unsigned aa_enable:1; } sf6; struct { unsigned point_size:11; unsigned use_point_size_state:1; unsigned subpixel_precision:1; unsigned sprite_point:1; unsigned pad0:10; unsigned aa_line_distance_mode:1; unsigned trifan_pv:2; unsigned linestrip_pv:2; unsigned tristrip_pv:2; unsigned line_last_pixel_enable:1; } sf7; }; struct gen6_scissor_rect { unsigned xmin:16; unsigned ymin:16; unsigned xmax:16; unsigned ymax:16; }; struct brw_gs_unit_state { struct thread0 thread0; struct thread1 thread1; struct thread2 thread2; struct thread3 thread3; struct { unsigned pad0:8; unsigned rendering_enable:1; /* for Ironlake */ unsigned pad4:1; unsigned stats_enable:1; unsigned nr_urb_entries:7; unsigned pad1:1; unsigned urb_entry_allocation_size:5; unsigned pad2:1; unsigned max_threads:5; unsigned pad3:2; } thread4; struct { unsigned sampler_count:3; unsigned pad0:2; unsigned sampler_state_pointer:27; } gs5; struct { unsigned max_vp_index:4; unsigned pad0:12; unsigned svbi_post_inc_value:10; unsigned pad1:1; unsigned svbi_post_inc_enable:1; unsigned svbi_payload:1; unsigned discard_adjaceny:1; unsigned reorder_enable:1; unsigned pad2:1; } gs6; }; struct brw_vs_unit_state { struct thread0 thread0; struct thread1 thread1; struct thread2 thread2; struct thread3 thread3; struct { unsigned pad0:10; unsigned stats_enable:1; unsigned nr_urb_entries:7; unsigned pad1:1; unsigned urb_entry_allocation_size:5; unsigned pad2:1; unsigned max_threads:6; unsigned pad3:1; } thread4; struct { unsigned sampler_count:3; unsigned pad0:2; unsigned sampler_state_pointer:27; } vs5; struct { unsigned vs_enable:1; unsigned vert_cache_disable:1; unsigned pad0:30; } vs6; }; struct brw_wm_unit_state { struct thread0 thread0; struct thread1 thread1; struct thread2 thread2; struct thread3 thread3; struct { unsigned stats_enable:1; unsigned depth_buffer_clear:1; unsigned sampler_count:3; unsigned sampler_state_pointer:27; } wm4; struct { unsigned enable_8_pix:1; unsigned enable_16_pix:1; unsigned enable_32_pix:1; unsigned enable_con_32_pix:1; unsigned enable_con_64_pix:1; unsigned pad0:1; /* These next four bits are for Ironlake+ */ unsigned fast_span_coverage_enable:1; unsigned depth_buffer_clear:1; unsigned depth_buffer_resolve_enable:1; unsigned hierarchical_depth_buffer_resolve_enable:1; unsigned legacy_global_depth_bias:1; unsigned line_stipple:1; unsigned depth_offset:1; unsigned polygon_stipple:1; unsigned line_aa_region_width:2; unsigned line_endcap_aa_region_width:2; unsigned early_depth_test:1; unsigned thread_dispatch_enable:1; unsigned program_uses_depth:1; unsigned program_computes_depth:1; unsigned program_uses_killpixel:1; unsigned legacy_line_rast: 1; unsigned transposed_urb_read_enable:1; unsigned max_threads:7; } wm5; float global_depth_offset_constant; float global_depth_offset_scale; /* for Ironlake only */ struct { unsigned pad0:1; unsigned grf_reg_count_1:3; unsigned pad1:2; unsigned kernel_start_pointer_1:26; } wm8; struct { unsigned pad0:1; unsigned grf_reg_count_2:3; unsigned pad1:2; unsigned kernel_start_pointer_2:26; } wm9; struct { unsigned pad0:1; unsigned grf_reg_count_3:3; unsigned pad1:2; unsigned kernel_start_pointer_3:26; } wm10; }; struct brw_sampler_default_color { float color[4]; }; struct gen5_sampler_default_color { uint8_t ub[4]; float f[4]; uint16_t hf[4]; uint16_t us[4]; int16_t s[4]; uint8_t b[4]; }; struct brw_sampler_state { struct { unsigned shadow_function:3; unsigned lod_bias:11; unsigned min_filter:3; unsigned mag_filter:3; unsigned mip_filter:2; unsigned base_level:5; unsigned min_mag_neq:1; unsigned lod_preclamp:1; unsigned default_color_mode:1; unsigned pad0:1; unsigned disable:1; } ss0; struct { unsigned r_wrap_mode:3; unsigned t_wrap_mode:3; unsigned s_wrap_mode:3; unsigned cube_control_mode:1; unsigned pad:2; unsigned max_lod:10; unsigned min_lod:10; } ss1; struct { unsigned pad:5; unsigned default_color_pointer:27; } ss2; struct { unsigned non_normalized_coord:1; unsigned pad:12; unsigned address_round:6; unsigned max_aniso:3; unsigned chroma_key_mode:1; unsigned chroma_key_index:2; unsigned chroma_key_enable:1; unsigned monochrome_filter_width:3; unsigned monochrome_filter_height:3; } ss3; }; struct gen7_sampler_state { struct { unsigned aniso_algorithm:1; unsigned lod_bias:13; unsigned min_filter:3; unsigned mag_filter:3; unsigned mip_filter:2; unsigned base_level:5; unsigned pad1:1; unsigned lod_preclamp:1; unsigned default_color_mode:1; unsigned pad0:1; unsigned disable:1; } ss0; struct { unsigned cube_control_mode:1; unsigned shadow_function:3; unsigned pad:4; unsigned max_lod:12; unsigned min_lod:12; } ss1; struct { unsigned pad:5; unsigned default_color_pointer:27; } ss2; struct { unsigned r_wrap_mode:3; unsigned t_wrap_mode:3; unsigned s_wrap_mode:3; unsigned pad:1; unsigned non_normalized_coord:1; unsigned trilinear_quality:2; unsigned address_round:6; unsigned max_aniso:3; unsigned chroma_key_mode:1; unsigned chroma_key_index:2; unsigned chroma_key_enable:1; unsigned pad0:6; } ss3; }; struct brw_clipper_viewport { float xmin; float xmax; float ymin; float ymax; }; struct brw_cc_viewport { float min_depth; float max_depth; }; struct brw_sf_viewport { struct { float m00; float m11; float m22; float m30; float m31; float m32; } viewport; /* scissor coordinates are inclusive */ struct { int16_t xmin; int16_t ymin; int16_t xmax; int16_t ymax; } scissor; }; struct gen6_sf_viewport { float m00; float m11; float m22; float m30; float m31; float m32; }; struct gen7_sf_clip_viewport { struct { float m00; float m11; float m22; float m30; float m31; float m32; } viewport; unsigned pad0[2]; struct { float xmin; float xmax; float ymin; float ymax; } guardband; float pad1[4]; }; struct brw_vertex_element_state { struct { unsigned src_offset:11; unsigned pad:5; unsigned src_format:9; unsigned pad0:1; unsigned valid:1; unsigned vertex_buffer_index:5; } ve0; struct { unsigned dst_offset:8; unsigned pad:8; unsigned vfcomponent3:4; unsigned vfcomponent2:4; unsigned vfcomponent1:4; unsigned vfcomponent0:4; } ve1; }; struct brw_urb_immediate { unsigned opcode:4; unsigned offset:6; unsigned swizzle_control:2; unsigned pad:1; unsigned allocate:1; unsigned used:1; unsigned complete:1; unsigned response_length:4; unsigned msg_length:4; unsigned msg_target:4; unsigned pad1:3; unsigned end_of_thread:1; }; /* Instruction format for the execution units: */ struct brw_instruction { struct { unsigned opcode:7; unsigned pad:1; unsigned access_mode:1; unsigned mask_control:1; unsigned dependency_control:2; unsigned compression_control:2; /* gen6: quater control */ unsigned thread_control:2; unsigned predicate_control:4; unsigned predicate_inverse:1; unsigned execution_size:3; /** * Conditional Modifier for most instructions. On Gen6+, this is also * used for the SEND instruction's Message Target/SFID. */ unsigned destreg__conditionalmod:4; unsigned acc_wr_control:1; unsigned cmpt_control:1; unsigned debug_control:1; unsigned saturate:1; } header; union { struct { unsigned dest_reg_file:2; unsigned dest_reg_type:3; unsigned src0_reg_file:2; unsigned src0_reg_type:3; unsigned src1_reg_file:2; unsigned src1_reg_type:3; unsigned pad:1; unsigned dest_subreg_nr:5; unsigned dest_reg_nr:8; unsigned dest_horiz_stride:2; unsigned dest_address_mode:1; } da1; struct { unsigned dest_reg_file:2; unsigned dest_reg_type:3; unsigned src0_reg_file:2; unsigned src0_reg_type:3; unsigned src1_reg_file:2; /* 0x00000c00 */ unsigned src1_reg_type:3; /* 0x00007000 */ unsigned pad:1; int dest_indirect_offset:10; /* offset against the deref'd address reg */ unsigned dest_subreg_nr:3; /* subnr for the address reg a0.x */ unsigned dest_horiz_stride:2; unsigned dest_address_mode:1; } ia1; struct { unsigned dest_reg_file:2; unsigned dest_reg_type:3; unsigned src0_reg_file:2; unsigned src0_reg_type:3; unsigned src1_reg_file:2; unsigned src1_reg_type:3; unsigned pad:1; unsigned dest_writemask:4; unsigned dest_subreg_nr:1; unsigned dest_reg_nr:8; unsigned dest_horiz_stride:2; unsigned dest_address_mode:1; } da16; struct { unsigned dest_reg_file:2; unsigned dest_reg_type:3; unsigned src0_reg_file:2; unsigned src0_reg_type:3; unsigned pad0:6; unsigned dest_writemask:4; int dest_indirect_offset:6; unsigned dest_subreg_nr:3; unsigned dest_horiz_stride:2; unsigned dest_address_mode:1; } ia16; struct { unsigned dest_reg_file:2; unsigned dest_reg_type:3; unsigned src0_reg_file:2; unsigned src0_reg_type:3; unsigned src1_reg_file:2; unsigned src1_reg_type:3; unsigned pad:1; int jump_count:16; } branch_gen6; struct { unsigned dest_reg_file:1; unsigned flag_subreg_nr:1; unsigned flag_reg_nr:1; unsigned pad0:1; unsigned src0_abs:1; unsigned src0_negate:1; unsigned src1_abs:1; unsigned src1_negate:1; unsigned src2_abs:1; unsigned src2_negate:1; unsigned src_reg_type:2; unsigned dest_reg_type:2; unsigned pad1:1; unsigned nib_ctrl:1; unsigned pad2:1; unsigned dest_writemask:4; unsigned dest_subreg_nr:3; unsigned dest_reg_nr:8; } da3src; uint32_t ud; } bits1; union { struct { unsigned src0_subreg_nr:5; unsigned src0_reg_nr:8; unsigned src0_abs:1; unsigned src0_negate:1; unsigned src0_address_mode:1; unsigned src0_horiz_stride:2; unsigned src0_width:3; unsigned src0_vert_stride:4; unsigned flag_subreg_nr:1; unsigned flag_reg_nr:1; unsigned pad:5; } da1; struct { int src0_indirect_offset:10; unsigned src0_subreg_nr:3; unsigned src0_abs:1; unsigned src0_negate:1; unsigned src0_address_mode:1; unsigned src0_horiz_stride:2; unsigned src0_width:3; unsigned src0_vert_stride:4; unsigned flag_subreg_nr:1; unsigned flag_reg_nr:1; unsigned pad:5; } ia1; struct { unsigned src0_swz_x:2; unsigned src0_swz_y:2; unsigned src0_subreg_nr:1; unsigned src0_reg_nr:8; unsigned src0_abs:1; unsigned src0_negate:1; unsigned src0_address_mode:1; unsigned src0_swz_z:2; unsigned src0_swz_w:2; unsigned pad0:1; unsigned src0_vert_stride:4; unsigned flag_subreg_nr:1; unsigned flag_reg_nr:1; unsigned pad1:5; } da16; struct { unsigned src0_swz_x:2; unsigned src0_swz_y:2; int src0_indirect_offset:6; unsigned src0_subreg_nr:3; unsigned src0_abs:1; unsigned src0_negate:1; unsigned src0_address_mode:1; unsigned src0_swz_z:2; unsigned src0_swz_w:2; unsigned pad0:1; unsigned src0_vert_stride:4; unsigned flag_subreg_nr:1; unsigned flag_reg_nr:1; unsigned pad1:5; } ia16; /* Extended Message Descriptor for Ironlake (Gen5) SEND instruction. * * Does not apply to Gen6+. The SFID/message target moved to bits * 27:24 of the header (destreg__conditionalmod); EOT is in bits3. */ struct { unsigned pad:26; unsigned end_of_thread:1; unsigned pad1:1; unsigned sfid:4; } send_gen5; /* for Ironlake only */ struct { unsigned src0_rep_ctrl:1; unsigned src0_swizzle:8; unsigned src0_subreg_nr:3; unsigned src0_reg_nr:8; unsigned pad0:1; unsigned src1_rep_ctrl:1; unsigned src1_swizzle:8; unsigned src1_subreg_nr_low:2; } da3src; uint32_t ud; } bits2; union { struct { unsigned src1_subreg_nr:5; unsigned src1_reg_nr:8; unsigned src1_abs:1; unsigned src1_negate:1; unsigned src1_address_mode:1; unsigned src1_horiz_stride:2; unsigned src1_width:3; unsigned src1_vert_stride:4; unsigned pad0:7; } da1; struct { unsigned src1_swz_x:2; unsigned src1_swz_y:2; unsigned src1_subreg_nr:1; unsigned src1_reg_nr:8; unsigned src1_abs:1; unsigned src1_negate:1; unsigned src1_address_mode:1; unsigned src1_swz_z:2; unsigned src1_swz_w:2; unsigned pad1:1; unsigned src1_vert_stride:4; unsigned pad2:7; } da16; struct { int src1_indirect_offset:10; unsigned src1_subreg_nr:3; unsigned src1_abs:1; unsigned src1_negate:1; unsigned src1_address_mode:1; unsigned src1_horiz_stride:2; unsigned src1_width:3; unsigned src1_vert_stride:4; unsigned pad1:7; } ia1; struct { unsigned src1_swz_x:2; unsigned src1_swz_y:2; int src1_indirect_offset:6; unsigned src1_subreg_nr:3; unsigned src1_abs:1; unsigned src1_negate:1; unsigned src1_address_mode:1; unsigned src1_swz_z:2; unsigned src1_swz_w:2; unsigned pad1:1; unsigned src1_vert_stride:4; unsigned pad2:7; } ia16; struct { int jump_count:16; /* note: signed */ unsigned pop_count:4; unsigned pad0:12; } if_else; /* This is also used for gen7 IF/ELSE instructions */ struct { /* Signed jump distance to the ip to jump to if all channels * are disabled after the break or continue. It should point * to the end of the innermost control flow block, as that's * where some channel could get re-enabled. */ int jip:16; /* Signed jump distance to the location to resume execution * of this channel if it's enabled for the break or continue. */ int uip:16; } break_cont; int JIP; /* used by Gen6 CALL instructions; Gen7 JMPI */ /** * \defgroup SEND instructions / Message Descriptors * * @{ */ /** * Generic Message Descriptor for Gen4 SEND instructions. The structs * below expand function_control to something specific for their * message. Due to struct packing issues, they duplicate these bits. * * See the G45 PRM, Volume 4, Table 14-15. */ struct { unsigned function_control:16; unsigned response_length:4; unsigned msg_length:4; unsigned msg_target:4; unsigned pad1:3; unsigned end_of_thread:1; } generic; /** * Generic Message Descriptor for Gen5-7 SEND instructions. * * See the Sandybridge PRM, Volume 2 Part 2, Table 8-15. (Sadly, most * of the information on the SEND instruction is missing from the public * Ironlake PRM.) * * The table claims that bit 31 is reserved/MBZ on Gen6+, but it lies. * According to the SEND instruction description: * "The MSb of the message description, the EOT field, always comes from * bit 127 of the instruction word"...which is bit 31 of this field. */ struct { unsigned function_control:19; unsigned header_present:1; unsigned response_length:5; unsigned msg_length:4; unsigned pad1:2; unsigned end_of_thread:1; } generic_gen5; struct { unsigned opcode:1; unsigned requester_type:1; unsigned pad:2; unsigned resource_select:1; unsigned pad1:11; unsigned response_length:4; unsigned msg_length:4; unsigned msg_target:4; unsigned pad2:3; unsigned end_of_thread:1; } thread_spawner; struct { unsigned opcode:1; unsigned requester_type:1; unsigned pad0:2; unsigned resource_select:1; unsigned pad1:14; unsigned header_present:1; unsigned response_length:5; unsigned msg_length:4; unsigned pad2:2; unsigned end_of_thread:1; } thread_spawner_gen5; /** G45 PRM, Volume 4, Section 6.1.1.1 */ struct { unsigned function:4; unsigned int_type:1; unsigned precision:1; unsigned saturate:1; unsigned data_type:1; unsigned pad0:8; unsigned response_length:4; unsigned msg_length:4; unsigned msg_target:4; unsigned pad1:3; unsigned end_of_thread:1; } math; /** Ironlake PRM, Volume 4 Part 1, Section 6.1.1.1 */ struct { unsigned function:4; unsigned int_type:1; unsigned precision:1; unsigned saturate:1; unsigned data_type:1; unsigned snapshot:1; unsigned pad0:10; unsigned header_present:1; unsigned response_length:5; unsigned msg_length:4; unsigned pad1:2; unsigned end_of_thread:1; } math_gen5; /** G45 PRM, Volume 4, Section 4.8.1.1.1 [DevBW] and [DevCL] */ struct { unsigned binding_table_index:8; unsigned sampler:4; unsigned return_format:2; unsigned msg_type:2; unsigned response_length:4; unsigned msg_length:4; unsigned msg_target:4; unsigned pad1:3; unsigned end_of_thread:1; } sampler; /** G45 PRM, Volume 4, Section 4.8.1.1.2 [DevCTG] */ struct { unsigned binding_table_index:8; unsigned sampler:4; unsigned msg_type:4; unsigned response_length:4; unsigned msg_length:4; unsigned msg_target:4; unsigned pad1:3; unsigned end_of_thread:1; } sampler_g4x; /** Ironlake PRM, Volume 4 Part 1, Section 4.11.1.1.3 */ struct { unsigned binding_table_index:8; unsigned sampler:4; unsigned msg_type:4; unsigned simd_mode:2; unsigned pad0:1; unsigned header_present:1; unsigned response_length:5; unsigned msg_length:4; unsigned pad1:2; unsigned end_of_thread:1; } sampler_gen5; struct { unsigned binding_table_index:8; unsigned sampler:4; unsigned msg_type:5; unsigned simd_mode:2; unsigned header_present:1; unsigned response_length:5; unsigned msg_length:4; unsigned pad1:2; unsigned end_of_thread:1; } sampler_gen7; struct brw_urb_immediate urb; struct { unsigned opcode:4; unsigned offset:6; unsigned swizzle_control:2; unsigned pad:1; unsigned allocate:1; unsigned used:1; unsigned complete:1; unsigned pad0:3; unsigned header_present:1; unsigned response_length:5; unsigned msg_length:4; unsigned pad1:2; unsigned end_of_thread:1; } urb_gen5; struct { unsigned opcode:3; unsigned offset:11; unsigned swizzle_control:1; unsigned complete:1; unsigned per_slot_offset:1; unsigned pad0:2; unsigned header_present:1; unsigned response_length:5; unsigned msg_length:4; unsigned pad1:2; unsigned end_of_thread:1; } urb_gen7; struct { unsigned binding_table_index:8; unsigned search_path_index:3; unsigned lut_subindex:2; unsigned message_type:2; unsigned pad0:4; unsigned header_present:1; } vme_gen6; struct { unsigned binding_table_index:8; unsigned pad0:5; unsigned message_type:2; unsigned pad1:4; unsigned header_present:1; } cre_gen75; /** 965 PRM, Volume 4, Section 5.10.1.1: Message Descriptor */ struct { unsigned binding_table_index:8; unsigned msg_control:4; unsigned msg_type:2; unsigned target_cache:2; unsigned response_length:4; unsigned msg_length:4; unsigned msg_target:4; unsigned pad1:3; unsigned end_of_thread:1; } dp_read; /** G45 PRM, Volume 4, Section 5.10.1.1.2 */ struct { unsigned binding_table_index:8; unsigned msg_control:3; unsigned msg_type:3; unsigned target_cache:2; unsigned response_length:4; unsigned msg_length:4; unsigned msg_target:4; unsigned pad1:3; unsigned end_of_thread:1; } dp_read_g4x; /** Ironlake PRM, Volume 4 Part 1, Section 5.10.2.1.2. */ struct { unsigned binding_table_index:8; unsigned msg_control:4; unsigned msg_type:2; unsigned target_cache:2; unsigned pad0:3; unsigned header_present:1; unsigned response_length:5; unsigned msg_length:4; unsigned pad1:2; unsigned end_of_thread:1; } dp_read_gen5; /** G45 PRM, Volume 4, Section 5.10.1.1.2. For both Gen4 and G45. */ struct { unsigned binding_table_index:8; unsigned msg_control:3; unsigned last_render_target:1; unsigned msg_type:3; unsigned send_commit_msg:1; unsigned response_length:4; unsigned msg_length:4; unsigned msg_target:4; unsigned pad1:3; unsigned end_of_thread:1; } dp_write; /** Ironlake PRM, Volume 4 Part 1, Section 5.10.2.1.2. */ struct { unsigned binding_table_index:8; unsigned msg_control:3; unsigned last_render_target:1; unsigned msg_type:3; unsigned send_commit_msg:1; unsigned pad0:3; unsigned header_present:1; unsigned response_length:5; unsigned msg_length:4; unsigned pad1:2; unsigned end_of_thread:1; } dp_write_gen5; /** * Message for the Sandybridge Sampler Cache or Constant Cache Data Port. * * See the Sandybridge PRM, Volume 4 Part 1, Section 3.9.2.1.1. **/ struct { unsigned binding_table_index:8; unsigned msg_control:5; unsigned msg_type:3; unsigned pad0:3; unsigned header_present:1; unsigned response_length:5; unsigned msg_length:4; unsigned pad1:2; unsigned end_of_thread:1; } gen6_dp_sampler_const_cache; /** * Message for the Sandybridge Render Cache Data Port. * * Most fields are defined in the Sandybridge PRM, Volume 4 Part 1, * Section 3.9.2.1.1: Message Descriptor. * * "Slot Group Select" and "Last Render Target" are part of the * 5-bit message control for Render Target Write messages. See * Section 3.9.9.2.1 of the same volume. */ struct { unsigned binding_table_index:8; unsigned msg_control:5; unsigned msg_type:4; unsigned send_commit_msg:1; unsigned pad0:1; unsigned header_present:1; unsigned response_length:5; unsigned msg_length:4; unsigned pad1:2; unsigned end_of_thread:1; } gen6_dp; /** * Message for any of the Gen7 Data Port caches. * * Most fields are defined in BSpec volume 5c.2 Data Port / Messages / * Data Port Messages / Message Descriptor. Once again, "Slot Group * Select" and "Last Render Target" are part of the 6-bit message * control for Render Target Writes. */ struct { unsigned binding_table_index:8; unsigned msg_control:6; unsigned msg_type:4; unsigned category:1; unsigned header_present:1; unsigned response_length:5; unsigned msg_length:4; unsigned pad2:2; unsigned end_of_thread:1; } gen7_dp; /** @} */ struct { unsigned src1_subreg_nr_high:1; unsigned src1_reg_nr:8; unsigned pad0:1; unsigned src2_rep_ctrl:1; unsigned src2_swizzle:8; unsigned src2_subreg_nr:3; unsigned src2_reg_nr:8; unsigned pad1:2; } da3src; int d; unsigned ud; float f; } bits3; }; struct brw_compact_instruction { struct { unsigned opcode:7; /* 0- 6 */ unsigned debug_control:1; /* 7- 7 */ unsigned control_index:5; /* 8-12 */ unsigned data_type_index:5; /* 13-17 */ unsigned sub_reg_index:5; /* 18-22 */ unsigned acc_wr_control:1; /* 23-23 */ unsigned conditionalmod:4; /* 24-27 */ unsigned flag_subreg_nr:1; /* 28-28 */ unsigned cmpt_ctrl:1; /* 29-29 */ unsigned src0_index:2; /* 30-31 */ } dw0; struct { unsigned src0_index:3; /* 32-24 */ unsigned src1_index:5; /* 35-39 */ unsigned dst_reg_nr:8; /* 40-47 */ unsigned src0_reg_nr:8; /* 48-55 */ unsigned src1_reg_nr:8; /* 56-63 */ } dw1; }; #endif intel-gpu-tools-1.14/assembler/brw_eu.h0000644000175000017500000003024112665336131015041 00000000000000/* Copyright (C) Intel Corp. 2006. All Rights Reserved. Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to develop this 3D driver. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **********************************************************************/ /* * Authors: * Keith Whitwell */ #ifndef BRW_EU_H #define BRW_EU_H #include #include #include "brw_context.h" #include "brw_structs.h" #include "brw_defines.h" #include "brw_reg.h" #ifdef __cplusplus extern "C" { #endif #define BRW_EU_MAX_INSN_STACK 5 struct brw_compile { struct brw_instruction *store; int store_size; unsigned nr_insn; unsigned int next_insn_offset; void *mem_ctx; /* Allow clients to push/pop instruction state: */ struct brw_instruction stack[BRW_EU_MAX_INSN_STACK]; bool compressed_stack[BRW_EU_MAX_INSN_STACK]; struct brw_instruction *current; unsigned flag_value; bool single_program_flow; bool compressed; struct brw_context *brw; /* Control flow stacks: * - if_stack contains IF and ELSE instructions which must be patched * (and popped) once the matching ENDIF instruction is encountered. * * Just store the instruction pointer(an index). */ int *if_stack; int if_stack_depth; int if_stack_array_size; /** * loop_stack contains the instruction pointers of the starts of loops which * must be patched (and popped) once the matching WHILE instruction is * encountered. */ int *loop_stack; /** * pre-gen6, the BREAK and CONT instructions had to tell how many IF/ENDIF * blocks they were popping out of, to fix up the mask stack. This tracks * the IF/ENDIF nesting in each current nested loop level. */ int *if_depth_in_loop; int loop_stack_depth; int loop_stack_array_size; }; static inline struct brw_instruction *current_insn( struct brw_compile *p) { return &p->store[p->nr_insn]; } void brw_pop_insn_state( struct brw_compile *p ); void brw_push_insn_state( struct brw_compile *p ); void brw_set_mask_control( struct brw_compile *p, unsigned value ); void brw_set_saturate( struct brw_compile *p, bool enable ); void brw_set_access_mode( struct brw_compile *p, unsigned access_mode ); void brw_set_compression_control(struct brw_compile *p, enum brw_compression c); void brw_set_predicate_control_flag_value( struct brw_compile *p, unsigned value ); void brw_set_predicate_control( struct brw_compile *p, unsigned pc ); void brw_set_predicate_inverse(struct brw_compile *p, bool predicate_inverse); void brw_set_conditionalmod( struct brw_compile *p, unsigned conditional ); void brw_set_flag_reg(struct brw_compile *p, int reg, int subreg); void brw_set_acc_write_control(struct brw_compile *p, unsigned value); void brw_init_compile(struct brw_context *, struct brw_compile *p, void *mem_ctx); void brw_dump_compile(struct brw_compile *p, FILE *out, int start, int end); const unsigned *brw_get_program( struct brw_compile *p, unsigned *sz ); struct brw_instruction *brw_next_insn(struct brw_compile *p, unsigned opcode); void brw_set_dest(struct brw_compile *p, struct brw_instruction *insn, struct brw_reg dest); void brw_set_src0(struct brw_compile *p, struct brw_instruction *insn, struct brw_reg reg); void gen6_resolve_implied_move(struct brw_compile *p, struct brw_reg *src, unsigned msg_reg_nr); /* Helpers for regular instructions: */ #define ALU1(OP) \ struct brw_instruction *brw_##OP(struct brw_compile *p, \ struct brw_reg dest, \ struct brw_reg src0); #define ALU2(OP) \ struct brw_instruction *brw_##OP(struct brw_compile *p, \ struct brw_reg dest, \ struct brw_reg src0, \ struct brw_reg src1); #define ALU3(OP) \ struct brw_instruction *brw_##OP(struct brw_compile *p, \ struct brw_reg dest, \ struct brw_reg src0, \ struct brw_reg src1, \ struct brw_reg src2); #define ROUND(OP) \ void brw_##OP(struct brw_compile *p, struct brw_reg dest, struct brw_reg src0); ALU1(MOV) ALU2(SEL) ALU1(NOT) ALU2(AND) ALU2(OR) ALU2(XOR) ALU2(SHR) ALU2(SHL) ALU2(RSR) ALU2(RSL) ALU2(ASR) ALU2(JMPI) ALU2(ADD) ALU2(AVG) ALU2(MUL) ALU1(FRC) ALU1(RNDD) ALU2(MAC) ALU2(MACH) ALU1(LZD) ALU2(DP4) ALU2(DPH) ALU2(DP3) ALU2(DP2) ALU2(LINE) ALU2(PLN) ALU3(MAD) ROUND(RNDZ) ROUND(RNDE) #undef ALU1 #undef ALU2 #undef ALU3 #undef ROUND /* Helpers for SEND instruction: */ void brw_set_sampler_message(struct brw_compile *p, struct brw_instruction *insn, unsigned binding_table_index, unsigned sampler, unsigned msg_type, unsigned response_length, unsigned msg_length, unsigned header_present, unsigned simd_mode, unsigned return_format); void brw_set_dp_read_message(struct brw_compile *p, struct brw_instruction *insn, unsigned binding_table_index, unsigned msg_control, unsigned msg_type, unsigned target_cache, unsigned msg_length, bool header_present, unsigned response_length); void brw_set_dp_write_message(struct brw_compile *p, struct brw_instruction *insn, unsigned binding_table_index, unsigned msg_control, unsigned msg_type, unsigned msg_length, bool header_present, unsigned last_render_target, unsigned response_length, unsigned end_of_thread, unsigned send_commit_msg); void brw_urb_WRITE(struct brw_compile *p, struct brw_reg dest, unsigned msg_reg_nr, struct brw_reg src0, bool allocate, bool used, unsigned msg_length, unsigned response_length, bool eot, bool writes_complete, unsigned offset, unsigned swizzle); void brw_ff_sync(struct brw_compile *p, struct brw_reg dest, unsigned msg_reg_nr, struct brw_reg src0, bool allocate, unsigned response_length, bool eot); void brw_svb_write(struct brw_compile *p, struct brw_reg dest, unsigned msg_reg_nr, struct brw_reg src0, unsigned binding_table_index, bool send_commit_msg); void brw_fb_WRITE(struct brw_compile *p, int dispatch_width, unsigned msg_reg_nr, struct brw_reg src0, unsigned msg_control, unsigned binding_table_index, unsigned msg_length, unsigned response_length, bool eot, bool header_present); void brw_SAMPLE(struct brw_compile *p, struct brw_reg dest, unsigned msg_reg_nr, struct brw_reg src0, unsigned binding_table_index, unsigned sampler, unsigned writemask, unsigned msg_type, unsigned response_length, unsigned msg_length, unsigned header_present, unsigned simd_mode, unsigned return_format); void brw_math( struct brw_compile *p, struct brw_reg dest, unsigned function, unsigned msg_reg_nr, struct brw_reg src, unsigned data_type, unsigned precision ); void brw_math2(struct brw_compile *p, struct brw_reg dest, unsigned function, struct brw_reg src0, struct brw_reg src1); void brw_oword_block_read(struct brw_compile *p, struct brw_reg dest, struct brw_reg mrf, uint32_t offset, uint32_t bind_table_index); void brw_oword_block_read_scratch(struct brw_compile *p, struct brw_reg dest, struct brw_reg mrf, int num_regs, unsigned offset); void brw_oword_block_write_scratch(struct brw_compile *p, struct brw_reg mrf, int num_regs, unsigned offset); void brw_shader_time_add(struct brw_compile *p, int mrf, uint32_t surf_index); /* If/else/endif. Works by manipulating the execution flags on each * channel. */ struct brw_instruction *brw_IF(struct brw_compile *p, unsigned execute_size); struct brw_instruction *gen6_IF(struct brw_compile *p, uint32_t conditional, struct brw_reg src0, struct brw_reg src1); void brw_ELSE(struct brw_compile *p); void brw_ENDIF(struct brw_compile *p); /* DO/WHILE loops: */ struct brw_instruction *brw_DO(struct brw_compile *p, unsigned execute_size); struct brw_instruction *brw_WHILE(struct brw_compile *p); struct brw_instruction *brw_BREAK(struct brw_compile *p); struct brw_instruction *brw_CONT(struct brw_compile *p); struct brw_instruction *gen6_CONT(struct brw_compile *p); struct brw_instruction *gen6_HALT(struct brw_compile *p); /* Forward jumps: */ void brw_land_fwd_jump(struct brw_compile *p, int jmp_insn_idx); void brw_NOP(struct brw_compile *p); void brw_WAIT(struct brw_compile *p); /* Special case: there is never a destination, execution size will be * taken from src0: */ void brw_CMP(struct brw_compile *p, struct brw_reg dest, unsigned conditional, struct brw_reg src0, struct brw_reg src1); /*********************************************************************** * brw_eu_util.c: */ void brw_copy_indirect_to_indirect(struct brw_compile *p, struct brw_indirect dst_ptr, struct brw_indirect src_ptr, unsigned count); void brw_copy_from_indirect(struct brw_compile *p, struct brw_reg dst, struct brw_indirect ptr, unsigned count); void brw_copy4(struct brw_compile *p, struct brw_reg dst, struct brw_reg src, unsigned count); void brw_copy8(struct brw_compile *p, struct brw_reg dst, struct brw_reg src, unsigned count); void brw_math_invert( struct brw_compile *p, struct brw_reg dst, struct brw_reg src); void brw_set_src1(struct brw_compile *p, struct brw_instruction *insn, struct brw_reg reg); void brw_set_uip_jip(struct brw_compile *p); uint32_t brw_swap_cmod(uint32_t cmod); void brw_set_3src_dest(struct brw_compile *p, struct brw_instruction *insn, struct brw_reg dest); void brw_set_3src_src0(struct brw_compile *p, struct brw_instruction *insn, struct brw_reg src0); void brw_set_3src_src1(struct brw_compile *p, struct brw_instruction *insn, struct brw_reg src1); void brw_set_3src_src2(struct brw_compile *p, struct brw_instruction *insn, struct brw_reg src2); /* brw_eu_compact.c */ void brw_init_compaction_tables(struct intel_context *intel); void brw_compact_instructions(struct brw_compile *p); void brw_uncompact_instruction(struct intel_context *intel, struct brw_instruction *dst, struct brw_compact_instruction *src); bool brw_try_compact_instruction(struct brw_compile *p, struct brw_compact_instruction *dst, struct brw_instruction *src); void brw_debug_compact_uncompact(struct intel_context *intel, struct brw_instruction *orig, struct brw_instruction *uncompacted); /* brw_optimize.c */ void brw_optimize(struct brw_compile *p); void brw_remove_duplicate_mrf_moves(struct brw_compile *p); void brw_remove_grf_to_mrf_moves(struct brw_compile *p); #ifdef __cplusplus } #endif #endif intel-gpu-tools-1.14/assembler/gen8_disasm.c0000644000175000017500000007247412665336131015770 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that copyright * notice and this permission notice appear in supporting documentation, and * that the name of the copyright holders not be used in advertising or * publicity pertaining to distribution of the software without specific, * written prior permission. The copyright holders make no representations * about the suitability of this software for any purpose. It is provided "as * is" without express or implied warranty. * * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE * OF THIS SOFTWARE. */ #include #include #include #include #include #include #include "brw_context.h" #include "brw_defines.h" #include "gen8_instruction.h" static const struct opcode_desc *m_opcode = opcode_descs; static const char *const m_conditional_modifier[16] = { /* [0 - BRW_CONDITIONAL_NONE] */ "", /* [1 - BRW_CONDITIONAL_Z] */ ".e", /* [2 - BRW_CONDITIONAL_NZ] */ ".ne", /* [3 - BRW_CONDITIONAL_G] */ ".g", /* [4 - BRW_CONDITIONAL_GE] */ ".ge", /* [5 - BRW_CONDITIONAL_L] */ ".l", /* [6 - BRW_CONDITIONAL_LE] */ ".le", /* [7 - Reserved] */ NULL, /* [8 - BRW_CONDITIONAL_O] */ ".o", /* [9 - BRW_CONDITIONAL_U] */ ".u", /* [a-f - Reserved] */ }; static const char *const m_negate[2] = { "", "-" }; static const char *const m_abs[2] = { "", "(abs)" }; static const char *const m_vert_stride[16] = { "0", "1", "2", "4", "8", "16", "32", }; static const char *const width[8] = { "1", "2", "4", "8", "16", }; static const char *const m_horiz_stride[4] = { "0", "1", "2", "4" }; static const char *const m_chan_sel[4] = { "x", "y", "z", "w" }; static const char *const m_debug_ctrl[2] = { "", ".breakpoint" }; static const char *const m_saturate[2] = { "", ".sat" }; static const char *const m_accwr[2] = { "", "AccWrEnable" }; static const char *const m_maskctrl[2] = { "WE_normal", "WE_all" }; static const char *const m_exec_size[8] = { "1", "2", "4", "8", "16", "32", }; static const char *const m_pred_inv[2] = { "+", "-" }; static const char *const m_pred_ctrl_align16[16] = { "", "", ".x", ".y", ".z", ".w", ".any4h", ".all4h", }; static const char *const m_pred_ctrl_align1[16] = { "", "", ".anyv", ".allv", ".any2h", ".all2h", ".any4h", ".all4h", ".any8h", ".all8h", ".any16h", ".all16h", ".any32h", ".all32h", }; static const char *const m_thread_ctrl[4] = { "", "atomic", "switch", }; static const char *const m_dep_ctrl[4] = { "", "NoDDClr", "NoDDChk", "NoDDClr,NoDDChk", }; static const char *const m_mask_ctrl[4] = { "", "nomask", }; static const char *const m_access_mode[2] = { "align1", "align16" }; static const char *const m_reg_type[8] = { "UD", "D", "UW", "W", "UB", "B", "DF", "F", }; static const int reg_type_size[8] = { /* UD */ 4, /* D */ 4, /* UW */ 2, /* W */ 2, /* UB */ 1, /* B */ 1, /* DF */ 8, /* F */ 4, }; static const char *const m_reg_file[4] = { "A", "g", NULL, "imm", }; static const char *const m_writemask[16] = { ".(none)", ".x", ".y", ".xy", ".z", ".xz", ".yz", ".xyz", ".w", ".xw", ".yw", ".xyw", ".zw", ".xzw", ".yzw", "", }; static const char *const m_eot[2] = { "", "EOT" }; static const char *const m_sfid[16] = { /* [0 - BRW_SFID_NULL] */ "null", /* [1 - Reserved] */ NULL, /* [2 - BRW_SFID_SAMPLER] */ "sampler", /* [3 - BRW_SFID_MESSAGE_GATEWAY] */ "gateway", /* [4 - GEN6_SFID_DATAPORT_SAMPLER_CACHE] */ "dp/sampler_cache", /* [5 - GEN6_SFID_DATAPORT_RENDER_CACHE] */ "dp/render_cache", /* [6 - BRW_SFID_URB] */ "URB", /* [7 - BRW_SFID_THREAD_SPAWNER] */ "thread_spawner", /* [8 - BRW_SFID_VME] */ "vme", /* [9 - GEN6_SFID_DATAPORT_CONSTANT_CACHE] */ "dp/constant_cache", /* [a - GEN7_SFID_DATAPORT_DATA_CACHE] */ "dp/data_cache", /* [b - GEN7_SFID_PI] */ "pi", /* [c - HSW_SFID_DATAPORT_DATA_CACHE_1] */ "dp/data_cache:1", /* [d - HSW_SFID_CRE] */ "cre", /* [e-f - Reserved */ NULL, NULL, }; #if 0 static const char *const dp_rc_msg_type[16] = { [BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ] = "OWORD block read", [GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ] = "RT UNORM read", [GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ] = "OWORD dual block read", [GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ] = "media block read", [GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ] = "OWORD unaligned block read", [GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ] = "DWORD scattered read", [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE] = "DWORD atomic write", [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE] = "OWORD block write", [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE] = "OWORD dual block write", [GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE] = "media block write", [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE] = "DWORD scattered write", [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE] = "RT write", [GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE] = "streamed VB write", [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE] = "RT UNORMc write", }; #endif static const char *const m_math_function[16] = { /* [0 - Reserved] */ NULL, /* [1 - BRW_MATH_FUNCTION_INV] */ "inv", /* [2 - BRW_MATH_FUNCTION_LOG] */ "log", /* [3 - BRW_MATH_FUNCTION_EXP] */ "exp", /* [4 - BRW_MATH_FUNCTION_SQRT] */ "sqrt", /* [5 - BRW_MATH_FUNCTION_RSQ] */ "rsq", /* [6 - BRW_MATH_FUNCTION_SIN] */ "sin", /* [7 - BRW_MATH_FUNCTION_COS] */ "cos", /* [8 - Reserved] */ NULL, /* [9 - BRW_MATH_FUNCTION_FDIV] */ "fdiv", /* [a - BRW_MATH_FUNCTION_POW] */ "pow", /* [b - BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER] */ "intdivmod", /* [c - BRW_MATH_FUNCTION_INT_DIV_QUOTIENT] */ "intdiv", /* [d - BRW_MATH_FUNCTION_INT_DIV_REMAINDER] */ "intmod", /* [e - GEN8_MATH_FUNCTION_INVM] */ "invm", /* [f - GEN8_MATH_FUNCTION_RSQRTM] */ "rsqrtm", }; static const char *const m_urb_opcode[16] = { /* [0] */ "write HWord", /* [1] */ "write OWord", /* [2] */ "read HWord", /* [3] */ "read OWord", /* [4] */ "atomic mov", /* [5] */ "atomic inc", /* [6] */ "atomic add", /* [7] */ "SIMD8 write", /* [8] */ "SIMD8 read", /* [9-15] - reserved */ }; static const char *const m_urb_interleave[2] = { "", "interleaved" }; static int column; static int string(FILE *file, const char *string) { fputs(string, file); column += strlen(string); return 0; } static int format(FILE *f, const char *format, ...) { char buf[1024]; va_list args; va_start(args, format); vsnprintf(buf, sizeof(buf) - 1, format, args); va_end(args); string(f, buf); return 0; } static int newline(FILE *f) { putc('\n', f); column = 0; return 0; } static int pad(FILE *f, int c) { do string(f, " "); while (column < c); return 0; } static int control(FILE *file, const char *name, const char *const ctrl[], unsigned id, int *space) { if (!ctrl[id]) { fprintf(file, "*** invalid %s value %d ", name, id); return 1; } if (ctrl[id][0]) { if (space && *space) string(file, " "); string(file, ctrl[id]); if (space) *space = 1; } return 0; } static int print_opcode(FILE *file, int id) { if (!m_opcode[id].name) { format(file, "*** invalid opcode value %d ", id); return 1; } string(file, m_opcode[id].name); return 0; } static int reg(FILE *file, unsigned reg_file, unsigned _reg_nr) { int err = 0; if (reg_file == BRW_ARCHITECTURE_REGISTER_FILE) { switch (_reg_nr & 0xf0) { case BRW_ARF_NULL: string(file, "null"); return -1; case BRW_ARF_ADDRESS: format(file, "a%d", _reg_nr & 0x0f); break; case BRW_ARF_ACCUMULATOR: format(file, "acc%d", _reg_nr & 0x0f); break; case BRW_ARF_FLAG: format(file, "f%d", _reg_nr & 0x0f); break; case BRW_ARF_MASK: format(file, "mask%d", _reg_nr & 0x0f); break; case BRW_ARF_MASK_STACK: format(file, "msd%d", _reg_nr & 0x0f); break; case BRW_ARF_STATE: format(file, "sr%d", _reg_nr & 0x0f); break; case BRW_ARF_CONTROL: format(file, "cr%d", _reg_nr & 0x0f); break; case BRW_ARF_NOTIFICATION_COUNT: format(file, "n%d", _reg_nr & 0x0f); break; case BRW_ARF_IP: string(file, "ip"); return -1; break; default: format(file, "ARF%d", _reg_nr); break; } } else { err |= control(file, "src reg file", m_reg_file, reg_file, NULL); format(file, "%d", _reg_nr); } return err; } static int dest(FILE *file, struct gen8_instruction *inst) { int err = 0; if (gen8_access_mode(inst) == BRW_ALIGN_1) { assert(gen8_dst_address_mode(inst) == BRW_ADDRESS_DIRECT); err |= reg(file, gen8_dst_reg_file(inst), gen8_dst_da_reg_nr(inst)); if (err == -1) return 0; if (gen8_dst_da1_subreg_nr(inst)) format(file, ".%d", gen8_dst_da1_subreg_nr(inst) / reg_type_size[gen8_dst_reg_type(inst)]); string(file, "<"); err |= control(file, "horiz stride", m_horiz_stride, gen8_dst_da1_hstride(inst), NULL); string(file, ">"); err |= control(file, "dest reg encoding", m_reg_type, gen8_dst_reg_type(inst), NULL); } else { assert(gen8_dst_address_mode(inst) == BRW_ADDRESS_DIRECT); err |= reg(file, gen8_dst_reg_file(inst), gen8_dst_da_reg_nr(inst)); if (err == -1) return 0; if (gen8_dst_da16_subreg_nr(inst)) format(file, ".%d", gen8_dst_da16_subreg_nr(inst) / reg_type_size[gen8_dst_reg_type(inst)]); string(file, "<1>"); err |= control(file, "writemask", m_writemask, gen8_da16_writemask(inst), NULL); err |= control(file, "dest reg encoding", m_reg_type, gen8_dst_reg_type(inst), NULL); } return 0; } #if 0 static int dest_3src(FILE *file, gen8_instruction *inst) { int err = 0; uint32_t reg_file; if (inst->bits1.da3src.dest_reg_file) reg_file = BRW_MESSAGE_REGISTER_FILE; else reg_file = BRW_GENERAL_REGISTER_FILE; err |= reg(file, reg_file, inst->bits1.da3src.dest_reg_nr); if (err == -1) return 0; if (inst->bits1.da3src.dest_subreg_nr) format(file, ".%d", inst->bits1.da3src.dest_subreg_nr); string(file, "<1>"); err |= control(file, "writemask", m_writemask, inst->bits1.da3src.dest_writemask, NULL); err |= control(file, "dest reg encoding", m_reg_type, BRW_REGISTER_TYPE_F, NULL); return 0; } #endif static int src_align1_region(FILE *file, unsigned vert_stride, unsigned _width, unsigned horiz_stride) { int err = 0; string(file, "<"); err |= control(file, "vert stride", m_vert_stride, vert_stride, NULL); string(file, ","); err |= control(file, "width", width, _width, NULL); string(file, ","); err |= control(file, "horiz_stride", m_horiz_stride, horiz_stride, NULL); string(file, ">"); return err; } static int src_da1(FILE *file, unsigned type, unsigned reg_file, unsigned vert_stride, unsigned _width, unsigned horiz_stride, unsigned reg_num, unsigned sub_reg_num, unsigned _abs, unsigned negate) { int err = 0; err |= control(file, "negate", m_negate, negate, NULL); err |= control(file, "abs", m_abs, _abs, NULL); err |= reg(file, reg_file, reg_num); if (err == -1) return 0; if (sub_reg_num) format(file, ".%d", sub_reg_num / reg_type_size[type]); /* use formal style like spec */ src_align1_region(file, vert_stride, _width, horiz_stride); err |= control(file, "src reg encoding", m_reg_type, type, NULL); return err; } static int src_da16(FILE *file, unsigned _reg_type, unsigned reg_file, unsigned vert_stride, unsigned _reg_nr, unsigned _subreg_nr, unsigned _abs, unsigned negate, unsigned swz_x, unsigned swz_y, unsigned swz_z, unsigned swz_w) { int err = 0; err |= control(file, "negate", m_negate, negate, NULL); err |= control(file, "abs", m_abs, _abs, NULL); err |= reg(file, reg_file, _reg_nr); if (err == -1) return 0; if (_subreg_nr) /* bit4 for subreg number byte addressing. Make this same meaning as in da1 case, so output looks consistent. */ format(file, ".%d", 16 / reg_type_size[_reg_type]); string(file, "<"); err |= control(file, "vert stride", m_vert_stride, vert_stride, NULL); string(file, ",4,1>"); /* * Three kinds of swizzle display: * identity - nothing printed * 1->all - print the single channel * 1->1 - print the mapping */ if (swz_x == BRW_CHANNEL_X && swz_y == BRW_CHANNEL_Y && swz_z == BRW_CHANNEL_Z && swz_w == BRW_CHANNEL_W) { ; } else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w) { string(file, "."); err |= control(file, "channel select", m_chan_sel, swz_x, NULL); } else { string(file, "."); err |= control(file, "channel select", m_chan_sel, swz_x, NULL); err |= control(file, "channel select", m_chan_sel, swz_y, NULL); err |= control(file, "channel select", m_chan_sel, swz_z, NULL); err |= control(file, "channel select", m_chan_sel, swz_w, NULL); } err |= control(file, "src da16 reg type", m_reg_type, _reg_type, NULL); return err; } #if 0 static int src0_3src(FILE *file, gen8_instruction *inst) { int err = 0; unsigned swz_x = (inst->bits2.da3src.src0_swizzle >> 0) & 0x3; unsigned swz_y = (inst->bits2.da3src.src0_swizzle >> 2) & 0x3; unsigned swz_z = (inst->bits2.da3src.src0_swizzle >> 4) & 0x3; unsigned swz_w = (inst->bits2.da3src.src0_swizzle >> 6) & 0x3; err |= control(file, "negate", m_negate, inst->bits1.da3src.src0_negate, NULL); err |= control(file, "abs", m_abs, inst->bits1.da3src.src0_abs, NULL); err |= reg(file, BRW_GENERAL_REGISTER_FILE, inst->bits2.da3src.src0_reg_nr); if (err == -1) return 0; if (inst->bits2.da3src.src0_subreg_nr) format(file, ".%d", inst->bits2.da3src.src0_subreg_nr); string(file, "<4,1,1>"); err |= control(file, "src da16 reg type", m_reg_type, BRW_REGISTER_TYPE_F, NULL); /* * Three kinds of swizzle display: * identity - nothing printed * 1->all - print the single channel * 1->1 - print the mapping */ if (swz_x == BRW_CHANNEL_X && swz_y == BRW_CHANNEL_Y && swz_z == BRW_CHANNEL_Z && swz_w == BRW_CHANNEL_W) { ; } else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w) { string(file, "."); err |= control(file, "channel select", m_chan_sel, swz_x, NULL); } else { string(file, "."); err |= control(file, "channel select", m_chan_sel, swz_x, NULL); err |= control(file, "channel select", m_chan_sel, swz_y, NULL); err |= control(file, "channel select", m_chan_sel, swz_z, NULL); err |= control(file, "channel select", m_chan_sel, swz_w, NULL); } return err; } static int src1_3src(FILE *file, gen8_instruction *inst) { int err = 0; unsigned swz_x = (inst->bits2.da3src.src1_swizzle >> 0) & 0x3; unsigned swz_y = (inst->bits2.da3src.src1_swizzle >> 2) & 0x3; unsigned swz_z = (inst->bits2.da3src.src1_swizzle >> 4) & 0x3; unsigned swz_w = (inst->bits2.da3src.src1_swizzle >> 6) & 0x3; unsigned src1_subreg_nr = (inst->bits2.da3src.src1_subreg_nr_low | (inst->bits3.da3src.src1_subreg_nr_high << 2)); err |= control(file, "negate", m_negate, inst->bits1.da3src.src1_negate, NULL); err |= control(file, "abs", m_abs, inst->bits1.da3src.src1_abs, NULL); err |= reg(file, BRW_GENERAL_REGISTER_FILE, inst->bits3.da3src.src1_reg_nr); if (err == -1) return 0; if (src1_subreg_nr) format(file, ".%d", src1_subreg_nr); string(file, "<4,1,1>"); err |= control(file, "src da16 reg type", m_reg_type, BRW_REGISTER_TYPE_F, NULL); /* * Three kinds of swizzle display: * identity - nothing printed * 1->all - print the single channel * 1->1 - print the mapping */ if (swz_x == BRW_CHANNEL_X && swz_y == BRW_CHANNEL_Y && swz_z == BRW_CHANNEL_Z && swz_w == BRW_CHANNEL_W) { ; } else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w) { string(file, "."); err |= control(file, "channel select", m_chan_sel, swz_x, NULL); } else { string(file, "."); err |= control(file, "channel select", m_chan_sel, swz_x, NULL); err |= control(file, "channel select", m_chan_sel, swz_y, NULL); err |= control(file, "channel select", m_chan_sel, swz_z, NULL); err |= control(file, "channel select", m_chan_sel, swz_w, NULL); } return err; } static int src2_3src(FILE *file, gen8_instruction *inst) { int err = 0; unsigned swz_x = (inst->bits3.da3src.src2_swizzle >> 0) & 0x3; unsigned swz_y = (inst->bits3.da3src.src2_swizzle >> 2) & 0x3; unsigned swz_z = (inst->bits3.da3src.src2_swizzle >> 4) & 0x3; unsigned swz_w = (inst->bits3.da3src.src2_swizzle >> 6) & 0x3; err |= control(file, "negate", m_negate, inst->bits1.da3src.src2_negate, NULL); err |= control(file, "abs", m_abs, inst->bits1.da3src.src2_abs, NULL); err |= reg(file, BRW_GENERAL_REGISTER_FILE, inst->bits3.da3src.src2_reg_nr); if (err == -1) return 0; if (inst->bits3.da3src.src2_subreg_nr) format(file, ".%d", inst->bits3.da3src.src2_subreg_nr); string(file, "<4,1,1>"); err |= control(file, "src da16 reg type", m_reg_type, BRW_REGISTER_TYPE_F, NULL); /* * Three kinds of swizzle display: * identity - nothing printed * 1->all - print the single channel * 1->1 - print the mapping */ if (swz_x == BRW_CHANNEL_X && swz_y == BRW_CHANNEL_Y && swz_z == BRW_CHANNEL_Z && swz_w == BRW_CHANNEL_W) { ; } else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w) { string(file, "."); err |= control(file, "channel select", m_chan_sel, swz_x, NULL); } else { string(file, "."); err |= control(file, "channel select", m_chan_sel, swz_x, NULL); err |= control(file, "channel select", m_chan_sel, swz_y, NULL); err |= control(file, "channel select", m_chan_sel, swz_z, NULL); err |= control(file, "channel select", m_chan_sel, swz_w, NULL); } return err; } #endif static int imm(FILE *file, unsigned type, struct gen8_instruction *inst) { switch (type) { case BRW_REGISTER_TYPE_UD: format(file, "0x%08xUD", gen8_src1_imm_ud(inst)); break; case BRW_REGISTER_TYPE_D: format(file, "%dD", (int) gen8_src1_imm_d(inst)); break; case BRW_REGISTER_TYPE_UW: format(file, "0x%04xUW", (uint16_t) gen8_src1_imm_ud(inst)); break; case BRW_REGISTER_TYPE_W: format(file, "%dW", (int16_t) gen8_src1_imm_d(inst)); break; case BRW_REGISTER_TYPE_UB: format(file, "0x%02xUB", (int8_t) gen8_src1_imm_ud(inst)); break; case BRW_REGISTER_TYPE_VF: format(file, "Vector Float"); break; case BRW_REGISTER_TYPE_V: format(file, "0x%08xV", gen8_src1_imm_ud(inst)); break; case BRW_REGISTER_TYPE_F: format(file, "%-gF", gen8_src1_imm_f(inst)); } return 0; } static int src0(FILE *file, struct gen8_instruction *inst) { if (gen8_src0_reg_file(inst) == BRW_IMMEDIATE_VALUE) return imm(file, gen8_src0_reg_type(inst), inst); if (gen8_access_mode(inst) == BRW_ALIGN_1) { assert(gen8_src0_address_mode(inst) == BRW_ADDRESS_DIRECT); return src_da1(file, gen8_src0_reg_type(inst), gen8_src0_reg_file(inst), gen8_src0_vert_stride(inst), gen8_src0_da1_width(inst), gen8_src0_da1_hstride(inst), gen8_src0_da_reg_nr(inst), gen8_src0_da1_subreg_nr(inst), gen8_src0_abs(inst), gen8_src0_negate(inst)); } else { assert(gen8_src0_address_mode(inst) == BRW_ADDRESS_DIRECT); return src_da16(file, gen8_src0_reg_type(inst), gen8_src0_reg_file(inst), gen8_src0_vert_stride(inst), gen8_src0_da_reg_nr(inst), gen8_src0_da16_subreg_nr(inst), gen8_src0_abs(inst), gen8_src0_negate(inst), gen8_src0_da16_swiz_x(inst), gen8_src0_da16_swiz_y(inst), gen8_src0_da16_swiz_z(inst), gen8_src0_da16_swiz_w(inst)); } } static int src1(FILE *file, struct gen8_instruction *inst) { if (gen8_src1_reg_file(inst) == BRW_IMMEDIATE_VALUE) return imm(file, gen8_src1_reg_type(inst), inst); if (gen8_access_mode(inst) == BRW_ALIGN_1) { assert(gen8_src1_address_mode(inst) == BRW_ADDRESS_DIRECT); return src_da1(file, gen8_src1_reg_type(inst), gen8_src1_reg_file(inst), gen8_src1_vert_stride(inst), gen8_src1_da1_width(inst), gen8_src1_da1_hstride(inst), gen8_src1_da_reg_nr(inst), gen8_src1_da1_subreg_nr(inst), gen8_src1_abs(inst), gen8_src1_negate(inst)); } else { assert(gen8_src1_address_mode(inst) == BRW_ADDRESS_DIRECT); return src_da16(file, gen8_src1_reg_type(inst), gen8_src1_reg_file(inst), gen8_src1_vert_stride(inst), gen8_src1_da_reg_nr(inst), gen8_src1_da16_subreg_nr(inst), gen8_src1_abs(inst), gen8_src1_negate(inst), gen8_src1_da16_swiz_x(inst), gen8_src1_da16_swiz_y(inst), gen8_src1_da16_swiz_z(inst), gen8_src1_da16_swiz_w(inst)); } } static int esize[6] = { 1, 2, 4, 8, 16, 32 }; static int qtr_ctrl(FILE *file, struct gen8_instruction *inst) { int qtr_ctl = gen8_qtr_control(inst); int exec_size = esize[gen8_exec_size(inst)]; if (exec_size == 8) { switch (qtr_ctl) { case 0: string(file, " 1Q"); break; case 1: string(file, " 2Q"); break; case 2: string(file, " 3Q"); break; case 3: string(file, " 4Q"); break; } } else if (exec_size == 16) { if (qtr_ctl < 2) string(file, " 1H"); else string(file, " 2H"); } return 0; } int gen8_disassemble(FILE *file, struct gen8_instruction *insn, int gen) { int err = 0; int space = 0; const int opcode = gen8_opcode(insn); if (gen8_pred_control(insn)) { string(file, "("); err |= control(file, "predicate inverse", m_pred_inv, gen8_pred_inv(insn), NULL); format(file, "f%d", gen8_flag_reg_nr(insn)); if (gen8_flag_subreg_nr(insn)) format(file, ".%d", gen8_flag_subreg_nr(insn)); if (gen8_access_mode(insn) == BRW_ALIGN_1) { err |= control(file, "predicate control align1", m_pred_ctrl_align1, gen8_pred_control(insn), NULL); } else { err |= control(file, "predicate control align16", m_pred_ctrl_align16, gen8_pred_control(insn), NULL); } string(file, ") "); } err |= print_opcode(file, opcode); err |= control(file, "saturate", m_saturate, gen8_saturate(insn), NULL); err |= control(file, "debug control", m_debug_ctrl, gen8_debug_control(insn), NULL); if (opcode == BRW_OPCODE_MATH) { string(file, " "); err |= control(file, "function", m_math_function, gen8_math_function(insn), NULL); } else if (opcode != BRW_OPCODE_SEND && opcode != BRW_OPCODE_SENDC) { err |= control(file, "conditional modifier", m_conditional_modifier, gen8_cond_modifier(insn), NULL); /* If we're using the conditional modifier, print the flag reg used. */ if (gen8_cond_modifier(insn) && opcode != BRW_OPCODE_SEL) { format(file, ".f%d", gen8_flag_reg_nr(insn)); if (gen8_flag_subreg_nr(insn)) format(file, ".%d", gen8_flag_subreg_nr(insn)); } } if (opcode != BRW_OPCODE_NOP) { string(file, "("); err |= control(file, "execution size", m_exec_size, gen8_exec_size(insn), NULL); string(file, ")"); } if (m_opcode[opcode].nsrc == 3) { string(file, "XXX: 3-src"); #if 0 pad(file, 16); err |= dest_3src(file, this); pad(file, 32); err |= src0_3src(file, this); pad(file, 48); err |= src1_3src(file, this); pad(file, 64); err |= src2_3src(file, this); #endif } else { if (m_opcode[opcode].ndst > 0) { pad(file, 16); err |= dest(file, insn); } else if (opcode == BRW_OPCODE_ENDIF) { format(file, " %d", gen8_jip(insn)); } else if (opcode == BRW_OPCODE_IF || opcode == BRW_OPCODE_ELSE || opcode == BRW_OPCODE_WHILE || opcode == BRW_OPCODE_BREAK || opcode == BRW_OPCODE_CONTINUE || opcode == BRW_OPCODE_HALT) { format(file, " %d %d", gen8_jip(insn), gen8_uip(insn)); } if (m_opcode[opcode].nsrc > 0) { pad(file, 32); err |= src0(file, insn); } if (m_opcode[opcode].nsrc > 1) { pad(file, 48); err |= src1(file, insn); } } if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC) { const int sfid = gen8_sfid(insn); newline(file); pad(file, 16); space = 0; err |= control(file, "SFID", m_sfid, sfid, &space); switch (sfid) { case BRW_SFID_SAMPLER: format(file, " (%d, %d, %d, %d)", gen8_binding_table_index(insn), gen8_sampler(insn), gen8_sampler_msg_type(insn), gen8_sampler_simd_mode(insn)); break; case BRW_SFID_URB: space = 1; err |= control(file, "urb opcode", m_urb_opcode, gen8_urb_opcode(insn), &space); err |= control(file, "urb interleave", m_urb_interleave, gen8_urb_interleave(insn), &space); format(file, " %d %d", gen8_urb_global_offset(insn), gen8_urb_per_slot_offset(insn)); break; case GEN6_SFID_DATAPORT_SAMPLER_CACHE: case GEN6_SFID_DATAPORT_RENDER_CACHE: case GEN6_SFID_DATAPORT_CONSTANT_CACHE: case GEN7_SFID_DATAPORT_DATA_CACHE: format(file, " (%d, 0x%x)", gen8_binding_table_index(insn), gen8_function_control(insn)); break; default: format(file, "unsupported shared function ID (%d)", sfid); break; } if (space) string(file, " "); format(file, "mlen %d", gen8_mlen(insn)); format(file, " rlen %d", gen8_rlen(insn)); } pad(file, 64); if (opcode != BRW_OPCODE_NOP) { string(file, "{"); space = 1; err |= control(file, "access mode", m_access_mode, gen8_access_mode(insn), &space); err |= control(file, "mask control", m_maskctrl, gen8_mask_control(insn), &space); err |= control(file, "dependency control", m_dep_ctrl, gen8_dep_control(insn), &space); err |= qtr_ctrl(file, insn); err |= control(file, "thread control", m_thread_ctrl, gen8_thread_control(insn), &space); err |= control(file, "acc write control", m_accwr, gen8_acc_wr_control(insn), &space); if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC) err |= control(file, "end of thread", m_eot, gen8_eot(insn), &space); if (space) string(file, " "); string(file, "}"); } string(file, ";"); newline(file); return err; } intel-gpu-tools-1.14/assembler/Makefile.in0000644000175000017500000010062412665336443015463 00000000000000# Makefile.in generated by automake 1.15 from Makefile.am. # @configure_input@ # Copyright (C) 1994-2014 Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or without modifications, as long as this notice is preserved. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY, to the extent permitted by law; without # even the implied warranty of MERCHANTABILITY or FITNESS FOR A # PARTICULAR PURPOSE. @SET_MAKE@ VPATH = @srcdir@ am__is_gnu_make = { \ if test -z '$(MAKELEVEL)'; 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intel-gpu-tools-1.14/assembler/test/not.expected0000644000175000017500000000006712665336131016712 00000000000000 { 0x00000004, 0x20000021, 0x00000020, 0x00000000 }, intel-gpu-tools-1.14/assembler/test/cont.g4a0000644000175000017500000000044312665336131015725 00000000000000/* The cont instruction syntax, which is currently just what was in the BNF, * is bad. It really needs 2 arguments -- pop count (19:16, how many * loops to break out of), and the IP count (15:0). For now, this argument * should cover 1 loop, and jumping 2 instructions. */ cont 65538; intel-gpu-tools-1.14/assembler/test/else.g4a0000644000175000017500000000001012665336131015700 00000000000000else 2; intel-gpu-tools-1.14/assembler/test/rndu.g4a0000644000175000017500000000005012665336131015724 00000000000000rndu (1) g0<1>UD g1<0,1,0>F { align1 }; intel-gpu-tools-1.14/assembler/test/wait.expected0000644000175000017500000000006712665336131017056 00000000000000 { 0x00000030, 0x20000000, 0x00001200, 0x00010000 }, intel-gpu-tools-1.14/assembler/test/frc.expected0000644000175000017500000000006712665336131016664 00000000000000 { 0x00000001, 0x20000021, 0x00000020, 0x00000000 }, intel-gpu-tools-1.14/assembler/test/if.g4a0000644000175000017500000000000612665336131015353 00000000000000if 2; intel-gpu-tools-1.14/assembler/test/immediate.expected0000644000175000017500000000024512665336131020046 00000000000000 { 0x00000001, 0x20000061, 0x00000000, 0xffffffff }, { 0x00000001, 0x200000e1, 0x00000000, 0x7fffffff }, { 0x00000001, 0x200000e1, 0x00000000, 0x80000000 }, intel-gpu-tools-1.14/assembler/test/rnde.expected0000644000175000017500000000006712665336131017042 00000000000000 { 0x00000046, 0x200003a1, 0x00000020, 0x00000000 }, intel-gpu-tools-1.14/assembler/test/mov.expected0000644000175000017500000000006712665336131016713 00000000000000 { 0x00000001, 0x20000021, 0x00000020, 0x00000000 }, intel-gpu-tools-1.14/assembler/test/rnde-intsrc.expected0000644000175000017500000000006712665336131020342 00000000000000 { 0x00000046, 0x20000021, 0x00000020, 0x00000000 }, intel-gpu-tools-1.14/assembler/test/declare.g4a0000644000175000017500000000035412665336131016362 00000000000000.declare X1 Base=g99.0 ElementSize=1 SrcRegion=<8,8,1> DstRegion=<1> Type=F .declare X1 Base=g123.4 ElementSize=4 SrcRegion=<8,8,1> DstRegion=<1> Type=F add g0<1>:f X1 1.23:f; add g0<1>:f X1 g1<8,8,1>:f; add X1 g0<8,8,1>:f g1<8,8,1>:f; intel-gpu-tools-1.14/assembler/test/rndz.expected0000644000175000017500000000006712665336131017067 00000000000000 { 0x00000047, 0x200003a1, 0x00000020, 0x00000000 }, intel-gpu-tools-1.14/assembler/test/lzd.expected0000644000175000017500000000006712665336131016703 00000000000000 { 0x0000004a, 0x20000021, 0x00000020, 0x00000000 }, intel-gpu-tools-1.14/assembler/test/rnde-intsrc.g4a0000644000175000017500000000016712665336131017215 00000000000000/* Non-float types are not permitted in the sources of round instructions. */ rnde (1) g0<1>UD g1<0,1,0>UD { align1 }; intel-gpu-tools-1.14/assembler/test/endif.g4a0000644000175000017500000000000712665336131016043 00000000000000endif; intel-gpu-tools-1.14/assembler/test/lzd.g4a0000644000175000017500000000005012665336131015545 00000000000000lzd (1) g0<1>UD g1<0,1,0>UD { align1 }; intel-gpu-tools-1.14/assembler/test/break.expected0000644000175000017500000000006712665336131017176 00000000000000 { 0x00000028, 0x34001c00, 0x00011400, 0x00010002 }, intel-gpu-tools-1.14/assembler/test/wait.g4a0000644000175000017500000000001112665336131015715 00000000000000wait n0; intel-gpu-tools-1.14/assembler/test/Makefile.am0000644000175000017500000000265512665336131016430 00000000000000check_SCRIPTS = run-test.sh TESTS_ENVIRONMENT = top_builddir=${top_builddir} TESTS = \ mov \ frc \ rndd \ rndu \ rnde \ rnde-intsrc \ rndz \ lzd \ not \ immediate # Tests that are expected to fail because they contain some inccorect code. XFAIL_TESTS = # Those tests were already failing when the assembler was imported from # the intel-gen4asm git repository: # http://cgit.freedesktop.org/xorg/app/intel-gen4asm/ # We disable them "for now" as a workaround to be able to release i-g-t disabled_tests = \ declare \ jmpi \ if \ iff \ while \ else \ break \ cont \ halt \ wait \ endif disabled_xfail_tests = \ rnde-intsrc TESTDATA = \ mov.expected \ mov.g4a \ frc.expected \ frc.g4a \ rndd.expected \ rndd.g4a \ rndu.expected \ rndu.g4a \ rnde.expected \ rnde.g4a \ rnde-intsrc.expected \ rnde-intsrc.g4a \ rndz.expected \ rndz.g4a \ lzd.expected \ lzd.g4a \ not.expected \ not.g4a \ jmpi.expected \ jmpi.g4a \ if.expected \ if.g4a \ iff.expected \ iff.g4a \ while.expected \ while.g4a \ else.expected \ else.g4a \ break.expected \ break.g4a \ cont.expected \ cont.g4a \ halt.expected \ halt.g4a \ wait.expected \ wait.g4a \ endif.expected \ endif.g4a \ declare.expected \ declare.g4a \ immediate.g4a \ immediate.expected EXTRA_DIST = \ ${TESTDATA} \ run-test.sh $(TESTS): run-test.sh sed "s|TEST|$@|g" ${srcdir}/run-test.sh > $@ chmod +x $@ CLEANFILES = \ *.out \ ${TESTS} intel-gpu-tools-1.14/assembler/test/halt.expected0000644000175000017500000000006712665336131017042 00000000000000 { 0x0000002a, 0x34001c00, 0x00011400, 0x00000002 }, intel-gpu-tools-1.14/assembler/test/while.g4a0000644000175000017500000000001212665336131016062 00000000000000while -2; intel-gpu-tools-1.14/assembler/test/frc.g4a0000644000175000017500000000005012665336131015526 00000000000000mov (1) g0<1>UD g1<0,1,0>UD { align1 }; intel-gpu-tools-1.14/assembler/test/endif.expected0000644000175000017500000000006712665336131017177 00000000000000 { 0x00000025, 0x00001c00, 0x00000000, 0x00010000 }, intel-gpu-tools-1.14/assembler/test/break.g4a0000644000175000017500000000044512665336131016050 00000000000000/* The break instruction syntax, which is currently just what was in the BNF, * is bad. It really needs 2 arguments -- pop count (19:16, how many * loops to break out of), and the IP count (15:0). For now, this argument * should cover 1 loop, and jumping 2 instructions. */ break 65538; intel-gpu-tools-1.14/assembler/test/else.expected0000644000175000017500000000006712665336131017042 00000000000000 { 0x00000024, 0x34001c00, 0x00011400, 0x00010002 }, intel-gpu-tools-1.14/assembler/test/rndd.g4a0000644000175000017500000000005012665336131015703 00000000000000rndd (1) g0<1>UD g1<0,1,0>F { align1 }; intel-gpu-tools-1.14/assembler/test/declare.expected0000644000175000017500000000024512665336131017507 00000000000000 { 0x00e00040, 0x20007fbd, 0x008d0f64, 0x3f9d70a4 }, { 0x00e00040, 0x200077bd, 0x008d0f64, 0x008d0020 }, { 0x00e00040, 0x2f6477bd, 0x008d0000, 0x008d0020 }, intel-gpu-tools-1.14/assembler/test/if.expected0000644000175000017500000000006712665336131016510 00000000000000 { 0x00000022, 0x34001c00, 0x00011400, 0x00000002 }, intel-gpu-tools-1.14/assembler/test/run-test.sh0000644000175000017500000000044312665336131016502 00000000000000#!/bin/sh SRCDIR=${srcdir-`pwd`} BUILDDIR=${top_builddir-`pwd`} ${BUILDDIR}/assembler/intel-gen4asm -o TEST.out $SRCDIR/TEST.g4a if cmp TEST.out ${SRCDIR}/TEST.expected 2> /dev/null; then : ; else echo "Output comparison for TEST" diff -u ${SRCDIR}/TEST.expected TEST.out exit 1; fi intel-gpu-tools-1.14/assembler/test/rndd.expected0000644000175000017500000000006712665336131017041 00000000000000 { 0x00000045, 0x200003a1, 0x00000020, 0x00000000 }, intel-gpu-tools-1.14/assembler/test/cont.expected0000644000175000017500000000006712665336131017055 00000000000000 { 0x00000029, 0x34001c00, 0x00011400, 0x00010002 }, intel-gpu-tools-1.14/assembler/test/iff.expected0000644000175000017500000000006712665336131016656 00000000000000 { 0x00000023, 0x34001c00, 0x00011400, 0x00000002 }, intel-gpu-tools-1.14/assembler/test/rndu.expected0000644000175000017500000000006712665336131017062 00000000000000 { 0x00000044, 0x200003a1, 0x00000020, 0x00000000 }, intel-gpu-tools-1.14/assembler/test/rndz.g4a0000644000175000017500000000005012665336131015731 00000000000000rndz (1) g0<1>UD g1<0,1,0>F { align1 }; intel-gpu-tools-1.14/assembler/test/jmpi.g4a0000644000175000017500000000001012665336131015707 00000000000000jmpi 2; intel-gpu-tools-1.14/assembler/test/mov.g4a0000644000175000017500000000005012665336131015555 00000000000000mov (1) g0<1>UD g1<0,1,0>UD { align1 }; intel-gpu-tools-1.14/assembler/test/iff.g4a0000644000175000017500000000000712665336131015522 00000000000000iff 2; intel-gpu-tools-1.14/assembler/test/immediate.g4a0000644000175000017500000000017212665336131016717 00000000000000mov (1) g0<1>UD 4294967295UD { align1 }; mov (1) g0<1>UD 2147483647D { align1 }; mov (1) g0<1>UD -2147483648D { align1 }; intel-gpu-tools-1.14/assembler/gram.y0000644000175000017500000031462312665336131014536 00000000000000%{ /* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Eric Anholt * */ #include #include #include #include #include #include #include "gen4asm.h" #include "brw_eu.h" #include "gen8_instruction.h" #define DEFAULT_EXECSIZE (ffs(program_defaults.execute_size) - 1) #define DEFAULT_DSTREGION -1 #define SWIZZLE(reg) (reg.dw1.bits.swizzle) #define GEN(i) (&(i)->insn.gen) #define GEN8(i) (&(i)->insn.gen8) #define YYLTYPE YYLTYPE typedef struct YYLTYPE { int first_line; int first_column; int last_line; int last_column; } YYLTYPE; extern int need_export; static struct src_operand src_null_reg = { .reg.file = BRW_ARCHITECTURE_REGISTER_FILE, .reg.nr = BRW_ARF_NULL, .reg.type = BRW_REGISTER_TYPE_UD, }; static struct brw_reg dst_null_reg = { .file = BRW_ARCHITECTURE_REGISTER_FILE, .nr = BRW_ARF_NULL, }; static struct brw_reg ip_dst = { .file = BRW_ARCHITECTURE_REGISTER_FILE, .nr = BRW_ARF_IP, .type = BRW_REGISTER_TYPE_UD, .address_mode = BRW_ADDRESS_DIRECT, .hstride = 1, .dw1.bits.writemask = BRW_WRITEMASK_XYZW, }; static struct src_operand ip_src = { .reg.file = BRW_ARCHITECTURE_REGISTER_FILE, .reg.nr = BRW_ARF_IP, .reg.type = BRW_REGISTER_TYPE_UD, .reg.address_mode = BRW_ADDRESS_DIRECT, .reg.dw1.bits.swizzle = BRW_SWIZZLE_NOOP, }; static int get_type_size(unsigned type); static void set_instruction_opcode(struct brw_program_instruction *instr, unsigned opcode); static int set_instruction_dest(struct brw_program_instruction *instr, struct brw_reg *dest); static int set_instruction_src0(struct brw_program_instruction *instr, struct src_operand *src, YYLTYPE *location); static int set_instruction_src1(struct brw_program_instruction *instr, struct src_operand *src, YYLTYPE *location); static int set_instruction_dest_three_src(struct brw_program_instruction *instr, struct brw_reg *dest); static int set_instruction_src0_three_src(struct brw_program_instruction *instr, struct src_operand *src); static int set_instruction_src1_three_src(struct brw_program_instruction *instr, struct src_operand *src); static int set_instruction_src2_three_src(struct brw_program_instruction *instr, struct src_operand *src); static void set_instruction_saturate(struct brw_program_instruction *instr, int saturate); static void set_instruction_options(struct brw_program_instruction *instr, struct options options); static void set_instruction_predicate(struct brw_program_instruction *instr, struct predicate *p); static void set_instruction_pred_cond(struct brw_program_instruction *instr, struct predicate *p, struct condition *c, YYLTYPE *location); static void set_direct_dst_operand(struct brw_reg *dst, struct brw_reg *reg, int type); static void set_direct_src_operand(struct src_operand *src, struct brw_reg *reg, int type); void set_branch_two_offsets(struct brw_program_instruction *insn, int jip_offset, int uip_offset); void set_branch_one_offset(struct brw_program_instruction *insn, int jip_offset); enum message_level { WARN, ERROR, }; static void message(enum message_level level, YYLTYPE *location, const char *fmt, ...) { static const char *level_str[] = { "warning", "error" }; va_list args; if (location) fprintf(stderr, "%s:%d:%d: %s: ", input_filename, location->first_line, location->first_column, level_str[level]); else fprintf(stderr, "%s:%s: ", input_filename, level_str[level]); va_start(args, fmt); vfprintf(stderr, fmt, args); va_end(args); } #define warn(flag, l, fmt, ...) \ do { \ if (warning_flags & WARN_ ## flag) \ message(WARN, l, fmt, ## __VA_ARGS__); \ } while(0) #define error(l, fmt, ...) \ do { \ message(ERROR, l, fmt, ## __VA_ARGS__); \ } while(0) /* like strcmp, but handles NULL pointers */ static bool strcmp0(const char *s1, const char* s2) { if (!s1) return -(s1 != s2); if (!s2) return s1 != s2; return strcmp (s1, s2); } static bool region_equal(struct region *r1, struct region *r2) { return memcmp(r1, r2, sizeof(struct region)) == 0; } static bool reg_equal(struct brw_reg *r1, struct brw_reg *r2) { return memcmp(r1, r2, sizeof(struct brw_reg)) == 0; } static bool declared_register_equal(struct declared_register *r1, struct declared_register *r2) { if (strcmp0(r1->name, r2->name) != 0) return false; if (!reg_equal(&r1->reg, &r2->reg)) return false; if (!region_equal(&r1->src_region, &r2->src_region)) return false; if (r1->element_size != r2->element_size || r1->dst_region != r2->dst_region) return false; return true; } static void brw_program_init(struct brw_program *p) { memset(p, 0, sizeof(struct brw_program)); } static void brw_program_append_entry(struct brw_program *p, struct brw_program_instruction *entry) { entry->next = NULL; if (p->last) p->last->next = entry; else p->first = entry; p->last = entry; } static void brw_program_add_instruction(struct brw_program *p, struct brw_program_instruction *instruction) { struct brw_program_instruction *list_entry; list_entry = calloc(sizeof(struct brw_program_instruction), 1); list_entry->type = GEN4ASM_INSTRUCTION_GEN; list_entry->insn.gen = instruction->insn.gen; brw_program_append_entry(p, list_entry); } static void brw_program_add_relocatable(struct brw_program *p, struct brw_program_instruction *instruction) { struct brw_program_instruction *list_entry; list_entry = calloc(sizeof(struct brw_program_instruction), 1); list_entry->type = GEN4ASM_INSTRUCTION_GEN_RELOCATABLE; list_entry->insn.gen = instruction->insn.gen; list_entry->reloc = instruction->reloc; brw_program_append_entry(p, list_entry); } static void brw_program_add_label(struct brw_program *p, const char *label) { struct brw_program_instruction *list_entry; list_entry = calloc(sizeof(struct brw_program_instruction), 1); list_entry->type = GEN4ASM_INSTRUCTION_LABEL; list_entry->insn.label.name = strdup(label); brw_program_append_entry(p, list_entry); } static int resolve_dst_region(struct declared_register *reference, int region) { int resolved = region; if (resolved == DEFAULT_DSTREGION) { if (reference) resolved = reference->dst_region; else resolved = 1; } assert(resolved == 1 || resolved == 2 || resolved == 3); return resolved; } static inline int access_mode(struct brw_program_instruction *insn) { if (IS_GENp(8)) return gen8_access_mode(GEN8(insn)); else return GEN(insn)->header.access_mode; } static inline int exec_size(struct brw_program_instruction *insn) { if (IS_GENp(8)) return gen8_exec_size(GEN8(insn)); else return GEN(insn)->header.execution_size; } static void set_execsize(struct brw_program_instruction *insn, int execsize) { if (IS_GENp(8)) gen8_set_exec_size(GEN8(insn), execsize); else GEN(insn)->header.execution_size = execsize; } static bool validate_dst_reg(struct brw_program_instruction *insn, struct brw_reg *reg) { if (reg->address_mode == BRW_ADDRESS_DIRECT && access_mode(insn) == BRW_ALIGN_1 && reg->dw1.bits.writemask != 0 && reg->dw1.bits.writemask != BRW_WRITEMASK_XYZW) { fprintf(stderr, "error: write mask set in align1 instruction\n"); return false; } if (reg->address_mode == BRW_ADDRESS_REGISTER_INDIRECT_REGISTER && access_mode(insn) == BRW_ALIGN_16) { fprintf(stderr, "error: indirect Dst addr mode in align16 instruction\n"); return false; } return true; } static bool validate_src_reg(struct brw_program_instruction *insn, struct brw_reg reg, YYLTYPE *location) { int hstride_for_reg[] = {0, 1, 2, 4}; int vstride_for_reg[] = {0, 1, 2, 4, 8, 16, 32, 64, 128, 256}; int width_for_reg[] = {1, 2, 4, 8, 16}; int execsize_for_reg[] = {1, 2, 4, 8, 16, 32}; int width, hstride, vstride, execsize; if (reg.file == BRW_IMMEDIATE_VALUE) return true; if (access_mode(insn) == BRW_ALIGN_1 && SWIZZLE(reg) && SWIZZLE(reg) != BRW_SWIZZLE_NOOP) { error(location, "swizzle bits set in align1 instruction\n"); return false; } if (reg.address_mode == BRW_ADDRESS_REGISTER_INDIRECT_REGISTER && access_mode(insn) == BRW_ALIGN_16) { fprintf(stderr, "error: indirect Source addr mode in align16 instruction\n"); return false; } assert(reg.hstride >= 0 && reg.hstride < ARRAY_SIZE(hstride_for_reg)); hstride = hstride_for_reg[reg.hstride]; if (reg.vstride == 0xf) { vstride = -1; } else { assert(reg.vstride >= 0 && reg.vstride < ARRAY_SIZE(vstride_for_reg)); vstride = vstride_for_reg[reg.vstride]; } assert(reg.width >= 0 && reg.width < ARRAY_SIZE(width_for_reg)); width = width_for_reg[reg.width]; assert(exec_size(insn) >= 0 && exec_size(insn) < ARRAY_SIZE(execsize_for_reg)); execsize = execsize_for_reg[exec_size(insn)]; /* Register Region Restrictions */ /* B. If ExecSize = Width and HorzStride ≠ 0, VertStride must be set to * Width * HorzStride. */ if (execsize == width && hstride != 0) { if (vstride != -1 && vstride != width * hstride) warn(ALL, location, "execution size == width and hstride != 0 but " "vstride is not width * hstride\n"); } /* D. If Width = 1, HorzStride must be 0 regardless of the values of * ExecSize and VertStride. * * FIXME: In "advanced mode" hstride is set to 1, this is probably a bug * to fix, but it changes the generated opcodes and thus needs validation. */ if (width == 1 && hstride != 0) warn(ALL, location, "region width is 1 but horizontal stride is %d " " (should be 0)\n", hstride); /* E. If ExecSize = Width = 1, both VertStride and HorzStride must be 0. * This defines a scalar. */ if (execsize == 1 && width == 1) { if (hstride != 0) warn(ALL, location, "execution size and region width are 1 but " "horizontal stride is %d (should be 0)\n", hstride); if (vstride != 0) warn(ALL, location, "execution size and region width are 1 but " "vertical stride is %d (should be 0)\n", vstride); } return true; } static int get_subreg_address(unsigned regfile, unsigned type, unsigned subreg, unsigned address_mode) { int unit_size = 1; assert(address_mode == BRW_ADDRESS_DIRECT); assert(regfile != BRW_IMMEDIATE_VALUE); if (advanced_flag) unit_size = get_type_size(type); return subreg * unit_size; } /* only used in indirect address mode. * input: sub-register number of an address register * output: the value of AddrSubRegNum in the instruction binary code * * input output(advanced_flag==0) output(advanced_flag==1) * a0.0 0 0 * a0.1 invalid input 1 * a0.2 1 2 * a0.3 invalid input 3 * a0.4 2 4 * a0.5 invalid input 5 * a0.6 3 6 * a0.7 invalid input 7 * a0.8 4 invalid input * a0.10 5 invalid input * a0.12 6 invalid input * a0.14 7 invalid input */ static int get_indirect_subreg_address(unsigned subreg) { return advanced_flag == 0 ? subreg / 2 : subreg; } static void resolve_subnr(struct brw_reg *reg) { if (reg->file == BRW_IMMEDIATE_VALUE) return; if (reg->address_mode == BRW_ADDRESS_DIRECT) reg->subnr = get_subreg_address(reg->file, reg->type, reg->subnr, reg->address_mode); else reg->subnr = get_indirect_subreg_address(reg->subnr); } %} %locations %start ROOT %union { char *string; int integer; double number; struct brw_program_instruction instruction; struct brw_program program; struct region region; struct regtype regtype; struct brw_reg reg; struct condition condition; struct predicate predicate; struct options options; struct declared_register symbol_reg; imm32_t imm32; struct src_operand src_operand; } %token COLON %token SEMICOLON %token LPAREN RPAREN %token LANGLE RANGLE %token LCURLY RCURLY %token LSQUARE RSQUARE %token COMMA EQ %token ABS DOT %token PLUS MINUS MULTIPLY DIVIDE %token TYPE_UD TYPE_D TYPE_UW TYPE_W TYPE_UB TYPE_B %token TYPE_VF TYPE_HF TYPE_V TYPE_F %token ALIGN1 ALIGN16 SECHALF COMPR SWITCH ATOMIC NODDCHK NODDCLR %token MASK_DISABLE BREAKPOINT ACCWRCTRL EOT %token SEQ ANY2H ALL2H ANY4H ALL4H ANY8H ALL8H ANY16H ALL16H ANYV ALLV %token ZERO EQUAL NOT_ZERO NOT_EQUAL GREATER GREATER_EQUAL LESS LESS_EQUAL %token ROUND_INCREMENT OVERFLOW UNORDERED %token GENREG MSGREG ADDRESSREG ACCREG FLAGREG %token MASKREG AMASK IMASK LMASK CMASK %token MASKSTACKREG LMS IMS MASKSTACKDEPTHREG IMSD LMSD %token NOTIFYREG STATEREG CONTROLREG IPREG %token GENREGFILE MSGREGFILE %token MOV FRC RNDU RNDD RNDE RNDZ NOT LZD %token MUL MAC MACH LINE SAD2 SADA2 DP4 DPH DP3 DP2 %token AVG ADD SEL AND OR XOR SHR SHL ASR CMP CMPN PLN %token ADDC BFI1 BFREV CBIT F16TO32 F32TO16 FBH FBL %token SEND SENDC NOP JMPI IF IFF WHILE ELSE BREAK CONT HALT MSAVE %token PUSH MREST POP WAIT DO ENDIF ILLEGAL %token MATH_INST %token MAD LRP BFE BFI2 SUBB %token CALL RET %token BRD BRC %token NULL_TOKEN MATH SAMPLER GATEWAY READ WRITE URB THREAD_SPAWNER VME DATA_PORT CRE %token MSGLEN RETURNLEN %token ALLOCATE USED COMPLETE TRANSPOSE INTERLEAVE %token SATURATE %token INTEGER %token STRING %token NUMBER %token INV LOG EXP SQRT RSQ POW SIN COS SINCOS INTDIV INTMOD %token INTDIVMOD %token SIGNED SCALAR %token X Y Z W %token KERNEL_PRAGMA END_KERNEL_PRAGMA CODE_PRAGMA END_CODE_PRAGMA %token REG_COUNT_PAYLOAD_PRAGMA REG_COUNT_TOTAL_PRAGMA DECLARE_PRAGMA %token BASE ELEMENTSIZE SRCREGION DSTREGION TYPE %token DEFAULT_EXEC_SIZE_PRAGMA DEFAULT_REG_TYPE_PRAGMA %nonassoc SUBREGNUM %nonassoc SNDOPR %left PLUS MINUS %left MULTIPLY DIVIDE %right UMINUS %nonassoc DOT %nonassoc STR_SYMBOL_REG %nonassoc EMPTEXECSIZE %nonassoc LPAREN %type exp sndopr %type simple_int %type instruction unaryinstruction binaryinstruction %type binaryaccinstruction trinaryinstruction sendinstruction %type syncinstruction %type msgtarget %type mathinstruction %type nopinstruction %type relocatableinstruction breakinstruction %type ifelseinstruction loopinstruction haltinstruction %type multibranchinstruction subroutineinstruction jumpinstruction %type label %type instrseq %type instoption %type unaryop binaryop binaryaccop breakop %type trinaryop %type sendop %type conditionalmodifier %type predicate %type instoptions instoption_list %type condition saturate negate abs chansel %type writemask_x writemask_y writemask_z writemask_w %type srcimmtype execsize dstregion immaddroffset %type subregnum sampler_datatype %type urb_swizzle urb_allocate urb_used urb_complete %type math_function math_signed math_scalar %type predctrl predstate %type region region_wh indirectregion declare_srcregion; %type regtype %type directgenreg directmsgreg addrreg accreg flagreg maskreg %type maskstackreg notifyreg /* %type maskstackdepthreg */ %type statereg controlreg ipreg nullreg %type dstoperandex_typed srcarchoperandex_typed %type sendleadreg %type indirectgenreg indirectmsgreg addrparam %type mask_subreg maskstack_subreg %type declare_elementsize declare_dstregion declare_type /* %type maskstackdepth_subreg */ %type symbol_reg symbol_reg_p; %type imm32 %type dst dstoperand dstoperandex dstreg post_dst writemask %type declare_base %type directsrcoperand srcarchoperandex directsrcaccoperand %type indirectsrcoperand %type src srcimm imm32reg payload srcacc srcaccimm swizzle %type relativelocation relativelocation2 %code { #undef error #define error(l, fmt, ...) \ do { \ message(ERROR, l, fmt, ## __VA_ARGS__); \ YYERROR; \ } while(0) static void add_option(struct options *options, int option) { switch (option) { case ALIGN1: options->access_mode = BRW_ALIGN_1; break; case ALIGN16: options->access_mode = BRW_ALIGN_16; break; case SECHALF: options->compression_control |= BRW_COMPRESSION_2NDHALF; break; case COMPR: if (!IS_GENp(6)) options->compression_control |= BRW_COMPRESSION_COMPRESSED; break; case SWITCH: options->thread_control |= BRW_THREAD_SWITCH; break; case ATOMIC: options->thread_control |= BRW_THREAD_ATOMIC; break; case NODDCHK: options->dependency_control |= BRW_DEPENDENCY_NOTCHECKED; break; case NODDCLR: options->dependency_control |= BRW_DEPENDENCY_NOTCLEARED; break; case MASK_DISABLE: options->mask_control = BRW_MASK_DISABLE; break; case BREAKPOINT: options->debug_control = BRW_DEBUG_BREAKPOINT; break; case ACCWRCTRL: options->acc_wr_control = BRW_ACCUMULATOR_WRITE_ENABLE; break; case EOT: options->end_of_thread = 1; break; } } } %% simple_int: INTEGER { $$ = $1; } | MINUS INTEGER { $$ = -$2;} ; exp: INTEGER { $$ = $1; } | exp PLUS exp { $$ = $1 + $3; } | exp MINUS exp { $$ = $1 - $3; } | exp MULTIPLY exp { $$ = $1 * $3; } | exp DIVIDE exp { if ($3) $$ = $1 / $3; else YYERROR;} | MINUS exp %prec UMINUS { $$ = -$2;} | LPAREN exp RPAREN { $$ = $2; } ; ROOT: instrseq { compiled_program = $1; } ; label: STRING COLON ; declare_base: BASE EQ dstreg { $$ = $3; } ; declare_elementsize: ELEMENTSIZE EQ exp { $$ = $3; } ; declare_srcregion: /* empty */ { /* XXX is this default correct?*/ memset (&$$, '\0', sizeof ($$)); $$.vert_stride = ffs(0); $$.width = BRW_WIDTH_1; $$.horiz_stride = ffs(0); } | SRCREGION EQ region { $$ = $3; } ; declare_dstregion: /* empty */ { $$ = 1; } | DSTREGION EQ dstregion { $$ = $3; } ; declare_type: TYPE EQ regtype { $$ = $3.type; } ; declare_pragma: DECLARE_PRAGMA STRING declare_base declare_elementsize declare_srcregion declare_dstregion declare_type { struct declared_register reg, *found, *new_reg; reg.name = $2; reg.reg = $3; reg.element_size = $4; reg.src_region = $5; reg.dst_region = $6; reg.reg.type = $7; found = find_register($2); if (found) { if (!declared_register_equal(®, found)) error(&@1, "%s already defined and definitions " "don't agree\n", $2); free($2); // $2 has been malloc'ed by strdup } else { new_reg = malloc(sizeof(struct declared_register)); *new_reg = reg; insert_register(new_reg); } } ; reg_count_total_pragma: REG_COUNT_TOTAL_PRAGMA exp ; reg_count_payload_pragma: REG_COUNT_PAYLOAD_PRAGMA exp ; default_exec_size_pragma: DEFAULT_EXEC_SIZE_PRAGMA exp { program_defaults.execute_size = $2; } ; default_reg_type_pragma: DEFAULT_REG_TYPE_PRAGMA regtype { program_defaults.register_type = $2.type; } ; pragma: reg_count_total_pragma |reg_count_payload_pragma |default_exec_size_pragma |default_reg_type_pragma |declare_pragma ; instrseq: instrseq pragma { $$ = $1; } | instrseq instruction SEMICOLON { brw_program_add_instruction(&$1, &$2); $$ = $1; } | instruction SEMICOLON { brw_program_init(&$$); brw_program_add_instruction(&$$, &$1); } | instrseq relocatableinstruction SEMICOLON { brw_program_add_relocatable(&$1, &$2); $$ = $1; } | relocatableinstruction SEMICOLON { brw_program_init(&$$); brw_program_add_relocatable(&$$, &$1); } | instrseq SEMICOLON { $$ = $1; } | instrseq label { brw_program_add_label(&$1, $2); $$ = $1; } | label { brw_program_init(&$$); brw_program_add_label(&$$, $1); } | pragma { $$.first = NULL; $$.last = NULL; } | instrseq error SEMICOLON { $$ = $1; } ; /* 1.4.1: Instruction groups */ // binaryinstruction: Source operands cannot be accumulators // binaryaccinstruction: Source operands can be accumulators instruction: unaryinstruction | binaryinstruction | binaryaccinstruction | trinaryinstruction | sendinstruction | syncinstruction | mathinstruction | nopinstruction ; /* relocatableinstruction are instructions that needs a relocation pass */ relocatableinstruction: ifelseinstruction | loopinstruction | haltinstruction | multibranchinstruction | subroutineinstruction | jumpinstruction | breakinstruction ; ifelseinstruction: ENDIF { // for Gen4 if(IS_GENp(6)) // For gen6+. error(&@1, "should be 'ENDIF execsize relativelocation'\n"); memset(&$$, 0, sizeof($$)); set_instruction_opcode(&$$, $1); GEN(&$$)->header.thread_control |= BRW_THREAD_SWITCH; GEN(&$$)->bits1.da1.dest_horiz_stride = 1; GEN(&$$)->bits1.da1.src1_reg_file = BRW_ARCHITECTURE_REGISTER_FILE; GEN(&$$)->bits1.da1.src1_reg_type = BRW_REGISTER_TYPE_UD; } | ENDIF execsize relativelocation instoptions { // for Gen6+ /* Gen6, Gen7 bspec: predication is prohibited */ if(!IS_GENp(6)) // for gen6- error(&@1, "ENDIF Syntax error: should be 'ENDIF'\n"); memset(&$$, 0, sizeof($$)); set_instruction_opcode(&$$, $1); set_execsize(&$$, $2); $$.reloc.first_reloc_target = $3.reloc_target; $$.reloc.first_reloc_offset = $3.imm32; } | ELSE execsize relativelocation instoptions { if(!IS_GENp(6)) { // for Gen4, Gen5. gen_level < 60 /* Set the istack pop count, which must always be 1. */ $3.imm32 |= (1 << 16); memset(&$$, 0, sizeof($$)); set_instruction_opcode(&$$, $1); GEN(&$$)->header.thread_control |= BRW_THREAD_SWITCH; ip_dst.width = $2; set_instruction_dest(&$$, &ip_dst); set_instruction_src0(&$$, &ip_src, NULL); set_instruction_src1(&$$, &$3, NULL); $$.reloc.first_reloc_target = $3.reloc_target; $$.reloc.first_reloc_offset = $3.imm32; } else if(IS_GENp(6)) { memset(&$$, 0, sizeof($$)); set_instruction_opcode(&$$, $1); set_execsize(&$$, $2); $$.reloc.first_reloc_target = $3.reloc_target; $$.reloc.first_reloc_offset = $3.imm32; } else { error(&@1, "'ELSE' instruction is not implemented.\n"); } } | predicate IF execsize relativelocation { /* The branch instructions require that the IP register * be the destination and first source operand, while the * offset is the second source operand. The offset is added * to the pre-incremented IP. */ if(IS_GENp(7)) /* Error in Gen7+. */ error(&@2, "IF should be 'IF execsize JIP UIP'\n"); memset(&$$, 0, sizeof($$)); set_instruction_predicate(&$$, &$1); set_instruction_opcode(&$$, $2); if(!IS_GENp(6)) { GEN(&$$)->header.thread_control |= BRW_THREAD_SWITCH; ip_dst.width = $3; set_instruction_dest(&$$, &ip_dst); set_instruction_src0(&$$, &ip_src, NULL); set_instruction_src1(&$$, &$4, NULL); } $$.reloc.first_reloc_target = $4.reloc_target; $$.reloc.first_reloc_offset = $4.imm32; } | predicate IF execsize relativelocation relativelocation { /* for Gen7+ */ if(!IS_GENp(7)) error(&@2, "IF should be 'IF execsize relativelocation'\n"); memset(&$$, 0, sizeof($$)); set_instruction_predicate(&$$, &$1); set_instruction_opcode(&$$, $2); set_execsize(&$$, $3); $$.reloc.first_reloc_target = $4.reloc_target; $$.reloc.first_reloc_offset = $4.imm32; $$.reloc.second_reloc_target = $5.reloc_target; $$.reloc.second_reloc_offset = $5.imm32; } ; loopinstruction: predicate WHILE execsize relativelocation instoptions { if(!IS_GENp(6)) { /* The branch instructions require that the IP register * be the destination and first source operand, while the * offset is the second source operand. The offset is added * to the pre-incremented IP. */ ip_dst.width = $3; set_instruction_dest(&$$, &ip_dst); memset(&$$, 0, sizeof($$)); set_instruction_predicate(&$$, &$1); set_instruction_opcode(&$$, $2); GEN(&$$)->header.thread_control |= BRW_THREAD_SWITCH; set_instruction_src0(&$$, &ip_src, NULL); set_instruction_src1(&$$, &$4, NULL); $$.reloc.first_reloc_target = $4.reloc_target; $$.reloc.first_reloc_offset = $4.imm32; } else if (IS_GENp(6)) { /* Gen6 spec: dest must have the same element size as src0. dest horizontal stride must be 1. */ memset(&$$, 0, sizeof($$)); set_instruction_predicate(&$$, &$1); set_instruction_opcode(&$$, $2); set_execsize(&$$, $3); $$.reloc.first_reloc_target = $4.reloc_target; $$.reloc.first_reloc_offset = $4.imm32; } else { error(&@2, "'WHILE' instruction is not implemented!\n"); } } | DO { // deprecated memset(&$$, 0, sizeof($$)); set_instruction_opcode(&$$, $1); }; haltinstruction: predicate HALT execsize relativelocation relativelocation instoptions { // for Gen6, Gen7 /* Gen6, Gen7 bspec: dst and src0 must be the null reg. */ memset(&$$, 0, sizeof($$)); set_instruction_predicate(&$$, &$1); set_instruction_opcode(&$$, $2); $$.reloc.first_reloc_target = $4.reloc_target; $$.reloc.first_reloc_offset = $4.imm32; $$.reloc.second_reloc_target = $5.reloc_target; $$.reloc.second_reloc_offset = $5.imm32; dst_null_reg.width = $3; set_instruction_dest(&$$, &dst_null_reg); set_instruction_src0(&$$, &src_null_reg, NULL); }; multibranchinstruction: predicate BRD execsize relativelocation instoptions { /* Gen7 bspec: dest must be null. use Switch option */ memset(&$$, 0, sizeof($$)); set_instruction_predicate(&$$, &$1); set_instruction_opcode(&$$, $2); if (IS_GENp(8)) gen8_set_thread_control(GEN8(&$$), gen8_thread_control(GEN8(&$$)) | BRW_THREAD_SWITCH); else GEN(&$$)->header.thread_control |= BRW_THREAD_SWITCH; $$.reloc.first_reloc_target = $4.reloc_target; $$.reloc.first_reloc_offset = $4.imm32; dst_null_reg.width = $3; set_instruction_dest(&$$, &dst_null_reg); } | predicate BRC execsize relativelocation relativelocation instoptions { /* Gen7 bspec: dest must be null. src0 must be null. use Switch option */ memset(&$$, 0, sizeof($$)); set_instruction_predicate(&$$, &$1); set_instruction_opcode(&$$, $2); if (IS_GENp(8)) gen8_set_thread_control(GEN8(&$$), gen8_thread_control(GEN8(&$$)) | BRW_THREAD_SWITCH); else GEN(&$$)->header.thread_control |= BRW_THREAD_SWITCH; $$.reloc.first_reloc_target = $4.reloc_target; $$.reloc.first_reloc_offset = $4.imm32; $$.reloc.second_reloc_target = $5.reloc_target; $$.reloc.second_reloc_offset = $5.imm32; dst_null_reg.width = $3; set_instruction_dest(&$$, &dst_null_reg); set_instruction_src0(&$$, &src_null_reg, NULL); } ; subroutineinstruction: predicate CALL execsize dst relativelocation instoptions { /* Gen6 bspec: source, dest type should be DWORD. dest must be QWord aligned. source0 region control must be <2,2,1>. execution size must be 2. QtrCtrl is prohibited. JIP is an immediate operand, must be of type W. Gen7 bspec: source, dest type should be DWORD. dest must be QWord aligned. source0 region control must be <2,2,1>. execution size must be 2. */ memset(&$$, 0, sizeof($$)); set_instruction_predicate(&$$, &$1); set_instruction_opcode(&$$, $2); $4.type = BRW_REGISTER_TYPE_D; /* dest type should be DWORD */ $4.width = BRW_WIDTH_2; /* execution size must be 2. */ set_instruction_dest(&$$, &$4); struct src_operand src0; memset(&src0, 0, sizeof(src0)); src0.reg.type = BRW_REGISTER_TYPE_D; /* source type should be DWORD */ /* source0 region control must be <2,2,1>. */ src0.reg.hstride = 1; /*encoded 1*/ src0.reg.width = BRW_WIDTH_2; src0.reg.vstride = 2; /*encoded 2*/ set_instruction_src0(&$$, &src0, NULL); $$.reloc.first_reloc_target = $5.reloc_target; $$.reloc.first_reloc_offset = $5.imm32; } | predicate RET execsize dstoperandex src instoptions { /* Gen6, 7: source cannot be accumulator. dest must be null. src0 region control must be <2,2,1> (not specified clearly. should be same as CALL) */ memset(&$$, 0, sizeof($$)); set_instruction_predicate(&$$, &$1); set_instruction_opcode(&$$, $2); dst_null_reg.width = BRW_WIDTH_2; /* execution size of RET should be 2 */ set_instruction_dest(&$$, &dst_null_reg); $5.reg.type = BRW_REGISTER_TYPE_D; $5.reg.hstride = 1; /*encoded 1*/ $5.reg.width = BRW_WIDTH_2; $5.reg.vstride = 2; /*encoded 2*/ set_instruction_src0(&$$, &$5, NULL); } ; unaryinstruction: predicate unaryop conditionalmodifier saturate execsize dst srcaccimm instoptions { memset(&$$, 0, sizeof($$)); set_instruction_opcode(&$$, $2); set_instruction_saturate(&$$, $4); $6.width = $5; set_instruction_options(&$$, $8); set_instruction_pred_cond(&$$, &$1, &$3, &@3); if (set_instruction_dest(&$$, &$6) != 0) YYERROR; if (set_instruction_src0(&$$, &$7, &@7) != 0) YYERROR; if (!IS_GENp(6) && get_type_size(GEN(&$$)->bits1.da1.dest_reg_type) * (1 << $6.width) == 64) GEN(&$$)->header.compression_control = BRW_COMPRESSION_COMPRESSED; } ; unaryop: MOV | FRC | RNDU | RNDD | RNDE | RNDZ | NOT | LZD | BFREV | CBIT | F16TO32 | F32TO16 | FBH | FBL ; // Source operands cannot be accumulators binaryinstruction: predicate binaryop conditionalmodifier saturate execsize dst src srcimm instoptions { memset(&$$, 0, sizeof($$)); set_instruction_opcode(&$$, $2); set_instruction_saturate(&$$, $4); set_instruction_options(&$$, $9); set_instruction_pred_cond(&$$, &$1, &$3, &@3); $6.width = $5; if (set_instruction_dest(&$$, &$6) != 0) YYERROR; if (set_instruction_src0(&$$, &$7, &@7) != 0) YYERROR; if (set_instruction_src1(&$$, &$8, &@8) != 0) YYERROR; if (!IS_GENp(6) && get_type_size(GEN(&$$)->bits1.da1.dest_reg_type) * (1 << $6.width) == 64) GEN(&$$)->header.compression_control = BRW_COMPRESSION_COMPRESSED; } ; /* bspec: BFI1 should not access accumulator. */ binaryop: MUL | MAC | MACH | LINE | SAD2 | SADA2 | DP4 | DPH | DP3 | DP2 | PLN | BFI1 ; // Source operands can be accumulators binaryaccinstruction: predicate binaryaccop conditionalmodifier saturate execsize dst srcacc srcimm instoptions { memset(&$$, 0, sizeof($$)); set_instruction_opcode(&$$, $2); set_instruction_saturate(&$$, $4); $6.width = $5; set_instruction_options(&$$, $9); set_instruction_pred_cond(&$$, &$1, &$3, &@3); if (set_instruction_dest(&$$, &$6) != 0) YYERROR; if (set_instruction_src0(&$$, &$7, &@7) != 0) YYERROR; if (set_instruction_src1(&$$, &$8, &@8) != 0) YYERROR; if (!IS_GENp(6) && get_type_size(GEN(&$$)->bits1.da1.dest_reg_type) * (1 << $6.width) == 64) GEN(&$$)->header.compression_control = BRW_COMPRESSION_COMPRESSED; } ; /* TODO: bspec says ADDC/SUBB/CMP/CMPN/SHL/BFI1 cannot use accumulator as dest. */ binaryaccop: AVG | ADD | SEL | AND | OR | XOR | SHR | SHL | ASR | CMP | CMPN | ADDC | SUBB ; trinaryop: MAD | LRP | BFE | BFI2 ; trinaryinstruction: predicate trinaryop conditionalmodifier saturate execsize dst src src src instoptions { memset(&$$, 0, sizeof($$)); set_instruction_pred_cond(&$$, &$1, &$3, &@3); set_instruction_opcode(&$$, $2); set_instruction_saturate(&$$, $4); $6.width = $5; if (set_instruction_dest_three_src(&$$, &$6)) YYERROR; if (set_instruction_src0_three_src(&$$, &$7)) YYERROR; if (set_instruction_src1_three_src(&$$, &$8)) YYERROR; if (set_instruction_src2_three_src(&$$, &$9)) YYERROR; set_instruction_options(&$$, $10); } ; sendop: SEND | SENDC ; sendinstruction: predicate sendop execsize exp post_dst payload msgtarget MSGLEN exp RETURNLEN exp instoptions { /* Send instructions are messy. The first argument is the * post destination -- the grf register that the response * starts from. The second argument is the current * destination, which is the start of the message arguments * to the shared function, and where src0 payload is loaded * to if not null. The payload is typically based on the * grf 0 thread payload of your current thread, and is * implicitly loaded if non-null. */ memset(&$$, 0, sizeof($$)); set_instruction_opcode(&$$, $2); $5.width = $3; GEN(&$$)->header.destreg__conditionalmod = $4; /* msg reg index */ set_instruction_predicate(&$$, &$1); if (set_instruction_dest(&$$, &$5) != 0) YYERROR; if (IS_GENp(6)) { struct src_operand src0; memset(&src0, 0, sizeof(src0)); src0.reg.address_mode = BRW_ADDRESS_DIRECT; if (IS_GENp(7)) src0.reg.file = BRW_GENERAL_REGISTER_FILE; else src0.reg.file = BRW_MESSAGE_REGISTER_FILE; src0.reg.type = BRW_REGISTER_TYPE_D; src0.reg.nr = $4; src0.reg.subnr = 0; set_instruction_src0(&$$, &src0, NULL); } else { if (set_instruction_src0(&$$, &$6, &@6) != 0) YYERROR; } if (IS_GENp(9)) { gen8_set_src1_reg_file(GEN8(&$$), BRW_IMMEDIATE_VALUE); gen8_set_src1_reg_type(GEN8(&$$), BRW_REGISTER_TYPE_D); gen9_set_send_extdesc(GEN8(&$$), 0); } else if (IS_GENp(8)) { gen8_set_src1_reg_file(GEN8(&$$), BRW_IMMEDIATE_VALUE); gen8_set_src1_reg_type(GEN8(&$$), BRW_REGISTER_TYPE_D); } else { GEN(&$$)->bits1.da1.src1_reg_file = BRW_IMMEDIATE_VALUE; GEN(&$$)->bits1.da1.src1_reg_type = BRW_REGISTER_TYPE_D; } if (IS_GENp(8)) { GEN8(&$$)->data[3] = GEN8(&$7)->data[3]; gen8_set_sfid(GEN8(&$$), gen8_sfid(GEN8(&$7))); gen8_set_mlen(GEN8(&$$), $9); gen8_set_rlen(GEN8(&$$), $11); gen8_set_eot(GEN8(&$$), $12.end_of_thread); } else if (IS_GENp(5)) { if (IS_GENp(6)) { GEN(&$$)->header.destreg__conditionalmod = GEN(&$7)->bits2.send_gen5.sfid; } else { GEN(&$$)->header.destreg__conditionalmod = $4; /* msg reg index */ GEN(&$$)->bits2.send_gen5.sfid = GEN(&$7)->bits2.send_gen5.sfid; GEN(&$$)->bits2.send_gen5.end_of_thread = $12.end_of_thread; } GEN(&$$)->bits3.generic_gen5 = GEN(&$7)->bits3.generic_gen5; GEN(&$$)->bits3.generic_gen5.msg_length = $9; GEN(&$$)->bits3.generic_gen5.response_length = $11; GEN(&$$)->bits3.generic_gen5.end_of_thread = $12.end_of_thread; } else { GEN(&$$)->header.destreg__conditionalmod = $4; /* msg reg index */ GEN(&$$)->bits3.generic = GEN(&$7)->bits3.generic; GEN(&$$)->bits3.generic.msg_length = $9; GEN(&$$)->bits3.generic.response_length = $11; GEN(&$$)->bits3.generic.end_of_thread = $12.end_of_thread; } } | predicate sendop execsize dst sendleadreg payload directsrcoperand instoptions { if (IS_GENp(6)) error(&@2, "invalid syntax for send on gen6+\n"); memset(&$$, 0, sizeof($$)); set_instruction_opcode(&$$, $2); GEN(&$$)->header.destreg__conditionalmod = $5.nr; /* msg reg index */ set_instruction_predicate(&$$, &$1); $4.width = $3; if (set_instruction_dest(&$$, &$4) != 0) YYERROR; if (set_instruction_src0(&$$, &$6, &@6) != 0) YYERROR; /* XXX is this correct? */ if (set_instruction_src1(&$$, &$7, &@7) != 0) YYERROR; } | predicate sendop execsize dst sendleadreg payload imm32reg instoptions { if (IS_GENp(6)) error(&@2, "invalid syntax for send on gen6+\n"); if ($7.reg.type != BRW_REGISTER_TYPE_UD && $7.reg.type != BRW_REGISTER_TYPE_D && $7.reg.type != BRW_REGISTER_TYPE_V) { error (&@7, "non-int D/UD/V representation: %d," "type=%d\n", $7.reg.dw1.ud, $7.reg.type); } memset(&$$, 0, sizeof($$)); set_instruction_opcode(&$$, $2); GEN(&$$)->header.destreg__conditionalmod = $5.nr; /* msg reg index */ set_instruction_predicate(&$$, &$1); $4.width = $3; if (set_instruction_dest(&$$, &$4) != 0) YYERROR; if (set_instruction_src0(&$$, &$6, &@6) != 0) YYERROR; if (set_instruction_src1(&$$, &$7, &@7) != 0) YYERROR; } | predicate sendop execsize dst sendleadreg sndopr imm32reg instoptions { struct src_operand src0; if (!IS_GENp(6)) error(&@2, "invalid syntax for send on gen6+\n"); if ($7.reg.type != BRW_REGISTER_TYPE_UD && $7.reg.type != BRW_REGISTER_TYPE_D && $7.reg.type != BRW_REGISTER_TYPE_V) { error(&@7,"non-int D/UD/V representation: %d," "type=%d\n", $7.reg.dw1.ud, $7.reg.type); } memset(&$$, 0, sizeof($$)); set_instruction_opcode(&$$, $2); set_instruction_predicate(&$$, &$1); $4.width = $3; if (set_instruction_dest(&$$, &$4) != 0) YYERROR; memset(&src0, 0, sizeof(src0)); src0.reg.address_mode = BRW_ADDRESS_DIRECT; if (IS_GENp(7)) { src0.reg.file = BRW_GENERAL_REGISTER_FILE; src0.reg.type = BRW_REGISTER_TYPE_UB; } else { src0.reg.file = BRW_MESSAGE_REGISTER_FILE; src0.reg.type = BRW_REGISTER_TYPE_D; } src0.reg.nr = $5.nr; src0.reg.subnr = 0; set_instruction_src0(&$$, &src0, NULL); set_instruction_src1(&$$, &$7, NULL); if (IS_GENp(9)) { gen8_set_sfid(GEN8(&$$), $6 & EX_DESC_SFID_MASK); gen8_set_eot(GEN8(&$$), !!($6 & EX_DESC_EOT_MASK)); gen9_set_send_extdesc(GEN8(&$$), $6 & EX_DESC_FUNC_MASK); } else if (IS_GENp(8)) { gen8_set_sfid(GEN8(&$$), $6 & EX_DESC_SFID_MASK); gen8_set_eot(GEN8(&$$), !!($6 & EX_DESC_EOT_MASK)); } else { GEN(&$$)->header.destreg__conditionalmod = ($6 & EX_DESC_SFID_MASK); /* SFID */ GEN(&$$)->bits3.generic_gen5.end_of_thread = !!($6 & EX_DESC_EOT_MASK); } } | predicate sendop execsize dst sendleadreg sndopr directsrcoperand instoptions { struct src_operand src0; if (!IS_GENp(6)) error(&@2, "invalid syntax for send on gen6+\n"); if ($7.reg.file != BRW_ARCHITECTURE_REGISTER_FILE || ($7.reg.nr & 0xF0) != BRW_ARF_ADDRESS || ($7.reg.nr & 0x0F) != 0 || $7.reg.subnr != 0) { error (&@7, "scalar register must be a0.0<0;1,0>:ud\n"); } memset(&$$, 0, sizeof($$)); set_instruction_opcode(&$$, $2); set_instruction_predicate(&$$, &$1); $4.width = $3; if (set_instruction_dest(&$$, &$4) != 0) YYERROR; memset(&src0, 0, sizeof(src0)); src0.reg.address_mode = BRW_ADDRESS_DIRECT; if (IS_GENp(7)) { src0.reg.file = BRW_GENERAL_REGISTER_FILE; src0.reg.type = BRW_REGISTER_TYPE_UB; } else { src0.reg.file = BRW_MESSAGE_REGISTER_FILE; src0.reg.type = BRW_REGISTER_TYPE_D; } src0.reg.nr = $5.nr; src0.reg.subnr = 0; set_instruction_src0(&$$, &src0, NULL); set_instruction_src1(&$$, &$7, &@7); if (IS_GENp(8)) { gen8_set_sfid(GEN8(&$$), $6 & EX_DESC_SFID_MASK); gen8_set_eot(GEN8(&$$), !!($6 & EX_DESC_EOT_MASK)); gen9_set_send_extdesc(GEN8(&$$), $6 & EX_DESC_FUNC_MASK); } else if (IS_GENp(8)) { gen8_set_sfid(GEN8(&$$), $6 & EX_DESC_SFID_MASK); gen8_set_eot(GEN8(&$$), !!($6 & EX_DESC_EOT_MASK)); } else { GEN(&$$)->header.destreg__conditionalmod = ($6 & EX_DESC_SFID_MASK); /* SFID */ GEN(&$$)->bits3.generic_gen5.end_of_thread = !!($6 & EX_DESC_EOT_MASK); } } | predicate sendop execsize dst sendleadreg payload sndopr imm32reg instoptions { if (IS_GENp(6)) error(&@2, "invalid syntax for send on gen6+\n"); if ($8.reg.type != BRW_REGISTER_TYPE_UD && $8.reg.type != BRW_REGISTER_TYPE_D && $8.reg.type != BRW_REGISTER_TYPE_V) { error(&@8, "non-int D/UD/V representation: %d," "type=%d\n", $8.reg.dw1.ud, $8.reg.type); } memset(&$$, 0, sizeof($$)); set_instruction_opcode(&$$, $2); GEN(&$$)->header.destreg__conditionalmod = $5.nr; /* msg reg index */ set_instruction_predicate(&$$, &$1); $4.width = $3; if (set_instruction_dest(&$$, &$4) != 0) YYERROR; if (set_instruction_src0(&$$, &$6, &@6) != 0) YYERROR; if (set_instruction_src1(&$$, &$8, &@8) != 0) YYERROR; if (IS_GENx(5)) { GEN(&$$)->bits2.send_gen5.sfid = ($7 & EX_DESC_SFID_MASK); GEN(&$$)->bits3.generic_gen5.end_of_thread = !!($7 & EX_DESC_EOT_MASK); } } | predicate sendop execsize dst sendleadreg payload exp directsrcoperand instoptions { if (IS_GENp(6)) error(&@2, "invalid syntax for send on gen6+\n"); memset(&$$, 0, sizeof($$)); set_instruction_opcode(&$$, $2); GEN(&$$)->header.destreg__conditionalmod = $5.nr; /* msg reg index */ set_instruction_predicate(&$$, &$1); $4.width = $3; if (set_instruction_dest(&$$, &$4) != 0) YYERROR; if (set_instruction_src0(&$$, &$6, &@6) != 0) YYERROR; /* XXX is this correct? */ if (set_instruction_src1(&$$, &$8, &@8) != 0) YYERROR; if (IS_GENx(5)) { GEN(&$$)->bits2.send_gen5.sfid = $7; } } ; sndopr: exp %prec SNDOPR { $$ = $1; } ; jumpinstruction: predicate JMPI execsize relativelocation2 { /* The jump instruction requires that the IP register * be the destination and first source operand, while the * offset is the second source operand. The next instruction * is the post-incremented IP plus the offset. */ memset(&$$, 0, sizeof($$)); set_instruction_opcode(&$$, $2); if(advanced_flag) { if (IS_GENp(8)) gen8_set_mask_control(GEN8(&$$), BRW_MASK_DISABLE); else GEN(&$$)->header.mask_control = BRW_MASK_DISABLE; } set_instruction_predicate(&$$, &$1); ip_dst.width = BRW_WIDTH_1; set_instruction_dest(&$$, &ip_dst); set_instruction_src0(&$$, &ip_src, NULL); set_instruction_src1(&$$, &$4, NULL); $$.reloc.first_reloc_target = $4.reloc_target; $$.reloc.first_reloc_offset = $4.imm32; } ; mathinstruction: predicate MATH_INST execsize dst src srcimm math_function instoptions { memset(&$$, 0, sizeof($$)); set_instruction_opcode(&$$, $2); if (IS_GENp(8)) gen8_set_math_function(GEN8(&$$), $7); else GEN(&$$)->header.destreg__conditionalmod = $7; set_instruction_options(&$$, $8); set_instruction_predicate(&$$, &$1); $4.width = $3; if (set_instruction_dest(&$$, &$4) != 0) YYERROR; if (set_instruction_src0(&$$, &$5, &@5) != 0) YYERROR; if (set_instruction_src1(&$$, &$6, &@6) != 0) YYERROR; } ; breakinstruction: predicate breakop execsize relativelocation relativelocation instoptions { // for Gen6, Gen7 memset(&$$, 0, sizeof($$)); set_instruction_predicate(&$$, &$1); set_instruction_opcode(&$$, $2); set_execsize(&$$, $3); $$.reloc.first_reloc_target = $4.reloc_target; $$.reloc.first_reloc_offset = $4.imm32; $$.reloc.second_reloc_target = $5.reloc_target; $$.reloc.second_reloc_offset = $5.imm32; } ; breakop: BREAK | CONT ; /* maskpushop: MSAVE | PUSH ; */ syncinstruction: predicate WAIT notifyreg { struct brw_reg notify_dst; struct src_operand notify_src; memset(&$$, 0, sizeof($$)); set_instruction_opcode(&$$, $2); set_direct_dst_operand(¬ify_dst, &$3, BRW_REGISTER_TYPE_D); notify_dst.width = BRW_WIDTH_1; set_instruction_dest(&$$, ¬ify_dst); set_direct_src_operand(¬ify_src, &$3, BRW_REGISTER_TYPE_D); set_instruction_src0(&$$, ¬ify_src, NULL); set_instruction_src1(&$$, &src_null_reg, NULL); } ; nopinstruction: NOP { memset(&$$, 0, sizeof($$)); set_instruction_opcode(&$$, $1); }; /* XXX! */ payload: directsrcoperand ; post_dst: dst ; msgtarget: NULL_TOKEN { if (IS_GENp(8)) { gen8_set_sfid(GEN8(&$$), BRW_SFID_NULL); gen8_set_header_present(GEN8(&$$), 0); } else if (IS_GENp(5)) { GEN(&$$)->bits2.send_gen5.sfid= BRW_SFID_NULL; GEN(&$$)->bits3.generic_gen5.header_present = 0; /* ??? */ } else { GEN(&$$)->bits3.generic.msg_target = BRW_SFID_NULL; } } | SAMPLER LPAREN INTEGER COMMA INTEGER COMMA sampler_datatype RPAREN { if (IS_GENp(8)) { gen8_set_sfid(GEN8(&$$), BRW_SFID_SAMPLER); gen8_set_header_present(GEN8(&$$), 1); /* ??? */ gen8_set_binding_table_index(GEN8(&$$), $3); gen8_set_sampler(GEN8(&$$), $5); gen8_set_sampler_simd_mode(GEN8(&$$), 2); /* SIMD16 */ } else if (IS_GENp(7)) { GEN(&$$)->bits2.send_gen5.sfid = BRW_SFID_SAMPLER; GEN(&$$)->bits3.generic_gen5.header_present = 1; /* ??? */ GEN(&$$)->bits3.sampler_gen7.binding_table_index = $3; GEN(&$$)->bits3.sampler_gen7.sampler = $5; GEN(&$$)->bits3.sampler_gen7.simd_mode = 2; /* SIMD16, maybe we should add a new parameter */ } else if (IS_GENp(5)) { GEN(&$$)->bits2.send_gen5.sfid = BRW_SFID_SAMPLER; GEN(&$$)->bits3.generic_gen5.header_present = 1; /* ??? */ GEN(&$$)->bits3.sampler_gen5.binding_table_index = $3; GEN(&$$)->bits3.sampler_gen5.sampler = $5; GEN(&$$)->bits3.sampler_gen5.simd_mode = 2; /* SIMD16, maybe we should add a new parameter */ } else { GEN(&$$)->bits3.generic.msg_target = BRW_SFID_SAMPLER; GEN(&$$)->bits3.sampler.binding_table_index = $3; GEN(&$$)->bits3.sampler.sampler = $5; switch ($7) { case TYPE_F: GEN(&$$)->bits3.sampler.return_format = BRW_SAMPLER_RETURN_FORMAT_FLOAT32; break; case TYPE_UD: GEN(&$$)->bits3.sampler.return_format = BRW_SAMPLER_RETURN_FORMAT_UINT32; break; case TYPE_D: GEN(&$$)->bits3.sampler.return_format = BRW_SAMPLER_RETURN_FORMAT_SINT32; break; } } } | MATH math_function saturate math_signed math_scalar { if (IS_GENp(6)) { error (&@1, "Gen6+ doesn't have math function\n"); } else if (IS_GENx(5)) { GEN(&$$)->bits2.send_gen5.sfid = BRW_SFID_MATH; GEN(&$$)->bits3.generic_gen5.header_present = 0; GEN(&$$)->bits3.math_gen5.function = $2; set_instruction_saturate(&$$, $3); GEN(&$$)->bits3.math_gen5.int_type = $4; GEN(&$$)->bits3.math_gen5.precision = BRW_MATH_PRECISION_FULL; GEN(&$$)->bits3.math_gen5.data_type = $5; } else { GEN(&$$)->bits3.generic.msg_target = BRW_SFID_MATH; GEN(&$$)->bits3.math.function = $2; set_instruction_saturate(&$$, $3); GEN(&$$)->bits3.math.int_type = $4; GEN(&$$)->bits3.math.precision = BRW_MATH_PRECISION_FULL; GEN(&$$)->bits3.math.data_type = $5; } } | GATEWAY { if (IS_GENp(5)) { GEN(&$$)->bits2.send_gen5.sfid = BRW_SFID_MESSAGE_GATEWAY; GEN(&$$)->bits3.generic_gen5.header_present = 0; /* ??? */ } else { GEN(&$$)->bits3.generic.msg_target = BRW_SFID_MESSAGE_GATEWAY; } } | READ LPAREN INTEGER COMMA INTEGER COMMA INTEGER COMMA INTEGER RPAREN { if (IS_GENp(9)) { if ($5 != 0 && $5 != GEN6_SFID_DATAPORT_RENDER_CACHE && $5 != GEN7_SFID_DATAPORT_DATA_CACHE && $5 != HSW_SFID_DATAPORT_DATA_CACHE1 && $5 != SKL_SFID_DATAPORT_DCR0 && $5 != SKL_SFID_DATAPORT_DATA_CACHE2) { error (&@9, "error: wrong cache type\n"); } if ($5 == 0) gen8_set_sfid(GEN8(&$$), HSW_SFID_DATAPORT_DATA_CACHE1); else gen8_set_sfid(GEN8(&$$), $5); gen8_set_header_present(GEN8(&$$), 1); gen8_set_dp_binding_table_index(GEN8(&$$), $3); gen8_set_dp_message_control(GEN8(&$$), $7); gen8_set_dp_message_type(GEN8(&$$), $9); gen8_set_dp_category(GEN8(&$$), 0); } else if (IS_GENp(8)) { gen8_set_sfid(GEN8(&$$), GEN6_SFID_DATAPORT_SAMPLER_CACHE); gen8_set_header_present(GEN8(&$$), 1); gen8_set_dp_binding_table_index(GEN8(&$$), $3); gen8_set_dp_message_control(GEN8(&$$), $7); gen8_set_dp_message_type(GEN8(&$$), $9); gen8_set_dp_category(GEN8(&$$), 0); } else if (IS_GENx(7)) { GEN(&$$)->bits2.send_gen5.sfid = GEN6_SFID_DATAPORT_SAMPLER_CACHE; GEN(&$$)->bits3.generic_gen5.header_present = 1; GEN(&$$)->bits3.gen7_dp.binding_table_index = $3; GEN(&$$)->bits3.gen7_dp.msg_control = $7; GEN(&$$)->bits3.gen7_dp.msg_type = $9; } else if (IS_GENx(6)) { GEN(&$$)->bits2.send_gen5.sfid = GEN6_SFID_DATAPORT_SAMPLER_CACHE; GEN(&$$)->bits3.generic_gen5.header_present = 1; GEN(&$$)->bits3.gen6_dp_sampler_const_cache.binding_table_index = $3; GEN(&$$)->bits3.gen6_dp_sampler_const_cache.msg_control = $7; GEN(&$$)->bits3.gen6_dp_sampler_const_cache.msg_type = $9; } else if (IS_GENx(5)) { GEN(&$$)->bits2.send_gen5.sfid = BRW_SFID_DATAPORT_READ; GEN(&$$)->bits3.generic_gen5.header_present = 1; GEN(&$$)->bits3.dp_read_gen5.binding_table_index = $3; GEN(&$$)->bits3.dp_read_gen5.target_cache = $5; GEN(&$$)->bits3.dp_read_gen5.msg_control = $7; GEN(&$$)->bits3.dp_read_gen5.msg_type = $9; } else { GEN(&$$)->bits3.generic.msg_target = BRW_SFID_DATAPORT_READ; GEN(&$$)->bits3.dp_read.binding_table_index = $3; GEN(&$$)->bits3.dp_read.target_cache = $5; GEN(&$$)->bits3.dp_read.msg_control = $7; GEN(&$$)->bits3.dp_read.msg_type = $9; } } | WRITE LPAREN INTEGER COMMA INTEGER COMMA INTEGER COMMA INTEGER RPAREN { if (IS_GENp(8)) { if (IS_GENp(9)) { if ($9 != 0 && $9 != GEN6_SFID_DATAPORT_RENDER_CACHE && $9 != GEN7_SFID_DATAPORT_DATA_CACHE && $9 != HSW_SFID_DATAPORT_DATA_CACHE1 && $9 != SKL_SFID_DATAPORT_DATA_CACHE2) { error (&@9, "error: wrong cache type\n"); } } else { if ($9 != 0 && $9 != GEN6_SFID_DATAPORT_RENDER_CACHE && $9 != GEN7_SFID_DATAPORT_DATA_CACHE && $9 != HSW_SFID_DATAPORT_DATA_CACHE1) { error (&@9, "error: wrong cache type\n"); } } if ($9 == 0) gen8_set_sfid(GEN8(&$$), GEN6_SFID_DATAPORT_RENDER_CACHE); else gen8_set_sfid(GEN8(&$$), $9); gen8_set_header_present(GEN8(&$$), 1); gen8_set_dp_binding_table_index(GEN8(&$$), $3); gen8_set_dp_message_control(GEN8(&$$), $5); gen8_set_dp_message_type(GEN8(&$$), $7); gen8_set_dp_category(GEN8(&$$), 0); } else if (IS_GENx(7)) { GEN(&$$)->bits2.send_gen5.sfid = GEN6_SFID_DATAPORT_RENDER_CACHE; GEN(&$$)->bits3.generic_gen5.header_present = 1; GEN(&$$)->bits3.gen7_dp.binding_table_index = $3; GEN(&$$)->bits3.gen7_dp.msg_control = $5; GEN(&$$)->bits3.gen7_dp.msg_type = $7; } else if (IS_GENx(6)) { GEN(&$$)->bits2.send_gen5.sfid = GEN6_SFID_DATAPORT_RENDER_CACHE; /* Sandybridge supports headerlesss message for render target write. * Currently the GFX assembler doesn't support it. so the program must provide * message header */ GEN(&$$)->bits3.generic_gen5.header_present = 1; GEN(&$$)->bits3.gen6_dp.binding_table_index = $3; GEN(&$$)->bits3.gen6_dp.msg_control = $5; GEN(&$$)->bits3.gen6_dp.msg_type = $7; GEN(&$$)->bits3.gen6_dp.send_commit_msg = $9; } else if (IS_GENx(5)) { GEN(&$$)->bits2.send_gen5.sfid = BRW_SFID_DATAPORT_WRITE; GEN(&$$)->bits3.generic_gen5.header_present = 1; GEN(&$$)->bits3.dp_write_gen5.binding_table_index = $3; GEN(&$$)->bits3.dp_write_gen5.last_render_target = ($5 & 0x8) >> 3; GEN(&$$)->bits3.dp_write_gen5.msg_control = $5 & 0x7; GEN(&$$)->bits3.dp_write_gen5.msg_type = $7; GEN(&$$)->bits3.dp_write_gen5.send_commit_msg = $9; } else { GEN(&$$)->bits3.generic.msg_target = BRW_SFID_DATAPORT_WRITE; GEN(&$$)->bits3.dp_write.binding_table_index = $3; /* The msg control field of brw_struct.h is split into * msg control and last_render_target, even though * last_render_target isn't common to all write messages. */ GEN(&$$)->bits3.dp_write.last_render_target = ($5 & 0x8) >> 3; GEN(&$$)->bits3.dp_write.msg_control = $5 & 0x7; GEN(&$$)->bits3.dp_write.msg_type = $7; GEN(&$$)->bits3.dp_write.send_commit_msg = $9; } } | WRITE LPAREN INTEGER COMMA INTEGER COMMA INTEGER COMMA INTEGER COMMA INTEGER RPAREN { if (IS_GENp(8)) { if (IS_GENp(9)) { if ($9 != 0 && $9 != GEN6_SFID_DATAPORT_RENDER_CACHE && $9 != GEN7_SFID_DATAPORT_DATA_CACHE && $9 != HSW_SFID_DATAPORT_DATA_CACHE1 && $9 != SKL_SFID_DATAPORT_DATA_CACHE2) { error (&@9, "error: wrong cache type\n"); } } else { if ($9 != 0 && $9 != GEN6_SFID_DATAPORT_RENDER_CACHE && $9 != GEN7_SFID_DATAPORT_DATA_CACHE && $9 != HSW_SFID_DATAPORT_DATA_CACHE1) { error (&@9, "error: wrong cache type\n"); } } if ($9 == 0) gen8_set_sfid(GEN8(&$$), GEN6_SFID_DATAPORT_RENDER_CACHE); else gen8_set_sfid(GEN8(&$$), $9); gen8_set_header_present(GEN8(&$$), ($11 != 0)); gen8_set_dp_binding_table_index(GEN8(&$$), $3); gen8_set_dp_message_control(GEN8(&$$), $5); gen8_set_dp_message_type(GEN8(&$$), $7); gen8_set_dp_category(GEN8(&$$), 0); } else if (IS_GENx(7)) { GEN(&$$)->bits2.send_gen5.sfid = GEN6_SFID_DATAPORT_RENDER_CACHE; GEN(&$$)->bits3.generic_gen5.header_present = ($11 != 0); GEN(&$$)->bits3.gen7_dp.binding_table_index = $3; GEN(&$$)->bits3.gen7_dp.msg_control = $5; GEN(&$$)->bits3.gen7_dp.msg_type = $7; } else if (IS_GENx(6)) { GEN(&$$)->bits2.send_gen5.sfid = GEN6_SFID_DATAPORT_RENDER_CACHE; GEN(&$$)->bits3.generic_gen5.header_present = ($11 != 0); GEN(&$$)->bits3.gen6_dp.binding_table_index = $3; GEN(&$$)->bits3.gen6_dp.msg_control = $5; GEN(&$$)->bits3.gen6_dp.msg_type = $7; GEN(&$$)->bits3.gen6_dp.send_commit_msg = $9; } else if (IS_GENx(5)) { GEN(&$$)->bits2.send_gen5.sfid = BRW_SFID_DATAPORT_WRITE; GEN(&$$)->bits3.generic_gen5.header_present = ($11 != 0); GEN(&$$)->bits3.dp_write_gen5.binding_table_index = $3; GEN(&$$)->bits3.dp_write_gen5.last_render_target = ($5 & 0x8) >> 3; GEN(&$$)->bits3.dp_write_gen5.msg_control = $5 & 0x7; GEN(&$$)->bits3.dp_write_gen5.msg_type = $7; GEN(&$$)->bits3.dp_write_gen5.send_commit_msg = $9; } else { GEN(&$$)->bits3.generic.msg_target = BRW_SFID_DATAPORT_WRITE; GEN(&$$)->bits3.dp_write.binding_table_index = $3; /* The msg control field of brw_struct.h is split into * msg control and last_render_target, even though * last_render_target isn't common to all write messages. */ GEN(&$$)->bits3.dp_write.last_render_target = ($5 & 0x8) >> 3; GEN(&$$)->bits3.dp_write.msg_control = $5 & 0x7; GEN(&$$)->bits3.dp_write.msg_type = $7; GEN(&$$)->bits3.dp_write.send_commit_msg = $9; } } | URB INTEGER urb_swizzle urb_allocate urb_used urb_complete { GEN(&$$)->bits3.generic.msg_target = BRW_SFID_URB; if (IS_GENp(5)) { GEN(&$$)->bits2.send_gen5.sfid = BRW_SFID_URB; GEN(&$$)->bits3.generic_gen5.header_present = 1; set_instruction_opcode(&$$, BRW_URB_OPCODE_WRITE); GEN(&$$)->bits3.urb_gen5.offset = $2; GEN(&$$)->bits3.urb_gen5.swizzle_control = $3; GEN(&$$)->bits3.urb_gen5.pad = 0; GEN(&$$)->bits3.urb_gen5.allocate = $4; GEN(&$$)->bits3.urb_gen5.used = $5; GEN(&$$)->bits3.urb_gen5.complete = $6; } else { GEN(&$$)->bits3.generic.msg_target = BRW_SFID_URB; set_instruction_opcode(&$$, BRW_URB_OPCODE_WRITE); GEN(&$$)->bits3.urb.offset = $2; GEN(&$$)->bits3.urb.swizzle_control = $3; GEN(&$$)->bits3.urb.pad = 0; GEN(&$$)->bits3.urb.allocate = $4; GEN(&$$)->bits3.urb.used = $5; GEN(&$$)->bits3.urb.complete = $6; } } | THREAD_SPAWNER LPAREN INTEGER COMMA INTEGER COMMA INTEGER RPAREN { if (IS_GENp(8)) { gen8_set_sfid(GEN8(&$$), BRW_SFID_THREAD_SPAWNER); gen8_set_header_present(GEN8(&$$), 0); /* Must be 0 */ gen8_set_ts_opcode(GEN8(&$$), $3); gen8_set_ts_request_type(GEN8(&$$), $5); gen8_set_ts_resource_select(GEN8(&$$), $7); } else { GEN(&$$)->bits3.generic.msg_target = BRW_SFID_THREAD_SPAWNER; if (IS_GENp(5)) { GEN(&$$)->bits2.send_gen5.sfid = BRW_SFID_THREAD_SPAWNER; GEN(&$$)->bits3.generic_gen5.header_present = 0; GEN(&$$)->bits3.thread_spawner_gen5.opcode = $3; GEN(&$$)->bits3.thread_spawner_gen5.requester_type = $5; GEN(&$$)->bits3.thread_spawner_gen5.resource_select = $7; } else { GEN(&$$)->bits3.generic.msg_target = BRW_SFID_THREAD_SPAWNER; GEN(&$$)->bits3.thread_spawner.opcode = $3; GEN(&$$)->bits3.thread_spawner.requester_type = $5; GEN(&$$)->bits3.thread_spawner.resource_select = $7; } } } | VME LPAREN INTEGER COMMA INTEGER COMMA INTEGER COMMA INTEGER RPAREN { GEN(&$$)->bits3.generic.msg_target = GEN6_SFID_VME; if (IS_GENp(8)) { gen8_set_sfid(GEN8(&$$), GEN6_SFID_VME); gen8_set_header_present(GEN8(&$$), 1); /* Must be 1 */ gen8_set_vme_binding_table_index(GEN8(&$$), $3); gen8_set_vme_message_type(GEN8(&$$), $9); } else if (IS_GENp(6)) { GEN(&$$)->bits2.send_gen5.sfid = GEN6_SFID_VME; GEN(&$$)->bits3.vme_gen6.binding_table_index = $3; GEN(&$$)->bits3.vme_gen6.search_path_index = $5; GEN(&$$)->bits3.vme_gen6.lut_subindex = $7; GEN(&$$)->bits3.vme_gen6.message_type = $9; GEN(&$$)->bits3.generic_gen5.header_present = 1; } else { error (&@1, "Gen6- doesn't have vme function\n"); } } | CRE LPAREN INTEGER COMMA INTEGER RPAREN { if (IS_GENp(8)) { gen8_set_sfid(GEN8(&$$), HSW_SFID_CRE); gen8_set_header_present(GEN8(&$$), 1); /* Must be 1 */ gen8_set_cre_binding_table_index(GEN8(&$$), $3); gen8_set_cre_message_type(GEN8(&$$), $5); } else { if (gen_level < 75) error (&@1, "Below Gen7.5 doesn't have CRE function\n"); GEN(&$$)->bits3.generic.msg_target = HSW_SFID_CRE; GEN(&$$)->bits2.send_gen5.sfid = HSW_SFID_CRE; GEN(&$$)->bits3.cre_gen75.binding_table_index = $3; GEN(&$$)->bits3.cre_gen75.message_type = $5; GEN(&$$)->bits3.generic_gen5.header_present = 1; } } | DATA_PORT LPAREN INTEGER COMMA INTEGER COMMA INTEGER COMMA INTEGER COMMA INTEGER COMMA INTEGER RPAREN { if (IS_GENp(8)) { if ($3 != GEN6_SFID_DATAPORT_SAMPLER_CACHE && $3 != GEN6_SFID_DATAPORT_RENDER_CACHE && $3 != GEN6_SFID_DATAPORT_CONSTANT_CACHE && $3 != GEN7_SFID_DATAPORT_DATA_CACHE && $3 != HSW_SFID_DATAPORT_DATA_CACHE1) { error (&@3, "error: wrong cache type\n"); } gen8_set_sfid(GEN8(&$$), $3); gen8_set_header_present(GEN8(&$$), ($13 != 0)); gen8_set_dp_binding_table_index(GEN8(&$$), $9); gen8_set_dp_message_control(GEN8(&$$), $7); gen8_set_dp_message_type(GEN8(&$$), $5); gen8_set_dp_category(GEN8(&$$), $11); } else { GEN(&$$)->bits2.send_gen5.sfid = $3; GEN(&$$)->bits3.generic_gen5.header_present = ($13 != 0); if (IS_GENp(7)) { if ($3 != GEN6_SFID_DATAPORT_SAMPLER_CACHE && $3 != GEN6_SFID_DATAPORT_RENDER_CACHE && $3 != GEN6_SFID_DATAPORT_CONSTANT_CACHE && $3 != GEN7_SFID_DATAPORT_DATA_CACHE) { error (&@3, "error: wrong cache type\n"); } GEN(&$$)->bits3.gen7_dp.category = $11; GEN(&$$)->bits3.gen7_dp.binding_table_index = $9; GEN(&$$)->bits3.gen7_dp.msg_control = $7; GEN(&$$)->bits3.gen7_dp.msg_type = $5; } else if (IS_GENx(6)) { if ($3 != GEN6_SFID_DATAPORT_SAMPLER_CACHE && $3 != GEN6_SFID_DATAPORT_RENDER_CACHE && $3 != GEN6_SFID_DATAPORT_CONSTANT_CACHE) { error (&@3, "error: wrong cache type\n"); } GEN(&$$)->bits3.gen6_dp.send_commit_msg = $11; GEN(&$$)->bits3.gen6_dp.binding_table_index = $9; GEN(&$$)->bits3.gen6_dp.msg_control = $7; GEN(&$$)->bits3.gen6_dp.msg_type = $5; } else if (!IS_GENp(5)) { error (&@1, "Gen6- doesn't support data port for sampler/render/constant/data cache\n"); } } } ; urb_allocate: ALLOCATE { $$ = 1; } | /* empty */ { $$ = 0; } ; urb_used: USED { $$ = 1; } | /* empty */ { $$ = 0; } ; urb_complete: COMPLETE { $$ = 1; } | /* empty */ { $$ = 0; } ; urb_swizzle: TRANSPOSE { $$ = BRW_URB_SWIZZLE_TRANSPOSE; } | INTERLEAVE { $$ = BRW_URB_SWIZZLE_INTERLEAVE; } | /* empty */ { $$ = BRW_URB_SWIZZLE_NONE; } ; sampler_datatype: TYPE_F | TYPE_UD | TYPE_D ; math_function: INV | LOG | EXP | SQRT | POW | SIN | COS | SINCOS | INTDIV | INTMOD | INTDIVMOD ; math_signed: /* empty */ { $$ = 0; } | SIGNED { $$ = 1; } ; math_scalar: /* empty */ { $$ = 0; } | SCALAR { $$ = 1; } ; /* 1.4.2: Destination register */ dst: dstoperand | dstoperandex ; dstoperand: symbol_reg dstregion { $$ = $1.reg; $$.hstride = resolve_dst_region(&$1, $2); } | dstreg dstregion writemask regtype { /* Returns an instruction with just the destination register * filled in. */ $$ = $1; $$.hstride = resolve_dst_region(NULL, $2); $$.dw1.bits.writemask = $3.dw1.bits.writemask; $$.type = $4.type; } ; /* The dstoperandex returns an instruction with just the destination register * filled in. */ dstoperandex: dstoperandex_typed dstregion regtype { $$ = $1; $$.hstride = resolve_dst_region(NULL, $2); $$.type = $3.type; } | maskstackreg { $$ = $1; $$.hstride = 1; $$.type = BRW_REGISTER_TYPE_UW; } | controlreg { $$ = $1; $$.hstride = 1; $$.type = BRW_REGISTER_TYPE_UD; } | ipreg { $$ = $1; $$.hstride = 1; $$.type = BRW_REGISTER_TYPE_UD; } | nullreg dstregion regtype { $$ = $1; $$.hstride = resolve_dst_region(NULL, $2); $$.type = $3.type; } ; dstoperandex_typed: accreg | flagreg | addrreg | maskreg ; symbol_reg: STRING %prec STR_SYMBOL_REG { struct declared_register *dcl_reg = find_register($1); if (dcl_reg == NULL) error(&@1, "can't find register %s\n", $1); memcpy(&$$, dcl_reg, sizeof(*dcl_reg)); free($1); // $1 has been malloc'ed by strdup } | symbol_reg_p { $$=$1; } ; symbol_reg_p: STRING LPAREN exp RPAREN { struct declared_register *dcl_reg = find_register($1); if (dcl_reg == NULL) error(&@1, "can't find register %s\n", $1); memcpy(&$$, dcl_reg, sizeof(*dcl_reg)); $$.reg.nr += $3; free($1); } | STRING LPAREN exp COMMA exp RPAREN { struct declared_register *dcl_reg = find_register($1); if (dcl_reg == NULL) error(&@1, "can't find register %s\n", $1); memcpy(&$$, dcl_reg, sizeof(*dcl_reg)); $$.reg.nr += $3; if(advanced_flag) { int size = get_type_size(dcl_reg->reg.type); $$.reg.nr += ($$.reg.subnr + $5) / (32 / size); $$.reg.subnr = ($$.reg.subnr + $5) % (32 / size); } else { $$.reg.nr += ($$.reg.subnr + $5) / 32; $$.reg.subnr = ($$.reg.subnr + $5) % 32; } free($1); } ; /* Returns a partially complete destination register consisting of the * direct or indirect register addressing fields, but not stride or writemask. */ dstreg: directgenreg { $$ = $1; $$.address_mode = BRW_ADDRESS_DIRECT; } | directmsgreg { $$ = $1; $$.address_mode = BRW_ADDRESS_DIRECT; } | indirectgenreg { $$ = $1; $$.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; } | indirectmsgreg { $$ = $1; $$.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; } ; /* 1.4.3: Source register */ srcaccimm: srcacc | imm32reg ; srcacc: directsrcaccoperand | indirectsrcoperand ; srcimm: directsrcoperand | indirectsrcoperand| imm32reg ; imm32reg: imm32 srcimmtype { union { int i; float f; } intfloat; uint32_t d; switch ($2) { case BRW_REGISTER_TYPE_UD: case BRW_REGISTER_TYPE_D: case BRW_REGISTER_TYPE_V: case BRW_REGISTER_TYPE_VF: switch ($1.r) { case imm32_d: d = $1.u.d; break; default: error (&@2, "non-int D/UD/V/VF representation: %d,type=%d\n", $1.r, $2); } break; case BRW_REGISTER_TYPE_UW: case BRW_REGISTER_TYPE_W: switch ($1.r) { case imm32_d: d = $1.u.d; break; default: error (&@2, "non-int W/UW representation\n"); } d &= 0xffff; d |= d << 16; break; case BRW_REGISTER_TYPE_F: switch ($1.r) { case imm32_f: intfloat.f = $1.u.f; break; case imm32_d: intfloat.f = (float) $1.u.d; break; default: error (&@2, "non-float F representation\n"); } d = intfloat.i; break; #if 0 case BRW_REGISTER_TYPE_VF: fprintf (stderr, "Immediate type VF not supported yet\n"); YYERROR; #endif default: error(&@2, "unknown immediate type %d\n", $2); } memset (&$$, '\0', sizeof ($$)); $$.reg.file = BRW_IMMEDIATE_VALUE; $$.reg.type = $2; $$.reg.dw1.ud = d; } ; directsrcaccoperand: directsrcoperand | accreg region regtype { set_direct_src_operand(&$$, &$1, $3.type); $$.reg.vstride = $2.vert_stride; $$.reg.width = $2.width; $$.reg.hstride = $2.horiz_stride; $$.default_region = $2.is_default; } ; /* Returns a source operand in the src0 fields of an instruction. */ srcarchoperandex: srcarchoperandex_typed region regtype { memset (&$$, '\0', sizeof ($$)); $$.reg.file = $1.file; $$.reg.type = $3.type; $$.reg.subnr = $1.subnr; $$.reg.nr = $1.nr; $$.reg.vstride = $2.vert_stride; $$.reg.width = $2.width; $$.reg.hstride = $2.horiz_stride; $$.default_region = $2.is_default; $$.reg.negate = 0; $$.reg.abs = 0; } | maskstackreg { set_direct_src_operand(&$$, &$1, BRW_REGISTER_TYPE_UB); } | controlreg { set_direct_src_operand(&$$, &$1, BRW_REGISTER_TYPE_UD); } /* | statereg { set_direct_src_operand(&$$, &$1, BRW_REGISTER_TYPE_UD); }*/ | notifyreg { set_direct_src_operand(&$$, &$1, BRW_REGISTER_TYPE_UD); } | ipreg { set_direct_src_operand(&$$, &$1, BRW_REGISTER_TYPE_UD); } | nullreg region regtype { if ($3.is_default) { set_direct_src_operand(&$$, &$1, BRW_REGISTER_TYPE_UD); } else { set_direct_src_operand(&$$, &$1, $3.type); } $$.default_region = 1; } ; srcarchoperandex_typed: flagreg | addrreg | maskreg ; sendleadreg: symbol_reg { memset (&$$, '\0', sizeof ($$)); $$.file = $1.reg.file; $$.nr = $1.reg.nr; $$.subnr = $1.reg.subnr; } | directgenreg | directmsgreg ; src: directsrcoperand | indirectsrcoperand ; directsrcoperand: negate abs symbol_reg region regtype { memset (&$$, '\0', sizeof ($$)); $$.reg.address_mode = BRW_ADDRESS_DIRECT; $$.reg.file = $3.reg.file; $$.reg.nr = $3.reg.nr; $$.reg.subnr = $3.reg.subnr; if ($5.is_default) { $$.reg.type = $3.reg.type; } else { $$.reg.type = $5.type; } if ($4.is_default) { $$.reg.vstride = $3.src_region.vert_stride; $$.reg.width = $3.src_region.width; $$.reg.hstride = $3.src_region.horiz_stride; } else { $$.reg.vstride = $4.vert_stride; $$.reg.width = $4.width; $$.reg.hstride = $4.horiz_stride; } $$.reg.negate = $1; $$.reg.abs = $2; } | statereg region regtype { if($2.is_default ==1 && $3.is_default == 1) { set_direct_src_operand(&$$, &$1, BRW_REGISTER_TYPE_UD); } else{ memset (&$$, '\0', sizeof ($$)); $$.reg.address_mode = BRW_ADDRESS_DIRECT; $$.reg.file = $1.file; $$.reg.nr = $1.nr; $$.reg.subnr = $1.subnr; $$.reg.vstride = $2.vert_stride; $$.reg.width = $2.width; $$.reg.hstride = $2.horiz_stride; $$.reg.type = $3.type; } } | negate abs directgenreg region swizzle regtype { memset (&$$, '\0', sizeof ($$)); $$.reg.address_mode = BRW_ADDRESS_DIRECT; $$.reg.file = $3.file; $$.reg.nr = $3.nr; $$.reg.subnr = $3.subnr; $$.reg.type = $6.type; $$.reg.vstride = $4.vert_stride; $$.reg.width = $4.width; $$.reg.hstride = $4.horiz_stride; $$.default_region = $4.is_default; $$.reg.negate = $1; $$.reg.abs = $2; $$.reg.dw1.bits.swizzle = $5.reg.dw1.bits.swizzle; } | srcarchoperandex ; indirectsrcoperand: negate abs indirectgenreg indirectregion regtype swizzle { memset (&$$, '\0', sizeof ($$)); $$.reg.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; $$.reg.file = $3.file; $$.reg.subnr = $3.subnr; $$.reg.dw1.bits.indirect_offset = $3.dw1.bits.indirect_offset; $$.reg.type = $5.type; $$.reg.vstride = $4.vert_stride; $$.reg.width = $4.width; $$.reg.hstride = $4.horiz_stride; $$.reg.negate = $1; $$.reg.abs = $2; $$.reg.dw1.bits.swizzle = $6.reg.dw1.bits.swizzle; } ; /* 1.4.4: Address Registers */ /* Returns a partially-completed struct brw_reg consisting of the address * register fields for register-indirect access. */ addrparam: addrreg COMMA immaddroffset { if ($3 < -512 || $3 > 511) error(&@3, "Address immediate offset %d out of range\n", $3); memset (&$$, '\0', sizeof ($$)); $$.subnr = $1.subnr; $$.dw1.bits.indirect_offset = $3; } | addrreg { memset (&$$, '\0', sizeof ($$)); $$.subnr = $1.subnr; $$.dw1.bits.indirect_offset = 0; } ; /* The immaddroffset provides an immediate offset value added to the addresses * from the address register in register-indirect register access. */ immaddroffset: /* empty */ { $$ = 0; } | exp ; /* 1.4.5: Register files and register numbers */ subregnum: DOT exp { $$ = $2; } | %prec SUBREGNUM { /* Default to subreg 0 if unspecified. */ $$ = 0; } ; directgenreg: GENREG subregnum { memset (&$$, '\0', sizeof ($$)); $$.file = BRW_GENERAL_REGISTER_FILE; $$.nr = $1; $$.subnr = $2; } ; indirectgenreg: GENREGFILE LSQUARE addrparam RSQUARE { memset (&$$, '\0', sizeof ($$)); $$.file = BRW_GENERAL_REGISTER_FILE; $$.subnr = $3.subnr; $$.dw1.bits.indirect_offset = $3.dw1.bits.indirect_offset; } ; directmsgreg: MSGREG subregnum { memset (&$$, '\0', sizeof ($$)); $$.file = BRW_MESSAGE_REGISTER_FILE; $$.nr = $1; $$.subnr = $2; } ; indirectmsgreg: MSGREGFILE LSQUARE addrparam RSQUARE { memset (&$$, '\0', sizeof ($$)); $$.file = BRW_MESSAGE_REGISTER_FILE; $$.subnr = $3.subnr; $$.dw1.bits.indirect_offset = $3.dw1.bits.indirect_offset; } ; addrreg: ADDRESSREG subregnum { if ($1 != 0) error(&@2, "address register number %d out of range", $1); memset (&$$, '\0', sizeof ($$)); $$.file = BRW_ARCHITECTURE_REGISTER_FILE; $$.nr = BRW_ARF_ADDRESS | $1; $$.subnr = $2; } ; accreg: ACCREG subregnum { if ($1 > 1) error(&@1, "accumulator register number %d out of range", $1); memset (&$$, '\0', sizeof ($$)); $$.file = BRW_ARCHITECTURE_REGISTER_FILE; $$.nr = BRW_ARF_ACCUMULATOR | $1; $$.subnr = $2; } ; flagreg: FLAGREG subregnum { if ((!IS_GENp(7) && $1 > 0) || (IS_GENp(7) && $1 > 1)) { error(&@2, "flag register number %d out of range\n", $1); } if ($2 > 1) error(&@2, "flag subregister number %d out of range\n", $1); memset (&$$, '\0', sizeof ($$)); $$.file = BRW_ARCHITECTURE_REGISTER_FILE; $$.nr = BRW_ARF_FLAG | $1; $$.subnr = $2; } ; maskreg: MASKREG subregnum { if ($1 > 0) error(&@1, "mask register number %d out of range", $1); memset (&$$, '\0', sizeof ($$)); $$.file = BRW_ARCHITECTURE_REGISTER_FILE; $$.nr = BRW_ARF_MASK; $$.subnr = $2; } | mask_subreg { memset (&$$, '\0', sizeof ($$)); $$.file = BRW_ARCHITECTURE_REGISTER_FILE; $$.nr = BRW_ARF_MASK; $$.subnr = $1; } ; mask_subreg: AMASK | IMASK | LMASK | CMASK ; maskstackreg: MASKSTACKREG subregnum { if ($1 > 0) error(&@1, "mask stack register number %d out of range", $1); memset (&$$, '\0', sizeof ($$)); $$.file = BRW_ARCHITECTURE_REGISTER_FILE; $$.nr = BRW_ARF_MASK_STACK; $$.subnr = $2; } | maskstack_subreg { memset (&$$, '\0', sizeof ($$)); $$.file = BRW_ARCHITECTURE_REGISTER_FILE; $$.nr = BRW_ARF_MASK_STACK; $$.subnr = $1; } ; maskstack_subreg: IMS | LMS ; /* maskstackdepthreg: MASKSTACKDEPTHREG subregnum { if ($1 > 0) error(&@1, "mask stack register number %d out of range", $1); memset (&$$, '\0', sizeof ($$)); $$.reg_file = BRW_ARCHITECTURE_REGISTER_FILE; $$.reg_nr = BRW_ARF_MASK_STACK_DEPTH; $$.subreg_nr = $2; } | maskstackdepth_subreg { memset (&$$, '\0', sizeof ($$)); $$.reg_file = BRW_ARCHITECTURE_REGISTER_FILE; $$.reg_nr = BRW_ARF_MASK_STACK_DEPTH; $$.subreg_nr = $1; } ; maskstackdepth_subreg: IMSD | LMSD ; */ notifyreg: NOTIFYREG regtype { int num_notifyreg = (IS_GENp(6)) ? 3 : 2; if ($1 > num_notifyreg) error(&@1, "notification register number %d out of range", $1); memset (&$$, '\0', sizeof ($$)); $$.file = BRW_ARCHITECTURE_REGISTER_FILE; if (IS_GENp(6)) { $$.nr = BRW_ARF_NOTIFICATION_COUNT; $$.subnr = $1; } else { $$.nr = BRW_ARF_NOTIFICATION_COUNT | $1; $$.subnr = 0; } } /* | NOTIFYREG regtype { if ($1 > 1) { fprintf(stderr, "notification register number %d out of range", $1); YYERROR; } memset (&$$, '\0', sizeof ($$)); $$.reg_file = BRW_ARCHITECTURE_REGISTER_FILE; $$.reg_nr = BRW_ARF_NOTIFICATION_COUNT; $$.subreg_nr = 0; } */ ; statereg: STATEREG subregnum { if ($1 > 0) error(&@1, "state register number %d out of range", $1); if ($2 > 1) error(&@2, "state subregister number %d out of range", $1); memset (&$$, '\0', sizeof ($$)); $$.file = BRW_ARCHITECTURE_REGISTER_FILE; $$.nr = BRW_ARF_STATE | $1; $$.subnr = $2; } ; controlreg: CONTROLREG subregnum { if ($1 > 0) error(&@1, "control register number %d out of range", $1); if ($2 > 2) error(&@2, "control subregister number %d out of range", $1); memset (&$$, '\0', sizeof ($$)); $$.file = BRW_ARCHITECTURE_REGISTER_FILE; $$.nr = BRW_ARF_CONTROL | $1; $$.subnr = $2; } ; ipreg: IPREG regtype { memset (&$$, '\0', sizeof ($$)); $$.file = BRW_ARCHITECTURE_REGISTER_FILE; $$.nr = BRW_ARF_IP; $$.subnr = 0; } ; nullreg: NULL_TOKEN { memset (&$$, '\0', sizeof ($$)); $$.file = BRW_ARCHITECTURE_REGISTER_FILE; $$.nr = BRW_ARF_NULL; $$.subnr = 0; } ; /* 1.4.6: Relative locations */ relativelocation: simple_int { if (($1 > 32767) || ($1 < -32768)) error(&@1, "error: relative offset %d out of range \n", $1); memset (&$$, '\0', sizeof ($$)); $$.reg.file = BRW_IMMEDIATE_VALUE; $$.reg.type = BRW_REGISTER_TYPE_D; $$.imm32 = $1 & 0x0000ffff; } | STRING { memset (&$$, '\0', sizeof ($$)); $$.reg.file = BRW_IMMEDIATE_VALUE; $$.reg.type = BRW_REGISTER_TYPE_D; $$.reloc_target = $1; } ; relativelocation2: STRING { memset (&$$, '\0', sizeof ($$)); $$.reg.file = BRW_IMMEDIATE_VALUE; $$.reg.type = BRW_REGISTER_TYPE_D; $$.reloc_target = $1; } | exp { memset (&$$, '\0', sizeof ($$)); $$.reg.file = BRW_IMMEDIATE_VALUE; $$.reg.type = BRW_REGISTER_TYPE_D; $$.imm32 = $1; } | directgenreg region regtype { set_direct_src_operand(&$$, &$1, $3.type); $$.reg.vstride = $2.vert_stride; $$.reg.width = $2.width; $$.reg.hstride = $2.horiz_stride; $$.default_region = $2.is_default; } | symbol_reg_p { memset (&$$, '\0', sizeof ($$)); $$.reg.address_mode = BRW_ADDRESS_DIRECT; $$.reg.file = $1.reg.file; $$.reg.nr = $1.reg.nr; $$.reg.subnr = $1.reg.subnr; $$.reg.type = $1.reg.type; $$.reg.vstride = $1.src_region.vert_stride; $$.reg.width = $1.src_region.width; $$.reg.hstride = $1.src_region.horiz_stride; } | indirectgenreg indirectregion regtype { memset (&$$, '\0', sizeof ($$)); $$.reg.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; $$.reg.file = $1.file; $$.reg.subnr = $1.subnr; $$.reg.dw1.bits.indirect_offset = $1.dw1.bits.indirect_offset; $$.reg.type = $3.type; $$.reg.vstride = $2.vert_stride; $$.reg.width = $2.width; $$.reg.hstride = $2.horiz_stride; } ; /* 1.4.7: Regions */ dstregion: /* empty */ { $$ = DEFAULT_DSTREGION; } |LANGLE exp RANGLE { /* Returns a value for a horiz_stride field of an * instruction. */ if ($2 != 1 && $2 != 2 && $2 != 4) error(&@2, "Invalid horiz size %d\n", $2); $$ = ffs($2); } ; region: /* empty */ { /* XXX is this default value correct?*/ memset (&$$, '\0', sizeof ($$)); $$.vert_stride = ffs(0); $$.width = BRW_WIDTH_1; $$.horiz_stride = ffs(0); $$.is_default = 1; } |LANGLE exp RANGLE { /* XXX is this default value correct for accreg?*/ memset (&$$, '\0', sizeof ($$)); $$.vert_stride = ffs($2); $$.width = BRW_WIDTH_1; $$.horiz_stride = ffs(0); } |LANGLE exp COMMA exp COMMA exp RANGLE { memset (&$$, '\0', sizeof ($$)); $$.vert_stride = ffs($2); $$.width = ffs($4) - 1; $$.horiz_stride = ffs($6); } | LANGLE exp SEMICOLON exp COMMA exp RANGLE { memset (&$$, '\0', sizeof ($$)); $$.vert_stride = ffs($2); $$.width = ffs($4) - 1; $$.horiz_stride = ffs($6); } ; /* region_wh is used in specifying indirect operands where rather than having * a vertical stride, you use subsequent address registers to get a new base * offset for the next row. */ region_wh: LANGLE exp COMMA exp RANGLE { memset (&$$, '\0', sizeof ($$)); $$.vert_stride = BRW_VERTICAL_STRIDE_ONE_DIMENSIONAL; $$.width = ffs($2) - 1; $$.horiz_stride = ffs($4); } ; indirectregion: region | region_wh ; /* 1.4.8: Types */ /* regtype returns an integer register type suitable for inserting into an * instruction. */ regtype: /* empty */ { $$.type = program_defaults.register_type;$$.is_default = 1;} | TYPE_F { $$.type = BRW_REGISTER_TYPE_F;$$.is_default = 0; } | TYPE_UD { $$.type = BRW_REGISTER_TYPE_UD;$$.is_default = 0; } | TYPE_D { $$.type = BRW_REGISTER_TYPE_D;$$.is_default = 0; } | TYPE_UW { $$.type = BRW_REGISTER_TYPE_UW;$$.is_default = 0; } | TYPE_W { $$.type = BRW_REGISTER_TYPE_W;$$.is_default = 0; } | TYPE_UB { $$.type = BRW_REGISTER_TYPE_UB;$$.is_default = 0; } | TYPE_B { $$.type = BRW_REGISTER_TYPE_B;$$.is_default = 0; } ; srcimmtype: /* empty */ { /* XXX change to default when pragma parse is done */ $$ = BRW_REGISTER_TYPE_D; } |TYPE_F { $$ = BRW_REGISTER_TYPE_F; } | TYPE_UD { $$ = BRW_REGISTER_TYPE_UD; } | TYPE_D { $$ = BRW_REGISTER_TYPE_D; } | TYPE_UW { $$ = BRW_REGISTER_TYPE_UW; } | TYPE_W { $$ = BRW_REGISTER_TYPE_W; } | TYPE_V { $$ = BRW_REGISTER_TYPE_V; } | TYPE_VF { $$ = BRW_REGISTER_TYPE_VF; } ; /* 1.4.10: Swizzle control */ /* Returns the swizzle control for an align16 instruction's source operand * in the src0 fields. */ swizzle: /* empty */ { $$.reg.dw1.bits.swizzle = BRW_SWIZZLE_NOOP; } | DOT chansel { $$.reg.dw1.bits.swizzle = BRW_SWIZZLE4($2, $2, $2, $2); } | DOT chansel chansel chansel chansel { $$.reg.dw1.bits.swizzle = BRW_SWIZZLE4($2, $3, $4, $5); } ; chansel: X | Y | Z | W ; /* 1.4.9: Write mask */ /* Returns a partially completed struct brw_reg, with just the writemask bits * filled out. */ writemask: /* empty */ { $$.dw1.bits.writemask = BRW_WRITEMASK_XYZW; } | DOT writemask_x writemask_y writemask_z writemask_w { $$.dw1.bits.writemask = $2 | $3 | $4 | $5; } ; writemask_x: /* empty */ { $$ = 0; } | X { $$ = 1 << BRW_CHANNEL_X; } ; writemask_y: /* empty */ { $$ = 0; } | Y { $$ = 1 << BRW_CHANNEL_Y; } ; writemask_z: /* empty */ { $$ = 0; } | Z { $$ = 1 << BRW_CHANNEL_Z; } ; writemask_w: /* empty */ { $$ = 0; } | W { $$ = 1 << BRW_CHANNEL_W; } ; /* 1.4.11: Immediate values */ imm32: exp { $$.r = imm32_d; $$.u.d = $1; } | NUMBER { $$.r = imm32_f; $$.u.f = $1; } ; /* 1.4.12: Predication and modifiers */ predicate: /* empty */ { $$.pred_control = BRW_PREDICATE_NONE; $$.flag_reg_nr = 0; $$.flag_subreg_nr = 0; $$.pred_inverse = 0; } | LPAREN predstate flagreg predctrl RPAREN { $$.pred_control = $4; $$.flag_reg_nr = $3.nr; $$.flag_subreg_nr = $3.subnr; $$.pred_inverse = $2; } ; predstate: /* empty */ { $$ = 0; } | PLUS { $$ = 0; } | MINUS { $$ = 1; } ; predctrl: /* empty */ { $$ = BRW_PREDICATE_NORMAL; } | DOT X { $$ = BRW_PREDICATE_ALIGN16_REPLICATE_X; } | DOT Y { $$ = BRW_PREDICATE_ALIGN16_REPLICATE_Y; } | DOT Z { $$ = BRW_PREDICATE_ALIGN16_REPLICATE_Z; } | DOT W { $$ = BRW_PREDICATE_ALIGN16_REPLICATE_W; } | ANYV { $$ = BRW_PREDICATE_ALIGN1_ANYV; } | ALLV { $$ = BRW_PREDICATE_ALIGN1_ALLV; } | ANY2H { $$ = BRW_PREDICATE_ALIGN1_ANY2H; } | ALL2H { $$ = BRW_PREDICATE_ALIGN1_ALL2H; } | ANY4H { $$ = BRW_PREDICATE_ALIGN1_ANY4H; } | ALL4H { $$ = BRW_PREDICATE_ALIGN1_ALL4H; } | ANY8H { $$ = BRW_PREDICATE_ALIGN1_ANY8H; } | ALL8H { $$ = BRW_PREDICATE_ALIGN1_ALL8H; } | ANY16H { $$ = BRW_PREDICATE_ALIGN1_ANY16H; } | ALL16H { $$ = BRW_PREDICATE_ALIGN1_ALL16H; } ; negate: /* empty */ { $$ = 0; } | MINUS { $$ = 1; } ; abs: /* empty */ { $$ = 0; } | ABS { $$ = 1; } ; execsize: /* empty */ %prec EMPTEXECSIZE { $$ = ffs(program_defaults.execute_size) - 1; } |LPAREN exp RPAREN { /* Returns a value for the execution_size field of an * instruction. */ if ($2 != 1 && $2 != 2 && $2 != 4 && $2 != 8 && $2 != 16 && $2 != 32) error(&@2, "Invalid execution size %d\n", $2); $$ = ffs($2) - 1; } ; saturate: /* empty */ { $$ = BRW_INSTRUCTION_NORMAL; } | SATURATE { $$ = BRW_INSTRUCTION_SATURATE; } ; conditionalmodifier: condition { $$.cond = $1; $$.flag_reg_nr = 0; $$.flag_subreg_nr = -1; } | condition DOT flagreg { $$.cond = $1; $$.flag_reg_nr = ($3.nr & 0xF); $$.flag_subreg_nr = $3.subnr; } condition: /* empty */ { $$ = BRW_CONDITIONAL_NONE; } | ZERO | EQUAL | NOT_ZERO | NOT_EQUAL | GREATER | GREATER_EQUAL | LESS | LESS_EQUAL | ROUND_INCREMENT | OVERFLOW | UNORDERED ; /* 1.4.13: Instruction options */ instoptions: /* empty */ { memset(&$$, 0, sizeof($$)); } | LCURLY instoption_list RCURLY { $$ = $2; } ; instoption_list:instoption_list COMMA instoption { $$ = $1; add_option(&$$, $3); } | instoption_list instoption { $$ = $1; add_option(&$$, $2); } | /* empty, header defaults to zeroes. */ { memset(&$$, 0, sizeof($$)); } ; instoption: ALIGN1 { $$ = ALIGN1; } | ALIGN16 { $$ = ALIGN16; } | SECHALF { $$ = SECHALF; } | COMPR { $$ = COMPR; } | SWITCH { $$ = SWITCH; } | ATOMIC { $$ = ATOMIC; } | NODDCHK { $$ = NODDCHK; } | NODDCLR { $$ = NODDCLR; } | MASK_DISABLE { $$ = MASK_DISABLE; } | BREAKPOINT { $$ = BREAKPOINT; } | ACCWRCTRL { $$ = ACCWRCTRL; } | EOT { $$ = EOT; } ; %% extern int yylineno; void yyerror (char *msg) { fprintf(stderr, "%s: %d: %s at \"%s\"\n", input_filename, yylineno, msg, lex_text()); ++errors; } static int get_type_size(unsigned type) { int size = 1; switch (type) { case BRW_REGISTER_TYPE_F: case BRW_REGISTER_TYPE_UD: case BRW_REGISTER_TYPE_D: size = 4; break; case BRW_REGISTER_TYPE_UW: case BRW_REGISTER_TYPE_W: size = 2; break; case BRW_REGISTER_TYPE_UB: case BRW_REGISTER_TYPE_B: size = 1; break; default: assert(0); size = 1; break; } return size; } static void reset_instruction_src_region(struct brw_instruction *instr, struct src_operand *src) { if (IS_GENp(8)) return; if (!src->default_region) return; if (src->reg.file == BRW_ARCHITECTURE_REGISTER_FILE && ((src->reg.nr & 0xF0) == BRW_ARF_ADDRESS)) { src->reg.vstride = ffs(0); src->reg.width = BRW_WIDTH_1; src->reg.hstride = ffs(0); } else if (src->reg.file == BRW_ARCHITECTURE_REGISTER_FILE && ((src->reg.nr & 0xF0) == BRW_ARF_ACCUMULATOR)) { int horiz_stride = 1, width, vert_stride; if (instr->header.compression_control == BRW_COMPRESSION_COMPRESSED) { width = 16; } else { width = 8; } if (width > (1 << instr->header.execution_size)) width = (1 << instr->header.execution_size); vert_stride = horiz_stride * width; src->reg.vstride = ffs(vert_stride); src->reg.width = ffs(width) - 1; src->reg.hstride = ffs(horiz_stride); } else if ((src->reg.file == BRW_ARCHITECTURE_REGISTER_FILE) && (src->reg.nr == BRW_ARF_NULL) && (instr->header.opcode == BRW_OPCODE_SEND)) { src->reg.vstride = ffs(8); src->reg.width = BRW_WIDTH_8; src->reg.hstride = ffs(1); } else { int horiz_stride = 1, width, vert_stride; if (instr->header.execution_size == 0) { /* scalar */ horiz_stride = 0; width = 1; vert_stride = 0; } else { if ((instr->header.opcode == BRW_OPCODE_MUL) || (instr->header.opcode == BRW_OPCODE_MAC) || (instr->header.opcode == BRW_OPCODE_CMP) || (instr->header.opcode == BRW_OPCODE_ASR) || (instr->header.opcode == BRW_OPCODE_ADD) || (instr->header.opcode == BRW_OPCODE_SHL)) { horiz_stride = 0; width = 1; vert_stride = 0; } else { width = (1 << instr->header.execution_size) / horiz_stride; vert_stride = horiz_stride * width; if (get_type_size(src->reg.type) * (width + src->reg.subnr) > 32) { horiz_stride = 0; width = 1; vert_stride = 0; } } } src->reg.vstride = ffs(vert_stride); src->reg.width = ffs(width) - 1; src->reg.hstride = ffs(horiz_stride); } } static void set_instruction_opcode(struct brw_program_instruction *instr, unsigned opcode) { if (IS_GENp(8)) gen8_set_opcode(GEN8(instr), opcode); else GEN(instr)->header.opcode = opcode; } /** * Fills in the destination register information in instr from the bits in dst. */ static int set_instruction_dest(struct brw_program_instruction *instr, struct brw_reg *dest) { if (!validate_dst_reg(instr, dest)) return 1; /* the assembler support expressing subnr in bytes or in number of * elements. */ resolve_subnr(dest); if (IS_GENp(8)) { gen8_set_exec_size(GEN8(instr), dest->width); gen8_set_dst(GEN8(instr), *dest); } else { brw_set_dest(&genasm_compile, GEN(instr), *dest); } return 0; } /* Sets the first source operand for the instruction. Returns 0 on success. */ static int set_instruction_src0(struct brw_program_instruction *instr, struct src_operand *src, YYLTYPE *location) { if (advanced_flag) reset_instruction_src_region(GEN(instr), src); if (!validate_src_reg(instr, src->reg, location)) return 1; /* the assembler support expressing subnr in bytes or in number of * elements. */ resolve_subnr(&src->reg); if (IS_GENp(8)) gen8_set_src0(GEN8(instr), src->reg); else brw_set_src0(&genasm_compile, GEN(instr), src->reg); return 0; } /* Sets the second source operand for the instruction. Returns 0 on success. */ static int set_instruction_src1(struct brw_program_instruction *instr, struct src_operand *src, YYLTYPE *location) { if (advanced_flag) reset_instruction_src_region(GEN(instr), src); if (!validate_src_reg(instr, src->reg, location)) return 1; /* the assembler support expressing subnr in bytes or in number of * elements. */ resolve_subnr(&src->reg); if (IS_GENp(8)) gen8_set_src1(GEN8(instr), src->reg); else brw_set_src1(&genasm_compile, GEN(instr), src->reg); return 0; } static int set_instruction_dest_three_src(struct brw_program_instruction *instr, struct brw_reg *dest) { resolve_subnr(dest); brw_set_3src_dest(&genasm_compile, GEN(instr), *dest); return 0; } static int set_instruction_src0_three_src(struct brw_program_instruction *instr, struct src_operand *src) { if (advanced_flag) reset_instruction_src_region(GEN(instr), src); resolve_subnr(&src->reg); // TODO: src0 modifier, src0 rep_ctrl brw_set_3src_src0(&genasm_compile, GEN(instr), src->reg); return 0; } static int set_instruction_src1_three_src(struct brw_program_instruction *instr, struct src_operand *src) { if (advanced_flag) reset_instruction_src_region(GEN(instr), src); resolve_subnr(&src->reg); // TODO: src1 modifier, src1 rep_ctrl brw_set_3src_src1(&genasm_compile, GEN(instr), src->reg); return 0; } static int set_instruction_src2_three_src(struct brw_program_instruction *instr, struct src_operand *src) { if (advanced_flag) reset_instruction_src_region(GEN(instr), src); resolve_subnr(&src->reg); // TODO: src2 modifier, src2 rep_ctrl brw_set_3src_src2(&genasm_compile, GEN(instr), src->reg); return 0; } static void set_instruction_saturate(struct brw_program_instruction *instr, int saturate) { if (IS_GENp(8)) gen8_set_saturate(GEN8(instr), saturate); else GEN(instr)->header.saturate = saturate; } static void set_instruction_options(struct brw_program_instruction *instr, struct options options) { if (IS_GENp(8)) { gen8_set_access_mode(GEN8(instr), options.access_mode); gen8_set_thread_control(GEN8(instr), options.thread_control); gen8_set_dep_control(GEN8(instr), options.dependency_control); gen8_set_mask_control(GEN8(instr), options.mask_control); gen8_set_debug_control(GEN8(instr), options.debug_control); gen8_set_acc_wr_control(GEN8(instr), options.acc_wr_control); gen8_set_eot(GEN8(instr), options.end_of_thread); } else { GEN(instr)->header.access_mode = options.access_mode; GEN(instr)->header.compression_control = options.compression_control; GEN(instr)->header.thread_control = options.thread_control; GEN(instr)->header.dependency_control = options.dependency_control; GEN(instr)->header.mask_control = options.mask_control; GEN(instr)->header.debug_control = options.debug_control; GEN(instr)->header.acc_wr_control = options.acc_wr_control; GEN(instr)->bits3.generic.end_of_thread = options.end_of_thread; } } static void set_instruction_predicate(struct brw_program_instruction *instr, struct predicate *p) { if (IS_GENp(8)) { gen8_set_pred_control(GEN8(instr), p->pred_control); gen8_set_pred_inv(GEN8(instr), p->pred_inverse); gen8_set_flag_reg_nr(GEN8(instr), p->flag_reg_nr); gen8_set_flag_subreg_nr(GEN8(instr), p->flag_subreg_nr); } else { GEN(instr)->header.predicate_control = p->pred_control; GEN(instr)->header.predicate_inverse = p->pred_inverse; GEN(instr)->bits2.da1.flag_reg_nr = p->flag_reg_nr; GEN(instr)->bits2.da1.flag_subreg_nr = p->flag_subreg_nr; } } static void set_instruction_pred_cond(struct brw_program_instruction *instr, struct predicate *p, struct condition *c, YYLTYPE *location) { set_instruction_predicate(instr, p); if (IS_GENp(8)) gen8_set_cond_modifier(GEN8(instr), c->cond); else GEN(instr)->header.destreg__conditionalmod = c->cond; if (c->flag_subreg_nr == -1) return; if (p->pred_control != BRW_PREDICATE_NONE && (p->flag_reg_nr != c->flag_reg_nr || p->flag_subreg_nr != c->flag_subreg_nr)) { warn(ALWAYS, location, "must use the same flag register if both " "prediction and conditional modifier are enabled\n"); } if (IS_GENp(8)) { gen8_set_flag_reg_nr(GEN8(instr), c->flag_reg_nr); gen8_set_flag_subreg_nr(GEN8(instr), c->flag_subreg_nr); } else { GEN(instr)->bits2.da1.flag_reg_nr = c->flag_reg_nr; GEN(instr)->bits2.da1.flag_subreg_nr = c->flag_subreg_nr; } } static void set_direct_dst_operand(struct brw_reg *dst, struct brw_reg *reg, int type) { *dst = *reg; dst->address_mode = BRW_ADDRESS_DIRECT; dst->type = type; dst->hstride = 1; dst->dw1.bits.writemask = BRW_WRITEMASK_XYZW; } static void set_direct_src_operand(struct src_operand *src, struct brw_reg *reg, int type) { memset(src, 0, sizeof(*src)); src->reg.address_mode = BRW_ADDRESS_DIRECT; src->reg.file = reg->file; src->reg.type = type; src->reg.subnr = reg->subnr; src->reg.nr = reg->nr; src->reg.vstride = 0; src->reg.width = 0; src->reg.hstride = 0; src->reg.negate = 0; src->reg.abs = 0; SWIZZLE(src->reg) = BRW_SWIZZLE_NOOP; } static inline int instruction_opcode(struct brw_program_instruction *insn) { if (IS_GENp(8)) return gen8_opcode(GEN8(insn)); else return GEN(insn)->header.opcode; } /* * return the offset used in native flow control (branch) instructions */ static inline int branch_offset(struct brw_program_instruction *insn, int offset) { /* * bspec: Unlike other flow control instructions, the offset used by JMPI * is relative to the incremented instruction pointer rather than the IP * value for the instruction itself. */ if (instruction_opcode(insn) == BRW_OPCODE_JMPI) offset--; /* * Gen4- bspec: the jump distance is in number of sixteen-byte units * Gen5+ bspec: the jump distance is in number of eight-byte units * Gen7.5+: the offset is in unit of 8bits for JMPI, 64bits for other flow * control instructions */ if (gen_level >= 75 && (instruction_opcode(insn) == BRW_OPCODE_JMPI)) offset *= 16; else if (gen_level >= 50) offset *= 2; return offset; } void set_branch_two_offsets(struct brw_program_instruction *insn, int jip_offset, int uip_offset) { int jip = branch_offset(insn, jip_offset); int uip = branch_offset(insn, uip_offset); assert(instruction_opcode(insn) != BRW_OPCODE_JMPI); if (IS_GENp(8)) { gen8_set_jip(GEN8(insn), jip); gen8_set_uip(GEN8(insn), uip); } else { GEN(insn)->bits3.break_cont.jip = jip; GEN(insn)->bits3.break_cont.uip = uip; } } void set_branch_one_offset(struct brw_program_instruction *insn, int jip_offset) { int jip = branch_offset(insn, jip_offset); if (IS_GENp(8)) { gen8_set_jip(GEN8(insn), jip); } else if (IS_GENx(7)) { /* Gen7 JMPI Restrictions in bspec: * The JIP data type must be Signed DWord */ if (instruction_opcode(insn) == BRW_OPCODE_JMPI) GEN(insn)->bits3.JIP = jip; else GEN(insn)->bits3.break_cont.jip = jip; } else if (IS_GENx(6)) { if ((instruction_opcode(insn) == BRW_OPCODE_CALL) || (instruction_opcode(insn) == BRW_OPCODE_JMPI)) GEN(insn)->bits3.JIP = jip; else GEN(insn)->bits1.branch_gen6.jump_count = jip; // for CASE,ELSE,FORK,IF,WHILE } else { GEN(insn)->bits3.JIP = jip; if (instruction_opcode(insn) == BRW_OPCODE_ELSE) GEN(insn)->bits3.break_cont.uip = 1; // Set the istack pop count, which must always be 1. } } intel-gpu-tools-1.14/assembler/main.c0000644000175000017500000003014512665336131014500 00000000000000/* -*- c-basic-offset: 8 -*- */ /* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Eric Anholt * */ #include #include #include #include #include #include #include "ralloc.h" #include "gen4asm.h" #include "brw_eu.h" extern FILE *yyin; extern void set_branch_two_offsets(struct brw_program_instruction *insn, int jip_offset, int uip_offset); extern void set_branch_one_offset(struct brw_program_instruction *insn, int jip_offset); long int gen_level = 40; int advanced_flag = 0; /* 0: in unit of byte, 1: in unit of data element size */ unsigned int warning_flags = WARN_ALWAYS; int need_export = 0; char *input_filename = ""; int errors; struct brw_context genasm_brw_context; struct brw_compile genasm_compile; struct brw_program compiled_program; struct program_defaults program_defaults = {.register_type = BRW_REGISTER_TYPE_F}; /* 0: default output style, 1: nice C-style output */ static int binary_like_output = 0; static char *export_filename = NULL; static const char binary_prepend[] = "static const char gen_eu_bytes[] = {\n"; #define HASH_SIZE 37 struct hash_item { char *key; void *value; struct hash_item *next; }; typedef struct hash_item *hash_table[HASH_SIZE]; static hash_table declared_register_table; struct label_item { char *name; int addr; struct label_item *next; }; static struct label_item *label_table; static const struct option longopts[] = { {"advanced", no_argument, 0, 'a'}, {"binary", no_argument, 0, 'b'}, {"export", required_argument, 0, 'e'}, {"input_list", required_argument, 0, 'l'}, {"output", required_argument, 0, 'o'}, {"gen", required_argument, 0, 'g'}, { NULL, 0, NULL, 0 } }; static void usage(void) { fprintf(stderr, "usage: intel-gen4asm [options] inputfile\n"); fprintf(stderr, "OPTIONS:\n"); fprintf(stderr, "\t-a, --advanced Set advanced flag\n"); fprintf(stderr, "\t-b, --binary C style binary output\n"); fprintf(stderr, "\t-e, --export {exportfile} Export label file\n"); fprintf(stderr, "\t-l, --input_list {entrytablefile} Input entry_table_list file\n"); fprintf(stderr, "\t-o, --output {outputfile} Specify output file\n"); fprintf(stderr, "\t-g, --gen <4|5|6|7|8|9> Specify GPU generation\n"); } static int hash(char *key) { unsigned ret = 0; while(*key) ret = (ret << 1) + (*key++); return ret % HASH_SIZE; } static void *find_hash_item(hash_table t, char *key) { struct hash_item *p; for(p = t[hash(key)]; p; p = p->next) if(strcasecmp(p->key, key) == 0) return p->value; return NULL; } static void insert_hash_item(hash_table t, char *key, void *v) { int index = hash(key); struct hash_item *p = malloc(sizeof(*p)); p->key = key; p->value = v; p->next = t[index]; t[index] = p; } static void free_hash_table(hash_table t) { struct hash_item *p, *next; int i; for (i = 0; i < HASH_SIZE; i++) { p = t[i]; while(p) { next = p->next; free(p->key); free(p->value); free(p); p = next; } } } struct declared_register *find_register(char *name) { return find_hash_item(declared_register_table, name); } void insert_register(struct declared_register *reg) { insert_hash_item(declared_register_table, reg->name, reg); } static void add_label(struct brw_program_instruction *i) { struct label_item **p = &label_table; assert(is_label(i)); while(*p) p = &((*p)->next); *p = calloc(1, sizeof(**p)); (*p)->name = label_name(i); (*p)->addr = i->inst_offset; } /* Some assembly code have duplicated labels. Start from start_addr. Search as a loop. Return the first label found. */ static int label_to_addr(char *name, int start_addr) { /* return the first label just after start_addr, or the first label from the head */ struct label_item *p; int r = -1; for(p = label_table; p; p = p->next) { if(strcmp(p->name, name) == 0) { if(p->addr >= start_addr) // the first label just after start_addr return p->addr; else if(r == -1) // the first label from the head r = p->addr; } } if(r == -1) { fprintf(stderr, "Can't find label %s\n", name); exit(1); } return r; } static void free_label_table(struct label_item *p) { if(p) { free_label_table(p->next); free(p); } } struct entry_point_item { char *str; struct entry_point_item *next; } *entry_point_table; static int read_entry_file(char *fn) { FILE *entry_table_file; char buf[2048]; struct entry_point_item **p = &entry_point_table; if (!fn) return 0; if ((entry_table_file = fopen(fn, "r")) == NULL) return -1; while (fgets(buf, sizeof(buf)-1, entry_table_file) != NULL) { // drop the final char '\n' if(buf[strlen(buf)-1] == '\n') buf[strlen(buf)-1] = 0; *p = calloc(1, sizeof(struct entry_point_item)); (*p)->str = strdup(buf); p = &((*p)->next); } fclose(entry_table_file); return 0; } static int is_entry_point(struct brw_program_instruction *i) { struct entry_point_item *p; assert(i->type == GEN4ASM_INSTRUCTION_LABEL); for (p = entry_point_table; p; p = p->next) { if (strcmp(p->str, i->insn.label.name) == 0) return 1; } return 0; } static void free_entry_point_table(struct entry_point_item *p) { if (p) { free_entry_point_table(p->next); free(p->str); free(p); } } static void print_instruction(FILE *output, struct brw_instruction *instruction) { if (binary_like_output) { fprintf(output, "\t0x%02x, 0x%02x, 0x%02x, 0x%02x, " "0x%02x, 0x%02x, 0x%02x, 0x%02x,\n" "\t0x%02x, 0x%02x, 0x%02x, 0x%02x, " "0x%02x, 0x%02x, 0x%02x, 0x%02x,\n", ((unsigned char *)instruction)[0], ((unsigned char *)instruction)[1], ((unsigned char *)instruction)[2], ((unsigned char *)instruction)[3], ((unsigned char *)instruction)[4], ((unsigned char *)instruction)[5], ((unsigned char *)instruction)[6], ((unsigned char *)instruction)[7], ((unsigned char *)instruction)[8], ((unsigned char *)instruction)[9], ((unsigned char *)instruction)[10], ((unsigned char *)instruction)[11], ((unsigned char *)instruction)[12], ((unsigned char *)instruction)[13], ((unsigned char *)instruction)[14], ((unsigned char *)instruction)[15]); } else { fprintf(output, " { 0x%08x, 0x%08x, 0x%08x, 0x%08x },\n", ((int *)instruction)[0], ((int *)instruction)[1], ((int *)instruction)[2], ((int *)instruction)[3]); } } int main(int argc, char **argv) { char *output_file = NULL; char *entry_table_file = NULL; FILE *output = stdout; FILE *export_file; struct brw_program_instruction *entry, *entry1, *tmp_entry; int err, inst_offset; char o; void *mem_ctx; while ((o = getopt_long(argc, argv, "e:l:o:g:abW", longopts, NULL)) != -1) { switch (o) { case 'o': if (strcmp(optarg, "-") != 0) output_file = optarg; break; case 'g': { char *dec_ptr, *end_ptr; unsigned long decimal; gen_level = strtol(optarg, &dec_ptr, 10) * 10; if (*dec_ptr == '.') { decimal = strtoul(++dec_ptr, &end_ptr, 10); if (end_ptr != dec_ptr && *end_ptr == '\0') { if (decimal > 10) { fprintf(stderr, "Invalid Gen X decimal version\n"); exit(1); } gen_level += decimal; } } if (gen_level < 40 || gen_level > 90) { usage(); exit(1); } break; } case 'a': advanced_flag = 1; break; case 'b': binary_like_output = 1; break; case 'e': need_export = 1; if (strcmp(optarg, "-") != 0) export_filename = optarg; break; case 'l': if (strcmp(optarg, "-") != 0) entry_table_file = optarg; break; case 'W': warning_flags |= WARN_ALL; break; default: usage(); exit(1); } } argc -= optind; argv += optind; if (argc != 1) { usage(); exit(1); } if (strcmp(argv[0], "-") != 0) { input_filename = argv[0]; yyin = fopen(input_filename, "r"); if (yyin == NULL) { perror("Couldn't open input file"); exit(1); } } brw_init_context(&genasm_brw_context, gen_level); mem_ctx = ralloc_context(NULL); brw_init_compile(&genasm_brw_context, &genasm_compile, mem_ctx); err = yyparse(); if (strcmp(argv[0], "-")) fclose(yyin); yylex_destroy(); if (err || errors) exit (1); if (output_file) { output = fopen(output_file, "w"); if (output == NULL) { perror("Couldn't open output file"); exit(1); } } if (read_entry_file(entry_table_file)) { fprintf(stderr, "Read entry file error\n"); exit(1); } inst_offset = 0 ; for (entry = compiled_program.first; entry != NULL; entry = entry->next) { entry->inst_offset = inst_offset; entry1 = entry->next; if (entry1 && is_label(entry1) && is_entry_point(entry1)) { // insert NOP instructions until (inst_offset+1) % 4 == 0 while (((inst_offset+1) % 4) != 0) { tmp_entry = calloc(sizeof(*tmp_entry), 1); tmp_entry->insn.gen.header.opcode = BRW_OPCODE_NOP; entry->next = tmp_entry; tmp_entry->next = entry1; entry = tmp_entry; tmp_entry->inst_offset = ++inst_offset; } } if (!is_label(entry)) inst_offset++; } for (entry = compiled_program.first; entry; entry = entry->next) if (is_label(entry)) add_label(entry); if (need_export) { if (export_filename) { export_file = fopen(export_filename, "w"); } else { export_file = fopen("export.inc", "w"); } for (entry = compiled_program.first; entry != NULL; entry = entry->next) { if (is_label(entry)) fprintf(export_file, "#define %s_IP %d\n", label_name(entry), (IS_GENx(5) ? 2 : 1)*(entry->inst_offset)); } fclose(export_file); } for (entry = compiled_program.first; entry; entry = entry->next) { struct relocation *reloc = &entry->reloc; if (!is_relocatable(entry)) continue; if (reloc->first_reloc_target) reloc->first_reloc_offset = label_to_addr(reloc->first_reloc_target, entry->inst_offset) - entry->inst_offset; if (reloc->second_reloc_target) reloc->second_reloc_offset = label_to_addr(reloc->second_reloc_target, entry->inst_offset) - entry->inst_offset; if (reloc->second_reloc_offset) { // this is a branch instruction with two offset arguments set_branch_two_offsets(entry, reloc->first_reloc_offset, reloc->second_reloc_offset); } else if (reloc->first_reloc_offset) { set_branch_one_offset(entry, reloc->first_reloc_offset); } } if (binary_like_output) fprintf(output, "%s", binary_prepend); for (entry = compiled_program.first; entry != NULL; entry = entry1) { entry1 = entry->next; if (!is_label(entry)) print_instruction(output, &entry->insn.gen); else free(entry->insn.label.name); free(entry); } if (binary_like_output) fprintf(output, "};"); free_entry_point_table(entry_point_table); free_hash_table(declared_register_table); free_label_table(label_table); fflush (output); if (ferror (output)) { perror ("Could not flush output file"); if (output_file) unlink (output_file); err = 1; } return err; } intel-gpu-tools-1.14/assembler/lex.l0000644000175000017500000003130512665336131014354 00000000000000%option yylineno %{ #include #include "gen4asm.h" #include "gram.h" #include "brw_defines.h" #include "string.h" int saved_state = 0; extern char *input_filename; /* Locations */ int yycolumn = 1; #define YY_NO_INPUT #define YY_USER_ACTION \ yylloc.first_line = yylloc.last_line = yylineno; \ yylloc.first_column = yycolumn; \ yylloc.last_column = yycolumn+yyleng-1; \ yycolumn += yyleng; %} %x BLOCK_COMMENT %x CHANNEL %x LINENUMBER %x FILENAME %x REG %x DOTSEL %% \/\/.*[\r\n] { yycolumn = 1; } /* eat up single-line comments */ "\.kernel".*[\r\n] { yycolumn = 1; } "\.end_kernel".*[\r\n] { yycolumn = 1; } "\.code".*[\r\n] { yycolumn = 1; } "\.end_code".*[\r\n] { yycolumn = 1; } /* eat up multi-line comments, non-nesting. */ \/\* { saved_state = YYSTATE; BEGIN(BLOCK_COMMENT); } \*\/ { BEGIN(saved_state); } . { } [\r\n] { } "#line"" "* { yycolumn = 1; saved_state = YYSTATE; BEGIN(LINENUMBER); } [0-9]+" "* { yylineno = atoi (yytext) - 1; BEGIN(FILENAME); } \"[^\"]+\" { char *name = malloc (yyleng - 1); memmove (name, yytext + 1, yyleng - 2); name[yyleng-1] = '\0'; input_filename = name; BEGIN(saved_state); } "x" { yylval.integer = BRW_CHANNEL_X; return X; } "y" { yylval.integer = BRW_CHANNEL_Y; return Y; } "z" { yylval.integer = BRW_CHANNEL_Z; return Z; } "w" { yylval.integer = BRW_CHANNEL_W; return W; } . { yyless(0); BEGIN(INITIAL); } /* used for both null send and null register. */ "null" { return NULL_TOKEN; } /* opcodes */ "mov" { yylval.integer = BRW_OPCODE_MOV; return MOV; } "frc" { yylval.integer = BRW_OPCODE_FRC; return FRC; } "rndu" { yylval.integer = BRW_OPCODE_RNDU; return RNDU; } "rndd" { yylval.integer = BRW_OPCODE_RNDD; return RNDD; } "rnde" { yylval.integer = BRW_OPCODE_RNDE; return RNDE; } "rndz" { yylval.integer = BRW_OPCODE_RNDZ; return RNDZ; } "not" { yylval.integer = BRW_OPCODE_NOT; return NOT; } "lzd" { yylval.integer = BRW_OPCODE_LZD; return LZD; } "f16to32" { yylval.integer = BRW_OPCODE_F16TO32; return F16TO32; } "f32to16" { yylval.integer = BRW_OPCODE_F32TO16; return F32TO16; } "fbh" { yylval.integer = BRW_OPCODE_FBH; return FBH; } "fbl" { yylval.integer = BRW_OPCODE_FBL; return FBL; } "mad" { yylval.integer = BRW_OPCODE_MAD; return MAD; } "lrp" { yylval.integer = BRW_OPCODE_LRP; return LRP; } "bfe" { yylval.integer = BRW_OPCODE_BFE; return BFE; } "bfi1" { yylval.integer = BRW_OPCODE_BFI1; return BFI1; } "bfi2" { yylval.integer = BRW_OPCODE_BFI2; return BFI2; } "bfrev" { yylval.integer = BRW_OPCODE_BFREV; return BFREV; } "mul" { yylval.integer = BRW_OPCODE_MUL; return MUL; } "mac" { yylval.integer = BRW_OPCODE_MAC; return MAC; } "mach" { yylval.integer = BRW_OPCODE_MACH; return MACH; } "line" { yylval.integer = BRW_OPCODE_LINE; return LINE; } "sad2" { yylval.integer = BRW_OPCODE_SAD2; return SAD2; } "sada2" { yylval.integer = BRW_OPCODE_SADA2; return SADA2; } "dp4" { yylval.integer = BRW_OPCODE_DP4; return DP4; } "dph" { yylval.integer = BRW_OPCODE_DPH; return DPH; } "dp3" { yylval.integer = BRW_OPCODE_DP3; return DP3; } "dp2" { yylval.integer = BRW_OPCODE_DP2; return DP2; } "cbit" { yylval.integer = BRW_OPCODE_CBIT; return CBIT; } "avg" { yylval.integer = BRW_OPCODE_AVG; return AVG; } "add" { yylval.integer = BRW_OPCODE_ADD; return ADD; } "addc" { yylval.integer = BRW_OPCODE_ADDC; return ADDC; } "sel" { yylval.integer = BRW_OPCODE_SEL; return SEL; } "and" { yylval.integer = BRW_OPCODE_AND; return AND; } "or" { yylval.integer = BRW_OPCODE_OR; return OR; } "xor" { yylval.integer = BRW_OPCODE_XOR; return XOR; } "shr" { yylval.integer = BRW_OPCODE_SHR; return SHR; } "shl" { yylval.integer = BRW_OPCODE_SHL; return SHL; } "asr" { yylval.integer = BRW_OPCODE_ASR; return ASR; } "cmp" { yylval.integer = BRW_OPCODE_CMP; return CMP; } "cmpn" { yylval.integer = BRW_OPCODE_CMPN; return CMPN; } "subb" { yylval.integer = BRW_OPCODE_SUBB; return SUBB; } "send" { yylval.integer = BRW_OPCODE_SEND; return SEND; } "sendc" { yylval.integer = BRW_OPCODE_SENDC; return SENDC; } "nop" { yylval.integer = BRW_OPCODE_NOP; return NOP; } "jmpi" { yylval.integer = BRW_OPCODE_JMPI; return JMPI; } "if" { yylval.integer = BRW_OPCODE_IF; return IF; } "iff" { yylval.integer = BRW_OPCODE_IFF; return IFF; } "while" { yylval.integer = BRW_OPCODE_WHILE; return WHILE; } "else" { yylval.integer = BRW_OPCODE_ELSE; return ELSE; } "break" { yylval.integer = BRW_OPCODE_BREAK; return BREAK; } "cont" { yylval.integer = BRW_OPCODE_CONTINUE; return CONT; } "halt" { yylval.integer = BRW_OPCODE_HALT; return HALT; } "msave" { yylval.integer = BRW_OPCODE_MSAVE; return MSAVE; } "push" { yylval.integer = BRW_OPCODE_PUSH; return PUSH; } "mrest" { yylval.integer = BRW_OPCODE_MRESTORE; return MREST; } "pop" { yylval.integer = BRW_OPCODE_POP; return POP; } "wait" { yylval.integer = BRW_OPCODE_WAIT; return WAIT; } "do" { yylval.integer = BRW_OPCODE_DO; return DO; } "endif" { yylval.integer = BRW_OPCODE_ENDIF; return ENDIF; } "call" { yylval.integer = BRW_OPCODE_CALL; return CALL; } "ret" { yylval.integer = BRW_OPCODE_RET; return RET; } "brd" { yylval.integer = BRW_OPCODE_BRD; return BRD; } "brc" { yylval.integer = BRW_OPCODE_BRC; return BRC; } "pln" { yylval.integer = BRW_OPCODE_PLN; return PLN; } /* send argument tokens */ "mlen" { return MSGLEN; } "rlen" { return RETURNLEN; } "math" { if (IS_GENp(6)) { yylval.integer = BRW_OPCODE_MATH; return MATH_INST; } else return MATH; } "sampler" { return SAMPLER; } "gateway" { return GATEWAY; } "read" { return READ; } "write" { return WRITE; } "urb" { return URB; } "thread_spawner" { return THREAD_SPAWNER; } "vme" { return VME; } "cre" { return CRE; } "data_port" { return DATA_PORT; } "allocate" { return ALLOCATE; } "used" { return USED; } "complete" { return COMPLETE; } "transpose" { return TRANSPOSE; } "interleave" { return INTERLEAVE; } ";" { return SEMICOLON; } "(" { return LPAREN; } ")" { return RPAREN; } "<" { return LANGLE; } ">" { return RANGLE; } "{" { return LCURLY; } "}" { return RCURLY; } "[" { return LSQUARE; } "]" { return RSQUARE; } "," { return COMMA; } "." { BEGIN(CHANNEL); return DOT; } "+" { return PLUS; } "-" { return MINUS; } "*" { return MULTIPLY;} "/" { return DIVIDE; } ":" { return COLON; } "=" { return EQ; } "(abs)" { return ABS; } /* Most register accesses are lexed as REGFILE[0-9]+, to prevent the register * with subreg from being lexed as REGFILE NUMBER instead of * REGISTER INTEGER DOT INTEGER like we want. The alternative was to use a * start condition, which wasn't very clean-looking. * * However, this means we need to lex the general and message register file * characters as well, for register-indirect access which is formatted * like g[a#.#] or m[a#.#]. */ "acc"[0-9]+ { yylval.integer = atoi(yytext + 3); return ACCREG; } "a"[0-9]+ { yylval.integer = atoi(yytext + 1); return ADDRESSREG; } "m"[0-9]+ { yylval.integer = atoi(yytext + 1); return MSGREG; } "m" { return MSGREGFILE; } "mask"[0-9]+ { yylval.integer = atoi(yytext + 4); return MASKREG; } "ms"[0-9]+ { yylval.integer = atoi(yytext + 2); return MASKSTACKREG; } "msd"[0-9]+ { yylval.integer = atoi(yytext + 3); return MASKSTACKDEPTHREG; } "n0."[0-9]+ { yylval.integer = atoi(yytext + 3); return NOTIFYREG; } "n"[0-9]+ { yylval.integer = atoi(yytext + 1); return NOTIFYREG; } "f"[0-9] { yylval.integer = atoi(yytext + 1); return FLAGREG; } [gr][0-9]+ { yylval.integer = atoi(yytext + 1); BEGIN(REG); return GENREG; } "<" { return LANGLE; } [0-9][0-9]* { yylval.integer = strtoul(yytext, NULL, 10); return INTEGER; } ">" { return RANGLE; } "," { return COMMA; } "." { BEGIN(DOTSEL); return DOT; } ";" { return SEMICOLON; } "x" { yylval.integer = BRW_CHANNEL_X; return X; } "y" { yylval.integer = BRW_CHANNEL_Y; return Y; } "z" { yylval.integer = BRW_CHANNEL_Z; return Z; } "w" { yylval.integer = BRW_CHANNEL_W; return W; } [0-9][0-9]* { yylval.integer = strtoul(yytext, NULL, 10); BEGIN(REG); return INTEGER; } . { yyless(0); BEGIN(INITIAL); } [gr] { return GENREGFILE; } "cr"[0-9]+ { yylval.integer = atoi(yytext + 2); return CONTROLREG; } "sr"[0-9]+ { yylval.integer = atoi(yytext + 2); return STATEREG; } "ip" { return IPREG; } "amask" { yylval.integer = BRW_AMASK; return AMASK; } "imask" { yylval.integer = BRW_IMASK; return IMASK; } "lmask" { yylval.integer = BRW_LMASK; return LMASK; } "cmask" { yylval.integer = BRW_CMASK; return CMASK; } "imsd" { yylval.integer = 0; return IMSD; } "lmsd" { yylval.integer = 1; return LMSD; } "ims" { yylval.integer = 0; return IMS; } "lms" { yylval.integer = 16; return LMS; } . { yyless(0); BEGIN(INITIAL); } /* * Lexing of register types should probably require the ":" symbol specified * in the BNF of the assembly, but our existing source didn't use that syntax. */ "UD" { return TYPE_UD; } ":UD" { return TYPE_UD; } "D" { return TYPE_D; } ":D" { return TYPE_D; } "UW" { return TYPE_UW; } ":UW" { return TYPE_UW; } "W" { return TYPE_W; } ":W" { return TYPE_W; } "UB" { return TYPE_UB; } ":UB" { return TYPE_UB; } "B" { return TYPE_B; } ":B" { return TYPE_B; } "F" { return TYPE_F; } ":F" { return TYPE_F; } "VF" {return TYPE_VF; } ":VF" {return TYPE_VF; } "V" { return TYPE_V; } ":V" { return TYPE_V; } #".kernel" { return KERNEL_PRAGMA;} #".end_kernel" { return END_KERNEL_PRAGMA;} #".code" { return CODE_PRAGMA;} #".end_code" { return END_CODE_PRAGMA;} ".reg_count_payload" { return REG_COUNT_PAYLOAD_PRAGMA; } ".reg_count_total" { return REG_COUNT_TOTAL_PRAGMA; } ".default_execution_size" { return DEFAULT_EXEC_SIZE_PRAGMA; } ".default_register_type" { return DEFAULT_REG_TYPE_PRAGMA; } ".declare" { return DECLARE_PRAGMA; } "Base" { return BASE; } "ElementSize" { return ELEMENTSIZE; } "SrcRegion" { return SRCREGION; } "DstRegion" { return DSTREGION; } "Type" { return TYPE; } ".sat" { return SATURATE; } "align1" { return ALIGN1; } "align16" { return ALIGN16; } "sechalf" { return SECHALF; } "compr" { return COMPR; } "switch" { return SWITCH; } "atomic" { return ATOMIC; } "noddchk" { return NODDCHK; } "noddclr" { return NODDCLR; } "mask_disable" { return MASK_DISABLE; } "nomask" { return MASK_DISABLE; } "breakpoint" { return BREAKPOINT; } "accwrctrl" { return ACCWRCTRL; } "EOT" { return EOT; } /* extended math functions */ "inv" { yylval.integer = BRW_MATH_FUNCTION_INV; return SIN; } "log" { yylval.integer = BRW_MATH_FUNCTION_LOG; return LOG; } "exp" { yylval.integer = BRW_MATH_FUNCTION_EXP; return EXP; } "sqrt" { yylval.integer = BRW_MATH_FUNCTION_SQRT; return SQRT; } "rsq" { yylval.integer = BRW_MATH_FUNCTION_RSQ; return RSQ; } "pow" { yylval.integer = BRW_MATH_FUNCTION_POW; return POW; } "sin" { yylval.integer = BRW_MATH_FUNCTION_SIN; return SIN; } "cos" { yylval.integer = BRW_MATH_FUNCTION_COS; return COS; } "sincos" { yylval.integer = BRW_MATH_FUNCTION_SINCOS; return SINCOS; } "intdiv" { yylval.integer = BRW_MATH_FUNCTION_INT_DIV_QUOTIENT; return INTDIV; } "intmod" { yylval.integer = BRW_MATH_FUNCTION_INT_DIV_REMAINDER; return INTMOD; } "intdivmod" { yylval.integer = BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER; return INTDIVMOD; } "signed" { return SIGNED; } "scalar" { return SCALAR; } /* predicate control */ ".anyv" { return ANYV; } ".allv" { return ALLV; } ".any2h" { return ANY2H; } ".all2h" { return ALL2H; } ".any4h" { return ANY4H; } ".all4h" { return ALL4H; } ".any8h" { return ANY8H; } ".all8h" { return ALL8H; } ".any16h" { return ANY16H; } ".all16h" { return ALL16H; } ".z" { yylval.integer = BRW_CONDITIONAL_Z; return ZERO; } ".e" { yylval.integer = BRW_CONDITIONAL_Z; return EQUAL; } ".nz" { yylval.integer = BRW_CONDITIONAL_NZ; return NOT_ZERO; } ".ne" { yylval.integer = BRW_CONDITIONAL_NZ; return NOT_EQUAL; } ".g" { yylval.integer = BRW_CONDITIONAL_G; return GREATER; } ".ge" { yylval.integer = BRW_CONDITIONAL_GE; return GREATER_EQUAL; } ".l" { yylval.integer = BRW_CONDITIONAL_L; return LESS; } ".le" { yylval.integer = BRW_CONDITIONAL_LE; return LESS_EQUAL; } ".r" { yylval.integer = BRW_CONDITIONAL_R; return ROUND_INCREMENT; } ".o" { yylval.integer = BRW_CONDITIONAL_O; return OVERFLOW; } ".u" { yylval.integer = BRW_CONDITIONAL_U; return UNORDERED; } [a-zA-Z_][0-9a-zA-Z_]* { yylval.string = strdup(yytext); return STRING; } 0x[0-9a-fA-F][0-9a-fA-F]* { yylval.integer = strtoul(yytext + 2, NULL, 16); return INTEGER; } [0-9][0-9]* { yylval.integer = strtoul(yytext, NULL, 10); return INTEGER; } [-]?[0-9]+"."[0-9]+ { yylval.number = strtod(yytext, NULL); return NUMBER; } [ \t]+ { } /* eat up whitespace */ \n { yycolumn = 1; } . { fprintf(stderr, "%s: %d: %s at \"%s\"\n", input_filename, yylineno, "unexpected token", lex_text()); } %% char * lex_text(void) { return yytext; (void) yyunput; } #ifndef yywrap int yywrap() { return 1; } #endif intel-gpu-tools-1.14/assembler/gen8_instruction.c0000644000175000017500000003547212665336131017066 00000000000000/* * Copyright © 2012 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ /** @file gen8_instruction.cpp * * A representation of a Gen8+ EU instruction, with helper methods to get * and set various fields. This is the actual hardware format. */ #include "brw_defines.h" #include "gen8_instruction.h" void gen8_set_dst(struct gen8_instruction *inst, struct brw_reg reg) { /* MRFs haven't existed since Gen7, so we better not be using them. */ if (reg.file == BRW_MESSAGE_REGISTER_FILE) { reg.file = BRW_GENERAL_REGISTER_FILE; reg.nr += GEN7_MRF_HACK_START; } assert(reg.file != BRW_MESSAGE_REGISTER_FILE); if (reg.file == BRW_GENERAL_REGISTER_FILE) assert(reg.nr < BRW_MAX_GRF); gen8_set_dst_reg_file(inst, reg.file); gen8_set_dst_reg_type(inst, reg.type); if (reg.address_mode == BRW_ADDRESS_DIRECT) { gen8_set_dst_da_reg_nr(inst, reg.nr); if (gen8_access_mode(inst) == BRW_ALIGN_1) { /* Set Dst.SubRegNum[4:0] */ gen8_set_dst_da1_subreg_nr(inst, reg.subnr); /* Set Dst.HorzStride */ if (reg.hstride == BRW_HORIZONTAL_STRIDE_0) reg.hstride = BRW_HORIZONTAL_STRIDE_1; gen8_set_dst_da1_hstride(inst, reg.hstride); } else { /* Align16 SubRegNum only has a single bit (bit 4; bits 3:0 MBZ). */ assert(reg.subnr == 0 || reg.subnr == 16); gen8_set_dst_da16_subreg_nr(inst, reg.subnr >> 4); gen8_set_da16_writemask(inst, reg.dw1.bits.writemask); } } else { /* Indirect mode */ assert (gen8_access_mode(inst) == BRW_ALIGN_1); gen8_set_dst_addr_mode(inst, BRW_ADDRESS_REGISTER_INDIRECT_REGISTER); /* Set Dst.HorzStride */ if (reg.hstride == BRW_HORIZONTAL_STRIDE_0) reg.hstride = BRW_HORIZONTAL_STRIDE_1; gen8_set_dst_da1_hstride(inst, reg.hstride); gen8_set_dst_ida1_sub_nr(inst, reg.subnr); gen8_set_dst_ida1_imm8(inst, (reg.dw1.bits.indirect_offset & IMM8_MASK)); if ((reg.dw1.bits.indirect_offset & IMM9_MASK) == IMM9_MASK) gen8_set_dst_ida1_imm9(inst, 1); else gen8_set_dst_ida1_imm9(inst, 0); } /* Generators should set a default exec_size of either 8 (SIMD4x2 or SIMD8) * or 16 (SIMD16), as that's normally correct. However, when dealing with * small registers, we automatically reduce it to match the register size. */ if (reg.width < BRW_EXECUTE_8) gen8_set_exec_size(inst, reg.width); } static void gen8_validate_reg(struct gen8_instruction *inst, struct brw_reg reg) { int hstride_for_reg[] = {0, 1, 2, 4}; int vstride_for_reg[] = {0, 1, 2, 4, 8, 16, 32, 64, 128, 256}; int width_for_reg[] = {1, 2, 4, 8, 16}; int execsize_for_reg[] = {1, 2, 4, 8, 16}; int width, hstride, vstride, execsize; if (reg.file == BRW_IMMEDIATE_VALUE) { /* TODO: check immediate vectors */ return; } if (reg.file == BRW_ARCHITECTURE_REGISTER_FILE) return; assert(reg.hstride >= 0 && reg.hstride < Elements(hstride_for_reg)); hstride = hstride_for_reg[reg.hstride]; if (reg.vstride == 0xf) { vstride = -1; } else { assert(reg.vstride >= 0 && reg.vstride < Elements(vstride_for_reg)); vstride = vstride_for_reg[reg.vstride]; } assert(reg.width >= 0 && reg.width < Elements(width_for_reg)); width = width_for_reg[reg.width]; assert(gen8_exec_size(inst) >= 0 && gen8_exec_size(inst) < Elements(execsize_for_reg)); execsize = execsize_for_reg[gen8_exec_size(inst)]; /* Restrictions from 3.3.10: Register Region Restrictions. */ /* 3. */ assert(execsize >= width); /* 4. */ if (execsize == width && hstride != 0) { assert(vstride == -1 || vstride == width * hstride); } /* 5. */ if (execsize == width && hstride == 0) { /* no restriction on vstride. */ } /* 6. */ if (width == 1) { assert(hstride == 0); } /* 7. */ if (execsize == 1 && width == 1) { assert(hstride == 0); assert(vstride == 0); } /* 8. */ if (vstride == 0 && hstride == 0) { assert(width == 1); } /* 10. Check destination issues. */ } void gen8_set_src0(struct gen8_instruction *inst, struct brw_reg reg) { /* MRFs haven't existed since Gen7, so we better not be using them. */ if (reg.file == BRW_MESSAGE_REGISTER_FILE) { reg.file = BRW_GENERAL_REGISTER_FILE; reg.nr += GEN7_MRF_HACK_START; } if (reg.file == BRW_GENERAL_REGISTER_FILE) assert(reg.nr < BRW_MAX_GRF); gen8_validate_reg(inst, reg); gen8_set_src0_reg_file(inst, reg.file); gen8_set_src0_reg_type(inst, reg.type); gen8_set_src0_abs(inst, reg.abs); gen8_set_src0_negate(inst, reg.negate); if (reg.file == BRW_IMMEDIATE_VALUE) { inst->data[3] = reg.dw1.ud; /* Required to set some fields in src1 as well: */ gen8_set_src1_reg_file(inst, 0); /* arf */ gen8_set_src1_reg_type(inst, reg.type); } else if (reg.address_mode == BRW_ADDRESS_DIRECT) { gen8_set_src0_da_reg_nr(inst, reg.nr); if (gen8_access_mode(inst) == BRW_ALIGN_1) { /* Set Src0.SubRegNum[4:0] */ gen8_set_src0_da1_subreg_nr(inst, reg.subnr); if (reg.width == BRW_WIDTH_1 && gen8_exec_size(inst) == BRW_EXECUTE_1) { gen8_set_src0_da1_hstride(inst, BRW_HORIZONTAL_STRIDE_0); gen8_set_src0_vert_stride(inst, BRW_VERTICAL_STRIDE_0); } else { gen8_set_src0_da1_hstride(inst, reg.hstride); gen8_set_src0_vert_stride(inst, reg.vstride); } gen8_set_src0_da1_width(inst, reg.width); } else { /* Align16 SubRegNum only has a single bit (bit 4; bits 3:0 MBZ). */ assert(reg.subnr == 0 || reg.subnr == 16); gen8_set_src0_da16_subreg_nr(inst, reg.subnr >> 4); gen8_set_src0_da16_swiz_x(inst, BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_X)); gen8_set_src0_da16_swiz_y(inst, BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Y)); gen8_set_src0_da16_swiz_z(inst, BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Z)); gen8_set_src0_da16_swiz_w(inst, BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_W)); /* This is an oddity of the fact that we're using the same * descriptions for registers in both Align16 and Align1 modes. */ if (reg.vstride == BRW_VERTICAL_STRIDE_8) gen8_set_src0_vert_stride(inst, BRW_VERTICAL_STRIDE_4); else gen8_set_src0_vert_stride(inst, reg.vstride); } } else if (reg.address_mode == BRW_ADDRESS_REGISTER_INDIRECT_REGISTER) { assert (gen8_access_mode(inst) == BRW_ALIGN_1); if (reg.width == BRW_WIDTH_1 && gen8_exec_size(inst) == BRW_EXECUTE_1) { gen8_set_src0_da1_hstride(inst, BRW_HORIZONTAL_STRIDE_0); gen8_set_src0_vert_stride(inst, BRW_VERTICAL_STRIDE_0); } else { gen8_set_src0_da1_hstride(inst, reg.hstride); gen8_set_src0_vert_stride(inst, reg.vstride); } gen8_set_src0_da1_width(inst, reg.width); gen8_set_src0_ida1_sub_nr(inst, reg.subnr); gen8_set_src0_addr_mode(inst, BRW_ADDRESS_REGISTER_INDIRECT_REGISTER); gen8_set_src0_ida1_imm8(inst, (reg.dw1.bits.indirect_offset & IMM8_MASK)); if ((reg.dw1.bits.indirect_offset & IMM9_MASK) == IMM9_MASK) gen8_set_src0_ida1_imm9(inst, 1); else gen8_set_src0_ida1_imm9(inst, 0); } } void gen8_set_src1(struct gen8_instruction *inst, struct brw_reg reg) { /* MRFs haven't existed since Gen7, so we better not be using them. */ if (reg.file == BRW_MESSAGE_REGISTER_FILE) { reg.file = BRW_GENERAL_REGISTER_FILE; reg.nr += GEN7_MRF_HACK_START; } if (reg.file == BRW_GENERAL_REGISTER_FILE) assert(reg.nr < BRW_MAX_GRF); gen8_validate_reg(inst, reg); gen8_set_src1_reg_file(inst, reg.file); gen8_set_src1_reg_type(inst, reg.type); gen8_set_src1_abs(inst, reg.abs); gen8_set_src1_negate(inst, reg.negate); /* Only src1 can be an immediate in two-argument instructions. */ assert(gen8_src0_reg_file(inst) != BRW_IMMEDIATE_VALUE); if (reg.file == BRW_IMMEDIATE_VALUE) { inst->data[3] = reg.dw1.ud; } else if (reg.address_mode == BRW_ADDRESS_DIRECT) { gen8_set_src1_da_reg_nr(inst, reg.nr); if (gen8_access_mode(inst) == BRW_ALIGN_1) { /* Set Src0.SubRegNum[4:0] */ gen8_set_src1_da1_subreg_nr(inst, reg.subnr); if (reg.width == BRW_WIDTH_1 && gen8_exec_size(inst) == BRW_EXECUTE_1) { gen8_set_src1_da1_hstride(inst, BRW_HORIZONTAL_STRIDE_0); gen8_set_src1_vert_stride(inst, BRW_VERTICAL_STRIDE_0); } else { gen8_set_src1_da1_hstride(inst, reg.hstride); gen8_set_src1_vert_stride(inst, reg.vstride); } gen8_set_src1_da1_width(inst, reg.width); } else { /* Align16 SubRegNum only has a single bit (bit 4; bits 3:0 MBZ). */ assert(reg.subnr == 0 || reg.subnr == 16); gen8_set_src1_da16_subreg_nr(inst, reg.subnr >> 4); gen8_set_src1_da16_swiz_x(inst, BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_X)); gen8_set_src1_da16_swiz_y(inst, BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Y)); gen8_set_src1_da16_swiz_z(inst, BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Z)); gen8_set_src1_da16_swiz_w(inst, BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_W)); /* This is an oddity of the fact that we're using the same * descriptions for registers in both Align16 and Align1 modes. */ if (reg.vstride == BRW_VERTICAL_STRIDE_8) gen8_set_src1_vert_stride(inst, BRW_VERTICAL_STRIDE_4); else gen8_set_src1_vert_stride(inst, reg.vstride); } } else if (reg.address_mode == BRW_ADDRESS_REGISTER_INDIRECT_REGISTER) { assert (gen8_access_mode(inst) == BRW_ALIGN_1); if (reg.width == BRW_WIDTH_1 && gen8_exec_size(inst) == BRW_EXECUTE_1) { gen8_set_src1_da1_hstride(inst, BRW_HORIZONTAL_STRIDE_0); gen8_set_src1_vert_stride(inst, BRW_VERTICAL_STRIDE_0); } else { gen8_set_src1_da1_hstride(inst, reg.hstride); gen8_set_src1_vert_stride(inst, reg.vstride); } gen8_set_src1_da1_width(inst, reg.width); gen8_set_src1_ida1_sub_nr(inst, reg.subnr); gen8_set_src1_addr_mode(inst, BRW_ADDRESS_REGISTER_INDIRECT_REGISTER); gen8_set_src1_ida1_imm8(inst, (reg.dw1.bits.indirect_offset & IMM8_MASK)); if ((reg.dw1.bits.indirect_offset & IMM9_MASK) == IMM9_MASK) gen8_set_src1_ida1_imm9(inst, 1); else gen8_set_src1_ida1_imm9(inst, 0); } } /** * Set the Message Descriptor and Extended Message Descriptor fields * for SEND messages. * * \note This zeroes out the Function Control bits, so it must be called * \b before filling out any message-specific data. Callers can * choose not to fill in irrelevant bits; they will be zero. */ static void gen8_set_message_descriptor(struct gen8_instruction *inst, enum brw_message_target sfid, unsigned msg_length, unsigned response_length, bool header_present, bool end_of_thread) { gen8_set_src1(inst, brw_imm_d(0)); gen8_set_sfid(inst, sfid); gen8_set_mlen(inst, msg_length); gen8_set_rlen(inst, response_length); gen8_set_header_present(inst, header_present); gen8_set_eot(inst, end_of_thread); } void gen8_set_urb_message(struct gen8_instruction *inst, unsigned opcode, unsigned msg_length, unsigned response_length, bool end_of_thread, unsigned offset, bool interleave) { gen8_set_message_descriptor(inst, BRW_SFID_URB, msg_length, response_length, true, end_of_thread); gen8_set_src0(inst, brw_vec8_grf(GEN7_MRF_HACK_START + 1, 0)); gen8_set_urb_opcode(inst, 0); /* URB_WRITE_HWORD */ gen8_set_urb_global_offset(inst, offset); gen8_set_urb_interleave(inst, interleave); /* per_slot_offset = 0 makes it ignore offsets in message header */ gen8_set_urb_per_slot_offset(inst, 0); } void gen8_set_sampler_message(struct gen8_instruction *inst, unsigned binding_table_index, unsigned sampler, unsigned msg_type, unsigned response_length, unsigned msg_length, bool header_present, unsigned simd_mode) { gen8_set_message_descriptor(inst, BRW_SFID_SAMPLER, msg_length, response_length, header_present, false); gen8_set_binding_table_index(inst, binding_table_index); gen8_set_sampler(inst, sampler); gen8_set_sampler_msg_type(inst, msg_type); gen8_set_sampler_simd_mode(inst, simd_mode); } void gen8_set_dp_message(struct gen8_instruction *inst, enum brw_message_target sfid, unsigned binding_table_index, unsigned msg_type, unsigned msg_control, unsigned mlen, unsigned rlen, bool header_present, bool end_of_thread) { /* Binding table index is from 0..255 */ assert((binding_table_index & 0xff) == binding_table_index); /* Message Type is only 5 bits */ assert((msg_type & 0x1f) == msg_type); /* Message Control is only 6 bits */ assert((msg_control & 0x3f) == msg_control); gen8_set_message_descriptor(inst, sfid, mlen, rlen, header_present, end_of_thread); gen8_set_function_control(inst, binding_table_index | msg_type << 14 | msg_control << 8); } void gen9_set_send_extdesc(struct gen8_instruction *inst, unsigned int value) { unsigned int extdesc; extdesc = (value >> 16) & 0x0f; gen8_set_bits(inst, 67, 64, extdesc); extdesc = (value >> 20) & 0x0f; gen8_set_bits(inst, 83, 80, extdesc); extdesc = (value >> 24) & 0x0f; gen8_set_bits(inst, 88, 85, extdesc); extdesc = (value >> 28) & 0x0f; gen8_set_bits(inst, 94, 91, extdesc); } intel-gpu-tools-1.14/assembler/brw_eu_emit.c0000644000175000017500000024351012665336131016057 00000000000000/* Copyright (C) Intel Corp. 2006. All Rights Reserved. Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to develop this 3D driver. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **********************************************************************/ /* * Authors: * Keith Whitwell */ #include #include "brw_context.h" #include "brw_defines.h" #include "brw_eu.h" #include "ralloc.h" /*********************************************************************** * Internal helper for constructing instructions */ static void guess_execution_size(struct brw_compile *p, struct brw_instruction *insn, struct brw_reg reg) { if (reg.width == BRW_WIDTH_8 && p->compressed) insn->header.execution_size = BRW_EXECUTE_16; else insn->header.execution_size = reg.width; /* note - definitions are compatible */ } /** * Prior to Sandybridge, the SEND instruction accepted non-MRF source * registers, implicitly moving the operand to a message register. * * On Sandybridge, this is no longer the case. This function performs the * explicit move; it should be called before emitting a SEND instruction. */ void gen6_resolve_implied_move(struct brw_compile *p, struct brw_reg *src, unsigned msg_reg_nr) { struct intel_context *intel = &p->brw->intel; if (intel->gen < 6) return; if (src->file == BRW_MESSAGE_REGISTER_FILE) return; if (src->file != BRW_ARCHITECTURE_REGISTER_FILE || src->nr != BRW_ARF_NULL) { brw_push_insn_state(p); brw_set_mask_control(p, BRW_MASK_DISABLE); brw_set_compression_control(p, BRW_COMPRESSION_NONE); brw_MOV(p, retype(brw_message_reg(msg_reg_nr), BRW_REGISTER_TYPE_UD), retype(*src, BRW_REGISTER_TYPE_UD)); brw_pop_insn_state(p); } *src = brw_message_reg(msg_reg_nr); } static void gen7_convert_mrf_to_grf(struct brw_compile *p, struct brw_reg *reg) { /* From the BSpec / ISA Reference / send - [DevIVB+]: * "The send with EOT should use register space R112-R127 for . This is * to enable loading of a new thread into the same slot while the message * with EOT for current thread is pending dispatch." * * Since we're pretending to have 16 MRFs anyway, we may as well use the * registers required for messages with EOT. */ struct intel_context *intel = &p->brw->intel; if (intel->gen == 7 && reg->file == BRW_MESSAGE_REGISTER_FILE) { reg->file = BRW_GENERAL_REGISTER_FILE; reg->nr += GEN7_MRF_HACK_START; } } void brw_set_dest(struct brw_compile *p, struct brw_instruction *insn, struct brw_reg dest) { if (dest.file != BRW_ARCHITECTURE_REGISTER_FILE && dest.file != BRW_MESSAGE_REGISTER_FILE) assert(dest.nr < 128); gen7_convert_mrf_to_grf(p, &dest); insn->bits1.da1.dest_reg_file = dest.file; insn->bits1.da1.dest_reg_type = dest.type; insn->bits1.da1.dest_address_mode = dest.address_mode; if (dest.address_mode == BRW_ADDRESS_DIRECT) { insn->bits1.da1.dest_reg_nr = dest.nr; if (insn->header.access_mode == BRW_ALIGN_1) { insn->bits1.da1.dest_subreg_nr = dest.subnr; if (dest.hstride == BRW_HORIZONTAL_STRIDE_0) dest.hstride = BRW_HORIZONTAL_STRIDE_1; insn->bits1.da1.dest_horiz_stride = dest.hstride; } else { insn->bits1.da16.dest_subreg_nr = dest.subnr / 16; insn->bits1.da16.dest_writemask = dest.dw1.bits.writemask; /* even ignored in da16, still need to set as '01' */ insn->bits1.da16.dest_horiz_stride = 1; } } else { insn->bits1.ia1.dest_subreg_nr = dest.subnr; /* These are different sizes in align1 vs align16: */ if (insn->header.access_mode == BRW_ALIGN_1) { insn->bits1.ia1.dest_indirect_offset = dest.dw1.bits.indirect_offset; if (dest.hstride == BRW_HORIZONTAL_STRIDE_0) dest.hstride = BRW_HORIZONTAL_STRIDE_1; insn->bits1.ia1.dest_horiz_stride = dest.hstride; } else { insn->bits1.ia16.dest_indirect_offset = dest.dw1.bits.indirect_offset; /* even ignored in da16, still need to set as '01' */ insn->bits1.ia16.dest_horiz_stride = 1; } } /* NEW: Set the execution size based on dest.width and * insn->compression_control: */ guess_execution_size(p, insn, dest); } extern int reg_type_size[]; static void validate_reg(struct brw_instruction *insn, struct brw_reg reg) { int hstride_for_reg[] = {0, 1, 2, 4}; int vstride_for_reg[] = {0, 1, 2, 4, 8, 16, 32, 64, 128, 256}; int width_for_reg[] = {1, 2, 4, 8, 16}; int execsize_for_reg[] = {1, 2, 4, 8, 16, 32}; int width, hstride, vstride, execsize; if (reg.file == BRW_IMMEDIATE_VALUE) { /* 3.3.6: Region Parameters. Restriction: Immediate vectors * mean the destination has to be 128-bit aligned and the * destination horiz stride has to be a word. */ if (reg.type == BRW_REGISTER_TYPE_V) { assert(hstride_for_reg[insn->bits1.da1.dest_horiz_stride] * reg_type_size[insn->bits1.da1.dest_reg_type] == 2); } return; } if (reg.file == BRW_ARCHITECTURE_REGISTER_FILE && reg.file == BRW_ARF_NULL) return; assert(reg.hstride >= 0 && reg.hstride < Elements(hstride_for_reg)); hstride = hstride_for_reg[reg.hstride]; if (reg.vstride == 0xf) { vstride = -1; } else { assert(reg.vstride >= 0 && reg.vstride < Elements(vstride_for_reg)); vstride = vstride_for_reg[reg.vstride]; } assert(reg.width >= 0 && reg.width < Elements(width_for_reg)); width = width_for_reg[reg.width]; assert(insn->header.execution_size >= 0 && insn->header.execution_size < Elements(execsize_for_reg)); execsize = execsize_for_reg[insn->header.execution_size]; /* Restrictions from 3.3.10: Register Region Restrictions. */ /* 3. */ assert(execsize >= width); /* FIXME: the assembler has a lot of code written that triggers the * assertions commented it below. Let's paper over it (for now!) until we * can re-validate the shaders with those little inconsistencies fixed. */ /* 4. */ #if 0 if (execsize == width && hstride != 0) { assert(vstride == -1 || vstride == width * hstride); } #endif /* 5. */ if (execsize == width && hstride == 0) { /* no restriction on vstride. */ } /* 6. */ #if 0 if (width == 1) { assert(hstride == 0); } #endif /* 7. */ #if 0 if (execsize == 1 && width == 1) { assert(hstride == 0); assert(vstride == 0); } #endif /* 8. */ if (vstride == 0 && hstride == 0) { assert(width == 1); } /* 10. Check destination issues. */ } void brw_set_src0(struct brw_compile *p, struct brw_instruction *insn, struct brw_reg reg) { struct brw_context *brw = p->brw; struct intel_context *intel = &brw->intel; if (reg.file != BRW_ARCHITECTURE_REGISTER_FILE) assert(reg.nr < 128); gen7_convert_mrf_to_grf(p, ®); if (intel->gen >= 6 && (insn->header.opcode == BRW_OPCODE_SEND || insn->header.opcode == BRW_OPCODE_SENDC)) { /* Any source modifiers or regions will be ignored, since this just * identifies the MRF/GRF to start reading the message contents from. * Check for some likely failures. */ assert(!reg.negate); assert(!reg.abs); assert(reg.address_mode == BRW_ADDRESS_DIRECT); } validate_reg(insn, reg); insn->bits1.da1.src0_reg_file = reg.file; insn->bits1.da1.src0_reg_type = reg.type; insn->bits2.da1.src0_abs = reg.abs; insn->bits2.da1.src0_negate = reg.negate; insn->bits2.da1.src0_address_mode = reg.address_mode; if (reg.file == BRW_IMMEDIATE_VALUE) { insn->bits3.ud = reg.dw1.ud; /* Required to set some fields in src1 as well: */ /* FIXME: This looks quite wrong, tempering with src1. I did not find * anything in the bspec that was hinting it woud be needed when setting * src0. before removing this one needs to run piglit. insn->bits1.da1.src1_reg_file = 0; insn->bits1.da1.src1_reg_type = reg.type; */ } else { if (reg.address_mode == BRW_ADDRESS_DIRECT) { if (insn->header.access_mode == BRW_ALIGN_1) { insn->bits2.da1.src0_subreg_nr = reg.subnr; insn->bits2.da1.src0_reg_nr = reg.nr; } else { insn->bits2.da16.src0_subreg_nr = reg.subnr / 16; insn->bits2.da16.src0_reg_nr = reg.nr; } } else { insn->bits2.ia1.src0_subreg_nr = reg.subnr; if (insn->header.access_mode == BRW_ALIGN_1) { insn->bits2.ia1.src0_indirect_offset = reg.dw1.bits.indirect_offset; } else { insn->bits2.ia16.src0_subreg_nr = reg.dw1.bits.indirect_offset; } } if (insn->header.access_mode == BRW_ALIGN_1) { /* FIXME: While this is correct, if the assembler uses that code path * the opcode generated are different and thus needs a validation * pass. if (reg.width == BRW_WIDTH_1 && insn->header.execution_size == BRW_EXECUTE_1) { insn->bits2.da1.src0_horiz_stride = BRW_HORIZONTAL_STRIDE_0; insn->bits2.da1.src0_width = BRW_WIDTH_1; insn->bits2.da1.src0_vert_stride = BRW_VERTICAL_STRIDE_0; } else { */ insn->bits2.da1.src0_horiz_stride = reg.hstride; insn->bits2.da1.src0_width = reg.width; insn->bits2.da1.src0_vert_stride = reg.vstride; /* } */ } else { insn->bits2.da16.src0_swz_x = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_X); insn->bits2.da16.src0_swz_y = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Y); insn->bits2.da16.src0_swz_z = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Z); insn->bits2.da16.src0_swz_w = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_W); /* This is an oddity of the fact we're using the same * descriptions for registers in align_16 as align_1: */ if (reg.vstride == BRW_VERTICAL_STRIDE_8) insn->bits2.da16.src0_vert_stride = BRW_VERTICAL_STRIDE_4; else insn->bits2.da16.src0_vert_stride = reg.vstride; } } } void brw_set_src1(struct brw_compile *p, struct brw_instruction *insn, struct brw_reg reg) { struct brw_context *brw = p->brw; struct intel_context *intel = &brw->intel; assert(reg.file != BRW_MESSAGE_REGISTER_FILE); if (reg.file != BRW_ARCHITECTURE_REGISTER_FILE) assert(reg.nr < 128); gen7_convert_mrf_to_grf(p, ®); validate_reg(insn, reg); insn->bits1.da1.src1_reg_file = reg.file; insn->bits1.da1.src1_reg_type = reg.type; insn->bits3.da1.src1_abs = reg.abs; insn->bits3.da1.src1_negate = reg.negate; insn->bits3.da1.src1_address_mode = reg.address_mode; /* Only src1 can be immediate in two-argument instructions. */ assert(insn->bits1.da1.src0_reg_file != BRW_IMMEDIATE_VALUE); if (reg.file == BRW_IMMEDIATE_VALUE) { insn->bits3.ud = reg.dw1.ud; } else { /* It's only BRW that does not support register-indirect addressing on * src1 */ assert (intel->gen >= 4 || reg.address_mode == BRW_ADDRESS_DIRECT); if (reg.address_mode == BRW_ADDRESS_DIRECT) { if (insn->header.access_mode == BRW_ALIGN_1) { insn->bits3.da1.src1_subreg_nr = reg.subnr; insn->bits3.da1.src1_reg_nr = reg.nr; } else { insn->bits3.da16.src1_subreg_nr = reg.subnr / 16; insn->bits3.da16.src1_reg_nr = reg.nr; } } else { insn->bits3.ia1.src1_subreg_nr = reg.subnr; if (insn->header.access_mode == BRW_ALIGN_1) insn->bits3.ia1.src1_indirect_offset = reg.dw1.bits.indirect_offset; else insn->bits3.ia16.src1_indirect_offset = reg.dw1.bits.indirect_offset / 16; } if (insn->header.access_mode == BRW_ALIGN_1) { /* FIXME: While this is correct, if the assembler uses that code path * the opcode generated are different and thus needs a validation * pass. if (reg.width == BRW_WIDTH_1 && insn->header.execution_size == BRW_EXECUTE_1) { insn->bits3.da1.src1_horiz_stride = BRW_HORIZONTAL_STRIDE_0; insn->bits3.da1.src1_width = BRW_WIDTH_1; insn->bits3.da1.src1_vert_stride = BRW_VERTICAL_STRIDE_0; } else { */ insn->bits3.da1.src1_horiz_stride = reg.hstride; insn->bits3.da1.src1_width = reg.width; insn->bits3.da1.src1_vert_stride = reg.vstride; /* } */ } else { insn->bits3.da16.src1_swz_x = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_X); insn->bits3.da16.src1_swz_y = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Y); insn->bits3.da16.src1_swz_z = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Z); insn->bits3.da16.src1_swz_w = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_W); /* This is an oddity of the fact we're using the same * descriptions for registers in align_16 as align_1: */ if (reg.vstride == BRW_VERTICAL_STRIDE_8) insn->bits3.da16.src1_vert_stride = BRW_VERTICAL_STRIDE_4; else insn->bits3.da16.src1_vert_stride = reg.vstride; } } } /** * Set the Message Descriptor and Extended Message Descriptor fields * for SEND messages. * * \note This zeroes out the Function Control bits, so it must be called * \b before filling out any message-specific data. Callers can * choose not to fill in irrelevant bits; they will be zero. */ static void brw_set_message_descriptor(struct brw_compile *p, struct brw_instruction *inst, enum brw_message_target sfid, unsigned msg_length, unsigned response_length, bool header_present, bool end_of_thread) { struct intel_context *intel = &p->brw->intel; brw_set_src1(p, inst, brw_imm_d(0)); if (intel->gen >= 5) { inst->bits3.generic_gen5.header_present = header_present; inst->bits3.generic_gen5.response_length = response_length; inst->bits3.generic_gen5.msg_length = msg_length; inst->bits3.generic_gen5.end_of_thread = end_of_thread; if (intel->gen >= 6) { /* On Gen6+ Message target/SFID goes in bits 27:24 of the header */ inst->header.destreg__conditionalmod = sfid; } else { /* Set Extended Message Descriptor (ex_desc) */ inst->bits2.send_gen5.sfid = sfid; inst->bits2.send_gen5.end_of_thread = end_of_thread; } } else { inst->bits3.generic.response_length = response_length; inst->bits3.generic.msg_length = msg_length; inst->bits3.generic.msg_target = sfid; inst->bits3.generic.end_of_thread = end_of_thread; } } static void brw_set_math_message( struct brw_compile *p, struct brw_instruction *insn, unsigned function, unsigned integer_type, bool low_precision, unsigned dataType ) { struct brw_context *brw = p->brw; struct intel_context *intel = &brw->intel; unsigned msg_length; unsigned response_length; /* Infer message length from the function */ switch (function) { case BRW_MATH_FUNCTION_POW: case BRW_MATH_FUNCTION_INT_DIV_QUOTIENT: case BRW_MATH_FUNCTION_INT_DIV_REMAINDER: case BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER: msg_length = 2; break; default: msg_length = 1; break; } /* Infer response length from the function */ switch (function) { case BRW_MATH_FUNCTION_SINCOS: case BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER: response_length = 2; break; default: response_length = 1; break; } brw_set_message_descriptor(p, insn, BRW_SFID_MATH, msg_length, response_length, false, false); if (intel->gen == 5) { insn->bits3.math_gen5.function = function; insn->bits3.math_gen5.int_type = integer_type; insn->bits3.math_gen5.precision = low_precision; insn->bits3.math_gen5.saturate = insn->header.saturate; insn->bits3.math_gen5.data_type = dataType; insn->bits3.math_gen5.snapshot = 0; } else { insn->bits3.math.function = function; insn->bits3.math.int_type = integer_type; insn->bits3.math.precision = low_precision; insn->bits3.math.saturate = insn->header.saturate; insn->bits3.math.data_type = dataType; } insn->header.saturate = 0; } static void brw_set_ff_sync_message(struct brw_compile *p, struct brw_instruction *insn, bool allocate, unsigned response_length, bool end_of_thread) { brw_set_message_descriptor(p, insn, BRW_SFID_URB, 1, response_length, true, end_of_thread); insn->bits3.urb_gen5.opcode = 1; /* FF_SYNC */ insn->bits3.urb_gen5.offset = 0; /* Not used by FF_SYNC */ insn->bits3.urb_gen5.swizzle_control = 0; /* Not used by FF_SYNC */ insn->bits3.urb_gen5.allocate = allocate; insn->bits3.urb_gen5.used = 0; /* Not used by FF_SYNC */ insn->bits3.urb_gen5.complete = 0; /* Not used by FF_SYNC */ } static void brw_set_urb_message( struct brw_compile *p, struct brw_instruction *insn, bool allocate, bool used, unsigned msg_length, unsigned response_length, bool end_of_thread, bool complete, unsigned offset, unsigned swizzle_control ) { struct brw_context *brw = p->brw; struct intel_context *intel = &brw->intel; brw_set_message_descriptor(p, insn, BRW_SFID_URB, msg_length, response_length, true, end_of_thread); if (intel->gen == 7) { insn->bits3.urb_gen7.opcode = 0; /* URB_WRITE_HWORD */ insn->bits3.urb_gen7.offset = offset; assert(swizzle_control != BRW_URB_SWIZZLE_TRANSPOSE); insn->bits3.urb_gen7.swizzle_control = swizzle_control; /* per_slot_offset = 0 makes it ignore offsets in message header */ insn->bits3.urb_gen7.per_slot_offset = 0; insn->bits3.urb_gen7.complete = complete; } else if (intel->gen >= 5) { insn->bits3.urb_gen5.opcode = 0; /* URB_WRITE */ insn->bits3.urb_gen5.offset = offset; insn->bits3.urb_gen5.swizzle_control = swizzle_control; insn->bits3.urb_gen5.allocate = allocate; insn->bits3.urb_gen5.used = used; /* ? */ insn->bits3.urb_gen5.complete = complete; } else { insn->bits3.urb.opcode = 0; /* ? */ insn->bits3.urb.offset = offset; insn->bits3.urb.swizzle_control = swizzle_control; insn->bits3.urb.allocate = allocate; insn->bits3.urb.used = used; /* ? */ insn->bits3.urb.complete = complete; } } void brw_set_dp_write_message(struct brw_compile *p, struct brw_instruction *insn, unsigned binding_table_index, unsigned msg_control, unsigned msg_type, unsigned msg_length, bool header_present, unsigned last_render_target, unsigned response_length, unsigned end_of_thread, unsigned send_commit_msg) { struct brw_context *brw = p->brw; struct intel_context *intel = &brw->intel; unsigned sfid; if (intel->gen >= 7) { /* Use the Render Cache for RT writes; otherwise use the Data Cache */ if (msg_type == GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE) sfid = GEN6_SFID_DATAPORT_RENDER_CACHE; else sfid = GEN7_SFID_DATAPORT_DATA_CACHE; } else if (intel->gen == 6) { /* Use the render cache for all write messages. */ sfid = GEN6_SFID_DATAPORT_RENDER_CACHE; } else { sfid = BRW_SFID_DATAPORT_WRITE; } brw_set_message_descriptor(p, insn, sfid, msg_length, response_length, header_present, end_of_thread); if (intel->gen >= 7) { insn->bits3.gen7_dp.binding_table_index = binding_table_index; insn->bits3.gen7_dp.msg_control = msg_control | last_render_target << 6; insn->bits3.gen7_dp.msg_type = msg_type; } else if (intel->gen == 6) { insn->bits3.gen6_dp.binding_table_index = binding_table_index; insn->bits3.gen6_dp.msg_control = msg_control | last_render_target << 5; insn->bits3.gen6_dp.msg_type = msg_type; insn->bits3.gen6_dp.send_commit_msg = send_commit_msg; } else if (intel->gen == 5) { insn->bits3.dp_write_gen5.binding_table_index = binding_table_index; insn->bits3.dp_write_gen5.msg_control = msg_control; insn->bits3.dp_write_gen5.last_render_target = last_render_target; insn->bits3.dp_write_gen5.msg_type = msg_type; insn->bits3.dp_write_gen5.send_commit_msg = send_commit_msg; } else { insn->bits3.dp_write.binding_table_index = binding_table_index; insn->bits3.dp_write.msg_control = msg_control; insn->bits3.dp_write.last_render_target = last_render_target; insn->bits3.dp_write.msg_type = msg_type; insn->bits3.dp_write.send_commit_msg = send_commit_msg; } } void brw_set_dp_read_message(struct brw_compile *p, struct brw_instruction *insn, unsigned binding_table_index, unsigned msg_control, unsigned msg_type, unsigned target_cache, unsigned msg_length, bool header_present, unsigned response_length) { struct brw_context *brw = p->brw; struct intel_context *intel = &brw->intel; unsigned sfid; if (intel->gen >= 7) { sfid = GEN7_SFID_DATAPORT_DATA_CACHE; } else if (intel->gen == 6) { if (target_cache == BRW_DATAPORT_READ_TARGET_RENDER_CACHE) sfid = GEN6_SFID_DATAPORT_RENDER_CACHE; else sfid = GEN6_SFID_DATAPORT_SAMPLER_CACHE; } else { sfid = BRW_SFID_DATAPORT_READ; } brw_set_message_descriptor(p, insn, sfid, msg_length, response_length, header_present, false); if (intel->gen >= 7) { insn->bits3.gen7_dp.binding_table_index = binding_table_index; insn->bits3.gen7_dp.msg_control = msg_control; insn->bits3.gen7_dp.msg_type = msg_type; } else if (intel->gen == 6) { insn->bits3.gen6_dp.binding_table_index = binding_table_index; insn->bits3.gen6_dp.msg_control = msg_control; insn->bits3.gen6_dp.msg_type = msg_type; insn->bits3.gen6_dp.send_commit_msg = 0; } else if (intel->gen == 5) { insn->bits3.dp_read_gen5.binding_table_index = binding_table_index; insn->bits3.dp_read_gen5.msg_control = msg_control; insn->bits3.dp_read_gen5.msg_type = msg_type; insn->bits3.dp_read_gen5.target_cache = target_cache; } else if (intel->is_g4x) { insn->bits3.dp_read_g4x.binding_table_index = binding_table_index; /*0:7*/ insn->bits3.dp_read_g4x.msg_control = msg_control; /*8:10*/ insn->bits3.dp_read_g4x.msg_type = msg_type; /*11:13*/ insn->bits3.dp_read_g4x.target_cache = target_cache; /*14:15*/ } else { insn->bits3.dp_read.binding_table_index = binding_table_index; /*0:7*/ insn->bits3.dp_read.msg_control = msg_control; /*8:11*/ insn->bits3.dp_read.msg_type = msg_type; /*12:13*/ insn->bits3.dp_read.target_cache = target_cache; /*14:15*/ } } void brw_set_sampler_message(struct brw_compile *p, struct brw_instruction *insn, unsigned binding_table_index, unsigned sampler, unsigned msg_type, unsigned response_length, unsigned msg_length, unsigned header_present, unsigned simd_mode, unsigned return_format) { struct brw_context *brw = p->brw; struct intel_context *intel = &brw->intel; brw_set_message_descriptor(p, insn, BRW_SFID_SAMPLER, msg_length, response_length, header_present, false); if (intel->gen >= 7) { insn->bits3.sampler_gen7.binding_table_index = binding_table_index; insn->bits3.sampler_gen7.sampler = sampler; insn->bits3.sampler_gen7.msg_type = msg_type; insn->bits3.sampler_gen7.simd_mode = simd_mode; } else if (intel->gen >= 5) { insn->bits3.sampler_gen5.binding_table_index = binding_table_index; insn->bits3.sampler_gen5.sampler = sampler; insn->bits3.sampler_gen5.msg_type = msg_type; insn->bits3.sampler_gen5.simd_mode = simd_mode; } else if (intel->is_g4x) { insn->bits3.sampler_g4x.binding_table_index = binding_table_index; insn->bits3.sampler_g4x.sampler = sampler; insn->bits3.sampler_g4x.msg_type = msg_type; } else { insn->bits3.sampler.binding_table_index = binding_table_index; insn->bits3.sampler.sampler = sampler; insn->bits3.sampler.msg_type = msg_type; insn->bits3.sampler.return_format = return_format; } } #define next_insn brw_next_insn struct brw_instruction * brw_next_insn(struct brw_compile *p, unsigned opcode) { struct brw_instruction *insn; if (p->nr_insn + 1 > p->store_size) { if (0) printf("incresing the store size to %d\n", p->store_size << 1); p->store_size <<= 1; p->store = reralloc(p->mem_ctx, p->store, struct brw_instruction, p->store_size); if (!p->store) assert(!"realloc eu store memeory failed"); } p->next_insn_offset += 16; insn = &p->store[p->nr_insn++]; memcpy(insn, p->current, sizeof(*insn)); /* Reset this one-shot flag: */ if (p->current->header.destreg__conditionalmod) { p->current->header.destreg__conditionalmod = 0; p->current->header.predicate_control = BRW_PREDICATE_NORMAL; } insn->header.opcode = opcode; return insn; } static struct brw_instruction *brw_alu1( struct brw_compile *p, unsigned opcode, struct brw_reg dest, struct brw_reg src ) { struct brw_instruction *insn = next_insn(p, opcode); brw_set_dest(p, insn, dest); brw_set_src0(p, insn, src); return insn; } static struct brw_instruction *brw_alu2(struct brw_compile *p, unsigned opcode, struct brw_reg dest, struct brw_reg src0, struct brw_reg src1 ) { struct brw_instruction *insn = next_insn(p, opcode); brw_set_dest(p, insn, dest); brw_set_src0(p, insn, src0); brw_set_src1(p, insn, src1); return insn; } static int get_3src_subreg_nr(struct brw_reg reg) { if (reg.vstride == BRW_VERTICAL_STRIDE_0) { assert(brw_is_single_value_swizzle(reg.dw1.bits.swizzle)); return reg.subnr / 4 + BRW_GET_SWZ(reg.dw1.bits.swizzle, 0); } else { return reg.subnr / 4; } } static int get_3src_type(int type) { assert(type == BRW_REGISTER_TYPE_F || type == BRW_REGISTER_TYPE_D || type == BRW_REGISTER_TYPE_UD); switch(type) { case BRW_REGISTER_TYPE_F: return BRW_REGISTER_3SRC_TYPE_F; case BRW_REGISTER_TYPE_D: return BRW_REGISTER_3SRC_TYPE_D; case BRW_REGISTER_TYPE_UD: return BRW_REGISTER_3SRC_TYPE_UD; } return BRW_REGISTER_3SRC_TYPE_F; } void brw_set_3src_dest(struct brw_compile *p, struct brw_instruction *insn, struct brw_reg dest) { gen7_convert_mrf_to_grf(p, &dest); assert(insn->header.access_mode == BRW_ALIGN_16); assert(dest.file == BRW_GENERAL_REGISTER_FILE || dest.file == BRW_MESSAGE_REGISTER_FILE); assert(dest.nr < 128); assert(dest.address_mode == BRW_ADDRESS_DIRECT); insn->bits1.da3src.dest_reg_type = get_3src_type(dest.type); insn->bits1.da3src.dest_reg_file = (dest.file == BRW_MESSAGE_REGISTER_FILE); insn->bits1.da3src.dest_reg_nr = dest.nr; insn->bits1.da3src.dest_subreg_nr = dest.subnr / 16; insn->bits1.da3src.dest_writemask = dest.dw1.bits.writemask; guess_execution_size(p, insn, dest); } void brw_set_3src_src0(struct brw_compile *p, struct brw_instruction *insn, struct brw_reg src0) { assert(src0.file == BRW_GENERAL_REGISTER_FILE); assert(src0.address_mode == BRW_ADDRESS_DIRECT); assert(src0.nr < 128); insn->bits1.da3src.src_reg_type = get_3src_type(src0.type); insn->bits2.da3src.src0_swizzle = src0.dw1.bits.swizzle; insn->bits2.da3src.src0_subreg_nr = get_3src_subreg_nr(src0); insn->bits2.da3src.src0_reg_nr = src0.nr; insn->bits1.da3src.src0_abs = src0.abs; insn->bits1.da3src.src0_negate = src0.negate; insn->bits2.da3src.src0_rep_ctrl = src0.vstride == BRW_VERTICAL_STRIDE_0; } void brw_set_3src_src1(struct brw_compile *p, struct brw_instruction *insn, struct brw_reg src1) { assert(src1.file == BRW_GENERAL_REGISTER_FILE); assert(src1.address_mode == BRW_ADDRESS_DIRECT); assert(src1.nr < 128); assert(src1.type == insn->bits1.da3src.src_reg_type); insn->bits2.da3src.src1_swizzle = src1.dw1.bits.swizzle; insn->bits2.da3src.src1_subreg_nr_low = get_3src_subreg_nr(src1) & 0x3; insn->bits3.da3src.src1_subreg_nr_high = get_3src_subreg_nr(src1) >> 2; insn->bits2.da3src.src1_rep_ctrl = src1.vstride == BRW_VERTICAL_STRIDE_0; insn->bits3.da3src.src1_reg_nr = src1.nr; insn->bits1.da3src.src1_abs = src1.abs; insn->bits1.da3src.src1_negate = src1.negate; } void brw_set_3src_src2(struct brw_compile *p, struct brw_instruction *insn, struct brw_reg src2) { assert(src2.file == BRW_GENERAL_REGISTER_FILE); assert(src2.address_mode == BRW_ADDRESS_DIRECT); assert(src2.nr < 128); assert(src2.type == insn->bits1.da3src.src_reg_type); insn->bits3.da3src.src2_swizzle = src2.dw1.bits.swizzle; insn->bits3.da3src.src2_subreg_nr = get_3src_subreg_nr(src2); insn->bits3.da3src.src2_rep_ctrl = src2.vstride == BRW_VERTICAL_STRIDE_0; insn->bits3.da3src.src2_reg_nr = src2.nr; insn->bits1.da3src.src2_abs = src2.abs; insn->bits1.da3src.src2_negate = src2.negate; } static struct brw_instruction *brw_alu3(struct brw_compile *p, unsigned opcode, struct brw_reg dest, struct brw_reg src0, struct brw_reg src1, struct brw_reg src2) { struct brw_instruction *insn = next_insn(p, opcode); brw_set_3src_dest(p, insn, dest); brw_set_3src_src0(p, insn, src0); brw_set_3src_src1(p, insn, src1); brw_set_3src_src2(p, insn, src2); return insn; } /*********************************************************************** * Convenience routines. */ #define ALU1(OP) \ struct brw_instruction *brw_##OP(struct brw_compile *p, \ struct brw_reg dest, \ struct brw_reg src0) \ { \ return brw_alu1(p, BRW_OPCODE_##OP, dest, src0); \ } #define ALU2(OP) \ struct brw_instruction *brw_##OP(struct brw_compile *p, \ struct brw_reg dest, \ struct brw_reg src0, \ struct brw_reg src1) \ { \ return brw_alu2(p, BRW_OPCODE_##OP, dest, src0, src1); \ } #define ALU3(OP) \ struct brw_instruction *brw_##OP(struct brw_compile *p, \ struct brw_reg dest, \ struct brw_reg src0, \ struct brw_reg src1, \ struct brw_reg src2) \ { \ return brw_alu3(p, BRW_OPCODE_##OP, dest, src0, src1, src2); \ } /* Rounding operations (other than RNDD) require two instructions - the first * stores a rounded value (possibly the wrong way) in the dest register, but * also sets a per-channel "increment bit" in the flag register. A predicated * add of 1.0 fixes dest to contain the desired result. * * Sandybridge and later appear to round correctly without an ADD. */ #define ROUND(OP) \ void brw_##OP(struct brw_compile *p, \ struct brw_reg dest, \ struct brw_reg src) \ { \ struct brw_instruction *rnd, *add; \ rnd = next_insn(p, BRW_OPCODE_##OP); \ brw_set_dest(p, rnd, dest); \ brw_set_src0(p, rnd, src); \ \ if (p->brw->intel.gen < 6) { \ /* turn on round-increments */ \ rnd->header.destreg__conditionalmod = BRW_CONDITIONAL_R; \ add = brw_ADD(p, dest, dest, brw_imm_f(1.0f)); \ add->header.predicate_control = BRW_PREDICATE_NORMAL; \ } \ } ALU1(MOV) ALU2(SEL) ALU1(NOT) ALU2(AND) ALU2(OR) ALU2(XOR) ALU2(SHR) ALU2(SHL) ALU2(RSR) ALU2(RSL) ALU2(ASR) ALU1(FRC) ALU1(RNDD) ALU2(MAC) ALU2(MACH) ALU1(LZD) ALU2(DP4) ALU2(DPH) ALU2(DP3) ALU2(DP2) ALU2(LINE) ALU2(PLN) ALU3(MAD) ROUND(RNDZ) ROUND(RNDE) struct brw_instruction *brw_ADD(struct brw_compile *p, struct brw_reg dest, struct brw_reg src0, struct brw_reg src1) { /* 6.2.2: add */ if (src0.type == BRW_REGISTER_TYPE_F || (src0.file == BRW_IMMEDIATE_VALUE && src0.type == BRW_REGISTER_TYPE_VF)) { assert(src1.type != BRW_REGISTER_TYPE_UD); assert(src1.type != BRW_REGISTER_TYPE_D); } if (src1.type == BRW_REGISTER_TYPE_F || (src1.file == BRW_IMMEDIATE_VALUE && src1.type == BRW_REGISTER_TYPE_VF)) { assert(src0.type != BRW_REGISTER_TYPE_UD); assert(src0.type != BRW_REGISTER_TYPE_D); } return brw_alu2(p, BRW_OPCODE_ADD, dest, src0, src1); } struct brw_instruction *brw_AVG(struct brw_compile *p, struct brw_reg dest, struct brw_reg src0, struct brw_reg src1) { assert(dest.type == src0.type); assert(src0.type == src1.type); switch (src0.type) { case BRW_REGISTER_TYPE_B: case BRW_REGISTER_TYPE_UB: case BRW_REGISTER_TYPE_W: case BRW_REGISTER_TYPE_UW: case BRW_REGISTER_TYPE_D: case BRW_REGISTER_TYPE_UD: break; default: assert(!"Bad type for brw_AVG"); } return brw_alu2(p, BRW_OPCODE_AVG, dest, src0, src1); } struct brw_instruction *brw_MUL(struct brw_compile *p, struct brw_reg dest, struct brw_reg src0, struct brw_reg src1) { /* 6.32.38: mul */ if (src0.type == BRW_REGISTER_TYPE_D || src0.type == BRW_REGISTER_TYPE_UD || src1.type == BRW_REGISTER_TYPE_D || src1.type == BRW_REGISTER_TYPE_UD) { assert(dest.type != BRW_REGISTER_TYPE_F); } if (src0.type == BRW_REGISTER_TYPE_F || (src0.file == BRW_IMMEDIATE_VALUE && src0.type == BRW_REGISTER_TYPE_VF)) { assert(src1.type != BRW_REGISTER_TYPE_UD); assert(src1.type != BRW_REGISTER_TYPE_D); } if (src1.type == BRW_REGISTER_TYPE_F || (src1.file == BRW_IMMEDIATE_VALUE && src1.type == BRW_REGISTER_TYPE_VF)) { assert(src0.type != BRW_REGISTER_TYPE_UD); assert(src0.type != BRW_REGISTER_TYPE_D); } assert(src0.file != BRW_ARCHITECTURE_REGISTER_FILE || src0.nr != BRW_ARF_ACCUMULATOR); assert(src1.file != BRW_ARCHITECTURE_REGISTER_FILE || src1.nr != BRW_ARF_ACCUMULATOR); return brw_alu2(p, BRW_OPCODE_MUL, dest, src0, src1); } void brw_NOP(struct brw_compile *p) { struct brw_instruction *insn = next_insn(p, BRW_OPCODE_NOP); brw_set_dest(p, insn, retype(brw_vec4_grf(0,0), BRW_REGISTER_TYPE_UD)); brw_set_src0(p, insn, retype(brw_vec4_grf(0,0), BRW_REGISTER_TYPE_UD)); brw_set_src1(p, insn, brw_imm_ud(0x0)); } /*********************************************************************** * Comparisons, if/else/endif */ struct brw_instruction *brw_JMPI(struct brw_compile *p, struct brw_reg dest, struct brw_reg src0, struct brw_reg src1) { struct brw_instruction *insn = brw_alu2(p, BRW_OPCODE_JMPI, dest, src0, src1); insn->header.execution_size = 1; insn->header.compression_control = BRW_COMPRESSION_NONE; insn->header.mask_control = BRW_MASK_DISABLE; p->current->header.predicate_control = BRW_PREDICATE_NONE; return insn; } static void push_if_stack(struct brw_compile *p, struct brw_instruction *inst) { p->if_stack[p->if_stack_depth] = inst - p->store; p->if_stack_depth++; if (p->if_stack_array_size <= p->if_stack_depth) { p->if_stack_array_size *= 2; p->if_stack = reralloc(p->mem_ctx, p->if_stack, int, p->if_stack_array_size); } } static struct brw_instruction * pop_if_stack(struct brw_compile *p) { p->if_stack_depth--; return &p->store[p->if_stack[p->if_stack_depth]]; } static void push_loop_stack(struct brw_compile *p, struct brw_instruction *inst) { if (p->loop_stack_array_size < p->loop_stack_depth) { p->loop_stack_array_size *= 2; p->loop_stack = reralloc(p->mem_ctx, p->loop_stack, int, p->loop_stack_array_size); p->if_depth_in_loop = reralloc(p->mem_ctx, p->if_depth_in_loop, int, p->loop_stack_array_size); } p->loop_stack[p->loop_stack_depth] = inst - p->store; p->loop_stack_depth++; p->if_depth_in_loop[p->loop_stack_depth] = 0; } static struct brw_instruction * get_inner_do_insn(struct brw_compile *p) { return &p->store[p->loop_stack[p->loop_stack_depth - 1]]; } /* EU takes the value from the flag register and pushes it onto some * sort of a stack (presumably merging with any flag value already on * the stack). Within an if block, the flags at the top of the stack * control execution on each channel of the unit, eg. on each of the * 16 pixel values in our wm programs. * * When the matching 'else' instruction is reached (presumably by * countdown of the instruction count patched in by our ELSE/ENDIF * functions), the relevent flags are inverted. * * When the matching 'endif' instruction is reached, the flags are * popped off. If the stack is now empty, normal execution resumes. */ struct brw_instruction * brw_IF(struct brw_compile *p, unsigned execute_size) { struct intel_context *intel = &p->brw->intel; struct brw_instruction *insn; insn = next_insn(p, BRW_OPCODE_IF); /* Override the defaults for this instruction: */ if (intel->gen < 6) { brw_set_dest(p, insn, brw_ip_reg()); brw_set_src0(p, insn, brw_ip_reg()); brw_set_src1(p, insn, brw_imm_d(0x0)); } else if (intel->gen == 6) { brw_set_dest(p, insn, brw_imm_w(0)); insn->bits1.branch_gen6.jump_count = 0; brw_set_src0(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D))); brw_set_src1(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D))); } else { brw_set_dest(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D))); brw_set_src0(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D))); brw_set_src1(p, insn, brw_imm_ud(0)); insn->bits3.break_cont.jip = 0; insn->bits3.break_cont.uip = 0; } insn->header.execution_size = execute_size; insn->header.compression_control = BRW_COMPRESSION_NONE; insn->header.predicate_control = BRW_PREDICATE_NORMAL; insn->header.mask_control = BRW_MASK_ENABLE; if (!p->single_program_flow) insn->header.thread_control = BRW_THREAD_SWITCH; p->current->header.predicate_control = BRW_PREDICATE_NONE; push_if_stack(p, insn); p->if_depth_in_loop[p->loop_stack_depth]++; return insn; } /* This function is only used for gen6-style IF instructions with an * embedded comparison (conditional modifier). It is not used on gen7. */ struct brw_instruction * gen6_IF(struct brw_compile *p, uint32_t conditional, struct brw_reg src0, struct brw_reg src1) { struct brw_instruction *insn; insn = next_insn(p, BRW_OPCODE_IF); brw_set_dest(p, insn, brw_imm_w(0)); if (p->compressed) { insn->header.execution_size = BRW_EXECUTE_16; } else { insn->header.execution_size = BRW_EXECUTE_8; } insn->bits1.branch_gen6.jump_count = 0; brw_set_src0(p, insn, src0); brw_set_src1(p, insn, src1); assert(insn->header.compression_control == BRW_COMPRESSION_NONE); assert(insn->header.predicate_control == BRW_PREDICATE_NONE); insn->header.destreg__conditionalmod = conditional; if (!p->single_program_flow) insn->header.thread_control = BRW_THREAD_SWITCH; push_if_stack(p, insn); return insn; } /** * In single-program-flow (SPF) mode, convert IF and ELSE into ADDs. */ static void convert_IF_ELSE_to_ADD(struct brw_compile *p, struct brw_instruction *if_inst, struct brw_instruction *else_inst) { /* The next instruction (where the ENDIF would be, if it existed) */ struct brw_instruction *next_inst = &p->store[p->nr_insn]; assert(p->single_program_flow); assert(if_inst != NULL && if_inst->header.opcode == BRW_OPCODE_IF); assert(else_inst == NULL || else_inst->header.opcode == BRW_OPCODE_ELSE); assert(if_inst->header.execution_size == BRW_EXECUTE_1); /* Convert IF to an ADD instruction that moves the instruction pointer * to the first instruction of the ELSE block. If there is no ELSE * block, point to where ENDIF would be. Reverse the predicate. * * There's no need to execute an ENDIF since we don't need to do any * stack operations, and if we're currently executing, we just want to * continue normally. */ if_inst->header.opcode = BRW_OPCODE_ADD; if_inst->header.predicate_inverse = 1; if (else_inst != NULL) { /* Convert ELSE to an ADD instruction that points where the ENDIF * would be. */ else_inst->header.opcode = BRW_OPCODE_ADD; if_inst->bits3.ud = (else_inst - if_inst + 1) * 16; else_inst->bits3.ud = (next_inst - else_inst) * 16; } else { if_inst->bits3.ud = (next_inst - if_inst) * 16; } } /** * Patch IF and ELSE instructions with appropriate jump targets. */ static void patch_IF_ELSE(struct brw_compile *p, struct brw_instruction *if_inst, struct brw_instruction *else_inst, struct brw_instruction *endif_inst) { struct intel_context *intel = &p->brw->intel; /* We shouldn't be patching IF and ELSE instructions in single program flow * mode when gen < 6, because in single program flow mode on those * platforms, we convert flow control instructions to conditional ADDs that * operate on IP (see brw_ENDIF). * * However, on Gen6, writing to IP doesn't work in single program flow mode * (see the SandyBridge PRM, Volume 4 part 2, p79: "When SPF is ON, IP may * not be updated by non-flow control instructions."). And on later * platforms, there is no significant benefit to converting control flow * instructions to conditional ADDs. So we do patch IF and ELSE * instructions in single program flow mode on those platforms. */ if (intel->gen < 6) assert(!p->single_program_flow); assert(if_inst != NULL && if_inst->header.opcode == BRW_OPCODE_IF); assert(endif_inst != NULL); assert(else_inst == NULL || else_inst->header.opcode == BRW_OPCODE_ELSE); unsigned br = 1; /* Jump count is for 64bit data chunk each, so one 128bit instruction * requires 2 chunks. */ if (intel->gen >= 5) br = 2; assert(endif_inst->header.opcode == BRW_OPCODE_ENDIF); endif_inst->header.execution_size = if_inst->header.execution_size; if (else_inst == NULL) { /* Patch IF -> ENDIF */ if (intel->gen < 6) { /* Turn it into an IFF, which means no mask stack operations for * all-false and jumping past the ENDIF. */ if_inst->header.opcode = BRW_OPCODE_IFF; if_inst->bits3.if_else.jump_count = br * (endif_inst - if_inst + 1); if_inst->bits3.if_else.pop_count = 0; if_inst->bits3.if_else.pad0 = 0; } else if (intel->gen == 6) { /* As of gen6, there is no IFF and IF must point to the ENDIF. */ if_inst->bits1.branch_gen6.jump_count = br * (endif_inst - if_inst); } else { if_inst->bits3.break_cont.uip = br * (endif_inst - if_inst); if_inst->bits3.break_cont.jip = br * (endif_inst - if_inst); } } else { else_inst->header.execution_size = if_inst->header.execution_size; /* Patch IF -> ELSE */ if (intel->gen < 6) { if_inst->bits3.if_else.jump_count = br * (else_inst - if_inst); if_inst->bits3.if_else.pop_count = 0; if_inst->bits3.if_else.pad0 = 0; } else if (intel->gen == 6) { if_inst->bits1.branch_gen6.jump_count = br * (else_inst - if_inst + 1); } /* Patch ELSE -> ENDIF */ if (intel->gen < 6) { /* BRW_OPCODE_ELSE pre-gen6 should point just past the * matching ENDIF. */ else_inst->bits3.if_else.jump_count = br*(endif_inst - else_inst + 1); else_inst->bits3.if_else.pop_count = 1; else_inst->bits3.if_else.pad0 = 0; } else if (intel->gen == 6) { /* BRW_OPCODE_ELSE on gen6 should point to the matching ENDIF. */ else_inst->bits1.branch_gen6.jump_count = br*(endif_inst - else_inst); } else { /* The IF instruction's JIP should point just past the ELSE */ if_inst->bits3.break_cont.jip = br * (else_inst - if_inst + 1); /* The IF instruction's UIP and ELSE's JIP should point to ENDIF */ if_inst->bits3.break_cont.uip = br * (endif_inst - if_inst); else_inst->bits3.break_cont.jip = br * (endif_inst - else_inst); } } } void brw_ELSE(struct brw_compile *p) { struct intel_context *intel = &p->brw->intel; struct brw_instruction *insn; insn = next_insn(p, BRW_OPCODE_ELSE); if (intel->gen < 6) { brw_set_dest(p, insn, brw_ip_reg()); brw_set_src0(p, insn, brw_ip_reg()); brw_set_src1(p, insn, brw_imm_d(0x0)); } else if (intel->gen == 6) { brw_set_dest(p, insn, brw_imm_w(0)); insn->bits1.branch_gen6.jump_count = 0; brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); brw_set_src1(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); } else { brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); brw_set_src1(p, insn, brw_imm_ud(0)); insn->bits3.break_cont.jip = 0; insn->bits3.break_cont.uip = 0; } insn->header.compression_control = BRW_COMPRESSION_NONE; insn->header.mask_control = BRW_MASK_ENABLE; if (!p->single_program_flow) insn->header.thread_control = BRW_THREAD_SWITCH; push_if_stack(p, insn); } void brw_ENDIF(struct brw_compile *p) { struct intel_context *intel = &p->brw->intel; struct brw_instruction *insn = NULL; struct brw_instruction *else_inst = NULL; struct brw_instruction *if_inst = NULL; struct brw_instruction *tmp; bool emit_endif = true; /* In single program flow mode, we can express IF and ELSE instructions * equivalently as ADD instructions that operate on IP. On platforms prior * to Gen6, flow control instructions cause an implied thread switch, so * this is a significant savings. * * However, on Gen6, writing to IP doesn't work in single program flow mode * (see the SandyBridge PRM, Volume 4 part 2, p79: "When SPF is ON, IP may * not be updated by non-flow control instructions."). And on later * platforms, there is no significant benefit to converting control flow * instructions to conditional ADDs. So we only do this trick on Gen4 and * Gen5. */ if (intel->gen < 6 && p->single_program_flow) emit_endif = false; /* * A single next_insn() may change the base adress of instruction store * memory(p->store), so call it first before referencing the instruction * store pointer from an index */ if (emit_endif) insn = next_insn(p, BRW_OPCODE_ENDIF); /* Pop the IF and (optional) ELSE instructions from the stack */ p->if_depth_in_loop[p->loop_stack_depth]--; tmp = pop_if_stack(p); if (tmp->header.opcode == BRW_OPCODE_ELSE) { else_inst = tmp; tmp = pop_if_stack(p); } if_inst = tmp; if (!emit_endif) { /* ENDIF is useless; don't bother emitting it. */ convert_IF_ELSE_to_ADD(p, if_inst, else_inst); return; } if (intel->gen < 6) { brw_set_dest(p, insn, retype(brw_vec4_grf(0,0), BRW_REGISTER_TYPE_UD)); brw_set_src0(p, insn, retype(brw_vec4_grf(0,0), BRW_REGISTER_TYPE_UD)); brw_set_src1(p, insn, brw_imm_d(0x0)); } else if (intel->gen == 6) { brw_set_dest(p, insn, brw_imm_w(0)); brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); brw_set_src1(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); } else { brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); brw_set_src1(p, insn, brw_imm_ud(0)); } insn->header.compression_control = BRW_COMPRESSION_NONE; insn->header.mask_control = BRW_MASK_ENABLE; insn->header.thread_control = BRW_THREAD_SWITCH; /* Also pop item off the stack in the endif instruction: */ if (intel->gen < 6) { insn->bits3.if_else.jump_count = 0; insn->bits3.if_else.pop_count = 1; insn->bits3.if_else.pad0 = 0; } else if (intel->gen == 6) { insn->bits1.branch_gen6.jump_count = 2; } else { insn->bits3.break_cont.jip = 2; } patch_IF_ELSE(p, if_inst, else_inst, insn); } struct brw_instruction *brw_BREAK(struct brw_compile *p) { struct intel_context *intel = &p->brw->intel; struct brw_instruction *insn; insn = next_insn(p, BRW_OPCODE_BREAK); if (intel->gen >= 6) { brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); brw_set_src1(p, insn, brw_imm_d(0x0)); } else { brw_set_dest(p, insn, brw_ip_reg()); brw_set_src0(p, insn, brw_ip_reg()); brw_set_src1(p, insn, brw_imm_d(0x0)); insn->bits3.if_else.pad0 = 0; insn->bits3.if_else.pop_count = p->if_depth_in_loop[p->loop_stack_depth]; } insn->header.compression_control = BRW_COMPRESSION_NONE; insn->header.execution_size = BRW_EXECUTE_8; return insn; } struct brw_instruction *gen6_CONT(struct brw_compile *p) { struct brw_instruction *insn; insn = next_insn(p, BRW_OPCODE_CONTINUE); brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); brw_set_dest(p, insn, brw_ip_reg()); brw_set_src0(p, insn, brw_ip_reg()); brw_set_src1(p, insn, brw_imm_d(0x0)); insn->header.compression_control = BRW_COMPRESSION_NONE; insn->header.execution_size = BRW_EXECUTE_8; return insn; } struct brw_instruction *brw_CONT(struct brw_compile *p) { struct brw_instruction *insn; insn = next_insn(p, BRW_OPCODE_CONTINUE); brw_set_dest(p, insn, brw_ip_reg()); brw_set_src0(p, insn, brw_ip_reg()); brw_set_src1(p, insn, brw_imm_d(0x0)); insn->header.compression_control = BRW_COMPRESSION_NONE; insn->header.execution_size = BRW_EXECUTE_8; /* insn->header.mask_control = BRW_MASK_DISABLE; */ insn->bits3.if_else.pad0 = 0; insn->bits3.if_else.pop_count = p->if_depth_in_loop[p->loop_stack_depth]; return insn; } struct brw_instruction *gen6_HALT(struct brw_compile *p) { struct brw_instruction *insn; insn = next_insn(p, BRW_OPCODE_HALT); brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); brw_set_src1(p, insn, brw_imm_d(0x0)); /* UIP and JIP, updated later. */ if (p->compressed) { insn->header.execution_size = BRW_EXECUTE_16; } else { insn->header.compression_control = BRW_COMPRESSION_NONE; insn->header.execution_size = BRW_EXECUTE_8; } return insn; } /* DO/WHILE loop: * * The DO/WHILE is just an unterminated loop -- break or continue are * used for control within the loop. We have a few ways they can be * done. * * For uniform control flow, the WHILE is just a jump, so ADD ip, ip, * jip and no DO instruction. * * For non-uniform control flow pre-gen6, there's a DO instruction to * push the mask, and a WHILE to jump back, and BREAK to get out and * pop the mask. * * For gen6, there's no more mask stack, so no need for DO. WHILE * just points back to the first instruction of the loop. */ struct brw_instruction *brw_DO(struct brw_compile *p, unsigned execute_size) { struct intel_context *intel = &p->brw->intel; if (intel->gen >= 6 || p->single_program_flow) { push_loop_stack(p, &p->store[p->nr_insn]); return &p->store[p->nr_insn]; } else { struct brw_instruction *insn = next_insn(p, BRW_OPCODE_DO); push_loop_stack(p, insn); /* Override the defaults for this instruction: */ brw_set_dest(p, insn, brw_null_reg()); brw_set_src0(p, insn, brw_null_reg()); brw_set_src1(p, insn, brw_null_reg()); insn->header.compression_control = BRW_COMPRESSION_NONE; insn->header.execution_size = execute_size; insn->header.predicate_control = BRW_PREDICATE_NONE; /* insn->header.mask_control = BRW_MASK_ENABLE; */ /* insn->header.mask_control = BRW_MASK_DISABLE; */ return insn; } } /** * For pre-gen6, we patch BREAK/CONT instructions to point at the WHILE * instruction here. * * For gen6+, see brw_set_uip_jip(), which doesn't care so much about the loop * nesting, since it can always just point to the end of the block/current loop. */ static void brw_patch_break_cont(struct brw_compile *p, struct brw_instruction *while_inst) { struct intel_context *intel = &p->brw->intel; struct brw_instruction *do_inst = get_inner_do_insn(p); struct brw_instruction *inst; int br = (intel->gen == 5) ? 2 : 1; for (inst = while_inst - 1; inst != do_inst; inst--) { /* If the jump count is != 0, that means that this instruction has already * been patched because it's part of a loop inside of the one we're * patching. */ if (inst->header.opcode == BRW_OPCODE_BREAK && inst->bits3.if_else.jump_count == 0) { inst->bits3.if_else.jump_count = br * ((while_inst - inst) + 1); } else if (inst->header.opcode == BRW_OPCODE_CONTINUE && inst->bits3.if_else.jump_count == 0) { inst->bits3.if_else.jump_count = br * (while_inst - inst); } } } struct brw_instruction *brw_WHILE(struct brw_compile *p) { struct intel_context *intel = &p->brw->intel; struct brw_instruction *insn, *do_insn; unsigned br = 1; if (intel->gen >= 5) br = 2; if (intel->gen >= 7) { insn = next_insn(p, BRW_OPCODE_WHILE); do_insn = get_inner_do_insn(p); brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); brw_set_src1(p, insn, brw_imm_ud(0)); insn->bits3.break_cont.jip = br * (do_insn - insn); insn->header.execution_size = BRW_EXECUTE_8; } else if (intel->gen == 6) { insn = next_insn(p, BRW_OPCODE_WHILE); do_insn = get_inner_do_insn(p); brw_set_dest(p, insn, brw_imm_w(0)); insn->bits1.branch_gen6.jump_count = br * (do_insn - insn); brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); brw_set_src1(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); insn->header.execution_size = BRW_EXECUTE_8; } else { if (p->single_program_flow) { insn = next_insn(p, BRW_OPCODE_ADD); do_insn = get_inner_do_insn(p); brw_set_dest(p, insn, brw_ip_reg()); brw_set_src0(p, insn, brw_ip_reg()); brw_set_src1(p, insn, brw_imm_d((do_insn - insn) * 16)); insn->header.execution_size = BRW_EXECUTE_1; } else { insn = next_insn(p, BRW_OPCODE_WHILE); do_insn = get_inner_do_insn(p); assert(do_insn->header.opcode == BRW_OPCODE_DO); brw_set_dest(p, insn, brw_ip_reg()); brw_set_src0(p, insn, brw_ip_reg()); brw_set_src1(p, insn, brw_imm_d(0)); insn->header.execution_size = do_insn->header.execution_size; insn->bits3.if_else.jump_count = br * (do_insn - insn + 1); insn->bits3.if_else.pop_count = 0; insn->bits3.if_else.pad0 = 0; brw_patch_break_cont(p, insn); } } insn->header.compression_control = BRW_COMPRESSION_NONE; p->current->header.predicate_control = BRW_PREDICATE_NONE; p->loop_stack_depth--; return insn; } /* FORWARD JUMPS: */ void brw_land_fwd_jump(struct brw_compile *p, int jmp_insn_idx) { struct intel_context *intel = &p->brw->intel; struct brw_instruction *jmp_insn = &p->store[jmp_insn_idx]; unsigned jmpi = 1; if (intel->gen >= 5) jmpi = 2; assert(jmp_insn->header.opcode == BRW_OPCODE_JMPI); assert(jmp_insn->bits1.da1.src1_reg_file == BRW_IMMEDIATE_VALUE); jmp_insn->bits3.ud = jmpi * (p->nr_insn - jmp_insn_idx - 1); } /* To integrate with the above, it makes sense that the comparison * instruction should populate the flag register. It might be simpler * just to use the flag reg for most WM tasks? */ void brw_CMP(struct brw_compile *p, struct brw_reg dest, unsigned conditional, struct brw_reg src0, struct brw_reg src1) { struct brw_instruction *insn = next_insn(p, BRW_OPCODE_CMP); insn->header.destreg__conditionalmod = conditional; brw_set_dest(p, insn, dest); brw_set_src0(p, insn, src0); brw_set_src1(p, insn, src1); /* guess_execution_size(insn, src0); */ /* Make it so that future instructions will use the computed flag * value until brw_set_predicate_control_flag_value() is called * again. */ if (dest.file == BRW_ARCHITECTURE_REGISTER_FILE && dest.nr == 0) { p->current->header.predicate_control = BRW_PREDICATE_NORMAL; p->flag_value = 0xff; } } /* Issue 'wait' instruction for n1, host could program MMIO to wake up thread. */ void brw_WAIT (struct brw_compile *p) { struct brw_instruction *insn = next_insn(p, BRW_OPCODE_WAIT); struct brw_reg src = brw_notification_1_reg(); brw_set_dest(p, insn, src); brw_set_src0(p, insn, src); brw_set_src1(p, insn, brw_null_reg()); insn->header.execution_size = 0; /* must */ insn->header.predicate_control = 0; insn->header.compression_control = 0; } /*********************************************************************** * Helpers for the various SEND message types: */ /** Extended math function, float[8]. */ void brw_math( struct brw_compile *p, struct brw_reg dest, unsigned function, unsigned msg_reg_nr, struct brw_reg src, unsigned data_type, unsigned precision ) { struct intel_context *intel = &p->brw->intel; if (intel->gen >= 6) { struct brw_instruction *insn = next_insn(p, BRW_OPCODE_MATH); assert(dest.file == BRW_GENERAL_REGISTER_FILE); assert(src.file == BRW_GENERAL_REGISTER_FILE); assert(dest.hstride == BRW_HORIZONTAL_STRIDE_1); if (intel->gen == 6) assert(src.hstride == BRW_HORIZONTAL_STRIDE_1); /* Source modifiers are ignored for extended math instructions on Gen6. */ if (intel->gen == 6) { assert(!src.negate); assert(!src.abs); } if (function == BRW_MATH_FUNCTION_INT_DIV_QUOTIENT || function == BRW_MATH_FUNCTION_INT_DIV_REMAINDER || function == BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER) { assert(src.type != BRW_REGISTER_TYPE_F); } else { assert(src.type == BRW_REGISTER_TYPE_F); } /* Math is the same ISA format as other opcodes, except that CondModifier * becomes FC[3:0] and ThreadCtrl becomes FC[5:4]. */ insn->header.destreg__conditionalmod = function; brw_set_dest(p, insn, dest); brw_set_src0(p, insn, src); brw_set_src1(p, insn, brw_null_reg()); } else { struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); /* Example code doesn't set predicate_control for send * instructions. */ insn->header.predicate_control = 0; insn->header.destreg__conditionalmod = msg_reg_nr; brw_set_dest(p, insn, dest); brw_set_src0(p, insn, src); brw_set_math_message(p, insn, function, src.type == BRW_REGISTER_TYPE_D, precision, data_type); } } /** Extended math function, float[8]. */ void brw_math2(struct brw_compile *p, struct brw_reg dest, unsigned function, struct brw_reg src0, struct brw_reg src1) { struct intel_context *intel = &p->brw->intel; struct brw_instruction *insn = next_insn(p, BRW_OPCODE_MATH); assert(intel->gen >= 6); (void) intel; assert(dest.file == BRW_GENERAL_REGISTER_FILE); assert(src0.file == BRW_GENERAL_REGISTER_FILE); assert(src1.file == BRW_GENERAL_REGISTER_FILE); assert(dest.hstride == BRW_HORIZONTAL_STRIDE_1); if (intel->gen == 6) { assert(src0.hstride == BRW_HORIZONTAL_STRIDE_1); assert(src1.hstride == BRW_HORIZONTAL_STRIDE_1); } if (function == BRW_MATH_FUNCTION_INT_DIV_QUOTIENT || function == BRW_MATH_FUNCTION_INT_DIV_REMAINDER || function == BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER) { assert(src0.type != BRW_REGISTER_TYPE_F); assert(src1.type != BRW_REGISTER_TYPE_F); } else { assert(src0.type == BRW_REGISTER_TYPE_F); assert(src1.type == BRW_REGISTER_TYPE_F); } /* Source modifiers are ignored for extended math instructions on Gen6. */ if (intel->gen == 6) { assert(!src0.negate); assert(!src0.abs); assert(!src1.negate); assert(!src1.abs); } /* Math is the same ISA format as other opcodes, except that CondModifier * becomes FC[3:0] and ThreadCtrl becomes FC[5:4]. */ insn->header.destreg__conditionalmod = function; brw_set_dest(p, insn, dest); brw_set_src0(p, insn, src0); brw_set_src1(p, insn, src1); } /** * Write a block of OWORDs (half a GRF each) from the scratch buffer, * using a constant offset per channel. * * The offset must be aligned to oword size (16 bytes). Used for * register spilling. */ void brw_oword_block_write_scratch(struct brw_compile *p, struct brw_reg mrf, int num_regs, unsigned offset) { struct intel_context *intel = &p->brw->intel; uint32_t msg_control, msg_type; int mlen; if (intel->gen >= 6) offset /= 16; mrf = retype(mrf, BRW_REGISTER_TYPE_UD); if (num_regs == 1) { msg_control = BRW_DATAPORT_OWORD_BLOCK_2_OWORDS; mlen = 2; } else { msg_control = BRW_DATAPORT_OWORD_BLOCK_4_OWORDS; mlen = 3; } /* Set up the message header. This is g0, with g0.2 filled with * the offset. We don't want to leave our offset around in g0 or * it'll screw up texture samples, so set it up inside the message * reg. */ { brw_push_insn_state(p); brw_set_mask_control(p, BRW_MASK_DISABLE); brw_set_compression_control(p, BRW_COMPRESSION_NONE); brw_MOV(p, mrf, retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UD)); /* set message header global offset field (reg 0, element 2) */ brw_MOV(p, retype(brw_vec1_reg(BRW_MESSAGE_REGISTER_FILE, mrf.nr, 2), BRW_REGISTER_TYPE_UD), brw_imm_ud(offset)); brw_pop_insn_state(p); } { struct brw_reg dest; struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); int send_commit_msg; struct brw_reg src_header = retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UW); if (insn->header.compression_control != BRW_COMPRESSION_NONE) { insn->header.compression_control = BRW_COMPRESSION_NONE; src_header = vec16(src_header); } assert(insn->header.predicate_control == BRW_PREDICATE_NONE); insn->header.destreg__conditionalmod = mrf.nr; /* Until gen6, writes followed by reads from the same location * are not guaranteed to be ordered unless write_commit is set. * If set, then a no-op write is issued to the destination * register to set a dependency, and a read from the destination * can be used to ensure the ordering. * * For gen6, only writes between different threads need ordering * protection. Our use of DP writes is all about register * spilling within a thread. */ if (intel->gen >= 6) { dest = retype(vec16(brw_null_reg()), BRW_REGISTER_TYPE_UW); send_commit_msg = 0; } else { dest = src_header; send_commit_msg = 1; } brw_set_dest(p, insn, dest); if (intel->gen >= 6) { brw_set_src0(p, insn, mrf); } else { brw_set_src0(p, insn, brw_null_reg()); } if (intel->gen >= 6) msg_type = GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE; else msg_type = BRW_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE; brw_set_dp_write_message(p, insn, 255, /* binding table index (255=stateless) */ msg_control, msg_type, mlen, true, /* header_present */ 0, /* not a render target */ send_commit_msg, /* response_length */ 0, /* eot */ send_commit_msg); } } /** * Read a block of owords (half a GRF each) from the scratch buffer * using a constant index per channel. * * Offset must be aligned to oword size (16 bytes). Used for register * spilling. */ void brw_oword_block_read_scratch(struct brw_compile *p, struct brw_reg dest, struct brw_reg mrf, int num_regs, unsigned offset) { struct intel_context *intel = &p->brw->intel; uint32_t msg_control; int rlen; if (intel->gen >= 6) offset /= 16; mrf = retype(mrf, BRW_REGISTER_TYPE_UD); dest = retype(dest, BRW_REGISTER_TYPE_UW); if (num_regs == 1) { msg_control = BRW_DATAPORT_OWORD_BLOCK_2_OWORDS; rlen = 1; } else { msg_control = BRW_DATAPORT_OWORD_BLOCK_4_OWORDS; rlen = 2; } { brw_push_insn_state(p); brw_set_compression_control(p, BRW_COMPRESSION_NONE); brw_set_mask_control(p, BRW_MASK_DISABLE); brw_MOV(p, mrf, retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UD)); /* set message header global offset field (reg 0, element 2) */ brw_MOV(p, retype(brw_vec1_reg(BRW_MESSAGE_REGISTER_FILE, mrf.nr, 2), BRW_REGISTER_TYPE_UD), brw_imm_ud(offset)); brw_pop_insn_state(p); } { struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); assert(insn->header.predicate_control == 0); insn->header.compression_control = BRW_COMPRESSION_NONE; insn->header.destreg__conditionalmod = mrf.nr; brw_set_dest(p, insn, dest); /* UW? */ if (intel->gen >= 6) { brw_set_src0(p, insn, mrf); } else { brw_set_src0(p, insn, brw_null_reg()); } brw_set_dp_read_message(p, insn, 255, /* binding table index (255=stateless) */ msg_control, BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ, /* msg_type */ BRW_DATAPORT_READ_TARGET_RENDER_CACHE, 1, /* msg_length */ true, /* header_present */ rlen); } } /** * Read a float[4] vector from the data port Data Cache (const buffer). * Location (in buffer) should be a multiple of 16. * Used for fetching shader constants. */ void brw_oword_block_read(struct brw_compile *p, struct brw_reg dest, struct brw_reg mrf, uint32_t offset, uint32_t bind_table_index) { struct intel_context *intel = &p->brw->intel; /* On newer hardware, offset is in units of owords. */ if (intel->gen >= 6) offset /= 16; mrf = retype(mrf, BRW_REGISTER_TYPE_UD); brw_push_insn_state(p); brw_set_predicate_control(p, BRW_PREDICATE_NONE); brw_set_compression_control(p, BRW_COMPRESSION_NONE); brw_set_mask_control(p, BRW_MASK_DISABLE); brw_MOV(p, mrf, retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UD)); /* set message header global offset field (reg 0, element 2) */ brw_MOV(p, retype(brw_vec1_reg(BRW_MESSAGE_REGISTER_FILE, mrf.nr, 2), BRW_REGISTER_TYPE_UD), brw_imm_ud(offset)); struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); insn->header.destreg__conditionalmod = mrf.nr; /* cast dest to a uword[8] vector */ dest = retype(vec8(dest), BRW_REGISTER_TYPE_UW); brw_set_dest(p, insn, dest); if (intel->gen >= 6) { brw_set_src0(p, insn, mrf); } else { brw_set_src0(p, insn, brw_null_reg()); } brw_set_dp_read_message(p, insn, bind_table_index, BRW_DATAPORT_OWORD_BLOCK_1_OWORDLOW, BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ, BRW_DATAPORT_READ_TARGET_DATA_CACHE, 1, /* msg_length */ true, /* header_present */ 1); /* response_length (1 reg, 2 owords!) */ brw_pop_insn_state(p); } void brw_fb_WRITE(struct brw_compile *p, int dispatch_width, unsigned msg_reg_nr, struct brw_reg src0, unsigned msg_control, unsigned binding_table_index, unsigned msg_length, unsigned response_length, bool eot, bool header_present) { struct intel_context *intel = &p->brw->intel; struct brw_instruction *insn; unsigned msg_type; struct brw_reg dest; if (dispatch_width == 16) dest = retype(vec16(brw_null_reg()), BRW_REGISTER_TYPE_UW); else dest = retype(vec8(brw_null_reg()), BRW_REGISTER_TYPE_UW); if (intel->gen >= 6) { insn = next_insn(p, BRW_OPCODE_SENDC); } else { insn = next_insn(p, BRW_OPCODE_SEND); } /* The execution mask is ignored for render target writes. */ insn->header.predicate_control = 0; insn->header.compression_control = BRW_COMPRESSION_NONE; if (intel->gen >= 6) { /* headerless version, just submit color payload */ src0 = brw_message_reg(msg_reg_nr); msg_type = GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE; } else { insn->header.destreg__conditionalmod = msg_reg_nr; msg_type = BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE; } brw_set_dest(p, insn, dest); brw_set_src0(p, insn, src0); brw_set_dp_write_message(p, insn, binding_table_index, msg_control, msg_type, msg_length, header_present, eot, /* last render target write */ response_length, eot, 0 /* send_commit_msg */); } /** * Texture sample instruction. * Note: the msg_type plus msg_length values determine exactly what kind * of sampling operation is performed. See volume 4, page 161 of docs. */ void brw_SAMPLE(struct brw_compile *p, struct brw_reg dest, unsigned msg_reg_nr, struct brw_reg src0, unsigned binding_table_index, unsigned sampler, unsigned writemask, unsigned msg_type, unsigned response_length, unsigned msg_length, unsigned header_present, unsigned simd_mode, unsigned return_format) { struct intel_context *intel = &p->brw->intel; bool need_stall = 0; if (writemask == 0) { /*printf("%s: zero writemask??\n", __FUNCTION__); */ return; } /* Hardware doesn't do destination dependency checking on send * instructions properly. Add a workaround which generates the * dependency by other means. In practice it seems like this bug * only crops up for texture samples, and only where registers are * written by the send and then written again later without being * read in between. Luckily for us, we already track that * information and use it to modify the writemask for the * instruction, so that is a guide for whether a workaround is * needed. */ if (writemask != BRW_WRITEMASK_XYZW) { unsigned dst_offset = 0; unsigned i, newmask = 0, len = 0; for (i = 0; i < 4; i++) { if (writemask & (1<current, dest); if (p->current->header.execution_size == BRW_EXECUTE_16) dispatch_16 = true; newmask = ~newmask & BRW_WRITEMASK_XYZW; brw_push_insn_state(p); brw_set_compression_control(p, BRW_COMPRESSION_NONE); brw_set_mask_control(p, BRW_MASK_DISABLE); brw_MOV(p, retype(m1, BRW_REGISTER_TYPE_UD), retype(brw_vec8_grf(0,0), BRW_REGISTER_TYPE_UD)); brw_MOV(p, get_element_ud(m1, 2), brw_imm_ud(newmask << 12)); brw_pop_insn_state(p); src0 = retype(brw_null_reg(), BRW_REGISTER_TYPE_UW); dest = offset(dest, dst_offset); /* For 16-wide dispatch, masked channels are skipped in the * response. For 8-wide, masked channels still take up slots, * and are just not written to. */ if (dispatch_16) response_length = len * 2; } } { struct brw_instruction *insn; gen6_resolve_implied_move(p, &src0, msg_reg_nr); insn = next_insn(p, BRW_OPCODE_SEND); insn->header.predicate_control = 0; /* XXX */ insn->header.compression_control = BRW_COMPRESSION_NONE; if (intel->gen < 6) insn->header.destreg__conditionalmod = msg_reg_nr; brw_set_dest(p, insn, dest); brw_set_src0(p, insn, src0); brw_set_sampler_message(p, insn, binding_table_index, sampler, msg_type, response_length, msg_length, header_present, simd_mode, return_format); } if (need_stall) { struct brw_reg reg = vec8(offset(dest, response_length-1)); /* mov (8) r9.0<1>:f r9.0<8;8,1>:f { Align1 } */ brw_push_insn_state(p); brw_set_compression_control(p, BRW_COMPRESSION_NONE); brw_MOV(p, retype(reg, BRW_REGISTER_TYPE_UD), retype(reg, BRW_REGISTER_TYPE_UD)); brw_pop_insn_state(p); } } /* All these variables are pretty confusing - we might be better off * using bitmasks and macros for this, in the old style. Or perhaps * just having the caller instantiate the fields in dword3 itself. */ void brw_urb_WRITE(struct brw_compile *p, struct brw_reg dest, unsigned msg_reg_nr, struct brw_reg src0, bool allocate, bool used, unsigned msg_length, unsigned response_length, bool eot, bool writes_complete, unsigned offset, unsigned swizzle) { struct intel_context *intel = &p->brw->intel; struct brw_instruction *insn; gen6_resolve_implied_move(p, &src0, msg_reg_nr); if (intel->gen == 7) { /* Enable Channel Masks in the URB_WRITE_HWORD message header */ brw_push_insn_state(p); brw_set_access_mode(p, BRW_ALIGN_1); brw_OR(p, retype(brw_vec1_reg(BRW_MESSAGE_REGISTER_FILE, msg_reg_nr, 5), BRW_REGISTER_TYPE_UD), retype(brw_vec1_grf(0, 5), BRW_REGISTER_TYPE_UD), brw_imm_ud(0xff00)); brw_pop_insn_state(p); } insn = next_insn(p, BRW_OPCODE_SEND); assert(msg_length < BRW_MAX_MRF); brw_set_dest(p, insn, dest); brw_set_src0(p, insn, src0); brw_set_src1(p, insn, brw_imm_d(0)); if (intel->gen < 6) insn->header.destreg__conditionalmod = msg_reg_nr; brw_set_urb_message(p, insn, allocate, used, msg_length, response_length, eot, writes_complete, offset, swizzle); } static int next_ip(struct brw_compile *p, int ip) { struct brw_instruction *insn = (void *)p->store + ip; if (insn->header.cmpt_control) return ip + 8; else return ip + 16; } static int brw_find_next_block_end(struct brw_compile *p, int start) { int ip; void *store = p->store; for (ip = next_ip(p, start); ip < p->next_insn_offset; ip = next_ip(p, ip)) { struct brw_instruction *insn = store + ip; switch (insn->header.opcode) { case BRW_OPCODE_ENDIF: case BRW_OPCODE_ELSE: case BRW_OPCODE_WHILE: case BRW_OPCODE_HALT: return ip; } } return 0; } /* There is no DO instruction on gen6, so to find the end of the loop * we have to see if the loop is jumping back before our start * instruction. */ static int brw_find_loop_end(struct brw_compile *p, int start) { struct intel_context *intel = &p->brw->intel; int ip; int scale = 8; void *store = p->store; /* Always start after the instruction (such as a WHILE) we're trying to fix * up. */ for (ip = next_ip(p, start); ip < p->next_insn_offset; ip = next_ip(p, ip)) { struct brw_instruction *insn = store + ip; if (insn->header.opcode == BRW_OPCODE_WHILE) { int jip = intel->gen == 6 ? insn->bits1.branch_gen6.jump_count : insn->bits3.break_cont.jip; if (ip + jip * scale <= start) return ip; } } assert(!"not reached"); return start; } /* After program generation, go back and update the UIP and JIP of * BREAK, CONT, and HALT instructions to their correct locations. */ void brw_set_uip_jip(struct brw_compile *p) { struct intel_context *intel = &p->brw->intel; int ip; int scale = 8; void *store = p->store; if (intel->gen < 6) return; for (ip = 0; ip < p->next_insn_offset; ip = next_ip(p, ip)) { struct brw_instruction *insn = store + ip; if (insn->header.cmpt_control) { /* Fixups for compacted BREAK/CONTINUE not supported yet. */ assert(insn->header.opcode != BRW_OPCODE_BREAK && insn->header.opcode != BRW_OPCODE_CONTINUE && insn->header.opcode != BRW_OPCODE_HALT); continue; } int block_end_ip = brw_find_next_block_end(p, ip); switch (insn->header.opcode) { case BRW_OPCODE_BREAK: assert(block_end_ip != 0); insn->bits3.break_cont.jip = (block_end_ip - ip) / scale; /* Gen7 UIP points to WHILE; Gen6 points just after it */ insn->bits3.break_cont.uip = (brw_find_loop_end(p, ip) - ip + (intel->gen == 6 ? 16 : 0)) / scale; break; case BRW_OPCODE_CONTINUE: assert(block_end_ip != 0); insn->bits3.break_cont.jip = (block_end_ip - ip) / scale; insn->bits3.break_cont.uip = (brw_find_loop_end(p, ip) - ip) / scale; assert(insn->bits3.break_cont.uip != 0); assert(insn->bits3.break_cont.jip != 0); break; case BRW_OPCODE_ENDIF: if (block_end_ip == 0) insn->bits3.break_cont.jip = 2; else insn->bits3.break_cont.jip = (block_end_ip - ip) / scale; break; case BRW_OPCODE_HALT: /* From the Sandy Bridge PRM (volume 4, part 2, section 8.3.19): * * "In case of the halt instruction not inside any conditional * code block, the value of and should be the * same. In case of the halt instruction inside conditional code * block, the should be the end of the program, and the * should be end of the most inner conditional code block." * * The uip will have already been set by whoever set up the * instruction. */ if (block_end_ip == 0) { insn->bits3.break_cont.jip = insn->bits3.break_cont.uip; } else { insn->bits3.break_cont.jip = (block_end_ip - ip) / scale; } assert(insn->bits3.break_cont.uip != 0); assert(insn->bits3.break_cont.jip != 0); break; } } } void brw_ff_sync(struct brw_compile *p, struct brw_reg dest, unsigned msg_reg_nr, struct brw_reg src0, bool allocate, unsigned response_length, bool eot) { struct intel_context *intel = &p->brw->intel; struct brw_instruction *insn; gen6_resolve_implied_move(p, &src0, msg_reg_nr); insn = next_insn(p, BRW_OPCODE_SEND); brw_set_dest(p, insn, dest); brw_set_src0(p, insn, src0); brw_set_src1(p, insn, brw_imm_d(0)); if (intel->gen < 6) insn->header.destreg__conditionalmod = msg_reg_nr; brw_set_ff_sync_message(p, insn, allocate, response_length, eot); } /** * Emit the SEND instruction necessary to generate stream output data on Gen6 * (for transform feedback). * * If send_commit_msg is true, this is the last piece of stream output data * from this thread, so send the data as a committed write. According to the * Sandy Bridge PRM (volume 2 part 1, section 4.5.1): * * "Prior to End of Thread with a URB_WRITE, the kernel must ensure all * writes are complete by sending the final write as a committed write." */ void brw_svb_write(struct brw_compile *p, struct brw_reg dest, unsigned msg_reg_nr, struct brw_reg src0, unsigned binding_table_index, bool send_commit_msg) { struct brw_instruction *insn; gen6_resolve_implied_move(p, &src0, msg_reg_nr); insn = next_insn(p, BRW_OPCODE_SEND); brw_set_dest(p, insn, dest); brw_set_src0(p, insn, src0); brw_set_src1(p, insn, brw_imm_d(0)); brw_set_dp_write_message(p, insn, binding_table_index, 0, /* msg_control: ignored */ GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE, 1, /* msg_length */ true, /* header_present */ 0, /* last_render_target: ignored */ send_commit_msg, /* response_length */ 0, /* end_of_thread */ send_commit_msg); /* send_commit_msg */ } /** * This instruction is generated as a single-channel align1 instruction by * both the VS and FS stages when using INTEL_DEBUG=shader_time. * * We can't use the typed atomic op in the FS because that has the execution * mask ANDed with the pixel mask, but we just want to write the one dword for * all the pixels. * * We don't use the SIMD4x2 atomic ops in the VS because want to just write * one u32. So we use the same untyped atomic write message as the pixel * shader. * * The untyped atomic operation requires a BUFFER surface type with RAW * format, and is only accessible through the legacy DATA_CACHE dataport * messages. */ void brw_shader_time_add(struct brw_compile *p, int base_mrf, uint32_t surf_index) { struct intel_context *intel = &p->brw->intel; assert(intel->gen >= 7); brw_push_insn_state(p); brw_set_access_mode(p, BRW_ALIGN_1); brw_set_mask_control(p, BRW_MASK_DISABLE); struct brw_instruction *send = brw_next_insn(p, BRW_OPCODE_SEND); brw_pop_insn_state(p); /* We use brw_vec1_reg and unmasked because we want to increment the given * offset only once. */ brw_set_dest(p, send, brw_vec1_reg(BRW_ARCHITECTURE_REGISTER_FILE, BRW_ARF_NULL, 0)); brw_set_src0(p, send, brw_vec1_reg(BRW_MESSAGE_REGISTER_FILE, base_mrf, 0)); bool header_present = false; bool eot = false; uint32_t mlen = 2; /* offset, value */ uint32_t rlen = 0; brw_set_message_descriptor(p, send, GEN7_SFID_DATAPORT_DATA_CACHE, mlen, rlen, header_present, eot); send->bits3.ud |= 6 << 14; /* untyped atomic op */ send->bits3.ud |= 0 << 13; /* no return data */ send->bits3.ud |= 1 << 12; /* SIMD8 mode */ send->bits3.ud |= BRW_AOP_ADD << 8; send->bits3.ud |= surf_index << 0; } intel-gpu-tools-1.14/assembler/brw_eu.c0000644000175000017500000001710612665336131015041 00000000000000/* Copyright (C) Intel Corp. 2006. All Rights Reserved. Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to develop this 3D driver. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **********************************************************************/ /* * Authors: * Keith Whitwell */ #include #include "brw_context.h" #include "brw_defines.h" #include "brw_eu.h" #include "ralloc.h" /* Returns the corresponding conditional mod for swapping src0 and * src1 in e.g. CMP. */ uint32_t brw_swap_cmod(uint32_t cmod) { switch (cmod) { case BRW_CONDITIONAL_Z: case BRW_CONDITIONAL_NZ: return cmod; case BRW_CONDITIONAL_G: return BRW_CONDITIONAL_L; case BRW_CONDITIONAL_GE: return BRW_CONDITIONAL_LE; case BRW_CONDITIONAL_L: return BRW_CONDITIONAL_G; case BRW_CONDITIONAL_LE: return BRW_CONDITIONAL_GE; default: return ~0; } } /* How does predicate control work when execution_size != 8? Do I * need to test/set for 0xffff when execution_size is 16? */ void brw_set_predicate_control_flag_value( struct brw_compile *p, unsigned value ) { p->current->header.predicate_control = BRW_PREDICATE_NONE; if (value != 0xff) { if (value != p->flag_value) { brw_push_insn_state(p); brw_MOV(p, brw_flag_reg(0, 0), brw_imm_uw(value)); p->flag_value = value; brw_pop_insn_state(p); } p->current->header.predicate_control = BRW_PREDICATE_NORMAL; } } void brw_set_predicate_control( struct brw_compile *p, unsigned pc ) { p->current->header.predicate_control = pc; } void brw_set_predicate_inverse(struct brw_compile *p, bool predicate_inverse) { p->current->header.predicate_inverse = predicate_inverse; } void brw_set_conditionalmod( struct brw_compile *p, unsigned conditional ) { p->current->header.destreg__conditionalmod = conditional; } void brw_set_flag_reg(struct brw_compile *p, int reg, int subreg) { p->current->bits2.da1.flag_reg_nr = reg; p->current->bits2.da1.flag_subreg_nr = subreg; } void brw_set_access_mode( struct brw_compile *p, unsigned access_mode ) { p->current->header.access_mode = access_mode; } void brw_set_compression_control(struct brw_compile *p, enum brw_compression compression_control) { p->compressed = (compression_control == BRW_COMPRESSION_COMPRESSED); if (p->brw->intel.gen >= 6) { /* Since we don't use the 32-wide support in gen6, we translate * the pre-gen6 compression control here. */ switch (compression_control) { case BRW_COMPRESSION_NONE: /* This is the "use the first set of bits of dmask/vmask/arf * according to execsize" option. */ p->current->header.compression_control = GEN6_COMPRESSION_1Q; break; case BRW_COMPRESSION_2NDHALF: /* For 8-wide, this is "use the second set of 8 bits." */ p->current->header.compression_control = GEN6_COMPRESSION_2Q; break; case BRW_COMPRESSION_COMPRESSED: /* For 16-wide instruction compression, use the first set of 16 bits * since we don't do 32-wide dispatch. */ p->current->header.compression_control = GEN6_COMPRESSION_1H; break; default: assert(!"not reached"); p->current->header.compression_control = GEN6_COMPRESSION_1H; break; } } else { p->current->header.compression_control = compression_control; } } void brw_set_mask_control( struct brw_compile *p, unsigned value ) { p->current->header.mask_control = value; } void brw_set_saturate( struct brw_compile *p, bool enable ) { p->current->header.saturate = enable; } void brw_set_acc_write_control(struct brw_compile *p, unsigned value) { if (p->brw->intel.gen >= 6) p->current->header.acc_wr_control = value; } void brw_push_insn_state( struct brw_compile *p ) { assert(p->current != &p->stack[BRW_EU_MAX_INSN_STACK-1]); memcpy(p->current+1, p->current, sizeof(struct brw_instruction)); p->compressed_stack[p->current - p->stack] = p->compressed; p->current++; } void brw_pop_insn_state( struct brw_compile *p ) { assert(p->current != p->stack); p->current--; p->compressed = p->compressed_stack[p->current - p->stack]; } /*********************************************************************** */ void brw_init_compile(struct brw_context *brw, struct brw_compile *p, void *mem_ctx) { memset(p, 0, sizeof(*p)); p->brw = brw; /* * Set the initial instruction store array size to 1024, if found that * isn't enough, then it will double the store size at brw_next_insn() * until out of memory. */ p->store_size = 1024; p->store = rzalloc_array(mem_ctx, struct brw_instruction, p->store_size); p->nr_insn = 0; p->current = p->stack; p->compressed = false; memset(p->current, 0, sizeof(p->current[0])); p->mem_ctx = mem_ctx; /* Some defaults? */ brw_set_mask_control(p, BRW_MASK_ENABLE); /* what does this do? */ brw_set_saturate(p, 0); brw_set_compression_control(p, BRW_COMPRESSION_NONE); brw_set_predicate_control_flag_value(p, 0xff); /* Set up control flow stack */ p->if_stack_depth = 0; p->if_stack_array_size = 16; p->if_stack = rzalloc_array(mem_ctx, int, p->if_stack_array_size); p->loop_stack_depth = 0; p->loop_stack_array_size = 16; p->loop_stack = rzalloc_array(mem_ctx, int, p->loop_stack_array_size); p->if_depth_in_loop = rzalloc_array(mem_ctx, int, p->loop_stack_array_size); brw_init_compaction_tables(&brw->intel); } const unsigned *brw_get_program( struct brw_compile *p, unsigned *sz ) { brw_compact_instructions(p); *sz = p->next_insn_offset; return (const unsigned *)p->store; } void brw_dump_compile(struct brw_compile *p, FILE *out, int start, int end) { struct brw_context *brw = p->brw; struct intel_context *intel = &brw->intel; void *store = p->store; bool dump_hex = false; for (int offset = start; offset < end;) { struct brw_instruction *insn = store + offset; struct brw_instruction uncompacted; printf("0x%08x: ", offset); if (insn->header.cmpt_control) { struct brw_compact_instruction *compacted = (void *)insn; if (dump_hex) { printf("0x%08x 0x%08x ", ((uint32_t *)insn)[1], ((uint32_t *)insn)[0]); } brw_uncompact_instruction(intel, &uncompacted, compacted); insn = &uncompacted; offset += 8; } else { if (dump_hex) { printf("0x%08x 0x%08x 0x%08x 0x%08x ", ((uint32_t *)insn)[3], ((uint32_t *)insn)[2], ((uint32_t *)insn)[1], ((uint32_t *)insn)[0]); } offset += 16; } brw_disasm(stdout, insn, p->brw->intel.gen); } } intel-gpu-tools-1.14/assembler/lex.c0000644000175000017500000032056312665336502014354 00000000000000 #line 3 "lex.c" #define YY_INT_ALIGNED short int /* A lexical scanner generated by flex */ #define FLEX_SCANNER #define YY_FLEX_MAJOR_VERSION 2 #define YY_FLEX_MINOR_VERSION 5 #define YY_FLEX_SUBMINOR_VERSION 39 #if YY_FLEX_SUBMINOR_VERSION > 0 #define FLEX_BETA #endif /* First, we deal with platform-specific or compiler-specific issues. */ /* begin standard C headers. */ #include #include #include #include /* end standard C headers. */ /* flex integer type definitions */ #ifndef FLEXINT_H #define FLEXINT_H /* C99 systems have . Non-C99 systems may or may not. */ #if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L /* C99 says to define __STDC_LIMIT_MACROS before including stdint.h, * if you want the limit (max/min) macros for int types. */ #ifndef __STDC_LIMIT_MACROS #define __STDC_LIMIT_MACROS 1 #endif #include typedef int8_t flex_int8_t; typedef uint8_t flex_uint8_t; typedef int16_t flex_int16_t; typedef uint16_t flex_uint16_t; typedef int32_t flex_int32_t; typedef uint32_t flex_uint32_t; #else typedef signed char flex_int8_t; typedef short int flex_int16_t; typedef int flex_int32_t; typedef unsigned char flex_uint8_t; typedef unsigned short int flex_uint16_t; typedef unsigned int flex_uint32_t; /* Limits of integral types. */ #ifndef INT8_MIN #define INT8_MIN (-128) #endif #ifndef INT16_MIN #define INT16_MIN (-32767-1) #endif #ifndef INT32_MIN #define INT32_MIN (-2147483647-1) #endif #ifndef INT8_MAX #define INT8_MAX (127) #endif #ifndef INT16_MAX #define INT16_MAX (32767) #endif #ifndef INT32_MAX #define INT32_MAX (2147483647) #endif #ifndef UINT8_MAX #define UINT8_MAX (255U) #endif #ifndef UINT16_MAX #define UINT16_MAX (65535U) #endif #ifndef UINT32_MAX #define UINT32_MAX (4294967295U) #endif #endif /* ! C99 */ #endif /* ! FLEXINT_H */ #ifdef __cplusplus /* The "const" storage-class-modifier is valid. */ #define YY_USE_CONST #else /* ! __cplusplus */ /* C99 requires __STDC__ to be defined as 1. */ #if defined (__STDC__) #define YY_USE_CONST #endif /* defined (__STDC__) */ #endif /* ! __cplusplus */ #ifdef YY_USE_CONST #define yyconst const #else #define yyconst #endif /* Returned upon end-of-file. */ #define YY_NULL 0 /* Promotes a possibly negative, possibly signed char to an unsigned * integer for use as an array index. If the signed char is negative, * we want to instead treat it as an 8-bit unsigned char, hence the * double cast. */ #define YY_SC_TO_UI(c) ((unsigned int) (unsigned char) c) /* Enter a start condition. This macro really ought to take a parameter, * but we do it the disgusting crufty way forced on us by the ()-less * definition of BEGIN. */ #define BEGIN (yy_start) = 1 + 2 * /* Translate the current start state into a value that can be later handed * to BEGIN to return to the state. The YYSTATE alias is for lex * compatibility. */ #define YY_START (((yy_start) - 1) / 2) #define YYSTATE YY_START /* Action number for EOF rule of a given start state. */ #define YY_STATE_EOF(state) (YY_END_OF_BUFFER + state + 1) /* Special action meaning "start processing a new file". */ #define YY_NEW_FILE yyrestart(yyin ) #define YY_END_OF_BUFFER_CHAR 0 /* Size of default input buffer. */ #ifndef YY_BUF_SIZE #ifdef __ia64__ /* On IA-64, the buffer size is 16k, not 8k. * Moreover, YY_BUF_SIZE is 2*YY_READ_BUF_SIZE in the general case. * Ditto for the __ia64__ case accordingly. */ #define YY_BUF_SIZE 32768 #else #define YY_BUF_SIZE 16384 #endif /* __ia64__ */ #endif /* The state buf must be large enough to hold one state per character in the main buffer. */ #define YY_STATE_BUF_SIZE ((YY_BUF_SIZE + 2) * sizeof(yy_state_type)) #ifndef YY_TYPEDEF_YY_BUFFER_STATE #define YY_TYPEDEF_YY_BUFFER_STATE typedef struct yy_buffer_state *YY_BUFFER_STATE; #endif #ifndef YY_TYPEDEF_YY_SIZE_T #define YY_TYPEDEF_YY_SIZE_T typedef size_t yy_size_t; #endif extern yy_size_t yyleng; extern FILE *yyin, *yyout; #define EOB_ACT_CONTINUE_SCAN 0 #define EOB_ACT_END_OF_FILE 1 #define EOB_ACT_LAST_MATCH 2 /* Note: We specifically omit the test for yy_rule_can_match_eol because it requires * access to the local variable yy_act. Since yyless() is a macro, it would break * existing scanners that call yyless() from OUTSIDE yylex. * One obvious solution it to make yy_act a global. I tried that, and saw * a 5% performance hit in a non-yylineno scanner, because yy_act is * normally declared as a register variable-- so it is not worth it. */ #define YY_LESS_LINENO(n) \ do { \ int yyl;\ for ( yyl = n; yyl < yyleng; ++yyl )\ if ( yytext[yyl] == '\n' )\ --yylineno;\ }while(0) #define YY_LINENO_REWIND_TO(dst) \ do {\ const char *p;\ for ( p = yy_cp-1; p >= (dst); --p)\ if ( *p == '\n' )\ --yylineno;\ }while(0) /* Return all but the first "n" matched characters back to the input stream. */ #define yyless(n) \ do \ { \ /* Undo effects of setting up yytext. */ \ int yyless_macro_arg = (n); \ YY_LESS_LINENO(yyless_macro_arg);\ *yy_cp = (yy_hold_char); \ YY_RESTORE_YY_MORE_OFFSET \ (yy_c_buf_p) = yy_cp = yy_bp + yyless_macro_arg - YY_MORE_ADJ; \ YY_DO_BEFORE_ACTION; /* set up yytext again */ \ } \ while ( 0 ) #define unput(c) yyunput( c, (yytext_ptr) ) #ifndef YY_STRUCT_YY_BUFFER_STATE #define YY_STRUCT_YY_BUFFER_STATE struct yy_buffer_state { FILE *yy_input_file; char *yy_ch_buf; /* input buffer */ char *yy_buf_pos; /* current position in input buffer */ /* Size of input buffer in bytes, not including room for EOB * characters. */ yy_size_t yy_buf_size; /* Number of characters read into yy_ch_buf, not including EOB * characters. */ yy_size_t yy_n_chars; /* Whether we "own" the buffer - i.e., we know we created it, * and can realloc() it to grow it, and should free() it to * delete it. */ int yy_is_our_buffer; /* Whether this is an "interactive" input source; if so, and * if we're using stdio for input, then we want to use getc() * instead of fread(), to make sure we stop fetching input after * each newline. */ int yy_is_interactive; /* Whether we're considered to be at the beginning of a line. * If so, '^' rules will be active on the next match, otherwise * not. */ int yy_at_bol; int yy_bs_lineno; /**< The line count. */ int yy_bs_column; /**< The column count. */ /* Whether to try to fill the input buffer when we reach the * end of it. */ int yy_fill_buffer; int yy_buffer_status; #define YY_BUFFER_NEW 0 #define YY_BUFFER_NORMAL 1 /* When an EOF's been seen but there's still some text to process * then we mark the buffer as YY_EOF_PENDING, to indicate that we * shouldn't try reading from the input source any more. We might * still have a bunch of tokens to match, though, because of * possible backing-up. * * When we actually see the EOF, we change the status to "new" * (via yyrestart()), so that the user can continue scanning by * just pointing yyin at a new input file. */ #define YY_BUFFER_EOF_PENDING 2 }; #endif /* !YY_STRUCT_YY_BUFFER_STATE */ /* Stack of input buffers. */ static size_t yy_buffer_stack_top = 0; /**< index of top of stack. */ static size_t yy_buffer_stack_max = 0; /**< capacity of stack. */ static YY_BUFFER_STATE * yy_buffer_stack = 0; /**< Stack as an array. */ /* We provide macros for accessing buffer states in case in the * future we want to put the buffer states in a more general * "scanner state". * * Returns the top of the stack, or NULL. */ #define YY_CURRENT_BUFFER ( (yy_buffer_stack) \ ? (yy_buffer_stack)[(yy_buffer_stack_top)] \ : NULL) /* Same as previous macro, but useful when we know that the buffer stack is not * NULL or when we need an lvalue. For internal use only. */ #define YY_CURRENT_BUFFER_LVALUE (yy_buffer_stack)[(yy_buffer_stack_top)] /* yy_hold_char holds the character lost when yytext is formed. */ static char yy_hold_char; static yy_size_t yy_n_chars; /* number of characters read into yy_ch_buf */ yy_size_t yyleng; /* Points to current character in buffer. */ static char *yy_c_buf_p = (char *) 0; static int yy_init = 0; /* whether we need to initialize */ static int yy_start = 0; /* start state number */ /* Flag which is used to allow yywrap()'s to do buffer switches * instead of setting up a fresh yyin. A bit of a hack ... */ static int yy_did_buffer_switch_on_eof; void yyrestart (FILE *input_file ); void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer ); YY_BUFFER_STATE yy_create_buffer (FILE *file,int size ); void yy_delete_buffer (YY_BUFFER_STATE b ); void yy_flush_buffer (YY_BUFFER_STATE b ); void yypush_buffer_state (YY_BUFFER_STATE new_buffer ); void yypop_buffer_state (void ); static void yyensure_buffer_stack (void ); static void yy_load_buffer_state (void ); static void yy_init_buffer (YY_BUFFER_STATE b,FILE *file ); #define YY_FLUSH_BUFFER yy_flush_buffer(YY_CURRENT_BUFFER ) YY_BUFFER_STATE yy_scan_buffer (char *base,yy_size_t size ); YY_BUFFER_STATE yy_scan_string (yyconst char *yy_str ); YY_BUFFER_STATE yy_scan_bytes (yyconst char *bytes,yy_size_t len ); void *yyalloc (yy_size_t ); void *yyrealloc (void *,yy_size_t ); void yyfree (void * ); #define yy_new_buffer yy_create_buffer #define yy_set_interactive(is_interactive) \ { \ if ( ! YY_CURRENT_BUFFER ){ \ yyensure_buffer_stack (); \ YY_CURRENT_BUFFER_LVALUE = \ yy_create_buffer(yyin,YY_BUF_SIZE ); \ } \ YY_CURRENT_BUFFER_LVALUE->yy_is_interactive = is_interactive; \ } #define yy_set_bol(at_bol) \ { \ if ( ! YY_CURRENT_BUFFER ){\ yyensure_buffer_stack (); \ YY_CURRENT_BUFFER_LVALUE = \ yy_create_buffer(yyin,YY_BUF_SIZE ); \ } \ YY_CURRENT_BUFFER_LVALUE->yy_at_bol = at_bol; \ } #define YY_AT_BOL() (YY_CURRENT_BUFFER_LVALUE->yy_at_bol) /* Begin user sect3 */ typedef unsigned char YY_CHAR; FILE *yyin = (FILE *) 0, *yyout = (FILE *) 0; typedef int yy_state_type; extern int yylineno; int yylineno = 1; extern char *yytext; #define yytext_ptr yytext static yy_state_type yy_get_previous_state (void ); static yy_state_type yy_try_NUL_trans (yy_state_type current_state ); static int yy_get_next_buffer (void ); static void yy_fatal_error (yyconst char msg[] ); /* Done after the current pattern has been matched and before the * corresponding action - sets up yytext. */ #define YY_DO_BEFORE_ACTION \ (yytext_ptr) = yy_bp; \ yyleng = (size_t) (yy_cp - yy_bp); \ (yy_hold_char) = *yy_cp; \ *yy_cp = '\0'; \ (yy_c_buf_p) = yy_cp; #define YY_NUM_RULES 243 #define YY_END_OF_BUFFER 244 /* This struct is not used in this scanner, but its presence is necessary. */ struct yy_trans_info { flex_int32_t yy_verify; flex_int32_t yy_nxt; }; static yyconst flex_int16_t yy_accept[679] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 244, 242, 240, 241, 242, 102, 103, 114, 112, 110, 113, 111, 115, 238, 238, 116, 101, 104, 117, 105, 236, 165, 236, 157, 236, 167, 142, 236, 236, 236, 236, 236, 122, 236, 236, 236, 142, 236, 236, 236, 171, 161, 236, 108, 109, 106, 107, 8, 9, 8, 8, 17, 243, 16, 13, 14, 15, 11, 243, 154, 133, 134, 131, 135, 130, 132, 141, 140, 139, 136, 137, 138, 240, 0, 0, 0, 0, 0, 0, 0, 226, 229, 0, 231, 0, 234, 233, 0, 235, 225, 6, 0, 0, 238, 0, 166, 158, 168, 0, 172, 162, 120, 236, 236, 236, 236, 236, 236, 236, 236, 236, 236, 236, 236, 236, 236, 236, 236, 236, 236, 77, 236, 236, 236, 236, 236, 236, 128, 128, 128, 236, 236, 129, 236, 236, 65, 236, 236, 145, 236, 236, 236, 236, 236, 236, 121, 236, 236, 236, 236, 236, 236, 127, 127, 236, 236, 53, 236, 236, 236, 236, 236, 236, 236, 236, 236, 236, 236, 236, 236, 236, 236, 236, 236, 236, 236, 163, 155, 236, 236, 159, 169, 236, 236, 236, 236, 236, 7, 11, 11, 0, 131, 140, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 230, 0, 232, 228, 227, 0, 0, 0, 1, 1, 239, 237, 164, 156, 160, 170, 236, 49, 236, 236, 236, 52, 57, 236, 48, 236, 33, 236, 236, 82, 81, 236, 236, 236, 236, 58, 236, 236, 208, 143, 94, 236, 46, 45, 43, 44, 236, 236, 236, 236, 200, 203, 236, 236, 29, 30, 20, 236, 236, 66, 236, 152, 236, 201, 236, 236, 236, 153, 202, 32, 26, 38, 31, 236, 236, 236, 19, 236, 124, 236, 236, 37, 0, 236, 236, 63, 25, 236, 83, 75, 206, 236, 236, 80, 236, 236, 205, 236, 236, 236, 236, 51, 236, 56, 55, 236, 207, 236, 144, 236, 236, 236, 236, 236, 236, 91, 236, 93, 236, 236, 236, 54, 12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 187, 237, 119, 236, 50, 236, 236, 236, 236, 182, 34, 35, 236, 236, 79, 47, 236, 59, 236, 70, 236, 236, 236, 68, 236, 236, 236, 236, 71, 236, 150, 236, 236, 236, 64, 40, 236, 151, 39, 236, 86, 84, 236, 236, 125, 126, 236, 236, 18, 73, 89, 85, 22, 23, 21, 24, 41, 236, 236, 236, 236, 61, 236, 236, 204, 236, 60, 236, 236, 236, 186, 97, 76, 236, 236, 0, 0, 0, 10, 118, 0, 0, 0, 0, 216, 0, 0, 0, 0, 215, 0, 0, 0, 0, 0, 0, 236, 236, 236, 146, 236, 36, 69, 149, 236, 191, 236, 236, 236, 78, 236, 236, 236, 147, 236, 236, 236, 148, 123, 236, 74, 72, 236, 236, 42, 236, 236, 236, 62, 236, 236, 236, 236, 236, 236, 67, 90, 175, 0, 0, 10, 0, 218, 220, 222, 0, 217, 219, 221, 0, 4, 4, 0, 0, 0, 0, 0, 0, 236, 188, 236, 193, 236, 236, 236, 236, 236, 236, 236, 236, 210, 236, 211, 236, 236, 236, 197, 236, 214, 236, 213, 209, 236, 192, 236, 236, 0, 0, 0, 224, 223, 0, 0, 0, 0, 0, 0, 236, 189, 236, 236, 236, 236, 236, 236, 27, 28, 88, 236, 236, 236, 194, 195, 87, 190, 236, 236, 236, 0, 0, 173, 181, 0, 0, 0, 0, 2, 2, 0, 236, 96, 236, 98, 236, 236, 236, 236, 236, 236, 236, 236, 236, 0, 0, 0, 0, 0, 0, 199, 236, 95, 185, 236, 212, 236, 236, 184, 236, 99, 176, 0, 0, 0, 0, 5, 5, 0, 0, 198, 236, 100, 236, 236, 0, 0, 0, 0, 0, 183, 236, 236, 174, 0, 0, 0, 3, 3, 0, 0, 196, 236, 0, 0, 0, 0, 236, 0, 0, 0, 0, 92, 0, 0, 0, 0, 0, 0, 0, 178, 0, 0, 0, 0, 0, 177, 0, 0, 0, 0, 0, 0, 0, 180, 179, 0 } ; static yyconst flex_int32_t yy_ec[256] = { 0, 1, 1, 1, 1, 1, 1, 1, 1, 2, 3, 1, 1, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 5, 1, 6, 7, 1, 1, 1, 1, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 21, 23, 21, 24, 25, 26, 27, 28, 1, 1, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 1, 56, 1, 57, 1, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 1, 85, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 } ; static yyconst flex_int32_t yy_meta[86] = { 0, 1, 1, 1, 1, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 3, 3, 3, 3, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 1, 1, 4, 3, 3, 3, 3, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 1, 1 } ; static yyconst flex_int16_t yy_base[693] = { 0, 0, 0, 83, 85, 87, 91, 80, 88, 598, 593, 172, 198, 224, 305, 584, 1695, 110, 1695, 77, 63, 1695, 1695, 1695, 1695, 106, 360, 103, 214, 133, 220, 1695, 1695, 1695, 1695, 428, 102, 243, 288, 216, 321, 352, 101, 420, 91, 0, 465, 533, 547, 87, 423, 610, 658, 348, 542, 233, 438, 91, 1695, 1695, 1695, 1695, 1695, 1695, 1695, 527, 1695, 1695, 1695, 1695, 1695, 1695, 504, 0, 1695, 1695, 1695, 186, 1695, 1695, 1695, 1695, 618, 1695, 1695, 1695, 1695, 114, 479, 98, 107, 642, 211, 115, 149, 154, 228, 229, 230, 300, 1695, 231, 236, 1695, 1695, 1695, 175, 723, 733, 0, 1695, 1695, 1695, 562, 282, 1695, 741, 0, 288, 288, 310, 305, 304, 307, 347, 362, 351, 419, 483, 364, 368, 413, 536, 749, 360, 0, 510, 363, 524, 380, 405, 414, 0, 516, 518, 545, 501, 757, 510, 555, 581, 620, 597, 0, 602, 606, 622, 618, 610, 623, 767, 760, 635, 620, 638, 777, 633, 796, 806, 798, 645, 0, 646, 657, 643, 802, 659, 661, 660, 800, 677, 803, 807, 798, 798, 867, 818, 812, 805, 823, 820, 0, 0, 835, 833, 0, 0, 834, 854, 855, 860, 853, 1695, 512, 895, 494, 885, 913, 866, 868, 886, 880, 876, 884, 872, 905, 909, 909, 1695, 896, 1695, 1695, 1695, 909, 897, 177, 1695, 235, 939, 0, 1695, 1695, 1695, 1695, 959, 932, 929, 922, 920, 0, 0, 927, 0, 950, 0, 231, 951, 0, 0, 956, 946, 939, 941, 947, 946, 943, 0, 982, 0, 966, 0, 0, 0, 0, 960, 966, 975, 972, 0, 0, 963, 973, 0, 0, 0, 989, 975, 0, 978, 994, 1000, 0, 990, 995, 982, 998, 0, 0, 0, 995, 0, 995, 1006, 1001, 0, 997, 1058, 1003, 1067, 0, 1075, 1067, 1071, 0, 0, 1061, 0, 0, 0, 1066, 1071, 0, 1062, 1073, 0, 1089, 1064, 1069, 1074, 0, 1079, 0, 0, 1070, 1082, 1066, 1141, 1069, 1086, 1069, 1086, 1078, 1088, 0, 1091, 0, 1076, 1085, 1078, 0, 1695, 1104, 1134, 1121, 1135, 468, 1152, 1156, 1138, 1138, 1151, 416, 1139, 398, 1695, 0, 1166, 1144, 0, 1149, 1161, 1154, 1157, 0, 0, 0, 1148, 1160, 0, 0, 1162, 0, 1165, 0, 382, 1170, 1171, 0, 1174, 1169, 1170, 1163, 0, 1176, 0, 1179, 1171, 1175, 0, 0, 1185, 0, 0, 1238, 0, 0, 1188, 1205, 1252, 1260, 1231, 1216, 0, 0, 0, 0, 0, 0, 0, 0, 0, 407, 1224, 1255, 1256, 1255, 1254, 1245, 0, 1256, 0, 1259, 1265, 1249, 0, 0, 0, 1264, 1265, 1266, 360, 1258, 361, 1695, 333, 1265, 1266, 1267, 1695, 330, 1268, 1269, 1270, 1695, 306, 1278, 1259, 1281, 1276, 1279, 1280, 297, 1292, 0, 1291, 0, 1280, 0, 1309, 0, 1299, 1309, 1303, 0, 241, 240, 1317, 0, 1297, 1308, 1320, 0, 1338, 1330, 0, 0, 1327, 1325, 0, 1332, 1320, 1328, 0, 1337, 1323, 1343, 1343, 1348, 1338, 0, 0, 1695, 1371, 1350, 250, 1348, 1695, 1695, 1695, 1349, 1695, 1695, 1695, 308, 1695, 326, 1340, 1347, 1345, 1356, 1350, 1357, 1353, 207, 1355, 0, 1361, 1357, 1363, 1383, 1373, 204, 191, 1369, 1382, 1391, 0, 1388, 1387, 1381, 0, 1382, 0, 1402, 0, 0, 1400, 0, 142, 1395, 1397, 1408, 1402, 1695, 1695, 1410, 1396, 1413, 1400, 374, 1398, 1402, 0, 1425, 1422, 1427, 1415, 1419, 1416, 0, 0, 0, 1421, 1439, 1431, 0, 0, 0, 0, 1436, 1433, 1434, 1450, 1437, 1695, 1695, 128, 1451, 1443, 412, 1695, 476, 1444, 1454, 0, 1453, 0, 1448, 1456, 1462, 1468, 1451, 1473, 1461, 1460, 1472, 1473, 1474, 1493, 530, 1484, 1470, 0, 1471, 0, 0, 1466, 0, 1488, 1492, 0, 1507, 0, 1695, 1504, 1486, 1507, 556, 1695, 594, 1501, 126, 0, 1509, 0, 1503, 1493, 1512, 1520, 1519, 707, 1512, 0, 1524, 1516, 1695, 1528, 1524, 709, 1695, 722, 1533, 1520, 0, 1531, 1525, 1528, 1523, 1529, 1532, 1531, 1532, 1544, 1565, 0, 1558, 1563, 1554, 1558, 1556, 1554, 1572, 1695, 1560, 119, 1578, 100, 1563, 1695, 1565, 1561, 1578, 1572, 1563, 1585, 1586, 1695, 1695, 1695, 1648, 1652, 1656, 1660, 1664, 1666, 1670, 1674, 117, 111, 1678, 1682, 1686, 1690 } ; static yyconst flex_int16_t yy_def[693] = { 0, 678, 1, 679, 679, 680, 680, 681, 681, 681, 681, 682, 682, 683, 683, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 685, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 686, 678, 678, 687, 678, 678, 678, 678, 678, 678, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 678, 678, 678, 685, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 686, 678, 686, 678, 688, 678, 678, 678, 678, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 678, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 688, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 678, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 689, 678, 678, 678, 678, 678, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 689, 678, 689, 678, 678, 678, 678, 678, 678, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 678, 678, 678, 678, 678, 678, 678, 678, 678, 690, 678, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 678, 678, 678, 678, 678, 678, 678, 690, 678, 690, 678, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 678, 678, 678, 691, 678, 678, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 684, 678, 678, 678, 678, 691, 678, 691, 678, 678, 684, 684, 684, 684, 684, 678, 678, 678, 692, 678, 684, 684, 684, 678, 678, 678, 692, 678, 692, 678, 678, 684, 684, 678, 678, 678, 678, 684, 678, 678, 678, 678, 684, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 0, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678 } ; static yyconst flex_int16_t yy_nxt[1781] = { 0, 16, 17, 18, 16, 17, 16, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 29, 29, 29, 29, 29, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 45, 51, 52, 53, 54, 55, 56, 57, 45, 45, 58, 59, 45, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 45, 51, 52, 53, 54, 55, 56, 57, 45, 45, 60, 61, 63, 64, 63, 64, 67, 88, 90, 65, 67, 65, 72, 72, 72, 72, 72, 72, 72, 72, 72, 72, 72, 72, 72, 72, 72, 72, 87, 105, 355, 87, 87, 89, 106, 87, 229, 90, 91, 91, 91, 91, 91, 91, 91, 91, 149, 126, 154, 171, 201, 211, 127, 212, 68, 69, 70, 71, 68, 69, 70, 71, 89, 107, 128, 108, 108, 108, 108, 108, 108, 108, 108, 669, 215, 149, 126, 154, 171, 201, 211, 127, 212, 68, 69, 70, 71, 68, 69, 70, 71, 67, 667, 128, 226, 227, 226, 227, 216, 631, 75, 598, 76, 215, 77, 77, 77, 77, 77, 77, 77, 77, 217, 78, 79, 570, 80, 67, 206, 206, 206, 206, 206, 206, 206, 206, 75, 216, 76, 560, 77, 77, 77, 77, 77, 77, 77, 77, 559, 78, 79, 217, 80, 67, 107, 552, 108, 108, 108, 108, 108, 108, 108, 108, 226, 227, 82, 82, 82, 82, 82, 82, 82, 82, 364, 365, 110, 213, 111, 214, 112, 494, 138, 522, 139, 140, 521, 218, 219, 220, 223, 224, 109, 196, 141, 113, 114, 115, 129, 130, 197, 83, 84, 85, 86, 110, 213, 111, 214, 112, 131, 138, 132, 139, 140, 133, 218, 219, 220, 223, 224, 109, 196, 141, 113, 114, 115, 129, 130, 197, 83, 84, 85, 86, 67, 504, 505, 504, 505, 131, 513, 132, 233, 134, 133, 234, 235, 82, 82, 82, 82, 82, 82, 82, 82, 504, 505, 135, 136, 221, 238, 137, 239, 142, 143, 142, 144, 142, 142, 142, 142, 233, 134, 236, 234, 235, 237, 145, 499, 240, 222, 495, 83, 84, 85, 86, 135, 136, 221, 238, 137, 239, 494, 146, 147, 147, 147, 147, 147, 147, 147, 147, 236, 580, 581, 237, 145, 148, 240, 222, 188, 83, 84, 85, 86, 92, 241, 93, 94, 95, 189, 96, 146, 242, 243, 97, 98, 190, 99, 100, 250, 251, 101, 102, 259, 103, 148, 264, 267, 188, 104, 580, 581, 492, 92, 241, 93, 94, 95, 189, 96, 478, 242, 243, 97, 98, 190, 99, 100, 250, 251, 101, 102, 259, 103, 460, 264, 267, 252, 104, 116, 116, 116, 116, 116, 116, 116, 116, 244, 268, 150, 449, 245, 253, 269, 118, 119, 151, 152, 172, 153, 246, 173, 198, 120, 121, 122, 252, 174, 447, 199, 123, 124, 433, 125, 580, 581, 244, 268, 150, 200, 245, 253, 269, 118, 119, 151, 152, 172, 153, 246, 173, 198, 120, 121, 122, 340, 174, 155, 199, 123, 124, 156, 125, 157, 203, 208, 158, 209, 200, 247, 248, 249, 203, 210, 159, 204, 204, 204, 204, 204, 204, 204, 204, 260, 261, 262, 155, 274, 618, 619, 156, 271, 157, 270, 208, 158, 209, 202, 247, 248, 249, 263, 210, 159, 160, 160, 160, 160, 160, 160, 160, 160, 265, 275, 618, 619, 274, 161, 167, 168, 168, 168, 168, 168, 168, 168, 266, 191, 162, 192, 263, 163, 254, 255, 164, 165, 272, 166, 256, 678, 273, 265, 275, 193, 194, 169, 161, 230, 195, 231, 276, 170, 618, 619, 73, 266, 191, 162, 192, 73, 163, 254, 255, 164, 165, 272, 166, 256, 232, 273, 277, 678, 193, 194, 169, 678, 230, 195, 231, 276, 170, 147, 147, 147, 147, 147, 147, 147, 147, 207, 207, 207, 207, 207, 207, 207, 207, 232, 175, 277, 280, 282, 281, 283, 278, 176, 284, 177, 286, 287, 288, 107, 178, 91, 91, 91, 91, 91, 91, 91, 91, 678, 279, 293, 285, 294, 295, 175, 299, 280, 282, 281, 283, 278, 176, 284, 177, 286, 287, 288, 305, 178, 179, 306, 180, 309, 181, 312, 313, 182, 183, 279, 293, 285, 294, 295, 307, 299, 184, 185, 314, 317, 186, 308, 187, 639, 640, 639, 640, 305, 678, 179, 306, 180, 309, 181, 312, 313, 182, 183, 639, 640, 678, 678, 678, 307, 678, 184, 185, 314, 317, 186, 308, 187, 228, 228, 228, 228, 228, 228, 228, 228, 107, 678, 108, 108, 108, 108, 108, 108, 108, 108, 116, 116, 116, 116, 116, 116, 116, 116, 257, 257, 257, 257, 257, 257, 257, 257, 147, 147, 147, 147, 147, 147, 147, 147, 678, 258, 160, 160, 160, 160, 160, 160, 160, 160, 289, 290, 296, 296, 296, 296, 296, 296, 296, 296, 678, 678, 678, 678, 678, 297, 291, 292, 298, 300, 258, 168, 168, 168, 168, 168, 168, 168, 168, 289, 290, 168, 168, 168, 168, 168, 168, 168, 168, 301, 310, 315, 323, 318, 297, 291, 292, 298, 302, 324, 316, 303, 319, 325, 320, 304, 321, 328, 329, 311, 330, 331, 322, 678, 678, 678, 678, 678, 301, 310, 315, 323, 318, 332, 333, 334, 335, 302, 324, 316, 303, 319, 325, 320, 304, 321, 328, 329, 311, 330, 331, 322, 326, 326, 326, 326, 326, 326, 326, 326, 336, 337, 332, 333, 334, 335, 338, 327, 339, 203, 206, 206, 206, 206, 206, 206, 206, 206, 341, 342, 204, 204, 204, 204, 204, 204, 204, 204, 343, 336, 337, 344, 345, 346, 347, 338, 327, 339, 207, 207, 207, 207, 207, 207, 207, 207, 348, 341, 342, 349, 351, 352, 350, 353, 354, 678, 678, 343, 678, 678, 344, 345, 346, 347, 228, 228, 228, 228, 228, 228, 228, 228, 358, 359, 360, 348, 361, 362, 349, 351, 352, 350, 353, 354, 356, 356, 356, 356, 356, 356, 356, 356, 363, 366, 367, 368, 369, 370, 371, 372, 373, 358, 359, 360, 374, 361, 362, 257, 257, 257, 257, 257, 257, 257, 257, 375, 376, 377, 378, 357, 379, 363, 366, 367, 368, 369, 370, 371, 372, 373, 380, 381, 382, 374, 383, 384, 388, 389, 390, 391, 392, 385, 386, 393, 375, 376, 377, 378, 357, 379, 387, 394, 395, 396, 678, 678, 678, 678, 678, 380, 381, 382, 397, 383, 384, 388, 389, 390, 391, 392, 385, 386, 393, 678, 678, 678, 678, 678, 678, 387, 394, 395, 396, 296, 296, 296, 296, 296, 296, 296, 296, 397, 398, 398, 398, 398, 398, 398, 398, 398, 399, 399, 399, 399, 399, 399, 399, 399, 400, 401, 402, 403, 404, 405, 406, 407, 410, 412, 413, 414, 415, 416, 417, 418, 419, 420, 421, 411, 422, 423, 424, 408, 425, 426, 427, 428, 409, 400, 401, 402, 403, 404, 405, 406, 407, 429, 412, 413, 414, 415, 416, 417, 418, 419, 420, 421, 411, 422, 423, 424, 408, 425, 426, 427, 428, 409, 326, 326, 326, 326, 326, 326, 326, 326, 429, 430, 431, 432, 434, 435, 444, 436, 439, 440, 437, 441, 678, 445, 442, 446, 448, 356, 356, 356, 356, 356, 356, 356, 356, 450, 451, 452, 453, 454, 430, 431, 432, 455, 456, 444, 457, 438, 461, 462, 458, 443, 445, 463, 446, 448, 459, 464, 465, 466, 467, 468, 469, 470, 450, 451, 452, 453, 454, 471, 678, 678, 455, 456, 678, 457, 438, 461, 462, 458, 443, 474, 463, 475, 678, 459, 464, 465, 466, 467, 468, 469, 470, 678, 678, 678, 678, 678, 471, 472, 472, 472, 472, 472, 472, 472, 472, 476, 477, 479, 474, 678, 475, 398, 398, 398, 398, 398, 398, 398, 398, 399, 399, 399, 399, 399, 399, 399, 399, 480, 481, 482, 483, 484, 485, 486, 476, 477, 479, 487, 473, 488, 489, 490, 491, 493, 496, 497, 498, 500, 501, 502, 506, 507, 510, 511, 512, 508, 480, 481, 482, 483, 484, 485, 486, 509, 514, 515, 487, 516, 488, 489, 490, 491, 493, 496, 497, 498, 500, 501, 502, 506, 507, 510, 511, 512, 508, 517, 518, 519, 520, 523, 524, 525, 509, 514, 515, 526, 516, 472, 472, 472, 472, 472, 472, 472, 472, 527, 528, 530, 531, 532, 529, 533, 534, 535, 517, 518, 519, 520, 523, 524, 525, 536, 537, 538, 526, 539, 542, 543, 544, 545, 546, 547, 548, 549, 527, 528, 530, 531, 532, 529, 533, 534, 535, 550, 551, 540, 553, 554, 555, 556, 536, 537, 538, 541, 539, 542, 543, 544, 545, 546, 547, 548, 549, 557, 558, 561, 562, 563, 564, 565, 566, 567, 550, 551, 540, 553, 554, 555, 556, 568, 569, 571, 541, 572, 573, 574, 575, 576, 577, 578, 582, 583, 557, 558, 561, 562, 563, 564, 565, 566, 567, 584, 585, 586, 587, 588, 589, 590, 568, 569, 571, 591, 572, 573, 574, 575, 576, 577, 578, 582, 583, 592, 593, 594, 595, 596, 597, 599, 600, 601, 584, 585, 586, 587, 588, 589, 590, 602, 603, 604, 591, 605, 606, 607, 608, 609, 610, 611, 612, 613, 592, 593, 594, 595, 596, 597, 599, 600, 601, 614, 620, 621, 622, 623, 624, 625, 602, 603, 604, 615, 605, 606, 607, 608, 609, 610, 611, 612, 613, 626, 627, 628, 616, 629, 630, 632, 633, 634, 614, 620, 621, 622, 623, 624, 625, 635, 636, 637, 615, 641, 643, 644, 645, 642, 646, 647, 648, 649, 626, 627, 628, 616, 629, 630, 632, 633, 634, 650, 651, 652, 653, 654, 655, 656, 635, 636, 637, 657, 641, 643, 644, 645, 642, 646, 647, 648, 649, 658, 659, 660, 661, 662, 663, 664, 665, 666, 650, 651, 652, 653, 654, 655, 656, 668, 670, 671, 657, 672, 673, 674, 675, 676, 677, 678, 678, 678, 658, 659, 660, 661, 662, 663, 664, 665, 666, 678, 678, 678, 678, 678, 678, 678, 668, 670, 671, 678, 672, 673, 674, 675, 676, 677, 62, 62, 62, 62, 66, 66, 66, 66, 67, 67, 67, 67, 74, 74, 74, 74, 81, 81, 81, 81, 117, 117, 205, 678, 205, 205, 225, 225, 225, 225, 503, 503, 503, 503, 579, 579, 579, 579, 617, 617, 617, 617, 638, 638, 638, 638, 15, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678 } ; static yyconst flex_int16_t yy_chk[1781] = { 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 3, 3, 4, 4, 5, 19, 20, 3, 6, 4, 7, 7, 7, 7, 7, 7, 7, 7, 8, 8, 8, 8, 8, 8, 8, 8, 17, 27, 688, 17, 87, 19, 27, 87, 687, 20, 25, 25, 25, 25, 25, 25, 25, 25, 42, 36, 44, 49, 57, 89, 36, 90, 5, 5, 5, 5, 6, 6, 6, 6, 19, 29, 36, 29, 29, 29, 29, 29, 29, 29, 29, 666, 93, 42, 36, 44, 49, 57, 89, 36, 90, 5, 5, 5, 5, 6, 6, 6, 6, 11, 664, 36, 106, 106, 225, 225, 94, 621, 11, 576, 11, 93, 11, 11, 11, 11, 11, 11, 11, 11, 95, 11, 11, 538, 11, 12, 77, 77, 77, 77, 77, 77, 77, 77, 12, 94, 12, 522, 12, 12, 12, 12, 12, 12, 12, 12, 521, 12, 12, 95, 12, 13, 28, 513, 28, 28, 28, 28, 28, 28, 28, 28, 227, 227, 13, 13, 13, 13, 13, 13, 13, 13, 245, 245, 30, 92, 30, 92, 30, 494, 39, 465, 39, 39, 464, 96, 97, 98, 101, 102, 28, 55, 39, 30, 30, 30, 37, 37, 55, 13, 13, 13, 13, 30, 92, 30, 92, 30, 37, 39, 37, 39, 39, 37, 96, 97, 98, 101, 102, 28, 55, 39, 30, 30, 30, 37, 37, 55, 13, 13, 13, 13, 14, 444, 444, 503, 503, 37, 451, 37, 114, 38, 37, 118, 119, 14, 14, 14, 14, 14, 14, 14, 14, 505, 505, 38, 38, 99, 121, 38, 122, 40, 40, 40, 40, 40, 40, 40, 40, 114, 38, 120, 118, 119, 120, 40, 439, 123, 99, 434, 14, 14, 14, 14, 38, 38, 99, 121, 38, 122, 432, 40, 41, 41, 41, 41, 41, 41, 41, 41, 120, 549, 549, 120, 40, 41, 123, 99, 53, 14, 14, 14, 14, 26, 124, 26, 26, 26, 53, 26, 40, 125, 126, 26, 26, 53, 26, 26, 129, 130, 26, 26, 134, 26, 41, 137, 139, 53, 26, 579, 579, 430, 26, 124, 26, 26, 26, 53, 26, 411, 125, 126, 26, 26, 53, 26, 26, 129, 130, 26, 26, 134, 26, 374, 137, 139, 131, 26, 35, 35, 35, 35, 35, 35, 35, 35, 127, 140, 43, 353, 127, 131, 141, 35, 35, 43, 43, 50, 43, 127, 50, 56, 35, 35, 35, 131, 50, 351, 56, 35, 35, 345, 35, 581, 581, 127, 140, 43, 56, 127, 131, 141, 35, 35, 43, 43, 50, 43, 127, 50, 56, 35, 35, 35, 205, 50, 46, 56, 35, 35, 46, 35, 46, 72, 88, 46, 88, 56, 128, 128, 128, 203, 88, 46, 72, 72, 72, 72, 72, 72, 72, 72, 136, 136, 136, 46, 146, 599, 599, 46, 144, 46, 143, 88, 46, 88, 65, 128, 128, 128, 136, 88, 46, 47, 47, 47, 47, 47, 47, 47, 47, 138, 148, 617, 617, 146, 47, 48, 48, 48, 48, 48, 48, 48, 48, 138, 54, 47, 54, 136, 47, 132, 132, 47, 47, 145, 47, 132, 15, 145, 138, 148, 54, 54, 48, 47, 113, 54, 113, 149, 48, 619, 619, 10, 138, 54, 47, 54, 9, 47, 132, 132, 47, 47, 145, 47, 132, 113, 145, 150, 0, 54, 54, 48, 0, 113, 54, 113, 149, 48, 51, 51, 51, 51, 51, 51, 51, 51, 82, 82, 82, 82, 82, 82, 82, 82, 113, 51, 150, 152, 154, 152, 155, 151, 51, 156, 51, 157, 158, 159, 91, 51, 91, 91, 91, 91, 91, 91, 91, 91, 0, 151, 162, 156, 163, 164, 51, 166, 152, 154, 152, 155, 151, 51, 156, 51, 157, 158, 159, 170, 51, 52, 172, 52, 174, 52, 176, 177, 52, 52, 151, 162, 156, 163, 164, 173, 166, 52, 52, 178, 180, 52, 173, 52, 630, 630, 638, 638, 170, 0, 52, 172, 52, 174, 52, 176, 177, 52, 52, 640, 640, 0, 0, 0, 173, 0, 52, 52, 178, 180, 52, 173, 52, 107, 107, 107, 107, 107, 107, 107, 107, 108, 0, 108, 108, 108, 108, 108, 108, 108, 108, 116, 116, 116, 116, 116, 116, 116, 116, 133, 133, 133, 133, 133, 133, 133, 133, 147, 147, 147, 147, 147, 147, 147, 147, 0, 133, 160, 160, 160, 160, 160, 160, 160, 160, 161, 161, 165, 165, 165, 165, 165, 165, 165, 165, 0, 0, 0, 0, 0, 165, 161, 161, 165, 167, 133, 167, 167, 167, 167, 167, 167, 167, 167, 161, 161, 168, 168, 168, 168, 168, 168, 168, 168, 169, 175, 179, 183, 181, 165, 161, 161, 165, 169, 183, 179, 169, 181, 184, 181, 169, 182, 186, 187, 175, 188, 189, 182, 0, 0, 0, 0, 0, 169, 175, 179, 183, 181, 190, 193, 194, 197, 169, 183, 179, 169, 181, 184, 181, 169, 182, 186, 187, 175, 188, 189, 182, 185, 185, 185, 185, 185, 185, 185, 185, 198, 199, 190, 193, 194, 197, 200, 185, 201, 204, 206, 206, 206, 206, 206, 206, 206, 206, 208, 209, 204, 204, 204, 204, 204, 204, 204, 204, 210, 198, 199, 211, 212, 213, 214, 200, 185, 201, 207, 207, 207, 207, 207, 207, 207, 207, 215, 208, 209, 216, 217, 219, 216, 223, 224, 0, 0, 210, 0, 0, 211, 212, 213, 214, 228, 228, 228, 228, 228, 228, 228, 228, 235, 236, 237, 215, 238, 241, 216, 217, 219, 216, 223, 224, 234, 234, 234, 234, 234, 234, 234, 234, 243, 246, 249, 250, 251, 252, 253, 254, 255, 235, 236, 237, 259, 238, 241, 257, 257, 257, 257, 257, 257, 257, 257, 264, 265, 266, 267, 234, 270, 243, 246, 249, 250, 251, 252, 253, 254, 255, 271, 275, 276, 259, 278, 279, 282, 283, 284, 285, 289, 280, 280, 291, 264, 265, 266, 267, 234, 270, 280, 292, 293, 295, 0, 0, 0, 0, 0, 271, 275, 276, 297, 278, 279, 282, 283, 284, 285, 289, 280, 280, 291, 0, 0, 0, 0, 0, 0, 280, 292, 293, 295, 296, 296, 296, 296, 296, 296, 296, 296, 297, 298, 298, 298, 298, 298, 298, 298, 298, 300, 300, 300, 300, 300, 300, 300, 300, 301, 302, 305, 309, 310, 312, 313, 313, 315, 316, 317, 318, 320, 323, 324, 325, 327, 328, 329, 315, 330, 331, 332, 313, 334, 336, 337, 338, 313, 301, 302, 305, 309, 310, 312, 313, 313, 341, 316, 317, 318, 320, 323, 324, 325, 327, 328, 329, 315, 330, 331, 332, 313, 334, 336, 337, 338, 313, 326, 326, 326, 326, 326, 326, 326, 326, 341, 342, 343, 344, 346, 346, 348, 346, 347, 347, 346, 347, 0, 349, 347, 350, 352, 356, 356, 356, 356, 356, 356, 356, 356, 357, 359, 360, 361, 362, 342, 343, 344, 366, 367, 348, 370, 346, 375, 376, 372, 347, 349, 378, 350, 352, 372, 379, 380, 381, 383, 385, 386, 387, 357, 359, 360, 361, 362, 390, 0, 0, 366, 367, 0, 370, 346, 375, 376, 372, 347, 396, 378, 397, 0, 372, 379, 380, 381, 383, 385, 386, 387, 0, 0, 0, 0, 0, 390, 393, 393, 393, 393, 393, 393, 393, 393, 400, 401, 412, 396, 0, 397, 398, 398, 398, 398, 398, 398, 398, 398, 399, 399, 399, 399, 399, 399, 399, 399, 413, 414, 415, 416, 417, 419, 421, 400, 401, 412, 422, 393, 423, 427, 428, 429, 431, 435, 436, 437, 440, 441, 442, 445, 446, 448, 449, 450, 447, 413, 414, 415, 416, 417, 419, 421, 447, 452, 454, 422, 456, 423, 427, 428, 429, 431, 435, 436, 437, 440, 441, 442, 445, 446, 448, 449, 450, 447, 458, 460, 461, 462, 466, 468, 469, 447, 452, 454, 470, 456, 472, 472, 472, 472, 472, 472, 472, 472, 473, 476, 477, 479, 480, 476, 481, 483, 484, 458, 460, 461, 462, 466, 468, 469, 485, 486, 487, 470, 488, 493, 495, 499, 506, 507, 508, 509, 510, 473, 476, 477, 479, 480, 476, 481, 483, 484, 511, 512, 492, 514, 516, 517, 518, 485, 486, 487, 492, 488, 493, 495, 499, 506, 507, 508, 509, 510, 519, 520, 523, 524, 525, 527, 528, 529, 531, 511, 512, 492, 514, 516, 517, 518, 533, 536, 539, 492, 540, 541, 542, 545, 546, 547, 548, 550, 551, 519, 520, 523, 524, 525, 527, 528, 529, 531, 553, 554, 555, 556, 557, 558, 562, 533, 536, 539, 563, 540, 541, 542, 545, 546, 547, 548, 550, 551, 564, 569, 570, 571, 572, 573, 577, 578, 582, 553, 554, 555, 556, 557, 558, 562, 583, 585, 587, 563, 588, 589, 590, 591, 592, 593, 594, 595, 596, 564, 569, 570, 571, 572, 573, 577, 578, 582, 597, 600, 601, 603, 606, 608, 609, 583, 585, 587, 598, 588, 589, 590, 591, 592, 593, 594, 595, 596, 611, 614, 615, 598, 616, 620, 623, 625, 626, 597, 600, 601, 603, 606, 608, 609, 627, 628, 629, 598, 631, 633, 634, 636, 631, 637, 641, 642, 644, 611, 614, 615, 598, 616, 620, 623, 625, 626, 645, 646, 647, 648, 649, 650, 651, 627, 628, 629, 652, 631, 633, 634, 636, 631, 637, 641, 642, 644, 653, 655, 656, 657, 658, 659, 660, 661, 663, 645, 646, 647, 648, 649, 650, 651, 665, 667, 669, 652, 670, 671, 672, 673, 674, 675, 0, 0, 0, 653, 655, 656, 657, 658, 659, 660, 661, 663, 0, 0, 0, 0, 0, 0, 0, 665, 667, 669, 0, 670, 671, 672, 673, 674, 675, 679, 679, 679, 679, 680, 680, 680, 680, 681, 681, 681, 681, 682, 682, 682, 682, 683, 683, 683, 683, 684, 684, 685, 0, 685, 685, 686, 686, 686, 686, 689, 689, 689, 689, 690, 690, 690, 690, 691, 691, 691, 691, 692, 692, 692, 692, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678, 678 } ; /* Table of booleans, true if rule could match eol. */ static yyconst flex_int32_t yy_rule_can_match_eol[244] = { 0, 1, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, }; static yy_state_type yy_last_accepting_state; static char *yy_last_accepting_cpos; extern int yy_flex_debug; int yy_flex_debug = 0; /* The intent behind this definition is that it'll catch * any uses of REJECT which flex missed. */ #define REJECT reject_used_but_not_detected #define yymore() yymore_used_but_not_detected #define YY_MORE_ADJ 0 #define YY_RESTORE_YY_MORE_OFFSET char *yytext; #line 1 "lex.l" #line 3 "lex.l" #include #include "gen4asm.h" #include "gram.h" #include "brw_defines.h" #include "string.h" int saved_state = 0; extern char *input_filename; /* Locations */ int yycolumn = 1; #define YY_NO_INPUT #define YY_USER_ACTION \ yylloc.first_line = yylloc.last_line = yylineno; \ yylloc.first_column = yycolumn; \ yylloc.last_column = yycolumn+yyleng-1; \ yycolumn += yyleng; #line 1142 "lex.c" #define INITIAL 0 #define BLOCK_COMMENT 1 #define CHANNEL 2 #define LINENUMBER 3 #define FILENAME 4 #define REG 5 #define DOTSEL 6 #ifndef YY_NO_UNISTD_H /* Special case for "unistd.h", since it is non-ANSI. We include it way * down here because we want the user's section 1 to have been scanned first. * The user has a chance to override it with an option. */ #include #endif #ifndef YY_EXTRA_TYPE #define YY_EXTRA_TYPE void * #endif static int yy_init_globals (void ); /* Accessor methods to globals. These are made visible to non-reentrant scanners for convenience. */ int yylex_destroy (void ); int yyget_debug (void ); void yyset_debug (int debug_flag ); YY_EXTRA_TYPE yyget_extra (void ); void yyset_extra (YY_EXTRA_TYPE user_defined ); FILE *yyget_in (void ); void yyset_in (FILE * in_str ); FILE *yyget_out (void ); void yyset_out (FILE * out_str ); yy_size_t yyget_leng (void ); char *yyget_text (void ); int yyget_lineno (void ); void yyset_lineno (int line_number ); /* Macros after this point can all be overridden by user definitions in * section 1. */ #ifndef YY_SKIP_YYWRAP #ifdef __cplusplus extern "C" int yywrap (void ); #else extern int yywrap (void ); #endif #endif static void yyunput (int c,char *buf_ptr ); #ifndef yytext_ptr static void yy_flex_strncpy (char *,yyconst char *,int ); #endif #ifdef YY_NEED_STRLEN static int yy_flex_strlen (yyconst char * ); #endif #ifndef YY_NO_INPUT #ifdef __cplusplus static int yyinput (void ); #else static int input (void ); #endif #endif /* Amount of stuff to slurp up with each read. */ #ifndef YY_READ_BUF_SIZE #ifdef __ia64__ /* On IA-64, the buffer size is 16k, not 8k */ #define YY_READ_BUF_SIZE 16384 #else #define YY_READ_BUF_SIZE 8192 #endif /* __ia64__ */ #endif /* Copy whatever the last rule matched to the standard output. */ #ifndef ECHO /* This used to be an fputs(), but since the string might contain NUL's, * we now use fwrite(). */ #define ECHO do { if (fwrite( yytext, yyleng, 1, yyout )) {} } while (0) #endif /* Gets input and stuffs it into "buf". number of characters read, or YY_NULL, * is returned in "result". */ #ifndef YY_INPUT #define YY_INPUT(buf,result,max_size) \ if ( YY_CURRENT_BUFFER_LVALUE->yy_is_interactive ) \ { \ int c = '*'; \ size_t n; \ for ( n = 0; n < max_size && \ (c = getc( yyin )) != EOF && c != '\n'; ++n ) \ buf[n] = (char) c; \ if ( c == '\n' ) \ buf[n++] = (char) c; \ if ( c == EOF && ferror( yyin ) ) \ YY_FATAL_ERROR( "input in flex scanner failed" ); \ result = n; \ } \ else \ { \ errno=0; \ while ( (result = fread(buf, 1, max_size, yyin))==0 && ferror(yyin)) \ { \ if( errno != EINTR) \ { \ YY_FATAL_ERROR( "input in flex scanner failed" ); \ break; \ } \ errno=0; \ clearerr(yyin); \ } \ }\ \ #endif /* No semi-colon after return; correct usage is to write "yyterminate();" - * we don't want an extra ';' after the "return" because that will cause * some compilers to complain about unreachable statements. */ #ifndef yyterminate #define yyterminate() return YY_NULL #endif /* Number of entries by which start-condition stack grows. */ #ifndef YY_START_STACK_INCR #define YY_START_STACK_INCR 25 #endif /* Report a fatal error. */ #ifndef YY_FATAL_ERROR #define YY_FATAL_ERROR(msg) yy_fatal_error( msg ) #endif /* end tables serialization structures and prototypes */ /* Default declaration of generated scanner - a define so the user can * easily add parameters. */ #ifndef YY_DECL #define YY_DECL_IS_OURS 1 extern int yylex (void); #define YY_DECL int yylex (void) #endif /* !YY_DECL */ /* Code executed at the beginning of each rule, after yytext and yyleng * have been set up. */ #ifndef YY_USER_ACTION #define YY_USER_ACTION #endif /* Code executed at the end of each rule. */ #ifndef YY_BREAK #define YY_BREAK break; #endif #define YY_RULE_SETUP \ YY_USER_ACTION /** The main scanner function which does all the work. */ YY_DECL { register yy_state_type yy_current_state; register char *yy_cp, *yy_bp; register int yy_act; if ( !(yy_init) ) { (yy_init) = 1; #ifdef YY_USER_INIT YY_USER_INIT; #endif if ( ! (yy_start) ) (yy_start) = 1; /* first start state */ if ( ! yyin ) yyin = stdin; if ( ! yyout ) yyout = stdout; if ( ! YY_CURRENT_BUFFER ) { yyensure_buffer_stack (); YY_CURRENT_BUFFER_LVALUE = yy_create_buffer(yyin,YY_BUF_SIZE ); } yy_load_buffer_state( ); } { #line 30 "lex.l" #line 1364 "lex.c" while ( 1 ) /* loops until end-of-file is reached */ { yy_cp = (yy_c_buf_p); /* Support of yytext. */ *yy_cp = (yy_hold_char); /* yy_bp points to the position in yy_ch_buf of the start of * the current run. */ yy_bp = yy_cp; yy_current_state = (yy_start); yy_match: do { register YY_CHAR yy_c = yy_ec[YY_SC_TO_UI(*yy_cp)] ; if ( yy_accept[yy_current_state] ) { (yy_last_accepting_state) = yy_current_state; (yy_last_accepting_cpos) = yy_cp; } while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; if ( yy_current_state >= 679 ) yy_c = yy_meta[(unsigned int) yy_c]; } yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; ++yy_cp; } while ( yy_base[yy_current_state] != 1695 ); yy_find_action: yy_act = yy_accept[yy_current_state]; if ( yy_act == 0 ) { /* have to back up */ yy_cp = (yy_last_accepting_cpos); yy_current_state = (yy_last_accepting_state); yy_act = yy_accept[yy_current_state]; } YY_DO_BEFORE_ACTION; if ( yy_act != YY_END_OF_BUFFER && yy_rule_can_match_eol[yy_act] ) { yy_size_t yyl; for ( yyl = 0; yyl < yyleng; ++yyl ) if ( yytext[yyl] == '\n' ) yylineno++; ; } do_action: /* This label is used only to access EOF actions. */ switch ( yy_act ) { /* beginning of action switch */ case 0: /* must back up */ /* undo the effects of YY_DO_BEFORE_ACTION */ *yy_cp = (yy_hold_char); yy_cp = (yy_last_accepting_cpos); yy_current_state = (yy_last_accepting_state); goto yy_find_action; case 1: /* rule 1 can match eol */ YY_RULE_SETUP #line 31 "lex.l" { yycolumn = 1; } /* eat up single-line comments */ YY_BREAK case 2: /* rule 2 can match eol */ YY_RULE_SETUP #line 32 "lex.l" { yycolumn = 1; } YY_BREAK case 3: /* rule 3 can match eol */ YY_RULE_SETUP #line 33 "lex.l" { yycolumn = 1; } YY_BREAK case 4: /* rule 4 can match eol */ YY_RULE_SETUP #line 34 "lex.l" { yycolumn = 1; } YY_BREAK case 5: /* rule 5 can match eol */ YY_RULE_SETUP #line 35 "lex.l" { yycolumn = 1; } YY_BREAK /* eat up multi-line comments, non-nesting. */ case 6: YY_RULE_SETUP #line 38 "lex.l" { saved_state = YYSTATE; BEGIN(BLOCK_COMMENT); } YY_BREAK case 7: YY_RULE_SETUP #line 42 "lex.l" { BEGIN(saved_state); } YY_BREAK case 8: YY_RULE_SETUP #line 45 "lex.l" { } YY_BREAK case 9: /* rule 9 can match eol */ YY_RULE_SETUP #line 46 "lex.l" { } YY_BREAK case 10: YY_RULE_SETUP #line 47 "lex.l" { yycolumn = 1; saved_state = YYSTATE; BEGIN(LINENUMBER); } YY_BREAK case 11: YY_RULE_SETUP #line 52 "lex.l" { yylineno = atoi (yytext) - 1; BEGIN(FILENAME); } YY_BREAK case 12: /* rule 12 can match eol */ YY_RULE_SETUP #line 56 "lex.l" { char *name = malloc (yyleng - 1); memmove (name, yytext + 1, yyleng - 2); name[yyleng-1] = '\0'; input_filename = name; BEGIN(saved_state); } YY_BREAK case 13: YY_RULE_SETUP #line 64 "lex.l" { yylval.integer = BRW_CHANNEL_X; return X; } YY_BREAK case 14: YY_RULE_SETUP #line 68 "lex.l" { yylval.integer = BRW_CHANNEL_Y; return Y; } YY_BREAK case 15: YY_RULE_SETUP #line 72 "lex.l" { yylval.integer = BRW_CHANNEL_Z; return Z; } YY_BREAK case 16: YY_RULE_SETUP #line 76 "lex.l" { yylval.integer = BRW_CHANNEL_W; return W; } YY_BREAK case 17: YY_RULE_SETUP #line 80 "lex.l" { yyless(0); BEGIN(INITIAL); } YY_BREAK /* used for both null send and null register. */ case 18: YY_RULE_SETUP #line 86 "lex.l" { return NULL_TOKEN; } YY_BREAK /* opcodes */ case 19: YY_RULE_SETUP #line 89 "lex.l" { yylval.integer = BRW_OPCODE_MOV; return MOV; } YY_BREAK case 20: YY_RULE_SETUP #line 90 "lex.l" { yylval.integer = BRW_OPCODE_FRC; return FRC; } YY_BREAK case 21: YY_RULE_SETUP #line 91 "lex.l" { yylval.integer = BRW_OPCODE_RNDU; return RNDU; } YY_BREAK case 22: YY_RULE_SETUP #line 92 "lex.l" { yylval.integer = BRW_OPCODE_RNDD; return RNDD; } YY_BREAK case 23: YY_RULE_SETUP #line 93 "lex.l" { yylval.integer = BRW_OPCODE_RNDE; return RNDE; } YY_BREAK case 24: YY_RULE_SETUP #line 94 "lex.l" { yylval.integer = BRW_OPCODE_RNDZ; return RNDZ; } YY_BREAK case 25: YY_RULE_SETUP #line 95 "lex.l" { yylval.integer = BRW_OPCODE_NOT; return NOT; } YY_BREAK case 26: YY_RULE_SETUP #line 96 "lex.l" { yylval.integer = BRW_OPCODE_LZD; return LZD; } YY_BREAK case 27: YY_RULE_SETUP #line 97 "lex.l" { yylval.integer = BRW_OPCODE_F16TO32; return F16TO32; } YY_BREAK case 28: YY_RULE_SETUP #line 98 "lex.l" { yylval.integer = BRW_OPCODE_F32TO16; return F32TO16; } YY_BREAK case 29: YY_RULE_SETUP #line 99 "lex.l" { yylval.integer = BRW_OPCODE_FBH; return FBH; } YY_BREAK case 30: YY_RULE_SETUP #line 100 "lex.l" { yylval.integer = BRW_OPCODE_FBL; return FBL; } YY_BREAK case 31: YY_RULE_SETUP #line 102 "lex.l" { yylval.integer = BRW_OPCODE_MAD; return MAD; } YY_BREAK case 32: YY_RULE_SETUP #line 103 "lex.l" { yylval.integer = BRW_OPCODE_LRP; return LRP; } YY_BREAK case 33: YY_RULE_SETUP #line 104 "lex.l" { yylval.integer = BRW_OPCODE_BFE; return BFE; } YY_BREAK case 34: YY_RULE_SETUP #line 105 "lex.l" { yylval.integer = BRW_OPCODE_BFI1; return BFI1; } YY_BREAK case 35: YY_RULE_SETUP #line 106 "lex.l" { yylval.integer = BRW_OPCODE_BFI2; return BFI2; } YY_BREAK case 36: YY_RULE_SETUP #line 107 "lex.l" { yylval.integer = BRW_OPCODE_BFREV; return BFREV; } YY_BREAK case 37: YY_RULE_SETUP #line 108 "lex.l" { yylval.integer = BRW_OPCODE_MUL; return MUL; } YY_BREAK case 38: YY_RULE_SETUP #line 109 "lex.l" { yylval.integer = BRW_OPCODE_MAC; return MAC; } YY_BREAK case 39: YY_RULE_SETUP #line 110 "lex.l" { yylval.integer = BRW_OPCODE_MACH; return MACH; } YY_BREAK case 40: YY_RULE_SETUP #line 111 "lex.l" { yylval.integer = BRW_OPCODE_LINE; return LINE; } YY_BREAK case 41: YY_RULE_SETUP #line 112 "lex.l" { yylval.integer = BRW_OPCODE_SAD2; return SAD2; } YY_BREAK case 42: YY_RULE_SETUP #line 113 "lex.l" { yylval.integer = BRW_OPCODE_SADA2; return SADA2; } YY_BREAK case 43: YY_RULE_SETUP #line 114 "lex.l" { yylval.integer = BRW_OPCODE_DP4; return DP4; } YY_BREAK case 44: YY_RULE_SETUP #line 115 "lex.l" { yylval.integer = BRW_OPCODE_DPH; return DPH; } YY_BREAK case 45: YY_RULE_SETUP #line 116 "lex.l" { yylval.integer = BRW_OPCODE_DP3; return DP3; } YY_BREAK case 46: YY_RULE_SETUP #line 117 "lex.l" { yylval.integer = BRW_OPCODE_DP2; return DP2; } YY_BREAK case 47: YY_RULE_SETUP #line 119 "lex.l" { yylval.integer = BRW_OPCODE_CBIT; return CBIT; } YY_BREAK case 48: YY_RULE_SETUP #line 120 "lex.l" { yylval.integer = BRW_OPCODE_AVG; return AVG; } YY_BREAK case 49: YY_RULE_SETUP #line 121 "lex.l" { yylval.integer = BRW_OPCODE_ADD; return ADD; } YY_BREAK case 50: YY_RULE_SETUP #line 122 "lex.l" { yylval.integer = BRW_OPCODE_ADDC; return ADDC; } YY_BREAK case 51: YY_RULE_SETUP #line 123 "lex.l" { yylval.integer = BRW_OPCODE_SEL; return SEL; } YY_BREAK case 52: YY_RULE_SETUP #line 124 "lex.l" { yylval.integer = BRW_OPCODE_AND; return AND; } YY_BREAK case 53: YY_RULE_SETUP #line 125 "lex.l" { yylval.integer = BRW_OPCODE_OR; return OR; } YY_BREAK case 54: YY_RULE_SETUP #line 126 "lex.l" { yylval.integer = BRW_OPCODE_XOR; return XOR; } YY_BREAK case 55: YY_RULE_SETUP #line 127 "lex.l" { yylval.integer = BRW_OPCODE_SHR; return SHR; } YY_BREAK case 56: YY_RULE_SETUP #line 128 "lex.l" { yylval.integer = BRW_OPCODE_SHL; return SHL; } YY_BREAK case 57: YY_RULE_SETUP #line 129 "lex.l" { yylval.integer = BRW_OPCODE_ASR; return ASR; } YY_BREAK case 58: YY_RULE_SETUP #line 130 "lex.l" { yylval.integer = BRW_OPCODE_CMP; return CMP; } YY_BREAK case 59: YY_RULE_SETUP #line 131 "lex.l" { yylval.integer = BRW_OPCODE_CMPN; return CMPN; } YY_BREAK case 60: YY_RULE_SETUP #line 132 "lex.l" { yylval.integer = BRW_OPCODE_SUBB; return SUBB; } YY_BREAK case 61: YY_RULE_SETUP #line 134 "lex.l" { yylval.integer = BRW_OPCODE_SEND; return SEND; } YY_BREAK case 62: YY_RULE_SETUP #line 135 "lex.l" { yylval.integer = BRW_OPCODE_SENDC; return SENDC; } YY_BREAK case 63: YY_RULE_SETUP #line 136 "lex.l" { yylval.integer = BRW_OPCODE_NOP; return NOP; } YY_BREAK case 64: YY_RULE_SETUP #line 137 "lex.l" { yylval.integer = BRW_OPCODE_JMPI; return JMPI; } YY_BREAK case 65: YY_RULE_SETUP #line 138 "lex.l" { yylval.integer = BRW_OPCODE_IF; return IF; } YY_BREAK case 66: YY_RULE_SETUP #line 139 "lex.l" { yylval.integer = BRW_OPCODE_IFF; return IFF; } YY_BREAK case 67: YY_RULE_SETUP #line 140 "lex.l" { yylval.integer = BRW_OPCODE_WHILE; return WHILE; } YY_BREAK case 68: YY_RULE_SETUP #line 141 "lex.l" { yylval.integer = BRW_OPCODE_ELSE; return ELSE; } YY_BREAK case 69: YY_RULE_SETUP #line 142 "lex.l" { yylval.integer = BRW_OPCODE_BREAK; return BREAK; } YY_BREAK case 70: YY_RULE_SETUP #line 143 "lex.l" { yylval.integer = BRW_OPCODE_CONTINUE; return CONT; } YY_BREAK case 71: YY_RULE_SETUP #line 144 "lex.l" { yylval.integer = BRW_OPCODE_HALT; return HALT; } YY_BREAK case 72: YY_RULE_SETUP #line 145 "lex.l" { yylval.integer = BRW_OPCODE_MSAVE; return MSAVE; } YY_BREAK case 73: YY_RULE_SETUP #line 146 "lex.l" { yylval.integer = BRW_OPCODE_PUSH; return PUSH; } YY_BREAK case 74: YY_RULE_SETUP #line 147 "lex.l" { yylval.integer = BRW_OPCODE_MRESTORE; return MREST; } YY_BREAK case 75: YY_RULE_SETUP #line 148 "lex.l" { yylval.integer = BRW_OPCODE_POP; return POP; } YY_BREAK case 76: YY_RULE_SETUP #line 149 "lex.l" { yylval.integer = BRW_OPCODE_WAIT; return WAIT; } YY_BREAK case 77: YY_RULE_SETUP #line 150 "lex.l" { yylval.integer = BRW_OPCODE_DO; return DO; } YY_BREAK case 78: YY_RULE_SETUP #line 151 "lex.l" { yylval.integer = BRW_OPCODE_ENDIF; return ENDIF; } YY_BREAK case 79: YY_RULE_SETUP #line 152 "lex.l" { yylval.integer = BRW_OPCODE_CALL; return CALL; } YY_BREAK case 80: YY_RULE_SETUP #line 153 "lex.l" { yylval.integer = BRW_OPCODE_RET; return RET; } YY_BREAK case 81: YY_RULE_SETUP #line 154 "lex.l" { yylval.integer = BRW_OPCODE_BRD; return BRD; } YY_BREAK case 82: YY_RULE_SETUP #line 155 "lex.l" { yylval.integer = BRW_OPCODE_BRC; return BRC; } YY_BREAK case 83: YY_RULE_SETUP #line 157 "lex.l" { yylval.integer = BRW_OPCODE_PLN; return PLN; } YY_BREAK /* send argument tokens */ case 84: YY_RULE_SETUP #line 160 "lex.l" { return MSGLEN; } YY_BREAK case 85: YY_RULE_SETUP #line 161 "lex.l" { return RETURNLEN; } YY_BREAK case 86: YY_RULE_SETUP #line 162 "lex.l" { if (IS_GENp(6)) { yylval.integer = BRW_OPCODE_MATH; return MATH_INST; } else return MATH; } YY_BREAK case 87: YY_RULE_SETUP #line 163 "lex.l" { return SAMPLER; } YY_BREAK case 88: YY_RULE_SETUP #line 164 "lex.l" { return GATEWAY; } YY_BREAK case 89: YY_RULE_SETUP #line 165 "lex.l" { return READ; } YY_BREAK case 90: YY_RULE_SETUP #line 166 "lex.l" { return WRITE; } YY_BREAK case 91: YY_RULE_SETUP #line 167 "lex.l" { return URB; } YY_BREAK case 92: YY_RULE_SETUP #line 168 "lex.l" { return THREAD_SPAWNER; } YY_BREAK case 93: YY_RULE_SETUP #line 169 "lex.l" { return VME; } YY_BREAK case 94: YY_RULE_SETUP #line 170 "lex.l" { return CRE; } YY_BREAK case 95: YY_RULE_SETUP #line 171 "lex.l" { return DATA_PORT; } YY_BREAK case 96: YY_RULE_SETUP #line 173 "lex.l" { return ALLOCATE; } YY_BREAK case 97: YY_RULE_SETUP #line 174 "lex.l" { return USED; } YY_BREAK case 98: YY_RULE_SETUP #line 175 "lex.l" { return COMPLETE; } YY_BREAK case 99: YY_RULE_SETUP #line 176 "lex.l" { return TRANSPOSE; } YY_BREAK case 100: YY_RULE_SETUP #line 177 "lex.l" { return INTERLEAVE; } YY_BREAK case 101: YY_RULE_SETUP #line 179 "lex.l" { return SEMICOLON; } YY_BREAK case 102: YY_RULE_SETUP #line 180 "lex.l" { return LPAREN; } YY_BREAK case 103: YY_RULE_SETUP #line 181 "lex.l" { return RPAREN; } YY_BREAK case 104: YY_RULE_SETUP #line 182 "lex.l" { return LANGLE; } YY_BREAK case 105: YY_RULE_SETUP #line 183 "lex.l" { return RANGLE; } YY_BREAK case 106: YY_RULE_SETUP #line 184 "lex.l" { return LCURLY; } YY_BREAK case 107: YY_RULE_SETUP #line 185 "lex.l" { return RCURLY; } YY_BREAK case 108: YY_RULE_SETUP #line 186 "lex.l" { return LSQUARE; } YY_BREAK case 109: YY_RULE_SETUP #line 187 "lex.l" { return RSQUARE; } YY_BREAK case 110: YY_RULE_SETUP #line 188 "lex.l" { return COMMA; } YY_BREAK case 111: YY_RULE_SETUP #line 189 "lex.l" { BEGIN(CHANNEL); return DOT; } YY_BREAK case 112: YY_RULE_SETUP #line 190 "lex.l" { return PLUS; } YY_BREAK case 113: YY_RULE_SETUP #line 191 "lex.l" { return MINUS; } YY_BREAK case 114: YY_RULE_SETUP #line 192 "lex.l" { return MULTIPLY;} YY_BREAK case 115: YY_RULE_SETUP #line 193 "lex.l" { return DIVIDE; } YY_BREAK case 116: YY_RULE_SETUP #line 194 "lex.l" { return COLON; } YY_BREAK case 117: YY_RULE_SETUP #line 195 "lex.l" { return EQ; } YY_BREAK case 118: YY_RULE_SETUP #line 196 "lex.l" { return ABS; } YY_BREAK /* Most register accesses are lexed as REGFILE[0-9]+, to prevent the register * with subreg from being lexed as REGFILE NUMBER instead of * REGISTER INTEGER DOT INTEGER like we want. The alternative was to use a * start condition, which wasn't very clean-looking. * * However, this means we need to lex the general and message register file * characters as well, for register-indirect access which is formatted * like g[a#.#] or m[a#.#]. */ case 119: YY_RULE_SETUP #line 207 "lex.l" { yylval.integer = atoi(yytext + 3); return ACCREG; } YY_BREAK case 120: YY_RULE_SETUP #line 211 "lex.l" { yylval.integer = atoi(yytext + 1); return ADDRESSREG; } YY_BREAK case 121: YY_RULE_SETUP #line 215 "lex.l" { yylval.integer = atoi(yytext + 1); return MSGREG; } YY_BREAK case 122: YY_RULE_SETUP #line 219 "lex.l" { return MSGREGFILE; } YY_BREAK case 123: YY_RULE_SETUP #line 222 "lex.l" { yylval.integer = atoi(yytext + 4); return MASKREG; } YY_BREAK case 124: YY_RULE_SETUP #line 226 "lex.l" { yylval.integer = atoi(yytext + 2); return MASKSTACKREG; } YY_BREAK case 125: YY_RULE_SETUP #line 230 "lex.l" { yylval.integer = atoi(yytext + 3); return MASKSTACKDEPTHREG; } YY_BREAK case 126: YY_RULE_SETUP #line 235 "lex.l" { yylval.integer = atoi(yytext + 3); return NOTIFYREG; } YY_BREAK case 127: YY_RULE_SETUP #line 240 "lex.l" { yylval.integer = atoi(yytext + 1); return NOTIFYREG; } YY_BREAK case 128: YY_RULE_SETUP #line 245 "lex.l" { yylval.integer = atoi(yytext + 1); return FLAGREG; } YY_BREAK case 129: YY_RULE_SETUP #line 250 "lex.l" { yylval.integer = atoi(yytext + 1); BEGIN(REG); return GENREG; } YY_BREAK case 130: YY_RULE_SETUP #line 255 "lex.l" { return LANGLE; } YY_BREAK case 131: YY_RULE_SETUP #line 256 "lex.l" { yylval.integer = strtoul(yytext, NULL, 10); return INTEGER; } YY_BREAK case 132: YY_RULE_SETUP #line 260 "lex.l" { return RANGLE; } YY_BREAK case 133: YY_RULE_SETUP #line 262 "lex.l" { return COMMA; } YY_BREAK case 134: YY_RULE_SETUP #line 263 "lex.l" { BEGIN(DOTSEL); return DOT; } YY_BREAK case 135: YY_RULE_SETUP #line 264 "lex.l" { return SEMICOLON; } YY_BREAK case 136: YY_RULE_SETUP #line 266 "lex.l" { yylval.integer = BRW_CHANNEL_X; return X; } YY_BREAK case 137: YY_RULE_SETUP #line 270 "lex.l" { yylval.integer = BRW_CHANNEL_Y; return Y; } YY_BREAK case 138: YY_RULE_SETUP #line 274 "lex.l" { yylval.integer = BRW_CHANNEL_Z; return Z; } YY_BREAK case 139: YY_RULE_SETUP #line 278 "lex.l" { yylval.integer = BRW_CHANNEL_W; return W; } YY_BREAK case 140: YY_RULE_SETUP #line 282 "lex.l" { yylval.integer = strtoul(yytext, NULL, 10); BEGIN(REG); return INTEGER; } YY_BREAK case 141: YY_RULE_SETUP #line 287 "lex.l" { yyless(0); BEGIN(INITIAL); } YY_BREAK case 142: YY_RULE_SETUP #line 292 "lex.l" { return GENREGFILE; } YY_BREAK case 143: YY_RULE_SETUP #line 295 "lex.l" { yylval.integer = atoi(yytext + 2); return CONTROLREG; } YY_BREAK case 144: YY_RULE_SETUP #line 299 "lex.l" { yylval.integer = atoi(yytext + 2); return STATEREG; } YY_BREAK case 145: YY_RULE_SETUP #line 303 "lex.l" { return IPREG; } YY_BREAK case 146: YY_RULE_SETUP #line 306 "lex.l" { yylval.integer = BRW_AMASK; return AMASK; } YY_BREAK case 147: YY_RULE_SETUP #line 310 "lex.l" { yylval.integer = BRW_IMASK; return IMASK; } YY_BREAK case 148: YY_RULE_SETUP #line 314 "lex.l" { yylval.integer = BRW_LMASK; return LMASK; } YY_BREAK case 149: YY_RULE_SETUP #line 318 "lex.l" { yylval.integer = BRW_CMASK; return CMASK; } YY_BREAK case 150: YY_RULE_SETUP #line 322 "lex.l" { yylval.integer = 0; return IMSD; } YY_BREAK case 151: YY_RULE_SETUP #line 326 "lex.l" { yylval.integer = 1; return LMSD; } YY_BREAK case 152: YY_RULE_SETUP #line 330 "lex.l" { yylval.integer = 0; return IMS; } YY_BREAK case 153: YY_RULE_SETUP #line 334 "lex.l" { yylval.integer = 16; return LMS; } YY_BREAK case 154: YY_RULE_SETUP #line 339 "lex.l" { yyless(0); BEGIN(INITIAL); } YY_BREAK /* * Lexing of register types should probably require the ":" symbol specified * in the BNF of the assembly, but our existing source didn't use that syntax. */ case 155: YY_RULE_SETUP #line 348 "lex.l" { return TYPE_UD; } YY_BREAK case 156: YY_RULE_SETUP #line 349 "lex.l" { return TYPE_UD; } YY_BREAK case 157: YY_RULE_SETUP #line 350 "lex.l" { return TYPE_D; } YY_BREAK case 158: YY_RULE_SETUP #line 351 "lex.l" { return TYPE_D; } YY_BREAK case 159: YY_RULE_SETUP #line 352 "lex.l" { return TYPE_UW; } YY_BREAK case 160: YY_RULE_SETUP #line 353 "lex.l" { return TYPE_UW; } YY_BREAK case 161: YY_RULE_SETUP #line 354 "lex.l" { return TYPE_W; } YY_BREAK case 162: YY_RULE_SETUP #line 355 "lex.l" { return TYPE_W; } YY_BREAK case 163: YY_RULE_SETUP #line 356 "lex.l" { return TYPE_UB; } YY_BREAK case 164: YY_RULE_SETUP #line 357 "lex.l" { return TYPE_UB; } YY_BREAK case 165: YY_RULE_SETUP #line 358 "lex.l" { return TYPE_B; } YY_BREAK case 166: YY_RULE_SETUP #line 359 "lex.l" { return TYPE_B; } YY_BREAK case 167: YY_RULE_SETUP #line 360 "lex.l" { return TYPE_F; } YY_BREAK case 168: YY_RULE_SETUP #line 361 "lex.l" { return TYPE_F; } YY_BREAK case 169: YY_RULE_SETUP #line 362 "lex.l" {return TYPE_VF; } YY_BREAK case 170: YY_RULE_SETUP #line 363 "lex.l" {return TYPE_VF; } YY_BREAK case 171: YY_RULE_SETUP #line 364 "lex.l" { return TYPE_V; } YY_BREAK case 172: YY_RULE_SETUP #line 365 "lex.l" { return TYPE_V; } YY_BREAK case 173: YY_RULE_SETUP #line 367 "lex.l" { return KERNEL_PRAGMA;} YY_BREAK case 174: YY_RULE_SETUP #line 368 "lex.l" { return END_KERNEL_PRAGMA;} YY_BREAK case 175: YY_RULE_SETUP #line 369 "lex.l" { return CODE_PRAGMA;} YY_BREAK case 176: YY_RULE_SETUP #line 370 "lex.l" { return END_CODE_PRAGMA;} YY_BREAK case 177: YY_RULE_SETUP #line 371 "lex.l" { return REG_COUNT_PAYLOAD_PRAGMA; } YY_BREAK case 178: YY_RULE_SETUP #line 372 "lex.l" { return REG_COUNT_TOTAL_PRAGMA; } YY_BREAK case 179: YY_RULE_SETUP #line 373 "lex.l" { return DEFAULT_EXEC_SIZE_PRAGMA; } YY_BREAK case 180: YY_RULE_SETUP #line 374 "lex.l" { return DEFAULT_REG_TYPE_PRAGMA; } YY_BREAK case 181: YY_RULE_SETUP #line 375 "lex.l" { return DECLARE_PRAGMA; } YY_BREAK case 182: YY_RULE_SETUP #line 376 "lex.l" { return BASE; } YY_BREAK case 183: YY_RULE_SETUP #line 377 "lex.l" { return ELEMENTSIZE; } YY_BREAK case 184: YY_RULE_SETUP #line 378 "lex.l" { return SRCREGION; } YY_BREAK case 185: YY_RULE_SETUP #line 379 "lex.l" { return DSTREGION; } YY_BREAK case 186: YY_RULE_SETUP #line 380 "lex.l" { return TYPE; } YY_BREAK case 187: YY_RULE_SETUP #line 383 "lex.l" { return SATURATE; } YY_BREAK case 188: YY_RULE_SETUP #line 384 "lex.l" { return ALIGN1; } YY_BREAK case 189: YY_RULE_SETUP #line 385 "lex.l" { return ALIGN16; } YY_BREAK case 190: YY_RULE_SETUP #line 386 "lex.l" { return SECHALF; } YY_BREAK case 191: YY_RULE_SETUP #line 387 "lex.l" { return COMPR; } YY_BREAK case 192: YY_RULE_SETUP #line 388 "lex.l" { return SWITCH; } YY_BREAK case 193: YY_RULE_SETUP #line 389 "lex.l" { return ATOMIC; } YY_BREAK case 194: YY_RULE_SETUP #line 390 "lex.l" { return NODDCHK; } YY_BREAK case 195: YY_RULE_SETUP #line 391 "lex.l" { return NODDCLR; } YY_BREAK case 196: YY_RULE_SETUP #line 392 "lex.l" { return MASK_DISABLE; } YY_BREAK case 197: YY_RULE_SETUP #line 393 "lex.l" { return MASK_DISABLE; } YY_BREAK case 198: YY_RULE_SETUP #line 394 "lex.l" { return BREAKPOINT; } YY_BREAK case 199: YY_RULE_SETUP #line 395 "lex.l" { return ACCWRCTRL; } YY_BREAK case 200: YY_RULE_SETUP #line 396 "lex.l" { return EOT; } YY_BREAK /* extended math functions */ case 201: YY_RULE_SETUP #line 399 "lex.l" { yylval.integer = BRW_MATH_FUNCTION_INV; return SIN; } YY_BREAK case 202: YY_RULE_SETUP #line 400 "lex.l" { yylval.integer = BRW_MATH_FUNCTION_LOG; return LOG; } YY_BREAK case 203: YY_RULE_SETUP #line 401 "lex.l" { yylval.integer = BRW_MATH_FUNCTION_EXP; return EXP; } YY_BREAK case 204: YY_RULE_SETUP #line 402 "lex.l" { yylval.integer = BRW_MATH_FUNCTION_SQRT; return SQRT; } YY_BREAK case 205: YY_RULE_SETUP #line 403 "lex.l" { yylval.integer = BRW_MATH_FUNCTION_RSQ; return RSQ; } YY_BREAK case 206: YY_RULE_SETUP #line 404 "lex.l" { yylval.integer = BRW_MATH_FUNCTION_POW; return POW; } YY_BREAK case 207: YY_RULE_SETUP #line 405 "lex.l" { yylval.integer = BRW_MATH_FUNCTION_SIN; return SIN; } YY_BREAK case 208: YY_RULE_SETUP #line 406 "lex.l" { yylval.integer = BRW_MATH_FUNCTION_COS; return COS; } YY_BREAK case 209: YY_RULE_SETUP #line 407 "lex.l" { yylval.integer = BRW_MATH_FUNCTION_SINCOS; return SINCOS; } YY_BREAK case 210: YY_RULE_SETUP #line 408 "lex.l" { yylval.integer = BRW_MATH_FUNCTION_INT_DIV_QUOTIENT; return INTDIV; } YY_BREAK case 211: YY_RULE_SETUP #line 412 "lex.l" { yylval.integer = BRW_MATH_FUNCTION_INT_DIV_REMAINDER; return INTMOD; } YY_BREAK case 212: YY_RULE_SETUP #line 416 "lex.l" { yylval.integer = BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER; return INTDIVMOD; } YY_BREAK case 213: YY_RULE_SETUP #line 421 "lex.l" { return SIGNED; } YY_BREAK case 214: YY_RULE_SETUP #line 422 "lex.l" { return SCALAR; } YY_BREAK /* predicate control */ case 215: YY_RULE_SETUP #line 425 "lex.l" { return ANYV; } YY_BREAK case 216: YY_RULE_SETUP #line 426 "lex.l" { return ALLV; } YY_BREAK case 217: YY_RULE_SETUP #line 427 "lex.l" { return ANY2H; } YY_BREAK case 218: YY_RULE_SETUP #line 428 "lex.l" { return ALL2H; } YY_BREAK case 219: YY_RULE_SETUP #line 429 "lex.l" { return ANY4H; } YY_BREAK case 220: YY_RULE_SETUP #line 430 "lex.l" { return ALL4H; } YY_BREAK case 221: YY_RULE_SETUP #line 431 "lex.l" { return ANY8H; } YY_BREAK case 222: YY_RULE_SETUP #line 432 "lex.l" { return ALL8H; } YY_BREAK case 223: YY_RULE_SETUP #line 433 "lex.l" { return ANY16H; } YY_BREAK case 224: YY_RULE_SETUP #line 434 "lex.l" { return ALL16H; } YY_BREAK case 225: YY_RULE_SETUP #line 436 "lex.l" { yylval.integer = BRW_CONDITIONAL_Z; return ZERO; } YY_BREAK case 226: YY_RULE_SETUP #line 437 "lex.l" { yylval.integer = BRW_CONDITIONAL_Z; return EQUAL; } YY_BREAK case 227: YY_RULE_SETUP #line 438 "lex.l" { yylval.integer = BRW_CONDITIONAL_NZ; return NOT_ZERO; } YY_BREAK case 228: YY_RULE_SETUP #line 439 "lex.l" { yylval.integer = BRW_CONDITIONAL_NZ; return NOT_EQUAL; } YY_BREAK case 229: YY_RULE_SETUP #line 440 "lex.l" { yylval.integer = BRW_CONDITIONAL_G; return GREATER; } YY_BREAK case 230: YY_RULE_SETUP #line 441 "lex.l" { yylval.integer = BRW_CONDITIONAL_GE; return GREATER_EQUAL; } YY_BREAK case 231: YY_RULE_SETUP #line 442 "lex.l" { yylval.integer = BRW_CONDITIONAL_L; return LESS; } YY_BREAK case 232: YY_RULE_SETUP #line 443 "lex.l" { yylval.integer = BRW_CONDITIONAL_LE; return LESS_EQUAL; } YY_BREAK case 233: YY_RULE_SETUP #line 444 "lex.l" { yylval.integer = BRW_CONDITIONAL_R; return ROUND_INCREMENT; } YY_BREAK case 234: YY_RULE_SETUP #line 445 "lex.l" { yylval.integer = BRW_CONDITIONAL_O; return OVERFLOW; } YY_BREAK case 235: YY_RULE_SETUP #line 446 "lex.l" { yylval.integer = BRW_CONDITIONAL_U; return UNORDERED; } YY_BREAK case 236: YY_RULE_SETUP #line 448 "lex.l" { yylval.string = strdup(yytext); return STRING; } YY_BREAK case 237: YY_RULE_SETUP #line 453 "lex.l" { yylval.integer = strtoul(yytext + 2, NULL, 16); return INTEGER; } YY_BREAK case 238: YY_RULE_SETUP #line 457 "lex.l" { yylval.integer = strtoul(yytext, NULL, 10); return INTEGER; } YY_BREAK case 239: YY_RULE_SETUP #line 462 "lex.l" { yylval.number = strtod(yytext, NULL); return NUMBER; } YY_BREAK case 240: YY_RULE_SETUP #line 467 "lex.l" { } /* eat up whitespace */ YY_BREAK case 241: /* rule 241 can match eol */ YY_RULE_SETUP #line 469 "lex.l" { yycolumn = 1; } YY_BREAK case 242: YY_RULE_SETUP #line 471 "lex.l" { fprintf(stderr, "%s: %d: %s at \"%s\"\n", input_filename, yylineno, "unexpected token", lex_text()); } YY_BREAK case 243: YY_RULE_SETUP #line 475 "lex.l" ECHO; YY_BREAK #line 2822 "lex.c" case YY_STATE_EOF(INITIAL): case YY_STATE_EOF(BLOCK_COMMENT): case YY_STATE_EOF(CHANNEL): case YY_STATE_EOF(LINENUMBER): case YY_STATE_EOF(FILENAME): case YY_STATE_EOF(REG): case YY_STATE_EOF(DOTSEL): yyterminate(); case YY_END_OF_BUFFER: { /* Amount of text matched not including the EOB char. */ int yy_amount_of_matched_text = (int) (yy_cp - (yytext_ptr)) - 1; /* Undo the effects of YY_DO_BEFORE_ACTION. */ *yy_cp = (yy_hold_char); YY_RESTORE_YY_MORE_OFFSET if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_NEW ) { /* We're scanning a new file or input source. It's * possible that this happened because the user * just pointed yyin at a new source and called * yylex(). If so, then we have to assure * consistency between YY_CURRENT_BUFFER and our * globals. Here is the right place to do so, because * this is the first action (other than possibly a * back-up) that will match for the new input source. */ (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars; YY_CURRENT_BUFFER_LVALUE->yy_input_file = yyin; YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = YY_BUFFER_NORMAL; } /* Note that here we test for yy_c_buf_p "<=" to the position * of the first EOB in the buffer, since yy_c_buf_p will * already have been incremented past the NUL character * (since all states make transitions on EOB to the * end-of-buffer state). Contrast this with the test * in input(). */ if ( (yy_c_buf_p) <= &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] ) { /* This was really a NUL. */ yy_state_type yy_next_state; (yy_c_buf_p) = (yytext_ptr) + yy_amount_of_matched_text; yy_current_state = yy_get_previous_state( ); /* Okay, we're now positioned to make the NUL * transition. We couldn't have * yy_get_previous_state() go ahead and do it * for us because it doesn't know how to deal * with the possibility of jamming (and we don't * want to build jamming into it because then it * will run more slowly). */ yy_next_state = yy_try_NUL_trans( yy_current_state ); yy_bp = (yytext_ptr) + YY_MORE_ADJ; if ( yy_next_state ) { /* Consume the NUL. */ yy_cp = ++(yy_c_buf_p); yy_current_state = yy_next_state; goto yy_match; } else { yy_cp = (yy_c_buf_p); goto yy_find_action; } } else switch ( yy_get_next_buffer( ) ) { case EOB_ACT_END_OF_FILE: { (yy_did_buffer_switch_on_eof) = 0; if ( yywrap( ) ) { /* Note: because we've taken care in * yy_get_next_buffer() to have set up * yytext, we can now set up * yy_c_buf_p so that if some total * hoser (like flex itself) wants to * call the scanner after we return the * YY_NULL, it'll still work - another * YY_NULL will get returned. */ (yy_c_buf_p) = (yytext_ptr) + YY_MORE_ADJ; yy_act = YY_STATE_EOF(YY_START); goto do_action; } else { if ( ! (yy_did_buffer_switch_on_eof) ) YY_NEW_FILE; } break; } case EOB_ACT_CONTINUE_SCAN: (yy_c_buf_p) = (yytext_ptr) + yy_amount_of_matched_text; yy_current_state = yy_get_previous_state( ); yy_cp = (yy_c_buf_p); yy_bp = (yytext_ptr) + YY_MORE_ADJ; goto yy_match; case EOB_ACT_LAST_MATCH: (yy_c_buf_p) = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)]; yy_current_state = yy_get_previous_state( ); yy_cp = (yy_c_buf_p); yy_bp = (yytext_ptr) + YY_MORE_ADJ; goto yy_find_action; } break; } default: YY_FATAL_ERROR( "fatal flex scanner internal error--no action found" ); } /* end of action switch */ } /* end of scanning one token */ } /* end of user's declarations */ } /* end of yylex */ /* yy_get_next_buffer - try to read in a new buffer * * Returns a code representing an action: * EOB_ACT_LAST_MATCH - * EOB_ACT_CONTINUE_SCAN - continue scanning from current position * EOB_ACT_END_OF_FILE - end of file */ static int yy_get_next_buffer (void) { register char *dest = YY_CURRENT_BUFFER_LVALUE->yy_ch_buf; register char *source = (yytext_ptr); register int number_to_move, i; int ret_val; if ( (yy_c_buf_p) > &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] ) YY_FATAL_ERROR( "fatal flex scanner internal error--end of buffer missed" ); if ( YY_CURRENT_BUFFER_LVALUE->yy_fill_buffer == 0 ) { /* Don't try to fill the buffer, so this is an EOF. */ if ( (yy_c_buf_p) - (yytext_ptr) - YY_MORE_ADJ == 1 ) { /* We matched a single character, the EOB, so * treat this as a final EOF. */ return EOB_ACT_END_OF_FILE; } else { /* We matched some text prior to the EOB, first * process it. */ return EOB_ACT_LAST_MATCH; } } /* Try to read more data. */ /* First move last chars to start of buffer. */ number_to_move = (int) ((yy_c_buf_p) - (yytext_ptr)) - 1; for ( i = 0; i < number_to_move; ++i ) *(dest++) = *(source++); if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_EOF_PENDING ) /* don't do the read, it's not guaranteed to return an EOF, * just force an EOF */ YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars) = 0; else { yy_size_t num_to_read = YY_CURRENT_BUFFER_LVALUE->yy_buf_size - number_to_move - 1; while ( num_to_read <= 0 ) { /* Not enough room in the buffer - grow it. */ /* just a shorter name for the current buffer */ YY_BUFFER_STATE b = YY_CURRENT_BUFFER_LVALUE; int yy_c_buf_p_offset = (int) ((yy_c_buf_p) - b->yy_ch_buf); if ( b->yy_is_our_buffer ) { yy_size_t new_size = b->yy_buf_size * 2; if ( new_size <= 0 ) b->yy_buf_size += b->yy_buf_size / 8; else b->yy_buf_size *= 2; b->yy_ch_buf = (char *) /* Include room in for 2 EOB chars. */ yyrealloc((void *) b->yy_ch_buf,b->yy_buf_size + 2 ); } else /* Can't grow it, we don't own it. */ b->yy_ch_buf = 0; if ( ! b->yy_ch_buf ) YY_FATAL_ERROR( "fatal error - scanner input buffer overflow" ); (yy_c_buf_p) = &b->yy_ch_buf[yy_c_buf_p_offset]; num_to_read = YY_CURRENT_BUFFER_LVALUE->yy_buf_size - number_to_move - 1; } if ( num_to_read > YY_READ_BUF_SIZE ) num_to_read = YY_READ_BUF_SIZE; /* Read in more data. */ YY_INPUT( (&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]), (yy_n_chars), num_to_read ); YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); } if ( (yy_n_chars) == 0 ) { if ( number_to_move == YY_MORE_ADJ ) { ret_val = EOB_ACT_END_OF_FILE; yyrestart(yyin ); } else { ret_val = EOB_ACT_LAST_MATCH; YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = YY_BUFFER_EOF_PENDING; } } else ret_val = EOB_ACT_CONTINUE_SCAN; if ((yy_size_t) ((yy_n_chars) + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) { /* Extend the array by 50%, plus the number we really need. */ yy_size_t new_size = (yy_n_chars) + number_to_move + ((yy_n_chars) >> 1); YY_CURRENT_BUFFER_LVALUE->yy_ch_buf = (char *) yyrealloc((void *) YY_CURRENT_BUFFER_LVALUE->yy_ch_buf,new_size ); if ( ! YY_CURRENT_BUFFER_LVALUE->yy_ch_buf ) YY_FATAL_ERROR( "out of dynamic memory in yy_get_next_buffer()" ); } (yy_n_chars) += number_to_move; YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] = YY_END_OF_BUFFER_CHAR; YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] = YY_END_OF_BUFFER_CHAR; (yytext_ptr) = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[0]; return ret_val; } /* yy_get_previous_state - get the state just before the EOB char was reached */ static yy_state_type yy_get_previous_state (void) { register yy_state_type yy_current_state; register char *yy_cp; yy_current_state = (yy_start); for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp ) { register YY_CHAR yy_c = (*yy_cp ? yy_ec[YY_SC_TO_UI(*yy_cp)] : 1); if ( yy_accept[yy_current_state] ) { (yy_last_accepting_state) = yy_current_state; (yy_last_accepting_cpos) = yy_cp; } while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; if ( yy_current_state >= 679 ) yy_c = yy_meta[(unsigned int) yy_c]; } yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; } return yy_current_state; } /* yy_try_NUL_trans - try to make a transition on the NUL character * * synopsis * next_state = yy_try_NUL_trans( current_state ); */ static yy_state_type yy_try_NUL_trans (yy_state_type yy_current_state ) { register int yy_is_jam; register char *yy_cp = (yy_c_buf_p); register YY_CHAR yy_c = 1; if ( yy_accept[yy_current_state] ) { (yy_last_accepting_state) = yy_current_state; (yy_last_accepting_cpos) = yy_cp; } while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; if ( yy_current_state >= 679 ) yy_c = yy_meta[(unsigned int) yy_c]; } yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; yy_is_jam = (yy_current_state == 678); return yy_is_jam ? 0 : yy_current_state; } static void yyunput (int c, register char * yy_bp ) { register char *yy_cp; yy_cp = (yy_c_buf_p); /* undo effects of setting up yytext */ *yy_cp = (yy_hold_char); if ( yy_cp < YY_CURRENT_BUFFER_LVALUE->yy_ch_buf + 2 ) { /* need to shift things up to make room */ /* +2 for EOB chars. */ register yy_size_t number_to_move = (yy_n_chars) + 2; register char *dest = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[ YY_CURRENT_BUFFER_LVALUE->yy_buf_size + 2]; register char *source = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]; while ( source > YY_CURRENT_BUFFER_LVALUE->yy_ch_buf ) *--dest = *--source; yy_cp += (int) (dest - source); yy_bp += (int) (dest - source); YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_buf_size; if ( yy_cp < YY_CURRENT_BUFFER_LVALUE->yy_ch_buf + 2 ) YY_FATAL_ERROR( "flex scanner push-back overflow" ); } *--yy_cp = (char) c; if ( c == '\n' ){ --yylineno; } (yytext_ptr) = yy_bp; (yy_hold_char) = *yy_cp; (yy_c_buf_p) = yy_cp; } #ifndef YY_NO_INPUT #ifdef __cplusplus static int yyinput (void) #else static int input (void) #endif { int c; *(yy_c_buf_p) = (yy_hold_char); if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR ) { /* yy_c_buf_p now points to the character we want to return. * If this occurs *before* the EOB characters, then it's a * valid NUL; if not, then we've hit the end of the buffer. */ if ( (yy_c_buf_p) < &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] ) /* This was really a NUL. */ *(yy_c_buf_p) = '\0'; else { /* need more input */ yy_size_t offset = (yy_c_buf_p) - (yytext_ptr); ++(yy_c_buf_p); switch ( yy_get_next_buffer( ) ) { case EOB_ACT_LAST_MATCH: /* This happens because yy_g_n_b() * sees that we've accumulated a * token and flags that we need to * try matching the token before * proceeding. But for input(), * there's no matching to consider. * So convert the EOB_ACT_LAST_MATCH * to EOB_ACT_END_OF_FILE. */ /* Reset buffer status. */ yyrestart(yyin ); /*FALLTHROUGH*/ case EOB_ACT_END_OF_FILE: { if ( yywrap( ) ) return EOF; if ( ! (yy_did_buffer_switch_on_eof) ) YY_NEW_FILE; #ifdef __cplusplus return yyinput(); #else return input(); #endif } case EOB_ACT_CONTINUE_SCAN: (yy_c_buf_p) = (yytext_ptr) + offset; break; } } } c = *(unsigned char *) (yy_c_buf_p); /* cast for 8-bit char's */ *(yy_c_buf_p) = '\0'; /* preserve yytext */ (yy_hold_char) = *++(yy_c_buf_p); if ( c == '\n' ) yylineno++; ; return c; } #endif /* ifndef YY_NO_INPUT */ /** Immediately switch to a different input stream. * @param input_file A readable stream. * * @note This function does not reset the start condition to @c INITIAL . */ void yyrestart (FILE * input_file ) { if ( ! YY_CURRENT_BUFFER ){ yyensure_buffer_stack (); YY_CURRENT_BUFFER_LVALUE = yy_create_buffer(yyin,YY_BUF_SIZE ); } yy_init_buffer(YY_CURRENT_BUFFER,input_file ); yy_load_buffer_state( ); } /** Switch to a different input buffer. * @param new_buffer The new input buffer. * */ void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer ) { /* TODO. We should be able to replace this entire function body * with * yypop_buffer_state(); * yypush_buffer_state(new_buffer); */ yyensure_buffer_stack (); if ( YY_CURRENT_BUFFER == new_buffer ) return; if ( YY_CURRENT_BUFFER ) { /* Flush out information for old buffer. */ *(yy_c_buf_p) = (yy_hold_char); YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p); YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); } YY_CURRENT_BUFFER_LVALUE = new_buffer; yy_load_buffer_state( ); /* We don't actually know whether we did this switch during * EOF (yywrap()) processing, but the only time this flag * is looked at is after yywrap() is called, so it's safe * to go ahead and always set it. */ (yy_did_buffer_switch_on_eof) = 1; } static void yy_load_buffer_state (void) { (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars; (yytext_ptr) = (yy_c_buf_p) = YY_CURRENT_BUFFER_LVALUE->yy_buf_pos; yyin = YY_CURRENT_BUFFER_LVALUE->yy_input_file; (yy_hold_char) = *(yy_c_buf_p); } /** Allocate and initialize an input buffer state. * @param file A readable stream. * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE. * * @return the allocated buffer state. */ YY_BUFFER_STATE yy_create_buffer (FILE * file, int size ) { YY_BUFFER_STATE b; b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state ) ); if ( ! b ) YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" ); b->yy_buf_size = size; /* yy_ch_buf has to be 2 characters longer than the size given because * we need to put in 2 end-of-buffer characters. */ b->yy_ch_buf = (char *) yyalloc(b->yy_buf_size + 2 ); if ( ! b->yy_ch_buf ) YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" ); b->yy_is_our_buffer = 1; yy_init_buffer(b,file ); return b; } /** Destroy the buffer. * @param b a buffer created with yy_create_buffer() * */ void yy_delete_buffer (YY_BUFFER_STATE b ) { if ( ! b ) return; if ( b == YY_CURRENT_BUFFER ) /* Not sure if we should pop here. */ YY_CURRENT_BUFFER_LVALUE = (YY_BUFFER_STATE) 0; if ( b->yy_is_our_buffer ) yyfree((void *) b->yy_ch_buf ); yyfree((void *) b ); } /* Initializes or reinitializes a buffer. * This function is sometimes called more than once on the same buffer, * such as during a yyrestart() or at EOF. */ static void yy_init_buffer (YY_BUFFER_STATE b, FILE * file ) { int oerrno = errno; yy_flush_buffer(b ); b->yy_input_file = file; b->yy_fill_buffer = 1; /* If b is the current buffer, then yy_init_buffer was _probably_ * called from yyrestart() or through yy_get_next_buffer. * In that case, we don't want to reset the lineno or column. */ if (b != YY_CURRENT_BUFFER){ b->yy_bs_lineno = 1; b->yy_bs_column = 0; } b->yy_is_interactive = file ? (isatty( fileno(file) ) > 0) : 0; errno = oerrno; } /** Discard all buffered characters. On the next scan, YY_INPUT will be called. * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER. * */ void yy_flush_buffer (YY_BUFFER_STATE b ) { if ( ! b ) return; b->yy_n_chars = 0; /* We always need two end-of-buffer characters. The first causes * a transition to the end-of-buffer state. The second causes * a jam in that state. */ b->yy_ch_buf[0] = YY_END_OF_BUFFER_CHAR; b->yy_ch_buf[1] = YY_END_OF_BUFFER_CHAR; b->yy_buf_pos = &b->yy_ch_buf[0]; b->yy_at_bol = 1; b->yy_buffer_status = YY_BUFFER_NEW; if ( b == YY_CURRENT_BUFFER ) yy_load_buffer_state( ); } /** Pushes the new state onto the stack. The new state becomes * the current state. This function will allocate the stack * if necessary. * @param new_buffer The new state. * */ void yypush_buffer_state (YY_BUFFER_STATE new_buffer ) { if (new_buffer == NULL) return; yyensure_buffer_stack(); /* This block is copied from yy_switch_to_buffer. */ if ( YY_CURRENT_BUFFER ) { /* Flush out information for old buffer. */ *(yy_c_buf_p) = (yy_hold_char); YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p); YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); } /* Only push if top exists. Otherwise, replace top. */ if (YY_CURRENT_BUFFER) (yy_buffer_stack_top)++; YY_CURRENT_BUFFER_LVALUE = new_buffer; /* copied from yy_switch_to_buffer. */ yy_load_buffer_state( ); (yy_did_buffer_switch_on_eof) = 1; } /** Removes and deletes the top of the stack, if present. * The next element becomes the new top. * */ void yypop_buffer_state (void) { if (!YY_CURRENT_BUFFER) return; yy_delete_buffer(YY_CURRENT_BUFFER ); YY_CURRENT_BUFFER_LVALUE = NULL; if ((yy_buffer_stack_top) > 0) --(yy_buffer_stack_top); if (YY_CURRENT_BUFFER) { yy_load_buffer_state( ); (yy_did_buffer_switch_on_eof) = 1; } } /* Allocates the stack if it does not exist. * Guarantees space for at least one push. */ static void yyensure_buffer_stack (void) { yy_size_t num_to_alloc; if (!(yy_buffer_stack)) { /* First allocation is just for 2 elements, since we don't know if this * scanner will even need a stack. We use 2 instead of 1 to avoid an * immediate realloc on the next call. */ num_to_alloc = 1; (yy_buffer_stack) = (struct yy_buffer_state**)yyalloc (num_to_alloc * sizeof(struct yy_buffer_state*) ); if ( ! (yy_buffer_stack) ) YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" ); memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*)); (yy_buffer_stack_max) = num_to_alloc; (yy_buffer_stack_top) = 0; return; } if ((yy_buffer_stack_top) >= ((yy_buffer_stack_max)) - 1){ /* Increase the buffer to prepare for a possible push. */ int grow_size = 8 /* arbitrary grow size */; num_to_alloc = (yy_buffer_stack_max) + grow_size; (yy_buffer_stack) = (struct yy_buffer_state**)yyrealloc ((yy_buffer_stack), num_to_alloc * sizeof(struct yy_buffer_state*) ); if ( ! (yy_buffer_stack) ) YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" ); /* zero only the new slots.*/ memset((yy_buffer_stack) + (yy_buffer_stack_max), 0, grow_size * sizeof(struct yy_buffer_state*)); (yy_buffer_stack_max) = num_to_alloc; } } /** Setup the input buffer state to scan directly from a user-specified character buffer. * @param base the character buffer * @param size the size in bytes of the character buffer * * @return the newly allocated buffer state object. */ YY_BUFFER_STATE yy_scan_buffer (char * base, yy_size_t size ) { YY_BUFFER_STATE b; if ( size < 2 || base[size-2] != YY_END_OF_BUFFER_CHAR || base[size-1] != YY_END_OF_BUFFER_CHAR ) /* They forgot to leave room for the EOB's. */ return 0; b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state ) ); if ( ! b ) YY_FATAL_ERROR( "out of dynamic memory in yy_scan_buffer()" ); b->yy_buf_size = size - 2; /* "- 2" to take care of EOB's */ b->yy_buf_pos = b->yy_ch_buf = base; b->yy_is_our_buffer = 0; b->yy_input_file = 0; b->yy_n_chars = b->yy_buf_size; b->yy_is_interactive = 0; b->yy_at_bol = 1; b->yy_fill_buffer = 0; b->yy_buffer_status = YY_BUFFER_NEW; yy_switch_to_buffer(b ); return b; } /** Setup the input buffer state to scan a string. The next call to yylex() will * scan from a @e copy of @a str. * @param yystr a NUL-terminated string to scan * * @return the newly allocated buffer state object. * @note If you want to scan bytes that may contain NUL values, then use * yy_scan_bytes() instead. */ YY_BUFFER_STATE yy_scan_string (yyconst char * yystr ) { return yy_scan_bytes(yystr,strlen(yystr) ); } /** Setup the input buffer state to scan the given bytes. The next call to yylex() will * scan from a @e copy of @a bytes. * @param yybytes the byte buffer to scan * @param _yybytes_len the number of bytes in the buffer pointed to by @a bytes. * * @return the newly allocated buffer state object. */ YY_BUFFER_STATE yy_scan_bytes (yyconst char * yybytes, yy_size_t _yybytes_len ) { YY_BUFFER_STATE b; char *buf; yy_size_t n; yy_size_t i; /* Get memory for full buffer, including space for trailing EOB's. */ n = _yybytes_len + 2; buf = (char *) yyalloc(n ); if ( ! buf ) YY_FATAL_ERROR( "out of dynamic memory in yy_scan_bytes()" ); for ( i = 0; i < _yybytes_len; ++i ) buf[i] = yybytes[i]; buf[_yybytes_len] = buf[_yybytes_len+1] = YY_END_OF_BUFFER_CHAR; b = yy_scan_buffer(buf,n ); if ( ! b ) YY_FATAL_ERROR( "bad buffer in yy_scan_bytes()" ); /* It's okay to grow etc. this buffer, and we should throw it * away when we're done. */ b->yy_is_our_buffer = 1; return b; } #ifndef YY_EXIT_FAILURE #define YY_EXIT_FAILURE 2 #endif static void yy_fatal_error (yyconst char* msg ) { (void) fprintf( stderr, "%s\n", msg ); exit( YY_EXIT_FAILURE ); } /* Redefine yyless() so it works in section 3 code. */ #undef yyless #define yyless(n) \ do \ { \ /* Undo effects of setting up yytext. */ \ int yyless_macro_arg = (n); \ YY_LESS_LINENO(yyless_macro_arg);\ yytext[yyleng] = (yy_hold_char); \ (yy_c_buf_p) = yytext + yyless_macro_arg; \ (yy_hold_char) = *(yy_c_buf_p); \ *(yy_c_buf_p) = '\0'; \ yyleng = yyless_macro_arg; \ } \ while ( 0 ) /* Accessor methods (get/set functions) to struct members. */ /** Get the current line number. * */ int yyget_lineno (void) { return yylineno; } /** Get the input stream. * */ FILE *yyget_in (void) { return yyin; } /** Get the output stream. * */ FILE *yyget_out (void) { return yyout; } /** Get the length of the current token. * */ yy_size_t yyget_leng (void) { return yyleng; } /** Get the current token. * */ char *yyget_text (void) { return yytext; } /** Set the current line number. * @param line_number * */ void yyset_lineno (int line_number ) { yylineno = line_number; } /** Set the input stream. This does not discard the current * input buffer. * @param in_str A readable stream. * * @see yy_switch_to_buffer */ void yyset_in (FILE * in_str ) { yyin = in_str ; } void yyset_out (FILE * out_str ) { yyout = out_str ; } int yyget_debug (void) { return yy_flex_debug; } void yyset_debug (int bdebug ) { yy_flex_debug = bdebug ; } static int yy_init_globals (void) { /* Initialization is the same as for the non-reentrant scanner. * This function is called from yylex_destroy(), so don't allocate here. */ /* We do not touch yylineno unless the option is enabled. */ yylineno = 1; (yy_buffer_stack) = 0; (yy_buffer_stack_top) = 0; (yy_buffer_stack_max) = 0; (yy_c_buf_p) = (char *) 0; (yy_init) = 0; (yy_start) = 0; /* Defined in main.c */ #ifdef YY_STDINIT yyin = stdin; yyout = stdout; #else yyin = (FILE *) 0; yyout = (FILE *) 0; #endif /* For future reference: Set errno on error, since we are called by * yylex_init() */ return 0; } /* yylex_destroy is for both reentrant and non-reentrant scanners. */ int yylex_destroy (void) { /* Pop the buffer stack, destroying each element. */ while(YY_CURRENT_BUFFER){ yy_delete_buffer(YY_CURRENT_BUFFER ); YY_CURRENT_BUFFER_LVALUE = NULL; yypop_buffer_state(); } /* Destroy the stack itself. */ yyfree((yy_buffer_stack) ); (yy_buffer_stack) = NULL; /* Reset the globals. This is important in a non-reentrant scanner so the next time * yylex() is called, initialization will occur. */ yy_init_globals( ); return 0; } /* * Internal utility routines. */ #ifndef yytext_ptr static void yy_flex_strncpy (char* s1, yyconst char * s2, int n ) { register int i; for ( i = 0; i < n; ++i ) s1[i] = s2[i]; } #endif #ifdef YY_NEED_STRLEN static int yy_flex_strlen (yyconst char * s ) { register int n; for ( n = 0; s[n]; ++n ) ; return n; } #endif void *yyalloc (yy_size_t size ) { return (void *) malloc( size ); } void *yyrealloc (void * ptr, yy_size_t size ) { /* The cast to (char *) in the following accommodates both * implementations that use char* generic pointers, and those * that use void* generic pointers. It works with the latter * because both ANSI C and C++ allow castless assignment from * any pointer type to void*, and deal with argument conversions * as though doing an assignment. */ return (void *) realloc( (char *) ptr, size ); } void yyfree (void * ptr ) { free( (char *) ptr ); /* see yyrealloc() for (char *) cast */ } #define YYTABLES_NAME "yytables" #line 474 "lex.l" char * lex_text(void) { return yytext; (void) yyunput; } #ifndef yywrap int yywrap() { return 1; } #endif intel-gpu-tools-1.14/assembler/brw_compat.h0000644000175000017500000000412012665336131015710 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ /* * To share code with mesa without having to do big modifications and still be * able to sync files together at a later point, this file holds macros and * types defined in mesa's core headers. */ #ifndef __BRW_COMPAT_H__ #define __BRW_COMPAT_H__ #ifdef __cplusplus extern "C" { #endif /** * * __builtin_expect macros * */ #if !defined(__GNUC__) # define __builtin_expect(x, y) (x) #endif #ifndef likely # ifdef __GNUC__ # define likely(x) __builtin_expect(!!(x), 1) # define unlikely(x) __builtin_expect(!!(x), 0) # else # define likely(x) (x) # define unlikely(x) (x) # endif #endif #if (__GNUC__ >= 3) #define PRINTFLIKE(f, a) __attribute__ ((format(__printf__, f, a))) #else #define PRINTFLIKE(f, a) #endif #define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0])) #define Elements(x) ARRAY_SIZE(x) typedef union { float f; int i; unsigned u; } fi_type; #ifdef __cplusplus } /* end of extern "C" */ #endif #endif /* __BRW_COMPAT_H__ */ intel-gpu-tools-1.14/assembler/brw_eu_debug.c0000644000175000017500000000534112665336131016205 00000000000000/* Copyright (C) Intel Corp. 2006. All Rights Reserved. Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to develop this 3D driver. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **********************************************************************/ /* * Authors: * Keith Whitwell */ #include "brw_eu.h" void brw_print_reg( struct brw_reg hwreg ) { static const char *file[] = { "arf", "grf", "msg", "imm" }; static const char *type[] = { "ud", "d", "uw", "w", "ub", "vf", "hf", "f" }; printf("%s%s", hwreg.abs ? "abs/" : "", hwreg.negate ? "-" : ""); if (hwreg.file == BRW_GENERAL_REGISTER_FILE && hwreg.nr % 2 == 0 && hwreg.subnr == 0 && hwreg.vstride == BRW_VERTICAL_STRIDE_8 && hwreg.width == BRW_WIDTH_8 && hwreg.hstride == BRW_HORIZONTAL_STRIDE_1 && hwreg.type == BRW_REGISTER_TYPE_F) { /* vector register */ printf("vec%d", hwreg.nr); } else if (hwreg.file == BRW_GENERAL_REGISTER_FILE && hwreg.vstride == BRW_VERTICAL_STRIDE_0 && hwreg.width == BRW_WIDTH_1 && hwreg.hstride == BRW_HORIZONTAL_STRIDE_0 && hwreg.type == BRW_REGISTER_TYPE_F) { /* "scalar" register */ printf("scl%d.%d", hwreg.nr, hwreg.subnr / 4); } else if (hwreg.file == BRW_IMMEDIATE_VALUE) { printf("imm %f", hwreg.dw1.f); } else { printf("%s%d.%d<%d;%d,%d>:%s", file[hwreg.file], hwreg.nr, hwreg.subnr / type_sz(hwreg.type), hwreg.vstride ? (1<<(hwreg.vstride-1)) : 0, 1< #include #include #include #include #include "gen4asm.h" #include "brw_eu.h" #include "gen8_instruction.h" static const struct option longopts[] = { { NULL, 0, NULL, 0 } }; static struct brw_program * read_program (FILE *input) { uint32_t inst[4]; struct brw_program *program; struct brw_program_instruction *entry, **prev; int c; int n = 0; program = malloc (sizeof (struct brw_program)); program->first = NULL; prev = &program->first; while ((c = getc (input)) != EOF) { if (c == '0') { if (fscanf (input, "x%x", &inst[n]) == 1) { ++n; if (n == 4) { entry = malloc (sizeof (struct brw_program_instruction)); memcpy (&entry->insn, inst, 4 * sizeof (uint32_t)); entry->next = NULL; *prev = entry; prev = &entry->next; n = 0; } } } } return program; } static struct brw_program * read_program_binary (FILE *input) { uint32_t temp; uint8_t inst[16]; struct brw_program *program; struct brw_program_instruction *entry, **prev; int c; int n = 0; program = malloc (sizeof (struct brw_program)); program->first = NULL; prev = &program->first; while ((c = getc (input)) != EOF) { if (c == '0') { if (fscanf (input, "x%2x", &temp) == 1) { inst[n++] = (uint8_t)temp; if (n == 16) { entry = malloc (sizeof (struct brw_program_instruction)); memcpy (&entry->insn, inst, 16 * sizeof (uint8_t)); entry->next = NULL; *prev = entry; prev = &entry->next; n = 0; } } } } return program; } static void usage(void) { fprintf(stderr, "usage: intel-gen4disasm [options] inputfile\n"); fprintf(stderr, "\t-b, --binary C style binary output\n"); fprintf(stderr, "\t-o, --output {outputfile} Specify output file\n"); fprintf(stderr, "\t-g, --gen <4|5|6|7|8|9> Specify GPU generation\n"); } int main(int argc, char **argv) { struct brw_program *program; FILE *input = stdin; FILE *output = stdout; char *input_filename = NULL; char *output_file = NULL; int byte_array_input = 0; int o; int gen = 4; struct brw_program_instruction *inst; while ((o = getopt_long(argc, argv, "o:bg:", longopts, NULL)) != -1) { switch (o) { case 'o': if (strcmp(optarg, "-") != 0) output_file = optarg; break; case 'b': byte_array_input = 1; break; case 'g': gen = strtol(optarg, NULL, 10); if (gen < 4 || gen > 9) { usage(); exit(1); } break; default: usage(); exit(1); } } argc -= optind; argv += optind; if (argc != 1) { usage(); exit(1); } if (strcmp(argv[0], "-") != 0) { input_filename = argv[0]; input = fopen(input_filename, "r"); if (input == NULL) { perror("Couldn't open input file"); exit(1); } } if (byte_array_input) program = read_program_binary (input); else program = read_program (input); if (!program) exit (1); if (output_file) { output = fopen (output_file, "w"); if (output == NULL) { perror("Couldn't open output file"); exit(1); } } for (inst = program->first; inst; inst = inst->next) if (gen >= 8) gen8_disassemble(output, &inst->insn.gen8, gen); else brw_disasm (output, &inst->insn.gen, gen); exit (0); } intel-gpu-tools-1.14/assembler/brw_context.c0000644000175000017500000000304512665336131016111 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ #include #include "brw_context.h" static bool intel_init_context(struct intel_context *intel, int gen) { memset(intel, 0, sizeof(struct intel_context)); intel->gen = gen / 10; intel->is_haswell = gen == 75; if (intel->gen >= 5) intel->needs_ff_sync = true; return true; } bool brw_init_context(struct brw_context *brw, int gen) { return intel_init_context(&brw->intel, gen); } intel-gpu-tools-1.14/assembler/Makefile.am0000644000175000017500000000163012665336131015441 00000000000000SUBDIRS = doc test noinst_LTLIBRARIES = libbrw.la bin_PROGRAMS = intel-gen4asm intel-gen4disasm libbrw_la_SOURCES = \ brw_compat.h \ brw_context.c \ brw_context.h \ brw_disasm.c \ brw_defines.h \ brw_eu.h \ brw_eu.c \ brw_eu_compact.c \ brw_eu_debug.c \ brw_eu_emit.c \ brw_eu_util.c \ brw_reg.h \ brw_structs.h \ gen8_disasm.c \ gen8_instruction.h \ gen8_instruction.c \ ralloc.c \ ralloc.h \ $(NULL) AM_YFLAGS = -d --warnings=all AM_CFLAGS= $(ASSEMBLER_WARN_CFLAGS) LEX = flex -i BUILT_SOURCES = gram.h gram.c lex.c gram.h: gram.c intel_gen4asm_SOURCES = \ gen4asm.h \ gram.y \ lex.l \ main.c \ $(NULL) intel_gen4asm_LDADD = libbrw.la intel_gen4disasm_SOURCES = disasm-main.c intel_gen4disasm_LDADD = libbrw.la pkgconfigdir = $(libdir)/pkgconfig pkgconfig_DATA = intel-gen4asm.pc CLEANFILES = $(BUILT_SOURCES) EXTRA_DIST = \ README \ TODO \ intel-gen4asm.pc.in intel-gpu-tools-1.14/assembler/brw_eu_compact.c0000644000175000017500000005512712665336131016554 00000000000000/* * Copyright © 2012 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ /** @file brw_eu_compact.c * * Instruction compaction is a feature of gm45 and newer hardware that allows * for a smaller instruction encoding. * * The instruction cache is on the order of 32KB, and many programs generate * far more instructions than that. The instruction cache is built to barely * keep up with instruction dispatch abaility in cache hit cases -- L1 * instruction cache misses that still hit in the next level could limit * throughput by around 50%. * * The idea of instruction compaction is that most instructions use a tiny * subset of the GPU functionality, so we can encode what would be a 16 byte * instruction in 8 bytes using some lookup tables for various fields. */ #include #include "brw_compat.h" #include "brw_context.h" #include "brw_eu.h" static const uint32_t gen6_control_index_table[32] = { 0b00000000000000000, 0b01000000000000000, 0b00110000000000000, 0b00000000100000000, 0b00010000000000000, 0b00001000100000000, 0b00000000100000010, 0b00000000000000010, 0b01000000100000000, 0b01010000000000000, 0b10110000000000000, 0b00100000000000000, 0b11010000000000000, 0b11000000000000000, 0b01001000100000000, 0b01000000000001000, 0b01000000000000100, 0b00000000000001000, 0b00000000000000100, 0b00111000100000000, 0b00001000100000010, 0b00110000100000000, 0b00110000000000001, 0b00100000000000001, 0b00110000000000010, 0b00110000000000101, 0b00110000000001001, 0b00110000000010000, 0b00110000000000011, 0b00110000000000100, 0b00110000100001000, 0b00100000000001001 }; static const uint32_t gen6_datatype_table[32] = { 0b001001110000000000, 0b001000110000100000, 0b001001110000000001, 0b001000000001100000, 0b001010110100101001, 0b001000000110101101, 0b001100011000101100, 0b001011110110101101, 0b001000000111101100, 0b001000000001100001, 0b001000110010100101, 0b001000000001000001, 0b001000001000110001, 0b001000001000101001, 0b001000000000100000, 0b001000001000110010, 0b001010010100101001, 0b001011010010100101, 0b001000000110100101, 0b001100011000101001, 0b001011011000101100, 0b001011010110100101, 0b001011110110100101, 0b001111011110111101, 0b001111011110111100, 0b001111011110111101, 0b001111011110011101, 0b001111011110111110, 0b001000000000100001, 0b001000000000100010, 0b001001111111011101, 0b001000001110111110, }; static const uint32_t gen6_subreg_table[32] = { 0b000000000000000, 0b000000000000100, 0b000000110000000, 0b111000000000000, 0b011110000001000, 0b000010000000000, 0b000000000010000, 0b000110000001100, 0b001000000000000, 0b000001000000000, 0b000001010010100, 0b000000001010110, 0b010000000000000, 0b110000000000000, 0b000100000000000, 0b000000010000000, 0b000000000001000, 0b100000000000000, 0b000001010000000, 0b001010000000000, 0b001100000000000, 0b000000001010100, 0b101101010010100, 0b010100000000000, 0b000000010001111, 0b011000000000000, 0b111110000000000, 0b101000000000000, 0b000000000001111, 0b000100010001111, 0b001000010001111, 0b000110000000000, }; static const uint32_t gen6_src_index_table[32] = { 0b000000000000, 0b010110001000, 0b010001101000, 0b001000101000, 0b011010010000, 0b000100100000, 0b010001101100, 0b010101110000, 0b011001111000, 0b001100101000, 0b010110001100, 0b001000100000, 0b010110001010, 0b000000000010, 0b010101010000, 0b010101101000, 0b111101001100, 0b111100101100, 0b011001110000, 0b010110001001, 0b010101011000, 0b001101001000, 0b010000101100, 0b010000000000, 0b001101110000, 0b001100010000, 0b001100000000, 0b010001101010, 0b001101111000, 0b000001110000, 0b001100100000, 0b001101010000, }; static const uint32_t gen7_control_index_table[32] = { 0b0000000000000000010, 0b0000100000000000000, 0b0000100000000000001, 0b0000100000000000010, 0b0000100000000000011, 0b0000100000000000100, 0b0000100000000000101, 0b0000100000000000111, 0b0000100000000001000, 0b0000100000000001001, 0b0000100000000001101, 0b0000110000000000000, 0b0000110000000000001, 0b0000110000000000010, 0b0000110000000000011, 0b0000110000000000100, 0b0000110000000000101, 0b0000110000000000111, 0b0000110000000001001, 0b0000110000000001101, 0b0000110000000010000, 0b0000110000100000000, 0b0001000000000000000, 0b0001000000000000010, 0b0001000000000000100, 0b0001000000100000000, 0b0010110000000000000, 0b0010110000000010000, 0b0011000000000000000, 0b0011000000100000000, 0b0101000000000000000, 0b0101000000100000000 }; static const uint32_t gen7_datatype_table[32] = { 0b001000000000000001, 0b001000000000100000, 0b001000000000100001, 0b001000000001100001, 0b001000000010111101, 0b001000001011111101, 0b001000001110100001, 0b001000001110100101, 0b001000001110111101, 0b001000010000100001, 0b001000110000100000, 0b001000110000100001, 0b001001010010100101, 0b001001110010100100, 0b001001110010100101, 0b001111001110111101, 0b001111011110011101, 0b001111011110111100, 0b001111011110111101, 0b001111111110111100, 0b000000001000001100, 0b001000000000111101, 0b001000000010100101, 0b001000010000100000, 0b001001010010100100, 0b001001110010000100, 0b001010010100001001, 0b001101111110111101, 0b001111111110111101, 0b001011110110101100, 0b001010010100101000, 0b001010110100101000 }; static const uint32_t gen7_subreg_table[32] = { 0b000000000000000, 0b000000000000001, 0b000000000001000, 0b000000000001111, 0b000000000010000, 0b000000010000000, 0b000000100000000, 0b000000110000000, 0b000001000000000, 0b000001000010000, 0b000010100000000, 0b001000000000000, 0b001000000000001, 0b001000010000001, 0b001000010000010, 0b001000010000011, 0b001000010000100, 0b001000010000111, 0b001000010001000, 0b001000010001110, 0b001000010001111, 0b001000110000000, 0b001000111101000, 0b010000000000000, 0b010000110000000, 0b011000000000000, 0b011110010000111, 0b100000000000000, 0b101000000000000, 0b110000000000000, 0b111000000000000, 0b111000000011100 }; static const uint32_t gen7_src_index_table[32] = { 0b000000000000, 0b000000000010, 0b000000010000, 0b000000010010, 0b000000011000, 0b000000100000, 0b000000101000, 0b000001001000, 0b000001010000, 0b000001110000, 0b000001111000, 0b001100000000, 0b001100000010, 0b001100001000, 0b001100010000, 0b001100010010, 0b001100100000, 0b001100101000, 0b001100111000, 0b001101000000, 0b001101000010, 0b001101001000, 0b001101010000, 0b001101100000, 0b001101101000, 0b001101110000, 0b001101110001, 0b001101111000, 0b010001101000, 0b010001101001, 0b010001101010, 0b010110001000 }; static const uint32_t *control_index_table; static const uint32_t *datatype_table; static const uint32_t *subreg_table; static const uint32_t *src_index_table; static bool set_control_index(struct intel_context *intel, struct brw_compact_instruction *dst, struct brw_instruction *src) { uint32_t *src_u32 = (uint32_t *)src; uint32_t uncompacted = 0; uncompacted |= ((src_u32[0] >> 8) & 0xffff) << 0; uncompacted |= ((src_u32[0] >> 31) & 0x1) << 16; /* On gen7, the flag register number gets integrated into the control * index. */ if (intel->gen >= 7) uncompacted |= ((src_u32[2] >> 25) & 0x3) << 17; for (int i = 0; i < 32; i++) { if (control_index_table[i] == uncompacted) { dst->dw0.control_index = i; return true; } } return false; } static bool set_datatype_index(struct brw_compact_instruction *dst, struct brw_instruction *src) { uint32_t uncompacted = 0; uncompacted |= src->bits1.ud & 0x7fff; uncompacted |= (src->bits1.ud >> 29) << 15; for (int i = 0; i < 32; i++) { if (datatype_table[i] == uncompacted) { dst->dw0.data_type_index = i; return true; } } return false; } static bool set_subreg_index(struct brw_compact_instruction *dst, struct brw_instruction *src) { uint32_t uncompacted = 0; uncompacted |= src->bits1.da1.dest_subreg_nr << 0; uncompacted |= src->bits2.da1.src0_subreg_nr << 5; uncompacted |= src->bits3.da1.src1_subreg_nr << 10; for (int i = 0; i < 32; i++) { if (subreg_table[i] == uncompacted) { dst->dw0.sub_reg_index = i; return true; } } return false; } static bool get_src_index(uint32_t uncompacted, uint32_t *compacted) { for (int i = 0; i < 32; i++) { if (src_index_table[i] == uncompacted) { *compacted = i; return true; } } return false; } static bool set_src0_index(struct brw_compact_instruction *dst, struct brw_instruction *src) { uint32_t compacted, uncompacted = 0; uncompacted |= (src->bits2.ud >> 13) & 0xfff; if (!get_src_index(uncompacted, &compacted)) return false; dst->dw0.src0_index = compacted & 0x3; dst->dw1.src0_index = compacted >> 2; return true; } static bool set_src1_index(struct brw_compact_instruction *dst, struct brw_instruction *src) { uint32_t compacted, uncompacted = 0; uncompacted |= (src->bits3.ud >> 13) & 0xfff; if (!get_src_index(uncompacted, &compacted)) return false; dst->dw1.src1_index = compacted; return true; } /** * Tries to compact instruction src into dst. * * It doesn't modify dst unless src is compactable, which is relied on by * brw_compact_instructions(). */ bool brw_try_compact_instruction(struct brw_compile *p, struct brw_compact_instruction *dst, struct brw_instruction *src) { struct brw_context *brw = p->brw; struct intel_context *intel = &brw->intel; struct brw_compact_instruction temp; if (src->header.opcode == BRW_OPCODE_IF || src->header.opcode == BRW_OPCODE_ELSE || src->header.opcode == BRW_OPCODE_ENDIF || src->header.opcode == BRW_OPCODE_HALT || src->header.opcode == BRW_OPCODE_DO || src->header.opcode == BRW_OPCODE_WHILE) { /* FINISHME: The fixup code below, and brw_set_uip_jip and friends, needs * to be able to handle compacted flow control instructions.. */ return false; } /* FINISHME: immediates */ if (src->bits1.da1.src0_reg_file == BRW_IMMEDIATE_VALUE || src->bits1.da1.src1_reg_file == BRW_IMMEDIATE_VALUE) return false; memset(&temp, 0, sizeof(temp)); temp.dw0.opcode = src->header.opcode; temp.dw0.debug_control = src->header.debug_control; if (!set_control_index(intel, &temp, src)) return false; if (!set_datatype_index(&temp, src)) return false; if (!set_subreg_index(&temp, src)) return false; temp.dw0.acc_wr_control = src->header.acc_wr_control; temp.dw0.conditionalmod = src->header.destreg__conditionalmod; if (intel->gen <= 6) temp.dw0.flag_subreg_nr = src->bits2.da1.flag_subreg_nr; temp.dw0.cmpt_ctrl = 1; if (!set_src0_index(&temp, src)) return false; if (!set_src1_index(&temp, src)) return false; temp.dw1.dst_reg_nr = src->bits1.da1.dest_reg_nr; temp.dw1.src0_reg_nr = src->bits2.da1.src0_reg_nr; temp.dw1.src1_reg_nr = src->bits3.da1.src1_reg_nr; *dst = temp; return true; } static void set_uncompacted_control(struct intel_context *intel, struct brw_instruction *dst, struct brw_compact_instruction *src) { uint32_t *dst_u32 = (uint32_t *)dst; uint32_t uncompacted = control_index_table[src->dw0.control_index]; dst_u32[0] |= ((uncompacted >> 0) & 0xffff) << 8; dst_u32[0] |= ((uncompacted >> 16) & 0x1) << 31; if (intel->gen >= 7) dst_u32[2] |= ((uncompacted >> 17) & 0x3) << 25; } static void set_uncompacted_datatype(struct brw_instruction *dst, struct brw_compact_instruction *src) { uint32_t uncompacted = datatype_table[src->dw0.data_type_index]; dst->bits1.ud &= ~(0x7 << 29); dst->bits1.ud |= ((uncompacted >> 15) & 0x7) << 29; dst->bits1.ud &= ~0x7fff; dst->bits1.ud |= uncompacted & 0x7fff; } static void set_uncompacted_subreg(struct brw_instruction *dst, struct brw_compact_instruction *src) { uint32_t uncompacted = subreg_table[src->dw0.sub_reg_index]; dst->bits1.da1.dest_subreg_nr = (uncompacted >> 0) & 0x1f; dst->bits2.da1.src0_subreg_nr = (uncompacted >> 5) & 0x1f; dst->bits3.da1.src1_subreg_nr = (uncompacted >> 10) & 0x1f; } static void set_uncompacted_src0(struct brw_instruction *dst, struct brw_compact_instruction *src) { uint32_t compacted = src->dw0.src0_index | src->dw1.src0_index << 2; uint32_t uncompacted = src_index_table[compacted]; dst->bits2.ud |= uncompacted << 13; } static void set_uncompacted_src1(struct brw_instruction *dst, struct brw_compact_instruction *src) { uint32_t uncompacted = src_index_table[src->dw1.src1_index]; dst->bits3.ud |= uncompacted << 13; } void brw_uncompact_instruction(struct intel_context *intel, struct brw_instruction *dst, struct brw_compact_instruction *src) { memset(dst, 0, sizeof(*dst)); dst->header.opcode = src->dw0.opcode; dst->header.debug_control = src->dw0.debug_control; set_uncompacted_control(intel, dst, src); set_uncompacted_datatype(dst, src); set_uncompacted_subreg(dst, src); dst->header.acc_wr_control = src->dw0.acc_wr_control; dst->header.destreg__conditionalmod = src->dw0.conditionalmod; if (intel->gen <= 6) dst->bits2.da1.flag_subreg_nr = src->dw0.flag_subreg_nr; set_uncompacted_src0(dst, src); set_uncompacted_src1(dst, src); dst->bits1.da1.dest_reg_nr = src->dw1.dst_reg_nr; dst->bits2.da1.src0_reg_nr = src->dw1.src0_reg_nr; dst->bits3.da1.src1_reg_nr = src->dw1.src1_reg_nr; } void brw_debug_compact_uncompact(struct intel_context *intel, struct brw_instruction *orig, struct brw_instruction *uncompacted) { fprintf(stderr, "Instruction compact/uncompact changed (gen%d):\n", intel->gen); fprintf(stderr, " before: "); brw_disasm(stderr, orig, intel->gen); fprintf(stderr, " after: "); brw_disasm(stderr, uncompacted, intel->gen); uint32_t *before_bits = (uint32_t *)orig; uint32_t *after_bits = (uint32_t *)uncompacted; printf(" changed bits:\n"); for (int i = 0; i < 128; i++) { uint32_t before = before_bits[i / 32] & (1 << (i & 31)); uint32_t after = after_bits[i / 32] & (1 << (i & 31)); if (before != after) { printf(" bit %d, %s to %s\n", i, before ? "set" : "unset", after ? "set" : "unset"); } } } static int compacted_between(int old_ip, int old_target_ip, int *compacted_counts) { int this_compacted_count = compacted_counts[old_ip]; int target_compacted_count = compacted_counts[old_target_ip]; return target_compacted_count - this_compacted_count; } static void update_uip_jip(struct brw_instruction *insn, int this_old_ip, int *compacted_counts) { int target_old_ip; target_old_ip = this_old_ip + insn->bits3.break_cont.jip; insn->bits3.break_cont.jip -= compacted_between(this_old_ip, target_old_ip, compacted_counts); target_old_ip = this_old_ip + insn->bits3.break_cont.uip; insn->bits3.break_cont.uip -= compacted_between(this_old_ip, target_old_ip, compacted_counts); } void brw_init_compaction_tables(struct intel_context *intel) { assert(gen6_control_index_table[ARRAY_SIZE(gen6_control_index_table) - 1] != 0); assert(gen6_datatype_table[ARRAY_SIZE(gen6_datatype_table) - 1] != 0); assert(gen6_subreg_table[ARRAY_SIZE(gen6_subreg_table) - 1] != 0); assert(gen6_src_index_table[ARRAY_SIZE(gen6_src_index_table) - 1] != 0); assert(gen7_control_index_table[ARRAY_SIZE(gen6_control_index_table) - 1] != 0); assert(gen7_datatype_table[ARRAY_SIZE(gen6_datatype_table) - 1] != 0); assert(gen7_subreg_table[ARRAY_SIZE(gen6_subreg_table) - 1] != 0); assert(gen7_src_index_table[ARRAY_SIZE(gen6_src_index_table) - 1] != 0); switch (intel->gen) { case 7: control_index_table = gen7_control_index_table; datatype_table = gen7_datatype_table; subreg_table = gen7_subreg_table; src_index_table = gen7_src_index_table; break; case 6: control_index_table = gen6_control_index_table; datatype_table = gen6_datatype_table; subreg_table = gen6_subreg_table; src_index_table = gen6_src_index_table; break; default: return; } } void brw_compact_instructions(struct brw_compile *p) { struct brw_context *brw = p->brw; struct intel_context *intel = &brw->intel; void *store = p->store; /* For an instruction at byte offset 8*i before compaction, this is the number * of compacted instructions that preceded it. */ int compacted_counts[p->next_insn_offset / 8]; /* For an instruction at byte offset 8*i after compaction, this is the * 8-byte offset it was at before compaction. */ int old_ip[p->next_insn_offset / 8]; if (intel->gen < 6) return; int src_offset; int offset = 0; int compacted_count = 0; for (src_offset = 0; src_offset < p->nr_insn * 16;) { struct brw_instruction *src = store + src_offset; void *dst = store + offset; old_ip[offset / 8] = src_offset / 8; compacted_counts[src_offset / 8] = compacted_count; struct brw_instruction saved = *src; if (!src->header.cmpt_control && brw_try_compact_instruction(p, dst, src)) { compacted_count++; if (INTEL_DEBUG) { struct brw_instruction uncompacted; brw_uncompact_instruction(intel, &uncompacted, dst); if (memcmp(&saved, &uncompacted, sizeof(uncompacted))) { brw_debug_compact_uncompact(intel, &saved, &uncompacted); } } offset += 8; src_offset += 16; } else { int size = src->header.cmpt_control ? 8 : 16; /* It appears that the end of thread SEND instruction needs to be * aligned, or the GPU hangs. */ if ((src->header.opcode == BRW_OPCODE_SEND || src->header.opcode == BRW_OPCODE_SENDC) && src->bits3.generic.end_of_thread && (offset & 8) != 0) { struct brw_compact_instruction *align = store + offset; memset(align, 0, sizeof(*align)); align->dw0.opcode = BRW_OPCODE_NOP; align->dw0.cmpt_ctrl = 1; offset += 8; old_ip[offset / 8] = src_offset / 8; dst = store + offset; } /* If we didn't compact this intruction, we need to move it down into * place. */ if (offset != src_offset) { memmove(dst, src, size); } offset += size; src_offset += size; } } /* Fix up control flow offsets. */ p->next_insn_offset = offset; for (offset = 0; offset < p->next_insn_offset;) { struct brw_instruction *insn = store + offset; int this_old_ip = old_ip[offset / 8]; int this_compacted_count = compacted_counts[this_old_ip]; int target_old_ip, target_compacted_count; switch (insn->header.opcode) { case BRW_OPCODE_BREAK: case BRW_OPCODE_CONTINUE: case BRW_OPCODE_HALT: update_uip_jip(insn, this_old_ip, compacted_counts); break; case BRW_OPCODE_IF: case BRW_OPCODE_ELSE: case BRW_OPCODE_ENDIF: case BRW_OPCODE_WHILE: if (intel->gen == 6) { target_old_ip = this_old_ip + insn->bits1.branch_gen6.jump_count; target_compacted_count = compacted_counts[target_old_ip]; insn->bits1.branch_gen6.jump_count -= (target_compacted_count - this_compacted_count); } else { update_uip_jip(insn, this_old_ip, compacted_counts); } break; } if (insn->header.cmpt_control) { offset += 8; } else { offset += 16; } } /* p->nr_insn is counting the number of uncompacted instructions still, so * divide. We do want to be sure there's a valid instruction in any * alignment padding, so that the next compression pass (for the FS 8/16 * compile passes) parses correctly. */ if (p->next_insn_offset & 8) { struct brw_compact_instruction *align = store + offset; memset(align, 0, sizeof(*align)); align->dw0.opcode = BRW_OPCODE_NOP; align->dw0.cmpt_ctrl = 1; p->next_insn_offset += 8; } p->nr_insn = p->next_insn_offset / 16; if (0) { fprintf(stdout, "dumping compacted program\n"); brw_dump_compile(p, stdout, 0, p->next_insn_offset); int cmp = 0; for (offset = 0; offset < p->next_insn_offset;) { struct brw_instruction *insn = store + offset; if (insn->header.cmpt_control) { offset += 8; cmp++; } else { offset += 16; } } fprintf(stderr, "%db/%db saved (%d%%)\n", cmp * 8, offset + cmp * 8, cmp * 8 * 100 / (offset + cmp * 8)); } } intel-gpu-tools-1.14/assembler/README0000644000175000017500000000071412665336131014267 00000000000000intel-gen4asm is a program to compile an assembly language for the Intel 965 Express Chipset. It has been used to construct programs for textured video in the 2d driver. Some examples of gen4 assembly programs are in the doc/examples directory. Note that the language parsed by this assembler is not exactly what the final language is going to look like. In particular, the send instructions need to be cleaned up and made more reasonable to program with. intel-gpu-tools-1.14/assembler/ralloc.h0000644000175000017500000003211512665336131015034 00000000000000/* * Copyright © 2010 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ /** * \file ralloc.h * * ralloc: a recursive memory allocator * * The ralloc memory allocator creates a hierarchy of allocated * objects. Every allocation is in reference to some parent, and * every allocated object can in turn be used as the parent of a * subsequent allocation. This allows for extremely convenient * discarding of an entire tree/sub-tree of allocations by calling * ralloc_free on any particular object to free it and all of its * children. * * The conceptual working of ralloc was directly inspired by Andrew * Tridgell's talloc, but ralloc is an independent implementation * released under the MIT license and tuned for Mesa. * * The talloc implementation is available under the GNU Lesser * General Public License (GNU LGPL), version 3 or later. It is * more sophisticated than ralloc in that it includes reference * counting and debugging features. See: http://talloc.samba.org/ */ #ifndef RALLOC_H #define RALLOC_H #ifdef __cplusplus extern "C" { #endif #include #include #include #include "brw_compat.h" /** * \def ralloc(ctx, type) * Allocate a new object chained off of the given context. * * This is equivalent to: * \code * ((type *) ralloc_size(ctx, sizeof(type)) * \endcode */ #define ralloc(ctx, type) ((type *) ralloc_size(ctx, sizeof(type))) /** * \def rzalloc(ctx, type) * Allocate a new object out of the given context and initialize it to zero. * * This is equivalent to: * \code * ((type *) rzalloc_size(ctx, sizeof(type)) * \endcode */ #define rzalloc(ctx, type) ((type *) rzalloc_size(ctx, sizeof(type))) /** * Allocate a new ralloc context. * * While any ralloc'd pointer can be used as a context, sometimes it is useful * to simply allocate a context with no associated memory. * * It is equivalent to: * \code * ((type *) ralloc_size(ctx, 0) * \endcode */ void *ralloc_context(const void *ctx); /** * Allocate memory chained off of the given context. * * This is the core allocation routine which is used by all others. It * simply allocates storage for \p size bytes and returns the pointer, * similar to \c malloc. */ void *ralloc_size(const void *ctx, size_t size); /** * Allocate zero-initialized memory chained off of the given context. * * This is similar to \c calloc with a size of 1. */ void *rzalloc_size(const void *ctx, size_t size); /** * Resize a piece of ralloc-managed memory, preserving data. * * Similar to \c realloc. Unlike C89, passing 0 for \p size does not free the * memory. Instead, it resizes it to a 0-byte ralloc context, just like * calling ralloc_size(ctx, 0). This is different from talloc. * * \param ctx The context to use for new allocation. If \p ptr != NULL, * it must be the same as ralloc_parent(\p ptr). * \param ptr Pointer to the memory to be resized. May be NULL. * \param size The amount of memory to allocate, in bytes. */ void *reralloc_size(const void *ctx, void *ptr, size_t size); /// \defgroup array Array Allocators @{ /** * \def ralloc_array(ctx, type, count) * Allocate an array of objects chained off the given context. * * Similar to \c calloc, but does not initialize the memory to zero. * * More than a convenience function, this also checks for integer overflow when * multiplying \c sizeof(type) and \p count. This is necessary for security. * * This is equivalent to: * \code * ((type *) ralloc_array_size(ctx, sizeof(type), count) * \endcode */ #define ralloc_array(ctx, type, count) \ ((type *) ralloc_array_size(ctx, sizeof(type), count)) /** * \def rzalloc_array(ctx, type, count) * Allocate a zero-initialized array chained off the given context. * * Similar to \c calloc. * * More than a convenience function, this also checks for integer overflow when * multiplying \c sizeof(type) and \p count. This is necessary for security. * * This is equivalent to: * \code * ((type *) rzalloc_array_size(ctx, sizeof(type), count) * \endcode */ #define rzalloc_array(ctx, type, count) \ ((type *) rzalloc_array_size(ctx, sizeof(type), count)) /** * \def reralloc(ctx, ptr, type, count) * Resize a ralloc-managed array, preserving data. * * Similar to \c realloc. Unlike C89, passing 0 for \p size does not free the * memory. Instead, it resizes it to a 0-byte ralloc context, just like * calling ralloc_size(ctx, 0). This is different from talloc. * * More than a convenience function, this also checks for integer overflow when * multiplying \c sizeof(type) and \p count. This is necessary for security. * * \param ctx The context to use for new allocation. If \p ptr != NULL, * it must be the same as ralloc_parent(\p ptr). * \param ptr Pointer to the array to be resized. May be NULL. * \param type The element type. * \param count The number of elements to allocate. */ #define reralloc(ctx, ptr, type, count) \ ((type *) reralloc_array_size(ctx, ptr, sizeof(type), count)) /** * Allocate memory for an array chained off the given context. * * Similar to \c calloc, but does not initialize the memory to zero. * * More than a convenience function, this also checks for integer overflow when * multiplying \p size and \p count. This is necessary for security. */ void *ralloc_array_size(const void *ctx, size_t size, unsigned count); /** * Allocate a zero-initialized array chained off the given context. * * Similar to \c calloc. * * More than a convenience function, this also checks for integer overflow when * multiplying \p size and \p count. This is necessary for security. */ void *rzalloc_array_size(const void *ctx, size_t size, unsigned count); /** * Resize a ralloc-managed array, preserving data. * * Similar to \c realloc. Unlike C89, passing 0 for \p size does not free the * memory. Instead, it resizes it to a 0-byte ralloc context, just like * calling ralloc_size(ctx, 0). This is different from talloc. * * More than a convenience function, this also checks for integer overflow when * multiplying \c sizeof(type) and \p count. This is necessary for security. * * \param ctx The context to use for new allocation. If \p ptr != NULL, * it must be the same as ralloc_parent(\p ptr). * \param ptr Pointer to the array to be resized. May be NULL. * \param size The size of an individual element. * \param count The number of elements to allocate. * * \return True unless allocation failed. */ void *reralloc_array_size(const void *ctx, void *ptr, size_t size, unsigned count); /// @} /** * Free a piece of ralloc-managed memory. * * This will also free the memory of any children allocated this context. */ void ralloc_free(void *ptr); /** * "Steal" memory from one context, changing it to another. * * This changes \p ptr's context to \p new_ctx. This is quite useful if * memory is allocated out of a temporary context. */ void ralloc_steal(const void *new_ctx, void *ptr); /** * Return the given pointer's ralloc context. */ void *ralloc_parent(const void *ptr); /** * Return a context whose memory will be automatically freed at program exit. * * The first call to this function creates a context and registers a handler * to free it using \c atexit. This may cause trouble if used in a library * loaded with \c dlopen. */ void *ralloc_autofree_context(void); /** * Set a callback to occur just before an object is freed. */ void ralloc_set_destructor(const void *ptr, void(*destructor)(void *)); /// \defgroup array String Functions @{ /** * Duplicate a string, allocating the memory from the given context. */ char *ralloc_strdup(const void *ctx, const char *str); /** * Duplicate a string, allocating the memory from the given context. * * Like \c strndup, at most \p n characters are copied. If \p str is longer * than \p n characters, \p n are copied, and a termining \c '\0' byte is added. */ char *ralloc_strndup(const void *ctx, const char *str, size_t n); /** * Concatenate two strings, allocating the necessary space. * * This appends \p str to \p *dest, similar to \c strcat, using ralloc_resize * to expand \p *dest to the appropriate size. \p dest will be updated to the * new pointer unless allocation fails. * * The result will always be null-terminated. * * \return True unless allocation failed. */ bool ralloc_strcat(char **dest, const char *str); /** * Concatenate two strings, allocating the necessary space. * * This appends at most \p n bytes of \p str to \p *dest, using ralloc_resize * to expand \p *dest to the appropriate size. \p dest will be updated to the * new pointer unless allocation fails. * * The result will always be null-terminated; \p str does not need to be null * terminated if it is longer than \p n. * * \return True unless allocation failed. */ bool ralloc_strncat(char **dest, const char *str, size_t n); /** * Print to a string. * * This is analogous to \c sprintf, but allocates enough space (using \p ctx * as the context) for the resulting string. * * \return The newly allocated string. */ char *ralloc_asprintf (const void *ctx, const char *fmt, ...) PRINTFLIKE(2, 3); /** * Print to a string, given a va_list. * * This is analogous to \c vsprintf, but allocates enough space (using \p ctx * as the context) for the resulting string. * * \return The newly allocated string. */ char *ralloc_vasprintf(const void *ctx, const char *fmt, va_list args); /** * Rewrite the tail of an existing string, starting at a given index. * * Overwrites the contents of *str starting at \p start with newly formatted * text, including a new null-terminator. Allocates more memory as necessary. * * This can be used to append formatted text when the length of the existing * string is already known, saving a strlen() call. * * \sa ralloc_asprintf_append * * \param str The string to be updated. * \param start The index to start appending new data at. * \param fmt A printf-style formatting string * * \p str will be updated to the new pointer unless allocation fails. * \p start will be increased by the length of the newly formatted text. * * \return True unless allocation failed. */ bool ralloc_asprintf_rewrite_tail(char **str, size_t *start, const char *fmt, ...) PRINTFLIKE(3, 4); /** * Rewrite the tail of an existing string, starting at a given index. * * Overwrites the contents of *str starting at \p start with newly formatted * text, including a new null-terminator. Allocates more memory as necessary. * * This can be used to append formatted text when the length of the existing * string is already known, saving a strlen() call. * * \sa ralloc_vasprintf_append * * \param str The string to be updated. * \param start The index to start appending new data at. * \param fmt A printf-style formatting string * \param args A va_list containing the data to be formatted * * \p str will be updated to the new pointer unless allocation fails. * \p start will be increased by the length of the newly formatted text. * * \return True unless allocation failed. */ bool ralloc_vasprintf_rewrite_tail(char **str, size_t *start, const char *fmt, va_list args); /** * Append formatted text to the supplied string. * * This is equivalent to * \code * ralloc_asprintf_rewrite_tail(str, strlen(*str), fmt, ...) * \endcode * * \sa ralloc_asprintf * \sa ralloc_asprintf_rewrite_tail * \sa ralloc_strcat * * \p str will be updated to the new pointer unless allocation fails. * * \return True unless allocation failed. */ bool ralloc_asprintf_append (char **str, const char *fmt, ...) PRINTFLIKE(2, 3); /** * Append formatted text to the supplied string, given a va_list. * * This is equivalent to * \code * ralloc_vasprintf_rewrite_tail(str, strlen(*str), fmt, args) * \endcode * * \sa ralloc_vasprintf * \sa ralloc_vasprintf_rewrite_tail * \sa ralloc_strcat * * \p str will be updated to the new pointer unless allocation fails. * * \return True unless allocation failed. */ bool ralloc_vasprintf_append(char **str, const char *fmt, va_list args); /// @} #ifdef __cplusplus } /* end of extern "C" */ #endif #endif intel-gpu-tools-1.14/assembler/brw_reg.h0000644000175000017500000005104112665336131015206 00000000000000/* Copyright (C) Intel Corp. 2006. All Rights Reserved. Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to develop this 3D driver. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **********************************************************************/ /* * Authors: * Keith Whitwell */ /** @file brw_reg.h * * This file defines struct brw_reg, which is our representation for EU * registers. They're not a hardware specific format, just an abstraction * that intends to capture the full flexibility of the hardware registers. * * The brw_eu_emit.c layer's brw_set_dest/brw_set_src[01] functions encode * the abstract brw_reg type into the actual hardware instruction encoding. */ #ifndef BRW_REG_H #define BRW_REG_H #include #include #include "brw_defines.h" #ifdef __cplusplus extern "C" { #endif /** Number of general purpose registers (VS, WM, etc) */ #define BRW_MAX_GRF 128 /** * First GRF used for the MRF hack. * * On gen7, MRFs are no longer used, and contiguous GRFs are used instead. We * haven't converted our compiler to be aware of this, so it asks for MRFs and * brw_eu_emit.c quietly converts them to be accesses of the top GRFs. The * register allocators have to be careful of this to avoid corrupting the "MRF"s * with actual GRF allocations. */ #define GEN7_MRF_HACK_START 112 /** Number of message register file registers */ #define BRW_MAX_MRF 16 #define BRW_SWIZZLE4(a,b,c,d) (((a)<<0) | ((b)<<2) | ((c)<<4) | ((d)<<6)) #define BRW_GET_SWZ(swz, idx) (((swz) >> ((idx)*2)) & 0x3) #define BRW_SWIZZLE_NOOP BRW_SWIZZLE4(0,1,2,3) #define BRW_SWIZZLE_XYZW BRW_SWIZZLE4(0,1,2,3) #define BRW_SWIZZLE_XXXX BRW_SWIZZLE4(0,0,0,0) #define BRW_SWIZZLE_YYYY BRW_SWIZZLE4(1,1,1,1) #define BRW_SWIZZLE_ZZZZ BRW_SWIZZLE4(2,2,2,2) #define BRW_SWIZZLE_WWWW BRW_SWIZZLE4(3,3,3,3) #define BRW_SWIZZLE_XYXY BRW_SWIZZLE4(0,1,0,1) static inline bool brw_is_single_value_swizzle(int swiz) { return (swiz == BRW_SWIZZLE_XXXX || swiz == BRW_SWIZZLE_YYYY || swiz == BRW_SWIZZLE_ZZZZ || swiz == BRW_SWIZZLE_WWWW); } #define BRW_WRITEMASK_X 0x1 #define BRW_WRITEMASK_Y 0x2 #define BRW_WRITEMASK_Z 0x4 #define BRW_WRITEMASK_W 0x8 #define BRW_WRITEMASK_XY (BRW_WRITEMASK_X | BRW_WRITEMASK_Y) #define BRW_WRITEMASK_XZ (BRW_WRITEMASK_X | BRW_WRITEMASK_Z) #define BRW_WRITEMASK_XW (BRW_WRITEMASK_X | BRW_WRITEMASK_W) #define BRW_WRITEMASK_YW (BRW_WRITEMASK_Y | BRW_WRITEMASK_W) #define BRW_WRITEMASK_ZW (BRW_WRITEMASK_Z | BRW_WRITEMASK_W) #define BRW_WRITEMASK_XYZ (BRW_WRITEMASK_X | BRW_WRITEMASK_Y | BRW_WRITEMASK_Z) #define BRW_WRITEMASK_XYZW (BRW_WRITEMASK_X | BRW_WRITEMASK_Y | \ BRW_WRITEMASK_Z | BRW_WRITEMASK_W) #define REG_SIZE (8*4) /* These aren't hardware structs, just something useful for us to pass around: * * Align1 operation has a lot of control over input ranges. Used in * WM programs to implement shaders decomposed into "channel serial" * or "structure of array" form: */ struct brw_reg { unsigned type:4; unsigned file:2; unsigned nr:8; unsigned subnr:5; /* :1 in align16 */ unsigned negate:1; /* source only */ unsigned abs:1; /* source only */ unsigned vstride:4; /* source only */ unsigned width:3; /* src only, align1 only */ unsigned hstride:2; /* align1 only */ unsigned address_mode:1; /* relative addressing, hopefully! */ unsigned pad0:1; union { struct { unsigned swizzle:8; /* src only, align16 only */ unsigned writemask:4; /* dest only, align16 only */ int indirect_offset:10; /* relative addressing offset */ unsigned pad1:10; /* two dwords total */ } bits; float f; int d; unsigned ud; } dw1; }; struct brw_indirect { unsigned addr_subnr:4; int addr_offset:10; unsigned pad:18; }; static inline int type_sz(unsigned type) { switch(type) { case BRW_REGISTER_TYPE_UD: case BRW_REGISTER_TYPE_D: case BRW_REGISTER_TYPE_F: return 4; case BRW_REGISTER_TYPE_HF: case BRW_REGISTER_TYPE_UW: case BRW_REGISTER_TYPE_W: return 2; case BRW_REGISTER_TYPE_UB: case BRW_REGISTER_TYPE_B: return 1; default: return 0; } } /** * Construct a brw_reg. * \param file one of the BRW_x_REGISTER_FILE values * \param nr register number/index * \param subnr register sub number * \param type one of BRW_REGISTER_TYPE_x * \param vstride one of BRW_VERTICAL_STRIDE_x * \param width one of BRW_WIDTH_x * \param hstride one of BRW_HORIZONTAL_STRIDE_x * \param swizzle one of BRW_SWIZZLE_x * \param writemask BRW_WRITEMASK_X/Y/Z/W bitfield */ static inline struct brw_reg brw_reg(unsigned file, unsigned nr, unsigned subnr, unsigned type, unsigned vstride, unsigned width, unsigned hstride, unsigned swizzle, unsigned writemask) { struct brw_reg reg; if (file == BRW_GENERAL_REGISTER_FILE) assert(nr < BRW_MAX_GRF); else if (file == BRW_MESSAGE_REGISTER_FILE) assert((nr & ~(1 << 7)) < BRW_MAX_MRF); else if (file == BRW_ARCHITECTURE_REGISTER_FILE) assert(nr <= BRW_ARF_TIMESTAMP); reg.type = type; reg.file = file; reg.nr = nr; reg.subnr = subnr * type_sz(type); reg.negate = 0; reg.abs = 0; reg.vstride = vstride; reg.width = width; reg.hstride = hstride; reg.address_mode = BRW_ADDRESS_DIRECT; reg.pad0 = 0; /* Could do better: If the reg is r5.3<0;1,0>, we probably want to * set swizzle and writemask to W, as the lower bits of subnr will * be lost when converted to align16. This is probably too much to * keep track of as you'd want it adjusted by suboffset(), etc. * Perhaps fix up when converting to align16? */ reg.dw1.bits.swizzle = swizzle; reg.dw1.bits.writemask = writemask; reg.dw1.bits.indirect_offset = 0; reg.dw1.bits.pad1 = 0; return reg; } /** Construct float[16] register */ static inline struct brw_reg brw_vec16_reg(unsigned file, unsigned nr, unsigned subnr) { return brw_reg(file, nr, subnr, BRW_REGISTER_TYPE_F, BRW_VERTICAL_STRIDE_16, BRW_WIDTH_16, BRW_HORIZONTAL_STRIDE_1, BRW_SWIZZLE_XYZW, BRW_WRITEMASK_XYZW); } /** Construct float[8] register */ static inline struct brw_reg brw_vec8_reg(unsigned file, unsigned nr, unsigned subnr) { return brw_reg(file, nr, subnr, BRW_REGISTER_TYPE_F, BRW_VERTICAL_STRIDE_8, BRW_WIDTH_8, BRW_HORIZONTAL_STRIDE_1, BRW_SWIZZLE_XYZW, BRW_WRITEMASK_XYZW); } /** Construct float[4] register */ static inline struct brw_reg brw_vec4_reg(unsigned file, unsigned nr, unsigned subnr) { return brw_reg(file, nr, subnr, BRW_REGISTER_TYPE_F, BRW_VERTICAL_STRIDE_4, BRW_WIDTH_4, BRW_HORIZONTAL_STRIDE_1, BRW_SWIZZLE_XYZW, BRW_WRITEMASK_XYZW); } /** Construct float[2] register */ static inline struct brw_reg brw_vec2_reg(unsigned file, unsigned nr, unsigned subnr) { return brw_reg(file, nr, subnr, BRW_REGISTER_TYPE_F, BRW_VERTICAL_STRIDE_2, BRW_WIDTH_2, BRW_HORIZONTAL_STRIDE_1, BRW_SWIZZLE_XYXY, BRW_WRITEMASK_XY); } /** Construct float[1] register */ static inline struct brw_reg brw_vec1_reg(unsigned file, unsigned nr, unsigned subnr) { return brw_reg(file, nr, subnr, BRW_REGISTER_TYPE_F, BRW_VERTICAL_STRIDE_0, BRW_WIDTH_1, BRW_HORIZONTAL_STRIDE_0, BRW_SWIZZLE_XXXX, BRW_WRITEMASK_X); } static inline struct brw_reg retype(struct brw_reg reg, unsigned type) { reg.type = type; return reg; } static inline struct brw_reg sechalf(struct brw_reg reg) { if (reg.vstride) reg.nr++; return reg; } static inline struct brw_reg suboffset(struct brw_reg reg, unsigned delta) { reg.subnr += delta * type_sz(reg.type); return reg; } static inline struct brw_reg offset(struct brw_reg reg, unsigned delta) { reg.nr += delta; return reg; } static inline struct brw_reg byte_offset(struct brw_reg reg, unsigned bytes) { unsigned newoffset = reg.nr * REG_SIZE + reg.subnr + bytes; reg.nr = newoffset / REG_SIZE; reg.subnr = newoffset % REG_SIZE; return reg; } /** Construct unsigned word[16] register */ static inline struct brw_reg brw_uw16_reg(unsigned file, unsigned nr, unsigned subnr) { return suboffset(retype(brw_vec16_reg(file, nr, 0), BRW_REGISTER_TYPE_UW), subnr); } /** Construct unsigned word[8] register */ static inline struct brw_reg brw_uw8_reg(unsigned file, unsigned nr, unsigned subnr) { return suboffset(retype(brw_vec8_reg(file, nr, 0), BRW_REGISTER_TYPE_UW), subnr); } /** Construct unsigned word[1] register */ static inline struct brw_reg brw_uw1_reg(unsigned file, unsigned nr, unsigned subnr) { return suboffset(retype(brw_vec1_reg(file, nr, 0), BRW_REGISTER_TYPE_UW), subnr); } static inline struct brw_reg brw_imm_reg(unsigned type) { return brw_reg(BRW_IMMEDIATE_VALUE, 0, 0, type, BRW_VERTICAL_STRIDE_0, BRW_WIDTH_1, BRW_HORIZONTAL_STRIDE_0, 0, 0); } /** Construct float immediate register */ static inline struct brw_reg brw_imm_f(float f) { struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_F); imm.dw1.f = f; return imm; } /** Construct integer immediate register */ static inline struct brw_reg brw_imm_d(int d) { struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_D); imm.dw1.d = d; return imm; } /** Construct uint immediate register */ static inline struct brw_reg brw_imm_ud(unsigned ud) { struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_UD); imm.dw1.ud = ud; return imm; } /** Construct ushort immediate register */ static inline struct brw_reg brw_imm_uw(uint16_t uw) { struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_UW); imm.dw1.ud = uw | (uw << 16); return imm; } /** Construct short immediate register */ static inline struct brw_reg brw_imm_w(int16_t w) { struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_W); imm.dw1.d = w | (w << 16); return imm; } /* brw_imm_b and brw_imm_ub aren't supported by hardware - the type * numbers alias with _V and _VF below: */ /** Construct vector of eight signed half-byte values */ static inline struct brw_reg brw_imm_v(unsigned v) { struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_V); imm.vstride = BRW_VERTICAL_STRIDE_0; imm.width = BRW_WIDTH_8; imm.hstride = BRW_HORIZONTAL_STRIDE_1; imm.dw1.ud = v; return imm; } /** Construct vector of four 8-bit float values */ static inline struct brw_reg brw_imm_vf(unsigned v) { struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF); imm.vstride = BRW_VERTICAL_STRIDE_0; imm.width = BRW_WIDTH_4; imm.hstride = BRW_HORIZONTAL_STRIDE_1; imm.dw1.ud = v; return imm; } #define VF_ZERO 0x0 #define VF_ONE 0x30 #define VF_NEG (1<<7) static inline struct brw_reg brw_imm_vf4(unsigned v0, unsigned v1, unsigned v2, unsigned v3) { struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF); imm.vstride = BRW_VERTICAL_STRIDE_0; imm.width = BRW_WIDTH_4; imm.hstride = BRW_HORIZONTAL_STRIDE_1; imm.dw1.ud = ((v0 << 0) | (v1 << 8) | (v2 << 16) | (v3 << 24)); return imm; } static inline struct brw_reg brw_address(struct brw_reg reg) { return brw_imm_uw(reg.nr * REG_SIZE + reg.subnr); } /** Construct float[1] general-purpose register */ static inline struct brw_reg brw_vec1_grf(unsigned nr, unsigned subnr) { return brw_vec1_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); } /** Construct float[2] general-purpose register */ static inline struct brw_reg brw_vec2_grf(unsigned nr, unsigned subnr) { return brw_vec2_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); } /** Construct float[4] general-purpose register */ static inline struct brw_reg brw_vec4_grf(unsigned nr, unsigned subnr) { return brw_vec4_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); } /** Construct float[8] general-purpose register */ static inline struct brw_reg brw_vec8_grf(unsigned nr, unsigned subnr) { return brw_vec8_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); } static inline struct brw_reg brw_uw8_grf(unsigned nr, unsigned subnr) { return brw_uw8_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); } static inline struct brw_reg brw_uw16_grf(unsigned nr, unsigned subnr) { return brw_uw16_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); } /** Construct null register (usually used for setting condition codes) */ static inline struct brw_reg brw_null_reg(void) { return brw_vec8_reg(BRW_ARCHITECTURE_REGISTER_FILE, BRW_ARF_NULL, 0); } static inline struct brw_reg brw_address_reg(unsigned subnr) { return brw_uw1_reg(BRW_ARCHITECTURE_REGISTER_FILE, BRW_ARF_ADDRESS, subnr); } /* If/else instructions break in align16 mode if writemask & swizzle * aren't xyzw. This goes against the convention for other scalar * regs: */ static inline struct brw_reg brw_ip_reg(void) { return brw_reg(BRW_ARCHITECTURE_REGISTER_FILE, BRW_ARF_IP, 0, BRW_REGISTER_TYPE_UD, BRW_VERTICAL_STRIDE_4, /* ? */ BRW_WIDTH_1, BRW_HORIZONTAL_STRIDE_0, BRW_SWIZZLE_XYZW, /* NOTE! */ BRW_WRITEMASK_XYZW); /* NOTE! */ } static inline struct brw_reg brw_acc_reg(void) { return brw_vec8_reg(BRW_ARCHITECTURE_REGISTER_FILE, BRW_ARF_ACCUMULATOR, 0); } static inline struct brw_reg brw_notification_1_reg(void) { return brw_reg(BRW_ARCHITECTURE_REGISTER_FILE, BRW_ARF_NOTIFICATION_COUNT, 1, BRW_REGISTER_TYPE_UD, BRW_VERTICAL_STRIDE_0, BRW_WIDTH_1, BRW_HORIZONTAL_STRIDE_0, BRW_SWIZZLE_XXXX, BRW_WRITEMASK_X); } static inline struct brw_reg brw_flag_reg(int reg, int subreg) { return brw_uw1_reg(BRW_ARCHITECTURE_REGISTER_FILE, BRW_ARF_FLAG + reg, subreg); } static inline struct brw_reg brw_mask_reg(unsigned subnr) { return brw_uw1_reg(BRW_ARCHITECTURE_REGISTER_FILE, BRW_ARF_MASK, subnr); } static inline struct brw_reg brw_message_reg(unsigned nr) { assert((nr & ~(1 << 7)) < BRW_MAX_MRF); return brw_vec8_reg(BRW_MESSAGE_REGISTER_FILE, nr, 0); } /* This is almost always called with a numeric constant argument, so * make things easy to evaluate at compile time: */ static inline unsigned cvt(unsigned val) { switch (val) { case 0: return 0; case 1: return 1; case 2: return 2; case 4: return 3; case 8: return 4; case 16: return 5; case 32: return 6; } return 0; } static inline struct brw_reg stride(struct brw_reg reg, unsigned vstride, unsigned width, unsigned hstride) { reg.vstride = cvt(vstride); reg.width = cvt(width) - 1; reg.hstride = cvt(hstride); return reg; } static inline struct brw_reg vec16(struct brw_reg reg) { return stride(reg, 16,16,1); } static inline struct brw_reg vec8(struct brw_reg reg) { return stride(reg, 8,8,1); } static inline struct brw_reg vec4(struct brw_reg reg) { return stride(reg, 4,4,1); } static inline struct brw_reg vec2(struct brw_reg reg) { return stride(reg, 2,2,1); } static inline struct brw_reg vec1(struct brw_reg reg) { return stride(reg, 0,1,0); } static inline struct brw_reg get_element(struct brw_reg reg, unsigned elt) { return vec1(suboffset(reg, elt)); } static inline struct brw_reg get_element_ud(struct brw_reg reg, unsigned elt) { return vec1(suboffset(retype(reg, BRW_REGISTER_TYPE_UD), elt)); } static inline struct brw_reg get_element_d(struct brw_reg reg, unsigned elt) { return vec1(suboffset(retype(reg, BRW_REGISTER_TYPE_D), elt)); } static inline struct brw_reg brw_swizzle(struct brw_reg reg, unsigned x, unsigned y, unsigned z, unsigned w) { assert(reg.file != BRW_IMMEDIATE_VALUE); reg.dw1.bits.swizzle = BRW_SWIZZLE4(BRW_GET_SWZ(reg.dw1.bits.swizzle, x), BRW_GET_SWZ(reg.dw1.bits.swizzle, y), BRW_GET_SWZ(reg.dw1.bits.swizzle, z), BRW_GET_SWZ(reg.dw1.bits.swizzle, w)); return reg; } static inline struct brw_reg brw_swizzle1(struct brw_reg reg, unsigned x) { return brw_swizzle(reg, x, x, x, x); } static inline struct brw_reg brw_writemask(struct brw_reg reg, unsigned mask) { assert(reg.file != BRW_IMMEDIATE_VALUE); reg.dw1.bits.writemask &= mask; return reg; } static inline struct brw_reg brw_set_writemask(struct brw_reg reg, unsigned mask) { assert(reg.file != BRW_IMMEDIATE_VALUE); reg.dw1.bits.writemask = mask; return reg; } static inline struct brw_reg negate(struct brw_reg reg) { reg.negate ^= 1; return reg; } static inline struct brw_reg brw_abs(struct brw_reg reg) { reg.abs = 1; reg.negate = 0; return reg; } /************************************************************************/ static inline struct brw_reg brw_vec4_indirect(unsigned subnr, int offset) { struct brw_reg reg = brw_vec4_grf(0, 0); reg.subnr = subnr; reg.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; reg.dw1.bits.indirect_offset = offset; return reg; } static inline struct brw_reg brw_vec1_indirect(unsigned subnr, int offset) { struct brw_reg reg = brw_vec1_grf(0, 0); reg.subnr = subnr; reg.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; reg.dw1.bits.indirect_offset = offset; return reg; } static inline struct brw_reg deref_4f(struct brw_indirect ptr, int offset) { return brw_vec4_indirect(ptr.addr_subnr, ptr.addr_offset + offset); } static inline struct brw_reg deref_1f(struct brw_indirect ptr, int offset) { return brw_vec1_indirect(ptr.addr_subnr, ptr.addr_offset + offset); } static inline struct brw_reg deref_4b(struct brw_indirect ptr, int offset) { return retype(deref_4f(ptr, offset), BRW_REGISTER_TYPE_B); } static inline struct brw_reg deref_1uw(struct brw_indirect ptr, int offset) { return retype(deref_1f(ptr, offset), BRW_REGISTER_TYPE_UW); } static inline struct brw_reg deref_1d(struct brw_indirect ptr, int offset) { return retype(deref_1f(ptr, offset), BRW_REGISTER_TYPE_D); } static inline struct brw_reg deref_1ud(struct brw_indirect ptr, int offset) { return retype(deref_1f(ptr, offset), BRW_REGISTER_TYPE_UD); } static inline struct brw_reg get_addr_reg(struct brw_indirect ptr) { return brw_address_reg(ptr.addr_subnr); } static inline struct brw_indirect brw_indirect_offset(struct brw_indirect ptr, int offset) { ptr.addr_offset += offset; return ptr; } static inline struct brw_indirect brw_indirect(unsigned addr_subnr, int offset) { struct brw_indirect ptr; ptr.addr_subnr = addr_subnr; ptr.addr_offset = offset; ptr.pad = 0; return ptr; } /** Do two brw_regs refer to the same register? */ static inline bool brw_same_reg(struct brw_reg r1, struct brw_reg r2) { return r1.file == r2.file && r1.nr == r2.nr; } void brw_print_reg(struct brw_reg reg); #ifdef __cplusplus } #endif #endif intel-gpu-tools-1.14/assembler/brw_eu_util.c0000644000175000017500000000620012665336131016067 00000000000000/* Copyright (C) Intel Corp. 2006. All Rights Reserved. Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to develop this 3D driver. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **********************************************************************/ /* * Authors: * Keith Whitwell */ #include "brw_context.h" #include "brw_defines.h" #include "brw_eu.h" void brw_math_invert( struct brw_compile *p, struct brw_reg dst, struct brw_reg src) { brw_math( p, dst, BRW_MATH_FUNCTION_INV, 0, src, BRW_MATH_PRECISION_FULL, BRW_MATH_DATA_VECTOR ); } void brw_copy4(struct brw_compile *p, struct brw_reg dst, struct brw_reg src, unsigned count) { unsigned i; dst = vec4(dst); src = vec4(src); for (i = 0; i < count; i++) { unsigned delta = i*32; brw_MOV(p, byte_offset(dst, delta), byte_offset(src, delta)); brw_MOV(p, byte_offset(dst, delta+16), byte_offset(src, delta+16)); } } void brw_copy8(struct brw_compile *p, struct brw_reg dst, struct brw_reg src, unsigned count) { unsigned i; dst = vec8(dst); src = vec8(src); for (i = 0; i < count; i++) { unsigned delta = i*32; brw_MOV(p, byte_offset(dst, delta), byte_offset(src, delta)); } } void brw_copy_indirect_to_indirect(struct brw_compile *p, struct brw_indirect dst_ptr, struct brw_indirect src_ptr, unsigned count) { unsigned i; for (i = 0; i < count; i++) { unsigned delta = i*32; brw_MOV(p, deref_4f(dst_ptr, delta), deref_4f(src_ptr, delta)); brw_MOV(p, deref_4f(dst_ptr, delta+16), deref_4f(src_ptr, delta+16)); } } void brw_copy_from_indirect(struct brw_compile *p, struct brw_reg dst, struct brw_indirect ptr, unsigned count) { unsigned i; dst = vec4(dst); for (i = 0; i < count; i++) { unsigned delta = i*32; brw_MOV(p, byte_offset(dst, delta), deref_4f(ptr, delta)); brw_MOV(p, byte_offset(dst, delta+16), deref_4f(ptr, delta+16)); } } intel-gpu-tools-1.14/assembler/gen4asm.h0000644000175000017500000001357512665336131015127 00000000000000/* -*- c-basic-offset: 8 -*- */ /* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Eric Anholt * */ #ifndef __GEN4ASM_H__ #define __GEN4ASM_H__ #include #include #include #include "brw_reg.h" #include "brw_defines.h" #include "brw_structs.h" #include "gen8_instruction.h" extern long int gen_level; extern int advanced_flag; extern int errors; #define WARN_ALWAYS (1 << 0) #define WARN_ALL (1 << 31) extern unsigned int warning_flags; extern char *input_filename; extern struct brw_context genasm_context; extern struct brw_compile genasm_compile; /* Predicate for Gen X and above */ #define IS_GENp(x) (gen_level >= (x)*10) /* Predicate for Gen X exactly */ #define IS_GENx(x) (gen_level >= (x)*10 && gen_level < ((x)+1)*10) /* Predicate to match Haswell processors */ #define IS_HASWELL(x) (gen_level == 75) void yyerror (char *msg); #define STRUCT_SIZE_ASSERT(TYPE, SIZE) \ typedef struct { \ char compile_time_assert_ ## TYPE ## _size[ \ (sizeof (struct TYPE) == (SIZE)) ? 1 : -1]; \ } _ ## TYPE ## SizeCheck /* ensure nobody changes the size of struct brw_instruction */ STRUCT_SIZE_ASSERT(brw_instruction, 16); #define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0])) struct condition { int cond; int flag_reg_nr; int flag_subreg_nr; }; struct predicate { unsigned pred_control:4; unsigned pred_inverse:1; unsigned flag_reg_nr:1; unsigned flag_subreg_nr:1; }; struct options { unsigned access_mode:1; unsigned compression_control:2; /* gen6: quater control */ unsigned thread_control:2; unsigned dependency_control:2; unsigned mask_control:1; unsigned debug_control:1; unsigned acc_wr_control:1; unsigned end_of_thread:1; }; struct region { int vert_stride, width, horiz_stride; int is_default; }; struct regtype { int type; int is_default; }; /** * This structure is the internal representation of source operands in the * parser. */ struct src_operand { struct brw_reg reg; int default_region; uint32_t imm32; /* set if src_operand is expressing a branch offset */ char *reloc_target; /* bspec: branching instructions JIP and UIP are source operands */ } src_operand; typedef struct { enum { imm32_d, imm32_f } r; union { uint32_t d; float f; int32_t signed_d; } u; } imm32_t; enum assembler_instruction_type { GEN4ASM_INSTRUCTION_GEN, GEN4ASM_INSTRUCTION_GEN_RELOCATABLE, GEN4ASM_INSTRUCTION_GEN8, GEN4ASM_INSTRUCTION_GEN8_RELOCATABLE, GEN4ASM_INSTRUCTION_LABEL, }; struct label_instruction { char *name; }; struct relocation { char *first_reloc_target, *second_reloc_target; // JIP and UIP respectively int first_reloc_offset, second_reloc_offset; // in number of instructions }; /** * This structure is just the list container for instructions accumulated by * the parser and labels. */ struct brw_program_instruction { enum assembler_instruction_type type; unsigned inst_offset; union { struct brw_instruction gen; struct gen8_instruction gen8; struct label_instruction label; } insn; struct relocation reloc; struct brw_program_instruction *next; }; static inline bool is_label(struct brw_program_instruction *instruction) { return instruction->type == GEN4ASM_INSTRUCTION_LABEL; } static inline char *label_name(struct brw_program_instruction *i) { assert(is_label(i)); return i->insn.label.name; } static inline bool is_relocatable(struct brw_program_instruction *intruction) { return intruction->type == GEN4ASM_INSTRUCTION_GEN_RELOCATABLE; } /** * This structure is a list of instructions. It is the final output of the * parser. */ struct brw_program { struct brw_program_instruction *first; struct brw_program_instruction *last; }; extern struct brw_program compiled_program; #define TYPE_B_INDEX 0 #define TYPE_UB_INDEX 1 #define TYPE_W_INDEX 2 #define TYPE_UW_INDEX 3 #define TYPE_D_INDEX 4 #define TYPE_UD_INDEX 5 #define TYPE_F_INDEX 6 #define TOTAL_TYPES 7 struct program_defaults { int execute_size; int execute_type[TOTAL_TYPES]; int register_type; int register_type_regfile; struct region source_region; struct region source_region_type[TOTAL_TYPES]; struct region dest_region; struct region dest_region_type[TOTAL_TYPES]; }; extern struct program_defaults program_defaults; struct declared_register { char *name; struct brw_reg reg; int element_size; struct region src_region; int dst_region; }; struct declared_register *find_register(char *name); void insert_register(struct declared_register *reg); int yyparse(void); int yylex(void); int yylex_destroy(void); char * lex_text(void); #endif /* __GEN4ASM_H__ */ intel-gpu-tools-1.14/assembler/gen8_instruction.h0000644000175000017500000002317012665336131017063 00000000000000/* * Copyright © 2012 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ /** @file gen8_instruction.h * * A representation of a Gen8+ EU instruction, with helper methods to get * and set various fields. This is the actual hardware format. */ #ifndef GEN8_INSTRUCTION_H #define GEN8_INSTRUCTION_H #include #include #include "brw_compat.h" #include "brw_reg.h" struct gen8_instruction { uint32_t data[4]; }; static inline unsigned gen8_bits(struct gen8_instruction *insn, unsigned high, unsigned low); static inline void gen8_set_bits(struct gen8_instruction *insn, unsigned high, unsigned low, unsigned value); #define F(name, high, low) \ static inline void gen8_set_##name(struct gen8_instruction *insn, unsigned v) \ { \ gen8_set_bits(insn, high, low, v); \ } \ static inline unsigned gen8_##name(struct gen8_instruction *insn) \ { \ return gen8_bits(insn, high, low); \ } /** * Direct addressing only: * @{ */ F(src1_da_reg_nr, 108, 101); F(src0_da_reg_nr, 76, 69); F(dst_da1_hstride, 62, 61); F(dst_da_reg_nr, 60, 53); F(dst_da16_subreg_nr, 52, 52); F(dst_da1_subreg_nr, 52, 48); F(da16_writemask, 51, 48); /* Dst.ChanEn */ /** @} */ F(src1_vert_stride, 120, 117) F(src1_da1_width, 116, 114) F(src1_da16_swiz_w, 115, 114) F(src1_da16_swiz_z, 113, 112) F(src1_da1_hstride, 113, 112) F(src1_address_mode, 111, 111) /** Src1.SrcMod @{ */ F(src1_negate, 110, 110) F(src1_abs, 109, 109) /** @} */ F(src1_da16_subreg_nr, 100, 100) F(src1_da1_subreg_nr, 100, 96) F(src1_da16_swiz_y, 99, 98) F(src1_da16_swiz_x, 97, 96) F(src1_reg_type, 94, 91) F(src1_reg_file, 90, 89) F(src0_vert_stride, 88, 85) F(src0_da1_width, 84, 82) F(src0_da16_swiz_w, 83, 82) F(src0_da16_swiz_z, 81, 80) F(src0_da1_hstride, 81, 80) F(src0_address_mode, 79, 79) /** Src0.SrcMod @{ */ F(src0_negate, 78, 78) F(src0_abs, 77, 77) /** @} */ F(src0_da16_subreg_nr, 68, 68) F(src0_da1_subreg_nr, 68, 64) F(src0_da16_swiz_y, 67, 66) F(src0_da16_swiz_x, 65, 64) F(dst_address_mode, 63, 63) F(src0_reg_type, 46, 43) F(src0_reg_file, 42, 41) F(dst_reg_type, 40, 37) F(dst_reg_file, 36, 35) F(mask_control, 34, 34) F(flag_reg_nr, 33, 33) F(flag_subreg_nr, 32, 32) F(saturate, 31, 31) F(branch_control, 30, 30) F(debug_control, 30, 30) F(cmpt_control, 29, 29) F(acc_wr_control, 28, 28) F(cond_modifier, 27, 24) F(exec_size, 23, 21) F(pred_inv, 20, 20) F(pred_control, 19, 16) F(thread_control, 15, 14) F(qtr_control, 13, 12) F(nib_control, 11, 11) F(dep_control, 10, 9) F(access_mode, 8, 8) /* Bit 7 is Reserve d (for future Opcode expansion) */ F(opcode, 6, 0) /** * Three-source instructions: * @{ */ F(src2_3src_reg_nr, 125, 118) F(src2_3src_subreg_nr, 117, 115) F(src2_3src_swizzle, 114, 107) F(src2_3src_rep_ctrl, 106, 106) F(src1_3src_reg_nr, 104, 97) F(src1_3src_subreg_hi, 96, 96) F(src1_3src_subreg_lo, 95, 94) F(src1_3src_swizzle, 93, 86) F(src1_3src_rep_ctrl, 85, 85) F(src0_3src_reg_nr, 83, 76) F(src0_3src_subreg_nr, 75, 73) F(src0_3src_swizzle, 72, 65) F(src0_3src_rep_ctrl, 64, 64) F(dst_3src_reg_nr, 63, 56) F(dst_3src_subreg_nr, 55, 53) F(dst_3src_writemask, 52, 49) F(dst_3src_type, 48, 46) F(src_3src_type, 45, 43) F(src2_3src_negate, 42, 42) F(src2_3src_abs, 41, 41) F(src1_3src_negate, 40, 40) F(src1_3src_abs, 39, 39) F(src0_3src_negate, 38, 38) F(src0_3src_abs, 37, 37) /** @} */ /** * Fields for SEND messages: * @{ */ F(eot, 127, 127) F(mlen, 124, 121) F(rlen, 120, 116) F(header_present, 115, 115) F(function_control, 114, 96) F(sfid, 27, 24) F(math_function, 27, 24) /** @} */ /** * URB message function control bits: * @{ */ F(urb_per_slot_offset, 113, 113) F(urb_interleave, 111, 111) F(urb_global_offset, 110, 100) F(urb_opcode, 99, 96) /** @} */ /** * Sampler message function control bits: * @{ */ F(sampler_simd_mode, 114, 113) F(sampler_msg_type, 112, 108) F(sampler, 107, 104) F(binding_table_index, 103, 96) /** @} */ /** * Data port message function control bits: * @ { */ F(dp_category, 114, 114) F(dp_message_type, 113, 110) F(dp_message_control, 109, 104) F(dp_binding_table_index, 103, 96) /** @} */ /** * Thread Spawn message function control bits: * @ { */ F(ts_resource_select, 100, 100) F(ts_request_type, 97, 97) F(ts_opcode, 96, 96) /** @} */ /** * Video Motion Estimation message function control bits: * @ { */ F(vme_message_type, 110, 109) F(vme_binding_table_index, 103, 96) /** @} */ /** * Check & Refinement Engine message function control bits: * @ { */ F(cre_message_type, 110, 109) F(cre_binding_table_index, 103, 96) /** @} */ /* Addr Mode */ F(dst_addr_mode, 63, 63) F(src0_addr_mode, 79, 79) F(src1_addr_mode, 111, 111) /* Indirect access mode for Align1. */ F(dst_ida1_sub_nr, 60, 57) F(src0_ida1_sub_nr, 76, 73) F(src1_ida1_sub_nr, 108, 105) /* Imm[8:0] of Immediate addr offset under Indirect mode */ F(dst_ida1_imm8, 56, 48) F(src0_ida1_imm8, 72, 64) F(src1_ida1_imm8, 104, 96) /* Imm Bit9 of Immediate addr offset under Indirect mode */ F(dst_ida1_imm9, 47, 47) F(src0_ida1_imm9, 95, 95) F(src1_ida1_imm9, 121, 121) #undef F #define IMM8_MASK 0x1FF #define IMM9_MASK 0x200 /** * Flow control instruction bits: * @{ */ static inline unsigned gen8_uip(struct gen8_instruction *insn) { return insn->data[2]; } static inline void gen8_set_uip(struct gen8_instruction *insn, unsigned uip) { insn->data[2] = uip; } static inline unsigned gen8_jip(struct gen8_instruction *insn) { return insn->data[3]; } static inline void gen8_set_jip(struct gen8_instruction *insn, unsigned jip) { insn->data[3] = jip; } /** @} */ static inline int gen8_src1_imm_d(struct gen8_instruction *insn) { return insn->data[3]; } static inline unsigned gen8_src1_imm_ud(struct gen8_instruction *insn) { return insn->data[3]; } static inline float gen8_src1_imm_f(struct gen8_instruction *insn) { fi_type ft; ft.u = insn->data[3]; return ft.f; } void gen8_set_dst(struct gen8_instruction *insn, struct brw_reg reg); void gen8_set_src0(struct gen8_instruction *insn, struct brw_reg reg); void gen8_set_src1(struct gen8_instruction *insn, struct brw_reg reg); void gen8_set_urb_message(struct gen8_instruction *insn, unsigned opcode, unsigned mlen, unsigned rlen, bool eot, unsigned offset, bool interleave); void gen8_set_sampler_message(struct gen8_instruction *insn, unsigned binding_table_index, unsigned sampler, unsigned msg_type, unsigned rlen, unsigned mlen, bool header_present, unsigned simd_mode); void gen8_set_dp_message(struct gen8_instruction *insn, enum brw_message_target sfid, unsigned binding_table_index, unsigned msg_type, unsigned msg_control, unsigned msg_length, unsigned response_length, bool header_present, bool end_of_thread); /** Disassemble the instruction. */ int gen8_disassemble(FILE *file, struct gen8_instruction *insn, int gen); /** * Fetch a set of contiguous bits from the instruction. * * Bits indexes range from 0..127; fields may not cross 32-bit boundaries. */ static inline unsigned gen8_bits(struct gen8_instruction *insn, unsigned high, unsigned low) { /* We assume the field doesn't cross 32-bit boundaries. */ const unsigned word = high / 32; assert(word == low / 32); high %= 32; low %= 32; const unsigned mask = (((1 << (high - low + 1)) - 1) << low); return (insn->data[word] & mask) >> low; } /** * Set bits in the instruction, with proper shifting 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Each * subspan is a 2x2 rectangle, and the screen x/y of the upper left of each * subspan are given in GRF register 1.2 through 1.5 (which, with the word * addressing below, are 1.4 through 1.11). * * The result is WM_X*_R and WM_Y*R being: * * X0: {ss0.x, ss0.x+1, ss0.x, ss0.x+1, ss1.x, ss1.x+1, ss1.x, ss1.x+y} * Y0: {ss0.y, ss0.y, ss0.y+1, ss0.y+1, ss1.y, ss1.y, ss1.y+1, ss1.y+1} * X1: {ss2.x, ss2.x+1, ss2.x, ss2.x+1, ss3.x, ss3.x+1, ss3.x, ss3.x+y} * Y1: {ss2.y, ss2.y, ss2.y+1, ss2.y+1, ss3.y, ss3.y, ss3.y+1, ss3.y+1} */ /* Set up ss0.x coordinates*/ mov (1) g4<1>F g1.8<0,1,0>UW { align1 }; add (1) g4.4<1>F g1.8<0,1,0>UW 1UB { align1 }; mov (1) g4.8<1>F g1.8<0,1,0>UW { align1 }; add (1) g4.12<1>F g1.8<0,1,0>UW 1UB { align1 }; /* Set up ss0.y coordinates */ mov (1) g6<1>F g1.10<0,1,0>UW { align1 }; mov (1) g6.4<1>F g1.10<0,1,0>UW { align1 }; add (1) g6.8<1>F g1.10<0,1,0>UW 1UB { align1 }; add (1) g6.12<1>F g1.10<0,1,0>UW 1UB { align1 }; /* set up ss1.x coordinates */ mov (1) g4.16<1>F g1.12<0,1,0>UW { align1 }; add (1) g4.20<1>F g1.12<0,1,0>UW 1UB { align1 }; mov (1) g4.24<1>F g1.12<0,1,0>UW { align1 }; add (1) g4.28<1>F g1.12<0,1,0>UW 1UB { align1 }; /* set up ss1.y coordinates */ mov (1) g6.16<1>F g1.14<0,1,0>UW { align1 }; mov (1) g6.20<1>F g1.14<0,1,0>UW { align1 }; add (1) g6.24<1>F g1.14<0,1,0>UW 1UB { align1 }; add (1) g6.28<1>F g1.14<0,1,0>UW 1UB { align1 }; /* Set up ss2.x coordinates */ mov (1) g5<1>F g1.16<0,1,0>UW { align1 }; add (1) g5.4<1>F g1.16<0,1,0>UW 1UB { align1 }; mov (1) g5.8<1>F g1.16<0,1,0>UW { align1 }; add (1) g5.12<1>F g1.16<0,1,0>UW 1UB { align1 }; /* Set up ss2.y coordinates */ mov (1) g7<1>F g1.18<0,1,0>UW { align1 }; mov (1) g7.4<1>F g1.18<0,1,0>UW { align1 }; add (1) g7.8<1>F g1.18<0,1,0>UW 1UB { align1 }; add (1) g7.12<1>F g1.18<0,1,0>UW 1UB { align1 }; /* Set up ss3.x coordinates */ mov (1) g5.16<1>F g1.20<0,1,0>UW { align1 }; add (1) g5.20<1>F g1.20<0,1,0>UW 1UB { align1 }; mov (1) g5.24<1>F g1.20<0,1,0>UW { align1 }; add (1) g5.28<1>F g1.20<0,1,0>UW 1UB { align1 }; /* Set up ss3.y coordinates */ mov (1) g7.16<1>F g1.22<0,1,0>UW { align1 }; mov (1) g7.20<1>F g1.22<0,1,0>UW { align1 }; add (1) g7.24<1>F g1.22<0,1,0>UW 1UB { align1 }; add (1) g7.28<1>F g1.22<0,1,0>UW 1UB { align1 }; /* Now, map these screen space coordinates into texture coordinates. */ /* subtract screen-space X origin of vertex 0. */ add (8) g4<1>F g4<8,8,1>F -g1<0,1,0>F { align1 }; add (8) g5<1>F g5<8,8,1>F -g1<0,1,0>F { align1 }; /* scale by texture X increment */ mul (8) g4<1>F g4<8,8,1>F g3<0,1,0>F { align1 }; mul (8) g5<1>F g5<8,8,1>F g3<0,1,0>F { align1 }; /* add in texture X offset */ add (8) g4<1>F g4<8,8,1>F g3.12<0,1,0>F { align1 }; add (8) g5<1>F g5<8,8,1>F g3.12<0,1,0>F { align1 }; /* subtract screen-space Y origin of vertex 0. */ add (8) g6<1>F g6<8,8,1>F -g1.4<0,1,0>F { align1 }; add (8) g7<1>F g7<8,8,1>F -g1.4<0,1,0>F { align1 }; /* scale by texture Y increment */ mul (8) g6<1>F g6<8,8,1>F g3.20<0,1,0>F { align1 }; mul (8) g7<1>F g7<8,8,1>F g3.20<0,1,0>F { align1 }; /* add in texture Y offset */ add (8) g6<1>F g6<8,8,1>F g3.28<0,1,0>F { align1 }; add (8) g7<1>F g7<8,8,1>F g3.28<0,1,0>F { align1 }; /* sampler */ mov (8) m1<1>F g4<8,8,1>F { align1 }; mov (8) m2<1>F g5<8,8,1>F { align1 }; mov (8) m3<1>F g6<8,8,1>F { align1 }; mov (8) m4<1>F g7<8,8,1>F { align1 }; /* * g0 holds the PS thread payload, which (oddly) contains * precisely what the sampler wants to see in m0 */ send (16) 0 g12<1>UW g0<8,8,1>UW sampler (1,0,F) mlen 5 rlen 8 { align1 }; mov (8) g19<1>UW g19<8,8,1>UW { align1 }; /* color space conversion function: * R = Clamp ( 1.164(Y-16/255) + 1.596(Cr-128/255), 0, 1) * G = Clamp ( 1.164(Y-16/255) - 0.813(Cr-128/255) - 0.392(Cb-128/255), 0, 1) * B = Clamp ( 1.164(Y-16/255) + 2.017(Cb-128/255), 0, 1) * * Y is g14, g15. * Cr is g12, g13. * Cb is g16, g17. * * R is g2, g6. * G is g3, g7. * B is g4, g8. */ /* Y = Y - 16/255 */ add (8) g14<1>F g14<8,8,1>F -0.0627451F { align1 }; /* Cr = Cr - 128/255 */ add (8) g12<1>F g12<8,8,1>F -0.501961F { align1 }; /* Cb = Cb - 128 / 255 */ add (8) g16<1>F g16<8,8,1>F -0.501961F { align1 }; /* Y = Y * 1.164 */ mul (8) g14<1>F g14<8,8,1>F 1.164F { align1 }; /* acc = 1.596 * Cr */ mul (8) null g12<8,8,1>F 1.596F { align1 }; /* R = acc + Y */ mac.sat (8) m2<1>F g14<8,8,1>F 1F { align1 }; /* acc = Cr * -0.813 */ mul (8) null g12<8,8,1>F -0.813F { align1 }; /* acc += Cb * -0.392 */ mac (8) null g16<8,8,1>F -0.392F { align1 }; /* G = acc + Y */ mac.sat (8) m3<1>F g14<8,8,1>F 1F { align1 }; /* acc = Cb * 2.017 */ mul (8) null g16<8,8,1>F 2.017F { align1 }; /* B = acc + Y */ mac.sat (8) m4<1>F g14<8,8,1>F 1F { align1 }; /* and do it again */ add (8) g15<1>F g15<8,8,1>F -0.0627451F { align1 }; add (8) g13<1>F g13<8,8,1>F -0.501961F { align1 }; add (8) g17<1>F g17<8,8,1>F -0.501961F { align1 }; mul (8) g15<1>F g15<8,8,1>F 1.164F { align1 }; mul (8) null g13<8,8,1>F 1.596F { align1 }; mac.sat (8) m6<1>F g15<8,8,1>F 1F { align1 }; mul (8) null g13<8,8,1>F -0.813F { align1 }; mac (8) null g17<8,8,1>F -0.392F { align1 }; mac.sat (8) m7<1>F g15<8,8,1>F 1F { align1 }; mul (8) null g17<8,8,1>F 2.017F { align1 }; mac.sat (8) m8<1>F g15<8,8,1>F 1F { align1 }; /* Pass through control information: */ mov (8) m1<1>UD g1<8,8,1>UD { align1 mask_disable }; /* Send framebuffer write message: XXX: acc0? */ send (16) 0 null g0<8,8,1>UW write ( 0, /* binding table index 0 */ 8, /* pixel scoreboard clear */ 4, /* render target write */ 0 /* no write commit message */ ) mlen 10 rlen 0 { align1 EOT }; /* padding */ nop; nop; nop; nop; nop; nop; nop; nop; intel-gpu-tools-1.14/assembler/doc/examples/packed_yuv_sf.g4a0000644000175000017500000000104312665336131021205 00000000000000send (1) 0 g6<1>F g1.12<0,1,0>F math inv scalar mlen 1 rlen 1 { align1 }; send (1) 0 g6.4<1>F g1.20<0,1,0>F math inv scalar mlen 1 rlen 1 { align1 }; add (8) g7<1>F g4<8,8,1>F -g3<8,8,1>F { align1 }; mul (1) g7<1>F g7<0,1,0>F g6<0,1,0>F { align1 }; mul (1) g7.4<1>F g7.4<0,1,0>F g6.4<0,1,0>F { align1 }; mov (8) m1<1>F g7<0,1,0>F { align1 }; mov (8) m2<1>F g7.4<0,1,0>F { align1 }; mov (8) m3<1>F g3<8,8,1>F { align1 }; send (8) 0 null g0<8,8,1>F urb 0 transpose used complete mlen 4 rlen 0 { align1 EOT }; nop; nop; nop; nop; nop; nop; nop; nop; intel-gpu-tools-1.14/assembler/brw_context.h0000644000175000017500000000410012665336131016107 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ /* * To share code with mesa without having to do big modifications and still be * able to sync files together at a later point, this file stubs the fields * of struct brw_context used by the code we import. */ #ifndef __BRW_CONTEXT_H__ #define __BRW_CONTEXT_H__ #include #include #include "brw_structs.h" #ifdef __cplusplus extern "C" { #endif #ifndef INTEL_DEBUG #define INTEL_DEBUG (0) #endif struct intel_context { int gen; int gt; bool is_haswell; bool is_g4x; bool needs_ff_sync; }; struct brw_context { struct intel_context intel; }; bool brw_init_context(struct brw_context *brw, int gen); /* brw_disasm.c */ struct opcode_desc { char *name; int nsrc; int ndst; }; extern const struct opcode_desc opcode_descs[128]; int brw_disasm (FILE *file, struct brw_instruction *inst, int gen); #ifdef __cplusplus } /* end of extern "C" */ #endif #endif /* __BRW_CONTEXT_H__ */ intel-gpu-tools-1.14/assembler/brw_disasm.c0000644000175000017500000011730312665336131015710 00000000000000/* * Copyright © 2008 Keith Packard * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that copyright * notice and this permission notice appear in supporting documentation, and * that the name of the copyright holders not be used in advertising or * publicity pertaining to distribution of the software without specific, * written prior permission. The copyright holders make no representations * about the suitability of this software for any purpose. It is provided "as * is" without express or implied warranty. * * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE * OF THIS SOFTWARE. */ #include #include #include #include #include #include #include "brw_compat.h" #include "brw_context.h" #include "brw_defines.h" const struct opcode_desc opcode_descs[128] = { [BRW_OPCODE_MOV] = { .name = "mov", .nsrc = 1, .ndst = 1 }, [BRW_OPCODE_FRC] = { .name = "frc", .nsrc = 1, .ndst = 1 }, [BRW_OPCODE_RNDU] = { .name = "rndu", .nsrc = 1, .ndst = 1 }, [BRW_OPCODE_RNDD] = { .name = "rndd", .nsrc = 1, .ndst = 1 }, [BRW_OPCODE_RNDE] = { .name = "rnde", .nsrc = 1, .ndst = 1 }, [BRW_OPCODE_RNDZ] = { .name = "rndz", .nsrc = 1, .ndst = 1 }, [BRW_OPCODE_NOT] = { .name = "not", .nsrc = 1, .ndst = 1 }, [BRW_OPCODE_LZD] = { .name = "lzd", .nsrc = 1, .ndst = 1 }, [BRW_OPCODE_MUL] = { .name = "mul", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_MAC] = { .name = "mac", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_MACH] = { .name = "mach", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_LINE] = { .name = "line", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_PLN] = { .name = "pln", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_MAD] = { .name = "mad", .nsrc = 3, .ndst = 1 }, [BRW_OPCODE_SAD2] = { .name = "sad2", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_SADA2] = { .name = "sada2", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_DP4] = { .name = "dp4", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_DPH] = { .name = "dph", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_DP3] = { .name = "dp3", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_DP2] = { .name = "dp2", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_MATH] = { .name = "math", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_AVG] = { .name = "avg", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_ADD] = { .name = "add", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_SEL] = { .name = "sel", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_AND] = { .name = "and", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_OR] = { .name = "or", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_XOR] = { .name = "xor", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_SHR] = { .name = "shr", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_SHL] = { .name = "shl", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_ASR] = { .name = "asr", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_CMP] = { .name = "cmp", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_CMPN] = { .name = "cmpn", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_SEND] = { .name = "send", .nsrc = 1, .ndst = 1 }, [BRW_OPCODE_SENDC] = { .name = "sendc", .nsrc = 1, .ndst = 1 }, [BRW_OPCODE_NOP] = { .name = "nop", .nsrc = 0, .ndst = 0 }, [BRW_OPCODE_JMPI] = { .name = "jmpi", .nsrc = 0, .ndst = 0 }, [BRW_OPCODE_IF] = { .name = "if", .nsrc = 2, .ndst = 0 }, [BRW_OPCODE_IFF] = { .name = "iff", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_WHILE] = { .name = "while", .nsrc = 2, .ndst = 0 }, [BRW_OPCODE_ELSE] = { .name = "else", .nsrc = 2, .ndst = 0 }, [BRW_OPCODE_BREAK] = { .name = "break", .nsrc = 2, .ndst = 0 }, [BRW_OPCODE_CONTINUE] = { .name = "cont", .nsrc = 1, .ndst = 0 }, [BRW_OPCODE_HALT] = { .name = "halt", .nsrc = 1, .ndst = 0 }, [BRW_OPCODE_MSAVE] = { .name = "msave", .nsrc = 1, .ndst = 1 }, [BRW_OPCODE_PUSH] = { .name = "push", .nsrc = 1, .ndst = 1 }, [BRW_OPCODE_MRESTORE] = { .name = "mrest", .nsrc = 1, .ndst = 1 }, [BRW_OPCODE_POP] = { .name = "pop", .nsrc = 2, .ndst = 0 }, [BRW_OPCODE_WAIT] = { .name = "wait", .nsrc = 1, .ndst = 0 }, [BRW_OPCODE_DO] = { .name = "do", .nsrc = 0, .ndst = 0 }, [BRW_OPCODE_ENDIF] = { .name = "endif", .nsrc = 2, .ndst = 0 }, }; static const struct opcode_desc *opcode = opcode_descs; static const char * const conditional_modifier[16] = { [BRW_CONDITIONAL_NONE] = "", [BRW_CONDITIONAL_Z] = ".e", [BRW_CONDITIONAL_NZ] = ".ne", [BRW_CONDITIONAL_G] = ".g", [BRW_CONDITIONAL_GE] = ".ge", [BRW_CONDITIONAL_L] = ".l", [BRW_CONDITIONAL_LE] = ".le", [BRW_CONDITIONAL_R] = ".r", [BRW_CONDITIONAL_O] = ".o", [BRW_CONDITIONAL_U] = ".u", }; static const char * const negate[2] = { [0] = "", [1] = "-", }; static const char * const _abs[2] = { [0] = "", [1] = "(abs)", }; static const char * const vert_stride[16] = { [0] = "0", [1] = "1", [2] = "2", [3] = "4", [4] = "8", [5] = "16", [6] = "32", [15] = "VxH", }; static const char * const width[8] = { [0] = "1", [1] = "2", [2] = "4", [3] = "8", [4] = "16", }; static const char * const horiz_stride[4] = { [0] = "0", [1] = "1", [2] = "2", [3] = "4" }; static const char * const chan_sel[4] = { [0] = "x", [1] = "y", [2] = "z", [3] = "w", }; static const char * const debug_ctrl[2] = { [0] = "", [1] = ".breakpoint" }; static const char * const saturate[2] = { [0] = "", [1] = ".sat" }; static const char * const accwr[2] = { [0] = "", [1] = "AccWrEnable" }; static const char * const wectrl[2] = { [0] = "WE_normal", [1] = "WE_all" }; static const char * const exec_size[8] = { [0] = "1", [1] = "2", [2] = "4", [3] = "8", [4] = "16", [5] = "32" }; static const char * const pred_inv[2] = { [0] = "+", [1] = "-" }; static const char * const pred_ctrl_align16[16] = { [1] = "", [2] = ".x", [3] = ".y", [4] = ".z", [5] = ".w", [6] = ".any4h", [7] = ".all4h", }; static const char * const pred_ctrl_align1[16] = { [1] = "", [2] = ".anyv", [3] = ".allv", [4] = ".any2h", [5] = ".all2h", [6] = ".any4h", [7] = ".all4h", [8] = ".any8h", [9] = ".all8h", [10] = ".any16h", [11] = ".all16h", }; static const char * const thread_ctrl[4] = { [0] = "", [2] = "switch" }; static const char * const compr_ctrl[4] = { [0] = "", [1] = "sechalf", [2] = "compr", [3] = "compr4", }; static const char * const dep_ctrl[4] = { [0] = "", [1] = "NoDDClr", [2] = "NoDDChk", [3] = "NoDDClr,NoDDChk", }; static const char * const mask_ctrl[4] = { [0] = "", [1] = "nomask", }; static const char * const access_mode[2] = { [0] = "align1", [1] = "align16", }; static const char * const reg_encoding[8] = { [0] = "UD", [1] = "D", [2] = "UW", [3] = "W", [4] = "UB", [5] = "B", [7] = "F" }; const int reg_type_size[8] = { [0] = 4, [1] = 4, [2] = 2, [3] = 2, [4] = 1, [5] = 1, [7] = 4 }; static const char * const reg_file[4] = { [0] = "A", [1] = "g", [2] = "m", [3] = "imm", }; static const char * const writemask[16] = { [0x0] = ".", [0x1] = ".x", [0x2] = ".y", [0x3] = ".xy", [0x4] = ".z", [0x5] = ".xz", [0x6] = ".yz", [0x7] = ".xyz", [0x8] = ".w", [0x9] = ".xw", [0xa] = ".yw", [0xb] = ".xyw", [0xc] = ".zw", [0xd] = ".xzw", [0xe] = ".yzw", [0xf] = "", }; static const char * const end_of_thread[2] = { [0] = "", [1] = "EOT" }; static const char * const target_function[16] = { [BRW_SFID_NULL] = "null", [BRW_SFID_MATH] = "math", [BRW_SFID_SAMPLER] = "sampler", [BRW_SFID_MESSAGE_GATEWAY] = "gateway", [BRW_SFID_DATAPORT_READ] = "read", [BRW_SFID_DATAPORT_WRITE] = "write", [BRW_SFID_URB] = "urb", [BRW_SFID_THREAD_SPAWNER] = "thread_spawner" }; static const char * const target_function_gen6[16] = { [BRW_SFID_NULL] = "null", [BRW_SFID_MATH] = "math", [BRW_SFID_SAMPLER] = "sampler", [BRW_SFID_MESSAGE_GATEWAY] = "gateway", [BRW_SFID_URB] = "urb", [BRW_SFID_THREAD_SPAWNER] = "thread_spawner", [GEN6_SFID_DATAPORT_SAMPLER_CACHE] = "sampler", [GEN6_SFID_DATAPORT_RENDER_CACHE] = "render", [GEN6_SFID_DATAPORT_CONSTANT_CACHE] = "const", [GEN7_SFID_DATAPORT_DATA_CACHE] = "data" }; static const char * const dp_rc_msg_type_gen6[16] = { [BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ] = "OWORD block read", [GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ] = "RT UNORM read", [GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ] = "OWORD dual block read", [GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ] = "media block read", [GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ] = "OWORD unaligned block read", [GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ] = "DWORD scattered read", [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE] = "DWORD atomic write", [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE] = "OWORD block write", [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE] = "OWORD dual block write", [GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE] = "media block write", [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE] = "DWORD scattered write", [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE] = "RT write", [GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE] = "streamed VB write", [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE] = "RT UNORMc write", }; static const char * const math_function[16] = { [BRW_MATH_FUNCTION_INV] = "inv", [BRW_MATH_FUNCTION_LOG] = "log", [BRW_MATH_FUNCTION_EXP] = "exp", [BRW_MATH_FUNCTION_SQRT] = "sqrt", [BRW_MATH_FUNCTION_RSQ] = "rsq", [BRW_MATH_FUNCTION_SIN] = "sin", [BRW_MATH_FUNCTION_COS] = "cos", [BRW_MATH_FUNCTION_SINCOS] = "sincos", [BRW_MATH_FUNCTION_TAN] = "tan", [BRW_MATH_FUNCTION_POW] = "pow", [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER] = "intdivmod", [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT] = "intdiv", [BRW_MATH_FUNCTION_INT_DIV_REMAINDER] = "intmod", }; static const char * const math_saturate[2] = { [0] = "", [1] = "sat" }; static const char * const math_signed[2] = { [0] = "", [1] = "signed" }; static const char * const math_scalar[2] = { [0] = "", [1] = "scalar" }; static const char * const math_precision[2] = { [0] = "", [1] = "partial_precision" }; static const char * const urb_opcode[2] = { [0] = "urb_write", [1] = "ff_sync", }; static const char * const urb_swizzle[4] = { [BRW_URB_SWIZZLE_NONE] = "", [BRW_URB_SWIZZLE_INTERLEAVE] = "interleave", [BRW_URB_SWIZZLE_TRANSPOSE] = "transpose", }; static const char * const urb_allocate[2] = { [0] = "", [1] = "allocate" }; static const char * const urb_used[2] = { [0] = "", [1] = "used" }; static const char * const urb_complete[2] = { [0] = "", [1] = "complete" }; static const char * const sampler_target_format[4] = { [0] = "F", [2] = "UD", [3] = "D" }; static int column; static int string (FILE *file, const char *string) { fputs (string, file); column += strlen (string); return 0; } static int format (FILE *f, const char *format, ...) PRINTFLIKE(2, 3); static int format (FILE *f, const char *format, ...) { char buf[1024]; va_list args; va_start (args, format); vsnprintf (buf, sizeof (buf) - 1, format, args); va_end (args); string (f, buf); return 0; } static int newline (FILE *f) { putc ('\n', f); column = 0; return 0; } static int pad (FILE *f, int c) { do string (f, " "); while (column < c); return 0; } static int control (FILE *file, const char *name, const char * const ctrl[], unsigned id, int *space) { if (!ctrl[id]) { fprintf (file, "*** invalid %s value %d ", name, id); return 1; } if (ctrl[id][0]) { if (space && *space) string (file, " "); string (file, ctrl[id]); if (space) *space = 1; } return 0; } static int print_opcode (FILE *file, int id) { if (!opcode[id].name) { format (file, "*** invalid opcode value %d ", id); return 1; } string (file, opcode[id].name); return 0; } static int reg (FILE *file, unsigned _reg_file, unsigned _reg_nr) { int err = 0; /* Clear the Compr4 instruction compression bit. */ if (_reg_file == BRW_MESSAGE_REGISTER_FILE) _reg_nr &= ~(1 << 7); if (_reg_file == BRW_ARCHITECTURE_REGISTER_FILE) { switch (_reg_nr & 0xf0) { case BRW_ARF_NULL: string (file, "null"); return -1; case BRW_ARF_ADDRESS: format (file, "a%d", _reg_nr & 0x0f); break; case BRW_ARF_ACCUMULATOR: format (file, "acc%d", _reg_nr & 0x0f); break; case BRW_ARF_FLAG: format (file, "f%d", _reg_nr & 0x0f); break; case BRW_ARF_MASK: format (file, "mask%d", _reg_nr & 0x0f); break; case BRW_ARF_MASK_STACK: format (file, "msd%d", _reg_nr & 0x0f); break; case BRW_ARF_STATE: format (file, "sr%d", _reg_nr & 0x0f); break; case BRW_ARF_CONTROL: format (file, "cr%d", _reg_nr & 0x0f); break; case BRW_ARF_NOTIFICATION_COUNT: format (file, "n%d", _reg_nr & 0x0f); break; case BRW_ARF_IP: string (file, "ip"); return -1; break; default: format (file, "ARF%d", _reg_nr); break; } } else { err |= control (file, "src reg file", reg_file, _reg_file, NULL); format (file, "%d", _reg_nr); } return err; } static int dest (FILE *file, struct brw_instruction *inst) { int err = 0; if (inst->header.access_mode == BRW_ALIGN_1) { if (inst->bits1.da1.dest_address_mode == BRW_ADDRESS_DIRECT) { err |= reg (file, inst->bits1.da1.dest_reg_file, inst->bits1.da1.dest_reg_nr); if (err == -1) return 0; if (inst->bits1.da1.dest_subreg_nr) format (file, ".%d", inst->bits1.da1.dest_subreg_nr / reg_type_size[inst->bits1.da1.dest_reg_type]); format (file, "<%s>", horiz_stride[inst->bits1.da1.dest_horiz_stride]); err |= control (file, "dest reg encoding", reg_encoding, inst->bits1.da1.dest_reg_type, NULL); } else { string (file, "g[a0"); if (inst->bits1.ia1.dest_subreg_nr) format (file, ".%d", inst->bits1.ia1.dest_subreg_nr / reg_type_size[inst->bits1.ia1.dest_reg_type]); if (inst->bits1.ia1.dest_indirect_offset) format (file, " %d", inst->bits1.ia1.dest_indirect_offset); string (file, "]"); format (file, "<%s>", horiz_stride[inst->bits1.ia1.dest_horiz_stride]); err |= control (file, "dest reg encoding", reg_encoding, inst->bits1.ia1.dest_reg_type, NULL); } } else { if (inst->bits1.da16.dest_address_mode == BRW_ADDRESS_DIRECT) { err |= reg (file, inst->bits1.da16.dest_reg_file, inst->bits1.da16.dest_reg_nr); if (err == -1) return 0; if (inst->bits1.da16.dest_subreg_nr) format (file, ".%d", inst->bits1.da16.dest_subreg_nr / reg_type_size[inst->bits1.da16.dest_reg_type]); string (file, "<1>"); err |= control (file, "writemask", writemask, inst->bits1.da16.dest_writemask, NULL); err |= control (file, "dest reg encoding", reg_encoding, inst->bits1.da16.dest_reg_type, NULL); } else { err = 1; string (file, "Indirect align16 address mode not supported"); } } return 0; } static int dest_3src (FILE *file, struct brw_instruction *inst) { int err = 0; uint32_t reg_file; if (inst->bits1.da3src.dest_reg_file) reg_file = BRW_MESSAGE_REGISTER_FILE; else reg_file = BRW_GENERAL_REGISTER_FILE; err |= reg (file, reg_file, inst->bits1.da3src.dest_reg_nr); if (err == -1) return 0; if (inst->bits1.da3src.dest_subreg_nr) format (file, ".%d", inst->bits1.da3src.dest_subreg_nr); string (file, "<1>"); err |= control (file, "writemask", writemask, inst->bits1.da3src.dest_writemask, NULL); err |= control (file, "dest reg encoding", reg_encoding, BRW_REGISTER_TYPE_F, NULL); return 0; } static int src_align1_region (FILE *file, unsigned _vert_stride, unsigned _width, unsigned _horiz_stride) { int err = 0; string (file, "<"); err |= control (file, "vert stride", vert_stride, _vert_stride, NULL); string (file, ","); err |= control (file, "width", width, _width, NULL); string (file, ","); err |= control (file, "horiz_stride", horiz_stride, _horiz_stride, NULL); string (file, ">"); return err; } static int src_da1 (FILE *file, unsigned type, unsigned _reg_file, unsigned _vert_stride, unsigned _width, unsigned _horiz_stride, unsigned reg_num, unsigned sub_reg_num, unsigned __abs, unsigned _negate) { int err = 0; err |= control (file, "negate", negate, _negate, NULL); err |= control (file, "abs", _abs, __abs, NULL); err |= reg (file, _reg_file, reg_num); if (err == -1) return 0; if (sub_reg_num) format (file, ".%d", sub_reg_num / reg_type_size[type]); /* use formal style like spec */ src_align1_region (file, _vert_stride, _width, _horiz_stride); err |= control (file, "src reg encoding", reg_encoding, type, NULL); return err; } static int src_ia1 (FILE *file, unsigned type, unsigned _reg_file, int _addr_imm, unsigned _addr_subreg_nr, unsigned _negate, unsigned __abs, unsigned _addr_mode, unsigned _horiz_stride, unsigned _width, unsigned _vert_stride) { int err = 0; err |= control (file, "negate", negate, _negate, NULL); err |= control (file, "abs", _abs, __abs, NULL); string (file, "g[a0"); if (_addr_subreg_nr) format (file, ".%d", _addr_subreg_nr); if (_addr_imm) format (file, " %d", _addr_imm); string (file, "]"); src_align1_region (file, _vert_stride, _width, _horiz_stride); err |= control (file, "src reg encoding", reg_encoding, type, NULL); return err; } static int src_da16 (FILE *file, unsigned _reg_type, unsigned _reg_file, unsigned _vert_stride, unsigned _reg_nr, unsigned _subreg_nr, unsigned __abs, unsigned _negate, unsigned swz_x, unsigned swz_y, unsigned swz_z, unsigned swz_w) { int err = 0; err |= control (file, "negate", negate, _negate, NULL); err |= control (file, "abs", _abs, __abs, NULL); err |= reg (file, _reg_file, _reg_nr); if (err == -1) return 0; if (_subreg_nr) /* bit4 for subreg number byte addressing. Make this same meaning as in da1 case, so output looks consistent. */ format (file, ".%d", 16 / reg_type_size[_reg_type]); string (file, "<"); err |= control (file, "vert stride", vert_stride, _vert_stride, NULL); string (file, ",4,1>"); /* * Three kinds of swizzle display: * identity - nothing printed * 1->all - print the single channel * 1->1 - print the mapping */ if (swz_x == BRW_CHANNEL_X && swz_y == BRW_CHANNEL_Y && swz_z == BRW_CHANNEL_Z && swz_w == BRW_CHANNEL_W) { ; } else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w) { string (file, "."); err |= control (file, "channel select", chan_sel, swz_x, NULL); } else { string (file, "."); err |= control (file, "channel select", chan_sel, swz_x, NULL); err |= control (file, "channel select", chan_sel, swz_y, NULL); err |= control (file, "channel select", chan_sel, swz_z, NULL); err |= control (file, "channel select", chan_sel, swz_w, NULL); } err |= control (file, "src da16 reg type", reg_encoding, _reg_type, NULL); return err; } static int src0_3src (FILE *file, struct brw_instruction *inst) { int err = 0; unsigned swz_x = (inst->bits2.da3src.src0_swizzle >> 0) & 0x3; unsigned swz_y = (inst->bits2.da3src.src0_swizzle >> 2) & 0x3; unsigned swz_z = (inst->bits2.da3src.src0_swizzle >> 4) & 0x3; unsigned swz_w = (inst->bits2.da3src.src0_swizzle >> 6) & 0x3; err |= control (file, "negate", negate, inst->bits1.da3src.src0_negate, NULL); err |= control (file, "abs", _abs, inst->bits1.da3src.src0_abs, NULL); err |= reg (file, BRW_GENERAL_REGISTER_FILE, inst->bits2.da3src.src0_reg_nr); if (err == -1) return 0; if (inst->bits2.da3src.src0_subreg_nr) format (file, ".%d", inst->bits2.da3src.src0_subreg_nr); string (file, "<4,1,1>"); err |= control (file, "src da16 reg type", reg_encoding, BRW_REGISTER_TYPE_F, NULL); /* * Three kinds of swizzle display: * identity - nothing printed * 1->all - print the single channel * 1->1 - print the mapping */ if (swz_x == BRW_CHANNEL_X && swz_y == BRW_CHANNEL_Y && swz_z == BRW_CHANNEL_Z && swz_w == BRW_CHANNEL_W) { ; } else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w) { string (file, "."); err |= control (file, "channel select", chan_sel, swz_x, NULL); } else { string (file, "."); err |= control (file, "channel select", chan_sel, swz_x, NULL); err |= control (file, "channel select", chan_sel, swz_y, NULL); err |= control (file, "channel select", chan_sel, swz_z, NULL); err |= control (file, "channel select", chan_sel, swz_w, NULL); } return err; } static int src1_3src (FILE *file, struct brw_instruction *inst) { int err = 0; unsigned swz_x = (inst->bits2.da3src.src1_swizzle >> 0) & 0x3; unsigned swz_y = (inst->bits2.da3src.src1_swizzle >> 2) & 0x3; unsigned swz_z = (inst->bits2.da3src.src1_swizzle >> 4) & 0x3; unsigned swz_w = (inst->bits2.da3src.src1_swizzle >> 6) & 0x3; unsigned src1_subreg_nr = (inst->bits2.da3src.src1_subreg_nr_low | (inst->bits3.da3src.src1_subreg_nr_high << 2)); err |= control (file, "negate", negate, inst->bits1.da3src.src1_negate, NULL); err |= control (file, "abs", _abs, inst->bits1.da3src.src1_abs, NULL); err |= reg (file, BRW_GENERAL_REGISTER_FILE, inst->bits3.da3src.src1_reg_nr); if (err == -1) return 0; if (src1_subreg_nr) format (file, ".%d", src1_subreg_nr); string (file, "<4,1,1>"); err |= control (file, "src da16 reg type", reg_encoding, BRW_REGISTER_TYPE_F, NULL); /* * Three kinds of swizzle display: * identity - nothing printed * 1->all - print the single channel * 1->1 - print the mapping */ if (swz_x == BRW_CHANNEL_X && swz_y == BRW_CHANNEL_Y && swz_z == BRW_CHANNEL_Z && swz_w == BRW_CHANNEL_W) { ; } else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w) { string (file, "."); err |= control (file, "channel select", chan_sel, swz_x, NULL); } else { string (file, "."); err |= control (file, "channel select", chan_sel, swz_x, NULL); err |= control (file, "channel select", chan_sel, swz_y, NULL); err |= control (file, "channel select", chan_sel, swz_z, NULL); err |= control (file, "channel select", chan_sel, swz_w, NULL); } return err; } static int src2_3src (FILE *file, struct brw_instruction *inst) { int err = 0; unsigned swz_x = (inst->bits3.da3src.src2_swizzle >> 0) & 0x3; unsigned swz_y = (inst->bits3.da3src.src2_swizzle >> 2) & 0x3; unsigned swz_z = (inst->bits3.da3src.src2_swizzle >> 4) & 0x3; unsigned swz_w = (inst->bits3.da3src.src2_swizzle >> 6) & 0x3; err |= control (file, "negate", negate, inst->bits1.da3src.src2_negate, NULL); err |= control (file, "abs", _abs, inst->bits1.da3src.src2_abs, NULL); err |= reg (file, BRW_GENERAL_REGISTER_FILE, inst->bits3.da3src.src2_reg_nr); if (err == -1) return 0; if (inst->bits3.da3src.src2_subreg_nr) format (file, ".%d", inst->bits3.da3src.src2_subreg_nr); string (file, "<4,1,1>"); err |= control (file, "src da16 reg type", reg_encoding, BRW_REGISTER_TYPE_F, NULL); /* * Three kinds of swizzle display: * identity - nothing printed * 1->all - print the single channel * 1->1 - print the mapping */ if (swz_x == BRW_CHANNEL_X && swz_y == BRW_CHANNEL_Y && swz_z == BRW_CHANNEL_Z && swz_w == BRW_CHANNEL_W) { ; } else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w) { string (file, "."); err |= control (file, "channel select", chan_sel, swz_x, NULL); } else { string (file, "."); err |= control (file, "channel select", chan_sel, swz_x, NULL); err |= control (file, "channel select", chan_sel, swz_y, NULL); err |= control (file, "channel select", chan_sel, swz_z, NULL); err |= control (file, "channel select", chan_sel, swz_w, NULL); } return err; } static int imm (FILE *file, unsigned type, struct brw_instruction *inst) { switch (type) { case BRW_REGISTER_TYPE_UD: format (file, "0x%08xUD", inst->bits3.ud); break; case BRW_REGISTER_TYPE_D: format (file, "%dD", inst->bits3.d); break; case BRW_REGISTER_TYPE_UW: format (file, "0x%04xUW", (uint16_t) inst->bits3.ud); break; case BRW_REGISTER_TYPE_W: format (file, "%dW", (int16_t) inst->bits3.d); break; case BRW_REGISTER_TYPE_UB: format (file, "0x%02xUB", (int8_t) inst->bits3.ud); break; case BRW_REGISTER_TYPE_VF: format (file, "Vector Float"); break; case BRW_REGISTER_TYPE_V: format (file, "0x%08xV", inst->bits3.ud); break; case BRW_REGISTER_TYPE_F: format (file, "%-gF", inst->bits3.f); } return 0; } static int src0 (FILE *file, struct brw_instruction *inst) { if (inst->bits1.da1.src0_reg_file == BRW_IMMEDIATE_VALUE) return imm (file, inst->bits1.da1.src0_reg_type, inst); else if (inst->header.access_mode == BRW_ALIGN_1) { if (inst->bits2.da1.src0_address_mode == BRW_ADDRESS_DIRECT) { return src_da1 (file, inst->bits1.da1.src0_reg_type, inst->bits1.da1.src0_reg_file, inst->bits2.da1.src0_vert_stride, inst->bits2.da1.src0_width, inst->bits2.da1.src0_horiz_stride, inst->bits2.da1.src0_reg_nr, inst->bits2.da1.src0_subreg_nr, inst->bits2.da1.src0_abs, inst->bits2.da1.src0_negate); } else { return src_ia1 (file, inst->bits1.ia1.src0_reg_type, inst->bits1.ia1.src0_reg_file, inst->bits2.ia1.src0_indirect_offset, inst->bits2.ia1.src0_subreg_nr, inst->bits2.ia1.src0_negate, inst->bits2.ia1.src0_abs, inst->bits2.ia1.src0_address_mode, inst->bits2.ia1.src0_horiz_stride, inst->bits2.ia1.src0_width, inst->bits2.ia1.src0_vert_stride); } } else { if (inst->bits2.da16.src0_address_mode == BRW_ADDRESS_DIRECT) { return src_da16 (file, inst->bits1.da16.src0_reg_type, inst->bits1.da16.src0_reg_file, inst->bits2.da16.src0_vert_stride, inst->bits2.da16.src0_reg_nr, inst->bits2.da16.src0_subreg_nr, inst->bits2.da16.src0_abs, inst->bits2.da16.src0_negate, inst->bits2.da16.src0_swz_x, inst->bits2.da16.src0_swz_y, inst->bits2.da16.src0_swz_z, inst->bits2.da16.src0_swz_w); } else { string (file, "Indirect align16 address mode not supported"); return 1; } } } static int src1 (FILE *file, struct brw_instruction *inst) { if (inst->bits1.da1.src1_reg_file == BRW_IMMEDIATE_VALUE) return imm (file, inst->bits1.da1.src1_reg_type, inst); else if (inst->header.access_mode == BRW_ALIGN_1) { if (inst->bits3.da1.src1_address_mode == BRW_ADDRESS_DIRECT) { return src_da1 (file, inst->bits1.da1.src1_reg_type, inst->bits1.da1.src1_reg_file, inst->bits3.da1.src1_vert_stride, inst->bits3.da1.src1_width, inst->bits3.da1.src1_horiz_stride, inst->bits3.da1.src1_reg_nr, inst->bits3.da1.src1_subreg_nr, inst->bits3.da1.src1_abs, inst->bits3.da1.src1_negate); } else { return src_ia1 (file, inst->bits1.ia1.src1_reg_type, inst->bits1.ia1.src1_reg_file, inst->bits3.ia1.src1_indirect_offset, inst->bits3.ia1.src1_subreg_nr, inst->bits3.ia1.src1_negate, inst->bits3.ia1.src1_abs, inst->bits3.ia1.src1_address_mode, inst->bits3.ia1.src1_horiz_stride, inst->bits3.ia1.src1_width, inst->bits3.ia1.src1_vert_stride); } } else { if (inst->bits3.da16.src1_address_mode == BRW_ADDRESS_DIRECT) { return src_da16 (file, inst->bits1.da16.src1_reg_type, inst->bits1.da16.src1_reg_file, inst->bits3.da16.src1_vert_stride, inst->bits3.da16.src1_reg_nr, inst->bits3.da16.src1_subreg_nr, inst->bits3.da16.src1_abs, inst->bits3.da16.src1_negate, inst->bits3.da16.src1_swz_x, inst->bits3.da16.src1_swz_y, inst->bits3.da16.src1_swz_z, inst->bits3.da16.src1_swz_w); } else { string (file, "Indirect align16 address mode not supported"); return 1; } } } int esize[6] = { [0] = 1, [1] = 2, [2] = 4, [3] = 8, [4] = 16, [5] = 32, }; static int qtr_ctrl(FILE *file, struct brw_instruction *inst) { int qtr_ctl = inst->header.compression_control; int exec_size = esize[inst->header.execution_size]; if (exec_size == 8) { switch (qtr_ctl) { case 0: string (file, " 1Q"); break; case 1: string (file, " 2Q"); break; case 2: string (file, " 3Q"); break; case 3: string (file, " 4Q"); break; } } else if (exec_size == 16){ if (qtr_ctl < 2) string (file, " 1H"); else string (file, " 2H"); } return 0; } int brw_disasm (FILE *file, struct brw_instruction *inst, int gen) { int err = 0; int space = 0; if (inst->header.predicate_control) { string (file, "("); err |= control (file, "predicate inverse", pred_inv, inst->header.predicate_inverse, NULL); format (file, "f%d", gen >= 7 ? inst->bits2.da1.flag_reg_nr : 0); if (inst->bits2.da1.flag_subreg_nr) format (file, ".%d", inst->bits2.da1.flag_subreg_nr); if (inst->header.access_mode == BRW_ALIGN_1) err |= control (file, "predicate control align1", pred_ctrl_align1, inst->header.predicate_control, NULL); else err |= control (file, "predicate control align16", pred_ctrl_align16, inst->header.predicate_control, NULL); string (file, ") "); } err |= print_opcode (file, inst->header.opcode); err |= control (file, "saturate", saturate, inst->header.saturate, NULL); err |= control (file, "debug control", debug_ctrl, inst->header.debug_control, NULL); if (inst->header.opcode == BRW_OPCODE_MATH) { string (file, " "); err |= control (file, "function", math_function, inst->header.destreg__conditionalmod, NULL); } else if (inst->header.opcode != BRW_OPCODE_SEND && inst->header.opcode != BRW_OPCODE_SENDC) { err |= control (file, "conditional modifier", conditional_modifier, inst->header.destreg__conditionalmod, NULL); /* If we're using the conditional modifier, print which flags reg is * used for it. Note that on gen6+, the embedded-condition SEL and * control flow doesn't update flags. */ if (inst->header.destreg__conditionalmod && (gen < 6 || (inst->header.opcode != BRW_OPCODE_SEL && inst->header.opcode != BRW_OPCODE_IF && inst->header.opcode != BRW_OPCODE_WHILE))) { format (file, ".f%d", gen >= 7 ? inst->bits2.da1.flag_reg_nr : 0); if (inst->bits2.da1.flag_subreg_nr) format (file, ".%d", inst->bits2.da1.flag_subreg_nr); } } if (inst->header.opcode != BRW_OPCODE_NOP) { string (file, "("); err |= control (file, "execution size", exec_size, inst->header.execution_size, NULL); string (file, ")"); } if (inst->header.opcode == BRW_OPCODE_SEND && gen < 6) format (file, " %d", inst->header.destreg__conditionalmod); if (opcode[inst->header.opcode].nsrc == 3) { pad (file, 16); err |= dest_3src (file, inst); pad (file, 32); err |= src0_3src (file, inst); pad (file, 48); err |= src1_3src (file, inst); pad (file, 64); err |= src2_3src (file, inst); } else { if (opcode[inst->header.opcode].ndst > 0) { pad (file, 16); err |= dest (file, inst); } else if (gen == 7 && (inst->header.opcode == BRW_OPCODE_ELSE || inst->header.opcode == BRW_OPCODE_ENDIF || inst->header.opcode == BRW_OPCODE_WHILE)) { format (file, " %d", inst->bits3.break_cont.jip); } else if (gen == 6 && (inst->header.opcode == BRW_OPCODE_IF || inst->header.opcode == BRW_OPCODE_ELSE || inst->header.opcode == BRW_OPCODE_ENDIF || inst->header.opcode == BRW_OPCODE_WHILE)) { format (file, " %d", inst->bits1.branch_gen6.jump_count); } else if ((gen >= 6 && (inst->header.opcode == BRW_OPCODE_BREAK || inst->header.opcode == BRW_OPCODE_CONTINUE || inst->header.opcode == BRW_OPCODE_HALT)) || (gen == 7 && inst->header.opcode == BRW_OPCODE_IF)) { format (file, " %d %d", inst->bits3.break_cont.uip, inst->bits3.break_cont.jip); } else if (inst->header.opcode == BRW_OPCODE_JMPI) { format (file, " %d", inst->bits3.d); } if (opcode[inst->header.opcode].nsrc > 0) { pad (file, 32); err |= src0 (file, inst); } if (opcode[inst->header.opcode].nsrc > 1) { pad (file, 48); err |= src1 (file, inst); } } if (inst->header.opcode == BRW_OPCODE_SEND || inst->header.opcode == BRW_OPCODE_SENDC) { enum brw_message_target target; if (gen >= 6) target = inst->header.destreg__conditionalmod; else if (gen == 5) target = inst->bits2.send_gen5.sfid; else target = inst->bits3.generic.msg_target; newline (file); pad (file, 16); space = 0; if (gen >= 6) { err |= control (file, "target function", target_function_gen6, target, &space); } else { err |= control (file, "target function", target_function, target, &space); } switch (target) { case BRW_SFID_MATH: err |= control (file, "math function", math_function, inst->bits3.math.function, &space); err |= control (file, "math saturate", math_saturate, inst->bits3.math.saturate, &space); err |= control (file, "math signed", math_signed, inst->bits3.math.int_type, &space); err |= control (file, "math scalar", math_scalar, inst->bits3.math.data_type, &space); err |= control (file, "math precision", math_precision, inst->bits3.math.precision, &space); break; case BRW_SFID_SAMPLER: if (gen >= 7) { format (file, " (%d, %d, %d, %d)", inst->bits3.sampler_gen7.binding_table_index, inst->bits3.sampler_gen7.sampler, inst->bits3.sampler_gen7.msg_type, inst->bits3.sampler_gen7.simd_mode); } else if (gen >= 5) { format (file, " (%d, %d, %d, %d)", inst->bits3.sampler_gen5.binding_table_index, inst->bits3.sampler_gen5.sampler, inst->bits3.sampler_gen5.msg_type, inst->bits3.sampler_gen5.simd_mode); } else if (0 /* FINISHME: is_g4x */) { format (file, " (%d, %d)", inst->bits3.sampler_g4x.binding_table_index, inst->bits3.sampler_g4x.sampler); } else { format (file, " (%d, %d, ", inst->bits3.sampler.binding_table_index, inst->bits3.sampler.sampler); err |= control (file, "sampler target format", sampler_target_format, inst->bits3.sampler.return_format, NULL); string (file, ")"); } break; case BRW_SFID_DATAPORT_READ: if (gen >= 6) { format (file, " (%d, %d, %d, %d)", inst->bits3.gen6_dp.binding_table_index, inst->bits3.gen6_dp.msg_control, inst->bits3.gen6_dp.msg_type, inst->bits3.gen6_dp.send_commit_msg); } else if (gen >= 5 /* FINISHME: || is_g4x */) { format (file, " (%d, %d, %d)", inst->bits3.dp_read_gen5.binding_table_index, inst->bits3.dp_read_gen5.msg_control, inst->bits3.dp_read_gen5.msg_type); } else { format (file, " (%d, %d, %d)", inst->bits3.dp_read.binding_table_index, inst->bits3.dp_read.msg_control, inst->bits3.dp_read.msg_type); } break; case BRW_SFID_DATAPORT_WRITE: if (gen >= 7) { format (file, " ("); err |= control (file, "DP rc message type", dp_rc_msg_type_gen6, inst->bits3.gen7_dp.msg_type, &space); format (file, ", %d, %d, %d)", inst->bits3.gen7_dp.binding_table_index, inst->bits3.gen7_dp.msg_control, inst->bits3.gen7_dp.msg_type); } else if (gen == 6) { format (file, " ("); err |= control (file, "DP rc message type", dp_rc_msg_type_gen6, inst->bits3.gen6_dp.msg_type, &space); format (file, ", %d, %d, %d, %d)", inst->bits3.gen6_dp.binding_table_index, inst->bits3.gen6_dp.msg_control, inst->bits3.gen6_dp.msg_type, inst->bits3.gen6_dp.send_commit_msg); } else { format (file, " (%d, %d, %d, %d)", inst->bits3.dp_write.binding_table_index, (inst->bits3.dp_write.last_render_target << 3) | inst->bits3.dp_write.msg_control, inst->bits3.dp_write.msg_type, inst->bits3.dp_write.send_commit_msg); } break; case BRW_SFID_URB: if (gen >= 5) { format (file, " %d", inst->bits3.urb_gen5.offset); } else { format (file, " %d", inst->bits3.urb.offset); } space = 1; if (gen >= 5) { err |= control (file, "urb opcode", urb_opcode, inst->bits3.urb_gen5.opcode, &space); } err |= control (file, "urb swizzle", urb_swizzle, inst->bits3.urb.swizzle_control, &space); err |= control (file, "urb allocate", urb_allocate, inst->bits3.urb.allocate, &space); err |= control (file, "urb used", urb_used, inst->bits3.urb.used, &space); err |= control (file, "urb complete", urb_complete, inst->bits3.urb.complete, &space); break; case BRW_SFID_THREAD_SPAWNER: break; case GEN7_SFID_DATAPORT_DATA_CACHE: format (file, " (%d, %d, %d)", inst->bits3.gen7_dp.binding_table_index, inst->bits3.gen7_dp.msg_control, inst->bits3.gen7_dp.msg_type); break; default: format (file, "unsupported target %d", target); break; } if (space) string (file, " "); if (gen >= 5) { format (file, "mlen %d", inst->bits3.generic_gen5.msg_length); format (file, " rlen %d", inst->bits3.generic_gen5.response_length); } else { format (file, "mlen %d", inst->bits3.generic.msg_length); format (file, " rlen %d", inst->bits3.generic.response_length); } } pad (file, 64); if (inst->header.opcode != BRW_OPCODE_NOP) { string (file, "{"); space = 1; err |= control(file, "access mode", access_mode, inst->header.access_mode, &space); if (gen >= 6) err |= control (file, "write enable control", wectrl, inst->header.mask_control, &space); else err |= control (file, "mask control", mask_ctrl, inst->header.mask_control, &space); err |= control (file, "dependency control", dep_ctrl, inst->header.dependency_control, &space); if (gen >= 6) err |= qtr_ctrl (file, inst); else { if (inst->header.compression_control == BRW_COMPRESSION_COMPRESSED && opcode[inst->header.opcode].ndst > 0 && inst->bits1.da1.dest_reg_file == BRW_MESSAGE_REGISTER_FILE && inst->bits1.da1.dest_reg_nr & (1 << 7)) { format (file, " compr4"); } else { err |= control (file, "compression control", compr_ctrl, inst->header.compression_control, &space); } } err |= control (file, "thread control", thread_ctrl, inst->header.thread_control, &space); if (gen >= 6) err |= control (file, "acc write control", accwr, inst->header.acc_wr_control, &space); if (inst->header.opcode == BRW_OPCODE_SEND || inst->header.opcode == BRW_OPCODE_SENDC) err |= control (file, "end of thread", end_of_thread, inst->bits3.generic.end_of_thread, &space); if (space) string (file, " "); string (file, "}"); } string (file, ";"); newline (file); return err; } intel-gpu-tools-1.14/assembler/TODO0000644000175000017500000000106512665336131014077 00000000000000- Add support for push, pop, msave, and mrest instructions - Fix up send argument formatting for some send instructions - Add send arguments for more send instructions - Fix up the sets of registers allowed for send arguments - manpage - binary output? - check for more error cases. - boolean types in parser internal structs where appropriate - replace GL* with non-GL? - support labels for branch/jump instruction destinations - support math on immediate operand values - break/cont syntax should be better - valgrind it - do something to allow use as a library? intel-gpu-tools-1.14/INSTALL0000644000175000017500000003660012665337376012502 00000000000000Installation Instructions ************************* Copyright (C) 1994-1996, 1999-2002, 2004-2011 Free Software Foundation, Inc. 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To suppress all normal output, redirect it to `/dev/null' (any error messages will still be shown). `--srcdir=DIR' Look for the package's source code in directory DIR. Usually `configure' can determine that directory automatically. `--prefix=DIR' Use DIR as the installation prefix. *note Installation Names:: for more details, including other options available for fine-tuning the installation locations. `--no-create' `-n' Run the configure checks, but stop before creating any output files. `configure' also accepts some other, not widely useful, options. Run `configure --help' for more details. intel-gpu-tools-1.14/overlay/0000755000175000017500000000000012665337377013206 500000000000000intel-gpu-tools-1.14/overlay/gem-objects.c0000644000175000017500000001004512665336131015454 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include #include #include #include #include #include #include "gem-objects.h" #include "debugfs.h" /* /sys/kernel/debug/dri/0/i915_gem_objects: * 46 objects, 20107264 bytes * 42 [42] objects, 15863808 [15863808] bytes in gtt * 0 [0] active objects, 0 [0] bytes * 42 [42] inactive objects, 15863808 [15863808] bytes * 0 unbound objects, 0 bytes * 3 purgeable objects, 4456448 bytes * 30 pinned mappable objects, 3821568 bytes * 1 fault mappable objects, 3145728 bytes * 2145386496 [536870912] gtt total * * Xorg: 35 objects, 16347136 bytes (0 active, 12103680 inactive, 0 unbound) */ int gem_objects_init(struct gem_objects *obj) { char buf[8192], *b; int fd, len; memset(obj, 0, sizeof(*obj)); sprintf(buf, "%s/i915_gem_objects", debugfs_dri_path); fd = open(buf, 0); if (fd < 0) return errno; len = read(fd, buf+1, sizeof(buf)-2); close(fd); if (len < 0) return EIO; /* Add sentinel values for the string searches */ buf[0] = '\n'; buf[len+1] = '\0'; b = strstr(buf, "gtt total"); if (b == NULL) return EIO; while (*b != '\n') b--; sscanf(b, "%ld [%ld]", &obj->max_gtt, &obj->max_aperture); return 0; } static void insert_sorted(struct gem_objects *obj, struct gem_objects_comm *comm) { struct gem_objects_comm *next, **prev; for (prev = &obj->comm; (next = *prev) != NULL; prev = &next->next) if (comm->bytes > next->bytes) break; comm->next = *prev; *prev = comm; } int gem_objects_update(struct gem_objects *obj) { char buf[8192], *b; struct gem_objects_comm *comm; struct gem_objects_comm *freed; int fd, len, ret; freed = obj->comm; obj->comm = NULL; sprintf(buf, "%s/i915_gem_objects", debugfs_dri_path); fd = open(buf, 0); if (fd < 0) { ret = errno; goto done; } len = read(fd, buf, sizeof(buf)-1); close(fd); if (len < 0) { ret = EIO; goto done; } buf[len] = '\0'; while (buf[--len] == '\n') buf[len] = '\0'; b = buf; sscanf(b, "%lu objects, %lu bytes", &obj->total_count, &obj->total_bytes); b = strchr(b, '\n'); sscanf(b, "%*d [%*d] objects, %lu [%lu] bytes in gtt", &obj->total_gtt, &obj->total_aperture); ret = 0; b = strchr(b, ':'); if (b == NULL) goto done; while (*b != '\n') b--; b++; do { char *eol, *colon; comm = freed; if (comm) freed = comm->next; else comm = malloc(sizeof(*comm)); if (comm == NULL) break; /* Xorg: 35 objects, 16347136 bytes (0 active, 12103680 inactive, 0 unbound) */ eol = strchr(b, '\n'); if (eol) { do { *eol++ = '\0'; } while (*eol == '\n'); } colon = strchr(b, ':'); memcpy(comm->name, b, colon-b+1); comm->name[colon-b+1] = '\0'; sscanf(colon + 1, "%lu objects, %lu bytes", &comm->count, &comm->bytes); insert_sorted(obj, comm); b = eol; } while (b != NULL); done: while (freed) { comm = freed; freed = comm->next; free(comm); } return ret; } intel-gpu-tools-1.14/overlay/gpu-perf.c0000644000175000017500000002222312665336131015003 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include #include #include #include #include #include #include #include #include #include #include #include "perf.h" #include "gpu-perf.h" #include "debugfs.h" #if defined(__i386__) #define rmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory") #define wmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory") #endif #if defined(__x86_64__) #define rmb() asm volatile("lfence" ::: "memory") #define wmb() asm volatile("sfence" ::: "memory") #endif #define N_PAGES 32 struct sample_event { struct perf_event_header header; uint32_t pid, tid; uint64_t time; uint64_t id; uint32_t raw_size; uint32_t raw_hdr0; uint32_t raw_hdr1; uint32_t raw[0]; }; static uint64_t tracepoint_id(const char *sys, const char *name) { char buf[1024]; int fd, n; snprintf(buf, sizeof(buf), "%s/tracing/events/%s/%s/id", debugfs_path, sys, name); fd = open(buf, 0); if (fd < 0) return 0; n = read(fd, buf, sizeof(buf)-1); close(fd); if (n < 0) return 0; buf[n] = '\0'; return strtoull(buf, 0, 0); } static int perf_tracepoint_open(struct gpu_perf *gp, const char *sys, const char *name, int (*func)(struct gpu_perf *, const void *)) { struct perf_event_attr attr; struct gpu_perf_sample *sample; int n, *fd; memset(&attr, 0, sizeof (attr)); attr.type = PERF_TYPE_TRACEPOINT; attr.config = tracepoint_id(sys, name); if (attr.config == 0) return ENOENT; attr.sample_period = 1; attr.sample_type = (PERF_SAMPLE_TIME | PERF_SAMPLE_STREAM_ID | PERF_SAMPLE_TID | PERF_SAMPLE_RAW); attr.read_format = PERF_FORMAT_ID; attr.exclude_guest = 1; n = gp->nr_cpus * (gp->nr_events+1); fd = realloc(gp->fd, n*sizeof(int)); sample = realloc(gp->sample, n*sizeof(*gp->sample)); if (fd == NULL || sample == NULL) return ENOMEM; gp->fd = fd; gp->sample = sample; fd += gp->nr_events * gp->nr_cpus; sample += gp->nr_events * gp->nr_cpus; for (n = 0; n < gp->nr_cpus; n++) { uint64_t track[2]; fd[n] = perf_event_open(&attr, -1, n, -1, 0); if (fd[n] == -1) return errno; /* read back the event to establish id->tracepoint */ if (read(fd[n], track, sizeof(track)) < 0) return errno; sample[n].id = track[1]; sample[n].func = func; } gp->nr_events++; return 0; } static int perf_mmap(struct gpu_perf *gp) { int size = (1 + N_PAGES) * gp->page_size; int *fd, i, j; gp->map = malloc(sizeof(void *)*gp->nr_cpus); if (gp->map == NULL) return ENOMEM; fd = gp->fd; for (j = 0; j < gp->nr_cpus; j++) { gp->map[j] = mmap(NULL, size, PROT_READ | PROT_WRITE, MAP_SHARED, *fd++, 0); if (gp->map[j] == (void *)-1) goto err; } for (i = 1; i < gp->nr_events; i++) { for (j = 0; j < gp->nr_cpus; j++) ioctl(*fd++, PERF_EVENT_IOC_SET_OUTPUT, gp->fd[j]); } return 0; err: while (--j > 0) munmap(gp->map[j], size); free(gp->map); gp->map = NULL; return EINVAL; } static int get_comm(pid_t pid, char *comm, int len) { char filename[1024]; int fd; *comm = '\0'; snprintf(filename, sizeof(filename), "/proc/%d/comm", pid); fd = open(filename, 0); if (fd >= 0) { len = read(fd, comm, len-1); if (len >= 0) comm[len-1] = '\0'; close(fd); } else len = -1; return len; } static struct gpu_perf_comm * lookup_comm(struct gpu_perf *gp, pid_t pid) { struct gpu_perf_comm *comm; if (pid == 0) return NULL; for (comm = gp->comm; comm != NULL; comm = comm->next) { if (comm->pid == pid) break; } if (comm == NULL) { comm = calloc(1, sizeof(*comm)); if (comm == NULL) return NULL; if (get_comm(pid, comm->name, sizeof(comm->name)) < 0) { free(comm); return NULL; } comm->pid = pid; comm->next = gp->comm; gp->comm = comm; } return comm; } static int request_add(struct gpu_perf *gp, const void *event) { const struct sample_event *sample = event; struct gpu_perf_comm *comm; comm = lookup_comm(gp, sample->pid); if (comm == NULL) return 0; comm->nr_requests[sample->raw[1]]++; return 1; } static int flip_complete(struct gpu_perf *gp, const void *event) { const struct sample_event *sample = event; gp->flip_complete[sample->raw[0]]++; return 1; } static int ctx_switch(struct gpu_perf *gp, const void *event) { const struct sample_event *sample = event; gp->ctx_switch[sample->raw[1]]++; return 1; } static int ring_sync(struct gpu_perf *gp, const void *event) { const struct sample_event *sample = event; struct gpu_perf_comm *comm; comm = lookup_comm(gp, sample->pid); if (comm == NULL) return 0; comm->nr_sema++; return 1; } static int wait_begin(struct gpu_perf *gp, const void *event) { const struct sample_event *sample = event; struct gpu_perf_comm *comm; struct gpu_perf_time *wait; comm = lookup_comm(gp, sample->pid); if (comm == NULL) return 0; wait = malloc(sizeof(*wait)); if (wait == NULL) return 0; wait->comm = comm; wait->comm->active = true; wait->seqno = sample->raw[2]; wait->time = sample->time; wait->next = gp->wait[sample->raw[1]]; gp->wait[sample->raw[1]] = wait; return 0; } static int wait_end(struct gpu_perf *gp, const void *event) { const struct sample_event *sample = event; struct gpu_perf_time *wait, **prev; for (prev = &gp->wait[sample->raw[1]]; (wait = *prev) != NULL; prev = &wait->next) { if (wait->seqno != sample->raw[2]) continue; wait->comm->wait_time += sample->time - wait->time; wait->comm->active = false; *prev = wait->next; free(wait); return 1; } return 0; } void gpu_perf_init(struct gpu_perf *gp, unsigned flags) { memset(gp, 0, sizeof(*gp)); gp->nr_cpus = sysconf(_SC_NPROCESSORS_ONLN); gp->page_size = getpagesize(); perf_tracepoint_open(gp, "i915", "i915_gem_request_add", request_add); if (perf_tracepoint_open(gp, "i915", "i915_gem_request_wait_begin", wait_begin) == 0) perf_tracepoint_open(gp, "i915", "i915_gem_request_wait_end", wait_end); perf_tracepoint_open(gp, "i915", "i915_flip_complete", flip_complete); perf_tracepoint_open(gp, "i915", "i915_gem_ring_sync_to", ring_sync); perf_tracepoint_open(gp, "i915", "i915_gem_ring_switch_context", ctx_switch); if (gp->nr_events == 0) { gp->error = "i915.ko tracepoints not available"; return; } if (perf_mmap(gp)) return; } static int process_sample(struct gpu_perf *gp, int cpu, const struct perf_event_header *header) { const struct sample_event *sample = (const struct sample_event *)header; int n, update = 0; /* hash me! */ for (n = 0; n < gp->nr_events; n++) { int m = n * gp->nr_cpus + cpu; if (gp->sample[m].id != sample->id) continue; update = gp->sample[m].func(gp, sample); break; } return update; } int gpu_perf_update(struct gpu_perf *gp) { const int size = N_PAGES * gp->page_size; const int mask = size - 1; uint8_t *buffer = NULL; int buffer_size = 0; int n, update = 0; if (gp->map == NULL) return 0; for (n = 0; n < gp->nr_cpus; n++) { struct perf_event_mmap_page *mmap = gp->map[n]; const uint8_t *data; uint64_t head, tail; int wrap = 0; tail = mmap->data_tail; head = mmap->data_head; rmb(); if (head < tail) { wrap = 1; tail &= mask; head &= mask; head += size; } data = (uint8_t *)mmap + gp->page_size; while (head - tail >= sizeof (struct perf_event_header)) { const struct perf_event_header *header; header = (const struct perf_event_header *)(data + (tail & mask)); if (header->size > head - tail) break; if ((const uint8_t *)header + header->size > data + size) { int before; if (header->size > buffer_size) { uint8_t *b = realloc(buffer, header->size); if (b == NULL) break; buffer = b; buffer_size = header->size; } before = data + size - (const uint8_t *)header; memcpy(buffer, header, before); memcpy(buffer + before, data, header->size - before); header = (struct perf_event_header *)buffer; } if (header->type == PERF_RECORD_SAMPLE) update += process_sample(gp, n, header); tail += header->size; } if (wrap) tail &= mask; mmap->data_tail = tail; wmb(); } free(buffer); return update; } intel-gpu-tools-1.14/overlay/gem-interrupts.h0000644000175000017500000000266712665336131016262 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #ifndef GEM_INTERRUPTS_H #define GEM_INTERRUPTS_H #include struct gem_interrupts { long unsigned last_count, count, delta; int error; int fd; }; int gem_interrupts_init(struct gem_interrupts *irqs); int gem_interrupts_update(struct gem_interrupts *irqs); #endif /* GEM_INTERRUPTS_H */ intel-gpu-tools-1.14/overlay/gpu-freq.h0000644000175000017500000000300112665336131015002 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #ifndef GPU_FREQ_H #define GPU_FREQ_H #include struct gpu_freq { struct gpu_freq_stat { uint64_t act, req; uint64_t timestamp; } stat[2]; int fd; int count; int is_byt; int min, max; int rpn, rp1, rp0; int request; int current; int error; }; int gpu_freq_init(struct gpu_freq *gf); int gpu_freq_update(struct gpu_freq *gf); #endif /* GPU_FREQ_H */ intel-gpu-tools-1.14/overlay/i915_pciids.h0000644000175000017500000002544012665336131015311 00000000000000/* * Copyright 2013 Intel Corporation * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ #ifndef _I915_PCIIDS_H #define _I915_PCIIDS_H /* * A pci_device_id struct { * __u32 vendor, device; * __u32 subvendor, subdevice; * __u32 class, class_mask; * kernel_ulong_t driver_data; * }; * Don't use C99 here because "class" is reserved and we want to * give userspace flexibility. */ #define INTEL_VGA_DEVICE(id, info) { \ 0x8086, id, \ ~0, ~0, \ 0x030000, 0xff0000, \ (unsigned long) info } #define INTEL_QUANTA_VGA_DEVICE(info) { \ 0x8086, 0x16a, \ 0x152d, 0x8990, \ 0x030000, 0xff0000, \ (unsigned long) info } #define INTEL_I830_IDS(info) \ INTEL_VGA_DEVICE(0x3577, info) #define INTEL_I845G_IDS(info) \ INTEL_VGA_DEVICE(0x2562, info) #define INTEL_I85X_IDS(info) \ INTEL_VGA_DEVICE(0x3582, info), /* I855_GM */ \ INTEL_VGA_DEVICE(0x358e, info) #define INTEL_I865G_IDS(info) \ INTEL_VGA_DEVICE(0x2572, info) /* I865_G */ #define INTEL_I915G_IDS(info) \ INTEL_VGA_DEVICE(0x2582, info), /* I915_G */ \ INTEL_VGA_DEVICE(0x258a, info) /* E7221_G */ #define INTEL_I915GM_IDS(info) \ INTEL_VGA_DEVICE(0x2592, info) /* I915_GM */ #define INTEL_I945G_IDS(info) \ INTEL_VGA_DEVICE(0x2772, info) /* I945_G */ #define INTEL_I945GM_IDS(info) \ INTEL_VGA_DEVICE(0x27a2, info), /* I945_GM */ \ INTEL_VGA_DEVICE(0x27ae, info) /* I945_GME */ #define INTEL_I965G_IDS(info) \ INTEL_VGA_DEVICE(0x2972, info), /* I946_GZ */ \ INTEL_VGA_DEVICE(0x2982, info), /* G35_G */ \ INTEL_VGA_DEVICE(0x2992, info), /* I965_Q */ \ INTEL_VGA_DEVICE(0x29a2, info) /* I965_G */ #define INTEL_G33_IDS(info) \ INTEL_VGA_DEVICE(0x29b2, info), /* Q35_G */ \ INTEL_VGA_DEVICE(0x29c2, info), /* G33_G */ \ INTEL_VGA_DEVICE(0x29d2, info) /* Q33_G */ #define INTEL_I965GM_IDS(info) \ INTEL_VGA_DEVICE(0x2a02, info), /* I965_GM */ \ INTEL_VGA_DEVICE(0x2a12, info) /* I965_GME */ #define INTEL_GM45_IDS(info) \ INTEL_VGA_DEVICE(0x2a42, info) /* GM45_G */ #define INTEL_G45_IDS(info) \ INTEL_VGA_DEVICE(0x2e02, info), /* IGD_E_G */ \ INTEL_VGA_DEVICE(0x2e12, info), /* Q45_G */ \ INTEL_VGA_DEVICE(0x2e22, info), /* G45_G */ \ INTEL_VGA_DEVICE(0x2e32, info), /* G41_G */ \ INTEL_VGA_DEVICE(0x2e42, info), /* B43_G */ \ INTEL_VGA_DEVICE(0x2e92, info) /* B43_G.1 */ #define INTEL_PINEVIEW_IDS(info) \ INTEL_VGA_DEVICE(0xa001, info), \ INTEL_VGA_DEVICE(0xa011, info) #define INTEL_IRONLAKE_D_IDS(info) \ INTEL_VGA_DEVICE(0x0042, info) #define INTEL_IRONLAKE_M_IDS(info) \ INTEL_VGA_DEVICE(0x0046, info) #define INTEL_SNB_D_IDS(info) \ INTEL_VGA_DEVICE(0x0102, info), \ INTEL_VGA_DEVICE(0x0112, info), \ INTEL_VGA_DEVICE(0x0122, info), \ INTEL_VGA_DEVICE(0x010A, info) #define INTEL_SNB_M_IDS(info) \ INTEL_VGA_DEVICE(0x0106, info), \ INTEL_VGA_DEVICE(0x0116, info), \ INTEL_VGA_DEVICE(0x0126, info) #define INTEL_IVB_M_IDS(info) \ INTEL_VGA_DEVICE(0x0156, info), /* GT1 mobile */ \ INTEL_VGA_DEVICE(0x0166, info) /* GT2 mobile */ #define INTEL_IVB_D_IDS(info) \ INTEL_VGA_DEVICE(0x0152, info), /* GT1 desktop */ \ INTEL_VGA_DEVICE(0x0162, info), /* GT2 desktop */ \ INTEL_VGA_DEVICE(0x015a, info), /* GT1 server */ \ INTEL_VGA_DEVICE(0x016a, info) /* GT2 server */ #define INTEL_IVB_Q_IDS(info) \ INTEL_QUANTA_VGA_DEVICE(info) /* Quanta transcode */ #define INTEL_HSW_D_IDS(info) \ INTEL_VGA_DEVICE(0x0402, info), /* GT1 desktop */ \ INTEL_VGA_DEVICE(0x0412, info), /* GT2 desktop */ \ INTEL_VGA_DEVICE(0x0422, info), /* GT3 desktop */ \ INTEL_VGA_DEVICE(0x040a, info), /* GT1 server */ \ INTEL_VGA_DEVICE(0x041a, info), /* GT2 server */ \ INTEL_VGA_DEVICE(0x042a, info), /* GT3 server */ \ INTEL_VGA_DEVICE(0x040B, info), /* GT1 reserved */ \ INTEL_VGA_DEVICE(0x041B, info), /* GT2 reserved */ \ INTEL_VGA_DEVICE(0x042B, info), /* GT3 reserved */ \ INTEL_VGA_DEVICE(0x040E, info), /* GT1 reserved */ \ INTEL_VGA_DEVICE(0x041E, info), /* GT2 reserved */ \ INTEL_VGA_DEVICE(0x042E, info), /* GT3 reserved */ \ INTEL_VGA_DEVICE(0x0C02, info), /* SDV GT1 desktop */ \ INTEL_VGA_DEVICE(0x0C12, info), /* SDV GT2 desktop */ \ INTEL_VGA_DEVICE(0x0C22, info), /* SDV GT3 desktop */ \ INTEL_VGA_DEVICE(0x0C0A, info), /* SDV GT1 server */ \ INTEL_VGA_DEVICE(0x0C1A, info), /* SDV GT2 server */ \ INTEL_VGA_DEVICE(0x0C2A, info), /* SDV GT3 server */ \ INTEL_VGA_DEVICE(0x0C0B, info), /* SDV GT1 reserved */ \ INTEL_VGA_DEVICE(0x0C1B, info), /* SDV GT2 reserved */ \ INTEL_VGA_DEVICE(0x0C2B, info), /* SDV GT3 reserved */ \ INTEL_VGA_DEVICE(0x0C0E, info), /* SDV GT1 reserved */ \ INTEL_VGA_DEVICE(0x0C1E, info), /* SDV GT2 reserved */ \ INTEL_VGA_DEVICE(0x0C2E, info), /* SDV GT3 reserved */ \ INTEL_VGA_DEVICE(0x0A02, info), /* ULT GT1 desktop */ \ INTEL_VGA_DEVICE(0x0A12, info), /* ULT GT2 desktop */ \ INTEL_VGA_DEVICE(0x0A22, info), /* ULT GT3 desktop */ \ INTEL_VGA_DEVICE(0x0A0A, info), /* ULT GT1 server */ \ INTEL_VGA_DEVICE(0x0A1A, info), /* ULT GT2 server */ \ INTEL_VGA_DEVICE(0x0A2A, info), /* ULT GT3 server */ \ INTEL_VGA_DEVICE(0x0A0B, info), /* ULT GT1 reserved */ \ INTEL_VGA_DEVICE(0x0A1B, info), /* ULT GT2 reserved */ \ INTEL_VGA_DEVICE(0x0A2B, info), /* ULT GT3 reserved */ \ INTEL_VGA_DEVICE(0x0D02, info), /* CRW GT1 desktop */ \ INTEL_VGA_DEVICE(0x0D12, info), /* CRW GT2 desktop */ \ INTEL_VGA_DEVICE(0x0D22, info), /* CRW GT3 desktop */ \ INTEL_VGA_DEVICE(0x0D0A, info), /* CRW GT1 server */ \ INTEL_VGA_DEVICE(0x0D1A, info), /* CRW GT2 server */ \ INTEL_VGA_DEVICE(0x0D2A, info), /* CRW GT3 server */ \ INTEL_VGA_DEVICE(0x0D0B, info), /* CRW GT1 reserved */ \ INTEL_VGA_DEVICE(0x0D1B, info), /* CRW GT2 reserved */ \ INTEL_VGA_DEVICE(0x0D2B, info), /* CRW GT3 reserved */ \ INTEL_VGA_DEVICE(0x0D0E, info), /* CRW GT1 reserved */ \ INTEL_VGA_DEVICE(0x0D1E, info), /* CRW GT2 reserved */ \ INTEL_VGA_DEVICE(0x0D2E, info) /* CRW GT3 reserved */ \ #define INTEL_HSW_M_IDS(info) \ INTEL_VGA_DEVICE(0x0406, info), /* GT1 mobile */ \ INTEL_VGA_DEVICE(0x0416, info), /* GT2 mobile */ \ INTEL_VGA_DEVICE(0x0426, info), /* GT2 mobile */ \ INTEL_VGA_DEVICE(0x0C06, info), /* SDV GT1 mobile */ \ INTEL_VGA_DEVICE(0x0C16, info), /* SDV GT2 mobile */ \ INTEL_VGA_DEVICE(0x0C26, info), /* SDV GT3 mobile */ \ INTEL_VGA_DEVICE(0x0A06, info), /* ULT GT1 mobile */ \ INTEL_VGA_DEVICE(0x0A16, info), /* ULT GT2 mobile */ \ INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \ INTEL_VGA_DEVICE(0x0A0E, info), /* ULX GT1 mobile */ \ INTEL_VGA_DEVICE(0x0A1E, info), /* ULX GT2 mobile */ \ INTEL_VGA_DEVICE(0x0A2E, info), /* ULT GT3 reserved */ \ INTEL_VGA_DEVICE(0x0D06, info), /* CRW GT1 mobile */ \ INTEL_VGA_DEVICE(0x0D16, info), /* CRW GT2 mobile */ \ INTEL_VGA_DEVICE(0x0D26, info) /* CRW GT3 mobile */ #define INTEL_VLV_M_IDS(info) \ INTEL_VGA_DEVICE(0x0f30, info), \ INTEL_VGA_DEVICE(0x0f31, info), \ INTEL_VGA_DEVICE(0x0f32, info), \ INTEL_VGA_DEVICE(0x0f33, info), \ INTEL_VGA_DEVICE(0x0157, info) #define INTEL_VLV_D_IDS(info) \ INTEL_VGA_DEVICE(0x0155, info) #define INTEL_BDW_GT12M_IDS(info) \ INTEL_VGA_DEVICE(0x1602, info), /* GT1 ULT */ \ INTEL_VGA_DEVICE(0x1606, info), /* GT1 ULT */ \ INTEL_VGA_DEVICE(0x160B, info), /* GT1 Iris */ \ INTEL_VGA_DEVICE(0x160E, info), /* GT1 ULX */ \ INTEL_VGA_DEVICE(0x1612, info), /* GT2 Halo */ \ INTEL_VGA_DEVICE(0x1616, info), /* GT2 ULT */ \ INTEL_VGA_DEVICE(0x161B, info), /* GT2 ULT */ \ INTEL_VGA_DEVICE(0x161E, info) /* GT2 ULX */ #define INTEL_BDW_GT12D_IDS(info) \ INTEL_VGA_DEVICE(0x160A, info), /* GT1 Server */ \ INTEL_VGA_DEVICE(0x160D, info), /* GT1 Workstation */ \ INTEL_VGA_DEVICE(0x161A, info), /* GT2 Server */ \ INTEL_VGA_DEVICE(0x161D, info) /* GT2 Workstation */ #define INTEL_BDW_GT3M_IDS(info) \ INTEL_VGA_DEVICE(0x1622, info), /* ULT */ \ INTEL_VGA_DEVICE(0x1626, info), /* ULT */ \ INTEL_VGA_DEVICE(0x162B, info), /* Iris */ \ INTEL_VGA_DEVICE(0x162E, info) /* ULX */ #define INTEL_BDW_GT3D_IDS(info) \ INTEL_VGA_DEVICE(0x162A, info), /* Server */ \ INTEL_VGA_DEVICE(0x162D, info) /* Workstation */ #define INTEL_BDW_RSVDM_IDS(info) \ INTEL_VGA_DEVICE(0x1632, info), /* ULT */ \ INTEL_VGA_DEVICE(0x1636, info), /* ULT */ \ INTEL_VGA_DEVICE(0x163B, info), /* Iris */ \ INTEL_VGA_DEVICE(0x163E, info) /* ULX */ #define INTEL_BDW_RSVDD_IDS(info) \ INTEL_VGA_DEVICE(0x163A, info), /* Server */ \ INTEL_VGA_DEVICE(0x163D, info) /* Workstation */ #define INTEL_BDW_M_IDS(info) \ INTEL_BDW_GT12M_IDS(info), \ INTEL_BDW_GT3M_IDS(info), \ INTEL_BDW_RSVDM_IDS(info) #define INTEL_BDW_D_IDS(info) \ INTEL_BDW_GT12D_IDS(info), \ INTEL_BDW_GT3D_IDS(info), \ INTEL_BDW_RSVDD_IDS(info) #define INTEL_CHV_IDS(info) \ INTEL_VGA_DEVICE(0x22b0, info), \ INTEL_VGA_DEVICE(0x22b1, info), \ INTEL_VGA_DEVICE(0x22b2, info), \ INTEL_VGA_DEVICE(0x22b3, info) #define INTEL_SKL_GT1_IDS(info) \ INTEL_VGA_DEVICE(0x1906, info), /* ULT GT1 */ \ INTEL_VGA_DEVICE(0x190E, info), /* ULX GT1 */ \ INTEL_VGA_DEVICE(0x1902, info), /* DT GT1 */ \ INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \ INTEL_VGA_DEVICE(0x190A, info) /* SRV GT1 */ #define INTEL_SKL_GT2_IDS(info) \ INTEL_VGA_DEVICE(0x1916, info), /* ULT GT2 */ \ INTEL_VGA_DEVICE(0x1921, info), /* ULT GT2F */ \ INTEL_VGA_DEVICE(0x191E, info), /* ULX GT2 */ \ INTEL_VGA_DEVICE(0x1912, info), /* DT GT2 */ \ INTEL_VGA_DEVICE(0x191B, info), /* Halo GT2 */ \ INTEL_VGA_DEVICE(0x191A, info), /* SRV GT2 */ \ INTEL_VGA_DEVICE(0x191D, info) /* WKS GT2 */ #define INTEL_SKL_GT3_IDS(info) \ INTEL_VGA_DEVICE(0x1926, info), /* ULT GT3 */ \ INTEL_VGA_DEVICE(0x192B, info), /* Halo GT3 */ \ INTEL_VGA_DEVICE(0x192A, info) /* SRV GT3 */ \ #define INTEL_SKL_IDS(info) \ INTEL_SKL_GT1_IDS(info), \ INTEL_SKL_GT2_IDS(info), \ INTEL_SKL_GT3_IDS(info) #define INTEL_BXT_IDS(info) \ INTEL_VGA_DEVICE(0x0A84, info), \ INTEL_VGA_DEVICE(0x1A84, info), \ INTEL_VGA_DEVICE(0x5A84, info) #endif /* _I915_PCIIDS_H */ intel-gpu-tools-1.14/overlay/Makefile.in0000644000175000017500000006573512665336443015204 00000000000000# Makefile.in generated by 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IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #ifndef GPU_TOP_H #define GPU_TOP_H #define MAX_RINGS 4 #include struct gpu_top { enum { PERF, MMIO } type; int fd; int num_rings; int have_wait; int have_sema; struct gpu_top_ring { const char *name; union gpu_top_payload { struct { uint8_t busy; uint8_t wait; uint8_t sema; } u; uint32_t payload; } u; } ring[MAX_RINGS]; struct gpu_top_stat { uint64_t time; uint64_t busy[MAX_RINGS]; uint64_t wait[MAX_RINGS]; uint64_t sema[MAX_RINGS]; } stat[2]; int count; }; void gpu_top_init(struct gpu_top *gt); int gpu_top_update(struct gpu_top *gt); #endif /* GPU_TOP_H */ intel-gpu-tools-1.14/overlay/chart.h0000644000175000017500000000457712665336131014400 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #ifndef CHART_H #define CHART_H struct chart { const char *name; int x, y, w, h; int num_samples; int current_sample; int range_automatic; enum chart_mode { CHART_STROKE = 0, CHART_FILL, CHART_FILL_STROKE, } mode; enum chart_smooth { CHART_LINE = 0, CHART_CURVE, } smooth; float fill_rgb[4]; float stroke_rgb[4]; double stroke_width; double range[2]; double *samples; }; int chart_init(struct chart *chart, const char *name, int num_samples); void chart_set_mode(struct chart *chart, enum chart_mode mode); void chart_set_smooth(struct chart *chart, enum chart_smooth smooth); void chart_set_fill_rgba(struct chart *chart, float red, float green, float blue, float alpha); void chart_set_stroke_width(struct chart *chart, float width); void chart_set_stroke_rgba(struct chart *chart, float red, float green, float blue, float alpha); void chart_set_position(struct chart *chart, int x, int y); void chart_set_size(struct chart *chart, int w, int h); void chart_set_range(struct chart *chart, double min, double max); void chart_add_sample(struct chart *chart, double value); void chart_draw(struct chart *chart, cairo_t *cr); void chart_fini(struct chart *chart); void chart_get_range(struct chart *chart, double *range); #endif /* CHART_H */ intel-gpu-tools-1.14/overlay/chart.c0000644000175000017500000001430312665336131014357 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include #include #include #include #include #include "chart.h" int chart_init(struct chart *chart, const char *name, int num_samples) { memset(chart, 0, sizeof(*chart)); chart->name = name; chart->samples = malloc(sizeof(*chart->samples)*num_samples); if (chart->samples == NULL) return ENOMEM; chart->num_samples = num_samples; chart->range_automatic = 1; chart->stroke_width = 2; chart->smooth = CHART_CURVE; return 0; } void chart_set_mode(struct chart *chart, enum chart_mode mode) { chart->mode = mode; } void chart_set_smooth(struct chart *chart, enum chart_smooth smooth) { chart->smooth = smooth; } void chart_set_stroke_width(struct chart *chart, float width) { chart->stroke_width = width; } void chart_set_stroke_rgba(struct chart *chart, float red, float green, float blue, float alpha) { chart->stroke_rgb[0] = red; chart->stroke_rgb[1] = green; chart->stroke_rgb[2] = blue; chart->stroke_rgb[3] = alpha; } void chart_set_fill_rgba(struct chart *chart, float red, float green, float blue, float alpha) { chart->fill_rgb[0] = red; chart->fill_rgb[1] = green; chart->fill_rgb[2] = blue; chart->fill_rgb[3] = alpha; } void chart_set_position(struct chart *chart, int x, int y) { chart->x = x; chart->y = y; } void chart_set_size(struct chart *chart, int w, int h) { chart->w = w; chart->h = h; } void chart_set_range(struct chart *chart, double min, double max) { chart->range[0] = min; chart->range[1] = max; chart->range_automatic = 0; } void chart_get_range(struct chart *chart, double *range) { int n, max = chart->current_sample; if (max > chart->num_samples) max = chart->num_samples; for (n = 0; n < max; n++) { if (chart->samples[n] < range[0]) range[0] = chart->samples[n]; else if (chart->samples[n] > range[1]) range[1] = chart->samples[n]; } } void chart_add_sample(struct chart *chart, double value) { int pos; if (chart->num_samples == 0) return; pos = chart->current_sample++ % chart->num_samples; chart->samples[pos] = value; } static void chart_update_range(struct chart *chart) { int n, max = chart->current_sample; if (max > chart->num_samples) max = chart->num_samples; chart->range[0] = chart->range[1] = chart->samples[0]; for (n = 1; n < max; n++) { if (chart->samples[n] < chart->range[0]) chart->range[0] = chart->samples[n]; else if (chart->samples[n] > chart->range[1]) chart->range[1] = chart->samples[n]; } if (strcmp(chart->name, "power") == 0) printf ("chart_update_range [%f, %f]\n", chart->range[0], chart->range[1]); } static double value_at(struct chart *chart, int n) { if (n < chart->current_sample - chart->num_samples) n = chart->current_sample; else if (n >= chart->current_sample) n = chart->current_sample - 1; n %= chart->num_samples; if (n < 0) n += chart->num_samples; return chart->samples[n]; } static double gradient_at(struct chart *chart, int n) { double y0, y1; y0 = value_at(chart, n-1); y1 = value_at(chart, n+1); return (y1 - y0) / 2.; } void chart_draw(struct chart *chart, cairo_t *cr) { int i, n, max, x; if (chart->current_sample == 0) return; if (chart->range_automatic) chart_update_range(chart); if (chart->range[1] <= chart->range[0]) return; cairo_save(cr); cairo_translate(cr, chart->x, chart->y + chart->h); cairo_scale(cr, chart->w / (double)(chart->num_samples-1), -chart->h / (chart->range[1] - chart->range[0])); x = 0; max = chart->current_sample; if (max >= chart->num_samples) { max = chart->num_samples; i = chart->current_sample - max; } else { i = 0; x = chart->num_samples - max; } cairo_translate(cr, x, -chart->range[0]); cairo_new_path(cr); if (chart->mode != CHART_STROKE) cairo_move_to(cr, 0, 0); for (n = 0; n < max; n++) { switch (chart->smooth) { case CHART_LINE: cairo_line_to(cr, n, value_at(chart, i + n)); break; case CHART_CURVE: cairo_curve_to(cr, n-2/3., value_at(chart, i + n -1) + gradient_at(chart, i + n - 1)/3., n-1/3., value_at(chart, i + n) - gradient_at(chart, i + n)/3., n, value_at(chart, i + n)); break; } } if (chart->mode != CHART_STROKE) cairo_line_to(cr, n-1, 0); cairo_identity_matrix(cr); cairo_set_line_width(cr, chart->stroke_width); switch (chart->mode) { case CHART_STROKE: cairo_set_source_rgba(cr, chart->stroke_rgb[0], chart->stroke_rgb[1], chart->stroke_rgb[2], chart->stroke_rgb[3]); cairo_stroke(cr); break; case CHART_FILL: cairo_set_source_rgba(cr, chart->fill_rgb[0], chart->fill_rgb[1], chart->fill_rgb[2], chart->fill_rgb[3]); cairo_fill(cr); break; case CHART_FILL_STROKE: cairo_set_antialias(cr, CAIRO_ANTIALIAS_NONE); cairo_set_source_rgba(cr, chart->fill_rgb[0], chart->fill_rgb[1], chart->fill_rgb[2], chart->fill_rgb[3]); cairo_fill_preserve(cr); cairo_set_antialias(cr, CAIRO_ANTIALIAS_DEFAULT); cairo_set_source_rgba(cr, chart->stroke_rgb[0], chart->stroke_rgb[1], chart->stroke_rgb[2], chart->stroke_rgb[3]); cairo_stroke(cr); break; } cairo_restore(cr); } void chart_fini(struct chart *chart) { free(chart->samples); } intel-gpu-tools-1.14/overlay/config.c0000644000175000017500000001425712665336131014533 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include #include #include #include #include #include #include #include #include #include #include "overlay.h" #define DEFAULT_SECTION "window" static const char *skip_whitespace(const char *s, const char *end) { while (s < end && isspace(*s)) s++; return s; } static const char *trim_whitespace(const char *s, const char *end) { if (end == NULL) return end; while (end > s && isspace(*--end)) ; return end + 1; } static int is_eol(int c) { return c == '\n' || c == '\r'; } static const char *skip_past_eol(const char *s, const char *end) { while (s < end && !is_eol(*s++)) ; return s; } static const char *find(const char *s, const char *end, int c) { while (s < end && *s != c) { if (*s == '#') break; if (*s == '\n') return NULL; s++; } return c == '\n' ? s : s < end ? s : NULL; } static int parse(const char *buf, int len, int (*func)(const char *section, const char *name, const char *value, void *data), void *data) { char section[128] = DEFAULT_SECTION, name[128], value[128]; const char *buf_end = buf + len; const char *end; int has_section = 0; int line; for (line = 0 ; ++line; buf = skip_past_eol(buf, buf_end)) { buf = skip_whitespace(buf, buf_end); if (buf >= buf_end) break; if (*buf == ';' || *buf == '#') { /* comment */ } else if (*buf == '[') { /* new section */ end = find(++buf, buf_end, ']'); if (end == NULL) return line; end = trim_whitespace(buf, end); if (end <= buf) continue; len = end - buf; if (len == 0 || len >= sizeof(section)) return line; memcpy(section, buf, len); section[len] = '\0'; has_section = 1; } else { /* name = value */ const char *sep; int has_value = 1; sep = find(buf, buf_end, '='); if (sep == NULL) sep = find(buf, buf_end, ':'); if (sep == NULL) { sep = find(buf, buf_end, '\n'); has_value = 0; } end = trim_whitespace(buf, sep); if (end <= buf) continue; len = end - buf; if (len == 0 || len >= sizeof(name)) return line; memcpy(name, buf, len); name[len] = '\0'; if (has_value) { buf = skip_whitespace(sep + 1, buf_end); end = find(buf, buf_end, '\n'); end = trim_whitespace(buf, end); len = end - buf; if (len >= sizeof(name)) return line; memcpy(value, buf, len); value[len] = '\0'; } else *value = '\0'; if (!has_section) { char *dot; dot = strchr(name, '.'); if (dot && dot[1]) { *dot = '\0'; if (!func(name, dot+1, value, data)) return line; continue; } } if (!func(section, name, value, data)) return line; } } return 0; } static int add_value(const char *section, const char *name, const char *value, void *data) { struct config *c = data; struct config_section *s; struct config_value *v, **prev; for (s = c->sections; s != NULL; s = s->next) if (strcmp(s->name, section) == 0) break; if (s == NULL) { int len = strlen(section) + 1; s = malloc(sizeof(*s)+len); if (s == NULL) return 0; memcpy(s->name, section, len); s->values = NULL; s->next = c->sections; c->sections = s; } for (prev = &s->values; (v = *prev) != NULL; prev = &v->next) { if (strcmp(v->name, name) == 0) { *prev = v->next; free(v); break; } } { int name_len = strlen(name) + 1; int value_len = strlen(value) + 1; v = malloc(sizeof(*v) + name_len + value_len); if (v == NULL) return 0; v->name = memcpy(v+1, name, name_len); v->value = memcpy(v->name + name_len, value, value_len); v->next = s->values; s->values = v; } return 1; } static int config_init_from_file(struct config *config, const char *filename) { struct stat st; int fd, err = -1; char *str; fd = open(filename, 0); if (fd < 0) return -1; if (fstat(fd, &st) < 0) goto err_fd; if ((str = mmap(0, st.st_size, PROT_READ, MAP_SHARED, fd, 0)) == (void *)-1) goto err_fd; err = parse(str, st.st_size, add_value, config); munmap(str, st.st_size); err_fd: close(fd); return err; } void config_init(struct config *config) { memset(config, 0, sizeof(*config)); } void config_parse_string(struct config *config, const char *str) { int err; if (str == NULL) return; err = config_init_from_file(config, str); if (err == -1) err = parse(str, strlen(str), add_value, config); if (err) { fprintf(stderr, "Failed to parse config string at line %d\n", err); exit(1); } } void config_set_value(struct config *c, const char *section, const char *name, const char *value) { add_value(section, name, value, c); } const char *config_get_value(struct config *c, const char *section, const char *name) { struct config_section *s; struct config_value *v; for (s = c->sections; s != NULL; s = s->next) { if (strcmp(s->name, section)) continue; for (v = s->values; v != NULL; v = v->next) { if (strcmp(v->name, name)) continue; return v->value; } } return NULL; } intel-gpu-tools-1.14/overlay/cpu-top.c0000644000175000017500000000440612665336131014650 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include #include #include #include #include #include #include "cpu-top.h" int cpu_top_init(struct cpu_top *cpu) { memset(cpu, 0, sizeof(*cpu)); cpu->nr_cpu = sysconf(_SC_NPROCESSORS_ONLN); return 0; } int cpu_top_update(struct cpu_top *cpu) { struct cpu_stat *s = &cpu->stat[cpu->count++&1]; struct cpu_stat *d = &cpu->stat[cpu->count&1]; uint64_t d_total, d_idle; char buf[4096], *b; int fd, len = -1; fd = open("/proc/stat", 0); if (fd < 0) return errno; len = read(fd, buf, sizeof(buf)-1); close(fd); if (len < 0) return EIO; buf[len] = '\0'; #ifdef __x86_64__ sscanf(buf, "cpu %lu %lu %lu %lu", &s->user, &s->nice, &s->sys, &s->idle); #else sscanf(buf, "cpu %llu %llu %llu %llu", &s->user, &s->nice, &s->sys, &s->idle); #endif b = strstr(buf, "procs_running"); if (b) cpu->nr_running = atoi(b+sizeof("procs_running")) - 1; s->total = s->user + s->nice + s->sys + s->idle; if (cpu->count == 1) return EAGAIN; d_total = s->total - d->total; d_idle = s->idle - d->idle; cpu->busy = 100 - 100 * d_idle / d_total; return 0; } intel-gpu-tools-1.14/overlay/gpu-freq.c0000644000175000017500000001072612665336131015011 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include #include #include #include #include #include "gpu-freq.h" #include "debugfs.h" #include "perf.h" static int perf_i915_open(int config, int group) { struct perf_event_attr attr; memset(&attr, 0, sizeof (attr)); attr.type = i915_type_id(); if (attr.type == 0) return -ENOENT; attr.config = config; attr.read_format = PERF_FORMAT_TOTAL_TIME_ENABLED; if (group == -1) attr.read_format |= PERF_FORMAT_GROUP; return perf_event_open(&attr, -1, 0, group, 0); } static int perf_open(void) { int fd; fd = perf_i915_open(I915_PERF_ACTUAL_FREQUENCY, -1); if (perf_i915_open(I915_PERF_REQUESTED_FREQUENCY, fd) < 0) { close(fd); fd = -1; } return fd; } int gpu_freq_init(struct gpu_freq *gf) { char buf[4096], *s; int fd, len = -1; memset(gf, 0, sizeof(*gf)); gf->fd = perf_open(); sprintf(buf, "%s/i915_frequency_info", debugfs_dri_path); fd = open(buf, 0); if (fd < 0) { sprintf(buf, "%s/i915_cur_delayinfo", debugfs_dri_path); fd = open(buf, 0); } if (fd < 0) return gf->error = errno; len = read(fd, buf, sizeof(buf)-1); close(fd); if (len < 0) goto err; buf[len] = '\0'; if (strstr(buf, "PUNIT_REG_GPU_FREQ_STS")) { /* Baytrail is special, ofc. */ gf->is_byt = 1; s = strstr(buf, "max"); if (s != NULL) sscanf(s, "max GPU freq: %d MHz", &gf->max); s = strstr(buf, "min"); if (s != NULL) sscanf(s, "min GPU freq: %d MHz", &gf->min); gf->rp0 = gf->rp1 = gf->max; gf->rpn = gf->min; } else { s = strstr(buf, "(RPN)"); if (s == NULL) goto err; sscanf(s, "(RPN) frequency: %dMHz", &gf->rpn); s = strstr(s, "(RP1)"); if (s == NULL) goto err; sscanf(s, "(RP1) frequency: %dMHz", &gf->rp1); s = strstr(s, "(RP0)"); if (s == NULL) goto err; sscanf(s, "(RP0) frequency: %dMHz", &gf->rp0); s = strstr(s, "Max"); if (s == NULL) goto err; sscanf(s, "Max overclocked frequency: %dMHz", &gf->max); gf->min = gf->rpn; } return 0; err: return gf->error = EIO; } int gpu_freq_update(struct gpu_freq *gf) { if (gf->error) return gf->error; if (gf->fd < 0) { char buf[4096], *s; int fd, len = -1; sprintf(buf, "%s/i915_frequency_info", debugfs_dri_path); fd = open(buf, 0); if (fd < 0) { sprintf(buf, "%s/i915_cur_delayinfo", debugfs_dri_path); fd = open(buf, 0); } if (fd < 0) return gf->error = errno; len = read(fd, buf, sizeof(buf)-1); close(fd); if (len < 0) return gf->error = EIO; buf[len] = '\0'; if (gf->is_byt) { s = strstr(buf, "current"); if (s) sscanf(s, "current GPU freq: %d MHz", &gf->current); gf->request = gf->current; } else { s = strstr(buf, "RPNSWREQ:"); if (s) sscanf(s, "RPNSWREQ: %dMHz", &gf->request); s = strstr(buf, "CAGF:"); if (s) sscanf(s, "CAGF: %dMHz", &gf->current); } } else { struct gpu_freq_stat *s = &gf->stat[gf->count++&1]; struct gpu_freq_stat *d = &gf->stat[gf->count&1]; uint64_t data[4], d_time; int len; len = read(gf->fd, data, sizeof(data)); if (len < 0) return gf->error = errno; s->timestamp = data[1]; s->act = data[2]; s->req = data[3]; if (gf->count == 1) return EAGAIN; d_time = s->timestamp - d->timestamp; if (d_time == 0) { gf->count--; return EAGAIN; } gf->current = (s->act - d->act) / d_time; gf->request = (s->req - d->req) / d_time; } return 0; } intel-gpu-tools-1.14/overlay/gem-objects.h0000644000175000017500000000313612665336131015464 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #ifndef GEM_OBJECTS_H #define GEM_OBJECTS_H #include struct gem_objects { long unsigned total_bytes, total_count; long unsigned total_gtt, total_aperture; long unsigned max_gtt, max_aperture; struct gem_objects_comm { struct gem_objects_comm *next; char name[256]; long unsigned bytes; long unsigned count; } *comm; }; int gem_objects_init(struct gem_objects *obj); int gem_objects_update(struct gem_objects *obj); #endif /* GEM_OBJECTS_H */ intel-gpu-tools-1.14/overlay/perf.c0000644000175000017500000000057112665336131014214 00000000000000#include #include #include #include #include "perf.h" uint64_t i915_type_id(void) { char buf[1024]; int fd, n; fd = open("/sys/bus/event_source/devices/i915/type", 0); if (fd < 0) { n = -1; } else { n = read(fd, buf, sizeof(buf)-1); close(fd); } if (n < 0) return 0; buf[n] = '\0'; return strtoull(buf, 0, 0); } intel-gpu-tools-1.14/overlay/overlay.c0000644000175000017500000006367112665336131014753 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "overlay.h" #include "chart.h" #include "config.h" #include "cpu-top.h" #include "debugfs.h" #include "gem-interrupts.h" #include "gem-objects.h" #include "gpu-freq.h" #include "gpu-top.h" #include "gpu-perf.h" #include "power.h" #include "rc6.h" #define is_power_of_two(x) (((x) & ((x)-1)) == 0) #define PAD 10 #define HALF_PAD 5 #define SIZE_PAD (PAD + HALF_PAD) #define IDLE_TIME 30 const cairo_user_data_key_t overlay_key; static void overlay_show(cairo_surface_t *surface) { struct overlay *overlay; overlay = cairo_surface_get_user_data(surface, &overlay_key); if (overlay == NULL) return; overlay->show(overlay); } #if 0 static void overlay_position(cairo_surface_t *surface, enum position p) { struct overlay *overlay; overlay = cairo_surface_get_user_data(surface, &overlay_key); if (overlay == NULL) return; overlay->position(overlay, p); } static void overlay_hide(cairo_surface_t *surface) { struct overlay *overlay; overlay = cairo_surface_get_user_data(surface, &overlay_key); if (overlay == NULL) return; overlay->hide(overlay); } #endif struct overlay_gpu_top { struct gpu_top gpu_top; struct cpu_top cpu_top; struct chart busy[MAX_RINGS]; struct chart wait[MAX_RINGS]; struct chart cpu; }; struct overlay_gpu_perf { struct gpu_perf gpu_perf; time_t show_ctx; time_t show_flips; }; struct overlay_gpu_freq { struct gpu_freq gpu_freq; struct rc6 rc6; struct gem_interrupts irqs; struct power power; struct chart current; struct chart request; struct chart power_chart; double power_max; }; struct overlay_gem_objects { struct gem_objects gem_objects; struct chart aperture; struct chart gtt; int error; }; struct overlay_context { cairo_surface_t *surface; cairo_t *cr; int width, height; time_t time; struct overlay_gpu_top gpu_top; struct overlay_gpu_perf gpu_perf; struct overlay_gpu_freq gpu_freq; struct overlay_gem_objects gem_objects; }; static void init_gpu_top(struct overlay_context *ctx, struct overlay_gpu_top *gt) { const double rgba[][4] = { { 1, 0.25, 0.25, 1 }, { 0.25, 1, 0.25, 1 }, { 0.25, 0.25, 1, 1 }, { 1, 1, 1, 1 }, }; int n; cpu_top_init(>->cpu_top); gpu_top_init(>->gpu_top); chart_init(>->cpu, "CPU", 120); chart_set_position(>->cpu, PAD, PAD); chart_set_size(>->cpu, ctx->width/2 - SIZE_PAD, ctx->height/2 - SIZE_PAD); chart_set_stroke_rgba(>->cpu, 0.75, 0.25, 0.75, 1.); chart_set_mode(>->cpu, CHART_STROKE); chart_set_range(>->cpu, 0, 100); for (n = 0; n < gt->gpu_top.num_rings; n++) { chart_init(>->busy[n], gt->gpu_top.ring[n].name, 120); chart_set_position(>->busy[n], PAD, PAD); chart_set_size(>->busy[n], ctx->width/2 - SIZE_PAD, ctx->height/2 - SIZE_PAD); chart_set_stroke_rgba(>->busy[n], rgba[n][0], rgba[n][1], rgba[n][2], rgba[n][3]); chart_set_mode(>->busy[n], CHART_STROKE); chart_set_range(>->busy[n], 0, 100); } for (n = 0; n < gt->gpu_top.num_rings; n++) { chart_init(>->wait[n], gt->gpu_top.ring[n].name, 120); chart_set_position(>->wait[n], PAD, PAD); chart_set_size(>->wait[n], ctx->width/2 - SIZE_PAD, ctx->height/2 - SIZE_PAD); chart_set_fill_rgba(>->wait[n], rgba[n][0], rgba[n][1], rgba[n][2], rgba[n][3] * 0.70); chart_set_mode(>->wait[n], CHART_FILL); chart_set_range(>->wait[n], 0, 100); } } static void show_gpu_top(struct overlay_context *ctx, struct overlay_gpu_top *gt) { int y, y1, y2, n, update, len; cairo_pattern_t *linear; char txt[160]; int rewind; int do_rewind; update = gpu_top_update(>->gpu_top); cairo_rectangle(ctx->cr, PAD-.5, PAD-.5, ctx->width/2-SIZE_PAD+1, ctx->height/2-SIZE_PAD+1); cairo_set_source_rgb(ctx->cr, .15, .15, .15); cairo_set_line_width(ctx->cr, 1); cairo_stroke(ctx->cr); if (update && cpu_top_update(>->cpu_top) == 0) chart_add_sample(>->cpu, gt->cpu_top.busy); for (n = 0; n < gt->gpu_top.num_rings; n++) { if (update) chart_add_sample(>->wait[n], gt->gpu_top.ring[n].u.u.wait + gt->gpu_top.ring[n].u.u.sema); chart_draw(>->wait[n], ctx->cr); } for (n = 0; n < gt->gpu_top.num_rings; n++) { if (update) chart_add_sample(>->busy[n], gt->gpu_top.ring[n].u.u.busy); chart_draw(>->busy[n], ctx->cr); } chart_draw(>->cpu, ctx->cr); y1 = PAD - 2; y2 = y1 + (gt->gpu_top.num_rings+1) * 14 + 4; cairo_rectangle(ctx->cr, PAD, y1, ctx->width/2-SIZE_PAD, y2-y1); linear = cairo_pattern_create_linear(PAD, 0, PAD+ctx->width/2-SIZE_PAD, 0); cairo_pattern_add_color_stop_rgba(linear, 0, 0, 0, 0, .5); cairo_pattern_add_color_stop_rgba(linear, 1, 0, 0, 0, .0); cairo_set_source(ctx->cr, linear); cairo_pattern_destroy(linear); cairo_fill(ctx->cr); y = PAD + 12 - 2; cairo_set_source_rgba(ctx->cr, 0.75, 0.25, 0.75, 1.); cairo_move_to(ctx->cr, PAD, y); rewind = len = sprintf(txt, "CPU: %3d%% busy", gt->cpu_top.busy * gt->cpu_top.nr_cpu); do_rewind = 1; len += sprintf(txt + len, " ("); if (gt->cpu_top.nr_cpu > 1) { len += sprintf(txt + len, "%s%d cores", do_rewind ? "" : ", ", gt->cpu_top.nr_cpu); do_rewind = 0; } if (gt->cpu_top.nr_running) { len += sprintf(txt + len, "%s%d processes", do_rewind ? "" : ", ", gt->cpu_top.nr_running); do_rewind = 0; } sprintf(txt + len, ")"); if (do_rewind) txt[rewind] = '\0'; cairo_show_text(ctx->cr, txt); y += 14; for (n = 0; n < gt->gpu_top.num_rings; n++) { struct chart *c =>->busy[n]; len = sprintf(txt, "%s: %3d%% busy", gt->gpu_top.ring[n].name, gt->gpu_top.ring[n].u.u.busy); if (gt->gpu_top.ring[n].u.u.wait) len += sprintf(txt + len, ", %d%% wait", gt->gpu_top.ring[n].u.u.wait); if (gt->gpu_top.ring[n].u.u.sema) len += sprintf(txt + len, ", %d%% sema", gt->gpu_top.ring[n].u.u.sema); cairo_set_source_rgba(ctx->cr, c->stroke_rgb[0], c->stroke_rgb[1], c->stroke_rgb[2], c->stroke_rgb[3]); cairo_move_to(ctx->cr, PAD, y); cairo_show_text(ctx->cr, txt); y += 14; } } static void init_gpu_perf(struct overlay_context *ctx, struct overlay_gpu_perf *gp) { gpu_perf_init(&gp->gpu_perf, 0); gp->show_ctx = 0; gp->show_flips = 0; } static char *get_comm(pid_t pid, char *comm, int len) { char filename[1024]; int fd; *comm = '\0'; snprintf(filename, sizeof(filename), "/proc/%d/comm", pid); fd = open(filename, 0); if (fd >= 0) { len = read(fd, comm, len); if (len >= 0) comm[len-1] = '\0'; close(fd); } return comm; } static void show_gpu_perf(struct overlay_context *ctx, struct overlay_gpu_perf *gp) { static int last_color; const double rgba[][4] = { { 1, 0.25, 0.25, 1 }, { 0.25, 1, 0.25, 1 }, { 0.25, 0.25, 1, 1 }, { 1, 1, 1, 1 }, }; struct gpu_perf_comm *comm, **prev; const char *ring_name[] = { "R", "V", "B", }; double range[2]; char buf[1024]; cairo_pattern_t *linear; int x, y, y1, y2, n; int has_ctx = 0; int has_flips = 0; gpu_perf_update(&gp->gpu_perf); for (n = 0; n < 4; n++) { if (gp->gpu_perf.ctx_switch[n]) has_ctx = n + 1; if (gp->gpu_perf.flip_complete[n]) has_flips = n + 1; } cairo_rectangle(ctx->cr, ctx->width/2+HALF_PAD-.5, PAD-.5, ctx->width/2-SIZE_PAD+1, ctx->height/2-SIZE_PAD+1); cairo_set_source_rgb(ctx->cr, .15, .15, .15); cairo_set_line_width(ctx->cr, 1); cairo_stroke(ctx->cr); if (gp->gpu_perf.error) { cairo_text_extents_t extents; cairo_text_extents(ctx->cr, gp->gpu_perf.error, &extents); cairo_move_to(ctx->cr, ctx->width/2+HALF_PAD + (ctx->width/2-SIZE_PAD - extents.width)/2., PAD + (ctx->height/2-SIZE_PAD + extents.height)/2.); cairo_show_text(ctx->cr, gp->gpu_perf.error); return; } if (gp->gpu_perf.comm == NULL && (has_ctx|has_flips) == 0) { cairo_text_extents_t extents; cairo_text_extents(ctx->cr, gp->gpu_perf.error, &extents); cairo_move_to(ctx->cr, ctx->width/2+HALF_PAD + (ctx->width/2-SIZE_PAD - extents.width)/2., PAD + (ctx->height/2-SIZE_PAD + extents.height)/2.); cairo_show_text(ctx->cr, "idle"); return; } y = PAD + 12 - 2; x = ctx->width/2 + HALF_PAD; for (comm = gp->gpu_perf.comm; comm; comm = comm->next) { int total; if (comm->name[0] == '\0') continue; if (strncmp(comm->name, "kworker", 7) == 0) continue; if (comm->user_data == NULL) { comm->user_data = malloc(sizeof(struct chart)); if (comm->user_data == NULL) continue; chart_init(comm->user_data, comm->name, 120); chart_set_position(comm->user_data, ctx->width/2+HALF_PAD, PAD); chart_set_size(comm->user_data, ctx->width/2-SIZE_PAD, ctx->height/2 - SIZE_PAD); chart_set_mode(comm->user_data, CHART_STROKE); chart_set_stroke_rgba(comm->user_data, rgba[last_color][0], rgba[last_color][1], rgba[last_color][2], rgba[last_color][3]); last_color = (last_color + 1) % 4; chart_set_stroke_width(comm->user_data, 1); } total = 0; for (n = 0; n < 3; n++) total += comm->nr_requests[n]; chart_add_sample(comm->user_data, total); } range[0] = range[1] = 0; for (comm = gp->gpu_perf.comm; comm; comm = comm->next) { if (comm->user_data == NULL) continue; chart_get_range(comm->user_data, range); } y2 = y1 = y; for (comm = gp->gpu_perf.comm; comm; comm = comm->next) { if (comm->user_data == NULL) continue; chart_set_range(comm->user_data, range[0], range[1]); chart_draw(comm->user_data, ctx->cr); y2 += 14; } if (has_flips || gp->show_flips) y2 += 14; if (has_ctx || gp->show_ctx) y2 += 14; y1 += -12 - 2; y2 += -14 + 4; cairo_rectangle(ctx->cr, x, y1, ctx->width/2-SIZE_PAD, y2-y1); linear = cairo_pattern_create_linear(x, 0, x + ctx->width/2-SIZE_PAD, 0); cairo_pattern_add_color_stop_rgba(linear, 0, 0, 0, 0, .5); cairo_pattern_add_color_stop_rgba(linear, 1, 0, 0, 0, .0); cairo_set_source(ctx->cr, linear); cairo_pattern_destroy(linear); cairo_fill(ctx->cr); for (prev = &gp->gpu_perf.comm; (comm = *prev) != NULL; ) { int need_comma = 0, len; if (comm->user_data == NULL) goto skip_comm; len = sprintf(buf, "%s:", comm->name); for (n = 0; n < 3; n++) { if (comm->nr_requests[n] == 0) continue; len += sprintf(buf + len, "%s %d%s", need_comma ? "," : "", comm->nr_requests[n], ring_name[n]); need_comma = true; comm->show = ctx->time; } if (comm->wait_time) { if (comm->wait_time > 1000*1000) { len += sprintf(buf + len, "%s %.1fms waits", need_comma ? "," : "", comm->wait_time / (1000*1000.)); } else if (comm->wait_time > 100) { len += sprintf(buf + len, "%s %.1fus waits", need_comma ? "," : "", comm->wait_time / 1000.); } else { len += sprintf(buf, "%s %.0fns waits", need_comma ? "," : "", (double)comm->wait_time); } need_comma = true; comm->wait_time = 0; comm->show = ctx->time; } if (comm->nr_sema) { len += sprintf(buf + len, "%s %d syncs", need_comma ? "," : "", comm->nr_sema); need_comma = true; comm->nr_sema = 0; comm->show = ctx->time; } if (comm->user_data) { struct chart *c = comm->user_data; cairo_set_source_rgba(ctx->cr, c->stroke_rgb[0], c->stroke_rgb[1], c->stroke_rgb[2], c->stroke_rgb[3]); } else cairo_set_source_rgba(ctx->cr, 1, 1, 1, 1); cairo_move_to(ctx->cr, x, y); cairo_show_text(ctx->cr, buf); y += 14; skip_comm: memset(comm->nr_requests, 0, sizeof(comm->nr_requests)); if (!comm->active && (comm->show < ctx->time - IDLE_TIME || strcmp(comm->name, get_comm(comm->pid, buf, sizeof(buf))))) { *prev = comm->next; if (comm->user_data) { chart_fini(comm->user_data); free(comm->user_data); } free(comm); } else prev = &comm->next; } cairo_set_source_rgba(ctx->cr, 1, 1, 1, 1); cairo_move_to(ctx->cr, x, y); if (has_flips) { int len = sprintf(buf, "Flips:"); for (n = 0; n < has_flips; n++) len += sprintf(buf + len, "%s %d", n ? "," : "", gp->gpu_perf.flip_complete[n]); memset(gp->gpu_perf.flip_complete, 0, sizeof(gp->gpu_perf.flip_complete)); gp->show_flips = ctx->time; cairo_show_text(ctx->cr, buf); y += 14; } else if (gp->show_flips) { cairo_show_text(ctx->cr, "Flips: 0"); if (ctx->time - gp->show_flips > IDLE_TIME) gp->show_flips = 0; y += 14; } cairo_set_source_rgba(ctx->cr, 1, 1, 1, 1); cairo_move_to(ctx->cr, x, y); if (has_ctx) { int len = sprintf(buf, "Contexts:"); for (n = 0; n < has_ctx; n++) len += sprintf(buf + len, "%s %d", n ? "," : "", gp->gpu_perf.ctx_switch[n]); memset(gp->gpu_perf.ctx_switch, 0, sizeof(gp->gpu_perf.ctx_switch)); gp->show_ctx = ctx->time; cairo_show_text(ctx->cr, buf); y += 14; } else if (gp->show_ctx) { cairo_show_text(ctx->cr, "Contexts: 0"); y += 14; if (ctx->time - gp->show_ctx > IDLE_TIME) gp->show_ctx = 0; } } static void init_gpu_freq(struct overlay_context *ctx, struct overlay_gpu_freq *gf) { if (gpu_freq_init(&gf->gpu_freq) == 0) { chart_init(&gf->current, "current", 120); chart_set_position(&gf->current, PAD, ctx->height/2 + HALF_PAD); chart_set_size(&gf->current, ctx->width/2 - SIZE_PAD, ctx->height/2 - SIZE_PAD); chart_set_stroke_rgba(&gf->current, 0.75, 0.25, 0.50, 1.); chart_set_mode(&gf->current, CHART_STROKE); chart_set_smooth(&gf->current, CHART_LINE); chart_set_range(&gf->current, 0, gf->gpu_freq.max); chart_init(&gf->request, "request", 120); chart_set_position(&gf->request, PAD, ctx->height/2 + HALF_PAD); chart_set_size(&gf->request, ctx->width/2 - SIZE_PAD, ctx->height/2 - SIZE_PAD); chart_set_fill_rgba(&gf->request, 0.25, 0.25, 0.50, 1.); chart_set_mode(&gf->request, CHART_FILL); chart_set_smooth(&gf->request, CHART_LINE); chart_set_range(&gf->request, 0, gf->gpu_freq.max); } if (power_init(&gf->power) == 0) { chart_init(&gf->power_chart, "power", 120); chart_set_position(&gf->power_chart, PAD, ctx->height/2 + HALF_PAD); chart_set_size(&gf->power_chart, ctx->width/2 - SIZE_PAD, ctx->height/2 - SIZE_PAD); chart_set_stroke_rgba(&gf->power_chart, 0.45, 0.55, 0.45, 1.); gf->power_max = 0; } rc6_init(&gf->rc6); gem_interrupts_init(&gf->irqs); } static void show_gpu_freq(struct overlay_context *ctx, struct overlay_gpu_freq *gf) { char buf[160]; int y1, y2, y, len; int has_freq = gpu_freq_update(&gf->gpu_freq) == 0; int has_rc6 = rc6_update(&gf->rc6) == 0; int has_power = power_update(&gf->power) == 0; int has_irqs = gem_interrupts_update(&gf->irqs) == 0; cairo_pattern_t *linear; cairo_rectangle(ctx->cr, PAD-.5, ctx->height/2+HALF_PAD-.5, ctx->width/2-SIZE_PAD+1, ctx->height/2-SIZE_PAD+1); cairo_set_source_rgb(ctx->cr, .15, .15, .15); cairo_set_line_width(ctx->cr, 1); cairo_stroke(ctx->cr); if (gf->gpu_freq.error) { const char *txt = "GPU frequency not found in debugfs"; cairo_text_extents_t extents; cairo_text_extents(ctx->cr, txt, &extents); cairo_move_to(ctx->cr, PAD + (ctx->width/2-SIZE_PAD - extents.width)/2., ctx->height/2+HALF_PAD + (ctx->height/2-SIZE_PAD + extents.height)/2.); cairo_show_text(ctx->cr, txt); return; } if (has_freq) { if (gf->gpu_freq.current) chart_add_sample(&gf->current, gf->gpu_freq.current); if (gf->gpu_freq.request) chart_add_sample(&gf->request, gf->gpu_freq.request); chart_draw(&gf->request, ctx->cr); chart_draw(&gf->current, ctx->cr); } if (has_power) { chart_add_sample(&gf->power_chart, gf->power.power_mW); if (gf->power.new_sample) { if (gf->power.power_mW > gf->power_max) gf->power_max = gf->power.power_mW; chart_set_range(&gf->power_chart, 0, gf->power_max); gf->power.new_sample = 0; } chart_draw(&gf->power_chart, ctx->cr); } y = ctx->height/2 + HALF_PAD + 12 - 2; y1 = y2 = y; if (has_freq) { y2 += 12; y2 += 12; } if (has_rc6) y2 += 14; if (has_power) y2 += 14; if (has_irqs) y2 += 14; y1 += -12 - 2; y2 += -14 + 4; cairo_rectangle(ctx->cr, PAD, y1, ctx->width/2-SIZE_PAD, y2-y1); linear = cairo_pattern_create_linear(PAD, 0, PAD+ctx->width/2-SIZE_PAD, 0); cairo_pattern_add_color_stop_rgba(linear, 0, 0, 0, 0, .5); cairo_pattern_add_color_stop_rgba(linear, 1, 0, 0, 0, .0); cairo_set_source(ctx->cr, linear); cairo_pattern_destroy(linear); cairo_fill(ctx->cr); if (has_freq) { cairo_text_extents_t extents; len = sprintf(buf, "Frequency: %dMHz", gf->gpu_freq.current); if (gf->gpu_freq.request) cairo_set_source_rgba(ctx->cr, 1, 1, 1, 1); sprintf(buf + len, " (requested %dMHz)", gf->gpu_freq.request); cairo_move_to(ctx->cr, PAD, y); cairo_show_text(ctx->cr, buf); y += 12; cairo_text_extents(ctx->cr, "Frequency: ", &extents); cairo_set_font_size(ctx->cr, 8); sprintf(buf, " min: %dMHz, max: %dMHz", gf->gpu_freq.min, gf->gpu_freq.max); cairo_set_source_rgba(ctx->cr, .8, .8, .8, 1); cairo_move_to(ctx->cr, PAD + extents.width, y); cairo_show_text(ctx->cr, buf); cairo_set_font_size(ctx->cr, 10); y += 12; } if (has_rc6) { len = sprintf(buf, "RC6: %d%%", gf->rc6.rc6_combined); cairo_set_source_rgba(ctx->cr, 1, 1, 1, 1); cairo_move_to(ctx->cr, PAD, y); if (gf->rc6.rc6_combined) { int need_comma = 0; int rewind = len; len += sprintf(buf + len, " ("); if (gf->rc6.rc6) { len += sprintf(buf + len, "%src6=%d%%", need_comma ? ", " : "", gf->rc6.rc6); need_comma++; } if (gf->rc6.rc6p) { len += sprintf(buf + len, "%src6p=%d%%", need_comma ? ", " : "", gf->rc6.rc6p); need_comma++; } if (gf->rc6.rc6pp) { len += sprintf(buf + len, "%src6pp=%d%%", need_comma ? ", " : "", gf->rc6.rc6pp); need_comma++; } sprintf(buf + len, ")"); if (need_comma <= 1) buf[rewind] = '\0'; } cairo_show_text(ctx->cr, buf); y += 14; } if (has_power) { sprintf(buf, "Power: %llumW", (long long unsigned)gf->power.power_mW); cairo_set_source_rgba(ctx->cr, 1, 1, 1, 1); cairo_move_to(ctx->cr, PAD, y); cairo_show_text(ctx->cr, buf); y += 14; } if (has_irqs) { sprintf(buf, "Interrupts: %llu", (long long unsigned)gf->irqs.delta); cairo_set_source_rgba(ctx->cr, 1, 1, 1, 1); cairo_move_to(ctx->cr, PAD, y); cairo_show_text(ctx->cr, buf); y += 14; } } static void init_gem_objects(struct overlay_context *ctx, struct overlay_gem_objects *go) { go->error = gem_objects_init(&go->gem_objects); if (go->error) return; chart_init(&go->aperture, "aperture", 120); chart_set_position(&go->aperture, ctx->width/2+HALF_PAD, ctx->height/2 + HALF_PAD); chart_set_size(&go->aperture, ctx->width/2 - SIZE_PAD, ctx->height/2 - SIZE_PAD); chart_set_stroke_rgba(&go->aperture, 0.75, 0.25, 0.50, 1.); chart_set_mode(&go->aperture, CHART_STROKE); chart_set_range(&go->aperture, 0, go->gem_objects.max_gtt); chart_init(&go->gtt, "gtt", 120); chart_set_position(&go->gtt, ctx->width/2+HALF_PAD, ctx->height/2 + HALF_PAD); chart_set_size(&go->gtt, ctx->width/2 - SIZE_PAD, ctx->height/2 - SIZE_PAD); chart_set_fill_rgba(&go->gtt, 0.25, 0.5, 0.5, 1.); chart_set_mode(&go->gtt, CHART_FILL); chart_set_range(&go->gtt, 0, go->gem_objects.max_gtt); } static void show_gem_objects(struct overlay_context *ctx, struct overlay_gem_objects *go) { struct gem_objects_comm *comm; char buf[160]; cairo_pattern_t *linear; int x, y, y1, y2; if (go->error == 0) go->error = gem_objects_update(&go->gem_objects); if (go->error) return; cairo_rectangle(ctx->cr, ctx->width/2+HALF_PAD-.5, ctx->height/2+HALF_PAD-.5, ctx->width/2-SIZE_PAD+1, ctx->height/2-SIZE_PAD+1); cairo_set_source_rgb(ctx->cr, .15, .15, .15); cairo_set_line_width(ctx->cr, 1); cairo_stroke(ctx->cr); chart_add_sample(&go->gtt, go->gem_objects.total_gtt); chart_add_sample(&go->aperture, go->gem_objects.total_aperture); chart_draw(&go->gtt, ctx->cr); chart_draw(&go->aperture, ctx->cr); y = ctx->height/2 + HALF_PAD + 12 - 2; x = ctx->width/2 + HALF_PAD; y2 = y1 = y; y2 += 14; for (comm = go->gem_objects.comm; comm; comm = comm->next) { if ((comm->bytes >> 20) == 0) break; y2 += 12; } y1 += -12 - 2; y2 += -12 + 4; cairo_rectangle(ctx->cr, x, y1, ctx->width/2-SIZE_PAD, y2-y1); linear = cairo_pattern_create_linear(x, 0, x+ctx->width/2-SIZE_PAD, 0); cairo_pattern_add_color_stop_rgba(linear, 0, 0, 0, 0, .5); cairo_pattern_add_color_stop_rgba(linear, 1, 0, 0, 0, .0); cairo_set_source(ctx->cr, linear); cairo_pattern_destroy(linear); cairo_fill(ctx->cr); sprintf(buf, "Total: %ldMB, %ld objects", go->gem_objects.total_bytes >> 20, go->gem_objects.total_count); cairo_set_source_rgba(ctx->cr, 1, 1, 1, 1); cairo_move_to(ctx->cr, x, y); cairo_show_text(ctx->cr, buf); y += 12; cairo_set_source_rgba(ctx->cr, .8, .8, .8, 1); cairo_set_font_size(ctx->cr, 8); for (comm = go->gem_objects.comm; comm; comm = comm->next) { if ((comm->bytes >> 20) == 0) break; sprintf(buf, "%s %ldMB, %ld objects", comm->name, comm->bytes >> 20, comm->count); cairo_move_to(ctx->cr, x, y); cairo_show_text(ctx->cr, buf); y += 12; } } static int take_snapshot; static void signal_snapshot(int sig) { take_snapshot = sig; } static int get_sample_period(struct config *config) { const char *value; value = config_get_value(config, "sampling", "period"); if (value && atoi(value) > 0) return atoi(value); value = config_get_value(config, "sampling", "frequency"); if (value && atoi(value) > 0) return 1000000 / atoi(value); return 500000; } static void overlay_snapshot(struct overlay_context *ctx) { char buf[1024]; sprintf(buf, "/tmp/overlay-snapshot-%ld.png", (long)time(NULL)); cairo_surface_write_to_png(ctx->surface, buf); } static void usage(const char *progname) { printf("intel-gpu-overlay -- realtime display of GPU statistics\n"); printf("Usage: %s [options]\n", progname); printf("\t--config|-c | \t\t\tSpecify an ini-style configuration string or file\n"); printf("\t--geometry|-G x++\tExact window placement and size\n"); printf("\t--position|-P (top|middle|bottom)-(left|centre|right)\tPlace the window in a particular corner\n"); printf("\t--size|-S x | %%\t\t\tWindow size\n"); printf("\t--help|-h\t\t\t\t\t\tThis help message\n"); } int main(int argc, char **argv) { static struct option long_options[] = { {"config", 1, 0, 'c'}, {"geometry", 1, 0, 'G'}, {"position", 1, 0, 'P'}, {"size", 1, 0, 'S'}, {"help", 0, 0, 'h'}, {NULL, 0, 0, 0,} }; struct overlay_context ctx; struct config config; int index, sample_period; int daemonize = 1, renice = 0; int i; setlocale(LC_ALL, ""); config_init(&config); opterr = 0; while ((i = getopt_long(argc, argv, "c:fhn?", long_options, &index)) != -1) { switch (i) { case 'c': config_parse_string(&config, optarg); break; case 'G': config_set_value(&config, "window", "geometry", optarg); break; case 'P': config_set_value(&config, "window", "position", optarg); break; case 'S': config_set_value(&config, "window", "size", optarg); break; case 'f': daemonize = 0; break; case 'n': renice = -20; if (optarg) renice = atoi(optarg); break; case 'h': usage(argv[0]); return 0; } } if (argc > optind) { x11_overlay_stop(); return 0; } ctx.width = 640; ctx.height = 236; ctx.surface = NULL; if (ctx.surface == NULL) ctx.surface = x11_overlay_create(&config, &ctx.width, &ctx.height); if (ctx.surface == NULL) ctx.surface = x11_window_create(&config, &ctx.width, &ctx.height); if (ctx.surface == NULL) ctx.surface = kms_overlay_create(&config, &ctx.width, &ctx.height); if (ctx.surface == NULL) return ENXIO; if (daemonize && daemon(0, 0)) return EINVAL; if (renice && (nice(renice) == -1)) fprintf(stderr, "Could not renice: %s\n", strerror(errno)); signal(SIGUSR1, signal_snapshot); debugfs_init(); init_gpu_top(&ctx, &ctx.gpu_top); init_gpu_perf(&ctx, &ctx.gpu_perf); init_gpu_freq(&ctx, &ctx.gpu_freq); init_gem_objects(&ctx, &ctx.gem_objects); sample_period = get_sample_period(&config); i = 0; while (1) { ctx.time = time(NULL); ctx.cr = cairo_create(ctx.surface); cairo_set_operator(ctx.cr, CAIRO_OPERATOR_CLEAR); cairo_paint(ctx.cr); cairo_set_operator(ctx.cr, CAIRO_OPERATOR_OVER); show_gpu_top(&ctx, &ctx.gpu_top); show_gpu_perf(&ctx, &ctx.gpu_perf); show_gpu_freq(&ctx, &ctx.gpu_freq); show_gem_objects(&ctx, &ctx.gem_objects); { char buf[80]; cairo_text_extents_t extents; gethostname(buf, sizeof(buf)); cairo_set_source_rgb(ctx.cr, .5, .5, .5); cairo_set_font_size(ctx.cr, PAD-2); cairo_text_extents(ctx.cr, buf, &extents); cairo_move_to(ctx.cr, (ctx.width-extents.width)/2., 1+extents.height); cairo_show_text(ctx.cr, buf); } cairo_destroy(ctx.cr); overlay_show(ctx.surface); if (take_snapshot) { overlay_snapshot(&ctx); take_snapshot = 0; } usleep(sample_period); } return 0; } intel-gpu-tools-1.14/overlay/gpu-perf.h0000644000175000017500000000374312665336131015016 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #ifndef GPU_PERF_H #define GPU_PERF_H #include #include #define MAX_RINGS 4 struct gpu_perf { const char *error; int page_size; int nr_cpus; int nr_events; int *fd; void **map; struct gpu_perf_sample { uint64_t id; int (*func)(struct gpu_perf *, const void *); } *sample; unsigned flip_complete[MAX_RINGS]; unsigned ctx_switch[MAX_RINGS]; struct gpu_perf_comm { struct gpu_perf_comm *next; char name[256]; pid_t pid; bool active; int nr_requests[4]; void *user_data; uint64_t wait_time; uint32_t nr_sema; time_t show; } *comm; struct gpu_perf_time { struct gpu_perf_time *next; struct gpu_perf_comm *comm; uint32_t seqno; uint64_t time; } *wait[MAX_RINGS]; }; void gpu_perf_init(struct gpu_perf *gp, unsigned flags); int gpu_perf_update(struct gpu_perf *gp); #endif /* GPU_PERF_H */ intel-gpu-tools-1.14/overlay/gem-interrupts.c0000644000175000017500000000657612665336131016260 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include #include #include #include #include #include #include #include #include "gem-interrupts.h" #include "debugfs.h" #include "perf.h" static int perf_open(void) { struct perf_event_attr attr; memset(&attr, 0, sizeof (attr)); attr.type = i915_type_id(); if (attr.type == 0) return -ENOENT; attr.config = I915_PERF_INTERRUPTS; return perf_event_open(&attr, -1, 0, -1, 0); } static long long debugfs_read(void) { char buf[8192], *b; int fd, len; sprintf(buf, "%s/i915_gem_interrupt", debugfs_dri_path); fd = open(buf, 0); if (fd < 0) return -1; len = read(fd, buf, sizeof(buf)-1); close(fd); if (len < 0) return -1; buf[len] = '\0'; b = strstr(buf, "Interrupts received:"); if (b == NULL) return -1; return strtoull(b + sizeof("Interrupts received:"), 0, 0); } static long long procfs_read(void) { char buf[8192], *b; int fd, len; unsigned long long val; /* 44: 51 42446 0 0 PCI-MSI-edge i915*/ fd = open("/proc/interrupts", 0); if (fd < 0) return -1; len = read(fd, buf, sizeof(buf)-1); close(fd); if (len < 0) return -1; buf[len] = '\0'; b = strstr(buf, "i915"); if (b == NULL) return -1; while (*--b != ':') ; val = 0; do { while (isspace(*++b)) ; if (!isdigit(*b)) break; val += strtoull(b, &b, 0); } while(1); return val; } static long long interrupts_read(void) { long long val; val = debugfs_read(); if (val < 0) val = procfs_read(); return val; } int gem_interrupts_init(struct gem_interrupts *irqs) { memset(irqs, 0, sizeof(*irqs)); irqs->fd = perf_open(); if (irqs->fd < 0 && interrupts_read() < 0) irqs->error = ENODEV; return irqs->error; } int gem_interrupts_update(struct gem_interrupts *irqs) { uint64_t val; int update; if (irqs->error) return irqs->error; if (irqs->fd < 0) { long long ret; ret = interrupts_read(); if (ret < 0) return irqs->error = ENODEV; else val = ret; } else { if (read(irqs->fd, &val, sizeof(val)) < 0) return irqs->error = errno; } update = irqs->last_count == 0; irqs->last_count = irqs->count; irqs->count = val; irqs->delta = irqs->count - irqs->last_count; return update ? EAGAIN : 0; } intel-gpu-tools-1.14/overlay/cpu-top.h0000644000175000017500000000271412665336131014655 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #ifndef CPU_TOP_H #define CPU_TOP_H #include struct cpu_top { uint8_t busy; int nr_cpu; int nr_running; int count; struct cpu_stat { uint64_t user, nice, sys, idle; uint64_t total; } stat[2]; }; int cpu_top_init(struct cpu_top *cpu); int cpu_top_update(struct cpu_top *cpu); #endif /* CPU_TOP_H */ intel-gpu-tools-1.14/overlay/debugfs.c0000644000175000017500000000376712665336131014711 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include #include #include #include #include #include "debugfs.h" char debugfs_path[128]; char debugfs_dri_path[128]; int debugfs_init(void) { const char *path = "/sys/kernel/debug"; struct stat st; int n; if (stat("/debug/dri", &st) == 0) { path = "/debug/dri"; goto find_minor; } if (stat("/sys/kernel/debug/dri", &st) == 0) goto find_minor; if (stat("/sys/kernel/debug", &st)) return errno; if (mount("debug", "/sys/kernel/debug", "debugfs", 0, 0)) return errno; find_minor: strcpy(debugfs_path, path); for (n = 0; n < 16; n++) { int len = sprintf(debugfs_dri_path, "%s/dri/%d", path, n); sprintf(debugfs_dri_path + len, "/i915_error_state"); if (stat(debugfs_dri_path, &st) == 0) { debugfs_dri_path[len] = '\0'; return 0; } } debugfs_dri_path[0] = '\0'; return ENOENT; } intel-gpu-tools-1.14/overlay/debugfs.h0000644000175000017500000000244012665336131014701 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #ifndef DEBUGFS_H #define DEBUGFS_H extern char debugfs_path[128]; extern char debugfs_dri_path[128]; int debugfs_init(void); #endif /* DEBUGFS_H */ intel-gpu-tools-1.14/overlay/rc6.h0000644000175000017500000000303612665336131013756 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #ifndef RC6_H #define RC6_H #include struct rc6 { struct rc6_stat { uint64_t rc6_residency; uint64_t rc6p_residency; uint64_t rc6pp_residency; uint64_t timestamp; } stat[2]; int fd; int count; int error; unsigned flags; uint8_t rc6; uint8_t rc6p; uint8_t rc6pp; uint8_t rc6_combined; }; int rc6_init(struct rc6 *rc6); int rc6_update(struct rc6 *rc6); #endif /* RC6_H */ intel-gpu-tools-1.14/overlay/Makefile.am0000644000175000017500000000247112665336131015151 00000000000000if BUILD_OVERLAY bin_PROGRAMS = intel-gpu-overlay endif AM_CPPFLAGS = -I. AM_CFLAGS = $(DRM_CFLAGS) $(PCIACCESS_CFLAGS) $(CWARNFLAGS) $(CAIRO_CFLAGS) $(OVERLAY_CFLAGS) LDADD = $(DRM_LIBS) $(PCIACCESS_LIBS) $(CAIRO_LIBS) $(OVERLAY_LIBS) intel_gpu_overlay_SOURCES = \ i915_pciids.h \ chart.h \ chart.c \ config.c \ cpu-top.h \ cpu-top.c \ debugfs.h \ debugfs.c \ gem-interrupts.h \ gem-interrupts.c \ gem-objects.h \ gem-objects.c \ gpu-top.h \ gpu-top.c \ gpu-perf.h \ gpu-perf.c \ gpu-freq.h \ gpu-freq.c \ igfx.h \ igfx.c \ overlay.h \ overlay.c \ perf.h \ perf.c \ power.h \ power.c \ rc6.h \ rc6.c \ $(NULL) if BUILD_OVERLAY_XLIB both_x11_sources = x11/position.c x11/position.h AM_CFLAGS += $(OVERLAY_XLIB_CFLAGS) $(XRANDR_CFLAGS) LDADD += $(OVERLAY_XLIB_LIBS) $(XRANDR_LIBS) intel_gpu_overlay_SOURCES += \ x11/x11-window.c \ $(NULL) endif if BUILD_OVERLAY_XVLIB both_x11_sources = x11/position.c AM_CFLAGS += $(OVERLAY_XVLIB_CFLAGS) $(XRANDR_CFLAGS) LDADD += $(OVERLAY_XVLIB_LIBS) $(XRANDR_LIBS) intel_gpu_overlay_SOURCES += \ x11/dri2.c \ x11/dri2.h \ x11/rgb2yuv.c \ x11/rgb2yuv.h \ x11/x11-overlay.c \ $(NULL) endif intel_gpu_overlay_SOURCES += \ kms/kms-overlay.c \ $(NULL) intel_gpu_overlay_SOURCES += $(both_x11_sources) intel_gpu_overlay_LDADD = $(LDADD) -lrt EXTRA_DIST=README intel-gpu-tools-1.14/overlay/power.c0000644000175000017500000000644012665336131014415 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include #include #include #include #include #include #include #include #include "perf.h" #include "power.h" #include "debugfs.h" /* XXX Is this exposed through RAPL? */ static int perf_open(void) { struct perf_event_attr attr; memset(&attr, 0, sizeof (attr)); attr.type = i915_type_id(); if (attr.type == 0) return -1; attr.config = I915_PERF_ENERGY; attr.read_format = PERF_FORMAT_TOTAL_TIME_ENABLED; return perf_event_open(&attr, -1, 0, -1, 0); } int power_init(struct power *power) { char buf[4096]; int fd, len; memset(power, 0, sizeof(*power)); power->fd = perf_open(); if (power->fd != -1) return 0; sprintf(buf, "%s/i915_energy_uJ", debugfs_dri_path); fd = open(buf, 0); if (fd < 0) return power->error = errno; len = read(fd, buf, sizeof(buf)); close(fd); if (len < 0) return power->error = errno; buf[len] = '\0'; if (strtoull(buf, 0, 0) == 0) return power->error = EINVAL; return 0; } static uint64_t file_to_u64(const char *name) { char buf[4096]; int fd, len; sprintf(buf, "%s/%s", debugfs_dri_path, name); fd = open(buf, 0); if (fd < 0) return 0; len = read(fd, buf, sizeof(buf)-1); close(fd); if (len < 0) return 0; buf[len] = '\0'; return strtoull(buf, 0, 0); } static uint64_t clock_ms_to_u64(void) { struct timespec tv; if (clock_gettime(CLOCK_MONOTONIC, &tv) < 0) return 0; return (uint64_t)tv.tv_sec * 1000 + tv.tv_nsec / 1000000; } int power_update(struct power *power) { struct power_stat *s = &power->stat[power->count++&1]; struct power_stat *d = &power->stat[power->count&1]; uint64_t d_time; if (power->error) return power->error; if (power->fd != -1) { uint64_t data[2]; int len; len = read(power->fd, data, sizeof(data)); if (len < 0) return power->error = errno; s->energy = data[0]; s->timestamp = data[1] / (1000*1000); } else { s->energy = file_to_u64("i915_energy_uJ"); s->timestamp = clock_ms_to_u64(); } if (power->count == 1) return EAGAIN; d_time = s->timestamp - d->timestamp; power->power_mW = (s->energy - d->energy) / d_time; power->new_sample = 1; return 0; } intel-gpu-tools-1.14/overlay/README0000644000175000017500000000052412665336131013772 00000000000000This is a simple overlay showing current GPU activity. An asynchronous overlay is used, rendered by the CPU to avoid introducing any extra work on the GPU that we wish to monitor. The x11-overlay backend requires xf86-video-intel 2.21.15 or later, with SNA enabled. As it requires access to debug information, it needs to be run as root. intel-gpu-tools-1.14/overlay/power.h0000644000175000017500000000270512665336131014422 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #ifndef POWER_H #define POWER_H #include struct power { struct power_stat { uint64_t energy; uint64_t timestamp; } stat[2]; int fd; int error; int count; int new_sample; uint64_t power_mW; }; int power_init(struct power *power); int power_update(struct power *power); #endif /* POWER_H */ intel-gpu-tools-1.14/overlay/overlay.h0000644000175000017500000000614012665336131014744 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #ifndef OVERLAY_H #define OVERLAY_H #ifdef HAVE_CONFIG_H #include"config.h" #endif #include enum position { POS_UNSET = -1, POS_LEFT = 0, POS_CENTRE = 1, POS_RIGHT = 2, POS_TOP = 0 << 4, POS_MIDDLE = 1 << 4, POS_BOTTOM = 2 << 4, POS_TOP_LEFT = POS_TOP | POS_LEFT, POS_TOP_CENTRE = POS_TOP | POS_CENTRE, POS_TOP_RIGHT = POS_TOP | POS_RIGHT, POS_MIDDLE_LEFT = POS_MIDDLE | POS_LEFT, POS_MIDDLE_CENTRE = POS_MIDDLE | POS_CENTRE, POS_MIDDLE_RIGHT = POS_MIDDLE | POS_RIGHT, POS_BOTTOM_LEFT = POS_BOTTOM | POS_LEFT, POS_BOTTOM_CENTRE = POS_BOTTOM | POS_CENTRE, POS_BOTTOM_RIGHT = POS_BOTTOM | POS_RIGHT, }; struct overlay { cairo_surface_t *surface; void (*show)(struct overlay *); void (*hide)(struct overlay *); }; extern const cairo_user_data_key_t overlay_key; struct config { struct config_section { struct config_section *next; struct config_value { struct config_value *next; char *name; char *value; } *values; char name[0]; } *sections; }; void config_init(struct config *config); void config_parse_string(struct config *config, const char *str); void config_set_value(struct config *config, const char *section, const char *name, const char *value); const char *config_get_value(struct config *config, const char *section, const char *name); #ifdef HAVE_OVERLAY_XVLIB cairo_surface_t *x11_overlay_create(struct config *config, int *width, int *height); void x11_overlay_stop(void); #else static inline cairo_surface_t *x11_overlay_create(struct config *config, int *width, int *height) { return NULL; } static inline void x11_overlay_stop(void) { } #endif #ifdef HAVE_OVERLAY_XLIB cairo_surface_t *x11_window_create(struct config *config, int *width, int *height); #else static inline cairo_surface_t *x11_window_create(struct config *config, int *width, int *height) { return NULL; } #endif cairo_surface_t *kms_overlay_create(struct config *config, int *width, int *height); #endif /* OVERLAY_H */ intel-gpu-tools-1.14/overlay/kms/0000755000175000017500000000000012665337377014000 500000000000000intel-gpu-tools-1.14/overlay/kms/kms-overlay.c0000644000175000017500000001654212665336131016330 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "../overlay.h" //#include "rgb2yuv.h" #ifndef ALIGN #define ALIGN(i,m) (((i) + (m) - 1) & ~((m) - 1)) #endif struct kms_image { uint32_t handle, name; uint32_t format; uint32_t width, height, stride; uint32_t size; void *map; }; struct kms_overlay { struct overlay base; struct kms_image image; int fd; int crtc; int x, y; int visible; void *mem; int size; }; static inline struct kms_overlay *to_kms_overlay(struct overlay *o) { return (struct kms_overlay *)o; } static int kms_create_fb(int fd, struct kms_image *image) { uint32_t offsets[4], pitches[4], handles[4]; handles[0] = image->handle; pitches[0] = image->stride; offsets[0] = 0; return drmModeAddFB2(fd, image->width, image->height, image->format, handles, pitches, offsets, &image->name, 0) == 0; } static int attach_to_crtc(int fd, int crtc, int x, int y, struct kms_image *image) { struct drm_mode_set_plane s; s.crtc_id = crtc; s.fb_id = image->name; s.flags = 0; s.crtc_x = x; s.crtc_y = y; s.crtc_w = image->width; s.crtc_h = image->height; s.src_x = 0; s.src_y = 0; s.src_w = image->width << 16; s.src_h = image->height << 16; return drmIoctl(fd, DRM_IOCTL_MODE_SETPLANE, &s) == 0; } static int detach_from_crtc(int fd, int crtc) { struct drm_mode_set_plane s; memset(&s, 0, sizeof(s)); s.crtc_id = crtc; return drmIoctl(fd, DRM_IOCTL_MODE_SETPLANE, &s) == 0; } static void kms_overlay_show(struct overlay *overlay) { struct kms_overlay *priv = to_kms_overlay(overlay); memcpy(priv->image.map, priv->mem, priv->size); if (!priv->visible) { attach_to_crtc(priv->fd, priv->crtc, priv->x, priv->y, &priv->image); priv->visible = true; } } static void kms_overlay_hide(struct overlay *overlay) { struct kms_overlay *priv = to_kms_overlay(overlay); if (priv->visible) { detach_from_crtc(priv->fd, priv->crtc); priv->visible = false; } } static void kms_overlay_destroy(void *data) { struct kms_overlay *priv = data; drmIoctl(priv->fd, DRM_IOCTL_MODE_RMFB, &priv->image.name); munmap(priv->image.map, priv->image.size); free(priv->mem); close(priv->fd); free(priv); } static int is_i915_device(int fd) { drm_version_t version; char name[5] = ""; memset(&version, 0, sizeof(version)); version.name_len = 4; version.name = name; if (drmIoctl(fd, DRM_IOCTL_VERSION, &version)) return 0; return strcmp("i915", name) == 0; } static int check_device(int fd) { int ret; /* Confirm that this is a i915.ko device with GEM/KMS enabled */ ret = is_i915_device(fd); if (ret) { struct drm_i915_getparam gp; gp.param = I915_PARAM_HAS_GEM; gp.value = &ret; if (drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp)) ret = 0; } if (ret) { struct drm_mode_card_res res; memset(&res, 0, sizeof(res)); if (drmIoctl(fd, DRM_IOCTL_MODE_GETRESOURCES, &res)) ret = 0; } return ret; } static int i915_open(void) { char buf[80]; int fd, n; for (n = 0; n < 16; n++) { sprintf(buf, "/dev/dri/card%d", n); fd = open(buf, O_RDWR); if (fd == -1) continue; if (!check_device(fd)) { close(fd); continue; } return fd; } return -1; } static int config_get_pipe(struct config *config) { const char *str; str = config_get_value(config, "kms", "pipe"); if (str == NULL) return 0; return atoi(str); } cairo_surface_t * kms_overlay_create(struct config *config, int *width, int *height) { struct drm_i915_gem_create create; struct drm_i915_gem_mmap_gtt map; struct kms_overlay *priv; drmModeResPtr kmode; int i, pipe; priv = malloc(sizeof(*priv)); if (priv == NULL) return NULL; priv->fd = i915_open(); if (priv->fd == -1) goto err_priv; kmode = drmModeGetResources(priv->fd); if (kmode == 0) goto err_fd; pipe = config_get_pipe(config); priv->crtc = 0; for (i = 0; i < kmode->count_crtcs; i++) { struct drm_i915_get_pipe_from_crtc_id get_pipe; get_pipe.pipe = 0; get_pipe.crtc_id = kmode->crtcs[i]; if (drmIoctl(priv->fd, DRM_IOCTL_I915_GET_PIPE_FROM_CRTC_ID, &get_pipe)) { continue; } if (get_pipe.pipe != pipe) continue; priv->crtc = get_pipe.crtc_id; } if (priv->crtc == 0) goto err_fd; priv->image.format = DRM_FORMAT_XRGB8888; priv->image.width = ALIGN(*width, 4); priv->image.height = ALIGN(*height, 2); priv->image.stride = ALIGN(4*priv->image.width, 64); priv->image.size = ALIGN(priv->image.stride * priv->image.height, 4096); create.handle = 0; create.size = ALIGN(priv->image.size, 4096); drmIoctl(priv->fd, DRM_IOCTL_I915_GEM_CREATE, &create); if (create.handle == 0) goto err_fd; priv->image.handle = create.handle; if (!kms_create_fb(priv->fd, &priv->image)) goto err_create; /* XXX set color keys */ if (!attach_to_crtc(priv->fd, priv->crtc, 0, 0, &priv->image)) goto err_fb; detach_from_crtc(priv->fd, priv->crtc); map.handle = create.handle; if (drmIoctl(priv->fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &map)) goto err_fb; priv->image.map = mmap(0, create.size, PROT_READ | PROT_WRITE, MAP_SHARED, priv->fd, map.offset); if (priv->image.map == (void *)-1) goto err_fb; priv->mem = malloc(create.size); if (priv->mem == NULL) goto err_map; priv->base.surface = cairo_image_surface_create_for_data(priv->mem, CAIRO_FORMAT_RGB24, priv->image.width, priv->image.height, priv->image.stride); if (cairo_surface_status(priv->base.surface)) goto err_mem; priv->base.show = kms_overlay_show; priv->base.hide = kms_overlay_hide; priv->visible = false; priv->x = 0; priv->y = 0; cairo_surface_set_user_data(priv->base.surface, &overlay_key, priv, kms_overlay_destroy); *width = priv->image.width; *height = priv->image.height; drmIoctl(priv->fd, DRM_IOCTL_GEM_CLOSE, &create.handle); return priv->base.surface; err_mem: free(priv->mem); err_map: munmap(priv->image.map, create.size); err_fb: drmIoctl(priv->fd, DRM_IOCTL_MODE_RMFB, &priv->image.name); err_create: drmIoctl(priv->fd, DRM_IOCTL_GEM_CLOSE, &create.handle); err_fd: close(priv->fd); err_priv: free(priv); return NULL; } intel-gpu-tools-1.14/overlay/perf.h0000644000175000017500000000406512665336131014223 00000000000000#ifndef I915_PERF_H #define I915_PERF_H #include #define I915_SAMPLE_BUSY 0 #define I915_SAMPLE_WAIT 1 #define I915_SAMPLE_SEMA 2 #define I915_SAMPLE_RCS 0 #define I915_SAMPLE_VCS 1 #define I915_SAMPLE_BCS 2 #define I915_SAMPLE_VECS 3 #define __I915_PERF_COUNT(ring, id) ((ring) << 4 | (id)) #define I915_PERF_COUNT_RCS_BUSY __I915_PERF_COUNT(I915_SAMPLE_RCS, I915_SAMPLE_BUSY) #define I915_PERF_COUNT_RCS_WAIT __I915_PERF_COUNT(I915_SAMPLE_RCS, I915_SAMPLE_WAIT) #define I915_PERF_COUNT_RCS_SEMA __I915_PERF_COUNT(I915_SAMPLE_RCS, I915_SAMPLE_SEMA) #define I915_PERF_COUNT_VCS_BUSY __I915_PERF_COUNT(I915_SAMPLE_VCS, I915_SAMPLE_BUSY) #define I915_PERF_COUNT_VCS_WAIT __I915_PERF_COUNT(I915_SAMPLE_VCS, I915_SAMPLE_WAIT) #define I915_PERF_COUNT_VCS_SEMA __I915_PERF_COUNT(I915_SAMPLE_VCS, I915_SAMPLE_SEMA) #define I915_PERF_COUNT_BCS_BUSY __I915_PERF_COUNT(I915_SAMPLE_BCS, I915_SAMPLE_BUSY) #define I915_PERF_COUNT_BCS_WAIT __I915_PERF_COUNT(I915_SAMPLE_BCS, I915_SAMPLE_WAIT) #define I915_PERF_COUNT_BCS_SEMA __I915_PERF_COUNT(I915_SAMPLE_BCS, I915_SAMPLE_SEMA) #define I915_PERF_COUNT_VECS_BUSY __I915_PERF_COUNT(I915_SAMPLE_VECS, I915_SAMPLE_BUSY) #define I915_PERF_COUNT_VECS_WAIT __I915_PERF_COUNT(I915_SAMPLE_VECS, I915_SAMPLE_WAIT) #define I915_PERF_COUNT_VECS_SEMA __I915_PERF_COUNT(I915_SAMPLE_VECS, I915_SAMPLE_SEMA) #define I915_PERF_ACTUAL_FREQUENCY 32 #define I915_PERF_REQUESTED_FREQUENCY 33 #define I915_PERF_ENERGY 34 #define I915_PERF_INTERRUPTS 35 #define I915_PERF_RC6_RESIDENCY 40 #define I915_PERF_RC6p_RESIDENCY 41 #define I915_PERF_RC6pp_RESIDENCY 42 static inline int perf_event_open(struct perf_event_attr *attr, pid_t pid, int cpu, int group_fd, unsigned long flags) { #ifndef __NR_perf_event_open #if defined(__i386__) #define __NR_perf_event_open 336 #elif defined(__x86_64__) #define __NR_perf_event_open 298 #else #define __NR_perf_event_open 0 #endif #endif attr->size = sizeof(*attr); return syscall(__NR_perf_event_open, attr, pid, cpu, group_fd, flags); } uint64_t i915_type_id(void); #endif /* I915_PERF_H */ intel-gpu-tools-1.14/overlay/gpu-top.c0000644000175000017500000001714312665336131014656 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include #include #include #include #include #include #include #include #include "perf.h" #include "igfx.h" #include "gpu-top.h" #define RING_TAIL 0x00 #define RING_HEAD 0x04 #define ADDR_MASK 0x001FFFFC #define RING_CTL 0x0C #define RING_WAIT (1<<11) #define RING_WAIT_SEMAPHORE (1<<10) #define __I915_PERF_RING(n) (4*n) #define I915_PERF_RING_BUSY(n) (__I915_PERF_RING(n) + 0) #define I915_PERF_RING_WAIT(n) (__I915_PERF_RING(n) + 1) #define I915_PERF_RING_SEMA(n) (__I915_PERF_RING(n) + 2) static int perf_i915_open(int config, int group) { struct perf_event_attr attr; memset(&attr, 0, sizeof (attr)); attr.type = i915_type_id(); if (attr.type == 0) return -ENOENT; attr.config = config; attr.read_format = PERF_FORMAT_TOTAL_TIME_ENABLED; if (group == -1) attr.read_format |= PERF_FORMAT_GROUP; return perf_event_open(&attr, -1, 0, group, 0); } static int perf_init(struct gpu_top *gt) { const char *names[] = { "RCS", "VCS", "BCS", NULL, }; int n; gt->fd = perf_i915_open(I915_PERF_RING_BUSY(0), -1); if (gt->fd < 0) return -1; if (perf_i915_open(I915_PERF_RING_WAIT(0), gt->fd) >= 0) gt->have_wait = 1; if (perf_i915_open(I915_PERF_RING_SEMA(0), gt->fd) >= 0) gt->have_sema = 1; gt->ring[0].name = names[0]; gt->num_rings = 1; for (n = 1; names[n]; n++) { if (perf_i915_open(I915_PERF_RING_BUSY(n), gt->fd) >= 0) { if (gt->have_wait && perf_i915_open(I915_PERF_RING_WAIT(n), gt->fd) < 0) return -1; if (gt->have_sema && perf_i915_open(I915_PERF_RING_SEMA(n), gt->fd) < 0) return -1; gt->ring[gt->num_rings++].name = names[n]; } } return 0; } struct mmio_ring { int id; uint32_t base; void *mmio; int idle, wait, sema; }; static uint32_t mmio_ring_read(struct mmio_ring *ring, uint32_t reg) { return igfx_read(ring->mmio, ring->base + reg); } static int has_execlists(void) { int detected = 0; FILE *file; file = fopen("/sys/module/i915/parameters/enable_execlists", "r"); if (file) { int value; if (fscanf(file, "%d", &value) == 1) detected = value != 0; fclose(file); } return detected; } static void mmio_ring_init(struct mmio_ring *ring, void *mmio) { uint32_t ctl; ring->mmio = mmio; ctl = mmio_ring_read(ring, RING_CTL); if ((ctl & 1) == 0 && !has_execlists()) ring->id = -1; } static void mmio_ring_reset(struct mmio_ring *ring) { ring->idle = 0; ring->wait = 0; ring->sema = 0; } static void mmio_ring_sample(struct mmio_ring *ring) { uint32_t head, tail, ctl; if (ring->id == -1) return; head = mmio_ring_read(ring, RING_HEAD) & ADDR_MASK; tail = mmio_ring_read(ring, RING_TAIL) & ADDR_MASK; ring->idle += head == tail; ctl = mmio_ring_read(ring, RING_CTL); ring->wait += !!(ctl & RING_WAIT); ring->sema += !!(ctl & RING_WAIT_SEMAPHORE); } static void mmio_ring_emit(struct mmio_ring *ring, int samples, union gpu_top_payload *payload) { if (ring->id == -1) return; payload[ring->id].u.busy = 100 - 100 * ring->idle / samples; payload[ring->id].u.wait = 100 * ring->wait / samples; payload[ring->id].u.sema = 100 * ring->sema / samples; } static void mmio_init(struct gpu_top *gt) { struct mmio_ring render_ring = { .base = 0x2030, .id = 0, }, bsd_ring = { .base = 0x4030, .id = 1, }, bsd6_ring = { .base = 0x12030, .id = 1, }, blt_ring = { .base = 0x22030, .id = 2, }; const struct igfx_info *info; struct pci_device *igfx; void *mmio; int fd[2], i; igfx = igfx_get(); if (!igfx) return; if (pipe(fd) < 0) return; info = igfx_get_info(igfx); switch (fork()) { case -1: return; default: fcntl(fd[0], F_SETFL, fcntl(fd[0], F_GETFL) | O_NONBLOCK); gt->fd = fd[0]; gt->type = MMIO; gt->ring[0].name = "render"; gt->num_rings = 1; if (info->gen >= 040) { gt->ring[1].name = "bitstream"; gt->num_rings++; } if (info->gen >= 060) { gt->ring[2].name = "blt"; gt->num_rings++; } close(fd[1]); return; case 0: close(fd[0]); break; } mmio = igfx_get_mmio(igfx); if (mmio == NULL) exit(127); mmio_ring_init(&render_ring, mmio); if (info->gen >= 060) { bsd_ring = bsd6_ring; mmio_ring_init(&blt_ring, mmio); } if (info->gen >= 040) { mmio_ring_init(&bsd_ring, mmio); } for (;;) { union gpu_top_payload payload[MAX_RINGS]; mmio_ring_reset(&render_ring); mmio_ring_reset(&bsd_ring); mmio_ring_reset(&blt_ring); for (i = 0; i < 1000; i++) { mmio_ring_sample(&render_ring); mmio_ring_sample(&bsd_ring); mmio_ring_sample(&blt_ring); usleep(1000); } memset(payload, 0, sizeof(payload)); mmio_ring_emit(&render_ring, 1000, payload); mmio_ring_emit(&bsd_ring, 1000, payload); mmio_ring_emit(&blt_ring, 1000, payload); assert(write(fd[1], payload, sizeof(payload)) == sizeof(payload)); } } void gpu_top_init(struct gpu_top *gt) { memset(gt, 0, sizeof(*gt)); gt->fd = -1; if (perf_init(gt) == 0) return; mmio_init(gt); } int gpu_top_update(struct gpu_top *gt) { uint32_t data[1024]; int update, len; if (gt->fd < 0) return 0; if (gt->type == PERF) { struct gpu_top_stat *s = >->stat[gt->count++&1]; struct gpu_top_stat *d = >->stat[gt->count&1]; uint64_t *sample, d_time; int n, m; len = read(gt->fd, data, sizeof(data)); if (len < 0) return 0; sample = (uint64_t *)data + 1; s->time = *sample++; for (n = m = 0; n < gt->num_rings; n++) { s->busy[n] = sample[m++]; if (gt->have_wait) s->wait[n] = sample[m++]; if (gt->have_sema) s->sema[n] = sample[m++]; } if (gt->count == 1) return 0; d_time = s->time - d->time; for (n = 0; n < gt->num_rings; n++) { gt->ring[n].u.u.busy = (100 * (s->busy[n] - d->busy[n]) + d_time/2) / d_time; if (gt->have_wait) gt->ring[n].u.u.wait = (100 * (s->wait[n] - d->wait[n]) + d_time/2) / d_time; if (gt->have_sema) gt->ring[n].u.u.sema = (100 * (s->sema[n] - d->sema[n]) + d_time/2) / d_time; /* in case of rounding + sampling errors, fudge */ if (gt->ring[n].u.u.busy > 100) gt->ring[n].u.u.busy = 100; if (gt->ring[n].u.u.wait > 100) gt->ring[n].u.u.wait = 100; if (gt->ring[n].u.u.sema > 100) gt->ring[n].u.u.sema = 100; } update = 1; } else { while ((len = read(gt->fd, data, sizeof(data))) > 0) { uint32_t *ptr = &data[len/sizeof(uint32_t) - MAX_RINGS]; gt->ring[0].u.payload = ptr[0]; gt->ring[1].u.payload = ptr[1]; gt->ring[2].u.payload = ptr[2]; gt->ring[3].u.payload = ptr[3]; update = 1; } } return update; } intel-gpu-tools-1.14/overlay/igfx.h0000644000175000017500000000300512665336131014215 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #ifndef IGFX_H #define IGFX_H struct igfx_info { int gen; }; struct pci_device; struct pci_device *igfx_get(void); const struct igfx_info *igfx_get_info(struct pci_device *pci_dev); void *igfx_get_mmio(struct pci_device *pci_dev); static inline uint32_t igfx_read(void *mmio, uint32_t reg) { return *(volatile uint32_t *)((volatile char *)mmio + reg); } #endif /* IGFX_H */ intel-gpu-tools-1.14/overlay/x11/0000755000175000017500000000000012665337377013617 500000000000000intel-gpu-tools-1.14/overlay/x11/position.c0000644000175000017500000001173012665336131015534 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #ifdef HAVE_XRANDR #include #endif #include #include #include #include "position.h" #include "../overlay.h" static enum position get_position(struct config *config) { const char *v = config_get_value(config, "window", "position"); if (v == NULL) return POS_UNSET; if (strcmp(v, "top-left") == 0) return POS_TOP_LEFT; if (strcmp(v, "top-centre") == 0) return POS_TOP_CENTRE; if (strcmp(v, "top-right") == 0) return POS_TOP_RIGHT; if (strcmp(v, "middle-left") == 0) return POS_MIDDLE_LEFT; if (strcmp(v, "middle-centre") == 0) return POS_MIDDLE_CENTRE; if (strcmp(v, "middle-right") == 0) return POS_MIDDLE_RIGHT; if (strcmp(v, "bottom-left") == 0) return POS_BOTTOM_LEFT; if (strcmp(v, "bottom-centre") == 0) return POS_BOTTOM_CENTRE; if (strcmp(v, "bottom-right") == 0) return POS_BOTTOM_RIGHT; return POS_UNSET; } static void screen_size(Display *dpy, struct config *config, int *scr_x, int *scr_y, int *scr_width, int *scr_height) { Screen *scr; #ifdef HAVE_XRANDR const char *crtc; crtc = config_get_value(config, "x11", "crtc"); if (crtc) { XRRScreenResources *res; int i = atoi(crtc); int ok = 0; res = XRRGetScreenResourcesCurrent(dpy, DefaultRootWindow(dpy)); if (res) { if (i < res->ncrtc) { XRRCrtcInfo *info = XRRGetCrtcInfo (dpy, res, res->crtcs[i]); if (info) { *scr_x = info->x; *scr_y = info->y; *scr_width = info->width; *scr_height = info->height; ok = 1; XRRFreeCrtcInfo(info); } } XRRFreeScreenResources(res); } if (ok) return; } #endif scr = ScreenOfDisplay(dpy, DefaultScreen(dpy)); *scr_x = *scr_y = 0; *scr_width = scr->width; *scr_height = scr->height; } enum position x11_position(Display *dpy, int width, int height, struct config *config, int *x, int *y, int *w, int *h) { enum position position = POS_UNSET; const char *geometry; *x = *y = 0; *w = width; *h = height; geometry = config_get_value(config, "window", "geometry"); if (geometry) { sscanf(geometry, "%dx%d+%d+%d", w, h, x, y); if (*w < width/2) *w = width/2; if (*h < height/2) *h = height/2; } else { int scr_x, scr_y, scr_width, scr_height; screen_size(dpy, config, &scr_x, &scr_y, &scr_width, &scr_height); position = get_position(config); if (position != POS_UNSET) { if (width == -1) { *w = scr_width; switch (position & 7) { default: case 0: case 2: *w >>= 1; break; } } if (height == -1) { *h = scr_height; switch ((position >> 4) & 7) { default: case 0: case 2: *h >>= 1; break; } } } geometry = config_get_value(config, "window", "size"); if (geometry) { int size_w, size_h; float scale_x, scale_y; if (sscanf(geometry, "%dx%d", &size_w, &size_h) == 2) { *w = size_w; *h = size_h; } else if (sscanf(geometry, "%f%%x%f%%", &scale_x, &scale_y) == 2) { if (*w != -1) *w = (*w * scale_x) / 100.; if (*h != -1) *h = (*h * scale_y) / 100.; } else if (sscanf(geometry, "%f%%", &scale_x) == 1) { if (*w != -1) *w = (*w * scale_x) / 100.; if (*h != -1) *h = (*h * scale_x) / 100.; } if ((unsigned)*w < width/2) *w = width/2; if ((unsigned)*h < height/2) *h = height/2; } if ((unsigned)*w > scr_width) *w = scr_width; if ((unsigned)*h > scr_height) *h = scr_height; if (position != POS_UNSET) { switch (position & 7) { default: case 0: *x = 0; break; case 1: *x = (scr_width - *w)/2; break; case 2: *x = scr_width - *w; break; } switch ((position >> 4) & 7) { default: case 0: *y = 0; break; case 1: *y = (scr_height - *h)/2; break; case 2: *y = scr_height - *h; break; } } *x += scr_x; *y += scr_y; } return position; } intel-gpu-tools-1.14/overlay/x11/dri2.h0000644000175000017500000000233112665336131014532 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #ifndef DRI2_H #define DRI2_H int dri2_open(Display *dpy); #endif /* DRI2_H */ intel-gpu-tools-1.14/overlay/x11/position.h0000644000175000017500000000261612665336131015544 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #ifndef X11_POSITION_H #define X11_POSITION_H #include struct config; enum position; enum position x11_position(Display *dpy, int width, int height, struct config *config, int *x, int *y, int *w, int *h); #endif /* X11_POSITION_H */ intel-gpu-tools-1.14/overlay/x11/x11-window.c0000644000175000017500000001033212665336131015603 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include #include #include #include #include #include #include #include #include "../overlay.h" #include "position.h" struct x11_window { struct overlay base; cairo_surface_t *front; Display *dpy; Window win; int width, height; int visible; }; static inline struct x11_window *to_x11_window(struct overlay *o) { return (struct x11_window *)o; } static int noop(Display *dpy, XErrorEvent *event) { return 0; } static void x11_window_show(struct overlay *overlay) { struct x11_window *priv = to_x11_window(overlay); cairo_t *cr; cr = cairo_create(priv->front); cairo_set_operator(cr, CAIRO_OPERATOR_SOURCE); cairo_set_source_surface(cr, priv->base.surface, 0, 0); cairo_paint(cr); cairo_destroy(cr); cairo_surface_flush(priv->front); if (!priv->visible) { XMapWindow(priv->dpy, priv->win); priv->visible = true; } XFlush(priv->dpy); } static void x11_window_hide(struct overlay *overlay) { struct x11_window *priv = to_x11_window(overlay); if (priv->visible) { XUnmapWindow(priv->dpy, priv->win); XFlush(priv->dpy); priv->visible = false; } } static void x11_window_destroy(void *data) { struct x11_window *priv = data; cairo_surface_destroy(priv->front); XDestroyWindow(priv->dpy, priv->win); XCloseDisplay(priv->dpy); free(priv); } static int prefer_image(struct config *config) { const char *v = config_get_value(config, "x11", "prefer-image"); if (v == NULL) return 0; if (*v == '\0') return 1; return atoi(v); } cairo_surface_t * x11_window_create(struct config *config, int *width, int *height) { Display *dpy; Window win; int screen; cairo_surface_t *surface; XSetWindowAttributes attr; struct x11_window *priv; int x, y, w, h; dpy = XOpenDisplay(NULL); if (dpy == NULL) return NULL; screen = DefaultScreen(dpy); XSetErrorHandler(noop); x11_position(dpy, *width, *height, config, &x, &y, &w, &h); attr.override_redirect = True; win = XCreateWindow(dpy, DefaultRootWindow(dpy), x, y, w, h, 0, DefaultDepth(dpy, screen), InputOutput, DefaultVisual(dpy, screen), CWOverrideRedirect, &attr); surface = cairo_xlib_surface_create(dpy, win, DefaultVisual (dpy, screen), w, h); if (cairo_surface_status(surface)) goto err_win; priv = malloc(sizeof(*priv)); if (priv == NULL) goto err_surface; if (prefer_image(config)) priv->base.surface = cairo_image_surface_create(CAIRO_FORMAT_RGB24, w, h); else priv->base.surface = cairo_surface_create_similar(surface, CAIRO_CONTENT_COLOR, w, h); if (cairo_surface_status(priv->base.surface)) goto err_priv; priv->base.show = x11_window_show; priv->base.hide = x11_window_hide; priv->dpy = dpy; priv->win = win; priv->front = surface; priv->visible = false; priv->width = w; priv->height = h; cairo_surface_set_user_data(priv->base.surface, &overlay_key, priv, x11_window_destroy); *width = w; *height = h; return priv->base.surface; err_priv: free(priv); err_surface: cairo_surface_destroy(surface); err_win: XDestroyWindow(dpy, win); XCloseDisplay(dpy); return NULL; } intel-gpu-tools-1.14/overlay/x11/rgb2yuv.c0000644000175000017500000000710712665336131015273 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include #include #include "rgb2yuv.h" static int RGB2YUV_YR[256], RGB2YUV_YG[256], RGB2YUV_YB[256]; static int RGB2YUV_UR[256], RGB2YUV_UG[256], RGB2YUV_UBVR[256]; static int RGB2YUV_VG[256], RGB2YUV_VB[256]; void rgb2yuv_init(void) { int i; for (i = 0; i < 256; i++) RGB2YUV_YR[i] = 65.481 * (i << 8); for (i = 0; i < 256; i++) RGB2YUV_YG[i] = 128.553 * (i << 8); for (i = 0; i < 256; i++) RGB2YUV_YB[i] = 24.966 * (i << 8); for (i = 0; i < 256; i++) RGB2YUV_UR[i] = 37.797 * (i << 8); for (i = 0; i < 256; i++) RGB2YUV_UG[i] = 74.203 * (i << 8); for (i = 0; i < 256; i++) RGB2YUV_VG[i] = 93.786 * (i << 8); for (i = 0; i < 256; i++) RGB2YUV_VB[i] = 18.214 * (i << 8); for (i = 0; i < 256; i++) RGB2YUV_UBVR[i] = 112 * (i << 8); } int rgb2yuv(cairo_surface_t *surface, XvImage *image, uint8_t *yuv) { uint8_t *data = cairo_image_surface_get_data(surface); int rgb_stride = cairo_image_surface_get_stride(surface); int width = cairo_image_surface_get_width(surface); int height = cairo_image_surface_get_height(surface); int y_stride = image->pitches[0]; int uv_stride = image->pitches[1]; uint8_t *tmp, *tl, *tr, *bl, *br; int i, j; tmp = malloc(2*width*height); if (tmp == NULL) return 0; tl = tmp; bl = tmp + width*height; for (i = 0; i < height; i++) { uint16_t *rgb = (uint16_t *)(data + i * rgb_stride); for (j = 0; j < width; j++) { uint8_t r = (rgb[j] >> 11) & 0x1f; uint8_t g = (rgb[j] >> 5) & 0x3f; uint8_t b = (rgb[j] >> 0) & 0x1f; r = r<<3 | r>>2; g = g<<2 | g>>4; b = b<<3 | b>>2; yuv[j] = (RGB2YUV_YR[r] + RGB2YUV_YG[g] + RGB2YUV_YB[b] + 1048576) >> 16; *tl++ = (-RGB2YUV_UR[r] - RGB2YUV_UG[g] + RGB2YUV_UBVR[b] + 8388608) >> 16; *bl++ = (RGB2YUV_UBVR[r] - RGB2YUV_VG[g] - RGB2YUV_VB[b] + 8388608) >> 16; } yuv += y_stride; } tl = tmp; tr = tl + 1; bl = tl + width; br = bl + 1; for (i = 0; i < height/2; i ++) { for (j = 0; j < width/2; j ++) { yuv[j] = ((int)*tl + *tr + *bl + *br) >> 2; tl += 2; tr += 2; bl += 2; br += 2; } yuv += uv_stride; tl += width; tr += width; bl += width; br += width; } tl = tmp + width*height; tr = tl + 1; bl = tl + width; br = bl + 1; for (i = 0; i < height/2; i++) { for (j = 0; j < width/2; j++) { yuv[j] = ((int)*tl + *tr + *bl + *br) >> 2; tl += 2; tr += 2; bl += 2; br += 2; } yuv += uv_stride; tl += width; tr += width; bl += width; br += width; } free(tmp); return 1; } intel-gpu-tools-1.14/overlay/x11/x11-overlay.c0000644000175000017500000002106612665336131015763 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include "../overlay.h" #include "dri2.h" #include "position.h" #include "rgb2yuv.h" #ifndef ALIGN #define ALIGN(i,m) (((i) + (m) - 1) & ~((m) - 1)) #endif #define FOURCC_XVMC (('C' << 24) + ('M' << 16) + ('V' << 8) + 'X') #define FOURCC_RGB565 ((16 << 24) + ('B' << 16) + ('G' << 8) + 'R') #define FOURCC_RGB888 ((24 << 24) + ('B' << 16) + ('G' << 8) + 'R') struct x11_overlay { struct overlay base; Display *dpy; GC gc; XvPortID port; XvImage *image; void *map, *mem; int size; unsigned name; int x, y; int visible; }; static inline struct x11_overlay *to_x11_overlay(struct overlay *o) { return (struct x11_overlay *)o; } static int noop(Display *dpy, XErrorEvent *event) { return 0; } static void x11_overlay_show(struct overlay *overlay) { struct x11_overlay *priv = to_x11_overlay(overlay); if (priv->image->id == FOURCC_XVMC) rgb2yuv(priv->base.surface, priv->image, priv->map); else memcpy(priv->map, priv->mem, priv->size); if (!priv->visible) { XvPutImage(priv->dpy, priv->port, DefaultRootWindow(priv->dpy), priv->gc, priv->image, 0, 0, priv->image->width, priv->image->height, priv->x, priv->y, priv->image->width, priv->image->height); XFlush(priv->dpy); priv->visible = true; } } static void x11_overlay_hide(struct overlay *overlay) { struct x11_overlay *priv = to_x11_overlay(overlay); if (priv->visible) { XClearWindow(priv->dpy, DefaultRootWindow(priv->dpy)); XFlush(priv->dpy); priv->visible = false; } } static void x11_overlay_destroy(void *data) { struct x11_overlay *priv = data; munmap(priv->map, priv->size); free(priv->mem); XCloseDisplay(priv->dpy); free(priv); } cairo_surface_t * x11_overlay_create(struct config *config, int *width, int *height) { Display *dpy; Screen *scr; cairo_surface_t *surface; struct drm_i915_gem_create create; struct drm_gem_flink flink; struct drm_i915_gem_mmap_gtt map; struct x11_overlay *priv; unsigned int count, i, j; int fd, x, y, w, h; XvAdaptorInfo *info; XvImage *image; XvPortID port = -1; void *ptr, *mem; enum position position; dpy = XOpenDisplay(NULL); if (dpy == NULL) return NULL; scr = ScreenOfDisplay(dpy, DefaultScreen(dpy)); fd = dri2_open(dpy); if (fd < 0) goto err_dpy; if (XvQueryAdaptors(dpy, DefaultRootWindow(dpy), &count, &info) != Success) goto err_fd; for (i = 0; i < count; i++) { unsigned long visual = 0; if (info[i].num_ports != 1) continue; for (j = 0; j < info[j].num_formats; j++) { if (info[i].formats[j].depth == 24) { visual = info[i].formats[j].visual_id; break; } } if (visual == 0) continue; port = info[i].base_id; } XvFreeAdaptorInfo(info); if (port == -1) goto err_fd; XSetErrorHandler(noop); position = x11_position(dpy, *width, *height, config, &x, &y, &w, &h); image = XvCreateImage(dpy, port, FOURCC_RGB565, NULL, w, h); if (image == NULL) image = XvCreateImage(dpy, port, FOURCC_RGB888, NULL, w, h); if (image == NULL) { image = XvCreateImage(dpy, port, FOURCC_XVMC, NULL, w, h); if (image->pitches[0] == 4) { image->pitches[0] = ALIGN(image->width, 1024); image->pitches[1] = ALIGN(image->width/2, 1024); image->pitches[2] = ALIGN(image->width/2, 1024); image->offsets[0] = 0; image->offsets[1] = image->pitches[0] * image->height; image->offsets[2] = image->offsets[1] + image->pitches[1] * image->height/2; } rgb2yuv_init(); } if (image == NULL) goto err_fd; switch (image->id) { case FOURCC_RGB888: case FOURCC_RGB565: create.size = image->pitches[0] * image->height; break; case FOURCC_XVMC: create.size = image->pitches[0] * image->height; create.size += image->pitches[1] * image->height; break; } create.handle = 0; create.size = ALIGN(create.size, 4096); drmIoctl(fd, DRM_IOCTL_I915_GEM_CREATE, &create); if (create.handle == 0) goto err_image; flink.handle = create.handle; if (drmIoctl(fd, DRM_IOCTL_GEM_FLINK, &flink)) goto err_create; map.handle = create.handle; if (drmIoctl(fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &map)) goto err_create; ptr = mmap(0, create.size, PROT_READ | PROT_WRITE, MAP_SHARED, fd, map.offset); if (ptr == (void *)-1) goto err_create; mem = malloc(create.size); if (mem == NULL) goto err_map; switch (image->id) { default: case FOURCC_RGB888: i = CAIRO_FORMAT_RGB24; j = image->pitches[0]; break; case FOURCC_RGB565: i = CAIRO_FORMAT_RGB16_565; j = image->pitches[0]; break; case FOURCC_XVMC: i = CAIRO_FORMAT_RGB16_565; j = cairo_format_stride_for_width(i, image->width); break; } surface = cairo_image_surface_create_for_data(mem, i, image->width, image->height, j); if (cairo_surface_status(surface)) goto err_mem; priv = malloc(sizeof(*priv)); if (priv == NULL) goto err_surface; priv->base.surface = surface; priv->base.show = x11_overlay_show; priv->base.hide = x11_overlay_hide; priv->dpy = dpy; priv->gc = XCreateGC(dpy, DefaultRootWindow(dpy), 0, NULL); priv->port = port; priv->map = ptr; priv->mem = mem; priv->size = create.size; priv->name = flink.name; priv->visible = false; priv->x = x; priv->y = y; if (position != POS_UNSET) { switch (position & 7) { default: case 0: priv->x = 0; break; case 1: priv->x = (scr->width - image->width)/2; break; case 2: priv->x = scr->width - image->width; break; } switch ((position >> 4) & 7) { default: case 0: priv->y = 0; break; case 1: priv->y = (scr->height - image->height)/2; break; case 2: priv->y = scr->height - image->height; break; } } priv->image = image; priv->image->data = (void *)&priv->name; cairo_surface_set_user_data(surface, &overlay_key, priv, x11_overlay_destroy); XvSetPortAttribute(dpy, port, XInternAtom(dpy, "XV_ALWAYS_ON_TOP", True), 1); close(fd); *width = image->width; *height = image->height; return surface; err_surface: cairo_surface_destroy(surface); err_mem: free(mem); err_map: munmap(ptr, create.size); err_create: drmIoctl(fd, DRM_IOCTL_GEM_CLOSE, &create.handle); err_image: err_fd: close(fd); err_dpy: XCloseDisplay(dpy); return NULL; } void x11_overlay_stop(void) { Display *dpy; unsigned int count, i, j; XvAdaptorInfo *info; XvImage *image; XvPortID port = -1; uint32_t name; dpy = XOpenDisplay(NULL); if (dpy == NULL) return; if (XvQueryAdaptors(dpy, DefaultRootWindow(dpy), &count, &info) != Success) goto close; for (i = 0; i < count; i++) { unsigned long visual = 0; if (info[i].num_ports != 1) continue; for (j = 0; j < info[j].num_formats; j++) { if (info[i].formats[j].depth == 24) { visual = info[i].formats[j].visual_id; break; } } if (visual == 0) continue; port = info[i].base_id; } XvFreeAdaptorInfo(info); if (port == -1) goto close; XSetErrorHandler(noop); image = XvCreateImage(dpy, port, FOURCC_RGB565, NULL, 16, 16); if (image == NULL) image = XvCreateImage(dpy, port, FOURCC_RGB888, NULL, 16, 16); if (image == NULL) image = XvCreateImage(dpy, port, FOURCC_XVMC, NULL, 16, 16); if (image == NULL) goto close; name = 0; image->data = (void *)&name; XvPutImage(dpy, port, DefaultRootWindow(dpy), XCreateGC(dpy, DefaultRootWindow(dpy), 0, NULL), image, 0, 0, 1, 1, 0, 0, 1, 1); XSync(dpy, True); close: XCloseDisplay(dpy); } intel-gpu-tools-1.14/overlay/x11/dri2.c0000644000175000017500000001142212665336131014526 00000000000000/* * Copyright © 2008 Red Hat, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Soft- * ware"), to deal in the Software without restriction, including without * limitation the rights to use, copy, modify, merge, publish, distribute, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, provided that the above copyright * notice(s) and this permission notice appear in all copies of the Soft- * ware and that both the above copyright notice(s) and this permission * notice appear in supporting documentation. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABIL- * ITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT OF THIRD PARTY * RIGHTS. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR HOLDERS INCLUDED IN * THIS NOTICE BE LIABLE FOR ANY CLAIM, OR ANY SPECIAL INDIRECT OR CONSE- * QUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFOR- * MANCE OF THIS SOFTWARE. * * Except as contained in this notice, the name of a copyright holder shall * not be used in advertising or otherwise to promote the sale, use or * other dealings in this Software without prior written authorization of * the copyright holder. * * Authors: * Kristian Høgsberg (krh@redhat.com) */ #include #include #include #include #include #include #include #include #include #include #include "dri2.h" static char dri2ExtensionName[] = DRI2_NAME; static XExtensionInfo *dri2Info; static XEXT_GENERATE_CLOSE_DISPLAY (DRI2CloseDisplay, dri2Info) static /* const */ XExtensionHooks dri2ExtensionHooks = { NULL, /* create_gc */ NULL, /* copy_gc */ NULL, /* flush_gc */ NULL, /* free_gc */ NULL, /* create_font */ NULL, /* free_font */ DRI2CloseDisplay, /* close_display */ }; static XEXT_GENERATE_FIND_DISPLAY (DRI2FindDisplay, dri2Info, dri2ExtensionName, &dri2ExtensionHooks, 0, NULL) static Bool DRI2Connect(Display *dpy, XID window, char **driverName, char **deviceName) { XExtDisplayInfo *info = DRI2FindDisplay(dpy); xDRI2ConnectReply rep; xDRI2ConnectReq *req; XextCheckExtension(dpy, info, dri2ExtensionName, False); LockDisplay(dpy); GetReq(DRI2Connect, req); req->reqType = info->codes->major_opcode; req->dri2ReqType = X_DRI2Connect; req->window = window; req->driverType = DRI2DriverDRI; if (!_XReply(dpy, (xReply *) & rep, 0, xFalse)) { UnlockDisplay(dpy); SyncHandle(); return False; } if (rep.driverNameLength == 0 && rep.deviceNameLength == 0) { UnlockDisplay(dpy); SyncHandle(); return False; } *driverName = Xmalloc(rep.driverNameLength + 1); if (*driverName == NULL) { _XEatData(dpy, ((rep.driverNameLength + 3) & ~3) + ((rep.deviceNameLength + 3) & ~3)); UnlockDisplay(dpy); SyncHandle(); return False; } _XReadPad(dpy, *driverName, rep.driverNameLength); (*driverName)[rep.driverNameLength] = '\0'; *deviceName = Xmalloc(rep.deviceNameLength + 1); if (*deviceName == NULL) { Xfree(*driverName); _XEatData(dpy, ((rep.deviceNameLength + 3) & ~3)); UnlockDisplay(dpy); SyncHandle(); return False; } _XReadPad(dpy, *deviceName, rep.deviceNameLength); (*deviceName)[rep.deviceNameLength] = '\0'; UnlockDisplay(dpy); SyncHandle(); return True; } static Bool DRI2Authenticate(Display * dpy, XID window, unsigned int magic) { XExtDisplayInfo *info = DRI2FindDisplay(dpy); xDRI2AuthenticateReq *req; xDRI2AuthenticateReply rep; XextCheckExtension(dpy, info, dri2ExtensionName, False); LockDisplay(dpy); GetReq(DRI2Authenticate, req); req->reqType = info->codes->major_opcode; req->dri2ReqType = X_DRI2Authenticate; req->window = window; req->magic = magic; if (!_XReply(dpy, (xReply *) & rep, 0, xFalse)) { UnlockDisplay(dpy); SyncHandle(); return False; } UnlockDisplay(dpy); SyncHandle(); return rep.authenticated; } int dri2_open(Display *dpy) { drm_auth_t auth; char *driver, *device; int fd; if (!DRI2Connect(dpy, DefaultRootWindow(dpy), &driver, &device)) return -1; fd = open(device, O_RDWR); if (fd < 0) return -1; if (drmIoctl(fd, DRM_IOCTL_GET_MAGIC, &auth)) goto err_fd; if (!DRI2Authenticate(dpy, DefaultRootWindow(dpy), auth.magic)) goto err_fd; return fd; err_fd: close(fd); return -1; } intel-gpu-tools-1.14/overlay/x11/rgb2yuv.h0000644000175000017500000000257712665336131015306 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #ifndef RGB2YUV_H #define RGB2YUV_H #include #include #include #include void rgb2yuv_init(void); int rgb2yuv(cairo_surface_t *rgb, XvImage *image, uint8_t *yuv); #endif /* RGB2YUV_H */ intel-gpu-tools-1.14/overlay/rc6.c0000644000175000017500000001032612665336131013751 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include #include #include #include #include #include #include #include #include "rc6.h" #include "perf.h" static int perf_i915_open(int config, int group) { struct perf_event_attr attr; memset(&attr, 0, sizeof (attr)); attr.type = i915_type_id(); if (attr.type == 0) return -ENOENT; attr.config = config; attr.read_format = PERF_FORMAT_TOTAL_TIME_ENABLED; if (group == -1) attr.read_format |= PERF_FORMAT_GROUP; return perf_event_open(&attr, -1, 0, group, 0); } #define RC6 (1<<0) #define RC6p (1<<1) #define RC6pp (1<<2) static int perf_open(unsigned *flags) { int fd; fd = perf_i915_open(I915_PERF_RC6_RESIDENCY, -1); if (fd < 0) return -1; *flags |= RC6; if (perf_i915_open(I915_PERF_RC6p_RESIDENCY, fd) >= 0) *flags |= RC6p; if (perf_i915_open(I915_PERF_RC6pp_RESIDENCY, fd) >= 0) *flags |= RC6pp; return fd; } int rc6_init(struct rc6 *rc6) { memset(rc6, 0, sizeof(*rc6)); rc6->fd = perf_open(&rc6->flags); if (rc6->fd == -1) { struct stat st; if (stat("/sys/class/drm/card0/power", &st) < 0) return rc6->error = errno; } return 0; } static uint64_t file_to_u64(const char *path) { char buf[4096]; int fd, len; fd = open(path, 0); if (fd < 0) return -1; len = read(fd, buf, sizeof(buf)-1); close(fd); if (len < 0) return -1; buf[len] = '\0'; return strtoull(buf, 0, 0); } static uint64_t clock_ms_to_u64(void) { struct timespec tv; if (clock_gettime(CLOCK_MONOTONIC, &tv) < 0) return 0; return (uint64_t)tv.tv_sec * 1000 + tv.tv_nsec / 1000000; } int rc6_update(struct rc6 *rc6) { struct rc6_stat *s = &rc6->stat[rc6->count++&1]; struct rc6_stat *d = &rc6->stat[rc6->count&1]; uint64_t d_time, d_rc6, d_rc6p, d_rc6pp; if (rc6->error) return rc6->error; if (rc6->fd == -1) { struct stat st; if (stat("/sys/class/drm/card0/power/rc6_residency_ms", &st) < 0) return rc6->error = ENOENT; s->rc6_residency = file_to_u64("/sys/class/drm/card0/power/rc6_residency_ms"); s->rc6p_residency = file_to_u64("/sys/class/drm/card0/power/rc6p_residency_ms"); s->rc6pp_residency = file_to_u64("/sys/class/drm/card0/power/rc6pp_residency_ms"); s->timestamp = clock_ms_to_u64(); } else { uint64_t data[5]; int len; len = read(rc6->fd, data, sizeof(data)); if (len < 0) return rc6->error = errno; s->timestamp = data[1] / (1000*1000); len = 2; if (rc6->flags & RC6) s->rc6_residency = data[len++]; if (rc6->flags & RC6p) s->rc6p_residency = data[len++]; if (rc6->flags & RC6pp) s->rc6pp_residency = data[len++]; } if (rc6->count == 1) return EAGAIN; d_time = s->timestamp - d->timestamp; if (d_time == 0) { rc6->count--; return EAGAIN; } d_rc6 = s->rc6_residency - d->rc6_residency; rc6->rc6 = (100 * d_rc6 + d_time/2) / d_time; d_rc6p = s->rc6p_residency - d->rc6p_residency; rc6->rc6p = (100 * d_rc6p + d_time/2) / d_time; d_rc6pp = s->rc6pp_residency - d->rc6pp_residency; rc6->rc6pp = (100 * d_rc6pp + d_time/2) / d_time; rc6->rc6_combined = (100 * (d_rc6 + d_rc6p + d_rc6pp) + d_time/2) / d_time; return 0; } intel-gpu-tools-1.14/overlay/igfx.c0000644000175000017500000001264012665336131014215 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include #include #include #include #include #include "igfx.h" #include "i915_pciids.h" static const struct igfx_info generic_info = { .gen = -1, }; static const struct igfx_info i81x_info = { .gen = 010, }; static const struct igfx_info i830_info = { .gen = 020, }; static const struct igfx_info i845_info = { .gen = 020, }; static const struct igfx_info i855_info = { .gen = 021, }; static const struct igfx_info i865_info = { .gen = 022, }; static const struct igfx_info i915_info = { .gen = 030, }; static const struct igfx_info i945_info = { .gen = 031, }; static const struct igfx_info g33_info = { .gen = 033, }; static const struct igfx_info i965_info = { .gen = 040, }; static const struct igfx_info g4x_info = { .gen = 045, }; static const struct igfx_info ironlake_info = { .gen = 050, }; static const struct igfx_info sandybridge_info = { .gen = 060, }; static const struct igfx_info ivybridge_info = { .gen = 070, }; static const struct igfx_info valleyview_info = { .gen = 071, }; static const struct igfx_info haswell_info = { .gen = 075, }; static const struct igfx_info broadwell_info = { .gen = 0100, }; static const struct igfx_info cherryview_info = { .gen = 0101, }; static const struct igfx_info skylake_info = { .gen = 0110, }; static const struct igfx_info broxton_info = { .gen = 0111, }; static const struct pci_id_match match[] = { #if 0 INTEL_VGA_DEVICE(PCI_CHIP_I810, &i81x_info), INTEL_VGA_DEVICE(PCI_CHIP_I810_DC100, &i81x_info), INTEL_VGA_DEVICE(PCI_CHIP_I810_E, &i81x_info), INTEL_VGA_DEVICE(PCI_CHIP_I815, &i81x_info), #endif INTEL_I830_IDS(&i830_info), INTEL_I845G_IDS(&i830_info), INTEL_I85X_IDS(&i855_info), INTEL_I865G_IDS(&i865_info), INTEL_I915G_IDS(&i915_info), INTEL_I915GM_IDS(&i915_info), INTEL_I945G_IDS(&i945_info), INTEL_I945GM_IDS(&i945_info), INTEL_G33_IDS(&g33_info), INTEL_PINEVIEW_IDS(&g33_info), INTEL_I965G_IDS(&i965_info), INTEL_I965GM_IDS(&i965_info), INTEL_G45_IDS(&g4x_info), INTEL_GM45_IDS(&g4x_info), INTEL_IRONLAKE_D_IDS(&ironlake_info), INTEL_IRONLAKE_M_IDS(&ironlake_info), INTEL_SNB_D_IDS(&sandybridge_info), INTEL_SNB_M_IDS(&sandybridge_info), INTEL_IVB_D_IDS(&ivybridge_info), INTEL_IVB_M_IDS(&ivybridge_info), INTEL_HSW_D_IDS(&haswell_info), INTEL_HSW_M_IDS(&haswell_info), INTEL_VLV_D_IDS(&valleyview_info), INTEL_VLV_M_IDS(&valleyview_info), INTEL_BDW_D_IDS(&broadwell_info), INTEL_BDW_M_IDS(&broadwell_info), INTEL_CHV_IDS(&cherryview_info), INTEL_SKL_IDS(&skylake_info), INTEL_BXT_IDS(&broxton_info), INTEL_VGA_DEVICE(PCI_MATCH_ANY, &generic_info), { 0, 0, 0 }, }; struct pci_device *igfx_get(void) { struct pci_device *dev; if (pci_system_init()) return 0; dev = pci_device_find_by_slot(0, 0, 2, 0); if (dev == NULL || dev->vendor_id != 0x8086) { struct pci_device_iterator *iter; iter = pci_id_match_iterator_create(match); if (!iter) return 0; dev = pci_device_next(iter); pci_iterator_destroy(iter); } return dev; } const struct igfx_info *igfx_get_info(struct pci_device *dev) { int i; if (!dev) return 0; for (i = 0; match[i].device_id != PCI_MATCH_ANY; i++) if (dev->device_id == match[i].device_id) return (const struct igfx_info *)match[i].match_data; return &generic_info; } static int forcewake = -1; static void igfx_forcewake(void) { char buf[1024]; const char *path[] = { "/sys/kernel/debug/dri/", "/debug/dri/", 0, }; int i, j; for (j = 0; path[j]; j++) { struct stat st; if (stat(path[j], &st)) continue; for (i = 0; i < 16; i++) { snprintf(buf, sizeof(buf), "%s/%i/i915_forcewake_user", path[j], i); forcewake = open(buf, 0); if (forcewake != -1) return; } } } void *igfx_get_mmio(struct pci_device *dev) { const struct igfx_info *info; int mmio_bar, mmio_size; void *mmio; info = igfx_get_info(dev); if (info->gen >> 3 == 2) mmio_bar = 1; else mmio_bar = 0; if (info->gen < 030) mmio_size = 512*1024; else if (info->gen < 050) mmio_size = 512*1024; else mmio_size = 2*1024*1024; if (pci_device_probe(dev)) return 0; if (pci_device_map_range(dev, dev->regions[mmio_bar].base_addr, mmio_size, PCI_DEV_MAP_FLAG_WRITABLE, &mmio)) return 0; if (info->gen >= 060) igfx_forcewake(); return mmio; } intel-gpu-tools-1.14/gtk-doc.make0000644000175000017500000002351412650443475013630 00000000000000# -*- mode: makefile -*- #################################### # Everything below here is generic # #################################### if GTK_DOC_USE_LIBTOOL GTKDOC_CC = $(LIBTOOL) --tag=CC --mode=compile $(CC) $(INCLUDES) $(GTKDOC_DEPS_CFLAGS) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) GTKDOC_LD = $(LIBTOOL) --tag=CC --mode=link $(CC) $(GTKDOC_DEPS_LIBS) $(AM_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) $(LDFLAGS) GTKDOC_RUN = $(LIBTOOL) --mode=execute else GTKDOC_CC = $(CC) $(INCLUDES) $(GTKDOC_DEPS_CFLAGS) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) GTKDOC_LD = $(CC) $(GTKDOC_DEPS_LIBS) $(AM_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) $(LDFLAGS) GTKDOC_RUN = endif # We set GPATH here; this gives us semantics for GNU make # which are more like other make's VPATH, when it comes to # whether a source that is a target of one rule is then # searched for in VPATH/GPATH. # GPATH = $(srcdir) TARGET_DIR=$(HTML_DIR)/$(DOC_MODULE) SETUP_FILES = \ $(content_files) \ $(expand_content_files) \ $(DOC_MAIN_SGML_FILE) \ $(DOC_MODULE)-sections.txt \ $(DOC_MODULE)-overrides.txt EXTRA_DIST = \ $(HTML_IMAGES) \ $(SETUP_FILES) DOC_STAMPS=setup-build.stamp scan-build.stamp sgml-build.stamp \ html-build.stamp pdf-build.stamp \ sgml.stamp html.stamp pdf.stamp SCANOBJ_FILES = \ $(DOC_MODULE).args \ $(DOC_MODULE).hierarchy \ $(DOC_MODULE).interfaces \ $(DOC_MODULE).prerequisites \ $(DOC_MODULE).signals REPORT_FILES = \ $(DOC_MODULE)-undocumented.txt \ $(DOC_MODULE)-undeclared.txt \ $(DOC_MODULE)-unused.txt gtkdoc-check.test: Makefile $(AM_V_GEN)echo "#!/bin/sh -e" > $@; \ echo "$(GTKDOC_CHECK_PATH) || exit 1" >> $@; \ chmod +x $@ CLEANFILES = $(SCANOBJ_FILES) $(REPORT_FILES) $(DOC_STAMPS) gtkdoc-check.test if GTK_DOC_BUILD_HTML HTML_BUILD_STAMP=html-build.stamp else HTML_BUILD_STAMP= endif if GTK_DOC_BUILD_PDF PDF_BUILD_STAMP=pdf-build.stamp else PDF_BUILD_STAMP= endif all-gtk-doc: $(HTML_BUILD_STAMP) $(PDF_BUILD_STAMP) .PHONY: all-gtk-doc if ENABLE_GTK_DOC all-local: all-gtk-doc endif docs: $(HTML_BUILD_STAMP) $(PDF_BUILD_STAMP) $(REPORT_FILES): sgml-build.stamp #### setup #### GTK_DOC_V_SETUP=$(GTK_DOC_V_SETUP_$(V)) GTK_DOC_V_SETUP_=$(GTK_DOC_V_SETUP_$(AM_DEFAULT_VERBOSITY)) GTK_DOC_V_SETUP_0=@echo " DOC Preparing build"; setup-build.stamp: -$(GTK_DOC_V_SETUP)if test "$(abs_srcdir)" != "$(abs_builddir)" ; then \ files=`echo $(SETUP_FILES) $(DOC_MODULE).types`; \ if test "x$$files" != "x" ; then \ for file in $$files ; do \ destdir=`dirname $(abs_builddir)/$$file`; \ test -d "$$destdir" || mkdir -p "$$destdir"; \ test -f $(abs_srcdir)/$$file && \ cp -pf $(abs_srcdir)/$$file $(abs_builddir)/$$file || true; \ done; \ fi; \ fi $(AM_V_at)touch setup-build.stamp #### scan #### GTK_DOC_V_SCAN=$(GTK_DOC_V_SCAN_$(V)) GTK_DOC_V_SCAN_=$(GTK_DOC_V_SCAN_$(AM_DEFAULT_VERBOSITY)) GTK_DOC_V_SCAN_0=@echo " DOC Scanning header files"; GTK_DOC_V_INTROSPECT=$(GTK_DOC_V_INTROSPECT_$(V)) GTK_DOC_V_INTROSPECT_=$(GTK_DOC_V_INTROSPECT_$(AM_DEFAULT_VERBOSITY)) GTK_DOC_V_INTROSPECT_0=@echo " DOC Introspecting gobjects"; scan-build.stamp: setup-build.stamp $(HFILE_GLOB) $(CFILE_GLOB) $(GTK_DOC_V_SCAN)_source_dir='' ; \ for i in $(DOC_SOURCE_DIR) ; do \ _source_dir="$${_source_dir} --source-dir=$$i" ; \ done ; \ gtkdoc-scan --module=$(DOC_MODULE) --ignore-headers="$(IGNORE_HFILES)" $${_source_dir} $(SCAN_OPTIONS) $(EXTRA_HFILES) $(GTK_DOC_V_INTROSPECT)if grep -l '^..*$$' $(DOC_MODULE).types > /dev/null 2>&1 ; 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Release 1.13 (2015-12-02) ------------------------- - New test: kms_atomic tests atomic mode setting (Daniel Stone) - New test: core_prop_blob tests blob properties (Daniel Stone) - New test: gem_request_retire targets request retirement code paths (Tvrtko Ursulin) - New test: core_setmaster_vs_auth checks that drop/setMaster correctly transfer master state (Thomas Hellstrom/Daniel Vetter) - Wildcard characters are now accepted when using the --run-subtest command line option to specify multiple subtests to run. (Thomas Wood) - Add support for Broxton in intel_audio_dump (Han Lu) - Added Kabylake support (Rodrigo Vivi/Wayne Boyer) - Many other bug fixes and improvements Release 1.12 (2015-09-11) ------------------------- - Various new tests and tools - New statistical analysis functions. (Damien Lespiau) - New benchmark tests. (Chris Wilson) - Old register tools that were superseded by intel_reg have been removed. - Various tests have been marked "basic", to indicate they are suitable for use in basic acceptance testing. (Jesse Barnes) - Per-ring gem_storedw_loop tests combined into a single test with subtests. (Jesse Barnes) - New "aubdump" tool, used to launch an application and capture rendering to an AUB file. (Kristian Høgsberg Kristensen) - Cherryview support added to intel_display_poller. (Ville Syrjälä) - Skylake and Broadwell support added to gem_gpgpu_fill tests. (Dominik Zeromski) - Support for running core drm tests on any platform. (Micah Fedke) - Many other bug fixes Release 1.11 (2015-06-11) ------------------------- - Various new tests and tools - Single combined test list (supported by piglit since commit 8a122bb) - Optional dependency on libunwind to provide automatic stack traces on test failures. (Thomas Wood) - Add optional default debug and optimisation flags for tests to enable better stack traces and debugging. (Thomas Wood) - Test programs are now installed into libexec. This is useful when building a complete software stack for a DUT from scratch. (Building and installing tests can still be disabled by the --disable-tests configure flag.) (Joonas Lahtinen) - New tool to decode watermark registers (Ville Syrjälä) - Timeout mechanism now reports test as failed - Introduce intel_reg as the one Intel graphics register multitool to replace intel_reg_read, intel_reg_write, intel_iosf_sb_read, intel_iosf_sb_write, intel_vga_read, intel_vga_write, intel_reg_dumper, intel_reg_snapshot, and quick_dump.py. (Jani Nikula) - Add functions to manipulate i915.ko parameters and ensure features are enabled for testing. (Paulo Zanoni) Release 1.10 (2015-03-12) ------------------------- - New frequency manipulation tool (intel_gpu_frequency) - Adjustments for the Solaris port (Alan Coopersmith). - Remove tests/NAMING-CONVENTION since it's all in the docbook now, to avoid divergent conventions. - New CRITICAL log level for really serious stuff (Thomas Wood). - Interactive test mode can now be enabled by the shared cmdline option --interactive-debug=$var (Rodrigo Vivi). - Improved logging to kmsg to better line up test runs with kernel messages (Chris Wilson). - Record all log levels (including disabled levels) in a ringbuffer and dump that on test failures for quicker diagnostics of automated test run results (Thomas Wood). - A lot of small polish all over the test library. - Piles of new testcases and improvements to existing ones as usual. Release 1.9 (2014-12-12) ------------------------ - New test cases added: drm_import_export, gem_gpgpu_fill, gem_ppgtt, gem_tiled_wb, kms_pwrite_crc. - New helper for interactive progress indicators (see igt_print_activity and igt_progress), which can be disabled by setting the log-level to warn (Thomas and Daniel). - Basic skl support: pci ids, rendercopy & mediafill (Damien, Zhao Yakui). - chv support for the iosf sideband tools and a few other improvements (Ville). - Fence register support for intel_reg_dumper on bdw+ (Rodrigo). - Support for skl in quick_dump (Damien). - Golden state generation infrastructure (Mika). - New skl watermark tool (Damien). - New EDID test block that includes multiple display modes (Thomas). - Individual test documentation available in generated documentation and from the test binaries (Thomas). - New logging domains and log filtering (Thomas). - Various API documentation fixes and improvements (Thomas). Release 1.8 (2014-09-08) ------------------------ - Added lib/igt.cocci semantic patch to catch often-seen patterns and convert them to igt macros/infrastructure. - Improvements to the documentation build systems (Thomas). - Small fixes and improvements to the igt infrastructure and helpers all over. - As usual piles of new tests. - Improved plane/pipe handling in the igt_kms library (Damien). - Unified option parsing between simple tests and tests with subtests (Thomas). This will allow us to merge the different Makefile targets once test runners are converted. - New commit functions for igt_kms to support the new universal planes interfaces (Matt Roper). - Polish the debug output when test requirements aren't met a bit and inject the program name/subtest in dmesg for easier backtrace/oom debugging (Chris). - A bit of polish for the framebuffer helper functions (Damien). - Robuster option parsing helpers, they now check for conflicts when merging different option lists (Thomas). - MIPI DSI vbt support in intel_bios_read (Gaurav K Singh). - Clarify the split between low-level helpers and the high-level library in igt_kms a bit by renaming some functions and improving and extending the api documentation. - Helper to restore the vt mode, useful to test lastclose/fbdev emulation behaviour (Thomas). - Refactor the support for 64bit relocs. By specifying the number of relocations explicit a lot of the gen8 checks can be removed from simple testcases which only use the blitter (Chris). Release 1.7 (2014-06-09) ------------------------ - Piles of API documentation for the core i-g-t testing libraries. - Improved igt loggin, now also with igt_vlog (for va_args printf-style logging). - Polish for the igt_debugfs library. - Split out igt_fb library from igt_kms, cleanup of the igt_kms functions. - Android porting patches (Tim Gore, Tvrtko Ursulin). - Piles more tests as usual. - Support for building libcairo based tests on Android. Set ANDROID_HAS_CAIRO=1 in the build enviroment when you have this (Tim Gore). - Timeout support in igt_aux, see igt_set_timeout (Thomas). - Documentation for the testrunner interface like exit codes, subtest enumeration and log output. Should help other people to run the tests in their own framework. - Make swig an optional dependency (Damien). - Helpers for runtime pm tests in igt_aux. Release 1.6 (2014-03-13) ------------------------ - Changes to support Broadwell in the test suite. (Ben, Damien, et al.) - Updated (now working again!) Android support from Oscar Mateo. - Test coverage through i-g-t is now officially an integral part of any drm/i915 feature work and also for bugfixes. For more details see: http://blog.ffwll.ch/2013/11/testing-requirements-for-drmi915.html - Fix the gen4asm build dependency handling, now that the assembler is included in i-g-t (Ben). - Improve the cairo object lifetime management of the kmstest helpers (Chris). - Allow register access to succeed if i915 is loaded but debugfs isn't found (i.e. nomodeset is used) - New kernel modesetting helper library for simpler testcases (Damien). - New structure logging support for tests. Message at the WARN level be reflected in the piglit result, also included igt_warn_on macros to simplify test asserts which should just result in warnings, but not in a test abort. - Broadwell support for intel_audio_dump (Mengdong Lin). - API documentation support (Thomas) Release 1.5 (2013-11-06) ------------------------ - Some polishing of the test infrastructure, for details see: http://blog.ffwll.ch/2013/09/more-drmi915-testsuite-infrastructure.html - Haswell support for the DPF tool (tools/intel_l3_parity) and other improvements (Ben). - Stereo/3D support in testdisplay (Damien). - Support for gen7 gpu perf counters in tools/intel_perf_counters (Kenneth). - Improvements to the VBT decoder (Jani). - New tool to read legacy VGA registers (Ville). - New helpers in the test library to help deal with debugfs files and the new display pipe CRC support (Damien). - Introduction of a proper naming convention for all the testcases, see tests/NAMING-CONVENTION. - As usual tons of new testcases and improvements and bugfixes to existing ones. - The testsuite framework itself has gained some regression tests which can be run at compile-time with "make check". - New helpers for the drop_cache kernel interface and use drop_caches(RETIRE) to really make sure the gpu is idle in testcases (Oscar Mateo). Release 1.4 (2013-09-16) ------------------------ - Integration of the gen4+ assembler (Damien). - Start of a new performance analysis tool from Chris Wilson with front-ends for both X11 and plain kms. This uses the perf subsystem and the gpu performance counter kernel patches from Chris. - New register dumper quick_dump from Ben, with lots of work from Damien. This will superseed intel_reg_dumper for newer platforms (which are not yet released) since it will allow us to automatically generate register dumps from the internal xml register specifications. - Tools to access the pletoria of new indirect register access functions on newer platforms. - Framebuffer contents dumper to debug some of the nastier corruption issues. The advantage here is that this bypasses any userspace drivers and so avoids that the corruptions get magically fixed when taking an X screenshot. - Tons of new testcases. Including subtests we are now at roughly 450 tests! - Improvements to the test framework infrastructure. See http://blog.ffwll.ch/2013/08/recent-drmi915-testsuite-improvements.html for an overview. Release 1.3 (2012-08-27) ------------------------ - massive improvements to the testsuite - dpf tool for handling l3 remapping on gen7 (Ben) - robustify against wc gtt mappings (Chris) - improvements to the reg_dumper and register read/write tools - haswell support Release 1.2 (2012-02-09) ------------------------ - intel_audio_dump improvements (Wu Fengguang) - buildsystem improvements (Gaetan Nadon) - solaris support (Alan Coopersmith) - massive refactoring of testcases and rendercpy extraction - new tests - fixed up intel_reg_read/write for platforms needing forcewake (needs a kernel patch which from 3.3 to work on ivb - Ben Widawsky) Release 1.1 (2011-12-24) ------------------------ Improved testsuite, usable for kernel regression testing! Release 1.0 (2009-04-27) ------------------------ Initial release: - miscellaneous userland tools that don't really fit into the 2D driver tree - standalone regression tests for the DRM (make check) - microbenchmarks of the DRM for kernel performance regression testing intel-gpu-tools-1.14/Makefile.am0000644000175000017500000000312212665336131013462 00000000000000# Copyright © 2005 Adam Jackson. # Copyright © 2009,2013 Intel Corporation # # Permission is hereby granted, free of charge, to any person obtaining a # copy of this software and associated documentation files (the "Software"), # to deal in the Software without restriction, including without limitation # on the rights to use, copy, modify, merge, publish, distribute, sub # license, and/or sell copies of the Software, and to permit persons to whom # the Software is furnished to do so, subject to the following conditions: # # The above copyright notice and this permission notice (including the next # paragraph) shall be included in all copies or substantial portions of the # Software. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, # FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL # ADAM JACKSON BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER # IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN # CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ACLOCAL_AMFLAGS = ${ACLOCAL_FLAGS} -I m4 SUBDIRS = lib man tools scripts benchmarks if BUILD_TESTS SUBDIRS += tests endif if BUILD_X86 if BUILD_ASSEMBLER SUBDIRS += assembler endif if BUILD_SHADER_DEBUGGER SUBDIRS += debugger endif SUBDIRS += overlay demos benchmarks endif SUBDIRS += docs MAINTAINERCLEANFILES = ChangeLog INSTALL .PHONY: ChangeLog INSTALL INSTALL: $(INSTALL_CMD) ChangeLog: $(CHANGELOG_CMD) dist-hook: ChangeLog INSTALL intel-gpu-tools-1.14/lib/0000755000175000017500000000000012665337376012272 500000000000000intel-gpu-tools-1.14/lib/intel_chipset.c0000644000175000017500000001137412665336131015202 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. * * Authors: * Eric Anholt * */ #include #include #include #include #include #include #include #include #include #include #include #include "i915_drm.h" #include "intel_chipset.h" #include "igt_core.h" /** * SECTION:intel_chipset * @short_description: Feature macros and chipset helpers * @title: Chipset * @include: igt.h * * This library mostly provides feature macros which use raw pci device ids. It * also provides a few more helper functions to handle pci devices, chipset * detection and related issues. */ /** * intel_pch: * * Global variable to keep track of the pch type. Can either be set manually or * detected at runtime with intel_check_pch(). */ enum pch_type intel_pch; /** * intel_get_pci_device: * * Looks up the main graphics pci device using libpciaccess. * * Returns: * The pci_device, exits the program on any failures. */ struct pci_device * intel_get_pci_device(void) { struct pci_device *pci_dev; int error; error = pci_system_init(); igt_fail_on_f(error != 0, "Couldn't initialize PCI system\n"); /* Grab the graphics card. Try the canonical slot first, then * walk the entire PCI bus for a matching device. */ pci_dev = pci_device_find_by_slot(0, 0, 2, 0); if (pci_dev == NULL || pci_dev->vendor_id != 0x8086) { struct pci_device_iterator *iter; struct pci_id_match match; match.vendor_id = 0x8086; /* Intel */ match.device_id = PCI_MATCH_ANY; match.subvendor_id = PCI_MATCH_ANY; match.subdevice_id = PCI_MATCH_ANY; match.device_class = 0x3 << 16; match.device_class_mask = 0xff << 16; match.match_data = 0; iter = pci_id_match_iterator_create(&match); pci_dev = pci_device_next(iter); pci_iterator_destroy(iter); } if (pci_dev == NULL) errx(1, "Couldn't find graphics card"); error = pci_device_probe(pci_dev); igt_fail_on_f(error != 0, "Couldn't probe graphics card\n"); if (pci_dev->vendor_id != 0x8086) errx(1, "Graphics card is non-intel"); return pci_dev; } extern uint16_t __drm_device_id; /** * intel_get_drm_devid: * @fd: open i915 drm file descriptor * * Queries the kernel for the pci device id corresponding to the drm file * descriptor. * * Returns: * The devid, exits the program on any failures. */ uint32_t intel_get_drm_devid(int fd) { const char *override; igt_assert(__drm_device_id); override = getenv("INTEL_DEVID_OVERRIDE"); if (override) return strtol(override, NULL, 0); else return __drm_device_id; } /** * intel_gen: * @devid: pci device id * * Computes the Intel GFX generation for the give device id. * * Returns: * The GFX generation on successful lookup, -1 on failure. */ int intel_gen(uint32_t devid) { if (IS_GEN2(devid)) return 2; if (IS_GEN3(devid)) return 3; if (IS_GEN4(devid)) return 4; if (IS_GEN5(devid)) return 5; if (IS_GEN6(devid)) return 6; if (IS_GEN7(devid)) return 7; if (IS_GEN8(devid)) return 8; if (IS_GEN9(devid)) return 9; return -1; } /** * intel_check_pch: * * Detects the PCH chipset type of the running systems and fills in the results * into the global #intel_pch variable. */ void intel_check_pch(void) { struct pci_device *pch_dev; pch_dev = pci_device_find_by_slot(0, 0, 31, 0); if (pch_dev == NULL) return; if (pch_dev->vendor_id != 0x8086) return; switch (pch_dev->device_id & 0xff00) { case 0x3b00: intel_pch = PCH_IBX; break; case 0x1c00: case 0x1e00: intel_pch = PCH_CPT; break; case 0x8c00: case 0x9c00: intel_pch = PCH_LPT; break; default: intel_pch = PCH_NONE; return; } } intel-gpu-tools-1.14/lib/media_fill_gen8lp.c0000644000175000017500000002134612665336131015712 00000000000000#include #include #include "media_fill.h" #include "gen8_media.h" #include "intel_reg.h" #include "drmtest.h" #include static const uint32_t media_kernel[][4] = { { 0x00400001, 0x20202288, 0x00000020, 0x00000000 }, { 0x00600001, 0x20800208, 0x008d0000, 0x00000000 }, { 0x00200001, 0x20800208, 0x00450040, 0x00000000 }, { 0x00000001, 0x20880608, 0x00000000, 0x000f000f }, { 0x00800001, 0x20a00208, 0x00000020, 0x00000000 }, { 0x00800001, 0x20e00208, 0x00000020, 0x00000000 }, { 0x00800001, 0x21200208, 0x00000020, 0x00000000 }, { 0x00800001, 0x21600208, 0x00000020, 0x00000000 }, { 0x0c800031, 0x24000a40, 0x0e000080, 0x120a8000 }, { 0x00600001, 0x2e000208, 0x008d0000, 0x00000000 }, { 0x07800031, 0x20000a40, 0x0e000e00, 0x82000010 }, }; static uint32_t batch_used(struct intel_batchbuffer *batch) { return batch->ptr - batch->buffer; } static uint32_t batch_align(struct intel_batchbuffer *batch, uint32_t align) { uint32_t offset = batch_used(batch); offset = ALIGN(offset, align); batch->ptr = batch->buffer + offset; return offset; } static void * batch_alloc(struct intel_batchbuffer *batch, uint32_t size, uint32_t align) { uint32_t offset = batch_align(batch, align); batch->ptr += size; return memset(batch->buffer + offset, 0, size); } static uint32_t batch_offset(struct intel_batchbuffer *batch, void *ptr) { return (uint8_t *)ptr - batch->buffer; } static uint32_t batch_copy(struct intel_batchbuffer *batch, const void *ptr, uint32_t size, uint32_t align) { return batch_offset(batch, memcpy(batch_alloc(batch, size, align), ptr, size)); } static void gen8_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end) { int ret; ret = drm_intel_bo_subdata(batch->bo, 0, 4096, batch->buffer); if (ret == 0) ret = drm_intel_bo_mrb_exec(batch->bo, batch_end, NULL, 0, 0, 0); igt_assert(ret == 0); } static uint32_t gen8_fill_curbe_buffer_data(struct intel_batchbuffer *batch, uint8_t color) { uint8_t *curbe_buffer; uint32_t offset; curbe_buffer = batch_alloc(batch, sizeof(uint32_t) * 8, 64); offset = batch_offset(batch, curbe_buffer); *curbe_buffer = color; return offset; } static uint32_t gen8_fill_surface_state(struct intel_batchbuffer *batch, struct igt_buf *buf, uint32_t format, int is_dst) { struct gen8_surface_state *ss; uint32_t write_domain, read_domain, offset; int ret; if (is_dst) { write_domain = read_domain = I915_GEM_DOMAIN_RENDER; } else { write_domain = 0; read_domain = I915_GEM_DOMAIN_SAMPLER; } ss = batch_alloc(batch, sizeof(*ss), 64); offset = batch_offset(batch, ss); ss->ss0.surface_type = GEN8_SURFACE_2D; ss->ss0.surface_format = format; ss->ss0.render_cache_read_write = 1; ss->ss0.vertical_alignment = 1; /* align 4 */ ss->ss0.horizontal_alignment = 1; /* align 4 */ if (buf->tiling == I915_TILING_X) ss->ss0.tiled_mode = 2; else if (buf->tiling == I915_TILING_Y) ss->ss0.tiled_mode = 3; ss->ss8.base_addr = buf->bo->offset; ret = drm_intel_bo_emit_reloc(batch->bo, batch_offset(batch, ss) + 8 * 4, buf->bo, 0, read_domain, write_domain); igt_assert(ret == 0); ss->ss2.height = igt_buf_height(buf) - 1; ss->ss2.width = igt_buf_width(buf) - 1; ss->ss3.pitch = buf->stride - 1; ss->ss7.shader_chanel_select_r = 4; ss->ss7.shader_chanel_select_g = 5; ss->ss7.shader_chanel_select_b = 6; ss->ss7.shader_chanel_select_a = 7; return offset; } static uint32_t gen8_fill_binding_table(struct intel_batchbuffer *batch, struct igt_buf *dst) { uint32_t *binding_table, offset; binding_table = batch_alloc(batch, 32, 64); offset = batch_offset(batch, binding_table); binding_table[0] = gen8_fill_surface_state(batch, dst, GEN8_SURFACEFORMAT_R8_UNORM, 1); return offset; } static uint32_t gen8_fill_media_kernel(struct intel_batchbuffer *batch, const uint32_t kernel[][4], size_t size) { uint32_t offset; offset = batch_copy(batch, kernel, size, 64); return offset; } static uint32_t gen8_fill_interface_descriptor(struct intel_batchbuffer *batch, struct igt_buf *dst) { struct gen8_interface_descriptor_data *idd; uint32_t offset; uint32_t binding_table_offset, kernel_offset; binding_table_offset = gen8_fill_binding_table(batch, dst); kernel_offset = gen8_fill_media_kernel(batch, media_kernel, sizeof(media_kernel)); idd = batch_alloc(batch, sizeof(*idd), 64); offset = batch_offset(batch, idd); idd->desc0.kernel_start_pointer = (kernel_offset >> 6); idd->desc2.single_program_flow = 1; idd->desc2.floating_point_mode = GEN8_FLOATING_POINT_IEEE_754; idd->desc3.sampler_count = 0; /* 0 samplers used */ idd->desc3.sampler_state_pointer = 0; idd->desc4.binding_table_entry_count = 0; idd->desc4.binding_table_pointer = (binding_table_offset >> 5); idd->desc5.constant_urb_entry_read_offset = 0; idd->desc5.constant_urb_entry_read_length = 1; /* grf 1 */ return offset; } static void gen8_emit_state_base_address(struct intel_batchbuffer *batch) { OUT_BATCH(GEN8_STATE_BASE_ADDRESS | (16 - 2)); /* general */ OUT_BATCH(0 | BASE_ADDRESS_MODIFY); OUT_BATCH(0); /* stateless data port */ OUT_BATCH(0 | BASE_ADDRESS_MODIFY); /* surface */ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY); /* dynamic */ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* indirect */ OUT_BATCH(0); OUT_BATCH(0); /* instruction */ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* general state buffer size */ OUT_BATCH(0xfffff000 | 1); /* dynamic state buffer size */ OUT_BATCH(1 << 12 | 1); /* indirect object buffer size */ OUT_BATCH(0xfffff000 | 1); /* intruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */ OUT_BATCH(1 << 12 | 1); } static void gen8_emit_vfe_state(struct intel_batchbuffer *batch) { OUT_BATCH(GEN8_MEDIA_VFE_STATE | (9 - 2)); /* scratch buffer */ OUT_BATCH(0); OUT_BATCH(0); /* number of threads & urb entries */ OUT_BATCH(1 << 16 | 2 << 8); OUT_BATCH(0); /* urb entry size & curbe size */ OUT_BATCH(2 << 16 | 2); /* scoreboard */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } static void gen8_emit_curbe_load(struct intel_batchbuffer *batch, uint32_t curbe_buffer) { OUT_BATCH(GEN8_MEDIA_CURBE_LOAD | (4 - 2)); OUT_BATCH(0); /* curbe total data length */ OUT_BATCH(64); /* curbe data start address, is relative to the dynamics base address */ OUT_BATCH(curbe_buffer); } static void gen8_emit_interface_descriptor_load(struct intel_batchbuffer *batch, uint32_t interface_descriptor) { OUT_BATCH(GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD | (4 - 2)); OUT_BATCH(0); /* interface descriptor data length */ OUT_BATCH(sizeof(struct gen8_interface_descriptor_data)); /* interface descriptor address, is relative to the dynamics base address */ OUT_BATCH(interface_descriptor); } static void gen8lp_emit_media_objects(struct intel_batchbuffer *batch, unsigned x, unsigned y, unsigned width, unsigned height) { int i, j; for (i = 0; i < width / 16; i++) { for (j = 0; j < height / 16; j++) { OUT_BATCH(GEN8_MEDIA_OBJECT | (8 - 2)); /* interface descriptor offset */ OUT_BATCH(0); /* without indirect data */ OUT_BATCH(0); OUT_BATCH(0); /* scoreboard */ OUT_BATCH(0); OUT_BATCH(0); /* inline data (xoffset, yoffset) */ OUT_BATCH(x + i * 16); OUT_BATCH(y + j * 16); } } } /* * This sets up the media pipeline, * * +---------------+ <---- 4096 * | ^ | * | | | * | various | * | state | * | | | * |_______|_______| <---- 2048 + ? * | ^ | * | | | * | batch | * | commands | * | | | * | | | * +---------------+ <---- 0 + ? * */ #define BATCH_STATE_SPLIT 2048 void gen8lp_media_fillfunc(struct intel_batchbuffer *batch, struct igt_buf *dst, unsigned x, unsigned y, unsigned width, unsigned height, uint8_t color) { uint32_t curbe_buffer, interface_descriptor; uint32_t batch_end; intel_batchbuffer_flush(batch); /* setup states */ batch->ptr = &batch->buffer[BATCH_STATE_SPLIT]; curbe_buffer = gen8_fill_curbe_buffer_data(batch, color); interface_descriptor = gen8_fill_interface_descriptor(batch, dst); igt_assert(batch->ptr < &batch->buffer[4095]); /* media pipeline */ batch->ptr = batch->buffer; OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA); gen8_emit_state_base_address(batch); gen8_emit_vfe_state(batch); gen8_emit_curbe_load(batch, curbe_buffer); gen8_emit_interface_descriptor_load(batch, interface_descriptor); gen8lp_emit_media_objects(batch, x, y, width, height); OUT_BATCH(MI_BATCH_BUFFER_END); batch_end = batch_align(batch, 8); igt_assert(batch_end < BATCH_STATE_SPLIT); gen8_render_flush(batch, batch_end); intel_batchbuffer_reset(batch); } intel-gpu-tools-1.14/lib/igt_pm.c0000644000175000017500000001504412665336131013625 00000000000000/* * Copyright © 2013, 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Paulo Zanoni * David Weinehall * */ #include #include #include #include #include #include #include #include #include "drmtest.h" #include "igt_pm.h" enum { POLICY_UNKNOWN = -1, POLICY_MAX_PERFORMANCE = 0, POLICY_MEDIUM_POWER = 1, POLICY_MIN_POWER = 2 }; #define MAX_PERFORMANCE_STR "max_performance\n" #define MEDIUM_POWER_STR "medium_power\n" #define MIN_POWER_STR "min_power\n" /* Remember to fix this if adding longer strings */ #define MAX_POLICY_STRLEN strlen(MAX_PERFORMANCE_STR) /** * SECTION:igt_pm * @short_description: Power Management related helpers * @title: Power Management * @include: igt.h * * This library provides various helpers to enable power management for, * and in some cases subsequently allow restoring the old behaviour of, * various external components that by default are set up in a way * that interferes with the testing of our power management functionality. */ /** * igt_pm_enable_audio_runtime_pm: * * We know that if we don't enable audio runtime PM, snd_hda_intel will never * release its power well refcount, and we'll never reach the LPSP state. * There's no guarantee that it will release the power well if we enable * runtime PM, but at least we can try. * * We don't have any assertions on open since the user may not even have * snd_hda_intel loaded, which is not a problem. */ void igt_pm_enable_audio_runtime_pm(void) { int fd; fd = open("/sys/module/snd_hda_intel/parameters/power_save", O_WRONLY); if (fd >= 0) { igt_assert_eq(write(fd, "1\n", 2), 2); close(fd); } fd = open("/sys/bus/pci/devices/0000:00:03.0/power/control", O_WRONLY); if (fd >= 0) { igt_assert_eq(write(fd, "auto\n", 5), 5); close(fd); } /* Give some time for it to react. */ sleep(1); } /** * igt_pm_enable_sata_link_power_management: * * Enable the min_power policy for SATA link power management. * Without this we cannot reach deep runtime power states. * * We don't have any assertions on open since the system might not have * a SATA host. * * Returns: * An opaque pointer to the data needed to restore the default values * after the test has terminated, or NULL if SATA link power management * is not supported. This pointer should be freed when no longer used * (typically after having called restore_sata_link_power_management()). */ int8_t *igt_pm_enable_sata_link_power_management(void) { int fd, i; ssize_t len; char *buf; char *file_name; int8_t *link_pm_policies = NULL; file_name = malloc(PATH_MAX); buf = malloc(MAX_POLICY_STRLEN + 1); for (i = 0; ; i++) { int8_t policy; snprintf(file_name, PATH_MAX, "/sys/class/scsi_host/host%d/link_power_management_policy", i); fd = open(file_name, O_RDWR); if (fd < 0) break; len = read(fd, buf, MAX_POLICY_STRLEN); buf[len] = '\0'; if (!strncmp(MAX_PERFORMANCE_STR, buf, strlen(MAX_PERFORMANCE_STR))) policy = POLICY_MAX_PERFORMANCE; else if (!strncmp(MEDIUM_POWER_STR, buf, strlen(MEDIUM_POWER_STR))) policy = POLICY_MEDIUM_POWER; else if (!strncmp(MIN_POWER_STR, buf, strlen(MIN_POWER_STR))) policy = POLICY_MIN_POWER; else policy = POLICY_UNKNOWN; if (!(i % 256)) link_pm_policies = realloc(link_pm_policies, (i / 256 + 1) * 256 + 1); link_pm_policies[i] = policy; link_pm_policies[i + 1] = 0; /* If the policy is something we don't know about, * don't touch it, since we might potentially break things. * And we obviously don't need to touch anything if the * setting is already correct... */ if (policy != POLICY_UNKNOWN && policy != POLICY_MIN_POWER) { lseek(fd, 0, SEEK_SET); igt_assert_eq(write(fd, MIN_POWER_STR, strlen(MIN_POWER_STR)), strlen(MIN_POWER_STR)); } close(fd); } free(buf); free(file_name); return link_pm_policies; } /** * igt_pm_restore_sata_link_power_management: * @pm_data: An opaque pointer with saved link PM policies; * If NULL is passed we force enable the "max_performance" policy. * * Restore the link power management policies to the values * prior to enabling min_power. * * Caveat: If the system supports hotplugging and hotplugging takes * place during our testing so that the hosts change numbers * we might restore the settings to the wrong hosts. */ void igt_pm_restore_sata_link_power_management(int8_t *pm_data) { int fd, i; char *file_name; /* Disk runtime PM policies. */ file_name = malloc(PATH_MAX); for (i = 0; ; i++) { int8_t policy; if (!pm_data) policy = POLICY_MAX_PERFORMANCE; else if (pm_data[i] == POLICY_UNKNOWN) continue; else policy = pm_data[i]; snprintf(file_name, PATH_MAX, "/sys/class/scsi_host/host%d/link_power_management_policy", i); fd = open(file_name, O_WRONLY); if (fd < 0) break; switch (policy) { default: case POLICY_MAX_PERFORMANCE: igt_assert_eq(write(fd, MAX_PERFORMANCE_STR, strlen(MAX_PERFORMANCE_STR)), strlen(MAX_PERFORMANCE_STR)); break; case POLICY_MEDIUM_POWER: igt_assert_eq(write(fd, MEDIUM_POWER_STR, strlen(MEDIUM_POWER_STR)), strlen(MEDIUM_POWER_STR)); break; case POLICY_MIN_POWER: igt_assert_eq(write(fd, MIN_POWER_STR, strlen(MIN_POWER_STR)), strlen(MIN_POWER_STR)); break; } close(fd); } free(file_name); } intel-gpu-tools-1.14/lib/gpgpu_fill.c0000644000175000017500000005165612665336131014507 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Zhenyu Wang * Dominik Zeromski */ #include #include #include "intel_reg.h" #include "drmtest.h" #include "intel_batchbuffer.h" #include "gen7_media.h" #include "gen8_media.h" #include "gpgpu_fill.h" /* shaders/gpgpu/gpgpu_fill.gxa */ static const uint32_t gen7_gpgpu_kernel[][4] = { { 0x00400001, 0x20200231, 0x00000020, 0x00000000 }, { 0x00000041, 0x20400c21, 0x00000004, 0x00000010 }, { 0x00000001, 0x20440021, 0x00000018, 0x00000000 }, { 0x00600001, 0x20800021, 0x008d0000, 0x00000000 }, { 0x00200001, 0x20800021, 0x00450040, 0x00000000 }, { 0x00000001, 0x20880061, 0x00000000, 0x0000000f }, { 0x00800001, 0x20a00021, 0x00000020, 0x00000000 }, { 0x05800031, 0x24001ca8, 0x00000080, 0x060a8000 }, { 0x00600001, 0x2e000021, 0x008d0000, 0x00000000 }, { 0x07800031, 0x20001ca8, 0x00000e00, 0x82000010 }, }; static const uint32_t gen8_gpgpu_kernel[][4] = { { 0x00400001, 0x20202288, 0x00000020, 0x00000000 }, { 0x00000041, 0x20400208, 0x06000004, 0x00000010 }, { 0x00000001, 0x20440208, 0x00000018, 0x00000000 }, { 0x00600001, 0x20800208, 0x008d0000, 0x00000000 }, { 0x00200001, 0x20800208, 0x00450040, 0x00000000 }, { 0x00000001, 0x20880608, 0x00000000, 0x0000000f }, { 0x00800001, 0x20a00208, 0x00000020, 0x00000000 }, { 0x0c800031, 0x24000a40, 0x0e000080, 0x060a8000 }, { 0x00600001, 0x2e000208, 0x008d0000, 0x00000000 }, { 0x07800031, 0x20000a40, 0x0e000e00, 0x82000010 }, }; static const uint32_t gen9_gpgpu_kernel[][4] = { { 0x00400001, 0x20202288, 0x00000020, 0x00000000 }, { 0x00000041, 0x20400208, 0x06000004, 0x00000010 }, { 0x00000001, 0x20440208, 0x00000018, 0x00000000 }, { 0x00600001, 0x20800208, 0x008d0000, 0x00000000 }, { 0x00200001, 0x20800208, 0x00450040, 0x00000000 }, { 0x00000001, 0x20880608, 0x00000000, 0x0000000f }, { 0x00800001, 0x20a00208, 0x00000020, 0x00000000 }, { 0x0c800031, 0x24000a40, 0x06000080, 0x060a8000 }, { 0x00600001, 0x2e000208, 0x008d0000, 0x00000000 }, { 0x07800031, 0x20000a40, 0x06000e00, 0x82000010 }, }; static uint32_t batch_used(struct intel_batchbuffer *batch) { return batch->ptr - batch->buffer; } static uint32_t batch_align(struct intel_batchbuffer *batch, uint32_t align) { uint32_t offset = batch_used(batch); offset = ALIGN(offset, align); batch->ptr = batch->buffer + offset; return offset; } static void * batch_alloc(struct intel_batchbuffer *batch, uint32_t size, uint32_t align) { uint32_t offset = batch_align(batch, align); batch->ptr += size; return memset(batch->buffer + offset, 0, size); } static uint32_t batch_offset(struct intel_batchbuffer *batch, void *ptr) { return (uint8_t *)ptr - batch->buffer; } static uint32_t batch_copy(struct intel_batchbuffer *batch, const void *ptr, uint32_t size, uint32_t align) { return batch_offset(batch, memcpy(batch_alloc(batch, size, align), ptr, size)); } static void gen7_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end) { int ret; ret = drm_intel_bo_subdata(batch->bo, 0, 4096, batch->buffer); if (ret == 0) ret = drm_intel_bo_mrb_exec(batch->bo, batch_end, NULL, 0, 0, 0); igt_assert(ret == 0); } static uint32_t gen7_fill_curbe_buffer_data(struct intel_batchbuffer *batch, uint8_t color) { uint8_t *curbe_buffer; uint32_t offset; curbe_buffer = batch_alloc(batch, sizeof(uint32_t) * 8, 64); offset = batch_offset(batch, curbe_buffer); *curbe_buffer = color; return offset; } static uint32_t gen7_fill_surface_state(struct intel_batchbuffer *batch, struct igt_buf *buf, uint32_t format, int is_dst) { struct gen7_surface_state *ss; uint32_t write_domain, read_domain, offset; int ret; if (is_dst) { write_domain = read_domain = I915_GEM_DOMAIN_RENDER; } else { write_domain = 0; read_domain = I915_GEM_DOMAIN_SAMPLER; } ss = batch_alloc(batch, sizeof(*ss), 64); offset = batch_offset(batch, ss); ss->ss0.surface_type = GEN7_SURFACE_2D; ss->ss0.surface_format = format; ss->ss0.render_cache_read_write = 1; if (buf->tiling == I915_TILING_X) ss->ss0.tiled_mode = 2; else if (buf->tiling == I915_TILING_Y) ss->ss0.tiled_mode = 3; ss->ss1.base_addr = buf->bo->offset; ret = drm_intel_bo_emit_reloc(batch->bo, batch_offset(batch, ss) + 4, buf->bo, 0, read_domain, write_domain); igt_assert(ret == 0); ss->ss2.height = igt_buf_height(buf) - 1; ss->ss2.width = igt_buf_width(buf) - 1; ss->ss3.pitch = buf->stride - 1; ss->ss7.shader_chanel_select_r = 4; ss->ss7.shader_chanel_select_g = 5; ss->ss7.shader_chanel_select_b = 6; ss->ss7.shader_chanel_select_a = 7; return offset; } static uint32_t gen8_fill_surface_state(struct intel_batchbuffer *batch, struct igt_buf *buf, uint32_t format, int is_dst) { struct gen8_surface_state *ss; uint32_t write_domain, read_domain, offset; int ret; if (is_dst) { write_domain = read_domain = I915_GEM_DOMAIN_RENDER; } else { write_domain = 0; read_domain = I915_GEM_DOMAIN_SAMPLER; } ss = batch_alloc(batch, sizeof(*ss), 64); offset = batch_offset(batch, ss); ss->ss0.surface_type = GEN8_SURFACE_2D; ss->ss0.surface_format = format; ss->ss0.render_cache_read_write = 1; ss->ss0.vertical_alignment = 1; /* align 4 */ ss->ss0.horizontal_alignment = 1; /* align 4 */ if (buf->tiling == I915_TILING_X) ss->ss0.tiled_mode = 2; else if (buf->tiling == I915_TILING_Y) ss->ss0.tiled_mode = 3; ss->ss8.base_addr = buf->bo->offset; ret = drm_intel_bo_emit_reloc(batch->bo, batch_offset(batch, ss) + 8 * 4, buf->bo, 0, read_domain, write_domain); igt_assert_eq(ret, 0); ss->ss2.height = igt_buf_height(buf) - 1; ss->ss2.width = igt_buf_width(buf) - 1; ss->ss3.pitch = buf->stride - 1; ss->ss7.shader_chanel_select_r = 4; ss->ss7.shader_chanel_select_g = 5; ss->ss7.shader_chanel_select_b = 6; ss->ss7.shader_chanel_select_a = 7; return offset; } static uint32_t gen7_fill_binding_table(struct intel_batchbuffer *batch, struct igt_buf *dst) { uint32_t *binding_table, offset; binding_table = batch_alloc(batch, 32, 64); offset = batch_offset(batch, binding_table); binding_table[0] = gen7_fill_surface_state(batch, dst, GEN7_SURFACEFORMAT_R8_UNORM, 1); return offset; } static uint32_t gen8_fill_binding_table(struct intel_batchbuffer *batch, struct igt_buf *dst) { uint32_t *binding_table, offset; binding_table = batch_alloc(batch, 32, 64); offset = batch_offset(batch, binding_table); binding_table[0] = gen8_fill_surface_state(batch, dst, GEN8_SURFACEFORMAT_R8_UNORM, 1); return offset; } static uint32_t gen7_fill_gpgpu_kernel(struct intel_batchbuffer *batch, const uint32_t kernel[][4], size_t size) { uint32_t offset; offset = batch_copy(batch, kernel, size, 64); return offset; } static uint32_t gen7_fill_interface_descriptor(struct intel_batchbuffer *batch, struct igt_buf *dst, const uint32_t kernel[][4], size_t size) { struct gen7_interface_descriptor_data *idd; uint32_t offset; uint32_t binding_table_offset, kernel_offset; binding_table_offset = gen7_fill_binding_table(batch, dst); kernel_offset = gen7_fill_gpgpu_kernel(batch, kernel, size); idd = batch_alloc(batch, sizeof(*idd), 64); offset = batch_offset(batch, idd); idd->desc0.kernel_start_pointer = (kernel_offset >> 6); idd->desc1.single_program_flow = 1; idd->desc1.floating_point_mode = GEN7_FLOATING_POINT_IEEE_754; idd->desc2.sampler_count = 0; /* 0 samplers used */ idd->desc2.sampler_state_pointer = 0; idd->desc3.binding_table_entry_count = 0; idd->desc3.binding_table_pointer = (binding_table_offset >> 5); idd->desc4.constant_urb_entry_read_offset = 0; idd->desc4.constant_urb_entry_read_length = 1; /* grf 1 */ return offset; } static uint32_t gen8_fill_interface_descriptor(struct intel_batchbuffer *batch, struct igt_buf *dst, const uint32_t kernel[][4], size_t size) { struct gen8_interface_descriptor_data *idd; uint32_t offset; uint32_t binding_table_offset, kernel_offset; binding_table_offset = gen8_fill_binding_table(batch, dst); kernel_offset = gen7_fill_gpgpu_kernel(batch, kernel, size); idd = batch_alloc(batch, sizeof(*idd), 64); offset = batch_offset(batch, idd); idd->desc0.kernel_start_pointer = (kernel_offset >> 6); idd->desc2.single_program_flow = 1; idd->desc2.floating_point_mode = GEN8_FLOATING_POINT_IEEE_754; idd->desc3.sampler_count = 0; /* 0 samplers used */ idd->desc3.sampler_state_pointer = 0; idd->desc4.binding_table_entry_count = 0; idd->desc4.binding_table_pointer = (binding_table_offset >> 5); idd->desc5.constant_urb_entry_read_offset = 0; idd->desc5.constant_urb_entry_read_length = 1; /* grf 1 */ return offset; } static void gen7_emit_state_base_address(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_STATE_BASE_ADDRESS | (10 - 2)); /* general */ OUT_BATCH(0); /* surface */ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* dynamic */ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* indirect */ OUT_BATCH(0); /* instruction */ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* general/dynamic/indirect/instruction access Bound */ OUT_BATCH(0); OUT_BATCH(0 | BASE_ADDRESS_MODIFY); OUT_BATCH(0); OUT_BATCH(0 | BASE_ADDRESS_MODIFY); } static void gen8_emit_state_base_address(struct intel_batchbuffer *batch) { OUT_BATCH(GEN8_STATE_BASE_ADDRESS | (16 - 2)); /* general */ OUT_BATCH(0 | (0x78 << 4) | (0 << 1) | BASE_ADDRESS_MODIFY); OUT_BATCH(0); /* stateless data port */ OUT_BATCH(0 | BASE_ADDRESS_MODIFY); /* surface */ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY); /* dynamic */ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* indirect */ OUT_BATCH(0); OUT_BATCH(0 ); /* instruction */ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* general state buffer size */ OUT_BATCH(0xfffff000 | 1); /* dynamic state buffer size */ OUT_BATCH(1 << 12 | 1); /* indirect object buffer size */ OUT_BATCH(0xfffff000 | 1); /* intruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */ OUT_BATCH(1 << 12 | 1); } static void gen9_emit_state_base_address(struct intel_batchbuffer *batch) { OUT_BATCH(GEN8_STATE_BASE_ADDRESS | (19 - 2)); /* general */ OUT_BATCH(0 | BASE_ADDRESS_MODIFY); OUT_BATCH(0); /* stateless data port */ OUT_BATCH(0 | BASE_ADDRESS_MODIFY); /* surface */ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY); /* dynamic */ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* indirect */ OUT_BATCH(0); OUT_BATCH(0); /* instruction */ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* general state buffer size */ OUT_BATCH(0xfffff000 | 1); /* dynamic state buffer size */ OUT_BATCH(1 << 12 | 1); /* indirect object buffer size */ OUT_BATCH(0xfffff000 | 1); /* intruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */ OUT_BATCH(1 << 12 | 1); /* Bindless surface state base address */ OUT_BATCH(0 | BASE_ADDRESS_MODIFY); OUT_BATCH(0); OUT_BATCH(0xfffff000); } static void gen7_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_MEDIA_VFE_STATE | (8 - 2)); /* scratch buffer */ OUT_BATCH(0); /* number of threads & urb entries */ OUT_BATCH(1 << 16 | /* max num of threads */ 0 << 8 | /* num of URB entry */ 1 << 2); /* GPGPU mode */ OUT_BATCH(0); /* urb entry size & curbe size */ OUT_BATCH(0 << 16 | /* URB entry size in 256 bits unit */ 1); /* CURBE entry size in 256 bits unit */ /* scoreboard */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } static void gen8_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch) { OUT_BATCH(GEN8_MEDIA_VFE_STATE | (9 - 2)); /* scratch buffer */ OUT_BATCH(0); OUT_BATCH(0); /* number of threads & urb entries */ OUT_BATCH(1 << 16 | 1 << 8); OUT_BATCH(0); /* urb entry size & curbe size */ OUT_BATCH(0 << 16 | 1); /* scoreboard */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } static void gen7_emit_curbe_load(struct intel_batchbuffer *batch, uint32_t curbe_buffer) { OUT_BATCH(GEN7_MEDIA_CURBE_LOAD | (4 - 2)); OUT_BATCH(0); /* curbe total data length */ OUT_BATCH(64); /* curbe data start address, is relative to the dynamics base address */ OUT_BATCH(curbe_buffer); } static void gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch, uint32_t interface_descriptor) { OUT_BATCH(GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD | (4 - 2)); OUT_BATCH(0); /* interface descriptor data length */ OUT_BATCH(sizeof(struct gen7_interface_descriptor_data)); /* interface descriptor address, is relative to the dynamics base address */ OUT_BATCH(interface_descriptor); } static void gen8_emit_interface_descriptor_load(struct intel_batchbuffer *batch, uint32_t interface_descriptor) { OUT_BATCH(GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD | (4 - 2)); OUT_BATCH(0); /* interface descriptor data length */ OUT_BATCH(sizeof(struct gen8_interface_descriptor_data)); /* interface descriptor address, is relative to the dynamics base address */ OUT_BATCH(interface_descriptor); } static void gen7_emit_gpgpu_walk(struct intel_batchbuffer *batch, unsigned x, unsigned y, unsigned width, unsigned height) { uint32_t x_dim, y_dim, tmp, right_mask; /* * Simply do SIMD16 based dispatch, so every thread uses * SIMD16 channels. * * Define our own thread group size, e.g 16x1 for every group, then * will have 1 thread each group in SIMD16 dispatch. So thread * width/height/depth are all 1. * * Then thread group X = width / 16 (aligned to 16) * thread group Y = height; */ x_dim = (width + 15) / 16; y_dim = height; tmp = width & 15; if (tmp == 0) right_mask = (1 << 16) - 1; else right_mask = (1 << tmp) - 1; OUT_BATCH(GEN7_GPGPU_WALKER | 9); /* interface descriptor offset */ OUT_BATCH(0); /* SIMD size, thread w/h/d */ OUT_BATCH(1 << 30 | /* SIMD16 */ 0 << 16 | /* depth:1 */ 0 << 8 | /* height:1 */ 0); /* width:1 */ /* thread group X */ OUT_BATCH(0); OUT_BATCH(x_dim); /* thread group Y */ OUT_BATCH(0); OUT_BATCH(y_dim); /* thread group Z */ OUT_BATCH(0); OUT_BATCH(1); /* right mask */ OUT_BATCH(right_mask); /* bottom mask, height 1, always 0xffffffff */ OUT_BATCH(0xffffffff); } static void gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch, unsigned x, unsigned y, unsigned width, unsigned height) { uint32_t x_dim, y_dim, tmp, right_mask; /* * Simply do SIMD16 based dispatch, so every thread uses * SIMD16 channels. * * Define our own thread group size, e.g 16x1 for every group, then * will have 1 thread each group in SIMD16 dispatch. So thread * width/height/depth are all 1. * * Then thread group X = width / 16 (aligned to 16) * thread group Y = height; */ x_dim = (width + 15) / 16; y_dim = height; tmp = width & 15; if (tmp == 0) right_mask = (1 << 16) - 1; else right_mask = (1 << tmp) - 1; OUT_BATCH(GEN7_GPGPU_WALKER | 13); OUT_BATCH(0); /* kernel offset */ OUT_BATCH(0); /* indirect data length */ OUT_BATCH(0); /* indirect data offset */ /* SIMD size, thread w/h/d */ OUT_BATCH(1 << 30 | /* SIMD16 */ 0 << 16 | /* depth:1 */ 0 << 8 | /* height:1 */ 0); /* width:1 */ /* thread group X */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(x_dim); /* thread group Y */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(y_dim); /* thread group Z */ OUT_BATCH(0); OUT_BATCH(1); /* right mask */ OUT_BATCH(right_mask); /* bottom mask, height 1, always 0xffffffff */ OUT_BATCH(0xffffffff); } /* * This sets up the gpgpu pipeline, * * +---------------+ <---- 4096 * | ^ | * | | | * | various | * | state | * | | | * |_______|_______| <---- 2048 + ? * | ^ | * | | | * | batch | * | commands | * | | | * | | | * +---------------+ <---- 0 + ? * */ #define BATCH_STATE_SPLIT 2048 void gen7_gpgpu_fillfunc(struct intel_batchbuffer *batch, struct igt_buf *dst, unsigned x, unsigned y, unsigned width, unsigned height, uint8_t color) { uint32_t curbe_buffer, interface_descriptor; uint32_t batch_end; intel_batchbuffer_flush(batch); /* setup states */ batch->ptr = &batch->buffer[BATCH_STATE_SPLIT]; /* * const buffer needs to fill for every thread, but as we have just 1 thread * per every group, so need only one curbe data. * * For each thread, just use thread group ID for buffer offset. */ curbe_buffer = gen7_fill_curbe_buffer_data(batch, color); interface_descriptor = gen7_fill_interface_descriptor(batch, dst, gen7_gpgpu_kernel, sizeof(gen7_gpgpu_kernel)); igt_assert(batch->ptr < &batch->buffer[4095]); batch->ptr = batch->buffer; /* GPGPU pipeline */ OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_GPGPU); gen7_emit_state_base_address(batch); gen7_emit_vfe_state_gpgpu(batch); gen7_emit_curbe_load(batch, curbe_buffer); gen7_emit_interface_descriptor_load(batch, interface_descriptor); gen7_emit_gpgpu_walk(batch, x, y, width, height); OUT_BATCH(MI_BATCH_BUFFER_END); batch_end = batch_align(batch, 8); igt_assert(batch_end < BATCH_STATE_SPLIT); gen7_render_flush(batch, batch_end); intel_batchbuffer_reset(batch); } void gen8_gpgpu_fillfunc(struct intel_batchbuffer *batch, struct igt_buf *dst, unsigned x, unsigned y, unsigned width, unsigned height, uint8_t color) { uint32_t curbe_buffer, interface_descriptor; uint32_t batch_end; intel_batchbuffer_flush(batch); /* setup states */ batch->ptr = &batch->buffer[BATCH_STATE_SPLIT]; /* * const buffer needs to fill for every thread, but as we have just 1 thread * per every group, so need only one curbe data. * * For each thread, just use thread group ID for buffer offset. */ curbe_buffer = gen7_fill_curbe_buffer_data(batch, color); interface_descriptor = gen8_fill_interface_descriptor(batch, dst, gen8_gpgpu_kernel, sizeof(gen8_gpgpu_kernel)); igt_assert(batch->ptr < &batch->buffer[4095]); batch->ptr = batch->buffer; /* GPGPU pipeline */ OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_GPGPU); gen8_emit_state_base_address(batch); gen8_emit_vfe_state_gpgpu(batch); gen7_emit_curbe_load(batch, curbe_buffer); gen8_emit_interface_descriptor_load(batch, interface_descriptor); gen8_emit_gpgpu_walk(batch, x, y, width, height); OUT_BATCH(MI_BATCH_BUFFER_END); batch_end = batch_align(batch, 8); igt_assert(batch_end < BATCH_STATE_SPLIT); gen7_render_flush(batch, batch_end); intel_batchbuffer_reset(batch); } void gen9_gpgpu_fillfunc(struct intel_batchbuffer *batch, struct igt_buf *dst, unsigned x, unsigned y, unsigned width, unsigned height, uint8_t color) { uint32_t curbe_buffer, interface_descriptor; uint32_t batch_end; intel_batchbuffer_flush(batch); /* setup states */ batch->ptr = &batch->buffer[BATCH_STATE_SPLIT]; /* * const buffer needs to fill for every thread, but as we have just 1 thread * per every group, so need only one curbe data. * * For each thread, just use thread group ID for buffer offset. */ curbe_buffer = gen7_fill_curbe_buffer_data(batch, color); interface_descriptor = gen8_fill_interface_descriptor(batch, dst, gen9_gpgpu_kernel, sizeof(gen9_gpgpu_kernel)); igt_assert(batch->ptr < &batch->buffer[4095]); batch->ptr = batch->buffer; /* GPGPU pipeline */ OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_GPGPU); gen9_emit_state_base_address(batch); gen8_emit_vfe_state_gpgpu(batch); gen7_emit_curbe_load(batch, curbe_buffer); gen7_emit_interface_descriptor_load(batch, interface_descriptor); gen8_emit_gpgpu_walk(batch, x, y, width, height); OUT_BATCH(MI_BATCH_BUFFER_END); batch_end = batch_align(batch, 8); igt_assert(batch_end < BATCH_STATE_SPLIT); gen7_render_flush(batch, batch_end); intel_batchbuffer_reset(batch); } intel-gpu-tools-1.14/lib/intel_batchbuffer.c0000644000175000017500000005415212665336131016017 00000000000000/************************************************************************** * * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * **************************************************************************/ #include #include #include #include #include #include "drm.h" #include "drmtest.h" #include "intel_batchbuffer.h" #include "intel_bufmgr.h" #include "intel_chipset.h" #include "intel_reg.h" #include "rendercopy.h" #include "media_fill.h" #include "ioctl_wrappers.h" #include "media_spin.h" #include "gpgpu_fill.h" #include /** * SECTION:intel_batchbuffer * @short_description: Batchbuffer and blitter support * @title: Batch Buffer * @include: igt.h * * This library provides some basic support for batchbuffers and using the * blitter engine based upon libdrm. A new batchbuffer is allocated with * intel_batchbuffer_alloc() and for simple blitter commands submitted with * intel_batchbuffer_flush(). * * It also provides some convenient macros to easily emit commands into * batchbuffers. All those macros presume that a pointer to a #intel_batchbuffer * structure called batch is in scope. The basic macros are #BEGIN_BATCH, * #OUT_BATCH, #OUT_RELOC and #ADVANCE_BATCH. * * Note that this library's header pulls in the [i-g-t core](intel-gpu-tools-i-g-t-core.html) * library as a dependency. */ /** * intel_batchbuffer_reset: * @batch: batchbuffer object * * Resets @batch by allocating a new gem buffer object as backing storage. */ void intel_batchbuffer_reset(struct intel_batchbuffer *batch) { if (batch->bo != NULL) { drm_intel_bo_unreference(batch->bo); batch->bo = NULL; } batch->bo = drm_intel_bo_alloc(batch->bufmgr, "batchbuffer", BATCH_SZ, 4096); memset(batch->buffer, 0, sizeof(batch->buffer)); batch->ctx = NULL; batch->ptr = batch->buffer; batch->end = NULL; } /** * intel_batchbuffer_alloc: * @bufmgr: libdrm buffer manager * @devid: pci device id of the drm device * * Allocates a new batchbuffer object. @devid must be supplied since libdrm * doesn't expose it directly. * * Returns: The allocated and initialized batchbuffer object. */ struct intel_batchbuffer * intel_batchbuffer_alloc(drm_intel_bufmgr *bufmgr, uint32_t devid) { struct intel_batchbuffer *batch = calloc(sizeof(*batch), 1); batch->bufmgr = bufmgr; batch->devid = devid; batch->gen = intel_gen(devid); intel_batchbuffer_reset(batch); return batch; } /** * intel_batchbuffer_free: * @batch: batchbuffer object * * Releases all resource of the batchbuffer object @batch. */ void intel_batchbuffer_free(struct intel_batchbuffer *batch) { drm_intel_bo_unreference(batch->bo); batch->bo = NULL; free(batch); } #define CMD_POLY_STIPPLE_OFFSET 0x7906 static unsigned int flush_on_ring_common(struct intel_batchbuffer *batch, int ring) { unsigned int used = batch->ptr - batch->buffer; if (used == 0) return 0; if (IS_GEN5(batch->devid)) { /* emit gen5 w/a without batch space checks - we reserve that * already. */ *(uint32_t *) (batch->ptr) = CMD_POLY_STIPPLE_OFFSET << 16; batch->ptr += 4; *(uint32_t *) (batch->ptr) = 0; batch->ptr += 4; } /* Round batchbuffer usage to 2 DWORDs. */ if ((used & 4) == 0) { *(uint32_t *) (batch->ptr) = 0; /* noop */ batch->ptr += 4; } /* Mark the end of the buffer. */ *(uint32_t *)(batch->ptr) = MI_BATCH_BUFFER_END; /* noop */ batch->ptr += 4; return batch->ptr - batch->buffer; } /** * intel_batchbuffer_flush_on_ring: * @batch: batchbuffer object * @ring: execbuf ring flag * * Submits the batch for execution on @ring. */ void intel_batchbuffer_flush_on_ring(struct intel_batchbuffer *batch, int ring) { unsigned int used = flush_on_ring_common(batch, ring); drm_intel_context *ctx; if (used == 0) return; do_or_die(drm_intel_bo_subdata(batch->bo, 0, used, batch->buffer)); batch->ptr = NULL; /* XXX bad kernel API */ ctx = batch->ctx; if (ring != I915_EXEC_RENDER) ctx = NULL; do_or_die(drm_intel_gem_bo_context_exec(batch->bo, ctx, used, ring)); intel_batchbuffer_reset(batch); } void intel_batchbuffer_set_context(struct intel_batchbuffer *batch, drm_intel_context *context) { batch->ctx = context; } /** * intel_batchbuffer_flush_with_context: * @batch: batchbuffer object * @context: libdrm hardware context object * * Submits the batch for execution on the render engine with the supplied * hardware context. */ void intel_batchbuffer_flush_with_context(struct intel_batchbuffer *batch, drm_intel_context *context) { int ret; unsigned int used = flush_on_ring_common(batch, I915_EXEC_RENDER); if (used == 0) return; ret = drm_intel_bo_subdata(batch->bo, 0, used, batch->buffer); igt_assert(ret == 0); batch->ptr = NULL; ret = drm_intel_gem_bo_context_exec(batch->bo, context, used, I915_EXEC_RENDER); igt_assert(ret == 0); intel_batchbuffer_reset(batch); } /** * intel_batchbuffer_flush: * @batch: batchbuffer object * * Submits the batch for execution on the blitter engine, selecting the right * ring depending upon the hardware platform. */ void intel_batchbuffer_flush(struct intel_batchbuffer *batch) { int ring = 0; if (HAS_BLT_RING(batch->devid)) ring = I915_EXEC_BLT; intel_batchbuffer_flush_on_ring(batch, ring); } /** * intel_batchbuffer_emit_reloc: * @batch: batchbuffer object * @buffer: relocation target libdrm buffer object * @delta: delta value to add to @buffer's gpu address * @read_domains: gem domain bits for the relocation * @write_domain: gem domain bit for the relocation * @fenced: whether this gpu access requires fences * * Emits both a libdrm relocation entry pointing at @buffer and the pre-computed * DWORD of @batch's presumed gpu address plus the supplied @delta into @batch. * * Note that @fenced is only relevant if @buffer is actually tiled. * * This is the only way buffers get added to the validate list. */ void intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch, drm_intel_bo *buffer, uint64_t delta, uint32_t read_domains, uint32_t write_domain, int fenced) { uint64_t offset; int ret; if (batch->ptr - batch->buffer > BATCH_SZ) igt_info("bad relocation ptr %p map %p offset %d size %d\n", batch->ptr, batch->buffer, (int)(batch->ptr - batch->buffer), BATCH_SZ); if (fenced) ret = drm_intel_bo_emit_reloc_fence(batch->bo, batch->ptr - batch->buffer, buffer, delta, read_domains, write_domain); else ret = drm_intel_bo_emit_reloc(batch->bo, batch->ptr - batch->buffer, buffer, delta, read_domains, write_domain); offset = buffer->offset64; offset += delta; intel_batchbuffer_emit_dword(batch, offset); if (batch->gen >= 8) intel_batchbuffer_emit_dword(batch, offset >> 32); igt_assert(ret == 0); } /** * intel_batchbuffer_data: * @batch: batchbuffer object * @data: pointer to the data to write into the batchbuffer * @bytes: number of bytes to write into the batchbuffer * * This transfers the given @data into the batchbuffer. Note that the length * must be DWORD aligned, i.e. multiples of 32bits. */ void intel_batchbuffer_data(struct intel_batchbuffer *batch, const void *data, unsigned int bytes) { igt_assert((bytes & 3) == 0); intel_batchbuffer_require_space(batch, bytes); memcpy(batch->ptr, data, bytes); batch->ptr += bytes; } /** * intel_blt_copy: * @batch: batchbuffer object * @src_bo: source libdrm buffer object * @src_x1: source pixel x-coordination * @src_y1: source pixel y-coordination * @src_pitch: @src_bo's pitch in bytes * @dst_bo: destination libdrm buffer object * @dst_x1: destination pixel x-coordination * @dst_y1: destination pixel y-coordination * @dst_pitch: @dst_bo's pitch in bytes * @width: width of the copied rectangle * @height: height of the copied rectangle * @bpp: bits per pixel * * This emits a 2D copy operation using blitter commands into the supplied batch * buffer object. */ void intel_blt_copy(struct intel_batchbuffer *batch, drm_intel_bo *src_bo, int src_x1, int src_y1, int src_pitch, drm_intel_bo *dst_bo, int dst_x1, int dst_y1, int dst_pitch, int width, int height, int bpp) { const int gen = batch->gen; uint32_t src_tiling, dst_tiling, swizzle; uint32_t cmd_bits = 0; uint32_t br13_bits; igt_assert(bpp*(src_x1 + width) <= 8*src_pitch); igt_assert(bpp*(dst_x1 + width) <= 8*dst_pitch); igt_assert(src_pitch * (src_y1 + height) <= src_bo->size); igt_assert(dst_pitch * (dst_y1 + height) <= dst_bo->size); drm_intel_bo_get_tiling(src_bo, &src_tiling, &swizzle); drm_intel_bo_get_tiling(dst_bo, &dst_tiling, &swizzle); if (gen >= 4 && src_tiling != I915_TILING_NONE) { src_pitch /= 4; cmd_bits |= XY_SRC_COPY_BLT_SRC_TILED; } if (gen >= 4 && dst_tiling != I915_TILING_NONE) { dst_pitch /= 4; cmd_bits |= XY_SRC_COPY_BLT_DST_TILED; } #define CHECK_RANGE(x) ((x) >= 0 && (x) < (1 << 15)) igt_assert(CHECK_RANGE(src_x1) && CHECK_RANGE(src_y1) && CHECK_RANGE(dst_x1) && CHECK_RANGE(dst_y1) && CHECK_RANGE(width) && CHECK_RANGE(height) && CHECK_RANGE(src_x1 + width) && CHECK_RANGE(src_y1 + height) && CHECK_RANGE(dst_x1 + width) && CHECK_RANGE(dst_y1 + height) && CHECK_RANGE(src_pitch) && CHECK_RANGE(dst_pitch)); #undef CHECK_RANGE br13_bits = 0; switch (bpp) { case 8: break; case 16: /* supporting only RGB565, not ARGB1555 */ br13_bits |= 1 << 24; break; case 32: br13_bits |= 3 << 24; cmd_bits |= XY_SRC_COPY_BLT_WRITE_ALPHA | XY_SRC_COPY_BLT_WRITE_RGB; break; default: igt_fail(IGT_EXIT_FAILURE); } BLIT_COPY_BATCH_START(cmd_bits); OUT_BATCH((br13_bits) | (0xcc << 16) | /* copy ROP */ dst_pitch); OUT_BATCH((dst_y1 << 16) | dst_x1); /* dst x1,y1 */ OUT_BATCH(((dst_y1 + height) << 16) | (dst_x1 + width)); /* dst x2,y2 */ OUT_RELOC_FENCED(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH((src_y1 << 16) | src_x1); /* src x1,y1 */ OUT_BATCH(src_pitch); OUT_RELOC_FENCED(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0); ADVANCE_BATCH(); #define CMD_POLY_STIPPLE_OFFSET 0x7906 if (gen == 5) { BEGIN_BATCH(2, 0); OUT_BATCH(CMD_POLY_STIPPLE_OFFSET << 16); OUT_BATCH(0); ADVANCE_BATCH(); } if (gen >= 6 && src_bo == dst_bo) { BEGIN_BATCH(3, 0); OUT_BATCH(XY_SETUP_CLIP_BLT_CMD); OUT_BATCH(0); OUT_BATCH(0); ADVANCE_BATCH(); } intel_batchbuffer_flush(batch); } /** * intel_copy_bo: * @batch: batchbuffer object * @src_bo: source libdrm buffer object * @dst_bo: destination libdrm buffer object * @size: size of the copy range in bytes * * This emits a copy operation using blitter commands into the supplied batch * buffer object. A total of @size bytes from the start of @src_bo is copied * over to @dst_bo. Note that @size must be page-aligned. */ void intel_copy_bo(struct intel_batchbuffer *batch, drm_intel_bo *dst_bo, drm_intel_bo *src_bo, long int size) { igt_assert(size % 4096 == 0); intel_blt_copy(batch, src_bo, 0, 0, 4096, dst_bo, 0, 0, 4096, 4096/4, size/4096, 32); } /** * igt_buf_width: * @buf: the i-g-t buffer object * * Computes the width in 32-bit pixels of the given buffer. * * Returns: * The width of the buffer. */ unsigned igt_buf_width(struct igt_buf *buf) { return buf->stride/sizeof(uint32_t); } /** * igt_buf_height: * @buf: the i-g-t buffer object * * Computes the height in 32-bit pixels of the given buffer. * * Returns: * The height of the buffer. */ unsigned igt_buf_height(struct igt_buf *buf) { return buf->size/buf->stride; } /* * pitches are in bytes if the surfaces are linear, number of dwords * otherwise */ static uint32_t fast_copy_pitch(unsigned int stride, unsigned int tiling) { if (tiling != I915_TILING_NONE) return stride / 4; else return stride; } static uint32_t fast_copy_dword0(unsigned int src_tiling, unsigned int dst_tiling) { uint32_t dword0 = 0; dword0 |= XY_FAST_COPY_BLT; switch (src_tiling) { case I915_TILING_X: dword0 |= XY_FAST_COPY_SRC_TILING_X; break; case I915_TILING_Y: case I915_TILING_Yf: dword0 |= XY_FAST_COPY_SRC_TILING_Yb_Yf; break; case I915_TILING_Ys: dword0 |= XY_FAST_COPY_SRC_TILING_Ys; break; case I915_TILING_NONE: default: break; } switch (dst_tiling) { case I915_TILING_X: dword0 |= XY_FAST_COPY_DST_TILING_X; break; case I915_TILING_Y: case I915_TILING_Yf: dword0 |= XY_FAST_COPY_DST_TILING_Yb_Yf; break; case I915_TILING_Ys: dword0 |= XY_FAST_COPY_DST_TILING_Ys; break; case I915_TILING_NONE: default: break; } return dword0; } static uint32_t fast_copy_dword1(unsigned int src_tiling, unsigned int dst_tiling) { uint32_t dword1 = 0; if (src_tiling == I915_TILING_Yf) dword1 |= XY_FAST_COPY_SRC_TILING_Yf; if (dst_tiling == I915_TILING_Yf) dword1 |= XY_FAST_COPY_DST_TILING_Yf; dword1 |= XY_FAST_COPY_COLOR_DEPTH_32; return dword1; } static void fill_relocation(struct drm_i915_gem_relocation_entry *reloc, uint32_t gem_handle, uint32_t offset, /* in dwords */ uint32_t read_domains, uint32_t write_domains) { reloc->target_handle = gem_handle; reloc->delta = 0; reloc->offset = offset * sizeof(uint32_t); reloc->presumed_offset = 0; reloc->read_domains = read_domains; reloc->write_domain = write_domains; } static void fill_object(struct drm_i915_gem_exec_object2 *obj, uint32_t gem_handle, struct drm_i915_gem_relocation_entry *relocs, uint32_t count) { memset(obj, 0, sizeof(*obj)); obj->handle = gem_handle; obj->relocation_count = count; obj->relocs_ptr = (uintptr_t)relocs; } static void exec_blit(int fd, struct drm_i915_gem_exec_object2 *objs, uint32_t count, uint32_t batch_len /* in dwords */) { struct drm_i915_gem_execbuffer2 exec; exec.buffers_ptr = (uintptr_t)objs; exec.buffer_count = count; exec.batch_start_offset = 0; exec.batch_len = batch_len * 4; exec.DR1 = exec.DR4 = 0; exec.num_cliprects = 0; exec.cliprects_ptr = 0; exec.flags = I915_EXEC_BLT; i915_execbuffer2_set_context_id(exec, 0); exec.rsvd2 = 0; gem_execbuf(fd, &exec); } /** * igt_blitter_fast_copy__raw: * @fd: file descriptor of the i915 driver * @src_handle: GEM handle of the source buffer * @src_stride: Stride (in bytes) of the source buffer * @src_tiling: Tiling mode of the source buffer * @src_x: X coordinate of the source region to copy * @src_y: Y coordinate of the source region to copy * @width: Width of the region to copy * @height: Height of the region to copy * @dst_handle: GEM handle of the source buffer * @dst_stride: Stride (in bytes) of the destination buffer * @dst_tiling: Tiling mode of the destination buffer * @dst_x: X coordinate of destination * @dst_y: Y coordinate of destination * * Like igt_blitter_fast_copy(), but talking to the kernel directly. */ void igt_blitter_fast_copy__raw(int fd, /* src */ uint32_t src_handle, unsigned int src_stride, unsigned int src_tiling, unsigned int src_x, unsigned src_y, /* size */ unsigned int width, unsigned int height, /* dst */ uint32_t dst_handle, unsigned int dst_stride, unsigned int dst_tiling, unsigned int dst_x, unsigned dst_y) { uint32_t batch[12]; struct drm_i915_gem_exec_object2 objs[3]; struct drm_i915_gem_relocation_entry relocs[2]; uint32_t batch_handle; uint32_t dword0, dword1; uint32_t src_pitch, dst_pitch; int i = 0; src_pitch = fast_copy_pitch(src_stride, src_tiling); dst_pitch = fast_copy_pitch(dst_stride, dst_tiling); dword0 = fast_copy_dword0(src_tiling, dst_tiling); dword1 = fast_copy_dword1(src_tiling, dst_tiling); #define CHECK_RANGE(x) ((x) >= 0 && (x) < (1 << 15)) assert(CHECK_RANGE(src_x) && CHECK_RANGE(src_y) && CHECK_RANGE(dst_x) && CHECK_RANGE(dst_y) && CHECK_RANGE(width) && CHECK_RANGE(height) && CHECK_RANGE(src_x + width) && CHECK_RANGE(src_y + height) && CHECK_RANGE(dst_x + width) && CHECK_RANGE(dst_y + height) && CHECK_RANGE(src_pitch) && CHECK_RANGE(dst_pitch)); #undef CHECK_RANGE batch[i++] = dword0; batch[i++] = dword1 | dst_pitch; batch[i++] = (dst_y << 16) | dst_x; /* dst x1,y1 */ batch[i++] = ((dst_y + height) << 16) | (dst_x + width); /* dst x2,y2 */ batch[i++] = 0; /* dst address lower bits */ batch[i++] = 0; /* dst address upper bits */ batch[i++] = (src_y << 16) | src_x; /* src x1,y1 */ batch[i++] = src_pitch; batch[i++] = 0; /* src address lower bits */ batch[i++] = 0; /* src address upper bits */ batch[i++] = MI_BATCH_BUFFER_END; batch[i++] = MI_NOOP; igt_assert(i == ARRAY_SIZE(batch)); batch_handle = gem_create(fd, 4096); gem_write(fd, batch_handle, 0, batch, sizeof(batch)); fill_relocation(&relocs[0], dst_handle, 4, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER); fill_relocation(&relocs[1], src_handle, 8, I915_GEM_DOMAIN_RENDER, 0); fill_object(&objs[0], dst_handle, NULL, 0); fill_object(&objs[1], src_handle, NULL, 0); fill_object(&objs[2], batch_handle, relocs, 2); exec_blit(fd, objs, 3, ARRAY_SIZE(batch)); gem_close(fd, batch_handle); } /** * igt_blitter_fast_copy: * @batch: batchbuffer object * @src: source i-g-t buffer object * @src_x: source pixel x-coordination * @src_y: source pixel y-coordination * @width: width of the copied rectangle * @height: height of the copied rectangle * @dst: destination i-g-t buffer object * @dst_x: destination pixel x-coordination * @dst_y: destination pixel y-coordination * * Copy @src into @dst using the gen9 fast copy blitter command. * * The source and destination surfaces cannot overlap. */ void igt_blitter_fast_copy(struct intel_batchbuffer *batch, struct igt_buf *src, unsigned src_x, unsigned src_y, unsigned width, unsigned height, struct igt_buf *dst, unsigned dst_x, unsigned dst_y) { uint32_t src_pitch, dst_pitch; uint32_t dword0, dword1; src_pitch = fast_copy_pitch(src->stride, src->tiling); dst_pitch = fast_copy_pitch(dst->stride, src->tiling); dword0 = fast_copy_dword0(src->tiling, dst->tiling); dword1 = fast_copy_dword1(src->tiling, dst->tiling); #define CHECK_RANGE(x) ((x) >= 0 && (x) < (1 << 15)) assert(CHECK_RANGE(src_x) && CHECK_RANGE(src_y) && CHECK_RANGE(dst_x) && CHECK_RANGE(dst_y) && CHECK_RANGE(width) && CHECK_RANGE(height) && CHECK_RANGE(src_x + width) && CHECK_RANGE(src_y + height) && CHECK_RANGE(dst_x + width) && CHECK_RANGE(dst_y + height) && CHECK_RANGE(src_pitch) && CHECK_RANGE(dst_pitch)); #undef CHECK_RANGE BEGIN_BATCH(10, 2); OUT_BATCH(dword0); OUT_BATCH(dword1 | dst_pitch); OUT_BATCH((dst_y << 16) | dst_x); /* dst x1,y1 */ OUT_BATCH(((dst_y + height) << 16) | (dst_x + width)); /* dst x2,y2 */ OUT_RELOC(dst->bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(0); /* dst address upper bits */ OUT_BATCH((src_y << 16) | src_x); /* src x1,y1 */ OUT_BATCH(src_pitch); OUT_RELOC(src->bo, I915_GEM_DOMAIN_RENDER, 0, 0); OUT_BATCH(0); /* src address upper bits */ ADVANCE_BATCH(); intel_batchbuffer_flush(batch); } /** * igt_get_render_copyfunc: * @devid: pci device id * * Returns: * * The platform-specific render copy function pointer for the device * specified with @devid. Will return NULL when no render copy function is * implemented. */ igt_render_copyfunc_t igt_get_render_copyfunc(int devid) { igt_render_copyfunc_t copy = NULL; if (IS_GEN2(devid)) copy = gen2_render_copyfunc; else if (IS_GEN3(devid)) copy = gen3_render_copyfunc; else if (IS_GEN6(devid)) copy = gen6_render_copyfunc; else if (IS_GEN7(devid)) copy = gen7_render_copyfunc; else if (IS_GEN8(devid)) copy = gen8_render_copyfunc; else if (IS_GEN9(devid)) copy = gen9_render_copyfunc; return copy; } /** * igt_get_media_fillfunc: * @devid: pci device id * * Returns: * * The platform-specific media fill function pointer for the device specified * with @devid. Will return NULL when no media fill function is implemented. */ igt_fillfunc_t igt_get_media_fillfunc(int devid) { igt_fillfunc_t fill = NULL; if (IS_GEN9(devid)) fill = gen9_media_fillfunc; else if (IS_BROADWELL(devid)) fill = gen8_media_fillfunc; else if (IS_GEN7(devid)) fill = gen7_media_fillfunc; else if (IS_CHERRYVIEW(devid)) fill = gen8lp_media_fillfunc; return fill; } /** * igt_get_gpgpu_fillfunc: * @devid: pci device id * * Returns: * * The platform-specific gpgpu fill function pointer for the device specified * with @devid. Will return NULL when no gpgpu fill function is implemented. */ igt_fillfunc_t igt_get_gpgpu_fillfunc(int devid) { igt_fillfunc_t fill = NULL; if (IS_GEN7(devid)) fill = gen7_gpgpu_fillfunc; else if (IS_BROADWELL(devid)) fill = gen8_gpgpu_fillfunc; else if (IS_GEN9(devid)) fill = gen9_gpgpu_fillfunc; return fill; } /** * igt_get_media_spinfunc: * @devid: pci device id * * Returns: * * The platform-specific media spin function pointer for the device specified * with @devid. Will return NULL when no media spin function is implemented. */ igt_media_spinfunc_t igt_get_media_spinfunc(int devid) { igt_media_spinfunc_t spin = NULL; if (IS_GEN9(devid)) spin = gen9_media_spinfunc; else if (IS_BROADWELL(devid)) spin = gen8_media_spinfunc; else if (IS_CHERRYVIEW(devid)) spin = gen8lp_media_spinfunc; return spin; } intel-gpu-tools-1.14/lib/igt_core.h0000644000175000017500000005636612665336131014162 00000000000000/* * Copyright © 2007,2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * Daniel Vetter * */ #ifndef IGT_CORE_H #define IGT_CORE_H #include #include #include #include #include #include #include #include #ifndef IGT_LOG_DOMAIN #define IGT_LOG_DOMAIN (NULL) #endif extern const char* __igt_test_description __attribute__((weak)); extern bool __igt_plain_output; /** * IGT_TEST_DESCRIPTION: * @str: description string * * Defines a description for a test. This is used as the output for the * "--help-description" option and is also included in the generated * documentation. */ #define IGT_TEST_DESCRIPTION(str) const char* __igt_test_description = str /** * IGT_EXIT_TIMEOUT: * * Exit status indicating a timeout occurred. */ #define IGT_EXIT_TIMEOUT 78 /** * IGT_EXIT_SKIP: * * Exit status indicating the test was skipped. */ #define IGT_EXIT_SKIP 77 /** * IGT_EXIT_SUCCESS * * Exit status indicating the test executed successfully. */ #define IGT_EXIT_SUCCESS 0 /** * IGT_EXIT_INVALID * * Exit status indicating an invalid option or subtest was specified */ #define IGT_EXIT_INVALID 79 /** * IGT_EXIT_FAILURE * * Exit status indicating a test failure */ #define IGT_EXIT_FAILURE 99 bool __igt_fixture(void); void __igt_fixture_complete(void); void __igt_fixture_end(void) __attribute__((noreturn)); /** * igt_fixture: * * Annotate global test fixture code * * Testcase with subtests often need to set up a bunch of global state as the * common test fixture. To avoid such code interfering with the subtest * enumeration (e.g. when enumerating on systems without an intel gpu) such * blocks should be annotated with igt_fixture. */ #define igt_fixture for (int igt_tokencat(__tmpint,__LINE__) = 0; \ igt_tokencat(__tmpint,__LINE__) < 1 && \ __igt_fixture() && \ (sigsetjmp(igt_subtest_jmpbuf, 1) == 0); \ igt_tokencat(__tmpint,__LINE__) ++, \ __igt_fixture_complete()) /* subtest infrastructure */ jmp_buf igt_subtest_jmpbuf; typedef int (*igt_opt_handler_t)(int opt, int opt_index, void *data); #ifndef __GTK_DOC_IGNORE__ /* gtkdoc wants to document this forward decl */ struct option; #endif int igt_subtest_init_parse_opts(int *argc, char **argv, const char *extra_short_opts, const struct option *extra_long_opts, const char *help_str, igt_opt_handler_t extra_opt_handler, void *handler_data); /** * igt_subtest_init: * @argc: argc from the test's main() * @argv: argv from the test's main() * * This initializes the for tests with subtests without the need for additional * command line options. It is just a simplified version of * igt_subtest_init_parse_opts(). * * If there's not a reason to the contrary it's less error prone to just use an * #igt_main block instead of stitching the test's main() function together * manually. */ #define igt_subtest_init(argc, argv) \ igt_subtest_init_parse_opts(&argc, argv, NULL, NULL, NULL, NULL, NULL); bool __igt_run_subtest(const char *subtest_name); #define __igt_tokencat2(x, y) x ## y /** * igt_tokencat: * @x: first variable * @y: second variable * * C preprocessor helper to concatenate two variables while properly expanding * them. */ #define igt_tokencat(x, y) __igt_tokencat2(x, y) /** * igt_subtest: * @name: name of the subtest * * This is a magic control flow block which denotes a subtest code block. Within * that code block igt_skip|success will only bail out of the subtest. The _f * variant accepts a printf format string, which is useful for constructing * combinatorial tests. * * This is a simpler version of igt_subtest_f() */ #define igt_subtest(name) for (; __igt_run_subtest((name)) && \ (sigsetjmp(igt_subtest_jmpbuf, 1) == 0); \ igt_success()) #define __igt_subtest_f(tmp, format...) \ for (char tmp [256]; \ snprintf( tmp , sizeof( tmp ), \ format), \ __igt_run_subtest( tmp ) && \ (sigsetjmp(igt_subtest_jmpbuf, 1) == 0); \ igt_success()) /** * igt_subtest_f: * @...: format string and optional arguments * * This is a magic control flow block which denotes a subtest code block. Within * that code block igt_skip|success will only bail out of the subtest. The _f * variant accepts a printf format string, which is useful for constructing * combinatorial tests. * * Like igt_subtest(), but also accepts a printf format string instead of a * static string. */ #define igt_subtest_f(f...) \ __igt_subtest_f(igt_tokencat(__tmpchar, __LINE__), f) const char *igt_subtest_name(void); bool igt_only_list_subtests(void); /** * igt_main: * * This is a magic control flow block used instead of a main() function for * tests with subtests. Open-coding the main() function is only recommended if * the test needs to parse additional command line arguments of its own. */ #define igt_main \ static void igt_tokencat(__real_main, __LINE__)(void); \ int main(int argc, char **argv) { \ igt_subtest_init_parse_opts(&argc, argv, NULL, NULL, NULL, \ NULL, NULL); \ igt_tokencat(__real_main, __LINE__)(); \ igt_exit(); \ } \ static void igt_tokencat(__real_main, __LINE__)(void) \ const char *igt_test_name(void); void igt_simple_init_parse_opts(int *argc, char **argv, const char *extra_short_opts, const struct option *extra_long_opts, const char *help_str, igt_opt_handler_t extra_opt_handler, void *handler_data); /** * igt_simple_init: * @argc: argc from the test's main() * @argv: argv from the test's main() * * This initializes a simple test without any support for subtests. * * If there's not a reason to the contrary it's less error prone to just use an * #igt_simple_main block instead of stitching the test's main() function together * manually. */ #define igt_simple_init(argc, argv) \ igt_simple_init_parse_opts(&argc, argv, NULL, NULL, NULL, NULL, NULL); /** * igt_simple_main: * * This is a magic control flow block used instead of a main() function for * simple tests. Open-coding the main() function is only recommended if * the test needs to parse additional command line arguments of its own. */ #define igt_simple_main \ static void igt_tokencat(__real_main, __LINE__)(void); \ int main(int argc, char **argv) { \ igt_simple_init_parse_opts(&argc, argv, NULL, NULL, NULL, \ NULL, NULL); \ igt_tokencat(__real_main, __LINE__)(); \ igt_exit(); \ } \ static void igt_tokencat(__real_main, __LINE__)(void) \ __attribute__((format(printf, 1, 2))) void igt_skip(const char *f, ...) __attribute__((noreturn)); __attribute__((format(printf, 5, 6))) void __igt_skip_check(const char *file, const int line, const char *func, const char *check, const char *format, ...) __attribute__((noreturn)); #define igt_skip_check(E, F...) \ __igt_skip_check(__FILE__, __LINE__, __func__, E, F) void igt_success(void); void igt_fail(int exitcode) __attribute__((noreturn)); __attribute__((format(printf, 6, 7))) void __igt_fail_assert(const char *domain, const char *file, const int line, const char *func, const char *assertion, const char *format, ...) __attribute__((noreturn)); void igt_exit(void) __attribute__((noreturn)); /** * igt_assert: * @expr: condition to test * * Fails (sub-)test if the condition is not met. * * Should be used everywhere where a test checks results. */ #define igt_assert(expr) \ do { if (!(expr)) \ __igt_fail_assert(IGT_LOG_DOMAIN, __FILE__, __LINE__, __func__, #expr , NULL); \ } while (0) /** * igt_assert_f: * @expr: condition to test * @...: format string and optional arguments * * Fails (sub-)test if the condition is not met. * * Should be used everywhere where a test checks results. * * In addition to the plain igt_assert() helper this allows to print additional * information to help debugging test failures. */ #define igt_assert_f(expr, f...) \ do { if (!(expr)) \ __igt_fail_assert(IGT_LOG_DOMAIN, __FILE__, __LINE__, __func__, #expr , f); \ } while (0) /** * igt_fail_on: * @expr: condition to test * * Fails (sub-)test if the condition is met. * * Should be used everywhere where a test checks results. */ #define igt_fail_on(expr) igt_assert(!(expr)) /** * igt_fail_on_f: * @expr: condition to test * @...: format string and optional arguments * * Fails (sub-)test if the condition is met. * * Should be used everywhere where a test checks results. * * In addition to the plain igt_assert() helper this allows to print additional * information to help debugging test failures. */ #define igt_fail_on_f(expr, f...) igt_assert_f(!(expr), f) /** * igt_assert_cmpint: * @n1: first value * @cmp: compare operator * @ncmp: negated version of @cmp * @n2: second value * * Fails (sub-)test if the condition is not met * * Should be used everywhere where a test compares two integer values. * * Like igt_assert(), but displays the values being compared on failure instead * of simply printing the stringified expression. */ #define igt_assert_cmpint(n1, cmp, ncmp, n2) \ do { \ int __n1 = (n1), __n2 = (n2); \ if (__n1 cmp __n2) ; else \ __igt_fail_assert(IGT_LOG_DOMAIN, __FILE__, __LINE__, __func__, \ #n1 " " #cmp " " #n2, \ "error: %d " #ncmp " %d\n", __n1, __n2); \ } while (0) /** * igt_assert_cmpuint: * @n1: first value * @cmp: compare operator * @ncmp: negated version of @cmp * @n2: second value * * Like igt_assert_cmpint(), but for unsigned ints. */ #define igt_assert_cmpuint(n1, cmp, ncmp, n2) \ do { \ uint32_t __n1 = (n1), __n2 = (n2); \ if (__n1 cmp __n2) ; else \ __igt_fail_assert(IGT_LOG_DOMAIN, __FILE__, __LINE__, __func__, \ #n1 " " #cmp " " #n2, \ "error: %#x " #ncmp " %#x\n", __n1, __n2); \ } while (0) /** * igt_assert_cmpu64: * @n1: first value * @cmp: compare operator * @ncmp: negated version of @cmp * @n2: second value * * Like igt_assert_cmpuint(), but for larger ints. */ #define igt_assert_cmpu64(n1, cmp, ncmp, n2) \ do { \ uint64_t __n1 = (n1), __n2 = (n2); \ if (__n1 cmp __n2) ; else \ __igt_fail_assert(IGT_LOG_DOMAIN, __FILE__, __LINE__, __func__, \ #n1 " " #cmp " " #n2, \ "error: %#llx " #ncmp " %#llx\n", (long long)__n1, (long long)__n2); \ } while (0) /** * igt_assert_cmpdouble: * @n1: first value * @cmp: compare operator * @ncmp: negated version of @cmp * @n2: second value * * Like igt_assert_cmpint(), but for doubles. */ #define igt_assert_cmpdouble(n1, cmp, ncmp, n2) \ do { \ double __n1 = (n1), __n2 = (n2); \ if (__n1 cmp __n2) ; else \ __igt_fail_assert(IGT_LOG_DOMAIN, __FILE__, __LINE__, __func__, \ #n1 " " #cmp " " #n2, \ "error: %#lf " #ncmp " %#lf\n", __n1, __n2); \ } while (0) /** * igt_assert_eq: * @n1: first integer * @n2: second integer * * Fails (sub-)test if the two integers are not equal. Beware that for now this * only works on integers. * * Like igt_assert(), but displays the values being compared on failure instead * of simply printing the stringified expression. */ #define igt_assert_eq(n1, n2) igt_assert_cmpint(n1, ==, !=, n2) /** * igt_assert_eq_u32: * @n1: first integer * @n2: second integer * * Like igt_assert_eq(), but for uint32_t. */ #define igt_assert_eq_u32(n1, n2) igt_assert_cmpuint(n1, ==, !=, n2) /** * igt_assert_eq_u64: * @n1: first integer * @n2: second integer * * Like igt_assert_eq_u32(), but for uint64_t. */ #define igt_assert_eq_u64(n1, n2) igt_assert_cmpu64(n1, ==, !=, n2) /** * igt_assert_eq_double: * @n1: first double * @n2: second double * * Like igt_assert_eq(), but for doubles. */ #define igt_assert_eq_double(n1, n2) igt_assert_cmpdouble(n1, ==, !=, n2) /** * igt_assert_neq: * @n1: first integer * @n2: second integer * * Fails (sub-)test if the two integers are equal. Beware that for now this * only works on integers. * * Like igt_assert(), but displays the values being compared on failure instead * of simply printing the stringified expression. */ #define igt_assert_neq(n1, n2) igt_assert_cmpint(n1, !=, ==, n2) /** * igt_assert_neq_u32: * @n1: first integer * @n2: second integer * * Like igt_assert_neq(), but for uint32_t. */ #define igt_assert_neq_u32(n1, n2) igt_assert_cmpuint(n1, !=, ==, n2) /** * igt_assert_neq_u64: * @n1: first integer * @n2: second integer * * Like igt_assert_neq_u32(), but for uint64_t. */ #define igt_assert_neq_u64(n1, n2) igt_assert_cmpu64(n1, !=, ==, n2) /** * igt_assert_neq_double: * @n1: first double * @n2: second double * * Like igt_assert_neq(), but for doubles. */ #define igt_assert_neq_double(n1, n2) igt_assert_cmpdouble(n1, !=, ==, n2) /** * igt_assert_lte: * @n1: first integer * @n2: second integer * * Fails (sub-)test if the second integer is strictly smaller than the first. * Beware that for now this only works on integers. * * Like igt_assert(), but displays the values being compared on failure instead * of simply printing the stringified expression. */ #define igt_assert_lte(n1, n2) igt_assert_cmpint(n1, <=, >, n2) /** * igt_assert_lt: * @n1: first integer * @n2: second integer * * Fails (sub-)test if the second integer is smaller than or equal to the first. * Beware that for now this only works on integers. * * Like igt_assert(), but displays the values being compared on failure instead * of simply printing the stringified expression. */ #define igt_assert_lt(n1, n2) igt_assert_cmpint(n1, <, >=, n2) /** * igt_assert_fd: * @fd: file descriptor * * Fails (sub-) test if the given file descriptor is invalid. * * Like igt_assert(), but displays the values being compared on failure instead * of simply printing the stringified expression. */ #define igt_assert_fd(fd) \ igt_assert_f(fd >= 0, "file descriptor " #fd " failed\n"); /** * igt_require: * @expr: condition to test * * Skip a (sub-)test if a condition is not met. * * Should be used everywhere where a test checks results to decide about * skipping. This is useful to streamline the skip logic since it allows for a more flat * code control flow, similar to igt_assert() */ #define igt_require(expr) do { \ if (!(expr)) igt_skip_check(#expr , NULL); \ else igt_debug("Test requirement passed: %s\n", #expr); \ } while (0) /** * igt_skip_on: * @expr: condition to test * * Skip a (sub-)test if a condition is met. * * Should be used everywhere where a test checks results to decide about * skipping. This is useful to streamline the skip logic since it allows for a more flat * code control flow, similar to igt_assert() */ #define igt_skip_on(expr) do { \ if ((expr)) igt_skip_check("!(" #expr ")" , NULL); \ else igt_debug("Test requirement passed: !(%s)\n", #expr); \ } while (0) /** * igt_require_f: * @expr: condition to test * @...: format string and optional arguments * * Skip a (sub-)test if a condition is not met. * * Should be used everywhere where a test checks results to decide about * skipping. This is useful to streamline the skip logic since it allows for a more flat * code control flow, similar to igt_assert() * * In addition to the plain igt_require() helper this allows to print additional * information to help debugging test failures. */ #define igt_require_f(expr, f...) do { \ if (!(expr)) igt_skip_check(#expr , f); \ else igt_debug("Test requirement passed: %s\n", #expr); \ } while (0) /** * igt_skip_on_f: * @expr: condition to test * @...: format string and optional arguments * * Skip a (sub-)test if a condition is met. * * Should be used everywhere where a test checks results to decide about * skipping. This is useful to streamline the skip logic since it allows for a more flat * code control flow, similar to igt_assert() * * In addition to the plain igt_skip_on() helper this allows to print additional * information to help debugging test failures. */ #define igt_skip_on_f(expr, f...) do { \ if ((expr)) igt_skip_check("!("#expr")", f); \ else igt_debug("Test requirement passed: !(%s)\n", #expr); \ } while (0) /* fork support code */ bool __igt_fork(void); /** * igt_fork: * @child: name of the int variable with the child number * @num_children: number of children to fork * * This is a magic control flow block which spawns parallel test threads with * fork(). * * The test children execute in parallel to the main test thread. Joining all * test threads should be done with igt_waitchildren to ensure that the exit * codes of all children are properly reflected in the test status. * * Note that igt_skip() will not be forwarded, feature tests need to be done * before spawning threads with igt_fork(). */ #define igt_fork(child, num_children) \ for (int child = 0; child < (num_children); child++) \ for (; __igt_fork(); exit(0)) void igt_waitchildren(void); void igt_waitchildren_timeout(int seconds, const char *reason); /** * igt_helper_process: * @running: indicates whether the process is currently running * @use_SIGKILL: whether the helper should be terminated with SIGKILL or SIGTERM * @pid: pid of the helper if @running is true * @id: internal id * * Tracking structure for helper processes. Users of the i-g-t library should * only set @use_SIGKILL directly. */ struct igt_helper_process { bool running; bool use_SIGKILL; pid_t pid; int id; }; bool __igt_fork_helper(struct igt_helper_process *proc); /** * igt_fork_helper: * @proc: #igt_helper_process structure * * This is a magic control flow block which denotes an asynchronous helper * process block. The difference compared to igt_fork() is that failures from * the child process will not be forwarded, making this construct more suitable * for background processes. Common use cases are regular interference of the * main test thread through e.g. sending signals or evicting objects through * debugfs. Through the explicit #igt_helper_process they can also be controlled * in a more fine-grained way than test children spawned through igt_fork(). * * For tests with subtest helper process can be started outside of a * #igt_subtest block. * * Calling igt_wait_helper() joins a helper process and igt_stop_helper() * forcefully terminates it. */ #define igt_fork_helper(proc) \ for (; __igt_fork_helper(proc); exit(0)) int igt_wait_helper(struct igt_helper_process *proc); void igt_stop_helper(struct igt_helper_process *proc); /* exit handler code */ /** * igt_exit_handler_t: * @sig: Signal number which caused the exit or 0. * * Exit handler type used by igt_install_exit_handler(). Note that exit handlers * can potentially be run from signal handling contexts, the @sig parameter can * be used to figure this out and act accordingly. */ typedef void (*igt_exit_handler_t)(int sig); /* reliable atexit helpers, also work when killed by a signal (if possible) */ void igt_install_exit_handler(igt_exit_handler_t fn); void igt_enable_exit_handler(void); void igt_disable_exit_handler(void); /* helpers to automatically reduce test runtime in simulation */ bool igt_run_in_simulation(void); /** * SLOW_QUICK: * @slow: value in simulation mode * @quick: value in normal mode * * Simple macro to select between two values (e.g. number of test rounds or test * buffer size) depending upon whether i-g-t is run in simulation mode or not. */ #define SLOW_QUICK(slow,quick) (igt_run_in_simulation() ? (quick) : (slow)) void igt_skip_on_simulation(void); extern const char *igt_interactive_debug; /* structured logging */ enum igt_log_level { IGT_LOG_DEBUG, IGT_LOG_INFO, IGT_LOG_WARN, IGT_LOG_CRITICAL, IGT_LOG_NONE, }; __attribute__((format(printf, 3, 4))) void igt_log(const char *domain, enum igt_log_level level, const char *format, ...); __attribute__((format(printf, 3, 0))) void igt_vlog(const char *domain, enum igt_log_level level, const char *format, va_list args); /** * igt_debug: * @...: format string and optional arguments * * Wrapper for igt_log() for message at the IGT_LOG_DEBUG level. */ #define igt_debug(f...) igt_log(IGT_LOG_DOMAIN, IGT_LOG_DEBUG, f) /** * igt_info: * @...: format string and optional arguments * * Wrapper for igt_log() for message at the IGT_LOG_INFO level. */ #define igt_info(f...) igt_log(IGT_LOG_DOMAIN, IGT_LOG_INFO, f) /** * igt_warn: * @...: format string and optional arguments * * Wrapper for igt_log() for message at the IGT_LOG_WARN level. */ #define igt_warn(f...) igt_log(IGT_LOG_DOMAIN, IGT_LOG_WARN, f) /** * igt_critical: * @...: format string and optional arguments * * Wrapper for igt_log() for message at the IGT_LOG_CRITICAL level. */ #define igt_critical(f...) igt_log(IGT_LOG_DOMAIN, IGT_LOG_CRITICAL, f) extern enum igt_log_level igt_log_level; /** * igt_warn_on: * @condition: condition to test * * Print a IGT_LOG_WARN level message if a condition is not met. * * Should be used everywhere where a test checks results to decide about * printing warnings. This is useful to streamline the test logic since it * allows for a more flat code control flow, similar to igt_assert() */ #define igt_warn_on(condition) do {\ if (condition) \ igt_warn("Warning on condition %s in fucntion %s, file %s:%i\n", \ #condition, __func__, __FILE__, __LINE__); \ } while (0) /** * igt_warn_on_f: * @condition: condition to test * @...: format string and optional arguments * * Skip a (sub-)test if a condition is not met. * * Print a IGT_LOG_WARN level message if a condition is not met. * * Should be used everywhere where a test checks results to decide about * printing warnings. This is useful to streamline the test logic since it * allows for a more flat code control flow, similar to igt_assert() * * In addition to the plain igt_warn_on_f() helper this allows to print * additional information (again as warnings) to help debugging test failures. */ #define igt_warn_on_f(condition, f...) do {\ if (condition) {\ igt_warn("Warning on condition %s in fucntion %s, file %s:%i\n", \ #condition, __func__, __FILE__, __LINE__); \ igt_warn(f); \ } \ } while (0) void igt_set_timeout(unsigned int seconds, const char *op); void igt_reset_timeout(void); FILE *__igt_fopen_data(const char* igt_srcdir, const char* igt_datadir, const char* filename); /** * igt_fopen_data: * @filename: filename to open. * * Open a datafile for test, first try from installation directory * then from build directory. */ #define igt_fopen_data(filename) \ __igt_fopen_data(IGT_SRCDIR, IGT_DATADIR, filename) #endif /* IGT_CORE_H */ intel-gpu-tools-1.14/lib/igt_draw.h0000644000175000017500000000460512665336131014154 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #ifndef __IGT_DRAW_H__ #define __IGT_DRAW_H__ #include #include "igt_fb.h" /** * igt_draw_method: * @IGT_DRAW_MMAP_CPU: draw using a CPU mmap. * @IGT_DRAW_MMAP_GTT: draw using a GTT mmap. * @IGT_DRAW_MMAP_WC: draw using the WC mmap. * @IGT_DRAW_PWRITE: draw using the pwrite ioctl. * @IGT_DRAW_BLT: draw using the BLT ring. * @IGT_DRAW_RENDER: draw using the render ring. * @IGT_DRAW_METHOD_COUNT: useful for iterating through everything. */ enum igt_draw_method { IGT_DRAW_MMAP_CPU, IGT_DRAW_MMAP_GTT, IGT_DRAW_MMAP_WC, IGT_DRAW_PWRITE, IGT_DRAW_BLT, IGT_DRAW_RENDER, IGT_DRAW_METHOD_COUNT, }; const char *igt_draw_get_method_name(enum igt_draw_method method); void igt_draw_rect(int fd, drm_intel_bufmgr *bufmgr, drm_intel_context *context, uint32_t buf_handle, uint32_t buf_size, uint32_t buf_stride, enum igt_draw_method method, int rect_x, int rect_y, int rect_w, int rect_h, uint32_t color, int bpp); void igt_draw_rect_fb(int fd, drm_intel_bufmgr *bufmgr, drm_intel_context *context, struct igt_fb *fb, enum igt_draw_method method, int rect_x, int rect_y, int rect_w, int rect_h, uint32_t color); void igt_draw_fill_fb(int fd, struct igt_fb *fb, uint32_t color); #endif /* __IGT_DRAW_H__ */ intel-gpu-tools-1.14/lib/media_fill_gen9.c0000644000175000017500000002264112665336131015356 00000000000000#include #include #include "media_fill.h" #include "gen8_media.h" #include "intel_reg.h" #include #define ALIGN(x, y) (((x) + (y)-1) & ~((y)-1)) static const uint32_t media_kernel[][4] = { { 0x00400001, 0x20202288, 0x00000020, 0x00000000 }, { 0x00600001, 0x20800208, 0x008d0000, 0x00000000 }, { 0x00200001, 0x20800208, 0x00450040, 0x00000000 }, { 0x00000001, 0x20880608, 0x00000000, 0x000f000f }, { 0x00800001, 0x20a00208, 0x00000020, 0x00000000 }, { 0x00800001, 0x20e00208, 0x00000020, 0x00000000 }, { 0x00800001, 0x21200208, 0x00000020, 0x00000000 }, { 0x00800001, 0x21600208, 0x00000020, 0x00000000 }, { 0x0c800031, 0x24000a40, 0x0e000080, 0x120a8000 }, { 0x00600001, 0x2e000208, 0x008d0000, 0x00000000 }, { 0x07800031, 0x20000a40, 0x0e000e00, 0x82000010 }, }; static uint32_t batch_used(struct intel_batchbuffer *batch) { return batch->ptr - batch->buffer; } static uint32_t batch_align(struct intel_batchbuffer *batch, uint32_t align) { uint32_t offset = batch_used(batch); offset = ALIGN(offset, align); batch->ptr = batch->buffer + offset; return offset; } static void * batch_alloc(struct intel_batchbuffer *batch, uint32_t size, uint32_t align) { uint32_t offset = batch_align(batch, align); batch->ptr += size; return memset(batch->buffer + offset, 0, size); } static uint32_t batch_offset(struct intel_batchbuffer *batch, void *ptr) { return (uint8_t *)ptr - batch->buffer; } static uint32_t batch_copy(struct intel_batchbuffer *batch, const void *ptr, uint32_t size, uint32_t align) { return batch_offset(batch, memcpy(batch_alloc(batch, size, align), ptr, size)); } static void gen8_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end) { int ret; ret = drm_intel_bo_subdata(batch->bo, 0, 4096, batch->buffer); if (ret == 0) ret = drm_intel_bo_mrb_exec(batch->bo, batch_end, NULL, 0, 0, 0); assert(ret == 0); } static uint32_t gen8_fill_curbe_buffer_data(struct intel_batchbuffer *batch, uint8_t color) { uint8_t *curbe_buffer; uint32_t offset; curbe_buffer = batch_alloc(batch, sizeof(uint32_t) * 8, 64); offset = batch_offset(batch, curbe_buffer); *curbe_buffer = color; return offset; } static uint32_t gen8_fill_surface_state(struct intel_batchbuffer *batch, struct igt_buf *buf, uint32_t format, int is_dst) { struct gen8_surface_state *ss; uint32_t write_domain, read_domain, offset; int ret; if (is_dst) { write_domain = read_domain = I915_GEM_DOMAIN_RENDER; } else { write_domain = 0; read_domain = I915_GEM_DOMAIN_SAMPLER; } ss = batch_alloc(batch, sizeof(*ss), 64); offset = batch_offset(batch, ss); ss->ss0.surface_type = GEN8_SURFACE_2D; ss->ss0.surface_format = format; ss->ss0.render_cache_read_write = 1; ss->ss0.vertical_alignment = 1; /* align 4 */ ss->ss0.horizontal_alignment = 1; /* align 4 */ if (buf->tiling == I915_TILING_X) ss->ss0.tiled_mode = 2; else if (buf->tiling == I915_TILING_Y) ss->ss0.tiled_mode = 3; ss->ss8.base_addr = buf->bo->offset; ret = drm_intel_bo_emit_reloc(batch->bo, batch_offset(batch, ss) + 8 * 4, buf->bo, 0, read_domain, write_domain); assert(ret == 0); ss->ss2.height = igt_buf_height(buf) - 1; ss->ss2.width = igt_buf_width(buf) - 1; ss->ss3.pitch = buf->stride - 1; ss->ss7.shader_chanel_select_r = 4; ss->ss7.shader_chanel_select_g = 5; ss->ss7.shader_chanel_select_b = 6; ss->ss7.shader_chanel_select_a = 7; return offset; } static uint32_t gen8_fill_binding_table(struct intel_batchbuffer *batch, struct igt_buf *dst) { uint32_t *binding_table, offset; binding_table = batch_alloc(batch, 32, 64); offset = batch_offset(batch, binding_table); binding_table[0] = gen8_fill_surface_state(batch, dst, GEN8_SURFACEFORMAT_R8_UNORM, 1); return offset; } static uint32_t gen8_fill_media_kernel(struct intel_batchbuffer *batch, const uint32_t kernel[][4], size_t size) { uint32_t offset; offset = batch_copy(batch, kernel, size, 64); return offset; } static uint32_t gen8_fill_interface_descriptor(struct intel_batchbuffer *batch, struct igt_buf *dst) { struct gen8_interface_descriptor_data *idd; uint32_t offset; uint32_t binding_table_offset, kernel_offset; binding_table_offset = gen8_fill_binding_table(batch, dst); kernel_offset = gen8_fill_media_kernel(batch, media_kernel, sizeof(media_kernel)); idd = batch_alloc(batch, sizeof(*idd), 64); offset = batch_offset(batch, idd); idd->desc0.kernel_start_pointer = (kernel_offset >> 6); idd->desc2.single_program_flow = 1; idd->desc2.floating_point_mode = GEN8_FLOATING_POINT_IEEE_754; idd->desc3.sampler_count = 0; /* 0 samplers used */ idd->desc3.sampler_state_pointer = 0; idd->desc4.binding_table_entry_count = 0; idd->desc4.binding_table_pointer = (binding_table_offset >> 5); idd->desc5.constant_urb_entry_read_offset = 0; idd->desc5.constant_urb_entry_read_length = 1; /* grf 1 */ return offset; } static void gen9_emit_state_base_address(struct intel_batchbuffer *batch) { OUT_BATCH(GEN8_STATE_BASE_ADDRESS | (19 - 2)); /* general */ OUT_BATCH(0 | BASE_ADDRESS_MODIFY); OUT_BATCH(0); /* stateless data port */ OUT_BATCH(0 | BASE_ADDRESS_MODIFY); /* surface */ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY); /* dynamic */ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* indirect */ OUT_BATCH(0); OUT_BATCH(0); /* instruction */ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* general state buffer size */ OUT_BATCH(0xfffff000 | 1); /* dynamic state buffer size */ OUT_BATCH(1 << 12 | 1); /* indirect object buffer size */ OUT_BATCH(0xfffff000 | 1); /* intruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */ OUT_BATCH(1 << 12 | 1); /* Bindless surface state base address */ OUT_BATCH(0 | BASE_ADDRESS_MODIFY); OUT_BATCH(0); OUT_BATCH(0xfffff000); } static void gen8_emit_vfe_state(struct intel_batchbuffer *batch) { OUT_BATCH(GEN8_MEDIA_VFE_STATE | (9 - 2)); /* scratch buffer */ OUT_BATCH(0); OUT_BATCH(0); /* number of threads & urb entries */ OUT_BATCH(1 << 16 | 2 << 8); OUT_BATCH(0); /* urb entry size & curbe size */ OUT_BATCH(2 << 16 | 2); /* scoreboard */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } static void gen8_emit_curbe_load(struct intel_batchbuffer *batch, uint32_t curbe_buffer) { OUT_BATCH(GEN8_MEDIA_CURBE_LOAD | (4 - 2)); OUT_BATCH(0); /* curbe total data length */ OUT_BATCH(64); /* curbe data start address, is relative to the dynamics base address */ OUT_BATCH(curbe_buffer); } static void gen8_emit_interface_descriptor_load(struct intel_batchbuffer *batch, uint32_t interface_descriptor) { OUT_BATCH(GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD | (4 - 2)); OUT_BATCH(0); /* interface descriptor data length */ OUT_BATCH(sizeof(struct gen8_interface_descriptor_data)); /* interface descriptor address, is relative to the dynamics base address */ OUT_BATCH(interface_descriptor); } static void gen8_emit_media_state_flush(struct intel_batchbuffer *batch) { OUT_BATCH(GEN8_MEDIA_STATE_FLUSH | (2 - 2)); OUT_BATCH(0); } static void gen8_emit_media_objects(struct intel_batchbuffer *batch, unsigned x, unsigned y, unsigned width, unsigned height) { int i, j; for (i = 0; i < width / 16; i++) { for (j = 0; j < height / 16; j++) { OUT_BATCH(GEN8_MEDIA_OBJECT | (8 - 2)); /* interface descriptor offset */ OUT_BATCH(0); /* without indirect data */ OUT_BATCH(0); OUT_BATCH(0); /* scoreboard */ OUT_BATCH(0); OUT_BATCH(0); /* inline data (xoffset, yoffset) */ OUT_BATCH(x + i * 16); OUT_BATCH(y + j * 16); gen8_emit_media_state_flush(batch); } } } /* * This sets up the media pipeline, * * +---------------+ <---- 4096 * | ^ | * | | | * | various | * | state | * | | | * |_______|_______| <---- 2048 + ? * | ^ | * | | | * | batch | * | commands | * | | | * | | | * +---------------+ <---- 0 + ? * */ #define BATCH_STATE_SPLIT 2048 void gen9_media_fillfunc(struct intel_batchbuffer *batch, struct igt_buf *dst, unsigned x, unsigned y, unsigned width, unsigned height, uint8_t color) { uint32_t curbe_buffer, interface_descriptor; uint32_t batch_end; intel_batchbuffer_flush(batch); /* setup states */ batch->ptr = &batch->buffer[BATCH_STATE_SPLIT]; curbe_buffer = gen8_fill_curbe_buffer_data(batch, color); interface_descriptor = gen8_fill_interface_descriptor(batch, dst); assert(batch->ptr < &batch->buffer[4095]); /* media pipeline */ batch->ptr = batch->buffer; OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA | GEN9_FORCE_MEDIA_AWAKE_ENABLE | GEN9_SAMPLER_DOP_GATE_DISABLE | GEN9_PIPELINE_SELECTION_MASK | GEN9_SAMPLER_DOP_GATE_MASK | GEN9_FORCE_MEDIA_AWAKE_MASK); gen9_emit_state_base_address(batch); gen8_emit_vfe_state(batch); gen8_emit_curbe_load(batch, curbe_buffer); gen8_emit_interface_descriptor_load(batch, interface_descriptor); gen8_emit_media_objects(batch, x, y, width, height); OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA | GEN9_FORCE_MEDIA_AWAKE_DISABLE | GEN9_SAMPLER_DOP_GATE_ENABLE | GEN9_PIPELINE_SELECTION_MASK | GEN9_SAMPLER_DOP_GATE_MASK | GEN9_FORCE_MEDIA_AWAKE_MASK); OUT_BATCH(MI_BATCH_BUFFER_END); batch_end = batch_align(batch, 8); assert(batch_end < BATCH_STATE_SPLIT); gen8_render_flush(batch, batch_end); intel_batchbuffer_reset(batch); } intel-gpu-tools-1.14/lib/igt.h0000644000175000017500000000323312665336131013133 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ #ifndef IGT_H #define IGT_H #include "drmtest.h" #include "i915_3d.h" #include "i915_pciids.h" #include "igt_aux.h" #include "igt_core.h" #include "igt_core.h" #include "igt_debugfs.h" #include "igt_draw.h" #include "igt_fb.h" #include "igt_gt.h" #include "igt_kms.h" #include "igt_pm.h" #include "igt_stats.h" #include "instdone.h" #include "intel_batchbuffer.h" #include "intel_chipset.h" #include "intel_io.h" #include "ioctl_wrappers.h" #include "media_fill.h" #include "media_spin.h" #include "rendercopy.h" #endif /* IGT_H */ intel-gpu-tools-1.14/lib/igt_edid_template.h0000644000175000017500000000475412665336131016024 00000000000000#define GAMMA(x) (((x) * 100) - 100) #define MANUFACTURER_ID(a, b, c) (a - '@') << 2 | (b - '@') >> 3, \ (b - '@') << 5 | (c - '@') #define ab(x, y) ((x) & 0xff), ((y) & 0xff), (((x) & 0xf00) >> 4) | (((y) & 0xf00) >> 8) #define op(ho, hp, vo, vp) ((ho) & 0xff), ((hp) & 0xff), \ (((vo) & 0xf) << 4) | ((vp) & 0xf), \ (((ho) & 0x300) >> 2) | (((hp) & 0x300) >> 4) \ | (((vo) & 0x30) >> 2) | ((vp) & 0x30 >> 4) static unsigned char EDID_NAME[EDID_LENGTH] = { 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, /* header */ MANUFACTURER_ID('I', 'G', 'T'), /* product code, serial number, week and year of manufacture */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x03, /* edid version (1.3) */ /* basic display parameters */ /* digital display, maximum horizontal image size, maximum vertical * image size, gamma, features: RGB 4:4:4, native pixel format and * refresh rate in descriptor 1 */ 0x80, HSIZE, VSIZE, GAMMA(2.20), 0x02, /* chromaticity coordinates */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* established timings: 640x480 60Hz, 800x600 60Hz, 1024x768 60Hz */ 0x21, 0x08, 0x00, /* standard timings */ 0xd1, 0xc0, /* 1920x1080 60Hz */ 0x81, 0xc0, /* 1280x720 60Hz */ 0x61, 0x40, /* 1024x768 60Hz */ 0x45, 0x40, /* 800x600 60Hz */ 0x31, 0x40, /* 640x480 60Hz */ 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, /* descriptor 1 (preferred timing) */ (CLOCK / 10) & 0x00ff, ((CLOCK / 10) & 0xff00) >> 8, ab(HACTIVE, HBLANK), ab(VACTIVE, VBLANK), op(HOFFSET, HPULSE, VOFFSET, VPULSE), ab(HSIZE * 10, VSIZE * 10), 0x00, 0x00, 0x00, /* descriptor 2 (monitor range limits) */ 0x00, 0x00, 0x00, 0xfd, 0x00, VFREQ - 1, VFREQ + 1, /* minimum, maximum vertical field rate */ (CLOCK / (HACTIVE + HBLANK)) - 1, /* minimum horizontal line rate */ (CLOCK / (HACTIVE + HBLANK)) + 1, /* maximum horizontal line rate */ (CLOCK / 10000) + 1, /* maximum pixel clock rate */ 0x00, 0x0a, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, /* descriptor 3 (name descriptor) */ 0x00, 0x00, 0x00, 0xfc, 0x00, 'I', 'G', 'T', 0x0a, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, /* descriptor 4 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* extensions, checksum */ 0x00, 0x00 }; #undef EDID_NAME #undef VFREQ #undef CLOCK #undef HACTIVE #undef HBLANK #undef VACTIVE #undef VBLANK #undef HOFFSET #undef HPULSE #undef VOFFSET #undef VPULSE #undef HSIZE #undef VSIZE #undef GAMMA #undef MANUFACTURER_ID #undef ab #undef op intel-gpu-tools-1.14/lib/igt_aux.c0000644000175000017500000005645112665336131014015 00000000000000/* * Copyright © 2007, 2011, 2013, 2014, 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * Daniel Vetter * */ #ifndef ANDROID #define _GNU_SOURCE #else #include #endif #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "drmtest.h" #include "i915_drm.h" #include "intel_chipset.h" #include "igt_aux.h" #include "igt_debugfs.h" #include "igt_gt.h" #include "config.h" #include "intel_reg.h" #include "ioctl_wrappers.h" #include "igt_kms.h" #include "igt_pm.h" /** * SECTION:igt_aux * @short_description: Auxiliary libraries and support functions * @title: aux * @include: igt.h * * This library provides various auxiliary helper functions that don't really * fit into any other topic. */ /* signal interrupt helpers */ static struct igt_helper_process signal_helper; long long int sig_stat; static void __attribute__((noreturn)) signal_helper_process(pid_t pid) { /* Interrupt the parent process at 500Hz, just to be annoying */ while (1) { usleep(1000 * 1000 / 500); if (kill(pid, SIGCONT)) /* Parent has died, so must we. */ exit(0); } } static void sig_handler(int i) { sig_stat++; } /** * igt_fork_signal_helper: * * Fork a child process using #igt_fork_helper to interrupt the parent process * with a SIGCONT signal at regular quick intervals. The corresponding dummy * signal handler is installed in the parent process. * * This is useful to exercise ioctl error paths, at least where those can be * exercises by interrupting blocking waits, like stalling for the gpu. This * helper can also be used from children spawned with #igt_fork. * * In tests with subtests this function can be called outside of failure * catching code blocks like #igt_fixture or #igt_subtest. */ void igt_fork_signal_helper(void) { if (igt_only_list_subtests()) return; /* We pick SIGCONT as it is a "safe" signal - if we send SIGCONT to * an unexpecting process it spuriously wakes up and does nothing. * Most other signals (e.g. SIGUSR1) cause the process to die if they * are not handled. This is an issue in case the sighandler is not * inherited correctly (or if there is a race in the inheritance * and we send the signal at exactly the wrong time). */ signal(SIGCONT, sig_handler); setpgrp(); /* define a new process group for the tests */ igt_fork_helper(&signal_helper) { setpgrp(); /* Escape from the test process group */ /* Pass along the test process group identifier, * negative pid => send signal to everyone in the group. */ signal_helper_process(-getppid()); } } /** * igt_stop_signal_helper: * * Stops the child process spawned with igt_fork_signal_helper() again. * * In tests with subtests this function can be called outside of failure * catching code blocks like #igt_fixture or #igt_subtest. */ void igt_stop_signal_helper(void) { if (igt_only_list_subtests()) return; igt_stop_helper(&signal_helper); sig_stat = 0; } /** * igt_check_boolean_env_var: * @env_var: environment variable name * @default_value: default value for the environment variable * * This function should be used to parse boolean environment variable options. * * Returns: * The boolean value of the environment variable @env_var as decoded by atoi() * if it is set and @default_value if the variable is not set. */ bool igt_check_boolean_env_var(const char *env_var, bool default_value) { char *val; val = getenv(env_var); if (!val) return default_value; return atoi(val) != 0; } /** * igt_aub_dump_enabled: * * Returns: * True if AUB dumping is enabled with IGT_DUMP_AUB=1 in the environment, false * otherwise. */ bool igt_aub_dump_enabled(void) { static int dump_aub = -1; if (dump_aub == -1) dump_aub = igt_check_boolean_env_var("IGT_DUMP_AUB", false); return dump_aub; } /* other helpers */ /** * igt_exchange_int: * @array: pointer to the array of integers * @i: first position * @j: second position * * Exchanges the two values at array indices @i and @j. Useful as an exchange * function for igt_permute_array(). */ void igt_exchange_int(void *array, unsigned i, unsigned j) { int *int_arr, tmp; int_arr = array; tmp = int_arr[i]; int_arr[i] = int_arr[j]; int_arr[j] = tmp; } static uint32_t hars_petruska_f54_1_random_unsafe(void) { static uint32_t state = 0x12345678; #define rol(x,k) ((x << k) | (x >> (32-k))) return state = (state ^ rol (state, 5) ^ rol (state, 24)) + 0x37798849; #undef rol } /** * igt_permute_array: * @array: pointer to array * @size: size of the array * @exchange_func: function to exchange array elements * * This function randomly permutes the array using random() as the PRNG source. * The @exchange_func function is called to exchange two elements in the array * when needed. */ void igt_permute_array(void *array, unsigned size, void (*exchange_func)(void *array, unsigned i, unsigned j)) { int i; for (i = size - 1; i > 1; i--) { /* yes, not perfectly uniform, who cares */ long l = hars_petruska_f54_1_random_unsafe() % (i +1); if (i != l) exchange_func(array, i, l); } } __attribute__((format(printf, 1, 2))) static void igt_interactive_info(const char *format, ...) { va_list args; if (!isatty(STDERR_FILENO) || __igt_plain_output) return; if (igt_log_level > IGT_LOG_INFO) return; va_start(args, format); vfprintf(stderr, format, args); va_end(args); } /** * igt_progress: * @header: header string to prepend to the progress indicator * @i: work processed thus far * @total: total amount of work * * This function draws a progress indicator, which is useful for running * long-winded tests manually on the console. To avoid spamming log files in * automated runs the progress indicator is suppressed when not running on a * terminal. */ void igt_progress(const char *header, uint64_t i, uint64_t total) { int divider = 200; if (i+1 >= total) { igt_interactive_info("\r%s100%%\n", header); return; } if (total / 200 == 0) divider = 1; /* only bother updating about every 0.5% */ if (i % (total / divider) == 0) igt_interactive_info("\r%s%3llu%%", header, (long long unsigned)i * 100 / total); } /** * igt_print_activity: * * Print a '.' to indicate activity. This is printed without a newline and * only if output is to a terminal. */ void igt_print_activity(void) { igt_interactive_info("."); } /* mappable aperture trasher helper */ drm_intel_bo **trash_bos; int num_trash_bos; /** * igt_init_aperture_trashers: * @bufmgr: libdrm buffer manager * * Initialize the aperture trasher using @bufmgr, which can then be run with * igt_trash_aperture(). */ void igt_init_aperture_trashers(drm_intel_bufmgr *bufmgr) { int i; num_trash_bos = gem_mappable_aperture_size() / (1024*1024); trash_bos = malloc(num_trash_bos * sizeof(drm_intel_bo *)); igt_assert(trash_bos); for (i = 0; i < num_trash_bos; i++) trash_bos[i] = drm_intel_bo_alloc(bufmgr, "trash bo", 1024*1024, 4096); } /** * igt_trash_aperture: * * Trash the aperture by walking a set of GTT memory mapped objects. */ void igt_trash_aperture(void) { int i; uint8_t *gtt_ptr; for (i = 0; i < num_trash_bos; i++) { drm_intel_gem_bo_map_gtt(trash_bos[i]); gtt_ptr = trash_bos[i]->virtual; *gtt_ptr = 0; drm_intel_gem_bo_unmap_gtt(trash_bos[i]); } } /** * igt_cleanup_aperture_trashers: * * Clean up all aperture trasher state set up with igt_init_aperture_trashers(). */ void igt_cleanup_aperture_trashers(void) { int i; for (i = 0; i < num_trash_bos; i++) drm_intel_bo_unreference(trash_bos[i]); free(trash_bos); } /** * igt_system_suspend_autoresume: * * Execute a system suspend-to-mem cycle and automatically wake up again using * the firmware's resume timer. * * This is very handy for implementing any kind of suspend/resume test. */ void igt_system_suspend_autoresume(void) { int ret; /* FIXME: Simulation doesn't like suspend/resume, and not even a lighter * approach using /sys/power/pm_test to just test our driver's callbacks * seems to fare better. We need to investigate what's going on. */ igt_skip_on_simulation(); /* skip if system doesn't support suspend-to-mem */ igt_skip_on(system("rtcwake -n -s 30 -m mem") != 0); ret = system("rtcwake -s 30 -m mem"); igt_assert_f(ret == 0, "This failure means that something is wrong with the " "rtcwake tool or how your distro is set up. This is not " "a i915.ko or i-g-t bug.\n"); } /** * igt_system_hibernate_autoresume: * * Execute a system suspend-to-disk cycle and automatically wake up again using * the firmware's resume timer. * * This is very handy for implementing any kind of hibernate/resume test. */ void igt_system_hibernate_autoresume(void) { int ret; /* FIXME: I'm guessing simulation behaves the same way as with * suspend/resume, but it might be prudent to make sure */ /* FIXME: Simulation doesn't like suspend/resume, and not even a lighter * approach using /sys/power/pm_test to just test our driver's callbacks * seems to fare better. We need to investigate what's going on. */ igt_skip_on_simulation(); /* skip if system doesn't support suspend-to-disk */ igt_skip_on(system("rtcwake -n -s 90 -m disk") != 0); /* The timeout might need to be adjusted if hibernation takes too long * or if we have to wait excessively long before resume */ ret = system("rtcwake -s 90 -m disk"); igt_assert_f(ret == 0, "This failure means that something is wrong with the " "rtcwake tool or how your distro is set up. This is not " "a i915.ko or i-g-t bug.\n"); } /** * igt_drop_root: * * Drop root privileges and make sure it actually worked. Useful for tests * which need to check security constraints. Note that this should only be * called from manually forked processes, since the lack of root privileges * will wreak havoc with the automatic cleanup handlers. */ void igt_drop_root(void) { igt_assert(getuid() == 0); igt_assert(setgid(2) == 0); igt_assert(setuid(2) == 0); igt_assert(getgid() == 2); igt_assert(getuid() == 2); } /** * igt_debug_wait_for_keypress: * @var: var lookup to to enable this wait * * Waits for a key press when run interactively and when the corresponding debug * var is set in the --interactive-debug= variable. Multiple keys * can be specified as a comma-separated list or alternatively "all" if a wait * should happen for all cases. * * When not connected to a terminal interactive_debug is ignored * and execution immediately continues. * * This is useful for display tests where under certain situation manual * inspection of the display is useful. Or when running a testcase in the * background. */ void igt_debug_wait_for_keypress(const char *var) { struct termios oldt, newt; if (!isatty(STDIN_FILENO)) return; if (!igt_interactive_debug) return; if (!strstr(igt_interactive_debug, var) && !strstr(igt_interactive_debug, "all")) return; igt_info("Press any key to continue ...\n"); tcgetattr ( STDIN_FILENO, &oldt ); newt = oldt; newt.c_lflag &= ~( ICANON | ECHO ); tcsetattr ( STDIN_FILENO, TCSANOW, &newt ); getchar(); tcsetattr ( STDIN_FILENO, TCSANOW, &oldt ); } /** * igt_debug_manual_check: * @var: var lookup to to enable this wait * @expected: message to be printed as expected behaviour before wait for keys Y/n * * Waits for a key press when run interactively and when the corresponding debug * var is set in the --interactive-debug= variable. Multiple vars * can be specified as a comma-separated list or alternatively "all" if a wait * should happen for all cases. * * This is useful for display tests where under certain situation manual * inspection of the display is useful. Or when running a testcase in the * background. * * When not connected to a terminal interactive_debug is ignored * and execution immediately continues. For this reason by default this function * returns true. It returns false only when N/n is pressed indicating the * user isn't seeing what was expected. * * Force test fail when N/n is pressed. */ void igt_debug_manual_check(const char *var, const char *expected) { struct termios oldt, newt; char key; if (!isatty(STDIN_FILENO)) return; if (!igt_interactive_debug) return; if (!strstr(igt_interactive_debug, var) && !strstr(igt_interactive_debug, "all")) return; igt_info("Is %s [Y/n]", expected); tcgetattr ( STDIN_FILENO, &oldt ); newt = oldt; newt.c_lflag &= ~ICANON; tcsetattr ( STDIN_FILENO, TCSANOW, &newt ); key = getchar(); tcsetattr ( STDIN_FILENO, TCSANOW, &oldt ); igt_info("\n"); igt_assert(key != 'n' && key != 'N'); } #define POWER_DIR "/sys/devices/pci0000:00/0000:00:02.0/power" /* We just leak this on exit ... */ int pm_status_fd = -1; /** * igt_setup_runtime_pm: * * Sets up the runtime PM helper functions and enables runtime PM. To speed up * tests the autosuspend delay is set to 0. * * Returns: * True if runtime pm is available, false otherwise. */ bool igt_setup_runtime_pm(void) { int fd; ssize_t size; char buf[6]; if (pm_status_fd >= 0) return true; igt_pm_enable_audio_runtime_pm(); /* Our implementation uses autosuspend. Try to set it to 0ms so the test * suite goes faster and we have a higher probability of triggering race * conditions. */ fd = open(POWER_DIR "/autosuspend_delay_ms", O_WRONLY); igt_assert_f(fd >= 0, "Can't open " POWER_DIR "/autosuspend_delay_ms\n"); /* If we fail to write to the file, it means this system doesn't support * runtime PM. */ size = write(fd, "0\n", 2); close(fd); if (size != 2) return false; /* We know we support runtime PM, let's try to enable it now. */ fd = open(POWER_DIR "/control", O_RDWR); igt_assert_f(fd >= 0, "Can't open " POWER_DIR "/control\n"); size = write(fd, "auto\n", 5); igt_assert(size == 5); lseek(fd, 0, SEEK_SET); size = read(fd, buf, ARRAY_SIZE(buf)); igt_assert(size == 5); igt_assert(strncmp(buf, "auto\n", 5) == 0); close(fd); pm_status_fd = open(POWER_DIR "/runtime_status", O_RDONLY); igt_assert_f(pm_status_fd >= 0, "Can't open " POWER_DIR "/runtime_status\n"); return true; } /** * igt_get_runtime_pm_status: * * Returns: The current runtime PM status. */ enum igt_runtime_pm_status igt_get_runtime_pm_status(void) { ssize_t n_read; char buf[32]; lseek(pm_status_fd, 0, SEEK_SET); n_read = read(pm_status_fd, buf, ARRAY_SIZE(buf)); igt_assert(n_read >= 0); buf[n_read] = '\0'; if (strncmp(buf, "suspended\n", n_read) == 0) return IGT_RUNTIME_PM_STATUS_SUSPENDED; else if (strncmp(buf, "active\n", n_read) == 0) return IGT_RUNTIME_PM_STATUS_ACTIVE; else if (strncmp(buf, "suspending\n", n_read) == 0) return IGT_RUNTIME_PM_STATUS_SUSPENDING; else if (strncmp(buf, "resuming\n", n_read) == 0) return IGT_RUNTIME_PM_STATUS_RESUMING; igt_assert_f(false, "Unknown status %s\n", buf); return IGT_RUNTIME_PM_STATUS_UNKNOWN; } /** * igt_wait_for_pm_status: * @status: desired runtime PM status * * Waits until for the driver to switch to into the desired runtime PM status, * with a 10 second timeout. * * Returns: * True if the desired runtime PM status was attained, false if the operation * timed out. */ bool igt_wait_for_pm_status(enum igt_runtime_pm_status status) { return igt_wait(igt_get_runtime_pm_status() == status, 10000, 100); } /* Functions with prefix kmstest_ independent of cairo library are pulled out * from file igt_kms.c since this file is skipped in lib/Android.mk when flag * ANDROID_HAS_CAIRO is 0. This ensures the usability of these functions even * when cairo library is not present on Android. */ struct type_name { int type; const char *name; }; #define type_name_fn(res) \ const char * kmstest_##res##_str(int type) { \ unsigned int i; \ for (i = 0; i < ARRAY_SIZE(res##_names); i++) { \ if (res##_names[i].type == type) \ return res##_names[i].name; \ } \ return "(invalid)"; \ } struct type_name encoder_type_names[] = { { DRM_MODE_ENCODER_NONE, "none" }, { DRM_MODE_ENCODER_DAC, "DAC" }, { DRM_MODE_ENCODER_TMDS, "TMDS" }, { DRM_MODE_ENCODER_LVDS, "LVDS" }, { DRM_MODE_ENCODER_TVDAC, "TVDAC" }, }; type_name_fn(encoder_type) struct type_name connector_status_names[] = { { DRM_MODE_CONNECTED, "connected" }, { DRM_MODE_DISCONNECTED, "disconnected" }, { DRM_MODE_UNKNOWNCONNECTION, "unknown" }, }; type_name_fn(connector_status) struct type_name connector_type_names[] = { { DRM_MODE_CONNECTOR_Unknown, "unknown" }, { DRM_MODE_CONNECTOR_VGA, "VGA" }, { DRM_MODE_CONNECTOR_DVII, "DVI-I" }, { DRM_MODE_CONNECTOR_DVID, "DVI-D" }, { DRM_MODE_CONNECTOR_DVIA, "DVI-A" }, { DRM_MODE_CONNECTOR_Composite, "composite" }, { DRM_MODE_CONNECTOR_SVIDEO, "s-video" }, { DRM_MODE_CONNECTOR_LVDS, "LVDS" }, { DRM_MODE_CONNECTOR_Component, "component" }, { DRM_MODE_CONNECTOR_9PinDIN, "9-pin DIN" }, { DRM_MODE_CONNECTOR_DisplayPort, "DP" }, { DRM_MODE_CONNECTOR_HDMIA, "HDMI-A" }, { DRM_MODE_CONNECTOR_HDMIB, "HDMI-B" }, { DRM_MODE_CONNECTOR_TV, "TV" }, { DRM_MODE_CONNECTOR_eDP, "eDP" }, }; type_name_fn(connector_type) /** * igt_lock_mem: * @size: the amount of memory to lock into RAM, in MB * * Allocate @size MB of memory and lock it into RAM. This releases any * previously locked memory. * * Use #igt_unlock_mem to release the currently locked memory. */ static char *locked_mem; static size_t locked_size; void igt_lock_mem(size_t size) { long pagesize = sysconf(_SC_PAGESIZE); size_t i; int ret; if (size == 0) { return; } if (locked_mem) { igt_unlock_mem(); igt_warn("Unlocking previously locked memory.\n"); } locked_size = size * 1024 * 1024; locked_mem = malloc(locked_size); igt_require_f(locked_mem, "Could not allocate enough memory to lock.\n"); /* write into each page to ensure it is allocated */ for (i = 0; i < locked_size; i += pagesize) locked_mem[i] = i; ret = mlock(locked_mem, locked_size); igt_assert_f(ret == 0, "Could not lock memory into RAM.\n"); } /** * igt_unlock_mem: * * Release and free the RAM used by #igt_lock_mem. */ void igt_unlock_mem(void) { if (!locked_mem) return; munlock(locked_mem, locked_size); free(locked_mem); locked_mem = NULL; } #define MODULE_PARAM_DIR "/sys/module/i915/parameters/" #define PARAM_NAME_MAX_SZ 32 #define PARAM_VALUE_MAX_SZ 16 #define PARAM_FILE_PATH_MAX_SZ (strlen(MODULE_PARAM_DIR) + PARAM_NAME_MAX_SZ) struct module_param_data { char name[PARAM_NAME_MAX_SZ]; char original_value[PARAM_VALUE_MAX_SZ]; struct module_param_data *next; }; struct module_param_data *module_params = NULL; static void igt_module_param_exit_handler(int sig) { const size_t dir_len = strlen(MODULE_PARAM_DIR); char file_path[PARAM_FILE_PATH_MAX_SZ]; struct module_param_data *data; int fd; /* We don't need to assert string sizes on this function since they were * already checked before being stored on the lists. Besides, * igt_assert() is not AS-Safe. */ strcpy(file_path, MODULE_PARAM_DIR); for (data = module_params; data != NULL; data = data->next) { strcpy(file_path + dir_len, data->name); fd = open(file_path, O_RDWR); if (fd >= 0) { int size = strlen (data->original_value); if (size != write(fd, data->original_value, size)) { const char msg[] = "WARNING: Module parameters " "may not have been reset to their " "original values\n"; assert(write(STDERR_FILENO, msg, sizeof(msg)) == sizeof(msg)); } close(fd); } } /* free() is not AS-Safe, so we can't call it here. */ } /** * igt_save_module_param: * @name: name of the i915.ko module parameter * @file_path: full sysfs file path for the parameter * * Reads the current value of an i915.ko module parameter, saves it on an array, * then installs an exit handler to restore it when the program exits. * * It is safe to call this function multiple times for the same parameter. * * Notice that this function is called by igt_set_module_param(), so that one - * or one of its wrappers - is the only function the test programs need to call. */ static void igt_save_module_param(const char *name, const char *file_path) { struct module_param_data *data; size_t n; int fd; /* Check if this parameter is already saved. */ for (data = module_params; data != NULL; data = data->next) if (strncmp(data->name, name, PARAM_NAME_MAX_SZ) == 0) return; if (!module_params) igt_install_exit_handler(igt_module_param_exit_handler); data = calloc(1, sizeof (*data)); igt_assert(data); strncpy(data->name, name, PARAM_NAME_MAX_SZ); fd = open(file_path, O_RDONLY); igt_assert(fd >= 0); n = read(fd, data->original_value, PARAM_VALUE_MAX_SZ); igt_assert_f(n > 0 && n < PARAM_VALUE_MAX_SZ, "Need to increase PARAM_VALUE_MAX_SZ\n"); igt_assert(close(fd) == 0); data->next = module_params; module_params = data; } /** * igt_set_module_param: * @name: i915.ko parameter name * @val: i915.ko parameter value * * This function sets the desired value for the given i915.ko parameter. It also * takes care of saving and restoring the values that were already set before * the test was run. * * Please consider using igt_set_module_param_int() for the integer and bool * parameters. */ void igt_set_module_param(const char *name, const char *val) { char file_path[PARAM_FILE_PATH_MAX_SZ]; size_t len = strlen(val); int fd; igt_assert_f(strlen(name) < PARAM_NAME_MAX_SZ, "Need to increase PARAM_NAME_MAX_SZ\n"); strcpy(file_path, MODULE_PARAM_DIR); strcpy(file_path + strlen(MODULE_PARAM_DIR), name); igt_save_module_param(name, file_path); fd = open(file_path, O_RDWR); igt_assert(write(fd, val, len) == len); igt_assert(close(fd) == 0); } /** * igt_set_module_param_int: * @name: i915.ko parameter name * @val: i915.ko parameter value * * This is a wrapper for igt_set_module_param() that takes an integer instead of * a string. Please see igt_set_module_param(). */ void igt_set_module_param_int(const char *name, int val) { char str[PARAM_VALUE_MAX_SZ]; int n; n = snprintf(str, PARAM_VALUE_MAX_SZ, "%d\n", val); igt_assert_f(n < PARAM_VALUE_MAX_SZ, "Need to increase PARAM_VALUE_MAX_SZ\n"); igt_set_module_param(name, str); } intel-gpu-tools-1.14/lib/intel_reg.h0000644000175000017500000034311312665336131014324 00000000000000/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i810_reg.h,v 1.13 2003/02/06 04:18:04 dawes Exp $ */ /************************************************************************** Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ /* @file * Register names and fields for Intel graphics. */ /* * Authors: * Keith Whitwell * Eric Anholt * * based on the i740 driver by * Kevin E. Martin * * */ #ifndef _I810_REG_H #define _I810_REG_H /* I/O register offsets */ #define SRX 0x3C4 /* p208 */ #define GRX 0x3CE /* p213 */ #define ARX 0x3C0 /* p224 */ /* VGA Color Palette Registers */ #define DACMASK 0x3C6 /* p232 */ #define DACSTATE 0x3C7 /* p232 */ #define DACRX 0x3C7 /* p233 */ #define DACWX 0x3C8 /* p233 */ #define DACDATA 0x3C9 /* p233 */ /* CRT Controller Registers (CRX) */ #define START_ADDR_HI 0x0C /* p246 */ #define START_ADDR_LO 0x0D /* p247 */ #define VERT_SYNC_END 0x11 /* p249 */ #define EXT_VERT_TOTAL 0x30 /* p257 */ #define EXT_VERT_DISPLAY 0x31 /* p258 */ #define EXT_VERT_SYNC_START 0x32 /* p259 */ #define EXT_VERT_BLANK_START 0x33 /* p260 */ #define EXT_HORIZ_TOTAL 0x35 /* p261 */ #define EXT_HORIZ_BLANK 0x39 /* p261 */ #define EXT_START_ADDR 0x40 /* p262 */ #define EXT_START_ADDR_ENABLE 0x80 #define EXT_OFFSET 0x41 /* p263 */ #define EXT_START_ADDR_HI 0x42 /* p263 */ #define INTERLACE_CNTL 0x70 /* p264 */ #define INTERLACE_ENABLE 0x80 #define INTERLACE_DISABLE 0x00 /* Miscellaneous Output Register */ #define MSR_R 0x3CC /* p207 */ #define MSR_W 0x3C2 /* p207 */ #define IO_ADDR_SELECT 0x01 #define MDA_BASE 0x3B0 /* p207 */ #define CGA_BASE 0x3D0 /* p207 */ /* CR80 - IO Control, p264 */ #define IO_CTNL 0x80 #define EXTENDED_ATTR_CNTL 0x02 #define EXTENDED_CRTC_CNTL 0x01 /* GR10 - Address mapping, p221 */ #define ADDRESS_MAPPING 0x10 #define PAGE_TO_LOCAL_MEM_ENABLE 0x10 #define GTT_MEM_MAP_ENABLE 0x08 #define PACKED_MODE_ENABLE 0x04 #define LINEAR_MODE_ENABLE 0x02 #define PAGE_MAPPING_ENABLE 0x01 #define HOTKEY_VBIOS_SWITCH_BLOCK 0x80 #define HOTKEY_SWITCH 0x20 #define HOTKEY_TOGGLE 0x10 /* Blitter control, p378 */ #define BITBLT_CNTL 0x7000c #define COLEXP_MODE 0x30 #define COLEXP_8BPP 0x00 #define COLEXP_16BPP 0x10 #define COLEXP_24BPP 0x20 #define COLEXP_RESERVED 0x30 #define BITBLT_STATUS 0x01 #define CHDECMISC 0x10111 #define DCC 0x10200 #define C0DRB0 0x10200 #define C0DRB1 0x10202 #define C0DRB2 0x10204 #define C0DRB3 0x10206 #define C0DRA01 0x10208 #define C0DRA23 0x1020a #define C1DRB0 0x10600 #define C1DRB1 0x10602 #define C1DRB2 0x10604 #define C1DRB3 0x10606 #define C1DRA01 0x10608 #define C1DRA23 0x1060a /* p375. */ #define DISPLAY_CNTL 0x70008 #define VGA_WRAP_MODE 0x02 #define VGA_WRAP_AT_256KB 0x00 #define VGA_NO_WRAP 0x02 #define GUI_MODE 0x01 #define STANDARD_VGA_MODE 0x00 #define HIRES_MODE 0x01 /* p375 */ #define PIXPIPE_CONFIG_0 0x70009 #define DAC_8_BIT 0x80 #define DAC_6_BIT 0x00 #define HW_CURSOR_ENABLE 0x10 #define EXTENDED_PALETTE 0x01 /* p375 */ #define PIXPIPE_CONFIG_1 0x7000a #define DISPLAY_COLOR_MODE 0x0F #define DISPLAY_VGA_MODE 0x00 #define DISPLAY_8BPP_MODE 0x02 #define DISPLAY_15BPP_MODE 0x04 #define DISPLAY_16BPP_MODE 0x05 #define DISPLAY_24BPP_MODE 0x06 #define DISPLAY_32BPP_MODE 0x07 /* p375 */ #define PIXPIPE_CONFIG_2 0x7000b #define DISPLAY_GAMMA_ENABLE 0x08 #define DISPLAY_GAMMA_DISABLE 0x00 #define OVERLAY_GAMMA_ENABLE 0x04 #define OVERLAY_GAMMA_DISABLE 0x00 /* p380 */ #define DISPLAY_BASE 0x70020 #define DISPLAY_BASE_MASK 0x03fffffc /* Cursor control registers, pp383-384 */ /* Desktop (845G, 865G) */ #define CURSOR_CONTROL 0x70080 #define CURSOR_ENABLE 0x80000000 #define CURSOR_GAMMA_ENABLE 0x40000000 #define CURSOR_STRIDE_MASK 0x30000000 #define CURSOR_FORMAT_SHIFT 24 #define CURSOR_FORMAT_MASK (0x07 << CURSOR_FORMAT_SHIFT) #define CURSOR_FORMAT_2C (0x00 << CURSOR_FORMAT_SHIFT) #define CURSOR_FORMAT_3C (0x01 << CURSOR_FORMAT_SHIFT) #define CURSOR_FORMAT_4C (0x02 << CURSOR_FORMAT_SHIFT) #define CURSOR_FORMAT_ARGB (0x04 << CURSOR_FORMAT_SHIFT) #define CURSOR_FORMAT_XRGB (0x05 << CURSOR_FORMAT_SHIFT) /* Mobile and i810 */ #define CURSOR_A_CONTROL CURSOR_CONTROL #define CURSOR_ORIGIN_SCREEN 0x00 /* i810 only */ #define CURSOR_ORIGIN_DISPLAY 0x1 /* i810 only */ #define CURSOR_MODE 0x27 #define CURSOR_MODE_DISABLE 0x00 #define CURSOR_MODE_32_4C_AX 0x01 /* i810 only */ #define CURSOR_MODE_64_3C 0x04 #define CURSOR_MODE_64_4C_AX 0x05 #define CURSOR_MODE_64_4C 0x06 #define CURSOR_MODE_64_32B_AX 0x07 #define CURSOR_MODE_64_ARGB_AX (0x20 | CURSOR_MODE_64_32B_AX) #define MCURSOR_PIPE_SELECT (1 << 28) #define MCURSOR_PIPE_A 0x00 #define MCURSOR_PIPE_B (1 << 28) #define MCURSOR_GAMMA_ENABLE (1 << 26) #define MCURSOR_MEM_TYPE_LOCAL (1 << 25) #define CURSOR_BASEADDR 0x70084 #define CURSOR_A_BASE CURSOR_BASEADDR #define CURSOR_BASEADDR_MASK 0x1FFFFF00 #define CURSOR_A_POSITION 0x70088 #define CURSOR_POS_SIGN 0x8000 #define CURSOR_POS_MASK 0x007FF #define CURSOR_X_SHIFT 0 #define CURSOR_Y_SHIFT 16 #define CURSOR_X_LO 0x70088 #define CURSOR_X_HI 0x70089 #define CURSOR_X_POS 0x00 #define CURSOR_X_NEG 0x80 #define CURSOR_Y_LO 0x7008A #define CURSOR_Y_HI 0x7008B #define CURSOR_Y_POS 0x00 #define CURSOR_Y_NEG 0x80 #define CURSOR_A_PALETTE0 0x70090 #define CURSOR_A_PALETTE1 0x70094 #define CURSOR_A_PALETTE2 0x70098 #define CURSOR_A_PALETTE3 0x7009C #define CURSOR_SIZE 0x700A0 #define CURSOR_SIZE_MASK 0x3FF #define CURSOR_SIZE_HSHIFT 0 #define CURSOR_SIZE_VSHIFT 12 #define CURSOR_B_CONTROL 0x700C0 #define CURSOR_B_BASE 0x700C4 #define CURSOR_B_POSITION 0x700C8 #define CURSOR_B_PALETTE0 0x700D0 #define CURSOR_B_PALETTE1 0x700D4 #define CURSOR_B_PALETTE2 0x700D8 #define CURSOR_B_PALETTE3 0x700DC /* Similar registers exist in Device 0 on the i810 (pp55-65), but I'm * not sure they refer to local (graphics) memory. * * These details are for the local memory control registers, * (pp301-310). The test machines are not equiped with local memory, * so nothing is tested. Only a single row seems to be supported. */ #define DRAM_ROW_TYPE 0x3000 #define DRAM_ROW_0 0x01 #define DRAM_ROW_0_SDRAM 0x01 #define DRAM_ROW_0_EMPTY 0x00 #define DRAM_ROW_CNTL_LO 0x3001 #define DRAM_PAGE_MODE_CTRL 0x10 #define DRAM_RAS_TO_CAS_OVRIDE 0x08 #define DRAM_CAS_LATENCY 0x04 #define DRAM_RAS_TIMING 0x02 #define DRAM_RAS_PRECHARGE 0x01 #define DRAM_ROW_CNTL_HI 0x3002 #define DRAM_REFRESH_RATE 0x18 #define DRAM_REFRESH_DISABLE 0x00 #define DRAM_REFRESH_60HZ 0x08 #define DRAM_REFRESH_FAST_TEST 0x10 #define DRAM_REFRESH_RESERVED 0x18 #define DRAM_SMS 0x07 #define DRAM_SMS_NORMAL 0x00 #define DRAM_SMS_NOP_ENABLE 0x01 #define DRAM_SMS_ABPCE 0x02 #define DRAM_SMS_MRCE 0x03 #define DRAM_SMS_CBRCE 0x04 /* p307 */ #define DPMS_SYNC_SELECT 0x5002 #define VSYNC_CNTL 0x08 #define VSYNC_ON 0x00 #define VSYNC_OFF 0x08 #define HSYNC_CNTL 0x02 #define HSYNC_ON 0x00 #define HSYNC_OFF 0x02 #define GPIOA 0x5010 #define GPIOB 0x5014 #define GPIOC 0x5018 #define GPIOD 0x501c #define GPIOE 0x5020 #define GPIOF 0x5024 #define GPIOG 0x5028 #define GPIOH 0x502c # define GPIO_CLOCK_DIR_MASK (1 << 0) # define GPIO_CLOCK_DIR_IN (0 << 1) # define GPIO_CLOCK_DIR_OUT (1 << 1) # define GPIO_CLOCK_VAL_MASK (1 << 2) # define GPIO_CLOCK_VAL_OUT (1 << 3) # define GPIO_CLOCK_VAL_IN (1 << 4) # define GPIO_CLOCK_PULLUP_DISABLE (1 << 5) # define GPIO_DATA_DIR_MASK (1 << 8) # define GPIO_DATA_DIR_IN (0 << 9) # define GPIO_DATA_DIR_OUT (1 << 9) # define GPIO_DATA_VAL_MASK (1 << 10) # define GPIO_DATA_VAL_OUT (1 << 11) # define GPIO_DATA_VAL_IN (1 << 12) # define GPIO_DATA_PULLUP_DISABLE (1 << 13) /* GMBus registers for hardware-assisted (non-bitbanging) I2C access */ #define GMBUS0 0x5100 #define GMBUS1 0x5104 #define GMBUS2 0x5108 #define GMBUS3 0x510c #define GMBUS4 0x5110 #define GMBUS5 0x5120 /* p317, 319 */ #define VCLK2_VCO_M 0x6008 /* treat as 16 bit? (includes msbs) */ #define VCLK2_VCO_N 0x600a #define VCLK2_VCO_DIV_SEL 0x6012 #define VCLK_DIVISOR_VGA0 0x6000 #define VCLK_DIVISOR_VGA1 0x6004 #define VCLK_POST_DIV 0x6010 /* Selects a post divisor of 4 instead of 2. */ # define VGA1_PD_P2_DIV_4 (1 << 15) /* Overrides the p2 post divisor field */ # define VGA1_PD_P1_DIV_2 (1 << 13) # define VGA1_PD_P1_SHIFT 8 /* P1 value is 2 greater than this field */ # define VGA1_PD_P1_MASK (0x1f << 8) /* Selects a post divisor of 4 instead of 2. */ # define VGA0_PD_P2_DIV_4 (1 << 7) /* Overrides the p2 post divisor field */ # define VGA0_PD_P1_DIV_2 (1 << 5) # define VGA0_PD_P1_SHIFT 0 /* P1 value is 2 greater than this field */ # define VGA0_PD_P1_MASK (0x1f << 0) #define POST_DIV_SELECT 0x70 #define POST_DIV_1 0x00 #define POST_DIV_2 0x10 #define POST_DIV_4 0x20 #define POST_DIV_8 0x30 #define POST_DIV_16 0x40 #define POST_DIV_32 0x50 #define VCO_LOOP_DIV_BY_4M 0x00 #define VCO_LOOP_DIV_BY_16M 0x04 /* Instruction Parser Mode Register * - p281 * - 2 new bits. */ #define INST_PM 0x20c0 #define AGP_SYNC_PACKET_FLUSH_ENABLE 0x20 /* reserved */ #define SYNC_PACKET_FLUSH_ENABLE 0x10 #define TWO_D_INST_DISABLE 0x08 #define THREE_D_INST_DISABLE 0x04 #define STATE_VAR_UPDATE_DISABLE 0x02 #define PAL_STIP_DISABLE 0x01 #define GEN6_GLOBAL_DEBUG_ENABLE 0x10 #define MEMMODE 0x20dc /* Instruction parser error register. p279 */ #define IPEIR 0x2088 #define IPEHR 0x208C #define INSTDONE 0x2090 #define NOP_ID 0x2094 #define SCPD0 0x209c /* debug */ #define INST_PS 0x20c4 #define IPEIR_I965 0x2064 /* i965 */ #define IPEHR_I965 0x2068 /* i965 */ #define INSTDONE_I965 0x206c #define GEN6_INSTDONE_1 0x206c #define INST_PS_I965 0x2070 /* Current active ring head address: */ #define ACTHD_I965 0x2074 #define ACTHD 0x20C8 /* Current primary/secondary DMA fetch addresses: */ #define DMA_FADD_P 0x2078 #define DMA_FADD_S 0x20d4 #define INSTDONE_1 0x207c #define GEN6_INSTDONE_2 0x207c #define CACHE_MODE_0 0x2120 #define CACHE_MODE_1 0x2124 #define MI_MODE 0x209c #define MI_DISPLAY_POWER_DOWN 0x20e0 #define MI_ARB_STATE 0x20e4 #define MI_RDRET_STATE 0x20fc /* Start addresses for each of the primary rings: */ #define PR0_STR 0x20f0 #define PR1_STR 0x20f4 #define PR2_STR 0x20f8 #define WIZ_CTL 0x7c00 #define WIZ_CTL_SINGLE_SUBSPAN (1<<6) #define WIZ_CTL_IGNORE_STALLS (1<<5) #define SVG_WORK_CTL 0x7408 #define TS_CTL 0x7e00 #define TS_MUX_ERR_CODE (0<<8) #define TS_MUX_URB_0 (1<<8) #define TS_MUX_DISPATCH_ID_0 (10<<8) #define TS_MUX_ERR_CODE_VALID (15<<8) #define TS_MUX_TID_0 (16<<8) #define TS_MUX_EUID_0 (18<<8) #define TS_MUX_FFID_0 (22<<8) #define TS_MUX_EOT (26<<8) #define TS_MUX_SIDEBAND_0 (27<<8) #define TS_SNAP_ALL_CHILD (1<<2) #define TS_SNAP_ALL_ROOT (1<<1) #define TS_SNAP_ENABLE (1<<0) #define TS_DEBUG_DATA 0x7e0c #define TD_CTL 0x8000 #define TD_CTL2 0x8004 #define ECOSKPD 0x21d0 #define EXCC 0x2028 /* I965 debug regs: */ #define IA_VERTICES_COUNT_QW 0x2310 #define IA_PRIMITIVES_COUNT_QW 0x2318 #define VS_INVOCATION_COUNT_QW 0x2320 #define GS_INVOCATION_COUNT_QW 0x2328 #define GS_PRIMITIVES_COUNT_QW 0x2330 #define CL_INVOCATION_COUNT_QW 0x2338 #define CL_PRIMITIVES_COUNT_QW 0x2340 #define PS_INVOCATION_COUNT_QW 0x2348 #define PS_DEPTH_COUNT_QW 0x2350 #define TIMESTAMP_QW 0x2358 #define CLKCMP_QW 0x2360 /* General error reporting regs, p296 */ #define EIR 0x20B0 #define EMR 0x20B4 #define ESR 0x20B8 # define ERR_VERTEX_MAX (1 << 5) /* lpt/cst */ # define ERR_PGTBL_ERROR (1 << 4) # define ERR_DISPLAY_OVERLAY_UNDERRUN (1 << 3) # define ERR_MAIN_MEMORY_REFRESH (1 << 1) # define ERR_INSTRUCTION_ERROR (1 << 0) /* Interrupt Control Registers * - new bits for i810 * - new register hwstam (mask) */ #define HWS_PGA 0x2080 #define PWRCTXA 0x2088 /* 965GM+ only */ #define PWRCTX_EN (1<<0) #define HWSTAM 0x2098 /* p290 */ #define IER 0x20a0 /* p291 */ #define IIR 0x20a4 /* p292 */ #define IMR 0x20a8 /* p293 */ #define ISR 0x20ac /* p294 */ #define HW_ERROR 0x8000 #define SYNC_STATUS_TOGGLE 0x1000 #define DPY_0_FLIP_PENDING 0x0800 #define DPY_1_FLIP_PENDING 0x0400 /* not implemented on i810 */ #define OVL_0_FLIP_PENDING 0x0200 #define OVL_1_FLIP_PENDING 0x0100 /* not implemented on i810 */ #define DPY_0_VBLANK 0x0080 #define DPY_0_EVENT 0x0040 #define DPY_1_VBLANK 0x0020 /* not implemented on i810 */ #define DPY_1_EVENT 0x0010 /* not implemented on i810 */ #define HOST_PORT_EVENT 0x0008 /* */ #define CAPTURE_EVENT 0x0004 /* */ #define USER_DEFINED 0x0002 #define BREAKPOINT 0x0001 #define INTR_RESERVED (0x6000 | \ DPY_1_FLIP_PENDING | \ OVL_1_FLIP_PENDING | \ DPY_1_VBLANK | \ DPY_1_EVENT | \ HOST_PORT_EVENT | \ CAPTURE_EVENT ) /* FIFO Watermark and Burst Length Control Register * * - different offset and contents on i810 (p299) (fewer bits per field) * - some overlay fields added * - what does it all mean? */ #define FWATER_BLC 0x20d8 #define FWATER_BLC2 0x20dc #define MM_BURST_LENGTH 0x00700000 #define MM_FIFO_WATERMARK 0x0001F000 #define LM_BURST_LENGTH 0x00000700 #define LM_FIFO_WATERMARK 0x0000001F /* Fence/Tiling ranges [0..7] */ #define FENCE 0x2000 #define FENCE_NR 8 #define FENCE_NEW 0x3000 #define FENCE_NEW_NR 16 #define FENCE_LINEAR 0 #define FENCE_XMAJOR 1 #define FENCE_YMAJOR 2 #define I915G_FENCE_START_MASK 0x0ff00000 #define I830_FENCE_START_MASK 0x07f80000 #define FENCE_START_MASK 0x03F80000 #define FENCE_X_MAJOR 0x00000000 #define FENCE_Y_MAJOR 0x00001000 #define FENCE_SIZE_MASK 0x00000700 #define FENCE_SIZE_512K 0x00000000 #define FENCE_SIZE_1M 0x00000100 #define FENCE_SIZE_2M 0x00000200 #define FENCE_SIZE_4M 0x00000300 #define FENCE_SIZE_8M 0x00000400 #define FENCE_SIZE_16M 0x00000500 #define FENCE_SIZE_32M 0x00000600 #define FENCE_SIZE_64M 0x00000700 #define I915G_FENCE_SIZE_1M 0x00000000 #define I915G_FENCE_SIZE_2M 0x00000100 #define I915G_FENCE_SIZE_4M 0x00000200 #define I915G_FENCE_SIZE_8M 0x00000300 #define I915G_FENCE_SIZE_16M 0x00000400 #define I915G_FENCE_SIZE_32M 0x00000500 #define I915G_FENCE_SIZE_64M 0x00000600 #define I915G_FENCE_SIZE_128M 0x00000700 #define I965_FENCE_X_MAJOR 0x00000000 #define I965_FENCE_Y_MAJOR 0x00000002 #define FENCE_PITCH_1 0x00000000 #define FENCE_PITCH_2 0x00000010 #define FENCE_PITCH_4 0x00000020 #define FENCE_PITCH_8 0x00000030 #define FENCE_PITCH_16 0x00000040 #define FENCE_PITCH_32 0x00000050 #define FENCE_PITCH_64 0x00000060 #define FENCE_VALID 0x00000001 #define FENCE_REG_SANDYBRIDGE_0 0x100000 /* Registers to control page table, p274 */ #define PGETBL_CTL 0x2020 #define PGETBL_ADDR_MASK 0xFFFFF000 #define PGETBL_ENABLE_MASK 0x00000001 #define PGETBL_ENABLED 0x00000001 /* Added in 965G, this field has the actual size of the global GTT */ #define PGETBL_SIZE_MASK 0x0000000e #define PGETBL_SIZE_512KB (0 << 1) #define PGETBL_SIZE_256KB (1 << 1) #define PGETBL_SIZE_128KB (2 << 1) #define PGETBL_SIZE_1MB (3 << 1) #define PGETBL_SIZE_2MB (4 << 1) #define PGETBL_SIZE_1_5MB (5 << 1) #define G33_PGETBL_SIZE_MASK (3 << 8) #define G33_PGETBL_SIZE_1M (1 << 8) #define G33_PGETBL_SIZE_2M (2 << 8) #define I830_PTE_BASE 0x10000 #define PTE_ADDRESS_MASK 0xfffff000 #define PTE_ADDRESS_MASK_HIGH 0x000000f0 /* i915+ */ #define PTE_MAPPING_TYPE_UNCACHED (0 << 1) #define PTE_MAPPING_TYPE_DCACHE (1 << 1) /* i830 only */ #define PTE_MAPPING_TYPE_CACHED (3 << 1) #define PTE_MAPPING_TYPE_MASK (3 << 1) #define PTE_VALID (1 << 0) /* @defgroup PGE_ERR * @{ */ /* Page table debug register for i845 */ #define PGE_ERR 0x2024 #define PGE_ERR_ADDR_MASK 0xFFFFF000 #define PGE_ERR_ID_MASK 0x00000038 #define PGE_ERR_CAPTURE 0x00000000 #define PGE_ERR_OVERLAY 0x00000008 #define PGE_ERR_DISPLAY 0x00000010 #define PGE_ERR_HOST 0x00000018 #define PGE_ERR_RENDER 0x00000020 #define PGE_ERR_BLITTER 0x00000028 #define PGE_ERR_MAPPING 0x00000030 #define PGE_ERR_CMD_PARSER 0x00000038 #define PGE_ERR_TYPE_MASK 0x00000007 #define PGE_ERR_INV_TABLE 0x00000000 #define PGE_ERR_INV_PTE 0x00000001 #define PGE_ERR_MIXED_TYPES 0x00000002 #define PGE_ERR_PAGE_MISS 0x00000003 #define PGE_ERR_ILLEGAL_TRX 0x00000004 #define PGE_ERR_LOCAL_MEM 0x00000005 #define PGE_ERR_TILED 0x00000006 /* @} */ /* @defgroup PGTBL_ER * @{ */ /* Page table debug register for i945 */ # define PGTBL_ER 0x2024 # define PGTBL_ERR_MT_TILING (1 << 27) # define PGTBL_ERR_MT_GTT_PTE (1 << 26) # define PGTBL_ERR_LC_TILING (1 << 25) # define PGTBL_ERR_LC_GTT_PTE (1 << 24) # define PGTBL_ERR_BIN_VERTEXDATA_GTT_PTE (1 << 23) # define PGTBL_ERR_BIN_INSTRUCTION_GTT_PTE (1 << 22) # define PGTBL_ERR_CS_VERTEXDATA_GTT_PTE (1 << 21) # define PGTBL_ERR_CS_INSTRUCTION_GTT_PTE (1 << 20) # define PGTBL_ERR_CS_GTT (1 << 19) # define PGTBL_ERR_OVERLAY_TILING (1 << 18) # define PGTBL_ERR_OVERLAY_GTT_PTE (1 << 16) # define PGTBL_ERR_DISPC_TILING (1 << 14) # define PGTBL_ERR_DISPC_GTT_PTE (1 << 12) # define PGTBL_ERR_DISPB_TILING (1 << 10) # define PGTBL_ERR_DISPB_GTT_PTE (1 << 8) # define PGTBL_ERR_DISPA_TILING (1 << 6) # define PGTBL_ERR_DISPA_GTT_PTE (1 << 4) # define PGTBL_ERR_HOST_PTE_DATA (1 << 1) # define PGTBL_ERR_HOST_GTT_PTE (1 << 0) /* @} */ /* Ring buffer registers, p277, overview p19 */ #define LP_RING 0x2030 #define HP_RING 0x2040 #define RING_TAIL 0x00 #define TAIL_ADDR 0x000FFFF8 #define I830_TAIL_MASK 0x001FFFF8 #define RING_HEAD 0x04 #define HEAD_WRAP_COUNT 0xFFE00000 #define HEAD_WRAP_ONE 0x00200000 #define HEAD_ADDR 0x001FFFFC #define I830_HEAD_MASK 0x001FFFFC #define RING_START 0x08 #define START_ADDR 0x03FFFFF8 #define I830_RING_START_MASK 0xFFFFF000 #define RING_LEN 0x0C #define RING_NR_PAGES 0x001FF000 #define I830_RING_NR_PAGES 0x001FF000 #define RING_REPORT_MASK 0x00000006 #define RING_REPORT_64K 0x00000002 #define RING_REPORT_128K 0x00000004 #define RING_NO_REPORT 0x00000000 #define RING_VALID_MASK 0x00000001 #define RING_VALID 0x00000001 #define RING_INVALID 0x00000000 /* BitBlt Instructions * * There are many more masks & ranges yet to add. */ #define BR00_BITBLT_CLIENT 0x40000000 #define BR00_OP_COLOR_BLT 0x10000000 #define BR00_OP_SRC_COPY_BLT 0x10C00000 #define BR00_OP_FULL_BLT 0x11400000 #define BR00_OP_MONO_SRC_BLT 0x11800000 #define BR00_OP_MONO_SRC_COPY_BLT 0x11000000 #define BR00_OP_MONO_PAT_BLT 0x11C00000 #define BR00_OP_MONO_SRC_COPY_IMMEDIATE_BLT (0x61 << 22) #define BR00_OP_TEXT_IMMEDIATE_BLT 0xc000000 #define BR00_TPCY_DISABLE 0x00000000 #define BR00_TPCY_ENABLE 0x00000010 #define BR00_TPCY_ROP 0x00000000 #define BR00_TPCY_NO_ROP 0x00000020 #define BR00_TPCY_EQ 0x00000000 #define BR00_TPCY_NOT_EQ 0x00000040 #define BR00_PAT_MSB_FIRST 0x00000000 /* ? */ #define BR00_PAT_VERT_ALIGN 0x000000e0 #define BR00_LENGTH 0x0000000F #define BR09_DEST_ADDR 0x03FFFFFF #define BR11_SOURCE_PITCH 0x00003FFF #define BR12_SOURCE_ADDR 0x03FFFFFF #define BR13_SOLID_PATTERN 0x80000000 #define BR13_RIGHT_TO_LEFT 0x40000000 #define BR13_LEFT_TO_RIGHT 0x00000000 #define BR13_MONO_TRANSPCY 0x20000000 #define BR13_MONO_PATN_TRANS 0x10000000 #define BR13_USE_DYN_DEPTH 0x04000000 #define BR13_DYN_8BPP 0x00000000 #define BR13_DYN_16BPP 0x01000000 #define BR13_DYN_24BPP 0x02000000 #define BR13_ROP_MASK 0x00FF0000 #define BR13_DEST_PITCH 0x0000FFFF #define BR13_PITCH_SIGN_BIT 0x00008000 #define BR14_DEST_HEIGHT 0xFFFF0000 #define BR14_DEST_WIDTH 0x0000FFFF #define BR15_PATTERN_ADDR 0x03FFFFFF #define BR16_SOLID_PAT_COLOR 0x00FFFFFF #define BR16_BACKGND_PAT_CLR 0x00FFFFFF #define BR17_FGND_PAT_CLR 0x00FFFFFF #define BR18_SRC_BGND_CLR 0x00FFFFFF #define BR19_SRC_FGND_CLR 0x00FFFFFF /* Instruction parser instructions */ #define INST_PARSER_CLIENT 0x00000000 #define INST_OP_FLUSH 0x02000000 #define INST_FLUSH_MAP_CACHE 0x00000001 #define GFX_OP_USER_INTERRUPT ((0<<29)|(2<<23)) /* Registers in the i810 host-pci bridge pci config space which affect * the i810 graphics operations. */ #define SMRAM_MISCC 0x70 #define GMS 0x000000c0 #define GMS_DISABLE 0x00000000 #define GMS_ENABLE_BARE 0x00000040 #define GMS_ENABLE_512K 0x00000080 #define GMS_ENABLE_1M 0x000000c0 #define USMM 0x00000030 #define USMM_DISABLE 0x00000000 #define USMM_TSEG_ZERO 0x00000010 #define USMM_TSEG_512K 0x00000020 #define USMM_TSEG_1M 0x00000030 #define GFX_MEM_WIN_SIZE 0x00010000 #define GFX_MEM_WIN_32M 0x00010000 #define GFX_MEM_WIN_64M 0x00000000 /* Overkill? I don't know. Need to figure out top of mem to make the * SMRAM calculations come out. Linux seems to have problems * detecting it all on its own, so this seems a reasonable double * check to any user supplied 'mem=...' boot param. * * ... unfortunately this reg doesn't work according to spec on the * test hardware. */ #define WHTCFG_PAMR_DRP 0x50 #define SYS_DRAM_ROW_0_SHIFT 16 #define SYS_DRAM_ROW_1_SHIFT 20 #define DRAM_MASK 0x0f #define DRAM_VALUE_0 0 #define DRAM_VALUE_1 8 /* No 2 value defined */ #define DRAM_VALUE_3 16 #define DRAM_VALUE_4 16 #define DRAM_VALUE_5 24 #define DRAM_VALUE_6 32 #define DRAM_VALUE_7 32 #define DRAM_VALUE_8 48 #define DRAM_VALUE_9 64 #define DRAM_VALUE_A 64 #define DRAM_VALUE_B 96 #define DRAM_VALUE_C 128 #define DRAM_VALUE_D 128 #define DRAM_VALUE_E 192 #define DRAM_VALUE_F 256 /* nice one, geezer */ #define LM_FREQ_MASK 0x10 #define LM_FREQ_133 0x10 #define LM_FREQ_100 0x00 /* These are 3d state registers, but the state is invarient, so we let * the X server handle it: */ /* GFXRENDERSTATE_COLOR_CHROMA_KEY, p135 */ #define GFX_OP_COLOR_CHROMA_KEY ((0x3<<29)|(0x1d<<24)|(0x2<<16)|0x1) #define CC1_UPDATE_KILL_WRITE (1<<28) #define CC1_ENABLE_KILL_WRITE (1<<27) #define CC1_DISABLE_KILL_WRITE 0 #define CC1_UPDATE_COLOR_IDX (1<<26) #define CC1_UPDATE_CHROMA_LOW (1<<25) #define CC1_UPDATE_CHROMA_HI (1<<24) #define CC1_CHROMA_LOW_MASK ((1<<24)-1) #define CC2_COLOR_IDX_SHIFT 24 #define CC2_COLOR_IDX_MASK (0xff<<24) #define CC2_CHROMA_HI_MASK ((1<<24)-1) #define GFX_CMD_CONTEXT_SEL ((0<<29)|(0x5<<23)) #define CS_UPDATE_LOAD (1<<17) #define CS_UPDATE_USE (1<<16) #define CS_UPDATE_LOAD (1<<17) #define CS_LOAD_CTX0 0 #define CS_LOAD_CTX1 (1<<8) #define CS_USE_CTX0 0 #define CS_USE_CTX1 (1<<0) /* I810 LCD/TV registers */ #define LCD_TV_HTOTAL 0x60000 #define LCD_TV_C 0x60018 #define LCD_TV_OVRACT 0x6001C #define LCD_TV_ENABLE (1 << 31) #define LCD_TV_VGAMOD (1 << 28) /* I830 CRTC registers */ #define HTOTAL_A 0x60000 #define HBLANK_A 0x60004 #define HSYNC_A 0x60008 #define VTOTAL_A 0x6000c #define VBLANK_A 0x60010 #define VSYNC_A 0x60014 #define PIPEASRC 0x6001c #define BCLRPAT_A 0x60020 #define VSYNCSHIFT_A 0x60028 #define HTOTAL_B 0x61000 #define HBLANK_B 0x61004 #define HSYNC_B 0x61008 #define VTOTAL_B 0x6100c #define VBLANK_B 0x61010 #define VSYNC_B 0x61014 #define PIPEBSRC 0x6101c #define BCLRPAT_B 0x61020 #define VSYNCSHIFT_B 0x61028 #define HTOTAL_C 0x62000 #define HBLANK_C 0x62004 #define HSYNC_C 0x62008 #define VTOTAL_C 0x6200c #define VBLANK_C 0x62010 #define VSYNC_C 0x62014 #define PIPECSRC 0x6201c #define BCLRPAT_C 0x62020 #define VSYNCSHIFT_C 0x62028 #define HTOTAL_EDP 0x6F000 #define HBLANK_EDP 0x6F004 #define HSYNC_EDP 0x6F008 #define VTOTAL_EDP 0x6F00c #define VBLANK_EDP 0x6F010 #define VSYNC_EDP 0x6F014 #define VSYNCSHIFT_EDP 0x6F028 #define PP_STATUS 0x61200 # define PP_ON (1 << 31) /* * Indicates that all dependencies of the panel are on: * * - PLL enabled * - pipe enabled * - LVDS/DVOB/DVOC on */ # define PP_READY (1 << 30) # define PP_SEQUENCE_NONE (0 << 28) # define PP_SEQUENCE_ON (1 << 28) # define PP_SEQUENCE_OFF (2 << 28) # define PP_SEQUENCE_MASK 0x30000000 #define PP_CONTROL 0x61204 # define POWER_DOWN_ON_RESET (1 << 1) # define POWER_TARGET_ON (1 << 0) #define PP_ON_DELAYS 0x61208 #define PP_OFF_DELAYS 0x6120c #define PP_DIVISOR 0x61210 #define PFIT_CONTROL 0x61230 # define PFIT_ENABLE (1 << 31) /* Pre-965 */ # define VERT_INTERP_DISABLE (0 << 10) # define VERT_INTERP_BILINEAR (1 << 10) # define VERT_INTERP_MASK (3 << 10) # define VERT_AUTO_SCALE (1 << 9) # define HORIZ_INTERP_DISABLE (0 << 6) # define HORIZ_INTERP_BILINEAR (1 << 6) # define HORIZ_INTERP_MASK (3 << 6) # define HORIZ_AUTO_SCALE (1 << 5) # define PANEL_8TO6_DITHER_ENABLE (1 << 3) /* 965+ */ # define PFIT_PIPE_MASK (3 << 29) # define PFIT_PIPE_SHIFT 29 # define PFIT_SCALING_MODE_MASK (7 << 26) # define PFIT_SCALING_AUTO (0 << 26) # define PFIT_SCALING_PROGRAMMED (1 << 26) # define PFIT_SCALING_PILLAR (2 << 26) # define PFIT_SCALING_LETTER (3 << 26) # define PFIT_FILTER_SELECT_MASK (3 << 24) # define PFIT_FILTER_FUZZY (0 << 24) # define PFIT_FILTER_CRISP (1 << 24) # define PFIT_FILTER_MEDIAN (2 << 24) #define PFIT_PGM_RATIOS 0x61234 /* Pre-965 */ # define PFIT_VERT_SCALE_SHIFT 20 # define PFIT_VERT_SCALE_MASK 0xfff00000 # define PFIT_HORIZ_SCALE_SHIFT 4 # define PFIT_HORIZ_SCALE_MASK 0x0000fff0 /* 965+ */ # define PFIT_VERT_SCALE_SHIFT_965 16 # define PFIT_VERT_SCALE_MASK_965 0x1fff0000 # define PFIT_HORIZ_SCALE_SHIFT_965 0 # define PFIT_HORIZ_SCALE_MASK_965 0x00001fff #define DPLL_A 0x06014 #define DPLL_B 0x06018 # define DPLL_VCO_ENABLE (1 << 31) # define DPLL_DVO_HIGH_SPEED (1 << 30) # define DPLL_SYNCLOCK_ENABLE (1 << 29) # define DPLL_VGA_MODE_DIS (1 << 28) # define DPLLB_MODE_DAC_SERIAL (1 << 26) /* i915 */ # define DPLLB_MODE_LVDS (2 << 26) /* i915 */ # define DPLL_MODE_MASK (3 << 26) # define DPLL_DAC_SERIAL_P2_CLOCK_DIV_10 (0 << 24) /* i915 */ # define DPLL_DAC_SERIAL_P2_CLOCK_DIV_5 (1 << 24) /* i915 */ # define DPLLB_LVDS_P2_CLOCK_DIV_14 (0 << 24) /* i915 */ # define DPLLB_LVDS_P2_CLOCK_DIV_7 (1 << 24) /* i915 */ # define DPLL_P2_CLOCK_DIV_MASK 0x03000000 /* i915 */ # define DPLL_FPA01_P1_POST_DIV_MASK 0x00ff0000 /* i915 */ # define DPLL_FPA01_P1_POST_DIV_MASK_IGD 0x00ff8000 /* IGD */ /* * The i830 generation, in DAC/serial mode, defines p1 as two plus this * bitfield, or just 2 if PLL_P1_DIVIDE_BY_TWO is set. */ # define DPLL_FPA01_P1_POST_DIV_MASK_I830 0x001f0000 /* * The i830 generation, in LVDS mode, defines P1 as the bit number set within * this field (only one bit may be set). */ # define DPLL_FPA01_P1_POST_DIV_MASK_I830_LVDS 0x003f0000 # define DPLL_FPA01_P1_POST_DIV_SHIFT 16 # define DPLL_FPA01_P1_POST_DIV_SHIFT_IGD 15 # define PLL_P2_DIVIDE_BY_4 (1 << 23) /* i830, required in DVO non-gang */ # define PLL_P1_DIVIDE_BY_TWO (1 << 21) /* i830 */ # define PLL_REF_INPUT_DREFCLK (0 << 13) # define PLL_REF_INPUT_TVCLKINA (1 << 13) /* i830 */ # define PLL_REF_INPUT_SUPER_SSC (1 << 13) /* Ironlake: 120M SSC */ # define PLL_REF_INPUT_TVCLKINBC (2 << 13) /* SDVO TVCLKIN */ # define PLLB_REF_INPUT_SPREADSPECTRUMIN (3 << 13) # define PLL_REF_INPUT_MASK (3 << 13) # define PLL_REF_INPUT_DMICLK (5 << 13) /* Ironlake: DMI refclk */ # define PLL_LOAD_PULSE_PHASE_SHIFT 9 /* * Parallel to Serial Load Pulse phase selection. * Selects the phase for the 10X DPLL clock for the PCIe * digital display port. The range is 4 to 13; 10 or more * is just a flip delay. The default is 6 */ # define PLL_LOAD_PULSE_PHASE_MASK (0xf << PLL_LOAD_PULSE_PHASE_SHIFT) # define DISPLAY_RATE_SELECT_FPA1 (1 << 8) /* Ironlake */ # define PLL_REF_SDVO_HDMI_MULTIPLIER_SHIFT 9 # define PLL_REF_SDVO_HDMI_MULTIPLIER_MASK (7 << 9) # define PLL_REF_SDVO_HDMI_MULTIPLIER(x) (((x)-1)<< PLL_REF_SDVO_HDMI_MULTIPLIER_SHIFT) # define DPLL_FPA1_P1_POST_DIV_SHIFT 0 # define DPLL_FPA1_P1_POST_DIV_MASK 0xff /* * SDVO multiplier for 945G/GM. Not used on 965. * * \sa DPLL_MD_UDI_MULTIPLIER_MASK */ # define SDVO_MULTIPLIER_MASK 0x000000ff # define SDVO_MULTIPLIER_SHIFT_HIRES 4 # define SDVO_MULTIPLIER_SHIFT_VGA 0 /* @defgroup DPLL_MD * @{ */ /* Pipe A SDVO/UDI clock multiplier/divider register for G965. */ #define DPLL_A_MD 0x0601c /* Pipe B SDVO/UDI clock multiplier/divider register for G965. */ #define DPLL_B_MD 0x06020 /* * UDI pixel divider, controlling how many pixels are stuffed into a packet. * * Value is pixels minus 1. Must be set to 1 pixel for SDVO. */ # define DPLL_MD_UDI_DIVIDER_MASK 0x3f000000 # define DPLL_MD_UDI_DIVIDER_SHIFT 24 /* UDI pixel divider for VGA, same as DPLL_MD_UDI_DIVIDER_MASK. */ # define DPLL_MD_VGA_UDI_DIVIDER_MASK 0x003f0000 # define DPLL_MD_VGA_UDI_DIVIDER_SHIFT 16 /* * SDVO/UDI pixel multiplier. * * SDVO requires that the bus clock rate be between 1 and 2 Ghz, and the bus * clock rate is 10 times the DPLL clock. At low resolution/refresh rate * modes, the bus rate would be below the limits, so SDVO allows for stuffing * dummy bytes in the datastream at an increased clock rate, with both sides of * the link knowing how many bytes are fill. * * So, for a mode with a dotclock of 65Mhz, we would want to double the clock * rate to 130Mhz to get a bus rate of 1.30Ghz. The DPLL clock rate would be * set to 130Mhz, and the SDVO multiplier set to 2x in this register and * through an SDVO command. * * This register field has values of multiplication factor minus 1, with * a maximum multiplier of 5 for SDVO. */ # define DPLL_MD_UDI_MULTIPLIER_MASK 0x00003f00 # define DPLL_MD_UDI_MULTIPLIER_SHIFT 8 /* SDVO/UDI pixel multiplier for VGA, same as DPLL_MD_UDI_MULTIPLIER_MASK. * This best be set to the default value (3) or the CRT won't work. No, * I don't entirely understand what this does... */ # define DPLL_MD_VGA_UDI_MULTIPLIER_MASK 0x0000003f # define DPLL_MD_VGA_UDI_MULTIPLIER_SHIFT 0 /* @} */ #define DPLL_TEST 0x606c # define DPLLB_TEST_SDVO_DIV_1 (0 << 22) # define DPLLB_TEST_SDVO_DIV_2 (1 << 22) # define DPLLB_TEST_SDVO_DIV_4 (2 << 22) # define DPLLB_TEST_SDVO_DIV_MASK (3 << 22) # define DPLLB_TEST_N_BYPASS (1 << 19) # define DPLLB_TEST_M_BYPASS (1 << 18) # define DPLLB_INPUT_BUFFER_ENABLE (1 << 16) # define DPLLA_TEST_N_BYPASS (1 << 3) # define DPLLA_TEST_M_BYPASS (1 << 2) # define DPLLA_INPUT_BUFFER_ENABLE (1 << 0) #define D_STATE 0x6104 #define DSPCLK_GATE_D 0x6200 # define DPUNIT_B_CLOCK_GATE_DISABLE (1 << 30) /* 965 */ # define VSUNIT_CLOCK_GATE_DISABLE (1 << 29) /* 965 */ # define VRHUNIT_CLOCK_GATE_DISABLE (1 << 28) /* 965 */ # define VRDUNIT_CLOCK_GATE_DISABLE (1 << 27) /* 965 */ # define AUDUNIT_CLOCK_GATE_DISABLE (1 << 26) /* 965 */ # define DPUNIT_A_CLOCK_GATE_DISABLE (1 << 25) /* 965 */ # define DPCUNIT_CLOCK_GATE_DISABLE (1 << 24) /* 965 */ # define TVRUNIT_CLOCK_GATE_DISABLE (1 << 23) /* 915-945 */ # define TVCUNIT_CLOCK_GATE_DISABLE (1 << 22) /* 915-945 */ # define TVFUNIT_CLOCK_GATE_DISABLE (1 << 21) /* 915-945 */ # define TVEUNIT_CLOCK_GATE_DISABLE (1 << 20) /* 915-945 */ # define DVSUNIT_CLOCK_GATE_DISABLE (1 << 19) /* 915-945 */ # define DSSUNIT_CLOCK_GATE_DISABLE (1 << 18) /* 915-945 */ # define DDBUNIT_CLOCK_GATE_DISABLE (1 << 17) /* 915-945 */ # define DPRUNIT_CLOCK_GATE_DISABLE (1 << 16) /* 915-945 */ # define DPFUNIT_CLOCK_GATE_DISABLE (1 << 15) /* 915-945 */ # define DPBMUNIT_CLOCK_GATE_DISABLE (1 << 14) /* 915-945 */ # define DPLSUNIT_CLOCK_GATE_DISABLE (1 << 13) /* 915-945 */ # define DPLUNIT_CLOCK_GATE_DISABLE (1 << 12) /* 915-945 */ # define DPOUNIT_CLOCK_GATE_DISABLE (1 << 11) # define DPBUNIT_CLOCK_GATE_DISABLE (1 << 10) # define DCUNIT_CLOCK_GATE_DISABLE (1 << 9) # define DPUNIT_CLOCK_GATE_DISABLE (1 << 8) # define VRUNIT_CLOCK_GATE_DISABLE (1 << 7) /* 915+: reserved */ # define OVHUNIT_CLOCK_GATE_DISABLE (1 << 6) /* 830-865 */ # define DPIOUNIT_CLOCK_GATE_DISABLE (1 << 6) /* 915-945 */ # define OVFUNIT_CLOCK_GATE_DISABLE (1 << 5) # define OVBUNIT_CLOCK_GATE_DISABLE (1 << 4) /* * This bit must be set on the 830 to prevent hangs when turning off the * overlay scaler. */ # define OVRUNIT_CLOCK_GATE_DISABLE (1 << 3) # define OVCUNIT_CLOCK_GATE_DISABLE (1 << 2) # define OVUUNIT_CLOCK_GATE_DISABLE (1 << 1) # define ZVUNIT_CLOCK_GATE_DISABLE (1 << 0) /* 830 */ # define OVLUNIT_CLOCK_GATE_DISABLE (1 << 0) /* 845,865 */ #define RENCLK_GATE_D1 0x6204 # define BLITTER_CLOCK_GATE_DISABLE (1 << 13) /* 945GM only */ # define MPEG_CLOCK_GATE_DISABLE (1 << 12) /* 945GM only */ # define PC_FE_CLOCK_GATE_DISABLE (1 << 11) # define PC_BE_CLOCK_GATE_DISABLE (1 << 10) # define WINDOWER_CLOCK_GATE_DISABLE (1 << 9) # define INTERPOLATOR_CLOCK_GATE_DISABLE (1 << 8) # define COLOR_CALCULATOR_CLOCK_GATE_DISABLE (1 << 7) # define MOTION_COMP_CLOCK_GATE_DISABLE (1 << 6) # define MAG_CLOCK_GATE_DISABLE (1 << 5) /* This bit must be unset on 855,865 */ # define MECI_CLOCK_GATE_DISABLE (1 << 4) # define DCMP_CLOCK_GATE_DISABLE (1 << 3) # define MEC_CLOCK_GATE_DISABLE (1 << 2) # define MECO_CLOCK_GATE_DISABLE (1 << 1) /* This bit must be set on 855,865. */ # define SV_CLOCK_GATE_DISABLE (1 << 0) # define I915_MPEG_CLOCK_GATE_DISABLE (1 << 16) # define I915_VLD_IP_PR_CLOCK_GATE_DISABLE (1 << 15) # define I915_MOTION_COMP_CLOCK_GATE_DISABLE (1 << 14) # define I915_BD_BF_CLOCK_GATE_DISABLE (1 << 13) # define I915_SF_SE_CLOCK_GATE_DISABLE (1 << 12) # define I915_WM_CLOCK_GATE_DISABLE (1 << 11) # define I915_IZ_CLOCK_GATE_DISABLE (1 << 10) # define I915_PI_CLOCK_GATE_DISABLE (1 << 9) # define I915_DI_CLOCK_GATE_DISABLE (1 << 8) # define I915_SH_SV_CLOCK_GATE_DISABLE (1 << 7) # define I915_PL_DG_QC_FT_CLOCK_GATE_DISABLE (1 << 6) # define I915_SC_CLOCK_GATE_DISABLE (1 << 5) # define I915_FL_CLOCK_GATE_DISABLE (1 << 4) # define I915_DM_CLOCK_GATE_DISABLE (1 << 3) # define I915_PS_CLOCK_GATE_DISABLE (1 << 2) # define I915_CC_CLOCK_GATE_DISABLE (1 << 1) # define I915_BY_CLOCK_GATE_DISABLE (1 << 0) # define I965_RCZ_CLOCK_GATE_DISABLE (1 << 30) /* This bit must always be set on 965G/965GM */ # define I965_RCC_CLOCK_GATE_DISABLE (1 << 29) # define I965_RCPB_CLOCK_GATE_DISABLE (1 << 28) # define I965_DAP_CLOCK_GATE_DISABLE (1 << 27) # define I965_ROC_CLOCK_GATE_DISABLE (1 << 26) # define I965_GW_CLOCK_GATE_DISABLE (1 << 25) # define I965_TD_CLOCK_GATE_DISABLE (1 << 24) /* This bit must always be set on 965G */ # define I965_ISC_CLOCK_GATE_DISABLE (1 << 23) # define I965_IC_CLOCK_GATE_DISABLE (1 << 22) # define I965_EU_CLOCK_GATE_DISABLE (1 << 21) # define I965_IF_CLOCK_GATE_DISABLE (1 << 20) # define I965_TC_CLOCK_GATE_DISABLE (1 << 19) # define I965_SO_CLOCK_GATE_DISABLE (1 << 17) # define I965_FBC_CLOCK_GATE_DISABLE (1 << 16) # define I965_MARI_CLOCK_GATE_DISABLE (1 << 15) # define I965_MASF_CLOCK_GATE_DISABLE (1 << 14) # define I965_MAWB_CLOCK_GATE_DISABLE (1 << 13) # define I965_EM_CLOCK_GATE_DISABLE (1 << 12) # define I965_UC_CLOCK_GATE_DISABLE (1 << 11) # define I965_SI_CLOCK_GATE_DISABLE (1 << 6) # define I965_MT_CLOCK_GATE_DISABLE (1 << 5) # define I965_PL_CLOCK_GATE_DISABLE (1 << 4) # define I965_DG_CLOCK_GATE_DISABLE (1 << 3) # define I965_QC_CLOCK_GATE_DISABLE (1 << 2) # define I965_FT_CLOCK_GATE_DISABLE (1 << 1) # define I965_DM_CLOCK_GATE_DISABLE (1 << 0) #define RENCLK_GATE_D2 0x6208 #define VF_UNIT_CLOCK_GATE_DISABLE (1 << 9) #define GS_UNIT_CLOCK_GATE_DISABLE (1 << 7) #define CL_UNIT_CLOCK_GATE_DISABLE (1 << 6) #define RAMCLK_GATE_D 0x6210 /* CRL only */ #define DEUC 0x6214 /* CRL only */ /* * This is a PCI config space register to manipulate backlight brightness * It is used when the BLM_LEGACY_MODE is turned on. When enabled, the first * byte of this config register sets brightness within the range from * 0 to 0xff */ #define LEGACY_BACKLIGHT_BRIGHTNESS 0xf4 #define BLC_PWM_CTL 0x61254 #define BACKLIGHT_MODULATION_FREQ_SHIFT (17) #define BACKLIGHT_MODULATION_FREQ_SHIFT2 (16) /* * This is the most significant 15 bits of the number of backlight cycles in a * complete cycle of the modulated backlight control. * * The actual value is this field multiplied by two. */ #define BACKLIGHT_MODULATION_FREQ_MASK (0x7fff << 17) #define BACKLIGHT_MODULATION_FREQ_MASK2 (0xffff << 16) #define BLM_LEGACY_MODE (1 << 16) /* * This is the number of cycles out of the backlight modulation cycle for which * the backlight is on. * * This field must be no greater than the number of cycles in the complete * backlight modulation cycle. */ #define BACKLIGHT_DUTY_CYCLE_SHIFT (0) #define BACKLIGHT_DUTY_CYCLE_MASK (0xffff) /* On 965+ backlight control is in another register */ #define BLC_PWM_CTL2 0x61250 #define BLM_LEGACY_MODE2 (1 << 30) #define BLM_CTL 0x61260 #define BLM_THRESHOLD_0 0x61270 #define BLM_THRESHOLD_1 0x61274 #define BLM_THRESHOLD_2 0x61278 #define BLM_THRESHOLD_3 0x6127c #define BLM_THRESHOLD_4 0x61280 #define BLM_THRESHOLD_5 0x61284 #define BLM_ACCUMULATOR_0 0x61290 #define BLM_ACCUMULATOR_1 0x61294 #define BLM_ACCUMULATOR_2 0x61298 #define BLM_ACCUMULATOR_3 0x6129c #define BLM_ACCUMULATOR_4 0x612a0 #define BLM_ACCUMULATOR_5 0x612a4 #define FPA0 0x06040 #define FPA1 0x06044 #define FPB0 0x06048 #define FPB1 0x0604c # define FP_N_DIV_MASK 0x003f0000 # define FP_N_IGD_DIV_MASK 0x00ff0000 # define FP_N_DIV_SHIFT 16 # define FP_M1_DIV_MASK 0x00003f00 # define FP_M1_DIV_SHIFT 8 # define FP_M2_DIV_MASK 0x0000003f # define FP_M2_IGD_DIV_MASK 0x000000ff # define FP_M2_DIV_SHIFT 0 #define PORT_HOTPLUG_EN 0x61110 # define HDMIB_HOTPLUG_INT_EN (1 << 29) # define HDMIC_HOTPLUG_INT_EN (1 << 28) # define HDMID_HOTPLUG_INT_EN (1 << 27) # define SDVOB_HOTPLUG_INT_EN (1 << 26) # define SDVOC_HOTPLUG_INT_EN (1 << 25) # define TV_HOTPLUG_INT_EN (1 << 18) # define CRT_HOTPLUG_INT_EN (1 << 9) # define CRT_HOTPLUG_ACTIVATION_PERIOD_32 (0 << 8) /* must use period 64 on GM45 according to docs */ # define CRT_HOTPLUG_ACTIVATION_PERIOD_64 (1 << 8) # define CRT_HOTPLUG_DAC_ON_TIME_2M (0 << 7) # define CRT_HOTPLUG_DAC_ON_TIME_4M (1 << 7) # define CRT_HOTPLUG_VOLTAGE_COMPARE_40 (0 << 5) # define CRT_HOTPLUG_VOLTAGE_COMPARE_50 (1 << 5) # define CRT_HOTPLUG_VOLTAGE_COMPARE_60 (2 << 5) # define CRT_HOTPLUG_VOLTAGE_COMPARE_70 (3 << 5) # define CRT_HOTPLUG_VOLTAGE_COMPARE_MASK (3 << 5) # define CRT_HOTPLUG_DETECT_DELAY_1G (0 << 4) # define CRT_HOTPLUG_DETECT_DELAY_2G (1 << 4) # define CRT_HOTPLUG_FORCE_DETECT (1 << 3) # define CRT_HOTPLUG_DETECT_VOLTAGE_325MV (0 << 2) # define CRT_HOTPLUG_DETECT_VOLTAGE_475MV (1 << 2) # define CRT_HOTPLUG_MASK (0x3fc) /* Bits 9-2 */ #define PORT_HOTPLUG_STAT 0x61114 # define HDMIB_HOTPLUG_INT_STATUS (1 << 29) # define HDMIC_HOTPLUG_INT_STATUS (1 << 28) # define HDMID_HOTPLUG_INT_STATUS (1 << 27) # define CRT_HOTPLUG_INT_STATUS (1 << 11) # define TV_HOTPLUG_INT_STATUS (1 << 10) # define CRT_HOTPLUG_MONITOR_MASK (3 << 8) # define CRT_HOTPLUG_MONITOR_COLOR (3 << 8) # define CRT_HOTPLUG_MONITOR_MONO (2 << 8) # define CRT_HOTPLUG_MONITOR_NONE (0 << 8) # define SDVOC_HOTPLUG_INT_STATUS (1 << 7) # define SDVOB_HOTPLUG_INT_STATUS (1 << 6) #define SDVOB 0x61140 #define SDVOC 0x61160 #define SDVO_ENABLE (1 << 31) #define SDVO_PIPE_B_SELECT (1 << 30) #define SDVO_STALL_SELECT (1 << 29) #define SDVO_INTERRUPT_ENABLE (1 << 26) #define DISPLAY_HOTPLUG_CTL 0x61164 /* * 915G/GM SDVO pixel multiplier. * * Programmed value is multiplier - 1, up to 5x. * * \sa DPLL_MD_UDI_MULTIPLIER_MASK */ #define SDVO_PORT_MULTIPLY_MASK (7 << 23) #define SDVO_PORT_MULTIPLY_SHIFT 23 #define SDVO_PHASE_SELECT_MASK (15 << 19) #define SDVO_PHASE_SELECT_DEFAULT (6 << 19) #define SDVO_CLOCK_OUTPUT_INVERT (1 << 18) #define SDVOC_GANG_MODE (1 << 16) #define SDVO_ENCODING_SDVO (0x0 << 10) #define SDVO_ENCODING_HDMI (0x2 << 10) /* Requird for HDMI operation */ #define SDVO_NULL_PACKETS_DURING_VSYNC (1 << 9) #define SDVO_BORDER_ENABLE (1 << 7) #define SDVO_AUDIO_ENABLE (1 << 6) /* New with 965, default is to be set */ #define SDVO_VSYNC_ACTIVE_HIGH (1 << 4) /* New with 965, default is to be set */ #define SDVO_HSYNC_ACTIVE_HIGH (1 << 3) /* 915/945 only, read-only bit */ #define SDVOB_PCIE_CONCURRENCY (1 << 3) #define SDVO_DETECTED (1 << 2) /* Bits to be preserved when writing */ #define SDVOB_PRESERVE_MASK ((1 << 17) | (1 << 16) | (1 << 14)) #define SDVOC_PRESERVE_MASK (1 << 17) #define UDIB_SVB_SHB_CODES 0x61144 #define UDIB_SHA_BLANK_CODES 0x61148 #define UDIB_START_END_FILL_CODES 0x6114c #define SDVOUDI 0x61150 #define I830_HTOTAL_MASK 0xfff0000 #define I830_HACTIVE_MASK 0x7ff #define I830_HBLANKEND_MASK 0xfff0000 #define I830_HBLANKSTART_MASK 0xfff #define I830_HSYNCEND_MASK 0xfff0000 #define I830_HSYNCSTART_MASK 0xfff #define I830_VTOTAL_MASK 0xfff0000 #define I830_VACTIVE_MASK 0x7ff #define I830_VBLANKEND_MASK 0xfff0000 #define I830_VBLANKSTART_MASK 0xfff #define I830_VSYNCEND_MASK 0xfff0000 #define I830_VSYNCSTART_MASK 0xfff #define I830_PIPEA_HORZ_MASK 0x7ff0000 #define I830_PIPEA_VERT_MASK 0x7ff #define ADPA 0x61100 #define ADPA_DAC_ENABLE (1<<31) #define ADPA_DAC_DISABLE 0 #define ADPA_PIPE_SELECT_MASK (1<<30) #define ADPA_PIPE_A_SELECT 0 #define ADPA_PIPE_B_SELECT (1<<30) #define ADPA_USE_VGA_HVPOLARITY (1<<15) #define ADPA_SETS_HVPOLARITY 0 #define ADPA_VSYNC_CNTL_DISABLE (1<<11) #define ADPA_VSYNC_CNTL_ENABLE 0 #define ADPA_HSYNC_CNTL_DISABLE (1<<10) #define ADPA_HSYNC_CNTL_ENABLE 0 #define ADPA_VSYNC_ACTIVE_HIGH (1<<4) #define ADPA_VSYNC_ACTIVE_LOW 0 #define ADPA_HSYNC_ACTIVE_HIGH (1<<3) #define ADPA_HSYNC_ACTIVE_LOW 0 #define PCH_DSP_CHICKEN1 0x42000 #define PCH_DSP_CHICKEN2 0x42004 #define PCH_DSP_CHICKEN3 0x4200c #define PCH_DSPCLK_GATE_D 0x42020 #define PCH_DSPRAMCLK_GATE_D 0x42024 #define PCH_3DCGDIS0 0x46020 #define PCH_3DCGDIS1 0x46024 #define PCH_3DRAMCGDIS0 0x46028 #define SOUTH_DSPCLK_GATE_D 0xc2020 #define CPU_eDP_A 0x64000 #define PCH_DP_B 0xe4100 #define PCH_DP_C 0xe4200 #define PCH_DP_D 0xe4300 #define DVOA 0x61120 #define DVOB 0x61140 #define DVOC 0x61160 #define DVO_ENABLE (1 << 31) #define DVO_PIPE_B_SELECT (1 << 30) #define DVO_PIPE_STALL_UNUSED (0 << 28) #define DVO_PIPE_STALL (1 << 28) #define DVO_PIPE_STALL_TV (2 << 28) #define DVO_PIPE_STALL_MASK (3 << 28) #define DVO_USE_VGA_SYNC (1 << 15) #define DVO_DATA_ORDER_I740 (0 << 14) #define DVO_DATA_ORDER_FP (1 << 14) #define DVO_VSYNC_DISABLE (1 << 11) #define DVO_HSYNC_DISABLE (1 << 10) #define DVO_VSYNC_TRISTATE (1 << 9) #define DVO_HSYNC_TRISTATE (1 << 8) #define DVO_BORDER_ENABLE (1 << 7) #define DVO_DATA_ORDER_GBRG (1 << 6) #define DVO_DATA_ORDER_RGGB (0 << 6) #define DVO_DATA_ORDER_GBRG_ERRATA (0 << 6) #define DVO_DATA_ORDER_RGGB_ERRATA (1 << 6) #define DVO_VSYNC_ACTIVE_HIGH (1 << 4) #define DVO_HSYNC_ACTIVE_HIGH (1 << 3) #define DVO_BLANK_ACTIVE_HIGH (1 << 2) #define DVO_OUTPUT_CSTATE_PIXELS (1 << 1) /* SDG only */ #define DVO_OUTPUT_SOURCE_SIZE_PIXELS (1 << 0) /* SDG only */ #define DVO_PRESERVE_MASK (0x7<<24) #define DVOA_SRCDIM 0x61124 #define DVOB_SRCDIM 0x61144 #define DVOC_SRCDIM 0x61164 #define DVO_SRCDIM_HORIZONTAL_SHIFT 12 #define DVO_SRCDIM_VERTICAL_SHIFT 0 /* @defgroup LVDS * @{ */ /* * This register controls the LVDS output enable, pipe selection, and data * format selection. * * All of the clock/data pairs are force powered down by power sequencing. */ #define LVDS 0x61180 /* * Enables the LVDS port. This bit must be set before DPLLs are enabled, as * the DPLL semantics change when the LVDS is assigned to that pipe. */ # define LVDS_PORT_EN (1 << 31) /* Selects pipe B for LVDS data. Must be set on pre-965. */ # define LVDS_PIPEB_SELECT (1 << 30) /* on 965, dithering is enabled in this register, not PFIT_CONTROL */ # define LVDS_DITHER_ENABLE (1 << 25) /* * Selects between .0 and .1 formats: * * 0 = 1x18.0, 2x18.0, 1x24.0 or 2x24.0 * 1 = 1x24.1 or 2x24.1 */ # define LVDS_DATA_FORMAT_DOT_ONE (1 << 24) /* Using LE instead of HS on second channel control signal */ # define LVDS_LE_CONTROL_ENABLE (1 << 23) /* Using LF instead of VS on second channel control signal */ # define LVDS_LF_CONTROL_ENABLE (1 << 22) /* invert vsync signal polarity */ # define LVDS_VSYNC_POLARITY_INVERT (1 << 21) /* invert hsync signal polarity */ # define LVDS_HSYNC_POLARITY_INVERT (1 << 20) /* invert display enable signal polarity */ # define LVDS_DE_POLARITY_INVERT (1 << 19) /* * Control signals for second channel, ignored in single channel modes */ /* send DE, HS, VS on second channel */ # define LVDS_SECOND_CHANNEL_DE_HS_VS (0 << 17) # define LVDS_SECOND_CHANNEL_RESERVED (1 << 17) /* Send zeros instead of DE, HS, VS on second channel */ # define LVDS_SECOND_CHANNEL_ZEROS (2 << 17) /* Set DE=0, HS=LE, VS=LF on second channel */ # define LVDS_SECOND_CHANNEL_HS_VS (3 << 17) /* * Send duplicate data for channel reserved bits, otherwise send zeros */ # define LVDS_CHANNEL_DUP_RESERVED (1 << 16) /* * Enable border for unscaled (or aspect-scaled) display */ # define LVDS_BORDER_ENABLE (1 << 15) /* * Tri-state the LVDS buffers when powered down, otherwise * they are set to 0V */ # define LVDS_POWER_DOWN_TRI_STATE (1 << 10) /* * Enables the A0-A2 data pairs and CLKA, containing 18 bits of color data per * pixel. */ # define LVDS_A0A2_CLKA_POWER_MASK (3 << 8) # define LVDS_A0A2_CLKA_POWER_DOWN (0 << 8) # define LVDS_A0A2_CLKA_POWER_UP (3 << 8) /* * Controls the A3 data pair, which contains the additional LSBs for 24 bit * mode. Only enabled if LVDS_A0A2_CLKA_POWER_UP also indicates it should be * on. */ # define LVDS_A3_POWER_MASK (3 << 6) # define LVDS_A3_POWER_DOWN (0 << 6) # define LVDS_A3_POWER_UP (3 << 6) /* * Controls the CLKB pair. This should only be set when LVDS_B0B3_POWER_UP * is set. */ # define LVDS_CLKB_POWER_MASK (3 << 4) # define LVDS_CLKB_POWER_DOWN (0 << 4) # define LVDS_CLKB_POWER_UP (3 << 4) /* * Controls the B0-B3 data pairs. This must be set to match the DPLL p2 * setting for whether we are in dual-channel mode. The B3 pair will * additionally only be powered up when LVDS_A3_POWER_UP is set. */ # define LVDS_B0B3_POWER_MASK (3 << 2) # define LVDS_B0B3_POWER_DOWN (0 << 2) # define LVDS_B0B3_POWER_UP (3 << 2) /* @} */ #define DP_B 0x64100 #define DPB_AUX_CH_CTL 0x64110 #define DPB_AUX_CH_DATA1 0x64114 #define DPB_AUX_CH_DATA2 0x64118 #define DPB_AUX_CH_DATA3 0x6411c #define DPB_AUX_CH_DATA4 0x64120 #define DPB_AUX_CH_DATA5 0x64124 #define DP_C 0x64200 #define DPC_AUX_CH_CTL 0x64210 #define DPC_AUX_CH_DATA1 0x64214 #define DPC_AUX_CH_DATA2 0x64218 #define DPC_AUX_CH_DATA3 0x6421c #define DPC_AUX_CH_DATA4 0x64220 #define DPC_AUX_CH_DATA5 0x64224 #define DP_D 0x64300 #define DPD_AUX_CH_CTL 0x64310 #define DPD_AUX_CH_DATA1 0x64314 #define DPD_AUX_CH_DATA2 0x64318 #define DPD_AUX_CH_DATA3 0x6431c #define DPD_AUX_CH_DATA4 0x64320 #define DPD_AUX_CH_DATA5 0x64324 /* * Two channel clock control. Turn this on if you need clkb for two channel mode * Overridden by global LVDS power sequencing */ /* clkb off */ # define LVDS_CLKB_POWER_DOWN (0 << 4) /* powered up, but clkb forced to 0 */ # define LVDS_CLKB_POWER_PARTIAL (1 << 4) /* clock B running */ # define LVDS_CLKB_POWER_UP (3 << 4) /* * Two channel mode B0-B2 control. Sets state when power is on. * Set to POWER_DOWN in single channel mode, other settings enable * two channel mode. The CLKB power control controls whether that clock * is enabled during two channel mode. * */ /* Everything is off, including B3 and CLKB */ # define LVDS_B_POWER_DOWN (0 << 2) /* B0, B1, B2 and data lines forced to 0. timing is active */ # define LVDS_B_POWER_PARTIAL (1 << 2) /* data lines active (both timing and colour) */ # define LVDS_B_POWER_UP (3 << 2) /* @defgroup TV_CTL * @{ */ #define TV_CTL 0x68000 /* Enables the TV encoder */ # define TV_ENC_ENABLE (1 << 31) /* Sources the TV encoder input from pipe B instead of A. */ # define TV_ENC_PIPEB_SELECT (1 << 30) /* Outputs composite video (DAC A only) */ # define TV_ENC_OUTPUT_COMPOSITE (0 << 28) /* Outputs SVideo video (DAC B/C) */ # define TV_ENC_OUTPUT_SVIDEO (1 << 28) /* Outputs Component video (DAC A/B/C) */ # define TV_ENC_OUTPUT_COMPONENT (2 << 28) /* Outputs Composite and SVideo (DAC A/B/C) */ # define TV_ENC_OUTPUT_SVIDEO_COMPOSITE (3 << 28) # define TV_TRILEVEL_SYNC (1 << 21) /* Enables slow sync generation (945GM only) */ # define TV_SLOW_SYNC (1 << 20) /* Selects 4x oversampling for 480i and 576p */ # define TV_OVERSAMPLE_4X (0 << 18) /* Selects 2x oversampling for 720p and 1080i */ # define TV_OVERSAMPLE_2X (1 << 18) /* Selects no oversampling for 1080p */ # define TV_OVERSAMPLE_NONE (2 << 18) /* Selects 8x oversampling */ # define TV_OVERSAMPLE_8X (3 << 18) /* Selects progressive mode rather than interlaced */ # define TV_PROGRESSIVE (1 << 17) /* Sets the colorburst to PAL mode. Required for non-M PAL modes. */ # define TV_PAL_BURST (1 << 16) /* Field for setting delay of Y compared to C */ # define TV_YC_SKEW_MASK (7 << 12) /* Enables a fix for 480p/576p standard definition modes on the 915GM only */ # define TV_ENC_SDP_FIX (1 << 11) /* * Enables a fix for the 915GM only. * * Not sure what it does. */ # define TV_ENC_C0_FIX (1 << 10) /* Bits that must be preserved by software */ # define TV_CTL_SAVE ((1 << 11) | (3 << 9) | (7 << 6) | 0xf) # define TV_FUSE_STATE_MASK (3 << 4) /* Read-only state that reports all features enabled */ # define TV_FUSE_STATE_ENABLED (0 << 4) /* Read-only state that reports that Macrovision is disabled in hardware*/ # define TV_FUSE_STATE_NO_MACROVISION (1 << 4) /* Read-only state that reports that TV-out is disabled in hardware. */ # define TV_FUSE_STATE_DISABLED (2 << 4) /* Normal operation */ # define TV_TEST_MODE_NORMAL (0 << 0) /* Encoder test pattern 1 - combo pattern */ # define TV_TEST_MODE_PATTERN_1 (1 << 0) /* Encoder test pattern 2 - full screen vertical 75% color bars */ # define TV_TEST_MODE_PATTERN_2 (2 << 0) /* Encoder test pattern 3 - full screen horizontal 75% color bars */ # define TV_TEST_MODE_PATTERN_3 (3 << 0) /* Encoder test pattern 4 - random noise */ # define TV_TEST_MODE_PATTERN_4 (4 << 0) /* Encoder test pattern 5 - linear color ramps */ # define TV_TEST_MODE_PATTERN_5 (5 << 0) /* * This test mode forces the DACs to 50% of full output. * * This is used for load detection in combination with TVDAC_SENSE_MASK */ # define TV_TEST_MODE_MONITOR_DETECT (7 << 0) # define TV_TEST_MODE_MASK (7 << 0) /* @} */ /* @defgroup TV_DAC * @{ */ #define TV_DAC 0x68004 /* * Reports that DAC state change logic has reported change (RO). * * This gets cleared when TV_DAC_STATE_EN is cleared */ # define TVDAC_STATE_CHG (1 << 31) # define TVDAC_SENSE_MASK (7 << 28) /* Reports that DAC A voltage is above the detect threshold */ # define TVDAC_A_SENSE (1 << 30) /* Reports that DAC B voltage is above the detect threshold */ # define TVDAC_B_SENSE (1 << 29) /* Reports that DAC C voltage is above the detect threshold */ # define TVDAC_C_SENSE (1 << 28) /* * Enables DAC state detection logic, for load-based TV detection. * * The PLL of the chosen pipe (in TV_CTL) must be running, and the encoder set * to off, for load detection to work. */ # define TVDAC_STATE_CHG_EN (1 << 27) /* Sets the DAC A sense value to high */ # define TVDAC_A_SENSE_CTL (1 << 26) /* Sets the DAC B sense value to high */ # define TVDAC_B_SENSE_CTL (1 << 25) /* Sets the DAC C sense value to high */ # define TVDAC_C_SENSE_CTL (1 << 24) /* Overrides the ENC_ENABLE and DAC voltage levels */ # define DAC_CTL_OVERRIDE (1 << 7) /* Sets the slew rate. Must be preserved in software */ # define ENC_TVDAC_SLEW_FAST (1 << 6) # define DAC_A_1_3_V (0 << 4) # define DAC_A_1_1_V (1 << 4) # define DAC_A_0_7_V (2 << 4) # define DAC_A_OFF (3 << 4) # define DAC_B_1_3_V (0 << 2) # define DAC_B_1_1_V (1 << 2) # define DAC_B_0_7_V (2 << 2) # define DAC_B_OFF (3 << 2) # define DAC_C_1_3_V (0 << 0) # define DAC_C_1_1_V (1 << 0) # define DAC_C_0_7_V (2 << 0) # define DAC_C_OFF (3 << 0) /* @} */ /* * CSC coefficients are stored in a floating point format with 9 bits of * mantissa and 2 or 3 bits of exponent. The exponent is represented as 2*-n, * where 2-bit exponents are unsigned n, and 3-bit exponents are signed n with * -1 (0x3) being the only legal negative value. */ #define TV_CSC_Y 0x68010 # define TV_RY_MASK 0x07ff0000 # define TV_RY_SHIFT 16 # define TV_GY_MASK 0x00000fff # define TV_GY_SHIFT 0 #define TV_CSC_Y2 0x68014 # define TV_BY_MASK 0x07ff0000 # define TV_BY_SHIFT 16 /* * Y attenuation for component video. * * Stored in 1.9 fixed point. */ # define TV_AY_MASK 0x000003ff # define TV_AY_SHIFT 0 #define TV_CSC_U 0x68018 # define TV_RU_MASK 0x07ff0000 # define TV_RU_SHIFT 16 # define TV_GU_MASK 0x000007ff # define TV_GU_SHIFT 0 #define TV_CSC_U2 0x6801c # define TV_BU_MASK 0x07ff0000 # define TV_BU_SHIFT 16 /* * U attenuation for component video. * * Stored in 1.9 fixed point. */ # define TV_AU_MASK 0x000003ff # define TV_AU_SHIFT 0 #define TV_CSC_V 0x68020 # define TV_RV_MASK 0x0fff0000 # define TV_RV_SHIFT 16 # define TV_GV_MASK 0x000007ff # define TV_GV_SHIFT 0 #define TV_CSC_V2 0x68024 # define TV_BV_MASK 0x07ff0000 # define TV_BV_SHIFT 16 /* * V attenuation for component video. * * Stored in 1.9 fixed point. */ # define TV_AV_MASK 0x000007ff # define TV_AV_SHIFT 0 /* @defgroup TV_CSC_KNOBS * @{ */ #define TV_CLR_KNOBS 0x68028 /* 2s-complement brightness adjustment */ # define TV_BRIGHTNESS_MASK 0xff000000 # define TV_BRIGHTNESS_SHIFT 24 /* Contrast adjustment, as a 2.6 unsigned floating point number */ # define TV_CONTRAST_MASK 0x00ff0000 # define TV_CONTRAST_SHIFT 16 /* Saturation adjustment, as a 2.6 unsigned floating point number */ # define TV_SATURATION_MASK 0x0000ff00 # define TV_SATURATION_SHIFT 8 /* Hue adjustment, as an integer phase angle in degrees */ # define TV_HUE_MASK 0x000000ff # define TV_HUE_SHIFT 0 /* @} */ /* @defgroup TV_CLR_LEVEL * @{ */ #define TV_CLR_LEVEL 0x6802c /* Controls the DAC level for black */ # define TV_BLACK_LEVEL_MASK 0x01ff0000 # define TV_BLACK_LEVEL_SHIFT 16 /* Controls the DAC level for blanking */ # define TV_BLANK_LEVEL_MASK 0x000001ff # define TV_BLANK_LEVEL_SHIFT 0 /* @} */ /* @defgroup TV_H_CTL_1 * @{ */ #define TV_H_CTL_1 0x68030 /* Number of pixels in the hsync. */ # define TV_HSYNC_END_MASK 0x1fff0000 # define TV_HSYNC_END_SHIFT 16 /* Total number of pixels minus one in the line (display and blanking). */ # define TV_HTOTAL_MASK 0x00001fff # define TV_HTOTAL_SHIFT 0 /* @} */ /* @defgroup TV_H_CTL_2 * @{ */ #define TV_H_CTL_2 0x68034 /* Enables the colorburst (needed for non-component color) */ # define TV_BURST_ENA (1 << 31) /* Offset of the colorburst from the start of hsync, in pixels minus one. */ # define TV_HBURST_START_SHIFT 16 # define TV_HBURST_START_MASK 0x1fff0000 /* Length of the colorburst */ # define TV_HBURST_LEN_SHIFT 0 # define TV_HBURST_LEN_MASK 0x0001fff /* @} */ /* @defgroup TV_H_CTL_3 * @{ */ #define TV_H_CTL_3 0x68038 /* End of hblank, measured in pixels minus one from start of hsync */ # define TV_HBLANK_END_SHIFT 16 # define TV_HBLANK_END_MASK 0x1fff0000 /* Start of hblank, measured in pixels minus one from start of hsync */ # define TV_HBLANK_START_SHIFT 0 # define TV_HBLANK_START_MASK 0x0001fff /* @} */ /* @defgroup TV_V_CTL_1 * @{ */ #define TV_V_CTL_1 0x6803c /* XXX */ # define TV_NBR_END_SHIFT 16 # define TV_NBR_END_MASK 0x07ff0000 /* XXX */ # define TV_VI_END_F1_SHIFT 8 # define TV_VI_END_F1_MASK 0x00003f00 /* XXX */ # define TV_VI_END_F2_SHIFT 0 # define TV_VI_END_F2_MASK 0x0000003f /* @} */ /* @defgroup TV_V_CTL_2 * @{ */ #define TV_V_CTL_2 0x68040 /* Length of vsync, in half lines */ # define TV_VSYNC_LEN_MASK 0x07ff0000 # define TV_VSYNC_LEN_SHIFT 16 /* Offset of the start of vsync in field 1, measured in one less than the * number of half lines. */ # define TV_VSYNC_START_F1_MASK 0x00007f00 # define TV_VSYNC_START_F1_SHIFT 8 /* * Offset of the start of vsync in field 2, measured in one less than the * number of half lines. */ # define TV_VSYNC_START_F2_MASK 0x0000007f # define TV_VSYNC_START_F2_SHIFT 0 /* @} */ /* @defgroup TV_V_CTL_3 * @{ */ #define TV_V_CTL_3 0x68044 /* Enables generation of the equalization signal */ # define TV_EQUAL_ENA (1 << 31) /* Length of vsync, in half lines */ # define TV_VEQ_LEN_MASK 0x007f0000 # define TV_VEQ_LEN_SHIFT 16 /* Offset of the start of equalization in field 1, measured in one less than * the number of half lines. */ # define TV_VEQ_START_F1_MASK 0x0007f00 # define TV_VEQ_START_F1_SHIFT 8 /* * Offset of the start of equalization in field 2, measured in one less than * the number of half lines. */ # define TV_VEQ_START_F2_MASK 0x000007f # define TV_VEQ_START_F2_SHIFT 0 /* @} */ /* @defgroup TV_V_CTL_4 * @{ */ #define TV_V_CTL_4 0x68048 /* * Offset to start of vertical colorburst, measured in one less than the * number of lines from vertical start. */ # define TV_VBURST_START_F1_MASK 0x003f0000 # define TV_VBURST_START_F1_SHIFT 16 /* * Offset to the end of vertical colorburst, measured in one less than the * number of lines from the start of NBR. */ # define TV_VBURST_END_F1_MASK 0x000000ff # define TV_VBURST_END_F1_SHIFT 0 /* @} */ /* @defgroup TV_V_CTL_5 * @{ */ #define TV_V_CTL_5 0x6804c /* * Offset to start of vertical colorburst, measured in one less than the * number of lines from vertical start. */ # define TV_VBURST_START_F2_MASK 0x003f0000 # define TV_VBURST_START_F2_SHIFT 16 /* * Offset to the end of vertical colorburst, measured in one less than the * number of lines from the start of NBR. */ # define TV_VBURST_END_F2_MASK 0x000000ff # define TV_VBURST_END_F2_SHIFT 0 /* @} */ /* @defgroup TV_V_CTL_6 * @{ */ #define TV_V_CTL_6 0x68050 /* * Offset to start of vertical colorburst, measured in one less than the * number of lines from vertical start. */ # define TV_VBURST_START_F3_MASK 0x003f0000 # define TV_VBURST_START_F3_SHIFT 16 /* * Offset to the end of vertical colorburst, measured in one less than the * number of lines from the start of NBR. */ # define TV_VBURST_END_F3_MASK 0x000000ff # define TV_VBURST_END_F3_SHIFT 0 /* @} */ /* @defgroup TV_V_CTL_7 * @{ */ #define TV_V_CTL_7 0x68054 /* * Offset to start of vertical colorburst, measured in one less than the * number of lines from vertical start. */ # define TV_VBURST_START_F4_MASK 0x003f0000 # define TV_VBURST_START_F4_SHIFT 16 /* * Offset to the end of vertical colorburst, measured in one less than the * number of lines from the start of NBR. */ # define TV_VBURST_END_F4_MASK 0x000000ff # define TV_VBURST_END_F4_SHIFT 0 /* @} */ /* @defgroup TV_SC_CTL_1 * @{ */ #define TV_SC_CTL_1 0x68060 /* Turns on the first subcarrier phase generation DDA */ # define TV_SC_DDA1_EN (1 << 31) /* Turns on the first subcarrier phase generation DDA */ # define TV_SC_DDA2_EN (1 << 30) /* Turns on the first subcarrier phase generation DDA */ # define TV_SC_DDA3_EN (1 << 29) /* Sets the subcarrier DDA to reset frequency every other field */ # define TV_SC_RESET_EVERY_2 (0 << 24) /* Sets the subcarrier DDA to reset frequency every fourth field */ # define TV_SC_RESET_EVERY_4 (1 << 24) /* Sets the subcarrier DDA to reset frequency every eighth field */ # define TV_SC_RESET_EVERY_8 (2 << 24) /* Sets the subcarrier DDA to never reset the frequency */ # define TV_SC_RESET_NEVER (3 << 24) /* Sets the peak amplitude of the colorburst.*/ # define TV_BURST_LEVEL_MASK 0x00ff0000 # define TV_BURST_LEVEL_SHIFT 16 /* Sets the increment of the first subcarrier phase generation DDA */ # define TV_SCDDA1_INC_MASK 0x00000fff # define TV_SCDDA1_INC_SHIFT 0 /* @} */ /* @defgroup TV_SC_CTL_2 * @{ */ #define TV_SC_CTL_2 0x68064 /* Sets the rollover for the second subcarrier phase generation DDA */ # define TV_SCDDA2_SIZE_MASK 0x7fff0000 # define TV_SCDDA2_SIZE_SHIFT 16 /* Sets the increent of the second subcarrier phase generation DDA */ # define TV_SCDDA2_INC_MASK 0x00007fff # define TV_SCDDA2_INC_SHIFT 0 /* @} */ /* @defgroup TV_SC_CTL_3 * @{ */ #define TV_SC_CTL_3 0x68068 /* Sets the rollover for the third subcarrier phase generation DDA */ # define TV_SCDDA3_SIZE_MASK 0x7fff0000 # define TV_SCDDA3_SIZE_SHIFT 16 /* Sets the increent of the third subcarrier phase generation DDA */ # define TV_SCDDA3_INC_MASK 0x00007fff # define TV_SCDDA3_INC_SHIFT 0 /* @} */ /* @defgroup TV_WIN_POS * @{ */ #define TV_WIN_POS 0x68070 /* X coordinate of the display from the start of horizontal active */ # define TV_XPOS_MASK 0x1fff0000 # define TV_XPOS_SHIFT 16 /* Y coordinate of the display from the start of vertical active (NBR) */ # define TV_YPOS_MASK 0x00000fff # define TV_YPOS_SHIFT 0 /* @} */ /* @defgroup TV_WIN_SIZE * @{ */ #define TV_WIN_SIZE 0x68074 /* Horizontal size of the display window, measured in pixels*/ # define TV_XSIZE_MASK 0x1fff0000 # define TV_XSIZE_SHIFT 16 /* * Vertical size of the display window, measured in pixels. * * Must be even for interlaced modes. */ # define TV_YSIZE_MASK 0x00000fff # define TV_YSIZE_SHIFT 0 /* @} */ /* @defgroup TV_FILTER_CTL_1 * @{ */ #define TV_FILTER_CTL_1 0x68080 /* * Enables automatic scaling calculation. * * If set, the rest of the registers are ignored, and the calculated values can * be read back from the register. */ # define TV_AUTO_SCALE (1 << 31) /* * Disables the vertical filter. * * This is required on modes more than 1024 pixels wide */ # define TV_V_FILTER_BYPASS (1 << 29) /* Enables adaptive vertical filtering */ # define TV_VADAPT (1 << 28) # define TV_VADAPT_MODE_MASK (3 << 26) /* Selects the least adaptive vertical filtering mode */ # define TV_VADAPT_MODE_LEAST (0 << 26) /* Selects the moderately adaptive vertical filtering mode */ # define TV_VADAPT_MODE_MODERATE (1 << 26) /* Selects the most adaptive vertical filtering mode */ # define TV_VADAPT_MODE_MOST (3 << 26) /* * Sets the horizontal scaling factor. * * This should be the fractional part of the horizontal scaling factor divided * by the oversampling rate. TV_HSCALE should be less than 1, and set to: * * (src width - 1) / ((oversample * dest width) - 1) */ # define TV_HSCALE_FRAC_MASK 0x00003fff # define TV_HSCALE_FRAC_SHIFT 0 /* @} */ /* @defgroup TV_FILTER_CTL_2 * @{ */ #define TV_FILTER_CTL_2 0x68084 /* * Sets the integer part of the 3.15 fixed-point vertical scaling factor. * * TV_VSCALE should be (src height - 1) / ((interlace * dest height) - 1) */ # define TV_VSCALE_INT_MASK 0x00038000 # define TV_VSCALE_INT_SHIFT 15 /* * Sets the fractional part of the 3.15 fixed-point vertical scaling factor. * * \sa TV_VSCALE_INT_MASK */ # define TV_VSCALE_FRAC_MASK 0x00007fff # define TV_VSCALE_FRAC_SHIFT 0 /* @} */ /* @defgroup TV_FILTER_CTL_3 * @{ */ #define TV_FILTER_CTL_3 0x68088 /* * Sets the integer part of the 3.15 fixed-point vertical scaling factor. * * TV_VSCALE should be (src height - 1) / (1/4 * (dest height - 1)) * * For progressive modes, TV_VSCALE_IP_INT should be set to zeroes. */ # define TV_VSCALE_IP_INT_MASK 0x00038000 # define TV_VSCALE_IP_INT_SHIFT 15 /* * Sets the fractional part of the 3.15 fixed-point vertical scaling factor. * * For progressive modes, TV_VSCALE_IP_INT should be set to zeroes. * * \sa TV_VSCALE_IP_INT_MASK */ # define TV_VSCALE_IP_FRAC_MASK 0x00007fff # define TV_VSCALE_IP_FRAC_SHIFT 0 /* @} */ /* @defgroup TV_CC_CONTROL * @{ */ #define TV_CC_CONTROL 0x68090 # define TV_CC_ENABLE (1 << 31) /* * Specifies which field to send the CC data in. * * CC data is usually sent in field 0. */ # define TV_CC_FID_MASK (1 << 27) # define TV_CC_FID_SHIFT 27 /* Sets the horizontal position of the CC data. Usually 135. */ # define TV_CC_HOFF_MASK 0x03ff0000 # define TV_CC_HOFF_SHIFT 16 /* Sets the vertical position of the CC data. Usually 21 */ # define TV_CC_LINE_MASK 0x0000003f # define TV_CC_LINE_SHIFT 0 /* @} */ /* @defgroup TV_CC_DATA * @{ */ #define TV_CC_DATA 0x68094 # define TV_CC_RDY (1 << 31) /* Second word of CC data to be transmitted. */ # define TV_CC_DATA_2_MASK 0x007f0000 # define TV_CC_DATA_2_SHIFT 16 /* First word of CC data to be transmitted. */ # define TV_CC_DATA_1_MASK 0x0000007f # define TV_CC_DATA_1_SHIFT 0 /* @} */ /* @{ */ #define TV_H_LUMA_0 0x68100 #define TV_H_LUMA_59 0x681ec #define TV_H_CHROMA_0 0x68200 #define TV_H_CHROMA_59 0x682ec #define TV_V_LUMA_0 0x68300 #define TV_V_LUMA_42 0x683a8 #define TV_V_CHROMA_0 0x68400 #define TV_V_CHROMA_42 0x684a8 /* @} */ #define PIPEA_DSL 0x70000 #define PIPEACONF 0x70008 #define PIPEACONF_ENABLE (1<<31) #define PIPEACONF_DISABLE 0 #define PIPEACONF_DOUBLE_WIDE (1<<30) #define I965_PIPECONF_ACTIVE (1<<30) #define PIPEACONF_SINGLE_WIDE 0 #define PIPEACONF_PIPE_UNLOCKED 0 #define PIPEACONF_PIPE_LOCKED (1<<25) #define PIPEACONF_PALETTE 0 #define PIPEACONF_GAMMA (1<<24) #define PIPECONF_FORCE_BORDER (1<<25) #define PIPECONF_PROGRESSIVE (0 << 21) #define PIPECONF_INTERLACE_W_FIELD_INDICATION (6 << 21) #define PIPECONF_INTERLACE_FIELD_0_ONLY (7 << 21) /* ironlake: gamma */ #define PIPECONF_PALETTE_8BIT (0<<24) #define PIPECONF_PALETTE_10BIT (1<<24) #define PIPECONF_PALETTE_12BIT (2<<24) #define PIPECONF_FORCE_BORDER (1<<25) #define PIPECONF_PROGRESSIVE (0 << 21) #define PIPECONF_INTERLACE_W_FIELD_INDICATION (6 << 21) #define PIPECONF_INTERLACE_FIELD_0_ONLY (7 << 21) /* ironlake */ #define PIPECONF_MSA_TIMING_DELAY (0<<18) /* for eDP */ #define PIPECONF_NO_DYNAMIC_RATE_CHANGE (0 << 16) #define PIPECONF_NO_ROTATION (0<<14) #define PIPECONF_FULL_COLOR_RANGE (0<<13) #define PIPECONF_CE_COLOR_RANGE (1<<13) #define PIPECONF_COLOR_SPACE_RGB (0<<11) #define PIPECONF_COLOR_SPACE_YUV601 (1<<11) #define PIPECONF_COLOR_SPACE_YUV709 (2<<11) #define PIPECONF_CONNECT_DEFAULT (0<<9) #define PIPECONF_8BPP (0<<5) #define PIPECONF_10BPP (1<<5) #define PIPECONF_6BPP (2<<5) #define PIPECONF_12BPP (3<<5) #define PIPECONF_ENABLE_DITHER (1<<4) #define PIPECONF_DITHER_SPATIAL (0<<2) #define PIPECONF_DITHER_ST1 (1<<2) #define PIPECONF_DITHER_ST2 (2<<2) #define PIPECONF_DITHER_TEMPORAL (3<<2) #define PIPEAGCMAXRED 0x70010 #define PIPEAGCMAXGREEN 0x70014 #define PIPEAGCMAXBLUE 0x70018 #define PIPEASTAT 0x70024 # define FIFO_UNDERRUN (1 << 31) # define CRC_ERROR_ENABLE (1 << 29) # define CRC_DONE_ENABLE (1 << 28) # define GMBUS_EVENT_ENABLE (1 << 27) # define VSYNC_INT_ENABLE (1 << 25) # define DLINE_COMPARE_ENABLE (1 << 24) # define DPST_EVENT_ENABLE (1 << 23) # define LBLC_EVENT_ENABLE (1 << 22) # define OFIELD_INT_ENABLE (1 << 21) # define EFIELD_INT_ENABLE (1 << 20) # define SVBLANK_INT_ENABLE (1 << 18) # define VBLANK_INT_ENABLE (1 << 17) # define OREG_UPDATE_ENABLE (1 << 16) # define CRC_ERROR_INT_STATUS (1 << 13) # define CRC_DONE_INT_STATUS (1 << 12) # define GMBUS_INT_STATUS (1 << 11) # define VSYNC_INT_STATUS (1 << 9) # define DLINE_COMPARE_STATUS (1 << 8) # define DPST_EVENT_STATUS (1 << 7) # define LBLC_EVENT_STATUS (1 << 6) # define OFIELD_INT_STATUS (1 << 5) # define EFIELD_INT_STATUS (1 << 4) # define SVBLANK_INT_STATUS (1 << 2) # define VBLANK_INT_STATUS (1 << 1) # define OREG_UPDATE_STATUS (1 << 0) #define FW_BLC 0x020d8 #define FW_BLC2 0x020dc #define FW_BLC_SELF 0x020e0 /* 915+ only */ #define DSPARB 0x70030 #define DSPARB_CSTART_SHIFT 7 #define DSPARB_BSTART_SHIFT 0 #define DSPARB_BEND_SHIFT 9 /* on 855 */ #define DSPARB_AEND_SHIFT 0 #define DSPFW1 0x70034 #define DSPFW2 0x70038 #define DSPFW3 0x7003c /* * The two pipe frame counter registers are not synchronized, so * reading a stable value is somewhat tricky. The following code * should work: * * do { * high1 = ((INREG(PIPEAFRAMEHIGH) & PIPE_FRAME_HIGH_MASK) >> PIPE_FRAME_HIGH_SHIFT; * low1 = ((INREG(PIPEAFRAMEPIXEL) & PIPE_FRAME_LOW_MASK) >> PIPE_FRAME_LOW_SHIFT); * high2 = ((INREG(PIPEAFRAMEHIGH) & PIPE_FRAME_HIGH_MASK) >> PIPE_FRAME_HIGH_SHIFT); * } while (high1 != high2); * frame = (high1 << 8) | low1; */ #define PIPEAFRAMEHIGH 0x70040 #define PIPE_FRAME_HIGH_MASK 0x0000ffff #define PIPE_FRAME_HIGH_SHIFT 0 #define PIPEAFRAMEPIXEL 0x70044 #define PIPE_FRAME_LOW_MASK 0xff000000 #define PIPE_FRAME_LOW_SHIFT 24 /* * Pixel within the current frame is counted in the PIPEAFRAMEPIXEL register * and is 24 bits wide. */ #define PIPE_PIXEL_MASK 0x00ffffff #define PIPE_PIXEL_SHIFT 0 /* * g4x+ frame/flip counters */ #define PIPEAFRMCOUNT_G4X 0x70040 #define PIPEAFLIPCOUNT_G4X 0x70044 /* * Computing GMCH M and N values. * * GMCH M/N = dot clock * bytes per pixel / ls_clk * # of lanes * * ls_clk (we assume) is the DP link clock (1.62 or 2.7 GHz) * * The GMCH value is used internally */ #define PIPEA_GMCH_DATA_M 0x70050 /* Transfer unit size for display port - 1, default is 0x3f (for TU size 64) */ #define PIPE_GMCH_DATA_M_TU_SIZE_MASK (0x3f << 25) #define PIPE_GMCH_DATA_M_TU_SIZE_SHIFT 25 #define PIPE_GMCH_DATA_M_MASK (0xffffff) #define PIPEA_GMCH_DATA_N 0x70054 #define PIPE_GMCH_DATA_N_MASK (0xffffff) /* * Computing Link M and N values. * * Link M / N = pixel_clock / ls_clk * * (the DP spec calls pixel_clock the 'strm_clk') * * The Link value is transmitted in the Main Stream * Attributes and VB-ID. */ #define PIPEA_DP_LINK_M 0x70060 #define PIPEA_DP_LINK_M_MASK (0xffffff) #define PIPEA_DP_LINK_N 0x70064 #define PIPEA_DP_LINK_N_MASK (0xffffff) #define PIPEB_DSL 0x71000 #define PIPEBCONF 0x71008 #define PIPEBGCMAXRED 0x71010 #define PIPEBGCMAXGREEN 0x71014 #define PIPEBGCMAXBLUE 0x71018 #define PIPEBSTAT 0x71024 #define PIPEBFRAMEHIGH 0x71040 #define PIPEBFRAMEPIXEL 0x71044 #define PIPEBFRMCOUNT_G4X 0x71040 #define PIPEBFLIPCOUNT_G4X 0x71044 #define PIPEB_GMCH_DATA_M 0x71050 #define PIPEB_GMCH_DATA_N 0x71054 #define PIPEB_DP_LINK_M 0x71060 #define PIPEB_DP_LINK_N 0x71064 #define PIPEC_DSL 0x72000 #define PIPECCONF 0x72008 #define PIPECGCMAXRED 0x72010 #define PIPECGCMAXGREEN 0x72014 #define PIPECGCMAXBLUE 0x72018 #define PIPECSTAT 0x72024 #define PIPECFRMCOUNT_G4X 0x72040 #define PIPECFLIPCOUNT_G4X 0x72044 #define PIPEC_GMCH_DATA_M 0x72050 #define PIPEC_GMCH_DATA_N 0x72054 #define PIPEC_DP_LINK_M 0x72060 #define PIPEC_DP_LINK_N 0x72064 #define PIPEEDPCONF 0x7F008 #define DSPACNTR 0x70180 #define DSPBCNTR 0x71180 #define DSPCCNTR 0x72180 #define DISPLAY_PLANE_ENABLE (1<<31) #define DISPLAY_PLANE_DISABLE 0 #define DISPLAY_PLANE_TILED (1<<10) #define DISPPLANE_GAMMA_ENABLE (1<<30) #define DISPPLANE_GAMMA_DISABLE 0 #define DISPPLANE_PIXFORMAT_MASK (0xf<<26) #define DISPPLANE_8BPP (0x2<<26) #define DISPPLANE_15_16BPP (0x4<<26) #define DISPPLANE_16BPP (0x5<<26) #define DISPPLANE_32BPP_NO_ALPHA (0x6<<26) #define DISPPLANE_32BPP (0x7<<26) #define DISPPLANE_STEREO_ENABLE (1<<25) #define DISPPLANE_STEREO_DISABLE 0 #define DISPPLANE_SEL_PIPE_MASK (1<<24) #define DISPPLANE_SEL_PIPE_A 0 #define DISPPLANE_SEL_PIPE_B (1<<24) #define DISPPLANE_SRC_KEY_ENABLE (1<<22) #define DISPPLANE_SRC_KEY_DISABLE 0 #define DISPPLANE_LINE_DOUBLE (1<<20) #define DISPPLANE_NO_LINE_DOUBLE 0 #define DISPPLANE_STEREO_POLARITY_FIRST 0 #define DISPPLANE_STEREO_POLARITY_SECOND (1<<18) /* plane B only */ #define DISPPLANE_ALPHA_TRANS_ENABLE (1<<15) #define DISPPLANE_ALPHA_TRANS_DISABLE 0 #define DISPPLANE_SPRITE_ABOVE_DISPLAYA 0 #define DISPPLANE_SPRITE_ABOVE_OVERLAY (1) #define DSPABASE 0x70184 #define DSPASTRIDE 0x70188 #define DSPBBASE 0x71184 #define DSPBADDR DSPBBASE #define DSPBSTRIDE 0x71188 #define DSPCBASE 0x72184 #define DSPCADDR DSPCBASE #define DSPCSTRIDE 0x72188 #define DSPAKEYVAL 0x70194 #define DSPAKEYMASK 0x70198 #define DSPAPOS 0x7018C /* reserved */ #define DSPASIZE 0x70190 #define DSPBPOS 0x7118C #define DSPBSIZE 0x71190 #define DSPASURF 0x7019C #define DSPATILEOFF 0x701A4 #define DSPASURFLIVE 0x701AC #define DSPBSURF 0x7119C #define DSPBTILEOFF 0x711A4 #define DSPBSURFLIVE 0x711AC #define DSPCSURF 0x7219C #define DSPCTILEOFF 0x721A4 #define DSPCSURFLIVE 0x721AC #define VGACNTRL 0x71400 # define VGA_DISP_DISABLE (1 << 31) # define VGA_2X_MODE (1 << 30) # define VGA_PIPE_B_SELECT (1 << 29) /* Various masks for reserved bits, etc. */ #define I830_FWATER1_MASK (~((1<<11)|(1<<10)|(1<<9)| \ (1<<8)|(1<<26)|(1<<25)|(1<<24)|(1<<5)|(1<<4)|(1<<3)| \ (1<<2)|(1<<1)|1|(1<<20)|(1<<19)|(1<<18)|(1<<17)|(1<<16))) #define I830_FWATER2_MASK ~(0) #define DV0A_RESERVED ((1<<26)|(1<<25)|(1<<24)|(1<<23)|(1<<22)|(1<<21)|(1<<20)|(1<<19)|(1<<18)|(1<<16)|(1<<5)|(1<<1)|1) #define DV0B_RESERVED ((1<<27)|(1<<26)|(1<<25)|(1<<24)|(1<<23)|(1<<22)|(1<<21)|(1<<20)|(1<<19)|(1<<18)|(1<<16)|(1<<5)|(1<<1)|1) #define VGA0_N_DIVISOR_MASK ((1<<21)|(1<<20)|(1<<19)|(1<<18)|(1<<17)|(1<<16)) #define VGA0_M1_DIVISOR_MASK ((1<<13)|(1<<12)|(1<<11)|(1<<10)|(1<<9)|(1<<8)) #define VGA0_M2_DIVISOR_MASK ((1<<5)|(1<<4)|(1<<3)|(1<<2)|(1<<1)|1) #define VGA0_M1M2N_RESERVED ~(VGA0_N_DIVISOR_MASK|VGA0_M1_DIVISOR_MASK|VGA0_M2_DIVISOR_MASK) #define VGA0_POSTDIV_MASK ((1<<7)|(1<<5)|(1<<4)|(1<<3)|(1<<2)|(1<<1)|1) #define VGA1_POSTDIV_MASK ((1<<15)|(1<<13)|(1<<12)|(1<<11)|(1<<10)|(1<<9)|(1<<8)) #define VGA_POSTDIV_RESERVED ~(VGA0_POSTDIV_MASK|VGA1_POSTDIV_MASK|(1<<7)|(1<<15)) #define DPLLA_POSTDIV_MASK ((1<<23)|(1<<21)|(1<<20)|(1<<19)|(1<<18)|(1<<17)|(1<<16)) #define DPLLA_RESERVED ((1<<27)|(1<<26)|(1<<25)|(1<<24)|(1<<22)|(1<<15)|(1<<12)|(1<<11)|(1<<10)|(1<<9)|(1<<8)|(1<<7)|(1<<6)|(1<<5)|(1<<4)|(1<<3)|(1<<2)|(1<<1)|1) #define ADPA_RESERVED ((1<<2)|(1<<1)|1|(1<<9)|(1<<8)|(1<<7)|(1<<6)|(1<<5)|(1<<30)|(1<<29)|(1<<28)|(1<<27)|(1<<26)|(1<<25)|(1<<24)|(1<<23)|(1<<22)|(1<<21)|(1<<20)|(1<<19)|(1<<18)|(1<<17)|(1<<16)) #define SUPER_WORD 32 #define BURST_A_MASK ((1<<11)|(1<<10)|(1<<9)|(1<<8)) #define BURST_B_MASK ((1<<26)|(1<<25)|(1<<24)) #define WATER_A_MASK ((1<<5)|(1<<4)|(1<<3)|(1<<2)|(1<<1)|1) #define WATER_B_MASK ((1<<20)|(1<<19)|(1<<18)|(1<<17)|(1<<16)) #define WATER_RESERVED ((1<<31)|(1<<30)|(1<<29)|(1<<28)|(1<<27)|(1<<23)|(1<<22)|(1<<21)|(1<<15)|(1<<14)|(1<<13)|(1<<12)|(1<<7)|(1<<6)) #define PIPEACONF_RESERVED ((1<<29)|(1<<28)|(1<<27)|(1<<23)|(1<<22)|(1<<21)|(1<<20)|(1<<19)|(1<<18)|(1<<17)|(1<<16)|0xffff) #define PIPEBCONF_RESERVED ((1<<30)|(1<<29)|(1<<28)|(1<<27)|(1<<26)|(1<<25)|(1<<23)|(1<<22)|(1<<21)|(1<<20)|(1<<19)|(1<<18)|(1<<17)|(1<<16)|0xffff) #define DSPACNTR_RESERVED ((1<<23)|(1<<19)|(1<<17)|(1<<16)|0xffff) #define DSPBCNTR_RESERVED ((1<<23)|(1<<19)|(1<<17)|(1<<16)|0x7ffe) #define I830_GMCH_CTRL 0x52 #define I830_GMCH_ENABLED 0x4 #define I830_GMCH_MEM_MASK 0x1 #define I830_GMCH_MEM_64M 0x1 #define I830_GMCH_MEM_128M 0 #define I830_GMCH_GMS_MASK 0x70 #define I830_GMCH_GMS_DISABLED 0x00 #define I830_GMCH_GMS_LOCAL 0x10 #define I830_GMCH_GMS_STOLEN_512 0x20 #define I830_GMCH_GMS_STOLEN_1024 0x30 #define I830_GMCH_GMS_STOLEN_8192 0x40 #define I830_RDRAM_CHANNEL_TYPE 0x03010 #define I830_RDRAM_ND(x) (((x) & 0x20) >> 5) #define I830_RDRAM_DDT(x) (((x) & 0x18) >> 3) #define I855_GMCH_GMS_MASK (0xF << 4) #define I855_GMCH_GMS_DISABLED 0x00 #define I855_GMCH_GMS_STOLEN_1M (0x1 << 4) #define I855_GMCH_GMS_STOLEN_4M (0x2 << 4) #define I855_GMCH_GMS_STOLEN_8M (0x3 << 4) #define I855_GMCH_GMS_STOLEN_16M (0x4 << 4) #define I855_GMCH_GMS_STOLEN_32M (0x5 << 4) #define I915G_GMCH_GMS_STOLEN_48M (0x6 << 4) #define I915G_GMCH_GMS_STOLEN_64M (0x7 << 4) #define G33_GMCH_GMS_STOLEN_128M (0x8 << 4) #define G33_GMCH_GMS_STOLEN_256M (0x9 << 4) #define INTEL_GMCH_GMS_STOLEN_96M (0xa << 4) #define INTEL_GMCH_GMS_STOLEN_160M (0xb << 4) #define INTEL_GMCH_GMS_STOLEN_224M (0xc << 4) #define INTEL_GMCH_GMS_STOLEN_352M (0xd << 4) #define I85X_CAPID 0x44 #define I85X_VARIANT_MASK 0x7 #define I85X_VARIANT_SHIFT 5 #define I855_GME 0x0 #define I855_GM 0x4 #define I852_GME 0x2 #define I852_GM 0x5 #define I915_GCFGC 0xf0 #define I915_LOW_FREQUENCY_ENABLE (1 << 7) #define I915_DISPLAY_CLOCK_190_200_MHZ (0 << 4) #define I915_DISPLAY_CLOCK_333_MHZ (4 << 4) #define I915_DISPLAY_CLOCK_MASK (7 << 4) #define I855_HPLLCC 0xc0 #define I855_CLOCK_CONTROL_MASK (3 << 0) #define I855_CLOCK_133_200 (0 << 0) #define I855_CLOCK_100_200 (1 << 0) #define I855_CLOCK_100_133 (2 << 0) #define I855_CLOCK_166_250 (3 << 0) /* BLT commands */ #define COLOR_BLT_CMD ((2<<29)|(0x40<<22)|(0x3)) #define COLOR_BLT_WRITE_ALPHA (1<<21) #define COLOR_BLT_WRITE_RGB (1<<20) #define XY_COLOR_BLT_CMD_NOLEN ((2<<29)|(0x50<<22)) #define XY_COLOR_BLT_WRITE_ALPHA (1<<21) #define XY_COLOR_BLT_WRITE_RGB (1<<20) #define XY_COLOR_BLT_TILED (1<<11) #define XY_SETUP_CLIP_BLT_CMD ((2<<29)|(3<<22)|1) #define XY_SRC_COPY_BLT_CMD ((2<<29)|(0x53<<22)) #define XY_SRC_COPY_BLT_WRITE_ALPHA (1<<21) #define XY_SRC_COPY_BLT_WRITE_RGB (1<<20) #define XY_SRC_COPY_BLT_SRC_TILED (1<<15) #define XY_SRC_COPY_BLT_DST_TILED (1<<11) #define SRC_COPY_BLT_CMD ((2<<29)|(0x43<<22)|0x4) #define SRC_COPY_BLT_WRITE_ALPHA (1<<21) #define SRC_COPY_BLT_WRITE_RGB (1<<20) #define XY_PAT_BLT_IMMEDIATE ((2<<29)|(0x72<<22)) #define XY_MONO_PAT_BLT_CMD ((0x2<<29)|(0x52<<22)|0x7) #define XY_MONO_PAT_VERT_SEED ((1<<10)|(1<<9)|(1<<8)) #define XY_MONO_PAT_HORT_SEED ((1<<14)|(1<<13)|(1<<12)) #define XY_MONO_PAT_BLT_WRITE_ALPHA (1<<21) #define XY_MONO_PAT_BLT_WRITE_RGB (1<<20) #define XY_MONO_SRC_BLT_CMD ((0x2<<29)|(0x54<<22)|(0x6)) #define XY_MONO_SRC_BLT_WRITE_ALPHA (1<<21) #define XY_MONO_SRC_BLT_WRITE_RGB (1<<20) #define XY_FAST_COPY_BLT ((2<<29)|(0x42<<22)|0x8) /* dword 0 */ #define XY_FAST_COPY_SRC_TILING_LINEAR (0 << 20) #define XY_FAST_COPY_SRC_TILING_X (1 << 20) #define XY_FAST_COPY_SRC_TILING_Yb_Yf (2 << 20) #define XY_FAST_COPY_SRC_TILING_Ys (3 << 20) #define XY_FAST_COPY_SRC_HORIZONTAL_ALIGNMENT(n) (n << 17) #define XY_FAST_COPY_SRC_VERTICAL_ALIGNMENT(n) (n << 15) #define XY_FAST_COPY_DST_TILING_X (1 << 13) #define XY_FAST_COPY_DST_TILING_Yb_Yf (2 << 13) #define XY_FAST_COPY_DST_TILING_Ys (3 << 13) #define XY_FAST_COPY_DST_HORIZONTAL_ALIGNMENT(n) (n << 10) #define XY_FAST_COPY_DST_VERTICAL_ALIGNMENT(n) (n << 8) /* dword 1 */ #define XY_FAST_COPY_SRC_TILING_Yf (1 << 31) #define XY_FAST_COPY_DST_TILING_Yf (1 << 30) #define XY_FAST_COPY_COLOR_DEPTH_32 (3 << 24) #define MI_STORE_DWORD_IMM ((0x20<<23)|2) #define MI_MEM_VIRTUAL (1 << 22) /* 965+ only */ #define MI_SET_CONTEXT (0x18<<23) #define CTXT_NO_RESTORE (1) #define CTXT_PALETTE_SAVE_DISABLE (1<<3) #define CTXT_PALETTE_RESTORE_DISABLE (1<<2) /* Dword 0 */ #define MI_VERTEX_BUFFER (0x17<<23) #define MI_VERTEX_BUFFER_IDX(x) (x<<20) #define MI_VERTEX_BUFFER_PITCH(x) (x<<13) #define MI_VERTEX_BUFFER_WIDTH(x) (x<<6) /* Dword 1 */ #define MI_VERTEX_BUFFER_DISABLE (1) /* Overlay Flip */ #define MI_OVERLAY_FLIP (0x11<<23) #define MI_OVERLAY_FLIP_CONTINUE (0<<21) #define MI_OVERLAY_FLIP_ON (1<<21) #define MI_OVERLAY_FLIP_OFF (2<<21) /* Wait for Events */ #define MI_WAIT_FOR_EVENT (0x03<<23) #define MI_WAIT_FOR_PIPEB_SVBLANK (1<<18) #define MI_WAIT_FOR_PIPEA_SVBLANK (1<<17) #define MI_WAIT_FOR_OVERLAY_FLIP (1<<16) #define MI_WAIT_FOR_PIPEB_VBLANK (1<<7) #define MI_WAIT_FOR_PIPEA_VBLANK (1<<3) #define MI_WAIT_FOR_PIPEB_SCAN_LINE_WINDOW (1<<5) #define MI_WAIT_FOR_PIPEA_SCAN_LINE_WINDOW (1<<1) #define MI_LOAD_SCAN_LINES_INCL (0x12<<23) #define MI_LOAD_REGISTER_IMM ((0x22 << 23) | 1) /* Flush */ #define MI_FLUSH (0x04<<23) #define MI_WRITE_DIRTY_STATE (1<<4) #define MI_END_SCENE (1<<3) #define MI_GLOBAL_SNAPSHOT_COUNT_RESET (1<<3) #define MI_INHIBIT_RENDER_CACHE_FLUSH (1<<2) #define MI_STATE_INSTRUCTION_CACHE_FLUSH (1<<1) #define MI_INVALIDATE_MAP_CACHE (1<<0) /* broadwater flush bits */ #define BRW_MI_GLOBAL_SNAPSHOT_RESET (1 << 3) /* Noop */ #define MI_NOOP 0x00 #define MI_NOOP_WRITE_ID (1<<22) #define MI_NOOP_ID_MASK (1<<22 - 1) #define STATE3D_COLOR_FACTOR ((0x3<<29)|(0x1d<<24)|(0x01<<16)) /* Batch */ #define MI_BATCH_BUFFER ((0x30 << 23) | 1) #define MI_BATCH_BUFFER_START (0x31 << 23) #define MI_BATCH_BUFFER_END (0xA << 23) #define MI_BATCH_NON_SECURE (1) #define MI_BATCH_NON_SECURE_I965 (1 << 8) #define MI_BATCH_NON_SECURE_HSW (1<<13) /* Additional bit for RCS */ #define MAX_DISPLAY_PIPES 2 typedef enum { CrtIndex = 0, TvIndex, DfpIndex, LfpIndex, Crt2Index, Tv2Index, Dfp2Index, Lfp2Index, NumDisplayTypes } DisplayType; /* What's connected to the pipes (as reported by the BIOS) */ #define PIPE_ACTIVE_MASK 0xff #define PIPE_CRT_ACTIVE (1 << CrtIndex) #define PIPE_TV_ACTIVE (1 << TvIndex) #define PIPE_DFP_ACTIVE (1 << DfpIndex) #define PIPE_LCD_ACTIVE (1 << LfpIndex) #define PIPE_CRT2_ACTIVE (1 << Crt2Index) #define PIPE_TV2_ACTIVE (1 << Tv2Index) #define PIPE_DFP2_ACTIVE (1 << Dfp2Index) #define PIPE_LCD2_ACTIVE (1 << Lfp2Index) #define PIPE_SIZED_DISP_MASK (PIPE_DFP_ACTIVE | \ PIPE_LCD_ACTIVE | \ PIPE_DFP2_ACTIVE) #define PIPE_A_SHIFT 0 #define PIPE_B_SHIFT 8 #define PIPE_SHIFT(n) ((n) == 0 ? \ PIPE_A_SHIFT : PIPE_B_SHIFT) /* * Some BIOS scratch area registers. The 845 (and 830?) store the amount * of video memory available to the BIOS in SWF1. */ #define SWF0 0x71410 #define SWF1 0x71414 #define SWF2 0x71418 #define SWF3 0x7141c #define SWF4 0x71420 #define SWF5 0x71424 #define SWF6 0x71428 /* * 855 scratch registers. */ #define SWF00 0x70410 #define SWF01 0x70414 #define SWF02 0x70418 #define SWF03 0x7041c #define SWF04 0x70420 #define SWF05 0x70424 #define SWF06 0x70428 #define SWF10 SWF0 #define SWF11 SWF1 #define SWF12 SWF2 #define SWF13 SWF3 #define SWF14 SWF4 #define SWF15 SWF5 #define SWF16 SWF6 #define SWF30 0x72414 #define SWF31 0x72418 #define SWF32 0x7241c /* * Overlay registers. These are overlay registers accessed via MMIO. * Those loaded via the overlay register page are defined in i830_video.c. */ #define OVADD 0x30000 #define DOVSTA 0x30008 #define OC_BUF (0x3<<20) #define OGAMC5 0x30010 #define OGAMC4 0x30014 #define OGAMC3 0x30018 #define OGAMC2 0x3001c #define OGAMC1 0x30020 #define OGAMC0 0x30024 /* * Palette registers */ #define PALETTE_A 0x0a000 #define PALETTE_B 0x0a800 /* Framebuffer compression */ #define FBC_CFB_BASE 0x03200 /* 4k page aligned */ #define FBC_LL_BASE 0x03204 /* 4k page aligned */ #define FBC_CONTROL 0x03208 #define FBC_CTL_EN (1<<31) #define FBC_CTL_PERIODIC (1<<30) #define FBC_CTL_INTERVAL_SHIFT (16) #define FBC_CTL_UNCOMPRESSIBLE (1<<14) #define FBC_CTL_STRIDE_SHIFT (5) #define FBC_CTL_FENCENO (1<<0) #define FBC_COMMAND 0x0320c #define FBC_CMD_COMPRESS (1<<0) #define FBC_STATUS 0x03210 #define FBC_STAT_COMPRESSING (1<<31) #define FBC_STAT_COMPRESSED (1<<30) #define FBC_STAT_MODIFIED (1<<29) #define FBC_STAT_CURRENT_LINE (1<<0) #define FBC_CONTROL2 0x03214 #define FBC_CTL_FENCE_DBL (0<<4) #define FBC_CTL_IDLE_IMM (0<<2) #define FBC_CTL_IDLE_FULL (1<<2) #define FBC_CTL_IDLE_LINE (2<<2) #define FBC_CTL_IDLE_DEBUG (3<<2) #define FBC_CTL_CPU_FENCE (1<<1) #define FBC_CTL_PLANEA (0<<0) #define FBC_CTL_PLANEB (1<<0) #define FBC_FENCE_OFF 0x0321b #define FBC_MOD_NUM 0x03220 #define FBC_TAG_DEBUG 0x03300 #define FBC_LL_SIZE (1536) #define FBC_LL_PAD (32) /* Framebuffer compression version 2 */ #define DPFC_CB_BASE 0x3200 #define DPFC_CONTROL 0x3208 #define DPFC_CTL_EN (1<<31) #define DPFC_CTL_PLANEA (0<<30) #define DPFC_CTL_PLANEB (1<<30) #define DPFC_CTL_FENCE_EN (1<<29) #define DPFC_CTL_LIMIT_1X (0<<6) #define DPFC_CTL_LIMIT_2X (1<<6) #define DPFC_CTL_LIMIT_4X (2<<6) #define DPFC_RECOMP_CTL 0x320c #define DPFC_RECOMP_STALL_EN (1<<27) #define DPFC_RECOMP_STALL_WM_SHIFT (16) #define DPFC_RECOMP_STALL_WM_MASK (0x07ff0000) #define DPFC_RECOMP_TIMER_COUNT_SHIFT (0) #define DPFC_RECOMP_TIMER_COUNT_MASK (0x0000003f) #define DPFC_STATUS 0x3210 #define DPFC_INVAL_SEG_SHIFT (16) #define DPFC_INVAL_SEG_MASK (0x07ff0000) #define DPFC_COMP_SEG_SHIFT (0) #define DPFC_COMP_SEG_MASK (0x000003ff) #define DPFC_STATUS2 0x3214 #define DPFC_FENCE_YOFF 0x3218 #define PEG_BAND_GAP_DATA 0x14d68 #define MCHBAR_RENDER_STANDBY 0x111B8 #define RENDER_STANDBY_ENABLE (1 << 30) /* Ironlake */ /* warmup time in us */ #define WARMUP_PCH_REF_CLK_SSC_MOD 1 #define WARMUP_PCH_FDI_RECEIVER_PLL 25 #define WARMUP_PCH_DPLL 50 #define WARMUP_CPU_DP_PLL 20 #define WARMUP_CPU_FDI_TRANSMITTER_PLL 10 #define WARMUP_DMI_LATENCY 20 #define FDI_TRAIN_PATTERN_1_TIME 0.5 #define FDI_TRAIN_PATTERN_2_TIME 1.5 #define FDI_ONE_IDLE_PATTERN_TIME 31 #define CPU_VGACNTRL 0x41000 #define DIGITAL_PORT_HOTPLUG_CNTRL 0x44030 #define DIGITAL_PORTA_HOTPLUG_ENABLE (1 << 4) #define DIGITAL_PORTA_SHORT_PULSE_2MS (0 << 2) #define DIGITAL_PORTA_SHORT_PULSE_4_5MS (1 << 2) #define DIGITAL_PORTA_SHORT_PULSE_6MS (2 << 2) #define DIGITAL_PORTA_SHORT_PULSE_100MS (3 << 2) #define DIGITAL_PORTA_NO_DETECT (0 << 0) #define DIGITAL_PORTA_LONG_PULSE_DETECT_MASK (1 << 1) #define DIGITAL_PORTA_SHORT_PULSE_DETECT_MASK (1 << 0) /* refresh rate hardware control */ #define RR_HW_CTL 0x45300 #define RR_HW_LOW_POWER_FRAMES_MASK 0xff #define RR_HW_HIGH_POWER_FRAMES_MASK 0xff00 #define FDI_PLL_BIOS_0 0x46000 #define FDI_PLL_BIOS_1 0x46004 #define FDI_PLL_BIOS_2 0x46008 #define DISPLAY_PORT_PLL_BIOS_0 0x4600c #define DISPLAY_PORT_PLL_BIOS_1 0x46010 #define DISPLAY_PORT_PLL_BIOS_2 0x46014 #define FDI_PLL_FREQ_CTL 0x46030 #define FDI_PLL_FREQ_CHANGE_REQUEST (1<<24) #define FDI_PLL_FREQ_LOCK_LIMIT_MASK 0xfff00 #define FDI_PLL_FREQ_DISABLE_COUNT_LIMIT_MASK 0xff #define PIPEA_DATA_M1 0x60030 #define TU_SIZE(x) (((x)-1) << 25) /* default size 64 */ #define TU_SIZE_MASK 0x7e000000 #define PIPEA_DATA_M1_OFFSET 0 #define PIPEA_DATA_N1 0x60034 #define PIPEA_DATA_N1_OFFSET 0 #define PIPEA_DATA_M2 0x60038 #define PIPEA_DATA_M2_OFFSET 0 #define PIPEA_DATA_N2 0x6003c #define PIPEA_DATA_N2_OFFSET 0 #define PIPEA_LINK_M1 0x60040 #define PIPEA_LINK_M1_OFFSET 0 #define PIPEA_LINK_N1 0x60044 #define PIPEA_LINK_N1_OFFSET 0 #define PIPEA_LINK_M2 0x60048 #define PIPEA_LINK_M2_OFFSET 0 #define PIPEA_LINK_N2 0x6004c #define PIPEA_LINK_N2_OFFSET 0 /* PIPEB timing regs are same start from 0x61000 */ #define PIPEB_DATA_M1 0x61030 #define PIPEB_DATA_N1 0x61034 #define PIPEB_DATA_M2 0x61038 #define PIPEB_DATA_N2 0x6103c #define PIPEB_LINK_M1 0x61040 #define PIPEB_LINK_N1 0x61044 #define PIPEB_LINK_M2 0x61048 #define PIPEB_LINK_N2 0x6104c /* PIPEC timing regs */ #define PIPEC_DATA_M1 0x62030 #define PIPEC_DATA_N1 0x62034 #define PIPEC_DATA_M2 0x62038 #define PIPEC_DATA_N2 0x6203c #define PIPEC_LINK_M1 0x62040 #define PIPEC_LINK_N1 0x62044 #define PIPEC_LINK_M2 0x62048 #define PIPEC_LINK_N2 0x6204c #define PIPEEDP_DATA_M1 0x6F030 #define PIPEEDP_DATA_N1 0x6F034 #define PIPEEDP_LINK_M1 0x6F040 #define PIPEEDP_LINK_N1 0x6F044 /* PIPECONF for pipe A/B addr is same */ /* cusor A is only connected to pipe A, cursor B is connected to pipe B. Otherwise no change. */ /* Plane A/B, DSPACNTR/DSPBCNTR addr not changed */ /* CPU panel fitter */ #define PFA_CTL_1 0x68080 #define PFB_CTL_1 0x68880 #define PFC_CTL_1 0x69080 #define PF_ENABLE (1<<31) #define PFA_CTL_2 0x68084 #define PFB_CTL_2 0x68884 #define PFC_CTL_2 0x69084 #define PFA_CTL_3 0x68088 #define PFB_CTL_3 0x68888 #define PFC_CTL_3 0x69088 #define PFA_CTL_4 0x68090 #define PFB_CTL_4 0x68890 #define PFC_CTL_4 0x69090 #define PFA_WIN_POS 0x68070 #define PFB_WIN_POS 0x68870 #define PFC_WIN_POS 0x69070 #define PFA_WIN_SIZE 0x68074 #define PFB_WIN_SIZE 0x68874 #define PFC_WIN_SIZE 0x69074 /* legacy palette */ #define LGC_PALETTE_A 0x4a000 #define LGC_PALETTE_B 0x4a800 /* interrupts */ #define DE_MASTER_IRQ_CONTROL (1 << 31) #define DE_SPRITEB_FLIP_DONE (1 << 29) #define DE_SPRITEA_FLIP_DONE (1 << 28) #define DE_PLANEB_FLIP_DONE (1 << 27) #define DE_PLANEA_FLIP_DONE (1 << 26) #define DE_PCU_EVENT (1 << 25) #define DE_GTT_FAULT (1 << 24) #define DE_POISON (1 << 23) #define DE_PERFORM_COUNTER (1 << 22) #define DE_PCH_EVENT (1 << 21) #define DE_AUX_CHANNEL_A (1 << 20) #define DE_DP_A_HOTPLUG (1 << 19) #define DE_GSE (1 << 18) #define DE_PIPEB_VBLANK (1 << 15) #define DE_PIPEB_EVEN_FIELD (1 << 14) #define DE_PIPEB_ODD_FIELD (1 << 13) #define DE_PIPEB_LINE_COMPARE (1 << 12) #define DE_PIPEB_VSYNC (1 << 11) #define DE_PIPEB_FIFO_UNDERRUN (1 << 8) #define DE_PIPEA_VBLANK (1 << 7) #define DE_PIPEA_EVEN_FIELD (1 << 6) #define DE_PIPEA_ODD_FIELD (1 << 5) #define DE_PIPEA_LINE_COMPARE (1 << 4) #define DE_PIPEA_VSYNC (1 << 3) #define DE_PIPEA_FIFO_UNDERRUN (1 << 0) #define DEISR 0x44000 #define DEIMR 0x44004 #define DEIIR 0x44008 #define DEIER 0x4400c #define GEN8_DE_PIPE_ISR(pipe) (0x44400 + 0x10 * (pipe)) #define GEN8_DE_PIPE_IMR(pipe) (0x44404 + 0x10 * (pipe)) #define GEN8_DE_PIPE_IIR(pipe) (0x44408 + 0x10 * (pipe)) #define GEN8_DE_PIPE_IER(pipe) (0x4440c + 0x10 * (pipe)) /* GT interrupt */ #define GT_SYNC_STATUS (1 << 2) #define GT_USER_INTERRUPT (1 << 0) #define GTISR 0x44010 #define GTIMR 0x44014 #define GTIIR 0x44018 #define GTIER 0x4401c /* PCH */ /* south display engine interrupt */ #define SDE_CRT_HOTPLUG (1 << 11) #define SDE_PORTD_HOTPLUG (1 << 10) #define SDE_PORTC_HOTPLUG (1 << 9) #define SDE_PORTB_HOTPLUG (1 << 8) #define SDE_SDVOB_HOTPLUG (1 << 6) #define SDEISR 0xc4000 #define SDEIMR 0xc4004 #define SDEIIR 0xc4008 #define SDEIER 0xc400c /* digital port hotplug */ #define PCH_PORT_HOTPLUG 0xc4030 #define PORTD_HOTPLUG_ENABLE (1 << 20) #define PORTD_PULSE_DURATION_2ms (0) #define PORTD_PULSE_DURATION_4_5ms (1 << 18) #define PORTD_PULSE_DURATION_6ms (2 << 18) #define PORTD_PULSE_DURATION_100ms (3 << 18) #define PORTD_HOTPLUG_NO_DETECT (0) #define PORTD_HOTPLUG_SHORT_DETECT (1 << 16) #define PORTD_HOTPLUG_LONG_DETECT (1 << 17) #define PORTC_HOTPLUG_ENABLE (1 << 12) #define PORTC_PULSE_DURATION_2ms (0) #define PORTC_PULSE_DURATION_4_5ms (1 << 10) #define PORTC_PULSE_DURATION_6ms (2 << 10) #define PORTC_PULSE_DURATION_100ms (3 << 10) #define PORTC_HOTPLUG_NO_DETECT (0) #define PORTC_HOTPLUG_SHORT_DETECT (1 << 8) #define PORTC_HOTPLUG_LONG_DETECT (1 << 9) #define PORTB_HOTPLUG_ENABLE (1 << 4) #define PORTB_PULSE_DURATION_2ms (0) #define PORTB_PULSE_DURATION_4_5ms (1 << 2) #define PORTB_PULSE_DURATION_6ms (2 << 2) #define PORTB_PULSE_DURATION_100ms (3 << 2) #define PORTB_HOTPLUG_NO_DETECT (0) #define PORTB_HOTPLUG_SHORT_DETECT (1 << 0) #define PORTB_HOTPLUG_LONG_DETECT (1 << 1) #define PCH_GPIOA 0xc5010 #define PCH_GPIOB 0xc5014 #define PCH_GPIOC 0xc5018 #define PCH_GPIOD 0xc501c #define PCH_GPIOE 0xc5020 #define PCH_GPIOF 0xc5024 #define PCH_GMBUS0 0xc5100 #define PCH_GMBUS1 0xc5104 #define PCH_GMBUS2 0xc5108 #define PCH_GMBUS3 0xc510c #define PCH_GMBUS4 0xc5110 #define PCH_GMBUS5 0xc5120 #define PCH_DPLL_A 0xc6014 #define PCH_DPLL_B 0xc6018 #define PCH_FPA0 0xc6040 #define PCH_FPA1 0xc6044 #define PCH_FPB0 0xc6048 #define PCH_FPB1 0xc604c #define PCH_DPLL_TEST 0xc606c #define PCH_DREF_CONTROL 0xC6200 #define DREF_CONTROL_MASK 0x7fc3 #define DREF_CPU_SOURCE_OUTPUT_DISABLE (0<<13) #define DREF_CPU_SOURCE_OUTPUT_DOWNSPREAD (2<<13) #define DREF_CPU_SOURCE_OUTPUT_NONSPREAD (3<<13) #define DREF_SSC_SOURCE_DISABLE (0<<11) #define DREF_SSC_SOURCE_ENABLE (2<<11) #define DREF_NONSPREAD_SOURCE_DISABLE (0<<9) #define DREF_NONSPREAD_SOURCE_ENABLE (2<<9) #define DREF_SUPERSPREAD_SOURCE_DISABLE (0<<7) #define DREF_SUPERSPREAD_SOURCE_ENABLE (2<<7) #define DREF_SSC4_DOWNSPREAD (0<<6) #define DREF_SSC4_CENTERSPREAD (1<<6) #define DREF_SSC1_DISABLE (0<<1) #define DREF_SSC1_ENABLE (1<<1) #define DREF_SSC4_DISABLE (0) #define DREF_SSC4_ENABLE (1) #define PCH_RAWCLK_FREQ 0xc6204 #define FDL_TP1_TIMER_SHIFT 12 #define FDL_TP1_TIMER_MASK (3<<12) #define FDL_TP2_TIMER_SHIFT 10 #define FDL_TP2_TIMER_MASK (3<<10) #define RAWCLK_FREQ_MASK 0x3ff #define PCH_DPLL_TMR_CFG 0xc6208 #define PCH_SSC4_PARMS 0xc6210 #define PCH_SSC4_AUX_PARMS 0xc6214 /* CPT */ #define PCH_DPLL_ANALOG_CTL 0xc6300 #define PCH_DPLL_SEL 0xc7000 #define TRANSA_DPLL_ENABLE (1<<3) #define TRANSA_DPLLA_SEL (0) #define TRANSA_DPLLB_SEL (1<<0) #define TRANSB_DPLL_ENABLE (1<<7) #define TRANSB_DPLLA_SEL (0<<4) #define TRANSB_DPLLB_SEL (1<<4) #define TRANSC_DPLL_ENABLE (1<<11) #define TRANSC_DPLLA_SEL (0<<8) #define TRANSC_DPLLB_SEL (1<<8) /* transcoder */ #define TRANS_HTOTAL_A 0xe0000 #define TRANS_HTOTAL_SHIFT 16 #define TRANS_HACTIVE_SHIFT 0 #define TRANS_HBLANK_A 0xe0004 #define TRANS_HBLANK_END_SHIFT 16 #define TRANS_HBLANK_START_SHIFT 0 #define TRANS_HSYNC_A 0xe0008 #define TRANS_HSYNC_END_SHIFT 16 #define TRANS_HSYNC_START_SHIFT 0 #define TRANS_VTOTAL_A 0xe000c #define TRANS_VTOTAL_SHIFT 16 #define TRANS_VACTIVE_SHIFT 0 #define TRANS_VBLANK_A 0xe0010 #define TRANS_VBLANK_END_SHIFT 16 #define TRANS_VBLANK_START_SHIFT 0 #define TRANS_VSYNC_A 0xe0014 #define TRANS_VSYNC_END_SHIFT 16 #define TRANS_VSYNC_START_SHIFT 0 #define TRANS_VSYNCSHIFT_A 0xe0028 #define TRANSA_DATA_M1 0xe0030 #define TRANSA_DATA_N1 0xe0034 #define TRANSA_DATA_M2 0xe0038 #define TRANSA_DATA_N2 0xe003c #define TRANSA_DP_LINK_M1 0xe0040 #define TRANSA_DP_LINK_N1 0xe0044 #define TRANSA_DP_LINK_M2 0xe0048 #define TRANSA_DP_LINK_N2 0xe004c #define TRANS_HTOTAL_B 0xe1000 #define TRANS_HBLANK_B 0xe1004 #define TRANS_HSYNC_B 0xe1008 #define TRANS_VTOTAL_B 0xe100c #define TRANS_VBLANK_B 0xe1010 #define TRANS_VSYNC_B 0xe1014 #define TRANS_VSYNCSHIFT_B 0xe1028 #define TRANSB_DATA_M1 0xe1030 #define TRANSB_DATA_N1 0xe1034 #define TRANSB_DATA_M2 0xe1038 #define TRANSB_DATA_N2 0xe103c #define TRANSB_DP_LINK_M1 0xe1040 #define TRANSB_DP_LINK_N1 0xe1044 #define TRANSB_DP_LINK_M2 0xe1048 #define TRANSB_DP_LINK_N2 0xe104c #define TRANS_HTOTAL_C 0xe2000 #define TRANS_HBLANK_C 0xe2004 #define TRANS_HSYNC_C 0xe2008 #define TRANS_VTOTAL_C 0xe200c #define TRANS_VBLANK_C 0xe2010 #define TRANS_VSYNC_C 0xe2014 #define TRANS_VSYNCSHIFT_C 0xe2028 #define TRANSC_DATA_M1 0xe2030 #define TRANSC_DATA_N1 0xe2034 #define TRANSC_DATA_M2 0xe2038 #define TRANSC_DATA_N2 0xe203c #define TRANSC_DP_LINK_M1 0xe2040 #define TRANSC_DP_LINK_N1 0xe2044 #define TRANSC_DP_LINK_M2 0xe2048 #define TRANSC_DP_LINK_N2 0xe204c #define TRANSACONF 0xf0008 #define TRANSBCONF 0xf1008 #define TRANSCCONF 0xf2008 #define TRANS_DISABLE (0<<31) #define TRANS_ENABLE (1<<31) #define TRANS_STATE_MASK (1<<30) #define TRANS_STATE_DISABLE (0<<30) #define TRANS_STATE_ENABLE (1<<30) #define TRANS_FSYNC_DELAY_HB1 (0<<27) #define TRANS_FSYNC_DELAY_HB2 (1<<27) #define TRANS_FSYNC_DELAY_HB3 (2<<27) #define TRANS_FSYNC_DELAY_HB4 (3<<27) #define TRANS_DP_AUDIO_ONLY (1<<26) #define TRANS_DP_VIDEO_AUDIO (0<<26) #define TRANS_PROGRESSIVE (0<<21) #define TRANS_8BPC (0<<5) #define TRANS_10BPC (1<<5) #define TRANS_6BPC (2<<5) #define TRANS_12BPC (3<<5) #define FDI_RXA_CHICKEN 0xc200c #define FDI_RXB_CHICKEN 0xc2010 #define FDI_RX_PHASE_SYNC_POINTER_ENABLE (1) /* CPU: FDI_TX */ #define FDI_TXA_CTL 0x60100 #define FDI_TXB_CTL 0x61100 #define FDI_TXC_CTL 0x62100 #define FDI_TX_DISABLE (0<<31) #define FDI_TX_ENABLE (1<<31) #define FDI_LINK_TRAIN_PATTERN_1 (0<<28) #define FDI_LINK_TRAIN_PATTERN_2 (1<<28) #define FDI_LINK_TRAIN_PATTERN_IDLE (2<<28) #define FDI_LINK_TRAIN_NONE (3<<28) #define FDI_LINK_TRAIN_VOLTAGE_0_4V (0<<25) #define FDI_LINK_TRAIN_VOLTAGE_0_6V (1<<25) #define FDI_LINK_TRAIN_VOLTAGE_0_8V (2<<25) #define FDI_LINK_TRAIN_VOLTAGE_1_2V (3<<25) #define FDI_LINK_TRAIN_PRE_EMPHASIS_NONE (0<<22) #define FDI_LINK_TRAIN_PRE_EMPHASIS_1_5X (1<<22) #define FDI_LINK_TRAIN_PRE_EMPHASIS_2X (2<<22) #define FDI_LINK_TRAIN_PRE_EMPHASIS_3X (3<<22) /* ILK always use 400mV 0dB for voltage swing and pre-emphasis level. SNB has different settings. */ /* SNB A-stepping */ #define FDI_LINK_TRAIN_400MV_0DB_SNB_A (0x38<<22) #define FDI_LINK_TRAIN_400MV_6DB_SNB_A (0x02<<22) #define FDI_LINK_TRAIN_600MV_3_5DB_SNB_A (0x01<<22) #define FDI_LINK_TRAIN_800MV_0DB_SNB_A (0x0<<22) /* SNB B-stepping */ #define FDI_LINK_TRAIN_400MV_0DB_SNB_B (0x0<<22) #define FDI_LINK_TRAIN_400MV_6DB_SNB_B (0x3a<<22) #define FDI_LINK_TRAIN_600MV_3_5DB_SNB_B (0x39<<22) #define FDI_LINK_TRAIN_800MV_0DB_SNB_B (0x38<<22) #define FDI_LINK_TRAIN_VOL_EMP_MASK (0x3f<<22) #define FDI_DP_PORT_WIDTH_X1 (0<<19) #define FDI_DP_PORT_WIDTH_X2 (1<<19) #define FDI_DP_PORT_WIDTH_X3 (2<<19) #define FDI_DP_PORT_WIDTH_X4 (3<<19) #define FDI_TX_ENHANCE_FRAME_ENABLE (1<<18) /* Ironlake: hardwired to 1 */ #define FDI_TX_PLL_ENABLE (1<<14) /* both Tx and Rx */ #define FDI_SCRAMBLING_ENABLE (0<<7) #define FDI_SCRAMBLING_DISABLE (1<<7) /* Additional cpu TX control regs, from ivb bspec */ #define DPAFE_BMFUNC 0x6c024 #define DPAFE_DL_IREFCAL0 0x6c02c #define DPAFE_DL_IREFCAL1 0x6c030 #define DPAFE_DP_IREFCAL 0x6c034 /* FDI_RX, FDI_X is hard-wired to Transcoder_X */ #define FDI_RXA_CTL 0xf000c #define FDI_RXB_CTL 0xf100c #define FDI_RXC_CTL 0xf200c #define FDI_RX_ENABLE (1<<31) #define FDI_RX_DISABLE (0<<31) /* train, dp width same as FDI_TX */ #define FDI_DP_PORT_WIDTH_X8 (7<<19) #define FDI_8BPC (0<<16) #define FDI_10BPC (1<<16) #define FDI_6BPC (2<<16) #define FDI_12BPC (3<<16) #define FDI_LINK_REVERSE_OVERWRITE (1<<15) #define FDI_DMI_LINK_REVERSE_MASK (1<<14) #define FDI_RX_PLL_ENABLE (1<<13) #define FDI_FS_ERR_CORRECT_ENABLE (1<<11) #define FDI_FE_ERR_CORRECT_ENABLE (1<<10) #define FDI_FS_ERR_REPORT_ENABLE (1<<9) #define FDI_FE_ERR_REPORT_ENABLE (1<<8) #define FDI_RX_ENHANCE_FRAME_ENABLE (1<<6) #define FDI_SEL_RAWCLK (0<<4) #define FDI_SEL_PCDCLK (1<<4) /* CPT */ #define FDI_AUTO_TRAINING (1<<10) #define FDI_LINK_TRAIN_PATTERN_1_CPT (0<<8) #define FDI_LINK_TRAIN_PATTERN_2_CPT (1<<8) #define FDI_LINK_TRAIN_PATTERN_IDLE_CPT (2<<8) #define FDI_LINK_TRAIN_NORMAL_CPT (3<<8) #define FDI_LINK_TRAIN_PATTERN_MASK_CPT (3<<8) #define FDI_RXA_MISC 0xf0010 #define FDI_RXB_MISC 0xf1010 #define FDI_RXC_MISC 0xf2010 #define FDI_RXA_TUSIZE1 0xf0030 #define FDI_RXA_TUSIZE2 0xf0038 #define FDI_RXB_TUSIZE1 0xf1030 #define FDI_RXB_TUSIZE2 0xf1038 #define FDI_RXC_TUSIZE1 0xf2030 #define FDI_RXC_TUSIZE2 0xf2038 /* FDI_RX interrupt register format */ #define FDI_RX_INTER_LANE_ALIGN (1<<10) #define FDI_RX_SYMBOL_LOCK (1<<9) /* train 2 */ #define FDI_RX_BIT_LOCK (1<<8) /* train 1 */ #define FDI_RX_TRAIN_PATTERN_2_FAIL (1<<7) #define FDI_RX_FS_CODE_ERR (1<<6) #define FDI_RX_FE_CODE_ERR (1<<5) #define FDI_RX_SYMBOL_ERR_RATE_ABOVE (1<<4) #define FDI_RX_HDCP_LINK_FAIL (1<<3) #define FDI_RX_PIXEL_FIFO_OVERFLOW (1<<2) #define FDI_RX_CROSS_CLOCK_OVERFLOW (1<<1) #define FDI_RX_SYMBOL_QUEUE_OVERFLOW (1<<0) #define FDI_RXA_IIR 0xf0014 #define FDI_RXA_IMR 0xf0018 #define FDI_RXB_IIR 0xf1014 #define FDI_RXB_IMR 0xf1018 #define FDI_PLL_CTL_1 0xfe000 #define FDI_PLL_CTL_2 0xfe004 /* CRT */ #define PCH_ADPA 0xe1100 #define ADPA_TRANS_SELECT_MASK (1<<30) #define ADPA_TRANS_A_SELECT 0 #define ADPA_TRANS_B_SELECT (1<<30) /* HPD is here */ #define ADPA_CRT_HOTPLUG_MASK 0x03ff0000 /* bit 25-16 */ #define ADPA_CRT_HOTPLUG_MONITOR_NONE (0<<24) #define ADPA_CRT_HOTPLUG_MONITOR_MASK (3<<24) #define ADPA_CRT_HOTPLUG_MONITOR_COLOR (3<<24) #define ADPA_CRT_HOTPLUG_MONITOR_MONO (2<<24) #define ADPA_CRT_HOTPLUG_ENABLE (1<<23) #define ADPA_CRT_HOTPLUG_PERIOD_64 (0<<22) #define ADPA_CRT_HOTPLUG_PERIOD_128 (1<<22) #define ADPA_CRT_HOTPLUG_WARMUP_5MS (0<<21) #define ADPA_CRT_HOTPLUG_WARMUP_10MS (1<<21) #define ADPA_CRT_HOTPLUG_SAMPLE_2S (0<<20) #define ADPA_CRT_HOTPLUG_SAMPLE_4S (1<<20) #define ADPA_CRT_HOTPLUG_VOLTAGE_40 (0<<18) #define ADPA_CRT_HOTPLUG_VOLTAGE_50 (1<<18) #define ADPA_CRT_HOTPLUG_VOLTAGE_60 (2<<18) #define ADPA_CRT_HOTPLUG_VOLTAGE_70 (3<<18) #define ADPA_CRT_HOTPLUG_VOLREF_325MV (0<<17) #define ADPA_CRT_HOTPLUG_VOLREF_475MV (1<<17) #define ADPA_CRT_HOTPLUG_FORCE_TRIGGER (1<<16) /* polarity control not changed */ /* or SDVOB */ #define HDMIB 0xe1140 #define PORT_ENABLE (1 << 31) #define TRANSCODER_A (0) #define TRANSCODER_B (1 << 30) #define COLOR_FORMAT_8bpc (0) #define COLOR_FORMAT_12bpc (3 << 26) #define SDVOB_HOTPLUG_ENABLE (1 << 23) #define SDVO_ENCODING (0) #define TMDS_ENCODING (2 << 10) #define NULL_PACKET_VSYNC_ENABLE (1 << 9) #define SDVOB_BORDER_ENABLE (1 << 7) #define AUDIO_ENABLE (1 << 6) #define VSYNC_ACTIVE_HIGH (1 << 4) #define HSYNC_ACTIVE_HIGH (1 << 3) #define PORT_DETECTED (1 << 2) #define HDMIC 0xe1150 #define HDMID 0xe1160 #define PCH_LVDS 0xe1180 /* Since IVB, the old _CTL2 is now _CTL and the old _CTL is now _DATA. */ #define BLC_PWM_CPU_CTL2 0x48250 #define BLC_PWM2_CPU_CTL2 0x48350 #define PWM_ENABLE (1 << 31) #define PWM_PIPE_A (0 << 29) #define PWM_PIPE_B (1 << 29) #define BLC_PWM_CPU_CTL 0x48254 #define BLC_PWM2_CPU_CTL 0x48354 #define BLC_MISC_CTL 0x48360 #define UTIL_PIN_CTL 0x48400 #define BLC_PWM_PCH_CTL1 0xc8250 #define PWM_PCH_ENABLE (1 << 31) #define PWM_POLARITY_ACTIVE_LOW (1 << 29) #define PWM_POLARITY_ACTIVE_HIGH (0 << 29) #define PWM_POLARITY_ACTIVE_LOW2 (1 << 28) #define PWM_POLARITY_ACTIVE_HIGH2 (0 << 28) #define BLC_PWM_PCH_CTL2 0xc8254 #define PCH_PP_STATUS 0xc7200 #define PCH_PP_CONTROL 0xc7204 #define EDP_FORCE_VDD (1 << 3) #define EDP_BLC_ENABLE (1 << 2) #define PANEL_POWER_RESET (1 << 1) #define PANEL_POWER_OFF (0 << 0) #define PANEL_POWER_ON (1 << 0) #define PCH_PP_ON_DELAYS 0xc7208 #define EDP_PANEL (1 << 30) #define PCH_PP_OFF_DELAYS 0xc720c #define PCH_PP_DIVISOR 0xc7210 #define AUD_CONFIG 0x62000 #define AUD_DEBUG 0x62010 #define AUD_VID_DID 0x62020 #define AUD_RID 0x62024 #define AUD_SUBN_CNT 0x62028 #define AUD_FUNC_GRP 0x62040 #define AUD_SUBN_CNT2 0x62044 #define AUD_GRP_CAP 0x62048 #define AUD_PWRST 0x6204c #define AUD_SUPPWR 0x62050 #define AUD_SID 0x62054 #define AUD_OUT_CWCAP 0x62070 #define AUD_OUT_PCMSIZE 0x62074 #define AUD_OUT_STR 0x62078 #define AUD_OUT_DIG_CNVT 0x6207c #define AUD_OUT_CH_STR 0x62080 #define AUD_OUT_STR_DESC 0x62084 #define AUD_PINW_CAP 0x620a0 #define AUD_PIN_CAP 0x620a4 #define AUD_PINW_CONNLNG 0x620a8 #define AUD_PINW_CONNLST 0x620ac #define AUD_PINW_CNTR 0x620b0 #define AUD_PINW_UNSOLRESP 0x620b8 #define AUD_CNTL_ST 0x620b4 #define AUD_PINW_CONFIG 0x620bc #define AUD_HDMIW_STATUS 0x620d4 #define AUD_HDMIW_HDMIEDID 0x6210c #define AUD_HDMIW_INFOFR 0x62118 #define AUD_CONV_CHCNT 0x62120 #define AUD_CTS_ENABLE 0x62128 #define VIDEO_DIP_CTL 0x61170 #define VIDEO_DIP_DATA 0x61178 /* CPT */ #define TRANS_DP_CTL_A 0xe0300 #define TRANS_DP_CTL_B 0xe1300 #define TRANS_DP_CTL_C 0xe2300 #define TRANS_DP_OUTPUT_ENABLE (1<<31) #define TRANS_DP_PORT_SEL_B (0<<29) #define TRANS_DP_PORT_SEL_C (1<<29) #define TRANS_DP_PORT_SEL_D (2<<29) #define TRANS_DP_PORT_SEL_MASK (3<<29) #define TRANS_DP_AUDIO_ONLY (1<<26) #define TRANS_DP_ENH_FRAMING (1<<18) #define TRANS_DP_8BPC (0<<9) #define TRANS_DP_10BPC (1<<9) #define TRANS_DP_6BPC (2<<9) #define TRANS_DP_12BPC (3<<9) #define TRANS_DP_VSYNC_ACTIVE_HIGH (1<<4) #define TRANS_DP_VSYNC_ACTIVE_LOW 0 #define TRANS_DP_HSYNC_ACTIVE_HIGH (1<<3) #define TRANS_DP_HSYNC_ACTIVE_LOW 0 /* Debug regs */ #define GEN6_TD_CTL 0x7000 /* <= GEN5 was at 0x8000 */ #define GEN6_TD_CTL_FORCE_TD_BKPT (1<<4) /* Port debugging */ #define PORT_DBG 0x42308 #define PORT_DBG_DRRS_HW_STATE_OFF (0<<30) #define PORT_DBG_DRRS_HW_STATE_LOW (1<<30) #define PORT_DBG_DRRS_HW_STATE_HIGH (2<<30) /* RC6 residence counters */ #define RC6_RESIDENCY_TIME 0x138108 #define RC6p_RESIDENCY_TIME 0x13810C #define RC6pp_RESIDENCY_TIME 0x138110 #define GEN6_RPNSWREQ 0xA008 #define GEN6_RC_VIDEO_FREQ 0xA00C #define GEN6_RC_CONTROL 0xA090 #define GEN6_RP_DOWN_TIMEOUT 0xA010 #define GEN6_RP_INTERRUPT_LIMITS 0xA014 #define GEN6_RPSTAT1 0xA01C #define GEN6_RP_CONTROL 0xA024 #define GEN6_RP_UP_THRESHOLD 0xA02C #define GEN6_RP_DOWN_THRESHOLD 0xA030 #define GEN6_RP_CUR_UP_EI 0xA050 #define GEN6_RP_CUR_UP 0xA054 #define GEN6_RP_PREV_UP 0xA058 #define GEN6_RP_CUR_DOWN_EI 0xA05C #define GEN6_RP_CUR_DOWN 0xA060 #define GEN6_RP_PREV_DOWN 0xA064 #define GEN6_RP_UP_EI 0xA068 #define GEN6_RP_DOWN_EI 0xA06C #define GEN6_RP_IDLE_HYSTERSIS 0xA070 #define GEN6_RC_STATE 0xA094 #define GEN6_RC1_WAKE_RATE_LIMIT 0xA098 #define GEN6_RC6_WAKE_RATE_LIMIT 0xA09C #define GEN6_RC6pp_WAKE_RATE_LIMIT 0xA0A0 #define GEN6_RC_EVALUATION_INTERVAL 0xA0A8 #define GEN6_RC_IDLE_HYSTERSIS 0xA0AC #define GEN6_RC_SLEEP 0xA0B0 #define GEN6_RC1e_THRESHOLD 0xA0B4 #define GEN6_RC6_THRESHOLD 0xA0B8 #define GEN6_RC6p_THRESHOLD 0xA0BC #define GEN6_RC6pp_THRESHOLD 0xA0C0 #define GEN6_PMINTRMSK 0xA168 #define GEN6_RC_EVALUATION_INTERVAL 0xA0A8 #define GEN6_RC_IDLE_HYSTERSIS 0xA0AC #define GEN6_PMIER 0x4402C #define GEN6_PMIMR 0x44024 /* rps_lock */ #define GEN6_PMINTRMSK 0xA168 /* Haswell-related items */ /* HSW Power Wells */ #define HSW_PWR_WELL_CTL1 0x45400 /* BIOS */ #define HSW_PWR_WELL_CTL2 0x45404 /* Driver */ #define HSW_PWR_WELL_CTL3 0x45408 /* KVMR */ #define HSW_PWR_WELL_CTL4 0x4540C /* Debug */ #define HSW_PWR_WELL_ENABLE_REQUEST (1<<31) #define HSW_PWR_WELL_STATE_ENABLED (1<<30) #define HSW_PWR_WELL_CTL5 0x45410 #define HSW_PWR_WELL_ENABLE_SINGLE_STEP (1<<31) #define HSW_PWR_WELL_PWR_GATE_OVERRIDE (1<<20) #define HSW_PWR_WELL_FORCE_ON (1<<19) #define HSW_PWR_WELL_CTL6 0x45414 /* Per-pipe DDI Function Control */ #define PIPE_DDI_FUNC_CTL_A 0x60400 #define PIPE_DDI_FUNC_CTL_B 0x61400 #define PIPE_DDI_FUNC_CTL_C 0x62400 #define PIPE_DDI_FUNC_CTL_EDP 0x6F400 #define DDI_FUNC_CTL(pipe) _PIPE(pipe, \ PIPE_DDI_FUNC_CTL_A, \ PIPE_DDI_FUNC_CTL_B) #define PIPE_DDI_FUNC_ENABLE (1<<31) /* Those bits are ignored by pipe EDP since it can only connect to DDI A */ #define PIPE_DDI_PORT_MASK (0xf<<28) #define PIPE_DDI_SELECT_PORT(x) ((x)<<28) #define PIPE_DDI_MODE_SELECT_HDMI (0<<24) #define PIPE_DDI_MODE_SELECT_DVI (1<<24) #define PIPE_DDI_MODE_SELECT_DP_SST (2<<24) #define PIPE_DDI_MODE_SELECT_DP_MST (3<<24) #define PIPE_DDI_MODE_SELECT_FDI (4<<24) #define PIPE_DDI_BPC_8 (0<<20) #define PIPE_DDI_BPC_10 (1<<20) #define PIPE_DDI_BPC_6 (2<<20) #define PIPE_DDI_BPC_12 (3<<20) #define PIPE_DDI_BFI_ENABLE (1<<4) #define PIPE_DDI_PORT_WIDTH_X1 (0<<1) #define PIPE_DDI_PORT_WIDTH_X2 (1<<1) #define PIPE_DDI_PORT_WIDTH_X4 (3<<1) /* DisplayPort Transport Control */ #define DP_TP_CTL_A 0x64040 #define DP_TP_CTL_B 0x64140 #define DP_TP_CTL_C 0x64240 #define DP_TP_CTL_D 0x64340 #define DP_TP_CTL_E 0x64440 #define DP_TP_CTL_ENABLE (1<<31) #define DP_TP_CTL_MODE_SST (0<<27) #define DP_TP_CTL_MODE_MST (1<<27) #define DP_TP_CTL_ENHANCED_FRAME_ENABLE (1<<18) #define DP_TP_CTL_FDI_AUTOTRAIN (1<<15) #define DP_TP_CTL_LINK_TRAIN_MASK (7<<8) #define DP_TP_CTL_LINK_TRAIN_PAT1 (0<<8) #define DP_TP_CTL_LINK_TRAIN_PAT2 (1<<8) #define DP_TP_CTL_LINK_TRAIN_NORMAL (3<<8) /* DisplayPort Transport Status */ #define DP_TP_STATUS_A 0x64044 #define DP_TP_STATUS_B 0x64144 #define DP_TP_STATUS_C 0x64244 #define DP_TP_STATUS_D 0x64344 #define DP_TP_STATUS_E 0x64444 #define DP_TP_STATUS_AUTOTRAIN_DONE (1<<12) /* DDI Buffer Control */ #define DDI_BUF_CTL_A 0x64000 #define DDI_BUF_CTL_B 0x64100 #define DDI_BUF_CTL_C 0x64200 #define DDI_BUF_CTL_D 0x64300 #define DDI_BUF_CTL_E 0x64400 #define DDI_BUF_CTL_ENABLE (1<<31) #define DDI_BUF_EMP_400MV_0DB_HSW (0<<24) /* Sel0 */ #define DDI_BUF_EMP_400MV_3_5DB_HSW (1<<24) /* Sel1 */ #define DDI_BUF_EMP_400MV_6DB_HSW (2<<24) /* Sel2 */ #define DDI_BUF_EMP_400MV_9_5DB_HSW (3<<24) /* Sel3 */ #define DDI_BUF_EMP_600MV_0DB_HSW (4<<24) /* Sel4 */ #define DDI_BUF_EMP_600MV_3_5DB_HSW (5<<24) /* Sel5 */ #define DDI_BUF_EMP_600MV_6DB_HSW (6<<24) /* Sel6 */ #define DDI_BUF_EMP_800MV_0DB_HSW (7<<24) /* Sel7 */ #define DDI_BUF_EMP_800MV_3_5DB_HSW (8<<24) /* Sel8 */ #define DDI_BUF_EMP_MASK (0xf<<24) #define DDI_BUF_IS_IDLE (1<<7) #define DDI_PORT_WIDTH_X1 (0<<1) #define DDI_PORT_WIDTH_X2 (1<<1) #define DDI_PORT_WIDTH_X4 (3<<1) #define DDI_INIT_DISPLAY_DETECTED (1<<0) /* LPT PIXCLK_GATE */ #define PIXCLK_GATE 0xC6020 #define PIXCLK_GATE_UNGATE 1<<0 #define PIXCLK_GATE_GATE 0<<0 /* SPLL */ #define SPLL_CTL 0x46020 #define SPLL_PLL_ENABLE (1<<31) #define SPLL_PLL_SCC (1<<28) #define SPLL_PLL_NON_SCC (2<<28) #define SPLL_PLL_FREQ_810MHz (0<<26) #define SPLL_PLL_FREQ_1350MHz (1<<26) /* WRPLL */ #define WRPLL_CTL1 0x46040 #define WRPLL_CTL2 0x46060 #define WRPLL_PLL_ENABLE (1<<31) #define WRPLL_PLL_SELECT_SSC (0x01<<28) #define WRPLL_PLL_SELECT_NON_SCC (0x02<<28) #define WRPLL_PLL_SELECT_LCPLL_2700 (0x03<<28) /* WRPLL divider programming */ #define WRPLL_DIVIDER_REFERENCE(x) ((x)<<0) #define WRPLL_DIVIDER_POST(x) ((x)<<8) #define WRPLL_DIVIDER_FEEDBACK(x) ((x)<<16) /* Port clock selection */ #define PORT_CLK_SEL_A 0x46100 #define PORT_CLK_SEL_B 0x46104 #define PORT_CLK_SEL_C 0x46108 #define PORT_CLK_SEL_D 0x4610C #define PORT_CLK_SEL_E 0x46110 #define PORT_CLK_SEL_LCPLL_2700 (0<<29) #define PORT_CLK_SEL_LCPLL_1350 (1<<29) #define PORT_CLK_SEL_LCPLL_810 (2<<29) #define PORT_CLK_SEL_SPLL (3<<29) #define PORT_CLK_SEL_WRPLL1 (4<<29) #define PORT_CLK_SEL_WRPLL2 (5<<29) /* Pipe clock selection */ #define PIPE_CLK_SEL_A 0x46140 #define PIPE_CLK_SEL_B 0x46144 #define PIPE_CLK_SEL_C 0x46148 /* For each pipe, we need to select the corresponding port clock */ #define PIPE_CLK_SEL_DISABLED (0x0<<29) #define PIPE_CLK_SEL_PORT(x) ((x+1)<<29) /* LCPLL Control */ #define LCPLL_CTL 0x130040 #define LCPLL_PLL_DISABLE (1<<31) #define LCPLL_PLL_LOCK (1<<30) #define LCPLL_CD_CLOCK_DISABLE (1<<25) #define LCPLL_CD2X_CLOCK_DISABLE (1<<23) /* Pipe WM_LINETIME - watermark line time */ #define WM_PIPE_A 0x45100 #define WM_PIPE_B 0x45104 #define WM_PIPE_C 0x45200 #define WM_LP1 0x45108 #define WM_LP2 0x4510C #define WM_LP3 0x45110 #define WM_LP1_SPR 0x45120 #define WM_LP2_SPR 0x45124 #define WM_LP3_SPR 0x45128 #define WM_MISC 0x45260 #define WM_SR_CNT 0x45264 #define WM_DBG 0x45280 #define PIPE_WM_LINETIME_A 0x45270 #define PIPE_WM_LINETIME_B 0x45274 #define PIPE_WM_LINETIME_C 0x45278 #define PIPE_WM_LINETIME_MASK (0x1ff) #define PIPE_WM_LINETIME_TIME(x) ((x)) #define PIPE_WM_LINETIME_IPS_LINETIME_MASK (0x1ff<<16) #define PIPE_WM_LINETIME_IPS_LINETIME(x) ((x)<<16) /* SFUSE_STRAP */ #define SFUSE_STRAP 0xc2014 #define SFUSE_STRAP_DDIB_DETECTED (1<<2) #define SFUSE_STRAP_DDIC_DETECTED (1<<1) #define SFUSE_STRAP_DDID_DETECTED (1<<0) /* Valleyview related items */ #define VLV_DISPLAY_BASE 0x180000 /* * IOSF sideband */ #define VLV_IOSF_DOORBELL_REQ (VLV_DISPLAY_BASE + 0x2100) #define IOSF_DEVFN_SHIFT 24 #define IOSF_OPCODE_SHIFT 16 #define IOSF_PORT_SHIFT 8 #define IOSF_BYTE_ENABLES_SHIFT 4 #define IOSF_BAR_SHIFT 1 #define IOSF_SB_BUSY (1<<0) #define IOSF_PORT_BUNIT 0x3 #define IOSF_PORT_PUNIT 0x4 #define IOSF_PORT_NC 0x11 #define IOSF_PORT_DPIO 0x12 #define IOSF_PORT_DPIO_2 0x1a #define IOSF_PORT_GPIO_NC 0x13 #define IOSF_PORT_CCK 0x14 #define IOSF_PORT_CCU 0xA9 #define IOSF_PORT_GPS_CORE 0x48 #define IOSF_PORT_FLISDSI 0x1B #define VLV_IOSF_DATA (VLV_DISPLAY_BASE + 0x2104) #define VLV_IOSF_ADDR (VLV_DISPLAY_BASE + 0x2108) #endif /* _I810_REG_H */ intel-gpu-tools-1.14/lib/i915_pciids.h0000644000175000017500000001775212665336131014405 00000000000000/* * Copyright 2013 Intel Corporation * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ #ifndef _I915_PCIIDS_H #define _I915_PCIIDS_H /* * A pci_device_id struct { * __u32 vendor, device; * __u32 subvendor, subdevice; * __u32 class, class_mask; * kernel_ulong_t driver_data; * }; * Don't use C99 here because "class" is reserved and we want to * give userspace flexibility. */ #define INTEL_VGA_DEVICE(id, info) { \ 0x8086, id, \ ~0, ~0, \ 0x030000, 0xff0000, \ (unsigned long) info } #define INTEL_QUANTA_VGA_DEVICE(info) { \ 0x8086, 0x16a, \ 0x152d, 0x8990, \ 0x030000, 0xff0000, \ (unsigned long) info } #define INTEL_I830_IDS(info) \ INTEL_VGA_DEVICE(0x3577, info) #define INTEL_I845G_IDS(info) \ INTEL_VGA_DEVICE(0x2562, info) #define INTEL_I85X_IDS(info) \ INTEL_VGA_DEVICE(0x3582, info), /* I855_GM */ \ INTEL_VGA_DEVICE(0x358e, info) #define INTEL_I865G_IDS(info) \ INTEL_VGA_DEVICE(0x2572, info) /* I865_G */ #define INTEL_I915G_IDS(info) \ INTEL_VGA_DEVICE(0x2582, info), /* I915_G */ \ INTEL_VGA_DEVICE(0x258a, info) /* E7221_G */ #define INTEL_I915GM_IDS(info) \ INTEL_VGA_DEVICE(0x2592, info) /* I915_GM */ #define INTEL_I945G_IDS(info) \ INTEL_VGA_DEVICE(0x2772, info) /* I945_G */ #define INTEL_I945GM_IDS(info) \ INTEL_VGA_DEVICE(0x27a2, info), /* I945_GM */ \ INTEL_VGA_DEVICE(0x27ae, info) /* I945_GME */ #define INTEL_I965G_IDS(info) \ INTEL_VGA_DEVICE(0x2972, info), /* I946_GZ */ \ INTEL_VGA_DEVICE(0x2982, info), /* G35_G */ \ INTEL_VGA_DEVICE(0x2992, info), /* I965_Q */ \ INTEL_VGA_DEVICE(0x29a2, info) /* I965_G */ #define INTEL_G33_IDS(info) \ INTEL_VGA_DEVICE(0x29b2, info), /* Q35_G */ \ INTEL_VGA_DEVICE(0x29c2, info), /* G33_G */ \ INTEL_VGA_DEVICE(0x29d2, info) /* Q33_G */ #define INTEL_I965GM_IDS(info) \ INTEL_VGA_DEVICE(0x2a02, info), /* I965_GM */ \ INTEL_VGA_DEVICE(0x2a12, info) /* I965_GME */ #define INTEL_GM45_IDS(info) \ INTEL_VGA_DEVICE(0x2a42, info) /* GM45_G */ #define INTEL_G45_IDS(info) \ INTEL_VGA_DEVICE(0x2e02, info), /* IGD_E_G */ \ INTEL_VGA_DEVICE(0x2e12, info), /* Q45_G */ \ INTEL_VGA_DEVICE(0x2e22, info), /* G45_G */ \ INTEL_VGA_DEVICE(0x2e32, info), /* G41_G */ \ INTEL_VGA_DEVICE(0x2e42, info), /* B43_G */ \ INTEL_VGA_DEVICE(0x2e92, info) /* B43_G.1 */ #define INTEL_PINEVIEW_IDS(info) \ INTEL_VGA_DEVICE(0xa001, info), \ INTEL_VGA_DEVICE(0xa011, info) #define INTEL_IRONLAKE_D_IDS(info) \ INTEL_VGA_DEVICE(0x0042, info) #define INTEL_IRONLAKE_M_IDS(info) \ INTEL_VGA_DEVICE(0x0046, info) #define INTEL_SNB_D_IDS(info) \ INTEL_VGA_DEVICE(0x0102, info), \ INTEL_VGA_DEVICE(0x0112, info), \ INTEL_VGA_DEVICE(0x0122, info), \ INTEL_VGA_DEVICE(0x010A, info) #define INTEL_SNB_M_IDS(info) \ INTEL_VGA_DEVICE(0x0106, info), \ INTEL_VGA_DEVICE(0x0116, info), \ INTEL_VGA_DEVICE(0x0126, info) #define INTEL_IVB_M_IDS(info) \ INTEL_VGA_DEVICE(0x0156, info), /* GT1 mobile */ \ INTEL_VGA_DEVICE(0x0166, info) /* GT2 mobile */ #define INTEL_IVB_D_IDS(info) \ INTEL_VGA_DEVICE(0x0152, info), /* GT1 desktop */ \ INTEL_VGA_DEVICE(0x0162, info), /* GT2 desktop */ \ INTEL_VGA_DEVICE(0x015a, info), /* GT1 server */ \ INTEL_VGA_DEVICE(0x016a, info) /* GT2 server */ #define INTEL_IVB_Q_IDS(info) \ INTEL_QUANTA_VGA_DEVICE(info) /* Quanta transcode */ #define INTEL_HSW_D_IDS(info) \ INTEL_VGA_DEVICE(0x0402, info), /* GT1 desktop */ \ INTEL_VGA_DEVICE(0x0412, info), /* GT2 desktop */ \ INTEL_VGA_DEVICE(0x0422, info), /* GT3 desktop */ \ INTEL_VGA_DEVICE(0x040a, info), /* GT1 server */ \ INTEL_VGA_DEVICE(0x041a, info), /* GT2 server */ \ INTEL_VGA_DEVICE(0x042a, info), /* GT3 server */ \ INTEL_VGA_DEVICE(0x040B, info), /* GT1 reserved */ \ INTEL_VGA_DEVICE(0x041B, info), /* GT2 reserved */ \ INTEL_VGA_DEVICE(0x042B, info), /* GT3 reserved */ \ INTEL_VGA_DEVICE(0x040E, info), /* GT1 reserved */ \ INTEL_VGA_DEVICE(0x041E, info), /* GT2 reserved */ \ INTEL_VGA_DEVICE(0x042E, info), /* GT3 reserved */ \ INTEL_VGA_DEVICE(0x0C02, info), /* SDV GT1 desktop */ \ INTEL_VGA_DEVICE(0x0C12, info), /* SDV GT2 desktop */ \ INTEL_VGA_DEVICE(0x0C22, info), /* SDV GT3 desktop */ \ INTEL_VGA_DEVICE(0x0C0A, info), /* SDV GT1 server */ \ INTEL_VGA_DEVICE(0x0C1A, info), /* SDV GT2 server */ \ INTEL_VGA_DEVICE(0x0C2A, info), /* SDV GT3 server */ \ INTEL_VGA_DEVICE(0x0C0B, info), /* SDV GT1 reserved */ \ INTEL_VGA_DEVICE(0x0C1B, info), /* SDV GT2 reserved */ \ INTEL_VGA_DEVICE(0x0C2B, info), /* SDV GT3 reserved */ \ INTEL_VGA_DEVICE(0x0C0E, info), /* SDV GT1 reserved */ \ INTEL_VGA_DEVICE(0x0C1E, info), /* SDV GT2 reserved */ \ INTEL_VGA_DEVICE(0x0C2E, info), /* SDV GT3 reserved */ \ INTEL_VGA_DEVICE(0x0A02, info), /* ULT GT1 desktop */ \ INTEL_VGA_DEVICE(0x0A12, info), /* ULT GT2 desktop */ \ INTEL_VGA_DEVICE(0x0A22, info), /* ULT GT3 desktop */ \ INTEL_VGA_DEVICE(0x0A0A, info), /* ULT GT1 server */ \ INTEL_VGA_DEVICE(0x0A1A, info), /* ULT GT2 server */ \ INTEL_VGA_DEVICE(0x0A2A, info), /* ULT GT3 server */ \ INTEL_VGA_DEVICE(0x0A0B, info), /* ULT GT1 reserved */ \ INTEL_VGA_DEVICE(0x0A1B, info), /* ULT GT2 reserved */ \ INTEL_VGA_DEVICE(0x0A2B, info), /* ULT GT3 reserved */ \ INTEL_VGA_DEVICE(0x0D02, info), /* CRW GT1 desktop */ \ INTEL_VGA_DEVICE(0x0D12, info), /* CRW GT2 desktop */ \ INTEL_VGA_DEVICE(0x0D22, info), /* CRW GT3 desktop */ \ INTEL_VGA_DEVICE(0x0D0A, info), /* CRW GT1 server */ \ INTEL_VGA_DEVICE(0x0D1A, info), /* CRW GT2 server */ \ INTEL_VGA_DEVICE(0x0D2A, info), /* CRW GT3 server */ \ INTEL_VGA_DEVICE(0x0D0B, info), /* CRW GT1 reserved */ \ INTEL_VGA_DEVICE(0x0D1B, info), /* CRW GT2 reserved */ \ INTEL_VGA_DEVICE(0x0D2B, info), /* CRW GT3 reserved */ \ INTEL_VGA_DEVICE(0x0D0E, info), /* CRW GT1 reserved */ \ INTEL_VGA_DEVICE(0x0D1E, info), /* CRW GT2 reserved */ \ INTEL_VGA_DEVICE(0x0D2E, info) /* CRW GT3 reserved */ \ #define INTEL_HSW_M_IDS(info) \ INTEL_VGA_DEVICE(0x0406, info), /* GT1 mobile */ \ INTEL_VGA_DEVICE(0x0416, info), /* GT2 mobile */ \ INTEL_VGA_DEVICE(0x0426, info), /* GT2 mobile */ \ INTEL_VGA_DEVICE(0x0C06, info), /* SDV GT1 mobile */ \ INTEL_VGA_DEVICE(0x0C16, info), /* SDV GT2 mobile */ \ INTEL_VGA_DEVICE(0x0C26, info), /* SDV GT3 mobile */ \ INTEL_VGA_DEVICE(0x0A06, info), /* ULT GT1 mobile */ \ INTEL_VGA_DEVICE(0x0A16, info), /* ULT GT2 mobile */ \ INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \ INTEL_VGA_DEVICE(0x0A0E, info), /* ULT GT1 reserved */ \ INTEL_VGA_DEVICE(0x0A1E, info), /* ULT GT2 reserved */ \ INTEL_VGA_DEVICE(0x0A2E, info), /* ULT GT3 reserved */ \ INTEL_VGA_DEVICE(0x0D06, info), /* CRW GT1 mobile */ \ INTEL_VGA_DEVICE(0x0D16, info), /* CRW GT2 mobile */ \ INTEL_VGA_DEVICE(0x0D26, info) /* CRW GT3 mobile */ #define INTEL_VLV_M_IDS(info) \ INTEL_VGA_DEVICE(0x0f30, info), \ INTEL_VGA_DEVICE(0x0f31, info), \ INTEL_VGA_DEVICE(0x0f32, info), \ INTEL_VGA_DEVICE(0x0f33, info), \ INTEL_VGA_DEVICE(0x0157, info) #define INTEL_VLV_D_IDS(info) \ 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mostlyclean-compile mostlyclean-generic \ mostlyclean-libtool pdf pdf-am ps ps-am tags tags-am uninstall \ uninstall-am .PRECIOUS: Makefile .PHONY: version.h.tmp # leaving a space here to work around automake's conditionals ifeq ($(GIT_HASH),no) $(IGT_LIB_PATH)/version.h.tmp: @echo '#define IGT_GIT_SHA1 "git"' >> $@ else $(IGT_LIB_PATH)/version.h.tmp: @touch $@ @if test -d $(GPU_TOOLS_PATH)/.git; then \ if which git > /dev/null 2>&1; then \ cd $(GPU_TOOLS_PATH); \ git log -n 1 --oneline | \ sed 's/^\([^ ]*\) .*/#define IGT_GIT_SHA1 "g\1"/' ; \ else \ echo '#define IGT_GIT_SHA1 "NO-GIT"' ; \ fi \ else \ echo '#define IGT_GIT_SHA1 "NOT-GIT"' ; \ fi >> $@ endif # GIT_HASH $(IGT_LIB_PATH)/version.h: $(IGT_LIB_PATH)/version.h.tmp @if ! cmp -s $(IGT_LIB_PATH)/version.h.tmp $(IGT_LIB_PATH)/version.h; then \ mv $(IGT_LIB_PATH)/version.h.tmp $(IGT_LIB_PATH)/version.h ; \ else \ rm $(IGT_LIB_PATH)/version.h.tmp ; \ fi # Tell versions [3.59,3.63) of GNU make to not export all variables. # Otherwise a system limit (for SysV at least) may be exceeded. .NOEXPORT: intel-gpu-tools-1.14/lib/igt_kms.c0000644000175000017500000014745012665336131014012 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * Damien Lespiau */ #include "config.h" #include #include #include #include #include #include #include #ifdef HAVE_LINUX_KD_H #include #elif HAVE_SYS_KD_H #include #endif #include #include #include #include "drmtest.h" #include "igt_kms.h" #include "igt_aux.h" #include "intel_chipset.h" #include "igt_debugfs.h" /* list of connectors that need resetting on exit */ #define MAX_CONNECTORS 32 static char *forced_connectors[MAX_CONNECTORS + 1]; static void update_edid_csum(unsigned char *edid) { int i, sum = 0; struct tm *tm; time_t t; /* year of manufacture */ t = time(NULL); tm = localtime(&t); edid[17] = tm->tm_year - 90; /* calculate checksum */ for (i = 0; i < 127; i++) { sum = sum + edid[i]; } edid[127] = 256 - sum; } #define VFREQ 60 #define CLOCK 148500 #define HACTIVE 1920 #define HBLANK 280 #define VACTIVE 1080 #define VBLANK 45 #define HOFFSET 88 #define HPULSE 44 #define VOFFSET 4 #define VPULSE 5 #define HSIZE 52 #define VSIZE 30 #define EDID_NAME base_edid #include "igt_edid_template.h" /** * igt_kms_get_base_edid: * * Get the base edid block, which includes the following modes: * * - 1920x1080 60Hz * - 1280x720 60Hz * - 1024x768 60Hz * - 800x600 60Hz * - 640x480 60Hz * * This can be extended with further features using functions such as * #kmstest_edid_add_3d. * * Returns: a basic edid block */ const unsigned char* igt_kms_get_base_edid(void) { update_edid_csum(base_edid); return base_edid; } #define VFREQ 60 #define CLOCK 101000 #define HACTIVE 1400 #define HBLANK 160 #define VACTIVE 1050 #define VBLANK 30 #define HOFFSET 48 #define HPULSE 32 #define VOFFSET 3 #define VPULSE 4 #define HSIZE 52 #define VSIZE 30 #define EDID_NAME alt_edid #include "igt_edid_template.h" /** * igt_kms_get_alt_edid: * * Get an alternate edid block, which includes the following modes: * * - 1400x1050 60Hz * - 1920x1080 60Hz * - 1280x720 60Hz * - 1024x768 60Hz * - 800x600 60Hz * - 640x480 60Hz * * This can be extended with further features using functions such as * #kmstest_edid_add_3d. * * Returns: an alternate edid block */ const unsigned char* igt_kms_get_alt_edid(void) { update_edid_csum(alt_edid); return alt_edid; } /** * SECTION:igt_kms * @short_description: Kernel modesetting support library * @title: KMS * @include: igt.h * * This library provides support to enumerate and set modeset configurations. * * There are two parts in this library: First the low level helper function * which directly build on top of raw ioctls or the interfaces provided by * libdrm. Those functions all have a kmstest_ prefix. * * The second part is a high-level library to manage modeset configurations * which abstracts away some of the low-level details like the difference * between legacy and universal plane support for setting cursors or in the * future the difference between legacy and atomic commit. These high-level * functions have all igt_ prefixes. This part is still very much work in * progress and so also lacks a bit documentation for the individual functions. * * Note that this library's header pulls in the [i-g-t framebuffer](intel-gpu-tools-i-g-t-framebuffer.html) * library as a dependency. */ /** * kmstest_pipe_name: * @pipe: display pipe * * Returns: String represnting @pipe, e.g. "A". */ const char *kmstest_pipe_name(enum pipe pipe) { const char *str[] = { "A", "B", "C" }; if (pipe > 2) return "invalid"; return str[pipe]; } /** * kmstest_plane_name: * @plane: display plane * * Returns: String represnting @pipe, e.g. "plane1". */ const char *kmstest_plane_name(enum igt_plane plane) { static const char *names[] = { [IGT_PLANE_1] = "plane1", [IGT_PLANE_2] = "plane2", [IGT_PLANE_3] = "plane3", [IGT_PLANE_CURSOR] = "cursor", }; igt_assert(plane < ARRAY_SIZE(names) && names[plane]); return names[plane]; } static const char *mode_stereo_name(const drmModeModeInfo *mode) { switch (mode->flags & DRM_MODE_FLAG_3D_MASK) { case DRM_MODE_FLAG_3D_FRAME_PACKING: return "FP"; case DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE: return "FA"; case DRM_MODE_FLAG_3D_LINE_ALTERNATIVE: return "LA"; case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL: return "SBSF"; case DRM_MODE_FLAG_3D_L_DEPTH: return "LD"; case DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH: return "LDGFX"; case DRM_MODE_FLAG_3D_TOP_AND_BOTTOM: return "TB"; case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF: return "SBSH"; default: return NULL; } } /** * kmstest_dump_mode: * @mode: libdrm mode structure * * Prints @mode to stdout in a huma-readable form. */ void kmstest_dump_mode(drmModeModeInfo *mode) { const char *stereo = mode_stereo_name(mode); igt_info(" %s %d %d %d %d %d %d %d %d %d 0x%x 0x%x %d%s%s%s\n", mode->name, mode->vrefresh, mode->hdisplay, mode->hsync_start, mode->hsync_end, mode->htotal, mode->vdisplay, mode->vsync_start, mode->vsync_end, mode->vtotal, mode->flags, mode->type, mode->clock, stereo ? " (3D:" : "", stereo ? stereo : "", stereo ? ")" : ""); } /** * kmstest_get_pipe_from_crtc_id: * @fd: DRM fd * @crtc_id: DRM CRTC id * * Returns: The pipe number for the given DRM CRTC @crtc_id. This maps directly * to an enum pipe value used in other helper functions. */ int kmstest_get_pipe_from_crtc_id(int fd, int crtc_id) { struct drm_i915_get_pipe_from_crtc_id pfci; int ret; memset(&pfci, 0, sizeof(pfci)); pfci.crtc_id = crtc_id; ret = drmIoctl(fd, DRM_IOCTL_I915_GET_PIPE_FROM_CRTC_ID, &pfci); igt_assert(ret == 0); return pfci.pipe; } /* * Returns: the previous mode, or KD_GRAPHICS if no /dev/tty0 was * found and nothing was done. */ static signed long set_vt_mode(unsigned long mode) { int fd; unsigned long prev_mode; static const char TTY0[] = "/dev/tty0"; if (access(TTY0, F_OK)) { /* errno message should be "No such file". Do not hardcode but ask strerror() in the very unlikely case something else happened. */ igt_debug("VT: %s: %s, cannot change its mode\n", TTY0, strerror(errno)); return KD_GRAPHICS; } fd = open(TTY0, O_RDONLY); if (fd < 0) return -errno; prev_mode = 0; if (drmIoctl(fd, KDGETMODE, &prev_mode)) goto err; if (drmIoctl(fd, KDSETMODE, (void *)mode)) goto err; close(fd); return prev_mode; err: close(fd); return -errno; } static unsigned long orig_vt_mode = -1UL; /** * kmstest_restore_vt_mode: * * Restore the VT mode in use before #kmstest_set_vt_graphics_mode was called. */ void kmstest_restore_vt_mode(void) { long ret; if (orig_vt_mode != -1UL) { ret = set_vt_mode(orig_vt_mode); igt_assert(ret >= 0); igt_debug("VT: original mode 0x%lx restored\n", orig_vt_mode); orig_vt_mode = -1UL; } } /** * kmstest_set_vt_graphics_mode: * * Sets the controlling VT (if available) into graphics/raw mode and installs * an igt exit handler to set the VT back to text mode on exit. Use * #kmstest_restore_vt_mode to restore the previous VT mode manually. * * All kms tests must call this function to make sure that the fbcon doesn't * interfere by e.g. blanking the screen. */ void kmstest_set_vt_graphics_mode(void) { long ret; igt_install_exit_handler((igt_exit_handler_t) kmstest_restore_vt_mode); igt_disable_exit_handler(); ret = set_vt_mode(KD_GRAPHICS); igt_enable_exit_handler(); igt_assert(ret >= 0); orig_vt_mode = ret; igt_debug("VT: graphics mode set (mode was 0x%lx)\n", ret); } static void reset_connectors_at_exit(int sig) { igt_reset_connectors(); } /** * kmstest_force_connector: * @fd: drm file descriptor * @connector: connector * @state: state to force on @connector * * Force the specified state on the specified connector. * * Returns: true on success */ bool kmstest_force_connector(int drm_fd, drmModeConnector *connector, enum kmstest_force_connector_state state) { char *path, **tmp; const char *value; int debugfs_fd, ret, len; drmModeConnector *temp; uint32_t devid; devid = intel_get_drm_devid(drm_fd); /* forcing hdmi or dp connectors on HSW and BDW doesn't currently work, * so fail early to allow the test to skip if required */ if ((connector->connector_type == DRM_MODE_CONNECTOR_HDMIA || connector->connector_type == DRM_MODE_CONNECTOR_HDMIB || connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) && (IS_HASWELL(devid) || IS_BROADWELL(devid))) return false; switch (state) { case FORCE_CONNECTOR_ON: value = "on"; break; case FORCE_CONNECTOR_DIGITAL: value = "digital"; break; case FORCE_CONNECTOR_OFF: value = "off"; break; default: case FORCE_CONNECTOR_UNSPECIFIED: value = "unspecified"; break; } igt_assert_neq(asprintf(&path, "%s-%d/force", kmstest_connector_type_str(connector->connector_type), connector->connector_type_id), -1); debugfs_fd = igt_debugfs_open(path, O_WRONLY | O_TRUNC); if (debugfs_fd == -1) { return false; } ret = write(debugfs_fd, value, strlen(value)); close(debugfs_fd); for (len = 0, tmp = forced_connectors; *tmp; tmp++) { /* check the connector is not already present */ if (strcmp(*tmp, path) == 0) { len = -1; break; } len++; } if (len != -1 && len < MAX_CONNECTORS) forced_connectors[len] = path; if (len >= MAX_CONNECTORS) igt_warn("Connector limit reached, %s will not be reset\n", path); igt_debug("Connector %s is now forced %s\n", path, value); igt_debug("Current forced connectors:\n"); tmp = forced_connectors; while (*tmp) { igt_debug("\t%s\n", *tmp); tmp++; } igt_install_exit_handler(reset_connectors_at_exit); /* To allow callers to always use GetConnectorCurrent we need to force a * redetection here. */ temp = drmModeGetConnector(drm_fd, connector->connector_id); drmModeFreeConnector(temp); igt_assert(ret != -1); return (ret == -1) ? false : true; } /** * kmstest_force_edid: * @drm_fd: drm file descriptor * @connector: connector to set @edid on * @edid: An EDID data block * @length: length of the EDID data. #EDID_LENGTH defines the standard EDID * length * * Set the EDID data on @connector to @edid. See also #igt_kms_get_base_edid. * * If @length is zero, the forced EDID will be removed. */ void kmstest_force_edid(int drm_fd, drmModeConnector *connector, const unsigned char *edid, size_t length) { char *path; int debugfs_fd, ret; drmModeConnector *temp; igt_assert_neq(asprintf(&path, "%s-%d/edid_override", kmstest_connector_type_str(connector->connector_type), connector->connector_type_id), -1); debugfs_fd = igt_debugfs_open(path, O_WRONLY | O_TRUNC); free(path); igt_assert(debugfs_fd != -1); if (length == 0) ret = write(debugfs_fd, "reset", 5); else ret = write(debugfs_fd, edid, length); close(debugfs_fd); /* To allow callers to always use GetConnectorCurrent we need to force a * redetection here. */ temp = drmModeGetConnector(drm_fd, connector->connector_id); drmModeFreeConnector(temp); igt_assert(ret != -1); } /** * kmstest_get_connector_default_mode: * @drm_fd: DRM fd * @connector: libdrm connector * @mode: libdrm mode * * Retrieves the default mode for @connector and stores it in @mode. * * Returns: true on success, false on failure */ bool kmstest_get_connector_default_mode(int drm_fd, drmModeConnector *connector, drmModeModeInfo *mode) { int i; if (!connector->count_modes) { igt_warn("no modes for connector %d\n", connector->connector_id); return false; } for (i = 0; i < connector->count_modes; i++) { if (i == 0 || connector->modes[i].type & DRM_MODE_TYPE_PREFERRED) { *mode = connector->modes[i]; if (mode->type & DRM_MODE_TYPE_PREFERRED) break; } } return true; } /** * _kmstest_connector_config: * @drm_fd: DRM fd * @connector_id: DRM connector id * @crtc_idx_mask: mask of allowed DRM CRTC indices * @config: structure filled with the possible configuration * @probe: whether to fully re-probe mode list or not * * This tries to find a suitable configuration for the given connector and CRTC * constraint and fills it into @config. */ static bool _kmstest_connector_config(int drm_fd, uint32_t connector_id, unsigned long crtc_idx_mask, struct kmstest_connector_config *config, bool probe) { drmModeRes *resources; drmModeConnector *connector; drmModeEncoder *encoder; int i, j; resources = drmModeGetResources(drm_fd); if (!resources) { igt_warn("drmModeGetResources failed"); goto err1; } /* First, find the connector & mode */ if (probe) connector = drmModeGetConnector(drm_fd, connector_id); else connector = drmModeGetConnectorCurrent(drm_fd, connector_id); if (!connector) goto err2; if (connector->connection != DRM_MODE_CONNECTED) goto err3; if (!connector->count_modes) { igt_warn("connector %d has no modes\n", connector_id); goto err3; } if (connector->connector_id != connector_id) { igt_warn("connector id doesn't match (%d != %d)\n", connector->connector_id, connector_id); goto err3; } /* * Find given CRTC if crtc_id != 0 or else the first CRTC not in use. * In both cases find the first compatible encoder and skip the CRTC * if there is non such. */ encoder = NULL; /* suppress GCC warning */ for (i = 0; i < resources->count_crtcs; i++) { if (!resources->crtcs[i] || !(crtc_idx_mask & (1 << i))) continue; /* Now get a compatible encoder */ for (j = 0; j < connector->count_encoders; j++) { encoder = drmModeGetEncoder(drm_fd, connector->encoders[j]); if (!encoder) { igt_warn("could not get encoder %d: %s\n", resources->encoders[j], strerror(errno)); continue; } if (encoder->possible_crtcs & (1 << i)) goto found; drmModeFreeEncoder(encoder); } } goto err3; found: if (!kmstest_get_connector_default_mode(drm_fd, connector, &config->default_mode)) goto err4; config->connector = connector; config->encoder = encoder; config->crtc = drmModeGetCrtc(drm_fd, resources->crtcs[i]); config->crtc_idx = i; config->pipe = kmstest_get_pipe_from_crtc_id(drm_fd, config->crtc->crtc_id); drmModeFreeResources(resources); return true; err4: drmModeFreeEncoder(encoder); err3: drmModeFreeConnector(connector); err2: drmModeFreeResources(resources); err1: return false; } /** * kmstest_get_connector_config: * @drm_fd: DRM fd * @connector_id: DRM connector id * @crtc_idx_mask: mask of allowed DRM CRTC indices * @config: structure filled with the possible configuration * * This tries to find a suitable configuration for the given connector and CRTC * constraint and fills it into @config. */ bool kmstest_get_connector_config(int drm_fd, uint32_t connector_id, unsigned long crtc_idx_mask, struct kmstest_connector_config *config) { return _kmstest_connector_config(drm_fd, connector_id, crtc_idx_mask, config, 0); } /** * kmstest_probe_connector_config: * @drm_fd: DRM fd * @connector_id: DRM connector id * @crtc_idx_mask: mask of allowed DRM CRTC indices * @config: structure filled with the possible configuration * * This tries to find a suitable configuration for the given connector and CRTC * constraint and fills it into @config, fully probing the connector in the * process. */ bool kmstest_probe_connector_config(int drm_fd, uint32_t connector_id, unsigned long crtc_idx_mask, struct kmstest_connector_config *config) { return _kmstest_connector_config(drm_fd, connector_id, crtc_idx_mask, config, 1); } /** * kmstest_free_connector_config: * @config: connector configuration structure * * Free any resources in @config allocated in kmstest_get_connector_config(). */ void kmstest_free_connector_config(struct kmstest_connector_config *config) { drmModeFreeCrtc(config->crtc); drmModeFreeEncoder(config->encoder); drmModeFreeConnector(config->connector); } /** * kmstest_set_connector_dpms: * @fd: DRM fd * @connector: libdrm connector * @mode: DRM DPMS value * * This function sets the DPMS setting of @connector to @mode. */ void kmstest_set_connector_dpms(int fd, drmModeConnector *connector, int mode) { int i, dpms = 0; bool found_it = false; for (i = 0; i < connector->count_props; i++) { struct drm_mode_get_property prop; prop.prop_id = connector->props[i]; prop.count_values = 0; prop.count_enum_blobs = 0; if (drmIoctl(fd, DRM_IOCTL_MODE_GETPROPERTY, &prop)) continue; if (strcmp(prop.name, "DPMS")) continue; dpms = prop.prop_id; found_it = true; break; } igt_assert_f(found_it, "DPMS property not found on %d\n", connector->connector_id); igt_assert(drmModeConnectorSetProperty(fd, connector->connector_id, dpms, mode) == 0); } /** * kmstest_get_property: * @drm_fd: drm file descriptor * @object_id: object whose properties we're going to get * @object_type: type of obj_id (DRM_MODE_OBJECT_*) * @name: name of the property we're going to get * @prop_id: if not NULL, returns the property id * @value: if not NULL, returns the property value * @prop: if not NULL, returns the property, and the caller will have to free * it manually. * * Finds a property with the given name on the given object. * * Returns: true in case we found something. */ bool kmstest_get_property(int drm_fd, uint32_t object_id, uint32_t object_type, const char *name, uint32_t *prop_id /* out */, uint64_t *value /* out */, drmModePropertyPtr *prop /* out */) { drmModeObjectPropertiesPtr proplist; drmModePropertyPtr _prop; bool found = false; int i; proplist = drmModeObjectGetProperties(drm_fd, object_id, object_type); for (i = 0; i < proplist->count_props; i++) { _prop = drmModeGetProperty(drm_fd, proplist->props[i]); if (!_prop) continue; if (strcmp(_prop->name, name) == 0) { found = true; if (prop_id) *prop_id = proplist->props[i]; if (value) *value = proplist->prop_values[i]; if (prop) *prop = _prop; else drmModeFreeProperty(_prop); break; } drmModeFreeProperty(_prop); } drmModeFreeObjectProperties(proplist); return found; } /** * kmstest_edid_add_3d: * @edid: an existing valid edid block * @length: length of @edid * @new_edid_ptr: pointer to where the new edid will be placed * @new_length: pointer to the size of the new edid * * Makes a copy of an existing edid block and adds an extension indicating * stereo 3D capabilities. */ void kmstest_edid_add_3d(const unsigned char *edid, size_t length, unsigned char *new_edid_ptr[], size_t *new_length) { unsigned char *new_edid; int n_extensions; char sum = 0; int pos; int i; char cea_header_len = 4, video_block_len = 6, vsdb_block_len = 11; igt_assert(new_edid_ptr != NULL && new_length != NULL); *new_length = length + 128; new_edid = calloc(*new_length, sizeof(char)); memcpy(new_edid, edid, length); *new_edid_ptr = new_edid; n_extensions = new_edid[126]; n_extensions++; new_edid[126] = n_extensions; /* recompute checksum */ for (i = 0; i < 127; i++) { sum = sum + new_edid[i]; } new_edid[127] = 256 - sum; /* add a cea-861 extension block */ pos = length; new_edid[pos++] = 0x2; new_edid[pos++] = 0x3; new_edid[pos++] = cea_header_len + video_block_len + vsdb_block_len; new_edid[pos++] = 0x0; /* video block (id | length) */ new_edid[pos++] = 2 << 5 | (video_block_len - 1); new_edid[pos++] = 32 | 0x80; /* 1080p @ 24Hz | (native)*/ new_edid[pos++] = 5; /* 1080i @ 60Hz */ new_edid[pos++] = 20; /* 1080i @ 50Hz */ new_edid[pos++] = 4; /* 720p @ 60Hz*/ new_edid[pos++] = 19; /* 720p @ 50Hz*/ /* vsdb block ( id | length ) */ new_edid[pos++] = 3 << 5 | (vsdb_block_len - 1); /* registration id */ new_edid[pos++] = 0x3; new_edid[pos++] = 0xc; new_edid[pos++] = 0x0; /* source physical address */ new_edid[pos++] = 0x10; new_edid[pos++] = 0x00; /* Supports_AI ... etc */ new_edid[pos++] = 0x00; /* Max TMDS Clock */ new_edid[pos++] = 0x00; /* Latency present, HDMI Video Present */ new_edid[pos++] = 0x20; /* HDMI Video */ new_edid[pos++] = 0x80; new_edid[pos++] = 0x00; /* checksum */ sum = 0; for (i = 0; i < 127; i++) { sum = sum + new_edid[length + i]; } new_edid[length + 127] = 256 - sum; } /** * kmstest_unset_all_crtcs: * @drm_fd: the DRM fd * @resources: libdrm resources pointer * * Disables all the screens. */ void kmstest_unset_all_crtcs(int drm_fd, drmModeResPtr resources) { int i, rc; for (i = 0; i < resources->count_crtcs; i++) { rc = drmModeSetCrtc(drm_fd, resources->crtcs[i], 0, 0, 0, NULL, 0, NULL); igt_assert(rc == 0); } } /* * A small modeset API */ #define LOG_SPACES " " #define LOG_N_SPACES (sizeof(LOG_SPACES) - 1) #define LOG_INDENT(d, section) \ do { \ igt_display_log(d, "%s {\n", section); \ igt_display_log_shift(d, 1); \ } while (0) #define LOG_UNINDENT(d) \ do { \ igt_display_log_shift(d, -1); \ igt_display_log(d, "}\n"); \ } while (0) #define LOG(d, fmt, ...) igt_display_log(d, fmt, ## __VA_ARGS__) static void __attribute__((format(printf, 2, 3))) igt_display_log(igt_display_t *display, const char *fmt, ...) { va_list args; int i; va_start(args, fmt); igt_debug("display: "); for (i = 0; i < display->log_shift; i++) igt_debug("%s", LOG_SPACES); igt_vlog(IGT_LOG_DOMAIN, IGT_LOG_DEBUG, fmt, args); va_end(args); } static void igt_display_log_shift(igt_display_t *display, int shift) { display->log_shift += shift; igt_assert(display->log_shift >= 0); } static void igt_output_refresh(igt_output_t *output) { igt_display_t *display = output->display; bool ret; unsigned long crtc_idx_mask; /* we mask out the pipes already in use */ crtc_idx_mask = output->pending_crtc_idx_mask & ~display->pipes_in_use; if (output->valid) kmstest_free_connector_config(&output->config); ret = kmstest_get_connector_config(display->drm_fd, output->id, crtc_idx_mask, &output->config); if (ret) output->valid = true; else output->valid = false; if (!output->valid) return; if (output->use_override_mode) output->config.default_mode = output->override_mode; if (!output->name) { drmModeConnector *c = output->config.connector; igt_assert_neq(asprintf(&output->name, "%s-%d", kmstest_connector_type_str(c->connector_type), c->connector_type_id), -1); } LOG(display, "%s: Selecting pipe %s\n", output->name, kmstest_pipe_name(output->config.pipe)); display->pipes_in_use |= 1 << output->config.pipe; } static bool get_plane_property(int drm_fd, uint32_t plane_id, const char *name, uint32_t *prop_id /* out */, uint64_t *value /* out */, drmModePropertyPtr *prop /* out */) { return kmstest_get_property(drm_fd, plane_id, DRM_MODE_OBJECT_PLANE, name, prop_id, value, prop); } static int igt_plane_set_property(igt_plane_t *plane, uint32_t prop_id, uint64_t value) { igt_pipe_t *pipe = plane->pipe; igt_display_t *display = pipe->display; return drmModeObjectSetProperty(display->drm_fd, plane->drm_plane->plane_id, DRM_MODE_OBJECT_PLANE, prop_id, value); } static bool get_crtc_property(int drm_fd, uint32_t crtc_id, const char *name, uint32_t *prop_id /* out */, uint64_t *value /* out */, drmModePropertyPtr *prop /* out */) { return kmstest_get_property(drm_fd, crtc_id, DRM_MODE_OBJECT_CRTC, name, prop_id, value, prop); } static void igt_crtc_set_property(igt_output_t *output, uint32_t prop_id, uint64_t value) { drmModeObjectSetProperty(output->display->drm_fd, output->config.crtc->crtc_id, DRM_MODE_OBJECT_CRTC, prop_id, value); } /* * Walk a plane's property list to determine its type. If we don't * find a type property, then the kernel doesn't support universal * planes and we know the plane is an overlay/sprite. */ static int get_drm_plane_type(int drm_fd, uint32_t plane_id) { uint64_t value; bool has_prop; has_prop = get_plane_property(drm_fd, plane_id, "type", NULL /* prop_id */, &value, NULL); if (has_prop) return (int)value; return DRM_PLANE_TYPE_OVERLAY; } /** * igt_display_init: * @display: a pointer to an #igt_display_t structure * @drm_fd: a drm file descriptor * * Initialize @display and allocate the various resources required. Use * #igt_display_fini to release the resources when they are no longer required. * */ void igt_display_init(igt_display_t *display, int drm_fd) { drmModeRes *resources; drmModePlaneRes *plane_resources; int i; memset(display, 0, sizeof(igt_display_t)); LOG_INDENT(display, "init"); display->drm_fd = drm_fd; resources = drmModeGetResources(display->drm_fd); igt_assert(resources); /* * We cache the number of pipes, that number is a physical limit of the * hardware and cannot change of time (for now, at least). */ display->n_pipes = resources->count_crtcs; drmSetClientCap(drm_fd, DRM_CLIENT_CAP_UNIVERSAL_PLANES, 1); plane_resources = drmModeGetPlaneResources(display->drm_fd); igt_assert(plane_resources); for (i = 0; i < display->n_pipes; i++) { igt_pipe_t *pipe = &display->pipes[i]; igt_plane_t *plane; int p = IGT_PLANE_2; int j, type; pipe->display = display; pipe->pipe = i; /* add the planes that can be used with that pipe */ for (j = 0; j < plane_resources->count_planes; j++) { drmModePlane *drm_plane; uint64_t prop_value; drm_plane = drmModeGetPlane(display->drm_fd, plane_resources->planes[j]); igt_assert(drm_plane); if (!(drm_plane->possible_crtcs & (1 << i))) { drmModeFreePlane(drm_plane); continue; } type = get_drm_plane_type(display->drm_fd, plane_resources->planes[j]); switch (type) { case DRM_PLANE_TYPE_PRIMARY: plane = &pipe->planes[IGT_PLANE_PRIMARY]; plane->is_primary = 1; plane->index = IGT_PLANE_PRIMARY; display->has_universal_planes = 1; break; case DRM_PLANE_TYPE_CURSOR: /* * Cursor should be the highest index in our * internal list, but we don't know what that * is yet. Just stick it in the last slot * for now and we'll move it later, if * necessary. */ plane = &pipe->planes[IGT_PLANE_CURSOR]; plane->is_cursor = 1; plane->index = IGT_PLANE_CURSOR; display->has_universal_planes = 1; break; default: plane = &pipe->planes[p]; plane->index = p++; break; } plane->pipe = pipe; plane->drm_plane = drm_plane; get_plane_property(display->drm_fd, drm_plane->plane_id, "rotation", &plane->rotation_property, &prop_value, NULL); plane->rotation = (igt_rotation_t)prop_value; } if (display->has_universal_planes) { /* * If we have universal planes, we should have both * primary and cursor planes setup now. */ igt_assert(pipe->planes[IGT_PLANE_PRIMARY].drm_plane && pipe->planes[IGT_PLANE_CURSOR].drm_plane); /* * Cursor was put in the last slot. If we have 0 or * only 1 sprite, that's the wrong slot and we need to * move it down. */ if (p != IGT_PLANE_CURSOR) { pipe->planes[p] = pipe->planes[IGT_PLANE_CURSOR]; pipe->planes[p].index = p; memset(&pipe->planes[IGT_PLANE_CURSOR], 0, sizeof *plane); } } else { /* * No universal plane support. Add drm_plane-less * primary and cursor planes. */ plane = &pipe->planes[IGT_PLANE_PRIMARY]; plane->pipe = pipe; plane->index = IGT_PLANE_PRIMARY; plane->is_primary = true; plane = &pipe->planes[p]; plane->pipe = pipe; plane->index = p; plane->is_cursor = true; } /* planes = 1 primary, (p-1) sprites, 1 cursor */ pipe->n_planes = p + 1; /* make sure we don't overflow the plane array */ igt_assert(pipe->n_planes <= IGT_MAX_PLANES); } /* * The number of connectors is set, so we just initialize the outputs * array in _init(). This may change when we need dynamic connectors * (say DisplayPort MST). */ display->n_outputs = resources->count_connectors; display->outputs = calloc(display->n_outputs, sizeof(igt_output_t)); igt_assert(display->outputs); for (i = 0; i < display->n_outputs; i++) { int j; igt_output_t *output = &display->outputs[i]; /* * We're free to select any pipe to drive that output until * a constraint is set with igt_output_set_pipe(). */ output->pending_crtc_idx_mask = -1UL; output->id = resources->connectors[i]; output->display = display; igt_output_refresh(output); for (j = 0; j < display->n_pipes; j++) { uint64_t prop_value; igt_pipe_t *pipe = &display->pipes[j]; if (output->config.crtc) { get_crtc_property(display->drm_fd, output->config.crtc->crtc_id, "background_color", &pipe->background_property, &prop_value, NULL); pipe->background = (uint32_t)prop_value; } } } drmModeFreePlaneResources(plane_resources); drmModeFreeResources(resources); LOG_UNINDENT(display); } int igt_display_get_n_pipes(igt_display_t *display) { return display->n_pipes; } static void igt_pipe_fini(igt_pipe_t *pipe) { int i; for (i = 0; i < pipe->n_planes; i++) { igt_plane_t *plane = &pipe->planes[i]; if (plane->drm_plane) { drmModeFreePlane(plane->drm_plane); plane->drm_plane = NULL; } } } static void igt_output_fini(igt_output_t *output) { if (output->valid) kmstest_free_connector_config(&output->config); free(output->name); } /** * igt_display_fini: * @display: a pointer to an #igt_display_t structure * * Release any resources associated with @display. This does not free @display * itself. */ void igt_display_fini(igt_display_t *display) { int i; for (i = 0; i < display->n_pipes; i++) igt_pipe_fini(&display->pipes[i]); for (i = 0; i < display->n_outputs; i++) igt_output_fini(&display->outputs[i]); free(display->outputs); display->outputs = NULL; } static void igt_display_refresh(igt_display_t *display) { int i, j; display->pipes_in_use = 0; /* Check that two outputs aren't trying to use the same pipe */ for (i = 0; i < display->n_outputs; i++) { igt_output_t *a = &display->outputs[i]; if (a->pending_crtc_idx_mask == -1UL) continue; for (j = 0; j < display->n_outputs; j++) { igt_output_t *b = &display->outputs[j]; if (i == j) continue; if (b->pending_crtc_idx_mask == -1UL) continue; igt_assert_f(a->pending_crtc_idx_mask != b->pending_crtc_idx_mask, "%s and %s are both trying to use pipe %s\n", igt_output_name(a), igt_output_name(b), kmstest_pipe_name(ffs(a->pending_crtc_idx_mask) - 1)); } } /* * The pipe allocation has to be done in two phases: * - first, try to satisfy the outputs where a pipe has been specified * - then, allocate the outputs with PIPE_ANY */ for (i = 0; i < display->n_outputs; i++) { igt_output_t *output = &display->outputs[i]; if (output->pending_crtc_idx_mask == -1UL) continue; igt_output_refresh(output); } for (i = 0; i < display->n_outputs; i++) { igt_output_t *output = &display->outputs[i]; if (output->pending_crtc_idx_mask != -1UL) continue; igt_output_refresh(output); } } static igt_pipe_t *igt_output_get_driving_pipe(igt_output_t *output) { igt_display_t *display = output->display; enum pipe pipe; if (output->pending_crtc_idx_mask == -1UL) { /* * The user hasn't specified a pipe to use, take the one * configured by the last refresh() */ pipe = output->config.pipe; } else { /* * Otherwise, return the pending pipe (ie the pipe that should * drive this output after the commit() */ pipe = ffs(output->pending_crtc_idx_mask) - 1; } igt_assert(pipe >= 0 && pipe < display->n_pipes); return &display->pipes[pipe]; } static igt_plane_t *igt_pipe_get_plane(igt_pipe_t *pipe, enum igt_plane plane) { int idx; /* Cursor plane is always the highest index */ if (plane == IGT_PLANE_CURSOR) idx = pipe->n_planes - 1; else { igt_assert_f(plane >= 0 && plane < (pipe->n_planes), "plane=%d\n", plane); idx = plane; } return &pipe->planes[idx]; } static uint32_t igt_plane_get_fb_id(igt_plane_t *plane) { if (plane->fb) return plane->fb->fb_id; else return 0; } static uint32_t igt_plane_get_fb_gem_handle(igt_plane_t *plane) { if (plane->fb) return plane->fb->gem_handle; else return 0; } #define CHECK_RETURN(r, fail) { \ if (r && !fail) \ return r; \ igt_assert(r == 0); \ } /* * Commit position and fb changes to a DRM plane via the SetPlane ioctl; if the * DRM call to program the plane fails, we'll either fail immediately (for * tests that expect the commit to succeed) or return the failure code (for * tests that expect a specific error code). */ static int igt_drm_plane_commit(igt_plane_t *plane, igt_output_t *output, bool fail_on_error) { igt_display_t *display = output->display; uint32_t fb_id, crtc_id; int ret; uint32_t src_x; uint32_t src_y; uint32_t src_w; uint32_t src_h; int32_t crtc_x; int32_t crtc_y; uint32_t crtc_w; uint32_t crtc_h; igt_assert(plane->drm_plane); /* it's an error to try an unsupported feature */ igt_assert(igt_plane_supports_rotation(plane) || !plane->rotation_changed); fb_id = igt_plane_get_fb_id(plane); crtc_id = output->config.crtc->crtc_id; if ((plane->fb_changed || plane->size_changed) && fb_id == 0) { LOG(display, "%s: SetPlane pipe %s, plane %d, disabling\n", igt_output_name(output), kmstest_pipe_name(output->config.pipe), plane->index); ret = drmModeSetPlane(display->drm_fd, plane->drm_plane->plane_id, crtc_id, fb_id, 0, /* flags */ 0, 0, /* crtc_x, crtc_y */ 0, 0, /* crtc_w, crtc_h */ IGT_FIXED(0,0), /* src_x */ IGT_FIXED(0,0), /* src_y */ IGT_FIXED(0,0), /* src_w */ IGT_FIXED(0,0) /* src_h */); CHECK_RETURN(ret, fail_on_error); } else if (plane->fb_changed || plane->position_changed || plane->size_changed) { src_x = IGT_FIXED(plane->fb->src_x,0); /* src_x */ src_y = IGT_FIXED(plane->fb->src_y,0); /* src_y */ src_w = IGT_FIXED(plane->fb->src_w,0); /* src_w */ src_h = IGT_FIXED(plane->fb->src_h,0); /* src_h */ crtc_x = plane->crtc_x; crtc_y = plane->crtc_y; crtc_w = plane->crtc_w; crtc_h = plane->crtc_h; LOG(display, "%s: SetPlane %s.%d, fb %u, src = (%d, %d) " "%ux%u dst = (%u, %u) %ux%u\n", igt_output_name(output), kmstest_pipe_name(output->config.pipe), plane->index, fb_id, src_x >> 16, src_y >> 16, src_w >> 16, src_h >> 16, crtc_x, crtc_y, crtc_w, crtc_h); ret = drmModeSetPlane(display->drm_fd, plane->drm_plane->plane_id, crtc_id, fb_id, 0, /* flags */ crtc_x, crtc_y, crtc_w, crtc_h, src_x, src_y, src_w, src_h); CHECK_RETURN(ret, fail_on_error); } plane->fb_changed = false; plane->position_changed = false; plane->size_changed = false; if (plane->rotation_changed) { ret = igt_plane_set_property(plane, plane->rotation_property, plane->rotation); plane->rotation_changed = false; CHECK_RETURN(ret, fail_on_error); } return 0; } /* * Commit position and fb changes to a cursor via legacy ioctl's. If commit * fails, we'll either fail immediately (for tests that expect the commit to * succeed) or return the failure code (for tests that expect a specific error * code). */ static int igt_cursor_commit_legacy(igt_plane_t *cursor, igt_output_t *output, bool fail_on_error) { igt_display_t *display = output->display; uint32_t crtc_id = output->config.crtc->crtc_id; int ret; if (cursor->fb_changed) { uint32_t gem_handle = igt_plane_get_fb_gem_handle(cursor); if (gem_handle) { LOG(display, "%s: SetCursor pipe %s, fb %u %dx%d\n", igt_output_name(output), kmstest_pipe_name(output->config.pipe), gem_handle, cursor->crtc_w, cursor->crtc_h); ret = drmModeSetCursor(display->drm_fd, crtc_id, gem_handle, cursor->crtc_w, cursor->crtc_h); } else { LOG(display, "%s: SetCursor pipe %s, disabling\n", igt_output_name(output), kmstest_pipe_name(output->config.pipe)); ret = drmModeSetCursor(display->drm_fd, crtc_id, 0, 0, 0); } CHECK_RETURN(ret, fail_on_error); cursor->fb_changed = false; } if (cursor->position_changed) { int x = cursor->crtc_x; int y = cursor->crtc_y; LOG(display, "%s: MoveCursor pipe %s, (%d, %d)\n", igt_output_name(output), kmstest_pipe_name(output->config.pipe), x, y); ret = drmModeMoveCursor(display->drm_fd, crtc_id, x, y); CHECK_RETURN(ret, fail_on_error); cursor->position_changed = false; } return 0; } /* * Commit position and fb changes to a primary plane via the legacy interface * (setmode). */ static int igt_primary_plane_commit_legacy(igt_plane_t *primary, igt_output_t *output, bool fail_on_error) { struct igt_display *display = primary->pipe->display; drmModeModeInfo *mode; uint32_t fb_id, crtc_id; int ret; /* Primary planes can't be windowed when using a legacy commit */ igt_assert((primary->crtc_x == 0 && primary->crtc_y == 0)); /* nor rotated */ igt_assert(!primary->rotation_changed); if (!primary->fb_changed && !primary->position_changed && !primary->size_changed && !primary->panning_changed) return 0; crtc_id = output->config.crtc->crtc_id; fb_id = igt_plane_get_fb_id(primary); if (fb_id) mode = igt_output_get_mode(output); else mode = NULL; if (fb_id) { LOG(display, "%s: SetCrtc pipe %s, fb %u, panning (%d, %d), " "mode %dx%d\n", igt_output_name(output), kmstest_pipe_name(output->config.pipe), fb_id, primary->pan_x, primary->pan_y, mode->hdisplay, mode->vdisplay); ret = drmModeSetCrtc(display->drm_fd, crtc_id, fb_id, primary->pan_x, primary->pan_y, &output->id, 1, mode); } else { LOG(display, "%s: SetCrtc pipe %s, disabling\n", igt_output_name(output), kmstest_pipe_name(output->config.pipe)); ret = drmModeSetCrtc(display->drm_fd, crtc_id, fb_id, 0, 0, /* x, y */ NULL, /* connectors */ 0, /* n_connectors */ NULL /* mode */); } CHECK_RETURN(ret, fail_on_error); primary->pipe->enabled = (fb_id != 0); primary->fb_changed = false; primary->position_changed = false; primary->size_changed = false; primary->panning_changed = false; return 0; } /* * Commit position and fb changes to a plane. The value of @s will determine * which API is used to do the programming. */ static int igt_plane_commit(igt_plane_t *plane, igt_output_t *output, enum igt_commit_style s, bool fail_on_error) { if (plane->is_cursor && s == COMMIT_LEGACY) { return igt_cursor_commit_legacy(plane, output, fail_on_error); } else if (plane->is_primary && s == COMMIT_LEGACY) { return igt_primary_plane_commit_legacy(plane, output, fail_on_error); } else { return igt_drm_plane_commit(plane, output, fail_on_error); } } /* * Commit all plane changes to an output. Note that if @s is COMMIT_LEGACY, * enabling/disabling the primary plane will also enable/disable the CRTC. * * If @fail_on_error is true, any failure to commit plane state will lead * to subtest failure in the specific function where the failure occurs. * Otherwise, the first error code encountered will be returned and no * further programming will take place, which may result in some changes * taking effect and others not taking effect. */ static int igt_output_commit(igt_output_t *output, enum igt_commit_style s, bool fail_on_error) { igt_display_t *display = output->display; igt_pipe_t *pipe; int i; int ret; bool need_wait_for_vblank = false; pipe = igt_output_get_driving_pipe(output); if (pipe->background_changed) { igt_crtc_set_property(output, pipe->background_property, pipe->background); pipe->background_changed = false; } for (i = 0; i < pipe->n_planes; i++) { igt_plane_t *plane = &pipe->planes[i]; if (plane->fb_changed || plane->position_changed || plane->size_changed) need_wait_for_vblank = true; ret = igt_plane_commit(plane, output, s, fail_on_error); CHECK_RETURN(ret, fail_on_error); } /* * If the crtc is enabled, wait until the next vblank before returning * if we made changes to any of the planes. */ if (need_wait_for_vblank && pipe->enabled) { igt_wait_for_vblank(display->drm_fd, pipe->pipe); } return 0; } /* * Commit all plane changes across all outputs of the display. * * If @fail_on_error is true, any failure to commit plane state will lead * to subtest failure in the specific function where the failure occurs. * Otherwise, the first error code encountered will be returned and no * further programming will take place, which may result in some changes * taking effect and others not taking effect. */ static int do_display_commit(igt_display_t *display, enum igt_commit_style s, bool fail_on_error) { int i, ret; LOG_INDENT(display, "commit"); igt_display_refresh(display); for (i = 0; i < display->n_outputs; i++) { igt_output_t *output = &display->outputs[i]; if (!output->valid) continue; ret = igt_output_commit(output, s, fail_on_error); CHECK_RETURN(ret, fail_on_error); } LOG_UNINDENT(display); igt_debug_wait_for_keypress("modeset"); return 0; } /** * igt_display_commit2: * @display: DRM device handle * @s: Commit style * * Commits framebuffer and positioning changes to all planes of each display * pipe, using a specific API to perform the programming. This function should * be used to exercise a specific driver programming API; igt_display_commit * should be used instead if the API used is unimportant to the test being run. * * This function should only be used to commit changes that are expected to * succeed, since any failure during the commit process will cause the IGT * subtest to fail. To commit changes that are expected to fail, use * @igt_try_display_commit2 instead. * * Returns: 0 upon success. This function will never return upon failure * since igt_fail() at lower levels will longjmp out of it. */ int igt_display_commit2(igt_display_t *display, enum igt_commit_style s) { do_display_commit(display, s, true); return 0; } /** * igt_display_try_commit2: * @display: DRM device handle * @s: Commit style * * Attempts to commit framebuffer and positioning changes to all planes of each * display pipe. This function should be used to commit changes that are * expected to fail, so that the error code can be checked for correctness. * For changes that are expected to succeed, use @igt_display_commit instead. * * Note that in non-atomic commit styles, no display programming will be * performed after the first failure is encountered, so only some of the * operations requested by a test may have been completed. Tests that catch * errors returned by this function should take care to restore the display to * a sane state after a failure is detected. * * Returns: 0 upon success, otherwise the error code of the first error * encountered. */ int igt_display_try_commit2(igt_display_t *display, enum igt_commit_style s) { return do_display_commit(display, s, false); } /** * igt_display_commit: * @display: DRM device handle * * Commits framebuffer and positioning changes to all planes of each display * pipe. * * Returns: 0 upon success. This function will never return upon failure * since igt_fail() at lower levels will longjmp out of it. */ int igt_display_commit(igt_display_t *display) { return igt_display_commit2(display, COMMIT_LEGACY); } const char *igt_output_name(igt_output_t *output) { return output->name; } drmModeModeInfo *igt_output_get_mode(igt_output_t *output) { return &output->config.default_mode; } /** * igt_output_override_mode: * @output: Output of which the mode will be overridden * @mode: New mode * * Overrides the output's mode with @mode, so that it is used instead of the * mode obtained with get connectors. Note that the mode is used without * checking if the output supports it, so this might lead to unexpected results. */ void igt_output_override_mode(igt_output_t *output, drmModeModeInfo *mode) { output->override_mode = *mode; output->use_override_mode = true; } void igt_output_set_pipe(igt_output_t *output, enum pipe pipe) { igt_display_t *display = output->display; if (pipe == PIPE_ANY) { LOG(display, "%s: set_pipe(any)\n", igt_output_name(output)); output->pending_crtc_idx_mask = -1UL; } else { LOG(display, "%s: set_pipe(%s)\n", igt_output_name(output), kmstest_pipe_name(pipe)); output->pending_crtc_idx_mask = 1 << pipe; } } igt_plane_t *igt_output_get_plane(igt_output_t *output, enum igt_plane plane) { igt_pipe_t *pipe; pipe = igt_output_get_driving_pipe(output); return igt_pipe_get_plane(pipe, plane); } void igt_plane_set_fb(igt_plane_t *plane, struct igt_fb *fb) { igt_pipe_t *pipe = plane->pipe; igt_display_t *display = pipe->display; LOG(display, "%s.%d: plane_set_fb(%d)\n", kmstest_pipe_name(pipe->pipe), plane->index, fb ? fb->fb_id : 0); plane->fb = fb; /* hack to keep tests working that don't call igt_plane_set_size() */ if (fb) { /* set default plane size as fb size */ plane->crtc_w = fb->width; plane->crtc_h = fb->height; /* set default src pos/size as fb size */ fb->src_x = 0; fb->src_y = 0; fb->src_w = fb->width; fb->src_h = fb->height; } else { plane->crtc_w = 0; plane->crtc_h = 0; } plane->fb_changed = true; plane->size_changed = true; } void igt_plane_set_position(igt_plane_t *plane, int x, int y) { igt_pipe_t *pipe = plane->pipe; igt_display_t *display = pipe->display; LOG(display, "%s.%d: plane_set_position(%d,%d)\n", kmstest_pipe_name(pipe->pipe), plane->index, x, y); plane->crtc_x = x; plane->crtc_y = y; plane->position_changed = true; } /** * igt_plane_set_size: * @plane: plane pointer for which size to be set * @w: width * @h: height * * This function sets width and height for requested plane. * New size will be committed at plane commit time via * drmModeSetPlane(). */ void igt_plane_set_size(igt_plane_t *plane, int w, int h) { igt_pipe_t *pipe = plane->pipe; igt_display_t *display = pipe->display; LOG(display, "%s.%d: plane_set_size (%dx%d)\n", kmstest_pipe_name(pipe->pipe), plane->index, w, h); plane->crtc_w = w; plane->crtc_h = h; plane->size_changed = true; } /** * igt_fb_set_position: * @fb: framebuffer pointer * @plane: plane * @x: X position * @y: Y position * * This function sets position for requested framebuffer as src to plane. * New position will be committed at plane commit time via drmModeSetPlane(). */ void igt_fb_set_position(struct igt_fb *fb, igt_plane_t *plane, uint32_t x, uint32_t y) { igt_pipe_t *pipe = plane->pipe; igt_display_t *display = pipe->display; LOG(display, "%s.%d: fb_set_position(%d,%d)\n", kmstest_pipe_name(pipe->pipe), plane->index, x, y); fb->src_x = x; fb->src_y = y; plane->fb_changed = true; } /** * igt_fb_set_size: * @fb: framebuffer pointer * @plane: plane * @w: width * @h: height * * This function sets fetch rect size from requested framebuffer as src * to plane. New size will be committed at plane commit time via * drmModeSetPlane(). */ void igt_fb_set_size(struct igt_fb *fb, igt_plane_t *plane, uint32_t w, uint32_t h) { igt_pipe_t *pipe = plane->pipe; igt_display_t *display = pipe->display; LOG(display, "%s.%d: fb_set_position(%dx%d)\n", kmstest_pipe_name(pipe->pipe), plane->index, w, h); fb->src_w = w; fb->src_h = h; plane->fb_changed = true; } void igt_plane_set_panning(igt_plane_t *plane, int x, int y) { igt_pipe_t *pipe = plane->pipe; igt_display_t *display = pipe->display; LOG(display, "%s.%d: plane_set_panning(%d,%d)\n", kmstest_pipe_name(pipe->pipe), plane->index, x, y); plane->pan_x = x; plane->pan_y = y; plane->panning_changed = true; } static const char *rotation_name(igt_rotation_t rotation) { switch (rotation) { case IGT_ROTATION_0: return "0°"; case IGT_ROTATION_90: return "90°"; case IGT_ROTATION_180: return "180°"; case IGT_ROTATION_270: return "270°"; default: igt_assert(0); } } void igt_plane_set_rotation(igt_plane_t *plane, igt_rotation_t rotation) { igt_pipe_t *pipe = plane->pipe; igt_display_t *display = pipe->display; LOG(display, "%s.%d: plane_set_rotation(%s)\n", kmstest_pipe_name(pipe->pipe), plane->index, rotation_name(rotation)); plane->rotation = rotation; plane->rotation_changed = true; } /** * igt_crtc_set_background: * @pipe: pipe pointer to which background color to be set * @background: background color value in BGR 16bpc * * Sets background color for requested pipe. Color value provided here * will be actually submitted at output commit time via "background_color" * property. * For example to get red as background, set background = 0x00000000FFFF. */ void igt_crtc_set_background(igt_pipe_t *pipe, uint64_t background) { igt_display_t *display = pipe->display; LOG(display, "%s.%d: crtc_set_background(%"PRIx64")\n", kmstest_pipe_name(pipe->pipe), pipe->pipe, background); pipe->background = background; pipe->background_changed = true; } void igt_wait_for_vblank(int drm_fd, enum pipe pipe) { drmVBlank wait_vbl; memset(&wait_vbl, 0, sizeof(wait_vbl)); wait_vbl.request.type = pipe << DRM_VBLANK_HIGH_CRTC_SHIFT | DRM_VBLANK_RELATIVE; wait_vbl.request.sequence = 1; igt_assert(drmWaitVBlank(drm_fd, &wait_vbl) == 0); } /** * igt_enable_connectors: * * Force connectors to be enabled where this is known to work well. Use * #igt_reset_connectors to revert the changes. * * An exit handler is installed to ensure connectors are reset when the test * exits. */ void igt_enable_connectors(void) { drmModeRes *res; drmModeConnector *c; int drm_fd; drm_fd = drm_open_driver(DRIVER_INTEL); res = drmModeGetResources(drm_fd); for (int i = 0; i < res->count_connectors; i++) { c = drmModeGetConnectorCurrent(drm_fd, res->connectors[i]); /* don't attempt to force connectors that are already connected */ if (c->connection == DRM_MODE_CONNECTED) continue; /* just enable VGA for now */ if (c->connector_type == DRM_MODE_CONNECTOR_VGA) { if (!kmstest_force_connector(drm_fd, c, FORCE_CONNECTOR_ON)) igt_info("Unable to force state on %s-%d\n", kmstest_connector_type_str(c->connector_type), c->connector_type_id); } drmModeFreeConnector(c); } close(drm_fd); } /** * igt_reset_connectors: * * Remove any forced state from the connectors. */ void igt_reset_connectors(void) { char **tmp; /* reset the connectors stored in forced_connectors, avoiding any * functions that are not safe to call in signal handlers */ for (tmp = forced_connectors; *tmp; tmp++) { int fd = igt_debugfs_open(*tmp, O_WRONLY | O_TRUNC); igt_assert(write(fd, "unspecified", 11) == 11); close(fd); } } intel-gpu-tools-1.14/lib/igt_pm.h0000644000175000017500000000254312665336131013632 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ #ifndef IGT_PM_H #define IGT_PM_H void igt_pm_enable_audio_runtime_pm(void); int8_t *igt_pm_enable_sata_link_power_management(void); void igt_pm_restore_sata_link_power_management(int8_t *pm_data); #endif /* IGT_PM_H */ intel-gpu-tools-1.14/lib/media_fill_gen7.c0000644000175000017500000002073612665336131015357 00000000000000#include #include #include "media_fill.h" #include "gen7_media.h" #include "intel_reg.h" #include "drmtest.h" #include static const uint32_t media_kernel[][4] = { { 0x00400001, 0x20200231, 0x00000020, 0x00000000 }, { 0x00600001, 0x20800021, 0x008d0000, 0x00000000 }, { 0x00200001, 0x20800021, 0x00450040, 0x00000000 }, { 0x00000001, 0x20880061, 0x00000000, 0x000f000f }, { 0x00800001, 0x20a00021, 0x00000020, 0x00000000 }, { 0x00800001, 0x20e00021, 0x00000020, 0x00000000 }, { 0x00800001, 0x21200021, 0x00000020, 0x00000000 }, { 0x00800001, 0x21600021, 0x00000020, 0x00000000 }, { 0x05800031, 0x24001ca8, 0x00000080, 0x120a8000 }, { 0x00600001, 0x2e000021, 0x008d0000, 0x00000000 }, { 0x07800031, 0x20001ca8, 0x00000e00, 0x82000010 }, }; static uint32_t batch_used(struct intel_batchbuffer *batch) { return batch->ptr - batch->buffer; } static uint32_t batch_align(struct intel_batchbuffer *batch, uint32_t align) { uint32_t offset = batch_used(batch); offset = ALIGN(offset, align); batch->ptr = batch->buffer + offset; return offset; } static void * batch_alloc(struct intel_batchbuffer *batch, uint32_t size, uint32_t align) { uint32_t offset = batch_align(batch, align); batch->ptr += size; return memset(batch->buffer + offset, 0, size); } static uint32_t batch_offset(struct intel_batchbuffer *batch, void *ptr) { return (uint8_t *)ptr - batch->buffer; } static uint32_t batch_copy(struct intel_batchbuffer *batch, const void *ptr, uint32_t size, uint32_t align) { return batch_offset(batch, memcpy(batch_alloc(batch, size, align), ptr, size)); } static void gen7_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end) { int ret; ret = drm_intel_bo_subdata(batch->bo, 0, 4096, batch->buffer); if (ret == 0) ret = drm_intel_bo_mrb_exec(batch->bo, batch_end, NULL, 0, 0, 0); igt_assert(ret == 0); } static uint32_t gen7_fill_curbe_buffer_data(struct intel_batchbuffer *batch, uint8_t color) { uint8_t *curbe_buffer; uint32_t offset; curbe_buffer = batch_alloc(batch, sizeof(uint32_t) * 8, 64); offset = batch_offset(batch, curbe_buffer); *curbe_buffer = color; return offset; } static uint32_t gen7_fill_surface_state(struct intel_batchbuffer *batch, struct igt_buf *buf, uint32_t format, int is_dst) { struct gen7_surface_state *ss; uint32_t write_domain, read_domain, offset; int ret; if (is_dst) { write_domain = read_domain = I915_GEM_DOMAIN_RENDER; } else { write_domain = 0; read_domain = I915_GEM_DOMAIN_SAMPLER; } ss = batch_alloc(batch, sizeof(*ss), 64); offset = batch_offset(batch, ss); ss->ss0.surface_type = GEN7_SURFACE_2D; ss->ss0.surface_format = format; ss->ss0.render_cache_read_write = 1; if (buf->tiling == I915_TILING_X) ss->ss0.tiled_mode = 2; else if (buf->tiling == I915_TILING_Y) ss->ss0.tiled_mode = 3; ss->ss1.base_addr = buf->bo->offset; ret = drm_intel_bo_emit_reloc(batch->bo, batch_offset(batch, ss) + 4, buf->bo, 0, read_domain, write_domain); igt_assert(ret == 0); ss->ss2.height = igt_buf_height(buf) - 1; ss->ss2.width = igt_buf_width(buf) - 1; ss->ss3.pitch = buf->stride - 1; ss->ss7.shader_chanel_select_r = 4; ss->ss7.shader_chanel_select_g = 5; ss->ss7.shader_chanel_select_b = 6; ss->ss7.shader_chanel_select_a = 7; return offset; } static uint32_t gen7_fill_binding_table(struct intel_batchbuffer *batch, struct igt_buf *dst) { uint32_t *binding_table, offset; binding_table = batch_alloc(batch, 32, 64); offset = batch_offset(batch, binding_table); binding_table[0] = gen7_fill_surface_state(batch, dst, GEN7_SURFACEFORMAT_R8_UNORM, 1); return offset; } static uint32_t gen7_fill_media_kernel(struct intel_batchbuffer *batch, const uint32_t kernel[][4], size_t size) { uint32_t offset; offset = batch_copy(batch, kernel, size, 64); return offset; } static uint32_t gen7_fill_interface_descriptor(struct intel_batchbuffer *batch, struct igt_buf *dst, const uint32_t kernel[][4], size_t size) { struct gen7_interface_descriptor_data *idd; uint32_t offset; uint32_t binding_table_offset, kernel_offset; binding_table_offset = gen7_fill_binding_table(batch, dst); kernel_offset = gen7_fill_media_kernel(batch, kernel, size); idd = batch_alloc(batch, sizeof(*idd), 64); offset = batch_offset(batch, idd); idd->desc0.kernel_start_pointer = (kernel_offset >> 6); idd->desc1.single_program_flow = 1; idd->desc1.floating_point_mode = GEN7_FLOATING_POINT_IEEE_754; idd->desc2.sampler_count = 0; /* 0 samplers used */ idd->desc2.sampler_state_pointer = 0; idd->desc3.binding_table_entry_count = 0; idd->desc3.binding_table_pointer = (binding_table_offset >> 5); idd->desc4.constant_urb_entry_read_offset = 0; idd->desc4.constant_urb_entry_read_length = 1; /* grf 1 */ return offset; } static void gen7_emit_state_base_address(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_STATE_BASE_ADDRESS | (10 - 2)); /* general */ OUT_BATCH(0); /* surface */ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* dynamic */ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* indirect */ OUT_BATCH(0); /* instruction */ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* general/dynamic/indirect/instruction access Bound */ OUT_BATCH(0); OUT_BATCH(0 | BASE_ADDRESS_MODIFY); OUT_BATCH(0); OUT_BATCH(0 | BASE_ADDRESS_MODIFY); } static void gen7_emit_vfe_state(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_MEDIA_VFE_STATE | (8 - 2)); /* scratch buffer */ OUT_BATCH(0); /* number of threads & urb entries */ OUT_BATCH(1 << 16 | 2 << 8); OUT_BATCH(0); /* urb entry size & curbe size */ OUT_BATCH(2 << 16 | /* in 256 bits unit */ 2); /* in 256 bits unit */ /* scoreboard */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } static void gen7_emit_curbe_load(struct intel_batchbuffer *batch, uint32_t curbe_buffer) { OUT_BATCH(GEN7_MEDIA_CURBE_LOAD | (4 - 2)); OUT_BATCH(0); /* curbe total data length */ OUT_BATCH(64); /* curbe data start address, is relative to the dynamics base address */ OUT_BATCH(curbe_buffer); } static void gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch, uint32_t interface_descriptor) { OUT_BATCH(GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD | (4 - 2)); OUT_BATCH(0); /* interface descriptor data length */ OUT_BATCH(sizeof(struct gen7_interface_descriptor_data)); /* interface descriptor address, is relative to the dynamics base address */ OUT_BATCH(interface_descriptor); } static void gen7_emit_media_objects(struct intel_batchbuffer *batch, unsigned x, unsigned y, unsigned width, unsigned height) { int i, j; for (i = 0; i < width / 16; i++) { for (j = 0; j < height / 16; j++) { OUT_BATCH(GEN7_MEDIA_OBJECT | (8 - 2)); /* interface descriptor offset */ OUT_BATCH(0); /* without indirect data */ OUT_BATCH(0); OUT_BATCH(0); /* scoreboard */ OUT_BATCH(0); OUT_BATCH(0); /* inline data (xoffset, yoffset) */ OUT_BATCH(x + i * 16); OUT_BATCH(y + j * 16); } } } /* * This sets up the media pipeline, * * +---------------+ <---- 4096 * | ^ | * | | | * | various | * | state | * | | | * |_______|_______| <---- 2048 + ? * | ^ | * | | | * | batch | * | commands | * | | | * | | | * +---------------+ <---- 0 + ? * */ #define BATCH_STATE_SPLIT 2048 void gen7_media_fillfunc(struct intel_batchbuffer *batch, struct igt_buf *dst, unsigned x, unsigned y, unsigned width, unsigned height, uint8_t color) { uint32_t curbe_buffer, interface_descriptor; uint32_t batch_end; intel_batchbuffer_flush(batch); /* setup states */ batch->ptr = &batch->buffer[BATCH_STATE_SPLIT]; curbe_buffer = gen7_fill_curbe_buffer_data(batch, color); interface_descriptor = gen7_fill_interface_descriptor(batch, dst, media_kernel, sizeof(media_kernel)); igt_assert(batch->ptr < &batch->buffer[4095]); /* media pipeline */ batch->ptr = batch->buffer; OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA); gen7_emit_state_base_address(batch); gen7_emit_vfe_state(batch); gen7_emit_curbe_load(batch, curbe_buffer); gen7_emit_interface_descriptor_load(batch, interface_descriptor); gen7_emit_media_objects(batch, x, y, width, height); OUT_BATCH(MI_BATCH_BUFFER_END); batch_end = batch_align(batch, 8); igt_assert(batch_end < BATCH_STATE_SPLIT); gen7_render_flush(batch, batch_end); intel_batchbuffer_reset(batch); } intel-gpu-tools-1.14/lib/drmtest.h0000644000175000017500000000724012665336131014034 00000000000000/* * Copyright © 2007 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * */ #ifndef DRMTEST_H #define DRMTEST_H #include #include #include #include #include #include #include "intel_batchbuffer.h" #define DRIVER_ANY 0x1 #define DRIVER_INTEL (0x1 << 1) #define DRIVER_VC4 (0x1 << 2) #ifdef ANDROID #if (!(defined HAVE_MMAP64)) && (!(defined __x86_64__)) extern void* __mmap2(void *, size_t, int, int, int, off_t); /* mmap64 is a recent addition to bionic and not available in all android builds. */ /* I can find no reliable way to know if it is defined or not - so just avoid it */ #define mmap64 igt_mmap64 static inline void *igt_mmap64(void *addr, size_t length, int prot, int flags, int fd, off64_t offset) { return __mmap2(addr, length, prot, flags, fd, offset >> 12); } #endif #endif /** * ARRAY_SIZE: * @arr: static array * * Macro to compute the size of the static array @arr. */ #define ARRAY_SIZE(arr) (sizeof(arr)/sizeof(arr[0])) /** * ALIGN: * @v: value to be aligned * @a: alignment unit in bytes * * Macro to align a value @v to a specified unit @a. */ #define ALIGN(v, a) (((v) + (a)-1) & ~((a)-1)) int drm_get_card(void); int drm_open_driver(int chipset); int drm_open_driver_master(int chipset); int drm_open_driver_render(int chipset); int __drm_open_driver(int chipset); void gem_quiescent_gpu(int fd); /** * do_or_die: * @x: command * * Simple macro to execute x and check that it's return value is 0. Presumes * that in any failure case the return value is non-zero and a precise error is * logged into errno. Uses igt_assert() internally. */ #define do_or_die(x) igt_assert((x) == 0) /** * do_ioctl: * @fd: open i915 drm file descriptor * @ioc: ioctl op definition from drm headers * @ioc_data: data pointer for the ioctl operation * * This macro wraps drmIoctl() and uses igt_assert to check that it has been * successfully executed. */ #define do_ioctl(fd, ioc, ioc_data) do { \ igt_assert_eq(drmIoctl((fd), (ioc), (ioc_data)), 0); \ errno = 0; \ } while (0) /** * do_ioctl_err: * @fd: open i915 drm file descriptor * @ioc: ioctl op definition from drm headers * @ioc_data: data pointer for the ioctl operation * @err: value to expect in errno * * This macro wraps drmIoctl() and uses igt_assert to check that it fails, * returning a particular value in errno. */ #define do_ioctl_err(fd, ioc, ioc_data, err) do { \ igt_assert_eq(drmIoctl((fd), (ioc), (ioc_data)), -1); \ igt_assert_eq(errno, err); \ errno = 0; \ } while (0) #endif /* DRMTEST_H */ intel-gpu-tools-1.14/lib/i915_3d.h0000644000175000017500000005520412665336131013432 00000000000000/* -*- c-basic-offset: 4 -*- */ /* * Copyright © 2006,2010 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Eric Anholt * Chris Wilson * */ /* Each instruction is 3 dwords long, though most don't require all * this space. Maximum of 123 instructions. Smaller maxes per insn * type. */ #define _3DSTATE_PIXEL_SHADER_PROGRAM (CMD_3D|(0x1d<<24)|(0x5<<16)) #define REG_TYPE_R 0 /* temporary regs, no need to * dcl, must be written before * read -- Preserved between * phases. */ #define REG_TYPE_T 1 /* Interpolated values, must be * dcl'ed before use. * * 0..7: texture coord, * 8: diffuse spec, * 9: specular color, * 10: fog parameter in w. */ #define REG_TYPE_CONST 2 /* Restriction: only one const * can be referenced per * instruction, though it may be * selected for multiple inputs. * Constants not initialized * default to zero. */ #define REG_TYPE_S 3 /* sampler */ #define REG_TYPE_OC 4 /* output color (rgba) */ #define REG_TYPE_OD 5 /* output depth (w), xyz are * temporaries. If not written, * interpolated depth is used? */ #define REG_TYPE_U 6 /* unpreserved temporaries */ #define REG_TYPE_MASK 0x7 #define REG_TYPE_SHIFT 4 #define REG_NR_MASK 0xf /* REG_TYPE_T: */ #define T_TEX0 0 #define T_TEX1 1 #define T_TEX2 2 #define T_TEX3 3 #define T_TEX4 4 #define T_TEX5 5 #define T_TEX6 6 #define T_TEX7 7 #define T_DIFFUSE 8 #define T_SPECULAR 9 #define T_FOG_W 10 /* interpolated fog is in W coord */ /* Arithmetic instructions */ /* .replicate_swizzle == selection and replication of a particular * scalar channel, ie., .xxxx, .yyyy, .zzzz or .wwww */ #define A0_NOP (0x0<<24) /* no operation */ #define A0_ADD (0x1<<24) /* dst = src0 + src1 */ #define A0_MOV (0x2<<24) /* dst = src0 */ #define A0_MUL (0x3<<24) /* dst = src0 * src1 */ #define A0_MAD (0x4<<24) /* dst = src0 * src1 + src2 */ #define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */ #define A0_DP3 (0x6<<24) /* dst.xyzw = src0.xyz dot src1.xyz */ #define A0_DP4 (0x7<<24) /* dst.xyzw = src0.xyzw dot src1.xyzw */ #define A0_FRC (0x8<<24) /* dst = src0 - floor(src0) */ #define A0_RCP (0x9<<24) /* dst.xyzw = 1/(src0.replicate_swizzle) */ #define A0_RSQ (0xa<<24) /* dst.xyzw = 1/(sqrt(abs(src0.replicate_swizzle))) */ #define A0_EXP (0xb<<24) /* dst.xyzw = exp2(src0.replicate_swizzle) */ #define A0_LOG (0xc<<24) /* dst.xyzw = log2(abs(src0.replicate_swizzle)) */ #define A0_CMP (0xd<<24) /* dst = (src0 >= 0.0) ? src1 : src2 */ #define A0_MIN (0xe<<24) /* dst = (src0 < src1) ? src0 : src1 */ #define A0_MAX (0xf<<24) /* dst = (src0 >= src1) ? src0 : src1 */ #define A0_FLR (0x10<<24) /* dst = floor(src0) */ #define A0_MOD (0x11<<24) /* dst = src0 fmod 1.0 */ #define A0_TRC (0x12<<24) /* dst = int(src0) */ #define A0_SGE (0x13<<24) /* dst = src0 >= src1 ? 1.0 : 0.0 */ #define A0_SLT (0x14<<24) /* dst = src0 < src1 ? 1.0 : 0.0 */ #define A0_DEST_SATURATE (1<<22) #define A0_DEST_TYPE_SHIFT 19 /* Allow: R, OC, OD, U */ #define A0_DEST_NR_SHIFT 14 /* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */ #define A0_DEST_CHANNEL_X (1<<10) #define A0_DEST_CHANNEL_Y (2<<10) #define A0_DEST_CHANNEL_Z (4<<10) #define A0_DEST_CHANNEL_W (8<<10) #define A0_DEST_CHANNEL_ALL (0xf<<10) #define A0_DEST_CHANNEL_SHIFT 10 #define A0_SRC0_TYPE_SHIFT 7 #define A0_SRC0_NR_SHIFT 2 #define A0_DEST_CHANNEL_XY (A0_DEST_CHANNEL_X|A0_DEST_CHANNEL_Y) #define A0_DEST_CHANNEL_XYZ (A0_DEST_CHANNEL_XY|A0_DEST_CHANNEL_Z) #define SRC_X 0 #define SRC_Y 1 #define SRC_Z 2 #define SRC_W 3 #define SRC_ZERO 4 #define SRC_ONE 5 #define A1_SRC0_CHANNEL_X_NEGATE (1<<31) #define A1_SRC0_CHANNEL_X_SHIFT 28 #define A1_SRC0_CHANNEL_Y_NEGATE (1<<27) #define A1_SRC0_CHANNEL_Y_SHIFT 24 #define A1_SRC0_CHANNEL_Z_NEGATE (1<<23) #define A1_SRC0_CHANNEL_Z_SHIFT 20 #define A1_SRC0_CHANNEL_W_NEGATE (1<<19) #define A1_SRC0_CHANNEL_W_SHIFT 16 #define A1_SRC1_TYPE_SHIFT 13 #define A1_SRC1_NR_SHIFT 8 #define A1_SRC1_CHANNEL_X_NEGATE (1<<7) #define A1_SRC1_CHANNEL_X_SHIFT 4 #define A1_SRC1_CHANNEL_Y_NEGATE (1<<3) #define A1_SRC1_CHANNEL_Y_SHIFT 0 #define A2_SRC1_CHANNEL_Z_NEGATE (1<<31) #define A2_SRC1_CHANNEL_Z_SHIFT 28 #define A2_SRC1_CHANNEL_W_NEGATE (1<<27) #define A2_SRC1_CHANNEL_W_SHIFT 24 #define A2_SRC2_TYPE_SHIFT 21 #define A2_SRC2_NR_SHIFT 16 #define A2_SRC2_CHANNEL_X_NEGATE (1<<15) #define A2_SRC2_CHANNEL_X_SHIFT 12 #define A2_SRC2_CHANNEL_Y_NEGATE (1<<11) #define A2_SRC2_CHANNEL_Y_SHIFT 8 #define A2_SRC2_CHANNEL_Z_NEGATE (1<<7) #define A2_SRC2_CHANNEL_Z_SHIFT 4 #define A2_SRC2_CHANNEL_W_NEGATE (1<<3) #define A2_SRC2_CHANNEL_W_SHIFT 0 /* Texture instructions */ #define T0_TEXLD (0x15<<24) /* Sample texture using predeclared * sampler and address, and output * filtered texel data to destination * register */ #define T0_TEXLDP (0x16<<24) /* Same as texld but performs a * perspective divide of the texture * coordinate .xyz values by .w before * sampling. */ #define T0_TEXLDB (0x17<<24) /* Same as texld but biases the * computed LOD by w. Only S4.6 two's * comp is used. This implies that a * float to fixed conversion is * done. */ #define T0_TEXKILL (0x18<<24) /* Does not perform a sampling * operation. Simply kills the pixel * if any channel of the address * register is < 0.0. */ #define T0_DEST_TYPE_SHIFT 19 /* Allow: R, OC, OD, U */ /* Note: U (unpreserved) regs do not retain their values between * phases (cannot be used for feedback) * * Note: oC and OD registers can only be used as the destination of a * texture instruction once per phase (this is an implementation * restriction). */ #define T0_DEST_NR_SHIFT 14 /* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */ #define T0_SAMPLER_NR_SHIFT 0 /* This field ignored for TEXKILL */ #define T0_SAMPLER_NR_MASK (0xf<<0) #define T1_ADDRESS_REG_TYPE_SHIFT 24 /* Reg to use as texture coord */ /* Allow R, T, OC, OD -- R, OC, OD are 'dependent' reads, new program phase */ #define T1_ADDRESS_REG_NR_SHIFT 17 #define T2_MBZ 0 /* Declaration instructions */ #define D0_DCL (0x19<<24) /* Declare a t (interpolated attrib) * register or an s (sampler) * register. */ #define D0_SAMPLE_TYPE_SHIFT 22 #define D0_SAMPLE_TYPE_2D (0x0<<22) #define D0_SAMPLE_TYPE_CUBE (0x1<<22) #define D0_SAMPLE_TYPE_VOLUME (0x2<<22) #define D0_SAMPLE_TYPE_MASK (0x3<<22) #define D0_TYPE_SHIFT 19 /* Allow: T, S */ #define D0_NR_SHIFT 14 /* Allow T: 0..10, S: 0..15 */ #define D0_CHANNEL_X (1<<10) #define D0_CHANNEL_Y (2<<10) #define D0_CHANNEL_Z (4<<10) #define D0_CHANNEL_W (8<<10) #define D0_CHANNEL_ALL (0xf<<10) #define D0_CHANNEL_NONE (0<<10) #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y) #define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z) /* I915 Errata: Do not allow (xz), (xw), (xzw) combinations for diffuse * or specular declarations. * * For T dcls, only allow: (x), (xy), (xyz), (w), (xyzw) * * Must be zero for S (sampler) dcls */ #define D1_MBZ 0 #define D2_MBZ 0 /* MASK_* are the unshifted bitmasks of the destination mask in arithmetic * operations */ #define MASK_X 0x1 #define MASK_Y 0x2 #define MASK_Z 0x4 #define MASK_W 0x8 #define MASK_XYZ (MASK_X | MASK_Y | MASK_Z) #define MASK_XYZW (MASK_XYZ | MASK_W) #define MASK_SATURATE 0x10 /* Temporary, undeclared regs. Preserved between phases */ #define FS_R0 ((REG_TYPE_R << REG_TYPE_SHIFT) | 0) #define FS_R1 ((REG_TYPE_R << REG_TYPE_SHIFT) | 1) #define FS_R2 ((REG_TYPE_R << REG_TYPE_SHIFT) | 2) #define FS_R3 ((REG_TYPE_R << REG_TYPE_SHIFT) | 3) /* Texture coordinate regs. Must be declared. */ #define FS_T0 ((REG_TYPE_T << REG_TYPE_SHIFT) | 0) #define FS_T1 ((REG_TYPE_T << REG_TYPE_SHIFT) | 1) #define FS_T2 ((REG_TYPE_T << REG_TYPE_SHIFT) | 2) #define FS_T3 ((REG_TYPE_T << REG_TYPE_SHIFT) | 3) #define FS_T4 ((REG_TYPE_T << REG_TYPE_SHIFT) | 4) #define FS_T5 ((REG_TYPE_T << REG_TYPE_SHIFT) | 5) #define FS_T6 ((REG_TYPE_T << REG_TYPE_SHIFT) | 6) #define FS_T7 ((REG_TYPE_T << REG_TYPE_SHIFT) | 7) #define FS_T8 ((REG_TYPE_T << REG_TYPE_SHIFT) | 8) #define FS_T9 ((REG_TYPE_T << REG_TYPE_SHIFT) | 9) #define FS_T10 ((REG_TYPE_T << REG_TYPE_SHIFT) | 10) /* Constant values */ #define FS_C0 ((REG_TYPE_CONST << REG_TYPE_SHIFT) | 0) #define FS_C1 ((REG_TYPE_CONST << REG_TYPE_SHIFT) | 1) #define FS_C2 ((REG_TYPE_CONST << REG_TYPE_SHIFT) | 2) #define FS_C3 ((REG_TYPE_CONST << REG_TYPE_SHIFT) | 3) #define FS_C4 ((REG_TYPE_CONST << REG_TYPE_SHIFT) | 4) #define FS_C5 ((REG_TYPE_CONST << REG_TYPE_SHIFT) | 5) #define FS_C6 ((REG_TYPE_CONST << REG_TYPE_SHIFT) | 6) #define FS_C7 ((REG_TYPE_CONST << REG_TYPE_SHIFT) | 7) /* Sampler regs */ #define FS_S0 ((REG_TYPE_S << REG_TYPE_SHIFT) | 0) #define FS_S1 ((REG_TYPE_S << REG_TYPE_SHIFT) | 1) #define FS_S2 ((REG_TYPE_S << REG_TYPE_SHIFT) | 2) #define FS_S3 ((REG_TYPE_S << REG_TYPE_SHIFT) | 3) /* Output color */ #define FS_OC ((REG_TYPE_OC << REG_TYPE_SHIFT) | 0) /* Output depth */ #define FS_OD ((REG_TYPE_OD << REG_TYPE_SHIFT) | 0) /* Unpreserved temporary regs */ #define FS_U0 ((REG_TYPE_U << REG_TYPE_SHIFT) | 0) #define FS_U1 ((REG_TYPE_U << REG_TYPE_SHIFT) | 1) #define FS_U2 ((REG_TYPE_U << REG_TYPE_SHIFT) | 2) #define FS_U3 ((REG_TYPE_U << REG_TYPE_SHIFT) | 3) #define X_CHANNEL_SHIFT (REG_TYPE_SHIFT + 3) #define Y_CHANNEL_SHIFT (X_CHANNEL_SHIFT + 4) #define Z_CHANNEL_SHIFT (Y_CHANNEL_SHIFT + 4) #define W_CHANNEL_SHIFT (Z_CHANNEL_SHIFT + 4) #define REG_CHANNEL_MASK 0xf #define REG_NR(reg) ((reg) & REG_NR_MASK) #define REG_TYPE(reg) (((reg) >> REG_TYPE_SHIFT) & REG_TYPE_MASK) #define REG_X(reg) (((reg) >> X_CHANNEL_SHIFT) & REG_CHANNEL_MASK) #define REG_Y(reg) (((reg) >> Y_CHANNEL_SHIFT) & REG_CHANNEL_MASK) #define REG_Z(reg) (((reg) >> Z_CHANNEL_SHIFT) & REG_CHANNEL_MASK) #define REG_W(reg) (((reg) >> W_CHANNEL_SHIFT) & REG_CHANNEL_MASK) enum i915_fs_channel { X_CHANNEL_VAL = 0, Y_CHANNEL_VAL, Z_CHANNEL_VAL, W_CHANNEL_VAL, ZERO_CHANNEL_VAL, ONE_CHANNEL_VAL, NEG_X_CHANNEL_VAL = X_CHANNEL_VAL | 0x8, NEG_Y_CHANNEL_VAL = Y_CHANNEL_VAL | 0x8, NEG_Z_CHANNEL_VAL = Z_CHANNEL_VAL | 0x8, NEG_W_CHANNEL_VAL = W_CHANNEL_VAL | 0x8, NEG_ONE_CHANNEL_VAL = ONE_CHANNEL_VAL | 0x8 }; #define i915_fs_operand(reg, x, y, z, w) \ (reg) | \ (x##_CHANNEL_VAL << X_CHANNEL_SHIFT) | \ (y##_CHANNEL_VAL << Y_CHANNEL_SHIFT) | \ (z##_CHANNEL_VAL << Z_CHANNEL_SHIFT) | \ (w##_CHANNEL_VAL << W_CHANNEL_SHIFT) /* * Construct an operand description for using a register with no swizzling */ #define i915_fs_operand_reg(reg) \ i915_fs_operand(reg, X, Y, Z, W) #define i915_fs_operand_reg_negate(reg) \ i915_fs_operand(reg, NEG_X, NEG_Y, NEG_Z, NEG_W) /* * Returns an operand containing (0.0, 0.0, 0.0, 0.0). */ #define i915_fs_operand_zero() i915_fs_operand(FS_R0, ZERO, ZERO, ZERO, ZERO) /* * Returns an unused operand */ #define i915_fs_operand_none() i915_fs_operand_zero() /* * Returns an operand containing (1.0, 1.0, 1.0, 1.0). */ #define i915_fs_operand_one() i915_fs_operand(FS_R0, ONE, ONE, ONE, ONE) #define i915_get_hardware_channel_val(val, shift, negate) \ (((val & 0x7) << shift) | ((val & 0x8) ? negate : 0)) /* * Outputs a fragment shader command to declare a sampler or texture register. */ #define i915_fs_dcl(reg) \ do { \ OUT_BATCH(D0_DCL | \ (REG_TYPE(reg) << D0_TYPE_SHIFT) | \ (REG_NR(reg) << D0_NR_SHIFT) | \ ((REG_TYPE(reg) != REG_TYPE_S) ? D0_CHANNEL_ALL : 0)); \ OUT_BATCH(0); \ OUT_BATCH(0); \ } while (0) #define i915_fs_texld(dest_reg, sampler_reg, address_reg) \ do { \ OUT_BATCH(T0_TEXLD | \ (REG_TYPE(dest_reg) << T0_DEST_TYPE_SHIFT) | \ (REG_NR(dest_reg) << T0_DEST_NR_SHIFT) | \ (REG_NR(sampler_reg) << T0_SAMPLER_NR_SHIFT)); \ OUT_BATCH((REG_TYPE(address_reg) << T1_ADDRESS_REG_TYPE_SHIFT) | \ (REG_NR(address_reg) << T1_ADDRESS_REG_NR_SHIFT)); \ OUT_BATCH(0); \ } while (0) #define i915_fs_texldp(dest_reg, sampler_reg, address_reg) \ do { \ OUT_BATCH(T0_TEXLDP | \ (REG_TYPE(dest_reg) << T0_DEST_TYPE_SHIFT) | \ (REG_NR(dest_reg) << T0_DEST_NR_SHIFT) | \ (REG_NR(sampler_reg) << T0_SAMPLER_NR_SHIFT)); \ OUT_BATCH((REG_TYPE(address_reg) << T1_ADDRESS_REG_TYPE_SHIFT) | \ (REG_NR(address_reg) << T1_ADDRESS_REG_NR_SHIFT)); \ OUT_BATCH(0); \ } while (0) #define i915_fs_arith_masked(op, dest_reg, dest_mask, operand0, operand1, operand2) \ _i915_fs_arith_masked(A0_##op, dest_reg, dest_mask, operand0, operand1, operand2) #define i915_fs_arith(op, dest_reg, operand0, operand1, operand2) \ _i915_fs_arith(A0_##op, dest_reg, operand0, operand1, operand2) #define _i915_fs_arith_masked(cmd, dest_reg, dest_mask, operand0, operand1, operand2) \ do { \ /* Set up destination register and write mask */ \ OUT_BATCH(cmd | \ (REG_TYPE(dest_reg) << A0_DEST_TYPE_SHIFT) | \ (REG_NR(dest_reg) << A0_DEST_NR_SHIFT) | \ (((dest_mask) & ~MASK_SATURATE) << A0_DEST_CHANNEL_SHIFT) | \ (((dest_mask) & MASK_SATURATE) ? A0_DEST_SATURATE : 0) | \ /* Set up operand 0 */ \ (REG_TYPE(operand0) << A0_SRC0_TYPE_SHIFT) | \ (REG_NR(operand0) << A0_SRC0_NR_SHIFT)); \ OUT_BATCH(i915_get_hardware_channel_val(REG_X(operand0), \ A1_SRC0_CHANNEL_X_SHIFT, \ A1_SRC0_CHANNEL_X_NEGATE) | \ i915_get_hardware_channel_val(REG_Y(operand0), \ A1_SRC0_CHANNEL_Y_SHIFT, \ A1_SRC0_CHANNEL_Y_NEGATE) | \ i915_get_hardware_channel_val(REG_Z(operand0), \ A1_SRC0_CHANNEL_Z_SHIFT, \ A1_SRC0_CHANNEL_Z_NEGATE) | \ i915_get_hardware_channel_val(REG_W(operand0), \ A1_SRC0_CHANNEL_W_SHIFT, \ A1_SRC0_CHANNEL_W_NEGATE) | \ /* Set up operand 1 */ \ (REG_TYPE(operand1) << A1_SRC1_TYPE_SHIFT) | \ (REG_NR(operand1) << A1_SRC1_NR_SHIFT) | \ i915_get_hardware_channel_val(REG_X(operand1), \ A1_SRC1_CHANNEL_X_SHIFT, \ A1_SRC1_CHANNEL_X_NEGATE) | \ i915_get_hardware_channel_val(REG_Y(operand1), \ A1_SRC1_CHANNEL_Y_SHIFT, \ A1_SRC1_CHANNEL_Y_NEGATE)); \ OUT_BATCH(i915_get_hardware_channel_val(REG_Z(operand1), \ A2_SRC1_CHANNEL_Z_SHIFT, \ A2_SRC1_CHANNEL_Z_NEGATE) | \ i915_get_hardware_channel_val(REG_W(operand1), \ A2_SRC1_CHANNEL_W_SHIFT, \ A2_SRC1_CHANNEL_W_NEGATE) | \ /* Set up operand 2 */ \ (REG_TYPE(operand2) << A2_SRC2_TYPE_SHIFT) | \ (REG_NR(operand2) << A2_SRC2_NR_SHIFT) | \ i915_get_hardware_channel_val(REG_X(operand2), \ A2_SRC2_CHANNEL_X_SHIFT, \ A2_SRC2_CHANNEL_X_NEGATE) | \ i915_get_hardware_channel_val(REG_Y(operand2), \ A2_SRC2_CHANNEL_Y_SHIFT, \ A2_SRC2_CHANNEL_Y_NEGATE) | \ i915_get_hardware_channel_val(REG_Z(operand2), \ A2_SRC2_CHANNEL_Z_SHIFT, \ A2_SRC2_CHANNEL_Z_NEGATE) | \ i915_get_hardware_channel_val(REG_W(operand2), \ A2_SRC2_CHANNEL_W_SHIFT, \ A2_SRC2_CHANNEL_W_NEGATE)); \ } while (0) #define _i915_fs_arith(cmd, dest_reg, operand0, operand1, operand2) do {\ /* Set up destination register and write mask */ \ OUT_BATCH(cmd | \ (REG_TYPE(dest_reg) << A0_DEST_TYPE_SHIFT) | \ (REG_NR(dest_reg) << A0_DEST_NR_SHIFT) | \ (A0_DEST_CHANNEL_ALL) | \ /* Set up operand 0 */ \ (REG_TYPE(operand0) << A0_SRC0_TYPE_SHIFT) | \ (REG_NR(operand0) << A0_SRC0_NR_SHIFT)); \ OUT_BATCH(i915_get_hardware_channel_val(REG_X(operand0), \ A1_SRC0_CHANNEL_X_SHIFT, \ A1_SRC0_CHANNEL_X_NEGATE) | \ i915_get_hardware_channel_val(REG_Y(operand0), \ A1_SRC0_CHANNEL_Y_SHIFT, \ A1_SRC0_CHANNEL_Y_NEGATE) | \ i915_get_hardware_channel_val(REG_Z(operand0), \ A1_SRC0_CHANNEL_Z_SHIFT, \ A1_SRC0_CHANNEL_Z_NEGATE) | \ i915_get_hardware_channel_val(REG_W(operand0), \ A1_SRC0_CHANNEL_W_SHIFT, \ A1_SRC0_CHANNEL_W_NEGATE) | \ /* Set up operand 1 */ \ (REG_TYPE(operand1) << A1_SRC1_TYPE_SHIFT) | \ (REG_NR(operand1) << A1_SRC1_NR_SHIFT) | \ i915_get_hardware_channel_val(REG_X(operand1), \ A1_SRC1_CHANNEL_X_SHIFT, \ A1_SRC1_CHANNEL_X_NEGATE) | \ i915_get_hardware_channel_val(REG_Y(operand1), \ A1_SRC1_CHANNEL_Y_SHIFT, \ A1_SRC1_CHANNEL_Y_NEGATE)); \ OUT_BATCH(i915_get_hardware_channel_val(REG_Z(operand1), \ A2_SRC1_CHANNEL_Z_SHIFT, \ A2_SRC1_CHANNEL_Z_NEGATE) | \ i915_get_hardware_channel_val(REG_W(operand1), \ A2_SRC1_CHANNEL_W_SHIFT, \ A2_SRC1_CHANNEL_W_NEGATE) | \ /* Set up operand 2 */ \ (REG_TYPE(operand2) << A2_SRC2_TYPE_SHIFT) | \ (REG_NR(operand2) << A2_SRC2_NR_SHIFT) | \ i915_get_hardware_channel_val(REG_X(operand2), \ A2_SRC2_CHANNEL_X_SHIFT, \ A2_SRC2_CHANNEL_X_NEGATE) | \ i915_get_hardware_channel_val(REG_Y(operand2), \ A2_SRC2_CHANNEL_Y_SHIFT, \ A2_SRC2_CHANNEL_Y_NEGATE) | \ i915_get_hardware_channel_val(REG_Z(operand2), \ A2_SRC2_CHANNEL_Z_SHIFT, \ A2_SRC2_CHANNEL_Z_NEGATE) | \ i915_get_hardware_channel_val(REG_W(operand2), \ A2_SRC2_CHANNEL_W_SHIFT, \ A2_SRC2_CHANNEL_W_NEGATE)); \ } while (0) #define i915_fs_mov(dest_reg, operand0) \ i915_fs_arith(MOV, dest_reg, \ operand0, \ i915_fs_operand_none(), \ i915_fs_operand_none()) #define i915_fs_mov_masked(dest_reg, dest_mask, operand0) \ i915_fs_arith_masked (MOV, dest_reg, dest_mask, \ operand0, \ i915_fs_operand_none(), \ i915_fs_operand_none()) #define i915_fs_frc(dest_reg, operand0) \ i915_fs_arith (FRC, dest_reg, \ operand0, \ i915_fs_operand_none(), \ i915_fs_operand_none()) /* Add operand0 and operand1 and put the result in dest_reg */ #define i915_fs_add(dest_reg, operand0, operand1) \ i915_fs_arith (ADD, dest_reg, \ operand0, operand1, \ i915_fs_operand_none()) /* Multiply operand0 and operand1 and put the result in dest_reg */ #define i915_fs_mul(dest_reg, operand0, operand1) \ i915_fs_arith (MUL, dest_reg, \ operand0, operand1, \ i915_fs_operand_none()) /* Computes 1/sqrt(operand0.replicate_swizzle) puts the result in dest_reg */ #define i915_fs_rsq(dest_reg, dest_mask, operand0) \ do { \ if (dest_mask) { \ i915_fs_arith_masked (RSQ, dest_reg, dest_mask, \ operand0, \ i915_fs_operand_none (), \ i915_fs_operand_none ()); \ } else { \ i915_fs_arith (RSQ, dest_reg, \ operand0, \ i915_fs_operand_none (), \ i915_fs_operand_none ()); \ } \ } while (0) /* Puts the minimum of operand0 and operand1 in dest_reg */ #define i915_fs_min(dest_reg, operand0, operand1) \ i915_fs_arith (MIN, dest_reg, \ operand0, operand1, \ i915_fs_operand_none()) /* Puts the maximum of operand0 and operand1 in dest_reg */ #define i915_fs_max(dest_reg, operand0, operand1) \ i915_fs_arith (MAX, dest_reg, \ operand0, operand1, \ i915_fs_operand_none()) #define i915_fs_cmp(dest_reg, operand0, operand1, operand2) \ i915_fs_arith (CMP, dest_reg, operand0, operand1, operand2) /* Perform operand0 * operand1 + operand2 and put the result in dest_reg */ #define i915_fs_mad(dest_reg, dest_mask, op0, op1, op2) \ do { \ if (dest_mask) { \ i915_fs_arith_masked (MAD, dest_reg, dest_mask, op0, op1, op2); \ } else { \ i915_fs_arith (MAD, dest_reg, op0, op1, op2); \ } \ } while (0) #define i915_fs_dp2add(dest_reg, dest_mask, op0, op1, op2) \ do { \ if (dest_mask) { \ i915_fs_arith_masked (DP2ADD, dest_reg, dest_mask, op0, op1, op2); \ } else { \ i915_fs_arith (DP2ADD, dest_reg, op0, op1, op2); \ } \ } while (0) /* * Perform a 3-component dot-product of operand0 and operand1 and put the * resulting scalar in the channels of dest_reg specified by the dest_mask. */ #define i915_fs_dp3(dest_reg, dest_mask, op0, op1) \ do { \ if (dest_mask) { \ i915_fs_arith_masked (DP3, dest_reg, dest_mask, \ op0, op1,\ i915_fs_operand_none()); \ } else { \ i915_fs_arith (DP3, dest_reg, op0, op1,\ i915_fs_operand_none()); \ } \ } while (0) /* * Sets up local state for accumulating a fragment shader buffer. * * \param x maximum number of shader commands that may be used between * a FS_START and FS_END */ #define FS_LOCALS() \ uint32_t _shader_offset #define FS_BEGIN() \ do { \ _shader_offset = intel->batch_used++; \ } while (0) #define FS_END() \ do { \ intel->batch_ptr[_shader_offset] = \ _3DSTATE_PIXEL_SHADER_PROGRAM | \ (intel->batch_used - _shader_offset - 2); \ } while (0); intel-gpu-tools-1.14/lib/ioctl_wrappers.c0000644000175000017500000012004512665336131015401 00000000000000/* * Copyright © 2007, 2011, 2013, 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * Daniel Vetter * */ #ifndef ANDROID #define _GNU_SOURCE #else #include #endif #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "drmtest.h" #include "i915_drm.h" #include "intel_chipset.h" #include "intel_io.h" #include "igt_debugfs.h" #include "config.h" #include "ioctl_wrappers.h" /** * SECTION:ioctl_wrappers * @short_description: ioctl wrappers and related functions * @title: ioctl wrappers * @include: igt.h * * This helper library contains simple functions to wrap the raw drm/i915 kernel * ioctls. The normal versions never pass any error codes to the caller and use * igt_assert() to check for error conditions instead. For some ioctls raw * wrappers which do pass on error codes are available. These raw wrappers have * a __ prefix. * * For wrappers which check for feature bits there can also be two versions: The * normal one simply returns a boolean to the caller. But when skipping the * testcase entirely is the right action then it's better to use igt_skip() * directly in the wrapper. Such functions have _require_ in their name to * distinguish them. */ /** * gem_handle_to_libdrm_bo: * @bufmgr: libdrm buffer manager instance * @fd: open i915 drm file descriptor * @name: buffer name in libdrm * @handle: gem buffer object handle * * This helper function imports a raw gem buffer handle into the libdrm buffer * manager. * * Returns: The imported libdrm buffer manager object. */ drm_intel_bo * gem_handle_to_libdrm_bo(drm_intel_bufmgr *bufmgr, int fd, const char *name, uint32_t handle) { struct drm_gem_flink flink; int ret; drm_intel_bo *bo; memset(&flink, 0, sizeof(handle)); flink.handle = handle; ret = ioctl(fd, DRM_IOCTL_GEM_FLINK, &flink); igt_assert(ret == 0); errno = 0; bo = drm_intel_bo_gem_create_from_name(bufmgr, name, flink.name); igt_assert(bo); return bo; } /** * gem_get_tiling: * @fd: open i915 drm file descriptor * @handle: gem buffer object handle * @tiling: (out) tiling mode of the gem buffer * @swizzle: (out) bit 6 swizzle mode * * This wraps the GET_TILING ioctl. */ void gem_get_tiling(int fd, uint32_t handle, uint32_t *tiling, uint32_t *swizzle) { struct drm_i915_gem_get_tiling get_tiling; int ret; memset(&get_tiling, 0, sizeof(get_tiling)); get_tiling.handle = handle; ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_GET_TILING, &get_tiling); igt_assert(ret == 0); *tiling = get_tiling.tiling_mode; *swizzle = get_tiling.swizzle_mode; } int __gem_set_tiling(int fd, uint32_t handle, uint32_t tiling, uint32_t stride) { struct drm_i915_gem_set_tiling st; int ret; memset(&st, 0, sizeof(st)); do { st.handle = handle; st.tiling_mode = tiling; st.stride = tiling ? stride : 0; ret = ioctl(fd, DRM_IOCTL_I915_GEM_SET_TILING, &st); } while (ret == -1 && (errno == EINTR || errno == EAGAIN)); if (ret != 0) return -errno; errno = 0; igt_assert(st.tiling_mode == tiling); return 0; } /** * gem_set_tiling: * @fd: open i915 drm file descriptor * @handle: gem buffer object handle * @tiling: tiling mode bits * @stride: stride of the buffer when using a tiled mode, otherwise must be 0 * * This wraps the SET_TILING ioctl. */ void gem_set_tiling(int fd, uint32_t handle, uint32_t tiling, uint32_t stride) { igt_assert(__gem_set_tiling(fd, handle, tiling, stride) == 0); } struct local_drm_i915_gem_caching { uint32_t handle; uint32_t caching; }; #define LOCAL_DRM_I915_GEM_SET_CACHEING 0x2f #define LOCAL_DRM_I915_GEM_GET_CACHEING 0x30 #define LOCAL_DRM_IOCTL_I915_GEM_SET_CACHEING \ DRM_IOW(DRM_COMMAND_BASE + LOCAL_DRM_I915_GEM_SET_CACHEING, struct local_drm_i915_gem_caching) #define LOCAL_DRM_IOCTL_I915_GEM_GET_CACHEING \ DRM_IOWR(DRM_COMMAND_BASE + LOCAL_DRM_I915_GEM_GET_CACHEING, struct local_drm_i915_gem_caching) /** * gem_set_caching: * @fd: open i915 drm file descriptor * @handle: gem buffer object handle * @caching: caching mode bits * * This wraps the SET_CACHING ioctl. Note that this function internally calls * igt_require() when SET_CACHING isn't available, hence automatically skips the * test. Therefore always extract test logic which uses this into its own * subtest. */ void gem_set_caching(int fd, uint32_t handle, uint32_t caching) { struct local_drm_i915_gem_caching arg; int ret; memset(&arg, 0, sizeof(arg)); arg.handle = handle; arg.caching = caching; ret = drmIoctl(fd, LOCAL_DRM_IOCTL_I915_GEM_SET_CACHEING, &arg); igt_assert(ret == 0 || (errno == ENOTTY || errno == EINVAL)); igt_require(ret == 0); errno = 0; } /** * gem_get_caching: * @fd: open i915 drm file descriptor * @handle: gem buffer object handle * * This wraps the GET_CACHING ioctl. * * Returns: The current caching mode bits. */ uint32_t gem_get_caching(int fd, uint32_t handle) { struct local_drm_i915_gem_caching arg; int ret; arg.handle = handle; arg.caching = 0; ret = ioctl(fd, LOCAL_DRM_IOCTL_I915_GEM_GET_CACHEING, &arg); igt_assert(ret == 0); errno = 0; return arg.caching; } /** * gem_open: * @fd: open i915 drm file descriptor * @name: flink buffer name * * This wraps the GEM_OPEN ioctl, which is used to import an flink name. * * Returns: gem file-private buffer handle of the open object. */ uint32_t gem_open(int fd, uint32_t name) { struct drm_gem_open open_struct; int ret; memset(&open_struct, 0, sizeof(open_struct)); open_struct.name = name; ret = ioctl(fd, DRM_IOCTL_GEM_OPEN, &open_struct); igt_assert(ret == 0); igt_assert(open_struct.handle != 0); errno = 0; return open_struct.handle; } /** * gem_flink: * @fd: open i915 drm file descriptor * @handle: file-private gem buffer object handle * * This wraps the GEM_FLINK ioctl, which is used to export a gem buffer object * into the device-global flink namespace. See gem_open() for opening such a * buffer name on a different i915 drm file descriptor. * * Returns: The created flink buffer name. */ uint32_t gem_flink(int fd, uint32_t handle) { struct drm_gem_flink flink; int ret; memset(&flink, 0, sizeof(flink)); flink.handle = handle; ret = ioctl(fd, DRM_IOCTL_GEM_FLINK, &flink); igt_assert(ret == 0); errno = 0; return flink.name; } /** * gem_close: * @fd: open i915 drm file descriptor * @handle: gem buffer object handle * * This wraps the GEM_CLOSE ioctl, which to release a file-private gem buffer * handle. */ void gem_close(int fd, uint32_t handle) { struct drm_gem_close close_bo; igt_assert_neq(handle, 0); memset(&close_bo, 0, sizeof(close_bo)); close_bo.handle = handle; do_ioctl(fd, DRM_IOCTL_GEM_CLOSE, &close_bo); } /** * gem_write: * @fd: open i915 drm file descriptor * @handle: gem buffer object handle * @offset: offset within the buffer of the subrange * @buf: pointer to the data to write into the buffer * @length: size of the subrange * * This wraps the PWRITE ioctl, which is to upload a linear data to a subrange * of a gem buffer object. */ void gem_write(int fd, uint32_t handle, uint64_t offset, const void *buf, uint64_t length) { struct drm_i915_gem_pwrite gem_pwrite; memset(&gem_pwrite, 0, sizeof(gem_pwrite)); gem_pwrite.handle = handle; gem_pwrite.offset = offset; gem_pwrite.size = length; gem_pwrite.data_ptr = (uintptr_t)buf; do_ioctl(fd, DRM_IOCTL_I915_GEM_PWRITE, &gem_pwrite); } /** * gem_read: * @fd: open i915 drm file descriptor * @handle: gem buffer object handle * @offset: offset within the buffer of the subrange * @buf: pointer to the data to read into * @length: size of the subrange * * This wraps the PREAD ioctl, which is to download a linear data to a subrange * of a gem buffer object. */ void gem_read(int fd, uint32_t handle, uint64_t offset, void *buf, uint64_t length) { struct drm_i915_gem_pread gem_pread; memset(&gem_pread, 0, sizeof(gem_pread)); gem_pread.handle = handle; gem_pread.offset = offset; gem_pread.size = length; gem_pread.data_ptr = (uintptr_t)buf; do_ioctl(fd, DRM_IOCTL_I915_GEM_PREAD, &gem_pread); } /** * gem_set_domain: * @fd: open i915 drm file descriptor * @handle: gem buffer object handle * @read_domains: gem domain bits for read access * @write_domain: gem domain bit for write access * * This wraps the SET_DOMAIN ioctl, which is used to control the coherency of * the gem buffer object between the cpu and gtt mappings. It is also use to * synchronize with outstanding rendering in general, but for that use-case * please have a look at gem_sync(). */ void gem_set_domain(int fd, uint32_t handle, uint32_t read_domains, uint32_t write_domain) { struct drm_i915_gem_set_domain set_domain; memset(&set_domain, 0, sizeof(set_domain)); set_domain.handle = handle; set_domain.read_domains = read_domains; set_domain.write_domain = write_domain; do_ioctl(fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &set_domain); } /** * __gem_wait: * @fd: open i915 drm file descriptor * @handle: gem buffer object handle * @timeout_ns: [in] time to wait, [out] remaining time (in nanoseconds) * * This functions waits for outstanding rendering to complete, upto * the timeout_ns. If no timeout_ns is provided, the wait is indefinite and * only returns upon an error or when the rendering is complete. */ int gem_wait(int fd, uint32_t handle, int64_t *timeout_ns) { struct drm_i915_gem_wait wait; int ret; memset(&wait, 0, sizeof(wait)); wait.bo_handle = handle; wait.timeout_ns = timeout_ns ? *timeout_ns : -1; wait.flags = 0; ret = 0; if (drmIoctl(fd, DRM_IOCTL_I915_GEM_WAIT, &wait)) ret = -errno; if (timeout_ns) *timeout_ns = wait.timeout_ns; return ret; } /** * gem_sync: * @fd: open i915 drm file descriptor * @handle: gem buffer object handle * * This functions waits for outstanding rendering to complete. */ void gem_sync(int fd, uint32_t handle) { if (gem_wait(fd, handle, NULL)) gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); errno = 0; } bool gem_create__has_stolen_support(int fd) { static int has_stolen_support = -1; struct drm_i915_getparam gp; int val = -1; if (has_stolen_support < 0) { memset(&gp, 0, sizeof(gp)); gp.param = 36; /* CREATE_VERSION */ gp.value = &val; /* Do we have the extended gem_create_ioctl? */ ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp); has_stolen_support = val >= 2; } return has_stolen_support; } struct local_i915_gem_create_v2 { uint64_t size; uint32_t handle; uint32_t pad; #define I915_CREATE_PLACEMENT_STOLEN (1<<0) uint32_t flags; }; #define LOCAL_IOCTL_I915_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_CREATE, struct local_i915_gem_create_v2) uint32_t __gem_create_stolen(int fd, uint64_t size) { struct local_i915_gem_create_v2 create; int ret; memset(&create, 0, sizeof(create)); create.handle = 0; create.size = size; create.flags = I915_CREATE_PLACEMENT_STOLEN; ret = drmIoctl(fd, LOCAL_IOCTL_I915_GEM_CREATE, &create); if (ret < 0) return 0; errno = 0; return create.handle; } /** * gem_create_stolen: * @fd: open i915 drm file descriptor * @size: desired size of the buffer * * This wraps the new GEM_CREATE ioctl, which allocates a new gem buffer * object of @size and placement in stolen memory region. * * Returns: The file-private handle of the created buffer object */ uint32_t gem_create_stolen(int fd, uint64_t size) { struct local_i915_gem_create_v2 create; memset(&create, 0, sizeof(create)); create.handle = 0; create.size = size; create.flags = I915_CREATE_PLACEMENT_STOLEN; do_ioctl(fd, LOCAL_IOCTL_I915_GEM_CREATE, &create); igt_assert(create.handle); return create.handle; } uint32_t __gem_create(int fd, int size) { struct drm_i915_gem_create create; int ret; memset(&create, 0, sizeof(create)); create.handle = 0; create.size = size; ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_CREATE, &create); if (ret < 0) return 0; errno = 0; return create.handle; } /** * gem_create: * @fd: open i915 drm file descriptor * @size: desired size of the buffer * * This wraps the GEM_CREATE ioctl, which allocates a new gem buffer object of * @size. * * Returns: The file-private handle of the created buffer object */ uint32_t gem_create(int fd, uint64_t size) { struct drm_i915_gem_create create; memset(&create, 0, sizeof(create)); create.handle = 0; create.size = size; do_ioctl(fd, DRM_IOCTL_I915_GEM_CREATE, &create); igt_assert(create.handle); return create.handle; } /** * __gem_execbuf: * @fd: open i915 drm file descriptor * @execbuf: execbuffer data structure * * This wraps the EXECBUFFER2 ioctl, which submits a batchbuffer for the gpu to * run. This is allowed to fail, with -errno returned. */ int __gem_execbuf(int fd, struct drm_i915_gem_execbuffer2 *execbuf) { int err = 0; if (drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, execbuf)) err = -errno; return err; } /** * gem_execbuf: * @fd: open i915 drm file descriptor * @execbuf: execbuffer data structure * * This wraps the EXECBUFFER2 ioctl, which submits a batchbuffer for the gpu to * run. */ void gem_execbuf(int fd, struct drm_i915_gem_execbuffer2 *execbuf) { igt_assert_eq(__gem_execbuf(fd, execbuf), 0); errno = 0; } /** * __gem_mmap__gtt: * @fd: open i915 drm file descriptor * @handle: gem buffer object handle * @size: size of the gem buffer * @prot: memory protection bits as used by mmap() * * This functions wraps up procedure to establish a memory mapping through the * GTT. * * Returns: A pointer to the created memory mapping, NULL on failure. */ void *__gem_mmap__gtt(int fd, uint32_t handle, uint64_t size, unsigned prot) { struct drm_i915_gem_mmap_gtt mmap_arg; void *ptr; memset(&mmap_arg, 0, sizeof(mmap_arg)); mmap_arg.handle = handle; if (drmIoctl(fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &mmap_arg)) return NULL; ptr = mmap64(0, size, prot, MAP_SHARED, fd, mmap_arg.offset); if (ptr == MAP_FAILED) ptr = NULL; else errno = 0; return ptr; } /** * gem_mmap__gtt: * @fd: open i915 drm file descriptor * @handle: gem buffer object handle * @size: size of the gem buffer * @prot: memory protection bits as used by mmap() * * Like __gem_mmap__gtt() except we assert on failure. * * Returns: A pointer to the created memory mapping */ void *gem_mmap__gtt(int fd, uint32_t handle, uint64_t size, unsigned prot) { void *ptr = __gem_mmap__gtt(fd, handle, size, prot); igt_assert(ptr); return ptr; } struct local_i915_gem_mmap_v2 { uint32_t handle; uint32_t pad; uint64_t offset; uint64_t size; uint64_t addr_ptr; uint64_t flags; #define I915_MMAP_WC 0x1 }; #define LOCAL_IOCTL_I915_GEM_MMAP_v2 DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_MMAP, struct local_i915_gem_mmap_v2) bool gem_mmap__has_wc(int fd) { static int has_wc = -1; if (has_wc == -1) { struct drm_i915_getparam gp; int val = -1; has_wc = 0; memset(&gp, 0, sizeof(gp)); gp.param = 30; /* MMAP_VERSION */ gp.value = &val; /* Do we have the new mmap_ioctl? */ ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp); if (val >= 1) { struct local_i915_gem_mmap_v2 arg; /* Does this device support wc-mmaps ? */ memset(&arg, 0, sizeof(arg)); arg.handle = gem_create(fd, 4096); arg.offset = 0; arg.size = 4096; arg.flags = I915_MMAP_WC; has_wc = drmIoctl(fd, LOCAL_IOCTL_I915_GEM_MMAP_v2, &arg) == 0; gem_close(fd, arg.handle); } errno = 0; } return has_wc > 0; } /** * __gem_mmap__wc: * @fd: open i915 drm file descriptor * @handle: gem buffer object handle * @offset: offset in the gem buffer of the mmap arena * @size: size of the mmap arena * @prot: memory protection bits as used by mmap() * * This functions wraps up procedure to establish a memory mapping through * direct cpu access, bypassing the gpu and cpu caches completely and also * bypassing the GTT system agent (i.e. there is no automatic tiling of * the mmapping through the fence registers). * * Returns: A pointer to the created memory mapping, NULL on failure. */ void *__gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot) { struct local_i915_gem_mmap_v2 arg; if (!gem_mmap__has_wc(fd)) { errno = ENOSYS; return NULL; } memset(&arg, 0, sizeof(arg)); arg.handle = handle; arg.offset = offset; arg.size = size; arg.flags = I915_MMAP_WC; if (drmIoctl(fd, LOCAL_IOCTL_I915_GEM_MMAP_v2, &arg)) return NULL; errno = 0; return (void *)(uintptr_t)arg.addr_ptr; } /** * gem_mmap__wc: * @fd: open i915 drm file descriptor * @handle: gem buffer object handle * @offset: offset in the gem buffer of the mmap arena * @size: size of the mmap arena * @prot: memory protection bits as used by mmap() * * Like __gem_mmap__wc() except we assert on failure. * * Returns: A pointer to the created memory mapping */ void *gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot) { void *ptr = __gem_mmap__wc(fd, handle, offset, size, prot); igt_assert(ptr); return ptr; } /** * __gem_mmap__cpu: * @fd: open i915 drm file descriptor * @handle: gem buffer object handle * @offset: offset in the gem buffer of the mmap arena * @size: size of the mmap arena * @prot: memory protection bits as used by mmap() * * This functions wraps up procedure to establish a memory mapping through * direct cpu access, bypassing the gpu completely. * * Returns: A pointer to the created memory mapping, NULL on failure. */ void *__gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot) { struct drm_i915_gem_mmap mmap_arg; memset(&mmap_arg, 0, sizeof(mmap_arg)); mmap_arg.handle = handle; mmap_arg.offset = offset; mmap_arg.size = size; if (drmIoctl(fd, DRM_IOCTL_I915_GEM_MMAP, &mmap_arg)) return NULL; errno = 0; return (void *)(uintptr_t)mmap_arg.addr_ptr; } /** * gem_mmap__cpu: * @fd: open i915 drm file descriptor * @handle: gem buffer object handle * @offset: offset in the gem buffer of the mmap arena * @size: size of the mmap arena * @prot: memory protection bits as used by mmap() * * Like __gem_mmap__cpu() except we assert on failure. * * Returns: A pointer to the created memory mapping */ void *gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot) { void *ptr = __gem_mmap__cpu(fd, handle, offset, size, prot); igt_assert(ptr); return ptr; } /** * gem_madvise: * @fd: open i915 drm file descriptor * @handle: gem buffer object handle * @state: desired madvise state * * This is a wraps the MADVISE ioctl, which is used in libdrm to implement * opportunistic buffer object caching. Objects in the cache are set to DONTNEED * (internally in the kernel tracked as purgeable objects). When such a cached * object is in need again it must be set back to WILLNEED before first use. * * Returns: When setting the madvise state to WILLNEED this returns whether the * backing storage was still available or not. */ int gem_madvise(int fd, uint32_t handle, int state) { struct drm_i915_gem_madvise madv; memset(&madv, 0, sizeof(madv)); madv.handle = handle; madv.madv = state; madv.retained = 1; do_ioctl(fd, DRM_IOCTL_I915_GEM_MADVISE, &madv); return madv.retained; } /** * gem_context_create: * @fd: open i915 drm file descriptor * * This is a wraps the CONTEXT_CREATE ioctl, which is used to allocate a new * hardware context. Not that similarly to gem_set_caching() this wrapper calls * igt_require() internally to correctly skip on kernels and platforms where hw * context support is not available. * * Returns: The id of the allocated hw context. */ uint32_t gem_context_create(int fd) { struct drm_i915_gem_context_create create; memset(&create, 0, sizeof(create)); if (drmIoctl(fd, DRM_IOCTL_I915_GEM_CONTEXT_CREATE, &create)) { int err = -errno; igt_skip_on(err == -ENODEV || errno == -EINVAL); igt_assert_eq(err, 0); } igt_assert(create.ctx_id != 0); errno = 0; return create.ctx_id; } int __gem_context_destroy(int fd, uint32_t ctx_id) { struct drm_i915_gem_context_destroy destroy; int ret; memset(&destroy, 0, sizeof(destroy)); destroy.ctx_id = ctx_id; ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_CONTEXT_DESTROY, &destroy); if (ret) return -errno; return 0; } /** * gem_context_destroy: * @fd: open i915 drm file descriptor * @ctx_id: i915 hw context id * * This is a wraps the CONTEXT_DESTROY ioctl, which is used to free a hardware * context. */ void gem_context_destroy(int fd, uint32_t ctx_id) { struct drm_i915_gem_context_destroy destroy; memset(&destroy, 0, sizeof(destroy)); destroy.ctx_id = ctx_id; do_ioctl(fd, DRM_IOCTL_I915_GEM_CONTEXT_DESTROY, &destroy); } /** * gem_context_get_param: * @fd: open i915 drm file descriptor * @p: i915 hw context parameter * * This is a wraps the CONTEXT_GET_PARAM ioctl, which is used to free a hardware * context. Not that similarly to gem_set_caching() this wrapper calls * igt_require() internally to correctly skip on kernels and platforms where hw * context parameter support is not available. */ void gem_context_get_param(int fd, struct local_i915_gem_context_param *p) { #define LOCAL_I915_GEM_CONTEXT_GETPARAM 0x34 #define LOCAL_IOCTL_I915_GEM_CONTEXT_GETPARAM DRM_IOWR (DRM_COMMAND_BASE + LOCAL_I915_GEM_CONTEXT_GETPARAM, struct local_i915_gem_context_param) do_ioctl(fd, LOCAL_IOCTL_I915_GEM_CONTEXT_GETPARAM, p); } int __gem_context_set_param(int fd, struct local_i915_gem_context_param *p) { #define LOCAL_I915_GEM_CONTEXT_SETPARAM 0x35 #define LOCAL_IOCTL_I915_GEM_CONTEXT_SETPARAM DRM_IOWR (DRM_COMMAND_BASE + LOCAL_I915_GEM_CONTEXT_SETPARAM, struct local_i915_gem_context_param) if (drmIoctl(fd, LOCAL_IOCTL_I915_GEM_CONTEXT_SETPARAM, p)) return -errno; errno = 0; return 0; } /** * gem_context_set_param: * @fd: open i915 drm file descriptor * @p: i915 hw context parameter * * This is a wraps the CONTEXT_SET_PARAM ioctl, which is used to free a hardware * context. Not that similarly to gem_set_caching() this wrapper calls * igt_require() internally to correctly skip on kernels and platforms where hw * context parameter support is not available. */ void gem_context_set_param(int fd, struct local_i915_gem_context_param *p) { igt_assert(__gem_context_set_param(fd, p) == 0); } /** * gem_context_require_param: * @fd: open i915 drm file descriptor * @param: i915 hw context parameter * * Feature test macro to query whether hw context parameter support for @param * is available. Automatically skips through igt_require() if not. */ void gem_context_require_param(int fd, uint64_t param) { struct local_i915_gem_context_param p; p.context = 0; p.param = param; p.value = 0; p.size = 0; igt_require(drmIoctl(fd, LOCAL_IOCTL_I915_GEM_CONTEXT_GETPARAM, &p) == 0); } void gem_context_require_ban_period(int fd) { static int has_ban_period = -1; if (has_ban_period < 0) { struct local_i915_gem_context_param p; p.context = 0; p.param = LOCAL_CONTEXT_PARAM_BAN_PERIOD; p.value = 0; p.size = 0; has_ban_period = drmIoctl(fd, LOCAL_IOCTL_I915_GEM_CONTEXT_GETPARAM, &p) == 0; } igt_require(has_ban_period); } int __gem_userptr(int fd, void *ptr, int size, int read_only, uint32_t flags, uint32_t *handle) { struct local_i915_gem_userptr userptr; int ret; memset(&userptr, 0, sizeof(userptr)); userptr.user_ptr = (uintptr_t)ptr; userptr.user_size = size; userptr.flags = flags; if (read_only) userptr.flags |= LOCAL_I915_USERPTR_READ_ONLY; ret = drmIoctl(fd, LOCAL_IOCTL_I915_GEM_USERPTR, &userptr); if (ret) ret = errno; igt_skip_on_f(ret == ENODEV && (flags & LOCAL_I915_USERPTR_UNSYNCHRONIZED) == 0 && !read_only, "Skipping, synchronized mappings with no kernel CONFIG_MMU_NOTIFIER?"); if (ret == 0) *handle = userptr.handle; return ret; } /** * gem_userptr: * @fd: open i915 drm file descriptor * @ptr: userptr pointer to be passed * @size: desired size of the buffer * @read_only: specify whether userptr is opened read only * @flags: other userptr flags * @handle: returned handle for the object * * Returns userptr handle for the GEM object. */ void gem_userptr(int fd, void *ptr, int size, int read_only, uint32_t flags, uint32_t *handle) { igt_assert_eq(__gem_userptr(fd, ptr, size, read_only, flags, handle), 0); } /** * gem_sw_finish: * @fd: open i915 drm file descriptor * @handle: gem buffer object handle * * This is a wraps the SW_FINISH ioctl, which is used to flush out frontbuffer * rendering done through the direct cpu memory mappings. Shipping userspace * does _not_ call this after frontbuffer rendering through gtt memory mappings. */ void gem_sw_finish(int fd, uint32_t handle) { struct drm_i915_gem_sw_finish finish; memset(&finish, 0, sizeof(finish)); finish.handle = handle; do_ioctl(fd, DRM_IOCTL_I915_GEM_SW_FINISH, &finish); } /** * gem_bo_busy: * @fd: open i915 drm file descriptor * @handle: gem buffer object handle * * This is a wraps the BUSY ioctl, which tells whether a buffer object is still * actively used by the gpu in a execbuffer. * * Returns: The busy state of the buffer object. */ bool gem_bo_busy(int fd, uint32_t handle) { struct drm_i915_gem_busy busy; memset(&busy, 0, sizeof(busy)); busy.handle = handle; do_ioctl(fd, DRM_IOCTL_I915_GEM_BUSY, &busy); return !!busy.busy; } /* feature test helpers */ /** * gem_gtt_type: * @fd: open i915 drm file descriptor * * Feature test macro to check what type of gtt is being used by the kernel: * 0 - global gtt * 1 - aliasing ppgtt * 2 - full ppgtt, limited to 32bit address space * 3 - full ppgtt, 64bit address space * * Returns: Type of gtt being used. */ int gem_gtt_type(int fd) { struct drm_i915_getparam gp; int val = 0; memset(&gp, 0, sizeof(gp)); gp.param = 18; /* HAS_ALIASING_PPGTT */ gp.value = &val; if (ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp, sizeof(gp))) return 0; errno = 0; return val; } /** * gem_uses_ppgtt: * @fd: open i915 drm file descriptor * * Feature test macro to check whether the kernel internally uses ppgtt to * execute batches. Note that this is also true when we're using full ppgtt. * * Returns: Whether batches are run through ppgtt. */ bool gem_uses_ppgtt(int fd) { return gem_gtt_type(fd) > 0; } /** * gem_uses_full_ppgtt: * @fd: open i915 drm file descriptor * * Feature test macro to check whether the kernel internally uses full * per-process gtt to execute batches. Note that this is also true when we're * using full 64b ppgtt. * * Returns: Whether batches are run through full ppgtt. */ bool gem_uses_full_ppgtt(int fd) { return gem_gtt_type(fd) > 1; } /** * gem_available_fences: * @fd: open i915 drm file descriptor * * Feature test macro to query the kernel for the number of available fences * usable in a batchbuffer. Only relevant for pre-gen4. * * Returns: The number of available fences. */ int gem_available_fences(int fd) { static int num_fences = -1; if (num_fences < 0) { struct drm_i915_getparam gp; memset(&gp, 0, sizeof(gp)); gp.param = I915_PARAM_NUM_FENCES_AVAIL; gp.value = &num_fences; num_fences = 0; ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp, sizeof(gp)); errno = 0; } return num_fences; } bool gem_has_llc(int fd) { static int has_llc = -1; if (has_llc < 0) { struct drm_i915_getparam gp; memset(&gp, 0, sizeof(gp)); gp.param = I915_PARAM_HAS_LLC; gp.value = &has_llc; has_llc = 0; ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp, sizeof(gp)); errno = 0; } return has_llc; } /** * gem_get_num_rings: * @fd: open i915 drm file descriptor * * Feature test macro to query the number of available rings. This is useful in * test loops which need to step through all rings and similar logic. * * For more explicit tests of ring availability see gem_has_enable_ring() and * the ring specific versions like gem_has_bsd(). * * Returns: The number of available rings. */ int gem_get_num_rings(int fd) { static int num_rings = -1; if (num_rings < 0) { num_rings = 1; /* render ring is always available */ if (gem_has_bsd(fd)) num_rings++; else goto skip; if (gem_has_blt(fd)) num_rings++; else goto skip; if (gem_has_vebox(fd)) num_rings++; else goto skip; } skip: return num_rings; } /** * gem_has_enable_ring: * @fd: open i915 drm file descriptor * @param: ring flag bit as used in gem_execbuf() * * Feature test macro to query whether a specific ring is available. * * Returns: Whether the ring is available or not. */ bool gem_has_enable_ring(int fd,int param) { drm_i915_getparam_t gp; int tmp = 0; memset(&gp, 0, sizeof(gp)); gp.value = &tmp; gp.param = param; if (drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp)) return false; errno = 0; return tmp > 0; } /** * gem_has_bsd: * @fd: open i915 drm file descriptor * * Feature test macro to query whether the BSD ring is available. This is simply * a specific version of gem_has_enable_ring() for the BSD ring. * * Note that recent Bspec calls this the VCS ring for Video Command Submission. * * Returns: Whether the BSD ring is available or not. */ bool gem_has_bsd(int fd) { static int has_bsd = -1; if (has_bsd < 0) has_bsd = gem_has_enable_ring(fd,I915_PARAM_HAS_BSD); return has_bsd; } /** * gem_has_blt: * @fd: open i915 drm file descriptor * * Feature test macro to query whether the blitter ring is available. This is simply * a specific version of gem_has_enable_ring() for the blitter ring. * * Note that recent Bspec calls this the BCS ring for Blitter Command Submission. * * Returns: Whether the blitter ring is available or not. */ bool gem_has_blt(int fd) { static int has_blt = -1; if (has_blt < 0) has_blt = gem_has_enable_ring(fd,I915_PARAM_HAS_BLT); return has_blt; } #define LOCAL_I915_PARAM_HAS_VEBOX 22 /** * gem_has_vebox: * @fd: open i915 drm file descriptor * * Feature test macro to query whether the vebox ring is available. This is simply * a specific version of gem_has_enable_ring() for the vebox ring. * * Note that recent Bspec calls this the VECS ring for Video Enhancement Command * Submission. * * Returns: Whether the vebox ring is available or not. */ bool gem_has_vebox(int fd) { static int has_vebox = -1; if (has_vebox < 0) has_vebox = gem_has_enable_ring(fd,LOCAL_I915_PARAM_HAS_VEBOX); return has_vebox; } #define LOCAL_I915_PARAM_HAS_BSD2 31 /** * gem_has_bsd2: * @fd: open i915 drm file descriptor * * Feature test macro to query whether the BSD2 ring is available. This is simply * a specific version of gem_has_enable_ring() for the BSD2 ring. * * Note that recent Bspec calls this the VCS ring for Video Command Submission. * * Returns: Whether the BSD ring is avaible or not. */ bool gem_has_bsd2(int fd) { static int has_bsd2 = -1; if (has_bsd2 < 0) has_bsd2 = gem_has_enable_ring(fd,LOCAL_I915_PARAM_HAS_BSD2); return has_bsd2; } /** * gem_available_aperture_size: * @fd: open i915 drm file descriptor * * Feature test macro to query the kernel for the available gpu aperture size * usable in a batchbuffer. * * Returns: The available gtt address space size. */ uint64_t gem_available_aperture_size(int fd) { struct drm_i915_gem_get_aperture aperture; memset(&aperture, 0, sizeof(aperture)); aperture.aper_size = 256*1024*1024; do_ioctl(fd, DRM_IOCTL_I915_GEM_GET_APERTURE, &aperture); return aperture.aper_available_size; } /** * gem_aperture_size: * @fd: open i915 drm file descriptor * * Feature test macro to query the kernel for the total gpu aperture size. * * Returns: The total gtt address space size. */ uint64_t gem_aperture_size(int fd) { static uint64_t aperture_size = 0; if (aperture_size == 0) { struct local_i915_gem_context_param p; memset(&p, 0, sizeof(p)); p.param = 0x3; if (ioctl(fd, LOCAL_IOCTL_I915_GEM_CONTEXT_GETPARAM, &p) == 0) { aperture_size = p.value; } else { struct drm_i915_gem_get_aperture aperture; memset(&aperture, 0, sizeof(aperture)); aperture.aper_size = 256*1024*1024; do_ioctl(fd, DRM_IOCTL_I915_GEM_GET_APERTURE, &aperture); aperture_size = aperture.aper_size; } } return aperture_size; } /** * gem_mappable_aperture_size: * * Feature test macro to query the kernel for the mappable gpu aperture size. * This is the area available for GTT memory mappings. * * Returns: The mappable gtt address space size. */ uint64_t gem_mappable_aperture_size(void) { struct pci_device *pci_dev = intel_get_pci_device(); int bar; if (intel_gen(pci_dev->device_id) < 3) bar = 0; else bar = 2; return pci_dev->regions[bar].size; } /** * gem_global_aperture_size: * * Feature test macro to query the kernel for the global gpu aperture size. * This is the area available for the kernel to perform address translations. * * Returns: The mappable gtt address space size. */ uint64_t gem_global_aperture_size(int fd) { struct drm_i915_gem_get_aperture aperture; memset(&aperture, 0, sizeof(aperture)); aperture.aper_size = 256*1024*1024; do_ioctl(fd, DRM_IOCTL_I915_GEM_GET_APERTURE, &aperture); return aperture.aper_size; } #define LOCAL_I915_PARAM_HAS_EXEC_SOFTPIN 37 /** * gem_has_softpin: * @fd: open i915 drm file descriptor * * Feature test macro to query whether the softpinning functionality is * supported. * * Returns: Whether softpin support is available */ bool gem_has_softpin(int fd) { static int has_softpin = -1; if (has_softpin < 0) { struct drm_i915_getparam gp; memset(&gp, 0, sizeof(gp)); gp.param = LOCAL_I915_PARAM_HAS_EXEC_SOFTPIN; gp.value = &has_softpin; has_softpin = 0; ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp, sizeof(gp)); errno = 0; } return has_softpin; } /** * gem_require_caching: * @fd: open i915 drm file descriptor * * Feature test macro to query whether buffer object caching control is * available. Automatically skips through igt_require() if not. */ void gem_require_caching(int fd) { struct local_drm_i915_gem_caching arg; int ret; memset(&arg, 0, sizeof(arg)); arg.handle = gem_create(fd, 4096); igt_assert(arg.handle != 0); arg.caching = 0; ret = ioctl(fd, LOCAL_DRM_IOCTL_I915_GEM_SET_CACHEING, &arg); gem_close(fd, arg.handle); igt_require(ret == 0); errno = 0; } static int gem_has_ring(int fd, int ring) { uint32_t bbe = MI_BATCH_BUFFER_END; struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 exec; int ret; memset(&exec, 0, sizeof(exec)); exec.handle = gem_create(fd, 4096); gem_write(fd, exec.handle, 0, &bbe, sizeof(bbe)); memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)&exec; execbuf.buffer_count = 1; execbuf.flags = ring; ret = __gem_execbuf(fd, &execbuf); gem_close(fd, exec.handle); return ret == 0; } /** * gem_require_ring: * @fd: open i915 drm file descriptor * @ring_id: ring flag bit as used in gem_execbuf() * * Feature test macro to query whether a specific ring is available. * In contrast to gem_has_enable_ring() this automagically skips if the ring * isn't available by calling igt_require(). */ void gem_require_ring(int fd, int ring_id) { igt_require(gem_has_ring(fd, ring_id)); /* silly ABI, the kernel thinks everyone who has BSD also has BSD2 */ if ((ring_id & ~(3<<13)) == I915_EXEC_BSD) { if (ring_id & (3 << 13)) igt_require(gem_has_bsd2(fd)); } } /* prime */ /** * prime_handle_to_fd: * @fd: open i915 drm file descriptor * @handle: file-private gem buffer object handle * * This wraps the PRIME_HANDLE_TO_FD ioctl, which is used to export a gem buffer * object into a global (i.e. potentially cross-device) dma-buf file-descriptor * handle. * * Returns: The created dma-buf fd handle. */ int prime_handle_to_fd(int fd, uint32_t handle) { struct drm_prime_handle args; memset(&args, 0, sizeof(args)); args.handle = handle; args.flags = DRM_CLOEXEC; args.fd = -1; do_ioctl(fd, DRM_IOCTL_PRIME_HANDLE_TO_FD, &args); return args.fd; } /** * prime_handle_to_fd_for_mmap: * @fd: open i915 drm file descriptor * @handle: file-private gem buffer object handle * * Same as prime_handle_to_fd above but with DRM_RDWR capabilities, which can * be useful for writing into the mmap'ed dma-buf file-descriptor. * * Returns: The created dma-buf fd handle or -1 if the ioctl fails. */ int prime_handle_to_fd_for_mmap(int fd, uint32_t handle) { struct drm_prime_handle args; memset(&args, 0, sizeof(args)); args.handle = handle; args.flags = DRM_CLOEXEC | DRM_RDWR; args.fd = -1; if (drmIoctl(fd, DRM_IOCTL_PRIME_HANDLE_TO_FD, &args) != 0) return -1; return args.fd; } /** * prime_fd_to_handle: * @fd: open i915 drm file descriptor * @dma_buf_fd: dma-buf fd handle * * This wraps the PRIME_FD_TO_HANDLE ioctl, which is used to import a dma-buf * file-descriptor into a gem buffer object. * * Returns: The created gem buffer object handle. */ uint32_t prime_fd_to_handle(int fd, int dma_buf_fd) { struct drm_prime_handle args; memset(&args, 0, sizeof(args)); args.fd = dma_buf_fd; args.flags = 0; args.handle = 0; do_ioctl(fd, DRM_IOCTL_PRIME_FD_TO_HANDLE, &args); return args.handle; } /** * prime_get_size: * @dma_buf_fd: dma-buf fd handle * * This wraps the lseek() protocol used to query the invariant size of a * dma-buf. Not all kernels support this, which is check with igt_require() and * so will result in automagic test skipping. * * Returns: The lifetime-invariant size of the dma-buf object. */ off_t prime_get_size(int dma_buf_fd) { off_t ret; ret = lseek(dma_buf_fd, 0, SEEK_END); igt_assert(ret >= 0 || errno == ESPIPE); igt_require(ret >= 0); errno = 0; return ret; } /** * prime_sync_start * @dma_buf_fd: dma-buf fd handle */ void prime_sync_start(int dma_buf_fd, bool write) { struct local_dma_buf_sync sync_start; memset(&sync_start, 0, sizeof(sync_start)); sync_start.flags = LOCAL_DMA_BUF_SYNC_START; sync_start.flags |= LOCAL_DMA_BUF_SYNC_READ; if (write) sync_start.flags |= LOCAL_DMA_BUF_SYNC_WRITE; do_ioctl(dma_buf_fd, LOCAL_DMA_BUF_IOCTL_SYNC, &sync_start); } /** * prime_sync_end * @dma_buf_fd: dma-buf fd handle */ void prime_sync_end(int dma_buf_fd, bool write) { struct local_dma_buf_sync sync_end; memset(&sync_end, 0, sizeof(sync_end)); sync_end.flags = LOCAL_DMA_BUF_SYNC_END; sync_end.flags |= LOCAL_DMA_BUF_SYNC_READ; if (write) sync_end.flags |= LOCAL_DMA_BUF_SYNC_WRITE; do_ioctl(dma_buf_fd, LOCAL_DMA_BUF_IOCTL_SYNC, &sync_end); } /** * igt_require_fb_modifiers: * @fd: Open DRM file descriptor. * * Requires presence of DRM_CAP_ADDFB2_MODIFIERS. */ void igt_require_fb_modifiers(int fd) { static bool has_modifiers, cap_modifiers_tested; if (!cap_modifiers_tested) { uint64_t cap_modifiers; int ret; ret = drmGetCap(fd, LOCAL_DRM_CAP_ADDFB2_MODIFIERS, &cap_modifiers); igt_assert(ret == 0 || errno == EINVAL); has_modifiers = ret == 0 && cap_modifiers == 1; cap_modifiers_tested = true; } igt_require(has_modifiers); } int __kms_addfb(int fd, uint32_t handle, uint32_t width, uint32_t height, uint32_t stride, uint32_t pixel_format, uint64_t modifier, uint32_t flags, uint32_t *buf_id) { struct local_drm_mode_fb_cmd2 f; int ret; igt_require_fb_modifiers(fd); memset(&f, 0, sizeof(f)); f.width = width; f.height = height; f.pixel_format = pixel_format; f.flags = flags; f.handles[0] = handle; f.pitches[0] = stride; f.modifier[0] = modifier; ret = drmIoctl(fd, LOCAL_DRM_IOCTL_MODE_ADDFB2, &f); *buf_id = f.fb_id; return ret < 0 ? -errno : ret; } intel-gpu-tools-1.14/lib/intel_mmio.c0000644000175000017500000002415212665336131014502 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. * * Authors: * Eric Anholt * Ben Widawsky * */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "intel_io.h" #include "igt_core.h" #include "igt_gt.h" #include "intel_chipset.h" /** * SECTION:intel_io * @short_description: Register access and sideband I/O library * @title: I/O * @include: igt.h * @section_id: intel-gpu-tools-IO * * This library provides register I/O helpers in both a basic version and a more * fancy version which also handles forcewake and can optionally check registers * against a white-list. All register function are compatible. Hence the same * code can be used to decode registers with either of them, or also from a dump * file using intel_mmio_use_dump_file(). * * Furthermore this library also provides helper functions for accessing the * various sideband interfaces found on Valleyview/Baytrail based platforms. */ #define FAKEKEY 0x2468ace0 /** * igt_global_mmio: * * Pointer to the register range, initialized using intel_register_access_init() * or intel_mmio_use_dump_file(). It is not recommended to use this directly. */ void *igt_global_mmio; static struct _mmio_data { int inited; bool safe; uint32_t i915_devid; struct intel_register_map map; int key; } mmio_data; /** * intel_mmio_use_dump_file: * @file: name of the register dump file to open * * Sets up #igt_global_mmio to point at the data contained in @file. This allows * the same code to get reused for dumping and decoding from running hardware as * from register dumps. */ void intel_mmio_use_dump_file(char *file) { int fd; struct stat st; fd = open(file, O_RDWR); igt_fail_on_f(fd == -1, "Couldn't open %s\n", file); fstat(fd, &st); igt_global_mmio = mmap(NULL, st.st_size, PROT_READ|PROT_WRITE, MAP_PRIVATE, fd, 0); igt_fail_on_f(igt_global_mmio == MAP_FAILED, "Couldn't mmap %s\n", file); close(fd); } /** * intel_mmio_use_pci_bar: * @pci_dev: intel gracphis pci device * * Sets up #igt_global_mmio to point at the mmio bar. * * @pci_dev can be obtained from intel_get_pci_device(). */ void intel_mmio_use_pci_bar(struct pci_device *pci_dev) { uint32_t devid, gen; int mmio_bar, mmio_size; int error; devid = pci_dev->device_id; if (IS_GEN2(devid)) mmio_bar = 1; else mmio_bar = 0; gen = intel_gen(devid); if (gen < 3) mmio_size = 512*1024; else if (gen < 5) mmio_size = 512*1024; else mmio_size = 2*1024*1024; error = pci_device_map_range (pci_dev, pci_dev->regions[mmio_bar].base_addr, mmio_size, PCI_DEV_MAP_FLAG_WRITABLE, &igt_global_mmio); igt_fail_on_f(error != 0, "Couldn't map MMIO region\n"); } static void release_forcewake_lock(int fd) { close(fd); } /** * intel_register_access_init: * @pci_dev: intel graphics pci device * @safe: use safe register access tables * * This initializes the new register access library, which supports forcewake * handling and also allows register access to be checked with an explicit * whitelist. * * It also initializes #igt_global_mmio like intel_mmio_use_pci_bar(). * * @pci_dev can be obtained from intel_get_pci_device(). */ int intel_register_access_init(struct pci_device *pci_dev, int safe) { int ret; /* after old API is deprecated, remove this */ if (igt_global_mmio == NULL) intel_mmio_use_pci_bar(pci_dev); igt_assert(igt_global_mmio != NULL); if (mmio_data.inited) return -1; mmio_data.safe = (safe != 0 && intel_gen(pci_dev->device_id) >= 4) ? true : false; mmio_data.i915_devid = pci_dev->device_id; if (mmio_data.safe) mmio_data.map = intel_get_register_map(mmio_data.i915_devid); /* Find where the forcewake lock is. Forcewake doesn't exist * gen < 6, but the debugfs should do the right things for us. */ ret = igt_open_forcewake_handle(); if (ret == -1) mmio_data.key = FAKEKEY; else mmio_data.key = ret; mmio_data.inited++; return 0; } static int intel_register_access_needs_wake(void) { return mmio_data.key != FAKEKEY; } /** * intel_register_access_needs_fakewake: * * Returns: * Non-zero when forcewake initialization failed. */ int intel_register_access_needs_fakewake(void) { return mmio_data.key == FAKEKEY; } /** * intel_register_access_fini: * * Clean up the register access helper initialized with * intel_register_access_init(). */ void intel_register_access_fini(void) { if (mmio_data.key && intel_register_access_needs_wake()) release_forcewake_lock(mmio_data.key); mmio_data.inited--; } /** * intel_register_read: * @reg: register offset * * 32-bit read of the register at @offset. This function only works when the new * register access helper is initialized with intel_register_access_init(). * * Compared to INREG() it can do optional checking with the register access * white lists. * * Returns: * The value read from the register. */ uint32_t intel_register_read(uint32_t reg) { struct intel_register_range *range; uint32_t ret; igt_assert(mmio_data.inited); if (intel_gen(mmio_data.i915_devid) >= 6) igt_assert(mmio_data.key != -1); if (!mmio_data.safe) goto read_out; range = intel_get_register_range(mmio_data.map, reg, INTEL_RANGE_READ); if(!range) { igt_warn("Register read blocked for safety ""(*0x%08x)\n", reg); ret = 0xffffffff; goto out; } read_out: ret = *(volatile uint32_t *)((volatile char *)igt_global_mmio + reg); out: return ret; } /** * intel_register_write: * @reg: register offset * @val: value to write * * 32-bit write to the register at @offset. This function only works when the new * register access helper is initialized with intel_register_access_init(). * * Compared to OUTREG() it can do optional checking with the register access * white lists. */ void intel_register_write(uint32_t reg, uint32_t val) { struct intel_register_range *range; igt_assert(mmio_data.inited); if (intel_gen(mmio_data.i915_devid) >= 6) igt_assert(mmio_data.key != -1); if (!mmio_data.safe) goto write_out; range = intel_get_register_range(mmio_data.map, reg, INTEL_RANGE_WRITE); igt_warn_on_f(!range, "Register write blocked for safety ""(*0x%08x = 0x%x)\n", reg, val); write_out: *(volatile uint32_t *)((volatile char *)igt_global_mmio + reg) = val; } /** * INREG: * @reg: register offset * * 32-bit read of the register at offset @reg. This function only works when the * new register access helper is initialized with intel_register_access_init(). * * This function directly accesses the #igt_global_mmio without safety checks. * * Returns: * The value read from the register. */ uint32_t INREG(uint32_t reg) { return *(volatile uint32_t *)((volatile char *)igt_global_mmio + reg); } /** * INREG16: * @reg: register offset * * 16-bit read of the register at offset @reg. This function only works when the * new register access helper is initialized with intel_register_access_init(). * * This function directly accesses the #igt_global_mmio without safety checks. * * Returns: * The value read from the register. */ uint16_t INREG16(uint32_t reg) { return *(volatile uint16_t *)((volatile char *)igt_global_mmio + reg); } /** * INREG8: * @reg: register offset * * 8-bit read of the register at offset @reg. This function only works when the * new register access helper is initialized with intel_register_access_init(). * * This function directly accesses the #igt_global_mmio without safety checks. * * Returns: * The value read from the register. */ uint8_t INREG8(uint32_t reg) { return *((volatile uint8_t *)igt_global_mmio + reg); } /** * OUTREG: * @reg: register offset * @val: value to write * * 32-bit write of @val to the register at offset @reg. This function only works * when the new register access helper is initialized with * intel_register_access_init(). * * This function directly accesses the #igt_global_mmio without safety checks. */ void OUTREG(uint32_t reg, uint32_t val) { *(volatile uint32_t *)((volatile char *)igt_global_mmio + reg) = val; } /** * OUTREG16: * @reg: register offset * @val: value to write * * 16-bit write of @val to the register at offset @reg. This function only works * when the new register access helper is initialized with * intel_register_access_init(). * * This function directly accesses the #igt_global_mmio without safety checks. */ void OUTREG16(uint32_t reg, uint16_t val) { *(volatile uint16_t *)((volatile char *)igt_global_mmio + reg) = val; } /** * OUTREG8: * @reg: register offset * @val: value to write * * 8-bit write of @val to the register at offset @reg. This function only works * when the new register access helper is initialized with * intel_register_access_init(). * * This function directly accesses the #igt_global_mmio without safety checks. */ void OUTREG8(uint32_t reg, uint8_t val) { *((volatile uint8_t *)igt_global_mmio + reg) = val; } intel-gpu-tools-1.14/lib/igt_stats.h0000644000175000017500000000561412665336131014356 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #ifndef __IGT_STATS_H__ #define __IGT_STATS_H__ #include #include /** * igt_stats_t: * @values_u64: An array containing pushed integer values * @values_f: An array containing pushed float values * @n_values: The number of pushed values */ typedef struct { union { uint64_t *values_u64; double *values_f; }; unsigned int n_values; unsigned int is_float : 1; /*< private >*/ unsigned int capacity; unsigned int is_population : 1; unsigned int mean_variance_valid : 1; unsigned int sorted_array_valid : 1; uint64_t min, max; double range[2]; double mean, variance; union { uint64_t *sorted_u64; double *sorted_f; }; } igt_stats_t; void igt_stats_init(igt_stats_t *stats); void igt_stats_init_with_size(igt_stats_t *stats, unsigned int capacity); void igt_stats_fini(igt_stats_t *stats); bool igt_stats_is_population(igt_stats_t *stats); void igt_stats_set_population(igt_stats_t *stats, bool full_population); void igt_stats_push(igt_stats_t *stats, uint64_t value); void igt_stats_push_float(igt_stats_t *stats, double value); void igt_stats_push_array(igt_stats_t *stats, const uint64_t *values, unsigned int n_values); uint64_t igt_stats_get_min(igt_stats_t *stats); uint64_t igt_stats_get_max(igt_stats_t *stats); uint64_t igt_stats_get_range(igt_stats_t *stats); void igt_stats_get_quartiles(igt_stats_t *stats, double *q1, double *q2, double *q3); double igt_stats_get_iqr(igt_stats_t *stats); double igt_stats_get_iqm(igt_stats_t *stats); double igt_stats_get_mean(igt_stats_t *stats); double igt_stats_get_trimean(igt_stats_t *stats); double igt_stats_get_median(igt_stats_t *stats); double igt_stats_get_variance(igt_stats_t *stats); double igt_stats_get_std_deviation(igt_stats_t *stats); #endif /* __IGT_STATS_H__ */ intel-gpu-tools-1.14/lib/media_spin.h0000644000175000017500000000306212665336131014460 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Jeff McGee */ #ifndef MEDIA_SPIN_H #define MEDIA_SPIN_H void gen8_media_spinfunc(struct intel_batchbuffer *batch, struct igt_buf *dst, uint32_t spins); void gen8lp_media_spinfunc(struct intel_batchbuffer *batch, struct igt_buf *dst, uint32_t spins); void gen9_media_spinfunc(struct intel_batchbuffer *batch, struct igt_buf *dst, uint32_t spins); #endif /* MEDIA_SPIN_H */ intel-gpu-tools-1.14/lib/gen7_render.h0000644000175000017500000015217712665336131014563 00000000000000#ifndef GEN7_RENDER_H #define GEN7_RENDER_H #include #define INTEL_MASK(high, low) (((1 << ((high) - (low) + 1)) - 1) << (low)) #define GEN7_3D(Pipeline,Opcode,Subopcode) ((3 << 29) | \ ((Pipeline) << 27) | \ ((Opcode) << 24) | \ ((Subopcode) << 16)) #define GEN7_STATE_BASE_ADDRESS GEN7_3D(0, 1, 1) #define GEN7_STATE_SIP GEN7_3D(0, 1, 2) #define GEN7_PIPELINE_SELECT GEN7_3D(1, 1, 4) #define GEN7_MEDIA_STATE_POINTERS GEN7_3D(2, 0, 0) #define GEN7_MEDIA_OBJECT GEN7_3D(2, 1, 0) #define GEN7_3DSTATE_VERTEX_BUFFERS GEN7_3D(3, 0, 8) #define GEN7_3DSTATE_VERTEX_ELEMENTS GEN7_3D(3, 0, 9) #define GEN7_3DSTATE_INDEX_BUFFER GEN7_3D(3, 0, 0xa) #define GEN7_3DSTATE_VF_STATISTICS GEN7_3D(3, 0, 0xb) #define GEN7_3DSTATE_DRAWING_RECTANGLE GEN7_3D(3, 1, 0) #define GEN7_3DSTATE_CONSTANT_COLOR GEN7_3D(3, 1, 1) #define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD GEN7_3D(3, 1, 2) #define GEN7_3DSTATE_CHROMA_KEY GEN7_3D(3, 1, 4) #define GEN7_3DSTATE_POLY_STIPPLE_OFFSET GEN7_3D(3, 1, 6) #define GEN7_3DSTATE_POLY_STIPPLE_PATTERN GEN7_3D(3, 1, 7) #define GEN7_3DSTATE_LINE_STIPPLE GEN7_3D(3, 1, 8) #define GEN7_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP GEN7_3D(3, 1, 9) /* These two are BLC and CTG only, not BW or CL */ #define GEN7_3DSTATE_AA_LINE_PARAMS GEN7_3D(3, 1, 0xa) #define GEN7_3DSTATE_GS_SVB_INDEX GEN7_3D(3, 1, 0xb) #define GEN7_3DPRIMITIVE GEN7_3D(3, 3, 0) #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS GEN7_3D(3, 0, 0x02) # define GEN7_3DSTATE_SAMPLER_STATE_MODIFY_PS (1 << 12) # define GEN7_3DSTATE_SAMPLER_STATE_MODIFY_GS (1 << 9) # define GEN7_3DSTATE_SAMPLER_STATE_MODIFY_VS (1 << 8) #define GEN7_3DSTATE_URB GEN7_3D(3, 0, 0x05) /* DW1 */ # define GEN7_3DSTATE_URB_VS_SIZE_SHIFT 16 # define GEN7_3DSTATE_URB_VS_ENTRIES_SHIFT 0 /* DW2 */ # define GEN7_3DSTATE_URB_GS_ENTRIES_SHIFT 8 # define GEN7_3DSTATE_URB_GS_SIZE_SHIFT 0 #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS GEN7_3D(3, 0, 0x0d) # define GEN7_3DSTATE_VIEWPORT_STATE_MODIFY_CC (1 << 12) # define GEN7_3DSTATE_VIEWPORT_STATE_MODIFY_SF (1 << 11) # define GEN7_3DSTATE_VIEWPORT_STATE_MODIFY_CLIP (1 << 10) #define GEN7_3DSTATE_CC_STATE_POINTERS GEN7_3D(3, 0, 0x0e) #define GEN7_3DSTATE_VS GEN7_3D(3, 0, 0x10) #define GEN7_3DSTATE_GS GEN7_3D(3, 0, 0x11) /* DW4 */ # define GEN7_3DSTATE_GS_DISPATCH_START_GRF_SHIFT 0 #define GEN7_3DSTATE_CLIP GEN7_3D(3, 0, 0x12) #define GEN7_3DSTATE_SF GEN7_3D(3, 0, 0x13) /* DW1 */ # define GEN7_3DSTATE_SF_NUM_OUTPUTS_SHIFT 22 # define GEN7_3DSTATE_SF_URB_ENTRY_READ_LENGTH_SHIFT 11 # define GEN7_3DSTATE_SF_URB_ENTRY_READ_OFFSET_SHIFT 4 /* DW2 */ /* DW3 */ # define GEN7_3DSTATE_SF_CULL_BOTH (0 << 29) # define GEN7_3DSTATE_SF_CULL_NONE (1 << 29) # define GEN7_3DSTATE_SF_CULL_FRONT (2 << 29) # define GEN7_3DSTATE_SF_CULL_BACK (3 << 29) /* DW4 */ # define GEN7_3DSTATE_SF_TRI_PROVOKE_SHIFT 29 # define GEN7_3DSTATE_SF_LINE_PROVOKE_SHIFT 27 # define GEN7_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT 25 #define GEN7_3DSTATE_WM GEN7_3D(3, 0, 0x14) /* DW1 */ # define GEN7_WM_STATISTICS_ENABLE (1 << 31) # define GEN7_WM_DEPTH_CLEAR (1 << 30) # define GEN7_WM_DISPATCH_ENABLE (1 << 29) # define GEN7_WM_DEPTH_RESOLVE (1 << 28) # define GEN7_WM_HIERARCHICAL_DEPTH_RESOLVE (1 << 27) # define GEN7_WM_KILL_ENABLE (1 << 25) # define GEN7_WM_PSCDEPTH_OFF (0 << 23) # define GEN7_WM_PSCDEPTH_ON (1 << 23) # define GEN7_WM_PSCDEPTH_ON_GE (2 << 23) # define GEN7_WM_PSCDEPTH_ON_LE (3 << 23) # define GEN7_WM_USES_SOURCE_DEPTH (1 << 20) # define GEN7_WM_USES_SOURCE_W (1 << 19) # define GEN7_WM_POSITION_ZW_PIXEL (0 << 17) # define GEN7_WM_POSITION_ZW_CENTROID (2 << 17) # define GEN7_WM_POSITION_ZW_SAMPLE (3 << 17) # define GEN7_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 16) # define GEN7_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC (1 << 15) # define GEN7_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC (1 << 14) # define GEN7_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 13) # define GEN7_WM_PERSPECTIVE_CENTROID_BARYCENTRIC (1 << 12) # define GEN7_WM_PERSPECTIVE_PIXEL_BARYCENTRIC (1 << 11) # define GEN7_WM_USES_INPUT_COVERAGE_MASK (1 << 10) # define GEN7_WM_LINE_END_CAP_AA_WIDTH_0_5 (0 << 8) # define GEN7_WM_LINE_END_CAP_AA_WIDTH_1_0 (1 << 8) # define GEN7_WM_LINE_END_CAP_AA_WIDTH_2_0 (2 << 8) # define GEN7_WM_LINE_END_CAP_AA_WIDTH_4_0 (3 << 8) # define GEN7_WM_LINE_AA_WIDTH_0_5 (0 << 6) # define GEN7_WM_LINE_AA_WIDTH_1_0 (1 << 6) # define GEN7_WM_LINE_AA_WIDTH_2_0 (2 << 6) # define GEN7_WM_LINE_AA_WIDTH_4_0 (3 << 6) # define GEN7_WM_POLYGON_STIPPLE_ENABLE (1 << 4) # define GEN7_WM_LINE_STIPPLE_ENABLE (1 << 3) # define GEN7_WM_POINT_RASTRULE_UPPER_RIGHT (1 << 2) # define GEN7_WM_MSRAST_OFF_PIXEL (0 << 0) # define GEN7_WM_MSRAST_OFF_PATTERN (1 << 0) # define GEN7_WM_MSRAST_ON_PIXEL (2 << 0) # define GEN7_WM_MSRAST_ON_PATTERN (3 << 0) /* DW2 */ # define GEN7_WM_MSDISPMODE_PERPIXEL (1 << 31) #define GEN7_3DSTATE_CONSTANT_VS GEN7_3D(3, 0, 0x15) #define GEN7_3DSTATE_CONSTANT_GS GEN7_3D(3, 0, 0x16) #define GEN7_3DSTATE_CONSTANT_PS GEN7_3D(3, 0, 0x17) #define GEN7_3DSTATE_SAMPLE_MASK GEN7_3D(3, 0, 0x18) #define GEN7_3DSTATE_MULTISAMPLE GEN7_3D(3, 1, 0x0d) /* DW1 */ # define GEN7_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER (0 << 4) # define GEN7_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_UPPER_LEFT (1 << 4) # define GEN7_3DSTATE_MULTISAMPLE_NUMSAMPLES_1 (0 << 1) # define GEN7_3DSTATE_MULTISAMPLE_NUMSAMPLES_4 (2 << 1) # define GEN7_3DSTATE_MULTISAMPLE_NUMSAMPLES_8 (3 << 1) #define PIPELINE_SELECT_3D 0 #define PIPELINE_SELECT_MEDIA 1 /* for GEN7_STATE_BASE_ADDRESS */ #define BASE_ADDRESS_MODIFY (1 << 0) /* for GEN7_PIPE_CONTROL */ #define GEN7_PIPE_CONTROL GEN7_3D(3, 2, 0) #define GEN7_PIPE_CONTROL_CS_STALL (1 << 20) #define GEN7_PIPE_CONTROL_NOWRITE (0 << 14) #define GEN7_PIPE_CONTROL_WRITE_QWORD (1 << 14) #define GEN7_PIPE_CONTROL_WRITE_DEPTH (2 << 14) #define GEN7_PIPE_CONTROL_WRITE_TIME (3 << 14) #define GEN7_PIPE_CONTROL_DEPTH_STALL (1 << 13) #define GEN7_PIPE_CONTROL_WC_FLUSH (1 << 12) #define GEN7_PIPE_CONTROL_IS_FLUSH (1 << 11) #define GEN7_PIPE_CONTROL_TC_FLUSH (1 << 10) #define GEN7_PIPE_CONTROL_NOTIFY_ENABLE (1 << 8) #define GEN7_PIPE_CONTROL_GLOBAL_GTT (1 << 2) #define GEN7_PIPE_CONTROL_LOCAL_PGTT (0 << 2) #define GEN7_PIPE_CONTROL_STALL_AT_SCOREBOARD (1 << 1) #define GEN7_PIPE_CONTROL_DEPTH_CACHE_FLUSH (1 << 0) /* VERTEX_BUFFER_STATE Structure */ #define GEN7_VB0_BUFFER_INDEX_SHIFT 26 #define GEN7_VB0_VERTEXDATA (0 << 20) #define GEN7_VB0_INSTANCEDATA (1 << 20) #define GEN7_VB0_BUFFER_PITCH_SHIFT 0 #define GEN7_VB0_NULL_VERTEX_BUFFER (1 << 13) #define GEN7_VB0_ADDRESS_MODIFY_ENABLE (1 << 14) /* VERTEX_ELEMENT_STATE Structure */ #define GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT 26 #define GEN7_VE0_VALID (1 << 25) #define GEN7_VE0_FORMAT_SHIFT 16 #define GEN7_VE0_OFFSET_SHIFT 0 #define GEN7_VE1_VFCOMPONENT_0_SHIFT 28 #define GEN7_VE1_VFCOMPONENT_1_SHIFT 24 #define GEN7_VE1_VFCOMPONENT_2_SHIFT 20 #define GEN7_VE1_VFCOMPONENT_3_SHIFT 16 #define GEN7_VE1_DESTINATION_ELEMENT_OFFSET_SHIFT 0 /* 3DPRIMITIVE bits */ #define GEN7_3DPRIMITIVE_VERTEX_SEQUENTIAL (0 << 15) #define GEN7_3DPRIMITIVE_VERTEX_RANDOM (1 << 15) #define GEN7_SVG_CTL 0x7400 #define GEN7_SVG_CTL_GS_BA (0 << 8) #define GEN7_SVG_CTL_SS_BA (1 << 8) #define GEN7_SVG_CTL_IO_BA (2 << 8) #define GEN7_SVG_CTL_GS_AUB (3 << 8) #define GEN7_SVG_CTL_IO_AUB (4 << 8) #define GEN7_SVG_CTL_SIP (5 << 8) #define GEN7_VF_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN7_VF_CTL_SNAPSHOT_MUX_SELECT_THREADID (0 << 8) #define GEN7_VF_CTL_SNAPSHOT_MUX_SELECT_VF_DEBUG (1 << 8) #define GEN7_VF_CTL_SNAPSHOT_TYPE_VERTEX_SEQUENCE (0 << 4) #define GEN7_VF_CTL_SNAPSHOT_TYPE_VERTEX_INDEX (1 << 4) #define GEN7_VF_CTL_SKIP_INITIAL_PRIMITIVES (1 << 3) #define GEN7_VF_CTL_MAX_PRIMITIVES_LIMIT_ENABLE (1 << 2) #define GEN7_VF_CTL_VERTEX_RANGE_LIMIT_ENABLE (1 << 1) #define GEN7_VF_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN7_VF_STRG_VAL 0x7504 #define GEN7_VF_STR_VL_OVR 0x7508 #define GEN7_VF_VC_OVR 0x750c #define GEN7_VF_STR_PSKIP 0x7510 #define GEN7_VF_MAX_PRIM 0x7514 #define GEN7_VF_RDATA 0x7518 #define GEN7_VS_CTL 0x7600 #define GEN7_VS_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN7_VS_CTL_SNAPSHOT_MUX_VERTEX_0 (0 << 8) #define GEN7_VS_CTL_SNAPSHOT_MUX_VERTEX_1 (1 << 8) #define GEN7_VS_CTL_SNAPSHOT_MUX_VALID_COUNT (2 << 8) #define GEN7_VS_CTL_SNAPSHOT_MUX_VS_KERNEL_POINTER (3 << 8) #define GEN7_VS_CTL_SNAPSHOT_ALL_THREADS (1 << 2) #define GEN7_VS_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) #define GEN7_VS_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN7_VS_STRG_VAL 0x7604 #define GEN7_VS_RDATA 0x7608 #define GEN7_SF_CTL 0x7b00 #define GEN7_SF_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_0_FF_ID (0 << 8) #define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_0_REL_COUNT (1 << 8) #define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_1_FF_ID (2 << 8) #define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_1_REL_COUNT (3 << 8) #define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_2_FF_ID (4 << 8) #define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_2_REL_COUNT (5 << 8) #define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_COUNT (6 << 8) #define GEN7_SF_CTL_SNAPSHOT_MUX_SF_KERNEL_POINTER (7 << 8) #define GEN7_SF_CTL_MIN_MAX_PRIMITIVE_RANGE_ENABLE (1 << 4) #define GEN7_SF_CTL_DEBUG_CLIP_RECTANGLE_ENABLE (1 << 3) #define GEN7_SF_CTL_SNAPSHOT_ALL_THREADS (1 << 2) #define GEN7_SF_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) #define GEN7_SF_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN7_SF_STRG_VAL 0x7b04 #define GEN7_SF_RDATA 0x7b18 #define GEN7_WIZ_CTL 0x7c00 #define GEN7_WIZ_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN7_WIZ_CTL_SUBSPAN_INSTANCE_SHIFT 16 #define GEN7_WIZ_CTL_SNAPSHOT_MUX_WIZ_KERNEL_POINTER (0 << 8) #define GEN7_WIZ_CTL_SNAPSHOT_MUX_SUBSPAN_INSTANCE (1 << 8) #define GEN7_WIZ_CTL_SNAPSHOT_MUX_PRIMITIVE_SEQUENCE (2 << 8) #define GEN7_WIZ_CTL_SINGLE_SUBSPAN_DISPATCH (1 << 6) #define GEN7_WIZ_CTL_IGNORE_COLOR_SCOREBOARD_STALLS (1 << 5) #define GEN7_WIZ_CTL_ENABLE_SUBSPAN_INSTANCE_COMPARE (1 << 4) #define GEN7_WIZ_CTL_USE_UPSTREAM_SNAPSHOT_FLAG (1 << 3) #define GEN7_WIZ_CTL_SNAPSHOT_ALL_THREADS (1 << 2) #define GEN7_WIZ_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) #define GEN7_WIZ_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN7_WIZ_STRG_VAL 0x7c04 #define GEN7_WIZ_RDATA 0x7c18 #define GEN7_TS_CTL 0x7e00 #define GEN7_TS_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN7_TS_CTL_SNAPSHOT_MESSAGE_ERROR (0 << 8) #define GEN7_TS_CTL_SNAPSHOT_INTERFACE_DESCRIPTOR (3 << 8) #define GEN7_TS_CTL_SNAPSHOT_ALL_CHILD_THREADS (1 << 2) #define GEN7_TS_CTL_SNAPSHOT_ALL_ROOT_THREADS (1 << 1) #define GEN7_TS_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN7_TS_STRG_VAL 0x7e04 #define GEN7_TS_RDATA 0x7e08 #define GEN7_TD_CTL 0x8000 #define GEN7_TD_CTL_MUX_SHIFT 8 #define GEN7_TD_CTL_EXTERNAL_HALT_R0_DEBUG_MATCH (1 << 7) #define GEN7_TD_CTL_FORCE_EXTERNAL_HALT (1 << 6) #define GEN7_TD_CTL_EXCEPTION_MASK_OVERRIDE (1 << 5) #define GEN7_TD_CTL_FORCE_THREAD_BREAKPOINT_ENABLE (1 << 4) #define GEN7_TD_CTL_BREAKPOINT_ENABLE (1 << 2) #define GEN7_TD_CTL2 0x8004 #define GEN7_TD_CTL2_ILLEGAL_OPCODE_EXCEPTION_OVERRIDE (1 << 28) #define GEN7_TD_CTL2_MASKSTACK_EXCEPTION_OVERRIDE (1 << 26) #define GEN7_TD_CTL2_SOFTWARE_EXCEPTION_OVERRIDE (1 << 25) #define GEN7_TD_CTL2_ACTIVE_THREAD_LIMIT_SHIFT 16 #define GEN7_TD_CTL2_ACTIVE_THREAD_LIMIT_ENABLE (1 << 8) #define GEN7_TD_CTL2_THREAD_SPAWNER_EXECUTION_MASK_ENABLE (1 << 7) #define GEN7_TD_CTL2_WIZ_EXECUTION_MASK_ENABLE (1 << 6) #define GEN7_TD_CTL2_SF_EXECUTION_MASK_ENABLE (1 << 5) #define GEN7_TD_CTL2_CLIPPER_EXECUTION_MASK_ENABLE (1 << 4) #define GEN7_TD_CTL2_GS_EXECUTION_MASK_ENABLE (1 << 3) #define GEN7_TD_CTL2_VS_EXECUTION_MASK_ENABLE (1 << 0) #define GEN7_TD_VF_VS_EMSK 0x8008 #define GEN7_TD_GS_EMSK 0x800c #define GEN7_TD_CLIP_EMSK 0x8010 #define GEN7_TD_SF_EMSK 0x8014 #define GEN7_TD_WIZ_EMSK 0x8018 #define GEN7_TD_0_6_EHTRG_VAL 0x801c #define GEN7_TD_0_7_EHTRG_VAL 0x8020 #define GEN7_TD_0_6_EHTRG_MSK 0x8024 #define GEN7_TD_0_7_EHTRG_MSK 0x8028 #define GEN7_TD_RDATA 0x802c #define GEN7_TD_TS_EMSK 0x8030 #define GEN7_EU_CTL 0x8800 #define GEN7_EU_CTL_SELECT_SHIFT 16 #define GEN7_EU_CTL_DATA_MUX_SHIFT 8 #define GEN7_EU_ATT_0 0x8810 #define GEN7_EU_ATT_1 0x8814 #define GEN7_EU_ATT_DATA_0 0x8820 #define GEN7_EU_ATT_DATA_1 0x8824 #define GEN7_EU_ATT_CLR_0 0x8830 #define GEN7_EU_ATT_CLR_1 0x8834 #define GEN7_EU_RDATA 0x8840 #define _3DPRIM_POINTLIST 0x01 #define _3DPRIM_LINELIST 0x02 #define _3DPRIM_LINESTRIP 0x03 #define _3DPRIM_TRILIST 0x04 #define _3DPRIM_TRISTRIP 0x05 #define _3DPRIM_TRIFAN 0x06 #define _3DPRIM_QUADLIST 0x07 #define _3DPRIM_QUADSTRIP 0x08 #define _3DPRIM_LINELIST_ADJ 0x09 #define _3DPRIM_LINESTRIP_ADJ 0x0A #define _3DPRIM_TRILIST_ADJ 0x0B #define _3DPRIM_TRISTRIP_ADJ 0x0C #define _3DPRIM_TRISTRIP_REVERSE 0x0D #define _3DPRIM_POLYGON 0x0E #define _3DPRIM_RECTLIST 0x0F #define _3DPRIM_LINELOOP 0x10 #define _3DPRIM_POINTLIST_BF 0x11 #define _3DPRIM_LINESTRIP_CONT 0x12 #define _3DPRIM_LINESTRIP_BF 0x13 #define _3DPRIM_LINESTRIP_CONT_BF 0x14 #define _3DPRIM_TRIFAN_NOSTIPPLE 0x15 #define _3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL 0 #define _3DPRIM_VERTEXBUFFER_ACCESS_RANDOM 1 #define GEN7_ANISORATIO_2 0 #define GEN7_ANISORATIO_4 1 #define GEN7_ANISORATIO_6 2 #define GEN7_ANISORATIO_8 3 #define GEN7_ANISORATIO_10 4 #define GEN7_ANISORATIO_12 5 #define GEN7_ANISORATIO_14 6 #define GEN7_ANISORATIO_16 7 #define GEN7_BLENDFACTOR_ONE 0x1 #define GEN7_BLENDFACTOR_SRC_COLOR 0x2 #define GEN7_BLENDFACTOR_SRC_ALPHA 0x3 #define GEN7_BLENDFACTOR_DST_ALPHA 0x4 #define GEN7_BLENDFACTOR_DST_COLOR 0x5 #define GEN7_BLENDFACTOR_SRC_ALPHA_SATURATE 0x6 #define GEN7_BLENDFACTOR_CONST_COLOR 0x7 #define GEN7_BLENDFACTOR_CONST_ALPHA 0x8 #define GEN7_BLENDFACTOR_SRC1_COLOR 0x9 #define GEN7_BLENDFACTOR_SRC1_ALPHA 0x0A #define GEN7_BLENDFACTOR_ZERO 0x11 #define GEN7_BLENDFACTOR_INV_SRC_COLOR 0x12 #define GEN7_BLENDFACTOR_INV_SRC_ALPHA 0x13 #define GEN7_BLENDFACTOR_INV_DST_ALPHA 0x14 #define GEN7_BLENDFACTOR_INV_DST_COLOR 0x15 #define GEN7_BLENDFACTOR_INV_CONST_COLOR 0x17 #define GEN7_BLENDFACTOR_INV_CONST_ALPHA 0x18 #define GEN7_BLENDFACTOR_INV_SRC1_COLOR 0x19 #define GEN7_BLENDFACTOR_INV_SRC1_ALPHA 0x1A #define GEN7_BLENDFUNCTION_ADD 0 #define GEN7_BLENDFUNCTION_SUBTRACT 1 #define GEN7_BLENDFUNCTION_REVERSE_SUBTRACT 2 #define GEN7_BLENDFUNCTION_MIN 3 #define GEN7_BLENDFUNCTION_MAX 4 #define GEN7_ALPHATEST_FORMAT_UNORM8 0 #define GEN7_ALPHATEST_FORMAT_FLOAT32 1 #define GEN7_CHROMAKEY_KILL_ON_ANY_MATCH 0 #define GEN7_CHROMAKEY_REPLACE_BLACK 1 #define GEN7_CLIP_API_OGL 0 #define GEN7_CLIP_API_DX 1 #define GEN7_CLIPMODE_NORMAL 0 #define GEN7_CLIPMODE_CLIP_ALL 1 #define GEN7_CLIPMODE_CLIP_NON_REJECTED 2 #define GEN7_CLIPMODE_REJECT_ALL 3 #define GEN7_CLIPMODE_ACCEPT_ALL 4 #define GEN7_CLIP_NDCSPACE 0 #define GEN7_CLIP_SCREENSPACE 1 #define GEN7_COMPAREFUNCTION_ALWAYS 0 #define GEN7_COMPAREFUNCTION_NEVER 1 #define GEN7_COMPAREFUNCTION_LESS 2 #define GEN7_COMPAREFUNCTION_EQUAL 3 #define GEN7_COMPAREFUNCTION_LEQUAL 4 #define GEN7_COMPAREFUNCTION_GREATER 5 #define GEN7_COMPAREFUNCTION_NOTEQUAL 6 #define GEN7_COMPAREFUNCTION_GEQUAL 7 #define GEN7_COVERAGE_PIXELS_HALF 0 #define GEN7_COVERAGE_PIXELS_1 1 #define GEN7_COVERAGE_PIXELS_2 2 #define GEN7_COVERAGE_PIXELS_4 3 #define GEN7_CULLMODE_BOTH 0 #define GEN7_CULLMODE_NONE 1 #define GEN7_CULLMODE_FRONT 2 #define GEN7_CULLMODE_BACK 3 #define GEN7_DEFAULTCOLOR_R8G8B8A8_UNORM 0 #define GEN7_DEFAULTCOLOR_R32G32B32A32_FLOAT 1 #define GEN7_DEPTHFORMAT_D32_FLOAT_S8X24_UINT 0 #define GEN7_DEPTHFORMAT_D32_FLOAT 1 #define GEN7_DEPTHFORMAT_D24_UNORM_S8_UINT 2 #define GEN7_DEPTHFORMAT_D16_UNORM 5 #define GEN7_FLOATING_POINT_IEEE_754 0 #define GEN7_FLOATING_POINT_NON_IEEE_754 1 #define GEN7_FRONTWINDING_CW 0 #define GEN7_FRONTWINDING_CCW 1 #define GEN7_INDEX_BYTE 0 #define GEN7_INDEX_WORD 1 #define GEN7_INDEX_DWORD 2 #define GEN7_LOGICOPFUNCTION_CLEAR 0 #define GEN7_LOGICOPFUNCTION_NOR 1 #define GEN7_LOGICOPFUNCTION_AND_INVERTED 2 #define GEN7_LOGICOPFUNCTION_COPY_INVERTED 3 #define GEN7_LOGICOPFUNCTION_AND_REVERSE 4 #define GEN7_LOGICOPFUNCTION_INVERT 5 #define GEN7_LOGICOPFUNCTION_XOR 6 #define GEN7_LOGICOPFUNCTION_NAND 7 #define GEN7_LOGICOPFUNCTION_AND 8 #define GEN7_LOGICOPFUNCTION_EQUIV 9 #define GEN7_LOGICOPFUNCTION_NOOP 10 #define GEN7_LOGICOPFUNCTION_OR_INVERTED 11 #define GEN7_LOGICOPFUNCTION_COPY 12 #define GEN7_LOGICOPFUNCTION_OR_REVERSE 13 #define GEN7_LOGICOPFUNCTION_OR 14 #define GEN7_LOGICOPFUNCTION_SET 15 #define GEN7_MAPFILTER_NEAREST 0x0 #define GEN7_MAPFILTER_LINEAR 0x1 #define GEN7_MAPFILTER_ANISOTROPIC 0x2 #define GEN7_MIPFILTER_NONE 0 #define GEN7_MIPFILTER_NEAREST 1 #define GEN7_MIPFILTER_LINEAR 3 #define GEN7_POLYGON_FRONT_FACING 0 #define GEN7_POLYGON_BACK_FACING 1 #define GEN7_PREFILTER_ALWAYS 0x0 #define GEN7_PREFILTER_NEVER 0x1 #define GEN7_PREFILTER_LESS 0x2 #define GEN7_PREFILTER_EQUAL 0x3 #define GEN7_PREFILTER_LEQUAL 0x4 #define GEN7_PREFILTER_GREATER 0x5 #define GEN7_PREFILTER_NOTEQUAL 0x6 #define GEN7_PREFILTER_GEQUAL 0x7 #define GEN7_PROVOKING_VERTEX_0 0 #define GEN7_PROVOKING_VERTEX_1 1 #define GEN7_PROVOKING_VERTEX_2 2 #define GEN7_RASTRULE_UPPER_LEFT 0 #define GEN7_RASTRULE_UPPER_RIGHT 1 #define GEN7_RENDERTARGET_CLAMPRANGE_UNORM 0 #define GEN7_RENDERTARGET_CLAMPRANGE_SNORM 1 #define GEN7_RENDERTARGET_CLAMPRANGE_FORMAT 2 #define GEN7_STENCILOP_KEEP 0 #define GEN7_STENCILOP_ZERO 1 #define GEN7_STENCILOP_REPLACE 2 #define GEN7_STENCILOP_INCRSAT 3 #define GEN7_STENCILOP_DECRSAT 4 #define GEN7_STENCILOP_INCR 5 #define GEN7_STENCILOP_DECR 6 #define GEN7_STENCILOP_INVERT 7 #define GEN7_SURFACE_MIPMAPLAYOUT_BELOW 0 #define GEN7_SURFACE_MIPMAPLAYOUT_RIGHT 1 #define GEN7_SURFACEFORMAT_R32G32B32A32_FLOAT 0x000 #define GEN7_SURFACEFORMAT_R32G32B32A32_SINT 0x001 #define GEN7_SURFACEFORMAT_R32G32B32A32_UINT 0x002 #define GEN7_SURFACEFORMAT_R32G32B32A32_UNORM 0x003 #define GEN7_SURFACEFORMAT_R32G32B32A32_SNORM 0x004 #define GEN7_SURFACEFORMAT_R64G64_FLOAT 0x005 #define GEN7_SURFACEFORMAT_R32G32B32X32_FLOAT 0x006 #define GEN7_SURFACEFORMAT_R32G32B32A32_SSCALED 0x007 #define GEN7_SURFACEFORMAT_R32G32B32A32_USCALED 0x008 #define GEN7_SURFACEFORMAT_R32G32B32_FLOAT 0x040 #define GEN7_SURFACEFORMAT_R32G32B32_SINT 0x041 #define GEN7_SURFACEFORMAT_R32G32B32_UINT 0x042 #define GEN7_SURFACEFORMAT_R32G32B32_UNORM 0x043 #define GEN7_SURFACEFORMAT_R32G32B32_SNORM 0x044 #define GEN7_SURFACEFORMAT_R32G32B32_SSCALED 0x045 #define GEN7_SURFACEFORMAT_R32G32B32_USCALED 0x046 #define GEN7_SURFACEFORMAT_R16G16B16A16_UNORM 0x080 #define GEN7_SURFACEFORMAT_R16G16B16A16_SNORM 0x081 #define GEN7_SURFACEFORMAT_R16G16B16A16_SINT 0x082 #define GEN7_SURFACEFORMAT_R16G16B16A16_UINT 0x083 #define GEN7_SURFACEFORMAT_R16G16B16A16_FLOAT 0x084 #define GEN7_SURFACEFORMAT_R32G32_FLOAT 0x085 #define GEN7_SURFACEFORMAT_R32G32_SINT 0x086 #define GEN7_SURFACEFORMAT_R32G32_UINT 0x087 #define GEN7_SURFACEFORMAT_R32_FLOAT_X8X24_TYPELESS 0x088 #define GEN7_SURFACEFORMAT_X32_TYPELESS_G8X24_UINT 0x089 #define GEN7_SURFACEFORMAT_L32A32_FLOAT 0x08A #define GEN7_SURFACEFORMAT_R32G32_UNORM 0x08B #define GEN7_SURFACEFORMAT_R32G32_SNORM 0x08C #define GEN7_SURFACEFORMAT_R64_FLOAT 0x08D #define GEN7_SURFACEFORMAT_R16G16B16X16_UNORM 0x08E #define GEN7_SURFACEFORMAT_R16G16B16X16_FLOAT 0x08F #define GEN7_SURFACEFORMAT_A32X32_FLOAT 0x090 #define GEN7_SURFACEFORMAT_L32X32_FLOAT 0x091 #define GEN7_SURFACEFORMAT_I32X32_FLOAT 0x092 #define GEN7_SURFACEFORMAT_R16G16B16A16_SSCALED 0x093 #define GEN7_SURFACEFORMAT_R16G16B16A16_USCALED 0x094 #define GEN7_SURFACEFORMAT_R32G32_SSCALED 0x095 #define GEN7_SURFACEFORMAT_R32G32_USCALED 0x096 #define GEN7_SURFACEFORMAT_B8G8R8A8_UNORM 0x0C0 #define GEN7_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB 0x0C1 #define GEN7_SURFACEFORMAT_R10G10B10A2_UNORM 0x0C2 #define GEN7_SURFACEFORMAT_R10G10B10A2_UNORM_SRGB 0x0C3 #define GEN7_SURFACEFORMAT_R10G10B10A2_UINT 0x0C4 #define GEN7_SURFACEFORMAT_R10G10B10_SNORM_A2_UNORM 0x0C5 #define GEN7_SURFACEFORMAT_R8G8B8A8_UNORM 0x0C7 #define GEN7_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB 0x0C8 #define GEN7_SURFACEFORMAT_R8G8B8A8_SNORM 0x0C9 #define GEN7_SURFACEFORMAT_R8G8B8A8_SINT 0x0CA #define GEN7_SURFACEFORMAT_R8G8B8A8_UINT 0x0CB #define GEN7_SURFACEFORMAT_R16G16_UNORM 0x0CC #define GEN7_SURFACEFORMAT_R16G16_SNORM 0x0CD #define GEN7_SURFACEFORMAT_R16G16_SINT 0x0CE #define GEN7_SURFACEFORMAT_R16G16_UINT 0x0CF #define GEN7_SURFACEFORMAT_R16G16_FLOAT 0x0D0 #define GEN7_SURFACEFORMAT_B10G10R10A2_UNORM 0x0D1 #define GEN7_SURFACEFORMAT_B10G10R10A2_UNORM_SRGB 0x0D2 #define GEN7_SURFACEFORMAT_R11G11B10_FLOAT 0x0D3 #define GEN7_SURFACEFORMAT_R32_SINT 0x0D6 #define GEN7_SURFACEFORMAT_R32_UINT 0x0D7 #define GEN7_SURFACEFORMAT_R32_FLOAT 0x0D8 #define GEN7_SURFACEFORMAT_R24_UNORM_X8_TYPELESS 0x0D9 #define GEN7_SURFACEFORMAT_X24_TYPELESS_G8_UINT 0x0DA #define GEN7_SURFACEFORMAT_L16A16_UNORM 0x0DF #define GEN7_SURFACEFORMAT_I24X8_UNORM 0x0E0 #define GEN7_SURFACEFORMAT_L24X8_UNORM 0x0E1 #define GEN7_SURFACEFORMAT_A24X8_UNORM 0x0E2 #define GEN7_SURFACEFORMAT_I32_FLOAT 0x0E3 #define GEN7_SURFACEFORMAT_L32_FLOAT 0x0E4 #define GEN7_SURFACEFORMAT_A32_FLOAT 0x0E5 #define GEN7_SURFACEFORMAT_B8G8R8X8_UNORM 0x0E9 #define GEN7_SURFACEFORMAT_B8G8R8X8_UNORM_SRGB 0x0EA #define GEN7_SURFACEFORMAT_R8G8B8X8_UNORM 0x0EB #define GEN7_SURFACEFORMAT_R8G8B8X8_UNORM_SRGB 0x0EC #define GEN7_SURFACEFORMAT_R9G9B9E5_SHAREDEXP 0x0ED #define GEN7_SURFACEFORMAT_B10G10R10X2_UNORM 0x0EE #define GEN7_SURFACEFORMAT_L16A16_FLOAT 0x0F0 #define GEN7_SURFACEFORMAT_R32_UNORM 0x0F1 #define GEN7_SURFACEFORMAT_R32_SNORM 0x0F2 #define GEN7_SURFACEFORMAT_R10G10B10X2_USCALED 0x0F3 #define GEN7_SURFACEFORMAT_R8G8B8A8_SSCALED 0x0F4 #define GEN7_SURFACEFORMAT_R8G8B8A8_USCALED 0x0F5 #define GEN7_SURFACEFORMAT_R16G16_SSCALED 0x0F6 #define GEN7_SURFACEFORMAT_R16G16_USCALED 0x0F7 #define GEN7_SURFACEFORMAT_R32_SSCALED 0x0F8 #define GEN7_SURFACEFORMAT_R32_USCALED 0x0F9 #define GEN7_SURFACEFORMAT_B5G6R5_UNORM 0x100 #define GEN7_SURFACEFORMAT_B5G6R5_UNORM_SRGB 0x101 #define GEN7_SURFACEFORMAT_B5G5R5A1_UNORM 0x102 #define GEN7_SURFACEFORMAT_B5G5R5A1_UNORM_SRGB 0x103 #define GEN7_SURFACEFORMAT_B4G4R4A4_UNORM 0x104 #define GEN7_SURFACEFORMAT_B4G4R4A4_UNORM_SRGB 0x105 #define GEN7_SURFACEFORMAT_R8G8_UNORM 0x106 #define GEN7_SURFACEFORMAT_R8G8_SNORM 0x107 #define GEN7_SURFACEFORMAT_R8G8_SINT 0x108 #define GEN7_SURFACEFORMAT_R8G8_UINT 0x109 #define GEN7_SURFACEFORMAT_R16_UNORM 0x10A #define GEN7_SURFACEFORMAT_R16_SNORM 0x10B #define GEN7_SURFACEFORMAT_R16_SINT 0x10C #define GEN7_SURFACEFORMAT_R16_UINT 0x10D #define GEN7_SURFACEFORMAT_R16_FLOAT 0x10E #define GEN7_SURFACEFORMAT_I16_UNORM 0x111 #define GEN7_SURFACEFORMAT_L16_UNORM 0x112 #define GEN7_SURFACEFORMAT_A16_UNORM 0x113 #define GEN7_SURFACEFORMAT_L8A8_UNORM 0x114 #define GEN7_SURFACEFORMAT_I16_FLOAT 0x115 #define GEN7_SURFACEFORMAT_L16_FLOAT 0x116 #define GEN7_SURFACEFORMAT_A16_FLOAT 0x117 #define GEN7_SURFACEFORMAT_R5G5_SNORM_B6_UNORM 0x119 #define GEN7_SURFACEFORMAT_B5G5R5X1_UNORM 0x11A #define GEN7_SURFACEFORMAT_B5G5R5X1_UNORM_SRGB 0x11B #define GEN7_SURFACEFORMAT_R8G8_SSCALED 0x11C #define GEN7_SURFACEFORMAT_R8G8_USCALED 0x11D #define GEN7_SURFACEFORMAT_R16_SSCALED 0x11E #define GEN7_SURFACEFORMAT_R16_USCALED 0x11F #define GEN7_SURFACEFORMAT_R8_UNORM 0x140 #define GEN7_SURFACEFORMAT_R8_SNORM 0x141 #define GEN7_SURFACEFORMAT_R8_SINT 0x142 #define GEN7_SURFACEFORMAT_R8_UINT 0x143 #define GEN7_SURFACEFORMAT_A8_UNORM 0x144 #define GEN7_SURFACEFORMAT_I8_UNORM 0x145 #define GEN7_SURFACEFORMAT_L8_UNORM 0x146 #define GEN7_SURFACEFORMAT_P4A4_UNORM 0x147 #define GEN7_SURFACEFORMAT_A4P4_UNORM 0x148 #define GEN7_SURFACEFORMAT_R8_SSCALED 0x149 #define GEN7_SURFACEFORMAT_R8_USCALED 0x14A #define GEN7_SURFACEFORMAT_R1_UINT 0x181 #define GEN7_SURFACEFORMAT_YCRCB_NORMAL 0x182 #define GEN7_SURFACEFORMAT_YCRCB_SWAPUVY 0x183 #define GEN7_SURFACEFORMAT_BC1_UNORM 0x186 #define GEN7_SURFACEFORMAT_BC2_UNORM 0x187 #define GEN7_SURFACEFORMAT_BC3_UNORM 0x188 #define GEN7_SURFACEFORMAT_BC4_UNORM 0x189 #define GEN7_SURFACEFORMAT_BC5_UNORM 0x18A #define GEN7_SURFACEFORMAT_BC1_UNORM_SRGB 0x18B #define GEN7_SURFACEFORMAT_BC2_UNORM_SRGB 0x18C #define GEN7_SURFACEFORMAT_BC3_UNORM_SRGB 0x18D #define GEN7_SURFACEFORMAT_MONO8 0x18E #define GEN7_SURFACEFORMAT_YCRCB_SWAPUV 0x18F #define GEN7_SURFACEFORMAT_YCRCB_SWAPY 0x190 #define GEN7_SURFACEFORMAT_DXT1_RGB 0x191 #define GEN7_SURFACEFORMAT_FXT1 0x192 #define GEN7_SURFACEFORMAT_R8G8B8_UNORM 0x193 #define GEN7_SURFACEFORMAT_R8G8B8_SNORM 0x194 #define GEN7_SURFACEFORMAT_R8G8B8_SSCALED 0x195 #define GEN7_SURFACEFORMAT_R8G8B8_USCALED 0x196 #define GEN7_SURFACEFORMAT_R64G64B64A64_FLOAT 0x197 #define GEN7_SURFACEFORMAT_R64G64B64_FLOAT 0x198 #define GEN7_SURFACEFORMAT_BC4_SNORM 0x199 #define GEN7_SURFACEFORMAT_BC5_SNORM 0x19A #define GEN7_SURFACEFORMAT_R16G16B16_UNORM 0x19C #define GEN7_SURFACEFORMAT_R16G16B16_SNORM 0x19D #define GEN7_SURFACEFORMAT_R16G16B16_SSCALED 0x19E #define GEN7_SURFACEFORMAT_R16G16B16_USCALED 0x19F #define GEN7_SURFACERETURNFORMAT_FLOAT32 0 #define GEN7_SURFACERETURNFORMAT_S1 1 #define GEN7_SURFACE_1D 0 #define GEN7_SURFACE_2D 1 #define GEN7_SURFACE_3D 2 #define GEN7_SURFACE_CUBE 3 #define GEN7_SURFACE_BUFFER 4 #define GEN7_SURFACE_NULL 7 #define GEN7_BORDER_COLOR_MODE_DEFAULT 0 #define GEN7_BORDER_COLOR_MODE_LEGACY 1 #define GEN7_TEXCOORDMODE_WRAP 0 #define GEN7_TEXCOORDMODE_MIRROR 1 #define GEN7_TEXCOORDMODE_CLAMP 2 #define GEN7_TEXCOORDMODE_CUBE 3 #define GEN7_TEXCOORDMODE_CLAMP_BORDER 4 #define GEN7_TEXCOORDMODE_MIRROR_ONCE 5 #define GEN7_THREAD_PRIORITY_NORMAL 0 #define GEN7_THREAD_PRIORITY_HIGH 1 #define GEN7_TILEWALK_XMAJOR 0 #define GEN7_TILEWALK_YMAJOR 1 #define GEN7_VERTEX_SUBPIXEL_PRECISION_8BITS 0 #define GEN7_VERTEX_SUBPIXEL_PRECISION_4BITS 1 #define GEN7_VERTEXBUFFER_ACCESS_VERTEXDATA 0 #define GEN7_VERTEXBUFFER_ACCESS_INSTANCEDATA 1 #define GEN7_VFCOMPONENT_NOSTORE 0 #define GEN7_VFCOMPONENT_STORE_SRC 1 #define GEN7_VFCOMPONENT_STORE_0 2 #define GEN7_VFCOMPONENT_STORE_1_FLT 3 #define GEN7_VFCOMPONENT_STORE_1_INT 4 #define GEN7_VFCOMPONENT_STORE_VID 5 #define GEN7_VFCOMPONENT_STORE_IID 6 #define GEN7_VFCOMPONENT_STORE_PID 7 /* Execution Unit (EU) defines */ #define GEN7_ALIGN_1 0 #define GEN7_ALIGN_16 1 #define GEN7_ADDRESS_DIRECT 0 #define GEN7_ADDRESS_REGISTER_INDIRECT_REGISTER 1 #define GEN7_CHANNEL_X 0 #define GEN7_CHANNEL_Y 1 #define GEN7_CHANNEL_Z 2 #define GEN7_CHANNEL_W 3 #define GEN7_COMPRESSION_NONE 0 #define GEN7_COMPRESSION_2NDHALF 1 #define GEN7_COMPRESSION_COMPRESSED 2 #define GEN7_CONDITIONAL_NONE 0 #define GEN7_CONDITIONAL_Z 1 #define GEN7_CONDITIONAL_NZ 2 #define GEN7_CONDITIONAL_EQ 1 /* Z */ #define GEN7_CONDITIONAL_NEQ 2 /* NZ */ #define GEN7_CONDITIONAL_G 3 #define GEN7_CONDITIONAL_GE 4 #define GEN7_CONDITIONAL_L 5 #define GEN7_CONDITIONAL_LE 6 #define GEN7_CONDITIONAL_C 7 #define GEN7_CONDITIONAL_O 8 #define GEN7_DEBUG_NONE 0 #define GEN7_DEBUG_BREAKPOINT 1 #define GEN7_DEPENDENCY_NORMAL 0 #define GEN7_DEPENDENCY_NOTCLEARED 1 #define GEN7_DEPENDENCY_NOTCHECKED 2 #define GEN7_DEPENDENCY_DISABLE 3 #define GEN7_EXECUTE_1 0 #define GEN7_EXECUTE_2 1 #define GEN7_EXECUTE_4 2 #define GEN7_EXECUTE_8 3 #define GEN7_EXECUTE_16 4 #define GEN7_EXECUTE_32 5 #define GEN7_HORIZONTAL_STRIDE_0 0 #define GEN7_HORIZONTAL_STRIDE_1 1 #define GEN7_HORIZONTAL_STRIDE_2 2 #define GEN7_HORIZONTAL_STRIDE_4 3 #define GEN7_INSTRUCTION_NORMAL 0 #define GEN7_INSTRUCTION_SATURATE 1 #define INTEL_MASK_ENABLE 0 #define INTEL_MASK_DISABLE 1 #define GEN7_OPCODE_MOV 1 #define GEN7_OPCODE_SEL 2 #define GEN7_OPCODE_NOT 4 #define GEN7_OPCODE_AND 5 #define GEN7_OPCODE_OR 6 #define GEN7_OPCODE_XOR 7 #define GEN7_OPCODE_SHR 8 #define GEN7_OPCODE_SHL 9 #define GEN7_OPCODE_RSR 10 #define GEN7_OPCODE_RSL 11 #define GEN7_OPCODE_ASR 12 #define GEN7_OPCODE_CMP 16 #define GEN7_OPCODE_JMPI 32 #define GEN7_OPCODE_IF 34 #define GEN7_OPCODE_IFF 35 #define GEN7_OPCODE_ELSE 36 #define GEN7_OPCODE_ENDIF 37 #define GEN7_OPCODE_DO 38 #define GEN7_OPCODE_WHILE 39 #define GEN7_OPCODE_BREAK 40 #define GEN7_OPCODE_CONTINUE 41 #define GEN7_OPCODE_HALT 42 #define GEN7_OPCODE_MSAVE 44 #define GEN7_OPCODE_MRESTORE 45 #define GEN7_OPCODE_PUSH 46 #define GEN7_OPCODE_POP 47 #define GEN7_OPCODE_WAIT 48 #define GEN7_OPCODE_SEND 49 #define GEN7_OPCODE_ADD 64 #define GEN7_OPCODE_MUL 65 #define GEN7_OPCODE_AVG 66 #define GEN7_OPCODE_FRC 67 #define GEN7_OPCODE_RNDU 68 #define GEN7_OPCODE_RNDD 69 #define GEN7_OPCODE_RNDE 70 #define GEN7_OPCODE_RNDZ 71 #define GEN7_OPCODE_MAC 72 #define GEN7_OPCODE_MACH 73 #define GEN7_OPCODE_LZD 74 #define GEN7_OPCODE_SAD2 80 #define GEN7_OPCODE_SADA2 81 #define GEN7_OPCODE_DP4 84 #define GEN7_OPCODE_DPH 85 #define GEN7_OPCODE_DP3 86 #define GEN7_OPCODE_DP2 87 #define GEN7_OPCODE_DPA2 88 #define GEN7_OPCODE_LINE 89 #define GEN7_OPCODE_NOP 126 #define GEN7_PREDICATE_NONE 0 #define GEN7_PREDICATE_NORMAL 1 #define GEN7_PREDICATE_ALIGN1_ANYV 2 #define GEN7_PREDICATE_ALIGN1_ALLV 3 #define GEN7_PREDICATE_ALIGN1_ANY2H 4 #define GEN7_PREDICATE_ALIGN1_ALL2H 5 #define GEN7_PREDICATE_ALIGN1_ANY4H 6 #define GEN7_PREDICATE_ALIGN1_ALL4H 7 #define GEN7_PREDICATE_ALIGN1_ANY8H 8 #define GEN7_PREDICATE_ALIGN1_ALL8H 9 #define GEN7_PREDICATE_ALIGN1_ANY16H 10 #define GEN7_PREDICATE_ALIGN1_ALL16H 11 #define GEN7_PREDICATE_ALIGN16_REPLICATE_X 2 #define GEN7_PREDICATE_ALIGN16_REPLICATE_Y 3 #define GEN7_PREDICATE_ALIGN16_REPLICATE_Z 4 #define GEN7_PREDICATE_ALIGN16_REPLICATE_W 5 #define GEN7_PREDICATE_ALIGN16_ANY4H 6 #define GEN7_PREDICATE_ALIGN16_ALL4H 7 #define GEN7_ARCHITECTURE_REGISTER_FILE 0 #define GEN7_GENERAL_REGISTER_FILE 1 #define GEN7_MESSAGE_REGISTER_FILE 2 #define GEN7_IMMEDIATE_VALUE 3 #define GEN7_REGISTER_TYPE_UD 0 #define GEN7_REGISTER_TYPE_D 1 #define GEN7_REGISTER_TYPE_UW 2 #define GEN7_REGISTER_TYPE_W 3 #define GEN7_REGISTER_TYPE_UB 4 #define GEN7_REGISTER_TYPE_B 5 #define GEN7_REGISTER_TYPE_VF 5 /* packed float vector, immediates only? */ #define GEN7_REGISTER_TYPE_HF 6 #define GEN7_REGISTER_TYPE_V 6 /* packed int vector, immediates only, uword dest only */ #define GEN7_REGISTER_TYPE_F 7 #define GEN7_ARF_NULL 0x00 #define GEN7_ARF_ADDRESS 0x10 #define GEN7_ARF_ACCUMULATOR 0x20 #define GEN7_ARF_FLAG 0x30 #define GEN7_ARF_MASK 0x40 #define GEN7_ARF_MASK_STACK 0x50 #define GEN7_ARF_MASK_STACK_DEPTH 0x60 #define GEN7_ARF_STATE 0x70 #define GEN7_ARF_CONTROL 0x80 #define GEN7_ARF_NOTIFICATION_COUNT 0x90 #define GEN7_ARF_IP 0xA0 #define GEN7_AMASK 0 #define GEN7_IMASK 1 #define GEN7_LMASK 2 #define GEN7_CMASK 3 #define GEN7_THREAD_NORMAL 0 #define GEN7_THREAD_ATOMIC 1 #define GEN7_THREAD_SWITCH 2 #define GEN7_VERTICAL_STRIDE_0 0 #define GEN7_VERTICAL_STRIDE_1 1 #define GEN7_VERTICAL_STRIDE_2 2 #define GEN7_VERTICAL_STRIDE_4 3 #define GEN7_VERTICAL_STRIDE_8 4 #define GEN7_VERTICAL_STRIDE_16 5 #define GEN7_VERTICAL_STRIDE_32 6 #define GEN7_VERTICAL_STRIDE_64 7 #define GEN7_VERTICAL_STRIDE_128 8 #define GEN7_VERTICAL_STRIDE_256 9 #define GEN7_VERTICAL_STRIDE_ONE_DIMENSIONAL 0xF #define GEN7_WIDTH_1 0 #define GEN7_WIDTH_2 1 #define GEN7_WIDTH_4 2 #define GEN7_WIDTH_8 3 #define GEN7_WIDTH_16 4 #define GEN7_STATELESS_BUFFER_BOUNDARY_1K 0 #define GEN7_STATELESS_BUFFER_BOUNDARY_2K 1 #define GEN7_STATELESS_BUFFER_BOUNDARY_4K 2 #define GEN7_STATELESS_BUFFER_BOUNDARY_8K 3 #define GEN7_STATELESS_BUFFER_BOUNDARY_16K 4 #define GEN7_STATELESS_BUFFER_BOUNDARY_32K 5 #define GEN7_STATELESS_BUFFER_BOUNDARY_64K 6 #define GEN7_STATELESS_BUFFER_BOUNDARY_128K 7 #define GEN7_STATELESS_BUFFER_BOUNDARY_256K 8 #define GEN7_STATELESS_BUFFER_BOUNDARY_512K 9 #define GEN7_STATELESS_BUFFER_BOUNDARY_1M 10 #define GEN7_STATELESS_BUFFER_BOUNDARY_2M 11 #define GEN7_POLYGON_FACING_FRONT 0 #define GEN7_POLYGON_FACING_BACK 1 #define GEN7_MESSAGE_TARGET_NULL 0 #define GEN7_MESSAGE_TARGET_MATH 1 #define GEN7_MESSAGE_TARGET_SAMPLER 2 #define GEN7_MESSAGE_TARGET_GATEWAY 3 #define GEN7_MESSAGE_TARGET_DATAPORT_READ 4 #define GEN7_MESSAGE_TARGET_DATAPORT_WRITE 5 #define GEN7_MESSAGE_TARGET_URB 6 #define GEN7_MESSAGE_TARGET_THREAD_SPAWNER 7 #define GEN7_SAMPLER_RETURN_FORMAT_FLOAT32 0 #define GEN7_SAMPLER_RETURN_FORMAT_UINT32 2 #define GEN7_SAMPLER_RETURN_FORMAT_SINT32 3 #define GEN7_SAMPLER_MESSAGE_SIMD8_SAMPLE 0 #define GEN7_SAMPLER_MESSAGE_SIMD16_SAMPLE 0 #define GEN7_SAMPLER_MESSAGE_SIMD16_SAMPLE_BIAS 0 #define GEN7_SAMPLER_MESSAGE_SIMD8_KILLPIX 1 #define GEN7_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_LOD 1 #define GEN7_SAMPLER_MESSAGE_SIMD16_SAMPLE_LOD 1 #define GEN7_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_GRADIENTS 2 #define GEN7_SAMPLER_MESSAGE_SIMD8_SAMPLE_GRADIENTS 2 #define GEN7_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_COMPARE 0 #define GEN7_SAMPLER_MESSAGE_SIMD16_SAMPLE_COMPARE 2 #define GEN7_SAMPLER_MESSAGE_SIMD4X2_RESINFO 2 #define GEN7_SAMPLER_MESSAGE_SIMD8_RESINFO 2 #define GEN7_SAMPLER_MESSAGE_SIMD16_RESINFO 2 #define GEN7_SAMPLER_MESSAGE_SIMD4X2_LD 3 #define GEN7_SAMPLER_MESSAGE_SIMD8_LD 3 #define GEN7_SAMPLER_MESSAGE_SIMD16_LD 3 #define GEN7_DATAPORT_OWORD_BLOCK_1_OWORDLOW 0 #define GEN7_DATAPORT_OWORD_BLOCK_1_OWORDHIGH 1 #define GEN7_DATAPORT_OWORD_BLOCK_2_OWORDS 2 #define GEN7_DATAPORT_OWORD_BLOCK_4_OWORDS 3 #define GEN7_DATAPORT_OWORD_BLOCK_8_OWORDS 4 #define GEN7_DATAPORT_OWORD_DUAL_BLOCK_1OWORD 0 #define GEN7_DATAPORT_OWORD_DUAL_BLOCK_4OWORDS 2 #define GEN7_DATAPORT_DWORD_SCATTERED_BLOCK_8DWORDS 2 #define GEN7_DATAPORT_DWORD_SCATTERED_BLOCK_16DWORDS 3 #define GEN7_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ 0 #define GEN7_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ 1 #define GEN7_DATAPORT_READ_MESSAGE_DWORD_BLOCK_READ 2 #define GEN7_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ 3 #define GEN7_DATAPORT_READ_TARGET_DATA_CACHE 0 #define GEN7_DATAPORT_READ_TARGET_RENDER_CACHE 1 #define GEN7_DATAPORT_READ_TARGET_SAMPLER_CACHE 2 #define GEN7_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE 0 #define GEN7_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE_REPLICATED 1 #define GEN7_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN01 2 #define GEN7_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN23 3 #define GEN7_DATAPORT_RENDER_TARGET_WRITE_SIMD8_SINGLE_SOURCE_SUBSPAN01 4 #define GEN7_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE 0 #define GEN7_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE 1 #define GEN7_DATAPORT_WRITE_MESSAGE_DWORD_BLOCK_WRITE 2 #define GEN7_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE 3 #define GEN7_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE 4 #define GEN7_DATAPORT_WRITE_MESSAGE_STREAMED_VERTEX_BUFFER_WRITE 5 #define GEN7_DATAPORT_WRITE_MESSAGE_FLUSH_RENDER_CACHE 7 #define GEN7_MATH_FUNCTION_INV 1 #define GEN7_MATH_FUNCTION_LOG 2 #define GEN7_MATH_FUNCTION_EXP 3 #define GEN7_MATH_FUNCTION_SQRT 4 #define GEN7_MATH_FUNCTION_RSQ 5 #define GEN7_MATH_FUNCTION_SIN 6 /* was 7 */ #define GEN7_MATH_FUNCTION_COS 7 /* was 8 */ #define GEN7_MATH_FUNCTION_SINCOS 8 /* was 6 */ #define GEN7_MATH_FUNCTION_TAN 9 #define GEN7_MATH_FUNCTION_POW 10 #define GEN7_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER 11 #define GEN7_MATH_FUNCTION_INT_DIV_QUOTIENT 12 #define GEN7_MATH_FUNCTION_INT_DIV_REMAINDER 13 #define GEN7_MATH_INTEGER_UNSIGNED 0 #define GEN7_MATH_INTEGER_SIGNED 1 #define GEN7_MATH_PRECISION_FULL 0 #define GEN7_MATH_PRECISION_PARTIAL 1 #define GEN7_MATH_SATURATE_NONE 0 #define GEN7_MATH_SATURATE_SATURATE 1 #define GEN7_MATH_DATA_VECTOR 0 #define GEN7_MATH_DATA_SCALAR 1 #define GEN7_URB_OPCODE_WRITE 0 #define GEN7_URB_SWIZZLE_NONE 0 #define GEN7_URB_SWIZZLE_INTERLEAVE 1 #define GEN7_URB_SWIZZLE_TRANSPOSE 2 #define GEN7_SCRATCH_SPACE_SIZE_1K 0 #define GEN7_SCRATCH_SPACE_SIZE_2K 1 #define GEN7_SCRATCH_SPACE_SIZE_4K 2 #define GEN7_SCRATCH_SPACE_SIZE_8K 3 #define GEN7_SCRATCH_SPACE_SIZE_16K 4 #define GEN7_SCRATCH_SPACE_SIZE_32K 5 #define GEN7_SCRATCH_SPACE_SIZE_64K 6 #define GEN7_SCRATCH_SPACE_SIZE_128K 7 #define GEN7_SCRATCH_SPACE_SIZE_256K 8 #define GEN7_SCRATCH_SPACE_SIZE_512K 9 #define GEN7_SCRATCH_SPACE_SIZE_1M 10 #define GEN7_SCRATCH_SPACE_SIZE_2M 11 /* The hardware supports two different modes for border color. The * default (OpenGL) mode uses floating-point color channels, while the * legacy mode uses 4 bytes. * * More significantly, the legacy mode respects the components of the * border color for channels not present in the source, (whereas the * default mode will ignore the border color's alpha channel and use * alpha==1 for an RGB source, for example). * * The legacy mode matches the semantics specified by the Render * extension. */ struct gen7_sampler_default_border_color { float color[4]; }; struct gen7_sampler_legacy_border_color { uint8_t color[4]; }; struct gen7_blend_state { struct { uint32_t dest_blend_factor:5; uint32_t source_blend_factor:5; uint32_t pad3:1; uint32_t blend_func:3; uint32_t pad2:1; uint32_t ia_dest_blend_factor:5; uint32_t ia_source_blend_factor:5; uint32_t pad1:1; uint32_t ia_blend_func:3; uint32_t pad0:1; uint32_t ia_blend_enable:1; uint32_t blend_enable:1; } blend0; struct { uint32_t post_blend_clamp_enable:1; uint32_t pre_blend_clamp_enable:1; uint32_t clamp_range:2; uint32_t pad0:4; uint32_t x_dither_offset:2; uint32_t y_dither_offset:2; uint32_t dither_enable:1; uint32_t alpha_test_func:3; uint32_t alpha_test_enable:1; uint32_t pad1:1; uint32_t logic_op_func:4; uint32_t logic_op_enable:1; uint32_t pad2:1; uint32_t write_disable_b:1; uint32_t write_disable_g:1; uint32_t write_disable_r:1; uint32_t write_disable_a:1; uint32_t pad3:1; uint32_t alpha_to_coverage_dither:1; uint32_t alpha_to_one:1; uint32_t alpha_to_coverage:1; } blend1; }; struct gen7_color_calc_state { struct { uint32_t alpha_test_format:1; uint32_t pad0:14; uint32_t round_disable:1; uint32_t bf_stencil_ref:8; uint32_t stencil_ref:8; } cc0; union { float alpha_ref_f; struct { uint32_t ui:8; uint32_t pad0:24; } alpha_ref_fi; } cc1; float constant_r; float constant_g; float constant_b; float constant_a; }; struct gen7_depth_stencil_state { struct { uint32_t pad0:3; uint32_t bf_stencil_pass_depth_pass_op:3; uint32_t bf_stencil_pass_depth_fail_op:3; uint32_t bf_stencil_fail_op:3; uint32_t bf_stencil_func:3; uint32_t bf_stencil_enable:1; uint32_t pad1:2; uint32_t stencil_write_enable:1; uint32_t stencil_pass_depth_pass_op:3; uint32_t stencil_pass_depth_fail_op:3; uint32_t stencil_fail_op:3; uint32_t stencil_func:3; uint32_t stencil_enable:1; } ds0; struct { uint32_t bf_stencil_write_mask:8; uint32_t bf_stencil_test_mask:8; uint32_t stencil_write_mask:8; uint32_t stencil_test_mask:8; } ds1; struct { uint32_t pad0:26; uint32_t depth_write_enable:1; uint32_t depth_test_func:3; uint32_t pad1:1; uint32_t depth_test_enable:1; } ds2; }; struct gen7_surface_state { struct { unsigned int cube_pos_z:1; unsigned int cube_neg_z:1; unsigned int cube_pos_y:1; unsigned int cube_neg_y:1; unsigned int cube_pos_x:1; unsigned int cube_neg_x:1; unsigned int pad2:2; unsigned int render_cache_read_write:1; unsigned int pad1:1; unsigned int surface_array_spacing:1; unsigned int vert_line_stride_ofs:1; unsigned int vert_line_stride:1; unsigned int tile_walk:1; unsigned int tiled_surface:1; unsigned int horizontal_alignment:1; unsigned int vertical_alignment:2; unsigned int surface_format:9; /**< BRW_SURFACEFORMAT_x */ unsigned int pad0:1; unsigned int is_array:1; unsigned int surface_type:3; /**< BRW_SURFACE_1D/2D/3D/CUBE */ } ss0; struct { unsigned int base_addr; } ss1; struct { unsigned int width:14; unsigned int pad1:2; unsigned int height:14; unsigned int pad0:2; } ss2; struct { unsigned int pitch:18; unsigned int pad:3; unsigned int depth:11; } ss3; struct { unsigned int multisample_position_palette_index:3; unsigned int num_multisamples:3; unsigned int multisampled_surface_storage_format:1; unsigned int render_target_view_extent:11; unsigned int min_array_elt:11; unsigned int rotation:2; unsigned int pad0:1; } ss4; struct { unsigned int mip_count:4; unsigned int min_lod:4; unsigned int pad1:12; unsigned int y_offset:4; unsigned int pad0:1; unsigned int x_offset:7; } ss5; struct { unsigned int pad; /* Multisample Control Surface stuff */ } ss6; struct { unsigned int resource_min_lod:12; unsigned int pad0:16; unsigned int alpha_clear_color:1; unsigned int blue_clear_color:1; unsigned int green_clear_color:1; unsigned int red_clear_color:1; } ss7; }; struct gen7_sampler_state { struct { unsigned int aniso_algorithm:1; unsigned int lod_bias:13; unsigned int min_filter:3; unsigned int mag_filter:3; unsigned int mip_filter:2; unsigned int base_level:5; unsigned int pad1:1; unsigned int lod_preclamp:1; unsigned int default_color_mode:1; unsigned int pad0:1; unsigned int disable:1; } ss0; struct { unsigned int cube_control_mode:1; unsigned int shadow_function:3; unsigned int pad:4; unsigned int max_lod:12; unsigned int min_lod:12; } ss1; struct { unsigned int pad:5; unsigned int default_color_pointer:27; } ss2; struct { unsigned int r_wrap_mode:3; unsigned int t_wrap_mode:3; unsigned int s_wrap_mode:3; unsigned int pad:1; unsigned int non_normalized_coord:1; unsigned int trilinear_quality:2; unsigned int address_round:6; unsigned int max_aniso:3; unsigned int chroma_key_mode:1; unsigned int chroma_key_index:2; unsigned int chroma_key_enable:1; unsigned int pad0:6; } ss3; }; /* Surface state DW0 */ #define GEN7_SURFACE_RC_READ_WRITE (1 << 8) #define GEN7_SURFACE_TILED (1 << 14) #define GEN7_SURFACE_TILED_Y (1 << 13) #define GEN7_SURFACE_FORMAT_SHIFT 18 #define GEN7_SURFACE_TYPE_SHIFT 29 /* Surface state DW2 */ #define GEN7_SURFACE_HEIGHT_SHIFT 16 #define GEN7_SURFACE_WIDTH_SHIFT 0 /* Surface state DW3 */ #define GEN7_SURFACE_DEPTH_SHIFT 21 #define GEN7_SURFACE_PITCH_SHIFT 0 #define HSW_SWIZZLE_ZERO 0 #define HSW_SWIZZLE_ONE 1 #define HSW_SWIZZLE_RED 4 #define HSW_SWIZZLE_GREEN 5 #define HSW_SWIZZLE_BLUE 6 #define HSW_SWIZZLE_ALPHA 7 #define __HSW_SURFACE_SWIZZLE(r,g,b,a) \ ((a) << 16 | (b) << 19 | (g) << 22 | (r) << 25) #define HSW_SURFACE_SWIZZLE(r,g,b,a) \ __HSW_SURFACE_SWIZZLE(HSW_SWIZZLE_##r, HSW_SWIZZLE_##g, HSW_SWIZZLE_##b, HSW_SWIZZLE_##a) /* _3DSTATE_VERTEX_BUFFERS on GEN7*/ /* DW1 */ #define GEN7_VB0_ADDRESS_MODIFYENABLE (1 << 14) /* _3DPRIMITIVE on GEN7 */ /* DW1 */ # define GEN7_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL (0 << 8) # define GEN7_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM (1 << 8) #define GEN7_3DSTATE_CLEAR_PARAMS GEN7_3D(3, 0, 0x04) #define GEN7_3DSTATE_DEPTH_BUFFER GEN7_3D(3, 0, 0x05) # define GEN7_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT 29 # define GEN7_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT 18 /* DW1 */ # define GEN7_3DSTATE_DEPTH_CLEAR_VALID (1 << 15) #define GEN7_3DSTATE_CONSTANT_HS GEN7_3D(3, 0, 0x19) #define GEN7_3DSTATE_CONSTANT_DS GEN7_3D(3, 0, 0x1a) #define GEN7_3DSTATE_HS GEN7_3D(3, 0, 0x1b) #define GEN7_3DSTATE_TE GEN7_3D(3, 0, 0x1c) #define GEN7_3DSTATE_DS GEN7_3D(3, 0, 0x1d) #define GEN7_3DSTATE_STREAMOUT GEN7_3D(3, 0, 0x1e) #define GEN7_3DSTATE_SBE GEN7_3D(3, 0, 0x1f) /* DW1 */ # define GEN7_SBE_SWIZZLE_CONTROL_MODE (1 << 28) # define GEN7_SBE_NUM_OUTPUTS_SHIFT 22 # define GEN7_SBE_SWIZZLE_ENABLE (1 << 21) # define GEN7_SBE_POINT_SPRITE_LOWERLEFT (1 << 20) # define GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT 11 # define GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT 4 #define GEN7_3DSTATE_PS GEN7_3D(3, 0, 0x20) /* DW1: kernel pointer */ /* DW2 */ # define GEN7_PS_SPF_MODE (1 << 31) # define GEN7_PS_VECTOR_MASK_ENABLE (1 << 30) # define GEN7_PS_SAMPLER_COUNT_SHIFT 27 # define GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT 18 # define GEN7_PS_FLOATING_POINT_MODE_IEEE_754 (0 << 16) # define GEN7_PS_FLOATING_POINT_MODE_ALT (1 << 16) /* DW3: scratch space */ /* DW4 */ # define IVB_PS_MAX_THREADS_SHIFT 24 # define HSW_PS_MAX_THREADS_SHIFT 23 # define HSW_PS_SAMPLE_MASK_SHIFT 12 # define GEN7_PS_PUSH_CONSTANT_ENABLE (1 << 11) # define GEN7_PS_ATTRIBUTE_ENABLE (1 << 10) # define GEN7_PS_OMASK_TO_RENDER_TARGET (1 << 9) # define GEN7_PS_DUAL_SOURCE_BLEND_ENABLE (1 << 7) # define GEN7_PS_POSOFFSET_NONE (0 << 3) # define GEN7_PS_POSOFFSET_CENTROID (2 << 3) # define GEN7_PS_POSOFFSET_SAMPLE (3 << 3) # define GEN7_PS_32_DISPATCH_ENABLE (1 << 2) # define GEN7_PS_16_DISPATCH_ENABLE (1 << 1) # define GEN7_PS_8_DISPATCH_ENABLE (1 << 0) /* DW5 */ # define GEN7_PS_DISPATCH_START_GRF_SHIFT_0 16 # define GEN7_PS_DISPATCH_START_GRF_SHIFT_1 8 # define GEN7_PS_DISPATCH_START_GRF_SHIFT_2 0 /* DW6: kernel 1 pointer */ /* DW7: kernel 2 pointer */ #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL GEN7_3D(3, 0, 0x21) #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC GEN7_3D(3, 0, 0x23) #define GEN7_3DSTATE_BLEND_STATE_POINTERS GEN7_3D(3, 0, 0x24) #define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS GEN7_3D(3, 0, 0x25) #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS GEN7_3D(3, 0, 0x26) #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS GEN7_3D(3, 0, 0x27) #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS GEN7_3D(3, 0, 0x28) #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS GEN7_3D(3, 0, 0x29) #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS GEN7_3D(3, 0, 0x2a) #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS GEN7_3D(3, 0, 0x2b) #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS GEN7_3D(3, 0, 0x2e) #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS GEN7_3D(3, 0, 0x2f) #define GEN7_3DSTATE_URB_VS GEN7_3D(3, 0, 0x30) #define GEN7_3DSTATE_URB_HS GEN7_3D(3, 0, 0x31) #define GEN7_3DSTATE_URB_DS GEN7_3D(3, 0, 0x32) #define GEN7_3DSTATE_URB_GS GEN7_3D(3, 0, 0x33) /* DW1 */ # define GEN7_URB_ENTRY_NUMBER_SHIFT 0 # define GEN7_URB_ENTRY_SIZE_SHIFT 16 # define GEN7_URB_STARTING_ADDRESS_SHIFT 25 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS GEN7_3D(3, 1, 0x12) #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS GEN7_3D(3, 1, 0x16) /* DW1 */ # define GEN7_PUSH_CONSTANT_BUFFER_OFFSET_SHIFT 16 struct gen7_cc_viewport { float min_depth; float max_depth; }; typedef enum { SAMPLER_FILTER_NEAREST = 0, SAMPLER_FILTER_BILINEAR, FILTER_COUNT } sampler_filter_t; typedef enum { SAMPLER_EXTEND_NONE = 0, SAMPLER_EXTEND_REPEAT, SAMPLER_EXTEND_PAD, SAMPLER_EXTEND_REFLECT, EXTEND_COUNT } sampler_extend_t; #endif intel-gpu-tools-1.14/lib/rendercopy.h0000644000175000017500000000371112665336131014523 00000000000000#include "intel_batchbuffer.h" static inline void emit_vertex_2s(struct intel_batchbuffer *batch, int16_t x, int16_t y) { OUT_BATCH((uint16_t)y << 16 | (uint16_t)x); } static inline void emit_vertex(struct intel_batchbuffer *batch, float f) { union { float f; uint32_t ui; } u; u.f = f; OUT_BATCH(u.ui); } static inline void emit_vertex_normalized(struct intel_batchbuffer *batch, float f, float total) { union { float f; uint32_t ui; } u; u.f = f / total; OUT_BATCH(u.ui); } void gen9_render_copyfunc(struct intel_batchbuffer *batch, drm_intel_context *context, struct igt_buf *src, unsigned src_x, unsigned src_y, unsigned width, unsigned height, struct igt_buf *dst, unsigned dst_x, unsigned dst_y); void gen8_render_copyfunc(struct intel_batchbuffer *batch, drm_intel_context *context, struct igt_buf *src, unsigned src_x, unsigned src_y, unsigned width, unsigned height, struct igt_buf *dst, unsigned dst_x, unsigned dst_y); void gen7_render_copyfunc(struct intel_batchbuffer *batch, drm_intel_context *context, struct igt_buf *src, unsigned src_x, unsigned src_y, unsigned width, unsigned height, struct igt_buf *dst, unsigned dst_x, unsigned dst_y); void gen6_render_copyfunc(struct intel_batchbuffer *batch, drm_intel_context *context, struct igt_buf *src, unsigned src_x, unsigned src_y, unsigned width, unsigned height, struct igt_buf *dst, unsigned dst_x, unsigned dst_y); void gen3_render_copyfunc(struct intel_batchbuffer *batch, drm_intel_context *context, struct igt_buf *src, unsigned src_x, unsigned src_y, unsigned width, unsigned height, struct igt_buf *dst, unsigned dst_x, unsigned dst_y); void gen2_render_copyfunc(struct intel_batchbuffer *batch, drm_intel_context *context, struct igt_buf *src, unsigned src_x, unsigned src_y, unsigned width, unsigned height, struct igt_buf *dst, unsigned dst_x, unsigned dst_y); intel-gpu-tools-1.14/lib/igt_vc4.h0000644000175000017500000000257412665336131013716 00000000000000/* * Copyright © 2016 Broadcom * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ #ifndef IGT_VC4_H #define IGT_VC4_H uint32_t igt_vc4_get_cleared_bo(int fd, size_t size, uint32_t clearval); int igt_vc4_create_bo(int fd, size_t size); void *igt_vc4_mmap_bo(int fd, uint32_t handle, uint32_t size, unsigned prot); #endif /* IGT_VC4_H */ intel-gpu-tools-1.14/lib/igt_aux.h0000644000175000017500000001161612665336131014014 00000000000000/* * Copyright © 2014, 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * */ #ifndef IGT_AUX_H #define IGT_AUX_H #include #include #include extern drm_intel_bo **trash_bos; extern int num_trash_bos; /* auxialiary igt helpers from igt_aux.c */ /* generally useful helpers */ void igt_fork_signal_helper(void); void igt_stop_signal_helper(void); void igt_exchange_int(void *array, unsigned i, unsigned j); void igt_permute_array(void *array, unsigned size, void (*exchange_func)(void *array, unsigned i, unsigned j)); void igt_progress(const char *header, uint64_t i, uint64_t total); void igt_print_activity(void); bool igt_check_boolean_env_var(const char *env_var, bool default_value); bool igt_aub_dump_enabled(void); /* helpers based upon the libdrm buffer manager */ void igt_init_aperture_trashers(drm_intel_bufmgr *bufmgr); void igt_trash_aperture(void); void igt_cleanup_aperture_trashers(void); /* suspend/hibernate and auto-resume system */ void igt_system_suspend_autoresume(void); void igt_system_hibernate_autoresume(void); /* dropping priviledges */ void igt_drop_root(void); void igt_debug_wait_for_keypress(const char *var); void igt_debug_manual_check(const char *var, const char *expected); enum igt_runtime_pm_status { IGT_RUNTIME_PM_STATUS_ACTIVE, IGT_RUNTIME_PM_STATUS_SUSPENDED, IGT_RUNTIME_PM_STATUS_SUSPENDING, IGT_RUNTIME_PM_STATUS_RESUMING, IGT_RUNTIME_PM_STATUS_UNKNOWN, }; bool igt_setup_runtime_pm(void); enum igt_runtime_pm_status igt_get_runtime_pm_status(void); bool igt_wait_for_pm_status(enum igt_runtime_pm_status status); /* sysinfo cross-arch wrappers from intel_os.c */ /* These are separate to allow easier testing when porting, see the comment at * the bottom of intel_os.c. */ void intel_purge_vm_caches(void); uint64_t intel_get_avail_ram_mb(void); uint64_t intel_get_total_ram_mb(void); uint64_t intel_get_total_swap_mb(void); int __intel_check_memory(uint64_t count, uint64_t size, unsigned mode, uint64_t *out_required, uint64_t *out_total); void intel_require_memory(uint64_t count, uint64_t size, unsigned mode); #define CHECK_RAM 0x1 #define CHECK_SWAP 0x2 #define min(a, b) ({ \ typeof(a) _a = (a); \ typeof(b) _b = (b); \ _a < _b ? _a : _b; \ }) #define max(a, b) ({ \ typeof(a) _a = (a); \ typeof(b) _b = (b); \ _a > _b ? _a : _b; \ }) #define igt_swap(a, b) do { \ typeof(a) _tmp = (a); \ (a) = (b); \ (b) = _tmp; \ } while (0) void igt_lock_mem(size_t size); void igt_unlock_mem(void); /** * igt_wait: * @COND: condition to wait * @timeout_ms: timeout in milliseconds * @interval_ms: amount of time we try to sleep between COND checks * * Waits until COND evaluates to true or the timeout passes. * * It is safe to call this macro if the signal helper is active. The only * problem is that the usleep() calls will return early, making us evaluate COND * too often, possibly eating valuable CPU cycles. * * Returns: * True of COND evaluated to true, false otherwise. */ #define igt_wait(COND, timeout_ms, interval_ms) ({ \ struct timeval start_, end_, diff_; \ int elapsed_ms_; \ bool ret_ = false; \ \ igt_assert(gettimeofday(&start_, NULL) == 0); \ do { \ if (COND) { \ ret_ = true; \ break; \ } \ \ usleep(interval_ms * 1000); \ \ igt_assert(gettimeofday(&end_, NULL) == 0); \ timersub(&end_, &start_, &diff_); \ \ elapsed_ms_ = diff_.tv_sec * 1000 + \ diff_.tv_usec / 1000; \ } while (elapsed_ms_ < timeout_ms); \ \ if (!ret_ && (COND)) \ ret_ = true; \ \ ret_; \ }) void igt_set_module_param(const char *name, const char *val); void igt_set_module_param_int(const char *name, int val); #endif /* IGT_AUX_H */ intel-gpu-tools-1.14/lib/intel_reg_map.c0000644000175000017500000001436612665336131015161 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Ben Widawsky * */ #include #include #include #include #include "intel_io.h" #include "intel_chipset.h" #include "igt_core.h" static struct intel_register_range gen_bwcl_register_map[] = { {0x00000000, 0x00000fff, INTEL_RANGE_RW}, {0x00001000, 0x00000fff, INTEL_RANGE_RSVD}, {0x00002000, 0x00000fff, INTEL_RANGE_RW}, {0x00003000, 0x000001ff, INTEL_RANGE_RW}, {0x00003200, 0x00000dff, INTEL_RANGE_RW}, {0x00004000, 0x000003ff, INTEL_RANGE_RSVD}, {0x00004400, 0x00000bff, INTEL_RANGE_RSVD}, {0x00005000, 0x00000fff, INTEL_RANGE_RW}, {0x00006000, 0x00000fff, INTEL_RANGE_RW}, {0x00007000, 0x000003ff, INTEL_RANGE_RW}, {0x00007400, 0x000014ff, INTEL_RANGE_RW}, {0x00008900, 0x000006ff, INTEL_RANGE_RSVD}, {0x00009000, 0x00000fff, INTEL_RANGE_RSVD}, {0x0000a000, 0x00000fff, INTEL_RANGE_RW}, {0x0000b000, 0x00004fff, INTEL_RANGE_RSVD}, {0x00010000, 0x00003fff, INTEL_RANGE_RW}, {0x00014000, 0x0001bfff, INTEL_RANGE_RSVD}, {0x00030000, 0x0000ffff, INTEL_RANGE_RW}, {0x00040000, 0x0001ffff, INTEL_RANGE_RSVD}, {0x00060000, 0x0000ffff, INTEL_RANGE_RW}, {0x00070000, 0x00002fff, INTEL_RANGE_RW}, {0x00073000, 0x00000fff, INTEL_RANGE_RW}, {0x00074000, 0x0000bfff, INTEL_RANGE_RSVD}, {0x00000000, 0x00000000, INTEL_RANGE_END} }; static struct intel_register_range gen4_register_map[] = { {0x00000000, 0x00000fff, INTEL_RANGE_RW}, {0x00001000, 0x00000fff, INTEL_RANGE_RSVD}, {0x00002000, 0x00000fff, INTEL_RANGE_RW}, {0x00003000, 0x000001ff, INTEL_RANGE_RW}, {0x00003200, 0x00000dff, INTEL_RANGE_RW}, {0x00004000, 0x000003ff, INTEL_RANGE_RW}, {0x00004400, 0x00000bff, INTEL_RANGE_RW}, {0x00005000, 0x00000fff, INTEL_RANGE_RW}, {0x00006000, 0x00000fff, INTEL_RANGE_RW}, {0x00007000, 0x000003ff, INTEL_RANGE_RW}, {0x00007400, 0x000014ff, INTEL_RANGE_RW}, {0x00008900, 0x000006ff, INTEL_RANGE_RSVD}, {0x00009000, 0x00000fff, INTEL_RANGE_RSVD}, {0x0000a000, 0x00000fff, INTEL_RANGE_RW}, {0x0000b000, 0x00004fff, INTEL_RANGE_RSVD}, {0x00010000, 0x00003fff, INTEL_RANGE_RW}, {0x00014000, 0x0001bfff, INTEL_RANGE_RSVD}, {0x00030000, 0x0000ffff, INTEL_RANGE_RW}, {0x00040000, 0x0001ffff, INTEL_RANGE_RSVD}, {0x00060000, 0x0000ffff, INTEL_RANGE_RW}, {0x00070000, 0x00002fff, INTEL_RANGE_RW}, {0x00073000, 0x00000fff, INTEL_RANGE_RW}, {0x00074000, 0x0000bfff, INTEL_RANGE_RSVD}, {0x00000000, 0x00000000, INTEL_RANGE_END} }; /* The documentation is a little sketchy on these register ranges. */ static struct intel_register_range gen6_gt_register_map[] = { {0x00000000, 0x00000fff, INTEL_RANGE_RW}, {0x00001000, 0x00000fff, INTEL_RANGE_RSVD}, {0x00002000, 0x00000fff, INTEL_RANGE_RW}, {0x00003000, 0x000001ff, INTEL_RANGE_RW}, {0x00003200, 0x00000dff, INTEL_RANGE_RW}, {0x00004000, 0x00000fff, INTEL_RANGE_RW}, {0x00005000, 0x0000017f, INTEL_RANGE_RW}, {0x00005180, 0x00000e7f, INTEL_RANGE_RW}, {0x00006000, 0x00001fff, INTEL_RANGE_RW}, {0x00008000, 0x000007ff, INTEL_RANGE_RW}, {0x00008800, 0x000000ff, INTEL_RANGE_RSVD}, {0x00008900, 0x000006ff, INTEL_RANGE_RW}, {0x00009000, 0x00000fff, INTEL_RANGE_RSVD}, {0x0000a000, 0x00000fff, INTEL_RANGE_RW}, {0x0000b000, 0x00004fff, INTEL_RANGE_RSVD}, {0x00010000, 0x00001fff, INTEL_RANGE_RW}, {0x00012000, 0x000003ff, INTEL_RANGE_RW}, {0x00012400, 0x00000bff, INTEL_RANGE_RW}, {0x00013000, 0x00000fff, INTEL_RANGE_RW}, {0x00014000, 0x00000fff, INTEL_RANGE_RW}, {0x00015000, 0x0000cfff, INTEL_RANGE_RW}, {0x00022000, 0x00000fff, INTEL_RANGE_RW}, {0x00023000, 0x00000fff, INTEL_RANGE_RSVD}, {0x00024000, 0x00000fff, INTEL_RANGE_RW}, {0x00025000, 0x0000afff, INTEL_RANGE_RSVD}, {0x00030000, 0x0000ffff, INTEL_RANGE_RW}, {0x00040000, 0x0000ffff, INTEL_RANGE_RW}, {0x00050000, 0x0000ffff, INTEL_RANGE_RW}, {0x00060000, 0x0000ffff, INTEL_RANGE_RW}, {0x00070000, 0x00003fff, INTEL_RANGE_RW}, {0x00074000, 0x0008bfff, INTEL_RANGE_RSVD}, {0x00100000, 0x00007fff, INTEL_RANGE_RW}, {0x00108000, 0x00037fff, INTEL_RANGE_RSVD}, {0x00140000, 0x0003ffff, INTEL_RANGE_RW}, {0x00000000, 0x00000000, INTEL_RANGE_END} }; struct intel_register_map intel_get_register_map(uint32_t devid) { struct intel_register_map map; const int gen = intel_gen(devid); if (gen >= 6) { map.map = gen6_gt_register_map; map.top = 0x180000; } else if (IS_BROADWATER(devid) || IS_CRESTLINE(devid)) { map.map = gen_bwcl_register_map; map.top = 0x80000; } else if (gen >= 4) { map.map = gen4_register_map; map.top = 0x80000; } else { igt_fail_on("Gen2/3 Ranges are not supported. Please use ""unsafe access."); } map.alignment_mask = 0x3; return map; } struct intel_register_range * intel_get_register_range(struct intel_register_map map, uint32_t offset, uint32_t mode) { struct intel_register_range *range = map.map; uint32_t align = map.alignment_mask; if (offset & map.alignment_mask) return NULL; if (offset >= map.top) return NULL; while (!(range->flags & INTEL_RANGE_END)) { /* list is assumed to be in order */ if (offset < range->base) break; if ( (offset >= range->base) && (offset + align) <= (range->base + range->size)) { if ((mode & range->flags) == mode) return range; } range++; } return NULL; } intel-gpu-tools-1.14/lib/Makefile.sources0000644000175000017500000000414312665336131015322 00000000000000libintel_tools_la_SOURCES = \ debug.h \ drmtest.c \ drmtest.h \ i830_reg.h \ i915_3d.h \ i915_reg.h \ i915_pciids.h \ igt.h \ igt_debugfs.c \ igt_debugfs.h \ igt_aux.c \ igt_aux.h \ igt_edid_template.h \ igt_gt.c \ igt_gt.h \ igt_stats.c \ igt_stats.h \ instdone.c \ instdone.h \ intel_batchbuffer.c \ intel_batchbuffer.h \ intel_chipset.h \ intel_os.c \ intel_io.h \ intel_mmio.c \ intel_chipset.c \ intel_reg.h \ ioctl_wrappers.c \ ioctl_wrappers.h \ media_fill.h \ media_fill_gen7.c \ media_fill_gen8.c \ media_fill_gen8lp.c \ media_fill_gen9.c \ media_spin.h \ media_spin.c \ gpgpu_fill.h \ gpgpu_fill.c \ gen7_media.h \ gen8_media.h \ rendercopy_i915.c \ rendercopy_i830.c \ gen6_render.h \ gen7_render.h \ gen8_render.h \ gen9_render.h \ rendercopy_gen6.c \ rendercopy_gen7.c \ rendercopy_gen8.c \ rendercopy_gen9.c \ rendercopy.h \ intel_reg_map.c \ intel_iosf.c \ igt_kms.c \ igt_kms.h \ igt_fb.c \ igt_fb.h \ igt_core.c \ igt_core.h \ igt_draw.c \ igt_draw.h \ igt_pm.c \ igt_pm.h \ uwildmat/uwildmat.h \ uwildmat/uwildmat.c \ $(NULL) .PHONY: version.h.tmp # leaving a space here to work around automake's conditionals ifeq ($(GIT_HASH),no) $(IGT_LIB_PATH)/version.h.tmp: @echo '#define IGT_GIT_SHA1 "git"' >> $@ else $(IGT_LIB_PATH)/version.h.tmp: @touch $@ @if test -d $(GPU_TOOLS_PATH)/.git; then \ if which git > /dev/null 2>&1; then \ cd $(GPU_TOOLS_PATH); \ git log -n 1 --oneline | \ sed 's/^\([^ ]*\) .*/#define IGT_GIT_SHA1 "g\1"/' ; \ else \ echo '#define IGT_GIT_SHA1 "NO-GIT"' ; \ fi \ else \ echo '#define IGT_GIT_SHA1 "NOT-GIT"' ; \ fi >> $@ endif # GIT_HASH $(IGT_LIB_PATH)/version.h: $(IGT_LIB_PATH)/version.h.tmp @if ! cmp -s $(IGT_LIB_PATH)/version.h.tmp $(IGT_LIB_PATH)/version.h; then \ mv $(IGT_LIB_PATH)/version.h.tmp $(IGT_LIB_PATH)/version.h ; \ else \ rm $(IGT_LIB_PATH)/version.h.tmp ; \ fi BUILT_SOURCES = $(IGT_LIB_PATH)/version.h CLEANFILES = $(IGT_LIB_PATH)/version.h $(IGT_LIB_PATH)/version.h.tmp intel-gpu-tools-1.14/lib/instdone.h0000644000175000017500000000275312665336131014201 00000000000000/* * Copyright © 2007,2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. * * Authors: * Eric Anholt * */ #include #include #define MAX_INSTDONE_BITS 100 struct instdone_bit { uint32_t reg; uint32_t bit; const char *name; }; extern struct instdone_bit instdone_bits[MAX_INSTDONE_BITS]; extern int num_instdone_bits; bool init_instdone_definitions(uint32_t devid); intel-gpu-tools-1.14/lib/igt_debugfs.c0000644000175000017500000004530612665336131014634 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include #include #include #include #include #include #include #include #include #include #include #include "drmtest.h" #include "igt_aux.h" #include "igt_kms.h" #include "igt_debugfs.h" /** * SECTION:igt_debugfs * @short_description: Support code for debugfs features * @title: debugfs * @include: igt.h * * This library provides helpers to access debugfs features. On top of some * basic functions to access debugfs files with e.g. igt_debugfs_open() it also * provides higher-level wrappers for some debugfs features * * # Pipe CRC Support * * This library wraps up the kernel's support for capturing pipe CRCs into a * neat and tidy package. For the detailed usage see all the functions which * work on #igt_pipe_crc_t. This is supported on all platforms and outputs. * * Actually using pipe CRCs to write modeset tests is a bit tricky though, so * there is no way to directly check a CRC: Both the details of the plane * blending, color correction and other hardware and how exactly the CRC is * computed at each tap point vary by hardware generation and are not disclosed. * * The only way to use #igt_crc_t CRCs therefore is to compare CRCs among each * another either for equality or difference. Otherwise CRCs must be treated as * completely opaque values. Note that not even CRCs from different pipes or tap * points on the same platform can be compared. Hence only use * igt_assert_crc_equal() to inspect CRC values captured by the same * #igt_pipe_crc_t object. * * # Other debugfs interface wrappers * * This covers the miscellaneous debugfs interface wrappers: * * - drm/i915 supports interfaces to evict certain classes of gem buffer * objects, see igt_drop_caches_set(). * * - drm/i915 supports an interface to disable prefaulting, useful to test * slow paths in ioctls. See igt_disable_prefault(). */ /* * General debugfs helpers */ typedef struct { char root[128]; char dri_path[128]; } igt_debugfs_t; static bool __igt_debugfs_init(igt_debugfs_t *debugfs) { const char *path = "/sys/kernel/debug"; struct stat st; int n; if (stat("/debug/dri", &st) == 0) { path = "/debug/dri"; goto find_minor; } if (stat("/sys/kernel/debug/dri", &st) == 0) goto find_minor; igt_assert(stat("/sys/kernel/debug", &st) == 0); mount("debug", "/sys/kernel/debug", "debugfs", 0, 0); find_minor: strcpy(debugfs->root, path); for (n = 0; n < 16; n++) { int len = sprintf(debugfs->dri_path, "%s/dri/%d", path, n); sprintf(debugfs->dri_path + len, "/i915_error_state"); if (stat(debugfs->dri_path, &st) == 0) { debugfs->dri_path[len] = '\0'; return true; } } debugfs->dri_path[0] = '\0'; return false; } static igt_debugfs_t *__igt_debugfs_singleton(void) { static igt_debugfs_t singleton; static bool init_done = false; if (init_done) return &singleton; if (__igt_debugfs_init(&singleton)) { init_done = true; return &singleton; } else { return NULL; } } /** * igt_debugfs_open: * @filename: name of the debugfs node to open * @mode: mode bits as used by open() * * This opens a debugfs file as a Unix file descriptor. The filename should be * relative to the drm device's root, i.e. without "drm/". * * Returns: * The Unix file descriptor for the debugfs file or -1 if that didn't work out. */ int igt_debugfs_open(const char *filename, int mode) { char buf[1024]; igt_debugfs_t *debugfs = __igt_debugfs_singleton(); if (!debugfs) return -1; sprintf(buf, "%s/%s", debugfs->dri_path, filename); return open(buf, mode); } /** * igt_debugfs_fopen: * @filename: name of the debugfs node to open * @mode: mode string as used by fopen() * * This opens a debugfs file as a libc FILE. The filename should be * relative to the drm device's root, i.e. without "drm/". * * Returns: * The libc FILE pointer for the debugfs file or NULL if that didn't work out. */ FILE *igt_debugfs_fopen(const char *filename, const char *mode) { char buf[1024]; igt_debugfs_t *debugfs = __igt_debugfs_singleton(); if (!debugfs) return NULL; sprintf(buf, "%s/%s", debugfs->dri_path, filename); return fopen(buf, mode); } /** * __igt_debugfs_read: * @filename: file name * @buf: buffer where the contents will be stored, allocated by the caller * @buf_size: size of the buffer * * This function opens the debugfs file, reads it, stores the content in the * provided buffer, then closes the file. Users should make sure that the buffer * provided is big enough to fit the whole file, plus one byte. */ void __igt_debugfs_read(const char *filename, char *buf, int buf_size) { FILE *file; size_t n_read; file = igt_debugfs_fopen(filename, "r"); igt_assert(file); n_read = fread(buf, 1, buf_size - 1, file); igt_assert(n_read > 0); igt_assert(feof(file)); buf[n_read] = '\0'; igt_assert(fclose(file) == 0); } /** * igt_debugfs_search: * @filename: file name * @substring: string to search for in @filename * * Searches each line in @filename for the substring specified in @substring. * * Returns: True if the @substring is found to occur in @filename */ bool igt_debugfs_search(const char *filename, const char *substring) { FILE *file; size_t n = 0; char *line = NULL; bool matched = false; file = igt_debugfs_fopen(filename, "r"); igt_assert(file); while (getline(&line, &n, file) >= 0) { matched = (strstr(line, substring) != NULL); if (matched) break; } free(line); fclose(file); return matched; } /* * Pipe CRC */ /** * igt_assert_crc_equal: * @a: first pipe CRC value * @b: second pipe CRC value * * Compares two CRC values and fails the testcase if they don't match with * igt_fail(). Note that due to CRC collisions CRC based testcase can only * assert that CRCs match, never that they are different. Otherwise there might * be random testcase failures when different screen contents end up with the * same CRC by chance. */ void igt_assert_crc_equal(igt_crc_t *a, igt_crc_t *b) { int i; for (i = 0; i < a->n_words; i++) igt_assert_eq_u32(a->crc[i], b->crc[i]); } /** * igt_crc_to_string: * @crc: pipe CRC value to print * * This formats @crc into a string buffer which is owned by igt_crc_to_string(). * The next call will override the buffer again, which makes this multithreading * unsafe. * * This should only ever be used for diagnostic debug output. */ char *igt_crc_to_string(igt_crc_t *crc) { char buf[128]; igt_assert_eq(crc->n_words, 5); sprintf(buf, "%08x %08x %08x %08x %08x", crc->crc[0], crc->crc[1], crc->crc[2], crc->crc[3], crc->crc[4]); return strdup(buf); } /* (6 fields, 8 chars each, space separated (5) + '\n') */ #define PIPE_CRC_LINE_LEN (6 * 8 + 5 + 1) /* account for \'0' */ #define PIPE_CRC_BUFFER_LEN (PIPE_CRC_LINE_LEN + 1) struct _igt_pipe_crc { int ctl_fd; int crc_fd; int line_len; int buffer_len; int flags; enum pipe pipe; enum intel_pipe_crc_source source; }; static const char *pipe_crc_sources[] = { "none", "plane1", "plane2", "pf", "pipe", "TV", "DP-B", "DP-C", "DP-D", "auto" }; static const char *pipe_crc_source_name(enum intel_pipe_crc_source source) { return pipe_crc_sources[source]; } static bool igt_pipe_crc_do_start(igt_pipe_crc_t *pipe_crc) { char buf[64]; /* Stop first just to make sure we don't have lingering state left. */ igt_pipe_crc_stop(pipe_crc); sprintf(buf, "pipe %s %s", kmstest_pipe_name(pipe_crc->pipe), pipe_crc_source_name(pipe_crc->source)); errno = 0; igt_assert_eq(write(pipe_crc->ctl_fd, buf, strlen(buf)), strlen(buf)); if (errno != 0) return false; return true; } static void igt_pipe_crc_pipe_off(int fd, enum pipe pipe) { char buf[32]; sprintf(buf, "pipe %s none", kmstest_pipe_name(pipe)); igt_assert_eq(write(fd, buf, strlen(buf)), strlen(buf)); } static void igt_pipe_crc_reset(void) { int fd; fd = igt_debugfs_open("i915_display_crc_ctl", O_WRONLY); igt_pipe_crc_pipe_off(fd, PIPE_A); igt_pipe_crc_pipe_off(fd, PIPE_B); igt_pipe_crc_pipe_off(fd, PIPE_C); close(fd); } static void pipe_crc_exit_handler(int sig) { igt_pipe_crc_reset(); } /** * igt_require_pipe_crc: * * Convenience helper to check whether pipe CRC capturing is supported by the * kernel. Uses igt_skip to automatically skip the test/subtest if this isn't * the case. */ void igt_require_pipe_crc(void) { const char *cmd = "pipe A none"; FILE *ctl; size_t written; int ret; ctl = igt_debugfs_fopen("i915_display_crc_ctl", "r+"); igt_require_f(ctl, "No display_crc_ctl found, kernel too old\n"); written = fwrite(cmd, 1, strlen(cmd), ctl); ret = fflush(ctl); igt_require_f((written == strlen(cmd) && ret == 0) || errno != ENODEV, "CRCs not supported on this platform\n"); fclose(ctl); } static igt_pipe_crc_t * pipe_crc_new(enum pipe pipe, enum intel_pipe_crc_source source, int flags) { igt_pipe_crc_t *pipe_crc; char buf[128]; igt_install_exit_handler(pipe_crc_exit_handler); pipe_crc = calloc(1, sizeof(struct _igt_pipe_crc)); pipe_crc->ctl_fd = igt_debugfs_open("i915_display_crc_ctl", O_WRONLY); igt_assert(pipe_crc->ctl_fd != -1); sprintf(buf, "i915_pipe_%s_crc", kmstest_pipe_name(pipe)); pipe_crc->crc_fd = igt_debugfs_open(buf, flags); igt_assert(pipe_crc->crc_fd != -1); pipe_crc->line_len = PIPE_CRC_LINE_LEN; pipe_crc->buffer_len = PIPE_CRC_BUFFER_LEN; pipe_crc->pipe = pipe; pipe_crc->source = source; pipe_crc->flags = flags; return pipe_crc; } /** * igt_pipe_crc_new: * @pipe: display pipe to use as source * @source: CRC tap point to use as source * * This sets up a new pipe CRC capture object for the given @pipe and @source * in blocking mode. * * Returns: A pipe CRC object for the given @pipe and @source. The library * assumes that the source is always available since recent kernels support at * least INTEL_PIPE_CRC_SOURCE_AUTO everywhere. */ igt_pipe_crc_t * igt_pipe_crc_new(enum pipe pipe, enum intel_pipe_crc_source source) { return pipe_crc_new(pipe, source, O_RDONLY); } /** * igt_pipe_crc_new_nonblock: * @pipe: display pipe to use as source * @source: CRC tap point to use as source * * This sets up a new pipe CRC capture object for the given @pipe and @source * in nonblocking mode. * * Returns: A pipe CRC object for the given @pipe and @source. The library * assumes that the source is always available since recent kernels support at * least INTEL_PIPE_CRC_SOURCE_AUTO everywhere. */ igt_pipe_crc_t * igt_pipe_crc_new_nonblock(enum pipe pipe, enum intel_pipe_crc_source source) { return pipe_crc_new(pipe, source, O_RDONLY | O_NONBLOCK); } /** * igt_pipe_crc_free: * @pipe_crc: pipe CRC object * * Frees all resources associated with @pipe_crc. */ void igt_pipe_crc_free(igt_pipe_crc_t *pipe_crc) { if (!pipe_crc) return; close(pipe_crc->ctl_fd); close(pipe_crc->crc_fd); free(pipe_crc); } static bool pipe_crc_init_from_string(igt_crc_t *crc, const char *line) { int n; crc->n_words = 5; n = sscanf(line, "%8u %8x %8x %8x %8x %8x", &crc->frame, &crc->crc[0], &crc->crc[1], &crc->crc[2], &crc->crc[3], &crc->crc[4]); return n == 6; } static int read_crc(igt_pipe_crc_t *pipe_crc, igt_crc_t *out) { ssize_t bytes_read; char buf[pipe_crc->buffer_len]; igt_set_timeout(5, "CRC reading"); bytes_read = read(pipe_crc->crc_fd, &buf, pipe_crc->line_len); igt_reset_timeout(); if (bytes_read < 0 && errno == EAGAIN) { igt_assert(pipe_crc->flags & O_NONBLOCK); bytes_read = 0; } else { igt_assert_eq(bytes_read, pipe_crc->line_len); } buf[bytes_read] = '\0'; if (bytes_read && !pipe_crc_init_from_string(out, buf)) return -EINVAL; return bytes_read; } static void read_one_crc(igt_pipe_crc_t *pipe_crc, igt_crc_t *out) { while (read_crc(pipe_crc, out) == 0) usleep(1000); } /** * igt_pipe_crc_start: * @pipe_crc: pipe CRC object * * Starts the CRC capture process on @pipe_crc. */ void igt_pipe_crc_start(igt_pipe_crc_t *pipe_crc) { igt_crc_t crc; igt_assert(igt_pipe_crc_do_start(pipe_crc)); /* * For some no yet identified reason, the first CRC is bonkers. So * let's just wait for the next vblank and read out the buggy result. * * On CHV sometimes the second CRC is bonkers as well, so don't trust * that one either. */ read_one_crc(pipe_crc, &crc); read_one_crc(pipe_crc, &crc); } /** * igt_pipe_crc_stop: * @pipe_crc: pipe CRC object * * Stops the CRC capture process on @pipe_crc. */ void igt_pipe_crc_stop(igt_pipe_crc_t *pipe_crc) { char buf[32]; sprintf(buf, "pipe %s none", kmstest_pipe_name(pipe_crc->pipe)); igt_assert_eq(write(pipe_crc->ctl_fd, buf, strlen(buf)), strlen(buf)); } /** * igt_pipe_crc_get_crcs: * @pipe_crc: pipe CRC object * @n_crcs: number of CRCs to capture * @out_crcs: buffer pointer for the captured CRC values * * Read @n_crcs from @pipe_crc. This function blocks until @n_crcs are * retrieved. @out_crcs is alloced by this function and must be released with * free() by the caller. * * Callers must start and stop the capturing themselves by calling * igt_pipe_crc_start() and igt_pipe_crc_stop(). * * Returns: The number of CRCs captured. Should be equal to @n_crcs in blocking * mode, but can be less (even zero) in non-blocking mode. */ int igt_pipe_crc_get_crcs(igt_pipe_crc_t *pipe_crc, int n_crcs, igt_crc_t **out_crcs) { igt_crc_t *crcs; int n = 0; crcs = calloc(n_crcs, sizeof(igt_crc_t)); do { igt_crc_t *crc = &crcs[n]; int ret; ret = read_crc(pipe_crc, crc); if (ret < 0) continue; if (ret == 0) break; n++; } while (n < n_crcs); *out_crcs = crcs; return n; } static void crc_sanity_checks(igt_crc_t *crc) { int i; bool all_zero = true; for (i = 0; i < crc->n_words; i++) { igt_warn_on_f(crc->crc[i] == 0xffffffff, "Suspicious CRC: it looks like the CRC " "read back was from a register in a powered " "down well\n"); if (crc->crc[i]) all_zero = false; } igt_warn_on_f(all_zero, "Suspicious CRC: All values are 0.\n"); } /** * igt_pipe_crc_collect_crc: * @pipe_crc: pipe CRC object * @out_crc: buffer for the captured CRC values * * Read a single CRC from @pipe_crc. This function blocks until the CRC is * retrieved. @out_crc must be allocated by the caller. * * This function takes care of the pipe_crc book-keeping, it will start/stop * the collection of the CRC. * * This function also calls the interactive debug with the "crc" domain, so you * can make use of this feature to actually see the screen that is being CRC'd. */ void igt_pipe_crc_collect_crc(igt_pipe_crc_t *pipe_crc, igt_crc_t *out_crc) { igt_debug_wait_for_keypress("crc"); igt_pipe_crc_start(pipe_crc); read_one_crc(pipe_crc, out_crc); igt_pipe_crc_stop(pipe_crc); crc_sanity_checks(out_crc); } /* * Drop caches */ /** * igt_drop_caches_set: * @val: bitmask for DROP_* values * * This calls the debugfs interface the drm/i915 GEM driver exposes to drop or * evict certain classes of gem buffer objects. */ void igt_drop_caches_set(uint64_t val) { int fd; char data[19]; size_t nbytes; sprintf(data, "0x%" PRIx64, val); fd = igt_debugfs_open("i915_gem_drop_caches", O_WRONLY); igt_assert(fd >= 0); do { nbytes = write(fd, data, strlen(data) + 1); } while (nbytes == -1 && (errno == EINTR || errno == EAGAIN)); igt_assert(nbytes == strlen(data) + 1); close(fd); } /* * Prefault control */ #define PREFAULT_DEBUGFS "/sys/module/i915/parameters/prefault_disable" static void igt_prefault_control(bool enable) { const char *name = PREFAULT_DEBUGFS; int fd; char buf[2] = {'Y', 'N'}; int index; fd = open(name, O_RDWR); igt_require(fd >= 0); if (enable) index = 1; else index = 0; igt_require(write(fd, &buf[index], 1) == 1); close(fd); } static void enable_prefault_at_exit(int sig) { igt_enable_prefault(); } /** * igt_disable_prefault: * * Disable prefaulting in certain gem ioctls through the debugfs interface. As * usual this installs an exit handler to clean up and re-enable prefaulting * even when the test exited abnormally. * * igt_enable_prefault() will enable normale operation again. */ void igt_disable_prefault(void) { igt_prefault_control(false); igt_install_exit_handler(enable_prefault_at_exit); } /** * igt_enable_prefault: * * Enable prefault (again) through the debugfs interface. */ void igt_enable_prefault(void) { igt_prefault_control(true); } static int get_object_count(void) { FILE *file; int ret, scanned; igt_drop_caches_set(DROP_RETIRE | DROP_ACTIVE); file = igt_debugfs_fopen("i915_gem_objects", "r"); scanned = fscanf(file, "%i objects", &ret); igt_assert_eq(scanned, 1); return ret; } /** * igt_get_stable_obj_count: * @driver: fd to drm/i915 GEM driver * * This puts the driver into a stable (quiescent) state and then returns the * current number of gem buffer objects as reported in the i915_gem_objects * debugFS interface. */ int igt_get_stable_obj_count(int driver) { int obj_count; gem_quiescent_gpu(driver); obj_count = get_object_count(); /* The test relies on the system being in the same state before and * after the test so any difference in the object count is a result of * leaks during the test. gem_quiescent_gpu() mostly achieves this but * on android occasionally obj_count can still change briefly. * The loop ensures obj_count has remained stable over several checks */ #ifdef ANDROID { int loop_count = 0; int prev_obj_count = obj_count; while (loop_count < 4) { usleep(200000); gem_quiescent_gpu(driver); obj_count = get_object_count(); if (obj_count == prev_obj_count) { loop_count++; } else { igt_debug("loop_count=%d, obj_count=%d, prev_obj_count=%d\n", loop_count, obj_count, prev_obj_count); loop_count = 0; prev_obj_count = obj_count; } } } #endif return obj_count; } intel-gpu-tools-1.14/lib/igt_stats.c0000644000175000017500000003554512665336131014357 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include #include #include #include "igt_core.h" #include "igt_stats.h" #define U64_MAX ((uint64_t)~0ULL) #define sorted_value(stats, i) (stats->is_float ? stats->sorted_f[i] : stats->sorted_u64[i]) #define unsorted_value(stats, i) (stats->is_float ? stats->values_f[i] : stats->values_u64[i]) /** * SECTION:igt_stats * @short_description: Tools for statistical analysis * @title: Stats * @include: igt.h * * Various tools to make sense of data. * * #igt_stats_t is a container of data samples. igt_stats_push() is used to add * new samples and various results (mean, variance, standard deviation, ...) * can then be retrieved. * * |[ * igt_stats_t stats; * * igt_stats_init(&stats, 8); * * igt_stats_push(&stats, 2); * igt_stats_push(&stats, 4); * igt_stats_push(&stats, 4); * igt_stats_push(&stats, 4); * igt_stats_push(&stats, 5); * igt_stats_push(&stats, 5); * igt_stats_push(&stats, 7); * igt_stats_push(&stats, 9); * * printf("Mean: %lf\n", igt_stats_get_mean(&stats)); * * igt_stats_fini(&stats); * ]| */ static unsigned int get_new_capacity(int need) { unsigned int new_capacity; /* taken from Python's list */ new_capacity = (need >> 6) + (need < 9 ? 3 : 6); new_capacity += need; return new_capacity; } static void igt_stats_ensure_capacity(igt_stats_t *stats, unsigned int n_additional_values) { unsigned int new_n_values = stats->n_values + n_additional_values; unsigned int new_capacity; if (new_n_values <= stats->capacity) return; new_capacity = get_new_capacity(new_n_values); stats->values_u64 = realloc(stats->values_u64, sizeof(*stats->values_u64) * new_capacity); igt_assert(stats->values_u64); stats->capacity = new_capacity; free(stats->sorted_u64); stats->sorted_u64 = NULL; } /** * igt_stats_init: * @stats: An #igt_stats_t instance * * Initializes an #igt_stats_t instance. igt_stats_fini() must be called once * finished with @stats. */ void igt_stats_init(igt_stats_t *stats) { memset(stats, 0, sizeof(*stats)); igt_stats_ensure_capacity(stats, 128); stats->min = U64_MAX; stats->max = 0; } /** * igt_stats_init_with_size: * @stats: An #igt_stats_t instance * @capacity: Number of data samples @stats can contain * * Like igt_stats_init() but with a size to avoid reallocating the underlying * array(s) when pushing new values. Useful if we have a good idea of the * number of data points we want @stats to hold. * * igt_stats_fini() must be called once finished with @stats. */ void igt_stats_init_with_size(igt_stats_t *stats, unsigned int capacity) { memset(stats, 0, sizeof(*stats)); igt_stats_ensure_capacity(stats, capacity); stats->min = U64_MAX; stats->max = 0; stats->range[0] = HUGE_VAL; stats->range[1] = -HUGE_VAL; } /** * igt_stats_fini: * @stats: An #igt_stats_t instance * * Frees resources allocated in igt_stats_init(). */ void igt_stats_fini(igt_stats_t *stats) { free(stats->values_u64); free(stats->sorted_u64); } /** * igt_stats_is_population: * @stats: An #igt_stats_t instance * * Returns: #true if @stats represents a population, #false if only a sample. * * See igt_stats_set_population() for more details. */ bool igt_stats_is_population(igt_stats_t *stats) { return stats->is_population; } /** * igt_stats_set_population: * @stats: An #igt_stats_t instance * @full_population: Whether we're dealing with sample data or a full * population * * In statistics, we usually deal with a subset of the full data (which may be * a continuous or infinite set). Data analysis is then done on a sample of * this population. * * This has some importance as only having a sample of the data leads to * [biased estimators](https://en.wikipedia.org/wiki/Bias_of_an_estimator). We * currently used the information given by this method to apply * [Bessel's correction](https://en.wikipedia.org/wiki/Bessel%27s_correction) * to the variance. * * Note that even if we manage to have an unbiased variance by multiplying * a sample variance by the Bessel's correction, n/(n - 1), the standard * deviation derived from the unbiased variance isn't itself unbiased. * Statisticians talk about a "corrected" standard deviation. * * When giving #true to this function, the data set in @stats is considered a * full population. It's considered a sample of a bigger population otherwise. * * When newly created, @stats defaults to holding sample data. */ void igt_stats_set_population(igt_stats_t *stats, bool full_population) { if (full_population == stats->is_population) return; stats->is_population = full_population; stats->mean_variance_valid = false; } /** * igt_stats_push: * @stats: An #igt_stats_t instance * @value: An integer value * * Adds a new value to the @stats dataset. */ void igt_stats_push(igt_stats_t *stats, uint64_t value) { if (stats->is_float) { igt_stats_push_float(stats, value); return; } igt_stats_ensure_capacity(stats, 1); stats->values_u64[stats->n_values++] = value; stats->mean_variance_valid = false; stats->sorted_array_valid = false; if (value < stats->min) stats->min = value; if (value > stats->max) stats->max = value; } /** * igt_stats_push: * @stats: An #igt_stats_t instance * @value: An floating point * * Adds a new value to the @stats dataset and converts the igt_stats from * an integer collection to a floating point one. */ void igt_stats_push_float(igt_stats_t *stats, double value) { igt_stats_ensure_capacity(stats, 1); if (!stats->is_float) { int n; for (n = 0; n < stats->n_values; n++) stats->values_f[n] = stats->values_u64[n]; stats->is_float = true; } stats->values_f[stats->n_values++] = value; stats->mean_variance_valid = false; stats->sorted_array_valid = false; if (value < stats->range[0]) stats->range[0] = value; if (value > stats->range[1]) stats->range[1] = value; } /** * igt_stats_push_array: * @stats: An #igt_stats_t instance * @values: (array length=n_values): A pointer to an array of data points * @n_values: The number of data points to add * * Adds an array of values to the @stats dataset. */ void igt_stats_push_array(igt_stats_t *stats, const uint64_t *values, unsigned int n_values) { unsigned int i; igt_stats_ensure_capacity(stats, n_values); for (i = 0; i < n_values; i++) igt_stats_push(stats, values[i]); } /** * igt_stats_get_min: * @stats: An #igt_stats_t instance * * Retrieves the minimal value in @stats */ uint64_t igt_stats_get_min(igt_stats_t *stats) { igt_assert(!stats->is_float); return stats->min; } /** * igt_stats_get_max: * @stats: An #igt_stats_t instance * * Retrieves the maximum value in @stats */ uint64_t igt_stats_get_max(igt_stats_t *stats) { igt_assert(!stats->is_float); return stats->max; } /** * igt_stats_get_range: * @stats: An #igt_stats_t instance * * Retrieves the range of the values in @stats. The range is the difference * between the highest and the lowest value. * * The range can be a deceiving characterization of the values, because there * can be extreme minimal and maximum values that are just anomalies. Prefer * the interquatile range (see igt_stats_get_iqr()) or an histogram. */ uint64_t igt_stats_get_range(igt_stats_t *stats) { return igt_stats_get_max(stats) - igt_stats_get_min(stats); } static int cmp_u64(const void *pa, const void *pb) { const uint64_t *a = pa, *b = pb; if (*a < *b) return -1; if (*a > *b) return 1; return 0; } static int cmp_f(const void *pa, const void *pb) { const double *a = pa, *b = pb; if (*a < *b) return -1; if (*a > *b) return 1; return 0; } static void igt_stats_ensure_sorted_values(igt_stats_t *stats) { if (stats->sorted_array_valid) return; if (!stats->sorted_u64) { /* * igt_stats_ensure_capacity() will free ->sorted when the * capacity increases, which also correspond to an invalidation * of the sorted array. We'll then reallocate it here on * demand. */ stats->sorted_u64 = calloc(stats->capacity, sizeof(*stats->values_u64)); igt_assert(stats->sorted_u64); } memcpy(stats->sorted_u64, stats->values_u64, sizeof(*stats->values_u64) * stats->n_values); qsort(stats->sorted_u64, stats->n_values, sizeof(*stats->values_u64), stats->is_float ? cmp_f : cmp_u64); stats->sorted_array_valid = true; } /* * We use Tukey's hinge for our quartiles determination. * ends (end, lower_end) are exclusive. */ static double igt_stats_get_median_internal(igt_stats_t *stats, unsigned int start, unsigned int end, unsigned int *lower_end /* out */, unsigned int *upper_start /* out */) { unsigned int mid, n_values = end - start; double median; igt_stats_ensure_sorted_values(stats); /* odd number of data points */ if (n_values % 2 == 1) { /* median is the value in the middle (actual datum) */ mid = start + n_values / 2; median = sorted_value(stats, mid); /* the two halves contain the median value */ if (lower_end) *lower_end = mid + 1; if (upper_start) *upper_start = mid; /* even number of data points */ } else { /* * The middle is in between two indexes, 'mid' points at the * lower one. The median is then the average between those two * values. */ mid = start + n_values / 2 - 1; median = (sorted_value(stats, mid) + sorted_value(stats, mid+1))/2.; if (lower_end) *lower_end = mid + 1; if (upper_start) *upper_start = mid + 1; } return median; } /** * igt_stats_get_quartiles: * @stats: An #igt_stats_t instance * @q1: (out): lower or 25th quartile * @q2: (out): median or 50th quartile * @q3: (out): upper or 75th quartile * * Retrieves the [quartiles](https://en.wikipedia.org/wiki/Quartile) of the * @stats dataset. */ void igt_stats_get_quartiles(igt_stats_t *stats, double *q1, double *q2, double *q3) { unsigned int lower_end, upper_start; double ret; if (stats->n_values < 3) { if (q1) *q1 = 0.; if (q2) *q2 = 0.; if (q3) *q3 = 0.; return; } ret = igt_stats_get_median_internal(stats, 0, stats->n_values, &lower_end, &upper_start); if (q2) *q2 = ret; ret = igt_stats_get_median_internal(stats, 0, lower_end, NULL, NULL); if (q1) *q1 = ret; ret = igt_stats_get_median_internal(stats, upper_start, stats->n_values, NULL, NULL); if (q3) *q3 = ret; } /** * igt_stats_get_iqr: * @stats: An #igt_stats_t instance * * Retrieves the * [interquartile range](https://en.wikipedia.org/wiki/Interquartile_range) * (IQR) of the @stats dataset. */ double igt_stats_get_iqr(igt_stats_t *stats) { double q1, q3; igt_stats_get_quartiles(stats, &q1, NULL, &q3); return (q3 - q1); } /** * igt_stats_get_median: * @stats: An #igt_stats_t instance * * Retrieves the median of the @stats dataset. */ double igt_stats_get_median(igt_stats_t *stats) { return igt_stats_get_median_internal(stats, 0, stats->n_values, NULL, NULL); } /* * Algorithm popularised by Knuth in: * * The Art of Computer Programming, volume 2: Seminumerical Algorithms, * 3rd edn., p. 232. Boston: Addison-Wesley * * Source: https://en.wikipedia.org/wiki/Algorithms_for_calculating_variance */ static void igt_stats_knuth_mean_variance(igt_stats_t *stats) { double mean = 0., m2 = 0.; unsigned int i; if (stats->mean_variance_valid) return; for (i = 0; i < stats->n_values; i++) { double delta = unsorted_value(stats, i) - mean; mean += delta / (i + 1); m2 += delta * (unsorted_value(stats, i) - mean); } stats->mean = mean; if (stats->n_values > 1 && !stats->is_population) stats->variance = m2 / (stats->n_values - 1); else stats->variance = m2 / stats->n_values; stats->mean_variance_valid = true; } /** * igt_stats_get_mean: * @stats: An #igt_stats_t instance * * Retrieves the mean of the @stats dataset. */ double igt_stats_get_mean(igt_stats_t *stats) { igt_stats_knuth_mean_variance(stats); return stats->mean; } /** * igt_stats_get_variance: * @stats: An #igt_stats_t instance * * Retrieves the variance of the @stats dataset. */ double igt_stats_get_variance(igt_stats_t *stats) { igt_stats_knuth_mean_variance(stats); return stats->variance; } /** * igt_stats_get_std_deviation: * @stats: An #igt_stats_t instance * * Retrieves the standard deviation of the @stats dataset. */ double igt_stats_get_std_deviation(igt_stats_t *stats) { igt_stats_knuth_mean_variance(stats); return sqrt(stats->variance); } /** * igt_stats_get_iqm: * @stats: An #igt_stats_t instance * * Retrieves the * [interquartile mean](https://en.wikipedia.org/wiki/Interquartile_mean) (IQM) * of the @stats dataset. * * The interquartile mean is a "statistical measure of central tendency". * It is a truncated mean that discards the lowest and highest 25% of values, * and calculates the mean value of the remaining central values. * * It's useful to hide outliers in measurements (due to cold cache etc). */ double igt_stats_get_iqm(igt_stats_t *stats) { unsigned int q1, q3, i; double mean; igt_stats_ensure_sorted_values(stats); q1 = (stats->n_values + 3) / 4; q3 = 3 * stats->n_values / 4; mean = 0; for (i = 0; i <= q3 - q1; i++) mean += (sorted_value(stats, q1 + i) - mean) / (i + 1); if (stats->n_values % 4) { double rem = .5 * (stats->n_values % 4) / 4; q1 = (stats->n_values) / 4; q3 = (3 * stats->n_values + 3) / 4; mean += rem * (sorted_value(stats, q1) - mean) / i++; mean += rem * (sorted_value(stats, q3) - mean) / i++; } return mean; } /** * igt_stats_get_trimean: * @stats: An #igt_stats_t instance * * Retrieves the [trimean](https://en.wikipedia.org/wiki/Trimean) of the @stats * dataset. * * The trimean is a the most efficient 3-point L-estimator, even more * robust than the median at estimating the average of a sample population. */ double igt_stats_get_trimean(igt_stats_t *stats) { double q1, q2, q3; igt_stats_get_quartiles(stats, &q1, &q2, &q3); return (q1 + 2*q2 + q3) / 4; } intel-gpu-tools-1.14/lib/gen9_render.h0000644000175000017500000000071512665336131014553 00000000000000#ifndef GEN9_RENDER_H #define GEN9_RENDER_H #include "gen8_render.h" #define GEN7_3DSTATE_VF GEN6_3D(3, 0, 0x0c) #define GEN9_3DSTATE_COMPONENT_PACKING GEN6_3D(3, 0, 0x55) #define GEN9_SBE_ACTIVE_COMPONENT_NONE 0 #define GEN9_SBE_ACTIVE_COMPONENT_XY 1 #define GEN9_SBE_ACTIVE_COMPONENT_XYZ 2 #define GEN9_SBE_ACTIVE_COMPONENT_XYZW 3 #define GEN9_PIPELINE_SELECTION_MASK (3 << 8) #define GEN9_PIPELINE_SELECT (GEN6_3D(1, 1, 4) | (3 << 8)) #endif intel-gpu-tools-1.14/lib/igt_debugfs.h0000644000175000017500000001226712665336131014641 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #ifndef __IGT_DEBUGFS_H__ #define __IGT_DEBUGFS_H__ #include #include #include enum pipe; int igt_debugfs_open(const char *filename, int mode); FILE *igt_debugfs_fopen(const char *filename, const char *mode); void __igt_debugfs_read(const char *filename, char *buf, int buf_size); bool igt_debugfs_search(const char *filename, const char *substring); /** * igt_debugfs_read: * @filename: name of the debugfs file * @buf: buffer where the contents will be stored, allocated by the caller. * * This is just a convenience wrapper for __igt_debugfs_read. See its * documentation. */ #define igt_debugfs_read(filename, buf) \ __igt_debugfs_read((filename), (buf), sizeof(buf)) /* * Pipe CRC */ /** * igt_pipe_crc_t: * * Pipe CRC support structure. Needs to be allocated and set up with * igt_pipe_crc_new() for a specific pipe and pipe CRC source value. */ typedef struct _igt_pipe_crc igt_pipe_crc_t; /** * igt_crc_t: * @frame: frame number of the capture CRC * @n_words: internal field, don't access * @crc: internal field, don't access * * Pipe CRC value. All other members than @frame are private and should not be * inspected by testcases. */ typedef struct { uint32_t frame; int n_words; uint32_t crc[5]; } igt_crc_t; /** * intel_pipe_crc_source: * @INTEL_PIPE_CRC_SOURCE_NONE: No source * @INTEL_PIPE_CRC_SOURCE_PLANE1: Plane 1 * @INTEL_PIPE_CRC_SOURCE_PLANE2: Plane 2 * @INTEL_PIPE_CRC_SOURCE_PF: Panel Filter * @INTEL_PIPE_CRC_SOURCE_PIPE: Pipe * @INTEL_PIPE_CRC_SOURCE_TV: TV * @INTEL_PIPE_CRC_SOURCE_DP_B: DisplayPort B * @INTEL_PIPE_CRC_SOURCE_DP_C: DisplayPort C * @INTEL_PIPE_CRC_SOURCE_DP_D: DisplayPort D * @INTEL_PIPE_CRC_SOURCE_AUTO: Automatic source selection * @INTEL_PIPE_CRC_SOURCE_MAX: Number of available sources * * Enumeration of all supported pipe CRC sources. Not all platforms and all * outputs support all of them. Generic tests should just use * INTEL_PIPE_CRC_SOURCE_AUTO. It should always map to an end-of-pipe CRC * suitable for checking planes, cursor, color correction and any other * output-agnostic features. */ enum intel_pipe_crc_source { INTEL_PIPE_CRC_SOURCE_NONE, INTEL_PIPE_CRC_SOURCE_PLANE1, INTEL_PIPE_CRC_SOURCE_PLANE2, INTEL_PIPE_CRC_SOURCE_PF, INTEL_PIPE_CRC_SOURCE_PIPE, INTEL_PIPE_CRC_SOURCE_TV, INTEL_PIPE_CRC_SOURCE_DP_B, INTEL_PIPE_CRC_SOURCE_DP_C, INTEL_PIPE_CRC_SOURCE_DP_D, INTEL_PIPE_CRC_SOURCE_AUTO, INTEL_PIPE_CRC_SOURCE_MAX, }; void igt_assert_crc_equal(igt_crc_t *a, igt_crc_t *b); char *igt_crc_to_string(igt_crc_t *crc); void igt_require_pipe_crc(void); igt_pipe_crc_t * igt_pipe_crc_new(enum pipe pipe, enum intel_pipe_crc_source source); igt_pipe_crc_t * igt_pipe_crc_new_nonblock(enum pipe pipe, enum intel_pipe_crc_source source); void igt_pipe_crc_free(igt_pipe_crc_t *pipe_crc); void igt_pipe_crc_start(igt_pipe_crc_t *pipe_crc); void igt_pipe_crc_stop(igt_pipe_crc_t *pipe_crc); __attribute__((warn_unused_result)) int igt_pipe_crc_get_crcs(igt_pipe_crc_t *pipe_crc, int n_crcs, igt_crc_t **out_crcs); void igt_pipe_crc_collect_crc(igt_pipe_crc_t *pipe_crc, igt_crc_t *out_crc); /* * Drop caches */ /** * DROP_UNBOUND: * * Drop all currently unbound gem buffer objects from the cache. */ #define DROP_UNBOUND 0x1 /** * DROP_BOUND: * * Drop all inactive objects which are bound into some gpu address space. */ #define DROP_BOUND 0x2 /** * DROP_RETIRE: * * Wait for all outstanding gpu commands to complete, but do not take any * further actions. */ #define DROP_RETIRE 0x4 /** * DROP_ACTIVE: * * Also drop active objects once retired. */ #define DROP_ACTIVE 0x8 #define DROP_ALL (DROP_UNBOUND | \ DROP_BOUND | \ DROP_RETIRE | \ DROP_ACTIVE) void igt_drop_caches_set(uint64_t val); /* * Prefault control */ void igt_disable_prefault(void); void igt_enable_prefault(void); /* * Put the driver into a stable (quiescent) state and get the current number of * gem buffer objects */ int igt_get_stable_obj_count(int driver); #endif /* __IGT_DEBUGFS_H__ */ intel-gpu-tools-1.14/lib/intel_iosf.c0000644000175000017500000001061612665336131014501 00000000000000#include #include #include #include #include #include "intel_io.h" #include "intel_reg.h" #include "igt_core.h" #define TIMEOUT_US 500000 /* Standard MMIO read, non-posted */ #define SB_MRD_NP 0x00 /* Standard MMIO write, non-posted */ #define SB_MWR_NP 0x01 /* Private register read, double-word addressing, non-posted */ #define SB_CRRDDA_NP 0x06 /* Private register write, double-word addressing, non-posted */ #define SB_CRWRDA_NP 0x07 static int vlv_sideband_rw(uint32_t port, uint8_t opcode, uint32_t addr, uint32_t *val) { int timeout = 0; uint32_t cmd, devfn, be, bar; int is_read = (opcode == SB_CRRDDA_NP || opcode == SB_MRD_NP); bar = 0; be = 0xf; devfn = 0; cmd = (devfn << IOSF_DEVFN_SHIFT) | (opcode << IOSF_OPCODE_SHIFT) | (port << IOSF_PORT_SHIFT) | (be << IOSF_BYTE_ENABLES_SHIFT) | (bar << IOSF_BAR_SHIFT); if (intel_register_read(VLV_IOSF_DOORBELL_REQ) & IOSF_SB_BUSY) { igt_warn("warning: pcode (%s) mailbox access failed\n", is_read ? "read" : "write"); return -EAGAIN; } intel_register_write(VLV_IOSF_ADDR, addr); if (!is_read) intel_register_write(VLV_IOSF_DATA, *val); intel_register_write(VLV_IOSF_DOORBELL_REQ, cmd); do { usleep(1); timeout++; } while (intel_register_read(VLV_IOSF_DOORBELL_REQ) & IOSF_SB_BUSY && timeout < TIMEOUT_US); if (timeout >= TIMEOUT_US) { igt_warn("timeout waiting for pcode %s (%d) to finish\n", is_read ? "read" : "write", addr); return -ETIMEDOUT; } if (is_read) *val = intel_register_read(VLV_IOSF_DATA); intel_register_write(VLV_IOSF_DATA, 0); return 0; } /** * intel_punit_read: * @addr: register offset * @val: pointer to store the read result * * 32-bit read of the register at @offset through the P-Unit sideband port. * * Returns: * 0 when the register access succeeded, negative errno code on failure. */ int intel_punit_read(uint32_t addr, uint32_t *val) { return vlv_sideband_rw(IOSF_PORT_PUNIT, SB_CRRDDA_NP, addr, val); } /** * intel_punit_write: * @addr: register offset * @val: value to write * * 32-bit write of the register at @offset through the P-Unit sideband port. * * Returns: * 0 when the register access succeeded, negative errno code on failure. */ int intel_punit_write(uint32_t addr, uint32_t val) { return vlv_sideband_rw(IOSF_PORT_PUNIT, SB_CRWRDA_NP, addr, &val); } /** * intel_nc_read: * @addr: register offset * @val: pointer to starge for the read result * * 32-bit read of the register at @offset through the NC sideband port. * * Returns: * 0 when the register access succeeded, negative errno code on failure. */ int intel_nc_read(uint32_t addr, uint32_t *val) { return vlv_sideband_rw(IOSF_PORT_NC, SB_CRRDDA_NP, addr, val); } /** * intel_nc_write: * @addr: register offset * @val: value to write * * 32-bit write of the register at @offset through the NC sideband port. * * Returns: * 0 when the register access succeeded, negative errno code on failure. */ int intel_nc_write(uint32_t addr, uint32_t val) { return vlv_sideband_rw(IOSF_PORT_NC, SB_CRWRDA_NP, addr, &val); } /** * intel_dpio_reg_read: * @reg: register offset * @phy: DPIO PHY to use * * 32-bit read of the register at @offset through the DPIO sideband port. * * Returns: * The value read from the register. */ uint32_t intel_dpio_reg_read(uint32_t reg, int phy) { uint32_t val; if (phy == 0) vlv_sideband_rw(IOSF_PORT_DPIO, SB_MRD_NP, reg, &val); else vlv_sideband_rw(IOSF_PORT_DPIO_2, SB_MRD_NP, reg, &val); return val; } /** * intel_dpio_reg_write: * @reg: register offset * @val: value to write * @phy: dpio PHY to use * * 32-bit write of the register at @offset through the DPIO sideband port. */ void intel_dpio_reg_write(uint32_t reg, uint32_t val, int phy) { if (phy == 0) vlv_sideband_rw(IOSF_PORT_DPIO, SB_MWR_NP, reg, &val); else vlv_sideband_rw(IOSF_PORT_DPIO_2, SB_MWR_NP, reg, &val); } uint32_t intel_flisdsi_reg_read(uint32_t reg) { uint32_t val = 0; vlv_sideband_rw(IOSF_PORT_FLISDSI, SB_CRRDDA_NP, reg, &val); return val; } void intel_flisdsi_reg_write(uint32_t reg, uint32_t val) { vlv_sideband_rw(IOSF_PORT_FLISDSI, SB_CRWRDA_NP, reg, &val); } uint32_t intel_iosf_sb_read(uint32_t port, uint32_t reg) { uint32_t val; vlv_sideband_rw(port, SB_CRRDDA_NP, reg, &val); return val; } void intel_iosf_sb_write(uint32_t port, uint32_t reg, uint32_t val) { vlv_sideband_rw(port, SB_CRWRDA_NP, reg, &val); } intel-gpu-tools-1.14/lib/igt_draw.c0000644000175000017500000004237112665336131014151 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include #include "igt_draw.h" #include "drmtest.h" #include "intel_chipset.h" #include "igt_core.h" #include "igt_fb.h" #include "ioctl_wrappers.h" /** * SECTION:igt_draw * @short_description: drawing helpers for tests * @title: Draw * @include: igt.h * * This library contains some functions for drawing rectangles on buffers using * the many different drawing methods we have. It also contains some wrappers * that make the process easier if you have the abstract objects in hand. * * This library only claims support for some pixel formats, but adding support * for more formats should be faily easy now that we support both 16bpp and * 32bpp. If you need a new pixel format, make sure you update both this file * and tests/kms_draw_crc.c. */ /* Some internal data structures to avoid having to pass tons of parameters * around everything. */ struct cmd_data { drm_intel_bufmgr *bufmgr; drm_intel_context *context; }; struct buf_data { uint32_t handle; uint32_t size; uint32_t stride; int bpp; }; struct rect { int x; int y; int w; int h; }; /** * igt_draw_get_method_name: * @method: draw method * * Simple function to transform the enum into a string. Useful when naming * subtests and printing debug messages. */ const char *igt_draw_get_method_name(enum igt_draw_method method) { switch (method) { case IGT_DRAW_MMAP_CPU: return "mmap-cpu"; case IGT_DRAW_MMAP_GTT: return "mmap-gtt"; case IGT_DRAW_MMAP_WC: return "mmap-wc"; case IGT_DRAW_PWRITE: return "pwrite"; case IGT_DRAW_BLT: return "blt"; case IGT_DRAW_RENDER: return "render"; default: igt_assert(false); } } #define BIT(num, bit) ((num >> bit) & 1) static int swizzle_addr(int addr, int swizzle) { int bit6; switch (swizzle) { case I915_BIT_6_SWIZZLE_NONE: bit6 = BIT(addr, 6); break; case I915_BIT_6_SWIZZLE_9: bit6 = BIT(addr, 6) ^ BIT(addr, 9); break; case I915_BIT_6_SWIZZLE_9_10: bit6 = BIT(addr, 6) ^ BIT(addr, 9) ^ BIT(addr, 10); break; case I915_BIT_6_SWIZZLE_9_11: bit6 = BIT(addr, 6) ^ BIT(addr, 9) ^ BIT(addr, 11); break; case I915_BIT_6_SWIZZLE_9_10_11: bit6 = BIT(addr, 6) ^ BIT(addr, 9) ^ BIT(addr, 10) ^ BIT(addr, 11); break; case I915_BIT_6_SWIZZLE_UNKNOWN: case I915_BIT_6_SWIZZLE_9_17: case I915_BIT_6_SWIZZLE_9_10_17: default: /* If we hit this case, we need to implement support for the * appropriate swizzling method. */ igt_require(false); break; } addr &= ~(1 << 6); addr |= (bit6 << 6); return addr; } /* It's all in "pixel coordinates", so make sure you multiply/divide by the bpp * if you need to. */ static int linear_x_y_to_tiled_pos(int x, int y, uint32_t stride, int swizzle, int bpp) { int x_tile_size, y_tile_size; int x_tile_n, y_tile_n, x_tile_off, y_tile_off; int line_size, tile_size; int tile_n, tile_off; int tiled_pos, tiles_per_line; int pixel_size = bpp / 8; line_size = stride; x_tile_size = 512; y_tile_size = 8; tile_size = x_tile_size * y_tile_size; tiles_per_line = line_size / x_tile_size; y_tile_n = y / y_tile_size; y_tile_off = y % y_tile_size; x_tile_n = (x * pixel_size) / x_tile_size; x_tile_off = (x * pixel_size) % x_tile_size; tile_n = y_tile_n * tiles_per_line + x_tile_n; tile_off = y_tile_off * x_tile_size + x_tile_off; tiled_pos = tile_n * tile_size + tile_off; tiled_pos = swizzle_addr(tiled_pos, swizzle); return tiled_pos / pixel_size; } /* It's all in "pixel coordinates", so make sure you multiply/divide by the bpp * if you need to. */ static void tiled_pos_to_x_y_linear(int tiled_pos, uint32_t stride, int swizzle, int bpp, int *x, int *y) { int tile_n, tile_off, tiles_per_line, line_size; int x_tile_off, y_tile_off; int x_tile_n, y_tile_n; int x_tile_size, y_tile_size, tile_size; int pixel_size = bpp / 8; tiled_pos = swizzle_addr(tiled_pos, swizzle); line_size = stride; x_tile_size = 512; y_tile_size = 8; tile_size = x_tile_size * y_tile_size; tiles_per_line = line_size / x_tile_size; tile_n = tiled_pos / tile_size; tile_off = tiled_pos % tile_size; y_tile_off = tile_off / x_tile_size; x_tile_off = tile_off % x_tile_size; x_tile_n = tile_n % tiles_per_line; y_tile_n = tile_n / tiles_per_line; *x = (x_tile_n * x_tile_size + x_tile_off) / pixel_size; *y = y_tile_n * y_tile_size + y_tile_off; } static void set_pixel(void *_ptr, int index, uint32_t color, int bpp) { if (bpp == 16) { uint16_t *ptr = _ptr; ptr[index] = color; } else if (bpp == 32) { uint32_t *ptr = _ptr; ptr[index] = color; } else { igt_assert_f(false, "bpp: %d\n", bpp); } } static void draw_rect_ptr_linear(void *ptr, uint32_t stride, struct rect *rect, uint32_t color, int bpp) { int x, y, line_begin; for (y = rect->y; y < rect->y + rect->h; y++) { line_begin = y * stride / (bpp / 8); for (x = rect->x; x < rect->x + rect->w; x++) set_pixel(ptr, line_begin + x, color, bpp); } } static void draw_rect_ptr_tiled(void *ptr, uint32_t stride, int swizzle, struct rect *rect, uint32_t color, int bpp) { int x, y, pos; for (y = rect->y; y < rect->y + rect->h; y++) { for (x = rect->x; x < rect->x + rect->w; x++) { pos = linear_x_y_to_tiled_pos(x, y, stride, swizzle, bpp); set_pixel(ptr, pos, color, bpp); } } } static void draw_rect_mmap_cpu(int fd, struct buf_data *buf, struct rect *rect, uint32_t color) { uint32_t *ptr; uint32_t tiling, swizzle; gem_set_domain(fd, buf->handle, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU); gem_get_tiling(fd, buf->handle, &tiling, &swizzle); /* We didn't implement suport for the older tiling methods yet. */ if (tiling != I915_TILING_NONE) igt_require(intel_gen(intel_get_drm_devid(fd)) >= 5); ptr = gem_mmap__cpu(fd, buf->handle, 0, buf->size, 0); switch (tiling) { case I915_TILING_NONE: draw_rect_ptr_linear(ptr, buf->stride, rect, color, buf->bpp); break; case I915_TILING_X: draw_rect_ptr_tiled(ptr, buf->stride, swizzle, rect, color, buf->bpp); break; default: igt_assert(false); break; } gem_sw_finish(fd, buf->handle); igt_assert(munmap(ptr, buf->size) == 0); } static void draw_rect_mmap_gtt(int fd, struct buf_data *buf, struct rect *rect, uint32_t color) { uint32_t *ptr; gem_set_domain(fd, buf->handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); ptr = gem_mmap__gtt(fd, buf->handle, buf->size, PROT_READ | PROT_WRITE); draw_rect_ptr_linear(ptr, buf->stride, rect, color, buf->bpp); igt_assert(munmap(ptr, buf->size) == 0); } static void draw_rect_mmap_wc(int fd, struct buf_data *buf, struct rect *rect, uint32_t color) { uint32_t *ptr; uint32_t tiling, swizzle; gem_set_domain(fd, buf->handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); gem_get_tiling(fd, buf->handle, &tiling, &swizzle); /* We didn't implement suport for the older tiling methods yet. */ if (tiling != I915_TILING_NONE) igt_require(intel_gen(intel_get_drm_devid(fd)) >= 5); ptr = gem_mmap__wc(fd, buf->handle, 0, buf->size, PROT_READ | PROT_WRITE); switch (tiling) { case I915_TILING_NONE: draw_rect_ptr_linear(ptr, buf->stride, rect, color, buf->bpp); break; case I915_TILING_X: draw_rect_ptr_tiled(ptr, buf->stride, swizzle, rect, color, buf->bpp); break; default: igt_assert(false); break; } igt_assert(munmap(ptr, buf->size) == 0); } static void draw_rect_pwrite_untiled(int fd, struct buf_data *buf, struct rect *rect, uint32_t color) { int i, y, offset; int pixel_size = buf->bpp / 8; uint8_t tmp[rect->w * pixel_size]; for (i = 0; i < rect->w; i++) set_pixel(tmp, i, color, buf->bpp); for (y = rect->y; y < rect->y + rect->h; y++) { offset = (y * buf->stride) + (rect->x * pixel_size); gem_write(fd, buf->handle, offset, tmp, rect->w * pixel_size); } } static void draw_rect_pwrite_tiled(int fd, struct buf_data *buf, struct rect *rect, uint32_t color, uint32_t swizzle) { int i; int tiled_pos, x, y, pixel_size; uint8_t tmp[4096]; int tmp_used = 0, tmp_size; bool flush_tmp = false; int tmp_start_pos = 0; int pixels_written = 0; /* We didn't implement suport for the older tiling methods yet. */ igt_require(intel_gen(intel_get_drm_devid(fd)) >= 5); pixel_size = buf->bpp / 8; tmp_size = sizeof(tmp) / pixel_size; /* Instead of doing one pwrite per pixel, we try to group the maximum * amount of consecutive pixels we can in a single pwrite: that's why we * use the "tmp" variables. */ for (i = 0; i < tmp_size; i++) set_pixel(tmp, i, color, buf->bpp); for (tiled_pos = 0; tiled_pos < buf->size; tiled_pos += pixel_size) { tiled_pos_to_x_y_linear(tiled_pos, buf->stride, swizzle, buf->bpp, &x, &y); if (x >= rect->x && x < rect->x + rect->w && y >= rect->y && y < rect->y + rect->h) { if (tmp_used == 0) tmp_start_pos = tiled_pos; tmp_used++; } else { flush_tmp = true; } if (tmp_used == tmp_size || (flush_tmp && tmp_used > 0) || tiled_pos + pixel_size >= buf->size) { gem_write(fd, buf->handle, tmp_start_pos, tmp, tmp_used * pixel_size); flush_tmp = false; pixels_written += tmp_used; tmp_used = 0; if (pixels_written == rect->w * rect->h) break; } } } static void draw_rect_pwrite(int fd, struct buf_data *buf, struct rect *rect, uint32_t color) { uint32_t tiling, swizzle; gem_get_tiling(fd, buf->handle, &tiling, &swizzle); switch (tiling) { case I915_TILING_NONE: draw_rect_pwrite_untiled(fd, buf, rect, color); break; case I915_TILING_X: draw_rect_pwrite_tiled(fd, buf, rect, color, swizzle); break; default: igt_assert(false); break; } } static void draw_rect_blt(int fd, struct cmd_data *cmd_data, struct buf_data *buf, struct rect *rect, uint32_t color) { drm_intel_bo *dst; struct intel_batchbuffer *batch; int blt_cmd_len, blt_cmd_tiling, blt_cmd_depth; uint32_t devid = intel_get_drm_devid(fd); int gen = intel_gen(devid); uint32_t tiling, swizzle; int pitch; gem_get_tiling(fd, buf->handle, &tiling, &swizzle); dst = gem_handle_to_libdrm_bo(cmd_data->bufmgr, fd, "", buf->handle); igt_assert(dst); batch = intel_batchbuffer_alloc(cmd_data->bufmgr, devid); igt_assert(batch); switch (buf->bpp) { case 8: blt_cmd_depth = 0; break; case 16: /* we're assuming 565 */ blt_cmd_depth = 1 << 24; break; case 32: blt_cmd_depth = 3 << 24; break; default: igt_assert(false); } blt_cmd_len = (gen >= 8) ? 0x5 : 0x4; blt_cmd_tiling = (tiling) ? XY_COLOR_BLT_TILED : 0; pitch = (tiling) ? buf->stride / 4 : buf->stride; BEGIN_BATCH(6, 1); OUT_BATCH(XY_COLOR_BLT_CMD_NOLEN | XY_COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB | blt_cmd_tiling | blt_cmd_len); OUT_BATCH(blt_cmd_depth | (0xF0 << 16) | pitch); OUT_BATCH((rect->y << 16) | rect->x); OUT_BATCH(((rect->y + rect->h) << 16) | (rect->x + rect->w)); OUT_RELOC_FENCED(dst, 0, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(color); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); intel_batchbuffer_free(batch); } static void draw_rect_render(int fd, struct cmd_data *cmd_data, struct buf_data *buf, struct rect *rect, uint32_t color) { drm_intel_bo *src, *dst; uint32_t devid = intel_get_drm_devid(fd); igt_render_copyfunc_t rendercopy = igt_get_render_copyfunc(devid); struct igt_buf src_buf, dst_buf; struct intel_batchbuffer *batch; uint32_t tiling, swizzle; struct buf_data tmp; int pixel_size = buf->bpp / 8; unsigned adjusted_w, adjusted_dst_x; igt_skip_on(!rendercopy); /* Rendercopy works at 32bpp, so if you try to do copies on buffers with * smaller bpps you won't succeeed if you need to copy "half" of a 32bpp * pixel or something similar. */ igt_skip_on(rect->x % (32 / buf->bpp) != 0 || rect->y % (32 / buf->bpp) != 0 || rect->w % (32 / buf->bpp) != 0 || rect->h % (32 / buf->bpp) != 0); gem_get_tiling(fd, buf->handle, &tiling, &swizzle); /* We create a temporary buffer and copy from it using rendercopy. */ tmp.size = rect->w * rect->h * pixel_size; tmp.handle = gem_create(fd, tmp.size); tmp.stride = rect->w * pixel_size; tmp.bpp = buf->bpp; draw_rect_mmap_cpu(fd, &tmp, &(struct rect){0, 0, rect->w, rect->h}, color); src = gem_handle_to_libdrm_bo(cmd_data->bufmgr, fd, "", tmp.handle); igt_assert(src); dst = gem_handle_to_libdrm_bo(cmd_data->bufmgr, fd, "", buf->handle); igt_assert(dst); src_buf.bo = src; src_buf.stride = tmp.stride; src_buf.tiling = I915_TILING_NONE; src_buf.size = tmp.size; dst_buf.bo = dst; dst_buf.stride = buf->stride; dst_buf.tiling = tiling; dst_buf.size = buf->size; batch = intel_batchbuffer_alloc(cmd_data->bufmgr, devid); igt_assert(batch); switch (buf->bpp) { case 16: case 32: adjusted_w = rect->w / (32 / buf->bpp); adjusted_dst_x = rect->x / (32 / buf->bpp); break; default: igt_assert(false); } rendercopy(batch, cmd_data->context, &src_buf, 0, 0, adjusted_w, rect->h, &dst_buf, adjusted_dst_x, rect->y); intel_batchbuffer_free(batch); gem_close(fd, tmp.handle); } /** * igt_draw_rect: * @fd: the DRM file descriptor * @bufmgr: the libdrm bufmgr, only required for IGT_DRAW_BLT and * IGT_DRAW_RENDER * @context: the context, can be NULL if you don't want to think about it * @buf_handle: the handle of the buffer where you're going to draw to * @buf_size: the size of the buffer * @buf_stride: the stride of the buffer * @method: method you're going to use to write to the buffer * @rect_x: horizontal position on the buffer where your rectangle starts * @rect_y: vertical position on the buffer where your rectangle starts * @rect_w: width of the rectangle * @rect_h: height of the rectangle * @color: color of the rectangle * @bpp: bits per pixel * * This function draws a colored rectangle on the destination buffer, allowing * you to specify the method used to draw the rectangle. */ void igt_draw_rect(int fd, drm_intel_bufmgr *bufmgr, drm_intel_context *context, uint32_t buf_handle, uint32_t buf_size, uint32_t buf_stride, enum igt_draw_method method, int rect_x, int rect_y, int rect_w, int rect_h, uint32_t color, int bpp) { struct cmd_data cmd_data = { .bufmgr = bufmgr, .context = context, }; struct buf_data buf = { .handle = buf_handle, .size = buf_size, .stride = buf_stride, .bpp = bpp, }; struct rect rect = { .x = rect_x, .y = rect_y, .w = rect_w, .h = rect_h, }; switch (method) { case IGT_DRAW_MMAP_CPU: draw_rect_mmap_cpu(fd, &buf, &rect, color); break; case IGT_DRAW_MMAP_GTT: draw_rect_mmap_gtt(fd, &buf, &rect, color); break; case IGT_DRAW_MMAP_WC: draw_rect_mmap_wc(fd, &buf, &rect, color); break; case IGT_DRAW_PWRITE: draw_rect_pwrite(fd, &buf, &rect, color); break; case IGT_DRAW_BLT: draw_rect_blt(fd, &cmd_data, &buf, &rect, color); break; case IGT_DRAW_RENDER: draw_rect_render(fd, &cmd_data, &buf, &rect, color); break; default: igt_assert(false); break; } } /** * igt_draw_rect_fb: * @fd: the DRM file descriptor * @bufmgr: the libdrm bufmgr, only required for IGT_DRAW_BLT and * IGT_DRAW_RENDER * @context: the context, can be NULL if you don't want to think about it * @fb: framebuffer * @method: method you're going to use to write to the buffer * @rect_x: horizontal position on the buffer where your rectangle starts * @rect_y: vertical position on the buffer where your rectangle starts * @rect_w: width of the rectangle * @rect_h: height of the rectangle * @color: color of the rectangle * * This is exactly the same as igt_draw_rect, but you can pass an igt_fb instead * of manually providing its details. See igt_draw_rect. */ void igt_draw_rect_fb(int fd, drm_intel_bufmgr *bufmgr, drm_intel_context *context, struct igt_fb *fb, enum igt_draw_method method, int rect_x, int rect_y, int rect_w, int rect_h, uint32_t color) { igt_draw_rect(fd, bufmgr, context, fb->gem_handle, fb->size, fb->stride, method, rect_x, rect_y, rect_w, rect_h, color, igt_drm_format_to_bpp(fb->drm_format)); } /** * igt_draw_fill_fb: * @fd: the DRM file descriptor * @fb: the FB that is going to be filled * @color: the color you're going to paint it * * This function just paints an igt_fb using the provided color. */ void igt_draw_fill_fb(int fd, struct igt_fb *fb, uint32_t color) { igt_draw_rect_fb(fd, NULL, NULL, fb, IGT_DRAW_MMAP_GTT, 0, 0, fb->width, fb->height, color); } intel-gpu-tools-1.14/lib/debug.h0000644000175000017500000000503112665336131013434 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Ben Widawsky * */ #ifndef _DEBUG_H_ #define _DEBUG_H_ #define DEBUG_PROTOCOL_VERSION 1 #define COMMUNICATION_OFFSET 0xc00 #define COMMUNICATION_QWORD 0xc0 #define STATE_EU_MSG 0x47534d65 /* eMSG */ #define STATE_CPU_ACK 0x4b434163 /* cACK */ #define STATE_OFFSET 0xc20 #define STATE_QWORD 0xc2 #define TX_OFFSET 0xc40 #define TX_QWORD 0xc4 #define RX_OFFSET 0xc60 #define RX_QWORD 0xc6 #ifndef GEN_ASM typedef uint32_t grf[8]; typedef uint32_t mrf[8]; typedef uint8_t cr[12]; typedef uint32_t sr; #define DWORD8(x) {x, x, x, x, x, x, x, x} const static grf protocol_version = DWORD8(DEBUG_PROTOCOL_VERSION); const static grf eu_msg = DWORD8(STATE_EU_MSG); const static grf cpu_ack = DWORD8(STATE_CPU_ACK); struct eu_state { mrf m_regs[15]; grf g_regs[16]; grf pad; /* 0x400 */ cr cr0; sr sr0; uint32_t beef_pad[4]; uint8_t pad2[992 + 1024]; /* 0xc00 COMMUNICATION_OFFSET */ grf version; grf state_magic; grf eu_tx; grf eu_rx; uint8_t pad3[896]; } __attribute__((packed)); static inline void print_reg(uint8_t reg[32]) { uint32_t *dwords = (uint32_t *)reg; printf("%08x %08x %08x %08x %08x %08x %08x %08x", dwords[7], dwords[6], dwords[5], dwords[4], dwords[3], dwords[2], dwords[1], dwords[0]); } static inline void print_creg(uint8_t reg[12]) { uint32_t *dwords = (uint32_t *)reg; printf("%08x %08x %08x", dwords[2], dwords[1], dwords[0]); } #endif #endif intel-gpu-tools-1.14/lib/intel_chipset.h0000644000175000017500000004523212665336131015207 00000000000000/* * Copyright © 2007 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * */ #ifndef _INTEL_CHIPSET_H #define _INTEL_CHIPSET_H #include struct pci_device *intel_get_pci_device(void); uint32_t intel_get_drm_devid(int fd); int intel_gen(uint32_t devid); extern enum pch_type intel_pch; enum pch_type { PCH_NONE, PCH_IBX, PCH_CPT, PCH_LPT, }; void intel_check_pch(void); #define HAS_IBX (intel_pch == PCH_IBX) #define HAS_CPT (intel_pch == PCH_CPT) #define HAS_LPT (intel_pch == PCH_LPT) /* Exclude chipset #defines, they just add noise */ #ifndef __GTK_DOC_IGNORE__ #define PCI_CHIP_I810 0x7121 #define PCI_CHIP_I810_DC100 0x7123 #define PCI_CHIP_I810_E 0x7125 #define PCI_CHIP_I815 0x1132 #define PCI_CHIP_I830_M 0x3577 #define PCI_CHIP_845_G 0x2562 #define PCI_CHIP_I854_G 0x358e #define PCI_CHIP_I855_GM 0x3582 #define PCI_CHIP_I865_G 0x2572 #define PCI_CHIP_I915_G 0x2582 #define PCI_CHIP_E7221_G 0x258A #define PCI_CHIP_I915_GM 0x2592 #define PCI_CHIP_I945_G 0x2772 #define PCI_CHIP_I945_GM 0x27A2 #define PCI_CHIP_I945_GME 0x27AE #define PCI_CHIP_Q35_G 0x29B2 #define PCI_CHIP_G33_G 0x29C2 #define PCI_CHIP_Q33_G 0x29D2 #define PCI_CHIP_IGD_GM 0xA011 #define PCI_CHIP_IGD_G 0xA001 #define IS_IGDGM(devid) ((devid) == PCI_CHIP_IGD_GM) #define IS_IGDG(devid) ((devid) == PCI_CHIP_IGD_G) #define IS_IGD(devid) (IS_IGDG(devid) || IS_IGDGM(devid)) #define PCI_CHIP_I965_G 0x29A2 #define PCI_CHIP_I965_Q 0x2992 #define PCI_CHIP_I965_G_1 0x2982 #define PCI_CHIP_I946_GZ 0x2972 #define PCI_CHIP_I965_GM 0x2A02 #define PCI_CHIP_I965_GME 0x2A12 #define PCI_CHIP_GM45_GM 0x2A42 #define PCI_CHIP_IGD_E_G 0x2E02 #define PCI_CHIP_Q45_G 0x2E12 #define PCI_CHIP_G45_G 0x2E22 #define PCI_CHIP_G41_G 0x2E32 #define PCI_CHIP_ILD_G 0x0042 #define PCI_CHIP_ILM_G 0x0046 #define PCI_CHIP_SANDYBRIDGE_GT1 0x0102 /* desktop */ #define PCI_CHIP_SANDYBRIDGE_GT2 0x0112 #define PCI_CHIP_SANDYBRIDGE_GT2_PLUS 0x0122 #define PCI_CHIP_SANDYBRIDGE_M_GT1 0x0106 /* mobile */ #define PCI_CHIP_SANDYBRIDGE_M_GT2 0x0116 #define PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS 0x0126 #define PCI_CHIP_SANDYBRIDGE_S 0x010A /* server */ #define PCI_CHIP_IVYBRIDGE_GT1 0x0152 /* desktop */ #define PCI_CHIP_IVYBRIDGE_GT2 0x0162 #define PCI_CHIP_IVYBRIDGE_M_GT1 0x0156 /* mobile */ #define PCI_CHIP_IVYBRIDGE_M_GT2 0x0166 #define PCI_CHIP_IVYBRIDGE_S 0x015a /* server */ #define PCI_CHIP_IVYBRIDGE_S_GT2 0x016a /* server */ #define PCI_CHIP_HASWELL_GT1 0x0402 /* Desktop */ #define PCI_CHIP_HASWELL_GT2 0x0412 #define PCI_CHIP_HASWELL_GT3 0x0422 #define PCI_CHIP_HASWELL_M_GT1 0x0406 /* Mobile */ #define PCI_CHIP_HASWELL_M_GT2 0x0416 #define PCI_CHIP_HASWELL_M_GT3 0x0426 #define PCI_CHIP_HASWELL_S_GT1 0x040A /* Server */ #define PCI_CHIP_HASWELL_S_GT2 0x041A #define PCI_CHIP_HASWELL_S_GT3 0x042A #define PCI_CHIP_HASWELL_B_GT1 0x040B /* Reserved */ #define PCI_CHIP_HASWELL_B_GT2 0x041B #define PCI_CHIP_HASWELL_B_GT3 0x042B #define PCI_CHIP_HASWELL_E_GT1 0x040E /* Reserved */ #define PCI_CHIP_HASWELL_E_GT2 0x041E #define PCI_CHIP_HASWELL_E_GT3 0x042E #define PCI_CHIP_HASWELL_SDV_GT1 0x0C02 /* Desktop */ #define PCI_CHIP_HASWELL_SDV_GT2 0x0C12 #define PCI_CHIP_HASWELL_SDV_GT3 0x0C22 #define PCI_CHIP_HASWELL_SDV_M_GT1 0x0C06 /* Mobile */ #define PCI_CHIP_HASWELL_SDV_M_GT2 0x0C16 #define PCI_CHIP_HASWELL_SDV_M_GT3 0x0C26 #define PCI_CHIP_HASWELL_SDV_S_GT1 0x0C0A /* Server */ #define PCI_CHIP_HASWELL_SDV_S_GT2 0x0C1A #define PCI_CHIP_HASWELL_SDV_S_GT3 0x0C2A #define PCI_CHIP_HASWELL_SDV_B_GT1 0x0C0B /* Reserved */ #define PCI_CHIP_HASWELL_SDV_B_GT2 0x0C1B #define PCI_CHIP_HASWELL_SDV_B_GT3 0x0C2B #define PCI_CHIP_HASWELL_SDV_E_GT1 0x0C0E /* Reserved */ #define PCI_CHIP_HASWELL_SDV_E_GT2 0x0C1E #define PCI_CHIP_HASWELL_SDV_E_GT3 0x0C2E #define PCI_CHIP_HASWELL_ULT_GT1 0x0A02 /* Desktop */ #define PCI_CHIP_HASWELL_ULT_GT2 0x0A12 #define PCI_CHIP_HASWELL_ULT_GT3 0x0A22 #define PCI_CHIP_HASWELL_ULT_M_GT1 0x0A06 /* Mobile */ #define PCI_CHIP_HASWELL_ULT_M_GT2 0x0A16 #define PCI_CHIP_HASWELL_ULT_M_GT3 0x0A26 #define PCI_CHIP_HASWELL_ULT_S_GT1 0x0A0A /* Server */ #define PCI_CHIP_HASWELL_ULT_S_GT2 0x0A1A #define PCI_CHIP_HASWELL_ULT_S_GT3 0x0A2A #define PCI_CHIP_HASWELL_ULT_B_GT1 0x0A0B /* Reserved */ #define PCI_CHIP_HASWELL_ULT_B_GT2 0x0A1B #define PCI_CHIP_HASWELL_ULT_B_GT3 0x0A2B #define PCI_CHIP_HASWELL_ULT_E_GT1 0x0A0E /* Reserved */ #define PCI_CHIP_HASWELL_ULT_E_GT2 0x0A1E #define PCI_CHIP_HASWELL_ULT_E_GT3 0x0A2E #define PCI_CHIP_HASWELL_CRW_GT1 0x0D02 /* Desktop */ #define PCI_CHIP_HASWELL_CRW_GT2 0x0D12 #define PCI_CHIP_HASWELL_CRW_GT3 0x0D22 #define PCI_CHIP_HASWELL_CRW_M_GT1 0x0D06 /* Mobile */ #define PCI_CHIP_HASWELL_CRW_M_GT2 0x0D16 #define PCI_CHIP_HASWELL_CRW_M_GT3 0x0D26 #define PCI_CHIP_HASWELL_CRW_S_GT1 0x0D0A /* Server */ #define PCI_CHIP_HASWELL_CRW_S_GT2 0x0D1A #define PCI_CHIP_HASWELL_CRW_S_GT3 0x0D2A #define PCI_CHIP_HASWELL_CRW_B_GT1 0x0D0B /* Reserved */ #define PCI_CHIP_HASWELL_CRW_B_GT2 0x0D1B #define PCI_CHIP_HASWELL_CRW_B_GT3 0x0D2B #define PCI_CHIP_HASWELL_CRW_E_GT1 0x0D0E /* Reserved */ #define PCI_CHIP_HASWELL_CRW_E_GT2 0x0D1E #define PCI_CHIP_HASWELL_CRW_E_GT3 0x0D2E #define BDW_SPARE 0x2 #define BDW_ULT 0x6 #define BDW_HALO 0xb #define BDW_SERVER 0xa #define BDW_WORKSTATION 0xd #define BDW_ULX 0xe #define PCI_CHIP_VALLEYVIEW_PO 0x0f30 /* VLV PO board */ #define PCI_CHIP_VALLEYVIEW_1 0x0f31 #define PCI_CHIP_VALLEYVIEW_2 0x0f32 #define PCI_CHIP_VALLEYVIEW_3 0x0f33 #define PCI_CHIP_CHERRYVIEW_0 0x22b0 #define PCI_CHIP_CHERRYVIEW_1 0x22b1 #define PCI_CHIP_CHERRYVIEW_2 0x22b2 #define PCI_CHIP_CHERRYVIEW_3 0x22b3 #define PCI_CHIP_SKYLAKE_ULT_GT2 0x1916 #define PCI_CHIP_SKYLAKE_ULT_GT1 0x1906 #define PCI_CHIP_SKYLAKE_ULT_GT3 0x1926 #define PCI_CHIP_SKYLAKE_ULT_GT2F 0x1921 #define PCI_CHIP_SKYLAKE_ULX_GT1 0x190E #define PCI_CHIP_SKYLAKE_ULX_GT2 0x191E #define PCI_CHIP_SKYLAKE_DT_GT2 0x1912 #define PCI_CHIP_SKYLAKE_DT_GT1 0x1902 #define PCI_CHIP_SKYLAKE_DT_GT4 0x1932 #define PCI_CHIP_SKYLAKE_HALO_GT2 0x191B #define PCI_CHIP_SKYLAKE_HALO_GT3 0x192B #define PCI_CHIP_SKYLAKE_HALO_GT1 0x190B #define PCI_CHIP_SKYLAKE_HALO_GT4 0x193B #define PCI_CHIP_SKYLAKE_SRV_GT2 0x191A #define PCI_CHIP_SKYLAKE_SRV_GT3 0x192A #define PCI_CHIP_SKYLAKE_SRV_GT1 0x190A #define PCI_CHIP_SKYLAKE_SRV_GT4 0x193A #define PCI_CHIP_SKYLAKE_WKS_GT2 0x191D #define PCI_CHIP_SKYLAKE_WKS_GT4 0x193D #define PCI_CHIP_KABYLAKE_ULT_GT2 0x5916 #define PCI_CHIP_KABYLAKE_ULT_GT1_5 0x5913 #define PCI_CHIP_KABYLAKE_ULT_GT1 0x5906 #define PCI_CHIP_KABYLAKE_ULT_GT3 0x5926 #define PCI_CHIP_KABYLAKE_ULT_GT2F 0x5921 #define PCI_CHIP_KABYLAKE_ULX_GT1_5 0x5915 #define PCI_CHIP_KABYLAKE_ULX_GT1 0x590E #define PCI_CHIP_KABYLAKE_ULX_GT2 0x591E #define PCI_CHIP_KABYLAKE_DT_GT2 0x5912 #define PCI_CHIP_KABYLAKE_DT_GT1_5 0x5917 #define PCI_CHIP_KABYLAKE_DT_GT1 0x5902 #define PCI_CHIP_KABYLAKE_DT_GT4 0x5932 #define PCI_CHIP_KABYLAKE_HALO_GT2 0x591B #define PCI_CHIP_KABYLAKE_HALO_GT3 0x592B #define PCI_CHIP_KABYLAKE_HALO_GT1 0x590B #define PCI_CHIP_KABYLAKE_HALO_GT4 0x593B #define PCI_CHIP_KABYLAKE_SRV_GT2 0x591A #define PCI_CHIP_KABYLAKE_SRV_GT3 0x592A #define PCI_CHIP_KABYLAKE_SRV_GT4 0x593A #define PCI_CHIP_KABYLAKE_SRV_GT1 0x590A #define PCI_CHIP_KABYLAKE_WKS_GT2 0x591D #define PCI_CHIP_KABYLAKE_WKS_GT4 0x593D #define PCI_CHIP_BROXTON_0 0x0A84 #define PCI_CHIP_BROXTON_1 0x1A84 #define PCI_CHIP_BROXTON_2 0x5A84 #endif /* __GTK_DOC_IGNORE__ */ #define IS_MOBILE(devid) ((devid) == PCI_CHIP_I855_GM || \ (devid) == PCI_CHIP_I915_GM || \ (devid) == PCI_CHIP_I945_GM || \ (devid) == PCI_CHIP_I945_GME || \ (devid) == PCI_CHIP_I965_GM || \ (devid) == PCI_CHIP_I965_GME || \ (devid) == PCI_CHIP_GM45_GM || IS_IGD(devid) || \ (devid) == PCI_CHIP_IVYBRIDGE_M_GT1 || \ (devid) == PCI_CHIP_IVYBRIDGE_M_GT2) #define IS_G45(devid) ((devid) == PCI_CHIP_IGD_E_G || \ (devid) == PCI_CHIP_Q45_G || \ (devid) == PCI_CHIP_G45_G || \ (devid) == PCI_CHIP_G41_G) #define IS_GM45(devid) ((devid) == PCI_CHIP_GM45_GM) #define IS_G4X(devid) (IS_G45(devid) || IS_GM45(devid)) #define IS_ILD(devid) ((devid) == PCI_CHIP_ILD_G) #define IS_ILM(devid) ((devid) == PCI_CHIP_ILM_G) #define IS_915(devid) ((devid) == PCI_CHIP_I915_G || \ (devid) == PCI_CHIP_E7221_G || \ (devid) == PCI_CHIP_I915_GM) #define IS_945GM(devid) ((devid) == PCI_CHIP_I945_GM || \ (devid) == PCI_CHIP_I945_GME) #define IS_945(devid) ((devid) == PCI_CHIP_I945_G || \ (devid) == PCI_CHIP_I945_GM || \ (devid) == PCI_CHIP_I945_GME || \ IS_G33(devid)) #define IS_G33(devid) ((devid) == PCI_CHIP_G33_G || \ (devid) == PCI_CHIP_Q33_G || \ (devid) == PCI_CHIP_Q35_G || IS_IGD(devid)) #define IS_GEN2(devid) ((devid) == PCI_CHIP_I830_M || \ (devid) == PCI_CHIP_845_G || \ (devid) == PCI_CHIP_I854_G || \ (devid) == PCI_CHIP_I855_GM || \ (devid) == PCI_CHIP_I865_G) #define IS_GEN3(devid) (IS_945(devid) || IS_915(devid)) #define IS_GEN4(devid) ((devid) == PCI_CHIP_I965_G || \ (devid) == PCI_CHIP_I965_Q || \ (devid) == PCI_CHIP_I965_G_1 || \ (devid) == PCI_CHIP_I965_GM || \ (devid) == PCI_CHIP_I965_GME || \ (devid) == PCI_CHIP_I946_GZ || \ IS_G4X(devid)) #define IS_GEN5(devid) (IS_ILD(devid) || IS_ILM(devid)) #define IS_GEN6(devid) ((devid) == PCI_CHIP_SANDYBRIDGE_GT1 || \ (devid) == PCI_CHIP_SANDYBRIDGE_GT2 || \ (devid) == PCI_CHIP_SANDYBRIDGE_GT2_PLUS || \ (devid) == PCI_CHIP_SANDYBRIDGE_M_GT1 || \ (devid) == PCI_CHIP_SANDYBRIDGE_M_GT2 || \ (devid) == PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS || \ (devid) == PCI_CHIP_SANDYBRIDGE_S) #define IS_GEN7(devid) (IS_IVYBRIDGE(devid) || \ IS_HASWELL(devid) || \ IS_VALLEYVIEW(devid)) #define IS_IVYBRIDGE(devid) ((devid) == PCI_CHIP_IVYBRIDGE_GT1 || \ (devid) == PCI_CHIP_IVYBRIDGE_GT2 || \ (devid) == PCI_CHIP_IVYBRIDGE_M_GT1 || \ (devid) == PCI_CHIP_IVYBRIDGE_M_GT2 || \ (devid) == PCI_CHIP_IVYBRIDGE_S || \ (devid) == PCI_CHIP_IVYBRIDGE_S_GT2) #define IS_VALLEYVIEW(devid) ((devid) == PCI_CHIP_VALLEYVIEW_PO || \ (devid) == PCI_CHIP_VALLEYVIEW_1 || \ (devid) == PCI_CHIP_VALLEYVIEW_2 || \ (devid) == PCI_CHIP_VALLEYVIEW_3) #define IS_HSW_GT1(devid) ((devid) == PCI_CHIP_HASWELL_GT1 || \ (devid) == PCI_CHIP_HASWELL_M_GT1 || \ (devid) == PCI_CHIP_HASWELL_S_GT1 || \ (devid) == PCI_CHIP_HASWELL_B_GT1 || \ (devid) == PCI_CHIP_HASWELL_E_GT1 || \ (devid) == PCI_CHIP_HASWELL_SDV_GT1 || \ (devid) == PCI_CHIP_HASWELL_SDV_M_GT1 || \ (devid) == PCI_CHIP_HASWELL_SDV_S_GT1 || \ (devid) == PCI_CHIP_HASWELL_SDV_B_GT1 || \ (devid) == PCI_CHIP_HASWELL_SDV_E_GT1 || \ (devid) == PCI_CHIP_HASWELL_ULT_GT1 || \ (devid) == PCI_CHIP_HASWELL_ULT_M_GT1 || \ (devid) == PCI_CHIP_HASWELL_ULT_S_GT1 || \ (devid) == PCI_CHIP_HASWELL_ULT_B_GT1 || \ (devid) == PCI_CHIP_HASWELL_ULT_E_GT1 || \ (devid) == PCI_CHIP_HASWELL_CRW_GT1 || \ (devid) == PCI_CHIP_HASWELL_CRW_M_GT1 || \ (devid) == PCI_CHIP_HASWELL_CRW_S_GT1 || \ (devid) == PCI_CHIP_HASWELL_CRW_B_GT1 || \ (devid) == PCI_CHIP_HASWELL_CRW_E_GT1) #define IS_HSW_GT2(devid) ((devid) == PCI_CHIP_HASWELL_GT2 || \ (devid) == PCI_CHIP_HASWELL_M_GT2 || \ (devid) == PCI_CHIP_HASWELL_S_GT2 || \ (devid) == PCI_CHIP_HASWELL_B_GT2 || \ (devid) == PCI_CHIP_HASWELL_E_GT2 || \ (devid) == PCI_CHIP_HASWELL_SDV_GT2 || \ (devid) == PCI_CHIP_HASWELL_SDV_M_GT2 || \ (devid) == PCI_CHIP_HASWELL_SDV_S_GT2 || \ (devid) == PCI_CHIP_HASWELL_SDV_B_GT2 || \ (devid) == PCI_CHIP_HASWELL_SDV_E_GT2 || \ (devid) == PCI_CHIP_HASWELL_ULT_GT2 || \ (devid) == PCI_CHIP_HASWELL_ULT_M_GT2 || \ (devid) == PCI_CHIP_HASWELL_ULT_S_GT2 || \ (devid) == PCI_CHIP_HASWELL_ULT_B_GT2 || \ (devid) == PCI_CHIP_HASWELL_ULT_E_GT2 || \ (devid) == PCI_CHIP_HASWELL_CRW_GT2 || \ (devid) == PCI_CHIP_HASWELL_CRW_M_GT2 || \ (devid) == PCI_CHIP_HASWELL_CRW_S_GT2 || \ (devid) == PCI_CHIP_HASWELL_CRW_B_GT2 || \ (devid) == PCI_CHIP_HASWELL_CRW_E_GT2) #define IS_HSW_GT3(devid) ((devid) == PCI_CHIP_HASWELL_GT3 || \ (devid) == PCI_CHIP_HASWELL_M_GT3 || \ (devid) == PCI_CHIP_HASWELL_S_GT3 || \ (devid) == PCI_CHIP_HASWELL_B_GT3 || \ (devid) == PCI_CHIP_HASWELL_E_GT3 || \ (devid) == PCI_CHIP_HASWELL_SDV_GT3 || \ (devid) == PCI_CHIP_HASWELL_SDV_M_GT3 || \ (devid) == PCI_CHIP_HASWELL_SDV_S_GT3 || \ (devid) == PCI_CHIP_HASWELL_SDV_B_GT3 || \ (devid) == PCI_CHIP_HASWELL_SDV_E_GT3 || \ (devid) == PCI_CHIP_HASWELL_ULT_GT3 || \ (devid) == PCI_CHIP_HASWELL_ULT_M_GT3 || \ (devid) == PCI_CHIP_HASWELL_ULT_S_GT3 || \ (devid) == PCI_CHIP_HASWELL_ULT_B_GT3 || \ (devid) == PCI_CHIP_HASWELL_ULT_E_GT3 || \ (devid) == PCI_CHIP_HASWELL_CRW_GT3 || \ (devid) == PCI_CHIP_HASWELL_CRW_M_GT3 || \ (devid) == PCI_CHIP_HASWELL_CRW_S_GT3 || \ (devid) == PCI_CHIP_HASWELL_CRW_B_GT3 || \ (devid) == PCI_CHIP_HASWELL_CRW_E_GT3) #define IS_HASWELL(devid) (IS_HSW_GT1(devid) || \ IS_HSW_GT2(devid) || \ IS_HSW_GT3(devid)) #define IS_BROADWELL(devid) ((((devid) & 0xff00) != 0x1600) ? 0 : \ ((((devid) & 0x00f0) >> 4) > 3) ? 0 : \ (((devid) & 0x000f) == BDW_SPARE) ? 1 : \ (((devid) & 0x000f) == BDW_ULT) ? 1 : \ (((devid) & 0x000f) == BDW_HALO) ? 1 : \ (((devid) & 0x000f) == BDW_SERVER) ? 1 : \ (((devid) & 0x000f) == BDW_WORKSTATION) ? 1 : \ (((devid) & 0x000f) == BDW_ULX) ? 1 : 0) #define IS_CHERRYVIEW(devid) ((devid) == PCI_CHIP_CHERRYVIEW_0 || \ (devid) == PCI_CHIP_CHERRYVIEW_1 || \ (devid) == PCI_CHIP_CHERRYVIEW_2 || \ (devid) == PCI_CHIP_CHERRYVIEW_3) #define IS_GEN8(devid) (IS_BROADWELL(devid) || \ IS_CHERRYVIEW(devid)) #define IS_SKL_GT1(devid) ((devid) == PCI_CHIP_SKYLAKE_ULT_GT1 || \ (devid) == PCI_CHIP_SKYLAKE_ULX_GT1 || \ (devid) == PCI_CHIP_SKYLAKE_DT_GT1 || \ (devid) == PCI_CHIP_SKYLAKE_HALO_GT1 || \ (devid) == PCI_CHIP_SKYLAKE_SRV_GT1) #define IS_SKL_GT2(devid) ((devid) == PCI_CHIP_SKYLAKE_ULT_GT2 || \ (devid) == PCI_CHIP_SKYLAKE_ULT_GT2F || \ (devid) == PCI_CHIP_SKYLAKE_ULX_GT2 || \ (devid) == PCI_CHIP_SKYLAKE_DT_GT2 || \ (devid) == PCI_CHIP_SKYLAKE_HALO_GT2 || \ (devid) == PCI_CHIP_SKYLAKE_SRV_GT2 || \ (devid) == PCI_CHIP_SKYLAKE_WKS_GT2) #define IS_SKL_GT3(devid) ((devid) == PCI_CHIP_SKYLAKE_ULT_GT3 || \ (devid) == PCI_CHIP_SKYLAKE_HALO_GT3 || \ (devid) == PCI_CHIP_SKYLAKE_SRV_GT3) #define IS_SKL_GT4(devid) ((devid) == PCI_CHIP_SKYLAKE_DT_GT4 || \ (devid) == PCI_CHIP_SKYLAKE_HALO_GT4 || \ (devid) == PCI_CHIP_SKYLAKE_WKS_GT4 || \ (devid) == PCI_CHIP_SKYLAKE_SRV_GT4) #define IS_KBL_GT1(devid) ((devid) == PCI_CHIP_KABYLAKE_ULT_GT1_5|| \ (devid) == PCI_CHIP_KABYLAKE_ULX_GT1_5|| \ (devid) == PCI_CHIP_KABYLAKE_DT_GT1_5|| \ (devid) == PCI_CHIP_KABYLAKE_ULT_GT1|| \ (devid) == PCI_CHIP_KABYLAKE_ULX_GT1|| \ (devid) == PCI_CHIP_KABYLAKE_DT_GT1|| \ (devid) == PCI_CHIP_KABYLAKE_HALO_GT1|| \ (devid) == PCI_CHIP_KABYLAKE_SRV_GT1) #define IS_KBL_GT2(devid) ((devid) == PCI_CHIP_KABYLAKE_ULT_GT2|| \ (devid) == PCI_CHIP_KABYLAKE_ULT_GT2F|| \ (devid) == PCI_CHIP_KABYLAKE_ULX_GT2|| \ (devid) == PCI_CHIP_KABYLAKE_DT_GT2|| \ (devid) == PCI_CHIP_KABYLAKE_HALO_GT2|| \ (devid) == PCI_CHIP_KABYLAKE_SRV_GT2|| \ (devid) == PCI_CHIP_KABYLAKE_WKS_GT2) #define IS_KBL_GT3(devid) ((devid) == PCI_CHIP_KABYLAKE_ULT_GT3|| \ (devid) == PCI_CHIP_KABYLAKE_HALO_GT3|| \ (devid) == PCI_CHIP_KABYLAKE_SRV_GT3) #define IS_KBL_GT4(devid) ((devid) == PCI_CHIP_KABYLAKE_DT_GT4|| \ (devid) == PCI_CHIP_KABYLAKE_HALO_GT4|| \ (devid) == PCI_CHIP_KABYLAKE_SRV_GT4|| \ (devid) == PCI_CHIP_KABYLAKE_WKS_GT4) #define IS_KABYLAKE(devid) (IS_KBL_GT1(devid) || \ IS_KBL_GT2(devid) || \ IS_KBL_GT3(devid) || \ IS_KBL_GT4(devid)) #define IS_SKYLAKE(devid) (IS_SKL_GT1(devid) || \ IS_SKL_GT2(devid) || \ IS_SKL_GT3(devid) || \ IS_SKL_GT4(devid)) #define IS_BROXTON(devid) ((devid) == PCI_CHIP_BROXTON_0 || \ (devid) == PCI_CHIP_BROXTON_1 || \ (devid) == PCI_CHIP_BROXTON_2) #define IS_GEN9(devid) (IS_KABYLAKE(devid) || \ IS_SKYLAKE(devid) || \ IS_BROXTON(devid)) #define IS_965(devid) (IS_GEN4(devid) || \ IS_GEN5(devid) || \ IS_GEN6(devid) || \ IS_GEN7(devid) || \ IS_GEN8(devid) || \ IS_GEN9(devid)) #define IS_9XX(devid) (IS_GEN3(devid) || \ IS_GEN4(devid) || \ IS_GEN5(devid) || \ IS_GEN6(devid) || \ IS_GEN7(devid) || \ IS_GEN8(devid) || \ IS_GEN9(devid)) #define IS_INTEL(devid) (IS_GEN2(devid) || \ IS_GEN3(devid) || \ IS_GEN4(devid) || \ IS_GEN5(devid) || \ IS_GEN6(devid) || \ IS_GEN7(devid) || \ IS_GEN8(devid) || \ IS_GEN9(devid)) #define HAS_PCH_SPLIT(devid) (IS_GEN5(devid) || \ IS_GEN6(devid) || \ IS_IVYBRIDGE(devid) || IS_HASWELL(devid) || \ IS_BROADWELL(devid) || \ IS_SKYLAKE(devid)) #define HAS_BLT_RING(devid) (IS_GEN6(devid) || \ IS_GEN7(devid) || \ IS_GEN8(devid) || \ IS_GEN9(devid)) #define HAS_BSD_RING(devid) (IS_GEN5(devid) || \ IS_GEN6(devid) || \ IS_GEN7(devid) || \ IS_GEN8(devid) || \ IS_GEN9(devid)) #define IS_BROADWATER(devid) ((devid) == PCI_CHIP_I946_GZ || \ (devid) == PCI_CHIP_I965_G_1 || \ (devid) == PCI_CHIP_I965_Q || \ (devid) == PCI_CHIP_I965_G) #define IS_CRESTLINE(devid) ((devid) == PCI_CHIP_I965_GM || \ (devid) == PCI_CHIP_I965_GME) #define HAS_VEBOX_RING(devid) (IS_HASWELL(devid)) #endif /* _INTEL_CHIPSET_H */ intel-gpu-tools-1.14/lib/Makefile.am0000644000175000017500000000113712665336131014234 00000000000000IGT_LIB_PATH := $(builddir) GPU_TOOLS_PATH := $(top_srcdir) SUBDIRS = . tests include Makefile.sources noinst_LTLIBRARIES = libintel_tools.la noinst_HEADERS = check-ndebug.h if HAVE_VC4 libintel_tools_la_SOURCES += \ igt_vc4.c \ igt_vc4.h endif AM_CPPFLAGS = -I$(top_srcdir) AM_CFLAGS = $(DRM_CFLAGS) $(CWARNFLAGS) $(LIBUNWIND_CFLAGS) $(DEBUG_CFLAGS) \ -DIGT_SRCDIR=\""$(abs_top_srcdir)/tests"\" \ -DIGT_DATADIR=\""$(pkgdatadir)"\" \ -DIGT_LOG_DOMAIN=\""$(subst _,-,$*)"\" \ -pthread LDADD = $(CAIRO_LIBS) $(LIBUNWIND_LIBS) -lm AM_CFLAGS += $(CAIRO_CFLAGS) intel-gpu-tools-1.14/lib/instdone.c0000644000175000017500000005550612665336131014200 00000000000000/* * Copyright © 2007,2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. * * Authors: * Eric Anholt * */ #include #include "instdone.h" #include "intel_chipset.h" #include "intel_reg.h" #include "igt_core.h" /* INSTDONE */ # define IDCT_DONE (1 << 30) # define IQ_DONE (1 << 29) # define PR_DONE (1 << 28) # define VLD_DONE (1 << 27) # define IP_DONE (1 << 26) # define FBC_DONE (1 << 25) # define BINNER_DONE (1 << 24) # define SF_DONE (1 << 23) # define SE_DONE (1 << 22) # define WM_DONE (1 << 21) # define IZ_DONE (1 << 20) # define PERSPECTIVE_INTERP_DONE (1 << 19) # define DISPATCHER_DONE (1 << 18) # define PROJECTION_DONE (1 << 17) # define DEPENDENT_ADDRESS_DONE (1 << 16) # define QUAD_CACHE_DONE (1 << 15) # define TEXTURE_FETCH_DONE (1 << 14) # define TEXTURE_DECOMPRESS_DONE (1 << 13) # define SAMPLER_CACHE_DONE (1 << 12) # define FILTER_DONE (1 << 11) # define BYPASS_FIFO_DONE (1 << 10) # define PS_DONE (1 << 9) # define CC_DONE (1 << 8) # define MAP_FILTER_DONE (1 << 7) # define MAP_L2_IDLE (1 << 6) # define RING_2_ENABLE (1 << 2) # define RING_1_ENABLE (1 << 1) # define RING_0_ENABLE (1 << 0) # define I830_GMBUS_DONE (1 << 26) # define I830_FBC_DONE (1 << 25) # define I830_BINNER_DONE (1 << 24) # define I830_MPEG_DONE (1 << 23) # define I830_MECO_DONE (1 << 22) # define I830_MCD_DONE (1 << 21) # define I830_MCSTP_DONE (1 << 20) # define I830_CC_DONE (1 << 19) # define I830_DG_DONE (1 << 18) # define I830_DCMP_DONE (1 << 17) # define I830_FTCH_DONE (1 << 16) # define I830_IT_DONE (1 << 15) # define I830_MG_DONE (1 << 14) # define I830_MEC_DONE (1 << 13) # define I830_PC_DONE (1 << 12) # define I830_QCC_DONE (1 << 11) # define I830_TB_DONE (1 << 10) # define I830_WM_DONE (1 << 9) # define I830_EF_DONE (1 << 8) # define I830_BLITTER_DONE (1 << 7) # define I830_MAP_L2_DONE (1 << 6) # define I830_SECONDARY_RING_3_DONE (1 << 5) # define I830_SECONDARY_RING_2_DONE (1 << 4) # define I830_SECONDARY_RING_1_DONE (1 << 3) # define I830_SECONDARY_RING_0_DONE (1 << 2) # define I830_PRIMARY_RING_1_DONE (1 << 1) # define I830_PRIMARY_RING_0_DONE (1 << 0) /* INSTDONE_I965 */ # define I965_ROW_0_EU_0_DONE (1 << 31) # define I965_ROW_0_EU_1_DONE (1 << 30) # define I965_ROW_0_EU_2_DONE (1 << 29) # define I965_ROW_0_EU_3_DONE (1 << 28) # define I965_ROW_1_EU_0_DONE (1 << 27) # define I965_ROW_1_EU_1_DONE (1 << 26) # define I965_ROW_1_EU_2_DONE (1 << 25) # define I965_ROW_1_EU_3_DONE (1 << 24) # define I965_SF_DONE (1 << 23) # define I965_SE_DONE (1 << 22) # define I965_WM_DONE (1 << 21) # define I965_DISPATCHER_DONE (1 << 18) # define I965_PROJECTION_DONE (1 << 17) # define I965_DG_DONE (1 << 16) # define I965_QUAD_CACHE_DONE (1 << 15) # define I965_TEXTURE_FETCH_DONE (1 << 14) # define I965_TEXTURE_DECOMPRESS_DONE (1 << 13) # define I965_SAMPLER_CACHE_DONE (1 << 12) # define I965_FILTER_DONE (1 << 11) # define I965_BYPASS_DONE (1 << 10) # define I965_PS_DONE (1 << 9) # define I965_CC_DONE (1 << 8) # define I965_MAP_FILTER_DONE (1 << 7) # define I965_MAP_L2_IDLE (1 << 6) # define I965_MA_ROW_0_DONE (1 << 5) # define I965_MA_ROW_1_DONE (1 << 4) # define I965_IC_ROW_0_DONE (1 << 3) # define I965_IC_ROW_1_DONE (1 << 2) # define I965_CP_DONE (1 << 1) # define I965_RING_0_ENABLE (1 << 0) # define ILK_ROW_0_EU_0_DONE (1 << 31) # define ILK_ROW_0_EU_1_DONE (1 << 30) # define ILK_ROW_0_EU_2_DONE (1 << 29) # define ILK_ROW_0_EU_3_DONE (1 << 28) # define ILK_ROW_1_EU_0_DONE (1 << 27) # define ILK_ROW_1_EU_1_DONE (1 << 26) # define ILK_ROW_1_EU_2_DONE (1 << 25) # define ILK_ROW_1_EU_3_DONE (1 << 24) # define ILK_ROW_2_EU_0_DONE (1 << 23) # define ILK_ROW_2_EU_1_DONE (1 << 22) # define ILK_ROW_2_EU_2_DONE (1 << 21) # define ILK_ROW_2_EU_3_DONE (1 << 20) # define ILK_VCP_DONE (1 << 19) # define ILK_ROW_0_MATH_DONE (1 << 18) # define ILK_ROW_1_MATH_DONE (1 << 17) # define ILK_ROW_2_MATH_DONE (1 << 16) # define ILK_VC1_DONE (1 << 15) # define ILK_ROW_0_MA_DONE (1 << 14) # define ILK_ROW_1_MA_DONE (1 << 13) # define ILK_ROW_2_MA_DONE (1 << 12) # define ILK_ROW_0_ISC_DONE (1 << 11) # define ILK_ROW_1_ISC_DONE (1 << 10) # define ILK_ROW_2_ISC_DONE (1 << 9) # define ILK_VFE_DONE (1 << 8) # define ILK_TD_DONE (1 << 7) # define ILK_SVTS_DONE (1 << 6) # define ILK_TS_DONE (1 << 5) # define ILK_GW_DONE (1 << 4) # define ILK_AI_DONE (1 << 3) # define ILK_AC_DONE (1 << 2) # define ILK_AM_DONE (1 << 1) # define GEN6_MA_3_DONE (1 << 31) # define GEN6_EU_32_DONE (1 << 30) # define GEN6_EU_31_DONE (1 << 29) # define GEN6_EU_30_DONE (1 << 28) # define GEN6_MA_2_DONE (1 << 27) # define GEN6_EU_22_DONE (1 << 26) # define GEN6_EU_21_DONE (1 << 25) # define GEN6_EU_20_DONE (1 << 24) # define GEN6_MA_1_DONE (1 << 23) # define GEN6_EU_12_DONE (1 << 22) # define GEN6_EU_11_DONE (1 << 21) # define GEN6_EU_10_DONE (1 << 20) # define GEN6_MA_0_DONE (1 << 19) # define GEN6_EU_02_DONE (1 << 18) # define GEN6_EU_01_DONE (1 << 17) # define GEN6_EU_00_DONE (1 << 16) # define GEN6_IC_3_DONE (1 << 15) # define GEN6_IC_2_DONE (1 << 14) # define GEN6_IC_1_DONE (1 << 13) # define GEN6_IC_0_DONE (1 << 12) # define GEN6_ISC_10_DONE (1 << 11) # define GEN6_ISC_32_DONE (1 << 10) # define GEN6_VSC_DONE (1 << 9) # define GEN6_IEF_DONE (1 << 8) # define GEN6_VFE_DONE (1 << 7) # define GEN6_TD_DONE (1 << 6) # define GEN6_TS_DONE (1 << 4) # define GEN6_GW_DONE (1 << 3) # define GEN6_HIZ_DONE (1 << 2) # define GEN6_AVS_DONE (1 << 1) /* INSTDONE_1 */ # define I965_GW_CS_DONE_CR (1 << 19) # define I965_SVSM_CS_DONE_CR (1 << 18) # define I965_SVDW_CS_DONE_CR (1 << 17) # define I965_SVDR_CS_DONE_CR (1 << 16) # define I965_SVRW_CS_DONE_CR (1 << 15) # define I965_SVRR_CS_DONE_CR (1 << 14) # define I965_SVTW_CS_DONE_CR (1 << 13) # define I965_MASM_CS_DONE_CR (1 << 12) # define I965_MASF_CS_DONE_CR (1 << 11) # define I965_MAW_CS_DONE_CR (1 << 10) # define I965_EM1_CS_DONE_CR (1 << 9) # define I965_EM0_CS_DONE_CR (1 << 8) # define I965_UC1_CS_DONE (1 << 7) # define I965_UC0_CS_DONE (1 << 6) # define I965_URB_CS_DONE (1 << 5) # define I965_ISC_CS_DONE (1 << 4) # define I965_CL_CS_DONE (1 << 3) # define I965_GS_CS_DONE (1 << 2) # define I965_VS0_CS_DONE (1 << 1) # define I965_VF_CS_DONE (1 << 0) # define G4X_BCS_DONE (1 << 31) # define G4X_CS_DONE (1 << 30) # define G4X_MASF_DONE (1 << 29) # define G4X_SVDW_DONE (1 << 28) # define G4X_SVDR_DONE (1 << 27) # define G4X_SVRW_DONE (1 << 26) # define G4X_SVRR_DONE (1 << 25) # define G4X_ISC_DONE (1 << 24) # define G4X_MT_DONE (1 << 23) # define G4X_RC_DONE (1 << 22) # define G4X_DAP_DONE (1 << 21) # define G4X_MAWB_DONE (1 << 20) # define G4X_MT_IDLE (1 << 19) # define G4X_GBLT_BUSY (1 << 18) # define G4X_SVSM_DONE (1 << 17) # define G4X_MASM_DONE (1 << 16) # define G4X_QC_DONE (1 << 15) # define G4X_FL_DONE (1 << 14) # define G4X_SC_DONE (1 << 13) # define G4X_DM_DONE (1 << 12) # define G4X_FT_DONE (1 << 11) # define G4X_DG_DONE (1 << 10) # define G4X_SI_DONE (1 << 9) # define G4X_SO_DONE (1 << 8) # define G4X_PL_DONE (1 << 7) # define G4X_WIZ_DONE (1 << 6) # define G4X_URB_DONE (1 << 5) # define G4X_SF_DONE (1 << 4) # define G4X_CL_DONE (1 << 3) # define G4X_GS_DONE (1 << 2) # define G4X_VS0_DONE (1 << 1) # define G4X_VF_DONE (1 << 0) /* INSTDONE_1 */ # define GEN6_GAM_DONE (1 << 31) # define GEN6_CS_DONE (1 << 30) # define GEN6_WMBE_DONE (1 << 29) # define GEN6_SVRW_DONE (1 << 28) # define GEN6_RCC_DONE (1 << 27) # define GEN6_SVG_DONE (1 << 26) # define GEN6_ISC_DONE (1 << 25) # define GEN6_MT_DONE (1 << 24) # define GEN6_RCPFE_DONE (1 << 23) # define GEN6_RCPBE_DONE (1 << 22) # define GEN6_VDI_DONE (1 << 21) # define GEN6_RCZ_DONE (1 << 20) # define GEN6_DAP_DONE (1 << 19) # define GEN6_PSD_DONE (1 << 18) # define GEN6_IZ_DONE (1 << 17) # define GEN6_WMFE_DONE (1 << 16) # define GEN6_SVSM_DONE (1 << 15) # define GEN6_QC_DONE (1 << 14) # define GEN6_FL_DONE (1 << 13) # define GEN6_SC_DONE (1 << 12) # define GEN6_DM_DONE (1 << 11) # define GEN6_FT_DONE (1 << 10) # define GEN6_DG_DONE (1 << 9) # define GEN6_SI_DONE (1 << 8) # define GEN6_SO_DONE (1 << 7) # define GEN6_PL_DONE (1 << 6) # define GEN6_VME_DONE (1 << 5) # define GEN6_SF_DONE (1 << 4) # define GEN6_CL_DONE (1 << 3) # define GEN6_GS_DONE (1 << 2) # define GEN6_VS0_DONE (1 << 1) # define GEN6_VF_DONE (1 << 0) struct instdone_bit instdone_bits[MAX_INSTDONE_BITS]; int num_instdone_bits = 0; static void add_instdone_bit(uint32_t reg, uint32_t bit, const char *name) { igt_assert(num_instdone_bits < MAX_INSTDONE_BITS); instdone_bits[num_instdone_bits].reg = reg; instdone_bits[num_instdone_bits].bit = bit; instdone_bits[num_instdone_bits].name = name; num_instdone_bits++; } static void gen3_instdone_bit(uint32_t bit, const char *name) { add_instdone_bit(INSTDONE, bit, name); } static void gen4_instdone_bit(uint32_t bit, const char *name) { add_instdone_bit(INSTDONE_I965, bit, name); } static void gen4_instdone1_bit(uint32_t bit, const char *name) { add_instdone_bit(INSTDONE_1, bit, name); } static void gen6_instdone1_bit(uint32_t bit, const char *name) { add_instdone_bit(INSTDONE_I965, bit, name); } static void gen6_instdone2_bit(uint32_t bit, const char *name) { add_instdone_bit(INSTDONE_1, bit, name); } static void init_g965_instdone1(void) { gen4_instdone1_bit(I965_GW_CS_DONE_CR, "GW CS CR"); gen4_instdone1_bit(I965_SVSM_CS_DONE_CR, "SVSM CS CR"); gen4_instdone1_bit(I965_SVDW_CS_DONE_CR, "SVDW CS CR"); gen4_instdone1_bit(I965_SVDR_CS_DONE_CR, "SVDR CS CR"); gen4_instdone1_bit(I965_SVRW_CS_DONE_CR, "SVRW CS CR"); gen4_instdone1_bit(I965_SVRR_CS_DONE_CR, "SVRR CS CR"); gen4_instdone1_bit(I965_SVTW_CS_DONE_CR, "SVTW CS CR"); gen4_instdone1_bit(I965_MASM_CS_DONE_CR, "MASM CS CR"); gen4_instdone1_bit(I965_MASF_CS_DONE_CR, "MASF CS CR"); gen4_instdone1_bit(I965_MAW_CS_DONE_CR, "MAW CS CR"); gen4_instdone1_bit(I965_EM1_CS_DONE_CR, "EM1 CS CR"); gen4_instdone1_bit(I965_EM0_CS_DONE_CR, "EM0 CS CR"); gen4_instdone1_bit(I965_UC1_CS_DONE, "UC1 CS"); gen4_instdone1_bit(I965_UC0_CS_DONE, "UC0 CS"); gen4_instdone1_bit(I965_URB_CS_DONE, "URB CS"); gen4_instdone1_bit(I965_ISC_CS_DONE, "ISC CS"); gen4_instdone1_bit(I965_CL_CS_DONE, "CL CS"); gen4_instdone1_bit(I965_GS_CS_DONE, "GS CS"); gen4_instdone1_bit(I965_VS0_CS_DONE, "VS0 CS"); gen4_instdone1_bit(I965_VF_CS_DONE, "VF CS"); } static void init_g4x_instdone1(void) { gen4_instdone1_bit(G4X_BCS_DONE, "BCS"); gen4_instdone1_bit(G4X_CS_DONE, "CS"); gen4_instdone1_bit(G4X_MASF_DONE, "MASF"); gen4_instdone1_bit(G4X_SVDW_DONE, "SVDW"); gen4_instdone1_bit(G4X_SVDR_DONE, "SVDR"); gen4_instdone1_bit(G4X_SVRW_DONE, "SVRW"); gen4_instdone1_bit(G4X_SVRR_DONE, "SVRR"); gen4_instdone1_bit(G4X_ISC_DONE, "ISC"); gen4_instdone1_bit(G4X_MT_DONE, "MT"); gen4_instdone1_bit(G4X_RC_DONE, "RC"); gen4_instdone1_bit(G4X_DAP_DONE, "DAP"); gen4_instdone1_bit(G4X_MAWB_DONE, "MAWB"); gen4_instdone1_bit(G4X_MT_IDLE, "MT idle"); //gen4_instdone1_bit(G4X_GBLT_BUSY, "GBLT"); gen4_instdone1_bit(G4X_SVSM_DONE, "SVSM"); gen4_instdone1_bit(G4X_MASM_DONE, "MASM"); gen4_instdone1_bit(G4X_QC_DONE, "QC"); gen4_instdone1_bit(G4X_FL_DONE, "FL"); gen4_instdone1_bit(G4X_SC_DONE, "SC"); gen4_instdone1_bit(G4X_DM_DONE, "DM"); gen4_instdone1_bit(G4X_FT_DONE, "FT"); gen4_instdone1_bit(G4X_DG_DONE, "DG"); gen4_instdone1_bit(G4X_SI_DONE, "SI"); gen4_instdone1_bit(G4X_SO_DONE, "SO"); gen4_instdone1_bit(G4X_PL_DONE, "PL"); gen4_instdone1_bit(G4X_WIZ_DONE, "WIZ"); gen4_instdone1_bit(G4X_URB_DONE, "URB"); gen4_instdone1_bit(G4X_SF_DONE, "SF"); gen4_instdone1_bit(G4X_CL_DONE, "CL"); gen4_instdone1_bit(G4X_GS_DONE, "GS"); gen4_instdone1_bit(G4X_VS0_DONE, "VS0"); gen4_instdone1_bit(G4X_VF_DONE, "VF"); } static void init_gen7_instdone(void) { gen6_instdone1_bit(1 << 19, "GAM"); gen6_instdone1_bit(1 << 18, "GAFM"); gen6_instdone1_bit(1 << 17, "TSG"); gen6_instdone1_bit(1 << 16, "VFE"); gen6_instdone1_bit(1 << 15, "GAFS"); gen6_instdone1_bit(1 << 14, "SVG"); gen6_instdone1_bit(1 << 13, "URBM"); gen6_instdone1_bit(1 << 12, "TDG"); gen6_instdone1_bit(1 << 9, "SF"); gen6_instdone1_bit(1 << 8, "CL"); gen6_instdone1_bit(1 << 7, "SOL"); gen6_instdone1_bit(1 << 6, "GS"); gen6_instdone1_bit(1 << 5, "DS"); gen6_instdone1_bit(1 << 4, "TE"); gen6_instdone1_bit(1 << 3, "HS"); gen6_instdone1_bit(1 << 2, "VS"); gen6_instdone1_bit(1 << 1, "VF"); } static void init_gen75_instdone(void) { gen6_instdone1_bit(1 << 21, "CS"); gen6_instdone1_bit(1 << 20, "RS"); init_gen7_instdone(); } static void init_gen8_instdone(void) { gen6_instdone1_bit(1 << 23, "FBC"); gen6_instdone1_bit(1 << 22, "SDE"); init_gen75_instdone(); } static void init_gen9_instdone(void) { init_gen8_instdone(); } bool init_instdone_definitions(uint32_t devid) { if (IS_GEN9(devid)) { init_gen9_instdone(); } else if (IS_GEN8(devid)) { init_gen8_instdone(); } else if (IS_GEN7(devid)) { init_gen7_instdone(); } else if (IS_GEN6(devid)) { /* Now called INSTDONE_1 in the docs. */ gen6_instdone1_bit(GEN6_MA_3_DONE, "Message Arbiter 3"); gen6_instdone1_bit(GEN6_EU_32_DONE, "EU 32"); gen6_instdone1_bit(GEN6_EU_31_DONE, "EU 31"); gen6_instdone1_bit(GEN6_EU_30_DONE, "EU 30"); gen6_instdone1_bit(GEN6_MA_3_DONE, "Message Arbiter 2"); gen6_instdone1_bit(GEN6_EU_22_DONE, "EU 22"); gen6_instdone1_bit(GEN6_EU_21_DONE, "EU 21"); gen6_instdone1_bit(GEN6_EU_20_DONE, "EU 20"); gen6_instdone1_bit(GEN6_MA_3_DONE, "Message Arbiter 1"); gen6_instdone1_bit(GEN6_EU_12_DONE, "EU 12"); gen6_instdone1_bit(GEN6_EU_11_DONE, "EU 11"); gen6_instdone1_bit(GEN6_EU_10_DONE, "EU 10"); gen6_instdone1_bit(GEN6_MA_3_DONE, "Message Arbiter 0"); gen6_instdone1_bit(GEN6_EU_02_DONE, "EU 02"); gen6_instdone1_bit(GEN6_EU_01_DONE, "EU 01"); gen6_instdone1_bit(GEN6_EU_00_DONE, "EU 00"); gen6_instdone1_bit(GEN6_IC_3_DONE, "IC 3"); gen6_instdone1_bit(GEN6_IC_2_DONE, "IC 2"); gen6_instdone1_bit(GEN6_IC_1_DONE, "IC 1"); gen6_instdone1_bit(GEN6_IC_0_DONE, "IC 0"); gen6_instdone1_bit(GEN6_ISC_10_DONE, "ISC 1/0"); gen6_instdone1_bit(GEN6_ISC_32_DONE, "ISC 3/2"); gen6_instdone1_bit(GEN6_VSC_DONE, "VSC"); gen6_instdone1_bit(GEN6_IEF_DONE, "IEF"); gen6_instdone1_bit(GEN6_VFE_DONE, "VFE"); gen6_instdone1_bit(GEN6_TD_DONE, "TD"); gen6_instdone1_bit(GEN6_TS_DONE, "TS"); gen6_instdone1_bit(GEN6_GW_DONE, "GW"); gen6_instdone1_bit(GEN6_HIZ_DONE, "HIZ"); gen6_instdone1_bit(GEN6_AVS_DONE, "AVS"); /* Now called INSTDONE_2 in the docs. */ gen6_instdone2_bit(GEN6_GAM_DONE, "GAM"); gen6_instdone2_bit(GEN6_CS_DONE, "CS"); gen6_instdone2_bit(GEN6_WMBE_DONE, "WMBE"); gen6_instdone2_bit(GEN6_SVRW_DONE, "SVRW"); gen6_instdone2_bit(GEN6_RCC_DONE, "RCC"); gen6_instdone2_bit(GEN6_SVG_DONE, "SVG"); gen6_instdone2_bit(GEN6_ISC_DONE, "ISC"); gen6_instdone2_bit(GEN6_MT_DONE, "MT"); gen6_instdone2_bit(GEN6_RCPFE_DONE, "RCPFE"); gen6_instdone2_bit(GEN6_RCPBE_DONE, "RCPBE"); gen6_instdone2_bit(GEN6_VDI_DONE, "VDI"); gen6_instdone2_bit(GEN6_RCZ_DONE, "RCZ"); gen6_instdone2_bit(GEN6_DAP_DONE, "DAP"); gen6_instdone2_bit(GEN6_PSD_DONE, "PSD"); gen6_instdone2_bit(GEN6_IZ_DONE, "IZ"); gen6_instdone2_bit(GEN6_WMFE_DONE, "WMFE"); gen6_instdone2_bit(GEN6_SVSM_DONE, "SVSM"); gen6_instdone2_bit(GEN6_QC_DONE, "QC"); gen6_instdone2_bit(GEN6_FL_DONE, "FL"); gen6_instdone2_bit(GEN6_SC_DONE, "SC"); gen6_instdone2_bit(GEN6_DM_DONE, "DM"); gen6_instdone2_bit(GEN6_FT_DONE, "FT"); gen6_instdone2_bit(GEN6_DG_DONE, "DG"); gen6_instdone2_bit(GEN6_SI_DONE, "SI"); gen6_instdone2_bit(GEN6_SO_DONE, "SO"); gen6_instdone2_bit(GEN6_PL_DONE, "PL"); gen6_instdone2_bit(GEN6_VME_DONE, "VME"); gen6_instdone2_bit(GEN6_SF_DONE, "SF"); gen6_instdone2_bit(GEN6_CL_DONE, "CL"); gen6_instdone2_bit(GEN6_GS_DONE, "GS"); gen6_instdone2_bit(GEN6_VS0_DONE, "VS0"); gen6_instdone2_bit(GEN6_VF_DONE, "VF"); } else if (IS_GEN5(devid)) { gen4_instdone_bit(ILK_ROW_0_EU_0_DONE, "Row 0, EU 0"); gen4_instdone_bit(ILK_ROW_0_EU_1_DONE, "Row 0, EU 1"); gen4_instdone_bit(ILK_ROW_0_EU_2_DONE, "Row 0, EU 2"); gen4_instdone_bit(ILK_ROW_0_EU_3_DONE, "Row 0, EU 3"); gen4_instdone_bit(ILK_ROW_1_EU_0_DONE, "Row 1, EU 0"); gen4_instdone_bit(ILK_ROW_1_EU_1_DONE, "Row 1, EU 1"); gen4_instdone_bit(ILK_ROW_1_EU_2_DONE, "Row 1, EU 2"); gen4_instdone_bit(ILK_ROW_1_EU_3_DONE, "Row 1, EU 3"); gen4_instdone_bit(ILK_ROW_2_EU_0_DONE, "Row 2, EU 0"); gen4_instdone_bit(ILK_ROW_2_EU_1_DONE, "Row 2, EU 1"); gen4_instdone_bit(ILK_ROW_2_EU_2_DONE, "Row 2, EU 2"); gen4_instdone_bit(ILK_ROW_2_EU_3_DONE, "Row 2, EU 3"); gen4_instdone_bit(ILK_VCP_DONE, "VCP"); gen4_instdone_bit(ILK_ROW_0_MATH_DONE, "Row 0 math"); gen4_instdone_bit(ILK_ROW_1_MATH_DONE, "Row 1 math"); gen4_instdone_bit(ILK_ROW_2_MATH_DONE, "Row 2 math"); gen4_instdone_bit(ILK_VC1_DONE, "VC1"); gen4_instdone_bit(ILK_ROW_0_MA_DONE, "Row 0 MA"); gen4_instdone_bit(ILK_ROW_1_MA_DONE, "Row 1 MA"); gen4_instdone_bit(ILK_ROW_2_MA_DONE, "Row 2 MA"); gen4_instdone_bit(ILK_ROW_0_ISC_DONE, "Row 0 ISC"); gen4_instdone_bit(ILK_ROW_1_ISC_DONE, "Row 1 ISC"); gen4_instdone_bit(ILK_ROW_2_ISC_DONE, "Row 2 ISC"); gen4_instdone_bit(ILK_VFE_DONE, "VFE"); gen4_instdone_bit(ILK_TD_DONE, "TD"); gen4_instdone_bit(ILK_SVTS_DONE, "SVTS"); gen4_instdone_bit(ILK_TS_DONE, "TS"); gen4_instdone_bit(ILK_GW_DONE, "GW"); gen4_instdone_bit(ILK_AI_DONE, "AI"); gen4_instdone_bit(ILK_AC_DONE, "AC"); gen4_instdone_bit(ILK_AM_DONE, "AM"); init_g4x_instdone1(); } else if (IS_GEN4(devid)) { gen4_instdone_bit(I965_ROW_0_EU_0_DONE, "Row 0, EU 0"); gen4_instdone_bit(I965_ROW_0_EU_1_DONE, "Row 0, EU 1"); gen4_instdone_bit(I965_ROW_0_EU_2_DONE, "Row 0, EU 2"); gen4_instdone_bit(I965_ROW_0_EU_3_DONE, "Row 0, EU 3"); gen4_instdone_bit(I965_ROW_1_EU_0_DONE, "Row 1, EU 0"); gen4_instdone_bit(I965_ROW_1_EU_1_DONE, "Row 1, EU 1"); gen4_instdone_bit(I965_ROW_1_EU_2_DONE, "Row 1, EU 2"); gen4_instdone_bit(I965_ROW_1_EU_3_DONE, "Row 1, EU 3"); gen4_instdone_bit(I965_SF_DONE, "Strips and Fans"); gen4_instdone_bit(I965_SE_DONE, "Setup Engine"); gen4_instdone_bit(I965_WM_DONE, "Windowizer"); gen4_instdone_bit(I965_DISPATCHER_DONE, "Dispatcher"); gen4_instdone_bit(I965_PROJECTION_DONE, "Projection and LOD"); gen4_instdone_bit(I965_DG_DONE, "Dependent address generator"); gen4_instdone_bit(I965_QUAD_CACHE_DONE, "Texture fetch"); gen4_instdone_bit(I965_TEXTURE_FETCH_DONE, "Texture fetch"); gen4_instdone_bit(I965_TEXTURE_DECOMPRESS_DONE, "Texture decompress"); gen4_instdone_bit(I965_SAMPLER_CACHE_DONE, "Sampler cache"); gen4_instdone_bit(I965_FILTER_DONE, "Filtering"); gen4_instdone_bit(I965_BYPASS_DONE, "Bypass FIFO"); gen4_instdone_bit(I965_PS_DONE, "Pixel shader"); gen4_instdone_bit(I965_CC_DONE, "Color calculator"); gen4_instdone_bit(I965_MAP_FILTER_DONE, "Map filter"); gen4_instdone_bit(I965_MAP_L2_IDLE, "Map L2"); gen4_instdone_bit(I965_MA_ROW_0_DONE, "Message Arbiter row 0"); gen4_instdone_bit(I965_MA_ROW_1_DONE, "Message Arbiter row 1"); gen4_instdone_bit(I965_IC_ROW_0_DONE, "Instruction cache row 0"); gen4_instdone_bit(I965_IC_ROW_1_DONE, "Instruction cache row 1"); gen4_instdone_bit(I965_CP_DONE, "Command Processor"); if (IS_G4X(devid)) { init_g4x_instdone1(); } else { init_g965_instdone1(); } } else if (IS_GEN3(devid)) { gen3_instdone_bit(IDCT_DONE, "IDCT"); gen3_instdone_bit(IQ_DONE, "IQ"); gen3_instdone_bit(PR_DONE, "PR"); gen3_instdone_bit(VLD_DONE, "VLD"); gen3_instdone_bit(IP_DONE, "Instruction parser"); gen3_instdone_bit(FBC_DONE, "Framebuffer Compression"); gen3_instdone_bit(BINNER_DONE, "Binner"); gen3_instdone_bit(SF_DONE, "Strips and fans"); gen3_instdone_bit(SE_DONE, "Setup engine"); gen3_instdone_bit(WM_DONE, "Windowizer"); gen3_instdone_bit(IZ_DONE, "Intermediate Z"); gen3_instdone_bit(PERSPECTIVE_INTERP_DONE, "Perspective interpolation"); gen3_instdone_bit(DISPATCHER_DONE, "Dispatcher"); gen3_instdone_bit(PROJECTION_DONE, "Projection and LOD"); gen3_instdone_bit(DEPENDENT_ADDRESS_DONE, "Dependent address calculation"); gen3_instdone_bit(TEXTURE_FETCH_DONE, "Texture fetch"); gen3_instdone_bit(TEXTURE_DECOMPRESS_DONE, "Texture decompression"); gen3_instdone_bit(SAMPLER_CACHE_DONE, "Sampler Cache"); gen3_instdone_bit(FILTER_DONE, "Filtering"); gen3_instdone_bit(BYPASS_FIFO_DONE, "Bypass FIFO"); gen3_instdone_bit(PS_DONE, "Pixel shader"); gen3_instdone_bit(CC_DONE, "Color calculator"); gen3_instdone_bit(MAP_FILTER_DONE, "Map filter"); gen3_instdone_bit(MAP_L2_IDLE, "Map L2"); } else if (IS_GEN2(devid)) { gen3_instdone_bit(I830_GMBUS_DONE, "GMBUS"); gen3_instdone_bit(I830_FBC_DONE, "FBC"); gen3_instdone_bit(I830_BINNER_DONE, "BINNER"); gen3_instdone_bit(I830_MPEG_DONE, "MPEG"); gen3_instdone_bit(I830_MECO_DONE, "MECO"); gen3_instdone_bit(I830_MCD_DONE, "MCD"); gen3_instdone_bit(I830_MCSTP_DONE, "MCSTP"); gen3_instdone_bit(I830_CC_DONE, "CC"); gen3_instdone_bit(I830_DG_DONE, "DG"); gen3_instdone_bit(I830_DCMP_DONE, "DCMP"); gen3_instdone_bit(I830_FTCH_DONE, "FTCH"); gen3_instdone_bit(I830_IT_DONE, "IT"); gen3_instdone_bit(I830_MG_DONE, "MG"); gen3_instdone_bit(I830_MEC_DONE, "MEC"); gen3_instdone_bit(I830_PC_DONE, "PC"); gen3_instdone_bit(I830_QCC_DONE, "QCC"); gen3_instdone_bit(I830_TB_DONE, "TB"); gen3_instdone_bit(I830_WM_DONE, "WM"); gen3_instdone_bit(I830_EF_DONE, "EF"); gen3_instdone_bit(I830_BLITTER_DONE, "Blitter"); gen3_instdone_bit(I830_MAP_L2_DONE, "Map L2 cache"); gen3_instdone_bit(I830_SECONDARY_RING_3_DONE, "Secondary ring 3"); gen3_instdone_bit(I830_SECONDARY_RING_2_DONE, "Secondary ring 2"); gen3_instdone_bit(I830_SECONDARY_RING_1_DONE, "Secondary ring 1"); gen3_instdone_bit(I830_SECONDARY_RING_0_DONE, "Secondary ring 0"); gen3_instdone_bit(I830_PRIMARY_RING_1_DONE, "Primary ring 1"); gen3_instdone_bit(I830_PRIMARY_RING_0_DONE, "Primary ring 0"); } else return false; return true; } intel-gpu-tools-1.14/lib/gen8_render.h0000644000175000017500000002306212665336131014552 00000000000000#ifndef GEN8_RENDER_H #define GEN8_RENDER_H #include "gen6_render.h" #define GEN7_3DSTATE_URB_VS (0x7830 << 16) #define GEN7_3DSTATE_URB_HS (0x7831 << 16) #define GEN7_3DSTATE_URB_DS (0x7832 << 16) #define GEN7_3DSTATE_URB_GS (0x7833 << 16) # define GEN7_WM_LEGACY_DIAMOND_LINE_RASTERIZATION (1 << 26) #define GEN6_3DSTATE_SCISSOR_STATE_POINTERS GEN6_3D(3, 0, 0xf) #define GEN7_3DSTATE_CLEAR_PARAMS GEN6_3D(3, 0, 0x04) #define GEN7_3DSTATE_DEPTH_BUFFER GEN6_3D(3, 0, 0x05) #define GEN7_3DSTATE_STENCIL_BUFFER GEN6_3D(3, 0, 0x06) #define GEN7_3DSTATE_HIER_DEPTH_BUFFER GEN6_3D(3, 0, 0x07) #define GEN8_3DSTATE_MULTISAMPLE GEN6_3D(3, 0, 0x0d) # define GEN8_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER (0 << 4) # define GEN8_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_UPPER_LEFT (1 << 4) # define GEN8_3DSTATE_MULTISAMPLE_NUMSAMPLES_1 (0 << 1) # define GEN8_3DSTATE_MULTISAMPLE_NUMSAMPLES_2 (1 << 1) # define GEN8_3DSTATE_MULTISAMPLE_NUMSAMPLES_4 (2 << 1) # define GEN8_3DSTATE_MULTISAMPLE_NUMSAMPLES_8 (3 << 1) # define GEN9_3DSTATE_MULTISAMPLE_NUMSAMPLES_16 (4 << 1) #define GEN8_3DSTATE_WM_HZ_OP GEN6_3D(3, 0, 0x52) #define GEN8_3DSTATE_VF_INSTANCING GEN6_3D(3, 0, 0x49) #define GEN7_3DSTATE_GS GEN6_3D(3, 0, 0x11) #define GEN7_3DSTATE_CONSTANT_GS GEN6_3D(3, 0, 0x16) #define GEN7_3DSTATE_CONSTANT_HS GEN6_3D(3, 0, 0x19) #define GEN7_3DSTATE_CONSTANT_DS GEN6_3D(3, 0, 0x1a) #define GEN7_3DSTATE_CONSTANT_PS GEN6_3D(3, 0, 0x17) #define GEN7_3DSTATE_HS GEN6_3D(3, 0, 0x1b) #define GEN7_3DSTATE_TE GEN6_3D(3, 0, 0x1c) #define GEN7_3DSTATE_DS GEN6_3D(3, 0, 0x1d) #define GEN7_3DSTATE_STREAMOUT GEN6_3D(3, 0, 0x1e) #define GEN7_3DSTATE_SBE GEN6_3D(3, 0, 0x1f) # define GEN8_SBE_FORCE_URB_ENTRY_READ_LENGTH (1 << 29) # define GEN8_SBE_FORCE_URB_ENTRY_READ_OFFSET (1 << 28) # define GEN7_SBE_NUM_OUTPUTS_SHIFT 22 # define GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT 11 # define GEN8_SBE_URB_ENTRY_READ_OFFSET_SHIFT 5 #define GEN8_3DSTATE_SBE_SWIZ GEN6_3D(3, 0, 0x51) #define GEN8_3DSTATE_RASTER GEN6_3D(3, 0, 0x50) # define GEN8_RASTER_FRONT_WINDING_CCW (1 << 21) # define GEN8_RASTER_CULL_NONE (1 << 16) #define GEN7_3DSTATE_PS GEN6_3D(3, 0, 0x20) # define GEN7_PS_SPF_MODE (1 << 31) # define GEN7_SF_POINT_WIDTH_FROM_SOURCE (1 << 11) # define GEN7_VS_FLOATING_POINT_MODE_ALTERNATE (1 << 16) #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP \ GEN6_3D(3, 0, 0x21) #define GEN8_3DSTATE_PS_BLEND GEN6_3D(3, 0, 0x4d) # define GEN8_PS_BLEND_HAS_WRITEABLE_RT (1 << 30) #define GEN8_3DSTATE_WM_DEPTH_STENCIL GEN6_3D(3, 0, 0x4e) #define GEN8_3DSTATE_PS_EXTRA GEN6_3D(3,0, 0x4f) # define GEN8_PSX_PIXEL_SHADER_VALID (1 << 31) # define GEN8_PSX_ATTRIBUTE_ENABLE (1 << 8) #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC GEN6_3D(3, 0, 0x23) #define GEN7_3DSTATE_BLEND_STATE_POINTERS GEN6_3D(3, 0, 0x24) #define GEN7_3DSTATE_DS_STATE_POINTERS GEN6_3D(3, 0, 0x25) #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS GEN6_3D(3, 0, 0x26) #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS GEN6_3D(3, 0, 0x27) #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS GEN6_3D(3, 0, 0x28) #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS GEN6_3D(3, 0, 0x29) #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS GEN6_3D(3, 0, 0x2a) #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS GEN6_3D(3, 0, 0x2b) #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS GEN6_3D(3, 0, 0x2c) #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS GEN6_3D(3, 0, 0x2d) #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS GEN6_3D(3, 0, 0x2e) #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS GEN6_3D(3, 0, 0x2f) #define GEN8_3DSTATE_VF GEN6_3D(3, 0, 0x0c) #define GEN8_3DSTATE_VF_TOPOLOGY GEN6_3D(3, 0, 0x4b) #define GEN8_3DSTATE_BIND_TABLE_POOL_ALLOC GEN6_3D(3, 1, 0x19) #define GEN8_3DSTATE_GATHER_POOL_ALLOC GEN6_3D(3, 1, 0x1a) #define GEN8_3DSTATE_DX9_CONSTANT_BUFFER_POOL_ALLOC GEN6_3D(3, 1, 0x1b) #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS GEN6_3D(3, 1, 0x12) #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS GEN6_3D(3, 1, 0x13) #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS GEN6_3D(3, 1, 0x14) #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS GEN6_3D(3, 1, 0x15) #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS GEN6_3D(3, 1, 0x16) #define GEN8_3DSTATE_VF_SGVS GEN6_3D(3, 0, 0x4a) #define GEN8_3DSTATE_SO_DECL_LIST GEN6_3D(3, 1, 0x17) #define GEN8_3DSTATE_SO_BUFFER GEN6_3D(3, 1, 0x18) #define GEN8_3DSTATE_POLY_STIPPLE_OFFSET GEN6_3D(3, 1, 0x06) #define GEN8_3DSTATE_POLY_STIPPLE_PATTERN GEN6_3D(3, 1, 0x07) #define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0 GEN6_3D(3, 1, 0x02) #define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1 GEN6_3D(3, 1, 0x0c) /* Some random bits that we care about */ #define GEN7_VB0_BUFFER_ADDR_MOD_EN (1 << 14) #define GEN7_3DSTATE_PS_PERSPECTIVE_PIXEL_BARYCENTRIC (1 << 11) #define GEN7_3DSTATE_PS_ATTRIBUTE_ENABLED (1 << 10) /* Random shifts */ #define GEN8_3DSTATE_PS_MAX_THREADS_SHIFT 23 /* STATE_BASE_ADDRESS state size in pages*/ #define GEN8_STATE_SIZE_PAGES(x) ((x) << 12) /* Shamelessly ripped from mesa */ struct gen8_surface_state { struct { uint32_t cube_pos_z:1; uint32_t cube_neg_z:1; uint32_t cube_pos_y:1; uint32_t cube_neg_y:1; uint32_t cube_pos_x:1; uint32_t cube_neg_x:1; uint32_t media_boundary_pixel_mode:2; uint32_t render_cache_read_write:1; uint32_t smapler_l2_bypass:1; uint32_t vert_line_stride_ofs:1; uint32_t vert_line_stride:1; uint32_t tiled_mode:2; uint32_t horizontal_alignment:2; uint32_t vertical_alignment:2; uint32_t surface_format:9; /**< BRW_SURFACEFORMAT_x */ uint32_t pad0:1; uint32_t is_array:1; uint32_t surface_type:3; /**< BRW_SURFACE_1D/2D/3D/CUBE */ } ss0; struct { uint32_t qpitch:15; uint32_t pad1:4; uint32_t base_mip_level:5; uint32_t memory_object_control:7; uint32_t pad0:1; } ss1; struct { uint32_t width:14; uint32_t pad1:2; uint32_t height:14; uint32_t pad0:2; } ss2; struct { uint32_t pitch:18; uint32_t pad:3; uint32_t depth:11; } ss3; struct { uint32_t minimum_array_element:27; uint32_t pad0:5; } ss4; struct { uint32_t mip_count:4; uint32_t min_lod:4; uint32_t pad3:6; uint32_t coherency_type:1; uint32_t pad2:5; uint32_t ewa_disable_for_cube:1; uint32_t y_offset:3; uint32_t pad0:1; uint32_t x_offset:7; } ss5; struct { uint32_t pad; /* Multisample Control Surface stuff */ } ss6; struct { uint32_t resource_min_lod:12; /* Only on Haswell */ uint32_t pad0:4; uint32_t shader_chanel_select_a:3; uint32_t shader_chanel_select_b:3; uint32_t shader_chanel_select_g:3; uint32_t shader_chanel_select_r:3; uint32_t alpha_clear_color:1; uint32_t blue_clear_color:1; uint32_t green_clear_color:1; uint32_t red_clear_color:1; } ss7; struct { uint32_t base_addr; } ss8; struct { uint32_t base_addr_hi:16; uint32_t pad0:16; } ss9; struct { uint32_t pad0:12; uint32_t aux_base_addr:20; } ss10; struct { uint32_t aux_base_addr_hi:16; uint32_t pad:16; } ss11; struct { uint32_t hiz_depth_clear_value; } ss12; struct { uint32_t reserved; } ss13; struct { uint32_t reserved; } ss14; struct { uint32_t reserved; } ss15; }; struct gen8_sampler_state { struct { uint32_t aniso_algorithm:1; uint32_t lod_bias:13; uint32_t min_filter:3; uint32_t mag_filter:3; uint32_t mip_filter:2; uint32_t base_level:5; uint32_t lod_preclamp:2; uint32_t default_color_mode:1; uint32_t pad0:1; uint32_t disable:1; } ss0; struct { uint32_t cube_control_mode:1; uint32_t shadow_function:3; uint32_t chromakey_mode:1; uint32_t chromakey_index:2; uint32_t chromakey_enable:1; uint32_t max_lod:12; uint32_t min_lod:12; } ss1; struct { uint32_t lod_clamp_mag_mode:1; uint32_t flexible_filter_valign:1; uint32_t flexible_filter_halign:1; uint32_t flexible_filter_coeff_size:1; uint32_t flexible_filter_mode:1; uint32_t pad1:1; uint32_t indirect_state_ptr:18; uint32_t pad0:2; uint32_t sep_filter_height:2; uint32_t sep_filter_width:2; uint32_t sep_filter_coeff_table_size:2; } ss2; struct { uint32_t r_wrap_mode:3; uint32_t t_wrap_mode:3; uint32_t s_wrap_mode:3; uint32_t pad:1; uint32_t non_normalized_coord:1; uint32_t trilinear_quality:2; uint32_t address_round:6; uint32_t max_aniso:3; uint32_t pad0:2; uint32_t non_sep_filter_footprint_mask:8; } ss3; }; struct gen8_blend_state { struct { uint32_t pad0:19; uint32_t y_dither_offset:2; uint32_t x_dither_offset:2; uint32_t dither_enable:1; uint32_t alpha_test_func:3; uint32_t alpha_test:1; uint32_t alpha_to_coverage_dither:1; uint32_t alpha_to_one:1; uint32_t ia_blend:1; uint32_t alpha_to_coverage:1; } bs0; struct { uint32_t write_disable_blue:1; uint32_t write_disable_green:1; uint32_t write_disable_red:1; uint32_t write_disable_alpha:1; uint32_t pad1:1; uint32_t alpha_blend_func:3; uint32_t dest_alpha_blend_factor:5; uint32_t source_alpha_blend_factor:5; uint32_t color_blend_func:3; uint32_t dest_blend_factor:5; uint32_t source_blend_factor:5; uint32_t color_buffer_blend:1; uint32_t post_blend_color_clamp:1; uint32_t pre_blend_color_clamp:1; uint32_t color_clamp_range:2; uint32_t pre_blend_source_only_clamp:1; uint32_t pad0:22; uint32_t logic_op_func:4; uint32_t logic_op_enable:1; } bs[16]; }; struct gen7_sf_clip_viewport { struct { float m00; float m11; float m22; float m30; float m31; float m32; } viewport; uint32_t pad0[2]; struct { float xmin; float xmax; float ymin; float ymax; } guardband; float pad1[4]; }; struct gen6_scissor_rect { uint32_t xmin:16; uint32_t ymin:16; uint32_t xmax:16; uint32_t ymax:16; }; #endif intel-gpu-tools-1.14/lib/ioctl_wrappers.h0000644000175000017500000002010212665336131015377 00000000000000/* * Copyright © 2007,2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * Daniel Vetter * */ #ifndef IOCTL_WRAPPERS_H #define IOCTL_WRAPPERS_H #include #include #include #include /* libdrm interfacing */ drm_intel_bo * gem_handle_to_libdrm_bo(drm_intel_bufmgr *bufmgr, int fd, const char *name, uint32_t handle); /* ioctl_wrappers.c: * * ioctl wrappers and similar stuff for bare metal testing */ void gem_get_tiling(int fd, uint32_t handle, uint32_t *tiling, uint32_t *swizzle); void gem_set_tiling(int fd, uint32_t handle, uint32_t tiling, uint32_t stride); int __gem_set_tiling(int fd, uint32_t handle, uint32_t tiling, uint32_t stride); void gem_set_caching(int fd, uint32_t handle, uint32_t caching); uint32_t gem_get_caching(int fd, uint32_t handle); uint32_t gem_flink(int fd, uint32_t handle); uint32_t gem_open(int fd, uint32_t name); void gem_close(int fd, uint32_t handle); void gem_write(int fd, uint32_t handle, uint64_t offset, const void *buf, uint64_t length); void gem_read(int fd, uint32_t handle, uint64_t offset, void *buf, uint64_t length); void gem_set_domain(int fd, uint32_t handle, uint32_t read_domains, uint32_t write_domain); int gem_wait(int fd, uint32_t handle, int64_t *timeout_ns); void gem_sync(int fd, uint32_t handle); bool gem_create__has_stolen_support(int fd); uint32_t __gem_create_stolen(int fd, uint64_t size); uint32_t gem_create_stolen(int fd, uint64_t size); uint32_t __gem_create(int fd, int size); uint32_t gem_create(int fd, uint64_t size); void gem_execbuf(int fd, struct drm_i915_gem_execbuffer2 *execbuf); int __gem_execbuf(int fd, struct drm_i915_gem_execbuffer2 *execbuf); void *gem_mmap__gtt(int fd, uint32_t handle, uint64_t size, unsigned prot); void *gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot); bool gem_mmap__has_wc(int fd); void *gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot); void *__gem_mmap__gtt(int fd, uint32_t handle, uint64_t size, unsigned prot); void *__gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot); void *__gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot); /** * gem_require_stolen_support: * @fd: open i915 drm file descriptor * * Test macro to query whether support for allocating objects from stolen * memory is available. Automatically skips through igt_require() if not. */ #define gem_require_stolen_support(fd) \ igt_require(gem_create__has_stolen_support(fd)) /** * gem_require_mmap_wc: * @fd: open i915 drm file descriptor * * Feature test macro to query whether direct (i.e. cpu access path, bypassing * the gtt) write-combine memory mappings are available. Automatically skips * through igt_require() if not. */ #define gem_require_mmap_wc(fd) igt_require(gem_mmap__has_wc(fd)) int gem_madvise(int fd, uint32_t handle, int state); uint32_t gem_context_create(int fd); void gem_context_destroy(int fd, uint32_t ctx_id); int __gem_context_destroy(int fd, uint32_t ctx_id); struct local_i915_gem_context_param { uint32_t context; uint32_t size; uint64_t param; #define LOCAL_CONTEXT_PARAM_BAN_PERIOD 0x1 #define LOCAL_CONTEXT_PARAM_NO_ZEROMAP 0x2 #define LOCAL_CONTEXT_PARAM_GTT_SIZE 0x3 uint64_t value; }; void gem_context_require_ban_period(int fd); void gem_context_require_param(int fd, uint64_t param); void gem_context_get_param(int fd, struct local_i915_gem_context_param *p); void gem_context_set_param(int fd, struct local_i915_gem_context_param *p); int __gem_context_set_param(int fd, struct local_i915_gem_context_param *p); #define LOCAL_I915_GEM_USERPTR 0x33 #define LOCAL_IOCTL_I915_GEM_USERPTR DRM_IOWR (DRM_COMMAND_BASE + LOCAL_I915_GEM_USERPTR, struct local_i915_gem_userptr) struct local_i915_gem_userptr { uint64_t user_ptr; uint64_t user_size; uint32_t flags; #define LOCAL_I915_USERPTR_READ_ONLY (1<<0) #define LOCAL_I915_USERPTR_UNSYNCHRONIZED (1<<31) uint32_t handle; }; void gem_userptr(int fd, void *ptr, int size, int read_only, uint32_t flags, uint32_t *handle); int __gem_userptr(int fd, void *ptr, int size, int read_only, uint32_t flags, uint32_t *handle); void gem_sw_finish(int fd, uint32_t handle); bool gem_bo_busy(int fd, uint32_t handle); /* feature test helpers */ bool gem_has_llc(int fd); int gem_get_num_rings(int fd); bool gem_has_enable_ring(int fd,int param); bool gem_has_bsd(int fd); bool gem_has_blt(int fd); bool gem_has_vebox(int fd); bool gem_has_bsd2(int fd); int gem_gtt_type(int fd); bool gem_uses_ppgtt(int fd); bool gem_uses_full_ppgtt(int fd); int gem_available_fences(int fd); uint64_t gem_available_aperture_size(int fd); uint64_t gem_aperture_size(int fd); uint64_t gem_global_aperture_size(int fd); uint64_t gem_mappable_aperture_size(void); bool gem_has_softpin(int fd); /* check functions which auto-skip tests by calling igt_skip() */ void gem_require_caching(int fd); void gem_require_ring(int fd, int ring_id); /* prime */ struct local_dma_buf_sync { uint64_t flags; }; #define LOCAL_DMA_BUF_SYNC_READ (1 << 0) #define LOCAL_DMA_BUF_SYNC_WRITE (2 << 0) #define LOCAL_DMA_BUF_SYNC_RW (LOCAL_DMA_BUF_SYNC_READ | LOCAL_DMA_BUF_SYNC_WRITE) #define LOCAL_DMA_BUF_SYNC_START (0 << 2) #define LOCAL_DMA_BUF_SYNC_END (1 << 2) #define LOCAL_DMA_BUF_SYNC_VALID_FLAGS_MASK \ (LOCAL_DMA_BUF_SYNC_RW | LOCAL_DMA_BUF_SYNC_END) #define LOCAL_DMA_BUF_BASE 'b' #define LOCAL_DMA_BUF_IOCTL_SYNC _IOW(LOCAL_DMA_BUF_BASE, 0, struct local_dma_buf_sync) int prime_handle_to_fd(int fd, uint32_t handle); #ifndef DRM_RDWR #define DRM_RDWR O_RDWR #endif int prime_handle_to_fd_for_mmap(int fd, uint32_t handle); uint32_t prime_fd_to_handle(int fd, int dma_buf_fd); off_t prime_get_size(int dma_buf_fd); void prime_sync_start(int dma_buf_fd, bool write); void prime_sync_end(int dma_buf_fd, bool write); /* addfb2 fb modifiers */ struct local_drm_mode_fb_cmd2 { uint32_t fb_id; uint32_t width, height; uint32_t pixel_format; uint32_t flags; uint32_t handles[4]; uint32_t pitches[4]; uint32_t offsets[4]; uint64_t modifier[4]; }; #define LOCAL_DRM_MODE_FB_MODIFIERS (1<<1) #define LOCAL_DRM_FORMAT_MOD_VENDOR_INTEL 0x01 #define local_fourcc_mod_code(vendor, val) \ ((((uint64_t)LOCAL_DRM_FORMAT_MOD_VENDOR_## vendor) << 56) | \ (val & 0x00ffffffffffffffL)) #define LOCAL_DRM_FORMAT_MOD_NONE (0) #define LOCAL_I915_FORMAT_MOD_X_TILED local_fourcc_mod_code(INTEL, 1) #define LOCAL_I915_FORMAT_MOD_Y_TILED local_fourcc_mod_code(INTEL, 2) #define LOCAL_I915_FORMAT_MOD_Yf_TILED local_fourcc_mod_code(INTEL, 3) #define LOCAL_DRM_IOCTL_MODE_ADDFB2 DRM_IOWR(0xB8, \ struct local_drm_mode_fb_cmd2) #define LOCAL_DRM_CAP_ADDFB2_MODIFIERS 0x10 void igt_require_fb_modifiers(int fd); /** * __kms_addfb: * * Creates a framebuffer object. */ int __kms_addfb(int fd, uint32_t handle, uint32_t width, uint32_t height, uint32_t stride, uint32_t pixel_format, uint64_t modifier, uint32_t flags, uint32_t *buf_id); #endif /* IOCTL_WRAPPERS_H */ intel-gpu-tools-1.14/lib/rendercopy_gen7.c0000644000175000017500000003653312665336131015446 00000000000000#include #include #include #include #include #include #include #include #include #include #include #include "drm.h" #include "i915_drm.h" #include "drmtest.h" #include "intel_bufmgr.h" #include "intel_batchbuffer.h" #include "intel_io.h" #include "intel_chipset.h" #include "rendercopy.h" #include "gen7_render.h" #include "intel_reg.h" static const uint32_t ps_kernel[][4] = { { 0x0080005a, 0x2e2077bd, 0x000000c0, 0x008d0040 }, { 0x0080005a, 0x2e6077bd, 0x000000d0, 0x008d0040 }, { 0x02800031, 0x21801fa9, 0x008d0e20, 0x08840001 }, { 0x00800001, 0x2e2003bd, 0x008d0180, 0x00000000 }, { 0x00800001, 0x2e6003bd, 0x008d01c0, 0x00000000 }, { 0x00800001, 0x2ea003bd, 0x008d0200, 0x00000000 }, { 0x00800001, 0x2ee003bd, 0x008d0240, 0x00000000 }, { 0x05800031, 0x20001fa8, 0x008d0e20, 0x90031000 }, }; static uint32_t batch_used(struct intel_batchbuffer *batch) { return batch->state - batch->buffer; } static uint32_t batch_align(struct intel_batchbuffer *batch, uint32_t align) { uint32_t offset = batch_used(batch); offset = ALIGN(offset, align); batch->state = batch->buffer + offset; return offset; } static void * batch_alloc(struct intel_batchbuffer *batch, uint32_t size, uint32_t align) { uint32_t offset = batch_align(batch, align); batch->state += size; return memset(batch->buffer + offset, 0, size); } static uint32_t batch_offset(struct intel_batchbuffer *batch, void *ptr) { return (uint8_t *)ptr - batch->buffer; } static uint32_t batch_copy(struct intel_batchbuffer *batch, const void *ptr, uint32_t size, uint32_t align) { return batch_offset(batch, memcpy(batch_alloc(batch, size, align), ptr, size)); } static void gen7_render_flush(struct intel_batchbuffer *batch, drm_intel_context *context, uint32_t batch_end) { int ret; ret = drm_intel_bo_subdata(batch->bo, 0, 4096, batch->buffer); if (ret == 0) ret = drm_intel_gem_bo_context_exec(batch->bo, context, batch_end, 0); igt_assert(ret == 0); } static uint32_t gen7_tiling_bits(uint32_t tiling) { switch (tiling) { default: igt_assert(0); case I915_TILING_NONE: return 0; case I915_TILING_X: return GEN7_SURFACE_TILED; case I915_TILING_Y: return GEN7_SURFACE_TILED | GEN7_SURFACE_TILED_Y; } } static uint32_t gen7_bind_buf(struct intel_batchbuffer *batch, struct igt_buf *buf, uint32_t format, int is_dst) { uint32_t *ss; uint32_t write_domain, read_domain; int ret; if (is_dst) { write_domain = read_domain = I915_GEM_DOMAIN_RENDER; } else { write_domain = 0; read_domain = I915_GEM_DOMAIN_SAMPLER; } ss = batch_alloc(batch, 8 * sizeof(*ss), 32); ss[0] = (GEN7_SURFACE_2D << GEN7_SURFACE_TYPE_SHIFT | gen7_tiling_bits(buf->tiling) | format << GEN7_SURFACE_FORMAT_SHIFT); ss[1] = buf->bo->offset; ss[2] = ((igt_buf_width(buf) - 1) << GEN7_SURFACE_WIDTH_SHIFT | (igt_buf_height(buf) - 1) << GEN7_SURFACE_HEIGHT_SHIFT); ss[3] = (buf->stride - 1) << GEN7_SURFACE_PITCH_SHIFT; ss[4] = 0; ss[5] = 0; ss[6] = 0; ss[7] = 0; if (IS_HASWELL(batch->devid)) ss[7] |= HSW_SURFACE_SWIZZLE(RED, GREEN, BLUE, ALPHA); ret = drm_intel_bo_emit_reloc(batch->bo, batch_offset(batch, ss) + 4, buf->bo, 0, read_domain, write_domain); igt_assert(ret == 0); return batch_offset(batch, ss); } static void gen7_emit_vertex_elements(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_VERTEX_ELEMENTS | ((2 * (1 + 2)) + 1 - 2)); OUT_BATCH(0 << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID | GEN7_SURFACEFORMAT_R32G32B32A32_FLOAT << GEN7_VE0_FORMAT_SHIFT | 0 << GEN7_VE0_OFFSET_SHIFT); OUT_BATCH(GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_0_SHIFT | GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_1_SHIFT | GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_2_SHIFT | GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_3_SHIFT); /* x,y */ OUT_BATCH(0 << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID | GEN7_SURFACEFORMAT_R16G16_SSCALED << GEN7_VE0_FORMAT_SHIFT | 0 << GEN7_VE0_OFFSET_SHIFT); /* offsets vb in bytes */ OUT_BATCH(GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_0_SHIFT | GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_1_SHIFT | GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_2_SHIFT | GEN7_VFCOMPONENT_STORE_1_FLT << GEN7_VE1_VFCOMPONENT_3_SHIFT); /* s,t */ OUT_BATCH(0 << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID | GEN7_SURFACEFORMAT_R16G16_SSCALED << GEN7_VE0_FORMAT_SHIFT | 4 << GEN7_VE0_OFFSET_SHIFT); /* offset vb in bytes */ OUT_BATCH(GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_0_SHIFT | GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_1_SHIFT | GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_2_SHIFT | GEN7_VFCOMPONENT_STORE_1_FLT << GEN7_VE1_VFCOMPONENT_3_SHIFT); } static uint32_t gen7_create_vertex_buffer(struct intel_batchbuffer *batch, uint32_t src_x, uint32_t src_y, uint32_t dst_x, uint32_t dst_y, uint32_t width, uint32_t height) { uint16_t *v; v = batch_alloc(batch, 12*sizeof(*v), 8); v[0] = dst_x + width; v[1] = dst_y + height; v[2] = src_x + width; v[3] = src_y + height; v[4] = dst_x; v[5] = dst_y + height; v[6] = src_x; v[7] = src_y + height; v[8] = dst_x; v[9] = dst_y; v[10] = src_x; v[11] = src_y; return batch_offset(batch, v); } static void gen7_emit_vertex_buffer(struct intel_batchbuffer *batch, int src_x, int src_y, int dst_x, int dst_y, int width, int height) { uint32_t offset; offset = gen7_create_vertex_buffer(batch, src_x, src_y, dst_x, dst_y, width, height); OUT_BATCH(GEN7_3DSTATE_VERTEX_BUFFERS | (5 - 2)); OUT_BATCH(0 << GEN7_VB0_BUFFER_INDEX_SHIFT | GEN7_VB0_VERTEXDATA | GEN7_VB0_ADDRESS_MODIFY_ENABLE | 4*2 << GEN7_VB0_BUFFER_PITCH_SHIFT); OUT_RELOC(batch->bo, I915_GEM_DOMAIN_VERTEX, 0, offset); OUT_BATCH(~0); OUT_BATCH(0); } static uint32_t gen7_bind_surfaces(struct intel_batchbuffer *batch, struct igt_buf *src, struct igt_buf *dst) { uint32_t *binding_table; binding_table = batch_alloc(batch, 8, 32); binding_table[0] = gen7_bind_buf(batch, dst, GEN7_SURFACEFORMAT_B8G8R8A8_UNORM, 1); binding_table[1] = gen7_bind_buf(batch, src, GEN7_SURFACEFORMAT_B8G8R8A8_UNORM, 0); return batch_offset(batch, binding_table); } static void gen7_emit_binding_table(struct intel_batchbuffer *batch, struct igt_buf *src, struct igt_buf *dst) { OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS | (2 - 2)); OUT_BATCH(gen7_bind_surfaces(batch, src, dst)); } static void gen7_emit_drawing_rectangle(struct intel_batchbuffer *batch, struct igt_buf *dst) { OUT_BATCH(GEN7_3DSTATE_DRAWING_RECTANGLE | (4 - 2)); OUT_BATCH(0); OUT_BATCH((igt_buf_height(dst) - 1) << 16 | (igt_buf_width(dst) - 1)); OUT_BATCH(0); } static uint32_t gen7_create_blend_state(struct intel_batchbuffer *batch) { struct gen7_blend_state *blend; blend = batch_alloc(batch, sizeof(*blend), 64); blend->blend0.dest_blend_factor = GEN7_BLENDFACTOR_ZERO; blend->blend0.source_blend_factor = GEN7_BLENDFACTOR_ONE; blend->blend0.blend_func = GEN7_BLENDFUNCTION_ADD; blend->blend1.post_blend_clamp_enable = 1; blend->blend1.pre_blend_clamp_enable = 1; return batch_offset(batch, blend); } static void gen7_emit_state_base_address(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_STATE_BASE_ADDRESS | (10 - 2)); OUT_BATCH(0); OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); OUT_BATCH(0); OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); OUT_BATCH(0); OUT_BATCH(0 | BASE_ADDRESS_MODIFY); OUT_BATCH(0); OUT_BATCH(0 | BASE_ADDRESS_MODIFY); } static uint32_t gen7_create_cc_viewport(struct intel_batchbuffer *batch) { struct gen7_cc_viewport *vp; vp = batch_alloc(batch, sizeof(*vp), 32); vp->min_depth = -1.e35; vp->max_depth = 1.e35; return batch_offset(batch, vp); } static void gen7_emit_cc(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_BLEND_STATE_POINTERS | (2 - 2)); OUT_BATCH(gen7_create_blend_state(batch)); OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC | (2 - 2)); OUT_BATCH(gen7_create_cc_viewport(batch)); } static uint32_t gen7_create_sampler(struct intel_batchbuffer *batch) { struct gen7_sampler_state *ss; ss = batch_alloc(batch, sizeof(*ss), 32); ss->ss0.min_filter = GEN7_MAPFILTER_NEAREST; ss->ss0.mag_filter = GEN7_MAPFILTER_NEAREST; ss->ss3.r_wrap_mode = GEN7_TEXCOORDMODE_CLAMP; ss->ss3.s_wrap_mode = GEN7_TEXCOORDMODE_CLAMP; ss->ss3.t_wrap_mode = GEN7_TEXCOORDMODE_CLAMP; ss->ss3.non_normalized_coord = 1; return batch_offset(batch, ss); } static void gen7_emit_sampler(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS | (2 - 2)); OUT_BATCH(gen7_create_sampler(batch)); } static void gen7_emit_multisample(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_MULTISAMPLE | (4 - 2)); OUT_BATCH(GEN7_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER | GEN7_3DSTATE_MULTISAMPLE_NUMSAMPLES_1); /* 1 sample/pixel */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_SAMPLE_MASK | (2 - 2)); OUT_BATCH(1); } static void gen7_emit_urb(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS | (2 - 2)); OUT_BATCH(8); /* in 1KBs */ /* num of VS entries must be divisible by 8 if size < 9 */ OUT_BATCH(GEN7_3DSTATE_URB_VS | (2 - 2)); OUT_BATCH((64 << GEN7_URB_ENTRY_NUMBER_SHIFT) | (2 - 1) << GEN7_URB_ENTRY_SIZE_SHIFT | (1 << GEN7_URB_STARTING_ADDRESS_SHIFT)); OUT_BATCH(GEN7_3DSTATE_URB_HS | (2 - 2)); OUT_BATCH((0 << GEN7_URB_ENTRY_SIZE_SHIFT) | (2 << GEN7_URB_STARTING_ADDRESS_SHIFT)); OUT_BATCH(GEN7_3DSTATE_URB_DS | (2 - 2)); OUT_BATCH((0 << GEN7_URB_ENTRY_SIZE_SHIFT) | (2 << GEN7_URB_STARTING_ADDRESS_SHIFT)); OUT_BATCH(GEN7_3DSTATE_URB_GS | (2 - 2)); OUT_BATCH((0 << GEN7_URB_ENTRY_SIZE_SHIFT) | (1 << GEN7_URB_STARTING_ADDRESS_SHIFT)); } static void gen7_emit_vs(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_VS | (6 - 2)); OUT_BATCH(0); /* no VS kernel */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* pass-through */ } static void gen7_emit_hs(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_HS | (7 - 2)); OUT_BATCH(0); /* no HS kernel */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* pass-through */ } static void gen7_emit_te(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_TE | (4 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } static void gen7_emit_ds(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_DS | (6 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } static void gen7_emit_gs(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_GS | (7 - 2)); OUT_BATCH(0); /* no GS kernel */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* pass-through */ } static void gen7_emit_streamout(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_STREAMOUT | (3 - 2)); OUT_BATCH(0); OUT_BATCH(0); } static void gen7_emit_sf(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_SF | (7 - 2)); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_SF_CULL_NONE); OUT_BATCH(2 << GEN7_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } static void gen7_emit_sbe(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_SBE | (14 - 2)); OUT_BATCH(1 << GEN7_SBE_NUM_OUTPUTS_SHIFT | 1 << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT | 1 << GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT); OUT_BATCH(0); OUT_BATCH(0); /* dw4 */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* dw8 */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* dw12 */ OUT_BATCH(0); OUT_BATCH(0); } static void gen7_emit_ps(struct intel_batchbuffer *batch) { int threads; if (IS_HASWELL(batch->devid)) threads = 40 << HSW_PS_MAX_THREADS_SHIFT | 1 << HSW_PS_SAMPLE_MASK_SHIFT; else threads = 40 << IVB_PS_MAX_THREADS_SHIFT; OUT_BATCH(GEN7_3DSTATE_PS | (8 - 2)); OUT_BATCH(batch_copy(batch, ps_kernel, sizeof(ps_kernel), 64)); OUT_BATCH(1 << GEN7_PS_SAMPLER_COUNT_SHIFT | 2 << GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT); OUT_BATCH(0); /* scratch address */ OUT_BATCH(threads | GEN7_PS_16_DISPATCH_ENABLE | GEN7_PS_ATTRIBUTE_ENABLE); OUT_BATCH(6 << GEN7_PS_DISPATCH_START_GRF_SHIFT_0); OUT_BATCH(0); OUT_BATCH(0); } static void gen7_emit_clip(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_CLIP | (4 - 2)); OUT_BATCH(0); OUT_BATCH(0); /* pass-through */ OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL | (2 - 2)); OUT_BATCH(0); } static void gen7_emit_wm(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_WM | (3 - 2)); OUT_BATCH(GEN7_WM_DISPATCH_ENABLE | GEN7_WM_PERSPECTIVE_PIXEL_BARYCENTRIC); OUT_BATCH(0); } static void gen7_emit_null_depth_buffer(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_DEPTH_BUFFER | (7 - 2)); OUT_BATCH(GEN7_SURFACE_NULL << GEN7_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT | GEN7_DEPTHFORMAT_D32_FLOAT << GEN7_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT); OUT_BATCH(0); /* disable depth, stencil and hiz */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_CLEAR_PARAMS | (3 - 2)); OUT_BATCH(0); OUT_BATCH(0); } #define BATCH_STATE_SPLIT 2048 void gen7_render_copyfunc(struct intel_batchbuffer *batch, drm_intel_context *context, struct igt_buf *src, unsigned src_x, unsigned src_y, unsigned width, unsigned height, struct igt_buf *dst, unsigned dst_x, unsigned dst_y) { uint32_t batch_end; intel_batchbuffer_flush_with_context(batch, context); batch->state = &batch->buffer[BATCH_STATE_SPLIT]; OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_3D); gen7_emit_state_base_address(batch); gen7_emit_multisample(batch); gen7_emit_urb(batch); gen7_emit_vs(batch); gen7_emit_hs(batch); gen7_emit_te(batch); gen7_emit_ds(batch); gen7_emit_gs(batch); gen7_emit_clip(batch); gen7_emit_sf(batch); gen7_emit_wm(batch); gen7_emit_streamout(batch); gen7_emit_null_depth_buffer(batch); gen7_emit_cc(batch); gen7_emit_sampler(batch); gen7_emit_sbe(batch); gen7_emit_ps(batch); gen7_emit_vertex_elements(batch); gen7_emit_vertex_buffer(batch, src_x, src_y, dst_x, dst_y, width, height); gen7_emit_binding_table(batch, src, dst); gen7_emit_drawing_rectangle(batch, dst); OUT_BATCH(GEN7_3DPRIMITIVE | (7- 2)); OUT_BATCH(GEN7_3DPRIMITIVE_VERTEX_SEQUENTIAL | _3DPRIM_RECTLIST); OUT_BATCH(3); OUT_BATCH(0); OUT_BATCH(1); /* single instance */ OUT_BATCH(0); /* start instance location */ OUT_BATCH(0); /* index buffer offset, ignored */ OUT_BATCH(MI_BATCH_BUFFER_END); batch_end = batch->ptr - batch->buffer; batch_end = ALIGN(batch_end, 8); igt_assert(batch_end < BATCH_STATE_SPLIT); gen7_render_flush(batch, context, batch_end); intel_batchbuffer_reset(batch); } intel-gpu-tools-1.14/lib/gen7_media.h0000644000175000017500000003350612665336131014355 00000000000000#ifndef GEN7_MEDIA_H #define GEN7_MEDIA_H #include #define GEN7_SURFACEFORMAT_R32G32B32A32_FLOAT 0x000 #define GEN7_SURFACEFORMAT_R32G32B32A32_SINT 0x001 #define GEN7_SURFACEFORMAT_R32G32B32A32_UINT 0x002 #define GEN7_SURFACEFORMAT_R32G32B32A32_UNORM 0x003 #define GEN7_SURFACEFORMAT_R32G32B32A32_SNORM 0x004 #define GEN7_SURFACEFORMAT_R64G64_FLOAT 0x005 #define GEN7_SURFACEFORMAT_R32G32B32X32_FLOAT 0x006 #define GEN7_SURFACEFORMAT_R32G32B32A32_SSCALED 0x007 #define GEN7_SURFACEFORMAT_R32G32B32A32_USCALED 0x008 #define GEN7_SURFACEFORMAT_R32G32B32_FLOAT 0x040 #define GEN7_SURFACEFORMAT_R32G32B32_SINT 0x041 #define GEN7_SURFACEFORMAT_R32G32B32_UINT 0x042 #define GEN7_SURFACEFORMAT_R32G32B32_UNORM 0x043 #define GEN7_SURFACEFORMAT_R32G32B32_SNORM 0x044 #define GEN7_SURFACEFORMAT_R32G32B32_SSCALED 0x045 #define GEN7_SURFACEFORMAT_R32G32B32_USCALED 0x046 #define GEN7_SURFACEFORMAT_R16G16B16A16_UNORM 0x080 #define GEN7_SURFACEFORMAT_R16G16B16A16_SNORM 0x081 #define GEN7_SURFACEFORMAT_R16G16B16A16_SINT 0x082 #define GEN7_SURFACEFORMAT_R16G16B16A16_UINT 0x083 #define GEN7_SURFACEFORMAT_R16G16B16A16_FLOAT 0x084 #define GEN7_SURFACEFORMAT_R32G32_FLOAT 0x085 #define GEN7_SURFACEFORMAT_R32G32_SINT 0x086 #define GEN7_SURFACEFORMAT_R32G32_UINT 0x087 #define GEN7_SURFACEFORMAT_R32_FLOAT_X8X24_TYPELESS 0x088 #define GEN7_SURFACEFORMAT_X32_TYPELESS_G8X24_UINT 0x089 #define GEN7_SURFACEFORMAT_L32A32_FLOAT 0x08A #define GEN7_SURFACEFORMAT_R32G32_UNORM 0x08B #define GEN7_SURFACEFORMAT_R32G32_SNORM 0x08C #define GEN7_SURFACEFORMAT_R64_FLOAT 0x08D #define GEN7_SURFACEFORMAT_R16G16B16X16_UNORM 0x08E #define GEN7_SURFACEFORMAT_R16G16B16X16_FLOAT 0x08F #define GEN7_SURFACEFORMAT_A32X32_FLOAT 0x090 #define GEN7_SURFACEFORMAT_L32X32_FLOAT 0x091 #define GEN7_SURFACEFORMAT_I32X32_FLOAT 0x092 #define GEN7_SURFACEFORMAT_R16G16B16A16_SSCALED 0x093 #define GEN7_SURFACEFORMAT_R16G16B16A16_USCALED 0x094 #define GEN7_SURFACEFORMAT_R32G32_SSCALED 0x095 #define GEN7_SURFACEFORMAT_R32G32_USCALED 0x096 #define GEN7_SURFACEFORMAT_B8G8R8A8_UNORM 0x0C0 #define GEN7_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB 0x0C1 #define GEN7_SURFACEFORMAT_R10G10B10A2_UNORM 0x0C2 #define GEN7_SURFACEFORMAT_R10G10B10A2_UNORM_SRGB 0x0C3 #define GEN7_SURFACEFORMAT_R10G10B10A2_UINT 0x0C4 #define GEN7_SURFACEFORMAT_R10G10B10_SNORM_A2_UNORM 0x0C5 #define GEN7_SURFACEFORMAT_R8G8B8A8_UNORM 0x0C7 #define GEN7_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB 0x0C8 #define GEN7_SURFACEFORMAT_R8G8B8A8_SNORM 0x0C9 #define GEN7_SURFACEFORMAT_R8G8B8A8_SINT 0x0CA #define GEN7_SURFACEFORMAT_R8G8B8A8_UINT 0x0CB #define GEN7_SURFACEFORMAT_R16G16_UNORM 0x0CC #define GEN7_SURFACEFORMAT_R16G16_SNORM 0x0CD #define GEN7_SURFACEFORMAT_R16G16_SINT 0x0CE #define GEN7_SURFACEFORMAT_R16G16_UINT 0x0CF #define GEN7_SURFACEFORMAT_R16G16_FLOAT 0x0D0 #define GEN7_SURFACEFORMAT_B10G10R10A2_UNORM 0x0D1 #define GEN7_SURFACEFORMAT_B10G10R10A2_UNORM_SRGB 0x0D2 #define GEN7_SURFACEFORMAT_R11G11B10_FLOAT 0x0D3 #define GEN7_SURFACEFORMAT_R32_SINT 0x0D6 #define GEN7_SURFACEFORMAT_R32_UINT 0x0D7 #define GEN7_SURFACEFORMAT_R32_FLOAT 0x0D8 #define GEN7_SURFACEFORMAT_R24_UNORM_X8_TYPELESS 0x0D9 #define GEN7_SURFACEFORMAT_X24_TYPELESS_G8_UINT 0x0DA #define GEN7_SURFACEFORMAT_L16A16_UNORM 0x0DF #define GEN7_SURFACEFORMAT_I24X8_UNORM 0x0E0 #define GEN7_SURFACEFORMAT_L24X8_UNORM 0x0E1 #define GEN7_SURFACEFORMAT_A24X8_UNORM 0x0E2 #define GEN7_SURFACEFORMAT_I32_FLOAT 0x0E3 #define GEN7_SURFACEFORMAT_L32_FLOAT 0x0E4 #define GEN7_SURFACEFORMAT_A32_FLOAT 0x0E5 #define GEN7_SURFACEFORMAT_B8G8R8X8_UNORM 0x0E9 #define GEN7_SURFACEFORMAT_B8G8R8X8_UNORM_SRGB 0x0EA #define GEN7_SURFACEFORMAT_R8G8B8X8_UNORM 0x0EB #define GEN7_SURFACEFORMAT_R8G8B8X8_UNORM_SRGB 0x0EC #define GEN7_SURFACEFORMAT_R9G9B9E5_SHAREDEXP 0x0ED #define GEN7_SURFACEFORMAT_B10G10R10X2_UNORM 0x0EE #define GEN7_SURFACEFORMAT_L16A16_FLOAT 0x0F0 #define GEN7_SURFACEFORMAT_R32_UNORM 0x0F1 #define GEN7_SURFACEFORMAT_R32_SNORM 0x0F2 #define GEN7_SURFACEFORMAT_R10G10B10X2_USCALED 0x0F3 #define GEN7_SURFACEFORMAT_R8G8B8A8_SSCALED 0x0F4 #define GEN7_SURFACEFORMAT_R8G8B8A8_USCALED 0x0F5 #define GEN7_SURFACEFORMAT_R16G16_SSCALED 0x0F6 #define GEN7_SURFACEFORMAT_R16G16_USCALED 0x0F7 #define GEN7_SURFACEFORMAT_R32_SSCALED 0x0F8 #define GEN7_SURFACEFORMAT_R32_USCALED 0x0F9 #define GEN7_SURFACEFORMAT_B5G6R5_UNORM 0x100 #define GEN7_SURFACEFORMAT_B5G6R5_UNORM_SRGB 0x101 #define GEN7_SURFACEFORMAT_B5G5R5A1_UNORM 0x102 #define GEN7_SURFACEFORMAT_B5G5R5A1_UNORM_SRGB 0x103 #define GEN7_SURFACEFORMAT_B4G4R4A4_UNORM 0x104 #define GEN7_SURFACEFORMAT_B4G4R4A4_UNORM_SRGB 0x105 #define GEN7_SURFACEFORMAT_R8G8_UNORM 0x106 #define GEN7_SURFACEFORMAT_R8G8_SNORM 0x107 #define GEN7_SURFACEFORMAT_R8G8_SINT 0x108 #define GEN7_SURFACEFORMAT_R8G8_UINT 0x109 #define GEN7_SURFACEFORMAT_R16_UNORM 0x10A #define GEN7_SURFACEFORMAT_R16_SNORM 0x10B #define GEN7_SURFACEFORMAT_R16_SINT 0x10C #define GEN7_SURFACEFORMAT_R16_UINT 0x10D #define GEN7_SURFACEFORMAT_R16_FLOAT 0x10E #define GEN7_SURFACEFORMAT_I16_UNORM 0x111 #define GEN7_SURFACEFORMAT_L16_UNORM 0x112 #define GEN7_SURFACEFORMAT_A16_UNORM 0x113 #define GEN7_SURFACEFORMAT_L8A8_UNORM 0x114 #define GEN7_SURFACEFORMAT_I16_FLOAT 0x115 #define GEN7_SURFACEFORMAT_L16_FLOAT 0x116 #define GEN7_SURFACEFORMAT_A16_FLOAT 0x117 #define GEN7_SURFACEFORMAT_R5G5_SNORM_B6_UNORM 0x119 #define GEN7_SURFACEFORMAT_B5G5R5X1_UNORM 0x11A #define GEN7_SURFACEFORMAT_B5G5R5X1_UNORM_SRGB 0x11B #define GEN7_SURFACEFORMAT_R8G8_SSCALED 0x11C #define GEN7_SURFACEFORMAT_R8G8_USCALED 0x11D #define GEN7_SURFACEFORMAT_R16_SSCALED 0x11E #define GEN7_SURFACEFORMAT_R16_USCALED 0x11F #define GEN7_SURFACEFORMAT_R8_UNORM 0x140 #define GEN7_SURFACEFORMAT_R8_SNORM 0x141 #define GEN7_SURFACEFORMAT_R8_SINT 0x142 #define GEN7_SURFACEFORMAT_R8_UINT 0x143 #define GEN7_SURFACEFORMAT_A8_UNORM 0x144 #define GEN7_SURFACEFORMAT_I8_UNORM 0x145 #define GEN7_SURFACEFORMAT_L8_UNORM 0x146 #define GEN7_SURFACEFORMAT_P4A4_UNORM 0x147 #define GEN7_SURFACEFORMAT_A4P4_UNORM 0x148 #define GEN7_SURFACEFORMAT_R8_SSCALED 0x149 #define GEN7_SURFACEFORMAT_R8_USCALED 0x14A #define GEN7_SURFACEFORMAT_R1_UINT 0x181 #define GEN7_SURFACEFORMAT_YCRCB_NORMAL 0x182 #define GEN7_SURFACEFORMAT_YCRCB_SWAPUVY 0x183 #define GEN7_SURFACEFORMAT_BC1_UNORM 0x186 #define GEN7_SURFACEFORMAT_BC2_UNORM 0x187 #define GEN7_SURFACEFORMAT_BC3_UNORM 0x188 #define GEN7_SURFACEFORMAT_BC4_UNORM 0x189 #define GEN7_SURFACEFORMAT_BC5_UNORM 0x18A #define GEN7_SURFACEFORMAT_BC1_UNORM_SRGB 0x18B #define GEN7_SURFACEFORMAT_BC2_UNORM_SRGB 0x18C #define GEN7_SURFACEFORMAT_BC3_UNORM_SRGB 0x18D #define GEN7_SURFACEFORMAT_MONO8 0x18E #define GEN7_SURFACEFORMAT_YCRCB_SWAPUV 0x18F #define GEN7_SURFACEFORMAT_YCRCB_SWAPY 0x190 #define GEN7_SURFACEFORMAT_DXT1_RGB 0x191 #define GEN7_SURFACEFORMAT_FXT1 0x192 #define GEN7_SURFACEFORMAT_R8G8B8_UNORM 0x193 #define GEN7_SURFACEFORMAT_R8G8B8_SNORM 0x194 #define GEN7_SURFACEFORMAT_R8G8B8_SSCALED 0x195 #define GEN7_SURFACEFORMAT_R8G8B8_USCALED 0x196 #define GEN7_SURFACEFORMAT_R64G64B64A64_FLOAT 0x197 #define GEN7_SURFACEFORMAT_R64G64B64_FLOAT 0x198 #define GEN7_SURFACEFORMAT_BC4_SNORM 0x199 #define GEN7_SURFACEFORMAT_BC5_SNORM 0x19A #define GEN7_SURFACEFORMAT_R16G16B16_UNORM 0x19C #define GEN7_SURFACEFORMAT_R16G16B16_SNORM 0x19D #define GEN7_SURFACEFORMAT_R16G16B16_SSCALED 0x19E #define GEN7_SURFACEFORMAT_R16G16B16_USCALED 0x19F #define GEN7_SURFACERETURNFORMAT_FLOAT32 0 #define GEN7_SURFACERETURNFORMAT_S1 1 #define GEN7_SURFACE_1D 0 #define GEN7_SURFACE_2D 1 #define GEN7_SURFACE_3D 2 #define GEN7_SURFACE_CUBE 3 #define GEN7_SURFACE_BUFFER 4 #define GEN7_SURFACE_NULL 7 #define GEN7_FLOATING_POINT_IEEE_754 0 #define GEN7_FLOATING_POINT_NON_IEEE_754 1 #define GFXPIPE(Pipeline,Opcode,Subopcode) ((3 << 29) | \ ((Pipeline) << 27) | \ ((Opcode) << 24) | \ ((Subopcode) << 16)) #define GEN7_PIPELINE_SELECT GFXPIPE(1, 1, 4) # define PIPELINE_SELECT_3D (0 << 0) # define PIPELINE_SELECT_MEDIA (1 << 0) # define PIPELINE_SELECT_GPGPU (2 << 0) #define GEN7_STATE_BASE_ADDRESS GFXPIPE(0, 1, 1) # define BASE_ADDRESS_MODIFY (1 << 0) #define GEN7_MEDIA_VFE_STATE GFXPIPE(2, 0, 0) #define GEN7_MEDIA_CURBE_LOAD GFXPIPE(2, 0, 1) #define GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD GFXPIPE(2, 0, 2) #define GEN7_MEDIA_OBJECT GFXPIPE(2, 1, 0) #define GEN7_GPGPU_WALKER GFXPIPE(2, 1, 5) struct gen7_interface_descriptor_data { struct { uint32_t pad0:6; uint32_t kernel_start_pointer:26; } desc0; struct { uint32_t pad0:7; uint32_t software_exception_enable:1; uint32_t pad1:3; uint32_t maskstack_exception_enable:1; uint32_t pad2:1; uint32_t illegal_opcode_exception_enable:1; uint32_t pad3:2; uint32_t floating_point_mode:1; uint32_t thread_priority:1; uint32_t single_program_flow:1; uint32_t pad4:13; } desc1; struct { uint32_t pad0:2; uint32_t sampler_count:3; uint32_t sampler_state_pointer:27; } desc2; struct { uint32_t binding_table_entry_count:5; uint32_t binding_table_pointer:27; } desc3; struct { uint32_t constant_urb_entry_read_offset:16; uint32_t constant_urb_entry_read_length:16; } desc4; struct { uint32_t num_threads:8; uint32_t barrier_return_byte:8; uint32_t shared_local_memory_size:5; uint32_t barrier_enable:1; uint32_t rounding_mode:2; uint32_t barrier_return_grf_offset:8; } desc5; struct { uint32_t cross_thread_constant_data_read_length:8; uint32_t pad0:24; } desc6; struct { uint32_t pad0; } desc7; }; struct gen7_surface_state { struct { uint32_t cube_pos_z:1; uint32_t cube_neg_z:1; uint32_t cube_pos_y:1; uint32_t cube_neg_y:1; uint32_t cube_pos_x:1; uint32_t cube_neg_x:1; uint32_t pad2:2; uint32_t render_cache_read_write:1; uint32_t pad1:1; uint32_t surface_array_spacing:1; uint32_t vert_line_stride_ofs:1; uint32_t vert_line_stride:1; uint32_t tiled_mode:2; uint32_t horizontal_alignment:1; uint32_t vertical_alignment:2; uint32_t surface_format:9; /**< BRW_SURFACEFORMAT_x */ uint32_t pad0:1; uint32_t is_array:1; uint32_t surface_type:3; /**< BRW_SURFACE_1D/2D/3D/CUBE */ } ss0; struct { uint32_t base_addr; } ss1; struct { uint32_t width:14; uint32_t pad1:2; uint32_t height:14; uint32_t pad0:2; } ss2; struct { uint32_t pitch:18; uint32_t pad:3; uint32_t depth:11; } ss3; struct { uint32_t multisample_position_palette_index:3; uint32_t num_multisamples:3; uint32_t multisampled_surface_storage_format:1; uint32_t render_target_view_extent:11; uint32_t min_array_elt:11; uint32_t rotation:2; uint32_t pad0:1; } ss4; struct { uint32_t mip_count:4; uint32_t min_lod:4; uint32_t pad1:12; uint32_t y_offset:4; uint32_t pad0:1; uint32_t x_offset:7; } ss5; struct { uint32_t pad; /* Multisample Control Surface stuff */ } ss6; struct { uint32_t resource_min_lod:12; uint32_t pad0:4; uint32_t shader_chanel_select_a:3; uint32_t shader_chanel_select_b:3; uint32_t shader_chanel_select_g:3; uint32_t shader_chanel_select_r:3; uint32_t alpha_clear_color:1; uint32_t blue_clear_color:1; uint32_t green_clear_color:1; uint32_t red_clear_color:1; } ss7; }; #endif /* GEN7_MEDIA_H */ intel-gpu-tools-1.14/lib/media_fill_gen8.c0000644000175000017500000002162212665336131015353 00000000000000#include #include #include "media_fill.h" #include "gen8_media.h" #include "intel_reg.h" #include "drmtest.h" #include static const uint32_t media_kernel[][4] = { { 0x00400001, 0x20202288, 0x00000020, 0x00000000 }, { 0x00600001, 0x20800208, 0x008d0000, 0x00000000 }, { 0x00200001, 0x20800208, 0x00450040, 0x00000000 }, { 0x00000001, 0x20880608, 0x00000000, 0x000f000f }, { 0x00800001, 0x20a00208, 0x00000020, 0x00000000 }, { 0x00800001, 0x20e00208, 0x00000020, 0x00000000 }, { 0x00800001, 0x21200208, 0x00000020, 0x00000000 }, { 0x00800001, 0x21600208, 0x00000020, 0x00000000 }, { 0x0c800031, 0x24000a40, 0x0e000080, 0x120a8000 }, { 0x00600001, 0x2e000208, 0x008d0000, 0x00000000 }, { 0x07800031, 0x20000a40, 0x0e000e00, 0x82000010 }, }; static uint32_t batch_used(struct intel_batchbuffer *batch) { return batch->ptr - batch->buffer; } static uint32_t batch_align(struct intel_batchbuffer *batch, uint32_t align) { uint32_t offset = batch_used(batch); offset = ALIGN(offset, align); batch->ptr = batch->buffer + offset; return offset; } static void * batch_alloc(struct intel_batchbuffer *batch, uint32_t size, uint32_t align) { uint32_t offset = batch_align(batch, align); batch->ptr += size; return memset(batch->buffer + offset, 0, size); } static uint32_t batch_offset(struct intel_batchbuffer *batch, void *ptr) { return (uint8_t *)ptr - batch->buffer; } static uint32_t batch_copy(struct intel_batchbuffer *batch, const void *ptr, uint32_t size, uint32_t align) { return batch_offset(batch, memcpy(batch_alloc(batch, size, align), ptr, size)); } static void gen8_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end) { int ret; ret = drm_intel_bo_subdata(batch->bo, 0, 4096, batch->buffer); if (ret == 0) ret = drm_intel_bo_mrb_exec(batch->bo, batch_end, NULL, 0, 0, 0); igt_assert(ret == 0); } static uint32_t gen8_fill_curbe_buffer_data(struct intel_batchbuffer *batch, uint8_t color) { uint8_t *curbe_buffer; uint32_t offset; curbe_buffer = batch_alloc(batch, sizeof(uint32_t) * 8, 64); offset = batch_offset(batch, curbe_buffer); *curbe_buffer = color; return offset; } static uint32_t gen8_fill_surface_state(struct intel_batchbuffer *batch, struct igt_buf *buf, uint32_t format, int is_dst) { struct gen8_surface_state *ss; uint32_t write_domain, read_domain, offset; int ret; if (is_dst) { write_domain = read_domain = I915_GEM_DOMAIN_RENDER; } else { write_domain = 0; read_domain = I915_GEM_DOMAIN_SAMPLER; } ss = batch_alloc(batch, sizeof(*ss), 64); offset = batch_offset(batch, ss); ss->ss0.surface_type = GEN8_SURFACE_2D; ss->ss0.surface_format = format; ss->ss0.render_cache_read_write = 1; ss->ss0.vertical_alignment = 1; /* align 4 */ ss->ss0.horizontal_alignment = 1; /* align 4 */ if (buf->tiling == I915_TILING_X) ss->ss0.tiled_mode = 2; else if (buf->tiling == I915_TILING_Y) ss->ss0.tiled_mode = 3; ss->ss8.base_addr = buf->bo->offset; ret = drm_intel_bo_emit_reloc(batch->bo, batch_offset(batch, ss) + 8 * 4, buf->bo, 0, read_domain, write_domain); igt_assert(ret == 0); ss->ss2.height = igt_buf_height(buf) - 1; ss->ss2.width = igt_buf_width(buf) - 1; ss->ss3.pitch = buf->stride - 1; ss->ss7.shader_chanel_select_r = 4; ss->ss7.shader_chanel_select_g = 5; ss->ss7.shader_chanel_select_b = 6; ss->ss7.shader_chanel_select_a = 7; return offset; } static uint32_t gen8_fill_binding_table(struct intel_batchbuffer *batch, struct igt_buf *dst) { uint32_t *binding_table, offset; binding_table = batch_alloc(batch, 32, 64); offset = batch_offset(batch, binding_table); binding_table[0] = gen8_fill_surface_state(batch, dst, GEN8_SURFACEFORMAT_R8_UNORM, 1); return offset; } static uint32_t gen8_fill_media_kernel(struct intel_batchbuffer *batch, const uint32_t kernel[][4], size_t size) { uint32_t offset; offset = batch_copy(batch, kernel, size, 64); return offset; } static uint32_t gen8_fill_interface_descriptor(struct intel_batchbuffer *batch, struct igt_buf *dst) { struct gen8_interface_descriptor_data *idd; uint32_t offset; uint32_t binding_table_offset, kernel_offset; binding_table_offset = gen8_fill_binding_table(batch, dst); kernel_offset = gen8_fill_media_kernel(batch, media_kernel, sizeof(media_kernel)); idd = batch_alloc(batch, sizeof(*idd), 64); offset = batch_offset(batch, idd); idd->desc0.kernel_start_pointer = (kernel_offset >> 6); idd->desc2.single_program_flow = 1; idd->desc2.floating_point_mode = GEN8_FLOATING_POINT_IEEE_754; idd->desc3.sampler_count = 0; /* 0 samplers used */ idd->desc3.sampler_state_pointer = 0; idd->desc4.binding_table_entry_count = 0; idd->desc4.binding_table_pointer = (binding_table_offset >> 5); idd->desc5.constant_urb_entry_read_offset = 0; idd->desc5.constant_urb_entry_read_length = 1; /* grf 1 */ return offset; } static void gen8_emit_state_base_address(struct intel_batchbuffer *batch) { OUT_BATCH(GEN8_STATE_BASE_ADDRESS | (16 - 2)); /* general */ OUT_BATCH(0 | BASE_ADDRESS_MODIFY); OUT_BATCH(0); /* stateless data port */ OUT_BATCH(0 | BASE_ADDRESS_MODIFY); /* surface */ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY); /* dynamic */ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* indirect */ OUT_BATCH(0); OUT_BATCH(0); /* instruction */ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* general state buffer size */ OUT_BATCH(0xfffff000 | 1); /* dynamic state buffer size */ OUT_BATCH(1 << 12 | 1); /* indirect object buffer size */ OUT_BATCH(0xfffff000 | 1); /* intruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */ OUT_BATCH(1 << 12 | 1); } static void gen8_emit_vfe_state(struct intel_batchbuffer *batch) { OUT_BATCH(GEN8_MEDIA_VFE_STATE | (9 - 2)); /* scratch buffer */ OUT_BATCH(0); OUT_BATCH(0); /* number of threads & urb entries */ OUT_BATCH(1 << 16 | 2 << 8); OUT_BATCH(0); /* urb entry size & curbe size */ OUT_BATCH(2 << 16 | 2); /* scoreboard */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } static void gen8_emit_curbe_load(struct intel_batchbuffer *batch, uint32_t curbe_buffer) { OUT_BATCH(GEN8_MEDIA_CURBE_LOAD | (4 - 2)); OUT_BATCH(0); /* curbe total data length */ OUT_BATCH(64); /* curbe data start address, is relative to the dynamics base address */ OUT_BATCH(curbe_buffer); } static void gen8_emit_interface_descriptor_load(struct intel_batchbuffer *batch, uint32_t interface_descriptor) { OUT_BATCH(GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD | (4 - 2)); OUT_BATCH(0); /* interface descriptor data length */ OUT_BATCH(sizeof(struct gen8_interface_descriptor_data)); /* interface descriptor address, is relative to the dynamics base address */ OUT_BATCH(interface_descriptor); } static void gen8_emit_media_state_flush(struct intel_batchbuffer *batch) { OUT_BATCH(GEN8_MEDIA_STATE_FLUSH | (2 - 2)); OUT_BATCH(0); } static void gen8_emit_media_objects(struct intel_batchbuffer *batch, unsigned x, unsigned y, unsigned width, unsigned height) { int i, j; for (i = 0; i < width / 16; i++) { for (j = 0; j < height / 16; j++) { OUT_BATCH(GEN8_MEDIA_OBJECT | (8 - 2)); /* interface descriptor offset */ OUT_BATCH(0); /* without indirect data */ OUT_BATCH(0); OUT_BATCH(0); /* scoreboard */ OUT_BATCH(0); OUT_BATCH(0); /* inline data (xoffset, yoffset) */ OUT_BATCH(x + i * 16); OUT_BATCH(y + j * 16); gen8_emit_media_state_flush(batch); } } } /* * This sets up the media pipeline, * * +---------------+ <---- 4096 * | ^ | * | | | * | various | * | state | * | | | * |_______|_______| <---- 2048 + ? * | ^ | * | | | * | batch | * | commands | * | | | * | | | * +---------------+ <---- 0 + ? * */ #define BATCH_STATE_SPLIT 2048 void gen8_media_fillfunc(struct intel_batchbuffer *batch, struct igt_buf *dst, unsigned x, unsigned y, unsigned width, unsigned height, uint8_t color) { uint32_t curbe_buffer, interface_descriptor; uint32_t batch_end; intel_batchbuffer_flush(batch); /* setup states */ batch->ptr = &batch->buffer[BATCH_STATE_SPLIT]; curbe_buffer = gen8_fill_curbe_buffer_data(batch, color); interface_descriptor = gen8_fill_interface_descriptor(batch, dst); igt_assert(batch->ptr < &batch->buffer[4095]); /* media pipeline */ batch->ptr = batch->buffer; OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA); gen8_emit_state_base_address(batch); gen8_emit_vfe_state(batch); gen8_emit_curbe_load(batch, curbe_buffer); gen8_emit_interface_descriptor_load(batch, interface_descriptor); gen8_emit_media_objects(batch, x, y, width, height); OUT_BATCH(MI_BATCH_BUFFER_END); batch_end = batch_align(batch, 8); igt_assert(batch_end < BATCH_STATE_SPLIT); gen8_render_flush(batch, batch_end); intel_batchbuffer_reset(batch); } intel-gpu-tools-1.14/lib/igt_vc4.c0000644000175000017500000000676012665336131013712 00000000000000/* * Copyright © 2016 Broadcom * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ #include #include #include #include #include #include #include #include #include #include "drmtest.h" #include "igt_aux.h" #include "igt_core.h" #include "igt_vc4.h" #include "ioctl_wrappers.h" #include "intel_reg.h" #include "intel_chipset.h" #include "vc4_drm.h" #include "vc4_packet.h" #if NEW_CONTEXT_PARAM_NO_ERROR_CAPTURE_API #define LOCAL_CONTEXT_PARAM_NO_ERROR_CAPTURE 0x4 #endif /** * SECTION:igt_vc4 * @short_description: VC4 support library * @title: VC4 * @include: igt.h * * This library provides various auxiliary helper functions for writing VC4 * tests. */ /** * igt_vc4_get_cleared_bo: * @size: size of the BO in bytes * @clearval: u32 value that the buffer should be completely cleared with * * This helper returns a new BO with the given size, which has just been * cleared using the render engine. */ uint32_t igt_vc4_get_cleared_bo(int fd, size_t size, uint32_t clearval) { /* A single row will be a page. */ uint32_t width = 1024; uint32_t height = size / (width * 4); uint32_t handle = igt_vc4_create_bo(fd, size); struct drm_vc4_submit_cl submit = { .color_write = { .hindex = 0, .bits = VC4_SET_FIELD(VC4_RENDER_CONFIG_FORMAT_RGBA8888, VC4_RENDER_CONFIG_FORMAT), }, .color_read = { .hindex = ~0 }, .zs_read = { .hindex = ~0 }, .zs_write = { .hindex = ~0 }, .msaa_color_write = { .hindex = ~0 }, .msaa_zs_write = { .hindex = ~0 }, .bo_handles = (uint64_t)(uintptr_t)&handle, .bo_handle_count = 1, .width = width, .height = height, .max_x_tile = ALIGN(width, 64) / 64 - 1, .max_y_tile = ALIGN(height, 64) / 64 - 1, .clear_color = { clearval, clearval }, .flags = VC4_SUBMIT_CL_USE_CLEAR_COLOR, }; igt_assert_eq_u32(width * height * 4, size); do_ioctl(fd, DRM_IOCTL_VC4_SUBMIT_CL, &submit); return handle; } int igt_vc4_create_bo(int fd, size_t size) { struct drm_vc4_create_bo create = { .size = size, }; do_ioctl(fd, DRM_IOCTL_VC4_CREATE_BO, &create); return create.handle; } void * igt_vc4_mmap_bo(int fd, uint32_t handle, uint32_t size, unsigned prot) { struct drm_vc4_mmap_bo mmap_bo = { .handle = handle, }; void *ptr; do_ioctl(fd, DRM_IOCTL_VC4_MMAP_BO, &mmap_bo); ptr = mmap(0, size, prot, MAP_SHARED, fd, mmap_bo.offset); if (ptr == MAP_FAILED) return NULL; else return ptr; } intel-gpu-tools-1.14/lib/i915_reg.h0000644000175000017500000007762612665336131013715 00000000000000/************************************************************************** * * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * **************************************************************************/ #ifndef _I915_REG_H_ #define _I915_REG_H_ #define I915_SET_FIELD( var, mask, value ) (var &= ~(mask), var |= value) #define CMD_3D (0x3<<29) #define PRIM3D (CMD_3D | (0x1f<<24)) #define PRIM3D_INDIRECT_SEQUENTIAL ((1<<23) | (0<<17)) #define PRIM3D_TRILIST (PRIM3D | (0x0<<18)) #define PRIM3D_TRISTRIP (PRIM3D | (0x1<<18)) #define PRIM3D_TRISTRIP_RVRSE (PRIM3D | (0x2<<18)) #define PRIM3D_TRIFAN (PRIM3D | (0x3<<18)) #define PRIM3D_POLY (PRIM3D | (0x4<<18)) #define PRIM3D_LINELIST (PRIM3D | (0x5<<18)) #define PRIM3D_LINESTRIP (PRIM3D | (0x6<<18)) #define PRIM3D_RECTLIST (PRIM3D | (0x7<<18)) #define PRIM3D_POINTLIST (PRIM3D | (0x8<<18)) #define PRIM3D_DIB (PRIM3D | (0x9<<18)) #define PRIM3D_CLEAR_RECT (PRIM3D | (0xa<<18)) #define PRIM3D_ZONE_INIT (PRIM3D | (0xd<<18)) #define PRIM3D_MASK (0x1f<<18) /* p137 */ #define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24)) #define AA_LINE_ECAAR_WIDTH_ENABLE (1<<16) #define AA_LINE_ECAAR_WIDTH_0_5 0 #define AA_LINE_ECAAR_WIDTH_1_0 (1<<14) #define AA_LINE_ECAAR_WIDTH_2_0 (2<<14) #define AA_LINE_ECAAR_WIDTH_4_0 (3<<14) #define AA_LINE_REGION_WIDTH_ENABLE (1<<8) #define AA_LINE_REGION_WIDTH_0_5 0 #define AA_LINE_REGION_WIDTH_1_0 (1<<6) #define AA_LINE_REGION_WIDTH_2_0 (2<<6) #define AA_LINE_REGION_WIDTH_4_0 (3<<6) /* 3DSTATE_BACKFACE_STENCIL_OPS, p138*/ #define _3DSTATE_BACKFACE_STENCIL_OPS (CMD_3D | (0x8<<24)) #define BFO_ENABLE_STENCIL_REF (1<<23) #define BFO_STENCIL_REF_SHIFT 15 #define BFO_STENCIL_REF_MASK (0xff<<15) #define BFO_ENABLE_STENCIL_FUNCS (1<<14) #define BFO_STENCIL_TEST_SHIFT 11 #define BFO_STENCIL_TEST_MASK (0x7<<11) #define BFO_STENCIL_FAIL_SHIFT 8 #define BFO_STENCIL_FAIL_MASK (0x7<<8) #define BFO_STENCIL_PASS_Z_FAIL_SHIFT 5 #define BFO_STENCIL_PASS_Z_FAIL_MASK (0x7<<5) #define BFO_STENCIL_PASS_Z_PASS_SHIFT 2 #define BFO_STENCIL_PASS_Z_PASS_MASK (0x7<<2) #define BFO_ENABLE_STENCIL_TWO_SIDE (1<<1) #define BFO_STENCIL_TWO_SIDE (1<<0) /* 3DSTATE_BACKFACE_STENCIL_MASKS, p140 */ #define _3DSTATE_BACKFACE_STENCIL_MASKS (CMD_3D | (0x9<<24)) #define BFM_ENABLE_STENCIL_TEST_MASK (1<<17) #define BFM_ENABLE_STENCIL_WRITE_MASK (1<<16) #define BFM_STENCIL_TEST_MASK_SHIFT 8 #define BFM_STENCIL_TEST_MASK_MASK (0xff<<8) #define BFM_STENCIL_WRITE_MASK_SHIFT 0 #define BFM_STENCIL_WRITE_MASK_MASK (0xff<<0) /* 3DSTATE_BIN_CONTROL p141 */ /* p143 */ #define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1) /* Dword 1 */ #define BUF_3D_ID_COLOR_BACK (0x3<<24) #define BUF_3D_ID_DEPTH (0x7<<24) #define BUF_3D_USE_FENCE (1<<23) #define BUF_3D_TILED_SURFACE (1<<22) #define BUF_3D_TILE_WALK_X 0 #define BUF_3D_TILE_WALK_Y (1<<21) #define BUF_3D_PITCH(x) (((x)/4)<<2) /* Dword 2 */ #define BUF_3D_ADDR(x) ((x) & ~0x3) /* 3DSTATE_CHROMA_KEY */ /* 3DSTATE_CLEAR_PARAMETERS, p150 */ #define _3DSTATE_CLEAR_PARAMETERS (CMD_3D | (0x1d<<24) | (0x9c<<16) | 5) /* Dword 1 */ #define CLEARPARAM_CLEAR_RECT (1 << 16) #define CLEARPARAM_ZONE_INIT (0 << 16) #define CLEARPARAM_WRITE_COLOR (1 << 2) #define CLEARPARAM_WRITE_DEPTH (1 << 1) #define CLEARPARAM_WRITE_STENCIL (1 << 0) /* 3DSTATE_CONSTANT_BLEND_COLOR, p153 */ #define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16)) /* 3DSTATE_COORD_SET_BINDINGS, p154 */ #define _3DSTATE_COORD_SET_BINDINGS (CMD_3D | (0x16<<24)) #define CSB_TCB(iunit, eunit) ((eunit)<<(iunit*3)) /* p156 */ #define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (0x1d<<24) | (0x99<<16)) /* p157 */ #define _3DSTATE_DFLT_SPEC_CMD (CMD_3D | (0x1d<<24) | (0x9a<<16)) /* p158 */ #define _3DSTATE_DFLT_Z_CMD (CMD_3D | (0x1d<<24) | (0x98<<16)) /* 3DSTATE_DEPTH_OFFSET_SCALE, p159 */ #define _3DSTATE_DEPTH_OFFSET_SCALE (CMD_3D | (0x1d<<24) | (0x97<<16)) /* scale in dword 1 */ /* The depth subrectangle is not supported, but must be disabled. */ /* 3DSTATE_DEPTH_SUBRECT_DISABLE, p160 */ #define _3DSTATE_DEPTH_SUBRECT_DISABLE (CMD_3D | (0x1c<<24) | (0x11<<19) | (1 << 1) | (0 << 0)) /* p161 */ #define _3DSTATE_DST_BUF_VARS_CMD (CMD_3D | (0x1d<<24) | (0x85<<16)) /* Dword 1 */ #define TEX_DEFAULT_COLOR_OGL (0<<30) #define TEX_DEFAULT_COLOR_D3D (1<<30) #define ZR_EARLY_DEPTH (1<<29) #define LOD_PRECLAMP_OGL (1<<28) #define LOD_PRECLAMP_D3D (0<<28) #define DITHER_FULL_ALWAYS (0<<26) #define DITHER_FULL_ON_FB_BLEND (1<<26) #define DITHER_CLAMPED_ALWAYS (2<<26) #define LINEAR_GAMMA_BLEND_32BPP (1<<25) #define DEBUG_DISABLE_ENH_DITHER (1<<24) #define DSTORG_HORT_BIAS(x) ((x)<<20) #define DSTORG_VERT_BIAS(x) ((x)<<16) #define COLOR_4_2_2_CHNL_WRT_ALL 0 #define COLOR_4_2_2_CHNL_WRT_Y (1<<12) #define COLOR_4_2_2_CHNL_WRT_CR (2<<12) #define COLOR_4_2_2_CHNL_WRT_CB (3<<12) #define COLOR_4_2_2_CHNL_WRT_CRCB (4<<12) #define COLR_BUF_8BIT 0 #define COLR_BUF_RGB555 (1<<8) #define COLR_BUF_RGB565 (2<<8) #define COLR_BUF_ARGB8888 (3<<8) #define COLR_BUF_ARGB4444 (8<<8) #define COLR_BUF_ARGB1555 (9<<8) #define COLR_BUF_ARGB2AAA (0xa<<8) #define DEPTH_FRMT_16_FIXED 0 #define DEPTH_FRMT_16_FLOAT (1<<2) #define DEPTH_FRMT_24_FIXED_8_OTHER (2<<2) #define VERT_LINE_STRIDE_1 (1<<1) #define VERT_LINE_STRIDE_0 (0<<1) #define VERT_LINE_STRIDE_OFS_1 1 #define VERT_LINE_STRIDE_OFS_0 0 /* p166 */ #define _3DSTATE_DRAW_RECT_CMD (CMD_3D|(0x1d<<24)|(0x80<<16)|3) /* Dword 1 */ #define DRAW_RECT_DIS_DEPTH_OFS (1<<30) #define DRAW_DITHER_OFS_X(x) ((x)<<26) #define DRAW_DITHER_OFS_Y(x) ((x)<<24) /* Dword 2 */ #define DRAW_YMIN(x) ((x)<<16) #define DRAW_XMIN(x) (x) /* Dword 3 */ #define DRAW_YMAX(x) ((x)<<16) #define DRAW_XMAX(x) (x) /* Dword 4 */ #define DRAW_YORG(x) ((x)<<16) #define DRAW_XORG(x) (x) /* 3DSTATE_FILTER_COEFFICIENTS_4X4, p170 */ /* 3DSTATE_FILTER_COEFFICIENTS_6X5, p172 */ /* _3DSTATE_FOG_COLOR, p173 */ #define _3DSTATE_FOG_COLOR_CMD (CMD_3D|(0x15<<24)) #define FOG_COLOR_RED(x) ((x)<<16) #define FOG_COLOR_GREEN(x) ((x)<<8) #define FOG_COLOR_BLUE(x) (x) /* _3DSTATE_FOG_MODE, p174 */ #define _3DSTATE_FOG_MODE_CMD (CMD_3D|(0x1d<<24)|(0x89<<16)|2) /* Dword 1 */ #define FMC1_FOGFUNC_MODIFY_ENABLE (1<<31) #define FMC1_FOGFUNC_VERTEX (0<<28) #define FMC1_FOGFUNC_PIXEL_EXP (1<<28) #define FMC1_FOGFUNC_PIXEL_EXP2 (2<<28) #define FMC1_FOGFUNC_PIXEL_LINEAR (3<<28) #define FMC1_FOGFUNC_MASK (3<<28) #define FMC1_FOGINDEX_MODIFY_ENABLE (1<<27) #define FMC1_FOGINDEX_Z (0<<25) #define FMC1_FOGINDEX_W (1<<25) #define FMC1_C1_C2_MODIFY_ENABLE (1<<24) #define FMC1_DENSITY_MODIFY_ENABLE (1<<23) #define FMC1_C1_ONE (1<<13) #define FMC1_C1_MASK (0xffff<<4) /* Dword 2 */ #define FMC2_C2_ONE (1<<16) /* Dword 3 */ #define FMC3_D_ONE (1<<16) /* _3DSTATE_INDEPENDENT_ALPHA_BLEND, p177 */ #define _3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD (CMD_3D|(0x0b<<24)) #define IAB_MODIFY_ENABLE (1<<23) #define IAB_ENABLE (1<<22) #define IAB_MODIFY_FUNC (1<<21) #define IAB_FUNC_SHIFT 16 #define IAB_MODIFY_SRC_FACTOR (1<<11) #define IAB_SRC_FACTOR_SHIFT 6 #define IAB_SRC_FACTOR_MASK (BLENDFACT_MASK<<6) #define IAB_MODIFY_DST_FACTOR (1<<5) #define IAB_DST_FACTOR_SHIFT 0 #define IAB_DST_FACTOR_MASK (BLENDFACT_MASK<<0) #define BLENDFACT_ZERO 0x01 #define BLENDFACT_ONE 0x02 #define BLENDFACT_SRC_COLR 0x03 #define BLENDFACT_INV_SRC_COLR 0x04 #define BLENDFACT_SRC_ALPHA 0x05 #define BLENDFACT_INV_SRC_ALPHA 0x06 #define BLENDFACT_DST_ALPHA 0x07 #define BLENDFACT_INV_DST_ALPHA 0x08 #define BLENDFACT_DST_COLR 0x09 #define BLENDFACT_INV_DST_COLR 0x0a #define BLENDFACT_SRC_ALPHA_SATURATE 0x0b #define BLENDFACT_CONST_COLOR 0x0c #define BLENDFACT_INV_CONST_COLOR 0x0d #define BLENDFACT_CONST_ALPHA 0x0e #define BLENDFACT_INV_CONST_ALPHA 0x0f #define BLENDFACT_MASK 0x0f #define BLENDFUNC_ADD 0x0 #define BLENDFUNC_SUBTRACT 0x1 #define BLENDFUNC_REVERSE_SUBTRACT 0x2 #define BLENDFUNC_MIN 0x3 #define BLENDFUNC_MAX 0x4 #define BLENDFUNC_MASK 0x7 /* 3DSTATE_LOAD_INDIRECT, p180 */ #define _3DSTATE_LOAD_INDIRECT (CMD_3D|(0x1d<<24)|(0x7<<16)) #define LI0_STATE_STATIC_INDIRECT (0x01<<8) #define LI0_STATE_DYNAMIC_INDIRECT (0x02<<8) #define LI0_STATE_SAMPLER (0x04<<8) #define LI0_STATE_MAP (0x08<<8) #define LI0_STATE_PROGRAM (0x10<<8) #define LI0_STATE_CONSTANTS (0x20<<8) #define SIS0_BUFFER_ADDRESS(x) ((x)&~0x3) #define SIS0_FORCE_LOAD (1<<1) #define SIS0_BUFFER_VALID (1<<0) #define SIS1_BUFFER_LENGTH(x) ((x)&0xff) #define DIS0_BUFFER_ADDRESS(x) ((x)&~0x3) #define DIS0_BUFFER_RESET (1<<1) #define DIS0_BUFFER_VALID (1<<0) #define SSB0_BUFFER_ADDRESS(x) ((x)&~0x3) #define SSB0_FORCE_LOAD (1<<1) #define SSB0_BUFFER_VALID (1<<0) #define SSB1_BUFFER_LENGTH(x) ((x)&0xff) #define MSB0_BUFFER_ADDRESS(x) ((x)&~0x3) #define MSB0_FORCE_LOAD (1<<1) #define MSB0_BUFFER_VALID (1<<0) #define MSB1_BUFFER_LENGTH(x) ((x)&0xff) #define PSP0_BUFFER_ADDRESS(x) ((x)&~0x3) #define PSP0_FORCE_LOAD (1<<1) #define PSP0_BUFFER_VALID (1<<0) #define PSP1_BUFFER_LENGTH(x) ((x)&0xff) #define PSC0_BUFFER_ADDRESS(x) ((x)&~0x3) #define PSC0_FORCE_LOAD (1<<1) #define PSC0_BUFFER_VALID (1<<0) #define PSC1_BUFFER_LENGTH(x) ((x)&0xff) /* _3DSTATE_RASTERIZATION_RULES */ #define _3DSTATE_RASTER_RULES_CMD (CMD_3D|(0x07<<24)) #define ENABLE_POINT_RASTER_RULE (1<<15) #define OGL_POINT_RASTER_RULE (1<<13) #define ENABLE_TEXKILL_3D_4D (1<<10) #define TEXKILL_3D (0<<9) #define TEXKILL_4D (1<<9) #define ENABLE_LINE_STRIP_PROVOKE_VRTX (1<<8) #define ENABLE_TRI_FAN_PROVOKE_VRTX (1<<5) #define LINE_STRIP_PROVOKE_VRTX(x) ((x)<<6) #define TRI_FAN_PROVOKE_VRTX(x) ((x)<<3) /* _3DSTATE_SCISSOR_ENABLE, p256 */ #define _3DSTATE_SCISSOR_ENABLE_CMD (CMD_3D|(0x1c<<24)|(0x10<<19)) #define ENABLE_SCISSOR_RECT ((1<<1) | 1) #define DISABLE_SCISSOR_RECT (1<<1) /* _3DSTATE_SCISSOR_RECTANGLE_0, p257 */ #define _3DSTATE_SCISSOR_RECT_0_CMD (CMD_3D|(0x1d<<24)|(0x81<<16)|1) /* Dword 1 */ #define SCISSOR_RECT_0_YMIN(x) ((x)<<16) #define SCISSOR_RECT_0_XMIN(x) (x) /* Dword 2 */ #define SCISSOR_RECT_0_YMAX(x) ((x)<<16) #define SCISSOR_RECT_0_XMAX(x) (x) /* p189 */ #define _3DSTATE_LOAD_STATE_IMMEDIATE_1 ((0x3<<29)|(0x1d<<24)|(0x04<<16)) #define I1_LOAD_S(n) (1<<(4+n)) #define S0_VB_OFFSET_MASK 0xffffffc #define S0_AUTO_CACHE_INV_DISABLE (1<<0) #define S1_VERTEX_WIDTH_SHIFT 24 #define S1_VERTEX_WIDTH_MASK (0x3f<<24) #define S1_VERTEX_PITCH_SHIFT 16 #define S1_VERTEX_PITCH_MASK (0x3f<<16) #define TEXCOORDFMT_2D 0x0 #define TEXCOORDFMT_3D 0x1 #define TEXCOORDFMT_4D 0x2 #define TEXCOORDFMT_1D 0x3 #define TEXCOORDFMT_2D_16 0x4 #define TEXCOORDFMT_4D_16 0x5 #define TEXCOORDFMT_NOT_PRESENT 0xf #define S2_TEXCOORD_FMT0_MASK 0xf #define S2_TEXCOORD_FMT1_SHIFT 4 #define S2_TEXCOORD_FMT(unit, type) ((type)<<(unit*4)) #define S2_TEXCOORD_NONE (~0) #define TEXCOORD_WRAP_SHORTEST_TCX 8 #define TEXCOORD_WRAP_SHORTEST_TCY 4 #define TEXCOORD_WRAP_SHORTEST_TCZ 2 #define TEXCOORD_PERSPECTIVE_DISABLE 1 #define S3_WRAP_SHORTEST_TCX(unit) (TEXCOORD_WRAP_SHORTEST_TCX << ((unit) * 4)) #define S3_WRAP_SHORTEST_TCY(unit) (TEXCOORD_WRAP_SHORTEST_TCY << ((unit) * 4)) #define S3_WRAP_SHORTEST_TCZ(unit) (TEXCOORD_WRAP_SHORTEST_TCZ << ((unit) * 4)) #define S3_PERSPECTIVE_DISABLE(unit) (TEXCOORD_PERSPECTIVE_DISABLE << ((unit) * 4)) /* S3 not interesting */ #define S4_POINT_WIDTH_SHIFT 23 #define S4_POINT_WIDTH_MASK (0x1ff<<23) #define S4_LINE_WIDTH_SHIFT 19 #define S4_LINE_WIDTH_ONE (0x2<<19) #define S4_LINE_WIDTH_MASK (0xf<<19) #define S4_FLATSHADE_ALPHA (1<<18) #define S4_FLATSHADE_FOG (1<<17) #define S4_FLATSHADE_SPECULAR (1<<16) #define S4_FLATSHADE_COLOR (1<<15) #define S4_CULLMODE_BOTH (0<<13) #define S4_CULLMODE_NONE (1<<13) #define S4_CULLMODE_CW (2<<13) #define S4_CULLMODE_CCW (3<<13) #define S4_CULLMODE_MASK (3<<13) #define S4_VFMT_POINT_WIDTH (1<<12) #define S4_VFMT_SPEC_FOG (1<<11) #define S4_VFMT_COLOR (1<<10) #define S4_VFMT_DEPTH_OFFSET (1<<9) #define S4_VFMT_XYZ (1<<6) #define S4_VFMT_XYZW (2<<6) #define S4_VFMT_XY (3<<6) #define S4_VFMT_XYW (4<<6) #define S4_VFMT_XYZW_MASK (7<<6) #define S4_FORCE_DEFAULT_DIFFUSE (1<<5) #define S4_FORCE_DEFAULT_SPECULAR (1<<4) #define S4_LOCAL_DEPTH_OFFSET_ENABLE (1<<3) #define S4_VFMT_FOG_PARAM (1<<2) #define S4_SPRITE_POINT_ENABLE (1<<1) #define S4_LINE_ANTIALIAS_ENABLE (1<<0) #define S4_VFMT_MASK (S4_VFMT_POINT_WIDTH | \ S4_VFMT_SPEC_FOG | \ S4_VFMT_COLOR | \ S4_VFMT_DEPTH_OFFSET | \ S4_VFMT_XYZW_MASK | \ S4_VFMT_FOG_PARAM) #define S5_WRITEDISABLE_ALPHA (1<<31) #define S5_WRITEDISABLE_RED (1<<30) #define S5_WRITEDISABLE_GREEN (1<<29) #define S5_WRITEDISABLE_BLUE (1<<28) #define S5_WRITEDISABLE_MASK (0xf<<28) #define S5_FORCE_DEFAULT_POINT_SIZE (1<<27) #define S5_LAST_PIXEL_ENABLE (1<<26) #define S5_GLOBAL_DEPTH_OFFSET_ENABLE (1<<25) #define S5_FOG_ENABLE (1<<24) #define S5_STENCIL_REF_SHIFT 16 #define S5_STENCIL_REF_MASK (0xff<<16) #define S5_STENCIL_TEST_FUNC_SHIFT 13 #define S5_STENCIL_TEST_FUNC_MASK (0x7<<13) #define S5_STENCIL_FAIL_SHIFT 10 #define S5_STENCIL_FAIL_MASK (0x7<<10) #define S5_STENCIL_PASS_Z_FAIL_SHIFT 7 #define S5_STENCIL_PASS_Z_FAIL_MASK (0x7<<7) #define S5_STENCIL_PASS_Z_PASS_SHIFT 4 #define S5_STENCIL_PASS_Z_PASS_MASK (0x7<<4) #define S5_STENCIL_WRITE_ENABLE (1<<3) #define S5_STENCIL_TEST_ENABLE (1<<2) #define S5_COLOR_DITHER_ENABLE (1<<1) #define S5_LOGICOP_ENABLE (1<<0) #define S6_ALPHA_TEST_ENABLE (1<<31) #define S6_ALPHA_TEST_FUNC_SHIFT 28 #define S6_ALPHA_TEST_FUNC_MASK (0x7<<28) #define S6_ALPHA_REF_SHIFT 20 #define S6_ALPHA_REF_MASK (0xff<<20) #define S6_DEPTH_TEST_ENABLE (1<<19) #define S6_DEPTH_TEST_FUNC_SHIFT 16 #define S6_DEPTH_TEST_FUNC_MASK (0x7<<16) #define S6_CBUF_BLEND_ENABLE (1<<15) #define S6_CBUF_BLEND_FUNC_SHIFT 12 #define S6_CBUF_BLEND_FUNC_MASK (0x7<<12) #define S6_CBUF_SRC_BLEND_FACT_SHIFT 8 #define S6_CBUF_SRC_BLEND_FACT_MASK (0xf<<8) #define S6_CBUF_DST_BLEND_FACT_SHIFT 4 #define S6_CBUF_DST_BLEND_FACT_MASK (0xf<<4) #define S6_DEPTH_WRITE_ENABLE (1<<3) #define S6_COLOR_WRITE_ENABLE (1<<2) #define S6_TRISTRIP_PV_SHIFT 0 #define S6_TRISTRIP_PV_MASK (0x3<<0) #define S7_DEPTH_OFFSET_CONST_MASK ~0 /* 3DSTATE_MAP_DEINTERLACER_PARAMETERS */ /* 3DSTATE_MAP_PALETTE_LOAD_32, p206 */ /* _3DSTATE_MODES_4, p218 */ #define _3DSTATE_MODES_4_CMD (CMD_3D|(0x0d<<24)) #define ENABLE_LOGIC_OP_FUNC (1<<23) #define LOGIC_OP_FUNC(x) ((x)<<18) #define LOGICOP_MASK (0xf<<18) #define LOGICOP_COPY 0xc #define MODE4_ENABLE_STENCIL_TEST_MASK ((1<<17)|(0xff00)) #define ENABLE_STENCIL_TEST_MASK (1<<17) #define STENCIL_TEST_MASK(x) ((x)<<8) #define MODE4_ENABLE_STENCIL_WRITE_MASK ((1<<16)|(0x00ff)) #define ENABLE_STENCIL_WRITE_MASK (1<<16) #define STENCIL_WRITE_MASK(x) ((x)&0xff) /* _3DSTATE_MODES_5, p220 */ #define _3DSTATE_MODES_5_CMD (CMD_3D|(0x0c<<24)) #define PIPELINE_FLUSH_RENDER_CACHE (1<<18) #define PIPELINE_FLUSH_TEXTURE_CACHE (1<<16) /* p221 */ #define _3DSTATE_PIXEL_SHADER_CONSTANTS (CMD_3D|(0x1d<<24)|(0x6<<16)) #define PS1_REG(n) (1<<(n)) #define PS2_CONST_X(n) (n) #define PS3_CONST_Y(n) (n) #define PS4_CONST_Z(n) (n) #define PS5_CONST_W(n) (n) /* p222 */ #define I915_MAX_TEX_INDIRECT 4 #define I915_MAX_TEX_INSN 32 #define I915_MAX_ALU_INSN 64 #define I915_MAX_DECL_INSN 27 #define I915_MAX_TEMPORARY 16 /* Each instruction is 3 dwords long, though most don't require all * this space. Maximum of 123 instructions. Smaller maxes per insn * type. */ #define _3DSTATE_PIXEL_SHADER_PROGRAM (CMD_3D|(0x1d<<24)|(0x5<<16)) #define REG_TYPE_R 0 /* temporary regs, no need to * dcl, must be written before * read -- Preserved between * phases. */ #define REG_TYPE_T 1 /* Interpolated values, must be * dcl'ed before use. * * 0..7: texture coord, * 8: diffuse spec, * 9: specular color, * 10: fog parameter in w. */ #define REG_TYPE_CONST 2 /* Restriction: only one const * can be referenced per * instruction, though it may be * selected for multiple inputs. * Constants not initialized * default to zero. */ #define REG_TYPE_S 3 /* sampler */ #define REG_TYPE_OC 4 /* output color (rgba) */ #define REG_TYPE_OD 5 /* output depth (w), xyz are * temporaries. If not written, * interpolated depth is used? */ #define REG_TYPE_U 6 /* unpreserved temporaries */ #define REG_TYPE_MASK 0x7 #define REG_NR_MASK 0xf /* REG_TYPE_T: */ #define T_TEX0 0 #define T_TEX1 1 #define T_TEX2 2 #define T_TEX3 3 #define T_TEX4 4 #define T_TEX5 5 #define T_TEX6 6 #define T_TEX7 7 #define T_DIFFUSE 8 #define T_SPECULAR 9 #define T_FOG_W 10 /* interpolated fog is in W coord */ /* Arithmetic instructions */ /* .replicate_swizzle == selection and replication of a particular * scalar channel, ie., .xxxx, .yyyy, .zzzz or .wwww */ #define A0_NOP (0x0<<24) /* no operation */ #define A0_ADD (0x1<<24) /* dst = src0 + src1 */ #define A0_MOV (0x2<<24) /* dst = src0 */ #define A0_MUL (0x3<<24) /* dst = src0 * src1 */ #define A0_MAD (0x4<<24) /* dst = src0 * src1 + src2 */ #define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */ #define A0_DP3 (0x6<<24) /* dst.xyzw = src0.xyz dot src1.xyz */ #define A0_DP4 (0x7<<24) /* dst.xyzw = src0.xyzw dot src1.xyzw */ #define A0_FRC (0x8<<24) /* dst = src0 - floor(src0) */ #define A0_RCP (0x9<<24) /* dst.xyzw = 1/(src0.replicate_swizzle) */ #define A0_RSQ (0xa<<24) /* dst.xyzw = 1/(sqrt(abs(src0.replicate_swizzle))) */ #define A0_EXP (0xb<<24) /* dst.xyzw = exp2(src0.replicate_swizzle) */ #define A0_LOG (0xc<<24) /* dst.xyzw = log2(abs(src0.replicate_swizzle)) */ #define A0_CMP (0xd<<24) /* dst = (src0 >= 0.0) ? src1 : src2 */ #define A0_MIN (0xe<<24) /* dst = (src0 < src1) ? src0 : src1 */ #define A0_MAX (0xf<<24) /* dst = (src0 >= src1) ? src0 : src1 */ #define A0_FLR (0x10<<24) /* dst = floor(src0) */ #define A0_MOD (0x11<<24) /* dst = src0 fmod 1.0 */ #define A0_TRC (0x12<<24) /* dst = int(src0) */ #define A0_SGE (0x13<<24) /* dst = src0 >= src1 ? 1.0 : 0.0 */ #define A0_SLT (0x14<<24) /* dst = src0 < src1 ? 1.0 : 0.0 */ #define A0_DEST_SATURATE (1<<22) #define A0_DEST_TYPE_SHIFT 19 /* Allow: R, OC, OD, U */ #define A0_DEST_NR_SHIFT 14 /* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */ #define A0_DEST_CHANNEL_X (1<<10) #define A0_DEST_CHANNEL_Y (2<<10) #define A0_DEST_CHANNEL_Z (4<<10) #define A0_DEST_CHANNEL_W (8<<10) #define A0_DEST_CHANNEL_ALL (0xf<<10) #define A0_DEST_CHANNEL_SHIFT 10 #define A0_SRC0_TYPE_SHIFT 7 #define A0_SRC0_NR_SHIFT 2 #define A0_DEST_CHANNEL_XY (A0_DEST_CHANNEL_X|A0_DEST_CHANNEL_Y) #define A0_DEST_CHANNEL_XYZ (A0_DEST_CHANNEL_XY|A0_DEST_CHANNEL_Z) #define SRC_X 0 #define SRC_Y 1 #define SRC_Z 2 #define SRC_W 3 #define SRC_ZERO 4 #define SRC_ONE 5 #define A1_SRC0_CHANNEL_X_NEGATE (1<<31) #define A1_SRC0_CHANNEL_X_SHIFT 28 #define A1_SRC0_CHANNEL_Y_NEGATE (1<<27) #define A1_SRC0_CHANNEL_Y_SHIFT 24 #define A1_SRC0_CHANNEL_Z_NEGATE (1<<23) #define A1_SRC0_CHANNEL_Z_SHIFT 20 #define A1_SRC0_CHANNEL_W_NEGATE (1<<19) #define A1_SRC0_CHANNEL_W_SHIFT 16 #define A1_SRC1_TYPE_SHIFT 13 #define A1_SRC1_NR_SHIFT 8 #define A1_SRC1_CHANNEL_X_NEGATE (1<<7) #define A1_SRC1_CHANNEL_X_SHIFT 4 #define A1_SRC1_CHANNEL_Y_NEGATE (1<<3) #define A1_SRC1_CHANNEL_Y_SHIFT 0 #define A2_SRC1_CHANNEL_Z_NEGATE (1<<31) #define A2_SRC1_CHANNEL_Z_SHIFT 28 #define A2_SRC1_CHANNEL_W_NEGATE (1<<27) #define A2_SRC1_CHANNEL_W_SHIFT 24 #define A2_SRC2_TYPE_SHIFT 21 #define A2_SRC2_NR_SHIFT 16 #define A2_SRC2_CHANNEL_X_NEGATE (1<<15) #define A2_SRC2_CHANNEL_X_SHIFT 12 #define A2_SRC2_CHANNEL_Y_NEGATE (1<<11) #define A2_SRC2_CHANNEL_Y_SHIFT 8 #define A2_SRC2_CHANNEL_Z_NEGATE (1<<7) #define A2_SRC2_CHANNEL_Z_SHIFT 4 #define A2_SRC2_CHANNEL_W_NEGATE (1<<3) #define A2_SRC2_CHANNEL_W_SHIFT 0 /* Texture instructions */ #define T0_TEXLD (0x15<<24) /* Sample texture using predeclared * sampler and address, and output * filtered texel data to destination * register */ #define T0_TEXLDP (0x16<<24) /* Same as texld but performs a * perspective divide of the texture * coordinate .xyz values by .w before * sampling. */ #define T0_TEXLDB (0x17<<24) /* Same as texld but biases the * computed LOD by w. Only S4.6 two's * comp is used. This implies that a * float to fixed conversion is * done. */ #define T0_TEXKILL (0x18<<24) /* Does not perform a sampling * operation. Simply kills the pixel * if any channel of the address * register is < 0.0. */ #define T0_DEST_TYPE_SHIFT 19 /* Allow: R, OC, OD, U */ /* Note: U (unpreserved) regs do not retain their values between * phases (cannot be used for feedback) * * Note: oC and OD registers can only be used as the destination of a * texture instruction once per phase (this is an implementation * restriction). */ #define T0_DEST_NR_SHIFT 14 /* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */ #define T0_SAMPLER_NR_SHIFT 0 /* This field ignored for TEXKILL */ #define T0_SAMPLER_NR_MASK (0xf<<0) #define T1_ADDRESS_REG_TYPE_SHIFT 24 /* Reg to use as texture coord */ /* Allow R, T, OC, OD -- R, OC, OD are 'dependent' reads, new program phase */ #define T1_ADDRESS_REG_NR_SHIFT 17 #define T2_MBZ 0 /* Declaration instructions */ #define D0_DCL (0x19<<24) /* Declare a t (interpolated attrib) * register or an s (sampler) * register. */ #define D0_SAMPLE_TYPE_SHIFT 22 #define D0_SAMPLE_TYPE_2D (0x0<<22) #define D0_SAMPLE_TYPE_CUBE (0x1<<22) #define D0_SAMPLE_TYPE_VOLUME (0x2<<22) #define D0_SAMPLE_TYPE_MASK (0x3<<22) #define D0_TYPE_SHIFT 19 /* Allow: T, S */ #define D0_NR_SHIFT 14 /* Allow T: 0..10, S: 0..15 */ #define D0_CHANNEL_X (1<<10) #define D0_CHANNEL_Y (2<<10) #define D0_CHANNEL_Z (4<<10) #define D0_CHANNEL_W (8<<10) #define D0_CHANNEL_ALL (0xf<<10) #define D0_CHANNEL_NONE (0<<10) #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y) #define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z) /* I915 Errata: Do not allow (xz), (xw), (xzw) combinations for diffuse * or specular declarations. * * For T dcls, only allow: (x), (xy), (xyz), (w), (xyzw) * * Must be zero for S (sampler) dcls */ #define D1_MBZ 0 #define D2_MBZ 0 /* p207. * The DWORD count is 3 times the number of bits set in MS1_MAPMASK_MASK */ #define _3DSTATE_MAP_STATE (CMD_3D|(0x1d<<24)|(0x0<<16)) #define MS1_MAPMASK_SHIFT 0 #define MS1_MAPMASK_MASK (0x8fff<<0) #define MS2_UNTRUSTED_SURFACE (1<<31) #define MS2_ADDRESS_MASK 0xfffffffc #define MS2_VERTICAL_LINE_STRIDE (1<<1) #define MS2_VERTICAL_OFFSET (1<<1) #define MS3_HEIGHT_SHIFT 21 #define MS3_WIDTH_SHIFT 10 #define MS3_PALETTE_SELECT (1<<9) #define MS3_MAPSURF_FORMAT_SHIFT 7 #define MS3_MAPSURF_FORMAT_MASK (0x7<<7) #define MAPSURF_8BIT (1<<7) #define MAPSURF_16BIT (2<<7) #define MAPSURF_32BIT (3<<7) #define MAPSURF_422 (5<<7) #define MAPSURF_COMPRESSED (6<<7) #define MAPSURF_4BIT_INDEXED (7<<7) #define MS3_MT_FORMAT_MASK (0x7 << 3) #define MS3_MT_FORMAT_SHIFT 3 #define MT_4BIT_IDX_ARGB8888 (7<<3) /* SURFACE_4BIT_INDEXED */ #define MT_8BIT_I8 (0<<3) /* SURFACE_8BIT */ #define MT_8BIT_L8 (1<<3) #define MT_8BIT_A8 (4<<3) #define MT_8BIT_MONO8 (5<<3) #define MT_16BIT_RGB565 (0<<3) /* SURFACE_16BIT */ #define MT_16BIT_ARGB1555 (1<<3) #define MT_16BIT_ARGB4444 (2<<3) #define MT_16BIT_AY88 (3<<3) #define MT_16BIT_88DVDU (5<<3) #define MT_16BIT_BUMP_655LDVDU (6<<3) #define MT_16BIT_I16 (7<<3) #define MT_16BIT_L16 (8<<3) #define MT_16BIT_A16 (9<<3) #define MT_32BIT_ARGB8888 (0<<3) /* SURFACE_32BIT */ #define MT_32BIT_ABGR8888 (1<<3) #define MT_32BIT_XRGB8888 (2<<3) #define MT_32BIT_XBGR8888 (3<<3) #define MT_32BIT_QWVU8888 (4<<3) #define MT_32BIT_AXVU8888 (5<<3) #define MT_32BIT_LXVU8888 (6<<3) #define MT_32BIT_XLVU8888 (7<<3) #define MT_32BIT_ARGB2101010 (8<<3) #define MT_32BIT_ABGR2101010 (9<<3) #define MT_32BIT_AWVU2101010 (0xA<<3) #define MT_32BIT_GR1616 (0xB<<3) #define MT_32BIT_VU1616 (0xC<<3) #define MT_32BIT_xI824 (0xD<<3) #define MT_32BIT_xA824 (0xE<<3) #define MT_32BIT_xL824 (0xF<<3) #define MT_422_YCRCB_SWAPY (0<<3) /* SURFACE_422 */ #define MT_422_YCRCB_NORMAL (1<<3) #define MT_422_YCRCB_SWAPUV (2<<3) #define MT_422_YCRCB_SWAPUVY (3<<3) #define MT_COMPRESS_DXT1 (0<<3) /* SURFACE_COMPRESSED */ #define MT_COMPRESS_DXT2_3 (1<<3) #define MT_COMPRESS_DXT4_5 (2<<3) #define MT_COMPRESS_FXT1 (3<<3) #define MT_COMPRESS_DXT1_RGB (4<<3) #define MS3_USE_FENCE_REGS (1<<2) #define MS3_TILED_SURFACE (1<<1) #define MS3_TILE_WALK (1<<0) /* The pitch is the pitch measured in DWORDS, minus 1 */ #define MS4_PITCH_SHIFT 21 #define MS4_CUBE_FACE_ENA_NEGX (1<<20) #define MS4_CUBE_FACE_ENA_POSX (1<<19) #define MS4_CUBE_FACE_ENA_NEGY (1<<18) #define MS4_CUBE_FACE_ENA_POSY (1<<17) #define MS4_CUBE_FACE_ENA_NEGZ (1<<16) #define MS4_CUBE_FACE_ENA_POSZ (1<<15) #define MS4_CUBE_FACE_ENA_MASK (0x3f<<15) #define MS4_MAX_LOD_SHIFT 9 #define MS4_MAX_LOD_MASK (0x3f<<9) #define MS4_MIP_LAYOUT_LEGACY (0<<8) #define MS4_MIP_LAYOUT_BELOW_LPT (0<<8) #define MS4_MIP_LAYOUT_RIGHT_LPT (1<<8) #define MS4_VOLUME_DEPTH_SHIFT 0 #define MS4_VOLUME_DEPTH_MASK (0xff<<0) /* p244. * The DWORD count is 3 times the number of bits set in SS1_MAPMASK_MASK. */ #define _3DSTATE_SAMPLER_STATE (CMD_3D|(0x1d<<24)|(0x1<<16)) #define SS1_MAPMASK_SHIFT 0 #define SS1_MAPMASK_MASK (0x8fff<<0) #define SS2_REVERSE_GAMMA_ENABLE (1<<31) #define SS2_PACKED_TO_PLANAR_ENABLE (1<<30) #define SS2_COLORSPACE_CONVERSION (1<<29) #define SS2_CHROMAKEY_SHIFT 27 #define SS2_BASE_MIP_LEVEL_SHIFT 22 #define SS2_BASE_MIP_LEVEL_MASK (0x1f<<22) #define SS2_MIP_FILTER_SHIFT 20 #define SS2_MIP_FILTER_MASK (0x3<<20) #define MIPFILTER_NONE 0 #define MIPFILTER_NEAREST 1 #define MIPFILTER_LINEAR 3 #define SS2_MAG_FILTER_SHIFT 17 #define SS2_MAG_FILTER_MASK (0x7<<17) #define FILTER_NEAREST 0 #define FILTER_LINEAR 1 #define FILTER_ANISOTROPIC 2 #define FILTER_4X4_1 3 #define FILTER_4X4_2 4 #define FILTER_4X4_FLAT 5 #define FILTER_6X5_MONO 6 /* XXX - check */ #define SS2_MIN_FILTER_SHIFT 14 #define SS2_MIN_FILTER_MASK (0x7<<14) #define SS2_LOD_BIAS_SHIFT 5 #define SS2_LOD_BIAS_ONE (0x10<<5) #define SS2_LOD_BIAS_MASK (0x1ff<<5) /* Shadow requires: * MT_X8{I,L,A}24 or MT_{I,L,A}16 texture format * FILTER_4X4_x MIN and MAG filters */ #define SS2_SHADOW_ENABLE (1<<4) #define SS2_MAX_ANISO_MASK (1<<3) #define SS2_MAX_ANISO_2 (0<<3) #define SS2_MAX_ANISO_4 (1<<3) #define SS2_SHADOW_FUNC_SHIFT 0 #define SS2_SHADOW_FUNC_MASK (0x7<<0) /* SS2_SHADOW_FUNC values: see COMPAREFUNC_* */ #define SS3_MIN_LOD_SHIFT 24 #define SS3_MIN_LOD_ONE (0x10<<24) #define SS3_MIN_LOD_MASK (0xff<<24) #define SS3_KILL_PIXEL_ENABLE (1<<17) #define SS3_TCX_ADDR_MODE_SHIFT 12 #define SS3_TCX_ADDR_MODE_MASK (0x7<<12) #define TEXCOORDMODE_WRAP 0 #define TEXCOORDMODE_MIRROR 1 #define TEXCOORDMODE_CLAMP_EDGE 2 #define TEXCOORDMODE_CUBE 3 #define TEXCOORDMODE_CLAMP_BORDER 4 #define TEXCOORDMODE_MIRROR_ONCE 5 #define SS3_TCY_ADDR_MODE_SHIFT 9 #define SS3_TCY_ADDR_MODE_MASK (0x7<<9) #define SS3_TCZ_ADDR_MODE_SHIFT 6 #define SS3_TCZ_ADDR_MODE_MASK (0x7<<6) #define SS3_NORMALIZED_COORDS (1<<5) #define SS3_TEXTUREMAP_INDEX_SHIFT 1 #define SS3_TEXTUREMAP_INDEX_MASK (0xf<<1) #define SS3_DEINTERLACER_ENABLE (1<<0) #define SS4_BORDER_COLOR_MASK (~0) /* 3DSTATE_SPAN_STIPPLE, p258 */ #define _3DSTATE_STIPPLE ((0x3<<29)|(0x1d<<24)|(0x83<<16)) #define ST1_ENABLE (1<<16) #define ST1_MASK (0xffff) #define FLUSH_MAP_CACHE (1<<0) #define FLUSH_RENDER_CACHE (1<<1) #endif intel-gpu-tools-1.14/lib/drmtest.c0000644000175000017500000002131212665336131014023 00000000000000/* * Copyright © 2007, 2011, 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * Daniel Vetter * */ #ifndef ANDROID #define _GNU_SOURCE #else #include #endif #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "drmtest.h" #include "i915_drm.h" #include "intel_chipset.h" #include "intel_io.h" #include "igt_gt.h" #include "igt_debugfs.h" #include "version.h" #include "config.h" #include "intel_reg.h" #include "ioctl_wrappers.h" /** * SECTION:drmtest * @short_description: Base library for drm tests and tools * @title: drmtest * @include: igt.h * * This library contains the basic support for writing tests, with the most * important part being the helper function to open drm device nodes. * * But there's also a bit of other assorted stuff here. * * Note that this library's header pulls in the [i-g-t core](intel-gpu-tools-i-g-t-core.html) * and [batchbuffer](intel-gpu-tools-intel-batchbuffer.html) libraries as dependencies. */ uint16_t __drm_device_id; static int __get_drm_device_name(int fd, char *name) { drm_version_t version; memset(&version, 0, sizeof(version)); version.name_len = 4; version.name = name; if (!drmIoctl(fd, DRM_IOCTL_VERSION, &version)){ return 0; } return -1; } static bool is_i915_device(int fd) { int ret; char name[5] = ""; ret = __get_drm_device_name(fd, name); return !ret && strcmp("i915", name) == 0; } static bool is_vc4_device(int fd) { int ret; char name[5] = ""; ret = __get_drm_device_name(fd, name); return !ret && strcmp("vc4", name) == 0; } static bool is_intel(int fd) { struct drm_i915_getparam gp; int devid = 0; memset(&gp, 0, sizeof(gp)); gp.param = I915_PARAM_CHIPSET_ID; gp.value = &devid; if (ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp, sizeof(gp))) return false; if (!IS_INTEL(devid)) return false; __drm_device_id = devid; return true; } static void check_stop_rings(void) { enum stop_ring_flags flags; flags = igt_get_stop_rings(); igt_warn_on_f(flags != 0, "i915_ring_stop flags on exit 0x%x, can't quiescent gpu cleanly\n", flags); if (flags) igt_set_stop_rings(STOP_RING_NONE); } #define LOCAL_I915_EXEC_VEBOX (4 << 0) /** * gem_quiescent_gpu: * @fd: open i915 drm file descriptor * * Ensure the gpu is idle by launching a nop execbuf and stalling for it. This * is automatically run when opening a drm device node and is also installed as * an exit handler to have the best assurance that the test is run in a pristine * and controlled environment. * * This function simply allows tests to make additional calls in-between, if so * desired. */ void gem_quiescent_gpu(int fd) { uint32_t batch[2] = {MI_BATCH_BUFFER_END, 0}; struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 gem_exec[1]; check_stop_rings(); memset(gem_exec, 0, sizeof(gem_exec)); gem_exec[0].handle = gem_create(fd, 4096); gem_write(fd, gem_exec[0].handle, 0, batch, sizeof(batch)); memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)gem_exec; execbuf.buffer_count = 1; execbuf.flags = I915_EXEC_RENDER; gem_execbuf(fd, &execbuf); if (gem_has_blt(fd)) { execbuf.flags = I915_EXEC_BLT; gem_execbuf(fd, &execbuf); } if (gem_has_bsd(fd)) { execbuf.flags = I915_EXEC_BSD; gem_execbuf(fd, &execbuf); } if (gem_has_vebox(fd)) { execbuf.flags = LOCAL_I915_EXEC_VEBOX; gem_execbuf(fd, &execbuf); } gem_sync(fd, gem_exec[0].handle); igt_drop_caches_set(DROP_RETIRE); gem_close(fd, gem_exec[0].handle); } /** * drm_get_card: * * Get an i915 drm card index number for use in /dev or /sys. The minor index of * the legacy node is returned, not of the control or render node. * * Returns: * The i915 drm index or -1 on error */ int drm_get_card(void) { char *name; int i, fd; for (i = 0; i < 16; i++) { int ret; ret = asprintf(&name, "/dev/dri/card%u", i); igt_assert(ret != -1); fd = open(name, O_RDWR); free(name); if (fd == -1) continue; if (!is_i915_device(fd) || !is_intel(fd)) { close(fd); continue; } close(fd); return i; } igt_skip("No intel gpu found\n"); return -1; } /** * __drm_open_driver: * @chipset: OR'd flags for each chipset to search, eg. #DRIVER_INTEL * * Open the first DRM device we can find, searching up to 16 device nodes * * Returns: * An open DRM fd or -1 on error */ int __drm_open_driver(int chipset) { for (int i = 0; i < 16; i++) { char name[80]; int fd; bool found_intel, found_vc4; sprintf(name, "/dev/dri/card%u", i); fd = open(name, O_RDWR); if (fd == -1) continue; found_intel = is_i915_device(fd) && is_intel(fd) && (chipset & DRIVER_INTEL); found_vc4 = is_vc4_device(fd) && (chipset & DRIVER_VC4); if ((chipset & DRIVER_ANY) || found_intel || found_vc4) return fd; close(fd); } igt_skip("No intel gpu found\n"); return -1; } static int __drm_open_driver_render(int chipset) { char *name; int i, fd; for (i = 128; i < (128 + 16); i++) { int ret; ret = asprintf(&name, "/dev/dri/renderD%u", i); igt_assert(ret != -1); fd = open(name, O_RDWR); free(name); if (fd == -1) continue; if (!is_i915_device(fd) || !is_intel(fd)) { close(fd); fd = -1; continue; } return fd; } return fd; } static int at_exit_drm_fd = -1; static int at_exit_drm_render_fd = -1; static void quiescent_gpu_at_exit(int sig) { if (at_exit_drm_fd < 0) return; check_stop_rings(); gem_quiescent_gpu(at_exit_drm_fd); close(at_exit_drm_fd); at_exit_drm_fd = -1; } static void quiescent_gpu_at_exit_render(int sig) { if (at_exit_drm_render_fd < 0) return; check_stop_rings(); gem_quiescent_gpu(at_exit_drm_render_fd); close(at_exit_drm_render_fd); at_exit_drm_render_fd = -1; } /** * drm_open_driver: * @chipset: OR'd flags for each chipset to search, eg. #DRIVER_INTEL * * Open a drm legacy device node. This function always returns a valid * file descriptor. * * Returns: a drm file descriptor */ int drm_open_driver(int chipset) { static int open_count; int fd = __drm_open_driver(chipset); igt_require(fd >= 0); if (__sync_fetch_and_add(&open_count, 1)) return fd; if(chipset & DRIVER_INTEL){ gem_quiescent_gpu(fd); igt_install_exit_handler(quiescent_gpu_at_exit); } at_exit_drm_fd = __drm_open_driver(chipset); return fd; } /** * drm_open_driver_master: * @chipset: OR'd flags for each chipset to search, eg. #DRIVER_INTEL * * Open a drm legacy device node and ensure that it is drm master. * * Returns: * The drm file descriptor or -1 on error */ int drm_open_driver_master(int chipset) { int fd = drm_open_driver(chipset); igt_require(fd >= 0); igt_require_f(drmSetMaster(fd) == 0, "Can't become DRM master, " "please check if no other DRM client is running.\n"); return fd; } /** * drm_open_driver_render: * @chipset: OR'd flags for each chipset to search, eg. #DRIVER_INTEL * * Open a drm render device node. * * Returns: * The drm file descriptor or -1 on error */ int drm_open_driver_render(int chipset) { static int open_count; int fd = __drm_open_driver_render(chipset); /* no render nodes, fallback to drm_open_driver() */ if (fd == -1) return drm_open_driver(chipset); if (__sync_fetch_and_add(&open_count, 1)) return fd; at_exit_drm_render_fd = __drm_open_driver(chipset); if(chipset & DRIVER_INTEL){ gem_quiescent_gpu(fd); igt_install_exit_handler(quiescent_gpu_at_exit_render); } return fd; } intel-gpu-tools-1.14/lib/gen8_media.h0000644000175000017500000003517012665336131014355 00000000000000#ifndef GEN8_MEDIA_H #define GEN8_MEDIA_H #include #define GEN8_SURFACEFORMAT_R32G32B32A32_FLOAT 0x000 #define GEN8_SURFACEFORMAT_R32G32B32A32_SINT 0x001 #define GEN8_SURFACEFORMAT_R32G32B32A32_UINT 0x002 #define GEN8_SURFACEFORMAT_R32G32B32A32_UNORM 0x003 #define GEN8_SURFACEFORMAT_R32G32B32A32_SNORM 0x004 #define GEN8_SURFACEFORMAT_R64G64_FLOAT 0x005 #define GEN8_SURFACEFORMAT_R32G32B32X32_FLOAT 0x006 #define GEN8_SURFACEFORMAT_R32G32B32A32_SSCALED 0x007 #define GEN8_SURFACEFORMAT_R32G32B32A32_USCALED 0x008 #define GEN8_SURFACEFORMAT_R32G32B32_FLOAT 0x040 #define GEN8_SURFACEFORMAT_R32G32B32_SINT 0x041 #define GEN8_SURFACEFORMAT_R32G32B32_UINT 0x042 #define GEN8_SURFACEFORMAT_R32G32B32_UNORM 0x043 #define GEN8_SURFACEFORMAT_R32G32B32_SNORM 0x044 #define GEN8_SURFACEFORMAT_R32G32B32_SSCALED 0x045 #define GEN8_SURFACEFORMAT_R32G32B32_USCALED 0x046 #define GEN8_SURFACEFORMAT_R16G16B16A16_UNORM 0x080 #define GEN8_SURFACEFORMAT_R16G16B16A16_SNORM 0x081 #define GEN8_SURFACEFORMAT_R16G16B16A16_SINT 0x082 #define GEN8_SURFACEFORMAT_R16G16B16A16_UINT 0x083 #define GEN8_SURFACEFORMAT_R16G16B16A16_FLOAT 0x084 #define GEN8_SURFACEFORMAT_R32G32_FLOAT 0x085 #define GEN8_SURFACEFORMAT_R32G32_SINT 0x086 #define GEN8_SURFACEFORMAT_R32G32_UINT 0x087 #define GEN8_SURFACEFORMAT_R32_FLOAT_X8X24_TYPELESS 0x088 #define GEN8_SURFACEFORMAT_X32_TYPELESS_G8X24_UINT 0x089 #define GEN8_SURFACEFORMAT_L32A32_FLOAT 0x08A #define GEN8_SURFACEFORMAT_R32G32_UNORM 0x08B #define GEN8_SURFACEFORMAT_R32G32_SNORM 0x08C #define GEN8_SURFACEFORMAT_R64_FLOAT 0x08D #define GEN8_SURFACEFORMAT_R16G16B16X16_UNORM 0x08E #define GEN8_SURFACEFORMAT_R16G16B16X16_FLOAT 0x08F #define GEN8_SURFACEFORMAT_A32X32_FLOAT 0x090 #define GEN8_SURFACEFORMAT_L32X32_FLOAT 0x091 #define GEN8_SURFACEFORMAT_I32X32_FLOAT 0x092 #define GEN8_SURFACEFORMAT_R16G16B16A16_SSCALED 0x093 #define GEN8_SURFACEFORMAT_R16G16B16A16_USCALED 0x094 #define GEN8_SURFACEFORMAT_R32G32_SSCALED 0x095 #define GEN8_SURFACEFORMAT_R32G32_USCALED 0x096 #define GEN8_SURFACEFORMAT_B8G8R8A8_UNORM 0x0C0 #define GEN8_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB 0x0C1 #define GEN8_SURFACEFORMAT_R10G10B10A2_UNORM 0x0C2 #define GEN8_SURFACEFORMAT_R10G10B10A2_UNORM_SRGB 0x0C3 #define GEN8_SURFACEFORMAT_R10G10B10A2_UINT 0x0C4 #define GEN8_SURFACEFORMAT_R10G10B10_SNORM_A2_UNORM 0x0C5 #define GEN8_SURFACEFORMAT_R8G8B8A8_UNORM 0x0C7 #define GEN8_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB 0x0C8 #define GEN8_SURFACEFORMAT_R8G8B8A8_SNORM 0x0C9 #define GEN8_SURFACEFORMAT_R8G8B8A8_SINT 0x0CA #define GEN8_SURFACEFORMAT_R8G8B8A8_UINT 0x0CB #define GEN8_SURFACEFORMAT_R16G16_UNORM 0x0CC #define GEN8_SURFACEFORMAT_R16G16_SNORM 0x0CD #define GEN8_SURFACEFORMAT_R16G16_SINT 0x0CE #define GEN8_SURFACEFORMAT_R16G16_UINT 0x0CF #define GEN8_SURFACEFORMAT_R16G16_FLOAT 0x0D0 #define GEN8_SURFACEFORMAT_B10G10R10A2_UNORM 0x0D1 #define GEN8_SURFACEFORMAT_B10G10R10A2_UNORM_SRGB 0x0D2 #define GEN8_SURFACEFORMAT_R11G11B10_FLOAT 0x0D3 #define GEN8_SURFACEFORMAT_R32_SINT 0x0D6 #define GEN8_SURFACEFORMAT_R32_UINT 0x0D7 #define GEN8_SURFACEFORMAT_R32_FLOAT 0x0D8 #define GEN8_SURFACEFORMAT_R24_UNORM_X8_TYPELESS 0x0D9 #define GEN8_SURFACEFORMAT_X24_TYPELESS_G8_UINT 0x0DA #define GEN8_SURFACEFORMAT_L16A16_UNORM 0x0DF #define GEN8_SURFACEFORMAT_I24X8_UNORM 0x0E0 #define GEN8_SURFACEFORMAT_L24X8_UNORM 0x0E1 #define GEN8_SURFACEFORMAT_A24X8_UNORM 0x0E2 #define GEN8_SURFACEFORMAT_I32_FLOAT 0x0E3 #define GEN8_SURFACEFORMAT_L32_FLOAT 0x0E4 #define GEN8_SURFACEFORMAT_A32_FLOAT 0x0E5 #define GEN8_SURFACEFORMAT_B8G8R8X8_UNORM 0x0E9 #define GEN8_SURFACEFORMAT_B8G8R8X8_UNORM_SRGB 0x0EA #define GEN8_SURFACEFORMAT_R8G8B8X8_UNORM 0x0EB #define GEN8_SURFACEFORMAT_R8G8B8X8_UNORM_SRGB 0x0EC #define GEN8_SURFACEFORMAT_R9G9B9E5_SHAREDEXP 0x0ED #define GEN8_SURFACEFORMAT_B10G10R10X2_UNORM 0x0EE #define GEN8_SURFACEFORMAT_L16A16_FLOAT 0x0F0 #define GEN8_SURFACEFORMAT_R32_UNORM 0x0F1 #define GEN8_SURFACEFORMAT_R32_SNORM 0x0F2 #define GEN8_SURFACEFORMAT_R10G10B10X2_USCALED 0x0F3 #define GEN8_SURFACEFORMAT_R8G8B8A8_SSCALED 0x0F4 #define GEN8_SURFACEFORMAT_R8G8B8A8_USCALED 0x0F5 #define GEN8_SURFACEFORMAT_R16G16_SSCALED 0x0F6 #define GEN8_SURFACEFORMAT_R16G16_USCALED 0x0F7 #define GEN8_SURFACEFORMAT_R32_SSCALED 0x0F8 #define GEN8_SURFACEFORMAT_R32_USCALED 0x0F9 #define GEN8_SURFACEFORMAT_B5G6R5_UNORM 0x100 #define GEN8_SURFACEFORMAT_B5G6R5_UNORM_SRGB 0x101 #define GEN8_SURFACEFORMAT_B5G5R5A1_UNORM 0x102 #define GEN8_SURFACEFORMAT_B5G5R5A1_UNORM_SRGB 0x103 #define GEN8_SURFACEFORMAT_B4G4R4A4_UNORM 0x104 #define GEN8_SURFACEFORMAT_B4G4R4A4_UNORM_SRGB 0x105 #define GEN8_SURFACEFORMAT_R8G8_UNORM 0x106 #define GEN8_SURFACEFORMAT_R8G8_SNORM 0x107 #define GEN8_SURFACEFORMAT_R8G8_SINT 0x108 #define GEN8_SURFACEFORMAT_R8G8_UINT 0x109 #define GEN8_SURFACEFORMAT_R16_UNORM 0x10A #define GEN8_SURFACEFORMAT_R16_SNORM 0x10B #define GEN8_SURFACEFORMAT_R16_SINT 0x10C #define GEN8_SURFACEFORMAT_R16_UINT 0x10D #define GEN8_SURFACEFORMAT_R16_FLOAT 0x10E #define GEN8_SURFACEFORMAT_I16_UNORM 0x111 #define GEN8_SURFACEFORMAT_L16_UNORM 0x112 #define GEN8_SURFACEFORMAT_A16_UNORM 0x113 #define GEN8_SURFACEFORMAT_L8A8_UNORM 0x114 #define GEN8_SURFACEFORMAT_I16_FLOAT 0x115 #define GEN8_SURFACEFORMAT_L16_FLOAT 0x116 #define GEN8_SURFACEFORMAT_A16_FLOAT 0x117 #define GEN8_SURFACEFORMAT_R5G5_SNORM_B6_UNORM 0x119 #define GEN8_SURFACEFORMAT_B5G5R5X1_UNORM 0x11A #define GEN8_SURFACEFORMAT_B5G5R5X1_UNORM_SRGB 0x11B #define GEN8_SURFACEFORMAT_R8G8_SSCALED 0x11C #define GEN8_SURFACEFORMAT_R8G8_USCALED 0x11D #define GEN8_SURFACEFORMAT_R16_SSCALED 0x11E #define GEN8_SURFACEFORMAT_R16_USCALED 0x11F #define GEN8_SURFACEFORMAT_R8_UNORM 0x140 #define GEN8_SURFACEFORMAT_R8_SNORM 0x141 #define GEN8_SURFACEFORMAT_R8_SINT 0x142 #define GEN8_SURFACEFORMAT_R8_UINT 0x143 #define GEN8_SURFACEFORMAT_A8_UNORM 0x144 #define GEN8_SURFACEFORMAT_I8_UNORM 0x145 #define GEN8_SURFACEFORMAT_L8_UNORM 0x146 #define GEN8_SURFACEFORMAT_P4A4_UNORM 0x147 #define GEN8_SURFACEFORMAT_A4P4_UNORM 0x148 #define GEN8_SURFACEFORMAT_R8_SSCALED 0x149 #define GEN8_SURFACEFORMAT_R8_USCALED 0x14A #define GEN8_SURFACEFORMAT_R1_UINT 0x181 #define GEN8_SURFACEFORMAT_YCRCB_NORMAL 0x182 #define GEN8_SURFACEFORMAT_YCRCB_SWAPUVY 0x183 #define GEN8_SURFACEFORMAT_BC1_UNORM 0x186 #define GEN8_SURFACEFORMAT_BC2_UNORM 0x187 #define GEN8_SURFACEFORMAT_BC3_UNORM 0x188 #define GEN8_SURFACEFORMAT_BC4_UNORM 0x189 #define GEN8_SURFACEFORMAT_BC5_UNORM 0x18A #define GEN8_SURFACEFORMAT_BC1_UNORM_SRGB 0x18B #define GEN8_SURFACEFORMAT_BC2_UNORM_SRGB 0x18C #define GEN8_SURFACEFORMAT_BC3_UNORM_SRGB 0x18D #define GEN8_SURFACEFORMAT_MONO8 0x18E #define GEN8_SURFACEFORMAT_YCRCB_SWAPUV 0x18F #define GEN8_SURFACEFORMAT_YCRCB_SWAPY 0x190 #define GEN8_SURFACEFORMAT_DXT1_RGB 0x191 #define GEN8_SURFACEFORMAT_FXT1 0x192 #define GEN8_SURFACEFORMAT_R8G8B8_UNORM 0x193 #define GEN8_SURFACEFORMAT_R8G8B8_SNORM 0x194 #define GEN8_SURFACEFORMAT_R8G8B8_SSCALED 0x195 #define GEN8_SURFACEFORMAT_R8G8B8_USCALED 0x196 #define GEN8_SURFACEFORMAT_R64G64B64A64_FLOAT 0x197 #define GEN8_SURFACEFORMAT_R64G64B64_FLOAT 0x198 #define GEN8_SURFACEFORMAT_BC4_SNORM 0x199 #define GEN8_SURFACEFORMAT_BC5_SNORM 0x19A #define GEN8_SURFACEFORMAT_R16G16B16_UNORM 0x19C #define GEN8_SURFACEFORMAT_R16G16B16_SNORM 0x19D #define GEN8_SURFACEFORMAT_R16G16B16_SSCALED 0x19E #define GEN8_SURFACEFORMAT_R16G16B16_USCALED 0x19F #define GEN8_SURFACERETURNFORMAT_FLOAT32 0 #define GEN8_SURFACERETURNFORMAT_S1 1 #define GEN8_SURFACE_1D 0 #define GEN8_SURFACE_2D 1 #define GEN8_SURFACE_3D 2 #define GEN8_SURFACE_CUBE 3 #define GEN8_SURFACE_BUFFER 4 #define GEN8_SURFACE_NULL 7 #define GEN8_FLOATING_POINT_IEEE_754 0 #define GEN8_FLOATING_POINT_NON_IEEE_754 1 #define GFXPIPE(Pipeline,Opcode,Subopcode) ((3 << 29) | \ ((Pipeline) << 27) | \ ((Opcode) << 24) | \ ((Subopcode) << 16)) #define GEN8_PIPELINE_SELECT GFXPIPE(1, 1, 4) # define PIPELINE_SELECT_3D (0 << 0) # define PIPELINE_SELECT_MEDIA (1 << 0) #define GEN8_STATE_BASE_ADDRESS GFXPIPE(0, 1, 1) # define BASE_ADDRESS_MODIFY (1 << 0) #define GEN8_MEDIA_VFE_STATE GFXPIPE(2, 0, 0) #define GEN8_MEDIA_CURBE_LOAD GFXPIPE(2, 0, 1) #define GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD GFXPIPE(2, 0, 2) #define GEN8_MEDIA_STATE_FLUSH GFXPIPE(2, 0, 4) #define GEN8_MEDIA_OBJECT GFXPIPE(2, 1, 0) struct gen8_interface_descriptor_data { struct { uint32_t pad0:6; uint32_t kernel_start_pointer:26; } desc0; struct { uint32_t kernel_start_pointer_high:16; uint32_t pad0:16; } desc1; struct { uint32_t pad0:7; uint32_t software_exception_enable:1; uint32_t pad1:3; uint32_t maskstack_exception_enable:1; uint32_t pad2:1; uint32_t illegal_opcode_exception_enable:1; uint32_t pad3:2; uint32_t floating_point_mode:1; uint32_t thread_priority:1; uint32_t single_program_flow:1; uint32_t denorm_mode:1; uint32_t pad4:12; } desc2; struct { uint32_t pad0:2; uint32_t sampler_count:3; uint32_t sampler_state_pointer:27; } desc3; struct { uint32_t binding_table_entry_count:5; uint32_t binding_table_pointer:11; uint32_t pad0: 16; } desc4; struct { uint32_t constant_urb_entry_read_offset:16; uint32_t constant_urb_entry_read_length:16; } desc5; struct { uint32_t num_threads_in_tg:10; uint32_t pad0:5; uint32_t global_barrier_enable:1; uint32_t shared_local_memory_size:5; uint32_t barrier_enable:1; uint32_t rounding_mode:2; uint32_t pad1:8; } desc6; struct { uint32_t cross_thread_constant_data_read_length:8; uint32_t pad0:24; } desc7; }; struct gen8_surface_state { struct { uint32_t cube_pos_z:1; uint32_t cube_neg_z:1; uint32_t cube_pos_y:1; uint32_t cube_neg_y:1; uint32_t cube_pos_x:1; uint32_t cube_neg_x:1; uint32_t media_boundary_pixel_mode:2; uint32_t render_cache_read_write:1; uint32_t sampler_l2_bypass_disable:1; uint32_t vert_line_stride_ofs:1; uint32_t vert_line_stride:1; uint32_t tiled_mode:2; uint32_t horizontal_alignment:2; uint32_t vertical_alignment:2; uint32_t surface_format:9; /**< BRW_SURFACEFORMAT_x */ uint32_t pad0:1; uint32_t is_array:1; uint32_t surface_type:3; /**< BRW_SURFACE_1D/2D/3D/CUBE */ } ss0; struct { uint32_t qpitch:15; uint32_t pad1:4; uint32_t base_mip_level:5; uint32_t memory_object_control:7; uint32_t pad0:1; } ss1; struct { uint32_t width:14; uint32_t pad1:2; uint32_t height:14; uint32_t pad0:2; } ss2; struct { uint32_t pitch:18; uint32_t pad:3; uint32_t depth:11; } ss3; struct { uint32_t multisample_position_palette_index:3; uint32_t num_multisamples:3; uint32_t multisampled_surface_storage_format:1; uint32_t render_target_view_extent:11; uint32_t min_array_elt:11; uint32_t rotation:2; uint32_t force_ncmp_reduce_type:1; } ss4; struct { uint32_t mip_count:4; uint32_t min_lod:4; uint32_t pad3:6; uint32_t coherency_type:1; uint32_t pad2:5; uint32_t ewa_disable_for_cube:1; uint32_t y_offset:3; uint32_t pad0:1; uint32_t x_offset:7; } ss5; struct { uint32_t pad; /* Multisample Control Surface stuff */ } ss6; struct { uint32_t resource_min_lod:12; /* Only on Haswell */ uint32_t pad0:4; uint32_t shader_chanel_select_a:3; uint32_t shader_chanel_select_b:3; uint32_t shader_chanel_select_g:3; uint32_t shader_chanel_select_r:3; uint32_t alpha_clear_color:1; uint32_t blue_clear_color:1; uint32_t green_clear_color:1; uint32_t red_clear_color:1; } ss7; struct { uint32_t base_addr; } ss8; struct { uint32_t base_addr_hi:16; uint32_t pad0:16; } ss9; struct { uint32_t pad0:12; uint32_t aux_base_addr:20; } ss10; struct { uint32_t aux_base_addr_hi:16; uint32_t pad:16; } ss11; struct { uint32_t hiz_depth_clear_value; } ss12; struct { uint32_t reserved; } ss13; struct { uint32_t reserved; } ss14; struct { uint32_t reserved; } ss15; }; #define GEN9_PIPELINE_SELECTION_MASK (3 << 8) /* If enabled, it will force awake media enginee and the following instructions * will require that the media enginee is awake. */ #define GEN9_FORCE_MEDIA_AWAKE_DISABLE (0 << 5) #define GEN9_FORCE_MEDIA_AWAKE_ENABLE (1 << 5) #define GEN9_FORCE_MEDIA_AWAKE_MASK (1 << 13) #define GEN9_SAMPLER_DOP_GATE_DISABLE (0 << 4) #define GEN9_SAMPLER_DOP_GATE_ENABLE (1 << 4) #define GEN9_SAMPLER_DOP_GATE_MASK (1 << 12) #endif /* GEN8_MEDIA_H */ intel-gpu-tools-1.14/lib/rendercopy_i915.c0000644000175000017500000001431612665336131015270 00000000000000#include #include #include #include #include #include #include #include #include #include #include "drm.h" #include "i915_drm.h" #include "drmtest.h" #include "intel_bufmgr.h" #include "intel_batchbuffer.h" #include "intel_io.h" #include "i915_reg.h" #include "i915_3d.h" #include "rendercopy.h" void gen3_render_copyfunc(struct intel_batchbuffer *batch, drm_intel_context *context, struct igt_buf *src, unsigned src_x, unsigned src_y, unsigned width, unsigned height, struct igt_buf *dst, unsigned dst_x, unsigned dst_y) { /* invariant state */ { OUT_BATCH(_3DSTATE_AA_CMD | AA_LINE_ECAAR_WIDTH_ENABLE | AA_LINE_ECAAR_WIDTH_1_0 | AA_LINE_REGION_WIDTH_ENABLE | AA_LINE_REGION_WIDTH_1_0); OUT_BATCH(_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD | IAB_MODIFY_ENABLE | IAB_MODIFY_FUNC | (BLENDFUNC_ADD << IAB_FUNC_SHIFT) | IAB_MODIFY_SRC_FACTOR | (BLENDFACT_ONE << IAB_SRC_FACTOR_SHIFT) | IAB_MODIFY_DST_FACTOR | (BLENDFACT_ZERO << IAB_DST_FACTOR_SHIFT)); OUT_BATCH(_3DSTATE_DFLT_DIFFUSE_CMD); OUT_BATCH(0); OUT_BATCH(_3DSTATE_DFLT_SPEC_CMD); OUT_BATCH(0); OUT_BATCH(_3DSTATE_DFLT_Z_CMD); OUT_BATCH(0); OUT_BATCH(_3DSTATE_COORD_SET_BINDINGS | CSB_TCB(0, 0) | CSB_TCB(1, 1) | CSB_TCB(2, 2) | CSB_TCB(3, 3) | CSB_TCB(4, 4) | CSB_TCB(5, 5) | CSB_TCB(6, 6) | CSB_TCB(7, 7)); OUT_BATCH(_3DSTATE_RASTER_RULES_CMD | ENABLE_POINT_RASTER_RULE | OGL_POINT_RASTER_RULE | ENABLE_LINE_STRIP_PROVOKE_VRTX | ENABLE_TRI_FAN_PROVOKE_VRTX | LINE_STRIP_PROVOKE_VRTX(1) | TRI_FAN_PROVOKE_VRTX(2) | ENABLE_TEXKILL_3D_4D | TEXKILL_4D); OUT_BATCH(_3DSTATE_MODES_4_CMD | ENABLE_LOGIC_OP_FUNC | LOGIC_OP_FUNC(LOGICOP_COPY) | ENABLE_STENCIL_WRITE_MASK | STENCIL_WRITE_MASK(0xff) | ENABLE_STENCIL_TEST_MASK | STENCIL_TEST_MASK(0xff)); OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | I1_LOAD_S(4) | I1_LOAD_S(5) | 2); OUT_BATCH(0x00000000); /* Disable texture coordinate wrap-shortest */ OUT_BATCH((1 << S4_POINT_WIDTH_SHIFT) | S4_LINE_WIDTH_ONE | S4_CULLMODE_NONE | S4_VFMT_XY); OUT_BATCH(0x00000000); /* Stencil. */ OUT_BATCH(_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT); OUT_BATCH(_3DSTATE_SCISSOR_RECT_0_CMD); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(_3DSTATE_DEPTH_SUBRECT_DISABLE); OUT_BATCH(_3DSTATE_LOAD_INDIRECT | 0); /* disable indirect state */ OUT_BATCH(0); OUT_BATCH(_3DSTATE_STIPPLE); OUT_BATCH(0x00000000); OUT_BATCH(_3DSTATE_BACKFACE_STENCIL_OPS | BFO_ENABLE_STENCIL_TWO_SIDE | 0); } /* samler state */ { #define TEX_COUNT 1 uint32_t tiling_bits = 0; if (src->tiling != I915_TILING_NONE) tiling_bits = MS3_TILED_SURFACE; if (src->tiling == I915_TILING_Y) tiling_bits |= MS3_TILE_WALK; OUT_BATCH(_3DSTATE_MAP_STATE | (3 * TEX_COUNT)); OUT_BATCH((1 << TEX_COUNT) - 1); OUT_RELOC(src->bo, I915_GEM_DOMAIN_SAMPLER, 0, 0); OUT_BATCH(MAPSURF_32BIT | MT_32BIT_ARGB8888 | tiling_bits | (igt_buf_height(src) - 1) << MS3_HEIGHT_SHIFT | (igt_buf_width(src) - 1) << MS3_WIDTH_SHIFT); OUT_BATCH((src->stride/4-1) << MS4_PITCH_SHIFT); OUT_BATCH(_3DSTATE_SAMPLER_STATE | (3 * TEX_COUNT)); OUT_BATCH((1 << TEX_COUNT) - 1); OUT_BATCH(MIPFILTER_NONE << SS2_MIP_FILTER_SHIFT | FILTER_NEAREST << SS2_MAG_FILTER_SHIFT | FILTER_NEAREST << SS2_MIN_FILTER_SHIFT); OUT_BATCH(TEXCOORDMODE_WRAP << SS3_TCX_ADDR_MODE_SHIFT | TEXCOORDMODE_WRAP << SS3_TCY_ADDR_MODE_SHIFT | 0 << SS3_TEXTUREMAP_INDEX_SHIFT); OUT_BATCH(0x00000000); } /* render target state */ { uint32_t tiling_bits = 0; if (dst->tiling != I915_TILING_NONE) tiling_bits = BUF_3D_TILED_SURFACE; if (dst->tiling == I915_TILING_Y) tiling_bits |= BUF_3D_TILE_WALK_Y; OUT_BATCH(_3DSTATE_BUF_INFO_CMD); OUT_BATCH(BUF_3D_ID_COLOR_BACK | tiling_bits | BUF_3D_PITCH(dst->stride)); OUT_RELOC(dst->bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(_3DSTATE_DST_BUF_VARS_CMD); OUT_BATCH(COLR_BUF_ARGB8888 | DSTORG_HORT_BIAS(0x8) | DSTORG_VERT_BIAS(0x8)); /* draw rect is unconditional */ OUT_BATCH(_3DSTATE_DRAW_RECT_CMD); OUT_BATCH(0x00000000); OUT_BATCH(0x00000000); /* ymin, xmin */ OUT_BATCH(DRAW_YMAX(igt_buf_height(dst) - 1) | DRAW_XMAX(igt_buf_width(dst) - 1)); /* yorig, xorig (relate to color buffer?) */ OUT_BATCH(0x00000000); } /* texfmt */ { OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(1) | I1_LOAD_S(2) | I1_LOAD_S(6) | 2); OUT_BATCH((4 << S1_VERTEX_WIDTH_SHIFT) | (4 << S1_VERTEX_PITCH_SHIFT)); OUT_BATCH(~S2_TEXCOORD_FMT(0, TEXCOORDFMT_NOT_PRESENT) | S2_TEXCOORD_FMT(0, TEXCOORDFMT_2D)); OUT_BATCH(S6_CBUF_BLEND_ENABLE | S6_COLOR_WRITE_ENABLE | BLENDFUNC_ADD << S6_CBUF_BLEND_FUNC_SHIFT | BLENDFACT_ONE << S6_CBUF_SRC_BLEND_FACT_SHIFT | BLENDFACT_ZERO << S6_CBUF_DST_BLEND_FACT_SHIFT); } /* frage shader */ { OUT_BATCH(_3DSTATE_PIXEL_SHADER_PROGRAM | (1 + 3*3 - 2)); /* decl FS_T0 */ OUT_BATCH(D0_DCL | REG_TYPE(FS_T0) << D0_TYPE_SHIFT | REG_NR(FS_T0) << D0_NR_SHIFT | ((REG_TYPE(FS_T0) != REG_TYPE_S) ? D0_CHANNEL_ALL : 0)); OUT_BATCH(0); OUT_BATCH(0); /* decl FS_S0 */ OUT_BATCH(D0_DCL | (REG_TYPE(FS_S0) << D0_TYPE_SHIFT) | (REG_NR(FS_S0) << D0_NR_SHIFT) | ((REG_TYPE(FS_S0) != REG_TYPE_S) ? D0_CHANNEL_ALL : 0)); OUT_BATCH(0); OUT_BATCH(0); /* texld(FS_OC, FS_S0, FS_T0 */ OUT_BATCH(T0_TEXLD | (REG_TYPE(FS_OC) << T0_DEST_TYPE_SHIFT) | (REG_NR(FS_OC) << T0_DEST_NR_SHIFT) | (REG_NR(FS_S0) << T0_SAMPLER_NR_SHIFT)); OUT_BATCH((REG_TYPE(FS_T0) << T1_ADDRESS_REG_TYPE_SHIFT) | (REG_NR(FS_T0) << T1_ADDRESS_REG_NR_SHIFT)); OUT_BATCH(0); } OUT_BATCH(PRIM3D_RECTLIST | (3*4 - 1)); emit_vertex(batch, dst_x + width); emit_vertex(batch, dst_y + height); emit_vertex(batch, src_x + width); emit_vertex(batch, src_y + height); emit_vertex(batch, dst_x); emit_vertex(batch, dst_y + height); emit_vertex(batch, src_x); emit_vertex(batch, src_y + height); emit_vertex(batch, dst_x); emit_vertex(batch, dst_y); emit_vertex(batch, src_x); emit_vertex(batch, src_y); intel_batchbuffer_flush(batch); } intel-gpu-tools-1.14/lib/media_fill.h0000644000175000017500000000160112665336131014432 00000000000000#ifndef RENDE_MEDIA_FILL_H #define RENDE_MEDIA_FILL_H #include #include "intel_batchbuffer.h" void gen8_media_fillfunc(struct intel_batchbuffer *batch, struct igt_buf *dst, unsigned x, unsigned y, unsigned width, unsigned height, uint8_t color); void gen7_media_fillfunc(struct intel_batchbuffer *batch, struct igt_buf *dst, unsigned x, unsigned y, unsigned width, unsigned height, uint8_t color); void gen8lp_media_fillfunc(struct intel_batchbuffer *batch, struct igt_buf *dst, unsigned x, unsigned y, unsigned width, unsigned height, uint8_t color); void gen9_media_fillfunc(struct intel_batchbuffer *batch, struct igt_buf *dst, unsigned x, unsigned y, unsigned width, unsigned height, uint8_t color); #endif /* RENDE_MEDIA_FILL_H */ intel-gpu-tools-1.14/lib/gen6_render.h0000644000175000017500000016225312665336131014556 00000000000000#ifndef GEN6_RENDER_H #define GEN6_RENDER_H #include #define GEN6_3D(Pipeline,Opcode,Subopcode) ((3 << 29) | \ ((Pipeline) << 27) | \ ((Opcode) << 24) | \ ((Subopcode) << 16)) #define GEN6_STATE_BASE_ADDRESS GEN6_3D(0, 1, 1) #define GEN6_STATE_SIP GEN6_3D(0, 1, 2) #define GEN6_PIPELINE_SELECT GEN6_3D(1, 1, 4) #define GEN6_MEDIA_STATE_POINTERS GEN6_3D(2, 0, 0) #define GEN6_MEDIA_OBJECT GEN6_3D(2, 1, 0) #define GEN6_3DSTATE_BINDING_TABLE_POINTERS GEN6_3D(3, 0, 1) # define GEN6_3DSTATE_BINDING_TABLE_MODIFY_PS (1 << 12)/* for GEN6 */ # define GEN6_3DSTATE_BINDING_TABLE_MODIFY_GS (1 << 9) /* for GEN6 */ # define GEN6_3DSTATE_BINDING_TABLE_MODIFY_VS (1 << 8) /* for GEN6 */ #define GEN6_3DSTATE_VERTEX_BUFFERS GEN6_3D(3, 0, 8) #define GEN6_3DSTATE_VERTEX_ELEMENTS GEN6_3D(3, 0, 9) #define GEN6_3DSTATE_INDEX_BUFFER GEN6_3D(3, 0, 0xa) #define GEN6_3DSTATE_VF_STATISTICS GEN6_3D(1, 0, 0xb) #define GEN6_3DSTATE_DRAWING_RECTANGLE GEN6_3D(3, 1, 0) #define GEN6_3DSTATE_CONSTANT_COLOR GEN6_3D(3, 1, 1) #define GEN6_3DSTATE_SAMPLER_PALETTE_LOAD GEN6_3D(3, 1, 2) #define GEN6_3DSTATE_CHROMA_KEY GEN6_3D(3, 1, 4) #define GEN6_3DSTATE_DEPTH_BUFFER GEN6_3D(3, 1, 5) # define GEN6_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT 29 # define GEN6_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT 18 #define GEN6_3DSTATE_POLY_STIPPLE_OFFSET GEN6_3D(3, 1, 6) #define GEN6_3DSTATE_POLY_STIPPLE_PATTERN GEN6_3D(3, 1, 7) #define GEN6_3DSTATE_LINE_STIPPLE GEN6_3D(3, 1, 8) #define GEN6_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP GEN6_3D(3, 1, 9) /* These two are BLC and CTG only, not BW or CL */ #define GEN6_3DSTATE_AA_LINE_PARAMS GEN6_3D(3, 1, 0xa) #define GEN6_3DSTATE_GS_SVB_INDEX GEN6_3D(3, 1, 0xb) #define GEN6_3DSTATE_MONOFILTER_SIZE GEN6_3D(3, 1, 0x11) #define GEN6_3DPRIMITIVE GEN6_3D(3, 3, 0) #define GEN6_3DSTATE_CLEAR_PARAMS GEN6_3D(3, 1, 0x10) /* DW1 */ # define GEN6_3DSTATE_DEPTH_CLEAR_VALID (1 << 15) #define GEN6_3DSTATE_SAMPLER_STATE_POINTERS GEN6_3D(3, 0, 0x02) # define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_PS (1 << 12) # define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_GS (1 << 9) # define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_VS (1 << 8) #define GEN6_3DSTATE_URB GEN6_3D(3, 0, 0x05) /* DW1 */ # define GEN6_3DSTATE_URB_VS_SIZE_SHIFT 16 # define GEN6_3DSTATE_URB_VS_ENTRIES_SHIFT 0 /* DW2 */ # define GEN6_3DSTATE_URB_GS_ENTRIES_SHIFT 8 # define GEN6_3DSTATE_URB_GS_SIZE_SHIFT 0 #define GEN6_3DSTATE_VIEWPORT_STATE_POINTERS GEN6_3D(3, 0, 0x0d) # define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_CC (1 << 12) # define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_SF (1 << 11) # define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_CLIP (1 << 10) #define GEN6_3DSTATE_CC_STATE_POINTERS GEN6_3D(3, 0, 0x0e) #define GEN6_3DSTATE_VS GEN6_3D(3, 0, 0x10) #define GEN6_3DSTATE_GS GEN6_3D(3, 0, 0x11) /* DW4 */ # define GEN6_3DSTATE_GS_DISPATCH_START_GRF_SHIFT 0 #define GEN6_3DSTATE_CLIP GEN6_3D(3, 0, 0x12) #define GEN6_3DSTATE_SF GEN6_3D(3, 0, 0x13) /* DW1 */ # define GEN6_3DSTATE_SF_NUM_OUTPUTS_SHIFT 22 # define GEN6_3DSTATE_SF_URB_ENTRY_READ_LENGTH_SHIFT 11 # define GEN6_3DSTATE_SF_URB_ENTRY_READ_OFFSET_SHIFT 4 /* DW2 */ /* DW3 */ # define GEN6_3DSTATE_SF_CULL_BOTH (0 << 29) # define GEN6_3DSTATE_SF_CULL_NONE (1 << 29) # define GEN6_3DSTATE_SF_CULL_FRONT (2 << 29) # define GEN6_3DSTATE_SF_CULL_BACK (3 << 29) /* DW4 */ # define GEN6_3DSTATE_SF_TRI_PROVOKE_SHIFT 29 # define GEN6_3DSTATE_SF_LINE_PROVOKE_SHIFT 27 # define GEN6_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT 25 # define GEN6_3DSTATE_SF_VERTEX_SUB_PIXEL_PRECISION_SHIFT 12 #define GEN6_3DSTATE_WM GEN6_3D(3, 0, 0x14) /* DW2 */ # define GEN6_3DSTATE_WM_SAMPLER_COUNT_SHIFT 27 # define GEN6_3DSTATE_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT 18 /* DW4 */ # define GEN6_3DSTATE_WM_DISPATCH_START_GRF_0_SHIFT 16 /* DW5 */ # define GEN6_3DSTATE_WM_MAX_THREADS_SHIFT 25 # define GEN6_3DSTATE_WM_DISPATCH_ENABLE (1 << 19) # define GEN6_3DSTATE_WM_16_DISPATCH_ENABLE (1 << 1) # define GEN6_3DSTATE_WM_8_DISPATCH_ENABLE (1 << 0) /* DW6 */ # define GEN6_3DSTATE_WM_NUM_SF_OUTPUTS_SHIFT 20 # define GEN6_3DSTATE_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 15) # define GEN6_3DSTATE_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC (1 << 14) # define GEN6_3DSTATE_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC (1 << 13) # define GEN6_3DSTATE_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 12) # define GEN6_3DSTATE_WM_PERSPECTIVE_CENTROID_BARYCENTRIC (1 << 11) # define GEN6_3DSTATE_WM_PERSPECTIVE_PIXEL_BARYCENTRIC (1 << 10) #define GEN6_3DSTATE_CONSTANT_VS GEN6_3D(3, 0, 0x15) #define GEN6_3DSTATE_CONSTANT_GS GEN6_3D(3, 0, 0x16) #define GEN6_3DSTATE_CONSTANT_PS GEN6_3D(3, 0, 0x17) #define GEN6_3DSTATE_SAMPLE_MASK GEN6_3D(3, 0, 0x18) #define GEN6_3DSTATE_MULTISAMPLE GEN6_3D(3, 1, 0x0d) /* DW1 */ # define GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER (0 << 4) # define GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_UPPER_LEFT (1 << 4) # define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_1 (0 << 1) # define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_4 (2 << 1) # define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_8 (3 << 1) #define PIPELINE_SELECT_3D 0 #define PIPELINE_SELECT_MEDIA 1 /* for GEN6_STATE_BASE_ADDRESS */ #define BASE_ADDRESS_MODIFY (1 << 0) /* for GEN6_PIPE_CONTROL */ #define GEN6_PIPE_CONTROL_NOWRITE (0 << 14) #define GEN6_PIPE_CONTROL_WRITE_QWORD (1 << 14) #define GEN6_PIPE_CONTROL_WRITE_DEPTH (2 << 14) #define GEN6_PIPE_CONTROL_WRITE_TIME (3 << 14) #define GEN6_PIPE_CONTROL_DEPTH_STALL (1 << 13) #define GEN6_PIPE_CONTROL_WC_FLUSH (1 << 12) #define GEN6_PIPE_CONTROL_IS_FLUSH (1 << 11) #define GEN6_PIPE_CONTROL_TC_FLUSH (1 << 10) #define GEN6_PIPE_CONTROL_NOTIFY_ENABLE (1 << 8) #define GEN6_PIPE_CONTROL_GLOBAL_GTT (1 << 2) #define GEN6_PIPE_CONTROL_LOCAL_PGTT (0 << 2) #define GEN6_PIPE_CONTROL_DEPTH_CACHE_FLUSH (1 << 0) /* VERTEX_BUFFER_STATE Structure */ #define VB0_BUFFER_INDEX_SHIFT 26 #define VB0_VERTEXDATA (0 << 20) #define VB0_INSTANCEDATA (1 << 20) #define VB0_BUFFER_PITCH_SHIFT 0 #define VB0_NULL_VERTEX_BUFFER (1 << 13) /* VERTEX_ELEMENT_STATE Structure */ #define VE0_VERTEX_BUFFER_INDEX_SHIFT 26 /* for GEN6 */ #define VE0_VALID (1 << 25) /* for GEN6 */ #define VE0_FORMAT_SHIFT 16 #define VE0_OFFSET_SHIFT 0 #define VE1_VFCOMPONENT_0_SHIFT 28 #define VE1_VFCOMPONENT_1_SHIFT 24 #define VE1_VFCOMPONENT_2_SHIFT 20 #define VE1_VFCOMPONENT_3_SHIFT 16 #define VE1_DESTINATION_ELEMENT_OFFSET_SHIFT 0 /* 3DPRIMITIVE bits */ #define GEN6_3DPRIMITIVE_VERTEX_SEQUENTIAL (0 << 15) #define GEN6_3DPRIMITIVE_VERTEX_RANDOM (1 << 15) /* Primitive types are in gen6_defines.h */ #define GEN6_3DPRIMITIVE_TOPOLOGY_SHIFT 10 #define GEN6_SVG_CTL 0x7400 #define GEN6_SVG_CTL_GS_BA (0 << 8) #define GEN6_SVG_CTL_SS_BA (1 << 8) #define GEN6_SVG_CTL_IO_BA (2 << 8) #define GEN6_SVG_CTL_GS_AUB (3 << 8) #define GEN6_SVG_CTL_IO_AUB (4 << 8) #define GEN6_SVG_CTL_SIP (5 << 8) #define GEN6_SVG_RDATA 0x7404 #define GEN6_SVG_WORK_CTL 0x7408 #define GEN6_VF_CTL 0x7500 #define GEN6_VF_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN6_VF_CTL_SNAPSHOT_MUX_SELECT_THREADID (0 << 8) #define GEN6_VF_CTL_SNAPSHOT_MUX_SELECT_VF_DEBUG (1 << 8) #define GEN6_VF_CTL_SNAPSHOT_TYPE_VERTEX_SEQUENCE (0 << 4) #define GEN6_VF_CTL_SNAPSHOT_TYPE_VERTEX_INDEX (1 << 4) #define GEN6_VF_CTL_SKIP_INITIAL_PRIMITIVES (1 << 3) #define GEN6_VF_CTL_MAX_PRIMITIVES_LIMIT_ENABLE (1 << 2) #define GEN6_VF_CTL_VERTEX_RANGE_LIMIT_ENABLE (1 << 1) #define GEN6_VF_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN6_VF_STRG_VAL 0x7504 #define GEN6_VF_STR_VL_OVR 0x7508 #define GEN6_VF_VC_OVR 0x750c #define GEN6_VF_STR_PSKIP 0x7510 #define GEN6_VF_MAX_PRIM 0x7514 #define GEN6_VF_RDATA 0x7518 #define GEN6_VS_CTL 0x7600 #define GEN6_VS_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN6_VS_CTL_SNAPSHOT_MUX_VERTEX_0 (0 << 8) #define GEN6_VS_CTL_SNAPSHOT_MUX_VERTEX_1 (1 << 8) #define GEN6_VS_CTL_SNAPSHOT_MUX_VALID_COUNT (2 << 8) #define GEN6_VS_CTL_SNAPSHOT_MUX_VS_KERNEL_POINTER (3 << 8) #define GEN6_VS_CTL_SNAPSHOT_ALL_THREADS (1 << 2) #define GEN6_VS_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) #define GEN6_VS_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN6_VS_STRG_VAL 0x7604 #define GEN6_VS_RDATA 0x7608 #define GEN6_SF_CTL 0x7b00 #define GEN6_SF_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_0_FF_ID (0 << 8) #define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_0_REL_COUNT (1 << 8) #define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_1_FF_ID (2 << 8) #define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_1_REL_COUNT (3 << 8) #define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_2_FF_ID (4 << 8) #define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_2_REL_COUNT (5 << 8) #define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_COUNT (6 << 8) #define GEN6_SF_CTL_SNAPSHOT_MUX_SF_KERNEL_POINTER (7 << 8) #define GEN6_SF_CTL_MIN_MAX_PRIMITIVE_RANGE_ENABLE (1 << 4) #define GEN6_SF_CTL_DEBUG_CLIP_RECTANGLE_ENABLE (1 << 3) #define GEN6_SF_CTL_SNAPSHOT_ALL_THREADS (1 << 2) #define GEN6_SF_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) #define GEN6_SF_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN6_SF_STRG_VAL 0x7b04 #define GEN6_SF_RDATA 0x7b18 #define GEN6_WIZ_CTL 0x7c00 #define GEN6_WIZ_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN6_WIZ_CTL_SUBSPAN_INSTANCE_SHIFT 16 #define GEN6_WIZ_CTL_SNAPSHOT_MUX_WIZ_KERNEL_POINTER (0 << 8) #define GEN6_WIZ_CTL_SNAPSHOT_MUX_SUBSPAN_INSTANCE (1 << 8) #define GEN6_WIZ_CTL_SNAPSHOT_MUX_PRIMITIVE_SEQUENCE (2 << 8) #define GEN6_WIZ_CTL_SINGLE_SUBSPAN_DISPATCH (1 << 6) #define GEN6_WIZ_CTL_IGNORE_COLOR_SCOREBOARD_STALLS (1 << 5) #define GEN6_WIZ_CTL_ENABLE_SUBSPAN_INSTANCE_COMPARE (1 << 4) #define GEN6_WIZ_CTL_USE_UPSTREAM_SNAPSHOT_FLAG (1 << 3) #define GEN6_WIZ_CTL_SNAPSHOT_ALL_THREADS (1 << 2) #define GEN6_WIZ_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) #define GEN6_WIZ_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN6_WIZ_STRG_VAL 0x7c04 #define GEN6_WIZ_RDATA 0x7c18 #define GEN6_TS_CTL 0x7e00 #define GEN6_TS_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN6_TS_CTL_SNAPSHOT_MESSAGE_ERROR (0 << 8) #define GEN6_TS_CTL_SNAPSHOT_INTERFACE_DESCRIPTOR (3 << 8) #define GEN6_TS_CTL_SNAPSHOT_ALL_CHILD_THREADS (1 << 2) #define GEN6_TS_CTL_SNAPSHOT_ALL_ROOT_THREADS (1 << 1) #define GEN6_TS_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN6_TS_STRG_VAL 0x7e04 #define GEN6_TS_RDATA 0x7e08 #define GEN6_TD_CTL_MUX_SHIFT 8 #define GEN6_TD_CTL_EXTERNAL_HALT_R0_DEBUG_MATCH (1 << 7) #define GEN6_TD_CTL_FORCE_EXTERNAL_HALT (1 << 6) #define GEN6_TD_CTL_EXCEPTION_MASK_OVERRIDE (1 << 5) #define GEN6_TD_CTL_FORCE_THREAD_BREAKPOINT_ENABLE (1 << 4) #define GEN6_TD_CTL_BREAKPOINT_ENABLE (1 << 2) #define GEN6_TD_CTL2 0x8004 #define GEN6_TD_CTL2_ILLEGAL_OPCODE_EXCEPTION_OVERRIDE (1 << 28) #define GEN6_TD_CTL2_MASKSTACK_EXCEPTION_OVERRIDE (1 << 26) #define GEN6_TD_CTL2_SOFTWARE_EXCEPTION_OVERRIDE (1 << 25) #define GEN6_TD_CTL2_ACTIVE_THREAD_LIMIT_SHIFT 16 #define GEN6_TD_CTL2_ACTIVE_THREAD_LIMIT_ENABLE (1 << 8) #define GEN6_TD_CTL2_THREAD_SPAWNER_EXECUTION_MASK_ENABLE (1 << 7) #define GEN6_TD_CTL2_WIZ_EXECUTION_MASK_ENABLE (1 << 6) #define GEN6_TD_CTL2_SF_EXECUTION_MASK_ENABLE (1 << 5) #define GEN6_TD_CTL2_CLIPPER_EXECUTION_MASK_ENABLE (1 << 4) #define GEN6_TD_CTL2_GS_EXECUTION_MASK_ENABLE (1 << 3) #define GEN6_TD_CTL2_VS_EXECUTION_MASK_ENABLE (1 << 0) #define GEN6_TD_VF_VS_EMSK 0x8008 #define GEN6_TD_GS_EMSK 0x800c #define GEN6_TD_CLIP_EMSK 0x8010 #define GEN6_TD_SF_EMSK 0x8014 #define GEN6_TD_WIZ_EMSK 0x8018 #define GEN6_TD_0_6_EHTRG_VAL 0x801c #define GEN6_TD_0_7_EHTRG_VAL 0x8020 #define GEN6_TD_0_6_EHTRG_MSK 0x8024 #define GEN6_TD_0_7_EHTRG_MSK 0x8028 #define GEN6_TD_RDATA 0x802c #define GEN6_TD_TS_EMSK 0x8030 #define GEN6_EU_CTL 0x8800 #define GEN6_EU_CTL_SELECT_SHIFT 16 #define GEN6_EU_CTL_DATA_MUX_SHIFT 8 #define GEN6_EU_ATT_0 0x8810 #define GEN6_EU_ATT_1 0x8814 #define GEN6_EU_ATT_DATA_0 0x8820 #define GEN6_EU_ATT_DATA_1 0x8824 #define GEN6_EU_ATT_CLR_0 0x8830 #define GEN6_EU_ATT_CLR_1 0x8834 #define GEN6_EU_RDATA 0x8840 #define GEN6_PIPE_CONTROL GEN6_3D(3, 2, 0) #define GEN6_3DPRIMITIVE GEN6_3D(3, 3, 0) #define GEN6_3DSTATE_CLEAR_PARAMS GEN6_3D(3, 1, 0x10) /* DW1 */ # define GEN6_3DSTATE_DEPTH_CLEAR_VALID (1 << 15) /* for GEN6+ */ #define GEN6_3DSTATE_SAMPLER_STATE_POINTERS GEN6_3D(3, 0, 0x02) # define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_PS (1 << 12) # define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_GS (1 << 9) # define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_VS (1 << 8) #define GEN6_3DSTATE_URB GEN6_3D(3, 0, 0x05) /* DW1 */ # define GEN6_3DSTATE_URB_VS_SIZE_SHIFT 16 # define GEN6_3DSTATE_URB_VS_ENTRIES_SHIFT 0 /* DW2 */ # define GEN6_3DSTATE_URB_GS_ENTRIES_SHIFT 8 # define GEN6_3DSTATE_URB_GS_SIZE_SHIFT 0 #define GEN6_3DSTATE_VIEWPORT_STATE_POINTERS GEN6_3D(3, 0, 0x0d) # define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_CC (1 << 12) # define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_SF (1 << 11) # define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_CLIP (1 << 10) #define GEN6_3DSTATE_CC_STATE_POINTERS GEN6_3D(3, 0, 0x0e) #define GEN6_3DSTATE_VS GEN6_3D(3, 0, 0x10) #define GEN6_3DSTATE_GS GEN6_3D(3, 0, 0x11) /* DW4 */ # define GEN6_3DSTATE_GS_DISPATCH_START_GRF_SHIFT 0 #define GEN6_3DSTATE_CLIP GEN6_3D(3, 0, 0x12) #define GEN6_3DSTATE_SF GEN6_3D(3, 0, 0x13) /* DW1 */ # define GEN6_3DSTATE_SF_NUM_OUTPUTS_SHIFT 22 # define GEN6_3DSTATE_SF_URB_ENTRY_READ_LENGTH_SHIFT 11 # define GEN6_3DSTATE_SF_URB_ENTRY_READ_OFFSET_SHIFT 4 /* DW2 */ /* DW3 */ # define GEN6_3DSTATE_SF_CULL_BOTH (0 << 29) # define GEN6_3DSTATE_SF_CULL_NONE (1 << 29) # define GEN6_3DSTATE_SF_CULL_FRONT (2 << 29) # define GEN6_3DSTATE_SF_CULL_BACK (3 << 29) /* DW4 */ # define GEN6_3DSTATE_SF_TRI_PROVOKE_SHIFT 29 # define GEN6_3DSTATE_SF_LINE_PROVOKE_SHIFT 27 # define GEN6_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT 25 #define GEN6_3DSTATE_WM GEN6_3D(3, 0, 0x14) /* DW2 */ # define GEN6_3DSTATE_WM_SAMPLER_COUNT_SHIFT 27 # define GEN6_3DSTATE_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT 18 /* DW4 */ # define GEN6_3DSTATE_WM_DISPATCH_START_GRF_0_SHIFT 16 /* DW5 */ # define GEN6_3DSTATE_WM_MAX_THREADS_SHIFT 25 # define GEN6_3DSTATE_WM_DISPATCH_ENABLE (1 << 19) # define GEN6_3DSTATE_WM_16_DISPATCH_ENABLE (1 << 1) # define GEN6_3DSTATE_WM_8_DISPATCH_ENABLE (1 << 0) /* DW6 */ # define GEN6_3DSTATE_WM_NUM_SF_OUTPUTS_SHIFT 20 # define GEN6_3DSTATE_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 15) # define GEN6_3DSTATE_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC (1 << 14) # define GEN6_3DSTATE_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC (1 << 13) # define GEN6_3DSTATE_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 12) # define GEN6_3DSTATE_WM_PERSPECTIVE_CENTROID_BARYCENTRIC (1 << 11) # define GEN6_3DSTATE_WM_PERSPECTIVE_PIXEL_BARYCENTRIC (1 << 10) #define GEN6_3DSTATE_CONSTANT_VS GEN6_3D(3, 0, 0x15) #define GEN6_3DSTATE_CONSTANT_GS GEN6_3D(3, 0, 0x16) #define GEN6_3DSTATE_CONSTANT_PS GEN6_3D(3, 0, 0x17) #define GEN6_3DSTATE_SAMPLE_MASK GEN6_3D(3, 0, 0x18) #define GEN6_3DSTATE_MULTISAMPLE GEN6_3D(3, 1, 0x0d) /* DW1 */ # define GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER (0 << 4) # define GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_UPPER_LEFT (1 << 4) # define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_1 (0 << 1) # define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_4 (2 << 1) # define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_8 (3 << 1) #define PIPELINE_SELECT_3D 0 #define PIPELINE_SELECT_MEDIA 1 #define UF0_CS_REALLOC (1 << 13) #define UF0_VFE_REALLOC (1 << 12) #define UF0_SF_REALLOC (1 << 11) #define UF0_CLIP_REALLOC (1 << 10) #define UF0_GS_REALLOC (1 << 9) #define UF0_VS_REALLOC (1 << 8) #define UF1_CLIP_FENCE_SHIFT 20 #define UF1_GS_FENCE_SHIFT 10 #define UF1_VS_FENCE_SHIFT 0 #define UF2_CS_FENCE_SHIFT 20 #define UF2_VFE_FENCE_SHIFT 10 #define UF2_SF_FENCE_SHIFT 0 /* for GEN6_STATE_BASE_ADDRESS */ #define BASE_ADDRESS_MODIFY (1 << 0) #define BUFFER_SIZE_MODIFY (1 << 0) /* for GEN6_3DSTATE_PIPELINED_POINTERS */ #define GEN6_GS_DISABLE 0 #define GEN6_GS_ENABLE 1 #define GEN6_CLIP_DISABLE 0 #define GEN6_CLIP_ENABLE 1 /* for GEN6_PIPE_CONTROL */ #define GEN6_PIPE_CONTROL_NOWRITE (0 << 14) #define GEN6_PIPE_CONTROL_WRITE_QWORD (1 << 14) #define GEN6_PIPE_CONTROL_WRITE_DEPTH (2 << 14) #define GEN6_PIPE_CONTROL_WRITE_TIME (3 << 14) #define GEN6_PIPE_CONTROL_DEPTH_STALL (1 << 13) #define GEN6_PIPE_CONTROL_WC_FLUSH (1 << 12) #define GEN6_PIPE_CONTROL_IS_FLUSH (1 << 11) #define GEN6_PIPE_CONTROL_TC_FLUSH (1 << 10) #define GEN6_PIPE_CONTROL_NOTIFY_ENABLE (1 << 8) #define GEN6_PIPE_CONTROL_GLOBAL_GTT (1 << 2) #define GEN6_PIPE_CONTROL_LOCAL_PGTT (0 << 2) #define GEN6_PIPE_CONTROL_DEPTH_CACHE_FLUSH (1 << 0) /* 3DPRIMITIVE bits */ #define GEN6_3DPRIMITIVE_VERTEX_SEQUENTIAL (0 << 15) #define GEN6_3DPRIMITIVE_VERTEX_RANDOM (1 << 15) /* Primitive types are in gen6_defines.h */ #define GEN6_3DPRIMITIVE_TOPOLOGY_SHIFT 10 #define GEN6_SVG_CTL 0x7400 #define GEN6_SVG_CTL_GS_BA (0 << 8) #define GEN6_SVG_CTL_SS_BA (1 << 8) #define GEN6_SVG_CTL_IO_BA (2 << 8) #define GEN6_SVG_CTL_GS_AUB (3 << 8) #define GEN6_SVG_CTL_IO_AUB (4 << 8) #define GEN6_SVG_CTL_SIP (5 << 8) #define GEN6_SVG_RDATA 0x7404 #define GEN6_SVG_WORK_CTL 0x7408 #define GEN6_VF_CTL 0x7500 #define GEN6_VF_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN6_VF_CTL_SNAPSHOT_MUX_SELECT_THREADID (0 << 8) #define GEN6_VF_CTL_SNAPSHOT_MUX_SELECT_VF_DEBUG (1 << 8) #define GEN6_VF_CTL_SNAPSHOT_TYPE_VERTEX_SEQUENCE (0 << 4) #define GEN6_VF_CTL_SNAPSHOT_TYPE_VERTEX_INDEX (1 << 4) #define GEN6_VF_CTL_SKIP_INITIAL_PRIMITIVES (1 << 3) #define GEN6_VF_CTL_MAX_PRIMITIVES_LIMIT_ENABLE (1 << 2) #define GEN6_VF_CTL_VERTEX_RANGE_LIMIT_ENABLE (1 << 1) #define GEN6_VF_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN6_VF_STRG_VAL 0x7504 #define GEN6_VF_STR_VL_OVR 0x7508 #define GEN6_VF_VC_OVR 0x750c #define GEN6_VF_STR_PSKIP 0x7510 #define GEN6_VF_MAX_PRIM 0x7514 #define GEN6_VF_RDATA 0x7518 #define GEN6_VS_CTL 0x7600 #define GEN6_VS_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN6_VS_CTL_SNAPSHOT_MUX_VERTEX_0 (0 << 8) #define GEN6_VS_CTL_SNAPSHOT_MUX_VERTEX_1 (1 << 8) #define GEN6_VS_CTL_SNAPSHOT_MUX_VALID_COUNT (2 << 8) #define GEN6_VS_CTL_SNAPSHOT_MUX_VS_KERNEL_POINTER (3 << 8) #define GEN6_VS_CTL_SNAPSHOT_ALL_THREADS (1 << 2) #define GEN6_VS_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) #define GEN6_VS_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN6_VS_STRG_VAL 0x7604 #define GEN6_VS_RDATA 0x7608 #define GEN6_SF_CTL 0x7b00 #define GEN6_SF_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_0_FF_ID (0 << 8) #define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_0_REL_COUNT (1 << 8) #define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_1_FF_ID (2 << 8) #define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_1_REL_COUNT (3 << 8) #define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_2_FF_ID (4 << 8) #define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_2_REL_COUNT (5 << 8) #define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_COUNT (6 << 8) #define GEN6_SF_CTL_SNAPSHOT_MUX_SF_KERNEL_POINTER (7 << 8) #define GEN6_SF_CTL_MIN_MAX_PRIMITIVE_RANGE_ENABLE (1 << 4) #define GEN6_SF_CTL_DEBUG_CLIP_RECTANGLE_ENABLE (1 << 3) #define GEN6_SF_CTL_SNAPSHOT_ALL_THREADS (1 << 2) #define GEN6_SF_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) #define GEN6_SF_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN6_SF_STRG_VAL 0x7b04 #define GEN6_SF_RDATA 0x7b18 #define GEN6_WIZ_CTL 0x7c00 #define GEN6_WIZ_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN6_WIZ_CTL_SUBSPAN_INSTANCE_SHIFT 16 #define GEN6_WIZ_CTL_SNAPSHOT_MUX_WIZ_KERNEL_POINTER (0 << 8) #define GEN6_WIZ_CTL_SNAPSHOT_MUX_SUBSPAN_INSTANCE (1 << 8) #define GEN6_WIZ_CTL_SNAPSHOT_MUX_PRIMITIVE_SEQUENCE (2 << 8) #define GEN6_WIZ_CTL_SINGLE_SUBSPAN_DISPATCH (1 << 6) #define GEN6_WIZ_CTL_IGNORE_COLOR_SCOREBOARD_STALLS (1 << 5) #define GEN6_WIZ_CTL_ENABLE_SUBSPAN_INSTANCE_COMPARE (1 << 4) #define GEN6_WIZ_CTL_USE_UPSTREAM_SNAPSHOT_FLAG (1 << 3) #define GEN6_WIZ_CTL_SNAPSHOT_ALL_THREADS (1 << 2) #define GEN6_WIZ_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) #define GEN6_WIZ_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN6_WIZ_STRG_VAL 0x7c04 #define GEN6_WIZ_RDATA 0x7c18 #define GEN6_TS_CTL 0x7e00 #define GEN6_TS_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN6_TS_CTL_SNAPSHOT_MESSAGE_ERROR (0 << 8) #define GEN6_TS_CTL_SNAPSHOT_INTERFACE_DESCRIPTOR (3 << 8) #define GEN6_TS_CTL_SNAPSHOT_ALL_CHILD_THREADS (1 << 2) #define GEN6_TS_CTL_SNAPSHOT_ALL_ROOT_THREADS (1 << 1) #define GEN6_TS_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN6_TS_STRG_VAL 0x7e04 #define GEN6_TS_RDATA 0x7e08 #define GEN6_TD_CTL_MUX_SHIFT 8 #define GEN6_TD_CTL_EXTERNAL_HALT_R0_DEBUG_MATCH (1 << 7) #define GEN6_TD_CTL_FORCE_EXTERNAL_HALT (1 << 6) #define GEN6_TD_CTL_EXCEPTION_MASK_OVERRIDE (1 << 5) #define GEN6_TD_CTL_FORCE_THREAD_BREAKPOINT_ENABLE (1 << 4) #define GEN6_TD_CTL_BREAKPOINT_ENABLE (1 << 2) #define GEN6_TD_CTL2 0x8004 #define GEN6_TD_CTL2_ILLEGAL_OPCODE_EXCEPTION_OVERRIDE (1 << 28) #define GEN6_TD_CTL2_MASKSTACK_EXCEPTION_OVERRIDE (1 << 26) #define GEN6_TD_CTL2_SOFTWARE_EXCEPTION_OVERRIDE (1 << 25) #define GEN6_TD_CTL2_ACTIVE_THREAD_LIMIT_SHIFT 16 #define GEN6_TD_CTL2_ACTIVE_THREAD_LIMIT_ENABLE (1 << 8) #define GEN6_TD_CTL2_THREAD_SPAWNER_EXECUTION_MASK_ENABLE (1 << 7) #define GEN6_TD_CTL2_WIZ_EXECUTION_MASK_ENABLE (1 << 6) #define GEN6_TD_CTL2_SF_EXECUTION_MASK_ENABLE (1 << 5) #define GEN6_TD_CTL2_CLIPPER_EXECUTION_MASK_ENABLE (1 << 4) #define GEN6_TD_CTL2_GS_EXECUTION_MASK_ENABLE (1 << 3) #define GEN6_TD_CTL2_VS_EXECUTION_MASK_ENABLE (1 << 0) #define GEN6_TD_VF_VS_EMSK 0x8008 #define GEN6_TD_GS_EMSK 0x800c #define GEN6_TD_CLIP_EMSK 0x8010 #define GEN6_TD_SF_EMSK 0x8014 #define GEN6_TD_WIZ_EMSK 0x8018 #define GEN6_TD_0_6_EHTRG_VAL 0x801c #define GEN6_TD_0_7_EHTRG_VAL 0x8020 #define GEN6_TD_0_6_EHTRG_MSK 0x8024 #define GEN6_TD_0_7_EHTRG_MSK 0x8028 #define GEN6_TD_RDATA 0x802c #define GEN6_TD_TS_EMSK 0x8030 #define GEN6_EU_CTL 0x8800 #define GEN6_EU_CTL_SELECT_SHIFT 16 #define GEN6_EU_CTL_DATA_MUX_SHIFT 8 #define GEN6_EU_ATT_0 0x8810 #define GEN6_EU_ATT_1 0x8814 #define GEN6_EU_ATT_DATA_0 0x8820 #define GEN6_EU_ATT_DATA_1 0x8824 #define GEN6_EU_ATT_CLR_0 0x8830 #define GEN6_EU_ATT_CLR_1 0x8834 #define GEN6_EU_RDATA 0x8840 /* 3D state: */ #define _3DOP_3DSTATE_PIPELINED 0x0 #define _3DOP_3DSTATE_NONPIPELINED 0x1 #define _3DOP_3DCONTROL 0x2 #define _3DOP_3DPRIMITIVE 0x3 #define _3DSTATE_PIPELINED_POINTERS 0x00 #define _3DSTATE_BINDING_TABLE_POINTERS 0x01 #define _3DSTATE_VERTEX_BUFFERS 0x08 #define _3DSTATE_VERTEX_ELEMENTS 0x09 #define _3DSTATE_INDEX_BUFFER 0x0A #define _3DSTATE_VF_STATISTICS 0x0B #define _3DSTATE_DRAWING_RECTANGLE 0x00 #define _3DSTATE_CONSTANT_COLOR 0x01 #define _3DSTATE_SAMPLER_PALETTE_LOAD 0x02 #define _3DSTATE_CHROMA_KEY 0x04 #define _3DSTATE_DEPTH_BUFFER 0x05 #define _3DSTATE_POLY_STIPPLE_OFFSET 0x06 #define _3DSTATE_POLY_STIPPLE_PATTERN 0x07 #define _3DSTATE_LINE_STIPPLE 0x08 #define _3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP 0x09 #define _3DCONTROL 0x00 #define _3DPRIMITIVE 0x00 #define _3DPRIM_POINTLIST 0x01 #define _3DPRIM_LINELIST 0x02 #define _3DPRIM_LINESTRIP 0x03 #define _3DPRIM_TRILIST 0x04 #define _3DPRIM_TRISTRIP 0x05 #define _3DPRIM_TRIFAN 0x06 #define _3DPRIM_QUADLIST 0x07 #define _3DPRIM_QUADSTRIP 0x08 #define _3DPRIM_LINELIST_ADJ 0x09 #define _3DPRIM_LINESTRIP_ADJ 0x0A #define _3DPRIM_TRILIST_ADJ 0x0B #define _3DPRIM_TRISTRIP_ADJ 0x0C #define _3DPRIM_TRISTRIP_REVERSE 0x0D #define _3DPRIM_POLYGON 0x0E #define _3DPRIM_RECTLIST 0x0F #define _3DPRIM_LINELOOP 0x10 #define _3DPRIM_POINTLIST_BF 0x11 #define _3DPRIM_LINESTRIP_CONT 0x12 #define _3DPRIM_LINESTRIP_BF 0x13 #define _3DPRIM_LINESTRIP_CONT_BF 0x14 #define _3DPRIM_TRIFAN_NOSTIPPLE 0x15 #define _3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL 0 #define _3DPRIM_VERTEXBUFFER_ACCESS_RANDOM 1 #define GEN6_ANISORATIO_2 0 #define GEN6_ANISORATIO_4 1 #define GEN6_ANISORATIO_6 2 #define GEN6_ANISORATIO_8 3 #define GEN6_ANISORATIO_10 4 #define GEN6_ANISORATIO_12 5 #define GEN6_ANISORATIO_14 6 #define GEN6_ANISORATIO_16 7 #define GEN6_BLENDFACTOR_ONE 0x1 #define GEN6_BLENDFACTOR_SRC_COLOR 0x2 #define GEN6_BLENDFACTOR_SRC_ALPHA 0x3 #define GEN6_BLENDFACTOR_DST_ALPHA 0x4 #define GEN6_BLENDFACTOR_DST_COLOR 0x5 #define GEN6_BLENDFACTOR_SRC_ALPHA_SATURATE 0x6 #define GEN6_BLENDFACTOR_CONST_COLOR 0x7 #define GEN6_BLENDFACTOR_CONST_ALPHA 0x8 #define GEN6_BLENDFACTOR_SRC1_COLOR 0x9 #define GEN6_BLENDFACTOR_SRC1_ALPHA 0x0A #define GEN6_BLENDFACTOR_ZERO 0x11 #define GEN6_BLENDFACTOR_INV_SRC_COLOR 0x12 #define GEN6_BLENDFACTOR_INV_SRC_ALPHA 0x13 #define GEN6_BLENDFACTOR_INV_DST_ALPHA 0x14 #define GEN6_BLENDFACTOR_INV_DST_COLOR 0x15 #define GEN6_BLENDFACTOR_INV_CONST_COLOR 0x17 #define GEN6_BLENDFACTOR_INV_CONST_ALPHA 0x18 #define GEN6_BLENDFACTOR_INV_SRC1_COLOR 0x19 #define GEN6_BLENDFACTOR_INV_SRC1_ALPHA 0x1A #define GEN6_BLENDFUNCTION_ADD 0 #define GEN6_BLENDFUNCTION_SUBTRACT 1 #define GEN6_BLENDFUNCTION_REVERSE_SUBTRACT 2 #define GEN6_BLENDFUNCTION_MIN 3 #define GEN6_BLENDFUNCTION_MAX 4 #define GEN6_ALPHATEST_FORMAT_UNORM8 0 #define GEN6_ALPHATEST_FORMAT_FLOAT32 1 #define GEN6_CHROMAKEY_KILL_ON_ANY_MATCH 0 #define GEN6_CHROMAKEY_REPLACE_BLACK 1 #define GEN6_CLIP_API_OGL 0 #define GEN6_CLIP_API_DX 1 #define GEN6_CLIPMODE_NORMAL 0 #define GEN6_CLIPMODE_CLIP_ALL 1 #define GEN6_CLIPMODE_CLIP_NON_REJECTED 2 #define GEN6_CLIPMODE_REJECT_ALL 3 #define GEN6_CLIPMODE_ACCEPT_ALL 4 #define GEN6_CLIP_NDCSPACE 0 #define GEN6_CLIP_SCREENSPACE 1 #define GEN6_COMPAREFUNCTION_ALWAYS 0 #define GEN6_COMPAREFUNCTION_NEVER 1 #define GEN6_COMPAREFUNCTION_LESS 2 #define GEN6_COMPAREFUNCTION_EQUAL 3 #define GEN6_COMPAREFUNCTION_LEQUAL 4 #define GEN6_COMPAREFUNCTION_GREATER 5 #define GEN6_COMPAREFUNCTION_NOTEQUAL 6 #define GEN6_COMPAREFUNCTION_GEQUAL 7 #define GEN6_COVERAGE_PIXELS_HALF 0 #define GEN6_COVERAGE_PIXELS_1 1 #define GEN6_COVERAGE_PIXELS_2 2 #define GEN6_COVERAGE_PIXELS_4 3 #define GEN6_CULLMODE_BOTH 0 #define GEN6_CULLMODE_NONE 1 #define GEN6_CULLMODE_FRONT 2 #define GEN6_CULLMODE_BACK 3 #define GEN6_DEFAULTCOLOR_R8G8B8A8_UNORM 0 #define GEN6_DEFAULTCOLOR_R32G32B32A32_FLOAT 1 #define GEN6_DEPTHFORMAT_D32_FLOAT_S8X24_UINT 0 #define GEN6_DEPTHFORMAT_D32_FLOAT 1 #define GEN6_DEPTHFORMAT_D24_UNORM_S8_UINT 2 #define GEN6_DEPTHFORMAT_D16_UNORM 5 #define GEN6_FLOATING_POINT_IEEE_754 0 #define GEN6_FLOATING_POINT_NON_IEEE_754 1 #define GEN6_FRONTWINDING_CW 0 #define GEN6_FRONTWINDING_CCW 1 #define GEN6_INDEX_BYTE 0 #define GEN6_INDEX_WORD 1 #define GEN6_INDEX_DWORD 2 #define GEN6_LOGICOPFUNCTION_CLEAR 0 #define GEN6_LOGICOPFUNCTION_NOR 1 #define GEN6_LOGICOPFUNCTION_AND_INVERTED 2 #define GEN6_LOGICOPFUNCTION_COPY_INVERTED 3 #define GEN6_LOGICOPFUNCTION_AND_REVERSE 4 #define GEN6_LOGICOPFUNCTION_INVERT 5 #define GEN6_LOGICOPFUNCTION_XOR 6 #define GEN6_LOGICOPFUNCTION_NAND 7 #define GEN6_LOGICOPFUNCTION_AND 8 #define GEN6_LOGICOPFUNCTION_EQUIV 9 #define GEN6_LOGICOPFUNCTION_NOOP 10 #define GEN6_LOGICOPFUNCTION_OR_INVERTED 11 #define GEN6_LOGICOPFUNCTION_COPY 12 #define GEN6_LOGICOPFUNCTION_OR_REVERSE 13 #define GEN6_LOGICOPFUNCTION_OR 14 #define GEN6_LOGICOPFUNCTION_SET 15 #define GEN6_MAPFILTER_NEAREST 0x0 #define GEN6_MAPFILTER_LINEAR 0x1 #define GEN6_MAPFILTER_ANISOTROPIC 0x2 #define GEN6_MIPFILTER_NONE 0 #define GEN6_MIPFILTER_NEAREST 1 #define GEN6_MIPFILTER_LINEAR 3 #define GEN6_POLYGON_FRONT_FACING 0 #define GEN6_POLYGON_BACK_FACING 1 #define GEN6_PREFILTER_ALWAYS 0x0 #define GEN6_PREFILTER_NEVER 0x1 #define GEN6_PREFILTER_LESS 0x2 #define GEN6_PREFILTER_EQUAL 0x3 #define GEN6_PREFILTER_LEQUAL 0x4 #define GEN6_PREFILTER_GREATER 0x5 #define GEN6_PREFILTER_NOTEQUAL 0x6 #define GEN6_PREFILTER_GEQUAL 0x7 #define GEN6_PROVOKING_VERTEX_0 0 #define GEN6_PROVOKING_VERTEX_1 1 #define GEN6_PROVOKING_VERTEX_2 2 #define GEN6_RASTRULE_UPPER_LEFT 0 #define GEN6_RASTRULE_UPPER_RIGHT 1 #define GEN6_RENDERTARGET_CLAMPRANGE_UNORM 0 #define GEN6_RENDERTARGET_CLAMPRANGE_SNORM 1 #define GEN6_RENDERTARGET_CLAMPRANGE_FORMAT 2 #define GEN6_STENCILOP_KEEP 0 #define GEN6_STENCILOP_ZERO 1 #define GEN6_STENCILOP_REPLACE 2 #define GEN6_STENCILOP_INCRSAT 3 #define GEN6_STENCILOP_DECRSAT 4 #define GEN6_STENCILOP_INCR 5 #define GEN6_STENCILOP_DECR 6 #define GEN6_STENCILOP_INVERT 7 #define GEN6_SURFACE_MIPMAPLAYOUT_BELOW 0 #define GEN6_SURFACE_MIPMAPLAYOUT_RIGHT 1 #define GEN6_SURFACEFORMAT_R32G32B32A32_FLOAT 0x000 #define GEN6_SURFACEFORMAT_R32G32B32A32_SINT 0x001 #define GEN6_SURFACEFORMAT_R32G32B32A32_UINT 0x002 #define GEN6_SURFACEFORMAT_R32G32B32A32_UNORM 0x003 #define GEN6_SURFACEFORMAT_R32G32B32A32_SNORM 0x004 #define GEN6_SURFACEFORMAT_R64G64_FLOAT 0x005 #define GEN6_SURFACEFORMAT_R32G32B32X32_FLOAT 0x006 #define GEN6_SURFACEFORMAT_R32G32B32A32_SSCALED 0x007 #define GEN6_SURFACEFORMAT_R32G32B32A32_USCALED 0x008 #define GEN6_SURFACEFORMAT_R32G32B32_FLOAT 0x040 #define GEN6_SURFACEFORMAT_R32G32B32_SINT 0x041 #define GEN6_SURFACEFORMAT_R32G32B32_UINT 0x042 #define GEN6_SURFACEFORMAT_R32G32B32_UNORM 0x043 #define GEN6_SURFACEFORMAT_R32G32B32_SNORM 0x044 #define GEN6_SURFACEFORMAT_R32G32B32_SSCALED 0x045 #define GEN6_SURFACEFORMAT_R32G32B32_USCALED 0x046 #define GEN6_SURFACEFORMAT_R16G16B16A16_UNORM 0x080 #define GEN6_SURFACEFORMAT_R16G16B16A16_SNORM 0x081 #define GEN6_SURFACEFORMAT_R16G16B16A16_SINT 0x082 #define GEN6_SURFACEFORMAT_R16G16B16A16_UINT 0x083 #define GEN6_SURFACEFORMAT_R16G16B16A16_FLOAT 0x084 #define GEN6_SURFACEFORMAT_R32G32_FLOAT 0x085 #define GEN6_SURFACEFORMAT_R32G32_SINT 0x086 #define GEN6_SURFACEFORMAT_R32G32_UINT 0x087 #define GEN6_SURFACEFORMAT_R32_FLOAT_X8X24_TYPELESS 0x088 #define GEN6_SURFACEFORMAT_X32_TYPELESS_G8X24_UINT 0x089 #define GEN6_SURFACEFORMAT_L32A32_FLOAT 0x08A #define GEN6_SURFACEFORMAT_R32G32_UNORM 0x08B #define GEN6_SURFACEFORMAT_R32G32_SNORM 0x08C #define GEN6_SURFACEFORMAT_R64_FLOAT 0x08D #define GEN6_SURFACEFORMAT_R16G16B16X16_UNORM 0x08E #define GEN6_SURFACEFORMAT_R16G16B16X16_FLOAT 0x08F #define GEN6_SURFACEFORMAT_A32X32_FLOAT 0x090 #define GEN6_SURFACEFORMAT_L32X32_FLOAT 0x091 #define GEN6_SURFACEFORMAT_I32X32_FLOAT 0x092 #define GEN6_SURFACEFORMAT_R16G16B16A16_SSCALED 0x093 #define GEN6_SURFACEFORMAT_R16G16B16A16_USCALED 0x094 #define GEN6_SURFACEFORMAT_R32G32_SSCALED 0x095 #define GEN6_SURFACEFORMAT_R32G32_USCALED 0x096 #define GEN6_SURFACEFORMAT_B8G8R8A8_UNORM 0x0C0 #define GEN6_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB 0x0C1 #define GEN6_SURFACEFORMAT_R10G10B10A2_UNORM 0x0C2 #define GEN6_SURFACEFORMAT_R10G10B10A2_UNORM_SRGB 0x0C3 #define GEN6_SURFACEFORMAT_R10G10B10A2_UINT 0x0C4 #define GEN6_SURFACEFORMAT_R10G10B10_SNORM_A2_UNORM 0x0C5 #define GEN6_SURFACEFORMAT_R8G8B8A8_UNORM 0x0C7 #define GEN6_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB 0x0C8 #define GEN6_SURFACEFORMAT_R8G8B8A8_SNORM 0x0C9 #define GEN6_SURFACEFORMAT_R8G8B8A8_SINT 0x0CA #define GEN6_SURFACEFORMAT_R8G8B8A8_UINT 0x0CB #define GEN6_SURFACEFORMAT_R16G16_UNORM 0x0CC #define GEN6_SURFACEFORMAT_R16G16_SNORM 0x0CD #define GEN6_SURFACEFORMAT_R16G16_SINT 0x0CE #define GEN6_SURFACEFORMAT_R16G16_UINT 0x0CF #define GEN6_SURFACEFORMAT_R16G16_FLOAT 0x0D0 #define GEN6_SURFACEFORMAT_B10G10R10A2_UNORM 0x0D1 #define GEN6_SURFACEFORMAT_B10G10R10A2_UNORM_SRGB 0x0D2 #define GEN6_SURFACEFORMAT_R11G11B10_FLOAT 0x0D3 #define GEN6_SURFACEFORMAT_R32_SINT 0x0D6 #define GEN6_SURFACEFORMAT_R32_UINT 0x0D7 #define GEN6_SURFACEFORMAT_R32_FLOAT 0x0D8 #define GEN6_SURFACEFORMAT_R24_UNORM_X8_TYPELESS 0x0D9 #define GEN6_SURFACEFORMAT_X24_TYPELESS_G8_UINT 0x0DA #define GEN6_SURFACEFORMAT_L16A16_UNORM 0x0DF #define GEN6_SURFACEFORMAT_I24X8_UNORM 0x0E0 #define GEN6_SURFACEFORMAT_L24X8_UNORM 0x0E1 #define GEN6_SURFACEFORMAT_A24X8_UNORM 0x0E2 #define GEN6_SURFACEFORMAT_I32_FLOAT 0x0E3 #define GEN6_SURFACEFORMAT_L32_FLOAT 0x0E4 #define GEN6_SURFACEFORMAT_A32_FLOAT 0x0E5 #define GEN6_SURFACEFORMAT_B8G8R8X8_UNORM 0x0E9 #define GEN6_SURFACEFORMAT_B8G8R8X8_UNORM_SRGB 0x0EA #define GEN6_SURFACEFORMAT_R8G8B8X8_UNORM 0x0EB #define GEN6_SURFACEFORMAT_R8G8B8X8_UNORM_SRGB 0x0EC #define GEN6_SURFACEFORMAT_R9G9B9E5_SHAREDEXP 0x0ED #define GEN6_SURFACEFORMAT_B10G10R10X2_UNORM 0x0EE #define GEN6_SURFACEFORMAT_L16A16_FLOAT 0x0F0 #define GEN6_SURFACEFORMAT_R32_UNORM 0x0F1 #define GEN6_SURFACEFORMAT_R32_SNORM 0x0F2 #define GEN6_SURFACEFORMAT_R10G10B10X2_USCALED 0x0F3 #define GEN6_SURFACEFORMAT_R8G8B8A8_SSCALED 0x0F4 #define GEN6_SURFACEFORMAT_R8G8B8A8_USCALED 0x0F5 #define GEN6_SURFACEFORMAT_R16G16_SSCALED 0x0F6 #define GEN6_SURFACEFORMAT_R16G16_USCALED 0x0F7 #define GEN6_SURFACEFORMAT_R32_SSCALED 0x0F8 #define GEN6_SURFACEFORMAT_R32_USCALED 0x0F9 #define GEN6_SURFACEFORMAT_B5G6R5_UNORM 0x100 #define GEN6_SURFACEFORMAT_B5G6R5_UNORM_SRGB 0x101 #define GEN6_SURFACEFORMAT_B5G5R5A1_UNORM 0x102 #define GEN6_SURFACEFORMAT_B5G5R5A1_UNORM_SRGB 0x103 #define GEN6_SURFACEFORMAT_B4G4R4A4_UNORM 0x104 #define GEN6_SURFACEFORMAT_B4G4R4A4_UNORM_SRGB 0x105 #define GEN6_SURFACEFORMAT_R8G8_UNORM 0x106 #define GEN6_SURFACEFORMAT_R8G8_SNORM 0x107 #define GEN6_SURFACEFORMAT_R8G8_SINT 0x108 #define GEN6_SURFACEFORMAT_R8G8_UINT 0x109 #define GEN6_SURFACEFORMAT_R16_UNORM 0x10A #define GEN6_SURFACEFORMAT_R16_SNORM 0x10B #define GEN6_SURFACEFORMAT_R16_SINT 0x10C #define GEN6_SURFACEFORMAT_R16_UINT 0x10D #define GEN6_SURFACEFORMAT_R16_FLOAT 0x10E #define GEN6_SURFACEFORMAT_I16_UNORM 0x111 #define GEN6_SURFACEFORMAT_L16_UNORM 0x112 #define GEN6_SURFACEFORMAT_A16_UNORM 0x113 #define GEN6_SURFACEFORMAT_L8A8_UNORM 0x114 #define GEN6_SURFACEFORMAT_I16_FLOAT 0x115 #define GEN6_SURFACEFORMAT_L16_FLOAT 0x116 #define GEN6_SURFACEFORMAT_A16_FLOAT 0x117 #define GEN6_SURFACEFORMAT_R5G5_SNORM_B6_UNORM 0x119 #define GEN6_SURFACEFORMAT_B5G5R5X1_UNORM 0x11A #define GEN6_SURFACEFORMAT_B5G5R5X1_UNORM_SRGB 0x11B #define GEN6_SURFACEFORMAT_R8G8_SSCALED 0x11C #define GEN6_SURFACEFORMAT_R8G8_USCALED 0x11D #define GEN6_SURFACEFORMAT_R16_SSCALED 0x11E #define GEN6_SURFACEFORMAT_R16_USCALED 0x11F #define GEN6_SURFACEFORMAT_R8_UNORM 0x140 #define GEN6_SURFACEFORMAT_R8_SNORM 0x141 #define GEN6_SURFACEFORMAT_R8_SINT 0x142 #define GEN6_SURFACEFORMAT_R8_UINT 0x143 #define GEN6_SURFACEFORMAT_A8_UNORM 0x144 #define GEN6_SURFACEFORMAT_I8_UNORM 0x145 #define GEN6_SURFACEFORMAT_L8_UNORM 0x146 #define GEN6_SURFACEFORMAT_P4A4_UNORM 0x147 #define GEN6_SURFACEFORMAT_A4P4_UNORM 0x148 #define GEN6_SURFACEFORMAT_R8_SSCALED 0x149 #define GEN6_SURFACEFORMAT_R8_USCALED 0x14A #define GEN6_SURFACEFORMAT_R1_UINT 0x181 #define GEN6_SURFACEFORMAT_YCRCB_NORMAL 0x182 #define GEN6_SURFACEFORMAT_YCRCB_SWAPUVY 0x183 #define GEN6_SURFACEFORMAT_BC1_UNORM 0x186 #define GEN6_SURFACEFORMAT_BC2_UNORM 0x187 #define GEN6_SURFACEFORMAT_BC3_UNORM 0x188 #define GEN6_SURFACEFORMAT_BC4_UNORM 0x189 #define GEN6_SURFACEFORMAT_BC5_UNORM 0x18A #define GEN6_SURFACEFORMAT_BC1_UNORM_SRGB 0x18B #define GEN6_SURFACEFORMAT_BC2_UNORM_SRGB 0x18C #define GEN6_SURFACEFORMAT_BC3_UNORM_SRGB 0x18D #define GEN6_SURFACEFORMAT_MONO8 0x18E #define GEN6_SURFACEFORMAT_YCRCB_SWAPUV 0x18F #define GEN6_SURFACEFORMAT_YCRCB_SWAPY 0x190 #define GEN6_SURFACEFORMAT_DXT1_RGB 0x191 #define GEN6_SURFACEFORMAT_FXT1 0x192 #define GEN6_SURFACEFORMAT_R8G8B8_UNORM 0x193 #define GEN6_SURFACEFORMAT_R8G8B8_SNORM 0x194 #define GEN6_SURFACEFORMAT_R8G8B8_SSCALED 0x195 #define GEN6_SURFACEFORMAT_R8G8B8_USCALED 0x196 #define GEN6_SURFACEFORMAT_R64G64B64A64_FLOAT 0x197 #define GEN6_SURFACEFORMAT_R64G64B64_FLOAT 0x198 #define GEN6_SURFACEFORMAT_BC4_SNORM 0x199 #define GEN6_SURFACEFORMAT_BC5_SNORM 0x19A #define GEN6_SURFACEFORMAT_R16G16B16_UNORM 0x19C #define GEN6_SURFACEFORMAT_R16G16B16_SNORM 0x19D #define GEN6_SURFACEFORMAT_R16G16B16_SSCALED 0x19E #define GEN6_SURFACEFORMAT_R16G16B16_USCALED 0x19F #define GEN6_SURFACERETURNFORMAT_FLOAT32 0 #define GEN6_SURFACERETURNFORMAT_S1 1 #define GEN6_SURFACE_1D 0 #define GEN6_SURFACE_2D 1 #define GEN6_SURFACE_3D 2 #define GEN6_SURFACE_CUBE 3 #define GEN6_SURFACE_BUFFER 4 #define GEN6_SURFACE_NULL 7 #define GEN6_BORDER_COLOR_MODE_DEFAULT 0 #define GEN6_BORDER_COLOR_MODE_LEGACY 1 #define GEN6_TEXCOORDMODE_WRAP 0 #define GEN6_TEXCOORDMODE_MIRROR 1 #define GEN6_TEXCOORDMODE_CLAMP 2 #define GEN6_TEXCOORDMODE_CUBE 3 #define GEN6_TEXCOORDMODE_CLAMP_BORDER 4 #define GEN6_TEXCOORDMODE_MIRROR_ONCE 5 #define GEN6_THREAD_PRIORITY_NORMAL 0 #define GEN6_THREAD_PRIORITY_HIGH 1 #define GEN6_TILEWALK_XMAJOR 0 #define GEN6_TILEWALK_YMAJOR 1 #define GEN6_VERTEX_SUBPIXEL_PRECISION_8BITS 0 #define GEN6_VERTEX_SUBPIXEL_PRECISION_4BITS 1 #define GEN6_VERTEXBUFFER_ACCESS_VERTEXDATA 0 #define GEN6_VERTEXBUFFER_ACCESS_INSTANCEDATA 1 #define GEN6_VFCOMPONENT_NOSTORE 0 #define GEN6_VFCOMPONENT_STORE_SRC 1 #define GEN6_VFCOMPONENT_STORE_0 2 #define GEN6_VFCOMPONENT_STORE_1_FLT 3 #define GEN6_VFCOMPONENT_STORE_1_INT 4 #define GEN6_VFCOMPONENT_STORE_VID 5 #define GEN6_VFCOMPONENT_STORE_IID 6 #define GEN6_VFCOMPONENT_STORE_PID 7 /* Execution Unit (EU) defines */ #define GEN6_ALIGN_1 0 #define GEN6_ALIGN_16 1 #define GEN6_ADDRESS_DIRECT 0 #define GEN6_ADDRESS_REGISTER_INDIRECT_REGISTER 1 #define GEN6_CHANNEL_X 0 #define GEN6_CHANNEL_Y 1 #define GEN6_CHANNEL_Z 2 #define GEN6_CHANNEL_W 3 #define GEN6_COMPRESSION_NONE 0 #define GEN6_COMPRESSION_2NDHALF 1 #define GEN6_COMPRESSION_COMPRESSED 2 #define GEN6_CONDITIONAL_NONE 0 #define GEN6_CONDITIONAL_Z 1 #define GEN6_CONDITIONAL_NZ 2 #define GEN6_CONDITIONAL_EQ 1 /* Z */ #define GEN6_CONDITIONAL_NEQ 2 /* NZ */ #define GEN6_CONDITIONAL_G 3 #define GEN6_CONDITIONAL_GE 4 #define GEN6_CONDITIONAL_L 5 #define GEN6_CONDITIONAL_LE 6 #define GEN6_CONDITIONAL_C 7 #define GEN6_CONDITIONAL_O 8 #define GEN6_DEBUG_NONE 0 #define GEN6_DEBUG_BREAKPOINT 1 #define GEN6_DEPENDENCY_NORMAL 0 #define GEN6_DEPENDENCY_NOTCLEARED 1 #define GEN6_DEPENDENCY_NOTCHECKED 2 #define GEN6_DEPENDENCY_DISABLE 3 #define GEN6_EXECUTE_1 0 #define GEN6_EXECUTE_2 1 #define GEN6_EXECUTE_4 2 #define GEN6_EXECUTE_8 3 #define GEN6_EXECUTE_16 4 #define GEN6_EXECUTE_32 5 #define GEN6_HORIZONTAL_STRIDE_0 0 #define GEN6_HORIZONTAL_STRIDE_1 1 #define GEN6_HORIZONTAL_STRIDE_2 2 #define GEN6_HORIZONTAL_STRIDE_4 3 #define GEN6_INSTRUCTION_NORMAL 0 #define GEN6_INSTRUCTION_SATURATE 1 #define GEN6_MASK_ENABLE 0 #define GEN6_MASK_DISABLE 1 #define GEN6_OPCODE_MOV 1 #define GEN6_OPCODE_SEL 2 #define GEN6_OPCODE_NOT 4 #define GEN6_OPCODE_AND 5 #define GEN6_OPCODE_OR 6 #define GEN6_OPCODE_XOR 7 #define GEN6_OPCODE_SHR 8 #define GEN6_OPCODE_SHL 9 #define GEN6_OPCODE_RSR 10 #define GEN6_OPCODE_RSL 11 #define GEN6_OPCODE_ASR 12 #define GEN6_OPCODE_CMP 16 #define GEN6_OPCODE_JMPI 32 #define GEN6_OPCODE_IF 34 #define GEN6_OPCODE_IFF 35 #define GEN6_OPCODE_ELSE 36 #define GEN6_OPCODE_ENDIF 37 #define GEN6_OPCODE_DO 38 #define GEN6_OPCODE_WHILE 39 #define GEN6_OPCODE_BREAK 40 #define GEN6_OPCODE_CONTINUE 41 #define GEN6_OPCODE_HALT 42 #define GEN6_OPCODE_MSAVE 44 #define GEN6_OPCODE_MRESTORE 45 #define GEN6_OPCODE_PUSH 46 #define GEN6_OPCODE_POP 47 #define GEN6_OPCODE_WAIT 48 #define GEN6_OPCODE_SEND 49 #define GEN6_OPCODE_ADD 64 #define GEN6_OPCODE_MUL 65 #define GEN6_OPCODE_AVG 66 #define GEN6_OPCODE_FRC 67 #define GEN6_OPCODE_RNDU 68 #define GEN6_OPCODE_RNDD 69 #define GEN6_OPCODE_RNDE 70 #define GEN6_OPCODE_RNDZ 71 #define GEN6_OPCODE_MAC 72 #define GEN6_OPCODE_MACH 73 #define GEN6_OPCODE_LZD 74 #define GEN6_OPCODE_SAD2 80 #define GEN6_OPCODE_SADA2 81 #define GEN6_OPCODE_DP4 84 #define GEN6_OPCODE_DPH 85 #define GEN6_OPCODE_DP3 86 #define GEN6_OPCODE_DP2 87 #define GEN6_OPCODE_DPA2 88 #define GEN6_OPCODE_LINE 89 #define GEN6_OPCODE_NOP 126 #define GEN6_PREDICATE_NONE 0 #define GEN6_PREDICATE_NORMAL 1 #define GEN6_PREDICATE_ALIGN1_ANYV 2 #define GEN6_PREDICATE_ALIGN1_ALLV 3 #define GEN6_PREDICATE_ALIGN1_ANY2H 4 #define GEN6_PREDICATE_ALIGN1_ALL2H 5 #define GEN6_PREDICATE_ALIGN1_ANY4H 6 #define GEN6_PREDICATE_ALIGN1_ALL4H 7 #define GEN6_PREDICATE_ALIGN1_ANY8H 8 #define GEN6_PREDICATE_ALIGN1_ALL8H 9 #define GEN6_PREDICATE_ALIGN1_ANY16H 10 #define GEN6_PREDICATE_ALIGN1_ALL16H 11 #define GEN6_PREDICATE_ALIGN16_REPLICATE_X 2 #define GEN6_PREDICATE_ALIGN16_REPLICATE_Y 3 #define GEN6_PREDICATE_ALIGN16_REPLICATE_Z 4 #define GEN6_PREDICATE_ALIGN16_REPLICATE_W 5 #define GEN6_PREDICATE_ALIGN16_ANY4H 6 #define GEN6_PREDICATE_ALIGN16_ALL4H 7 #define GEN6_ARCHITECTURE_REGISTER_FILE 0 #define GEN6_GENERAL_REGISTER_FILE 1 #define GEN6_MESSAGE_REGISTER_FILE 2 #define GEN6_IMMEDIATE_VALUE 3 #define GEN6_REGISTER_TYPE_UD 0 #define GEN6_REGISTER_TYPE_D 1 #define GEN6_REGISTER_TYPE_UW 2 #define GEN6_REGISTER_TYPE_W 3 #define GEN6_REGISTER_TYPE_UB 4 #define GEN6_REGISTER_TYPE_B 5 #define GEN6_REGISTER_TYPE_VF 5 /* packed float vector, immediates only? */ #define GEN6_REGISTER_TYPE_HF 6 #define GEN6_REGISTER_TYPE_V 6 /* packed int vector, immediates only, uword dest only */ #define GEN6_REGISTER_TYPE_F 7 #define GEN6_ARF_NULL 0x00 #define GEN6_ARF_ADDRESS 0x10 #define GEN6_ARF_ACCUMULATOR 0x20 #define GEN6_ARF_FLAG 0x30 #define GEN6_ARF_MASK 0x40 #define GEN6_ARF_MASK_STACK 0x50 #define GEN6_ARF_MASK_STACK_DEPTH 0x60 #define GEN6_ARF_STATE 0x70 #define GEN6_ARF_CONTROL 0x80 #define GEN6_ARF_NOTIFICATION_COUNT 0x90 #define GEN6_ARF_IP 0xA0 #define GEN6_AMASK 0 #define GEN6_IMASK 1 #define GEN6_LMASK 2 #define GEN6_CMASK 3 #define GEN6_THREAD_NORMAL 0 #define GEN6_THREAD_ATOMIC 1 #define GEN6_THREAD_SWITCH 2 #define GEN6_VERTICAL_STRIDE_0 0 #define GEN6_VERTICAL_STRIDE_1 1 #define GEN6_VERTICAL_STRIDE_2 2 #define GEN6_VERTICAL_STRIDE_4 3 #define GEN6_VERTICAL_STRIDE_8 4 #define GEN6_VERTICAL_STRIDE_16 5 #define GEN6_VERTICAL_STRIDE_32 6 #define GEN6_VERTICAL_STRIDE_64 7 #define GEN6_VERTICAL_STRIDE_128 8 #define GEN6_VERTICAL_STRIDE_256 9 #define GEN6_VERTICAL_STRIDE_ONE_DIMENSIONAL 0xF #define GEN6_WIDTH_1 0 #define GEN6_WIDTH_2 1 #define GEN6_WIDTH_4 2 #define GEN6_WIDTH_8 3 #define GEN6_WIDTH_16 4 #define GEN6_STATELESS_BUFFER_BOUNDARY_1K 0 #define GEN6_STATELESS_BUFFER_BOUNDARY_2K 1 #define GEN6_STATELESS_BUFFER_BOUNDARY_4K 2 #define GEN6_STATELESS_BUFFER_BOUNDARY_8K 3 #define GEN6_STATELESS_BUFFER_BOUNDARY_16K 4 #define GEN6_STATELESS_BUFFER_BOUNDARY_32K 5 #define GEN6_STATELESS_BUFFER_BOUNDARY_64K 6 #define GEN6_STATELESS_BUFFER_BOUNDARY_128K 7 #define GEN6_STATELESS_BUFFER_BOUNDARY_256K 8 #define GEN6_STATELESS_BUFFER_BOUNDARY_512K 9 #define GEN6_STATELESS_BUFFER_BOUNDARY_1M 10 #define GEN6_STATELESS_BUFFER_BOUNDARY_2M 11 #define GEN6_POLYGON_FACING_FRONT 0 #define GEN6_POLYGON_FACING_BACK 1 #define GEN6_MESSAGE_TARGET_NULL 0 #define GEN6_MESSAGE_TARGET_MATH 1 #define GEN6_MESSAGE_TARGET_SAMPLER 2 #define GEN6_MESSAGE_TARGET_GATEWAY 3 #define GEN6_MESSAGE_TARGET_DATAPORT_READ 4 #define GEN6_MESSAGE_TARGET_DATAPORT_WRITE 5 #define GEN6_MESSAGE_TARGET_URB 6 #define GEN6_MESSAGE_TARGET_THREAD_SPAWNER 7 #define GEN6_SAMPLER_RETURN_FORMAT_FLOAT32 0 #define GEN6_SAMPLER_RETURN_FORMAT_UINT32 2 #define GEN6_SAMPLER_RETURN_FORMAT_SINT32 3 #define GEN6_SAMPLER_MESSAGE_SIMD8_SAMPLE 0 #define GEN6_SAMPLER_MESSAGE_SIMD16_SAMPLE 0 #define GEN6_SAMPLER_MESSAGE_SIMD16_SAMPLE_BIAS 0 #define GEN6_SAMPLER_MESSAGE_SIMD8_KILLPIX 1 #define GEN6_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_LOD 1 #define GEN6_SAMPLER_MESSAGE_SIMD16_SAMPLE_LOD 1 #define GEN6_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_GRADIENTS 2 #define GEN6_SAMPLER_MESSAGE_SIMD8_SAMPLE_GRADIENTS 2 #define GEN6_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_COMPARE 0 #define GEN6_SAMPLER_MESSAGE_SIMD16_SAMPLE_COMPARE 2 #define GEN6_SAMPLER_MESSAGE_SIMD4X2_RESINFO 2 #define GEN6_SAMPLER_MESSAGE_SIMD8_RESINFO 2 #define GEN6_SAMPLER_MESSAGE_SIMD16_RESINFO 2 #define GEN6_SAMPLER_MESSAGE_SIMD4X2_LD 3 #define GEN6_SAMPLER_MESSAGE_SIMD8_LD 3 #define GEN6_SAMPLER_MESSAGE_SIMD16_LD 3 #define GEN6_DATAPORT_OWORD_BLOCK_1_OWORDLOW 0 #define GEN6_DATAPORT_OWORD_BLOCK_1_OWORDHIGH 1 #define GEN6_DATAPORT_OWORD_BLOCK_2_OWORDS 2 #define GEN6_DATAPORT_OWORD_BLOCK_4_OWORDS 3 #define GEN6_DATAPORT_OWORD_BLOCK_8_OWORDS 4 #define GEN6_DATAPORT_OWORD_DUAL_BLOCK_1OWORD 0 #define GEN6_DATAPORT_OWORD_DUAL_BLOCK_4OWORDS 2 #define GEN6_DATAPORT_DWORD_SCATTERED_BLOCK_8DWORDS 2 #define GEN6_DATAPORT_DWORD_SCATTERED_BLOCK_16DWORDS 3 #define GEN6_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ 0 #define GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ 1 #define GEN6_DATAPORT_READ_MESSAGE_DWORD_BLOCK_READ 2 #define GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ 3 #define GEN6_DATAPORT_READ_TARGET_DATA_CACHE 0 #define GEN6_DATAPORT_READ_TARGET_RENDER_CACHE 1 #define GEN6_DATAPORT_READ_TARGET_SAMPLER_CACHE 2 #define GEN6_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE 0 #define GEN6_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE_REPLICATED 1 #define GEN6_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN01 2 #define GEN6_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN23 3 #define GEN6_DATAPORT_RENDER_TARGET_WRITE_SIMD8_SINGLE_SOURCE_SUBSPAN01 4 #define GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE 0 #define GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE 1 #define GEN6_DATAPORT_WRITE_MESSAGE_DWORD_BLOCK_WRITE 2 #define GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE 3 #define GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE 4 #define GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VERTEX_BUFFER_WRITE 5 #define GEN6_DATAPORT_WRITE_MESSAGE_FLUSH_RENDER_CACHE 7 #define GEN6_MATH_FUNCTION_INV 1 #define GEN6_MATH_FUNCTION_LOG 2 #define GEN6_MATH_FUNCTION_EXP 3 #define GEN6_MATH_FUNCTION_SQRT 4 #define GEN6_MATH_FUNCTION_RSQ 5 #define GEN6_MATH_FUNCTION_SIN 6 /* was 7 */ #define GEN6_MATH_FUNCTION_COS 7 /* was 8 */ #define GEN6_MATH_FUNCTION_SINCOS 8 /* was 6 */ #define GEN6_MATH_FUNCTION_TAN 9 #define GEN6_MATH_FUNCTION_POW 10 #define GEN6_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER 11 #define GEN6_MATH_FUNCTION_INT_DIV_QUOTIENT 12 #define GEN6_MATH_FUNCTION_INT_DIV_REMAINDER 13 #define GEN6_MATH_INTEGER_UNSIGNED 0 #define GEN6_MATH_INTEGER_SIGNED 1 #define GEN6_MATH_PRECISION_FULL 0 #define GEN6_MATH_PRECISION_PARTIAL 1 #define GEN6_MATH_SATURATE_NONE 0 #define GEN6_MATH_SATURATE_SATURATE 1 #define GEN6_MATH_DATA_VECTOR 0 #define GEN6_MATH_DATA_SCALAR 1 #define GEN6_URB_OPCODE_WRITE 0 #define GEN6_URB_SWIZZLE_NONE 0 #define GEN6_URB_SWIZZLE_INTERLEAVE 1 #define GEN6_URB_SWIZZLE_TRANSPOSE 2 #define GEN6_SCRATCH_SPACE_SIZE_1K 0 #define GEN6_SCRATCH_SPACE_SIZE_2K 1 #define GEN6_SCRATCH_SPACE_SIZE_4K 2 #define GEN6_SCRATCH_SPACE_SIZE_8K 3 #define GEN6_SCRATCH_SPACE_SIZE_16K 4 #define GEN6_SCRATCH_SPACE_SIZE_32K 5 #define GEN6_SCRATCH_SPACE_SIZE_64K 6 #define GEN6_SCRATCH_SPACE_SIZE_128K 7 #define GEN6_SCRATCH_SPACE_SIZE_256K 8 #define GEN6_SCRATCH_SPACE_SIZE_512K 9 #define GEN6_SCRATCH_SPACE_SIZE_1M 10 #define GEN6_SCRATCH_SPACE_SIZE_2M 11 /* The hardware supports two different modes for border color. The * default (OpenGL) mode uses floating-point color channels, while the * legacy mode uses 4 bytes. * * More significantly, the legacy mode respects the components of the * border color for channels not present in the source, (whereas the * default mode will ignore the border color's alpha channel and use * alpha==1 for an RGB source, for example). * * The legacy mode matches the semantics specified by the Render * extension. */ struct gen6_sampler_default_border_color { float color[4]; }; struct gen6_sampler_legacy_border_color { uint8_t color[4]; }; struct gen6_sampler_state { struct { uint32_t shadow_function:3; uint32_t lod_bias:11; uint32_t min_filter:3; uint32_t mag_filter:3; uint32_t mip_filter:2; uint32_t base_level:5; uint32_t pad:1; uint32_t lod_preclamp:1; uint32_t border_color_mode:1; uint32_t pad0:1; uint32_t disable:1; } ss0; struct { uint32_t r_wrap_mode:3; uint32_t t_wrap_mode:3; uint32_t s_wrap_mode:3; uint32_t pad:3; uint32_t max_lod:10; uint32_t min_lod:10; } ss1; struct { uint32_t border_color; } ss2; struct { uint32_t pad:19; uint32_t max_aniso:3; uint32_t chroma_key_mode:1; uint32_t chroma_key_index:2; uint32_t chroma_key_enable:1; uint32_t monochrome_filter_width:3; uint32_t monochrome_filter_height:3; } ss3; }; struct gen6_blend_state { struct { uint32_t dest_blend_factor:5; uint32_t source_blend_factor:5; uint32_t pad3:1; uint32_t blend_func:3; uint32_t pad2:1; uint32_t ia_dest_blend_factor:5; uint32_t ia_source_blend_factor:5; uint32_t pad1:1; uint32_t ia_blend_func:3; uint32_t pad0:1; uint32_t ia_blend_enable:1; uint32_t blend_enable:1; } blend0; struct { uint32_t post_blend_clamp_enable:1; uint32_t pre_blend_clamp_enable:1; uint32_t clamp_range:2; uint32_t pad0:4; uint32_t x_dither_offset:2; uint32_t y_dither_offset:2; uint32_t dither_enable:1; uint32_t alpha_test_func:3; uint32_t alpha_test_enable:1; uint32_t pad1:1; uint32_t logic_op_func:4; uint32_t logic_op_enable:1; uint32_t pad2:1; uint32_t write_disable_b:1; uint32_t write_disable_g:1; uint32_t write_disable_r:1; uint32_t write_disable_a:1; uint32_t pad3:1; uint32_t alpha_to_coverage_dither:1; uint32_t alpha_to_one:1; uint32_t alpha_to_coverage:1; } blend1; }; struct gen6_color_calc_state { struct { uint32_t alpha_test_format:1; uint32_t pad0:14; uint32_t round_disable:1; uint32_t bf_stencil_ref:8; uint32_t stencil_ref:8; } cc0; union { float alpha_ref_f; struct { uint32_t ui:8; uint32_t pad0:24; } alpha_ref_fi; } cc1; float constant_r; float constant_g; float constant_b; float constant_a; }; struct gen6_depth_stencil_state { struct { uint32_t pad0:3; uint32_t bf_stencil_pass_depth_pass_op:3; uint32_t bf_stencil_pass_depth_fail_op:3; uint32_t bf_stencil_fail_op:3; uint32_t bf_stencil_func:3; uint32_t bf_stencil_enable:1; uint32_t pad1:2; uint32_t stencil_write_enable:1; uint32_t stencil_pass_depth_pass_op:3; uint32_t stencil_pass_depth_fail_op:3; uint32_t stencil_fail_op:3; uint32_t stencil_func:3; uint32_t stencil_enable:1; } ds0; struct { uint32_t bf_stencil_write_mask:8; uint32_t bf_stencil_test_mask:8; uint32_t stencil_write_mask:8; uint32_t stencil_test_mask:8; } ds1; struct { uint32_t pad0:26; uint32_t depth_write_enable:1; uint32_t depth_test_func:3; uint32_t pad1:1; uint32_t depth_test_enable:1; } ds2; }; struct gen6_surface_state { struct { uint32_t cube_pos_z:1; uint32_t cube_neg_z:1; uint32_t cube_pos_y:1; uint32_t cube_neg_y:1; uint32_t cube_pos_x:1; uint32_t cube_neg_x:1; uint32_t pad:3; uint32_t render_cache_read_mode:1; uint32_t mipmap_layout_mode:1; uint32_t vert_line_stride_ofs:1; uint32_t vert_line_stride:1; uint32_t color_blend:1; uint32_t writedisable_blue:1; uint32_t writedisable_green:1; uint32_t writedisable_red:1; uint32_t writedisable_alpha:1; uint32_t surface_format:9; uint32_t data_return_format:1; uint32_t pad0:1; uint32_t surface_type:3; } ss0; struct { uint32_t base_addr; } ss1; struct { uint32_t render_target_rotation:2; uint32_t mip_count:4; uint32_t width:13; uint32_t height:13; } ss2; struct { uint32_t tile_walk:1; uint32_t tiled_surface:1; uint32_t pad:1; uint32_t pitch:18; uint32_t depth:11; } ss3; struct { uint32_t pad:19; uint32_t min_array_elt:9; uint32_t min_lod:4; } ss4; struct { uint32_t pad:20; uint32_t y_offset:4; uint32_t pad2:1; uint32_t x_offset:7; } ss5; }; struct gen6_cc_viewport { float min_depth; float max_depth; }; typedef enum { SAMPLER_FILTER_NEAREST = 0, SAMPLER_FILTER_BILINEAR, FILTER_COUNT } sampler_filter_t; typedef enum { SAMPLER_EXTEND_NONE = 0, SAMPLER_EXTEND_REPEAT, SAMPLER_EXTEND_PAD, SAMPLER_EXTEND_REFLECT, EXTEND_COUNT } sampler_extend_t; #endif intel-gpu-tools-1.14/lib/igt_fb.c0000644000175000017500000007657212665336131013615 00000000000000/* * Copyright © 2013,2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * Damien Lespiau */ #define _GNU_SOURCE #include #include #include "drmtest.h" #include "igt_fb.h" #include "ioctl_wrappers.h" #include "intel_chipset.h" /** * SECTION:igt_fb * @short_description: Framebuffer handling and drawing library * @title: Framebuffer * @include: igt.h * * This library contains helper functions for handling kms framebuffer objects * using #igt_fb structures to track all the metadata. igt_create_fb() creates * a basic framebuffer and igt_remove_fb() cleans everything up again. * * It also supports drawing using the cairo library and provides some simplified * helper functions to easily draw test patterns. The main function to create a * cairo drawing context for a framebuffer object is igt_get_cairo_ctx(). * * Finally it also pulls in the drm fourcc headers and provides some helper * functions to work with these pixel format codes. */ /* drm fourcc/cairo format maps */ #define DF(did, cid, _bpp, _depth) \ { DRM_FORMAT_##did, CAIRO_FORMAT_##cid, # did, _bpp, _depth } static struct format_desc_struct { uint32_t drm_id; cairo_format_t cairo_id; const char *name; int bpp; int depth; } format_desc[] = { DF(RGB565, RGB16_565, 16, 16), //DF(RGB888, INVALID, 24, 24), DF(XRGB8888, RGB24, 32, 24), DF(XRGB2101010, RGB30, 32, 30), DF(ARGB8888, ARGB32, 32, 32), }; #undef DF #define for_each_format(f) \ for (f = format_desc; f - format_desc < ARRAY_SIZE(format_desc); f++) static void igt_get_fb_tile_size(int fd, uint64_t tiling, int fb_bpp, unsigned *width_ret, unsigned *height_ret) { uint32_t devid = intel_get_drm_devid(fd); switch (tiling) { case LOCAL_DRM_FORMAT_MOD_NONE: *width_ret = 64; *height_ret = 1; break; case LOCAL_I915_FORMAT_MOD_X_TILED: if (intel_gen(devid) == 2) { *width_ret = 128; *height_ret = 16; } else { *width_ret = 512; *height_ret = 8; } break; case LOCAL_I915_FORMAT_MOD_Y_TILED: if (IS_915(devid)) *width_ret = 512; else *width_ret = 128; *height_ret = 32; break; case LOCAL_I915_FORMAT_MOD_Yf_TILED: switch (fb_bpp) { case 8: *width_ret = 64; *height_ret = 64; break; case 16: case 32: *width_ret = 128; *height_ret = 32; break; case 64: case 128: *width_ret = 256; *height_ret = 16; break; default: igt_assert(false); } break; default: igt_assert(false); } } /** * igt_calc_fb_size: * @fd: the DRM file descriptor * @width: width of the framebuffer in pixels * @height: height of the framebuffer in pixels * @bpp: bytes per pixel of the framebuffer * @tiling: tiling layout of the framebuffer (as framebuffer modifier) * @size_ret: returned size for the framebuffer * @stride_ret: returned stride for the framebuffer * * This function returns valid stride and size values for a framebuffer with the * specified parameters. */ void igt_calc_fb_size(int fd, int width, int height, int bpp, uint64_t tiling, unsigned *size_ret, unsigned *stride_ret) { unsigned int tile_width, tile_height, stride, size; int byte_width = width * (bpp / 8); igt_get_fb_tile_size(fd, tiling, bpp, &tile_width, &tile_height); if (intel_gen(intel_get_drm_devid(fd)) <= 3 && tiling != LOCAL_DRM_FORMAT_MOD_NONE) { int v; /* Round the tiling up to the next power-of-two and the region * up to the next pot fence size so that this works on all * generations. * * This can still fail if the framebuffer is too large to be * tiled. But then that failure is expected. */ v = width * bpp / 8; for (stride = 512; stride < v; stride *= 2) ; v = stride * height; for (size = 1024*1024; size < v; size *= 2) ; } else { stride = ALIGN(byte_width, tile_width); size = stride * ALIGN(height, tile_height); } *stride_ret = stride; *size_ret = size; } /* helpers to create nice-looking framebuffers */ static int create_bo_for_fb(int fd, int width, int height, int bpp, uint64_t tiling, unsigned bo_size, unsigned bo_stride, uint32_t *gem_handle_ret, unsigned *size_ret, unsigned *stride_ret) { uint32_t gem_handle; int ret = 0; unsigned size, stride; igt_calc_fb_size(fd, width, height, bpp, tiling, &size, &stride); if (bo_size == 0) bo_size = size; if (bo_stride == 0) bo_stride = stride; gem_handle = gem_create(fd, bo_size); if (tiling == LOCAL_I915_FORMAT_MOD_X_TILED) ret = __gem_set_tiling(fd, gem_handle, I915_TILING_X, bo_stride); *stride_ret = bo_stride; *size_ret = bo_size; *gem_handle_ret = gem_handle; return ret; } /** * igt_paint_color: * @cr: cairo drawing context * @x: pixel x-coordination of the fill rectangle * @y: pixel y-coordination of the fill rectangle * @w: width of the fill rectangle * @h: height of the fill rectangle * @r: red value to use as fill color * @g: green value to use as fill color * @b: blue value to use as fill color * * This functions draws a solid rectangle with the given color using the drawing * context @cr. */ void igt_paint_color(cairo_t *cr, int x, int y, int w, int h, double r, double g, double b) { cairo_rectangle(cr, x, y, w, h); cairo_set_source_rgb(cr, r, g, b); cairo_fill(cr); } /** * igt_paint_color_alpha: * @cr: cairo drawing context * @x: pixel x-coordination of the fill rectangle * @y: pixel y-coordination of the fill rectangle * @w: width of the fill rectangle * @h: height of the fill rectangle * @r: red value to use as fill color * @g: green value to use as fill color * @b: blue value to use as fill color * @a: alpha value to use as fill color * * This functions draws a rectangle with the given color and alpha values using * the drawing context @cr. */ void igt_paint_color_alpha(cairo_t *cr, int x, int y, int w, int h, double r, double g, double b, double a) { cairo_rectangle(cr, x, y, w, h); cairo_set_source_rgba(cr, r, g, b, a); cairo_fill(cr); } /** * igt_paint_color_gradient: * @cr: cairo drawing context * @x: pixel x-coordination of the fill rectangle * @y: pixel y-coordination of the fill rectangle * @w: width of the fill rectangle * @h: height of the fill rectangle * @r: red value to use as fill color * @g: green value to use as fill color * @b: blue value to use as fill color * * This functions draws a gradient into the rectangle which fades in from black * to the given values using the drawing context @cr. */ void igt_paint_color_gradient(cairo_t *cr, int x, int y, int w, int h, int r, int g, int b) { cairo_pattern_t *pat; pat = cairo_pattern_create_linear(x, y, x + w, y + h); cairo_pattern_add_color_stop_rgba(pat, 1, 0, 0, 0, 1); cairo_pattern_add_color_stop_rgba(pat, 0, r, g, b, 1); cairo_rectangle(cr, x, y, w, h); cairo_set_source(cr, pat); cairo_fill(cr); cairo_pattern_destroy(pat); } static void paint_test_patterns(cairo_t *cr, int width, int height) { double gr_height, gr_width; int x, y; y = height * 0.10; gr_width = width * 0.75; gr_height = height * 0.08; x = (width / 2) - (gr_width / 2); igt_paint_color_gradient(cr, x, y, gr_width, gr_height, 1, 0, 0); y += gr_height; igt_paint_color_gradient(cr, x, y, gr_width, gr_height, 0, 1, 0); y += gr_height; igt_paint_color_gradient(cr, x, y, gr_width, gr_height, 0, 0, 1); y += gr_height; igt_paint_color_gradient(cr, x, y, gr_width, gr_height, 1, 1, 1); } /** * igt_cairo_printf_line: * @cr: cairo drawing context * @align: text alignment * @yspacing: additional y-direction feed after this line * @fmt: format string * @...: optional arguments used in the format string * * This is a little helper to draw text onto framebuffers. All the initial setup * (like setting the font size and the moving to the starting position) still * needs to be done manually with explicit cairo calls on @cr. * * Returns: * The width of the drawn text. */ int igt_cairo_printf_line(cairo_t *cr, enum igt_text_align align, double yspacing, const char *fmt, ...) { double x, y, xofs, yofs; cairo_text_extents_t extents; char *text; va_list ap; int ret; va_start(ap, fmt); ret = vasprintf(&text, fmt, ap); igt_assert(ret >= 0); va_end(ap); cairo_text_extents(cr, text, &extents); xofs = yofs = 0; if (align & align_right) xofs = -extents.width; else if (align & align_hcenter) xofs = -extents.width / 2; if (align & align_top) yofs = extents.height; else if (align & align_vcenter) yofs = extents.height / 2; cairo_get_current_point(cr, &x, &y); if (xofs || yofs) cairo_rel_move_to(cr, xofs, yofs); cairo_text_path(cr, text); cairo_set_source_rgb(cr, 0, 0, 0); cairo_stroke_preserve(cr); cairo_set_source_rgb(cr, 1, 1, 1); cairo_fill(cr); cairo_move_to(cr, x, y + extents.height + yspacing); free(text); return extents.width; } static void paint_marker(cairo_t *cr, int x, int y) { enum igt_text_align align; int xoff, yoff; cairo_move_to(cr, x, y - 20); cairo_line_to(cr, x, y + 20); cairo_move_to(cr, x - 20, y); cairo_line_to(cr, x + 20, y); cairo_new_sub_path(cr); cairo_arc(cr, x, y, 10, 0, M_PI * 2); cairo_set_line_width(cr, 4); cairo_set_source_rgb(cr, 0, 0, 0); cairo_stroke_preserve(cr); cairo_set_source_rgb(cr, 1, 1, 1); cairo_set_line_width(cr, 2); cairo_stroke(cr); xoff = x ? -20 : 20; align = x ? align_right : align_left; yoff = y ? -20 : 20; align |= y ? align_bottom : align_top; cairo_move_to(cr, x + xoff, y + yoff); cairo_set_font_size(cr, 18); igt_cairo_printf_line(cr, align, 0, "(%d, %d)", x, y); } /** * igt_paint_test_pattern: * @cr: cairo drawing context * @width: width of the visible area * @height: height of the visible area * * This functions draws an entire set of test patterns for the given visible * area using the drawing context @cr. This is useful for manual visual * inspection of displayed framebuffers. * * The test patterns include * - corner markers to check for over/underscan and * - a set of color and b/w gradients. */ void igt_paint_test_pattern(cairo_t *cr, int width, int height) { paint_test_patterns(cr, width, height); cairo_set_line_cap(cr, CAIRO_LINE_CAP_SQUARE); /* Paint corner markers */ paint_marker(cr, 0, 0); paint_marker(cr, width, 0); paint_marker(cr, 0, height); paint_marker(cr, width, height); igt_assert(!cairo_status(cr)); } static cairo_status_t stdio_read_func(void *closure, unsigned char* data, unsigned int size) { if (fread(data, 1, size, (FILE*)closure) != size) return CAIRO_STATUS_READ_ERROR; return CAIRO_STATUS_SUCCESS; } /** * igt_paint_image: * @cr: cairo drawing context * @filename: filename of the png image to draw * @dst_x: pixel x-coordination of the destination rectangle * @dst_y: pixel y-coordination of the destination rectangle * @dst_width: width of the destination rectangle * @dst_height: height of the destination rectangle * * This function can be used to draw a scaled version of the supplied png image, * which is loaded from the package data directory. */ void igt_paint_image(cairo_t *cr, const char *filename, int dst_x, int dst_y, int dst_width, int dst_height) { cairo_surface_t *image; int img_width, img_height; double scale_x, scale_y; FILE* f; f = igt_fopen_data(filename); image = cairo_image_surface_create_from_png_stream(&stdio_read_func, f); igt_assert(cairo_surface_status(image) == CAIRO_STATUS_SUCCESS); img_width = cairo_image_surface_get_width(image); img_height = cairo_image_surface_get_height(image); scale_x = (double)dst_width / img_width; scale_y = (double)dst_height / img_height; cairo_save(cr); cairo_translate(cr, dst_x, dst_y); cairo_scale(cr, scale_x, scale_y); cairo_set_source_surface(cr, image, 0, 0); cairo_paint(cr); cairo_surface_destroy(image); cairo_restore(cr); fclose(f); } /** * igt_create_fb_with_bo_size: * @fd: open i915 drm file descriptor * @width: width of the framebuffer in pixel * @height: height of the framebuffer in pixel * @format: drm fourcc pixel format code * @tiling: tiling layout of the framebuffer (as framebuffer modifier) * @fb: pointer to an #igt_fb structure * @bo_size: size of the backing bo (0 for automatic size) * @bo_stride: stride of the backing bo (0 for automatic stride) * * This function allocates a gem buffer object suitable to back a framebuffer * with the requested properties and then wraps it up in a drm framebuffer * object of the requested size. All metadata is stored in @fb. * * The backing storage of the framebuffer is filled with all zeros, i.e. black * for rgb pixel formats. * * Returns: * The kms id of the created framebuffer. */ unsigned int igt_create_fb_with_bo_size(int fd, int width, int height, uint32_t format, uint64_t tiling, struct igt_fb *fb, unsigned bo_size, unsigned bo_stride) { uint32_t fb_id; int bpp; memset(fb, 0, sizeof(*fb)); bpp = igt_drm_format_to_bpp(format); igt_debug("%s(width=%d, height=%d, format=0x%x [bpp=%d], tiling=0x%"PRIx64", size=%d)\n", __func__, width, height, format, bpp, tiling, bo_size); do_or_die(create_bo_for_fb(fd, width, height, bpp, tiling, bo_size, bo_stride, &fb->gem_handle, &fb->size, &fb->stride)); igt_debug("%s(handle=%d, pitch=%d)\n", __func__, fb->gem_handle, fb->stride); if (tiling != LOCAL_DRM_FORMAT_MOD_NONE && tiling != LOCAL_I915_FORMAT_MOD_X_TILED) { do_or_die(__kms_addfb(fd, fb->gem_handle, width, height, fb->stride, format, tiling, LOCAL_DRM_MODE_FB_MODIFIERS, &fb_id)); } else { uint32_t handles[4]; uint32_t pitches[4]; uint32_t offsets[4]; memset(handles, 0, sizeof(handles)); memset(pitches, 0, sizeof(pitches)); memset(offsets, 0, sizeof(offsets)); handles[0] = fb->gem_handle; pitches[0] = fb->stride; do_or_die(drmModeAddFB2(fd, width, height, format, handles, pitches, offsets, &fb_id, 0)); } fb->width = width; fb->height = height; fb->tiling = tiling; fb->drm_format = format; fb->fb_id = fb_id; return fb_id; } /** * igt_create_fb: * @fd: open i915 drm file descriptor * @width: width of the framebuffer in pixel * @height: height of the framebuffer in pixel * @format: drm fourcc pixel format code * @tiling: tiling layout of the framebuffer * @fb: pointer to an #igt_fb structure * * This function allocates a gem buffer object suitable to back a framebuffer * with the requested properties and then wraps it up in a drm framebuffer * object. All metadata is stored in @fb. * * The backing storage of the framebuffer is filled with all zeros, i.e. black * for rgb pixel formats. * * Returns: * The kms id of the created framebuffer. */ unsigned int igt_create_fb(int fd, int width, int height, uint32_t format, uint64_t tiling, struct igt_fb *fb) { return igt_create_fb_with_bo_size(fd, width, height, format, tiling, fb, 0, 0); } /** * igt_create_color_fb: * @fd: open i915 drm file descriptor * @width: width of the framebuffer in pixel * @height: height of the framebuffer in pixel * @format: drm fourcc pixel format code * @tiling: tiling layout of the framebuffer * @r: red value to use as fill color * @g: green value to use as fill color * @b: blue value to use as fill color * @fb: pointer to an #igt_fb structure * * This function allocates a gem buffer object suitable to back a framebuffer * with the requested properties and then wraps it up in a drm framebuffer * object. All metadata is stored in @fb. * * Compared to igt_create_fb() this function also fills the entire framebuffer * with the given color, which is useful for some simple pipe crc based tests. * * Returns: * The kms id of the created framebuffer on success or a negative error code on * failure. */ unsigned int igt_create_color_fb(int fd, int width, int height, uint32_t format, uint64_t tiling, double r, double g, double b, struct igt_fb *fb /* out */) { unsigned int fb_id; cairo_t *cr; fb_id = igt_create_fb(fd, width, height, format, tiling, fb); igt_assert(fb_id); cr = igt_get_cairo_ctx(fd, fb); igt_paint_color(cr, 0, 0, width, height, r, g, b); igt_assert(cairo_status(cr) == 0); cairo_destroy(cr); return fb_id; } /** * igt_create_pattern_fb: * @fd: open i915 drm file descriptor * @width: width of the framebuffer in pixel * @height: height of the framebuffer in pixel * @format: drm fourcc pixel format code * @tiling: tiling layout of the framebuffer * @fb: pointer to an #igt_fb structure * * This function allocates a gem buffer object suitable to back a framebuffer * with the requested properties and then wraps it up in a drm framebuffer * object. All metadata is stored in @fb. * * Compared to igt_create_fb() this function also draws the standard test pattern * into the framebuffer. * * Returns: * The kms id of the created framebuffer on success or a negative error code on * failure. */ unsigned int igt_create_pattern_fb(int fd, int width, int height, uint32_t format, uint64_t tiling, struct igt_fb *fb /* out */) { unsigned int fb_id; cairo_t *cr; fb_id = igt_create_fb(fd, width, height, format, tiling, fb); igt_assert(fb_id); cr = igt_get_cairo_ctx(fd, fb); igt_paint_test_pattern(cr, width, height); igt_assert(cairo_status(cr) == 0); cairo_destroy(cr); return fb_id; } /** * igt_create_color_pattern_fb: * @fd: open i915 drm file descriptor * @width: width of the framebuffer in pixel * @height: height of the framebuffer in pixel * @format: drm fourcc pixel format code * @tiling: tiling layout of the framebuffer * @r: red value to use as fill color * @g: green value to use as fill color * @b: blue value to use as fill color * @fb: pointer to an #igt_fb structure * * This function allocates a gem buffer object suitable to back a framebuffer * with the requested properties and then wraps it up in a drm framebuffer * object. All metadata is stored in @fb. * * Compared to igt_create_fb() this function also fills the entire framebuffer * with the given color, and then draws the standard test pattern into the * framebuffer. * * Returns: * The kms id of the created framebuffer on success or a negative error code on * failure. */ unsigned int igt_create_color_pattern_fb(int fd, int width, int height, uint32_t format, uint64_t tiling, double r, double g, double b, struct igt_fb *fb /* out */) { unsigned int fb_id; cairo_t *cr; fb_id = igt_create_fb(fd, width, height, format, tiling, fb); igt_assert(fb_id); cr = igt_get_cairo_ctx(fd, fb); igt_paint_color(cr, 0, 0, width, height, r, g, b); igt_paint_test_pattern(cr, width, height); igt_assert(cairo_status(cr) == 0); cairo_destroy(cr); return fb_id; } /** * igt_create_image_fb: * @drm_fd: open i915 drm file descriptor * @width: width of the framebuffer in pixel or 0 * @height: height of the framebuffer in pixel or 0 * @format: drm fourcc pixel format code * @tiling: tiling layout of the framebuffer * @filename: filename of the png image to draw * @fb: pointer to an #igt_fb structure * * Create a framebuffer with the specified image. If @width is zero the * image width will be used. If @height is zero the image height will be used. * * Returns: * The kms id of the created framebuffer on success or a negative error code on * failure. */ unsigned int igt_create_image_fb(int fd, int width, int height, uint32_t format, uint64_t tiling, const char *filename, struct igt_fb *fb /* out */) { cairo_surface_t *image; uint32_t fb_id; cairo_t *cr; image = cairo_image_surface_create_from_png(filename); igt_assert(cairo_surface_status(image) == CAIRO_STATUS_SUCCESS); if (width == 0) width = cairo_image_surface_get_width(image); if (height == 0) height = cairo_image_surface_get_height(image); cairo_surface_destroy(image); fb_id = igt_create_fb(fd, width, height, format, tiling, fb); cr = igt_get_cairo_ctx(fd, fb); igt_paint_image(cr, filename, 0, 0, width, height); igt_assert(cairo_status(cr) == 0); cairo_destroy(cr); return fb_id; } struct box { int x, y, width, height; }; struct stereo_fb_layout { int fb_width, fb_height; struct box left, right; }; static void box_init(struct box *box, int x, int y, int bwidth, int bheight) { box->x = x; box->y = y; box->width = bwidth; box->height = bheight; } static void stereo_fb_layout_from_mode(struct stereo_fb_layout *layout, drmModeModeInfo *mode) { unsigned int format = mode->flags & DRM_MODE_FLAG_3D_MASK; const int hdisplay = mode->hdisplay, vdisplay = mode->vdisplay; int middle; switch (format) { case DRM_MODE_FLAG_3D_TOP_AND_BOTTOM: layout->fb_width = hdisplay; layout->fb_height = vdisplay; middle = vdisplay / 2; box_init(&layout->left, 0, 0, hdisplay, middle); box_init(&layout->right, 0, middle, hdisplay, vdisplay - middle); break; case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF: layout->fb_width = hdisplay; layout->fb_height = vdisplay; middle = hdisplay / 2; box_init(&layout->left, 0, 0, middle, vdisplay); box_init(&layout->right, middle, 0, hdisplay - middle, vdisplay); break; case DRM_MODE_FLAG_3D_FRAME_PACKING: { int vactive_space = mode->vtotal - vdisplay; layout->fb_width = hdisplay; layout->fb_height = 2 * vdisplay + vactive_space; box_init(&layout->left, 0, 0, hdisplay, vdisplay); box_init(&layout->right, 0, vdisplay + vactive_space, hdisplay, vdisplay); break; } default: igt_assert(0); } } /** * igt_create_stereo_fb: * @drm_fd: open i915 drm file descriptor * @mode: A stereo 3D mode. * @format: drm fourcc pixel format code * @tiling: tiling layout of the framebuffer * * Create a framebuffer for use with the stereo 3D mode specified by @mode. * * Returns: * The kms id of the created framebuffer on success or a negative error code on * failure. */ unsigned int igt_create_stereo_fb(int drm_fd, drmModeModeInfo *mode, uint32_t format, uint64_t tiling) { struct stereo_fb_layout layout; cairo_t *cr; uint32_t fb_id; struct igt_fb fb; stereo_fb_layout_from_mode(&layout, mode); fb_id = igt_create_fb(drm_fd, layout.fb_width, layout.fb_height, format, tiling, &fb); cr = igt_get_cairo_ctx(drm_fd, &fb); igt_paint_image(cr, "1080p-left.png", layout.left.x, layout.left.y, layout.left.width, layout.left.height); igt_paint_image(cr, "1080p-right.png", layout.right.x, layout.right.y, layout.right.width, layout.right.height); cairo_destroy(cr); return fb_id; } static cairo_format_t drm_format_to_cairo(uint32_t drm_format) { struct format_desc_struct *f; for_each_format(f) if (f->drm_id == drm_format) return f->cairo_id; igt_assert_f(0, "can't find a cairo format for %08x (%s)\n", drm_format, igt_format_str(drm_format)); } struct fb_blit_upload { int fd; struct igt_fb *fb; struct { uint32_t handle; unsigned size, stride; uint8_t *map; } linear; }; static unsigned int fb_mod_to_obj_tiling(uint64_t fb_mod) { switch (fb_mod) { case LOCAL_DRM_FORMAT_MOD_NONE: return I915_TILING_NONE; case LOCAL_I915_FORMAT_MOD_X_TILED: return I915_TILING_X; case LOCAL_I915_FORMAT_MOD_Y_TILED: return I915_TILING_Y; case LOCAL_I915_FORMAT_MOD_Yf_TILED: return I915_TILING_Yf; default: igt_assert(0); } } static void destroy_cairo_surface__blit(void *arg) { struct fb_blit_upload *blit = arg; struct igt_fb *fb = blit->fb; unsigned int obj_tiling = fb_mod_to_obj_tiling(fb->tiling); munmap(blit->linear.map, blit->linear.size); fb->cairo_surface = NULL; gem_set_domain(blit->fd, blit->linear.handle, I915_GEM_DOMAIN_GTT, 0); igt_blitter_fast_copy__raw(blit->fd, blit->linear.handle, blit->linear.stride, I915_TILING_NONE, 0, 0, /* src_x, src_y */ fb->width, fb->height, fb->gem_handle, fb->stride, obj_tiling, 0, 0 /* dst_x, dst_y */); gem_sync(blit->fd, blit->linear.handle); gem_close(blit->fd, blit->linear.handle); free(blit); } static void create_cairo_surface__blit(int fd, struct igt_fb *fb) { struct fb_blit_upload *blit; cairo_format_t cairo_format; unsigned int obj_tiling = fb_mod_to_obj_tiling(fb->tiling); int bpp, ret; blit = malloc(sizeof(*blit)); igt_assert(blit); /* * We create a linear BO that we'll map for the CPU to write to (using * cairo). This linear bo will be then blitted to its final * destination, tiling it at the same time. */ bpp = igt_drm_format_to_bpp(fb->drm_format); ret = create_bo_for_fb(fd, fb->width, fb->height, bpp, LOCAL_DRM_FORMAT_MOD_NONE, 0, 0, &blit->linear.handle, &blit->linear.size, &blit->linear.stride); igt_assert(ret == 0); blit->fd = fd; blit->fb = fb; /* Copy fb content to linear BO */ gem_set_domain(fd, blit->linear.handle, I915_GEM_DOMAIN_GTT, 0); igt_blitter_fast_copy__raw(fd, fb->gem_handle, fb->stride, obj_tiling, 0, 0, /* src_x, src_y */ fb->width, fb->height, blit->linear.handle, blit->linear.stride, I915_TILING_NONE, 0, 0 /* dst_x, dst_y */); gem_sync(fd, blit->linear.handle); gem_set_domain(fd, blit->linear.handle, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU); /* Setup cairo context */ blit->linear.map = gem_mmap__cpu(fd, blit->linear.handle, 0, blit->linear.size, PROT_READ | PROT_WRITE); cairo_format = drm_format_to_cairo(fb->drm_format); fb->cairo_surface = cairo_image_surface_create_for_data(blit->linear.map, cairo_format, fb->width, fb->height, blit->linear.stride); cairo_surface_set_user_data(fb->cairo_surface, (cairo_user_data_key_t *)create_cairo_surface__blit, blit, destroy_cairo_surface__blit); } static void destroy_cairo_surface__gtt(void *arg) { struct igt_fb *fb = arg; munmap(cairo_image_surface_get_data(fb->cairo_surface), fb->size); fb->cairo_surface = NULL; } static void create_cairo_surface__gtt(int fd, struct igt_fb *fb) { void *ptr = gem_mmap__gtt(fd, fb->gem_handle, fb->size, PROT_READ | PROT_WRITE); fb->cairo_surface = cairo_image_surface_create_for_data(ptr, drm_format_to_cairo(fb->drm_format), fb->width, fb->height, fb->stride); cairo_surface_set_user_data(fb->cairo_surface, (cairo_user_data_key_t *)create_cairo_surface__gtt, fb, destroy_cairo_surface__gtt); } static cairo_surface_t *get_cairo_surface(int fd, struct igt_fb *fb) { if (fb->cairo_surface == NULL) { if (fb->tiling == LOCAL_I915_FORMAT_MOD_Y_TILED || fb->tiling == LOCAL_I915_FORMAT_MOD_Yf_TILED) create_cairo_surface__blit(fd, fb); else create_cairo_surface__gtt(fd, fb); } gem_set_domain(fd, fb->gem_handle, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU); igt_assert(cairo_surface_status(fb->cairo_surface) == CAIRO_STATUS_SUCCESS); return fb->cairo_surface; } /** * igt_get_cairo_ctx: * @fd: open i915 drm file descriptor * @fb: pointer to an #igt_fb structure * * This initializes a cairo surface for @fb and then allocates a drawing context * for it. The return cairo drawing context should be released by calling * cairo_destroy(). This also sets a default font for drawing text on * framebuffers. * * Returns: * The created cairo drawing context. */ cairo_t *igt_get_cairo_ctx(int fd, struct igt_fb *fb) { cairo_surface_t *surface; cairo_t *cr; surface = get_cairo_surface(fd, fb); cr = cairo_create(surface); cairo_surface_destroy(surface); igt_assert(cairo_status(cr) == CAIRO_STATUS_SUCCESS); cairo_select_font_face(cr, "Helvetica", CAIRO_FONT_SLANT_NORMAL, CAIRO_FONT_WEIGHT_NORMAL); igt_assert(cairo_status(cr) == CAIRO_STATUS_SUCCESS); return cr; } /** * igt_write_fb_to_png: * @fd: open i915 drm file descriptor * @fb: pointer to an #igt_fb structure * @filename: target name for the png image * * This function stores the contents of the supplied framebuffer into a png * image stored at @filename. */ void igt_write_fb_to_png(int fd, struct igt_fb *fb, const char *filename) { cairo_surface_t *surface; cairo_status_t status; surface = get_cairo_surface(fd, fb); status = cairo_surface_write_to_png(surface, filename); cairo_surface_destroy(surface); igt_assert(status == CAIRO_STATUS_SUCCESS); } /** * igt_remove_fb: * @fd: open i915 drm file descriptor * @fb: pointer to an #igt_fb structure * * This function releases all resources allocated in igt_create_fb() for @fb. * Note that if this framebuffer is still in use on a primary plane the kernel * will disable the corresponding crtc. */ void igt_remove_fb(int fd, struct igt_fb *fb) { cairo_surface_destroy(fb->cairo_surface); do_or_die(drmModeRmFB(fd, fb->fb_id)); gem_close(fd, fb->gem_handle); } /** * igt_bpp_depth_to_drm_format: * @bpp: desired bits per pixel * @depth: desired depth * * Returns: * The rgb drm fourcc pixel format code corresponding to the given @bpp and * @depth values. Fails hard if no match was found. */ uint32_t igt_bpp_depth_to_drm_format(int bpp, int depth) { struct format_desc_struct *f; for_each_format(f) if (f->bpp == bpp && f->depth == depth) return f->drm_id; igt_assert_f(0, "can't find drm format with bpp=%d, depth=%d\n", bpp, depth); } /** * igt_drm_format_to_bpp: * @drm_format: drm fourcc pixel format code * * Returns: * The bits per pixel for the given drm fourcc pixel format code. Fails hard if * no match was found. */ uint32_t igt_drm_format_to_bpp(uint32_t drm_format) { struct format_desc_struct *f; for_each_format(f) if (f->drm_id == drm_format) return f->bpp; igt_assert_f(0, "can't find a bpp format for %08x (%s)\n", drm_format, igt_format_str(drm_format)); } /** * igt_format_str: * @drm_format: drm fourcc pixel format code * * Returns: * Human-readable fourcc pixel format code for @drm_format or "invalid" no match * was found. */ const char *igt_format_str(uint32_t drm_format) { struct format_desc_struct *f; for_each_format(f) if (f->drm_id == drm_format) return f->name; return "invalid"; } /** * igt_get_all_cairo_formats: * @formats: pointer to pointer to store the allocated formats array * @format_count: pointer to integer to store the size of the allocated array * * This functions returns an array of all the drm fourcc codes supported by * cairo and this library. */ void igt_get_all_cairo_formats(const uint32_t **formats, int *format_count) { static uint32_t *drm_formats; static int n_formats; if (!drm_formats) { struct format_desc_struct *f; uint32_t *format; n_formats = 0; for_each_format(f) if (f->cairo_id != CAIRO_FORMAT_INVALID) n_formats++; drm_formats = calloc(n_formats, sizeof(*drm_formats)); format = &drm_formats[0]; for_each_format(f) if (f->cairo_id != CAIRO_FORMAT_INVALID) *format++ = f->drm_id; } *formats = drm_formats; *format_count = n_formats; } intel-gpu-tools-1.14/lib/uwildmat/0000755000175000017500000000000012665337376014120 500000000000000intel-gpu-tools-1.14/lib/uwildmat/uwildmat.h0000644000175000017500000000102012665336131016014 00000000000000 #ifndef UWILDMAT_H #define UWILDMAT_H 1 #include #include #include /* ** WILDMAT MATCHING */ enum uwildmat { UWILDMAT_FAIL = 0, UWILDMAT_MATCH = 1, UWILDMAT_POISON }; extern bool is_valid_utf8(const char *start); extern bool uwildmat(const char *text, const char *pat); extern bool uwildmat_simple(const char *text, const char *pat); extern enum uwildmat uwildmat_poison(const char *text, const char *pat); #endif /* UWILDMAT_H */ intel-gpu-tools-1.14/lib/uwildmat/uwildmat.c0000644000175000017500000003552312665336131016026 00000000000000/* uwildmat.c is reused from libinn - https://launchpad.net/ubuntu/+source/inn2/2.5.4-1 This provides wild card matching originally used in InterNetNews and is described in https://tools.ietf.org/html/rfc3977#section-4 INN licence: INN as a whole and all code contained in it not otherwise marked with different licenses and/or copyrights is covered by the following copyright and license: Copyright (c) 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012, 2013, 2014 by Internet Systems Consortium, Inc. ("ISC") Copyright (c) 1991, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 by The Internet Software Consortium and Rich Salz This code is derived from software contributed to the Internet Software Consortium by Rich Salz. Permission to use, copy, modify, and distribute this software for any purpose with or without fee is hereby granted, provided that the above copyright notice and this permission notice appear in all copies. THE SOFTWARE IS PROVIDED "AS IS" AND ISC DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL ISC BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ /* $Id: uwildmat.c 8918 2010-01-22 23:28:28Z iulius $ ** ** wildmat pattern matching with Unicode UTF-8 extensions. ** ** Do shell-style pattern matching for ?, \, [], and * characters. Might not ** be robust in face of malformed patterns; e.g., "foo[a-" could cause a ** segmentation violation. It is 8-bit clean. (Robustness hopefully fixed ** July 2000; all malformed patterns should now just fail to match anything.) ** ** Original by Rich $alz, mirror!rs, Wed Nov 26 19:03:17 EST 1986. ** Rich $alz is now . ** ** April, 1991: Replaced mutually-recursive calls with in-line code for the ** star character. ** ** Special thanks to Lars Mathiesen for the ABORT code. ** This can greatly speed up failing wildcard patterns. For example: ** ** pattern: -*-*-*-*-*-*-12-*-*-*-m-*-*-* ** text 1: -adobe-courier-bold-o-normal--12-120-75-75-m-70-iso8859-1 ** text 2: -adobe-courier-bold-o-normal--12-120-75-75-X-70-iso8859-1 ** ** Text 1 matches with 51 calls, while text 2 fails with 54 calls. Without ** the ABORT code, it takes 22310 calls to fail. Ugh. The following ** explanation is from Lars: ** ** The precondition that must be fulfilled is that DoMatch will consume at ** least one character in text. This is true if *p is neither '*' nor '\0'.) ** The last return has ABORT instead of false to avoid quadratic behaviour in ** cases like pattern "*a*b*c*d" with text "abcxxxxx". With false, each ** star-loop has to run to the end of the text; with ABORT only the last one ** does. ** ** Once the control of one instance of DoMatch enters the star-loop, that ** instance will return either true or ABORT, and any calling instance will ** therefore return immediately after (without calling recursively again). ** In effect, only one star-loop is ever active. It would be possible to ** modify the code to maintain this context explicitly, eliminating all ** recursive calls at the cost of some complication and loss of clarity (and ** the ABORT stuff seems to be unclear enough by itself). I think it would ** be unwise to try to get this into a released version unless you have a ** good test data base to try it out on. ** ** June, 1991: Robert Elz added minus and close bracket ** handling for character sets. ** ** July, 2000: Largely rewritten by Russ Allbery to add ** support for ',', '!', and optionally '@' to the core wildmat routine. ** Broke the character class matching into a separate function for clarity ** since it's infrequently used in practice, and added some simple lookahead ** to significantly decrease the recursive calls in the '*' matching code. ** Added support for UTF-8 as the default character set for any high-bit ** characters. ** ** For more information on UTF-8, see RFC 3629. ** ** Please note that this file is intentionally written so that conditionally ** executed expressions are on separate lines from the condition to ** facilitate analysis of the coverage of the test suite using purecov. ** Please preserve this. As of March 11, 2001, purecov reports that the ** accompanying test suite achieves 100% coverage of this file. */ #include #include #include "uwildmat.h" #define ABORT -1 /* Whether or not an octet looks like the start of a UTF-8 character. */ #define ISUTF8(c) (((c) & 0xc0) == 0xc0) /* ** Determine the length of a non-ASCII character in octets (for advancing ** pointers when skipping over characters). Takes a pointer to the start of ** the character and to the last octet of the string. If end is NULL, expect ** the string pointed to by start to be nul-terminated. If the character is ** malformed UTF-8, return 1 to treat it like an eight-bit local character. */ static int utf8_length(const unsigned char *start, const unsigned char *end) { unsigned char mask = 0x80; const unsigned char *p; int length = 0; int left; for (; mask > 0 && (*start & mask) == mask; mask >>= 1) length++; if (length < 2 || length > 6) return 1; if (end != NULL && (end - start + 1) < length) return 1; left = length - 1; for (p = start + 1; left > 0 && (*p & 0xc0) == 0x80; p++) left--; return (left == 0) ? length : 1; } /* ** Check whether a string contains only valid UTF-8 characters. */ bool is_valid_utf8(const char *text) { unsigned char mask; const unsigned char *p; int length; int left; for (p = (const unsigned char *)text; *p != '\0';) { mask = 0x80; length = 0; /* Find out the expected length of the character. */ for (; mask > 0 && (*p & mask) == mask; mask >>= 1) length++; p++; /* Valid ASCII. */ if (length == 0) continue; /* Invalid length. */ if (length < 2 || length > 6) return false; /* Check that each byte looks like 10xxxxxx, except for the first. */ left = length - 1; for (; left > 0 && (*p & 0xc0) == 0x80; p++) left--; if (left > 0) return false; } return true; } /* ** Convert a UTF-8 character to UCS-4. Takes a pointer to the start of the ** character and to the last octet of the string, and to a uint32_t into ** which to put the decoded UCS-4 value. If end is NULL, expect the string ** pointed to by start to be nul-terminated. Returns the number of octets in ** the UTF-8 encoding. If the UTF-8 character is malformed, set result to ** the decimal value of the first octet; this is wrong, but it will generally ** cause the rest of the wildmat matching to do the right thing for non-UTF-8 ** input. */ static int utf8_decode(const unsigned char *start, const unsigned char *end, uint32_t *result) { uint32_t value = 0; int length, i; const unsigned char *p = start; unsigned char mask; length = utf8_length(start, end); if (length < 2) { *result = *start; return 1; } mask = (1 << (7 - length)) - 1; value = *p & mask; p++; for (i = length - 1; i > 0; i--) { value = (value << 6) | (*p & 0x3f); p++; } *result = value; return length; } /* ** Match a character class against text, a UCS-4 character. start is a ** pointer to the first character of the character class, end a pointer to ** the last. Returns whether the class matches that character. */ static bool match_class(uint32_t text, const unsigned char *start, const unsigned char *end) { bool reversed, allowrange; const unsigned char *p = start; uint32_t first = 0; uint32_t last; /* Check for an inverted character class (starting with ^). If the character matches the character class, we return !reversed; that way, we return true if it's a regular character class and false if it's a reversed one. If the character doesn't match, we return reversed. */ reversed = (*p == '^'); if (reversed) p++; /* Walk through the character class until we reach the end or find a match, handling character ranges as we go. Only permit a range to start when allowrange is true; this allows - to be treated like a normal character as the first character of the class and catches malformed ranges like a-e-n. We treat the character at the beginning of a range as both a regular member of the class and the beginning of the range; this is harmless (although it means that malformed ranges like m-a will match m and nothing else). */ allowrange = false; while (p <= end) { if (allowrange && *p == '-' && p < end) { p++; p += utf8_decode(p, end, &last); if (text >= first && text <= last) return !reversed; allowrange = false; } else { p += utf8_decode(p, end, &first); if (text == first) return !reversed; allowrange = true; } } return reversed; } /* ** Match the text against the pattern between start and end. This is a ** single pattern; a leading ! or @ must already be taken care of, and ** commas must be dealt with outside of this routine. */ static int match_pattern(const unsigned char *text, const unsigned char *start, const unsigned char *end) { const unsigned char *q, *endclass; const unsigned char *p = start; bool ismeta; int matched, width; uint32_t c; for (; p <= end; p++) { if (!*text && *p != '*') return ABORT; switch (*p) { case '\\': if (!*++p) return ABORT; /* Fall through. */ default: if (*text++ != *p) return false; break; case '?': text += ISUTF8(*text) ? utf8_length(text, NULL) : 1; break; case '*': /* Consecutive stars are equivalent to one. Advance pattern to the character after the star. */ for (++p; *p == '*'; p++) ; /* A trailing star will match anything. */ if (p > end) return true; /* Basic algorithm: Recurse at each point where the * could possibly match. If the match succeeds or aborts, return immediately; otherwise, try the next position. Optimization: If the character after the * in the pattern isn't a metacharacter (the common case), then the * has to consume characters at least up to the next occurrence of that character in the text. Scan forward for those points rather than recursing at every possible point to save the extra function call overhead. */ ismeta = (*p == '[' || *p == '?' || *p == '\\'); while (*text) { width = ISUTF8(*text) ? utf8_length(text, NULL) : 1; if (ismeta) { matched = match_pattern(text, p, end); text += width; } else { while (*text && *text != *p) { text += width; width = ISUTF8(*text) ? utf8_length(text, NULL) : 1; } if (!*text) return ABORT; matched = match_pattern(++text, p + 1, end); } if (matched != false) return matched; } return ABORT; case '[': /* Find the end of the character class, making sure not to pick up a close bracket at the beginning of the class. */ p++; q = p + (*p == '^') + 1; if (q > end) return ABORT; endclass = memchr(q, ']', (size_t) (end - q + 1)); if (!endclass) return ABORT; /* Do the heavy lifting in another function for clarity, since character classes are an uncommon case. */ text += utf8_decode(text, NULL, &c); if (!match_class(c, p, endclass - 1)) return false; p = endclass; break; } } return (*text == '\0'); } /* ** Takes text and a wildmat expression; a wildmat expression is a ** comma-separated list of wildmat patterns, optionally preceded by ! to ** invert the sense of the expression. Returns UWILDMAT_MATCH if that ** expression matches the text, UWILDMAT_FAIL otherwise. If allowpoison is ** set, allow @ to introduce a poison expression (the same as !, but if it ** triggers the failed match the routine returns UWILDMAT_POISON instead). */ static enum uwildmat match_expression(const unsigned char *text, const unsigned char *start, bool allowpoison) { const unsigned char *end, *split; const unsigned char *p = start; bool reverse, escaped; bool match = false; bool poison = false; bool poisoned = false; /* Handle the empty expression separately, since otherwise end will be set to an invalid pointer. */ if (!*p) return !*text ? UWILDMAT_MATCH : UWILDMAT_FAIL; end = start + strlen((const char *) start) - 1; /* Main match loop. Find each comma that separates patterns, and attempt to match the text with each pattern in order. The last matching pattern determines whether the whole expression matches. */ for (; p <= end + 1; p = split + 1) { if (allowpoison) poison = (*p == '@'); reverse = (*p == '!') || poison; if (reverse) p++; /* Find the first unescaped comma, if any. If there is none, split will be one greater than end and point at the nul at the end of the string. */ for (escaped = false, split = p; split <= end; split++) { if (*split == '[') { split++; if (*split == ']') split++; while (split <= end && *split != ']') split++; } if (*split == ',' && !escaped) break; escaped = (*split == '\\') ? !escaped : false; } /* Optimization: If match == !reverse and poison == poisoned, this pattern can't change the result, so don't do any work. */ if (match == !reverse && poison == poisoned) continue; if (match_pattern(text, p, split - 1) == true) { poisoned = poison; match = !reverse; } } if (poisoned) return UWILDMAT_POISON; return match ? UWILDMAT_MATCH : UWILDMAT_FAIL; } /* ** User-level routine used for wildmats where @ should be treated as a ** regular character. */ bool uwildmat(const char *text, const char *pat) { const unsigned char *utext = (const unsigned char *) text; const unsigned char *upat = (const unsigned char *) pat; if (upat[0] == '*' && upat[1] == '\0') return true; else return (match_expression(utext, upat, false) == UWILDMAT_MATCH); } /* ** User-level routine used for wildmats that support poison matches. */ enum uwildmat uwildmat_poison(const char *text, const char *pat) { const unsigned char *utext = (const unsigned char *) text; const unsigned char *upat = (const unsigned char *) pat; if (upat[0] == '*' && upat[1] == '\0') return UWILDMAT_MATCH; else return match_expression(utext, upat, true); } /* ** User-level routine for simple expressions (neither , nor ! are special). */ bool uwildmat_simple(const char *text, const char *pat) { const unsigned char *utext = (const unsigned char *) text; const unsigned char *upat = (const unsigned char *) pat; size_t length; if (upat[0] == '*' && upat[1] == '\0') return true; else { length = strlen(pat); return (match_pattern(utext, upat, upat + length - 1) == true); } } intel-gpu-tools-1.14/lib/igt_core.c0000644000175000017500000014415212665336131014144 00000000000000/* * Copyright © 2007, 2011, 2013, 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * Daniel Vetter * */ #ifndef ANDROID #define _GNU_SOURCE #else #include #endif #include #include #include #include #include #include #include #include #include #include #include #include #include #include #ifdef __linux__ #include #endif #include #include #include #include #include #include #include #include #include #include "drmtest.h" #include "intel_chipset.h" #include "intel_io.h" #include "igt_debugfs.h" #include "version.h" #include "config.h" #include "igt_core.h" #include "igt_aux.h" #ifdef HAVE_LIBGEN_H #include /* for basename() on Solaris */ #endif /** * SECTION:igt_core * @short_description: Core i-g-t testing support * @title: Core * @include: igt.h * * This library implements the core of the i-g-t test support infrastructure. * Main features are the subtest enumeration, cmdline option parsing helpers for * subtest handling and various helpers to structure testcases with subtests and * handle subtest test results. * * Auxiliary code provides exit handlers, support for forked processes with test * result propagation. Other generally useful functionality includes optional * structure logging infrastructure and some support code for running reduced * test set on in simulated hardware environments. * * When writing tests with subtests it is extremely important that nothing * interferes with the subtest enumeration. In i-g-t subtests are enumerated at * runtime, which allows powerful testcase enumeration. But it makes subtest * enumeration a bit more tricky since the test code needs to be careful to * never run any code which might fail (like trying to do privileged operations * or opening device driver nodes). * * To allow this i-g-t provides #igt_fixture code blocks for setup code outside * of subtests and automatically skips the subtest code blocks themselves. For * special cases igt_only_list_subtests() is also provided. * * # Magic Control Blocks * * i-g-t makes heavy use of C macros which serve as magic control blocks. They * work fairly well and transparently but since C doesn't have full-blown * closures there are caveats: * * - Asynchronous blocks which are used to spawn children internally use fork(). * Which means that nonsensical control flow like jumping out of the control * block is possible, but it will badly confuse the i-g-t library code. And of * course all caveats of a real fork() call apply, namely that file * descriptors are copied, but still point at the original file. This will * terminally upset the libdrm buffer manager if both parent and child keep on * using the same open instance of the drm device. Usually everything related * to interacting with the kernel driver must be reinitialized to avoid such * issues. * * - Code blocks with magic control flow are implemented with setjmp() and * longjmp(). This applies to #igt_fixture and #igt_subtest blocks and all the * three variants to finish test: igt_success(), igt_skip() and igt_fail(). * Mostly this is of no concern, except when such a control block changes * stack variables defined in the same function as the control block resides. * Any store/load behaviour after a longjmp() is ill-defined for these * variables. Avoid such code. * * Quoting the man page for longjmp(): * * "The values of automatic variables are unspecified after a call to * longjmp() if they meet all the following criteria:" * - "they are local to the function that made the corresponding setjmp() call; * - "their values are changed between the calls to setjmp() and longjmp(); and * - "they are not declared as volatile." * * # Best Practices for Test Helper Libraries Design * * Kernel tests itself tend to have fairly complex logic already. It is * therefore paramount that helper code, both in libraries and test-private * functions, add as little boilerplate code to the main test logic as possible. * But then dense code is hard to understand without constantly consulting * the documentation and implementation of all the helper functions if it * doesn't follow some clear patterns. Hence follow these established best * practices: * * - Make extensive use of the implicit control flow afforded by igt_skip(), * igt_fail and igt_success(). When dealing with optional kernel features * combine igt_skip() with igt_fail() to skip when the kernel support isn't * available but fail when anything else goes awry. void should be the most * common return type in all your functions, except object constructors of * course. * * - The main test logic should have no explicit control flow for failure * conditions, but instead such assumptions should be written in a declarative * style. Use one of the many macros which encapsulate i-g-t's implicit * control flow. Pick the most suitable one to have as much debug output as * possible without polluting the code unnecessarily. For example * igt_assert_cmpint() for comparing integers or do_ioctl() for running ioctls * and checking their results. Feel free to add new ones to the library or * wrap up a set of checks into a private function to further condense your * test logic. * * - When adding a new feature test function which uses igt_skip() internally, * use the _require_ naming scheme. When you * instead add a feature test function which returns a boolean, because your * main test logic must take different actions depending upon the feature's * availability, then instead use the _has_. * * - As already mentioned eschew explicit error handling logic as much as * possible. If your test absolutely has to handle the error of some function * the customary naming pattern is to prefix those variants with __. Try to * restrict explicit error handling to leaf functions. For the main test flow * simply pass the expected error condition down into your helper code, which * results in tidy and declarative test logic. * * - Make your library functions as simple to use as possible. Automatically * register cleanup handlers through igt_install_exit_handler(). Reduce the * amount of setup boilerplate needed by using implicit singletons and lazy * structure initialization and similar design patterns. * * - Don't shy away from refactoring common code, even when there are just 2-3 * users and even if it's not a net reduction in code. As long as it helps to * remove boilerplate and makes the code more declarative the resulting * clearer test flow is worth it. All i-g-t library code has been organically * extracted from testcases in this fashion. * * - For general coding style issues please follow the kernel's rules laid out * in * [CodingStyle](https://www.kernel.org/doc/Documentation/CodingStyle). * * # Interface with Testrunners * * i-g-t testcase are all executables which should be run as root on an * otherwise completely idle system. The test status is reflected in the * exitcode. #IGT_EXIT_SUCCESS means "success", #IGT_EXIT_SKIP "skip", * #IGT_EXIT_TIMEOUT that some operation "timed out". All other exit codes * encode a failed test result, including any abnormal termination of the test * (e.g. by SIGKILL). * * On top of that tests may report unexpected results and minor issues to * stderr. If stderr is non-empty the test result should be treated as "warn". * * The test lists are generated at build time. Simple testcases are listed in * tests/single-tests.txt and tests with subtests are listed in * tests/multi-tests.txt. When running tests with subtest from a test runner it * is recommend to run each subtest individually, since otherwise the return * code will only reflect the overall result. * * To do that obtain the lists of subtests with "--list-subtests", which can be * run as non-root and doesn't require the i915 driver to be loaded (or any * intel gpu to be present). Then individual subtests can be run with * "--run-subtest". Usage help for tests with subtests can be obtained with the * "--help" command line option. * * A wildcard expression can be given to --run-subtest to specify a subset of * subtests to run. See https://tools.ietf.org/html/rfc3977#section-4 for a * description of allowed wildcard expressions. * Some examples of allowed wildcard expressions are: * * - '*basic*' match any subtest containing basic * - 'basic-???' match any subtest named basic- with 3 characters after - * - 'basic-[0-9]' match any subtest named basic- with a single number after - * - 'basic-[^0-9]' match any subtest named basic- with a single non numerical character after - * - 'basic*,advanced*' match any subtest starting basic or advanced * - '*,!basic*' match any subtest not starting basic * - 'basic*,!basic-render*' match any subtest starting basic but not starting basic-render */ static unsigned int exit_handler_count; const char *igt_interactive_debug; /* subtests helpers */ static bool list_subtests = false; static char *run_single_subtest = NULL; static bool run_single_subtest_found = false; static const char *in_subtest = NULL; static struct timespec subtest_time; static clockid_t igt_clock = (clockid_t)-1; static bool in_fixture = false; static bool test_with_subtests = false; static bool in_atexit_handler = false; static enum { CONT = 0, SKIP, FAIL } skip_subtests_henceforth = CONT; bool __igt_plain_output = false; /* fork support state */ pid_t *test_children; int num_test_children; int test_children_sz; bool test_child; enum { OPT_LIST_SUBTESTS, OPT_RUN_SUBTEST, OPT_DESCRIPTION, OPT_DEBUG, OPT_INTERACTIVE_DEBUG, OPT_HELP = 'h' }; static int igt_exitcode = IGT_EXIT_SUCCESS; static const char *command_str; static char* igt_log_domain_filter; static struct { char *entries[256]; uint8_t start, end; } log_buffer; static pthread_mutex_t log_buffer_mutex = PTHREAD_MUTEX_INITIALIZER; const char *igt_test_name(void) { return command_str; } static void _igt_log_buffer_append(char *line) { pthread_mutex_lock(&log_buffer_mutex); free(log_buffer.entries[log_buffer.end]); log_buffer.entries[log_buffer.end] = line; log_buffer.end++; if (log_buffer.end == log_buffer.start) log_buffer.start++; pthread_mutex_unlock(&log_buffer_mutex); } static void _igt_log_buffer_reset(void) { pthread_mutex_lock(&log_buffer_mutex); log_buffer.start = log_buffer.end = 0; pthread_mutex_unlock(&log_buffer_mutex); } static void _igt_log_buffer_dump(void) { uint8_t i; if (in_subtest) fprintf(stderr, "Subtest %s failed.\n", in_subtest); else fprintf(stderr, "Test %s failed.\n", command_str); if (log_buffer.start == log_buffer.end) { fprintf(stderr, "No log.\n"); return; } pthread_mutex_lock(&log_buffer_mutex); fprintf(stderr, "**** DEBUG ****\n"); i = log_buffer.start; do { char *last_line = log_buffer.entries[i]; fprintf(stderr, "%s", last_line); i++; } while (i != log_buffer.start && i != log_buffer.end); /* reset the buffer */ log_buffer.start = log_buffer.end = 0; fprintf(stderr, "**** END ****\n"); pthread_mutex_unlock(&log_buffer_mutex); } __attribute__((format(printf, 1, 2))) static void kmsg(const char *format, ...) #define KERN_EMER "<0>" #define KERN_ALERT "<1>" #define KERN_CRIT "<2>" #define KERN_ERR "<3>" #define KERN_WARNING "<4>" #define KERN_NOTICE "<5>" #define KERN_INFO "<6>" #define KERN_DEBUG "<7>" { va_list ap; FILE *file; file = fopen("/dev/kmsg", "w"); if (file == NULL) return; va_start(ap, format); vfprintf(file, format, ap); va_end(ap); fclose(file); } #define time_valid(ts) ((ts)->tv_sec || (ts)->tv_nsec) static double time_elapsed(struct timespec *then, struct timespec* now) { double elapsed = -1.; if (time_valid(then) && time_valid(now)) { elapsed = now->tv_sec - then->tv_sec; elapsed += (now->tv_nsec - then->tv_nsec) * 1e-9; } return elapsed; } static int gettime(struct timespec *ts) { memset(ts, 0, sizeof(*ts)); errno = 0; /* Stay on the same clock for consistency. */ if (igt_clock != (clockid_t)-1) { if (clock_gettime(igt_clock, ts)) goto error; return 0; } #ifdef CLOCK_MONOTONIC_RAW if (!clock_gettime(igt_clock = CLOCK_MONOTONIC_RAW, ts)) return 0; #endif #ifdef CLOCK_MONOTONIC_COARSE if (!clock_gettime(igt_clock = CLOCK_MONOTONIC_COARSE, ts)) return 0; #endif if (!clock_gettime(igt_clock = CLOCK_MONOTONIC, ts)) return 0; error: igt_warn("Could not read monotonic time: %s\n", strerror(errno)); return -errno; } bool __igt_fixture(void) { assert(!in_fixture); if (igt_only_list_subtests()) return false; if (skip_subtests_henceforth) return false; in_fixture = true; return true; } void __igt_fixture_complete(void) { assert(in_fixture); in_fixture = false; } void __igt_fixture_end(void) { assert(in_fixture); in_fixture = false; siglongjmp(igt_subtest_jmpbuf, 1); } /* * Some of the IGT tests put quite a lot of pressure on memory and when * running on Android they are sometimes killed by the Android low memory killer. * This seems to be due to some incompatibility between the kswapd free memory * targets and the way the lowmemorykiller assesses free memory. * The low memory killer really isn't usefull in this context and has no * interaction with the gpu driver that we are testing, so the following * function is used to disable it by modifying one of its module parameters. * We still have the normal linux oom killer to protect the kernel. * Apparently it is also possible for the lowmemorykiller to get included * in some linux distributions; so rather than check for Android we directly * check for the existence of the module parameter we want to adjust. * * In future, if we can get the lowmemorykiller to play nicely then we can * remove this hack. */ static void low_mem_killer_disable(bool disable) { static const char* adj_fname="/sys/module/lowmemorykiller/parameters/adj"; static const char no_lowmem_killer[] = "9999"; int fd; struct stat buf; /* The following must persist across invocations */ static char prev_adj_scores[256]; static int adj_scores_len = 0; static bool is_disabled = false; /* capture the permissions bits for the lowmemkiller adj pseudo-file. * Bail out if the stat fails; it probably means that there is no * lowmemorykiller, but in any case we're doomed. */ if (stat(adj_fname, &buf)) { igt_assert(errno == ENOENT); return; } /* make sure the file can be read/written - by default it is write-only */ chmod(adj_fname, S_IRUSR | S_IWUSR); if (disable && !is_disabled) { /* read the current oom adj parameters for lowmemorykiller */ fd = open(adj_fname, O_RDWR); igt_assert(fd != -1); adj_scores_len = read(fd, (void*)prev_adj_scores, 255); igt_assert(adj_scores_len > 0); /* writing 9999 to this module parameter effectively diables the * low memory killer. This is not a real file, so we dont need to * seek to the start or truncate it */ igt_assert_eq(write(fd, no_lowmem_killer, sizeof(no_lowmem_killer)), sizeof(no_lowmem_killer)); close(fd); is_disabled = true; } else if (is_disabled) { /* just re-enstate the original settings */ fd = open(adj_fname, O_WRONLY); igt_assert(fd != -1); igt_assert_eq(write(fd, prev_adj_scores, adj_scores_len), adj_scores_len); close(fd); is_disabled = false; } /* re-enstate the file permissions */ chmod(adj_fname, buf.st_mode); } bool igt_exit_called; static void common_exit_handler(int sig) { if (!igt_only_list_subtests()) { low_mem_killer_disable(false); } /* When not killed by a signal check that igt_exit() has been properly * called. */ assert(sig != 0 || igt_exit_called); } static void print_test_description(void) { if (&__igt_test_description) printf("%s\n", __igt_test_description); } static void print_version(void) { struct utsname uts; if (list_subtests) return; uname(&uts); fprintf(stdout, "IGT-Version: %s-%s (%s) (%s: %s %s)\n", PACKAGE_VERSION, IGT_GIT_SHA1, TARGET_CPU_PLATFORM, uts.sysname, uts.release, uts.machine); } static void print_usage(const char *help_str, bool output_on_stderr) { FILE *f = output_on_stderr ? stderr : stdout; fprintf(f, "Usage: %s [OPTIONS]\n", command_str); fprintf(f, " --list-subtests\n" " --run-subtest \n" " --debug[=log-domain]\n" " --interactive-debug[=domain]\n" " --help-description\n" " --help\n"); if (help_str) fprintf(f, "%s\n", help_str); } static void oom_adjust_for_doom(void) { int fd; const char always_kill[] = "1000"; fd = open("/proc/self/oom_score_adj", O_WRONLY); igt_assert(fd != -1); igt_assert(write(fd, always_kill, sizeof(always_kill)) == sizeof(always_kill)); close(fd); } static int common_init(int *argc, char **argv, const char *extra_short_opts, const struct option *extra_long_opts, const char *help_str, igt_opt_handler_t extra_opt_handler, void *handler_data) { int c, option_index = 0, i, x; static struct option long_options[] = { {"list-subtests", 0, 0, OPT_LIST_SUBTESTS}, {"run-subtest", 1, 0, OPT_RUN_SUBTEST}, {"help-description", 0, 0, OPT_DESCRIPTION}, {"debug", optional_argument, 0, OPT_DEBUG}, {"interactive-debug", optional_argument, 0, OPT_INTERACTIVE_DEBUG}, {"help", 0, 0, OPT_HELP}, {0, 0, 0, 0} }; char *short_opts; const char *std_short_opts = "h"; struct option *combined_opts; int extra_opt_count; int all_opt_count; int ret = 0; const char *env; if (!isatty(STDOUT_FILENO) || getenv("IGT_PLAIN_OUTPUT")) __igt_plain_output = true; if (!__igt_plain_output) setlocale(LC_ALL, ""); env = getenv("IGT_LOG_LEVEL"); if (env) { if (strcmp(env, "debug") == 0) igt_log_level = IGT_LOG_DEBUG; else if (strcmp(env, "info") == 0) igt_log_level = IGT_LOG_INFO; else if (strcmp(env, "warn") == 0) igt_log_level = IGT_LOG_WARN; else if (strcmp(env, "none") == 0) igt_log_level = IGT_LOG_NONE; } command_str = argv[0]; if (strrchr(command_str, '/')) command_str = strrchr(command_str, '/') + 1; /* First calculate space for all passed-in extra long options */ all_opt_count = 0; while (extra_long_opts && extra_long_opts[all_opt_count].name) { /* check for conflicts with standard long option values */ for (i = 0; long_options[i].name; i++) if (extra_long_opts[all_opt_count].val == long_options[i].val) igt_warn("Conflicting long option values between --%s and --%s\n", extra_long_opts[all_opt_count].name, long_options[i].name); /* check for conflicts with short options */ if (extra_long_opts[all_opt_count].val != ':' && strchr(std_short_opts, extra_long_opts[all_opt_count].val)) { igt_warn("Conflicting long and short option values between --%s and -%s\n", extra_long_opts[all_opt_count].name, long_options[i].name); } all_opt_count++; } extra_opt_count = all_opt_count; /* check for conflicts in extra short options*/ for (i = 0; extra_short_opts && extra_short_opts[i]; i++) { if (extra_short_opts[i] == ':') continue; /* check for conflicts with standard short options */ if (strchr(std_short_opts, extra_short_opts[i])) igt_warn("Conflicting short option: -%c\n", std_short_opts[i]); /* check for conflicts with standard long option values */ for (x = 0; long_options[x].name; x++) if (long_options[x].val == extra_short_opts[i]) igt_warn("Conflicting short option and long option value: --%s and -%c\n", long_options[x].name, extra_short_opts[i]); } all_opt_count += ARRAY_SIZE(long_options); combined_opts = malloc(all_opt_count * sizeof(*combined_opts)); memcpy(combined_opts, extra_long_opts, extra_opt_count * sizeof(*combined_opts)); /* Copy the subtest long options (and the final NULL entry) */ memcpy(&combined_opts[extra_opt_count], long_options, ARRAY_SIZE(long_options) * sizeof(*combined_opts)); ret = asprintf(&short_opts, "%s%s", extra_short_opts ? extra_short_opts : "", std_short_opts); assert(ret >= 0); while ((c = getopt_long(*argc, argv, short_opts, combined_opts, &option_index)) != -1) { switch(c) { case OPT_INTERACTIVE_DEBUG: if (optarg && strlen(optarg) > 0) igt_interactive_debug = strdup(optarg); else igt_interactive_debug = "all"; break; case OPT_DEBUG: igt_log_level = IGT_LOG_DEBUG; if (optarg && strlen(optarg) > 0) igt_log_domain_filter = strdup(optarg); break; case OPT_LIST_SUBTESTS: if (!run_single_subtest) list_subtests = true; break; case OPT_RUN_SUBTEST: if (!list_subtests) run_single_subtest = strdup(optarg); break; case OPT_DESCRIPTION: print_test_description(); ret = -1; goto out; case OPT_HELP: print_usage(help_str, false); ret = -1; goto out; case '?': print_usage(help_str, true); ret = -2; goto out; default: ret = extra_opt_handler(c, option_index, handler_data); if (ret) goto out; } } out: free(short_opts); free(combined_opts); /* exit immediately if this test has no subtests and a subtest or the * list of subtests has been requested */ if (!test_with_subtests) { if (run_single_subtest) { igt_warn("Unknown subtest: %s\n", run_single_subtest); exit(IGT_EXIT_INVALID); } if (list_subtests) exit(IGT_EXIT_INVALID); } if (ret < 0) /* exit with no error for -h/--help */ exit(ret == -1 ? 0 : IGT_EXIT_INVALID); if (!list_subtests) { kmsg(KERN_INFO "%s: executing\n", command_str); print_version(); oom_adjust_for_doom(); low_mem_killer_disable(true); } /* install exit handler, to ensure we clean up */ igt_install_exit_handler(common_exit_handler); if (!test_with_subtests) gettime(&subtest_time); for (i = 0; (optind + i) < *argc; i++) argv[i + 1] = argv[optind + i]; *argc = *argc - optind + 1; return ret; } /** * igt_subtest_init_parse_opts: * @argc: argc from the test's main() * @argv: argv from the test's main() * @extra_short_opts: getopt_long() compliant list with additional short options * @extra_long_opts: getopt_long() compliant list with additional long options * @help_str: help string for the additional options * @extra_opt_handler: handler for the additional options * @handler_data: user data given to @extra_opt_handler when invoked * * This function handles the subtest related command line options and allows an * arbitrary set of additional options. This is useful for tests which have * additional knobs to tune when run manually like the number of rounds execute * or the size of the allocated buffer objects. * * Tests without special needs should just use igt_subtest_init() or use * #igt_main directly instead of their own main() function. * * Returns: Forwards any option parsing errors from getopt_long. */ int igt_subtest_init_parse_opts(int *argc, char **argv, const char *extra_short_opts, const struct option *extra_long_opts, const char *help_str, igt_opt_handler_t extra_opt_handler, void *handler_data) { int ret; test_with_subtests = true; ret = common_init(argc, argv, extra_short_opts, extra_long_opts, help_str, extra_opt_handler, handler_data); return ret; } enum igt_log_level igt_log_level = IGT_LOG_INFO; /** * igt_simple_init_parse_opts: * @argc: argc from the test's main() * @argv: argv from the test's main() * @extra_short_opts: getopt_long() compliant list with additional short options * @extra_long_opts: getopt_long() compliant list with additional long options * @help_str: help string for the additional options * @extra_opt_handler: handler for the additional options * @handler_data: user data given to @extra_opt_handler when invoked * * This initializes a simple test without any support for subtests and allows * an arbitrary set of additional options. */ void igt_simple_init_parse_opts(int *argc, char **argv, const char *extra_short_opts, const struct option *extra_long_opts, const char *help_str, igt_opt_handler_t extra_opt_handler, void *handler_data) { common_init(argc, argv, extra_short_opts, extra_long_opts, help_str, extra_opt_handler, handler_data); } /* * Note: Testcases which use these helpers MUST NOT output anything to stdout * outside of places protected by igt_run_subtest checks - the piglit * runner adds every line to the subtest list. */ bool __igt_run_subtest(const char *subtest_name) { int i; assert(!in_subtest); assert(!in_fixture); assert(test_with_subtests); /* check the subtest name only contains a-z, A-Z, 0-9, '-' and '_' */ for (i = 0; subtest_name[i] != '\0'; i++) if (subtest_name[i] != '_' && subtest_name[i] != '-' && !isalnum(subtest_name[i])) { igt_critical("Invalid subtest name \"%s\".\n", subtest_name); igt_exit(); } if (list_subtests) { printf("%s\n", subtest_name); return false; } if (run_single_subtest) { if (uwildmat(subtest_name, run_single_subtest) == 0) return false; else run_single_subtest_found = true; } if (skip_subtests_henceforth) { printf("%sSubtest %s: %s%s\n", (!__igt_plain_output) ? "\x1b[1m" : "", subtest_name, skip_subtests_henceforth == SKIP ? "SKIP" : "FAIL", (!__igt_plain_output) ? "\x1b[0m" : ""); return false; } kmsg(KERN_INFO "%s: starting subtest %s\n", command_str, subtest_name); igt_debug("Starting subtest: %s\n", subtest_name); _igt_log_buffer_reset(); gettime(&subtest_time); return (in_subtest = subtest_name); } /** * igt_subtest_name: * * Returns: The name of the currently executed subtest or NULL if called from * outside a subtest block. */ const char *igt_subtest_name(void) { return in_subtest; } /** * igt_only_list_subtests: * * Returns: Returns true if only subtest should be listed and any setup code * must be skipped, false otherwise. */ bool igt_only_list_subtests(void) { return list_subtests; } static bool skipped_one = false; static bool succeeded_one = false; static bool failed_one = false; static void exit_subtest(const char *) __attribute__((noreturn)); static void exit_subtest(const char *result) { struct timespec now; gettime(&now); printf("%sSubtest %s: %s (%.3fs)%s\n", (!__igt_plain_output) ? "\x1b[1m" : "", in_subtest, result, time_elapsed(&subtest_time, &now), (!__igt_plain_output) ? "\x1b[0m" : ""); fflush(stdout); in_subtest = NULL; siglongjmp(igt_subtest_jmpbuf, 1); } /** * igt_skip: * @f: format string * @...: optional arguments used in the format string * * Subtest aware test skipping. The format string is printed to stderr as the * reason why the test skipped. * * For tests with subtests this will either bail out of the current subtest or * mark all subsequent subtests as SKIP (presuming some global setup code * failed). * * For normal tests without subtest it will directly exit. */ void igt_skip(const char *f, ...) { va_list args; skipped_one = true; assert(!test_child); if (!igt_only_list_subtests()) { va_start(args, f); vprintf(f, args); va_end(args); } if (in_subtest) { exit_subtest("SKIP"); } else if (test_with_subtests) { skip_subtests_henceforth = SKIP; assert(in_fixture); __igt_fixture_end(); } else { igt_exitcode = IGT_EXIT_SKIP; igt_exit(); } } void __igt_skip_check(const char *file, const int line, const char *func, const char *check, const char *f, ...) { va_list args; int err = errno; char *err_str = NULL; if (err) igt_assert_neq(asprintf(&err_str, "Last errno: %i, %s\n", err, strerror(err)), -1); if (f) { static char *buf; /* igt_skip never returns, so try to not leak too badly. */ if (buf) free(buf); va_start(args, f); igt_assert_neq(vasprintf(&buf, f, args), -1); va_end(args); igt_skip("Test requirement not met in function %s, file %s:%i:\n" "Test requirement: %s\n%s" "%s", func, file, line, check, buf, err_str ?: ""); } else { igt_skip("Test requirement not met in function %s, file %s:%i:\n" "Test requirement: %s\n" "%s", func, file, line, check, err_str ?: ""); } } /** * igt_success: * * Complete a (subtest) as successful * * This bails out of a subtests and marks it as successful. For global tests it * it won't bail out of anything. */ void igt_success(void) { succeeded_one = true; if (in_subtest) exit_subtest("SUCCESS"); } /** * igt_fail: * @exitcode: exitcode * * Fail a testcase. The exitcode is used as the exit code of the test process. * It may not be 0 (which indicates success) or 77 (which indicates a skipped * test). * * For tests with subtests this will either bail out of the current subtest or * mark all subsequent subtests as FAIL (presuming some global setup code * failed). * * For normal tests without subtest it will directly exit with the given * exitcode. */ void igt_fail(int exitcode) { assert(exitcode != IGT_EXIT_SUCCESS && exitcode != IGT_EXIT_SKIP); igt_debug_wait_for_keypress("failure"); /* Exit immediately if the test is already exiting and igt_fail is * called. This can happen if an igt_assert fails in an exit handler */ if (in_atexit_handler) _exit(IGT_EXIT_FAILURE); if (!failed_one) igt_exitcode = exitcode; failed_one = true; /* Silent exit, parent will do the yelling. */ if (test_child) exit(exitcode); _igt_log_buffer_dump(); if (in_subtest) { if (exitcode == IGT_EXIT_TIMEOUT) exit_subtest("TIMEOUT"); else exit_subtest("FAIL"); } else { assert(!test_with_subtests || in_fixture); if (in_fixture) { skip_subtests_henceforth = FAIL; __igt_fixture_end(); } igt_exit(); } } static bool run_under_gdb(void) { char buf[1024]; sprintf(buf, "/proc/%d/exe", getppid()); return (readlink (buf, buf, sizeof (buf)) != -1 && strncmp(basename(buf), "gdb", 3) == 0); } #ifdef HAVE_LIBUNWIND #define UNW_LOCAL_ONLY #include static void print_backtrace(void) { unw_cursor_t cursor; unw_context_t uc; int stack_num = 0; printf("Stack trace:\n"); unw_getcontext(&uc); unw_init_local(&cursor, &uc); while (unw_step(&cursor) > 0) { char name[255]; unw_word_t off; if (unw_get_proc_name(&cursor, name, 255, &off) < 0) strcpy(name, ""); printf(" #%d [%s+0x%x]\n", stack_num++, name, (unsigned int) off); } } #endif void __igt_fail_assert(const char *domain, const char *file, const int line, const char *func, const char *assertion, const char *f, ...) { va_list args; int err = errno; igt_log(domain, IGT_LOG_CRITICAL, "Test assertion failure function %s, file %s:%i:\n", func, file, line); igt_log(domain, IGT_LOG_CRITICAL, "Failed assertion: %s\n", assertion); if (err) igt_log(domain, IGT_LOG_CRITICAL, "Last errno: %i, %s\n", err, strerror(err)); if (f) { va_start(args, f); igt_vlog(domain, IGT_LOG_CRITICAL, f, args); va_end(args); } #ifdef HAVE_LIBUNWIND print_backtrace(); #endif if (run_under_gdb()) abort(); igt_fail(IGT_EXIT_FAILURE); } /** * igt_exit: * * exit() for both types (simple and with subtests) of i-g-t tests. * * This will exit the test with the right exit code when subtests have been * skipped. For normal tests it exits with a successful exit code, presuming * everything has worked out. For subtests it also checks that at least one * subtest has been run (save when only listing subtests. * * It is an error to normally exit a test calling igt_exit() - without it the * result reporting will be wrong. To avoid such issues it is highly recommended * to use #igt_main or #igt_simple_main instead of a hand-rolled main() function. */ void igt_exit(void) { igt_exit_called = true; if (run_single_subtest && !run_single_subtest_found) { igt_warn("Unknown subtest: %s\n", run_single_subtest); exit(IGT_EXIT_INVALID); } if (igt_only_list_subtests()) exit(IGT_EXIT_SUCCESS); kmsg(KERN_INFO "%s: exiting, ret=%d\n", command_str, igt_exitcode); igt_debug("Exiting with status code %d\n", igt_exitcode); for (int c = 0; c < num_test_children; c++) kill(test_children[c], SIGKILL); if (!test_with_subtests) { struct timespec now; const char *result; gettime(&now); switch (igt_exitcode) { case IGT_EXIT_SUCCESS: result = "SUCCESS"; break; case IGT_EXIT_TIMEOUT: result = "TIMEOUT"; break; case IGT_EXIT_SKIP: result = "SKIP"; break; default: result = "FAIL"; } printf("%s (%.3fs)\n", result, time_elapsed(&subtest_time, &now)); exit(igt_exitcode); } /* Calling this without calling one of the above is a failure */ assert(skipped_one || succeeded_one || failed_one); if (failed_one) exit(igt_exitcode); else if (succeeded_one) exit(IGT_EXIT_SUCCESS); else exit(IGT_EXIT_SKIP); } /* fork support code */ static int helper_process_count; static pid_t helper_process_pids[] = { -1, -1, -1, -1}; static void reset_helper_process_list(void) { for (int i = 0; i < ARRAY_SIZE(helper_process_pids); i++) helper_process_pids[i] = -1; helper_process_count = 0; } static int __waitpid(pid_t pid) { int status = -1; while (waitpid(pid, &status, 0) == -1 && errno == EINTR) ; return status; } static void fork_helper_exit_handler(int sig) { /* Inside a signal handler, play safe */ for (int i = 0; i < ARRAY_SIZE(helper_process_pids); i++) { pid_t pid = helper_process_pids[i]; if (pid != -1) { kill(pid, SIGTERM); __waitpid(pid); helper_process_count--; } } assert(helper_process_count == 0); } bool __igt_fork_helper(struct igt_helper_process *proc) { pid_t pid; int id; int tmp_count; assert(!proc->running); assert(helper_process_count < ARRAY_SIZE(helper_process_pids)); for (id = 0; helper_process_pids[id] != -1; id++) ; igt_install_exit_handler(fork_helper_exit_handler); /* * Avoid races when the parent stops the child before the setup code * had a chance to run. This happens e.g. when skipping tests wrapped in * the signal helper. */ tmp_count = exit_handler_count; exit_handler_count = 0; /* ensure any buffers are flushed before fork */ fflush(NULL); switch (pid = fork()) { case -1: exit_handler_count = tmp_count; igt_assert(0); case 0: reset_helper_process_list(); oom_adjust_for_doom(); return true; default: exit_handler_count = tmp_count; proc->running = true; proc->pid = pid; proc->id = id; helper_process_pids[id] = pid; helper_process_count++; return false; } } /** * igt_wait_helper: * @proc: #igt_helper_process structure * * Joins a helper process. It is an error to call this on a helper process which * hasn't been spawned yet. */ int igt_wait_helper(struct igt_helper_process *proc) { int status; assert(proc->running); status = __waitpid(proc->pid); proc->running = false; helper_process_pids[proc->id] = -1; helper_process_count--; return status; } /** * igt_stop_helper: * @proc: #igt_helper_process structure * * Terminates a helper process. It is an error to call this on a helper process * which hasn't been spawned yet. */ void igt_stop_helper(struct igt_helper_process *proc) { int status; /* failure here means the pid is already dead and so waiting is safe */ kill(proc->pid, proc->use_SIGKILL ? SIGKILL : SIGTERM); status = igt_wait_helper(proc); assert(WIFSIGNALED(status) && WTERMSIG(status) == (proc->use_SIGKILL ? SIGKILL : SIGTERM)); } static void children_exit_handler(int sig) { int status; /* The exit handler can be called from a fatal signal, so play safe */ while (num_test_children-- && wait(&status)) ; } bool __igt_fork(void) { assert(!test_with_subtests || in_subtest); assert(!test_child); igt_install_exit_handler(children_exit_handler); if (num_test_children >= test_children_sz) { if (!test_children_sz) test_children_sz = 4; else test_children_sz *= 2; test_children = realloc(test_children, sizeof(pid_t)*test_children_sz); igt_assert(test_children); } /* ensure any buffers are flushed before fork */ fflush(NULL); switch (test_children[num_test_children++] = fork()) { case -1: igt_assert(0); case 0: test_child = true; exit_handler_count = 0; reset_helper_process_list(); oom_adjust_for_doom(); return true; default: return false; } } /** * igt_waitchildren: * * Wait for all children forked with igt_fork. * * The magic here is that exit codes from children will be correctly propagated * to the main thread, including the relevant exit code if a child thread failed. * Of course if multiple children failed with different exit codes the resulting * exit code will be non-deterministic. * * Note that igt_skip() will not be forwarded, feature tests need to be done * before spawning threads with igt_fork(). */ void igt_waitchildren(void) { int err = 0; int count; assert(!test_child); count = 0; while (count < num_test_children) { int status = -1; pid_t pid; int c; pid = wait(&status); if (pid == -1) continue; for (c = 0; c < num_test_children; c++) if (pid == test_children[c]) break; if (c == num_test_children) continue; if (err == 0 && status != 0) { if (WIFEXITED(status)) { printf("child %i failed with exit status %i\n", c, WEXITSTATUS(status)); err = WEXITSTATUS(status); } else if (WIFSIGNALED(status)) { printf("child %i died with signal %i, %s\n", c, WTERMSIG(status), strsignal(WTERMSIG(status))); err = 128 + WTERMSIG(status); } else { printf("Unhandled failure [%d] in child %i\n", status, c); err = 256; } for (c = 0; c < num_test_children; c++) kill(test_children[c], SIGKILL); } count++; } num_test_children = 0; if (err) igt_fail(err); } /** * igt_waitchildren_timeout: * * Wait for all children forked with igt_fork, for a maximum of @seconds. * * Wraps igt_waitchildren() and igt_set_timeout() */ void igt_waitchildren_timeout(int seconds, const char *reason) { igt_set_timeout(seconds, reason); igt_waitchildren(); igt_reset_timeout(); } /* exit handler code */ #define MAX_SIGNALS 32 #define MAX_EXIT_HANDLERS 10 #ifndef HAVE_SIGHANDLER_T typedef void (*sighandler_t)(int); #endif static struct { sighandler_t handler; bool installed; } orig_sig[MAX_SIGNALS]; static igt_exit_handler_t exit_handler_fn[MAX_EXIT_HANDLERS]; static bool exit_handler_disabled; static sigset_t saved_sig_mask; #define SIGDEF(x) { x, #x, sizeof(#x) - 1 } #define SILENT(x) { x, NULL, 0 } static const struct { int number; const char *name; size_t name_len; } handled_signals[] = { SILENT(SIGINT), SILENT(SIGHUP), SILENT(SIGTERM), SILENT(SIGQUIT), SILENT(SIGPIPE), SIGDEF(SIGABRT), SIGDEF(SIGSEGV), SIGDEF(SIGBUS) }; #undef SILENT #undef SIGDEF static int install_sig_handler(int sig_num, sighandler_t handler) { orig_sig[sig_num].handler = signal(sig_num, handler); if (orig_sig[sig_num].handler == SIG_ERR) return -1; orig_sig[sig_num].installed = true; return 0; } static void restore_sig_handler(int sig_num) { /* Just restore the default so that we properly fall over. */ signal(sig_num, SIG_DFL); } static void restore_all_sig_handler(void) { int i; for (i = 0; i < ARRAY_SIZE(orig_sig); i++) restore_sig_handler(i); } static void call_exit_handlers(int sig) { int i; if (!exit_handler_count) { return; } for (i = exit_handler_count - 1; i >= 0; i--) exit_handler_fn[i](sig); /* ensure we don't get called twice */ exit_handler_count = 0; } static void igt_atexit_handler(void) { in_atexit_handler = true; restore_all_sig_handler(); if (!exit_handler_disabled) call_exit_handlers(0); } static bool crash_signal(int sig) { switch (sig) { case SIGILL: case SIGBUS: case SIGSEGV: return true; default: return false; } } static void fatal_sig_handler(int sig) { int i; for (i = 0; i < ARRAY_SIZE(handled_signals); i++) { if (handled_signals[i].number != sig) continue; if (handled_signals[i].name_len) { igt_assert_eq(write(STDERR_FILENO, "Received signal ", 16), 16); igt_assert_eq(write(STDERR_FILENO, handled_signals[i].name, handled_signals[i].name_len), handled_signals[i].name_len); igt_assert_eq(write(STDERR_FILENO, ".\n", 2), 2); } if (in_subtest && crash_signal(sig)) { /* Linux standard to return exit code as 128 + signal */ if (!failed_one) igt_exitcode = 128 + sig; failed_one = true; exit_subtest("CRASH"); } break; } restore_all_sig_handler(); /* * exit_handler_disabled is always false here, since when we set it * we also block signals. */ call_exit_handlers(sig); { #ifdef __linux__ /* Workaround cached PID and TID races on glibc and Bionic libc. */ pid_t pid = syscall(SYS_getpid); pid_t tid = syscall(SYS_gettid); syscall(SYS_tgkill, pid, tid, sig); #else pthread_t tid = pthread_self(); union sigval value = { .sival_ptr = NULL }; pthread_sigqueue(tid, sig, value); #endif } } /** * igt_install_exit_handler: * @fn: exit handler function * * Set a handler that will be called either when the process calls exit() or * returns from the main function, or one of the signals in * 'handled_signals' is raised. MAX_EXIT_HANDLERS handlers can be installed, * each of which will be called only once, even if a subsequent signal is * raised. If the exit handlers are called due to a signal, the signal will be * re-raised with the original signal disposition after all handlers returned. * * The handler will be passed the signal number if called due to a signal, or * 0 otherwise. Exit handlers can also be used from test children spawned with * igt_fork(), but not from within helper processes spawned with * igt_fork_helper(). The list of exit handlers is reset when forking to * avoid issues with children cleanup up the parent's state too early. */ void igt_install_exit_handler(igt_exit_handler_t fn) { int i; for (i = 0; i < exit_handler_count; i++) if (exit_handler_fn[i] == fn) return; igt_assert(exit_handler_count < MAX_EXIT_HANDLERS); exit_handler_fn[exit_handler_count] = fn; exit_handler_count++; if (exit_handler_count > 1) return; for (i = 0; i < ARRAY_SIZE(handled_signals); i++) { if (install_sig_handler(handled_signals[i].number, fatal_sig_handler)) goto err; } if (atexit(igt_atexit_handler)) goto err; return; err: restore_all_sig_handler(); exit_handler_count--; igt_assert_f(0, "failed to install the signal handler\n"); } /** * igt_disable_exit_handler: * * Temporarily disable all exit handlers. Useful for library code doing tricky * things. */ void igt_disable_exit_handler(void) { sigset_t set; int i; if (exit_handler_disabled) return; sigemptyset(&set); for (i = 0; i < ARRAY_SIZE(handled_signals); i++) sigaddset(&set, handled_signals[i].number); if (sigprocmask(SIG_BLOCK, &set, &saved_sig_mask)) { perror("sigprocmask"); return; } exit_handler_disabled = true; } /** * igt_enable_exit_handler: * * Re-enable all exit handlers temporarily disabled with * igt_disable_exit_handler(). */ void igt_enable_exit_handler(void) { if (!exit_handler_disabled) return; if (sigprocmask(SIG_SETMASK, &saved_sig_mask, NULL)) { perror("sigprocmask"); return; } exit_handler_disabled = false; } /* simulation enviroment support */ /** * igt_run_in_simulation: * * This function can be used to select a reduced test set when running in * simulation environments. This i-g-t mode is selected by setting the * INTEL_SIMULATION environment variable to 1. * * Returns: True when run in simulation mode, false otherwise. */ bool igt_run_in_simulation(void) { static int simulation = -1; if (simulation == -1) simulation = igt_check_boolean_env_var("INTEL_SIMULATION", false); return simulation; } /** * igt_skip_on_simulation: * * Skip tests when INTEL_SIMULATION environment variable is set. It uses * igt_skip() internally and hence is fully subtest aware. * * Note that in contrast to all other functions which use igt_skip() internally * it is allowed to use this outside of an #igt_fixture block in a test with * subtests. This is because in contrast to most other test requirements, * checking for simulation mode doesn't depend upon the present hardware and it * so makes a lot of sense to have this check in the outermost #igt_main block. */ void igt_skip_on_simulation(void) { if (igt_only_list_subtests()) return; if (!in_fixture && !in_subtest) { igt_fixture igt_require(!igt_run_in_simulation()); } else igt_require(!igt_run_in_simulation()); } /* structured logging */ /** * igt_log: * @domain: the log domain, or NULL for no domain * @level: #igt_log_level * @format: format string * @...: optional arguments used in the format string * * This is the generic structured logging helper function. i-g-t testcase should * output all normal message to stdout. Warning level message should be printed * to stderr and the test runner should treat this as an intermediate result * between SUCCESS and FAILURE. * * The log level can be set through the IGT_LOG_LEVEL environment variable with * values "debug", "info", "warn", "critical" and "none". By default verbose * debug message are disabled. "none" completely disables all output and is not * recommended since crucial issues only reported at the IGT_LOG_WARN level are * ignored. */ void igt_log(const char *domain, enum igt_log_level level, const char *format, ...) { va_list args; va_start(args, format); igt_vlog(domain, level, format, args); va_end(args); } /** * igt_vlog: * @domain: the log domain, or NULL for no domain * @level: #igt_log_level * @format: format string * @args: variable arguments lists * * This is the generic logging helper function using an explicit varargs * structure and hence useful to implement domain-specific logging * functions. * * If there is no need to wrap up a vararg list in the caller it is simpler to * just use igt_log(). */ void igt_vlog(const char *domain, enum igt_log_level level, const char *format, va_list args) { FILE *file; char *line, *formatted_line; const char *program_name; const char *igt_log_level_str[] = { "DEBUG", "INFO", "WARNING", "CRITICAL", "NONE" }; static bool line_continuation = false; assert(format); #ifdef __GLIBC__ program_name = program_invocation_short_name; #else program_name = command_str; #endif if (list_subtests && level <= IGT_LOG_WARN) return; if (vasprintf(&line, format, args) == -1) return; if (line_continuation) { formatted_line = strdup(line); if (!formatted_line) goto out; } else if (asprintf(&formatted_line, "(%s:%d) %s%s%s: %s", program_name, getpid(), (domain) ? domain : "", (domain) ? "-" : "", igt_log_level_str[level], line) == -1) { goto out; } line_continuation = line[strlen(line) - 1] != '\n'; /* append log buffer */ _igt_log_buffer_append(formatted_line); /* check print log level */ if (igt_log_level > level) goto out; /* check domain filter */ if (igt_log_domain_filter) { /* if null domain and filter is not "application", return */ if (!domain && strcmp(igt_log_domain_filter, "application")) goto out; /* else if domain and filter do not match, return */ else if (domain && strcmp(igt_log_domain_filter, domain)) goto out; } /* use stderr for warning messages and above */ if (level >= IGT_LOG_WARN) { file = stderr; fflush(stdout); } else file = stdout; /* prepend all except information messages with process, domain and log * level information */ if (level != IGT_LOG_INFO) fwrite(formatted_line, sizeof(char), strlen(formatted_line), file); else fwrite(line, sizeof(char), strlen(line), file); out: free(line); } static const char *timeout_op; static void __attribute__((noreturn)) igt_alarm_handler(int signal) { if (timeout_op) igt_info("Timed out: %s\n", timeout_op); else igt_info("Timed out\n"); /* exit with failure status */ igt_fail(IGT_EXIT_FAILURE); } /** * igt_set_timeout: * @seconds: number of seconds before timeout * @op: Optional string to explain what operation has timed out in the debug log * * Fail a test and exit with #IGT_EXIT_FAILURE status after the specified * number of seconds have elapsed. If the current test has subtests and the * timeout occurs outside a subtest, subsequent subtests will be skipped and * marked as failed. * * Any previous timer is cancelled and no timeout is scheduled if @seconds is * zero. But for clarity the timeout set with this function should be cleared * with igt_reset_timeout(). */ void igt_set_timeout(unsigned int seconds, const char *op) { struct sigaction sa; sa.sa_handler = igt_alarm_handler; sigemptyset(&sa.sa_mask); sa.sa_flags = 0; timeout_op = op; if (seconds == 0) sigaction(SIGALRM, NULL, NULL); else sigaction(SIGALRM, &sa, NULL); alarm(seconds); } /** * igt_reset_timeout: * * This function resets a timeout set by igt_set_timeout() and disables any * timer set up by the former function. */ void igt_reset_timeout(void) { igt_set_timeout(0, NULL); } FILE *__igt_fopen_data(const char* igt_srcdir, const char* igt_datadir, const char* filename) { char path[PATH_MAX]; FILE *fp; snprintf(path, sizeof(path), "%s/%s", igt_datadir, filename); fp = fopen(path, "r"); if (!fp) { snprintf(path, sizeof(path), "%s/%s", igt_srcdir, filename); fp = fopen(path, "r"); } if (!fp) igt_critical("Could not open data file \"%s\": %s", filename, strerror(errno)); return fp; } intel-gpu-tools-1.14/lib/rendercopy_i830.c0000644000175000017500000001744712665336131015274 00000000000000#include #include #include #include #include #include #include #include #include #include #include "drm.h" #include "i915_drm.h" #include "drmtest.h" #include "intel_bufmgr.h" #include "intel_batchbuffer.h" #include "intel_io.h" #include "i830_reg.h" #include "rendercopy.h" #define TB0C_LAST_STAGE (1 << 31) #define TB0C_RESULT_SCALE_1X (0 << 29) #define TB0C_RESULT_SCALE_2X (1 << 29) #define TB0C_RESULT_SCALE_4X (2 << 29) #define TB0C_OP_ARG1 (1 << 25) #define TB0C_OP_MODULE (3 << 25) #define TB0C_OUTPUT_WRITE_CURRENT (0 << 24) #define TB0C_OUTPUT_WRITE_ACCUM (1 << 24) #define TB0C_ARG3_REPLICATE_ALPHA (1<<23) #define TB0C_ARG3_INVERT (1<<22) #define TB0C_ARG3_SEL_XXX #define TB0C_ARG2_REPLICATE_ALPHA (1<<17) #define TB0C_ARG2_INVERT (1<<16) #define TB0C_ARG2_SEL_ONE (0 << 12) #define TB0C_ARG2_SEL_FACTOR (1 << 12) #define TB0C_ARG2_SEL_TEXEL0 (6 << 12) #define TB0C_ARG2_SEL_TEXEL1 (7 << 12) #define TB0C_ARG2_SEL_TEXEL2 (8 << 12) #define TB0C_ARG2_SEL_TEXEL3 (9 << 12) #define TB0C_ARG1_REPLICATE_ALPHA (1<<11) #define TB0C_ARG1_INVERT (1<<10) #define TB0C_ARG1_SEL_ONE (0 << 6) #define TB0C_ARG1_SEL_TEXEL0 (6 << 6) #define TB0C_ARG1_SEL_TEXEL1 (7 << 6) #define TB0C_ARG1_SEL_TEXEL2 (8 << 6) #define TB0C_ARG1_SEL_TEXEL3 (9 << 6) #define TB0C_ARG0_REPLICATE_ALPHA (1<<5) #define TB0C_ARG0_SEL_XXX #define TB0A_CTR_STAGE_ENABLE (1<<31) #define TB0A_RESULT_SCALE_1X (0 << 29) #define TB0A_RESULT_SCALE_2X (1 << 29) #define TB0A_RESULT_SCALE_4X (2 << 29) #define TB0A_OP_ARG1 (1 << 25) #define TB0A_OP_MODULE (3 << 25) #define TB0A_OUTPUT_WRITE_CURRENT (0<<24) #define TB0A_OUTPUT_WRITE_ACCUM (1<<24) #define TB0A_CTR_STAGE_SEL_BITS_XXX #define TB0A_ARG3_SEL_XXX #define TB0A_ARG3_INVERT (1<<17) #define TB0A_ARG2_INVERT (1<<16) #define TB0A_ARG2_SEL_ONE (0 << 12) #define TB0A_ARG2_SEL_TEXEL0 (6 << 12) #define TB0A_ARG2_SEL_TEXEL1 (7 << 12) #define TB0A_ARG2_SEL_TEXEL2 (8 << 12) #define TB0A_ARG2_SEL_TEXEL3 (9 << 12) #define TB0A_ARG1_INVERT (1<<10) #define TB0A_ARG1_SEL_ONE (0 << 6) #define TB0A_ARG1_SEL_TEXEL0 (6 << 6) #define TB0A_ARG1_SEL_TEXEL1 (7 << 6) #define TB0A_ARG1_SEL_TEXEL2 (8 << 6) #define TB0A_ARG1_SEL_TEXEL3 (9 << 6) static void gen2_emit_invariant(struct intel_batchbuffer *batch) { int i; for (i = 0; i < 4; i++) { OUT_BATCH(_3DSTATE_MAP_CUBE | MAP_UNIT(i)); OUT_BATCH(_3DSTATE_MAP_TEX_STREAM_CMD | MAP_UNIT(i) | DISABLE_TEX_STREAM_BUMP | ENABLE_TEX_STREAM_COORD_SET | TEX_STREAM_COORD_SET(i) | ENABLE_TEX_STREAM_MAP_IDX | TEX_STREAM_MAP_IDX(i)); OUT_BATCH(_3DSTATE_MAP_COORD_TRANSFORM); OUT_BATCH(DISABLE_TEX_TRANSFORM | TEXTURE_SET(i)); } OUT_BATCH(_3DSTATE_MAP_COORD_SETBIND_CMD); OUT_BATCH(TEXBIND_SET3(TEXCOORDSRC_VTXSET_3) | TEXBIND_SET2(TEXCOORDSRC_VTXSET_2) | TEXBIND_SET1(TEXCOORDSRC_VTXSET_1) | TEXBIND_SET0(TEXCOORDSRC_VTXSET_0)); OUT_BATCH(_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT); OUT_BATCH(_3DSTATE_VERTEX_TRANSFORM); OUT_BATCH(DISABLE_VIEWPORT_TRANSFORM | DISABLE_PERSPECTIVE_DIVIDE); OUT_BATCH(_3DSTATE_W_STATE_CMD); OUT_BATCH(MAGIC_W_STATE_DWORD1); OUT_BATCH(0x3f800000 /* 1.0 in IEEE float */ ); OUT_BATCH(_3DSTATE_INDPT_ALPHA_BLEND_CMD | DISABLE_INDPT_ALPHA_BLEND | ENABLE_ALPHA_BLENDFUNC | ABLENDFUNC_ADD); OUT_BATCH(_3DSTATE_CONST_BLEND_COLOR_CMD); OUT_BATCH(0); OUT_BATCH(_3DSTATE_MODES_1_CMD | ENABLE_COLR_BLND_FUNC | BLENDFUNC_ADD | ENABLE_SRC_BLND_FACTOR | SRC_BLND_FACT(BLENDFACTOR_ONE) | ENABLE_DST_BLND_FACTOR | DST_BLND_FACT(BLENDFACTOR_ZERO)); OUT_BATCH(_3DSTATE_ENABLES_1_CMD | DISABLE_LOGIC_OP | DISABLE_STENCIL_TEST | DISABLE_DEPTH_BIAS | DISABLE_SPEC_ADD | DISABLE_FOG | DISABLE_ALPHA_TEST | DISABLE_DEPTH_TEST | ENABLE_COLOR_BLEND); OUT_BATCH(_3DSTATE_ENABLES_2_CMD | DISABLE_STENCIL_WRITE | DISABLE_DITHER | DISABLE_DEPTH_WRITE | ENABLE_COLOR_MASK | ENABLE_COLOR_WRITE | ENABLE_TEX_CACHE); } static void gen2_emit_target(struct intel_batchbuffer *batch, struct igt_buf *dst) { uint32_t tiling; tiling = 0; if (dst->tiling != I915_TILING_NONE) tiling = BUF_3D_TILED_SURFACE; if (dst->tiling == I915_TILING_Y) tiling |= BUF_3D_TILE_WALK_Y; OUT_BATCH(_3DSTATE_BUF_INFO_CMD); OUT_BATCH(BUF_3D_ID_COLOR_BACK | tiling | BUF_3D_PITCH(dst->stride)); OUT_RELOC(dst->bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(_3DSTATE_DST_BUF_VARS_CMD); OUT_BATCH(COLR_BUF_ARGB8888 | DSTORG_HORT_BIAS(0x8) | DSTORG_VERT_BIAS(0x8)); OUT_BATCH(_3DSTATE_DRAW_RECT_CMD); OUT_BATCH(0); OUT_BATCH(0); /* ymin, xmin */ OUT_BATCH(DRAW_YMAX(igt_buf_height(dst) - 1) | DRAW_XMAX(igt_buf_width(dst) - 1)); OUT_BATCH(0); /* yorig, xorig */ } static void gen2_emit_texture(struct intel_batchbuffer *batch, struct igt_buf *src, int unit) { uint32_t tiling; tiling = 0; if (src->tiling != I915_TILING_NONE) tiling = TM0S1_TILED_SURFACE; if (src->tiling == I915_TILING_Y) tiling |= TM0S1_TILE_WALK; OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_2 | LOAD_TEXTURE_MAP(unit) | 4); OUT_RELOC(src->bo, I915_GEM_DOMAIN_SAMPLER, 0, 0); OUT_BATCH((igt_buf_height(src) - 1) << TM0S1_HEIGHT_SHIFT | (igt_buf_width(src) - 1) << TM0S1_WIDTH_SHIFT | MAPSURF_32BIT | MT_32BIT_ARGB8888 | tiling); OUT_BATCH((src->stride / 4 - 1) << TM0S2_PITCH_SHIFT | TM0S2_MAP_2D); OUT_BATCH(FILTER_NEAREST << TM0S3_MAG_FILTER_SHIFT | FILTER_NEAREST << TM0S3_MIN_FILTER_SHIFT | MIPFILTER_NONE << TM0S3_MIP_FILTER_SHIFT); OUT_BATCH(0); /* default color */ OUT_BATCH(_3DSTATE_MAP_COORD_SET_CMD | TEXCOORD_SET(unit) | ENABLE_TEXCOORD_PARAMS | TEXCOORDS_ARE_NORMAL | TEXCOORDTYPE_CARTESIAN | ENABLE_ADDR_V_CNTL | TEXCOORD_ADDR_V_MODE(TEXCOORDMODE_CLAMP_BORDER) | ENABLE_ADDR_U_CNTL | TEXCOORD_ADDR_U_MODE(TEXCOORDMODE_CLAMP_BORDER)); } static void gen2_emit_copy_pipeline(struct intel_batchbuffer *batch) { OUT_BATCH(_3DSTATE_INDPT_ALPHA_BLEND_CMD | DISABLE_INDPT_ALPHA_BLEND); OUT_BATCH(_3DSTATE_ENABLES_1_CMD | DISABLE_LOGIC_OP | DISABLE_STENCIL_TEST | DISABLE_DEPTH_BIAS | DISABLE_SPEC_ADD | DISABLE_FOG | DISABLE_ALPHA_TEST | DISABLE_COLOR_BLEND | DISABLE_DEPTH_TEST); OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_2 | LOAD_TEXTURE_BLEND_STAGE(0) | 1); OUT_BATCH(TB0C_LAST_STAGE | TB0C_RESULT_SCALE_1X | TB0C_OUTPUT_WRITE_CURRENT | TB0C_OP_ARG1 | TB0C_ARG1_SEL_TEXEL0); OUT_BATCH(TB0A_RESULT_SCALE_1X | TB0A_OUTPUT_WRITE_CURRENT | TB0A_OP_ARG1 | TB0A_ARG1_SEL_TEXEL0); } void gen2_render_copyfunc(struct intel_batchbuffer *batch, drm_intel_context *context, struct igt_buf *src, unsigned src_x, unsigned src_y, unsigned width, unsigned height, struct igt_buf *dst, unsigned dst_x, unsigned dst_y) { gen2_emit_invariant(batch); gen2_emit_copy_pipeline(batch); gen2_emit_target(batch, dst); gen2_emit_texture(batch, src, 0); OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(2) | I1_LOAD_S(3) | I1_LOAD_S(8) | 2); OUT_BATCH(1<<12); OUT_BATCH(S3_CULLMODE_NONE | S3_VERTEXHAS_XY); OUT_BATCH(S8_ENABLE_COLOR_BUFFER_WRITE); OUT_BATCH(_3DSTATE_VERTEX_FORMAT_2_CMD | TEXCOORDFMT_2D << 0); OUT_BATCH(PRIM3D_INLINE | PRIM3D_RECTLIST | (3*4 -1)); emit_vertex(batch, dst_x + width); emit_vertex(batch, dst_y + height); emit_vertex_normalized(batch, src_x + width, igt_buf_width(src)); emit_vertex_normalized(batch, src_y + height, igt_buf_height(src)); emit_vertex(batch, dst_x); emit_vertex(batch, dst_y + height); emit_vertex_normalized(batch, src_x, igt_buf_width(src)); emit_vertex_normalized(batch, src_y + height, igt_buf_height(src)); emit_vertex(batch, dst_x); emit_vertex(batch, dst_y); emit_vertex_normalized(batch, src_x, igt_buf_width(src)); emit_vertex_normalized(batch, src_y, igt_buf_height(src)); intel_batchbuffer_flush(batch); } intel-gpu-tools-1.14/lib/intel_io.h0000644000175000017500000000634612665336131014162 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. * * Authors: * Eric Anholt * */ #ifndef INTEL_GPU_TOOLS_H #define INTEL_GPU_TOOLS_H #include #include /* register access helpers from intel_mmio.c */ extern void *igt_global_mmio; void intel_mmio_use_pci_bar(struct pci_device *pci_dev); void intel_mmio_use_dump_file(char *file); int intel_register_access_init(struct pci_device *pci_dev, int safe); void intel_register_access_fini(void); uint32_t intel_register_read(uint32_t reg); void intel_register_write(uint32_t reg, uint32_t val); int intel_register_access_needs_fakewake(void); uint32_t INREG(uint32_t reg); uint16_t INREG16(uint32_t reg); uint8_t INREG8(uint32_t reg); void OUTREG(uint32_t reg, uint32_t val); void OUTREG16(uint32_t reg, uint16_t val); void OUTREG8(uint32_t reg, uint8_t val); /* sideband access functions from intel_iosf.c */ uint32_t intel_dpio_reg_read(uint32_t reg, int phy); void intel_dpio_reg_write(uint32_t reg, uint32_t val, int phy); uint32_t intel_flisdsi_reg_read(uint32_t reg); void intel_flisdsi_reg_write(uint32_t reg, uint32_t val); uint32_t intel_iosf_sb_read(uint32_t port, uint32_t reg); void intel_iosf_sb_write(uint32_t port, uint32_t reg, uint32_t val); int intel_punit_read(uint32_t addr, uint32_t *val); int intel_punit_write(uint32_t addr, uint32_t val); int intel_nc_read(uint32_t addr, uint32_t *val); int intel_nc_write(uint32_t addr, uint32_t val); /* register maps from intel_reg_map.c */ #ifndef __GTK_DOC_IGNORE__ #define INTEL_RANGE_RSVD (0<<0) /* Shouldn't be read or written */ #define INTEL_RANGE_READ (1<<0) #define INTEL_RANGE_WRITE (1<<1) #define INTEL_RANGE_RW (INTEL_RANGE_READ | INTEL_RANGE_WRITE) #define INTEL_RANGE_END (1<<31) struct intel_register_range { uint32_t base; uint32_t size; uint32_t flags; }; struct intel_register_map { struct intel_register_range *map; uint32_t top; uint32_t alignment_mask; }; struct intel_register_map intel_get_register_map(uint32_t devid); struct intel_register_range *intel_get_register_range(struct intel_register_map map, uint32_t offset, uint32_t mode); #endif /* __GTK_DOC_IGNORE__ */ #endif /* INTEL_GPU_TOOLS_H */ intel-gpu-tools-1.14/lib/igt_gt.h0000644000175000017500000000633112665336131013627 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ #ifndef IGT_GT_H #define IGT_GT_H #include "igt_debugfs.h" void igt_require_hang_ring(int fd, int ring); typedef struct igt_hang_ring { unsigned handle; unsigned ctx; unsigned ban; unsigned flags; } igt_hang_ring_t; #define HANG_POISON 0xc5c5c5c5 struct igt_hang_ring igt_hang_ctx(int fd, uint32_t ctx, int ring, unsigned flags, uint64_t *offset); #define HANG_ALLOW_BAN 1 #define HANG_ALLOW_CAPTURE 2 struct igt_hang_ring igt_hang_ring(int fd, int ring); void igt_post_hang_ring(int fd, struct igt_hang_ring arg); void igt_force_gpu_reset(void); void igt_fork_hang_helper(void); void igt_stop_hang_helper(void); int igt_open_forcewake_handle(void); /** * stop_ring_flags: * @STOP_RING_NONE: Can be used to clear the pending stop (warning: hang might * be declared already). Returned by igt_get_stop_rings() if there is * no currently stopped rings. * @STOP_RING_RENDER: Render ring * @STOP_RING_BSD: Video encoding/decoding ring * @STOP_RING_BLT: Blitter ring * @STOP_RING_VEBOX: Video enhancement ring * @STOP_RING_ALL: All rings * @STOP_RING_ALLOW_ERRORS: Driver will not omit expected DRM_ERRORS * @STOP_RING_ALLOW_BAN: Driver will use context ban policy * @STOP_RING_DEFAULTS: STOP_RING_ALL | STOP_RING_ALLOW_ERRORS * * Enumeration of all supported flags for igt_set_stop_rings(). * */ enum stop_ring_flags { STOP_RING_NONE = 0x00, STOP_RING_RENDER = (1 << 0), STOP_RING_BSD = (1 << 1), STOP_RING_BLT = (1 << 2), STOP_RING_VEBOX = (1 << 3), STOP_RING_ALL = 0xff, STOP_RING_ALLOW_ERRORS = (1 << 30), STOP_RING_ALLOW_BAN = (1 << 31), STOP_RING_DEFAULTS = STOP_RING_ALL | STOP_RING_ALLOW_ERRORS, }; enum stop_ring_flags igt_to_stop_ring_flag(int ring); void igt_set_stop_rings(enum stop_ring_flags flags); enum stop_ring_flags igt_get_stop_rings(void); int igt_setup_clflush(void); void igt_clflush_range(void *addr, int size); unsigned intel_detect_and_clear_missed_interrupts(int fd); extern const struct intel_execution_engine { const char *name; const char *full_name; unsigned exec_id; unsigned flags; } intel_execution_engines[]; #endif /* IGT_GT_H */ intel-gpu-tools-1.14/lib/tests/0000755000175000017500000000000012665337376013434 500000000000000intel-gpu-tools-1.14/lib/tests/igt_simulation.c0000644000175000017500000001056612665336131016543 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * */ #include #include #include #include #include #include "drmtest.h" #include "igt_core.h" /* * We need to hide assert from the cocci igt test refactor spatch. * * IMPORTANT: Test infrastructure tests are the only valid places where using * assert is allowed. */ #define internal_assert assert bool simple; bool list_subtests; bool in_fixture; bool in_subtest; char test[] = "test"; char list[] = "--list-subtests"; char *argv_list[] = { test, list }; char *argv_run[] = { test }; static int do_fork(void) { int pid, status; int argc; switch (pid = fork()) { case -1: internal_assert(0); case 0: if (simple) { argc = 1; igt_simple_init(argc, argv_run); igt_skip_on_simulation(); igt_exit(); } else { if (list_subtests) { argc = 2; igt_subtest_init(argc, argv_list); } else { argc = 1; igt_subtest_init(argc, argv_run); } if (in_fixture) { igt_fixture igt_skip_on_simulation(); } if (in_subtest) { igt_subtest("sim") igt_skip_on_simulation(); } else igt_skip_on_simulation(); if (!in_subtest) igt_subtest("foo") ; igt_exit(); } default: while (waitpid(pid, &status, 0) == -1 && errno == EINTR) ; internal_assert(WIFEXITED(status)); return WEXITSTATUS(status); } } int main(int argc, char **argv) { /* simple tests */ simple = true; internal_assert(setenv("INTEL_SIMULATION", "1", 1) == 0); internal_assert(do_fork() == IGT_EXIT_SKIP); internal_assert(setenv("INTEL_SIMULATION", "0", 1) == 0); internal_assert(do_fork() == IGT_EXIT_SUCCESS); /* subtests, list mode */ simple = false; list_subtests = true; in_fixture = false; internal_assert(setenv("INTEL_SIMULATION", "1", 1) == 0); internal_assert(do_fork() == IGT_EXIT_SUCCESS); internal_assert(setenv("INTEL_SIMULATION", "0", 1) == 0); internal_assert(do_fork() == IGT_EXIT_SUCCESS); in_fixture = true; internal_assert(setenv("INTEL_SIMULATION", "1", 1) == 0); internal_assert(do_fork() == IGT_EXIT_SUCCESS); internal_assert(setenv("INTEL_SIMULATION", "0", 1) == 0); internal_assert(do_fork() == IGT_EXIT_SUCCESS); in_fixture = false; in_subtest = true; internal_assert(setenv("INTEL_SIMULATION", "1", 1) == 0); internal_assert(do_fork() == IGT_EXIT_SUCCESS); internal_assert(setenv("INTEL_SIMULATION", "0", 1) == 0); internal_assert(do_fork() == IGT_EXIT_SUCCESS); /* subtest, run mode */ simple = false; list_subtests = false; in_fixture = false; internal_assert(setenv("INTEL_SIMULATION", "1", 1) == 0); internal_assert(do_fork() == IGT_EXIT_SKIP); internal_assert(setenv("INTEL_SIMULATION", "0", 1) == 0); internal_assert(do_fork() == IGT_EXIT_SUCCESS); in_fixture = true; internal_assert(setenv("INTEL_SIMULATION", "1", 1) == 0); internal_assert(do_fork() == IGT_EXIT_SKIP); internal_assert(setenv("INTEL_SIMULATION", "0", 1) == 0); internal_assert(do_fork() == IGT_EXIT_SUCCESS); in_fixture = false; in_subtest = true; internal_assert(setenv("INTEL_SIMULATION", "1", 1) == 0); internal_assert(do_fork() == IGT_EXIT_SKIP); internal_assert(setenv("INTEL_SIMULATION", "0", 1) == 0); internal_assert(do_fork() == IGT_EXIT_SUCCESS); return 0; } intel-gpu-tools-1.14/lib/tests/igt_timeout.c0000644000175000017500000000015312665336131016034 00000000000000#include "igt_core.h" #include igt_simple_main { igt_set_timeout(1, "Testcase"); sleep(5); } intel-gpu-tools-1.14/lib/tests/igt_fork_helper.c0000644000175000017500000000256012665336131016652 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * */ #include "drmtest.h" #include "igt_aux.h" int main(int argc, char **argv) { for (int i = 0; i < 1000; i++) { igt_fork_signal_helper(); igt_stop_signal_helper(); } } intel-gpu-tools-1.14/lib/tests/igt_no_subtest.c0000644000175000017500000000260512665336131016537 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * */ #include "drmtest.h" int main(int argc, char **argv) { char prog[] = "igt_no_exit"; char *fake_argv[] = {prog}; int fake_argc = 1; igt_subtest_init(fake_argc, fake_argv); igt_exit(); } intel-gpu-tools-1.14/lib/tests/igt_invalid_subtest_name.c0000644000175000017500000000237212665336131020552 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ #include "igt_core.h" igt_main { igt_subtest("# invalid name !") { igt_info("Invalid subtest name test\n"); } } intel-gpu-tools-1.14/lib/tests/Makefile.in0000644000175000017500000013316212665336443015421 00000000000000# Makefile.in generated by automake 1.15 from Makefile.am. # @configure_input@ # Copyright (C) 1994-2014 Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or without modifications, as long as this notice is preserved. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY, to the extent permitted by law; without # even the implied warranty of MERCHANTABILITY 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IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * */ #include "drmtest.h" int main(int argc, char **argv) { char prog[] = "igt_list_only"; char arg[] = "--list-subtests"; char *fake_argv[] = {prog, arg}; int fake_argc = 2; igt_subtest_init(fake_argc, fake_argv); igt_subtest("A") ; igt_exit(); } intel-gpu-tools-1.14/lib/tests/igt_assert.c0000644000175000017500000001060112665336131015646 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include #include #include #include #include #include #include #include #include #include #include #include "igt_core.h" /* * We need to hide assert from the cocci igt test refactor spatch. * * IMPORTANT: Test infrastructure tests are the only valid places where using * assert is allowed. */ #define internal_assert assert char test[] = "test"; char *argv_run[] = { test }; void (*test_to_run)(void) = NULL; /* * A really tedious way of making sure we execute every negative test, and that * they all really fail. */ #define CHECK_NEG(x) { \ igt_subtest_f("XFAIL_simple_%d", __LINE__) { \ (*exec_before)++; \ x; \ raise(SIGBUS); \ } \ exec_total++; \ } static int do_fork(void) { int pid, status; int argc; switch (pid = fork()) { case -1: internal_assert(0); case 0: argc = 1; igt_simple_init(argc, argv_run); test_to_run(); igt_exit(); default: while (waitpid(pid, &status, 0) == -1 && errno == EINTR) ; if(WIFSIGNALED(status)) return WTERMSIG(status) + 128; return WEXITSTATUS(status); } } static void test_cmpint_negative(void) { int *exec_before = calloc(1, sizeof(int)); int exec_total = 0; CHECK_NEG(igt_assert_eq(INT_MIN, INT_MAX)); CHECK_NEG(igt_assert_eq_u32(0xfffffffeUL, 0xffffffffUL)); CHECK_NEG(igt_assert_eq_u64(0xfffeffffffffffffULL, 0xffffffffffffffffULL)); CHECK_NEG(igt_assert_eq_u64(0xfffffffeffffffffULL, 0xffffffffffffffffULL)); CHECK_NEG(igt_assert_eq_u64(0xfffffffffffeffffULL, 0xffffffffffffffffULL)); CHECK_NEG(igt_assert_eq_double(0.0, DBL_MAX)); CHECK_NEG(igt_assert_eq_double(DBL_MAX, nexttoward(DBL_MAX, 0.0))); if (*exec_before != exec_total) raise(SIGSEGV); } static void test_cmpint(void) { igt_assert_eq(0, 0); igt_assert_eq(INT_MAX, INT_MAX); igt_assert_eq(INT_MAX, INT_MAX); igt_assert_neq(INT_MIN, INT_MAX); igt_assert_eq_u32(0, 0); igt_assert_eq_u32(0xffffffffUL, 0xffffffffUL); igt_assert_neq_u32(0xfffffffeUL, 0xffffffffUL); igt_assert_eq_u64(0, 0); igt_assert_eq_u64(0xffffffffffffffffULL, 0xffffffffffffffffULL); igt_assert_neq_u64(0xfffffffffffffffeULL, 0xffffffffffffffffULL); igt_assert_eq_double(0.0, 0.0); igt_assert_eq_double(DBL_MAX, DBL_MAX); igt_assert_neq_double(0.0, DBL_MAX); } static void test_fd_negative(void) { int *exec_before = calloc(1, sizeof(int)); int exec_total = 0; CHECK_NEG(igt_assert_fd(-1)); CHECK_NEG(igt_assert_fd(INT_MIN)); if (*exec_before != exec_total) raise(SIGSEGV); } static void test_fd(void) { igt_assert_fd(0); igt_assert_fd(1); igt_assert_fd(INT_MAX); } igt_main { int ret; igt_subtest("igt_cmpint") test_cmpint(); /* * The awkward subtest dance here is because we really want to use * subtests in our negative tests, to ensure we actually execute all * the subtests. But we can't begin a subtest within a subtest, and * we inherit the state from the parent, so ... */ test_to_run = test_cmpint_negative; ret = do_fork(); igt_subtest("igt_cmpint_negative") internal_assert(ret == IGT_EXIT_FAILURE); igt_subtest("igt_assert_fd") test_fd(); test_to_run = test_fd_negative; ret = do_fork(); igt_subtest("igt_assert_fd_negative") internal_assert(ret == IGT_EXIT_FAILURE); } intel-gpu-tools-1.14/lib/tests/igt_simple_test_subtests.c0000644000175000017500000000235712665336131020642 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ #include "igt_core.h" igt_simple_main { igt_subtest("subtest") { igt_info("Invalid subtest.\n"); } } intel-gpu-tools-1.14/lib/tests/Makefile.sources0000644000175000017500000000120512665336131016460 00000000000000check_PROGRAMS = \ igt_no_exit \ igt_no_exit_list_only \ igt_fork_helper \ igt_list_only \ igt_no_subtest \ igt_simulation \ igt_simple_test_subtests \ igt_stats \ igt_timeout \ igt_invalid_subtest_name \ igt_segfault \ igt_assert \ $(NULL) check_SCRIPTS = \ igt_command_line.sh \ $(NULL) TESTS = \ $(check_PROGRAMS) \ $(check_SCRIPTS) \ $(NULL) # Test that exercise specific asserts in the test framework library and are # hence expected to fail. DISABLE_HARD_ERRORS=1 XFAIL_TESTS = \ igt_no_exit \ igt_no_exit_list_only \ igt_no_subtest \ igt_simple_test_subtests \ igt_timeout \ igt_invalid_subtest_name \ $(NULL) intel-gpu-tools-1.14/lib/tests/igt_stats.c0000644000175000017500000001360012665336131015505 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include "igt_core.h" #include "igt_stats.h" #define ARRAY_SIZE(arr) (sizeof(arr)/sizeof(arr[0])) static void push_fixture_1(igt_stats_t *stats) { igt_stats_push(stats, 2); igt_stats_push(stats, 4); igt_stats_push(stats, 6); igt_stats_push(stats, 8); igt_stats_push(stats, 10); } /* Make sure we zero igt_stats_t fields at init() time */ static void test_init_zero(void) { igt_stats_t stats; stats.mean = 1.; igt_stats_init(&stats); igt_assert_eq_double(stats.mean, 0.); } static void test_init(void) { igt_stats_t stats; igt_stats_init(&stats); /* * Make sure we default to representing only a sample of a bigger * population. */ igt_assert(igt_stats_is_population(&stats) == false); } static void test_min_max(void) { igt_stats_t stats; igt_stats_init(&stats); push_fixture_1(&stats); igt_assert(igt_stats_get_min(&stats) == 2); igt_assert(igt_stats_get_max(&stats) == 10); } static void test_range(void) { igt_stats_t stats; igt_stats_init(&stats); push_fixture_1(&stats); igt_assert(igt_stats_get_range(&stats) == 8); } /* * Examples taken from: https://en.wikipedia.org/wiki/Quartile * The values are shifted a bit to test we do indeed start by sorting data * set. */ static void test_quartiles(void) { static const uint64_t s1[] = { 47, 49, 6, 7, 15, 36, 39, 40, 41, 42, 43 }; static const uint64_t s2[] = { 40, 41, 7, 15, 36, 39 }; igt_stats_t stats; double q1, q2, q3; /* s1, odd number of data points */ igt_stats_init(&stats); igt_stats_push_array(&stats, s1, ARRAY_SIZE(s1)); igt_stats_get_quartiles(&stats, &q1, &q2, &q3); igt_assert_eq_double(q1, 25.5); igt_assert_eq_double(q2, 40); igt_assert_eq_double(q3, 42.5); igt_assert_eq_double(igt_stats_get_median(&stats), 40); igt_assert_eq_double(igt_stats_get_iqr(&stats), 42.5 - 25.5); igt_stats_fini(&stats); /* s1, even number of data points */ igt_stats_init(&stats); igt_stats_push_array(&stats, s2, ARRAY_SIZE(s2)); igt_stats_get_quartiles(&stats, &q1, &q2, &q3); igt_assert_eq_double(q1, 15); igt_assert_eq_double(q2, 37.5); igt_assert_eq_double(q3, 40); igt_assert_eq_double(igt_stats_get_median(&stats), 37.5); igt_assert_eq_double(igt_stats_get_iqr(&stats), 40 - 15); igt_stats_fini(&stats); } static void test_invalidate_sorted(void) { igt_stats_t stats; static const uint64_t s1_truncated[] = { 47, 49, 6, 7, 15, 36, 39, 40, 41, 42}; double median1, median2; igt_stats_init(&stats); igt_stats_push_array(&stats, s1_truncated, ARRAY_SIZE(s1_truncated)); median1 = igt_stats_get_median(&stats); igt_stats_push(&stats, 43); median2 = igt_stats_get_median(&stats); igt_assert_eq_double(median2, 40); igt_assert(median1 != median2); } static void test_mean(void) { igt_stats_t stats; double mean; igt_stats_init(&stats); push_fixture_1(&stats); mean = igt_stats_get_mean(&stats); igt_assert_eq_double(mean, (2 + 4 + 6 + 8 + 10) / 5.); igt_stats_fini(&stats); } static void test_invalidate_mean(void) { igt_stats_t stats; double mean1, mean2; igt_stats_init(&stats); push_fixture_1(&stats); mean1 = igt_stats_get_mean(&stats); igt_assert_eq_double(mean1, (2 + 4 + 6 + 8 + 10) / 5.); igt_stats_push(&stats, 100); mean2 = igt_stats_get_mean(&stats); igt_assert(mean1 != mean2); igt_stats_fini(&stats); } /* * Taken from the "Basic examples" section of: * https://en.wikipedia.org/wiki/Standard_deviation */ static void test_std_deviation(void) { igt_stats_t stats; double mean, variance, std_deviation; igt_stats_init(&stats); igt_stats_set_population(&stats, true); igt_stats_push(&stats, 2); igt_stats_push(&stats, 4); igt_stats_push(&stats, 4); igt_stats_push(&stats, 4); igt_stats_push(&stats, 5); igt_stats_push(&stats, 5); igt_stats_push(&stats, 7); igt_stats_push(&stats, 9); mean = igt_stats_get_mean(&stats); igt_assert_eq_double(mean, (2 + 3 * 4 + 2 * 5 + 7 + 9) / 8.); variance = igt_stats_get_variance(&stats); igt_assert_eq_double(variance, 4); std_deviation = igt_stats_get_std_deviation(&stats); igt_assert_eq_double(std_deviation, 2); igt_stats_fini(&stats); } static void test_reallocation(void) { igt_stats_t stats; unsigned int i; igt_stats_init_with_size(&stats, 1); for (i = 0; i < 101; i++) { igt_stats_push(&stats, i); /* also triggers ->sorted reallocations */ if (i > 10) igt_stats_get_median(&stats); } igt_assert(!stats.is_float); igt_assert_eq(stats.n_values, 101); for (i = 0; i < 101; i++) igt_assert_eq(stats.values_u64[i], i); igt_assert_eq_double(igt_stats_get_mean(&stats), 50.0); igt_assert_eq_double(igt_stats_get_median(&stats), 50.0); igt_stats_fini(&stats); } igt_simple_main { test_init_zero(); test_init(); test_min_max(); test_range(); test_quartiles(); test_invalidate_sorted(); test_mean(); test_invalidate_mean(); test_std_deviation(); test_reallocation(); } intel-gpu-tools-1.14/lib/tests/igt_no_exit.c0000644000175000017500000000261612665336131016021 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * */ #include "drmtest.h" int main(int argc, char **argv) { char prog[] = "igt_no_exit"; char *fake_argv[] = {prog}; int fake_argc = 1; igt_subtest_init(fake_argc, fake_argv); igt_subtest("A") ; } intel-gpu-tools-1.14/lib/tests/Makefile.am0000644000175000017500000000102212665336131015367 00000000000000include Makefile.sources AM_TESTS_ENVIRONMENT = \ top_builddir=$(top_builddir) \ top_srcdir=$(top_srcdir) EXTRA_DIST = $(check_SCRIPTS) AM_CFLAGS = $(DRM_CFLAGS) $(CWARNFLAGS) $(DEBUG_CFLAGS) \ -I$(srcdir)/../.. \ -I$(srcdir)/.. \ -include "$(srcdir)/../../lib/check-ndebug.h" \ -DIGT_DATADIR=\""$(abs_srcdir)"\" \ $(NULL) LDADD = ../libintel_tools.la $(PCIACCESS_LIBS) $(DRM_LIBS) $(LIBUNWIND_LIBS) LDADD += $(CAIRO_LIBS) $(LIBUDEV_LIBS) $(GLIB_LIBS) -lm AM_CFLAGS += $(CAIRO_CFLAGS) $(LIBUDEV_CFLAGS) $(GLIB_CFLAGS) intel-gpu-tools-1.14/lib/tests/igt_segfault.c0000644000175000017500000000657712665336131016200 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Derek Morton * */ /* * Testcase: Test the framework catches a segfault and returns an error. * * 1. Test a crashing simple test is reported. * 2. Test a crashing subtest is reported. * 3. Test a crashing subtest following a passing subtest is reported. * 4. Test a crashing subtest preceeding a passing subtest is reported. */ #include #include #include #include #include #include #include "drmtest.h" #include "igt_core.h" /* * We need to hide assert from the cocci igt test refactor spatch. * * IMPORTANT: Test infrastructure tests are the only valid places where using * assert is allowed. */ #define internal_assert assert bool simple; bool runa; bool runc; char test[] = "test"; char *argv_run[] = { test }; static void crashme(void) { raise(SIGSEGV); } static int do_fork(void) { int pid, status; int argc; switch (pid = fork()) { case -1: internal_assert(0); case 0: if (simple) { argc = 1; igt_simple_init(argc, argv_run); crashme(); igt_exit(); } else { argc = 1; igt_subtest_init(argc, argv_run); if(runa) igt_subtest("A") ; igt_subtest("B") crashme(); if(runc) igt_subtest("C") ; igt_exit(); } default: while (waitpid(pid, &status, 0) == -1 && errno == EINTR) ; if(WIFSIGNALED(status)) return WTERMSIG(status) + 128; return WEXITSTATUS(status); } } int main(int argc, char **argv) { /* Test Crash in simple test is reported */ simple = true; runa=false; runc=false; igt_info("Simple test.\n"); fflush(stdout); internal_assert(do_fork() == SIGSEGV + 128); /* Test crash in a single subtest is reported */ simple = false; igt_info("Single subtest.\n"); fflush(stdout); internal_assert(do_fork() == SIGSEGV + 128); /* Test crash in a subtest following a pass is reported */ simple = false; runa=true; igt_info("Passing then crashing subtest.\n"); fflush(stdout); internal_assert(do_fork() == SIGSEGV + 128); /* Test crash in a subtest preceeding a pass is reported */ simple = false; runa=false; runc=true; igt_info("Crashing then passing subtest.\n"); fflush(stdout); internal_assert(do_fork() == SIGSEGV + 128); return 0; } intel-gpu-tools-1.14/lib/tests/igt_no_exit_list_only.c0000644000175000017500000000266612665336131020122 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * */ #include "drmtest.h" int main(int argc, char **argv) { char prog[] = "igt_list_only"; char arg[] = "--list-subtests"; char *fake_argv[] = {prog, arg}; int fake_argc = 2; igt_subtest_init(fake_argc, fake_argv); igt_subtest("A") ; } intel-gpu-tools-1.14/lib/tests/igt_command_line.sh0000755000175000017500000000440012665336131017165 00000000000000#!/bin/sh # # Copyright © 2014 Intel Corporation # # Permission is hereby granted, free of charge, to any person obtaining a # copy of this software and associated documentation files (the "Software"), # to deal in the Software without restriction, including without limitation # the rights to use, copy, modify, merge, publish, distribute, sublicense, # and/or sell copies of the Software, and to permit persons to whom the # Software is furnished to do so, subject to the following conditions: # # The above copyright notice and this permission notice (including the next # paragraph) shall be included in all copies or substantial portions of the # Software. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL # THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING # FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS # IN THE SOFTWARE. # # Check that command line handling works consistently across all tests # TESTLIST=`cat $top_builddir/tests/test-list.txt` if [ $? -ne 0 ]; then echo "Error: Could not read test lists" exit 99 fi for test in $TESTLIST; do if [ "$test" = "TESTLIST" -o "$test" = "END" ]; then continue fi if [ -x $top_builddir/tests/$test ]; then test=$top_builddir/tests/$test else # if the test is a script, it will be in $srcdir test=$top_srcdir/tests/$test fi echo "$test:" # check invalid option handling echo " Checking invalid option handling..." ./$test --invalid-option 2> /dev/null && exit 1 # check valid options succeed echo " Checking valid option handling..." ./$test --help > /dev/null || exit 1 # check --list-subtests works correctly echo " Checking subtest enumeration..." LIST=`./$test --list-subtests` RET=$? if [ $RET -ne 0 -a $RET -ne 79 ]; then exit 1 fi if [ $RET -eq 79 -a -n "$LIST" ]; then exit 1 fi if [ $RET -eq 0 -a -z "$LIST" ]; then exit 1 fi # check invalid subtest handling echo " Checking invalid subtest handling..." ./$test --run-subtest invalid-subtest > /dev/null 2>&1 && exit 1 done intel-gpu-tools-1.14/lib/rendercopy_gen9.c0000644000175000017500000006545012665336131015450 00000000000000#include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "drmtest.h" #include "intel_bufmgr.h" #include "intel_batchbuffer.h" #include "intel_io.h" #include "rendercopy.h" #include "gen9_render.h" #include "intel_reg.h" #include "igt_aux.h" #include #define VERTEX_SIZE (3*4) #if DEBUG_RENDERCPY static void dump_batch(struct intel_batchbuffer *batch) { int fd = open("/tmp/i965-batchbuffers.dump", O_WRONLY | O_CREAT, 0666); if (fd != -1) { igt_assert_eq(write(fd, batch->buffer, 4096), 4096); fd = close(fd); } } #else #define dump_batch(x) do { } while(0) #endif struct { uint32_t cc_state; uint32_t blend_state; } cc; struct { uint32_t cc_state; uint32_t sf_clip_state; } viewport; /* see shaders/ps/blit.g7a */ static const uint32_t ps_kernel[][4] = { #if 1 { 0x0060005a, 0x21403ae8, 0x3a0000c0, 0x008d0040 }, { 0x0060005a, 0x21603ae8, 0x3a0000c0, 0x008d0080 }, { 0x0060005a, 0x21803ae8, 0x3a0000d0, 0x008d0040 }, { 0x0060005a, 0x21a03ae8, 0x3a0000d0, 0x008d0080 }, { 0x02800031, 0x2e0022e8, 0x0e000140, 0x08840001 }, { 0x05800031, 0x200022e0, 0x0e000e00, 0x90031000 }, #else /* Write all -1 */ { 0x00600001, 0x2e000608, 0x00000000, 0x3f800000 }, { 0x00600001, 0x2e200608, 0x00000000, 0x3f800000 }, { 0x00600001, 0x2e400608, 0x00000000, 0x3f800000 }, { 0x00600001, 0x2e600608, 0x00000000, 0x3f800000 }, { 0x00600001, 0x2e800608, 0x00000000, 0x3f800000 }, { 0x00600001, 0x2ea00608, 0x00000000, 0x3f800000 }, { 0x00600001, 0x2ec00608, 0x00000000, 0x3f800000 }, { 0x00600001, 0x2ee00608, 0x00000000, 0x3f800000 }, { 0x05800031, 0x200022e0, 0x0e000e00, 0x90031000 }, #endif }; /* AUB annotation support */ #define MAX_ANNOTATIONS 33 struct annotations_context { drm_intel_aub_annotation annotations[MAX_ANNOTATIONS]; int index; uint32_t offset; } aub_annotations; static void annotation_init(struct annotations_context *ctx) { /* ctx->annotations is an array keeping a list of annotations of the * batch buffer ordered by offset. ctx->annotations[0] is thus left * for the command stream and will be filled just before executing * the batch buffer with annotations_add_batch() */ ctx->index = 1; } static void add_annotation(drm_intel_aub_annotation *a, uint32_t type, uint32_t subtype, uint32_t ending_offset) { a->type = type; a->subtype = subtype; a->ending_offset = ending_offset; } static void annotation_add_batch(struct annotations_context *ctx, size_t size) { add_annotation(&ctx->annotations[0], AUB_TRACE_TYPE_BATCH, 0, size); } static void annotation_add_state(struct annotations_context *ctx, uint32_t state_type, uint32_t start_offset, size_t size) { assert(ctx->index < MAX_ANNOTATIONS); add_annotation(&ctx->annotations[ctx->index++], AUB_TRACE_TYPE_NOTYPE, 0, start_offset); add_annotation(&ctx->annotations[ctx->index++], AUB_TRACE_TYPE(state_type), AUB_TRACE_SUBTYPE(state_type), start_offset + size); } static void annotation_flush(struct annotations_context *ctx, struct intel_batchbuffer *batch) { if (!igt_aub_dump_enabled()) return; drm_intel_bufmgr_gem_set_aub_annotations(batch->bo, ctx->annotations, ctx->index); } static uint32_t batch_used(struct intel_batchbuffer *batch) { return batch->ptr - batch->buffer; } static uint32_t batch_align(struct intel_batchbuffer *batch, uint32_t align) { uint32_t offset = batch_used(batch); offset = ALIGN(offset, align); batch->ptr = batch->buffer + offset; return offset; } static void * batch_alloc(struct intel_batchbuffer *batch, uint32_t size, uint32_t align) { uint32_t offset = batch_align(batch, align); batch->ptr += size; return memset(batch->buffer + offset, 0, size); } static uint32_t batch_offset(struct intel_batchbuffer *batch, void *ptr) { return (uint8_t *)ptr - batch->buffer; } static uint32_t batch_copy(struct intel_batchbuffer *batch, const void *ptr, uint32_t size, uint32_t align) { return batch_offset(batch, memcpy(batch_alloc(batch, size, align), ptr, size)); } static void gen6_render_flush(struct intel_batchbuffer *batch, drm_intel_context *context, uint32_t batch_end) { int ret; ret = drm_intel_bo_subdata(batch->bo, 0, 4096, batch->buffer); if (ret == 0) ret = drm_intel_gem_bo_context_exec(batch->bo, context, batch_end, 0); assert(ret == 0); } /* Mostly copy+paste from gen6, except height, width, pitch moved */ static uint32_t gen8_bind_buf(struct intel_batchbuffer *batch, struct igt_buf *buf, uint32_t format, int is_dst) { struct gen8_surface_state *ss; uint32_t write_domain, read_domain, offset; int ret; if (is_dst) { write_domain = read_domain = I915_GEM_DOMAIN_RENDER; } else { write_domain = 0; read_domain = I915_GEM_DOMAIN_SAMPLER; } ss = batch_alloc(batch, sizeof(*ss), 64); offset = batch_offset(batch, ss); annotation_add_state(&aub_annotations, AUB_TRACE_SURFACE_STATE, offset, sizeof(*ss)); ss->ss0.surface_type = GEN6_SURFACE_2D; ss->ss0.surface_format = format; ss->ss0.render_cache_read_write = 1; ss->ss0.vertical_alignment = 1; /* align 4 */ ss->ss0.horizontal_alignment = 1; /* align 4 */ if (buf->tiling == I915_TILING_X) ss->ss0.tiled_mode = 2; else if (buf->tiling == I915_TILING_Y) ss->ss0.tiled_mode = 3; ss->ss8.base_addr = buf->bo->offset; ret = drm_intel_bo_emit_reloc(batch->bo, batch_offset(batch, ss) + 8 * 4, buf->bo, 0, read_domain, write_domain); assert(ret == 0); ss->ss2.height = igt_buf_height(buf) - 1; ss->ss2.width = igt_buf_width(buf) - 1; ss->ss3.pitch = buf->stride - 1; ss->ss7.shader_chanel_select_r = 4; ss->ss7.shader_chanel_select_g = 5; ss->ss7.shader_chanel_select_b = 6; ss->ss7.shader_chanel_select_a = 7; return offset; } static uint32_t gen8_bind_surfaces(struct intel_batchbuffer *batch, struct igt_buf *src, struct igt_buf *dst) { uint32_t *binding_table, offset; binding_table = batch_alloc(batch, 8, 32); offset = batch_offset(batch, binding_table); annotation_add_state(&aub_annotations, AUB_TRACE_BINDING_TABLE, offset, 8); binding_table[0] = gen8_bind_buf(batch, dst, GEN6_SURFACEFORMAT_B8G8R8A8_UNORM, 1); binding_table[1] = gen8_bind_buf(batch, src, GEN6_SURFACEFORMAT_B8G8R8A8_UNORM, 0); return offset; } /* Mostly copy+paste from gen6, except wrap modes moved */ static uint32_t gen8_create_sampler(struct intel_batchbuffer *batch) { struct gen8_sampler_state *ss; uint32_t offset; ss = batch_alloc(batch, sizeof(*ss), 64); offset = batch_offset(batch, ss); annotation_add_state(&aub_annotations, AUB_TRACE_SAMPLER_STATE, offset, sizeof(*ss)); ss->ss0.min_filter = GEN6_MAPFILTER_NEAREST; ss->ss0.mag_filter = GEN6_MAPFILTER_NEAREST; ss->ss3.r_wrap_mode = GEN6_TEXCOORDMODE_CLAMP; ss->ss3.s_wrap_mode = GEN6_TEXCOORDMODE_CLAMP; ss->ss3.t_wrap_mode = GEN6_TEXCOORDMODE_CLAMP; /* I've experimented with non-normalized coordinates and using the LD * sampler fetch, but couldn't make it work. */ ss->ss3.non_normalized_coord = 0; return offset; } static uint32_t gen8_fill_ps(struct intel_batchbuffer *batch, const uint32_t kernel[][4], size_t size) { uint32_t offset; offset = batch_copy(batch, kernel, size, 64); annotation_add_state(&aub_annotations, AUB_TRACE_KERNEL_INSTRUCTIONS, offset, size); return offset; } /* * gen7_fill_vertex_buffer_data populate vertex buffer with data. * * The vertex buffer consists of 3 vertices to construct a RECTLIST. The 4th * vertex is implied (automatically derived by the HW). Each element has the * destination offset, and the normalized texture offset (src). The rectangle * itself will span the entire subsurface to be copied. * * see gen6_emit_vertex_elements */ static uint32_t gen7_fill_vertex_buffer_data(struct intel_batchbuffer *batch, struct igt_buf *src, uint32_t src_x, uint32_t src_y, uint32_t dst_x, uint32_t dst_y, uint32_t width, uint32_t height) { void *start; uint32_t offset; batch_align(batch, 8); start = batch->ptr; emit_vertex_2s(batch, dst_x + width, dst_y + height); emit_vertex_normalized(batch, src_x + width, igt_buf_width(src)); emit_vertex_normalized(batch, src_y + height, igt_buf_height(src)); emit_vertex_2s(batch, dst_x, dst_y + height); emit_vertex_normalized(batch, src_x, igt_buf_width(src)); emit_vertex_normalized(batch, src_y + height, igt_buf_height(src)); emit_vertex_2s(batch, dst_x, dst_y); emit_vertex_normalized(batch, src_x, igt_buf_width(src)); emit_vertex_normalized(batch, src_y, igt_buf_height(src)); offset = batch_offset(batch, start); annotation_add_state(&aub_annotations, AUB_TRACE_VERTEX_BUFFER, offset, 3 * VERTEX_SIZE); return offset; } /* * gen6_emit_vertex_elements - The vertex elements describe the contents of the * vertex buffer. We pack the vertex buffer in a semi weird way, conforming to * what gen6_rendercopy did. The most straightforward would be to store * everything as floats. * * see gen7_fill_vertex_buffer_data() for where the corresponding elements are * packed. */ static void gen6_emit_vertex_elements(struct intel_batchbuffer *batch) { /* * The VUE layout * dword 0-3: pad (0, 0, 0. 0) * dword 4-7: position (x, y, 0, 1.0), * dword 8-11: texture coordinate 0 (u0, v0, 0, 1.0) */ OUT_BATCH(GEN6_3DSTATE_VERTEX_ELEMENTS | (3 * 2 + 1 - 2)); /* Element state 0. These are 4 dwords of 0 required for the VUE format. * We don't really know or care what they do. */ OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | GEN6_SURFACEFORMAT_R32G32B32A32_FLOAT << VE0_FORMAT_SHIFT | 0 << VE0_OFFSET_SHIFT); /* we specify 0, but it's really does not exist */ OUT_BATCH(GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_0_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_1_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_3_SHIFT); /* Element state 1 - Our "destination" vertices. These are passed down * through the pipeline, and eventually make it to the pixel shader as * the offsets in the destination surface. It's packed as the 16 * signed/scaled because of gen6 rendercopy. I see no particular reason * for doing this though. */ OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | GEN6_SURFACEFORMAT_R16G16_SSCALED << VE0_FORMAT_SHIFT | 0 << VE0_OFFSET_SHIFT); /* offsets vb in bytes */ OUT_BATCH(GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT | GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT | GEN6_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT); /* Element state 2. Last but not least we store the U,V components as * normalized floats. These will be used in the pixel shader to sample * from the source buffer. */ OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | GEN6_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT | 4 << VE0_OFFSET_SHIFT); /* offset vb in bytes */ OUT_BATCH(GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT | GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT | GEN6_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT); } /* * gen7_emit_vertex_buffer emit the vertex buffers command * * @batch * @offset - bytw offset within the @batch where the vertex buffer starts. */ static void gen7_emit_vertex_buffer(struct intel_batchbuffer *batch, uint32_t offset) { OUT_BATCH(GEN6_3DSTATE_VERTEX_BUFFERS | (1 + (4 * 1) - 2)); OUT_BATCH(0 << VB0_BUFFER_INDEX_SHIFT | /* VB 0th index */ GEN7_VB0_BUFFER_ADDR_MOD_EN | /* Address Modify Enable */ VERTEX_SIZE << VB0_BUFFER_PITCH_SHIFT); OUT_RELOC(batch->bo, I915_GEM_DOMAIN_VERTEX, 0, offset); OUT_BATCH(3 * VERTEX_SIZE); } static uint32_t gen6_create_cc_state(struct intel_batchbuffer *batch) { struct gen6_color_calc_state *cc_state; uint32_t offset; cc_state = batch_alloc(batch, sizeof(*cc_state), 64); offset = batch_offset(batch, cc_state); annotation_add_state(&aub_annotations, AUB_TRACE_CC_STATE, offset, sizeof(*cc_state)); return offset; } static uint32_t gen8_create_blend_state(struct intel_batchbuffer *batch) { struct gen8_blend_state *blend; int i; uint32_t offset; blend = batch_alloc(batch, sizeof(*blend), 64); offset = batch_offset(batch, blend); annotation_add_state(&aub_annotations, AUB_TRACE_BLEND_STATE, offset, sizeof(*blend)); for (i = 0; i < 16; i++) { blend->bs[i].dest_blend_factor = GEN6_BLENDFACTOR_ZERO; blend->bs[i].source_blend_factor = GEN6_BLENDFACTOR_ONE; blend->bs[i].color_blend_func = GEN6_BLENDFUNCTION_ADD; blend->bs[i].pre_blend_color_clamp = 1; blend->bs[i].color_buffer_blend = 0; } return offset; } static uint32_t gen6_create_cc_viewport(struct intel_batchbuffer *batch) { struct gen6_cc_viewport *vp; uint32_t offset; vp = batch_alloc(batch, sizeof(*vp), 32); offset = batch_offset(batch, vp); annotation_add_state(&aub_annotations, AUB_TRACE_CC_VP_STATE, offset, sizeof(*vp)); /* XXX I don't understand this */ vp->min_depth = -1.e35; vp->max_depth = 1.e35; return offset; } static uint32_t gen7_create_sf_clip_viewport(struct intel_batchbuffer *batch) { /* XXX these are likely not needed */ struct gen7_sf_clip_viewport *scv_state; uint32_t offset; scv_state = batch_alloc(batch, sizeof(*scv_state), 64); offset = batch_offset(batch, scv_state); annotation_add_state(&aub_annotations, AUB_TRACE_CLIP_VP_STATE, offset, sizeof(*scv_state)); scv_state->guardband.xmin = 0; scv_state->guardband.xmax = 1.0f; scv_state->guardband.ymin = 0; scv_state->guardband.ymax = 1.0f; return offset; } static uint32_t gen6_create_scissor_rect(struct intel_batchbuffer *batch) { struct gen6_scissor_rect *scissor; uint32_t offset; scissor = batch_alloc(batch, sizeof(*scissor), 64); offset = batch_offset(batch, scissor); annotation_add_state(&aub_annotations, AUB_TRACE_SCISSOR_STATE, offset, sizeof(*scissor)); return offset; } static void gen8_emit_sip(struct intel_batchbuffer *batch) { OUT_BATCH(GEN6_STATE_SIP | (3 - 2)); OUT_BATCH(0); OUT_BATCH(0); } static void gen7_emit_push_constants(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS); OUT_BATCH(0); } static void gen9_emit_state_base_address(struct intel_batchbuffer *batch) { /* WaBindlessSurfaceStateModifyEnable:skl,bxt */ /* The length has to be one less if we dont modify bindless state */ OUT_BATCH(GEN6_STATE_BASE_ADDRESS | (19 - 1 - 2)); /* general */ OUT_BATCH(0 | BASE_ADDRESS_MODIFY); OUT_BATCH(0); /* stateless data port */ OUT_BATCH(0 | BASE_ADDRESS_MODIFY); /* surface */ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY); /* dynamic */ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* indirect */ OUT_BATCH(0); OUT_BATCH(0); /* instruction */ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* general state buffer size */ OUT_BATCH(0xfffff000 | 1); /* dynamic state buffer size */ OUT_BATCH(1 << 12 | 1); /* indirect object buffer size */ OUT_BATCH(0xfffff000 | 1); /* intruction buffer size */ OUT_BATCH(1 << 12 | 1); /* Bindless surface state base address */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } static void gen7_emit_urb(struct intel_batchbuffer *batch) { /* XXX: Min valid values from mesa */ const int vs_entries = 64; const int vs_size = 2; const int vs_start = 4; OUT_BATCH(GEN7_3DSTATE_URB_VS); OUT_BATCH(vs_entries | ((vs_size - 1) << 16) | (vs_start << 25)); OUT_BATCH(GEN7_3DSTATE_URB_GS); OUT_BATCH(vs_start << 25); OUT_BATCH(GEN7_3DSTATE_URB_HS); OUT_BATCH(vs_start << 25); OUT_BATCH(GEN7_3DSTATE_URB_DS); OUT_BATCH(vs_start << 25); } static void gen8_emit_cc(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_BLEND_STATE_POINTERS); OUT_BATCH(cc.blend_state | 1); OUT_BATCH(GEN6_3DSTATE_CC_STATE_POINTERS); OUT_BATCH(cc.cc_state | 1); } static void gen8_emit_multisample(struct intel_batchbuffer *batch) { OUT_BATCH(GEN8_3DSTATE_MULTISAMPLE | 0); OUT_BATCH(0); OUT_BATCH(GEN6_3DSTATE_SAMPLE_MASK); OUT_BATCH(1); } static void gen8_emit_vs(struct intel_batchbuffer *batch) { OUT_BATCH(GEN6_3DSTATE_CONSTANT_VS | (11-2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS); OUT_BATCH(0); OUT_BATCH(GEN6_3DSTATE_VS | (9-2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } static void gen8_emit_hs(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_CONSTANT_HS | (11-2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_HS | (9-2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS); OUT_BATCH(0); } static void gen8_emit_gs(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_CONSTANT_GS | (11-2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_GS | (10-2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS); OUT_BATCH(0); } static void gen9_emit_ds(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_CONSTANT_DS | (11-2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_DS | (11-2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS); OUT_BATCH(0); } static void gen8_emit_wm_hz_op(struct intel_batchbuffer *batch) { OUT_BATCH(GEN8_3DSTATE_WM_HZ_OP | (5-2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } static void gen8_emit_null_state(struct intel_batchbuffer *batch) { gen8_emit_wm_hz_op(batch); gen8_emit_hs(batch); OUT_BATCH(GEN7_3DSTATE_TE | (4-2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); gen8_emit_gs(batch); gen9_emit_ds(batch); gen8_emit_vs(batch); } static void gen7_emit_clip(struct intel_batchbuffer *batch) { OUT_BATCH(GEN6_3DSTATE_CLIP | (4 - 2)); OUT_BATCH(0); OUT_BATCH(0); /* pass-through */ OUT_BATCH(0); } static void gen8_emit_sf(struct intel_batchbuffer *batch) { int i; OUT_BATCH(GEN7_3DSTATE_SBE | (6 - 2)); OUT_BATCH(1 << GEN7_SBE_NUM_OUTPUTS_SHIFT | GEN8_SBE_FORCE_URB_ENTRY_READ_LENGTH | GEN8_SBE_FORCE_URB_ENTRY_READ_OFFSET | 1 << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT | 1 << GEN8_SBE_URB_ENTRY_READ_OFFSET_SHIFT); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN9_SBE_ACTIVE_COMPONENT_XYZW << 0); OUT_BATCH(0); OUT_BATCH(GEN8_3DSTATE_SBE_SWIZ | (11 - 2)); for (i = 0; i < 8; i++) OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN8_3DSTATE_RASTER | (5 - 2)); OUT_BATCH(GEN8_RASTER_FRONT_WINDING_CCW | GEN8_RASTER_CULL_NONE); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN6_3DSTATE_SF | (4 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } static void gen8_emit_ps(struct intel_batchbuffer *batch, uint32_t kernel) { const int max_threads = 63; OUT_BATCH(GEN6_3DSTATE_WM | (2 - 2)); OUT_BATCH(/* XXX: I don't understand the BARYCENTRIC stuff, but it * appears we need it to put our setup data in the place we * expect (g6, see below) */ GEN7_3DSTATE_PS_PERSPECTIVE_PIXEL_BARYCENTRIC); OUT_BATCH(GEN6_3DSTATE_CONSTANT_PS | (11-2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_PS | (12-2)); OUT_BATCH(kernel); OUT_BATCH(0); /* kernel hi */ OUT_BATCH(1 << GEN6_3DSTATE_WM_SAMPLER_COUNT_SHIFT | 2 << GEN6_3DSTATE_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT); OUT_BATCH(0); /* scratch space stuff */ OUT_BATCH(0); /* scratch hi */ OUT_BATCH((max_threads - 1) << GEN8_3DSTATE_PS_MAX_THREADS_SHIFT | GEN6_3DSTATE_WM_16_DISPATCH_ENABLE); OUT_BATCH(6 << GEN6_3DSTATE_WM_DISPATCH_START_GRF_0_SHIFT); OUT_BATCH(0); // kernel 1 OUT_BATCH(0); /* kernel 1 hi */ OUT_BATCH(0); // kernel 2 OUT_BATCH(0); /* kernel 2 hi */ OUT_BATCH(GEN8_3DSTATE_PS_BLEND | (2 - 2)); OUT_BATCH(GEN8_PS_BLEND_HAS_WRITEABLE_RT); OUT_BATCH(GEN8_3DSTATE_PS_EXTRA | (2 - 2)); OUT_BATCH(GEN8_PSX_PIXEL_SHADER_VALID | GEN8_PSX_ATTRIBUTE_ENABLE); } static void gen9_emit_depth(struct intel_batchbuffer *batch) { OUT_BATCH(GEN8_3DSTATE_WM_DEPTH_STENCIL | (4 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_DEPTH_BUFFER | (8-2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_HIER_DEPTH_BUFFER | (5-2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_STENCIL_BUFFER | (5-2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } static void gen7_emit_clear(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_CLEAR_PARAMS | (3-2)); OUT_BATCH(0); OUT_BATCH(1); // clear valid } static void gen6_emit_drawing_rectangle(struct intel_batchbuffer *batch, struct igt_buf *dst) { OUT_BATCH(GEN6_3DSTATE_DRAWING_RECTANGLE | (4 - 2)); OUT_BATCH(0); OUT_BATCH((igt_buf_height(dst) - 1) << 16 | (igt_buf_width(dst) - 1)); OUT_BATCH(0); } static void gen8_emit_vf_topology(struct intel_batchbuffer *batch) { OUT_BATCH(GEN8_3DSTATE_VF_TOPOLOGY); OUT_BATCH(_3DPRIM_RECTLIST); } /* Vertex elements MUST be defined before this according to spec */ static void gen8_emit_primitive(struct intel_batchbuffer *batch, uint32_t offset) { OUT_BATCH(GEN7_3DSTATE_VF | (2 - 2)); OUT_BATCH(0); OUT_BATCH(GEN8_3DSTATE_VF_INSTANCING | (3 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN6_3DPRIMITIVE | (7-2)); OUT_BATCH(0); /* gen8+ ignore the topology type field */ OUT_BATCH(3); /* vertex count */ OUT_BATCH(0); /* We're specifying this instead with offset in GEN6_3DSTATE_VERTEX_BUFFERS */ OUT_BATCH(1); /* single instance */ OUT_BATCH(0); /* start instance location */ OUT_BATCH(0); /* index buffer offset, ignored */ } /* The general rule is if it's named gen6 it is directly copied from * gen6_render_copyfunc. * * This sets up most of the 3d pipeline, and most of that to NULL state. The * docs aren't specific about exactly what must be set up NULL, but the general * rule is we could be run at any time, and so the most state we set to NULL, * the better our odds of success. * * +---------------+ <---- 4096 * | ^ | * | | | * | various | * | state | * | | | * |_______|_______| <---- 2048 + ? * | ^ | * | | | * | batch | * | commands | * | | | * | | | * +---------------+ <---- 0 + ? * * The batch commands point to state within tthe batch, so all state offsets should be * 0 < offset < 4096. Both commands and state build upwards, and are constructed * in that order. This means too many batch commands can delete state if not * careful. * */ #define BATCH_STATE_SPLIT 2048 void gen9_render_copyfunc(struct intel_batchbuffer *batch, drm_intel_context *context, struct igt_buf *src, unsigned src_x, unsigned src_y, unsigned width, unsigned height, struct igt_buf *dst, unsigned dst_x, unsigned dst_y) { uint32_t ps_sampler_state, ps_kernel_off, ps_binding_table; uint32_t scissor_state; uint32_t vertex_buffer; uint32_t batch_end; intel_batchbuffer_flush_with_context(batch, context); batch_align(batch, 8); batch->ptr = &batch->buffer[BATCH_STATE_SPLIT]; annotation_init(&aub_annotations); ps_binding_table = gen8_bind_surfaces(batch, src, dst); ps_sampler_state = gen8_create_sampler(batch); ps_kernel_off = gen8_fill_ps(batch, ps_kernel, sizeof(ps_kernel)); vertex_buffer = gen7_fill_vertex_buffer_data(batch, src, src_x, src_y, dst_x, dst_y, width, height); cc.cc_state = gen6_create_cc_state(batch); cc.blend_state = gen8_create_blend_state(batch); viewport.cc_state = gen6_create_cc_viewport(batch); viewport.sf_clip_state = gen7_create_sf_clip_viewport(batch); scissor_state = gen6_create_scissor_rect(batch); /* TODO: theree is other state which isn't setup */ assert(batch->ptr < &batch->buffer[4095]); batch->ptr = batch->buffer; /* Start emitting the commands. The order roughly follows the mesa blorp * order */ OUT_BATCH(GEN6_PIPELINE_SELECT | PIPELINE_SELECT_3D | GEN9_PIPELINE_SELECTION_MASK); gen8_emit_sip(batch); gen7_emit_push_constants(batch); gen9_emit_state_base_address(batch); OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC); OUT_BATCH(viewport.cc_state); OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP); OUT_BATCH(viewport.sf_clip_state); gen7_emit_urb(batch); gen8_emit_cc(batch); gen8_emit_multisample(batch); gen8_emit_null_state(batch); OUT_BATCH(GEN7_3DSTATE_STREAMOUT | (5 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); gen7_emit_clip(batch); gen8_emit_sf(batch); gen8_emit_ps(batch, ps_kernel_off); OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS); OUT_BATCH(ps_binding_table); OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS); OUT_BATCH(ps_sampler_state); OUT_BATCH(GEN6_3DSTATE_SCISSOR_STATE_POINTERS); OUT_BATCH(scissor_state); gen9_emit_depth(batch); gen7_emit_clear(batch); gen6_emit_drawing_rectangle(batch, dst); gen7_emit_vertex_buffer(batch, vertex_buffer); gen6_emit_vertex_elements(batch); gen8_emit_vf_topology(batch); gen8_emit_primitive(batch, vertex_buffer); OUT_BATCH(MI_BATCH_BUFFER_END); batch_end = batch_align(batch, 8); assert(batch_end < BATCH_STATE_SPLIT); annotation_add_batch(&aub_annotations, batch_end); dump_batch(batch); annotation_flush(&aub_annotations, batch); gen6_render_flush(batch, context, batch_end); intel_batchbuffer_reset(batch); } intel-gpu-tools-1.14/lib/rendercopy_gen8.c0000644000175000017500000006556112665336131015452 00000000000000#include #include #include #include #include #include #include #include #include #include #include #include #include #include "drmtest.h" #include "intel_bufmgr.h" #include "intel_batchbuffer.h" #include "intel_io.h" #include "rendercopy.h" #include "gen8_render.h" #include "intel_reg.h" #include "igt_aux.h" #include #define VERTEX_SIZE (3*4) #if DEBUG_RENDERCPY static void dump_batch(struct intel_batchbuffer *batch) { int fd = open("/tmp/i965-batchbuffers.dump", O_WRONLY | O_CREAT, 0666); if (fd != -1) { igt_assert_eq(write(fd, batch->buffer, 4096), 4096); fd = close(fd); } } #else #define dump_batch(x) do { } while(0) #endif struct { uint32_t cc_state; uint32_t blend_state; } cc; struct { uint32_t cc_state; uint32_t sf_clip_state; } viewport; /* see shaders/ps/blit.g7a */ static const uint32_t ps_kernel[][4] = { #if 1 { 0x0060005a, 0x21403ae8, 0x3a0000c0, 0x008d0040 }, { 0x0060005a, 0x21603ae8, 0x3a0000c0, 0x008d0080 }, { 0x0060005a, 0x21803ae8, 0x3a0000d0, 0x008d0040 }, { 0x0060005a, 0x21a03ae8, 0x3a0000d0, 0x008d0080 }, { 0x02800031, 0x2e0022e8, 0x0e000140, 0x08840001 }, { 0x05800031, 0x200022e0, 0x0e000e00, 0x90031000 }, #else /* Write all -1 */ { 0x00600001, 0x2e000608, 0x00000000, 0x3f800000 }, { 0x00600001, 0x2e200608, 0x00000000, 0x3f800000 }, { 0x00600001, 0x2e400608, 0x00000000, 0x3f800000 }, { 0x00600001, 0x2e600608, 0x00000000, 0x3f800000 }, { 0x00600001, 0x2e800608, 0x00000000, 0x3f800000 }, { 0x00600001, 0x2ea00608, 0x00000000, 0x3f800000 }, { 0x00600001, 0x2ec00608, 0x00000000, 0x3f800000 }, { 0x00600001, 0x2ee00608, 0x00000000, 0x3f800000 }, { 0x05800031, 0x200022e0, 0x0e000e00, 0x90031000 }, #endif }; /* AUB annotation support */ #define MAX_ANNOTATIONS 33 struct annotations_context { drm_intel_aub_annotation annotations[MAX_ANNOTATIONS]; int index; uint32_t offset; }; static void annotation_init(struct annotations_context *aub) { /* aub->annotations is an array keeping a list of annotations of the * batch buffer ordered by offset. aub->annotations[0] is thus left * for the command stream and will be filled just before executing * the batch buffer with annotations_add_batch() */ aub->index = 1; } static void add_annotation(drm_intel_aub_annotation *a, uint32_t type, uint32_t subtype, uint32_t ending_offset) { a->type = type; a->subtype = subtype; a->ending_offset = ending_offset; } static void annotation_add_batch(struct annotations_context *aub, size_t size) { add_annotation(&aub->annotations[0], AUB_TRACE_TYPE_BATCH, 0, size); } static void annotation_add_state(struct annotations_context *aub, uint32_t state_type, uint32_t start_offset, size_t size) { igt_assert(aub->index < MAX_ANNOTATIONS); add_annotation(&aub->annotations[aub->index++], AUB_TRACE_TYPE_NOTYPE, 0, start_offset); add_annotation(&aub->annotations[aub->index++], AUB_TRACE_TYPE(state_type), AUB_TRACE_SUBTYPE(state_type), start_offset + size); } static void annotation_flush(struct annotations_context *aub, struct intel_batchbuffer *batch) { if (!igt_aub_dump_enabled()) return; drm_intel_bufmgr_gem_set_aub_annotations(batch->bo, aub->annotations, aub->index); } static uint32_t batch_used(struct intel_batchbuffer *batch) { return batch->ptr - batch->buffer; } static uint32_t batch_align(struct intel_batchbuffer *batch, uint32_t align) { uint32_t offset = batch_used(batch); offset = ALIGN(offset, align); batch->ptr = batch->buffer + offset; return offset; } static void * batch_alloc(struct intel_batchbuffer *batch, uint32_t size, uint32_t align) { uint32_t offset = batch_align(batch, align); batch->ptr += size; return memset(batch->buffer + offset, 0, size); } static uint32_t batch_offset(struct intel_batchbuffer *batch, void *ptr) { return (uint8_t *)ptr - batch->buffer; } static uint32_t batch_copy(struct intel_batchbuffer *batch, const void *ptr, uint32_t size, uint32_t align) { return batch_offset(batch, memcpy(batch_alloc(batch, size, align), ptr, size)); } static void gen6_render_flush(struct intel_batchbuffer *batch, drm_intel_context *context, uint32_t batch_end) { int ret; ret = drm_intel_bo_subdata(batch->bo, 0, 4096, batch->buffer); if (ret == 0) ret = drm_intel_gem_bo_context_exec(batch->bo, context, batch_end, 0); igt_assert(ret == 0); } /* Mostly copy+paste from gen6, except height, width, pitch moved */ static uint32_t gen8_bind_buf(struct intel_batchbuffer *batch, struct annotations_context *aub, struct igt_buf *buf, uint32_t format, int is_dst) { struct gen8_surface_state *ss; uint32_t write_domain, read_domain, offset; int ret; if (is_dst) { write_domain = read_domain = I915_GEM_DOMAIN_RENDER; } else { write_domain = 0; read_domain = I915_GEM_DOMAIN_SAMPLER; } ss = batch_alloc(batch, sizeof(*ss), 64); offset = batch_offset(batch, ss); annotation_add_state(aub, AUB_TRACE_SURFACE_STATE, offset, sizeof(*ss)); ss->ss0.surface_type = GEN6_SURFACE_2D; ss->ss0.surface_format = format; ss->ss0.render_cache_read_write = 1; ss->ss0.vertical_alignment = 1; /* align 4 */ ss->ss0.horizontal_alignment = 1; /* align 4 */ if (buf->tiling == I915_TILING_X) ss->ss0.tiled_mode = 2; else if (buf->tiling == I915_TILING_Y) ss->ss0.tiled_mode = 3; ss->ss8.base_addr = buf->bo->offset; ret = drm_intel_bo_emit_reloc(batch->bo, batch_offset(batch, ss) + 8 * 4, buf->bo, 0, read_domain, write_domain); igt_assert(ret == 0); ss->ss2.height = igt_buf_height(buf) - 1; ss->ss2.width = igt_buf_width(buf) - 1; ss->ss3.pitch = buf->stride - 1; ss->ss7.shader_chanel_select_r = 4; ss->ss7.shader_chanel_select_g = 5; ss->ss7.shader_chanel_select_b = 6; ss->ss7.shader_chanel_select_a = 7; return offset; } static uint32_t gen8_bind_surfaces(struct intel_batchbuffer *batch, struct annotations_context *aub, struct igt_buf *src, struct igt_buf *dst) { uint32_t *binding_table, offset; binding_table = batch_alloc(batch, 8, 32); offset = batch_offset(batch, binding_table); annotation_add_state(aub, AUB_TRACE_BINDING_TABLE, offset, 8); binding_table[0] = gen8_bind_buf(batch, aub, dst, GEN6_SURFACEFORMAT_B8G8R8A8_UNORM, 1); binding_table[1] = gen8_bind_buf(batch, aub, src, GEN6_SURFACEFORMAT_B8G8R8A8_UNORM, 0); return offset; } /* Mostly copy+paste from gen6, except wrap modes moved */ static uint32_t gen8_create_sampler(struct intel_batchbuffer *batch, struct annotations_context *aub) { struct gen8_sampler_state *ss; uint32_t offset; ss = batch_alloc(batch, sizeof(*ss), 64); offset = batch_offset(batch, ss); annotation_add_state(aub, AUB_TRACE_SAMPLER_STATE, offset, sizeof(*ss)); ss->ss0.min_filter = GEN6_MAPFILTER_NEAREST; ss->ss0.mag_filter = GEN6_MAPFILTER_NEAREST; ss->ss3.r_wrap_mode = GEN6_TEXCOORDMODE_CLAMP; ss->ss3.s_wrap_mode = GEN6_TEXCOORDMODE_CLAMP; ss->ss3.t_wrap_mode = GEN6_TEXCOORDMODE_CLAMP; /* I've experimented with non-normalized coordinates and using the LD * sampler fetch, but couldn't make it work. */ ss->ss3.non_normalized_coord = 0; return offset; } static uint32_t gen8_fill_ps(struct intel_batchbuffer *batch, struct annotations_context *aub, const uint32_t kernel[][4], size_t size) { uint32_t offset; offset = batch_copy(batch, kernel, size, 64); annotation_add_state(aub, AUB_TRACE_KERNEL_INSTRUCTIONS, offset, size); return offset; } /* * gen7_fill_vertex_buffer_data populate vertex buffer with data. * * The vertex buffer consists of 3 vertices to construct a RECTLIST. The 4th * vertex is implied (automatically derived by the HW). Each element has the * destination offset, and the normalized texture offset (src). The rectangle * itself will span the entire subsurface to be copied. * * see gen6_emit_vertex_elements */ static uint32_t gen7_fill_vertex_buffer_data(struct intel_batchbuffer *batch, struct annotations_context *aub, struct igt_buf *src, uint32_t src_x, uint32_t src_y, uint32_t dst_x, uint32_t dst_y, uint32_t width, uint32_t height) { void *start; uint32_t offset; batch_align(batch, 8); start = batch->ptr; emit_vertex_2s(batch, dst_x + width, dst_y + height); emit_vertex_normalized(batch, src_x + width, igt_buf_width(src)); emit_vertex_normalized(batch, src_y + height, igt_buf_height(src)); emit_vertex_2s(batch, dst_x, dst_y + height); emit_vertex_normalized(batch, src_x, igt_buf_width(src)); emit_vertex_normalized(batch, src_y + height, igt_buf_height(src)); emit_vertex_2s(batch, dst_x, dst_y); emit_vertex_normalized(batch, src_x, igt_buf_width(src)); emit_vertex_normalized(batch, src_y, igt_buf_height(src)); offset = batch_offset(batch, start); annotation_add_state(aub, AUB_TRACE_VERTEX_BUFFER, offset, 3 * VERTEX_SIZE); return offset; } /* * gen6_emit_vertex_elements - The vertex elements describe the contents of the * vertex buffer. We pack the vertex buffer in a semi weird way, conforming to * what gen6_rendercopy did. The most straightforward would be to store * everything as floats. * * see gen7_fill_vertex_buffer_data() for where the corresponding elements are * packed. */ static void gen6_emit_vertex_elements(struct intel_batchbuffer *batch) { /* * The VUE layout * dword 0-3: pad (0, 0, 0. 0) * dword 4-7: position (x, y, 0, 1.0), * dword 8-11: texture coordinate 0 (u0, v0, 0, 1.0) */ OUT_BATCH(GEN6_3DSTATE_VERTEX_ELEMENTS | (3 * 2 + 1 - 2)); /* Element state 0. These are 4 dwords of 0 required for the VUE format. * We don't really know or care what they do. */ OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | GEN6_SURFACEFORMAT_R32G32B32A32_FLOAT << VE0_FORMAT_SHIFT | 0 << VE0_OFFSET_SHIFT); /* we specify 0, but it's really does not exist */ OUT_BATCH(GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_0_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_1_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_3_SHIFT); /* Element state 1 - Our "destination" vertices. These are passed down * through the pipeline, and eventually make it to the pixel shader as * the offsets in the destination surface. It's packed as the 16 * signed/scaled because of gen6 rendercopy. I see no particular reason * for doing this though. */ OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | GEN6_SURFACEFORMAT_R16G16_SSCALED << VE0_FORMAT_SHIFT | 0 << VE0_OFFSET_SHIFT); /* offsets vb in bytes */ OUT_BATCH(GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT | GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT | GEN6_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT); /* Element state 2. Last but not least we store the U,V components as * normalized floats. These will be used in the pixel shader to sample * from the source buffer. */ OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | GEN6_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT | 4 << VE0_OFFSET_SHIFT); /* offset vb in bytes */ OUT_BATCH(GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT | GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT | GEN6_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT); } /* * gen8_emit_vertex_buffer emit the vertex buffers command * * @batch * @offset - bytw offset within the @batch where the vertex buffer starts. */ static void gen8_emit_vertex_buffer(struct intel_batchbuffer *batch, uint32_t offset) { OUT_BATCH(GEN6_3DSTATE_VERTEX_BUFFERS | (1 + (4 * 1) - 2)); OUT_BATCH(0 << VB0_BUFFER_INDEX_SHIFT | /* VB 0th index */ GEN7_VB0_BUFFER_ADDR_MOD_EN | /* Address Modify Enable */ VERTEX_SIZE << VB0_BUFFER_PITCH_SHIFT); OUT_RELOC(batch->bo, I915_GEM_DOMAIN_VERTEX, 0, offset); OUT_BATCH(3 * VERTEX_SIZE); } static uint32_t gen6_create_cc_state(struct intel_batchbuffer *batch, struct annotations_context *aub) { struct gen6_color_calc_state *cc_state; uint32_t offset; cc_state = batch_alloc(batch, sizeof(*cc_state), 64); offset = batch_offset(batch, cc_state); annotation_add_state(aub, AUB_TRACE_CC_STATE, offset, sizeof(*cc_state)); return offset; } static uint32_t gen8_create_blend_state(struct intel_batchbuffer *batch, struct annotations_context *aub) { struct gen8_blend_state *blend; int i; uint32_t offset; blend = batch_alloc(batch, sizeof(*blend), 64); offset = batch_offset(batch, blend); annotation_add_state(aub, AUB_TRACE_BLEND_STATE, offset, sizeof(*blend)); for (i = 0; i < 16; i++) { blend->bs[i].dest_blend_factor = GEN6_BLENDFACTOR_ZERO; blend->bs[i].source_blend_factor = GEN6_BLENDFACTOR_ONE; blend->bs[i].color_blend_func = GEN6_BLENDFUNCTION_ADD; blend->bs[i].pre_blend_color_clamp = 1; blend->bs[i].color_buffer_blend = 0; } return offset; } static uint32_t gen6_create_cc_viewport(struct intel_batchbuffer *batch, struct annotations_context *aub) { struct gen6_cc_viewport *vp; uint32_t offset; vp = batch_alloc(batch, sizeof(*vp), 32); offset = batch_offset(batch, vp); annotation_add_state(aub, AUB_TRACE_CC_VP_STATE, offset, sizeof(*vp)); /* XXX I don't understand this */ vp->min_depth = -1.e35; vp->max_depth = 1.e35; return offset; } static uint32_t gen7_create_sf_clip_viewport(struct intel_batchbuffer *batch, struct annotations_context *aub) { /* XXX these are likely not needed */ struct gen7_sf_clip_viewport *scv_state; uint32_t offset; scv_state = batch_alloc(batch, sizeof(*scv_state), 64); offset = batch_offset(batch, scv_state); annotation_add_state(aub, AUB_TRACE_CLIP_VP_STATE, offset, sizeof(*scv_state)); scv_state->guardband.xmin = 0; scv_state->guardband.xmax = 1.0f; scv_state->guardband.ymin = 0; scv_state->guardband.ymax = 1.0f; return offset; } static uint32_t gen6_create_scissor_rect(struct intel_batchbuffer *batch, struct annotations_context *aub) { struct gen6_scissor_rect *scissor; uint32_t offset; scissor = batch_alloc(batch, sizeof(*scissor), 64); offset = batch_offset(batch, scissor); annotation_add_state(aub, AUB_TRACE_SCISSOR_STATE, offset, sizeof(*scissor)); return offset; } static void gen8_emit_sip(struct intel_batchbuffer *batch) { OUT_BATCH(GEN6_STATE_SIP | (3 - 2)); OUT_BATCH(0); OUT_BATCH(0); } static void gen7_emit_push_constants(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS); OUT_BATCH(0); } static void gen8_emit_state_base_address(struct intel_batchbuffer *batch) { OUT_BATCH(GEN6_STATE_BASE_ADDRESS | (16 - 2)); /* general */ OUT_BATCH(0 | BASE_ADDRESS_MODIFY); OUT_BATCH(0); /* stateless data port */ OUT_BATCH(0 | BASE_ADDRESS_MODIFY); /* surface */ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY); /* dynamic */ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* indirect */ OUT_BATCH(0); OUT_BATCH(0); /* instruction */ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* general state buffer size */ OUT_BATCH(0xfffff000 | 1); /* dynamic state buffer size */ OUT_BATCH(1 << 12 | 1); /* indirect object buffer size */ OUT_BATCH(0xfffff000 | 1); /* intruction buffer size */ OUT_BATCH(1 << 12 | 1); } static void gen7_emit_urb(struct intel_batchbuffer *batch) { /* XXX: Min valid values from mesa */ const int vs_entries = 64; const int vs_size = 2; const int vs_start = 2; OUT_BATCH(GEN7_3DSTATE_URB_VS); OUT_BATCH(vs_entries | ((vs_size - 1) << 16) | (vs_start << 25)); OUT_BATCH(GEN7_3DSTATE_URB_GS); OUT_BATCH(vs_start << 25); OUT_BATCH(GEN7_3DSTATE_URB_HS); OUT_BATCH(vs_start << 25); OUT_BATCH(GEN7_3DSTATE_URB_DS); OUT_BATCH(vs_start << 25); } static void gen8_emit_cc(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_BLEND_STATE_POINTERS); OUT_BATCH(cc.blend_state | 1); OUT_BATCH(GEN6_3DSTATE_CC_STATE_POINTERS); OUT_BATCH(cc.cc_state | 1); } static void gen8_emit_multisample(struct intel_batchbuffer *batch) { OUT_BATCH(GEN8_3DSTATE_MULTISAMPLE); OUT_BATCH(0); OUT_BATCH(GEN6_3DSTATE_SAMPLE_MASK); OUT_BATCH(1); } static void gen8_emit_vs(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS); OUT_BATCH(0); OUT_BATCH(GEN6_3DSTATE_CONSTANT_VS | (11 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN6_3DSTATE_VS | (9-2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } static void gen8_emit_hs(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_CONSTANT_HS | (11 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_HS | (9-2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS); OUT_BATCH(0); } static void gen8_emit_gs(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_CONSTANT_GS | (11 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_GS | (10-2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS); OUT_BATCH(0); } static void gen8_emit_ds(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_CONSTANT_DS | (11 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_DS | (9-2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS); OUT_BATCH(0); } static void gen8_emit_wm_hz_op(struct intel_batchbuffer *batch) { OUT_BATCH(GEN8_3DSTATE_WM_HZ_OP | (5-2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } static void gen8_emit_null_state(struct intel_batchbuffer *batch) { gen8_emit_wm_hz_op(batch); gen8_emit_hs(batch); OUT_BATCH(GEN7_3DSTATE_TE | (4-2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); gen8_emit_gs(batch); gen8_emit_ds(batch); gen8_emit_vs(batch); } static void gen7_emit_clip(struct intel_batchbuffer *batch) { OUT_BATCH(GEN6_3DSTATE_CLIP | (4 - 2)); OUT_BATCH(0); OUT_BATCH(0); /* pass-through */ OUT_BATCH(0); } static void gen8_emit_sf(struct intel_batchbuffer *batch) { int i; OUT_BATCH(GEN7_3DSTATE_SBE | (4 - 2)); OUT_BATCH(1 << GEN7_SBE_NUM_OUTPUTS_SHIFT | GEN8_SBE_FORCE_URB_ENTRY_READ_LENGTH | GEN8_SBE_FORCE_URB_ENTRY_READ_OFFSET | 1 << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT | 1 << GEN8_SBE_URB_ENTRY_READ_OFFSET_SHIFT); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN8_3DSTATE_SBE_SWIZ | (11 - 2)); for (i = 0; i < 8; i++) OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN8_3DSTATE_RASTER | (5 - 2)); OUT_BATCH(GEN8_RASTER_FRONT_WINDING_CCW | GEN8_RASTER_CULL_NONE); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN6_3DSTATE_SF | (4 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } static void gen8_emit_ps(struct intel_batchbuffer *batch, uint32_t kernel) { const int max_threads = 63; OUT_BATCH(GEN6_3DSTATE_WM | (2 - 2)); OUT_BATCH(/* XXX: I don't understand the BARYCENTRIC stuff, but it * appears we need it to put our setup data in the place we * expect (g6, see below) */ GEN7_3DSTATE_PS_PERSPECTIVE_PIXEL_BARYCENTRIC); OUT_BATCH(GEN6_3DSTATE_CONSTANT_PS | (11-2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_PS | (12-2)); OUT_BATCH(kernel); OUT_BATCH(0); /* kernel hi */ OUT_BATCH(1 << GEN6_3DSTATE_WM_SAMPLER_COUNT_SHIFT | 2 << GEN6_3DSTATE_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT); OUT_BATCH(0); /* scratch space stuff */ OUT_BATCH(0); /* scratch hi */ OUT_BATCH((max_threads - 1) << GEN8_3DSTATE_PS_MAX_THREADS_SHIFT | GEN6_3DSTATE_WM_16_DISPATCH_ENABLE); OUT_BATCH(6 << GEN6_3DSTATE_WM_DISPATCH_START_GRF_0_SHIFT); OUT_BATCH(0); // kernel 1 OUT_BATCH(0); /* kernel 1 hi */ OUT_BATCH(0); // kernel 2 OUT_BATCH(0); /* kernel 2 hi */ OUT_BATCH(GEN8_3DSTATE_PS_BLEND | (2 - 2)); OUT_BATCH(GEN8_PS_BLEND_HAS_WRITEABLE_RT); OUT_BATCH(GEN8_3DSTATE_PS_EXTRA | (2 - 2)); OUT_BATCH(GEN8_PSX_PIXEL_SHADER_VALID | GEN8_PSX_ATTRIBUTE_ENABLE); } static void gen8_emit_depth(struct intel_batchbuffer *batch) { OUT_BATCH(GEN8_3DSTATE_WM_DEPTH_STENCIL | (3 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_DEPTH_BUFFER | (8-2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_HIER_DEPTH_BUFFER | (5 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_STENCIL_BUFFER | (5 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } static void gen7_emit_clear(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_CLEAR_PARAMS | (3-2)); OUT_BATCH(0); OUT_BATCH(1); // clear valid } static void gen6_emit_drawing_rectangle(struct intel_batchbuffer *batch, struct igt_buf *dst) { OUT_BATCH(GEN6_3DSTATE_DRAWING_RECTANGLE | (4 - 2)); OUT_BATCH(0); OUT_BATCH((igt_buf_height(dst) - 1) << 16 | (igt_buf_width(dst) - 1)); OUT_BATCH(0); } static void gen8_emit_vf_topology(struct intel_batchbuffer *batch) { OUT_BATCH(GEN8_3DSTATE_VF_TOPOLOGY); OUT_BATCH(_3DPRIM_RECTLIST); } /* Vertex elements MUST be defined before this according to spec */ static void gen8_emit_primitive(struct intel_batchbuffer *batch, uint32_t offset) { OUT_BATCH(GEN8_3DSTATE_VF_INSTANCING | (3 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN6_3DPRIMITIVE | (7-2)); OUT_BATCH(0); /* gen8+ ignore the topology type field */ OUT_BATCH(3); /* vertex count */ OUT_BATCH(0); /* We're specifying this instead with offset in GEN6_3DSTATE_VERTEX_BUFFERS */ OUT_BATCH(1); /* single instance */ OUT_BATCH(0); /* start instance location */ OUT_BATCH(0); /* index buffer offset, ignored */ } /* The general rule is if it's named gen6 it is directly copied from * gen6_render_copyfunc. * * This sets up most of the 3d pipeline, and most of that to NULL state. The * docs aren't specific about exactly what must be set up NULL, but the general * rule is we could be run at any time, and so the most state we set to NULL, * the better our odds of success. * * +---------------+ <---- 4096 * | ^ | * | | | * | various | * | state | * | | | * |_______|_______| <---- 2048 + ? * | ^ | * | | | * | batch | * | commands | * | | | * | | | * +---------------+ <---- 0 + ? * * The batch commands point to state within tthe batch, so all state offsets should be * 0 < offset < 4096. Both commands and state build upwards, and are constructed * in that order. This means too many batch commands can delete state if not * careful. * */ #define BATCH_STATE_SPLIT 2048 void gen8_render_copyfunc(struct intel_batchbuffer *batch, drm_intel_context *context, struct igt_buf *src, unsigned src_x, unsigned src_y, unsigned width, unsigned height, struct igt_buf *dst, unsigned dst_x, unsigned dst_y) { struct annotations_context aub_annotations; uint32_t ps_sampler_state, ps_kernel_off, ps_binding_table; uint32_t scissor_state; uint32_t vertex_buffer; uint32_t batch_end; intel_batchbuffer_flush_with_context(batch, context); batch_align(batch, 8); batch->ptr = &batch->buffer[BATCH_STATE_SPLIT]; annotation_init(&aub_annotations); ps_binding_table = gen8_bind_surfaces(batch, &aub_annotations, src, dst); ps_sampler_state = gen8_create_sampler(batch, &aub_annotations); ps_kernel_off = gen8_fill_ps(batch, &aub_annotations, ps_kernel, sizeof(ps_kernel)); vertex_buffer = gen7_fill_vertex_buffer_data(batch, &aub_annotations, src, src_x, src_y, dst_x, dst_y, width, height); cc.cc_state = gen6_create_cc_state(batch, &aub_annotations); cc.blend_state = gen8_create_blend_state(batch, &aub_annotations); viewport.cc_state = gen6_create_cc_viewport(batch, &aub_annotations); viewport.sf_clip_state = gen7_create_sf_clip_viewport(batch, &aub_annotations); scissor_state = gen6_create_scissor_rect(batch, &aub_annotations); /* TODO: theree is other state which isn't setup */ igt_assert(batch->ptr < &batch->buffer[4095]); batch->ptr = batch->buffer; /* Start emitting the commands. The order roughly follows the mesa blorp * order */ OUT_BATCH(GEN6_PIPELINE_SELECT | PIPELINE_SELECT_3D); gen8_emit_sip(batch); gen7_emit_push_constants(batch); gen8_emit_state_base_address(batch); OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC); OUT_BATCH(viewport.cc_state); OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP); OUT_BATCH(viewport.sf_clip_state); gen7_emit_urb(batch); gen8_emit_cc(batch); gen8_emit_multisample(batch); gen8_emit_null_state(batch); OUT_BATCH(GEN7_3DSTATE_STREAMOUT | (5-2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); gen7_emit_clip(batch); gen8_emit_sf(batch); OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS); OUT_BATCH(ps_binding_table); OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS); OUT_BATCH(ps_sampler_state); gen8_emit_ps(batch, ps_kernel_off); OUT_BATCH(GEN6_3DSTATE_SCISSOR_STATE_POINTERS); OUT_BATCH(scissor_state); gen8_emit_depth(batch); gen7_emit_clear(batch); gen6_emit_drawing_rectangle(batch, dst); gen8_emit_vertex_buffer(batch, vertex_buffer); gen6_emit_vertex_elements(batch); gen8_emit_vf_topology(batch); gen8_emit_primitive(batch, vertex_buffer); OUT_BATCH(MI_BATCH_BUFFER_END); batch_end = batch_align(batch, 8); igt_assert(batch_end < BATCH_STATE_SPLIT); annotation_add_batch(&aub_annotations, batch_end); dump_batch(batch); annotation_flush(&aub_annotations, batch); gen6_render_flush(batch, context, batch_end); intel_batchbuffer_reset(batch); } intel-gpu-tools-1.14/lib/check-ndebug.h0000644000175000017500000000007312665336131014666 00000000000000#ifdef NDEBUG #error "Testsuite needs its asserts!" #endif intel-gpu-tools-1.14/lib/igt_fb.h0000644000175000017500000001066112665336131013605 00000000000000/* * Copyright © 2013,2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * Damien Lespiau */ #ifndef __IGT_FB_H__ #define __IGT_FB_H__ /* cairo is assumed available on linux. On Android we check for ANDROID_HAS_CAIRO */ #if (!defined(ANDROID)) || (defined(ANDROID) && ANDROID_HAS_CAIRO) #include #else typedef struct _cairo_surface cairo_surface_t; typedef struct _cairo cairo_t; #endif #include #include #include #include #include /* helpers to create nice-looking framebuffers */ struct igt_fb { uint32_t fb_id; uint32_t gem_handle; uint32_t drm_format; int width; int height; unsigned stride; uint64_t tiling; unsigned size; cairo_surface_t *cairo_surface; uint32_t src_x; uint32_t src_y; uint32_t src_w; uint32_t src_h; }; enum igt_text_align { align_left, align_bottom = align_left, align_right = 0x01, align_top = 0x02, align_vcenter = 0x04, align_hcenter = 0x08, }; void igt_calc_fb_size(int fd, int width, int height, int bpp, uint64_t tiling, unsigned *size_ret, unsigned *stride_ret); unsigned int igt_create_fb_with_bo_size(int fd, int width, int height, uint32_t format, uint64_t tiling, struct igt_fb *fb, unsigned bo_size, unsigned bo_stride); unsigned int igt_create_fb(int fd, int width, int height, uint32_t format, uint64_t tiling, struct igt_fb *fb); unsigned int igt_create_color_fb(int fd, int width, int height, uint32_t format, uint64_t tiling, double r, double g, double b, struct igt_fb *fb /* out */); unsigned int igt_create_pattern_fb(int fd, int width, int height, uint32_t format, uint64_t tiling, struct igt_fb *fb /* out */); unsigned int igt_create_color_pattern_fb(int fd, int width, int height, uint32_t format, uint64_t tiling, double r, double g, double b, struct igt_fb *fb /* out */); unsigned int igt_create_image_fb(int drm_fd, int width, int height, uint32_t format, uint64_t tiling, const char *filename, struct igt_fb *fb /* out */); unsigned int igt_create_stereo_fb(int drm_fd, drmModeModeInfo *mode, uint32_t format, uint64_t tiling); void igt_remove_fb(int fd, struct igt_fb *fb); /* cairo-based painting */ cairo_t *igt_get_cairo_ctx(int fd, struct igt_fb *fb); void igt_paint_color(cairo_t *cr, int x, int y, int w, int h, double r, double g, double b); void igt_paint_color_alpha(cairo_t *cr, int x, int y, int w, int h, double r, double g, double b, double a); void igt_paint_color_gradient(cairo_t *cr, int x, int y, int w, int h, int r, int g, int b); void igt_paint_test_pattern(cairo_t *cr, int width, int height); void igt_paint_image(cairo_t *cr, const char *filename, int dst_x, int dst_y, int dst_width, int dst_height); void igt_write_fb_to_png(int fd, struct igt_fb *fb, const char *filename); int igt_cairo_printf_line(cairo_t *cr, enum igt_text_align align, double yspacing, const char *fmt, ...) __attribute__((format (printf, 4, 5))); /* helpers to handle drm fourcc codes */ uint32_t igt_bpp_depth_to_drm_format(int bpp, int depth); uint32_t igt_drm_format_to_bpp(uint32_t drm_format); const char *igt_format_str(uint32_t drm_format); void igt_get_all_cairo_formats(const uint32_t **formats, int *format_count); #endif /* __IGT_FB_H__ */ intel-gpu-tools-1.14/lib/intel_batchbuffer.h0000644000175000017500000002311512665336131016017 00000000000000#ifndef INTEL_BATCHBUFFER_H #define INTEL_BATCHBUFFER_H #include #include #include #include "igt_core.h" #include "intel_reg.h" #define BATCH_SZ 4096 #define BATCH_RESERVED 16 struct intel_batchbuffer { drm_intel_bufmgr *bufmgr; uint32_t devid; int gen; drm_intel_context *ctx; drm_intel_bo *bo; uint8_t buffer[BATCH_SZ]; uint8_t *ptr, *end; uint8_t *state; }; struct intel_batchbuffer *intel_batchbuffer_alloc(drm_intel_bufmgr *bufmgr, uint32_t devid); void intel_batchbuffer_set_context(struct intel_batchbuffer *batch, drm_intel_context *ctx); void intel_batchbuffer_free(struct intel_batchbuffer *batch); void intel_batchbuffer_flush(struct intel_batchbuffer *batch); void intel_batchbuffer_flush_on_ring(struct intel_batchbuffer *batch, int ring); void intel_batchbuffer_flush_with_context(struct intel_batchbuffer *batch, drm_intel_context *context); void intel_batchbuffer_reset(struct intel_batchbuffer *batch); void intel_batchbuffer_data(struct intel_batchbuffer *batch, const void *data, unsigned int bytes); void intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch, drm_intel_bo *buffer, uint64_t delta, uint32_t read_domains, uint32_t write_domain, int fenced); /* Inline functions - might actually be better off with these * non-inlined. Certainly better off switching all command packets to * be passed as structs rather than dwords, but that's a little bit of * work... */ #pragma GCC diagnostic ignored "-Winline" static inline unsigned int intel_batchbuffer_space(struct intel_batchbuffer *batch) { return (BATCH_SZ - BATCH_RESERVED) - (batch->ptr - batch->buffer); } static inline void intel_batchbuffer_emit_dword(struct intel_batchbuffer *batch, uint32_t dword) { igt_assert(intel_batchbuffer_space(batch) >= 4); *(uint32_t *) (batch->ptr) = dword; batch->ptr += 4; } static inline void intel_batchbuffer_require_space(struct intel_batchbuffer *batch, unsigned int sz) { igt_assert(sz < BATCH_SZ - BATCH_RESERVED); if (intel_batchbuffer_space(batch) < sz) intel_batchbuffer_flush(batch); } /** * BEGIN_BATCH: * @n: number of DWORDS to emit * @r: number of RELOCS to emit * * Prepares a batch to emit @n DWORDS, flushing it if there's not enough space * available. * * This macro needs a pointer to an #intel_batchbuffer structure called batch in * scope. */ #define BEGIN_BATCH(n, r) do { \ int __n = (n); \ igt_assert(batch->end == NULL); \ if (batch->gen >= 8) __n += r; \ __n *= 4; \ intel_batchbuffer_require_space(batch, __n); \ batch->end = batch->ptr + __n; \ } while (0) /** * OUT_BATCH: * @d: DWORD to emit * * Emits @d into a batch. * * This macro needs a pointer to an #intel_batchbuffer structure called batch in * scope. */ #define OUT_BATCH(d) intel_batchbuffer_emit_dword(batch, d) /** * OUT_RELOC_FENCED: * @buf: relocation target libdrm buffer object * @read_domains: gem domain bits for the relocation * @write_domain: gem domain bit for the relocation * @delta: delta value to add to @buffer's gpu address * * Emits a fenced relocation into a batch. * * This macro needs a pointer to an #intel_batchbuffer structure called batch in * scope. */ #define OUT_RELOC_FENCED(buf, read_domains, write_domain, delta) do { \ igt_assert((delta) >= 0); \ intel_batchbuffer_emit_reloc(batch, buf, delta, \ read_domains, write_domain, 1); \ } while (0) /** * OUT_RELOC: * @buf: relocation target libdrm buffer object * @read_domains: gem domain bits for the relocation * @write_domain: gem domain bit for the relocation * @delta: delta value to add to @buffer's gpu address * * Emits a normal, unfenced relocation into a batch. * * This macro needs a pointer to an #intel_batchbuffer structure called batch in * scope. */ #define OUT_RELOC(buf, read_domains, write_domain, delta) do { \ igt_assert((delta) >= 0); \ intel_batchbuffer_emit_reloc(batch, buf, delta, \ read_domains, write_domain, 0); \ } while (0) /** * ADVANCE_BATCH: * * Completes the batch command emission sequence started with #BEGIN_BATCH. * * This macro needs a pointer to an #intel_batchbuffer structure called batch in * scope. */ #define ADVANCE_BATCH() do { \ igt_assert(batch->ptr == batch->end); \ batch->end = NULL; \ } while(0) #define BLIT_COPY_BATCH_START(flags) do { \ BEGIN_BATCH(8, 2); \ OUT_BATCH(XY_SRC_COPY_BLT_CMD | \ XY_SRC_COPY_BLT_WRITE_ALPHA | \ XY_SRC_COPY_BLT_WRITE_RGB | \ (flags) | \ (6 + 2*(batch->gen >= 8))); \ } while(0) #define COLOR_BLIT_COPY_BATCH_START(flags) do { \ BEGIN_BATCH(6, 1); \ OUT_BATCH(XY_COLOR_BLT_CMD_NOLEN | \ COLOR_BLT_WRITE_ALPHA | \ XY_COLOR_BLT_WRITE_RGB | \ (flags) | \ (4 + (batch->gen >= 8))); \ } while(0) void intel_blt_copy(struct intel_batchbuffer *batch, drm_intel_bo *src_bo, int src_x1, int src_y1, int src_pitch, drm_intel_bo *dst_bo, int dst_x1, int dst_y1, int dst_pitch, int width, int height, int bpp); void intel_copy_bo(struct intel_batchbuffer *batch, drm_intel_bo *dst_bo, drm_intel_bo *src_bo, long int size); /* * Yf/Ys tiling * * Tiling mode in the I915_TILING_... namespace for new tiling modes which are * defined in the kernel. (They are not fenceable so the kernel does not need * to know about them.) * * They are to be used the the blitting routines below. */ #define I915_TILING_Yf 3 #define I915_TILING_Ys 4 /** * igt_buf: * @bo: underlying libdrm buffer object * @stride: stride of the buffer * @tiling: tiling mode bits * @data: pointer to the memory mapping of the buffer * @size: size of the buffer object * * This is a i-g-t buffer object wrapper structure which augments the baseline * libdrm buffer object with suitable data needed by the render copy and the * fill functions. */ struct igt_buf { drm_intel_bo *bo; uint32_t stride; uint32_t tiling; uint32_t *data; uint32_t size; /*< private >*/ unsigned num_tiles; }; unsigned igt_buf_width(struct igt_buf *buf); unsigned igt_buf_height(struct igt_buf *buf); void igt_blitter_fast_copy(struct intel_batchbuffer *batch, struct igt_buf *src, unsigned src_x, unsigned src_y, unsigned width, unsigned height, struct igt_buf *dst, unsigned dst_x, unsigned dst_y); void igt_blitter_fast_copy__raw(int fd, /* src */ uint32_t src_handle, unsigned int src_stride, unsigned int src_tiling, unsigned int src_x, unsigned src_y, /* size */ unsigned int width, unsigned int height, /* dst */ uint32_t dst_handle, unsigned int dst_stride, unsigned int dst_tiling, unsigned int dst_x, unsigned dst_y); /** * igt_render_copyfunc_t: * @batch: batchbuffer object * @context: libdrm hardware context to use * @src: source i-g-t buffer object * @src_x: source pixel x-coordination * @src_y: source pixel y-coordination * @width: width of the copied rectangle * @height: height of the copied rectangle * @dst: destination i-g-t buffer object * @dst_x: destination pixel x-coordination * @dst_y: destination pixel y-coordination * * This is the type of the per-platform render copy functions. The * platform-specific implementation can be obtained by calling * igt_get_render_copyfunc(). * * A render copy function will emit a batchbuffer to the kernel which executes * the specified blit copy operation using the render engine. @context is * optional and can be NULL. */ typedef void (*igt_render_copyfunc_t)(struct intel_batchbuffer *batch, drm_intel_context *context, struct igt_buf *src, unsigned src_x, unsigned src_y, unsigned width, unsigned height, struct igt_buf *dst, unsigned dst_x, unsigned dst_y); igt_render_copyfunc_t igt_get_render_copyfunc(int devid); /** * igt_fillfunc_t: * @batch: batchbuffer object * @dst: destination i-g-t buffer object * @x: destination pixel x-coordination * @y: destination pixel y-coordination * @width: width of the filled rectangle * @height: height of the filled rectangle * @color: fill color to use * * This is the type of the per-platform fill functions using media * or gpgpu pipeline. The platform-specific implementation can be obtained * by calling igt_get_media_fillfunc() or igt_get_gpgpu_fillfunc(). * * A fill function will emit a batchbuffer to the kernel which executes * the specified blit fill operation using the media/gpgpu engine. */ typedef void (*igt_fillfunc_t)(struct intel_batchbuffer *batch, struct igt_buf *dst, unsigned x, unsigned y, unsigned width, unsigned height, uint8_t color); igt_fillfunc_t igt_get_media_fillfunc(int devid); igt_fillfunc_t igt_get_gpgpu_fillfunc(int devid); /** * igt_media_spinfunc_t: * @batch: batchbuffer object * @dst: destination i-g-t buffer object * @spins: number of loops to execute * * This is the type of the per-platform media spin functions. The * platform-specific implementation can be obtained by calling * igt_get_media_spinfunc(). * * The media spin function emits a batchbuffer for the render engine with * the media pipeline selected. The workload consists of a single thread * which spins in a tight loop the requested number of times. Each spin * increments a counter whose final 32-bit value is written to the * destination buffer on completion. This utility provides a simple way * to keep the render engine busy for a set time for various tests. */ typedef void (*igt_media_spinfunc_t)(struct intel_batchbuffer *batch, struct igt_buf *dst, uint32_t spins); igt_media_spinfunc_t igt_get_media_spinfunc(int devid); #endif intel-gpu-tools-1.14/lib/rendercopy_gen6.c0000644000175000017500000004130612665336131015437 00000000000000#include #include #include #include #include #include #include #include #include #include #include #include "drm.h" #include "i915_drm.h" #include "drmtest.h" #include "intel_bufmgr.h" #include "intel_batchbuffer.h" #include "intel_io.h" #include "rendercopy.h" #include "gen6_render.h" #include "intel_reg.h" #define VERTEX_SIZE (3*4) static const uint32_t ps_kernel_nomask_affine[][4] = { { 0x0060005a, 0x204077be, 0x000000c0, 0x008d0040 }, { 0x0060005a, 0x206077be, 0x000000c0, 0x008d0080 }, { 0x0060005a, 0x208077be, 0x000000d0, 0x008d0040 }, { 0x0060005a, 0x20a077be, 0x000000d0, 0x008d0080 }, { 0x00000201, 0x20080061, 0x00000000, 0x00000000 }, { 0x00600001, 0x20200022, 0x008d0000, 0x00000000 }, { 0x02800031, 0x21c01cc9, 0x00000020, 0x0a8a0001 }, { 0x00600001, 0x204003be, 0x008d01c0, 0x00000000 }, { 0x00600001, 0x206003be, 0x008d01e0, 0x00000000 }, { 0x00600001, 0x208003be, 0x008d0200, 0x00000000 }, { 0x00600001, 0x20a003be, 0x008d0220, 0x00000000 }, { 0x00600001, 0x20c003be, 0x008d0240, 0x00000000 }, { 0x00600001, 0x20e003be, 0x008d0260, 0x00000000 }, { 0x00600001, 0x210003be, 0x008d0280, 0x00000000 }, { 0x00600001, 0x212003be, 0x008d02a0, 0x00000000 }, { 0x05800031, 0x24001cc8, 0x00000040, 0x90019000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, }; static uint32_t batch_used(struct intel_batchbuffer *batch) { return batch->ptr - batch->buffer; } static uint32_t batch_align(struct intel_batchbuffer *batch, uint32_t align) { uint32_t offset = batch_used(batch); offset = ALIGN(offset, align); batch->ptr = batch->buffer + offset; return offset; } static uint32_t batch_round_upto(struct intel_batchbuffer *batch, uint32_t divisor) { uint32_t offset = batch_used(batch); offset = (offset + divisor-1) / divisor * divisor; batch->ptr = batch->buffer + offset; return offset; } static void * batch_alloc(struct intel_batchbuffer *batch, uint32_t size, uint32_t align) { uint32_t offset = batch_align(batch, align); batch->ptr += size; return memset(batch->buffer + offset, 0, size); } static uint32_t batch_offset(struct intel_batchbuffer *batch, void *ptr) { return (uint8_t *)ptr - batch->buffer; } static uint32_t batch_copy(struct intel_batchbuffer *batch, const void *ptr, uint32_t size, uint32_t align) { return batch_offset(batch, memcpy(batch_alloc(batch, size, align), ptr, size)); } static void gen6_render_flush(struct intel_batchbuffer *batch, drm_intel_context *context, uint32_t batch_end) { int ret; ret = drm_intel_bo_subdata(batch->bo, 0, 4096, batch->buffer); if (ret == 0) ret = drm_intel_gem_bo_context_exec(batch->bo, context, batch_end, 0); igt_assert(ret == 0); } static uint32_t gen6_bind_buf(struct intel_batchbuffer *batch, struct igt_buf *buf, uint32_t format, int is_dst) { struct gen6_surface_state *ss; uint32_t write_domain, read_domain; int ret; if (is_dst) { write_domain = read_domain = I915_GEM_DOMAIN_RENDER; } else { write_domain = 0; read_domain = I915_GEM_DOMAIN_SAMPLER; } ss = batch_alloc(batch, sizeof(*ss), 32); ss->ss0.surface_type = GEN6_SURFACE_2D; ss->ss0.surface_format = format; ss->ss0.data_return_format = GEN6_SURFACERETURNFORMAT_FLOAT32; ss->ss0.color_blend = 1; ss->ss1.base_addr = buf->bo->offset; ret = drm_intel_bo_emit_reloc(batch->bo, batch_offset(batch, ss) + 4, buf->bo, 0, read_domain, write_domain); igt_assert(ret == 0); ss->ss2.height = igt_buf_height(buf) - 1; ss->ss2.width = igt_buf_width(buf) - 1; ss->ss3.pitch = buf->stride - 1; ss->ss3.tiled_surface = buf->tiling != I915_TILING_NONE; ss->ss3.tile_walk = buf->tiling == I915_TILING_Y; return batch_offset(batch, ss); } static uint32_t gen6_bind_surfaces(struct intel_batchbuffer *batch, struct igt_buf *src, struct igt_buf *dst) { uint32_t *binding_table; binding_table = batch_alloc(batch, 32, 32); binding_table[0] = gen6_bind_buf(batch, dst, GEN6_SURFACEFORMAT_B8G8R8A8_UNORM, 1); binding_table[1] = gen6_bind_buf(batch, src, GEN6_SURFACEFORMAT_B8G8R8A8_UNORM, 0); return batch_offset(batch, binding_table); } static void gen6_emit_sip(struct intel_batchbuffer *batch) { OUT_BATCH(GEN6_STATE_SIP | 0); OUT_BATCH(0); } static void gen6_emit_urb(struct intel_batchbuffer *batch) { OUT_BATCH(GEN6_3DSTATE_URB | (3 - 2)); OUT_BATCH((1 - 1) << GEN6_3DSTATE_URB_VS_SIZE_SHIFT | 24 << GEN6_3DSTATE_URB_VS_ENTRIES_SHIFT); /* at least 24 on GEN6 */ OUT_BATCH(0 << GEN6_3DSTATE_URB_GS_SIZE_SHIFT | 0 << GEN6_3DSTATE_URB_GS_ENTRIES_SHIFT); /* no GS thread */ } static void gen6_emit_state_base_address(struct intel_batchbuffer *batch) { OUT_BATCH(GEN6_STATE_BASE_ADDRESS | (10 - 2)); OUT_BATCH(0); /* general */ OUT_RELOC(batch->bo, /* surface */ I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); OUT_RELOC(batch->bo, /* instruction */ I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); OUT_BATCH(0); /* indirect */ OUT_RELOC(batch->bo, /* dynamic */ I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* upper bounds, disable */ OUT_BATCH(0); OUT_BATCH(BASE_ADDRESS_MODIFY); OUT_BATCH(0); OUT_BATCH(BASE_ADDRESS_MODIFY); } static void gen6_emit_viewports(struct intel_batchbuffer *batch, uint32_t cc_vp) { OUT_BATCH(GEN6_3DSTATE_VIEWPORT_STATE_POINTERS | GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_CC | (4 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(cc_vp); } static void gen6_emit_vs(struct intel_batchbuffer *batch) { /* disable VS constant buffer */ OUT_BATCH(GEN6_3DSTATE_CONSTANT_VS | (5 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN6_3DSTATE_VS | (6 - 2)); OUT_BATCH(0); /* no VS kernel */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* pass-through */ } static void gen6_emit_gs(struct intel_batchbuffer *batch) { /* disable GS constant buffer */ OUT_BATCH(GEN6_3DSTATE_CONSTANT_GS | (5 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN6_3DSTATE_GS | (7 - 2)); OUT_BATCH(0); /* no GS kernel */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* pass-through */ } static void gen6_emit_clip(struct intel_batchbuffer *batch) { OUT_BATCH(GEN6_3DSTATE_CLIP | (4 - 2)); OUT_BATCH(0); OUT_BATCH(0); /* pass-through */ OUT_BATCH(0); } static void gen6_emit_wm_constants(struct intel_batchbuffer *batch) { /* disable WM constant buffer */ OUT_BATCH(GEN6_3DSTATE_CONSTANT_PS | (5 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } static void gen6_emit_null_depth_buffer(struct intel_batchbuffer *batch) { OUT_BATCH(GEN6_3DSTATE_DEPTH_BUFFER | (7 - 2)); OUT_BATCH(GEN6_SURFACE_NULL << GEN6_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT | GEN6_DEPTHFORMAT_D32_FLOAT << GEN6_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN6_3DSTATE_CLEAR_PARAMS | (2 - 2)); OUT_BATCH(0); } static void gen6_emit_invariant(struct intel_batchbuffer *batch) { OUT_BATCH(GEN6_PIPELINE_SELECT | PIPELINE_SELECT_3D); OUT_BATCH(GEN6_3DSTATE_MULTISAMPLE | (3 - 2)); OUT_BATCH(GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER | GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_1); /* 1 sample/pixel */ OUT_BATCH(0); OUT_BATCH(GEN6_3DSTATE_SAMPLE_MASK | (2 - 2)); OUT_BATCH(1); } static void gen6_emit_cc(struct intel_batchbuffer *batch, uint32_t blend) { OUT_BATCH(GEN6_3DSTATE_CC_STATE_POINTERS | (4 - 2)); OUT_BATCH(blend | 1); OUT_BATCH(1024 | 1); OUT_BATCH(1024 | 1); } static void gen6_emit_sampler(struct intel_batchbuffer *batch, uint32_t state) { OUT_BATCH(GEN6_3DSTATE_SAMPLER_STATE_POINTERS | GEN6_3DSTATE_SAMPLER_STATE_MODIFY_PS | (4 - 2)); OUT_BATCH(0); /* VS */ OUT_BATCH(0); /* GS */ OUT_BATCH(state); } static void gen6_emit_sf(struct intel_batchbuffer *batch) { OUT_BATCH(GEN6_3DSTATE_SF | (20 - 2)); OUT_BATCH(1 << GEN6_3DSTATE_SF_NUM_OUTPUTS_SHIFT | 1 << GEN6_3DSTATE_SF_URB_ENTRY_READ_LENGTH_SHIFT | 1 << GEN6_3DSTATE_SF_URB_ENTRY_READ_OFFSET_SHIFT); OUT_BATCH(0); OUT_BATCH(GEN6_3DSTATE_SF_CULL_NONE); OUT_BATCH(2 << GEN6_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT); /* DW4 */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* DW9 */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* DW14 */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* DW19 */ } static void gen6_emit_wm(struct intel_batchbuffer *batch, int kernel) { OUT_BATCH(GEN6_3DSTATE_WM | (9 - 2)); OUT_BATCH(kernel); OUT_BATCH(1 << GEN6_3DSTATE_WM_SAMPLER_COUNT_SHIFT | 2 << GEN6_3DSTATE_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT); OUT_BATCH(0); OUT_BATCH(6 << GEN6_3DSTATE_WM_DISPATCH_START_GRF_0_SHIFT); /* DW4 */ OUT_BATCH((40 - 1) << GEN6_3DSTATE_WM_MAX_THREADS_SHIFT | GEN6_3DSTATE_WM_DISPATCH_ENABLE | GEN6_3DSTATE_WM_16_DISPATCH_ENABLE); OUT_BATCH(1 << GEN6_3DSTATE_WM_NUM_SF_OUTPUTS_SHIFT | GEN6_3DSTATE_WM_PERSPECTIVE_PIXEL_BARYCENTRIC); OUT_BATCH(0); OUT_BATCH(0); } static void gen6_emit_binding_table(struct intel_batchbuffer *batch, uint32_t wm_table) { OUT_BATCH(GEN6_3DSTATE_BINDING_TABLE_POINTERS | GEN6_3DSTATE_BINDING_TABLE_MODIFY_PS | (4 - 2)); OUT_BATCH(0); /* vs */ OUT_BATCH(0); /* gs */ OUT_BATCH(wm_table); } static void gen6_emit_drawing_rectangle(struct intel_batchbuffer *batch, struct igt_buf *dst) { OUT_BATCH(GEN6_3DSTATE_DRAWING_RECTANGLE | (4 - 2)); OUT_BATCH(0); OUT_BATCH((igt_buf_height(dst) - 1) << 16 | (igt_buf_width(dst) - 1)); OUT_BATCH(0); } static void gen6_emit_vertex_elements(struct intel_batchbuffer *batch) { /* The VUE layout * dword 0-3: pad (0.0, 0.0, 0.0. 0.0) * dword 4-7: position (x, y, 1.0, 1.0), * dword 8-11: texture coordinate 0 (u0, v0, 0, 0) * * dword 4-11 are fetched from vertex buffer */ OUT_BATCH(GEN6_3DSTATE_VERTEX_ELEMENTS | (2 * 3 + 1 - 2)); OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | GEN6_SURFACEFORMAT_R32G32B32A32_FLOAT << VE0_FORMAT_SHIFT | 0 << VE0_OFFSET_SHIFT); OUT_BATCH(GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_0_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_1_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_3_SHIFT); /* x,y */ OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | GEN6_SURFACEFORMAT_R16G16_SSCALED << VE0_FORMAT_SHIFT | 0 << VE0_OFFSET_SHIFT); /* offsets vb in bytes */ OUT_BATCH(GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT | GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT | GEN6_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT | GEN6_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT); /* u0, v0 */ OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | GEN6_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT | 4 << VE0_OFFSET_SHIFT); /* offset vb in bytes */ OUT_BATCH(GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT | GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_3_SHIFT); } static uint32_t gen6_create_cc_viewport(struct intel_batchbuffer *batch) { struct gen6_cc_viewport *vp; vp = batch_alloc(batch, sizeof(*vp), 32); vp->min_depth = -1.e35; vp->max_depth = 1.e35; return batch_offset(batch, vp); } static uint32_t gen6_create_cc_blend(struct intel_batchbuffer *batch) { struct gen6_blend_state *blend; blend = batch_alloc(batch, sizeof(*blend), 64); blend->blend0.dest_blend_factor = GEN6_BLENDFACTOR_ZERO; blend->blend0.source_blend_factor = GEN6_BLENDFACTOR_ONE; blend->blend0.blend_func = GEN6_BLENDFUNCTION_ADD; blend->blend0.blend_enable = 1; blend->blend1.post_blend_clamp_enable = 1; blend->blend1.pre_blend_clamp_enable = 1; return batch_offset(batch, blend); } static uint32_t gen6_create_kernel(struct intel_batchbuffer *batch) { return batch_copy(batch, ps_kernel_nomask_affine, sizeof(ps_kernel_nomask_affine), 64); } static uint32_t gen6_create_sampler(struct intel_batchbuffer *batch, sampler_filter_t filter, sampler_extend_t extend) { struct gen6_sampler_state *ss; ss = batch_alloc(batch, sizeof(*ss), 32); ss->ss0.lod_preclamp = 1; /* GL mode */ /* We use the legacy mode to get the semantics specified by * the Render extension. */ ss->ss0.border_color_mode = GEN6_BORDER_COLOR_MODE_LEGACY; switch (filter) { default: case SAMPLER_FILTER_NEAREST: ss->ss0.min_filter = GEN6_MAPFILTER_NEAREST; ss->ss0.mag_filter = GEN6_MAPFILTER_NEAREST; break; case SAMPLER_FILTER_BILINEAR: ss->ss0.min_filter = GEN6_MAPFILTER_LINEAR; ss->ss0.mag_filter = GEN6_MAPFILTER_LINEAR; break; } switch (extend) { default: case SAMPLER_EXTEND_NONE: ss->ss1.r_wrap_mode = GEN6_TEXCOORDMODE_CLAMP_BORDER; ss->ss1.s_wrap_mode = GEN6_TEXCOORDMODE_CLAMP_BORDER; ss->ss1.t_wrap_mode = GEN6_TEXCOORDMODE_CLAMP_BORDER; break; case SAMPLER_EXTEND_REPEAT: ss->ss1.r_wrap_mode = GEN6_TEXCOORDMODE_WRAP; ss->ss1.s_wrap_mode = GEN6_TEXCOORDMODE_WRAP; ss->ss1.t_wrap_mode = GEN6_TEXCOORDMODE_WRAP; break; case SAMPLER_EXTEND_PAD: ss->ss1.r_wrap_mode = GEN6_TEXCOORDMODE_CLAMP; ss->ss1.s_wrap_mode = GEN6_TEXCOORDMODE_CLAMP; ss->ss1.t_wrap_mode = GEN6_TEXCOORDMODE_CLAMP; break; case SAMPLER_EXTEND_REFLECT: ss->ss1.r_wrap_mode = GEN6_TEXCOORDMODE_MIRROR; ss->ss1.s_wrap_mode = GEN6_TEXCOORDMODE_MIRROR; ss->ss1.t_wrap_mode = GEN6_TEXCOORDMODE_MIRROR; break; } return batch_offset(batch, ss); } static void gen6_emit_vertex_buffer(struct intel_batchbuffer *batch) { OUT_BATCH(GEN6_3DSTATE_VERTEX_BUFFERS | 3); OUT_BATCH(VB0_VERTEXDATA | 0 << VB0_BUFFER_INDEX_SHIFT | VERTEX_SIZE << VB0_BUFFER_PITCH_SHIFT); OUT_RELOC(batch->bo, I915_GEM_DOMAIN_VERTEX, 0, 0); OUT_RELOC(batch->bo, I915_GEM_DOMAIN_VERTEX, 0, batch->bo->size-1); OUT_BATCH(0); } static uint32_t gen6_emit_primitive(struct intel_batchbuffer *batch) { uint32_t offset; OUT_BATCH(GEN6_3DPRIMITIVE | GEN6_3DPRIMITIVE_VERTEX_SEQUENTIAL | _3DPRIM_RECTLIST << GEN6_3DPRIMITIVE_TOPOLOGY_SHIFT | 0 << 9 | 4); OUT_BATCH(3); /* vertex count */ offset = batch_used(batch); OUT_BATCH(0); /* vertex_index */ OUT_BATCH(1); /* single instance */ OUT_BATCH(0); /* start instance location */ OUT_BATCH(0); /* index buffer offset, ignored */ return offset; } void gen6_render_copyfunc(struct intel_batchbuffer *batch, drm_intel_context *context, struct igt_buf *src, unsigned src_x, unsigned src_y, unsigned width, unsigned height, struct igt_buf *dst, unsigned dst_x, unsigned dst_y) { uint32_t wm_state, wm_kernel, wm_table; uint32_t cc_vp, cc_blend, offset; uint32_t batch_end; intel_batchbuffer_flush_with_context(batch, context); batch->ptr = batch->buffer + 1024; batch_alloc(batch, 64, 64); wm_table = gen6_bind_surfaces(batch, src, dst); wm_kernel = gen6_create_kernel(batch); wm_state = gen6_create_sampler(batch, SAMPLER_FILTER_NEAREST, SAMPLER_EXTEND_NONE); cc_vp = gen6_create_cc_viewport(batch); cc_blend = gen6_create_cc_blend(batch); batch->ptr = batch->buffer; gen6_emit_invariant(batch); gen6_emit_state_base_address(batch); gen6_emit_sip(batch); gen6_emit_urb(batch); gen6_emit_viewports(batch, cc_vp); gen6_emit_vs(batch); gen6_emit_gs(batch); gen6_emit_clip(batch); gen6_emit_wm_constants(batch); gen6_emit_null_depth_buffer(batch); gen6_emit_drawing_rectangle(batch, dst); gen6_emit_cc(batch, cc_blend); gen6_emit_sampler(batch, wm_state); gen6_emit_sf(batch); gen6_emit_wm(batch, wm_kernel); gen6_emit_vertex_elements(batch); gen6_emit_binding_table(batch, wm_table); gen6_emit_vertex_buffer(batch); offset = gen6_emit_primitive(batch); OUT_BATCH(MI_BATCH_BUFFER_END); batch_end = batch_align(batch, 8); *(uint32_t*)(batch->buffer + offset) = batch_round_upto(batch, VERTEX_SIZE)/VERTEX_SIZE; emit_vertex_2s(batch, dst_x + width, dst_y + height); emit_vertex_normalized(batch, src_x + width, igt_buf_width(src)); emit_vertex_normalized(batch, src_y + height, igt_buf_height(src)); emit_vertex_2s(batch, dst_x, dst_y + height); emit_vertex_normalized(batch, src_x, igt_buf_width(src)); emit_vertex_normalized(batch, src_y + height, igt_buf_height(src)); emit_vertex_2s(batch, dst_x, dst_y); emit_vertex_normalized(batch, src_x, igt_buf_width(src)); emit_vertex_normalized(batch, src_y, igt_buf_height(src)); gen6_render_flush(batch, context, batch_end); intel_batchbuffer_reset(batch); } intel-gpu-tools-1.14/lib/igt_gt.c0000644000175000017500000003623112665336131013624 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ #include #include #include #include #include #include #include #include "drmtest.h" #include "igt_aux.h" #include "igt_core.h" #include "igt_gt.h" #include "igt_debugfs.h" #include "ioctl_wrappers.h" #include "intel_reg.h" #include "intel_chipset.h" #if NEW_CONTEXT_PARAM_NO_ERROR_CAPTURE_API #define LOCAL_CONTEXT_PARAM_NO_ERROR_CAPTURE 0x4 #endif /** * SECTION:igt_gt * @short_description: GT support library * @title: GT * @include: igt.h * * This library provides various auxiliary helper functions to handle general * interactions with the GT like forcewake handling, injecting hangs or stopping * engines. */ static bool has_gpu_reset(int fd) { static int once = -1; if (once < 0) { struct drm_i915_getparam gp; int val = 0; memset(&gp, 0, sizeof(gp)); gp.param = 35; /* HAS_GPU_RESET */ gp.value = &val; if (ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp)) once = intel_gen(intel_get_drm_devid(fd)) >= 5; else once = val > 0; } return once; } /** * igt_require_hang_ring: * @fd: open i915 drm file descriptor * @ring: execbuf ring flag * * Convenience helper to check whether advanced hang injection is supported by * the kernel. Uses igt_skip to automatically skip the test/subtest if this * isn't the case. * * Note that we can't simply just call this from igt_hang_ring since some * tests want to exercise gpu wedging behavior. For which we intentionally * disable gpu reset support, but still want to inject a hang, see for example * tests/gem_eio.c Instead, we expect that the first invocation of * igt_require_hand_ring be from a vanilla context and use the has_gpu_reset() * determined then for all later instances. This allows us the convenience * of double checking when injecting hangs, whilst pushing the complexity * to the tests that are deliberating trying to break the box. * * This function is also controlled by the environment variables: * * IGT_HANG (boolean) - if false, skip all tests that try to inject a hang. * Default: true * * IGT_HANG_WITHOUT_RESET (boolean) - if true, allow the hang even if the * kernel does not support GPU recovery. The machine will be wedged afterwards * (and so require a reboot between testing), but it does allow limited testing * to be done under hang injection. * Default: false */ void igt_require_hang_ring(int fd, int ring) { if (!igt_check_boolean_env_var("IGT_HANG", true)) igt_skip("hang injection disabled by user"); gem_require_ring(fd, ring); gem_context_require_ban_period(fd); if (!igt_check_boolean_env_var("IGT_HANG_WITHOUT_RESET", false)) igt_require(has_gpu_reset(fd)); } /** * igt_hang_ring_ctx: * @fd: open i915 drm file descriptor * @ctx: the contxt specifier * @ring: execbuf ring flag * @flags: set of flags to control execution * * This helper function injects a hanging batch associated with @ctx into @ring. * It returns a #igt_hang_ring_t structure which must be passed to * igt_post_hang_ring() for hang post-processing (after the gpu hang * interaction has been tested. * * Returns: * Structure with helper internal state for igt_post_hang_ring(). */ igt_hang_ring_t igt_hang_ctx(int fd, uint32_t ctx, int ring, unsigned flags, uint64_t *offset) { struct drm_i915_gem_relocation_entry reloc; struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 exec; struct local_i915_gem_context_param param; uint32_t b[8]; unsigned ban; unsigned len; igt_require_hang_ring(fd, ring); /* One day the kernel ABI will be fixed! */ igt_require(ctx == 0 || ring == I915_EXEC_RENDER); param.context = ctx; param.size = 0; if ((flags & HANG_ALLOW_CAPTURE) == 0) { #if NEW_CONTEXT_PARAM_NO_ERROR_CAPTURE_API param.param = LOCAL_CONTEXT_PARAM_NO_ERROR_CAPTURE; param.value = 1; /* Older kernels may not have NO_ERROR_CAPTURE, in which case * we just eat the error state in post-hang (and hope we eat * the right one). */ __gem_context_set_param(fd, ¶m); #endif } param.param = LOCAL_CONTEXT_PARAM_BAN_PERIOD; param.value = 0; gem_context_get_param(fd, ¶m); ban = param.value; if ((flags & HANG_ALLOW_BAN) == 0) { param.param = LOCAL_CONTEXT_PARAM_BAN_PERIOD; param.value = 0; gem_context_set_param(fd, ¶m); } memset(&reloc, 0, sizeof(reloc)); memset(&exec, 0, sizeof(exec)); memset(&execbuf, 0, sizeof(execbuf)); exec.handle = gem_create(fd, 4096); exec.relocation_count = 1; exec.relocs_ptr = (uintptr_t)&reloc; memset(b, 0xc5, sizeof(b)); len = 2; if (intel_gen(intel_get_drm_devid(fd)) >= 8) len++; b[0] = MI_BATCH_BUFFER_START | (len - 2); b[len] = MI_BATCH_BUFFER_END; b[len+1] = MI_NOOP; gem_write(fd, exec.handle, 0, b, sizeof(b)); reloc.offset = 4; reloc.target_handle = exec.handle; reloc.read_domains = I915_GEM_DOMAIN_COMMAND; execbuf.buffers_ptr = (uintptr_t)&exec; execbuf.buffer_count = 1; execbuf.batch_len = sizeof(b); execbuf.flags = ring; i915_execbuffer2_set_context_id(execbuf, ctx); gem_execbuf(fd, &execbuf); if (offset) *offset = exec.offset; return (struct igt_hang_ring){ exec.handle, ctx, ban, flags }; } /** * igt_hang_ring: * @fd: open i915 drm file descriptor * @ring: execbuf ring flag * * This helper function injects a hanging batch into @ring. It returns a * #igt_hang_ring_t structure which must be passed to igt_post_hang_ring() for * hang post-processing (after the gpu hang interaction has been tested. * * Returns: * Structure with helper internal state for igt_post_hang_ring(). */ igt_hang_ring_t igt_hang_ring(int fd, int ring) { return igt_hang_ctx(fd, 0, ring, 0, NULL); } static void eat_error_state(void) { int fd; fd = igt_debugfs_open("i915_error_state", O_WRONLY); igt_assert(write(fd, "", 1) == 1); close(fd); } /** * igt_post_hang_ring: * @fd: open i915 drm file descriptor * @arg: hang state from igt_hang_ring() * * This function does the necessary post-processing after a gpu hang injected * with igt_hang_ring(). */ void igt_post_hang_ring(int fd, struct igt_hang_ring arg) { struct local_i915_gem_context_param param; if (arg.handle == 0) return; gem_set_domain(fd, arg.handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); gem_close(fd, arg.handle); param.context = arg.ctx; param.size = 0; param.param = LOCAL_CONTEXT_PARAM_BAN_PERIOD; param.value = arg.ban; gem_context_set_param(fd, ¶m); if ((arg.flags & HANG_ALLOW_CAPTURE) == 0) { #if NEW_CONTEXT_PARAM_NO_ERROR_CAPTURE_API param.param = LOCAL_CONTEXT_PARAM_NO_ERROR_CAPTURE; param.value = 0; if (__gem_context_set_param(fd, ¶m)) eat_error_state(); #else eat_error_state(); #endif } } /** * igt_force_gpu_reset: * * forces a gpu reset using the i915_wedged debugfs interface. To be used to * recover from situations where the hangcheck didn't trigger and/or the gpu is * stuck, either because the test manually disabled gpu resets or because the * test hit an hangcheck bug */ void igt_force_gpu_reset(void) { int fd, ret; igt_debug("Triggering GPU reset\n"); fd = igt_debugfs_open("i915_wedged", O_RDWR); igt_require(fd >= 0); ret = write(fd, "-1\n", 3); close(fd); igt_assert_eq(ret, 3); } /* GPU abusers */ static struct igt_helper_process hang_helper; static void __attribute__((noreturn)) hang_helper_process(pid_t pid, int fd) { while (1) { if (kill(pid, 0)) /* Parent has died, so must we. */ exit(0); igt_post_hang_ring(fd, igt_hang_ring(fd, I915_EXEC_DEFAULT)); sleep(1); } } /** * igt_fork_hang_helper: * * Fork a child process using #igt_fork_helper to hang the default engine * of the GPU at regular intervals. * * This is useful to exercise slow running code (such as aperture placement) * which needs to be robust against a GPU reset. * * This function automatically skips when test requirements aren't met using * igt_skip(). */ void igt_fork_hang_helper(void) { int fd, gen; fd = drm_open_driver(DRIVER_INTEL); gen = intel_gen(intel_get_drm_devid(fd)); igt_skip_on(gen < 5); igt_fork_helper(&hang_helper) hang_helper_process(getppid(), fd); close(fd); } /** * igt_stop_hang_helper: * * Stops the child process spawned with igt_fork_hang_helper(). * * In tests with subtests this function can be called outside of failure * catching code blocks like #igt_fixture or #igt_subtest. */ void igt_stop_hang_helper(void) { if (hang_helper.running) igt_stop_helper(&hang_helper); } /** * igt_open_forcewake_handle: * * This functions opens the debugfs forcewake file and so prevents the GT from * suspending. The reference is automatically dropped when the is closed. * * Returns: * The file descriptor of the forcewake handle or -1 if that didn't work out. */ int igt_open_forcewake_handle(void) { if (getenv("IGT_NO_FORCEWAKE")) return -1; return igt_debugfs_open("i915_forcewake_user", O_WRONLY); } /** * igt_to_stop_ring_flag: * @ring: the specified ring flag from execbuf ioctl (I915_EXEC_*) * * This converts the specified ring to a ring flag to be used * with igt_get_stop_rings() and igt_set_stop_rings(). * * Returns: * Ring flag for the given ring. */ enum stop_ring_flags igt_to_stop_ring_flag(int ring) { if (ring == I915_EXEC_DEFAULT) return STOP_RING_RENDER; igt_assert(ring && ((ring & ~I915_EXEC_RING_MASK) == 0)); return 1 << (ring - 1); } static void stop_rings_write(uint32_t mask) { int fd; char buf[80]; igt_assert(snprintf(buf, sizeof(buf), "0x%08x", mask) == 10); fd = igt_debugfs_open("i915_ring_stop", O_WRONLY); igt_assert(fd >= 0); igt_assert(write(fd, buf, strlen(buf)) == strlen(buf)); close(fd); } /** * igt_get_stop_rings: * * Read current ring flags from 'i915_ring_stop' debugfs entry. * * Returns: * Current ring flags. */ enum stop_ring_flags igt_get_stop_rings(void) { int fd; char buf[80]; int l; unsigned long long ring_mask; fd = igt_debugfs_open("i915_ring_stop", O_RDONLY); igt_assert(fd >= 0); l = read(fd, buf, sizeof(buf)-1); igt_assert(l > 0); igt_assert(l < sizeof(buf)); buf[l] = '\0'; close(fd); errno = 0; ring_mask = strtoull(buf, NULL, 0); igt_assert(errno == 0); return ring_mask; } /** * igt_set_stop_rings: * @flags: Ring flags to write * * This writes @flags to 'i915_ring_stop' debugfs entry. Driver will * prevent the CPU from writing tail pointer for the ring that @flags * specify. Note that the ring is not stopped right away. Instead any * further command emissions won't be executed after the flag is set. * * This is the least invasive way to make the GPU stuck. Hence you must * set this after a batch submission with it's own invalid or endless * looping instructions. In this case it is merely for giving notification * for the driver that this was simulated hang, as the batch would have * caused hang in any case. On the other hand if you use a valid or noop * batch and want to hang the ring (GPU), you must set corresponding flag * before submitting the batch. * * Driver checks periodically if a ring is making any progress, and if * it is not, it will declare the ring to be hung and will reset the GPU. * After reset, the driver will clear flags in 'i915_ring_stop' * * Note: Always when hanging the GPU, use igt_set_stop_rings() to * notify the driver. Driver controls hang log messaging based on * these flags and thus prevents false positives on logs. */ void igt_set_stop_rings(enum stop_ring_flags flags) { enum stop_ring_flags current; igt_assert((flags & ~(STOP_RING_ALL | STOP_RING_ALLOW_BAN | STOP_RING_ALLOW_ERRORS)) == 0); current = igt_get_stop_rings(); igt_assert_f(flags == 0 || current == 0, "previous i915_ring_stop is still 0x%x\n", current); stop_rings_write(flags); current = igt_get_stop_rings(); igt_warn_on_f(current != flags, "i915_ring_stop readback mismatch 0x%x vs 0x%x\n", flags, current); } static unsigned int clflush_size; int igt_setup_clflush(void) { FILE *file; char *line = NULL; size_t size = 0; int first_stanza = 1; int has_clflush = 0; if (clflush_size) return 1; file = fopen("/proc/cpuinfo", "r"); if (file == NULL) return 0; while (getline(&line, &size, file) != -1) { if (strncmp(line, "processor", 9) == 0) { if (!first_stanza) break; first_stanza = 0; } if (strncmp(line, "flags", 5) == 0) { if (strstr(line, "clflush")) has_clflush = 1; } if (strncmp(line, "clflush size", 12) == 0) { char *colon = strchr(line, ':'); if (colon) clflush_size = atoi(colon + 1); } } free(line); fclose(file); return has_clflush && clflush_size; } void igt_clflush_range(void *addr, int size) { #if defined(__i386__) || defined(__x86_64__) char *p, *end; end = (char *)addr + size; p = (char *)((uintptr_t)addr & ~((uintptr_t)clflush_size - 1)); asm volatile("mfence" ::: "memory"); for (; p < end; p += clflush_size) asm volatile("clflush %0" : "+m" (*(volatile char *)p)); asm volatile("mfence" ::: "memory"); #else fprintf(stderr, "igt_clflush_range() unsupported\n"); #endif } /** * intel_detect_and_clear_missed_irq: * @fd: open i915 drm file descriptor, used to quiesce the gpu * * This functions idles the GPU and then queries whether there has * been a missed interrupt reported by the driver. Afterwards it * clears the missed interrupt flag, in order to disable the timer * fallback for the next test. */ unsigned intel_detect_and_clear_missed_interrupts(int fd) { unsigned missed = 0; FILE *file; gem_quiescent_gpu(fd); file = igt_debugfs_fopen("i915_ring_missed_irq", "r"); if (file) { igt_assert(fscanf(file, "%x", &missed) == 1); fclose(file); } if (missed) { file = igt_debugfs_fopen("i915_ring_missed_irq", "w"); if (file) { fwrite("0\n", 1, 2, file); fclose(file); } } return missed; } const struct intel_execution_engine intel_execution_engines[] = { { "default", NULL, 0, 0 }, { "render", "render ring", I915_EXEC_RENDER, 0 }, { "bsd", "bsd ring", I915_EXEC_BSD, 0 }, { "bsd1", "bsd ring", I915_EXEC_BSD, 1<<13 /*I915_EXEC_BSD_RING1*/ }, { "bsd2", "bsd2 ring", I915_EXEC_BSD, 2<<13 /*I915_EXEC_BSD_RING2*/ }, { "blt", "blitter ring", I915_EXEC_BLT, 0 }, { "vebox", "video enhancement ring", I915_EXEC_VEBOX, 0 }, { NULL, 0, 0 } }; intel-gpu-tools-1.14/lib/igt_kms.h0000644000175000017500000002121112665336131014001 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * Damien Lespiau */ #ifndef __IGT_KMS_H__ #define __IGT_KMS_H__ #include #include #include #include #include "igt_fb.h" #include "ioctl_wrappers.h" /* Low-level helpers with kmstest_ prefix */ enum pipe { PIPE_ANY = -1, PIPE_A = 0, PIPE_B, PIPE_C, I915_MAX_PIPES }; const char *kmstest_pipe_name(enum pipe pipe); /* We namespace this enum to not conflict with the Android i915_drm.h */ enum igt_plane { IGT_PLANE_1 = 0, IGT_PLANE_PRIMARY = IGT_PLANE_1, IGT_PLANE_2, IGT_PLANE_3, IGT_PLANE_CURSOR, }; const char *kmstest_plane_name(enum igt_plane plane); enum port { PORT_A = 0, PORT_B, PORT_C, PORT_D, PORT_E, I915_MAX_PORTS }; /** * kmstest_port_name: * @port: display plane * * Returns: String representing @port, e.g. "A". */ #define kmstest_port_name(port) ((port) + 'A') /** * kmstest_encoder_type_str: * @type: DRM_MODE_ENCODER_* enumeration value * * Returns: A string representing the drm encoder @type. */ const char *kmstest_encoder_type_str(int type); /** * kmstest_connector_status_str: * @status: DRM_MODE_* connector status value * * Returns: A string representing the drm connector status @status. */ const char *kmstest_connector_status_str(int status); /** * kmstest_connector_type_str: * @type: DRM_MODE_CONNECTOR_* enumeration value * * Returns: A string representing the drm connector @type. */ const char *kmstest_connector_type_str(int type); void kmstest_dump_mode(drmModeModeInfo *mode); int kmstest_get_pipe_from_crtc_id(int fd, int crtc_id); void kmstest_set_vt_graphics_mode(void); void kmstest_restore_vt_mode(void); struct kmstest_connector_config { drmModeCrtc *crtc; drmModeConnector *connector; drmModeEncoder *encoder; drmModeModeInfo default_mode; int crtc_idx; int pipe; }; /** * kmstest_force_connector_state: * @FORCE_CONNECTOR_UNSPECIFIED: Unspecified * @FORCE_CONNECTOR_ON: On * @FORCE_CONNECTOR_DIGITAL: Digital * @FORCE_CONNECTOR_OFF: Off */ enum kmstest_force_connector_state { FORCE_CONNECTOR_UNSPECIFIED, FORCE_CONNECTOR_ON, FORCE_CONNECTOR_DIGITAL, FORCE_CONNECTOR_OFF }; bool kmstest_force_connector(int fd, drmModeConnector *connector, enum kmstest_force_connector_state state); void kmstest_edid_add_3d(const unsigned char *edid, size_t length, unsigned char *new_edid_ptr[], size_t *new_length); void kmstest_force_edid(int drm_fd, drmModeConnector *connector, const unsigned char *edid, size_t length); bool kmstest_get_connector_default_mode(int drm_fd, drmModeConnector *connector, drmModeModeInfo *mode); bool kmstest_get_connector_config(int drm_fd, uint32_t connector_id, unsigned long crtc_idx_mask, struct kmstest_connector_config *config); bool kmstest_probe_connector_config(int drm_fd, uint32_t connector_id, unsigned long crtc_idx_mask, struct kmstest_connector_config *config); void kmstest_free_connector_config(struct kmstest_connector_config *config); void kmstest_set_connector_dpms(int fd, drmModeConnector *connector, int mode); bool kmstest_get_property(int drm_fd, uint32_t object_id, uint32_t object_type, const char *name, uint32_t *prop_id, uint64_t *value, drmModePropertyPtr *prop); void kmstest_unset_all_crtcs(int drm_fd, drmModeResPtr resources); /* * A small modeset API */ /* High-level kms api with igt_ prefix */ enum igt_commit_style { COMMIT_LEGACY = 0, COMMIT_UNIVERSAL, /* We'll add atomic here eventually. */ }; typedef struct igt_display igt_display_t; typedef struct igt_pipe igt_pipe_t; typedef uint32_t igt_fixed_t; /* 16.16 fixed point */ typedef enum { /* this maps to the kernel API */ IGT_ROTATION_0 = 1 << 0, IGT_ROTATION_90 = 1 << 1, IGT_ROTATION_180 = 1 << 2, IGT_ROTATION_270 = 1 << 3, } igt_rotation_t; typedef struct { /*< private >*/ igt_pipe_t *pipe; int index; /* capabilities */ unsigned int is_primary : 1; unsigned int is_cursor : 1; /* state tracking */ unsigned int fb_changed : 1; unsigned int position_changed : 1; unsigned int panning_changed : 1; unsigned int rotation_changed : 1; unsigned int size_changed : 1; /* * drm_plane can be NULL for primary and cursor planes (when not * using the atomic modeset API) */ drmModePlane *drm_plane; struct igt_fb *fb; uint32_t rotation_property; /* position within pipe_src_w x pipe_src_h */ int crtc_x, crtc_y; /* size within pipe_src_w x pipe_src_h */ int crtc_w, crtc_h; /* panning offset within the fb */ unsigned int pan_x, pan_y; igt_rotation_t rotation; } igt_plane_t; struct igt_pipe { igt_display_t *display; enum pipe pipe; bool enabled; #define IGT_MAX_PLANES 4 int n_planes; igt_plane_t planes[IGT_MAX_PLANES]; uint64_t background; /* Background color MSB BGR 16bpc LSB */ uint32_t background_changed : 1; uint32_t background_property; }; typedef struct { /*< private >*/ igt_display_t *display; uint32_t id; /* KMS id */ struct kmstest_connector_config config; char *name; bool valid; unsigned long pending_crtc_idx_mask; bool use_override_mode; drmModeModeInfo override_mode; } igt_output_t; struct igt_display { int drm_fd; int log_shift; int n_pipes; int n_outputs; unsigned long pipes_in_use; igt_output_t *outputs; igt_pipe_t pipes[I915_MAX_PIPES]; bool has_universal_planes; }; void igt_display_init(igt_display_t *display, int drm_fd); void igt_display_fini(igt_display_t *display); int igt_display_commit2(igt_display_t *display, enum igt_commit_style s); int igt_display_commit(igt_display_t *display); int igt_display_try_commit2(igt_display_t *display, enum igt_commit_style s); int igt_display_get_n_pipes(igt_display_t *display); const char *igt_output_name(igt_output_t *output); drmModeModeInfo *igt_output_get_mode(igt_output_t *output); void igt_output_override_mode(igt_output_t *output, drmModeModeInfo *mode); void igt_output_set_pipe(igt_output_t *output, enum pipe pipe); igt_plane_t *igt_output_get_plane(igt_output_t *output, enum igt_plane plane); static inline bool igt_plane_supports_rotation(igt_plane_t *plane) { return plane->rotation_property != 0; } void igt_plane_set_fb(igt_plane_t *plane, struct igt_fb *fb); void igt_plane_set_position(igt_plane_t *plane, int x, int y); void igt_plane_set_size(igt_plane_t *plane, int w, int h); void igt_plane_set_panning(igt_plane_t *plane, int x, int y); void igt_plane_set_rotation(igt_plane_t *plane, igt_rotation_t rotation); void igt_crtc_set_background(igt_pipe_t *pipe, uint64_t background); void igt_fb_set_position(struct igt_fb *fb, igt_plane_t *plane, uint32_t x, uint32_t y); void igt_fb_set_size(struct igt_fb *fb, igt_plane_t *plane, uint32_t w, uint32_t h); void igt_wait_for_vblank(int drm_fd, enum pipe pipe); #define for_each_connected_output(display, output) \ for (int i__ = 0; i__ < (display)->n_outputs; i__++) \ if ((output = &(display)->outputs[i__]), output->valid) #define for_each_pipe(display, pipe) \ for (pipe = 0; pipe < igt_display_get_n_pipes(display); pipe++) \ #define for_each_plane_on_pipe(display, pipe, plane) \ for (int i__ = 0; (plane) = &(display)->pipes[(pipe)].planes[i__], \ i__ < (display)->pipes[(pipe)].n_planes; i__++) #define IGT_FIXED(i,f) ((i) << 16 | (f)) void igt_enable_connectors(void); void igt_reset_connectors(void); #define EDID_LENGTH 128 const unsigned char* igt_kms_get_base_edid(void); const unsigned char* igt_kms_get_alt_edid(void); #endif /* __IGT_KMS_H__ */ intel-gpu-tools-1.14/lib/gpgpu_fill.h0000644000175000017500000000343612665336131014505 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Dominik Zeromski */ #ifndef GPGPU_FILL_H #define GPGPU_FILL_H void gen7_gpgpu_fillfunc(struct intel_batchbuffer *batch, struct igt_buf *dst, unsigned x, unsigned y, unsigned width, unsigned height, uint8_t color); void gen8_gpgpu_fillfunc(struct intel_batchbuffer *batch, struct igt_buf *dst, unsigned x, unsigned y, unsigned width, unsigned height, uint8_t color); void gen9_gpgpu_fillfunc(struct intel_batchbuffer *batch, struct igt_buf *dst, unsigned x, unsigned y, unsigned width, unsigned height, uint8_t color); #endif /* GPGPU_FILL_H */ intel-gpu-tools-1.14/lib/intel_os.c0000644000175000017500000001774212665336131014171 00000000000000/* * Copyright © 2008 Intel Corporation * Copyright (c) 2012, Oracle and/or its affiliates. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. * * Authors: * Eric Anholt * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include #include #include #include #include #include #include #include #include #ifdef HAVE_STRUCT_SYSINFO_TOTALRAM #include #elif defined(HAVE_SWAPCTL) /* Solaris */ #include #endif #include "intel_io.h" #include "drmtest.h" #include "igt_aux.h" /** * intel_get_total_ram_mb: * * Returns: * The total amount of system RAM available in MB. */ uint64_t intel_get_total_ram_mb(void) { uint64_t retval; #ifdef HAVE_STRUCT_SYSINFO_TOTALRAM /* Linux */ struct sysinfo sysinf; int ret; ret = sysinfo(&sysinf); igt_assert(ret == 0); retval = sysinf.totalram; retval *= sysinf.mem_unit; #elif defined(_SC_PAGESIZE) && defined(_SC_PHYS_PAGES) /* Solaris */ long pagesize, npages; pagesize = sysconf(_SC_PAGESIZE); npages = sysconf(_SC_PHYS_PAGES); retval = (uint64_t) pagesize * npages; #else #error "Unknown how to get RAM size for this OS" #endif return retval / (1024*1024); } /** * intel_get_avail_ram_mb: * * Returns: * The amount of unused system RAM available in MB. */ uint64_t intel_get_avail_ram_mb(void) { uint64_t retval; #ifdef HAVE_STRUCT_SYSINFO_TOTALRAM /* Linux */ struct sysinfo sysinf; int fd, ret; fd = open("/proc/sys/vm/drop_caches", O_RDWR); if (fd != -1) { ret = write(fd, "3\n", 2); close(fd); (void)ret; } ret = sysinfo(&sysinf); igt_assert(ret == 0); retval = sysinf.freeram; retval *= sysinf.mem_unit; #elif defined(_SC_PAGESIZE) && defined(_SC_AVPHYS_PAGES) /* Solaris */ long pagesize, npages; pagesize = sysconf(_SC_PAGESIZE); npages = sysconf(_SC_AVPHYS_PAGES); retval = (uint64_t) pagesize * npages; #else #error "Unknown how to get available RAM for this OS" #endif return retval / (1024*1024); } /** * intel_get_total_swap_mb: * * Returns: * The total amount of swap space available in MB. */ uint64_t intel_get_total_swap_mb(void) { uint64_t retval; #ifdef HAVE_STRUCT_SYSINFO_TOTALRAM /* Linux */ struct sysinfo sysinf; int ret; ret = sysinfo(&sysinf); igt_assert(ret == 0); retval = sysinf.freeswap; retval *= sysinf.mem_unit; #elif defined(HAVE_SWAPCTL) /* Solaris */ long pagesize = sysconf(_SC_PAGESIZE); uint64_t totalpages = 0; swaptbl_t *swt; char *buf; int n, i; if ((n = swapctl(SC_GETNSWP, NULL)) == -1) { igt_warn("swapctl: GETNSWP"); return 0; } if (n == 0) { /* no error, but no swap devices either */ return 0; } swt = malloc(sizeof(struct swaptable) + (n * sizeof(swapent_t))); buf = malloc(n * MAXPATHLEN); if (!swt || !buf) { igt_warn("malloc"); } else { swt->swt_n = n; for (i = 0 ; i < n; i++) { swt->swt_ent[i].ste_path = buf + (i * MAXPATHLEN); } if ((n = swapctl(SC_LIST, swt)) == -1) { igt_warn("swapctl: LIST"); } else { for (i = 0; i < swt->swt_n; i++) { totalpages += swt->swt_ent[i].ste_pages; } } } free(swt); free(buf); retval = (uint64_t) pagesize * totalpages; #else #warning "Unknown how to get swap size for this OS" return 0; #endif return retval / (1024*1024); } static uint64_t vfs_file_max(void) { static long long unsigned max; if (max == 0) { FILE *file = fopen("/proc/sys/fs/file-max", "r"); max = 80000; if (file) { igt_assert(fscanf(file, "%llu", &max) == 1); fclose(file); } } return max; } int __intel_check_memory(uint64_t count, uint64_t size, unsigned mode, uint64_t *out_required, uint64_t *out_total) { /* rough estimate of how many bytes the kernel requires to track each object */ #define KERNEL_BO_OVERHEAD 512 uint64_t required, total; required = count; required *= size + KERNEL_BO_OVERHEAD; required = ALIGN(required, 4096); igt_debug("Checking %'llu surfaces of size %'llu bytes (total %'llu) against %s%s\n", (long long)count, (long long)size, (long long)required, mode & (CHECK_RAM | CHECK_SWAP) ? "RAM" : "", mode & CHECK_SWAP ? " + swap": ""); total = 0; if (mode & (CHECK_RAM | CHECK_SWAP)) total += intel_get_avail_ram_mb(); if (mode & CHECK_SWAP) total += intel_get_total_swap_mb(); total *= 1024 * 1024; if (out_required) *out_required = required; if (out_total) *out_total = total; if (count > vfs_file_max()) return false; return required < total; } /** * intel_require_memory: * @count: number of surfaces that will be created * @size: the size in bytes of each surface * @mode: a bit field declaring whether the test will be run in RAM or in SWAP * * Computes the total amount of memory required to allocate @count surfaces, * each of @size bytes, and includes an estimate for kernel overhead. It then * queries the kernel for the available amount of memory on the system (either * RAM and/or SWAP depending upon @mode) and determines whether there is * sufficient to run the test. * * Most tests should check that there is enough RAM to hold their working set. * The rare swap thrashing tests should check that there is enough RAM + SWAP * for their tests. oom-killer tests should only run if this reports that * there is not enough RAM + SWAP! * * If there is not enough RAM this function calls igt_skip with an appropriate * message. It only ever returns if the requirement is fulfilled. This function * also causes the test to be skipped automatically on simulation under the * assumption that any test that needs to check for memory requirements is a * thrashing test unsuitable for slow simulated systems. */ void intel_require_memory(uint64_t count, uint64_t size, unsigned mode) { uint64_t required, total; igt_skip_on_f(!__intel_check_memory(count, size, mode, &required, &total), "Estimated that we need %'llu objects and %'llu MiB for the test, but only have %'llu MiB available (%s%s) and a maximum of %'llu objects\n", (long long)count, (long long)((required + ((1<<20) - 1)) >> 20), (long long)(total >> 20), mode & (CHECK_RAM | CHECK_SWAP) ? "RAM" : "", mode & CHECK_SWAP ? " + swap": "", (long long)vfs_file_max()); igt_skip_on_simulation(); } void intel_purge_vm_caches(void) { int fd; fd = open("/proc/sys/vm/drop_caches", O_RDWR); if (fd < 0) return; igt_assert_eq(write(fd, "3\n", 2), 2); close(fd); } /* * When testing a port to a new platform, create a standalone test binary * by running: * cc -o porttest intel_drm.c -I.. -DSTANDALONE_TEST `pkg-config --cflags libdrm` * and then running the resulting porttest program. */ #ifdef STANDALONE_TEST void *mmio; int main(int argc, char **argv) { igt_info("Total RAM: %"PRIu64" Mb\n", intel_get_total_ram_mb()); igt_info("Total Swap: %"PRIu64" Mb\n", intel_get_total_swap_mb()); return 0; } #endif /* STANDALONE_TEST */ intel-gpu-tools-1.14/lib/i830_reg.h0000644000175000017500000007033512665336131013677 00000000000000/************************************************************************** * * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * **************************************************************************/ #ifndef _I830_REG_H_ #define _I830_REG_H_ #define I830_SET_FIELD( var, mask, value ) (var &= ~(mask), var |= value) /* Flush */ #define MI_FLUSH (0x04<<23) #define MI_FLUSH_DW (0x26<<23) #define MI_WRITE_DIRTY_STATE (1<<4) #define MI_END_SCENE (1<<3) #define MI_GLOBAL_SNAPSHOT_COUNT_RESET (1<<3) #define MI_INHIBIT_RENDER_CACHE_FLUSH (1<<2) #define MI_STATE_INSTRUCTION_CACHE_FLUSH (1<<1) #define MI_INVALIDATE_MAP_CACHE (1<<0) /* broadwater flush bits */ #define BRW_MI_GLOBAL_SNAPSHOT_RESET (1 << 3) #define MI_COND_BATCH_BUFFER_END (0x36<<23 | 1) #define MI_DO_COMPARE (1<<21) #define MI_BATCH_BUFFER_END (0xA << 23) /* Noop */ #define MI_NOOP 0x00 #define MI_NOOP_WRITE_ID (1<<22) #define MI_NOOP_ID_MASK (1<<22 - 1) /* Wait for Events */ #define MI_WAIT_FOR_EVENT (0x03<<23) #define MI_WAIT_FOR_PIPEB_SVBLANK (1<<18) #define MI_WAIT_FOR_PIPEA_SVBLANK (1<<17) #define MI_WAIT_FOR_OVERLAY_FLIP (1<<16) #define MI_WAIT_FOR_PIPEB_VBLANK (1<<7) #define MI_WAIT_FOR_PIPEB_SCAN_LINE_WINDOW (1<<5) #define MI_WAIT_FOR_PIPEA_VBLANK (1<<3) #define MI_WAIT_FOR_PIPEA_SCAN_LINE_WINDOW (1<<1) /* Set the scan line for MI_WAIT_FOR_PIPE?_SCAN_LINE_WINDOW */ #define MI_LOAD_SCAN_LINES_INCL (0x12<<23) #define MI_LOAD_SCAN_LINES_DISPLAY_PIPEA (0) #define MI_LOAD_SCAN_LINES_DISPLAY_PIPEB (0x1<<20) /* BLT commands */ #define COLOR_BLT_CMD ((2<<29)|(0x40<<22)|(0x3)) #define COLOR_BLT_WRITE_ALPHA (1<<21) #define COLOR_BLT_WRITE_RGB (1<<20) #define XY_COLOR_BLT_WRITE_ALPHA (1<<21) #define XY_COLOR_BLT_WRITE_RGB (1<<20) #define XY_COLOR_BLT_TILED (1<<11) #define XY_SETUP_CLIP_BLT_CMD ((2<<29)|(3<<22)|1) #define XY_SRC_COPY_BLT_CMD ((2<<29)|(0x53<<22)) #define XY_SRC_COPY_BLT_WRITE_ALPHA (1<<21) #define XY_SRC_COPY_BLT_WRITE_RGB (1<<20) #define XY_SRC_COPY_BLT_SRC_TILED (1<<15) #define XY_SRC_COPY_BLT_DST_TILED (1<<11) #define SRC_COPY_BLT_CMD ((2<<29)|(0x43<<22)|0x4) #define SRC_COPY_BLT_WRITE_ALPHA (1<<21) #define SRC_COPY_BLT_WRITE_RGB (1<<20) #define XY_PAT_BLT_IMMEDIATE ((2<<29)|(0x72<<22)) #define XY_MONO_PAT_BLT_CMD ((0x2<<29)|(0x52<<22)|0x7) #define XY_MONO_PAT_VERT_SEED ((1<<10)|(1<<9)|(1<<8)) #define XY_MONO_PAT_HORT_SEED ((1<<14)|(1<<13)|(1<<12)) #define XY_MONO_PAT_BLT_WRITE_ALPHA (1<<21) #define XY_MONO_PAT_BLT_WRITE_RGB (1<<20) #define XY_MONO_SRC_BLT_CMD ((0x2<<29)|(0x54<<22)|(0x6)) #define XY_MONO_SRC_BLT_WRITE_ALPHA (1<<21) #define XY_MONO_SRC_BLT_WRITE_RGB (1<<20) #define CMD_3D (0x3<<29) #define PRIM3D_INLINE (CMD_3D | (0x1f<<24)) #define PRIM3D_TRILIST (0x0<<18) #define PRIM3D_TRISTRIP (0x1<<18) #define PRIM3D_TRISTRIP_RVRSE (0x2<<18) #define PRIM3D_TRIFAN (0x3<<18) #define PRIM3D_POLY (0x4<<18) #define PRIM3D_LINELIST (0x5<<18) #define PRIM3D_LINESTRIP (0x6<<18) #define PRIM3D_RECTLIST (0x7<<18) #define PRIM3D_POINTLIST (0x8<<18) #define PRIM3D_DIB (0x9<<18) #define PRIM3D_CLEAR_RECT (0xa<<18) #define PRIM3D_ZONE_INIT (0xd<<18) #define PRIM3D_MASK (0x1f<<18) #define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24)) #define AA_LINE_ECAAR_WIDTH_ENABLE (1<<16) #define AA_LINE_ECAAR_WIDTH_0_5 0 #define AA_LINE_ECAAR_WIDTH_1_0 (1<<14) #define AA_LINE_ECAAR_WIDTH_2_0 (2<<14) #define AA_LINE_ECAAR_WIDTH_4_0 (3<<14) #define AA_LINE_REGION_WIDTH_ENABLE (1<<8) #define AA_LINE_REGION_WIDTH_0_5 0 #define AA_LINE_REGION_WIDTH_1_0 (1<<6) #define AA_LINE_REGION_WIDTH_2_0 (2<<6) #define AA_LINE_REGION_WIDTH_4_0 (3<<6) #define AA_LINE_ENABLE ((1<<1) | 1) #define AA_LINE_DISABLE (1<<1) #define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1) /* Dword 1 */ #define BUF_3D_ID_COLOR_BACK (0x3<<24) #define BUF_3D_ID_DEPTH (0x7<<24) #define BUF_3D_USE_FENCE (1<<23) #define BUF_3D_TILED_SURFACE (1<<22) #define BUF_3D_TILE_WALK_X 0 #define BUF_3D_TILE_WALK_Y (1<<21) #define BUF_3D_PITCH(x) (((x)/4)<<2) /* Dword 2 */ #define BUF_3D_ADDR(x) ((x) & ~0x3) #define _3DSTATE_COLOR_FACTOR_CMD (CMD_3D | (0x1d<<24) | (0x1<<16)) #define _3DSTATE_COLOR_FACTOR_N_CMD(stage) (CMD_3D | (0x1d<<24) | \ ((0x90+(stage))<<16)) #define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16)) #define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (0x1d<<24) | (0x99<<16)) #define _3DSTATE_DFLT_SPEC_CMD (CMD_3D | (0x1d<<24) | (0x9a<<16)) #define _3DSTATE_DFLT_Z_CMD (CMD_3D | (0x1d<<24) | (0x98<<16)) #define _3DSTATE_DST_BUF_VARS_CMD (CMD_3D | (0x1d<<24) | (0x85<<16)) /* Dword 1 */ #define DSTORG_HORT_BIAS(x) ((x)<<20) #define DSTORG_VERT_BIAS(x) ((x)<<16) #define COLOR_4_2_2_CHNL_WRT_ALL 0 #define COLOR_4_2_2_CHNL_WRT_Y (1<<12) #define COLOR_4_2_2_CHNL_WRT_CR (2<<12) #define COLOR_4_2_2_CHNL_WRT_CB (3<<12) #define COLOR_4_2_2_CHNL_WRT_CRCB (4<<12) #define COLR_BUF_8BIT 0 #define COLR_BUF_RGB555 (1<<8) #define COLR_BUF_RGB565 (2<<8) #define COLR_BUF_ARGB8888 (3<<8) #define COLR_BUF_ARGB4444 (8<<8) #define COLR_BUF_ARGB1555 (9<<8) #define DEPTH_IS_Z 0 #define DEPTH_IS_W (1<<6) #define DEPTH_FRMT_16_FIXED 0 #define DEPTH_FRMT_16_FLOAT (1<<2) #define DEPTH_FRMT_24_FIXED_8_OTHER (2<<2) #define DEPTH_FRMT_24_FLOAT_8_OTHER (3<<2) #define VERT_LINE_STRIDE_1 (1<<1) #define VERT_LINE_STRIDE_0 0 #define VERT_LINE_STRIDE_OFS_1 1 #define VERT_LINE_STRIDE_OFS_0 0 #define _3DSTATE_DRAW_RECT_CMD (CMD_3D|(0x1d<<24)|(0x80<<16)|3) /* Dword 1 */ #define DRAW_RECT_DIS_DEPTH_OFS (1<<30) #define DRAW_DITHER_OFS_X(x) ((x)<<26) #define DRAW_DITHER_OFS_Y(x) ((x)<<24) /* Dword 2 */ #define DRAW_YMIN(x) ((x)<<16) #define DRAW_XMIN(x) (x) /* Dword 3 */ #define DRAW_YMAX(x) ((x)<<16) #define DRAW_XMAX(x) (x) /* Dword 4 */ #define DRAW_YORG(x) ((x)<<16) #define DRAW_XORG(x) (x) #define _3DSTATE_ENABLES_1_CMD (CMD_3D|(0x3<<24)) #define ENABLE_LOGIC_OP_MASK ((1<<23)|(1<<22)) #define ENABLE_LOGIC_OP ((1<<23)|(1<<22)) #define DISABLE_LOGIC_OP (1<<23) #define ENABLE_STENCIL_TEST ((1<<21)|(1<<20)) #define DISABLE_STENCIL_TEST (1<<21) #define ENABLE_DEPTH_BIAS ((1<<11)|(1<<10)) #define DISABLE_DEPTH_BIAS (1<<11) #define ENABLE_SPEC_ADD_MASK ((1<<9)|(1<<8)) #define ENABLE_SPEC_ADD ((1<<9)|(1<<8)) #define DISABLE_SPEC_ADD (1<<9) #define ENABLE_DIS_FOG_MASK ((1<<7)|(1<<6)) #define ENABLE_FOG ((1<<7)|(1<<6)) #define DISABLE_FOG (1<<7) #define ENABLE_DIS_ALPHA_TEST_MASK ((1<<5)|(1<<4)) #define ENABLE_ALPHA_TEST ((1<<5)|(1<<4)) #define DISABLE_ALPHA_TEST (1<<5) #define ENABLE_DIS_CBLEND_MASK ((1<<3)|(1<<2)) #define ENABLE_COLOR_BLEND ((1<<3)|(1<<2)) #define DISABLE_COLOR_BLEND (1<<3) #define ENABLE_DIS_DEPTH_TEST_MASK ((1<<1)|1) #define ENABLE_DEPTH_TEST ((1<<1)|1) #define DISABLE_DEPTH_TEST (1<<1) /* _3DSTATE_ENABLES_2, p138 */ #define _3DSTATE_ENABLES_2_CMD (CMD_3D|(0x4<<24)) #define ENABLE_STENCIL_WRITE ((1<<21)|(1<<20)) #define DISABLE_STENCIL_WRITE (1<<21) #define ENABLE_TEX_CACHE ((1<<17)|(1<<16)) #define DISABLE_TEX_CACHE (1<<17) #define ENABLE_DITHER ((1<<9)|(1<<8)) #define DISABLE_DITHER (1<<9) #define ENABLE_COLOR_MASK (1<<10) #define WRITEMASK_ALPHA (1<<7) #define WRITEMASK_ALPHA_SHIFT 7 #define WRITEMASK_RED (1<<6) #define WRITEMASK_RED_SHIFT 6 #define WRITEMASK_GREEN (1<<5) #define WRITEMASK_GREEN_SHIFT 5 #define WRITEMASK_BLUE (1<<4) #define WRITEMASK_BLUE_SHIFT 4 #define WRITEMASK_MASK ((1<<4)|(1<<5)|(1<<6)|(1<<7)) #define ENABLE_COLOR_WRITE ((1<<3)|(1<<2)) #define DISABLE_COLOR_WRITE (1<<3) #define ENABLE_DIS_DEPTH_WRITE_MASK 0x3 #define ENABLE_DEPTH_WRITE ((1<<1)|1) #define DISABLE_DEPTH_WRITE (1<<1) /* _3DSTATE_FOG_COLOR, p139 */ #define _3DSTATE_FOG_COLOR_CMD (CMD_3D|(0x15<<24)) #define FOG_COLOR_RED(x) ((x)<<16) #define FOG_COLOR_GREEN(x) ((x)<<8) #define FOG_COLOR_BLUE(x) (x) /* _3DSTATE_FOG_MODE, p140 */ #define _3DSTATE_FOG_MODE_CMD (CMD_3D|(0x1d<<24)|(0x89<<16)|2) /* Dword 1 */ #define FOGFUNC_ENABLE (1<<31) #define FOGFUNC_VERTEX 0 #define FOGFUNC_PIXEL_EXP (1<<28) #define FOGFUNC_PIXEL_EXP2 (2<<28) #define FOGFUNC_PIXEL_LINEAR (3<<28) #define FOGSRC_INDEX_Z (1<<27) #define FOGSRC_INDEX_W ((1<<27)|(1<<25)) #define FOG_LINEAR_CONST (1<<24) #define FOG_CONST_1(x) ((x)<<4) #define ENABLE_FOG_DENSITY (1<<23) /* Dword 2 */ #define FOG_CONST_2(x) (x) /* Dword 3 */ #define FOG_DENSITY(x) (x) /* _3DSTATE_INDEPENDENT_ALPHA_BLEND, p142 */ #define _3DSTATE_INDPT_ALPHA_BLEND_CMD (CMD_3D|(0x0b<<24)) #define ENABLE_INDPT_ALPHA_BLEND ((1<<23)|(1<<22)) #define DISABLE_INDPT_ALPHA_BLEND (1<<23) #define ALPHA_BLENDFUNC_MASK 0x3f0000 #define ENABLE_ALPHA_BLENDFUNC (1<<21) #define ABLENDFUNC_ADD 0 #define ABLENDFUNC_SUB (1<<16) #define ABLENDFUNC_RVSE_SUB (2<<16) #define ABLENDFUNC_MIN (3<<16) #define ABLENDFUNC_MAX (4<<16) #define SRC_DST_ABLEND_MASK 0xfff #define ENABLE_SRC_ABLEND_FACTOR (1<<11) #define SRC_ABLEND_FACT(x) ((x)<<6) #define ENABLE_DST_ABLEND_FACTOR (1<<5) #define DST_ABLEND_FACT(x) (x) #define BLENDFACTOR_ZERO 0x01 #define BLENDFACTOR_ONE 0x02 #define BLENDFACTOR_SRC_COLR 0x03 #define BLENDFACTOR_INV_SRC_COLR 0x04 #define BLENDFACTOR_SRC_ALPHA 0x05 #define BLENDFACTOR_INV_SRC_ALPHA 0x06 #define BLENDFACTOR_DST_ALPHA 0x07 #define BLENDFACTOR_INV_DST_ALPHA 0x08 #define BLENDFACTOR_DST_COLR 0x09 #define BLENDFACTOR_INV_DST_COLR 0x0a #define BLENDFACTOR_SRC_ALPHA_SATURATE 0x0b #define BLENDFACTOR_CONST_COLOR 0x0c #define BLENDFACTOR_INV_CONST_COLOR 0x0d #define BLENDFACTOR_CONST_ALPHA 0x0e #define BLENDFACTOR_INV_CONST_ALPHA 0x0f #define BLENDFACTOR_MASK 0x0f /* _3DSTATE_MAP_BLEND_ARG, p152 */ #define _3DSTATE_MAP_BLEND_ARG_CMD(stage) (CMD_3D|(0x0e<<24)|((stage)<<20)) #define TEXPIPE_COLOR 0 #define TEXPIPE_ALPHA (1<<18) #define TEXPIPE_KILL (2<<18) #define TEXBLEND_ARG0 0 #define TEXBLEND_ARG1 (1<<15) #define TEXBLEND_ARG2 (2<<15) #define TEXBLEND_ARG3 (3<<15) #define TEXBLENDARG_MODIFY_PARMS (1<<6) #define TEXBLENDARG_REPLICATE_ALPHA (1<<5) #define TEXBLENDARG_INV_ARG (1<<4) #define TEXBLENDARG_ONE 0 #define TEXBLENDARG_FACTOR 0x01 #define TEXBLENDARG_ACCUM 0x02 #define TEXBLENDARG_DIFFUSE 0x03 #define TEXBLENDARG_SPEC 0x04 #define TEXBLENDARG_CURRENT 0x05 #define TEXBLENDARG_TEXEL0 0x06 #define TEXBLENDARG_TEXEL1 0x07 #define TEXBLENDARG_TEXEL2 0x08 #define TEXBLENDARG_TEXEL3 0x09 #define TEXBLENDARG_FACTOR_N 0x0e /* _3DSTATE_MAP_BLEND_OP, p155 */ #define _3DSTATE_MAP_BLEND_OP_CMD(stage) (CMD_3D|(0x0d<<24)|((stage)<<20)) #if 0 # define TEXPIPE_COLOR 0 # define TEXPIPE_ALPHA (1<<18) # define TEXPIPE_KILL (2<<18) #endif #define ENABLE_TEXOUTPUT_WRT_SEL (1<<17) #define TEXOP_OUTPUT_CURRENT 0 #define TEXOP_OUTPUT_ACCUM (1<<15) #define ENABLE_TEX_CNTRL_STAGE ((1<<12)|(1<<11)) #define DISABLE_TEX_CNTRL_STAGE (1<<12) #define TEXOP_SCALE_SHIFT 9 #define TEXOP_SCALE_1X (0 << TEXOP_SCALE_SHIFT) #define TEXOP_SCALE_2X (1 << TEXOP_SCALE_SHIFT) #define TEXOP_SCALE_4X (2 << TEXOP_SCALE_SHIFT) #define TEXOP_MODIFY_PARMS (1<<8) #define TEXOP_LAST_STAGE (1<<7) #define TEXBLENDOP_KILLPIXEL 0x02 #define TEXBLENDOP_ARG1 0x01 #define TEXBLENDOP_ARG2 0x02 #define TEXBLENDOP_MODULATE 0x03 #define TEXBLENDOP_ADD 0x06 #define TEXBLENDOP_ADDSIGNED 0x07 #define TEXBLENDOP_BLEND 0x08 #define TEXBLENDOP_BLEND_AND_ADD 0x09 #define TEXBLENDOP_SUBTRACT 0x0a #define TEXBLENDOP_DOT3 0x0b #define TEXBLENDOP_DOT4 0x0c #define TEXBLENDOP_MODULATE_AND_ADD 0x0d #define TEXBLENDOP_MODULATE_2X_AND_ADD 0x0e #define TEXBLENDOP_MODULATE_4X_AND_ADD 0x0f /* _3DSTATE_MAP_BUMP_TABLE, p160 TODO */ /* _3DSTATE_MAP_COLOR_CHROMA_KEY, p161 TODO */ #define _3DSTATE_MAP_COORD_TRANSFORM ((3<<29)|(0x1d<<24)|(0x8c<<16)) #define DISABLE_TEX_TRANSFORM (1<<28) #define TEXTURE_SET(x) (x<<29) #define _3DSTATE_VERTEX_TRANSFORM ((3<<29)|(0x1d<<24)|(0x8b<<16)) #define DISABLE_VIEWPORT_TRANSFORM (1<<31) #define DISABLE_PERSPECTIVE_DIVIDE (1<<29) /* _3DSTATE_MAP_COORD_SET_BINDINGS, p162 */ #define _3DSTATE_MAP_COORD_SETBIND_CMD (CMD_3D|(0x1d<<24)|(0x02<<16)) #define TEXBIND_MASK3 ((1<<15)|(1<<14)|(1<<13)|(1<<12)) #define TEXBIND_MASK2 ((1<<11)|(1<<10)|(1<<9)|(1<<8)) #define TEXBIND_MASK1 ((1<<7)|(1<<6)|(1<<5)|(1<<4)) #define TEXBIND_MASK0 ((1<<3)|(1<<2)|(1<<1)|1) #define TEXBIND_SET3(x) ((x)<<12) #define TEXBIND_SET2(x) ((x)<<8) #define TEXBIND_SET1(x) ((x)<<4) #define TEXBIND_SET0(x) (x) #define TEXCOORDSRC_KEEP 0 #define TEXCOORDSRC_DEFAULT 0x01 #define TEXCOORDSRC_VTXSET_0 0x08 #define TEXCOORDSRC_VTXSET_1 0x09 #define TEXCOORDSRC_VTXSET_2 0x0a #define TEXCOORDSRC_VTXSET_3 0x0b #define TEXCOORDSRC_VTXSET_4 0x0c #define TEXCOORDSRC_VTXSET_5 0x0d #define TEXCOORDSRC_VTXSET_6 0x0e #define TEXCOORDSRC_VTXSET_7 0x0f #define MAP_UNIT(unit) ((unit)<<16) #define MAP_UNIT_MASK (0x7<<16) /* _3DSTATE_MAP_COORD_SETS, p164 */ #define _3DSTATE_MAP_COORD_SET_CMD (CMD_3D|(0x1c<<24)|(0x01<<19)) #define TEXCOORD_SET(n) ((n)<<16) #define ENABLE_TEXCOORD_PARAMS (1<<15) #define TEXCOORDS_ARE_NORMAL (1<<14) #define TEXCOORDS_ARE_IN_TEXELUNITS 0 #define TEXCOORDTYPE_CARTESIAN 0 #define TEXCOORDTYPE_HOMOGENEOUS (1<<11) #define TEXCOORDTYPE_VECTOR (2<<11) #define TEXCOORDTYPE_MASK (0x7<<11) #define ENABLE_ADDR_V_CNTL (1<<7) #define ENABLE_ADDR_U_CNTL (1<<3) #define TEXCOORD_ADDR_V_MODE(x) ((x)<<4) #define TEXCOORD_ADDR_U_MODE(x) (x) #define TEXCOORDMODE_WRAP 0 #define TEXCOORDMODE_MIRROR 1 #define TEXCOORDMODE_CLAMP 2 #define TEXCOORDMODE_WRAP_SHORTEST 3 #define TEXCOORDMODE_CLAMP_BORDER 4 #define TEXCOORD_ADDR_V_MASK 0x70 #define TEXCOORD_ADDR_U_MASK 0x7 /* _3DSTATE_MAP_CUBE, p168 TODO */ #define _3DSTATE_MAP_CUBE (CMD_3D|(0x1c<<24)|(0x0a<<19)) #define CUBE_NEGX_ENABLE (1<<5) #define CUBE_POSX_ENABLE (1<<4) #define CUBE_NEGY_ENABLE (1<<3) #define CUBE_POSY_ENABLE (1<<2) #define CUBE_NEGZ_ENABLE (1<<1) #define CUBE_POSZ_ENABLE (1<<0) #define _3DSTATE_MAP_INFO_CMD (CMD_3D|(0x1d<<24)|(0x0<<16)|3) #define TEXMAP_INDEX(x) ((x)<<28) #define MAP_SURFACE_8BIT (1<<24) #define MAP_SURFACE_16BIT (2<<24) #define MAP_SURFACE_32BIT (3<<24) #define MAP_FORMAT_2D (0) #define MAP_FORMAT_3D_CUBE (1<<11) /* _3DSTATE_MODES_1, p190 */ #define _3DSTATE_MODES_1_CMD (CMD_3D|(0x08<<24)) #define BLENDFUNC_MASK 0x3f0000 #define ENABLE_COLR_BLND_FUNC (1<<21) #define BLENDFUNC_ADD 0 #define BLENDFUNC_SUB (1<<16) #define BLENDFUNC_RVRSE_SUB (2<<16) #define BLENDFUNC_MIN (3<<16) #define BLENDFUNC_MAX (4<<16) #define SRC_DST_BLND_MASK 0xfff #define ENABLE_SRC_BLND_FACTOR (1<<11) #define ENABLE_DST_BLND_FACTOR (1<<5) #define SRC_BLND_FACT(x) ((x)<<6) #define DST_BLND_FACT(x) (x) /* _3DSTATE_MODES_2, p192 */ #define _3DSTATE_MODES_2_CMD (CMD_3D|(0x0f<<24)) #define ENABLE_GLOBAL_DEPTH_BIAS (1<<22) #define GLOBAL_DEPTH_BIAS(x) ((x)<<14) #define ENABLE_ALPHA_TEST_FUNC (1<<13) #define ENABLE_ALPHA_REF_VALUE (1<<8) #define ALPHA_TEST_FUNC(x) ((x)<<9) #define ALPHA_REF_VALUE(x) (x) #define ALPHA_TEST_REF_MASK 0x3fff /* _3DSTATE_MODES_3, p193 */ #define _3DSTATE_MODES_3_CMD (CMD_3D|(0x02<<24)) #define DEPTH_TEST_FUNC_MASK 0x1f0000 #define ENABLE_DEPTH_TEST_FUNC (1<<20) /* Uses COMPAREFUNC */ #define DEPTH_TEST_FUNC(x) ((x)<<16) #define ENABLE_ALPHA_SHADE_MODE (1<<11) #define ENABLE_FOG_SHADE_MODE (1<<9) #define ENABLE_SPEC_SHADE_MODE (1<<7) #define ENABLE_COLOR_SHADE_MODE (1<<5) #define ALPHA_SHADE_MODE(x) ((x)<<10) #define FOG_SHADE_MODE(x) ((x)<<8) #define SPEC_SHADE_MODE(x) ((x)<<6) #define COLOR_SHADE_MODE(x) ((x)<<4) #define CULLMODE_MASK 0xf #define ENABLE_CULL_MODE (1<<3) #define CULLMODE_BOTH 0 #define CULLMODE_NONE 1 #define CULLMODE_CW 2 #define CULLMODE_CCW 3 #define SHADE_MODE_LINEAR 0 #define SHADE_MODE_FLAT 0x1 /* _3DSTATE_MODES_4, p195 */ #define _3DSTATE_MODES_4_CMD (CMD_3D|(0x16<<24)) #define ENABLE_LOGIC_OP_FUNC (1<<23) #define LOGIC_OP_FUNC(x) ((x)<<18) #define LOGICOP_MASK ((1<<18)|(1<<19)|(1<<20)|(1<<21)) #define LOGICOP_CLEAR 0 #define LOGICOP_NOR 0x1 #define LOGICOP_AND_INV 0x2 #define LOGICOP_COPY_INV 0x3 #define LOGICOP_AND_RVRSE 0x4 #define LOGICOP_INV 0x5 #define LOGICOP_XOR 0x6 #define LOGICOP_NAND 0x7 #define LOGICOP_AND 0x8 #define LOGICOP_EQUIV 0x9 #define LOGICOP_NOOP 0xa #define LOGICOP_OR_INV 0xb #define LOGICOP_COPY 0xc #define LOGICOP_OR_RVRSE 0xd #define LOGICOP_OR 0xe #define LOGICOP_SET 0xf #define MODE4_ENABLE_STENCIL_TEST_MASK ((1<<17)|(0xff00)) #define ENABLE_STENCIL_TEST_MASK (1<<17) #define STENCIL_TEST_MASK(x) ((x)<<8) #define MODE4_ENABLE_STENCIL_WRITE_MASK ((1<<16)|(0x00ff)) #define ENABLE_STENCIL_WRITE_MASK (1<<16) #define STENCIL_WRITE_MASK(x) ((x)&0xff) /* _3DSTATE_MODES_5, p196 */ #define _3DSTATE_MODES_5_CMD (CMD_3D|(0x0c<<24)) #define ENABLE_SPRITE_POINT_TEX (1<<23) #define SPRITE_POINT_TEX_ON (1<<22) #define SPRITE_POINT_TEX_OFF 0 #define FLUSH_RENDER_CACHE (1<<18) #define FLUSH_TEXTURE_CACHE (1<<16) #define FIXED_LINE_WIDTH_MASK 0xfc00 #define ENABLE_FIXED_LINE_WIDTH (1<<15) #define FIXED_LINE_WIDTH(x) ((x)<<10) #define FIXED_POINT_WIDTH_MASK 0x3ff #define ENABLE_FIXED_POINT_WIDTH (1<<9) #define FIXED_POINT_WIDTH(x) (x) /* _3DSTATE_RASTERIZATION_RULES, p198 */ #define _3DSTATE_RASTER_RULES_CMD (CMD_3D|(0x07<<24)) #define ENABLE_POINT_RASTER_RULE (1<<15) #define OGL_POINT_RASTER_RULE (1<<13) #define ENABLE_LINE_STRIP_PROVOKE_VRTX (1<<8) #define ENABLE_TRI_FAN_PROVOKE_VRTX (1<<5) #define ENABLE_TRI_STRIP_PROVOKE_VRTX (1<<2) #define LINE_STRIP_PROVOKE_VRTX(x) ((x)<<6) #define TRI_FAN_PROVOKE_VRTX(x) ((x)<<3) #define TRI_STRIP_PROVOKE_VRTX(x) (x) /* _3DSTATE_SCISSOR_ENABLE, p200 */ #define _3DSTATE_SCISSOR_ENABLE_CMD (CMD_3D|(0x1c<<24)|(0x10<<19)) #define ENABLE_SCISSOR_RECT ((1<<1) | 1) #define DISABLE_SCISSOR_RECT (1<<1) /* _3DSTATE_SCISSOR_RECTANGLE_0, p201 */ #define _3DSTATE_SCISSOR_RECT_0_CMD (CMD_3D|(0x1d<<24)|(0x81<<16)|1) /* Dword 1 */ #define SCISSOR_RECT_0_YMIN(x) ((x)<<16) #define SCISSOR_RECT_0_XMIN(x) (x) /* Dword 2 */ #define SCISSOR_RECT_0_YMAX(x) ((x)<<16) #define SCISSOR_RECT_0_XMAX(x) (x) /* _3DSTATE_STENCIL_TEST, p202 */ #define _3DSTATE_STENCIL_TEST_CMD (CMD_3D|(0x09<<24)) #define ENABLE_STENCIL_PARMS (1<<23) #define STENCIL_OPS_MASK (0xffc000) #define STENCIL_FAIL_OP(x) ((x)<<20) #define STENCIL_PASS_DEPTH_FAIL_OP(x) ((x)<<17) #define STENCIL_PASS_DEPTH_PASS_OP(x) ((x)<<14) #define ENABLE_STENCIL_TEST_FUNC_MASK ((1<<13)|(1<<12)|(1<<11)|(1<<10)|(1<<9)) #define ENABLE_STENCIL_TEST_FUNC (1<<13) /* Uses COMPAREFUNC */ #define STENCIL_TEST_FUNC(x) ((x)<<9) #define STENCIL_REF_VALUE_MASK ((1<<8)|0xff) #define ENABLE_STENCIL_REF_VALUE (1<<8) #define STENCIL_REF_VALUE(x) (x) /* _3DSTATE_VERTEX_FORMAT, p204 */ #define _3DSTATE_VFT0_CMD (CMD_3D|(0x05<<24)) #define VFT0_POINT_WIDTH (1<<12) #define VFT0_TEX_COUNT_MASK (7<<8) #define VFT0_TEX_COUNT_SHIFT 8 #define VFT0_TEX_COUNT(x) ((x)<<8) #define VFT0_SPEC (1<<7) #define VFT0_DIFFUSE (1<<6) #define VFT0_DEPTH_OFFSET (1<<5) #define VFT0_XYZ (1<<1) #define VFT0_XYZW (2<<1) #define VFT0_XY (3<<1) #define VFT0_XYW (4<<1) #define VFT0_XYZW_MASK (7<<1) /* _3DSTATE_VERTEX_FORMAT_2, p206 */ #define _3DSTATE_VERTEX_FORMAT_2_CMD (CMD_3D|(0x0a<<24)) #define VFT1_TEX7_FMT(x) ((x)<<14) #define VFT1_TEX6_FMT(x) ((x)<<12) #define VFT1_TEX5_FMT(x) ((x)<<10) #define VFT1_TEX4_FMT(x) ((x)<<8) #define VFT1_TEX3_FMT(x) ((x)<<6) #define VFT1_TEX2_FMT(x) ((x)<<4) #define VFT1_TEX1_FMT(x) ((x)<<2) #define VFT1_TEX0_FMT(x) (x) #define VFT1_TEX0_MASK 3 #define VFT1_TEX1_SHIFT 2 #define TEXCOORDFMT_2D 0 #define TEXCOORDFMT_3D 1 #define TEXCOORDFMT_4D 2 #define TEXCOORDFMT_1D 3 /*New stuff picked up along the way */ #define MLC_LOD_BIAS_MASK ((1<<7)-1) /* _3DSTATE_VERTEX_TRANSFORM, p207 */ #define _3DSTATE_VERTEX_TRANS_CMD (CMD_3D|(0x1d<<24)|(0x8b<<16)|0) #define _3DSTATE_VERTEX_TRANS_MTX_CMD (CMD_3D|(0x1d<<24)|(0x8b<<16)|6) /* Dword 1 */ #define ENABLE_VIEWPORT_TRANSFORM ((1<<31)|(1<<30)) #define DISABLE_VIEWPORT_TRANSFORM (1<<31) #define ENABLE_PERSP_DIVIDE ((1<<29)|(1<<28)) #define DISABLE_PERSP_DIVIDE (1<<29) #define VRTX_TRANS_LOAD_MATRICES 0x7421 #define VRTX_TRANS_NO_LOAD_MATRICES 0x0000 /* Dword 2 -> 7 are matrix elements */ /* _3DSTATE_W_STATE, p209 */ #define _3DSTATE_W_STATE_CMD (CMD_3D|(0x1d<<24)|(0x8d<<16)|1) /* Dword 1 */ #define MAGIC_W_STATE_DWORD1 0x00000008 /* Dword 2 */ #define WFAR_VALUE(x) (x) /* Stipple command, carried over from the i810, apparently: */ #define _3DSTATE_STIPPLE (CMD_3D|(0x1d<<24)|(0x83<<16)) #define ST1_ENABLE (1<<16) #define ST1_MASK (0xffff) #define _3DSTATE_LOAD_STATE_IMMEDIATE_1 (CMD_3D|(0x1d<<24)|(0x04<<16)) #define I1_LOAD_S(n) (1<<((n)+4)) #define S3_POINT_WIDTH_SHIFT 23 #define S3_LINE_WIDTH_SHIFT 19 #define S3_ALPHA_SHADE_MODE_SHIFT 18 #define S3_FOG_SHADE_MODE_SHIFT 17 #define S3_SPEC_SHADE_MODE_SHIFT 16 #define S3_COLOR_SHADE_MODE_SHIFT 15 #define S3_CULL_MODE_SHIFT 13 #define S3_CULLMODE_BOTH (0) #define S3_CULLMODE_NONE (1<<13) #define S3_CULLMODE_CW (2<<13) #define S3_CULLMODE_CCW (3<<13) #define S3_POINT_WIDTH_PRESENT (1<<12) #define S3_SPEC_FOG_PRESENT (1<<11) #define S3_DIFFUSE_PRESENT (1<<10) #define S3_DEPTH_OFFSET_PRESENT (1<<9) #define S3_POSITION_SHIFT 6 #define S3_VERTEXHAS_XYZ (1<<6) #define S3_VERTEXHAS_XYZW (2<<6) #define S3_VERTEXHAS_XY (3<<6) #define S3_VERTEXHAS_XYW (4<<6) #define S3_ENABLE_SPEC_ADD (1<<5) #define S3_ENABLE_FOG (1<<4) #define S3_ENABLE_LOCAL_DEPTH_BIAS (1<<3) #define S3_ENABLE_SPRITE_POINT (1<<1) #define S3_ENABLE_ANTIALIASING 1 #define S8_ENABLE_ALPHA_TEST (1<<31) #define S8_ALPHA_TEST_FUNC_SHIFT 28 #define S8_ALPHA_REFVALUE_SHIFT 20 #define S8_ENABLE_DEPTH_TEST (1<<19) #define S8_DEPTH_TEST_FUNC_SHIFT 16 #define S8_ENABLE_COLOR_BLEND (1<<15) #define S8_COLOR_BLEND_FUNC_SHIFT 12 #define S8_BLENDFUNC_ADD (0) #define S8_BLENDFUNC_SUB (1<<12) #define S8_BLENDFUNC_RVRSE_SUB (2<<12) #define S8_BLENDFUNC_MIN (3<<12) #define S8_BLENDFUNC_MAX (4<<12) #define S8_SRC_BLEND_FACTOR_SHIFT 8 #define S8_DST_BLEND_FACTOR_SHIFT 4 #define S8_ENABLE_DEPTH_BUFFER_WRITE (1<<3) #define S8_ENABLE_COLOR_BUFFER_WRITE (1<<2) #define _3DSTATE_LOAD_STATE_IMMEDIATE_2 (CMD_3D|(0x1d<<24)|(0x03<<16)) #define LOAD_TEXTURE_MAP(x) (1<<((x)+11)) #define LOAD_TEXTURE_BLEND_STAGE(x) (1<<((x)+7)) #define LOAD_GLOBAL_COLOR_FACTOR (1<<6) #define TM0S0_ADDRESS_MASK 0xfffffffc #define TM0S0_USE_FENCE (1<<1) #define TM0S1_HEIGHT_SHIFT 21 #define TM0S1_WIDTH_SHIFT 10 #define TM0S1_PALETTE_SELECT (1<<9) #define TM0S1_MAPSURF_FORMAT_MASK (0x7 << 6) #define TM0S1_MAPSURF_FORMAT_SHIFT 6 #define MAPSURF_8BIT_INDEXED (0<<6) #define MAPSURF_8BIT (1<<6) #define MAPSURF_16BIT (2<<6) #define MAPSURF_32BIT (3<<6) #define MAPSURF_411 (4<<6) #define MAPSURF_422 (5<<6) #define MAPSURF_COMPRESSED (6<<6) #define MAPSURF_4BIT_INDEXED (7<<6) #define TM0S1_MT_FORMAT_MASK (0x7 << 3) #define TM0S1_MT_FORMAT_SHIFT 3 #define MT_4BIT_IDX_ARGB8888 (7<<3) /* SURFACE_4BIT_INDEXED */ #define MT_8BIT_IDX_RGB565 (0<<3) /* SURFACE_8BIT_INDEXED */ #define MT_8BIT_IDX_ARGB1555 (1<<3) #define MT_8BIT_IDX_ARGB4444 (2<<3) #define MT_8BIT_IDX_AY88 (3<<3) #define MT_8BIT_IDX_ABGR8888 (4<<3) #define MT_8BIT_IDX_BUMP_88DVDU (5<<3) #define MT_8BIT_IDX_BUMP_655LDVDU (6<<3) #define MT_8BIT_IDX_ARGB8888 (7<<3) #define MT_8BIT_I8 (0<<3) /* SURFACE_8BIT */ #define MT_8BIT_L8 (1<<3) #define MT_8BIT_A8 (4<<3) #define MT_16BIT_RGB565 (0<<3) /* SURFACE_16BIT */ #define MT_16BIT_ARGB1555 (1<<3) #define MT_16BIT_ARGB4444 (2<<3) #define MT_16BIT_AY88 (3<<3) #define MT_16BIT_DIB_ARGB1555_8888 (4<<3) #define MT_16BIT_BUMP_88DVDU (5<<3) #define MT_16BIT_BUMP_655LDVDU (6<<3) #define MT_16BIT_DIB_RGB565_8888 (7<<3) #define MT_32BIT_ARGB8888 (0<<3) /* SURFACE_32BIT */ #define MT_32BIT_ABGR8888 (1<<3) #define MT_32BIT_XRGB8888 (2<<3) #define MT_32BIT_XBGR8888 (3<<3) #define MT_32BIT_BUMP_XLDVDU_8888 (6<<3) #define MT_32BIT_DIB_8888 (7<<3) #define MT_411_YUV411 (0<<3) /* SURFACE_411 */ #define MT_422_YCRCB_SWAPY (0<<3) /* SURFACE_422 */ #define MT_422_YCRCB_NORMAL (1<<3) #define MT_422_YCRCB_SWAPUV (2<<3) #define MT_422_YCRCB_SWAPUVY (3<<3) #define MT_COMPRESS_DXT1 (0<<3) /* SURFACE_COMPRESSED */ #define MT_COMPRESS_DXT2_3 (1<<3) #define MT_COMPRESS_DXT4_5 (2<<3) #define MT_COMPRESS_FXT1 (3<<3) #define TM0S1_COLORSPACE_CONVERSION (1 << 2) #define TM0S1_TILED_SURFACE (1 << 1) #define TM0S1_TILE_WALK (1 << 0) #define TM0S2_PITCH_SHIFT 21 #define TM0S2_CUBE_FACE_ENA_SHIFT 15 #define TM0S2_CUBE_FACE_ENA_MASK (1<<15) #define TM0S2_MAP_FORMAT (1<<14) #define TM0S2_MAP_2D (0<<14) #define TM0S2_MAP_3D_CUBE (1<<14) #define TM0S2_VERTICAL_LINE_STRIDE (1<<13) #define TM0S2_VERITCAL_LINE_STRIDE_OFF (1<<12) #define TM0S2_OUTPUT_CHAN_SHIFT 10 #define TM0S2_OUTPUT_CHAN_MASK (3<<10) #define TM0S3_MIP_FILTER_MASK (0x3<<30) #define TM0S3_MIP_FILTER_SHIFT 30 #define MIPFILTER_NONE 0 #define MIPFILTER_NEAREST 1 #define MIPFILTER_LINEAR 3 #define TM0S3_MAG_FILTER_MASK (0x3<<28) #define TM0S3_MAG_FILTER_SHIFT 28 #define TM0S3_MIN_FILTER_MASK (0x3<<26) #define TM0S3_MIN_FILTER_SHIFT 26 #define FILTER_NEAREST 0 #define FILTER_LINEAR 1 #define FILTER_ANISOTROPIC 2 #define TM0S3_LOD_BIAS_SHIFT 17 #define TM0S3_LOD_BIAS_MASK (0x1ff<<17) #define TM0S3_MAX_MIP_SHIFT 9 #define TM0S3_MAX_MIP_MASK (0xff<<9) #define TM0S3_MIN_MIP_SHIFT 3 #define TM0S3_MIN_MIP_MASK (0x3f<<3) #define TM0S3_KILL_PIXEL (1<<2) #define TM0S3_KEYED_FILTER (1<<1) #define TM0S3_CHROMA_KEY (1<<0) /* _3DSTATE_MAP_TEXEL_STREAM, p188 */ #define _3DSTATE_MAP_TEX_STREAM_CMD (CMD_3D|(0x1c<<24)|(0x05<<19)) #define DISABLE_TEX_STREAM_BUMP (1<<12) #define ENABLE_TEX_STREAM_BUMP ((1<<12)|(1<<11)) #define TEX_MODIFY_UNIT_0 0 #define TEX_MODIFY_UNIT_1 (1<<8) #define ENABLE_TEX_STREAM_COORD_SET (1<<7) #define TEX_STREAM_COORD_SET(x) ((x)<<4) #define ENABLE_TEX_STREAM_MAP_IDX (1<<3) #define TEX_STREAM_MAP_IDX(x) (x) #define FLUSH_MAP_CACHE (1<<0) #define _3DSTATE_MAP_FILTER_CMD (CMD_3D|(0x1c<<24)|(0x02<<19)) #define FILTER_TEXMAP_INDEX(x) ((x) << 16) #define MAG_MODE_FILTER_ENABLE (1 << 5) #define MIN_MODE_FILTER_ENABLE (1 << 2) #define MAG_MAPFILTER_NEAREST (0 << 3) #define MAG_MAPFILTER_LINEAR (1 << 3) #define MAG_MAPFILTER_ANISOTROPIC (2 << 3) #define MIN_MAPFILTER_NEAREST (0) #define MIN_MAPFILTER_LINEAR (1) #define MIN_MAPFILTER_ANISOTROPIC (2) #define ENABLE_KEYS (1<<15) #define DISABLE_COLOR_KEY 0 #define DISABLE_CHROMA_KEY 0 #define DISABLE_KILL_PIXEL 0 #define ENABLE_MIP_MODE_FILTER (1 << 9) #define MIPFILTER_NONE 0 #define MIPFILTER_NEAREST 1 #define MIPFILTER_LINEAR 3 #endif intel-gpu-tools-1.14/lib/media_spin.c0000644000175000017500000003355112665336131014461 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Jeff McGee */ #include #include #include "intel_reg.h" #include "drmtest.h" #include "intel_batchbuffer.h" #include "gen8_media.h" #include "media_spin.h" static const uint32_t spin_kernel[][4] = { { 0x00600001, 0x20800208, 0x008d0000, 0x00000000 }, /* mov (8)r4.0<1>:ud r0.0<8;8;1>:ud */ { 0x00200001, 0x20800208, 0x00450040, 0x00000000 }, /* mov (2)r4.0<1>.ud r2.0<2;2;1>:ud */ { 0x00000001, 0x20880608, 0x00000000, 0x00000003 }, /* mov (1)r4.8<1>:ud 0x3 */ { 0x00000001, 0x20a00608, 0x00000000, 0x00000000 }, /* mov (1)r5.0<1>:ud 0 */ { 0x00000040, 0x20a00208, 0x060000a0, 0x00000001 }, /* add (1)r5.0<1>:ud r5.0<0;1;0>:ud 1 */ { 0x01000010, 0x20000200, 0x02000020, 0x000000a0 }, /* cmp.e.f0.0 (1)null<1> r1<0;1;0> r5<0;1;0> */ { 0x00110027, 0x00000000, 0x00000000, 0xffffffe0 }, /* ~f0.0 while (1) -32 */ { 0x0c800031, 0x20000a00, 0x0e000080, 0x040a8000 }, /* send.dcdp1 (16)null<1> r4.0<0;1;0> 0x040a8000 */ { 0x00600001, 0x2e000208, 0x008d0000, 0x00000000 }, /* mov (8)r112<1>:ud r0.0<8;8;1>:ud */ { 0x07800031, 0x20000a40, 0x0e000e00, 0x82000010 }, /* send.ts (16)null<1> r112<0;1;0>:d 0x82000010 */ }; static uint32_t batch_used(struct intel_batchbuffer *batch) { return batch->ptr - batch->buffer; } static uint32_t batch_align(struct intel_batchbuffer *batch, uint32_t align) { uint32_t offset = batch_used(batch); offset = ALIGN(offset, align); batch->ptr = batch->buffer + offset; return offset; } static void * batch_alloc(struct intel_batchbuffer *batch, uint32_t size, uint32_t align) { uint32_t offset = batch_align(batch, align); batch->ptr += size; return memset(batch->buffer + offset, 0, size); } static uint32_t batch_offset(struct intel_batchbuffer *batch, void *ptr) { return (uint8_t *)ptr - batch->buffer; } static uint32_t batch_copy(struct intel_batchbuffer *batch, const void *ptr, uint32_t size, uint32_t align) { return batch_offset(batch, memcpy(batch_alloc(batch, size, align), ptr, size)); } static void gen8_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end) { int ret; ret = drm_intel_bo_subdata(batch->bo, 0, 4096, batch->buffer); if (ret == 0) ret = drm_intel_gem_bo_context_exec(batch->bo, NULL, batch_end, 0); igt_assert_eq(ret, 0); } static uint32_t gen8_spin_curbe_buffer_data(struct intel_batchbuffer *batch, uint32_t iters) { uint32_t *curbe_buffer; uint32_t offset; curbe_buffer = batch_alloc(batch, 64, 64); offset = batch_offset(batch, curbe_buffer); *curbe_buffer = iters; return offset; } static uint32_t gen8_spin_surface_state(struct intel_batchbuffer *batch, struct igt_buf *buf, uint32_t format, int is_dst) { struct gen8_surface_state *ss; uint32_t write_domain, read_domain, offset; int ret; if (is_dst) { write_domain = read_domain = I915_GEM_DOMAIN_RENDER; } else { write_domain = 0; read_domain = I915_GEM_DOMAIN_SAMPLER; } ss = batch_alloc(batch, sizeof(*ss), 64); offset = batch_offset(batch, ss); ss->ss0.surface_type = GEN8_SURFACE_2D; ss->ss0.surface_format = format; ss->ss0.render_cache_read_write = 1; ss->ss0.vertical_alignment = 1; /* align 4 */ ss->ss0.horizontal_alignment = 1; /* align 4 */ if (buf->tiling == I915_TILING_X) ss->ss0.tiled_mode = 2; else if (buf->tiling == I915_TILING_Y) ss->ss0.tiled_mode = 3; ss->ss8.base_addr = buf->bo->offset; ret = drm_intel_bo_emit_reloc(batch->bo, batch_offset(batch, ss) + 8 * 4, buf->bo, 0, read_domain, write_domain); igt_assert_eq(ret, 0); ss->ss2.height = igt_buf_height(buf) - 1; ss->ss2.width = igt_buf_width(buf) - 1; ss->ss3.pitch = buf->stride - 1; ss->ss7.shader_chanel_select_r = 4; ss->ss7.shader_chanel_select_g = 5; ss->ss7.shader_chanel_select_b = 6; ss->ss7.shader_chanel_select_a = 7; return offset; } static uint32_t gen8_spin_binding_table(struct intel_batchbuffer *batch, struct igt_buf *dst) { uint32_t *binding_table, offset; binding_table = batch_alloc(batch, 32, 64); offset = batch_offset(batch, binding_table); binding_table[0] = gen8_spin_surface_state(batch, dst, GEN8_SURFACEFORMAT_R8_UNORM, 1); return offset; } static uint32_t gen8_spin_media_kernel(struct intel_batchbuffer *batch, const uint32_t kernel[][4], size_t size) { uint32_t offset; offset = batch_copy(batch, kernel, size, 64); return offset; } static uint32_t gen8_spin_interface_descriptor(struct intel_batchbuffer *batch, struct igt_buf *dst) { struct gen8_interface_descriptor_data *idd; uint32_t offset; uint32_t binding_table_offset, kernel_offset; binding_table_offset = gen8_spin_binding_table(batch, dst); kernel_offset = gen8_spin_media_kernel(batch, spin_kernel, sizeof(spin_kernel)); idd = batch_alloc(batch, sizeof(*idd), 64); offset = batch_offset(batch, idd); idd->desc0.kernel_start_pointer = (kernel_offset >> 6); idd->desc2.single_program_flow = 1; idd->desc2.floating_point_mode = GEN8_FLOATING_POINT_IEEE_754; idd->desc3.sampler_count = 0; /* 0 samplers used */ idd->desc3.sampler_state_pointer = 0; idd->desc4.binding_table_entry_count = 0; idd->desc4.binding_table_pointer = (binding_table_offset >> 5); idd->desc5.constant_urb_entry_read_offset = 0; idd->desc5.constant_urb_entry_read_length = 1; /* grf 1 */ return offset; } static void gen8_emit_state_base_address(struct intel_batchbuffer *batch) { OUT_BATCH(GEN8_STATE_BASE_ADDRESS | (16 - 2)); /* general */ OUT_BATCH(0 | BASE_ADDRESS_MODIFY); OUT_BATCH(0); /* stateless data port */ OUT_BATCH(0 | BASE_ADDRESS_MODIFY); /* surface */ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY); /* dynamic */ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* indirect */ OUT_BATCH(0); OUT_BATCH(0); /* instruction */ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* general state buffer size */ OUT_BATCH(0xfffff000 | 1); /* dynamic state buffer size */ OUT_BATCH(1 << 12 | 1); /* indirect object buffer size */ OUT_BATCH(0xfffff000 | 1); /* intruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */ OUT_BATCH(1 << 12 | 1); } static void gen9_emit_state_base_address(struct intel_batchbuffer *batch) { OUT_BATCH(GEN8_STATE_BASE_ADDRESS | (19 - 2)); /* general */ OUT_BATCH(0 | BASE_ADDRESS_MODIFY); OUT_BATCH(0); /* stateless data port */ OUT_BATCH(0 | BASE_ADDRESS_MODIFY); /* surface */ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY); /* dynamic */ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* indirect */ OUT_BATCH(0); OUT_BATCH(0); /* instruction */ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* general state buffer size */ OUT_BATCH(0xfffff000 | 1); /* dynamic state buffer size */ OUT_BATCH(1 << 12 | 1); /* indirect object buffer size */ OUT_BATCH(0xfffff000 | 1); /* intruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */ OUT_BATCH(1 << 12 | 1); /* Bindless surface state base address */ OUT_BATCH(0 | BASE_ADDRESS_MODIFY); OUT_BATCH(0); OUT_BATCH(0xfffff000); } static void gen8_emit_vfe_state(struct intel_batchbuffer *batch) { OUT_BATCH(GEN8_MEDIA_VFE_STATE | (9 - 2)); /* scratch buffer */ OUT_BATCH(0); OUT_BATCH(0); /* number of threads & urb entries */ OUT_BATCH(2 << 8); OUT_BATCH(0); /* urb entry size & curbe size */ OUT_BATCH(2 << 16 | 2); /* scoreboard */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } static void gen8_emit_curbe_load(struct intel_batchbuffer *batch, uint32_t curbe_buffer) { OUT_BATCH(GEN8_MEDIA_CURBE_LOAD | (4 - 2)); OUT_BATCH(0); /* curbe total data length */ OUT_BATCH(64); /* curbe data start address, is relative to the dynamics base address */ OUT_BATCH(curbe_buffer); } static void gen8_emit_interface_descriptor_load(struct intel_batchbuffer *batch, uint32_t interface_descriptor) { OUT_BATCH(GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD | (4 - 2)); OUT_BATCH(0); /* interface descriptor data length */ OUT_BATCH(sizeof(struct gen8_interface_descriptor_data)); /* interface descriptor address, is relative to the dynamics base address */ OUT_BATCH(interface_descriptor); } static void gen8_emit_media_state_flush(struct intel_batchbuffer *batch) { OUT_BATCH(GEN8_MEDIA_STATE_FLUSH | (2 - 2)); OUT_BATCH(0); } static void gen8_emit_media_objects(struct intel_batchbuffer *batch) { OUT_BATCH(GEN8_MEDIA_OBJECT | (8 - 2)); /* interface descriptor offset */ OUT_BATCH(0); /* without indirect data */ OUT_BATCH(0); OUT_BATCH(0); /* scoreboard */ OUT_BATCH(0); OUT_BATCH(0); /* inline data (xoffset, yoffset) */ OUT_BATCH(0); OUT_BATCH(0); gen8_emit_media_state_flush(batch); } static void gen8lp_emit_media_objects(struct intel_batchbuffer *batch) { OUT_BATCH(GEN8_MEDIA_OBJECT | (8 - 2)); /* interface descriptor offset */ OUT_BATCH(0); /* without indirect data */ OUT_BATCH(0); OUT_BATCH(0); /* scoreboard */ OUT_BATCH(0); OUT_BATCH(0); /* inline data (xoffset, yoffset) */ OUT_BATCH(0); OUT_BATCH(0); } /* * This sets up the media pipeline, * * +---------------+ <---- 4096 * | ^ | * | | | * | various | * | state | * | | | * |_______|_______| <---- 2048 + ? * | ^ | * | | | * | batch | * | commands | * | | | * | | | * +---------------+ <---- 0 + ? * */ #define BATCH_STATE_SPLIT 2048 void gen8_media_spinfunc(struct intel_batchbuffer *batch, struct igt_buf *dst, uint32_t spins) { uint32_t curbe_buffer, interface_descriptor; uint32_t batch_end; intel_batchbuffer_flush_with_context(batch, NULL); /* setup states */ batch->ptr = &batch->buffer[BATCH_STATE_SPLIT]; curbe_buffer = gen8_spin_curbe_buffer_data(batch, spins); interface_descriptor = gen8_spin_interface_descriptor(batch, dst); igt_assert(batch->ptr < &batch->buffer[4095]); /* media pipeline */ batch->ptr = batch->buffer; OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA); gen8_emit_state_base_address(batch); gen8_emit_vfe_state(batch); gen8_emit_curbe_load(batch, curbe_buffer); gen8_emit_interface_descriptor_load(batch, interface_descriptor); gen8_emit_media_objects(batch); OUT_BATCH(MI_BATCH_BUFFER_END); batch_end = batch_align(batch, 8); igt_assert(batch_end < BATCH_STATE_SPLIT); gen8_render_flush(batch, batch_end); intel_batchbuffer_reset(batch); } void gen8lp_media_spinfunc(struct intel_batchbuffer *batch, struct igt_buf *dst, uint32_t spins) { uint32_t curbe_buffer, interface_descriptor; uint32_t batch_end; intel_batchbuffer_flush_with_context(batch, NULL); /* setup states */ batch->ptr = &batch->buffer[BATCH_STATE_SPLIT]; curbe_buffer = gen8_spin_curbe_buffer_data(batch, spins); interface_descriptor = gen8_spin_interface_descriptor(batch, dst); igt_assert(batch->ptr < &batch->buffer[4095]); /* media pipeline */ batch->ptr = batch->buffer; OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA); gen8_emit_state_base_address(batch); gen8_emit_vfe_state(batch); gen8_emit_curbe_load(batch, curbe_buffer); gen8_emit_interface_descriptor_load(batch, interface_descriptor); gen8lp_emit_media_objects(batch); OUT_BATCH(MI_BATCH_BUFFER_END); batch_end = batch_align(batch, 8); igt_assert(batch_end < BATCH_STATE_SPLIT); gen8_render_flush(batch, batch_end); intel_batchbuffer_reset(batch); } void gen9_media_spinfunc(struct intel_batchbuffer *batch, struct igt_buf *dst, uint32_t spins) { uint32_t curbe_buffer, interface_descriptor; uint32_t batch_end; intel_batchbuffer_flush_with_context(batch, NULL); /* setup states */ batch->ptr = &batch->buffer[BATCH_STATE_SPLIT]; curbe_buffer = gen8_spin_curbe_buffer_data(batch, spins); interface_descriptor = gen8_spin_interface_descriptor(batch, dst); igt_assert(batch->ptr < &batch->buffer[4095]); /* media pipeline */ batch->ptr = batch->buffer; OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA | GEN9_FORCE_MEDIA_AWAKE_ENABLE | GEN9_SAMPLER_DOP_GATE_DISABLE | GEN9_PIPELINE_SELECTION_MASK | GEN9_SAMPLER_DOP_GATE_MASK | GEN9_FORCE_MEDIA_AWAKE_MASK); gen9_emit_state_base_address(batch); gen8_emit_vfe_state(batch); gen8_emit_curbe_load(batch, curbe_buffer); gen8_emit_interface_descriptor_load(batch, interface_descriptor); gen8_emit_media_objects(batch); OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA | GEN9_FORCE_MEDIA_AWAKE_DISABLE | GEN9_SAMPLER_DOP_GATE_ENABLE | GEN9_PIPELINE_SELECTION_MASK | GEN9_SAMPLER_DOP_GATE_MASK | GEN9_FORCE_MEDIA_AWAKE_MASK); OUT_BATCH(MI_BATCH_BUFFER_END); batch_end = batch_align(batch, 8); igt_assert(batch_end < BATCH_STATE_SPLIT); gen8_render_flush(batch, batch_end); intel_batchbuffer_reset(batch); } intel-gpu-tools-1.14/README0000644000175000017500000001212012665336325012311 00000000000000Intel GPU Tools =============== Description ----------- Intel GPU Tools is a collection of tools for development and testing of the Intel DRM driver. There are many macro-level test suites that get used against the driver, including xtest, rendercheck, piglit, and oglconform, but failures from those can be difficult to track down to kernel changes, and many require complicated build procedures or specific testing environments to get useful results. Therefore, Intel GPU Tools includes low-level tools and tests specifically for development and testing of the Intel DRM Driver. Intel GPU Tools is split into several sections: benchmarks/ This is a collection of useful microbenchmarks that can be used to tune DRM code in relevant ways. The benchmarks require KMS to be enabled. When run with an X Server running, they must be run as root to avoid the authentication requirement. Note that a few other microbenchmarks are in tests (like gem_gtt_speed). tests/ This is a set of automated tests to run against the DRM to validate changes. Many of the tests have subtests, which can be listed by using the --list-subtests command line option and then run using the --run-subtest option. If --run-subtest is not used, all subtests will be run. Some tests have futher options and these are detailed by using the --help option. The test suite can be run using the run-tests.sh script available in the scripts directory. Piglit is used to run the tests and can either be installed from your distribution (if available), or can be downloaded locally for use with the script by running: ./scripts/run-tests.sh -d run-tests.sh has options for filtering and excluding tests from test runs: -t only include tests that match the regular expression -x exclude tests that match the regular expression Useful patterns for test filtering are described in the API documentation and the full list of tests and subtests can be produced by passing -l to the run-tests.sh script. Results are written to a JSON file and an HTML summary can also be created by passing -s to the run-tests.sh script. Further options are are detailed by using the -h option. If not using the script, piglit can be obtained from: git://anongit.freedesktop.org/piglit There is no need to build and install piglit if it is only going to be used for running i-g-t tests. Set the IGT_TEST_ROOT environment variable to point to the tests directory, or set the path key in the "igt" section of piglit.conf to the intel-gpu-tools root directory. The tests in the i-g-t sources need to have been built already. Then we can run the testcases with (as usual as root, no other drm clients running): piglit-sources # ./piglit run igt The testlist is built at runtime, so no need to update anything in piglit when adding new tests. See piglit-sources $ ./piglit run -h for some useful options. Piglit only runs a default set of tests and is useful for regression testing. Other tests not run are: - tests that might hang the gpu, see HANG in Makefile.am - gem_stress, a stress test suite. Look at the source for all the various options. - testdisplay is only run in the default mode. testdisplay has tons of options to test different kms functionality, again read the source for the details. lib/ Common helper functions and headers used by the other tools. man/ Manpages, unfortunately rather incomplete. tools/ This is a collection of debugging tools that had previously been built with the 2D driver but not shipped. Some distros were hacking up the 2D build to ship them. Instead, here's a separate package for people debugging the driver. These tools generally must be run as root, safe for the ones that just decode dumps. debugger/ This tool is to be used to do shader debugging. It acts like a debug server accepting connections from debug clients such as mesa. The connections is made with unix domain sockets, and at some point it would be nice if this directory contained a library for initiating connections with debug clients.. The debugger must be run as root: "sudo debugger/eudb" docs/ Contains the automatically generated intel-gpu-tools libraries reference documentation in docs/reference/. You need to have the gtk-doc tools installed and use the "--enable-gtk-doc" configure flag to generate this API documentation. To regenerate the html files when updating documentation, use: $ make clean -C docs && make -C docs If you've added/changed/removed a symbol or anything else that changes the overall structure or indexes, this needs to be reflected in intel-gpu-tools-sections.txt. Entirely new sections will also need to be added to intel-gpu-tools-docs.xml in the appropriate place. Requirements ------------ This is a non-exhaustive list of package dependencies required for building everything (package names may vary): gtk-doc-tools libcairo2-dev libdrm-dev libpciaccess-dev libunwind-dev python-docutils x11proto-dri2-dev xutils-dev Releases for maintainers ------------------------ (1.14) http://www.x.org/wiki/Development/Documentation/ReleaseHOWTO/ intel-gpu-tools-1.14/benchmarks/0000755000175000017500000000000012665337376013641 500000000000000intel-gpu-tools-1.14/benchmarks/kms_vblank.c0000644000175000017500000001077412665336131016051 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ /** @file kms_vblank.c * * This is a test of performance of drmWaitVblank. */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include "drmtest.h" #include "assert.h" static double elapsed(const struct timespec *start, const struct timespec *end, int loop) { return (1e6*(end->tv_sec - start->tv_sec) + (end->tv_nsec - start->tv_nsec)/1000)/loop; } static int crtc0_active(int fd) { union drm_wait_vblank vbl; memset(&vbl, 0, sizeof(vbl)); vbl.request.type = DRM_VBLANK_RELATIVE; return drmIoctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl) == 0; } static void vblank_query(int fd, int busy) { union drm_wait_vblank vbl; struct timespec start, end; unsigned long seq, count = 0; struct drm_event_vblank event; memset(&vbl, 0, sizeof(vbl)); if (busy) { vbl.request.type = DRM_VBLANK_RELATIVE | DRM_VBLANK_EVENT; vbl.request.sequence = 120 + 12; drmIoctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl); } vbl.request.type = DRM_VBLANK_RELATIVE; vbl.request.sequence = 0; drmIoctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl); seq = vbl.reply.sequence; clock_gettime(CLOCK_MONOTONIC, &start); do { vbl.request.type = DRM_VBLANK_RELATIVE; vbl.request.sequence = 0; drmIoctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl); count++; } while ((vbl.reply.sequence - seq) <= 120); clock_gettime(CLOCK_MONOTONIC, &end); printf("%f\n", 1e6/elapsed(&start, &end, count)); if (busy) assert(read(fd, &event, sizeof(event)) != -1); } static void vblank_event(int fd, int busy) { union drm_wait_vblank vbl; struct timespec start, end; unsigned long seq, count = 0; struct drm_event_vblank event; memset(&vbl, 0, sizeof(vbl)); if (busy) { vbl.request.type = DRM_VBLANK_RELATIVE | DRM_VBLANK_EVENT; vbl.request.sequence = 120 + 12; drmIoctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl); } vbl.request.type = DRM_VBLANK_RELATIVE; vbl.request.sequence = 0; drmIoctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl); seq = vbl.reply.sequence; clock_gettime(CLOCK_MONOTONIC, &start); do { vbl.request.type = DRM_VBLANK_RELATIVE | DRM_VBLANK_EVENT; vbl.request.sequence = 0; drmIoctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl); assert(read(fd, &event, sizeof(event)) != -1); count++; } while ((event.sequence - seq) <= 120); clock_gettime(CLOCK_MONOTONIC, &end); printf("%f\n", 1e6/elapsed(&start, &end, count)); if (busy) assert(read(fd, &event, sizeof(event)) != -1); } int main(int argc, char **argv) { int fd, c; int busy = 0, loops = 5; enum what { EVENTS, QUERIES } what = EVENTS; while ((c = getopt (argc, argv, "b:w:r:")) != -1) { switch (c) { case 'b': if (strcmp(optarg, "busy") == 0) busy = 1; else if (strcmp(optarg, "idle") == 0) busy = 0; else abort(); break; case 'w': if (strcmp(optarg, "event") == 0) what = EVENTS; else if (strcmp(optarg, "query") == 0) what = QUERIES; else abort(); break; case 'r': loops = atoi(optarg); if (loops < 1) loops = 1; } } fd = drm_open_driver(DRIVER_INTEL); if (!crtc0_active(fd)) { fprintf(stderr, "CRTC/pipe 0 not active\n"); return 77; } while (loops--) { switch (what) { case EVENTS: vblank_event(fd, busy); break; case QUERIES: vblank_query(fd, busy); break; } } return 0; } intel-gpu-tools-1.14/benchmarks/intel_upload_blit_large_gtt.c0000644000175000017500000001111012665336131021424 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * */ /** * Roughly simulates repeatedly uploading frames of images, by uploading * the data all at once with pwrite, and then blitting it to another buffer. * * You might think of this like a movie player, but that wouldn't be entirely * accurate, since the access patterns of the memory would be different * (generally, smaller source image, upscaled, an thus different memory access * pattern in both texel fetch for the stretching and the destination writes). * However, some things like swfdec would be doing something like this since * they compute their data in host memory and upload the full sw rendered * frame. * * Additionally, those applications should be rendering at the screen refresh * rate, while this test has no limits, and so can get itself into the * working set larger than aperture size performance disaster. * * The current workload doing this path is pixmap upload in 2D with KMS. */ #include "igt.h" #include #include #include #include #include #include #include #include #include #define OBJECT_WIDTH 1280 #define OBJECT_HEIGHT 720 static double get_time_in_secs(void) { struct timeval tv; gettimeofday(&tv, NULL); return (double)tv.tv_sec + tv.tv_usec / 1000000.0; } static void do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch, drm_intel_bo *dst_bo, int width, int height) { uint32_t *data; drm_intel_bo *src_bo; int i; static uint32_t seed = 1; src_bo = drm_intel_bo_alloc(bufmgr, "src", width * height * 4, 4096); drm_intel_gem_bo_map_gtt(src_bo); data = src_bo->virtual; for (i = 0; i < width * height; i++) { data[i] = seed++; } drm_intel_gem_bo_unmap_gtt(src_bo); /* Render the junk to the dst. */ BLIT_COPY_BATCH_START(0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ (width * 4) /* dst pitch */); OUT_BATCH(0); /* dst x1,y1 */ OUT_BATCH((height << 16) | width); /* dst x2,y2 */ OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(0); /* src x1,y1 */ OUT_BATCH(width * 4); /* src pitch */ OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); drm_intel_bo_unreference(src_bo); } int main(int argc, char **argv) { int fd; int object_size = OBJECT_WIDTH * OBJECT_HEIGHT * 4; double start_time, end_time; drm_intel_bo *dst_bo; drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; int i; fd = drm_open_driver(DRIVER_INTEL); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); drm_intel_bufmgr_gem_enable_reuse(bufmgr); batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd)); dst_bo = drm_intel_bo_alloc(bufmgr, "dst", object_size, 4096); /* Prep loop to get us warmed up. */ for (i = 0; i < 60; i++) { do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT); } drm_intel_bo_wait_rendering(dst_bo); /* Do the actual timing. */ start_time = get_time_in_secs(); for (i = 0; i < 200; i++) { do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT); } drm_intel_bo_wait_rendering(dst_bo); end_time = get_time_in_secs(); printf("%d iterations in %.03f secs: %.01f MB/sec\n", i, end_time - start_time, (double)i * OBJECT_WIDTH * OBJECT_HEIGHT * 4 / 1024.0 / 1024.0 / (end_time - start_time)); intel_batchbuffer_free(batch); drm_intel_bufmgr_destroy(bufmgr); close(fd); return 0; } intel-gpu-tools-1.14/benchmarks/gem_exec_reloc.c0000644000175000017500000001555612665336131016665 00000000000000/* * Copyright © 2012 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ /* Exercises the basic execbuffer using the handle LUT interface */ #include #include #include #include #include #include #include #include #include "drm.h" #include "ioctl_wrappers.h" #include "igt_debugfs.h" #include "drmtest.h" #define LOCAL_I915_EXEC_NO_RELOC (1<<11) #define LOCAL_I915_EXEC_HANDLE_LUT (1<<12) #define SKIP_RELOC 0x1 #define NO_RELOC 0x2 #define CYCLE_BATCH 0x4 #define FAULT 0x8 #define LUT 0x10 #define SEQUENTIAL_OFFSET 0x20 #define REVERSE_OFFSET 0x40 #define RANDOM_OFFSET 0x80 static uint32_t hars_petruska_f54_1_random (void) { static uint32_t state = 0x12345678; #define rol(x,k) ((x << k) | (x >> (32-k))) return state = (state ^ rol (state, 5) ^ rol (state, 24)) + 0x37798849; #undef rol } #define ELAPSED(a,b) (1e6*((b)->tv_sec - (a)->tv_sec) + ((b)->tv_usec - (a)->tv_usec)) static int run(unsigned batch_size, unsigned flags, int num_objects, int num_relocs, int reps) { uint32_t batch[2] = {MI_BATCH_BUFFER_END}; uint32_t cycle[16]; int fd, n, count, c, size = 0; struct drm_i915_gem_relocation_entry *reloc = NULL; struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 *objects; struct timeval start, end; uint32_t reloc_handle = 0; struct drm_i915_gem_exec_object2 *gem_exec; struct drm_i915_gem_relocation_entry *mem_reloc = NULL; int *target; gem_exec = calloc(sizeof(*gem_exec), num_objects + 1); mem_reloc = calloc(sizeof(*mem_reloc), num_relocs); target = calloc(sizeof(*target), num_relocs); fd = drm_open_driver(DRIVER_INTEL); for (n = 0; n < num_objects; n++) gem_exec[n].handle = gem_create(fd, 4096); for (n = 0; n < 16; n++) { cycle[n] = gem_create(fd, batch_size); gem_write(fd, cycle[n], 0, batch, sizeof(batch)); } gem_exec[num_objects].handle = cycle[c = 0]; for (n = 0; n < num_relocs; n++) { mem_reloc[n].offset = 1024; mem_reloc[n].read_domains = I915_GEM_DOMAIN_RENDER; } for (n = 0; n < num_relocs; n++) { if (flags & SEQUENTIAL_OFFSET) mem_reloc[n].offset = 8 + (8*n % (batch_size - 16)); else if (flags & REVERSE_OFFSET) mem_reloc[n].offset = batch_size - 8 - (8*n % (batch_size - 16)); else if (flags & RANDOM_OFFSET) mem_reloc[n].offset = 8 + 8*hars_petruska_f54_1_random() % (batch_size - 16); else mem_reloc[n].offset = 1024; mem_reloc[n].read_domains = I915_GEM_DOMAIN_RENDER; } if (num_relocs) { size = ALIGN(sizeof(*mem_reloc)*num_relocs, 4096); reloc_handle = gem_create(fd, size); reloc = __gem_mmap__cpu(fd, reloc_handle, 0, size, PROT_READ | PROT_WRITE); memcpy(reloc, mem_reloc, sizeof(*mem_reloc)*num_relocs); munmap(reloc, size); if (flags & FAULT) { igt_disable_prefault(); reloc = __gem_mmap__cpu(fd, reloc_handle, 0, size, PROT_READ | PROT_WRITE); } else reloc = mem_reloc; } gem_exec[num_objects].relocation_count = num_relocs; gem_exec[num_objects].relocs_ptr = (uintptr_t)reloc; objects = gem_exec; memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)objects; execbuf.buffer_count = num_objects + 1; if (flags & LUT) execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT; if (flags & NO_RELOC) execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC; for (n = 0; n < num_relocs; n++) { target[n] = hars_petruska_f54_1_random() % num_objects; if (flags & LUT) reloc[n].target_handle = target[n]; else reloc[n].target_handle = objects[target[n]].handle; reloc[n].presumed_offset = 0; } gem_execbuf(fd, &execbuf); while (reps--) { gettimeofday(&start, NULL); for (count = 0; count < 1000; count++) { if ((flags & SKIP_RELOC) == 0) { for (n = 0; n < num_relocs; n++) reloc[n].presumed_offset = 0; if (flags & CYCLE_BATCH) { c = (c + 1) % 16; gem_exec[num_objects].handle = cycle[c]; } } if (flags & FAULT && reloc) { munmap(reloc, size); reloc = __gem_mmap__cpu(fd, reloc_handle, 0, size, PROT_READ | PROT_WRITE); gem_exec[num_objects].relocs_ptr = (uintptr_t)reloc; } gem_execbuf(fd, &execbuf); } gettimeofday(&end, NULL); printf("%.3f\n", ELAPSED(&start, &end)); } if (flags & FAULT && reloc) { munmap(reloc, size); igt_enable_prefault(); } return 0; } int main(int argc, char **argv) { unsigned num_objects = 1, num_relocs = 0, flags = 0; unsigned size = 4096; int reps = 13; int c; while ((c = getopt (argc, argv, "b:r:s:e:l:m:o:")) != -1) { switch (c) { case 'l': reps = atoi(optarg); if (reps < 1) reps = 1; break; case 's': size = atoi(optarg); if (size < 4096) size = 4096; size = ALIGN(size, 4096); break; case 'e': if (strcmp(optarg, "busy") == 0) { flags |= 0; } else if (strcmp(optarg, "cyclic") == 0) { flags |= CYCLE_BATCH; } else if (strcmp(optarg, "fault") == 0) { flags |= FAULT; } else if (strcmp(optarg, "skip") == 0) { flags |= SKIP_RELOC; } else if (strcmp(optarg, "none") == 0) { flags |= SKIP_RELOC | NO_RELOC; } else { abort(); } break; case 'm': if (strcmp(optarg, "old") == 0) { flags |= 0; } else if (strcmp(optarg, "lut") == 0) { flags |= LUT; } else { abort(); } break; case 'o': if (strcmp(optarg, "constant") == 0) { flags |= 0; } else if (strcmp(optarg, "sequential") == 0) { flags |= SEQUENTIAL_OFFSET; } else if (strcmp(optarg, "reverse") == 0) { flags |= REVERSE_OFFSET; } else if (strcmp(optarg, "random") == 0) { flags |= RANDOM_OFFSET; } else { abort(); } break; case 'b': num_objects = atoi(optarg); if (num_objects < 1) num_objects = 1; break; case 'r': num_relocs = atoi(optarg); break; } } return run(size, flags, num_objects, num_relocs, reps); } intel-gpu-tools-1.14/benchmarks/Makefile.in0000644000175000017500000011401212665336443015617 00000000000000# Makefile.in generated by automake 1.15 from Makefile.am. # @configure_input@ # Copyright (C) 1994-2014 Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or 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gem_userptr_benchmark \ kms_vblank \ $(NULL) intel-gpu-tools-1.14/benchmarks/intel_upload_blit_small.c0000644000175000017500000001161312665336131020574 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * */ /** * Roughly simulates Mesa's current vertex buffer behavior: do a series of * small pwrites on a moderately-sized buffer, then render using it. * * The vertex buffer uploads * * You might think of this like a movie player, but that wouldn't be entirely * accurate, since the access patterns of the memory would be different * (generally, smaller source image, upscaled, an thus different memory access * pattern in both texel fetch for the stretching and the destination writes). * However, some things like swfdec would be doing something like this since * they compute their data in host memory and upload the full sw rendered * frame. */ #include "igt.h" #include #include #include #include #include #include #include #include #include /* Happens to be 128k, the size of the VBOs used by i965's Mesa driver. */ #define OBJECT_WIDTH 256 #define OBJECT_HEIGHT 128 static double get_time_in_secs(void) { struct timeval tv; gettimeofday(&tv, NULL); return (double)tv.tv_sec + tv.tv_usec / 1000000.0; } static void do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch, drm_intel_bo *dst_bo, int width, int height) { uint32_t data[64]; drm_intel_bo *src_bo; int i; static uint32_t seed = 1; src_bo = drm_intel_bo_alloc(bufmgr, "src", width * height * 4, 4096); /* Upload some junk. Real workloads would be doing a lot more * work to generate the junk. */ for (i = 0; i < width * height;) { int size, j; /* Choose a size from 1 to 64 dwords to upload. * Normal workloads have a distribution of sizes with a * large tail (something in your scene's going to have a big * pile of vertices, most likely), but I'm trying to get at * the cost of the small uploads here. */ size = random() % 64 + 1; if (i + size > width * height) size = width * height - i; for (j = 0; j < size; j++) data[j] = seed++; /* Upload the junk. */ drm_intel_bo_subdata(src_bo, i * 4, size * 4, data); i += size; } /* Render the junk to the dst. */ BLIT_COPY_BATCH_START(0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ (width * 4) /* dst pitch */); OUT_BATCH(0); /* dst x1,y1 */ OUT_BATCH((height << 16) | width); /* dst x2,y2 */ OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(0); /* src x1,y1 */ OUT_BATCH(width * 4); /* src pitch */ OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); drm_intel_bo_unreference(src_bo); } int main(int argc, char **argv) { int fd; int object_size = OBJECT_WIDTH * OBJECT_HEIGHT * 4; double start_time, end_time; drm_intel_bo *dst_bo; drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; int i; fd = drm_open_driver(DRIVER_INTEL); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); drm_intel_bufmgr_gem_enable_reuse(bufmgr); batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd)); dst_bo = drm_intel_bo_alloc(bufmgr, "dst", object_size, 4096); /* Prep loop to get us warmed up. */ for (i = 0; i < 20; i++) { do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT); } drm_intel_bo_wait_rendering(dst_bo); /* Do the actual timing. */ start_time = get_time_in_secs(); for (i = 0; i < 1000; i++) { do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT); } drm_intel_bo_wait_rendering(dst_bo); end_time = get_time_in_secs(); printf("%d iterations in %.03f secs: %.01f MB/sec\n", i, end_time - start_time, (double)i * OBJECT_WIDTH * OBJECT_HEIGHT * 4 / 1024.0 / 1024.0 / (end_time - start_time)); intel_batchbuffer_free(batch); drm_intel_bufmgr_destroy(bufmgr); close(fd); return 0; } intel-gpu-tools-1.14/benchmarks/Makefile.am0000644000175000017500000000100712665336131015577 00000000000000 include Makefile.sources AM_CPPFLAGS = -I$(top_srcdir) -I$(top_srcdir)/lib AM_CFLAGS = $(DRM_CFLAGS) $(CWARNFLAGS) $(CAIRO_CFLAGS) $(LIBUNWIND_CFLAGS) LDADD = $(top_builddir)/lib/libintel_tools.la $(DRM_LIBS) $(PCIACCESS_LIBS) $(CAIRO_LIBS) $(LIBUNWIND_LIBS) -lm benchmarks_LTLIBRARIES = gem_exec_tracer.la gem_exec_tracer_la_LDFLAGS = -module -avoid-version -no-undefined gem_exec_tracer_la_LIBADD = -ldl gem_latency_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS) gem_latency_LDADD = $(LDADD) -lpthread EXTRA_DIST=README intel-gpu-tools-1.14/benchmarks/gem_exec_tracer.c0000644000175000017500000001413012665336131017024 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ #define _GNU_SOURCE /* for RTLD_NEXT */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "intel_aub.h" #include "intel_chipset.h" static int (*libc_close)(int fd); static int (*libc_ioctl)(int fd, unsigned long request, void *argp); static int drm_fd = -1; static FILE *file; #define DRM_MAJOR 226 enum { ADD_BO = 0, DEL_BO, EXEC, }; struct trace_add_bo { uint8_t cmd; uint32_t handle; uint64_t size; } __attribute__((packed)); struct trace_del_bo { uint8_t cmd; uint32_t handle; }__attribute__((packed)); struct trace_exec { uint8_t cmd; uint32_t object_count; uint64_t flags; }__attribute__((packed)); struct trace_exec_object { uint32_t handle; uint32_t relocation_count; uint64_t alignment; uint64_t flags; uint64_t rsvd1; uint64_t rsvd2; }__attribute__((packed)); struct trace_exec_relocation { uint32_t target_handle; uint32_t delta; uint64_t offset; uint32_t read_domains; uint32_t write_domain; }__attribute__((packed)); static void __attribute__ ((format(__printf__, 2, 3))) fail_if(int cond, const char *format, ...) { va_list args; if (!cond) return; va_start(args, format); vfprintf(stderr, format, args); va_end(args); exit(1); } static void trace_exec(int fd, const struct drm_i915_gem_execbuffer2 *execbuffer2) { const struct drm_i915_gem_exec_object2 *exec_objects = (struct drm_i915_gem_exec_object2 *)(uintptr_t)execbuffer2->buffers_ptr; { struct trace_exec t = { EXEC, execbuffer2->buffer_count, execbuffer2->flags }; fwrite(&t, sizeof(t), 1, file); } for (uint32_t i = 0; i < execbuffer2->buffer_count; i++) { const struct drm_i915_gem_exec_object2 *obj = &exec_objects[i]; const struct drm_i915_gem_relocation_entry *relocs = (struct drm_i915_gem_relocation_entry *)(uintptr_t)obj->relocs_ptr; { struct trace_exec_object t = { obj->handle, obj->relocation_count, obj->alignment, obj->flags, obj->rsvd1, obj->rsvd2 }; fwrite(&t, sizeof(t), 1, file); } for (uint32_t j = 0; j < obj->relocation_count; j++) { struct trace_exec_relocation t = { relocs[j].target_handle, relocs[j].delta, relocs[j].offset, relocs[j].read_domains, relocs[j].write_domain, }; fwrite(&t, sizeof(t), 1, file); } } fflush(file); } static void trace_add(uint32_t handle, uint64_t size) { struct trace_add_bo t = { ADD_BO, handle, size }; fwrite(&t, sizeof(t), 1, file); } static void trace_del(uint32_t handle) { struct trace_del_bo t = { DEL_BO, handle }; fwrite(&t, sizeof(t), 1, file); } int close(int fd) { if (fd == drm_fd) drm_fd = -1; return libc_close(fd); } static unsigned long size_for_fb(const struct drm_mode_fb_cmd *cmd) { unsigned long size; #ifndef ALIGN #define ALIGN(x, y) (((x) + (y) - 1) & -(y)) #endif size = ALIGN(cmd->width * cmd->bpp, 64); size *= cmd->height; return ALIGN(size, 4096); } static int is_i915(int fd) { drm_version_t version; char name[5] = ""; memset(&version, 0, sizeof(version)); version.name_len = 4; version.name = name; if (libc_ioctl(fd, DRM_IOCTL_VERSION, &version)) return 0; return strcmp(name, "i915") == 0; } int ioctl(int fd, unsigned long request, ...) { va_list args; void *argp; int ret; va_start(args, request); argp = va_arg(args, void *); va_end(args); ret = libc_ioctl(fd, request, argp); if (ret) return ret; if (_IOC_TYPE(request) != DRM_IOCTL_BASE) return 0; if (drm_fd != fd) { char filename[80]; if (!is_i915(fd)) return 0; if (file) fclose(file); sprintf(filename, "/tmp/trace.%d", fd); file = fopen(filename, "w+"); drm_fd = fd; } switch (request) { case DRM_IOCTL_I915_GEM_EXECBUFFER2: trace_exec(fd, argp); break; case DRM_IOCTL_I915_GEM_CREATE: { struct drm_i915_gem_create *create = argp; trace_add(create->handle, create->size); break; } case DRM_IOCTL_I915_GEM_USERPTR: { struct drm_i915_gem_userptr *userptr = argp; trace_add(userptr->handle, userptr->user_size); break; } case DRM_IOCTL_GEM_CLOSE: { struct drm_gem_close *close = argp; trace_del(close->handle); break; } case DRM_IOCTL_GEM_OPEN: { struct drm_gem_open *open = argp; trace_add(open->handle, open->size); break; } case DRM_IOCTL_PRIME_FD_TO_HANDLE: { struct drm_prime_handle *prime = argp; off_t size = lseek(prime->fd, 0, SEEK_END); fail_if(size == -1, "failed to get prime bo size\n"); trace_add(prime->handle, size); break; } case DRM_IOCTL_MODE_GETFB: { struct drm_mode_fb_cmd *cmd = argp; trace_add(cmd->handle, size_for_fb(cmd)); break; } } return 0; } static void __attribute__ ((constructor)) init(void) { libc_close = dlsym(RTLD_NEXT, "close"); libc_ioctl = dlsym(RTLD_NEXT, "ioctl"); fail_if(libc_close == NULL || libc_ioctl == NULL, "failed to get libc ioctl or close\n"); } intel-gpu-tools-1.14/benchmarks/README0000644000175000017500000000051312665336131014424 00000000000000These benchmarks are designed to be used from within a benchmark framework like http://cgit.freedesktop.org/~mperes/ezbench/. A typical way to run them would be: $ ~/ezbench/ezbench.sh -p ./linux,git -m '' -b gem: -r 15 which executes the set of gem benchmarks, 15 times each, using HEAD of ./linux.git as the reference commit. intel-gpu-tools-1.14/benchmarks/gem_exec_ctx.c0000644000175000017500000001177112665336131016352 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ #include #include #include #include #include #include #include #include #include #include #include #include #include "drm.h" #include "ioctl_wrappers.h" #include "drmtest.h" #include "intel_io.h" #include "igt_stats.h" enum mode { NOP, CREATE, SWITCH, DEFAULT }; #define SYNC 0x1 #define LOCAL_I915_EXEC_NO_RELOC (1<<11) #define LOCAL_I915_EXEC_HANDLE_LUT (1<<12) static double elapsed(const struct timespec *start, const struct timespec *end) { return (end->tv_sec - start->tv_sec) + 1e-9*(end->tv_nsec - start->tv_nsec); } static uint32_t batch(int fd) { const uint32_t buf[] = {MI_BATCH_BUFFER_END}; uint32_t handle = gem_create(fd, 4096); gem_write(fd, handle, 0, buf, sizeof(buf)); return handle; } static uint32_t __gem_context_create(int fd) { struct drm_i915_gem_context_create create; memset(&create, 0, sizeof(create)); drmIoctl(fd, DRM_IOCTL_I915_GEM_CONTEXT_CREATE, &create); return create.ctx_id; } static int loop(unsigned ring, int reps, enum mode mode, unsigned flags) { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 gem_exec; int fds[2], fd; uint32_t ctx; fd = fds[0] = drm_open_driver(DRIVER_INTEL); fds[1] = drm_open_driver(DRIVER_INTEL); memset(&gem_exec, 0, sizeof(gem_exec)); gem_exec.handle = batch(fd); igt_assert(gem_open(fds[1], gem_flink(fds[0], gem_exec.handle)) == gem_exec.handle); memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)&gem_exec; execbuf.buffer_count = 1; execbuf.flags = ring; execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT; execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC; if (mode != DEFAULT) { execbuf.rsvd1 = __gem_context_create(fd); if (execbuf.rsvd1 == 0) return 77; } if (__gem_execbuf(fd, &execbuf)) { execbuf.flags = ring; if (__gem_execbuf(fd, &execbuf)) return 77; } ctx = gem_context_create(fd); while (reps--) { struct timespec start, end; unsigned count = 0; sleep(1); /* wait for the hw to go back to sleep */ clock_gettime(CLOCK_MONOTONIC, &start); do { uint32_t tmp; switch (mode) { case CREATE: ctx = execbuf.rsvd1; execbuf.rsvd1 = gem_context_create(fd); break; case SWITCH: tmp = execbuf.rsvd1; execbuf.rsvd1 = ctx; ctx = tmp; break; case DEFAULT: fd = fds[count & 1]; break; case NOP: break; } do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); count++; if (mode == CREATE) gem_context_destroy(fd, ctx); if (flags & SYNC) gem_sync(fd, gem_exec.handle); clock_gettime(CLOCK_MONOTONIC, &end); } while (elapsed(&start, &end) < 2.); gem_sync(fd, gem_exec.handle); clock_gettime(CLOCK_MONOTONIC, &end); printf("%7.3f\n", 1e6*elapsed(&start, &end) / count); } return 0; } int main(int argc, char **argv) { unsigned ring = I915_EXEC_RENDER; unsigned flags = 0; enum mode mode = NOP; int reps = 1; int c; while ((c = getopt (argc, argv, "e:r:b:s")) != -1) { switch (c) { case 'e': if (strcmp(optarg, "rcs") == 0) ring = I915_EXEC_RENDER; else if (strcmp(optarg, "vcs") == 0) ring = I915_EXEC_BSD; else if (strcmp(optarg, "bcs") == 0) ring = I915_EXEC_BLT; else if (strcmp(optarg, "vecs") == 0) ring = I915_EXEC_VEBOX; else ring = atoi(optarg); break; case 'b': if (strcmp(optarg, "create") == 0) mode = CREATE; else if (strcmp(optarg, "switch") == 0) mode = SWITCH; else if (strcmp(optarg, "default") == 0) mode = DEFAULT; else if (strcmp(optarg, "nop") == 0) mode = NOP; else abort(); break; case 'r': reps = atoi(optarg); if (reps < 1) reps = 1; break; case 's': flags |= SYNC; break; default: break; } } return loop(ring, reps, mode, flags); } intel-gpu-tools-1.14/benchmarks/intel_upload_blit_large.c0000644000175000017500000001130712665336131020556 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * */ /** * Roughly simulates repeatedly uploading frames of images, by uploading * the data all at once with pwrite, and then blitting it to another buffer. * * You might think of this like a movie player, but that wouldn't be entirely * accurate, since the access patterns of the memory would be different * (generally, smaller source image, upscaled, an thus different memory access * pattern in both texel fetch for the stretching and the destination writes). * However, some things like swfdec would be doing something like this since * they compute their data in host memory and upload the full sw rendered * frame. * * Additionally, those applications should be rendering at the screen refresh * rate, while this test has no limits, and so can get itself into the * working set larger than aperture size performance disaster. * * The current workload doing this path is pixmap upload for non-KMS. */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #define OBJECT_WIDTH 1280 #define OBJECT_HEIGHT 720 static double get_time_in_secs(void) { struct timeval tv; gettimeofday(&tv, NULL); return (double)tv.tv_sec + tv.tv_usec / 1000000.0; } static void do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch, drm_intel_bo *dst_bo, int width, int height) { uint32_t data[width * height]; drm_intel_bo *src_bo; int i; static uint32_t seed = 1; /* Generate some junk. Real workloads would be doing a lot more * work to generate the junk. */ for (i = 0; i < width * height; i++) { data[i] = seed++; } /* Upload the junk. */ src_bo = drm_intel_bo_alloc(bufmgr, "src", sizeof(data), 4096); drm_intel_bo_subdata(src_bo, 0, sizeof(data), data); /* Render the junk to the dst. */ BLIT_COPY_BATCH_START(0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ (width * 4) /* dst pitch */); OUT_BATCH(0); /* dst x1,y1 */ OUT_BATCH((height << 16) | width); /* dst x2,y2 */ OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(0); /* src x1,y1 */ OUT_BATCH(width * 4); /* src pitch */ OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); drm_intel_bo_unreference(src_bo); } int main(int argc, char **argv) { int fd; int object_size = OBJECT_WIDTH * OBJECT_HEIGHT * 4; double start_time, end_time; drm_intel_bo *dst_bo; drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; int i; fd = drm_open_driver(DRIVER_INTEL); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); drm_intel_bufmgr_gem_enable_reuse(bufmgr); batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd)); dst_bo = drm_intel_bo_alloc(bufmgr, "dst", object_size, 4096); /* Prep loop to get us warmed up. */ for (i = 0; i < 60; i++) { do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT); } drm_intel_bo_wait_rendering(dst_bo); /* Do the actual timing. */ start_time = get_time_in_secs(); for (i = 0; i < 200; i++) { do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT); } drm_intel_bo_wait_rendering(dst_bo); end_time = get_time_in_secs(); printf("%d iterations in %.03f secs: %.01f MB/sec\n", i, end_time - start_time, (double)i * OBJECT_WIDTH * OBJECT_HEIGHT * 4 / 1024.0 / 1024.0 / (end_time - start_time)); intel_batchbuffer_free(batch); drm_intel_bufmgr_destroy(bufmgr); close(fd); return 0; } intel-gpu-tools-1.14/benchmarks/gem_create.c0000644000175000017500000001025712665336131016011 00000000000000/* * Copyright © 2011-2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ #include #include #include #include #include #include #include #include #include #include #include #include #include "drm.h" #include "ioctl_wrappers.h" #include "drmtest.h" #include "igt_aux.h" #include "igt_stats.h" #define OBJECT_SIZE (1<<23) #define LOCAL_I915_EXEC_NO_RELOC (1<<11) #define LOCAL_I915_EXEC_HANDLE_LUT (1<<12) static double elapsed(const struct timespec *start, const struct timespec *end) { return (end->tv_sec - start->tv_sec) + 1e-9*(end->tv_nsec - start->tv_nsec); } static void make_busy(int fd, uint32_t handle) { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 gem_exec; const uint32_t buf[] = {MI_BATCH_BUFFER_END}; gem_write(fd, handle, 0, buf, sizeof(buf)); memset(&gem_exec, 0, sizeof(gem_exec)); gem_exec.handle = handle; memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)&gem_exec; execbuf.buffer_count = 1; execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT; execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC; if (__gem_execbuf(fd, &execbuf)) { execbuf.flags = 0; gem_execbuf(fd, &execbuf); } } int main(int argc, char **argv) { int fd = drm_open_driver(DRIVER_INTEL); int size = 0; int busy = 0; int reps = 13; int c, n, s; while ((c = getopt (argc, argv, "bs:r:")) != -1) { switch (c) { case 's': size = atoi(optarg); break; case 'r': reps = atoi(optarg); if (reps < 1) reps = 1; break; case 'b': busy = true; break; default: break; } } if (size == 0) { for (s = 4096; s <= OBJECT_SIZE; s <<= 1) { igt_stats_t stats; igt_stats_init_with_size(&stats, reps); for (n = 0; n < reps; n++) { struct timespec start, end; uint64_t count = 0; clock_gettime(CLOCK_MONOTONIC, &start); do { for (c = 0; c < 1000; c++) { uint32_t handle; handle = gem_create(fd, s); gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); if (busy) make_busy(fd, handle); gem_close(fd, handle); } count += c; clock_gettime(CLOCK_MONOTONIC, &end); } while (end.tv_sec - start.tv_sec < 2); igt_stats_push_float(&stats, count / elapsed(&start, &end)); } printf("%f\n", igt_stats_get_trimean(&stats)); igt_stats_fini(&stats); } } else { for (n = 0; n < reps; n++) { struct timespec start, end; uint64_t count = 0; clock_gettime(CLOCK_MONOTONIC, &start); do { for (c = 0; c < 1000; c++) { uint32_t handle; handle = gem_create(fd, size); gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); if (busy) make_busy(fd, handle); gem_close(fd, handle); } count += c; clock_gettime(CLOCK_MONOTONIC, &end); } while (end.tv_sec - start.tv_sec < 2); printf("%f\n", count / elapsed(&start, &end)); } } return 0; } intel-gpu-tools-1.14/benchmarks/gem_exec_nop.c0000644000175000017500000000751312665336131016347 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ #include #include #include #include #include #include #include #include #include #include #include #include #include "drm.h" #include "ioctl_wrappers.h" #include "drmtest.h" #include "intel_io.h" #include "igt_stats.h" #define LOCAL_I915_EXEC_NO_RELOC (1<<11) #define LOCAL_I915_EXEC_HANDLE_LUT (1<<12) #define SYNC 0x1 static double elapsed(const struct timespec *start, const struct timespec *end) { return (end->tv_sec - start->tv_sec) + 1e-9*(end->tv_nsec - start->tv_nsec); } static uint32_t batch(int fd) { const uint32_t buf[] = {MI_BATCH_BUFFER_END}; uint32_t handle = gem_create(fd, 4096); gem_write(fd, handle, 0, buf, sizeof(buf)); return handle; } static int loop(unsigned ring, int reps, unsigned flags) { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 gem_exec; int fd; fd = drm_open_driver(DRIVER_INTEL); memset(&gem_exec, 0, sizeof(gem_exec)); gem_exec.handle = batch(fd); memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)&gem_exec; execbuf.buffer_count = 1; execbuf.flags = ring; execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT; execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC; if (__gem_execbuf(fd, &execbuf)) { execbuf.flags = ring; if (__gem_execbuf(fd, &execbuf)) return 77; } while (reps--) { struct timespec start, end; unsigned count = 0; gem_set_domain(fd, gem_exec.handle, I915_GEM_DOMAIN_GTT, 0); sleep(1); /* wait for the hw to go back to sleep */ clock_gettime(CLOCK_MONOTONIC, &start); do { do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); count++; if (flags & SYNC) gem_sync(fd, gem_exec.handle); clock_gettime(CLOCK_MONOTONIC, &end); } while (elapsed(&start, &end) < 2.); gem_sync(fd, gem_exec.handle); clock_gettime(CLOCK_MONOTONIC, &end); printf("%7.3f\n", 1e6*elapsed(&start, &end)/count); } return 0; } int main(int argc, char **argv) { unsigned ring = I915_EXEC_RENDER; unsigned flags = 0; int reps = 1; int c; while ((c = getopt (argc, argv, "e:r:s")) != -1) { switch (c) { case 'e': if (strcmp(optarg, "rcs") == 0) ring = I915_EXEC_RENDER; else if (strcmp(optarg, "vcs") == 0) ring = I915_EXEC_BSD; else if (strcmp(optarg, "bcs") == 0) ring = I915_EXEC_BLT; else if (strcmp(optarg, "vecs") == 0) ring = I915_EXEC_VEBOX; else ring = atoi(optarg); break; case 'r': reps = atoi(optarg); if (reps < 1) reps = 1; break; case 's': flags |= SYNC; break; default: break; } } return loop(ring, reps, flags); } intel-gpu-tools-1.14/benchmarks/gem_prw.c0000644000175000017500000000612712665336131015357 00000000000000/* * Copyright © 2011-2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ #include #include #include #include #include #include #include #include #include #include #include #include #include "drm.h" #include "ioctl_wrappers.h" #include "drmtest.h" #include "igt_aux.h" #include "igt_stats.h" #define OBJECT_SIZE (1<<23) static uint64_t elapsed(const struct timespec *start, const struct timespec *end) { return 1000000000ULL*(end->tv_sec - start->tv_sec) + (end->tv_nsec - start->tv_nsec); } int main(int argc, char **argv) { int fd = drm_open_driver(DRIVER_INTEL); int domain = I915_GEM_DOMAIN_GTT; enum dir { READ, WRITE } dir = READ; void *buf = malloc(OBJECT_SIZE); uint32_t handle; int reps = 13; int c, size; while ((c = getopt (argc, argv, "D:d:r:")) != -1) { switch (c) { case 'd': if (strcmp(optarg, "cpu") == 0) domain = I915_GEM_DOMAIN_CPU; else if (strcmp(optarg, "gtt") == 0) domain = I915_GEM_DOMAIN_GTT; break; case 'D': if (strcmp(optarg, "read") == 0) dir = READ; else if (strcmp(optarg, "write") == 0) dir = WRITE; else abort(); break; case 'r': reps = atoi(optarg); if (reps < 1) reps = 1; break; default: break; } } handle = gem_create(fd, OBJECT_SIZE); for (size = 1; size <= OBJECT_SIZE; size <<= 1) { igt_stats_t stats; int n; igt_stats_init_with_size(&stats, reps); for (n = 0; n < reps; n++) { struct timespec start, end; gem_set_domain(fd, handle, domain, domain); clock_gettime(CLOCK_MONOTONIC, &start); if (dir == READ) gem_read(fd, handle, 0, buf, size); else gem_write(fd, handle, 0, buf, size); clock_gettime(CLOCK_MONOTONIC, &end); igt_stats_push(&stats, elapsed(&start, &end)); } printf("%7.3f\n", igt_stats_get_trimean(&stats)/1000); igt_stats_fini(&stats); } return 0; } intel-gpu-tools-1.14/benchmarks/gem_exec_trace.c0000644000175000017500000001525112665336131016647 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ #include #include #include #include #include #include #include #include #include #include #include #include #include "drm.h" #include "ioctl_wrappers.h" #include "drmtest.h" #include "intel_io.h" #include "igt_stats.h" enum { ADD_BO = 0, DEL_BO, EXEC, }; struct trace_add_bo { uint32_t handle; uint64_t size; } __attribute__((packed)); struct trace_del_bo { uint32_t handle; } __attribute__((packed)); struct trace_exec { uint32_t object_count; uint64_t flags; } __attribute__((packed)); struct trace_exec_object { uint32_t handle; uint32_t relocation_count; uint64_t alignment; uint64_t flags; uint64_t rsvd1; uint64_t rsvd2; } __attribute__((packed)); struct trace_exec_relocation { uint32_t target_handle; uint32_t delta; uint64_t offset; uint32_t read_domains; uint32_t write_domain; } __attribute__((packed)); static double elapsed(const struct timespec *start, const struct timespec *end) { return 1e3*(end->tv_sec - start->tv_sec) + 1e-6*(end->tv_nsec - start->tv_nsec); } static void replay(const char *filename) { struct timespec t_start, t_end; struct drm_i915_gem_execbuffer2 eb = {}; struct bo { uint32_t handle; uint64_t offset; struct drm_i915_gem_relocation_entry *relocs; uint32_t max_relocs; } *bo = NULL, **offsets = NULL; int num_bo = 0; struct drm_i915_gem_exec_object2 *exec_objects = NULL; int max_objects = 0; struct stat st; uint8_t *ptr, *end; int fd; fd = open(filename, O_RDONLY); if (fd < 0) return; if (fstat(fd, &st) < 0) return; ptr = mmap(0, st.st_size, PROT_READ, MAP_SHARED, fd, 0); close(fd); if (ptr == MAP_FAILED) return; madvise(ptr, st.st_size, MADV_SEQUENTIAL); end = ptr + st.st_size; fd = drm_open_driver(DRIVER_INTEL); clock_gettime(CLOCK_MONOTONIC, &t_start); do { switch (*ptr++) { case ADD_BO: { uint32_t bb = 0xa << 23; struct trace_add_bo *t = (void *)ptr; ptr = (void *)(t + 1); if (t->handle >= num_bo) { int new_bo = (t->handle + 4096) & -4096; bo = realloc(bo, sizeof(*bo)*new_bo); memset(bo + num_bo, 0, sizeof(*bo)*(new_bo - num_bo)); num_bo = new_bo; } bo[t->handle].handle = gem_create(fd, t->size); gem_write(fd, bo[t->handle].handle, 0, &bb, sizeof(bb)); break; } case DEL_BO: { struct trace_del_bo *t = (void *)ptr; ptr = (void *)(t + 1); gem_close(fd, bo[t->handle].handle); bo[t->handle].handle = 0; free(bo[t->handle].relocs); bo[t->handle].relocs = NULL; bo[t->handle].max_relocs = 0; break; } case EXEC: { struct trace_exec *t = (void *)ptr; uint32_t i, j; ptr = (void *)(t + 1); eb.buffer_count = t->object_count; eb.flags = t->flags & ~I915_EXEC_RING_MASK; if (eb.buffer_count > max_objects) { free(exec_objects); free(offsets); max_objects = ALIGN(eb.buffer_count, 4096); exec_objects = malloc(max_objects*sizeof(*exec_objects)); offsets = malloc(max_objects*sizeof(*offsets)); eb.buffers_ptr = (uintptr_t)exec_objects; } for (i = 0; i < eb.buffer_count; i++) { struct drm_i915_gem_relocation_entry *relocs; struct trace_exec_object *to = (void *)ptr; ptr = (void *)(to + 1); offsets[i] = &bo[to->handle]; exec_objects[i].handle = bo[to->handle].handle; exec_objects[i].offset = bo[to->handle].offset; exec_objects[i].alignment = to->alignment; exec_objects[i].flags = to->flags; exec_objects[i].rsvd1 = to->rsvd1; exec_objects[i].rsvd2 = to->rsvd2; exec_objects[i].relocation_count = to->relocation_count; if (!to->relocation_count) continue; if (to->relocation_count > bo[to->handle].max_relocs) { free(bo[to->handle].relocs); bo[to->handle].max_relocs = ALIGN(to->relocation_count, 128); bo[to->handle].relocs = malloc(sizeof(*bo[to->handle].relocs)*bo[to->handle].max_relocs); } relocs = bo[to->handle].relocs; exec_objects[i].relocs_ptr = (uintptr_t)relocs; for (j = 0; j < to->relocation_count; j++) { struct trace_exec_relocation *tr = (void *)ptr; ptr = (void *)(tr + 1); if (eb.flags & I915_EXEC_HANDLE_LUT) { uint32_t handle; relocs[j].target_handle = tr->target_handle; handle = exec_objects[tr->target_handle].handle; relocs[j].presumed_offset = bo[handle].offset; } else { relocs[j].target_handle = bo[tr->target_handle].handle; relocs[j].presumed_offset = bo[tr->target_handle].offset; } relocs[j].delta = tr->delta; relocs[j].offset = tr->offset; relocs[j].read_domains = tr->read_domains; relocs[j].write_domain = tr->write_domain; } } gem_execbuf(fd, &eb); for (i = 0; i < eb.buffer_count; i++) offsets[i]->offset = exec_objects[i].offset; break; } } } while (ptr < end); clock_gettime(CLOCK_MONOTONIC, &t_end); close(fd); munmap(end-st.st_size, st.st_size); for (fd = 0; fd < num_bo; fd++) free(bo[fd].relocs); free(bo); free(offsets); printf("%s: %.3f\n", filename, elapsed(&t_start, &t_end)); } int main(int argc, char **argv) { int i; for (i = 1; i < argc; i++) replay(argv[i]); return 0; } intel-gpu-tools-1.14/benchmarks/gem_set_domain.c0000644000175000017500000000576412665336131016677 00000000000000/* * Copyright © 2011-2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ #include #include #include #include #include #include #include #include #include #include #include #include #include "drm.h" #include "ioctl_wrappers.h" #include "drmtest.h" #include "igt_aux.h" static double elapsed(const struct timespec *start, const struct timespec *end) { return (end->tv_sec - start->tv_sec) + 1e-9*(end->tv_nsec - start->tv_nsec); } int main(int argc, char **argv) { int fd = drm_open_driver(DRIVER_INTEL); uint32_t cpu_write = 0; uint32_t gtt_write = 0; int reps = 13; int size = 1024*1024; uint32_t handle; int c, n; while ((c = getopt (argc, argv, "c:g:r:s:")) != -1) { switch (c) { case 'c': cpu_write = *optarg == 'w' ? I915_GEM_DOMAIN_CPU : 0; break; case 'g': gtt_write = *optarg == 'w' ? I915_GEM_DOMAIN_GTT : 0; break; case 'r': reps = atoi(optarg); if (reps < 1) reps = 1; break; case 's': size = atoi(optarg); if (size < 4096) size = 4096; break; default: break; } } fprintf(stderr, "size=%d, cpu=%d, gtt=%d\n", size, cpu_write, gtt_write); handle = gem_create(fd, size); gem_set_caching(fd, handle, I915_CACHING_NONE); for (n = 0; n < reps; n++) { struct timespec start, end; uint64_t count = 0; gem_set_domain(fd, handle, I915_GEM_DOMAIN_CPU, cpu_write); clock_gettime(CLOCK_MONOTONIC, &start); do { for (c = 0; c < 1000; c++) { gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, gtt_write); gem_set_domain(fd, handle, I915_GEM_DOMAIN_CPU, cpu_write); } count += c; clock_gettime(CLOCK_MONOTONIC, &end); } while (end.tv_sec - start.tv_sec < 2); printf("%f\n", count / elapsed(&start, &end)); } return 0; } intel-gpu-tools-1.14/benchmarks/gem_mmap.c0000644000175000017500000001142312665336131015474 00000000000000/* * Copyright © 2011-2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ #include #include #include #include #include #include #include #include #include #include #include #include #include "drm.h" #include "ioctl_wrappers.h" #include "drmtest.h" #include "igt_aux.h" #include "igt_stats.h" #define OBJECT_SIZE (1<<23) static double elapsed(const struct timespec *start, const struct timespec *end) { return (end->tv_sec - start->tv_sec) + 1e-9*(end->tv_nsec - start->tv_nsec); } int main(int argc, char **argv) { int fd = drm_open_driver(DRIVER_INTEL); enum map {CPU, GTT, WC} map = CPU; enum dir {READ, WRITE, CLEAR, FAULT} dir = READ; int tiling = I915_TILING_NONE; struct timespec start, end; void *buf = malloc(OBJECT_SIZE); uint32_t handle; void *ptr, *src, *dst; int reps = 1; int loops; int c; while ((c = getopt (argc, argv, "m:d:r:t:")) != -1) { switch (c) { case 'm': if (strcmp(optarg, "cpu") == 0) map = CPU; else if (strcmp(optarg, "gtt") == 0) map = GTT; else if (strcmp(optarg, "wc") == 0) map = WC; else abort(); break; case 'd': if (strcmp(optarg, "read") == 0) dir = READ; else if (strcmp(optarg, "write") == 0) dir = WRITE; else if (strcmp(optarg, "clear") == 0) dir = CLEAR; else if (strcmp(optarg, "fault") == 0) dir = FAULT; else abort(); break; case 't': if (strcmp(optarg, "x") == 0) tiling = I915_TILING_X; else if (strcmp(optarg, "y") == 0) tiling = I915_TILING_Y; else if (strcmp(optarg, "none") == 0) tiling = I915_TILING_NONE; else abort(); break; case 'r': reps = atoi(optarg); if (reps < 1) reps = 1; break; default: break; } } handle = gem_create(fd, OBJECT_SIZE); switch (map) { case CPU: ptr = gem_mmap__cpu(fd, handle, 0, OBJECT_SIZE, PROT_WRITE); gem_set_domain(fd, handle, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU); break; case GTT: ptr = gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_WRITE); gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); break; case WC: ptr = gem_mmap__wc(fd, handle, 0, OBJECT_SIZE, PROT_WRITE); gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); break; default: abort(); } gem_set_tiling(fd, handle, tiling, 512); if (dir == READ) { src = ptr; dst = buf; } else { src = buf; dst = ptr; } clock_gettime(CLOCK_MONOTONIC, &start); switch (dir) { case CLEAR: case FAULT: memset(dst, 0, OBJECT_SIZE); break; default: memcpy(dst, src, OBJECT_SIZE); break; } clock_gettime(CLOCK_MONOTONIC, &end); loops = 2 / elapsed(&start, &end); while (reps--) { clock_gettime(CLOCK_MONOTONIC, &start); for (c = 0; c < loops; c++) { int page; switch (dir) { case CLEAR: memset(dst, 0, OBJECT_SIZE); break; case FAULT: munmap(ptr, OBJECT_SIZE); switch (map) { case CPU: ptr = gem_mmap__cpu(fd, handle, 0, OBJECT_SIZE, PROT_WRITE); break; case GTT: ptr = gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_WRITE); break; case WC: ptr = gem_mmap__wc(fd, handle, 0, OBJECT_SIZE, PROT_WRITE); break; default: abort(); } for (page = 0; page < OBJECT_SIZE; page += 4096) { uint32_t *x = (uint32_t *)ptr + page/4; __asm__ __volatile__("": : :"memory"); page += *x; /* should be zero! */ } break; default: memcpy(dst, src, OBJECT_SIZE); break; } } clock_gettime(CLOCK_MONOTONIC, &end); printf("%7.3f\n", OBJECT_SIZE / elapsed(&start, &end) * loops / (1024*1024)); } return 0; } intel-gpu-tools-1.14/benchmarks/gem_blt.c0000644000175000017500000001755412665336131015336 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include "drm.h" #define LOCAL_I915_EXEC_NO_RELOC (1<<11) #define LOCAL_I915_EXEC_HANDLE_LUT (1<<12) #define COPY_BLT_CMD (2<<29|0x53<<22|0x6) #define BLT_WRITE_ALPHA (1<<21) #define BLT_WRITE_RGB (1<<20) #define BLT_SRC_TILED (1<<15) #define BLT_DST_TILED (1<<11) static int has_64bit_reloc; static double elapsed(const struct timespec *start, const struct timespec *end) { return (end->tv_sec - start->tv_sec) + 1e-9*(end->tv_nsec - start->tv_nsec); } static int baseline(uint64_t bytes, int milliseconds) { struct timespec start, end; const int size = 64*1024*1024; int count = 0; void *mem; mem = malloc(size); if (mem == NULL) return 1; clock_gettime(CLOCK_MONOTONIC, &start); do { memset(mem, count, size); count++; clock_gettime(CLOCK_MONOTONIC, &end); if (elapsed(&start, &end) > 0.1) break; } while (1); free(mem); return ceil(1e-3*milliseconds/elapsed(&start, &end) * (count * size) / bytes); } static int gem_linear_blt(int fd, uint32_t *batch, int offset, uint32_t src, uint32_t dst, uint32_t length, struct drm_i915_gem_relocation_entry *reloc) { uint32_t *b = batch + offset/4; int height = length / (16 * 1024); igt_assert_lte(height, 1 << 16); if (height) { int i = 0; b[i++] = COPY_BLT_CMD | BLT_WRITE_ALPHA | BLT_WRITE_RGB; if (has_64bit_reloc) b[i-1]+=2; b[i++] = 0xcc << 16 | 1 << 25 | 1 << 24 | (16*1024); b[i++] = 0; b[i++] = height << 16 | (4*1024); b[i++] = 0; reloc->offset = (b-batch+4) * sizeof(uint32_t); reloc->delta = 0; reloc->target_handle = dst; reloc->read_domains = I915_GEM_DOMAIN_RENDER; reloc->write_domain = I915_GEM_DOMAIN_RENDER; reloc->presumed_offset = 0; reloc++; if (has_64bit_reloc) b[i++] = 0; /* FIXME */ b[i++] = 0; b[i++] = 16*1024; b[i++] = 0; reloc->offset = (b-batch+7) * sizeof(uint32_t); if (has_64bit_reloc) reloc->offset += sizeof(uint32_t); reloc->delta = 0; reloc->target_handle = src; reloc->read_domains = I915_GEM_DOMAIN_RENDER; reloc->write_domain = 0; reloc->presumed_offset = 0; reloc++; if (has_64bit_reloc) b[i++] = 0; /* FIXME */ b += i; length -= height * 16*1024; } if (length) { int i = 0; b[i++] = COPY_BLT_CMD | BLT_WRITE_ALPHA | BLT_WRITE_RGB; if (has_64bit_reloc) b[i-1]+=2; b[i++] = 0xcc << 16 | 1 << 25 | 1 << 24 | (16*1024); b[i++] = height << 16; b[i++] = (1+height) << 16 | (length / 4); b[i++] = 0; reloc->offset = (b-batch+4) * sizeof(uint32_t); reloc->delta = 0; reloc->target_handle = dst; reloc->read_domains = I915_GEM_DOMAIN_RENDER; reloc->write_domain = I915_GEM_DOMAIN_RENDER; reloc->presumed_offset = 0; reloc++; if (has_64bit_reloc) b[i++] = 0; /* FIXME */ b[i++] = height << 16; b[i++] = 16*1024; b[i++] = 0; reloc->offset = (b-batch+7) * sizeof(uint32_t); if (has_64bit_reloc) reloc->offset += sizeof(uint32_t); reloc->delta = 0; reloc->target_handle = src; reloc->read_domains = I915_GEM_DOMAIN_RENDER; reloc->write_domain = 0; reloc->presumed_offset = 0; reloc++; if (has_64bit_reloc) b[i++] = 0; /* FIXME */ b += i; } b[0] = MI_BATCH_BUFFER_END; b[1] = 0; return (b+2 - batch) * sizeof(uint32_t); } #define SYNC 0x1 static int run(int object, int batch, int time, int reps, unsigned flags) { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 exec[3]; struct drm_i915_gem_relocation_entry *reloc; uint32_t *buf, handle, src, dst; int fd, len, gen, size, nreloc; int ring, count; size = ALIGN(batch * 64, 4096); reloc = malloc(sizeof(*reloc)*size/32*2); fd = drm_open_driver(DRIVER_INTEL); handle = gem_create(fd, size); buf = gem_mmap__cpu(fd, handle, 0, size, PROT_WRITE); gen = intel_gen(intel_get_drm_devid(fd)); has_64bit_reloc = gen >= 8; src = gem_create(fd, object); dst = gem_create(fd, object); len = gem_linear_blt(fd, buf, 0, 0, 1, object, reloc); if (has_64bit_reloc) nreloc = len > 56 ? 4 : 2; else nreloc = len > 40 ? 4 : 2; memset(exec, 0, sizeof(exec)); exec[0].handle = src; exec[1].handle = dst; exec[2].handle = handle; exec[2].relocs_ptr = (uintptr_t)reloc; exec[2].relocation_count = nreloc; ring = 0; if (gen >= 6) ring = I915_EXEC_BLT; memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)exec; execbuf.buffer_count = 3; execbuf.batch_len = len; execbuf.flags = ring; execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT; if (__gem_execbuf(fd, &execbuf)) { gem_set_domain(fd, handle, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU); len = gem_linear_blt(fd, buf, 0, src, dst, object, reloc); igt_assert(len == execbuf.batch_len); execbuf.flags = ring; gem_execbuf(fd, &execbuf); } gem_sync(fd, handle); if (batch > 1) { if (execbuf.flags & LOCAL_I915_EXEC_HANDLE_LUT) { src = 0; dst = 1; } gem_set_domain(fd, handle, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU); for (int i = 1; i < batch; i++) { len = gem_linear_blt(fd, buf, len - 8, src, dst, object, reloc + nreloc * i); } exec[2].relocation_count = nreloc * batch; execbuf.batch_len = len; gem_execbuf(fd, &execbuf); gem_sync(fd, handle); } if (execbuf.flags & LOCAL_I915_EXEC_HANDLE_LUT) execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC; /* Guess how many loops we need for 0.1s */ count = baseline((uint64_t)object * batch, 100); if (flags & SYNC) { time *= count / 2; count = 1; } while (reps--) { double min = HUGE_VAL; for (int s = 0; s <= time / 100; s++) { struct timespec start, end; double t; clock_gettime(CLOCK_MONOTONIC, &start); for (int loop = 0; loop < count; loop++) gem_execbuf(fd, &execbuf); gem_sync(fd, handle); clock_gettime(CLOCK_MONOTONIC, &end); t = elapsed(&start, &end); if (t < min) min = t; } printf("%7.3f\n", object/(1024*1024.)*batch*count/min); } close(fd); return 0; } int main(int argc, char **argv) { int size = 1024*1024; int reps = 13; int time = 2000; int batch = 1; unsigned flags = 0; int c; while ((c = getopt (argc, argv, "Ss:b:r:t:")) != -1) { switch (c) { case 's': size = atoi(optarg); if (size < 4096) size = 4096; break; case 'S': flags |= SYNC; break; case 't': time = atoi(optarg); if (time < 1) time = 1; break; case 'r': reps = atoi(optarg); if (reps < 1) reps = 1; break; case 'b': batch = atoi(optarg); if (batch < 1) batch = 1; break; default: break; } } return run(size, batch, time, reps, flags); } intel-gpu-tools-1.14/benchmarks/gem_userptr_benchmark.c0000644000175000017500000002627612665336131020274 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Tvrtko Ursulin * */ /** @file gem_userptr_benchmark.c * * Benchmark the userptr code and impact of having userptr surfaces * in process address space on some normal operations. * */ #include #include #include #include #include #include #include #include #include #include #include #include "drm.h" #include "i915_drm.h" #include "drmtest.h" #include "intel_bufmgr.h" #include "intel_batchbuffer.h" #include "intel_chipset.h" #include "ioctl_wrappers.h" #include "igt_aux.h" #ifndef PAGE_SIZE #define PAGE_SIZE 4096 #endif static uint32_t userptr_flags = LOCAL_I915_USERPTR_UNSYNCHRONIZED; #define BO_SIZE (65536) static void gem_userptr_test_unsynchronized(void) { userptr_flags = LOCAL_I915_USERPTR_UNSYNCHRONIZED; } static void gem_userptr_test_synchronized(void) { userptr_flags = 0; } static void **handle_ptr_map; static unsigned int num_handle_ptr_map; static void add_handle_ptr(uint32_t handle, void *ptr) { if (handle >= num_handle_ptr_map) { handle_ptr_map = realloc(handle_ptr_map, (handle + 1000) * sizeof(void*)); num_handle_ptr_map = handle + 1000; } handle_ptr_map[handle] = ptr; } static void *get_handle_ptr(uint32_t handle) { return handle_ptr_map[handle]; } static void free_handle_ptr(uint32_t handle) { igt_assert(handle < num_handle_ptr_map); igt_assert(handle_ptr_map[handle]); free(handle_ptr_map[handle]); handle_ptr_map[handle] = NULL; } static uint32_t create_userptr_bo(int fd, int size) { void *ptr; uint32_t handle; int ret; ret = posix_memalign(&ptr, PAGE_SIZE, size); igt_assert(ret == 0); gem_userptr(fd, (uint32_t *)ptr, size, 0, userptr_flags, &handle); add_handle_ptr(handle, ptr); return handle; } static void free_userptr_bo(int fd, uint32_t handle) { gem_close(fd, handle); free_handle_ptr(handle); } static int has_userptr(int fd) { uint32_t handle = 0; void *ptr; uint32_t oldflags; int ret; assert(posix_memalign(&ptr, PAGE_SIZE, PAGE_SIZE) == 0); oldflags = userptr_flags; gem_userptr_test_unsynchronized(); ret = __gem_userptr(fd, ptr, PAGE_SIZE, 0, userptr_flags, &handle); userptr_flags = oldflags; if (ret != 0) { free(ptr); return 0; } gem_close(fd, handle); free(ptr); return handle != 0; } static const unsigned int nr_bos[] = {0, 1, 10, 100, 1000, 10000}; static const unsigned int test_duration_sec = 3; static volatile unsigned int run_test; static void alarm_handler(int sig) { assert(run_test == 1); run_test = 0; } static void start_test(unsigned int duration) { run_test = 1; if (duration == 0) duration = test_duration_sec; signal(SIGALRM, alarm_handler); alarm(duration); } static void exchange_ptr(void *array, unsigned i, unsigned j) { void **arr, *tmp; arr = (void **)array; tmp = arr[i]; arr[i] = arr[j]; arr[j] = tmp; } static void test_malloc_free(int random) { unsigned long iter = 0; unsigned int i, tot = 1000; void *ptr[tot]; start_test(test_duration_sec); while (run_test) { for (i = 0; i < tot; i++) { ptr[i] = malloc(1000); assert(ptr[i]); } if (random) igt_permute_array(ptr, tot, exchange_ptr); for (i = 0; i < tot; i++) free(ptr[i]); iter++; } printf("%8lu iter/s\n", iter / test_duration_sec); } static void test_malloc_realloc_free(int random) { unsigned long iter = 0; unsigned int i, tot = 1000; void *ptr[tot]; start_test(test_duration_sec); while (run_test) { for (i = 0; i < tot; i++) { ptr[i] = malloc(1000); assert(ptr[i]); } if (random) igt_permute_array(ptr, tot, exchange_ptr); for (i = 0; i < tot; i++) { ptr[i] = realloc(ptr[i], 2000); assert(ptr[i]); } if (random) igt_permute_array(ptr, tot, exchange_ptr); for (i = 0; i < tot; i++) free(ptr[i]); iter++; } printf("%8lu iter/s\n", iter / test_duration_sec); } static void test_mmap_unmap(int random) { unsigned long iter = 0; unsigned int i, tot = 1000; void *ptr[tot]; start_test(test_duration_sec); while (run_test) { for (i = 0; i < tot; i++) { ptr[i] = mmap(NULL, 1000, PROT_READ | PROT_WRITE, MAP_ANONYMOUS | MAP_PRIVATE, -1, 0); assert(ptr[i] != MAP_FAILED); } if (random) igt_permute_array(ptr, tot, exchange_ptr); for (i = 0; i < tot; i++) munmap(ptr[i], 1000); iter++; } printf("%8lu iter/s\n", iter / test_duration_sec); } static void test_ptr_read(void *ptr) { unsigned long iter = 0; volatile unsigned long *p; unsigned long i, loops; loops = BO_SIZE / sizeof(unsigned long) / 4; start_test(test_duration_sec); while (run_test) { p = (unsigned long *)ptr; for (i = 0; i < loops; i++) { (void)*p++; (void)*p++; (void)*p++; (void)*p++; } iter++; } printf("%8lu MB/s\n", iter / test_duration_sec * BO_SIZE / 1000000); } static void test_ptr_write(void *ptr) { unsigned long iter = 0; volatile unsigned long *p; register unsigned long i, loops; loops = BO_SIZE / sizeof(unsigned long) / 4; start_test(test_duration_sec); while (run_test) { p = (unsigned long *)ptr; for (i = 0; i < loops; i++) { *p++ = i; *p++ = i; *p++ = i; *p++ = i; } iter++; } printf("%8lu MB/s\n", iter / test_duration_sec * BO_SIZE / 1000000); } static void do_impact_tests(unsigned int n, const char *pfix, const char *pfix2, void *ptr) { printf("%s%sptr-read, %5u bos = ", pfix, pfix2, n); test_ptr_read(ptr); printf("%s%sptr-write %5u bos = ", pfix, pfix2, n); test_ptr_write(ptr); printf("%s%smalloc-free, %5u bos = ", pfix, pfix2, n); test_malloc_free(0); printf("%s%smalloc-free-random %5u bos = ", pfix, pfix2, n); test_malloc_free(1); printf("%s%smalloc-realloc-free, %5u bos = ", pfix, pfix2, n); test_malloc_realloc_free(0); printf("%s%smalloc-realloc-free-random, %5u bos = ", pfix, pfix2, n); test_malloc_realloc_free(1); printf("%s%smmap-unmap, %5u bos = ", pfix, pfix2, n); test_mmap_unmap(0); printf("%s%smmap-unmap-random, %5u bos = ", pfix, pfix2, n); test_mmap_unmap(1); } static void test_impact_overlap(int fd, const char *prefix) { unsigned int total = sizeof(nr_bos) / sizeof(nr_bos[0]); unsigned int subtest, i; uint32_t handles[nr_bos[total-1]]; void *block = NULL; void *ptr; unsigned char *p; char buffer[BO_SIZE]; int ret; for (subtest = 0; subtest < total; subtest++) { if (nr_bos[subtest] > 0) { igt_assert(PAGE_SIZE < BO_SIZE); ret = posix_memalign(&block, PAGE_SIZE, PAGE_SIZE * nr_bos[subtest] + BO_SIZE); igt_assert(ret == 0); for (i = 0, p = block; i < nr_bos[subtest]; i++, p += PAGE_SIZE) gem_userptr(fd, (uint32_t *)p, BO_SIZE, 0, userptr_flags, &handles[i]); } if (nr_bos[subtest] > 0) ptr = block; else ptr = buffer; do_impact_tests(nr_bos[subtest], prefix, "overlap-", ptr); for (i = 0; i < nr_bos[subtest]; i++) gem_close(fd, handles[i]); if (block) free(block); } } static void test_impact(int fd, const char *prefix) { unsigned int total = sizeof(nr_bos) / sizeof(nr_bos[0]); unsigned int subtest, i; uint32_t handles[nr_bos[total-1]]; void *ptr; char buffer[BO_SIZE]; for (subtest = 0; subtest < total; subtest++) { for (i = 0; i < nr_bos[subtest]; i++) handles[i] = create_userptr_bo(fd, BO_SIZE); if (nr_bos[subtest] > 0) ptr = get_handle_ptr(handles[0]); else ptr = buffer; do_impact_tests(nr_bos[subtest], prefix, "no-overlap-", ptr); for (i = 0; i < nr_bos[subtest]; i++) free_userptr_bo(fd, handles[i]); } } static void test_single(int fd) { char *ptr, *bo_ptr; uint32_t handle = 0; unsigned long iter = 0; unsigned long map_size = BO_SIZE + PAGE_SIZE - 1; ptr = mmap(NULL, map_size, PROT_READ | PROT_WRITE, MAP_ANONYMOUS | MAP_PRIVATE, -1, 0); assert(ptr != MAP_FAILED); bo_ptr = (char *)ALIGN((unsigned long)ptr, PAGE_SIZE); start_test(test_duration_sec); while (run_test) { gem_userptr(fd, bo_ptr, BO_SIZE, 0, userptr_flags, &handle); gem_close(fd, handle); iter++; } munmap(ptr, map_size); printf("%8lu iter/s\n", iter / test_duration_sec); } static void test_multiple(int fd, unsigned int batch, int random) { char *ptr, *bo_ptr; uint32_t handles[10000]; int map[10000]; unsigned long iter = 0; int i; unsigned long map_size = batch * BO_SIZE + PAGE_SIZE - 1; assert(batch < (sizeof(handles) / sizeof(handles[0]))); assert(batch < (sizeof(map) / sizeof(map[0]))); ptr = mmap(NULL, map_size, PROT_READ | PROT_WRITE, MAP_ANONYMOUS | MAP_PRIVATE, -1, 0); assert(ptr != MAP_FAILED); bo_ptr = (char *)ALIGN((unsigned long)ptr, PAGE_SIZE); for (i = 0; i < batch; i++) map[i] = i; start_test(test_duration_sec); while (run_test) { if (random) igt_permute_array(map, batch, igt_exchange_int); for (i = 0; i < batch; i++) { gem_userptr(fd, bo_ptr + map[i] * BO_SIZE, BO_SIZE, 0, userptr_flags, &handles[i]); } if (random) igt_permute_array(map, batch, igt_exchange_int); for (i = 0; i < batch; i++) gem_close(fd, handles[map[i]]); iter++; } munmap(ptr, map_size); printf("%8lu iter/s\n", iter * batch / test_duration_sec); } static void test_userptr(int fd) { printf("create-destroy = "); test_single(fd); printf("multi-create-destroy = "); test_multiple(fd, 100, 0); printf("multi-create-destroy-random = "); test_multiple(fd, 100, 1); } int main(int argc, char **argv) { int fd = -1, ret; igt_skip_on_simulation(); igt_subtest_init(argc, argv); fd = drm_open_driver(DRIVER_INTEL); igt_assert(fd >= 0); ret = has_userptr(fd); igt_skip_on_f(ret == 0, "No userptr support - %s (%d)\n", strerror(errno), ret); gem_userptr_test_unsynchronized(); igt_subtest("userptr-unsync") test_userptr(fd); igt_subtest("userptr-impact-unsync") test_impact(fd, "unsync-"); igt_subtest("userptr-impact-unsync-overlap") test_impact_overlap(fd, "unsync-"); gem_userptr_test_synchronized(); igt_subtest("userptr-sync") test_userptr(fd); igt_subtest("userptr-impact-sync") test_impact(fd, "sync-"); igt_subtest("userptr-impact-sync-overlap") test_impact_overlap(fd, "sync-"); igt_exit(); return 0; } intel-gpu-tools-1.14/benchmarks/gem_latency.c0000644000175000017500000003642012665336131016205 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ #define _GNU_SOURCE #include #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include "drm.h" static int done; static int fd; static volatile uint32_t *timestamp_reg; #define REG(x) (volatile uint32_t *)((volatile char *)igt_global_mmio + x) #define REG_OFFSET(x) ((volatile char *)(x) - (volatile char *)igt_global_mmio) static uint32_t read_timestamp_unlocked(void) { return *timestamp_reg; } static uint32_t (*read_timestamp)(void) = read_timestamp_unlocked; #ifdef __USE_XOPEN2K static pthread_spinlock_t timestamp_lock; static uint32_t read_timestamp_locked(void) { uint32_t t; pthread_spin_lock(×tamp_lock); t = *timestamp_reg; pthread_spin_unlock(×tamp_lock); return t; } static int setup_timestamp_locked(void) { if (pthread_spin_init(×tamp_lock, 0)) return 0; read_timestamp = read_timestamp_locked; return 1; } #else static int setup_timestamp_locked(void) { return 0; } #endif struct consumer { pthread_t thread; int go; igt_stats_t latency; struct producer *producer; }; struct producer { pthread_t thread; uint32_t ctx; struct { struct drm_i915_gem_exec_object2 exec[1]; struct drm_i915_gem_execbuffer2 execbuf; } nop_dispatch; struct { struct drm_i915_gem_exec_object2 exec[2]; struct drm_i915_gem_execbuffer2 execbuf; } workload_dispatch; struct { struct drm_i915_gem_exec_object2 exec[1]; struct drm_i915_gem_relocation_entry reloc[1]; struct drm_i915_gem_execbuffer2 execbuf; } latency_dispatch; pthread_mutex_t lock; pthread_cond_t p_cond, c_cond; uint32_t *last_timestamp; int wait; int complete; int done; igt_stats_t latency, dispatch; int nop; int nconsumers; struct consumer *consumers; }; #define LOCAL_EXEC_NO_RELOC (1<<11) #define COPY_BLT_CMD (2<<29|0x53<<22|0x6) #define BLT_WRITE_ALPHA (1<<21) #define BLT_WRITE_RGB (1<<20) #define WIDTH 1024 #define HEIGHT 1024 #define RCS_TIMESTAMP (0x2000 + 0x358) #define BCS_TIMESTAMP (0x22000 + 0x358) #define CYCLES_TO_NS(x) (80.*(x)) #define CYCLES_TO_US(x) (CYCLES_TO_NS(x)/1000.) static uint32_t create_workload(int gen, int factor) { const int has_64bit_reloc = gen >= 8; uint32_t handle = gem_create(fd, 4096); uint32_t *map = gem_mmap__cpu(fd, handle, 0, 4096, PROT_WRITE); int i = 0; while (factor--) { /* XY_SRC_COPY */ map[i++] = COPY_BLT_CMD | BLT_WRITE_ALPHA | BLT_WRITE_RGB; if (has_64bit_reloc) map[i-1] += 2; map[i++] = 0xcc << 16 | 1 << 25 | 1 << 24 | (4*WIDTH); map[i++] = 0; map[i++] = HEIGHT << 16 | WIDTH; map[i++] = 0; if (has_64bit_reloc) map[i++] = 0; map[i++] = 0; map[i++] = 4096; map[i++] = 0; if (has_64bit_reloc) map[i++] = 0; } map[i++] = MI_BATCH_BUFFER_END; munmap(map, 4096); return handle; } static void setup_workload(struct producer *p, int gen, uint32_t scratch, uint32_t batch, int factor) { struct drm_i915_gem_execbuffer2 *eb; const int has_64bit_reloc = gen >= 8; struct drm_i915_gem_relocation_entry *reloc; int offset; reloc = calloc(sizeof(*reloc), 2*factor); p->workload_dispatch.exec[0].handle = scratch; p->workload_dispatch.exec[1].relocation_count = 2*factor; p->workload_dispatch.exec[1].relocs_ptr = (uintptr_t)reloc; p->workload_dispatch.exec[1].handle = batch; offset = 0; while (factor--) { reloc->offset = (offset+4) * sizeof(uint32_t); reloc->target_handle = scratch; reloc->read_domains = I915_GEM_DOMAIN_RENDER; reloc->write_domain = I915_GEM_DOMAIN_RENDER; reloc++; reloc->offset = (offset+7) * sizeof(uint32_t); if (has_64bit_reloc) reloc->offset += sizeof(uint32_t); reloc->target_handle = scratch; reloc->read_domains = I915_GEM_DOMAIN_RENDER; reloc++; offset += 8; if (has_64bit_reloc) offset += 2; } eb = memset(&p->workload_dispatch.execbuf, 0, sizeof(*eb)); eb->buffers_ptr = (uintptr_t)p->workload_dispatch.exec; eb->buffer_count = 2; eb->flags = I915_EXEC_BLT | LOCAL_EXEC_NO_RELOC; eb->rsvd1 = p->ctx; } static void setup_latency(struct producer *p, int gen) { struct drm_i915_gem_execbuffer2 *eb; const int has_64bit_reloc = gen >= 8; uint32_t handle; uint32_t *map; int i = 0; handle = gem_create(fd, 4096); if (gem_has_llc(fd)) map = gem_mmap__cpu(fd, handle, 0, 4096, PROT_WRITE); else map = gem_mmap__gtt(fd, handle, 4096, PROT_WRITE); p->latency_dispatch.exec[0].relocation_count = 1; p->latency_dispatch.exec[0].relocs_ptr = (uintptr_t)p->latency_dispatch.reloc; p->latency_dispatch.exec[0].handle = handle; /* MI_STORE_REG_MEM */ map[i++] = 0x24 << 23 | 1; if (has_64bit_reloc) map[i-1]++; map[i++] = REG_OFFSET(timestamp_reg); p->latency_dispatch.reloc[0].offset = i * sizeof(uint32_t); p->latency_dispatch.reloc[0].delta = 4000; p->latency_dispatch.reloc[0].target_handle = handle; p->latency_dispatch.reloc[0].read_domains = I915_GEM_DOMAIN_INSTRUCTION; p->latency_dispatch.reloc[0].write_domain = 0; /* We lie! */ p->latency_dispatch.reloc[0].presumed_offset = 0; p->last_timestamp = &map[1000]; map[i++] = 4000; if (has_64bit_reloc) map[i++] = 0; map[i++] = MI_BATCH_BUFFER_END; eb = memset(&p->latency_dispatch.execbuf, 0, sizeof(*eb)); eb->buffers_ptr = (uintptr_t)p->latency_dispatch.exec; eb->buffer_count = 1; eb->flags = I915_EXEC_BLT | LOCAL_EXEC_NO_RELOC; eb->rsvd1 = p->ctx; } static uint32_t create_nop(void) { uint32_t buf = MI_BATCH_BUFFER_END; uint32_t handle; handle = gem_create(fd, 4096); gem_write(fd, handle, 0, &buf, sizeof(buf)); return handle; } static void setup_nop(struct producer *p, uint32_t batch) { struct drm_i915_gem_execbuffer2 *eb; p->nop_dispatch.exec[0].handle = batch; eb = memset(&p->nop_dispatch.execbuf, 0, sizeof(*eb)); eb->buffers_ptr = (uintptr_t)p->nop_dispatch.exec; eb->buffer_count = 1; eb->flags = I915_EXEC_BLT | LOCAL_EXEC_NO_RELOC; eb->rsvd1 = p->ctx; } static void measure_latency(struct producer *p, igt_stats_t *stats) { gem_sync(fd, p->latency_dispatch.exec[0].handle); igt_stats_push(stats, read_timestamp() - *p->last_timestamp); } static void *producer(void *arg) { struct producer *p = arg; int n; while (!done) { uint32_t start = read_timestamp(); int batches; /* Control the amount of work we do, similar to submitting * empty buffers below, except this time we will load the * GPU with a small amount of real work - so there is a small * period between execution and interrupts. */ gem_execbuf(fd, &p->workload_dispatch.execbuf); /* Submitting a set of empty batches has a two fold effect: * - increases contention on execbuffer, i.e. measure dispatch * latency with number of clients. * - generates lots of spurious interrupts (if someone is * waiting). */ batches = p->nop; while (batches--) gem_execbuf(fd, &p->nop_dispatch.execbuf); /* Finally, execute a batch that just reads the current * TIMESTAMP so we can measure the latency. */ gem_execbuf(fd, &p->latency_dispatch.execbuf); /* Wake all the associated clients to wait upon our batch */ p->wait = p->nconsumers; for (n = 0; n < p->nconsumers; n++) p->consumers[n].go = 1; pthread_cond_broadcast(&p->c_cond); /* Wait for this batch to finish and record how long we waited, * and how long it took for the batch to be submitted * (including the nop delays). */ measure_latency(p, &p->latency); igt_stats_push(&p->dispatch, *p->last_timestamp - start); /* Tidy up all the extra threads before we submit again. */ pthread_mutex_lock(&p->lock); while (p->wait) pthread_cond_wait(&p->p_cond, &p->lock); pthread_mutex_unlock(&p->lock); p->complete++; } pthread_mutex_lock(&p->lock); p->wait = p->nconsumers; p->done = true; for (n = 0; n < p->nconsumers; n++) p->consumers[n].go = 1; pthread_cond_broadcast(&p->c_cond); pthread_mutex_unlock(&p->lock); return NULL; } static void *consumer(void *arg) { struct consumer *c = arg; struct producer *p = c->producer; /* Sit around waiting for the "go" signal from the producer, then * wait upon the batch to finish. This is to add extra waiters to * the same request - increasing wakeup contention. */ do { pthread_mutex_lock(&p->lock); if (--p->wait == 0) pthread_cond_signal(&p->p_cond); while (!c->go) pthread_cond_wait(&p->c_cond, &p->lock); c->go = 0; pthread_mutex_unlock(&p->lock); if (p->done) return NULL; measure_latency(p, &c->latency); } while (1); } static double l_estimate(igt_stats_t *stats) { if (stats->n_values > 9) return igt_stats_get_trimean(stats); else if (stats->n_values > 5) return igt_stats_get_median(stats); else return igt_stats_get_mean(stats); } static double cpu_time(const struct rusage *r) { return 10e6*(r->ru_utime.tv_sec + r->ru_stime.tv_sec) + (r->ru_utime.tv_usec + r->ru_stime.tv_usec); } #define CONTEXT 1 #define REALTIME 2 static int run(int seconds, int nproducers, int nconsumers, int nop, int workload, unsigned flags) { pthread_attr_t attr; struct producer *p; igt_stats_t platency, latency, dispatch; struct rusage rused; uint32_t nop_batch; uint32_t workload_batch; uint32_t scratch; int gen, n, m; int complete; int nrun; #if 0 printf("producers=%d, consumers=%d, nop=%d, workload=%d, flags=%x\n", nproducers, nconsumers, nop, workload, flags); #endif fd = drm_open_driver(DRIVER_INTEL); gen = intel_gen(intel_get_drm_devid(fd)); if (gen < 6) return IGT_EXIT_SKIP; /* Needs BCS timestamp */ intel_register_access_init(intel_get_pci_device(), false); if (gen == 6) timestamp_reg = REG(RCS_TIMESTAMP); else timestamp_reg = REG(BCS_TIMESTAMP); if (gen < 8 && !setup_timestamp_locked()) return IGT_EXIT_SKIP; nrun = read_timestamp(); usleep(1); if (read_timestamp() == nrun) return IGT_EXIT_SKIP; scratch = gem_create(fd, 4*WIDTH*HEIGHT); nop_batch = create_nop(); workload_batch = create_workload(gen, workload); p = calloc(nproducers, sizeof(*p)); for (n = 0; n < nproducers; n++) { if (flags & CONTEXT) p[n].ctx = gem_context_create(fd); setup_nop(&p[n], nop_batch); setup_workload(&p[n], gen, scratch, workload_batch, workload); setup_latency(&p[n], gen); pthread_mutex_init(&p[n].lock, NULL); pthread_cond_init(&p[n].p_cond, NULL); pthread_cond_init(&p[n].c_cond, NULL); igt_stats_init(&p[n].latency); igt_stats_init(&p[n].dispatch); p[n].wait = nconsumers; p[n].nop = nop; p[n].nconsumers = nconsumers; p[n].consumers = calloc(nconsumers, sizeof(struct consumer)); for (m = 0; m < nconsumers; m++) { p[n].consumers[m].producer = &p[n]; igt_stats_init(&p[n].consumers[m].latency); pthread_create(&p[n].consumers[m].thread, NULL, consumer, &p[n].consumers[m]); } pthread_mutex_lock(&p->lock); while (p->wait) pthread_cond_wait(&p->p_cond, &p->lock); pthread_mutex_unlock(&p->lock); } pthread_attr_init(&attr); if (flags & REALTIME) { #ifdef PTHREAD_EXPLICIT_SCHED struct sched_param param = { .sched_priority = 99 }; pthread_attr_setinheritsched(&attr, PTHREAD_EXPLICIT_SCHED); pthread_attr_setschedpolicy(&attr, SCHED_FIFO); pthread_attr_setschedparam(&attr, ¶m); #else return IGT_EXIT_SKIP; #endif } for (n = 0; n < nproducers; n++) pthread_create(&p[n].thread, &attr, producer, &p[n]); sleep(seconds); done = true; nrun = complete = 0; igt_stats_init_with_size(&dispatch, nproducers); igt_stats_init_with_size(&platency, nproducers); igt_stats_init_with_size(&latency, nconsumers*nproducers); for (n = 0; n < nproducers; n++) { pthread_join(p[n].thread, NULL); if (!p[n].complete) continue; nrun++; complete += p[n].complete; igt_stats_push_float(&latency, l_estimate(&p[n].latency)); igt_stats_push_float(&platency, l_estimate(&p[n].latency)); igt_stats_push_float(&dispatch, l_estimate(&p[n].dispatch)); for (m = 0; m < nconsumers; m++) { pthread_join(p[n].consumers[m].thread, NULL); igt_stats_push_float(&latency, l_estimate(&p[n].consumers[m].latency)); } } getrusage(RUSAGE_SELF, &rused); switch ((flags >> 8) & 0xf) { default: printf("%d/%d: %7.3fus %7.3fus %7.3fus %7.3fus\n", complete, nrun, CYCLES_TO_US(l_estimate(&dispatch)), CYCLES_TO_US(l_estimate(&latency)), CYCLES_TO_US(l_estimate(&platency)), cpu_time(&rused) / complete); break; case 1: printf("%f\n", CYCLES_TO_US(l_estimate(&dispatch))); break; case 2: printf("%f\n", CYCLES_TO_US(l_estimate(&latency))); break; case 3: printf("%f\n", CYCLES_TO_US(l_estimate(&platency))); break; case 4: printf("%f\n", cpu_time(&rused) / complete); break; } return 0; } int main(int argc, char **argv) { int time = 10; int producers = 1; int consumers = 0; int nop = 0; int workload = 0; unsigned flags = 0; int c; while ((c = getopt(argc, argv, "p:c:n:w:t:f:sR")) != -1) { switch (c) { case 'p': /* How many threads generate work? */ producers = atoi(optarg); if (producers < 1) producers = 1; break; case 'c': /* How many threads wait upon each piece of work? */ consumers = atoi(optarg); if (consumers < 0) consumers = 0; break; case 'n': /* Extra dispatch contention + interrupts */ nop = atoi(optarg); if (nop < 0) nop = 0; break; case 'w': /* Control the amount of real work done */ workload = atoi(optarg); if (workload < 0) workload = 0; if (workload > 100) workload = 100; break; case 't': /* How long to run the benchmark for (seconds) */ time = atoi(optarg); if (time < 0) time = INT_MAX; break; case 'f': /* Select an output field */ flags |= atoi(optarg) << 8; break; case 's': /* Assign each producer to its own context, adding * context switching into the mix (e.g. execlists * can amalgamate requests from one context, so * having each producer submit in different contexts * should force more execlist interrupts). */ flags |= CONTEXT; break; case 'R': /* Run the producers at RealTime priority */ flags |= REALTIME; break; default: break; } } return run(time, producers, consumers, nop, workload, flags); } intel-gpu-tools-1.14/benchmarks/intel_upload_blit_large_map.c0000644000175000017500000001131312665336131021410 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * */ /** * Roughly simulates repeatedly uploading frames of images, by uploading * the data all at once with pwrite, and then blitting it to another buffer. * * You might think of this like a movie player, but that wouldn't be entirely * accurate, since the access patterns of the memory would be different * (generally, smaller source image, upscaled, an thus different memory access * pattern in both texel fetch for the stretching and the destination writes). * However, some things like swfdec would be doing something like this since * they compute their data in host memory and upload the full sw rendered * frame. * * Additionally, those applications should be rendering at the screen refresh * rate, while this test has no limits, and so can get itself into the * working set larger than aperture size performance disaster. * * The current workload we have that does large drm_intel_bo_map() * uploads is texture upload for OpenGL (as it frequently is doing * reformatting as it uploads the user's data, making bo_subdata less * suitable) */ #include "igt.h" #include #include #include #include #include #include #include #include #include #define OBJECT_WIDTH 1280 #define OBJECT_HEIGHT 720 static double get_time_in_secs(void) { struct timeval tv; gettimeofday(&tv, NULL); return (double)tv.tv_sec + tv.tv_usec / 1000000.0; } static void do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch, drm_intel_bo *dst_bo, int width, int height) { uint32_t *data; drm_intel_bo *src_bo; int i; static uint32_t seed = 1; src_bo = drm_intel_bo_alloc(bufmgr, "src", width * height * 4, 4096); drm_intel_bo_map(src_bo, 1); data = src_bo->virtual; for (i = 0; i < width * height; i++) { data[i] = seed++; } drm_intel_bo_unmap(src_bo); /* Render the junk to the dst. */ BLIT_COPY_BATCH_START(0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ (width * 4) /* dst pitch */); OUT_BATCH(0); /* dst x1,y1 */ OUT_BATCH((height << 16) | width); /* dst x2,y2 */ OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(0); /* src x1,y1 */ OUT_BATCH(width * 4); /* src pitch */ OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); drm_intel_bo_unreference(src_bo); } int main(int argc, char **argv) { int fd; int object_size = OBJECT_WIDTH * OBJECT_HEIGHT * 4; double start_time, end_time; drm_intel_bo *dst_bo; drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; int i; fd = drm_open_driver(DRIVER_INTEL); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); drm_intel_bufmgr_gem_enable_reuse(bufmgr); batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd)); dst_bo = drm_intel_bo_alloc(bufmgr, "dst", object_size, 4096); /* Prep loop to get us warmed up. */ for (i = 0; i < 60; i++) { do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT); } drm_intel_bo_wait_rendering(dst_bo); /* Do the actual timing. */ start_time = get_time_in_secs(); for (i = 0; i < 200; i++) { do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT); } drm_intel_bo_wait_rendering(dst_bo); end_time = get_time_in_secs(); printf("%d iterations in %.03f secs: %.01f MB/sec\n", i, end_time - start_time, (double)i * OBJECT_WIDTH * OBJECT_HEIGHT * 4 / 1024.0 / 1024.0 / (end_time - start_time)); intel_batchbuffer_free(batch); drm_intel_bufmgr_destroy(bufmgr); close(fd); return 0; } intel-gpu-tools-1.14/tests/0000755000175000017500000000000012665337376012666 500000000000000intel-gpu-tools-1.14/tests/kms_vblank.c0000644000175000017500000001202612665336131015066 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ /** @file kms_vblank.c * * This is a test of performance of drmWaitVblank. */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include "intel_bufmgr.h" IGT_TEST_DESCRIPTION("Test speed of WaitVblank."); static double elapsed(const struct timespec *start, const struct timespec *end, int loop) { return (1e6*(end->tv_sec - start->tv_sec) + (end->tv_nsec - start->tv_nsec)/1000)/loop; } static bool crtc0_active(int fd) { union drm_wait_vblank vbl; memset(&vbl, 0, sizeof(vbl)); vbl.request.type = DRM_VBLANK_RELATIVE; return drmIoctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl) == 0; } static void accuracy(int fd) { union drm_wait_vblank vbl; unsigned long target; int n; memset(&vbl, 0, sizeof(vbl)); vbl.request.type = DRM_VBLANK_RELATIVE; vbl.request.sequence = 1; do_ioctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl); target = vbl.reply.sequence + 60; for (n = 0; n < 60; n++) { vbl.request.type = DRM_VBLANK_RELATIVE; vbl.request.sequence = 1; do_ioctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl); vbl.request.type = DRM_VBLANK_ABSOLUTE | DRM_VBLANK_EVENT; vbl.request.sequence = target; do_ioctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl); } vbl.request.type = DRM_VBLANK_RELATIVE; vbl.request.sequence = 0; do_ioctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl); igt_assert_eq(vbl.reply.sequence, target); for (n = 0; n < 60; n++) { struct drm_event_vblank ev; igt_assert_eq(read(fd, &ev, sizeof(ev)), sizeof(ev)); igt_assert_eq(ev.sequence, target); } } static void vblank_query(int fd, bool busy) { union drm_wait_vblank vbl; struct timespec start, end; unsigned long sq, count = 0; struct drm_event_vblank buf; memset(&vbl, 0, sizeof(vbl)); if (busy) { vbl.request.type = DRM_VBLANK_RELATIVE | DRM_VBLANK_EVENT; vbl.request.sequence = 72; do_ioctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl); } vbl.request.type = DRM_VBLANK_RELATIVE; vbl.request.sequence = 0; do_ioctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl); sq = vbl.reply.sequence; clock_gettime(CLOCK_MONOTONIC, &start); do { vbl.request.type = DRM_VBLANK_RELATIVE; vbl.request.sequence = 0; do_ioctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl); count++; } while ((vbl.reply.sequence - sq) <= 60); clock_gettime(CLOCK_MONOTONIC, &end); igt_info("Time to query current counter (%s): %7.3fµs\n", busy ? "busy" : "idle", elapsed(&start, &end, count)); if (busy) igt_assert_eq(read(fd, &buf, sizeof(buf)), sizeof(buf)); } static void vblank_wait(int fd, bool busy) { union drm_wait_vblank vbl; struct timespec start, end; unsigned long sq, count = 0; struct drm_event_vblank buf; memset(&vbl, 0, sizeof(vbl)); if (busy) { vbl.request.type = DRM_VBLANK_RELATIVE | DRM_VBLANK_EVENT; vbl.request.sequence = 72; do_ioctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl); } vbl.request.type = DRM_VBLANK_RELATIVE; vbl.request.sequence = 0; do_ioctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl); sq = vbl.reply.sequence; clock_gettime(CLOCK_MONOTONIC, &start); do { vbl.request.type = DRM_VBLANK_RELATIVE; vbl.request.sequence = 1; do_ioctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl); count++; } while ((vbl.reply.sequence - sq) <= 60); clock_gettime(CLOCK_MONOTONIC, &end); igt_info("Time to wait for %ld/%d vblanks (%s): %7.3fµs\n", count, (int)(vbl.reply.sequence - sq), busy ? "busy" : "idle", elapsed(&start, &end, count)); if (busy) igt_assert_eq(read(fd, &buf, sizeof(buf)), sizeof(buf)); } igt_main { int fd; igt_skip_on_simulation(); igt_fixture { fd = drm_open_driver(DRIVER_INTEL); igt_require(crtc0_active(fd)); } igt_subtest("accuracy") accuracy(fd); igt_subtest("query-idle") vblank_query(fd, false); igt_subtest("query-busy") vblank_query(fd, true); igt_subtest("wait-idle") vblank_wait(fd, false); igt_subtest("wait-busy") vblank_wait(fd, true); } intel-gpu-tools-1.14/tests/gem_hangcheck_forcewake.c0000644000175000017500000000670412665336131017536 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * */ #include "igt.h" #include #include #include #include #include #include #include #include #include "drm.h" #include "intel_bufmgr.h" IGT_TEST_DESCRIPTION("Provoke the hangcheck timer on an otherwise idle" " system."); /* * Testcase: Provoke the hangcheck timer on an otherwise idle system * * This tries to hit forcewake locking bugs when the hangcheck runs. Somehow we * often luck out and the hangcheck runs while someone else is already holding * the dev->struct_mutex. * * It's imperative that nothing else runs while this test runs, i.e. kill your X * session, please. */ static drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; uint32_t blob[2048*2048]; #define MAX_BLT_SIZE 128 igt_simple_main { drm_intel_bo *bo = NULL; uint32_t tiling_mode = I915_TILING_X; unsigned long pitch, act_size; int fd, i, devid; igt_skip_on_simulation(); memset(blob, 'A', sizeof(blob)); fd = drm_open_driver(DRIVER_INTEL); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); drm_intel_bufmgr_gem_enable_reuse(bufmgr); devid = intel_get_drm_devid(fd); batch = intel_batchbuffer_alloc(bufmgr, devid); act_size = 2048; igt_info("filling ring\n"); drm_intel_bo_unreference(bo); bo = drm_intel_bo_alloc_tiled(bufmgr, "tiled bo", act_size, act_size, 4, &tiling_mode, &pitch, 0); drm_intel_bo_subdata(bo, 0, act_size*act_size*4, blob); if (IS_965(devid)) pitch /= 4; for (i = 0; i < 10000; i++) { BLIT_COPY_BATCH_START(XY_SRC_COPY_BLT_SRC_TILED | XY_SRC_COPY_BLT_DST_TILED); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ pitch); OUT_BATCH(0 << 16 | 1024); OUT_BATCH((2048) << 16 | (2048)); OUT_RELOC_FENCED(bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(0 << 16 | 0); OUT_BATCH(pitch); OUT_RELOC_FENCED(bo, I915_GEM_DOMAIN_RENDER, 0, 0); ADVANCE_BATCH(); if (batch->gen >= 6) { BEGIN_BATCH(3, 0); OUT_BATCH(XY_SETUP_CLIP_BLT_CMD); OUT_BATCH(0); OUT_BATCH(0); ADVANCE_BATCH(); } } igt_info("waiting\n"); sleep(10); igt_info("done waiting, check dmesg\n"); drm_intel_bo_unreference(bo); intel_batchbuffer_free(batch); drm_intel_bufmgr_destroy(bufmgr); close(fd); } intel-gpu-tools-1.14/tests/gem_tiled_fence_blits.c0000644000175000017500000001121612665336131017225 00000000000000/* * Copyright © 2009,2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * */ /** @file gem_tiled_fence_blits.c * * This is a test of doing many tiled blits, with a working set * larger than the aperture size. * * The goal is to catch a couple types of failure; * - Fence management problems on pre-965. * - A17 or L-shaped memory tiling workaround problems in acceleration. * * The model is to fill a collection of 1MB objects in a way that can't trip * over A6 swizzling -- upload data to a non-tiled object, blit to the tiled * object. Then, copy the 1MB objects randomly between each other for a while. * Finally, download their data through linear objects again and see what * resulted. */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include "intel_bufmgr.h" static drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; enum {width=512, height=512}; static const int bo_size = width * height * 4; static uint32_t linear[width * height]; static drm_intel_bo * create_bo(int fd, uint32_t start_val) { drm_intel_bo *bo; uint32_t tiling = I915_TILING_X; int ret, i; bo = drm_intel_bo_alloc(bufmgr, "tiled bo", bo_size, 4096); ret = drm_intel_bo_set_tiling(bo, &tiling, width * 4); igt_assert_eq(ret, 0); igt_assert(tiling == I915_TILING_X); /* Fill the BO with dwords starting at start_val */ for (i = 0; i < width * height; i++) linear[i] = start_val++; gem_write(fd, bo->handle, 0, linear, sizeof(linear)); return bo; } static void check_bo(int fd, drm_intel_bo *bo, uint32_t start_val) { int i; gem_read(fd, bo->handle, 0, linear, sizeof(linear)); for (i = 0; i < width * height; i++) { igt_assert_f(linear[i] == start_val, "Expected 0x%08x, found 0x%08x " "at offset 0x%08x\n", start_val, linear[i], i * 4); start_val++; } } static void run_test (int fd, int count) { drm_intel_bo *bo[4096]; uint32_t bo_start_val[4096]; uint32_t start = 0; int i; count |= 1; igt_info("Using %d 1MiB buffers\n", count); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); drm_intel_bufmgr_gem_enable_reuse(bufmgr); batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd)); for (i = 0; i < count; i++) { bo[i] = create_bo(fd, start); bo_start_val[i] = start; /* igt_info("Creating bo %d\n", i); check_bo(bo[i], bo_start_val[i]); */ start += width * height; } for (i = 0; i < count; i++) { int src = count - i - 1; intel_copy_bo(batch, bo[i], bo[src], bo_size); bo_start_val[i] = bo_start_val[src]; } for (i = 0; i < count * 4; i++) { int src = random() % count; int dst = random() % count; if (src == dst) continue; intel_copy_bo(batch, bo[dst], bo[src], bo_size); bo_start_val[dst] = bo_start_val[src]; /* check_bo(bo[dst], bo_start_val[dst]); igt_info("%d: copy bo %d to %d\n", i, src, dst); */ } for (i = 0; i < count; i++) { /* igt_info("check %d\n", i); */ check_bo(fd, bo[i], bo_start_val[i]); drm_intel_bo_unreference(bo[i]); bo[i] = NULL; } intel_batchbuffer_free(batch); drm_intel_bufmgr_destroy(bufmgr); } igt_main { int fd, count; igt_fixture { fd = drm_open_driver(DRIVER_INTEL); } igt_subtest("basic") { run_test (fd, 2); } /* the rest of the tests are too long for simulation */ igt_skip_on_simulation(); igt_subtest("normal") { count = 3 * gem_aperture_size(fd) / (bo_size) / 2; intel_require_memory(count, bo_size, CHECK_RAM); run_test(fd, count); } close(fd); } intel-gpu-tools-1.14/tests/gem_close_race.c0000644000175000017500000001505712665336131015675 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include #include "drm.h" #define OBJECT_SIZE (256 * 1024) #define COPY_BLT_CMD (2<<29|0x53<<22|0x6) #define BLT_WRITE_ALPHA (1<<21) #define BLT_WRITE_RGB (1<<20) static char device[80]; static uint32_t devid; static bool has_64bit_relocations; static void selfcopy(int fd, uint32_t handle, int loops) { struct drm_i915_gem_relocation_entry reloc[2]; struct drm_i915_gem_exec_object2 gem_exec[2]; struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_pwrite gem_pwrite; struct drm_i915_gem_create create; uint32_t buf[12], *b = buf; memset(reloc, 0, sizeof(reloc)); memset(gem_exec, 0, sizeof(gem_exec)); memset(&execbuf, 0, sizeof(execbuf)); *b = COPY_BLT_CMD | BLT_WRITE_ALPHA | BLT_WRITE_RGB; if (has_64bit_relocations) *b += 2; b++; *b++ = 0xcc << 16 | 1 << 25 | 1 << 24 | (4*1024); *b++ = 0; *b++ = 1 << 16 | 1024; reloc[0].offset = (b - buf) * sizeof(*b); reloc[0].target_handle = handle; reloc[0].read_domains = I915_GEM_DOMAIN_RENDER; reloc[0].write_domain = I915_GEM_DOMAIN_RENDER; *b++ = 0; if (has_64bit_relocations) *b++ = 0; *b++ = 512 << 16; *b++ = 4*1024; reloc[1].offset = (b - buf) * sizeof(*b); reloc[1].target_handle = handle; reloc[1].read_domains = I915_GEM_DOMAIN_RENDER; reloc[1].write_domain = 0; *b++ = 0; if (has_64bit_relocations) *b++ = 0; *b++ = MI_BATCH_BUFFER_END; *b++ = 0; gem_exec[0].handle = handle; create.handle = 0; create.size = 4096; drmIoctl(fd, DRM_IOCTL_I915_GEM_CREATE, &create); gem_exec[1].handle = create.handle; gem_exec[1].relocation_count = 2; gem_exec[1].relocs_ptr = (uintptr_t)reloc; execbuf.buffers_ptr = (uintptr_t)gem_exec; execbuf.buffer_count = 2; execbuf.batch_len = (b - buf) * sizeof(*b); if (HAS_BLT_RING(devid)) execbuf.flags |= I915_EXEC_BLT; gem_pwrite.handle = gem_exec[1].handle; gem_pwrite.offset = 0; gem_pwrite.size = execbuf.batch_len; gem_pwrite.data_ptr = (uintptr_t)buf; if (drmIoctl(fd, DRM_IOCTL_I915_GEM_PWRITE, &gem_pwrite) == 0) { while (loops--) drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); } drmIoctl(fd, DRM_IOCTL_GEM_CLOSE, &create.handle); } static uint32_t load(int fd) { uint32_t handle; handle = gem_create(fd, OBJECT_SIZE); if (handle == 0) return 0; selfcopy(fd, handle, 100); return handle; } static void run(int child) { uint32_t handle; int fd; fd = open(device, O_RDWR); igt_assert_neq(fd, -1); handle = load(fd); if ((child & 63) == 63) gem_read(fd, handle, 0, &handle, sizeof(handle)); } #define NUM_FD 768 struct thread { pthread_mutex_t mutex; int device; int fds[NUM_FD]; int done; }; static void *thread_run(void *_data) { struct thread *t = _data; uint32_t handle = gem_create(t->device, OBJECT_SIZE); struct drm_gem_open arg = { gem_flink(t->device, handle) }; pthread_mutex_lock(&t->mutex); while (!t->done) { pthread_mutex_unlock(&t->mutex); for (int n = 0; n < NUM_FD; n++) { int fd = t->fds[n]; arg.handle = 0; drmIoctl(fd, DRM_IOCTL_GEM_OPEN, &arg); if (arg.handle == 0) continue; selfcopy(fd, arg.handle, 100); drmIoctl(fd, DRM_IOCTL_GEM_CLOSE, &arg.handle); } pthread_mutex_lock(&t->mutex); } pthread_mutex_unlock(&t->mutex); gem_close(t->device, handle); return 0; } static void *thread_busy(void *_data) { struct thread *t = _data; uint32_t handle = gem_create(t->device, OBJECT_SIZE); struct drm_gem_open arg = { gem_flink(t->device, handle) }; pthread_mutex_lock(&t->mutex); while (!t->done) { struct drm_i915_gem_busy busy; int fd = t->fds[rand() % NUM_FD]; pthread_mutex_unlock(&t->mutex); arg.handle = 0; drmIoctl(fd, DRM_IOCTL_GEM_OPEN, &arg); if (arg.handle == 0) continue; selfcopy(fd, arg.handle, 10); busy.handle = arg.handle; drmIoctl(fd, DRM_IOCTL_I915_GEM_BUSY, &busy); drmIoctl(fd, DRM_IOCTL_GEM_CLOSE, &arg.handle); usleep(10*1000); pthread_mutex_lock(&t->mutex); } pthread_mutex_unlock(&t->mutex); gem_close(t->device, handle); return 0; } igt_main { igt_skip_on_simulation(); igt_fixture { int fd; sprintf(device, "/dev/dri/card%d", drm_get_card()); fd = open(device, O_RDWR); igt_assert(fd != -1); devid = intel_get_drm_devid(fd); has_64bit_relocations = intel_gen(devid) >= 8; close(fd); } igt_subtest("process-exit") { igt_fork(child, NUM_FD) run(child); igt_waitchildren(); } igt_subtest("gem-close-race") { pthread_t thread[2]; struct thread *data = calloc(1, sizeof(struct thread)); int n; igt_assert(data); pthread_mutex_init(&data->mutex, NULL); data->device = open(device, O_RDWR); for (n = 0; n < NUM_FD; n++) data->fds[n] = open(device, O_RDWR); pthread_create(&thread[0], NULL, thread_run, data); pthread_create(&thread[1], NULL, thread_busy, data); for (n = 0; n < 1000*NUM_FD; n++) { int i = rand() % NUM_FD; if (data->fds[i] == -1) { data->fds[i] = open(device, O_RDWR); } else{ close(data->fds[i]); data->fds[i] = -1; } } pthread_mutex_lock(&data->mutex); data->done = 1; pthread_mutex_unlock(&data->mutex); pthread_join(thread[1], NULL); pthread_join(thread[0], NULL); for (n = 0; n < NUM_FD; n++) close(data->fds[n]); close(data->device); free(data); } } intel-gpu-tools-1.14/tests/gem_pread.c0000644000175000017500000001511512665336131014664 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include "drm.h" #define OBJECT_SIZE 16384 #define LARGE_OBJECT_SIZE 1024 * 1024 #define KGRN "\x1B[32m" #define KRED "\x1B[31m" #define KNRM "\x1B[0m" static void do_gem_read(int fd, uint32_t handle, void *buf, int len, int loops) { while (loops--) gem_read(fd, handle, 0, buf, len); } static double elapsed(const struct timeval *start, const struct timeval *end, int loop) { return (1e6*(end->tv_sec - start->tv_sec) + (end->tv_usec - start->tv_usec))/loop; } static const char *bytes_per_sec(char *buf, double v) { const char *order[] = { "", "KiB", "MiB", "GiB", "TiB", NULL, }, **o = order; while (v > 1000 && o[1]) { v /= 1000; o++; } sprintf(buf, "%.1f%s/s", v, *o); return buf; } uint32_t *src, dst; uint32_t *dst_user, src_stolen, large_stolen; uint32_t *stolen_pf_user, *stolen_nopf_user; int fd, count; int main(int argc, char **argv) { int object_size = 0; double usecs; char buf[100]; const char* bps; const struct { int level; const char *name; } cache[] = { { 0, "uncached" }, { 1, "snoop" }, { 2, "display" }, { -1 }, }, *c; igt_subtest_init(argc, argv); igt_skip_on_simulation(); if (argc > 1 && atoi(argv[1])) object_size = atoi(argv[1]); if (object_size == 0) object_size = OBJECT_SIZE; object_size = (object_size + 3) & -4; igt_fixture { fd = drm_open_driver(DRIVER_INTEL); dst = gem_create(fd, object_size); src = malloc(object_size); src_stolen = gem_create_stolen(fd, object_size); dst_user = malloc(object_size); } igt_subtest("basic") { for (count = 1; count <= 1<<17; count <<= 1) { struct timeval start, end; gettimeofday(&start, NULL); do_gem_read(fd, dst, src, object_size, count); gettimeofday(&end, NULL); usecs = elapsed(&start, &end, count); bps = bytes_per_sec(buf, object_size/usecs*1e6); igt_info("Time to pread %d bytes x %6d: %7.3fµs, %s\n", object_size, count, usecs, bps); fflush(stdout); } } for (c = cache; c->level != -1; c++) { igt_subtest(c->name) { gem_set_caching(fd, dst, c->level); for (count = 1; count <= 1<<17; count <<= 1) { struct timeval start, end; gettimeofday(&start, NULL); do_gem_read(fd, dst, src, object_size, count); gettimeofday(&end, NULL); usecs = elapsed(&start, &end, count); bps = bytes_per_sec(buf, object_size/usecs*1e6); igt_info("Time to %s pread %d bytes x %6d: %7.3fµs, %s\n", c->name, object_size, count, usecs, bps); fflush(stdout); } } } igt_subtest("stolen-normal") { for (count = 1; count <= 1<<17; count <<= 1) { struct timeval start, end; gettimeofday(&start, NULL); do_gem_read(fd, src_stolen, dst_user, object_size, count); gettimeofday(&end, NULL); usecs = elapsed(&start, &end, count); bps = bytes_per_sec(buf, object_size/usecs*1e6); igt_info("Time to pread %d bytes x %6d: %7.3fµs, %s\n", object_size, count, usecs, bps); fflush(stdout); } } for (c = cache; c->level != -1; c++) { igt_subtest_f("stolen-%s", c->name) { gem_set_caching(fd, src_stolen, c->level); for (count = 1; count <= 1<<17; count <<= 1) { struct timeval start, end; gettimeofday(&start, NULL); do_gem_read(fd, src_stolen, dst_user, object_size, count); gettimeofday(&end, NULL); usecs = elapsed(&start, &end, count); bps = bytes_per_sec(buf, object_size/usecs*1e6); igt_info("Time to stolen-%s pread %d bytes x %6d: %7.3fµs, %s\n", c->name, object_size, count, usecs, bps); fflush(stdout); } } } /* List the time taken in pread operation for stolen objects, with * and without the overhead of page fault handling on accessing the * user space buffer */ igt_subtest("pagefault-pread") { large_stolen = gem_create_stolen(fd, LARGE_OBJECT_SIZE); stolen_nopf_user = (uint32_t *) mmap(NULL, LARGE_OBJECT_SIZE, PROT_WRITE, MAP_ANONYMOUS|MAP_PRIVATE, -1, 0); igt_assert(stolen_nopf_user); for (count = 1; count <= 10; count ++) { struct timeval start, end; double t_elapsed = 0; gettimeofday(&start, NULL); do_gem_read(fd, large_stolen, stolen_nopf_user, LARGE_OBJECT_SIZE, 1); gettimeofday(&end, NULL); t_elapsed = elapsed(&start, &end, count); bps = bytes_per_sec(buf, object_size/t_elapsed*1e6); igt_info("Pagefault-N - Time to pread %d bytes: %7.3fµs, %s\n", LARGE_OBJECT_SIZE, t_elapsed, bps); stolen_pf_user = (uint32_t *) mmap(NULL, LARGE_OBJECT_SIZE, PROT_WRITE, MAP_ANONYMOUS|MAP_PRIVATE, -1, 0); igt_assert(stolen_pf_user); gettimeofday(&start, NULL); do_gem_read(fd, large_stolen, stolen_pf_user, LARGE_OBJECT_SIZE, 1); gettimeofday(&end, NULL); usecs = elapsed(&start, &end, count); bps = bytes_per_sec(buf, object_size/usecs*1e6); igt_info("Pagefault-Y - Time to pread %d bytes: %7.3fµs, %s%s%s\n", LARGE_OBJECT_SIZE, usecs, t_elapsed < usecs ? KGRN : KRED, bps, KNRM); fflush(stdout); munmap(stolen_pf_user, LARGE_OBJECT_SIZE); } munmap(stolen_nopf_user, LARGE_OBJECT_SIZE); gem_close(fd, large_stolen); } igt_fixture { free(src); gem_close(fd, dst); free(dst_user); gem_close(fd, src_stolen); close(fd); } igt_exit(); } intel-gpu-tools-1.14/tests/gem_storedw_batches_loop.c0000644000175000017500000001176512665336131020011 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * Jesse Barnes (based on gem_bad_blit.c) * */ #include "igt.h" #include #include #include #include #include #include #include #include #include "drm.h" #include "intel_bufmgr.h" static drm_intel_bufmgr *bufmgr; static drm_intel_bo *target_bo; static int has_ppgtt = 0; #define SECURE_DISPATCH (1<<0) /* Like the store dword test, but we create new command buffers each time */ static void store_dword_loop(int divider, unsigned flags) { int cmd, i, val = 0; uint32_t *buf; drm_intel_bo *cmd_bo; igt_info("running storedw loop with stall every %i batch\n", divider); cmd = MI_STORE_DWORD_IMM; if (!has_ppgtt) cmd |= MI_MEM_VIRTUAL; for (i = 0; i < SLOW_QUICK(0x2000, 4); i++) { int j = 0; int cmd_address_offset; cmd_bo = drm_intel_bo_alloc(bufmgr, "cmd bo", 4096, 4096); igt_assert(cmd_bo); /* Upload through cpu mmaps to make sure we don't have a gtt * mapping which could paper over secure batch submission * failing to bind that. */ drm_intel_bo_map(cmd_bo, 1); buf = cmd_bo->virtual; buf[j++] = cmd; if (intel_gen(drm_intel_bufmgr_gem_get_devid(bufmgr)) >= 8) { cmd_address_offset = j * 4; buf[j++] = target_bo->offset; buf[j++] = 0; } else { buf[j++] = 0; cmd_address_offset = j * 4; buf[j++] = target_bo->offset; } igt_assert_lt(0, j); buf[j++] = 0x42000000 + val; igt_assert(drm_intel_bo_references(cmd_bo, target_bo) == 0); igt_assert(drm_intel_bo_emit_reloc(cmd_bo, cmd_address_offset, target_bo, 0, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION) == 0); buf[j++] = MI_BATCH_BUFFER_END; buf[j++] = MI_BATCH_BUFFER_END; drm_intel_bo_unmap(cmd_bo); igt_assert(drm_intel_bo_references(cmd_bo, target_bo) == 1); #define LOCAL_I915_EXEC_SECURE (1<<9) igt_assert(drm_intel_bo_mrb_exec(cmd_bo, j * 4, NULL, 0, 0, I915_EXEC_BLT | (flags & SECURE_DISPATCH ? LOCAL_I915_EXEC_SECURE : 0)) == 0); if (i % divider != 0) goto cont; drm_intel_bo_wait_rendering(cmd_bo); drm_intel_bo_map(target_bo, 1); buf = target_bo->virtual; igt_assert_f(buf[0] == (0x42000000 | val), "value mismatch: cur 0x%08x, stored 0x%08x\n", buf[0], 0x42000000 | val); buf[0] = 0; /* let batch write it again */ drm_intel_bo_unmap(target_bo); cont: drm_intel_bo_unreference(cmd_bo); val++; } igt_info("completed %d writes successfully\n", i); } int fd; int devid; igt_main { igt_skip_on_simulation(); igt_fixture { fd = drm_open_driver(DRIVER_INTEL); devid = intel_get_drm_devid(fd); has_ppgtt = gem_uses_ppgtt(fd); /* storedw needs gtt address on gen4+/g33 and snoopable memory. * Strictly speaking we could implement this now ... */ igt_require(intel_gen(devid) >= 6); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); igt_assert(bufmgr); // drm_intel_bufmgr_gem_enable_reuse(bufmgr); target_bo = drm_intel_bo_alloc(bufmgr, "target bo", 4096, 4096); igt_assert(target_bo); } igt_subtest("normal") { store_dword_loop(1, 0); store_dword_loop(2, 0); store_dword_loop(3, 0); store_dword_loop(5, 0); } igt_subtest("secure-dispatch") { store_dword_loop(1, SECURE_DISPATCH); store_dword_loop(2, SECURE_DISPATCH); store_dword_loop(3, SECURE_DISPATCH); store_dword_loop(5, SECURE_DISPATCH); } igt_subtest("cached-mapping") { gem_set_caching(fd, target_bo->handle, 1); store_dword_loop(1, 0); store_dword_loop(2, 0); store_dword_loop(3, 0); store_dword_loop(5, 0); } igt_subtest("uncached-mapping") { gem_set_caching(fd, target_bo->handle, 0); store_dword_loop(1, 0); store_dword_loop(2, 0); store_dword_loop(3, 0); store_dword_loop(5, 0); } igt_fixture { drm_intel_bo_unreference(target_bo); drm_intel_bufmgr_destroy(bufmgr); close(fd); } } intel-gpu-tools-1.14/tests/kms_sysfs_edid_timing0000755000175000017500000000124512665336131017077 00000000000000#!/bin/bash # # This check the time we take to read the content of all the possible connectors. # Without the edid -ENXIO patch (http://permalink.gmane.org/gmane.comp.video.dri.devel/62083), # we sometimes take a *really* long time. So let's just check for some reasonable timing here # DRM_LIB_ALLOW_NO_MASTER=1 SOURCE_DIR="$( dirname "${BASH_SOURCE[0]}" )" . $SOURCE_DIR/drm_lib.sh TIME1=$(date +%s%N) cat $(find /sys/devices/|grep drm | grep /status) > /dev/null TIME2=$(date +%s%N) # time in ms RES=$(((TIME2 - TIME1) / 1000000)) if [ $RES -gt 600 ]; then echo "Talking to outputs took ${RES}ms, something is wrong" exit $IGT_EXIT_FAILURE fi exit $IGT_EXIT_SUCCESS intel-gpu-tools-1.14/tests/core_auth.c0000644000175000017500000001016312665336131014710 00000000000000/* * Copyright 2015 David Herrmann * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ /* * Testcase: drmGetMagic() and drmAuthMagic() */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include "drm.h" IGT_TEST_DESCRIPTION("Call drmGetMagic() and drmAuthMagic() and see if it behaves."); static int magic_cmp(const void *p1, const void *p2) { return *(const drm_magic_t*)p1 < *(const drm_magic_t*)p2; } static void test_many_magics(int master) { drm_magic_t magic, *magics = NULL; unsigned int i, j, ns, allocated = 0; char path[512]; int *fds = NULL, slave; sprintf(path, "/proc/self/fd/%d", master); for (i = 0; ; ++i) { /* open slave and make sure it's NOT a master */ slave = open(path, O_RDWR | O_CLOEXEC); if (slave < 0) { igt_assert(errno == EMFILE); break; } igt_assert(drmSetMaster(slave) < 0); /* resize magic-map */ if (i >= allocated) { ns = allocated * 2; igt_assert(ns >= allocated); if (!ns) ns = 128; magics = realloc(magics, sizeof(*magics) * ns); igt_assert(magics); fds = realloc(fds, sizeof(*fds) * ns); igt_assert(fds); allocated = ns; } /* insert magic */ igt_assert(drmGetMagic(slave, &magic) == 0); igt_assert(magic > 0); magics[i] = magic; fds[i] = slave; } /* make sure we could at least open a reasonable number of files */ igt_assert(i > 128); /* * We cannot open the DRM file anymore. Lets sort the magic-map and * verify no magic was used multiple times. */ qsort(magics, i, sizeof(*magics), magic_cmp); for (j = 1; j < i; ++j) igt_assert(magics[j] != magics[j - 1]); /* make sure we can authenticate all of them */ for (j = 0; j < i; ++j) igt_assert(drmAuthMagic(master, magics[j]) == 0); /* close files again */ for (j = 0; j < i; ++j) close(fds[j]); free(fds); free(magics); } static void test_basic_auth(int master) { drm_magic_t magic, old_magic; int slave; /* open slave and make sure it's NOT a master */ slave = drm_open_driver(DRIVER_ANY); igt_require(slave >= 0); igt_require(drmSetMaster(slave) < 0); /* retrieve magic for slave */ igt_assert(drmGetMagic(slave, &magic) == 0); igt_assert(magic > 0); /* verify the same magic is returned every time */ old_magic = magic; igt_assert(drmGetMagic(slave, &magic) == 0); igt_assert_eq(magic, old_magic); /* verify magic can be authorized exactly once, on the master */ igt_assert(drmAuthMagic(slave, magic) < 0); igt_assert(drmAuthMagic(master, magic) == 0); igt_assert(drmAuthMagic(master, magic) < 0); /* verify that the magic did not change */ old_magic = magic; igt_assert(drmGetMagic(slave, &magic) == 0); igt_assert_eq(magic, old_magic); close(slave); } igt_main { int master; igt_fixture master = drm_open_driver_master(DRIVER_ANY); igt_subtest("basic-auth") test_basic_auth(master); igt_subtest("many-magics") test_many_magics(master); } intel-gpu-tools-1.14/tests/kms_render.c0000644000175000017500000001503412665336131015072 00000000000000/* * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Imre Deak */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "igt.h" #include #include #include #include #include #include "intel_bufmgr.h" drmModeRes *resources; int drm_fd; static drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; uint32_t devid; enum test_flags { TEST_DIRECT_RENDER = 0x01, TEST_GPU_BLIT = 0x02, }; static int paint_fb(struct igt_fb *fb, const char *test_name, const char *mode_format_str, const char *cconf_str) { cairo_t *cr; cr = igt_get_cairo_ctx(drm_fd, fb); igt_paint_color_gradient(cr, 0, 0, fb->width, fb->height, 1, 1, 1); igt_paint_test_pattern(cr, fb->width, fb->height); cairo_move_to(cr, fb->width / 2, fb->height / 2); cairo_set_font_size(cr, 36); igt_cairo_printf_line(cr, align_hcenter, 10, "%s", test_name); igt_cairo_printf_line(cr, align_hcenter, 10, "%s", mode_format_str); igt_cairo_printf_line(cr, align_hcenter, 10, "%s", cconf_str); cairo_destroy(cr); return 0; } static void gpu_blit(struct igt_fb *dst_fb, struct igt_fb *src_fb) { drm_intel_bo *dst_bo; drm_intel_bo *src_bo; int bpp; igt_assert(dst_fb->drm_format == src_fb->drm_format); igt_assert(src_fb->drm_format == DRM_FORMAT_RGB565 || igt_drm_format_to_bpp(src_fb->drm_format) != 16); bpp = igt_drm_format_to_bpp(src_fb->drm_format); dst_bo = gem_handle_to_libdrm_bo(bufmgr, drm_fd, "destination", dst_fb->gem_handle); igt_assert(dst_bo); src_bo = gem_handle_to_libdrm_bo(bufmgr, drm_fd, "source", src_fb->gem_handle); igt_assert(src_bo); intel_blt_copy(batch, src_bo, 0, 0, src_fb->width * bpp / 8, dst_bo, 0, 0, dst_fb->width * bpp / 8, src_fb->width, src_fb->height, bpp); intel_batchbuffer_flush(batch); gem_quiescent_gpu(drm_fd); drm_intel_bo_unreference(src_bo); drm_intel_bo_unreference(dst_bo); } static int test_format(const char *test_name, struct kmstest_connector_config *cconf, drmModeModeInfo *mode, uint32_t format, enum test_flags flags) { int width; int height; struct igt_fb fb[2]; char *mode_format_str; char *cconf_str; int ret; ret = asprintf(&mode_format_str, "%s @ %dHz / %s", mode->name, mode->vrefresh, igt_format_str(format)); igt_assert_lt(0, ret); ret = asprintf(&cconf_str, "pipe %s, encoder %s, connector %s", kmstest_pipe_name(cconf->pipe), kmstest_encoder_type_str(cconf->encoder->encoder_type), kmstest_connector_type_str(cconf->connector->connector_type)); igt_assert_lt(0, ret); igt_info("Beginning test %s with %s on %s\n", test_name, mode_format_str, cconf_str); width = mode->hdisplay; height = mode->vdisplay; if (!igt_create_fb(drm_fd, width, height, format, LOCAL_DRM_FORMAT_MOD_NONE, &fb[0])) goto err1; if (!igt_create_fb(drm_fd, width, height, format, LOCAL_DRM_FORMAT_MOD_NONE, &fb[1])) goto err2; if (drmModeSetCrtc(drm_fd, cconf->crtc->crtc_id, fb[0].fb_id, 0, 0, &cconf->connector->connector_id, 1, mode)) goto err2; do_or_die(drmModePageFlip(drm_fd, cconf->crtc->crtc_id, fb[0].fb_id, 0, NULL)); sleep(2); if (flags & TEST_DIRECT_RENDER) { paint_fb(&fb[0], test_name, mode_format_str, cconf_str); } else if (flags & TEST_GPU_BLIT) { paint_fb(&fb[1], test_name, mode_format_str, cconf_str); gpu_blit(&fb[0], &fb[1]); } sleep(5); igt_info("Test %s with %s on %s: PASSED\n", test_name, mode_format_str, cconf_str); free(mode_format_str); free(cconf_str); igt_remove_fb(drm_fd, &fb[1]); igt_remove_fb(drm_fd, &fb[0]); return 0; err2: igt_remove_fb(drm_fd, &fb[0]); err1: igt_info("Test %s with %s on %s: SKIPPED\n", test_name, mode_format_str, cconf_str); free(mode_format_str); free(cconf_str); return -1; } static void test_connector(const char *test_name, struct kmstest_connector_config *cconf, enum test_flags flags) { const uint32_t *formats; int format_count; int i; igt_get_all_cairo_formats(&formats, &format_count); for (i = 0; i < format_count; i++) { if (intel_gen(intel_get_drm_devid(drm_fd)) < 4 && formats[i] == DRM_FORMAT_XRGB2101010) { igt_info("gen2/3 don't support 10bpc, skipping\n"); continue; } test_format(test_name, cconf, &cconf->connector->modes[0], formats[i], flags); } } static int run_test(const char *test_name, enum test_flags flags) { int i; resources = drmModeGetResources(drm_fd); igt_assert(resources); /* Find any connected displays */ for (i = 0; i < resources->count_connectors; i++) { uint32_t connector_id; int j; connector_id = resources->connectors[i]; for (j = 0; j < resources->count_crtcs; j++) { struct kmstest_connector_config cconf; if (!kmstest_get_connector_config(drm_fd, connector_id, 1 << j, &cconf)) continue; test_connector(test_name, &cconf, flags); kmstest_free_connector_config(&cconf); } } drmModeFreeResources(resources); return 1; } igt_main { struct { enum test_flags flags; const char *name; } tests[] = { { TEST_DIRECT_RENDER, "direct-render" }, { TEST_GPU_BLIT, "gpu-blit" }, }; int i; igt_skip_on_simulation(); igt_fixture { drm_fd = drm_open_driver_master(DRIVER_INTEL); bufmgr = drm_intel_bufmgr_gem_init(drm_fd, 4096); devid = intel_get_drm_devid(drm_fd); batch = intel_batchbuffer_alloc(bufmgr, devid); kmstest_set_vt_graphics_mode(); } for (i = 0; i < ARRAY_SIZE(tests); i++) { igt_subtest(tests[i].name) run_test(tests[i].name, tests[i].flags); } igt_fixture close(drm_fd); } intel-gpu-tools-1.14/tests/gem_exec_basic.c0000644000175000017500000000374212665336131015661 00000000000000/* * Copyright © 2016 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ #include "igt.h" IGT_TEST_DESCRIPTION("Basic sanity check of execbuf-ioctl rings."); static void noop(int fd, unsigned ring) { uint32_t bbe = MI_BATCH_BUFFER_END; struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 exec; gem_require_ring(fd, ring); memset(&exec, 0, sizeof(exec)); exec.handle = gem_create(fd, 4096); gem_write(fd, exec.handle, 0, &bbe, sizeof(bbe)); memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)&exec; execbuf.buffer_count = 1; execbuf.flags = ring; gem_execbuf(fd, &execbuf); gem_close(fd, exec.handle); } igt_main { const struct intel_execution_engine *e; int fd = -1; igt_fixture fd = drm_open_driver(DRIVER_INTEL); for (e = intel_execution_engines; e->name; e++) igt_subtest_f("basic-%s", e->name) noop(fd, e->exec_id | e->flags); igt_fixture close(fd); } intel-gpu-tools-1.14/tests/gem_exec_alignment.c0000644000175000017500000001362212665336131016554 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ /* Exercises the basic execbuffer using object alignments */ #include "igt.h" #include #include #include #include #include #include #include #include #include "drm.h" IGT_TEST_DESCRIPTION("Exercises the basic execbuffer using object alignments"); static uint32_t find_last_bit(uint64_t x) { uint32_t i = 0; while (x) { x >>= 1; i++; } return i; } static uint32_t file_max(void) { static uint32_t max; if (max == 0) { FILE *file = fopen("/proc/sys/fs/file-max", "r"); max = 80000; if (file) { igt_assert(fscanf(file, "%d", &max) == 1); fclose(file); } max /= 2; } return max; } static void many(int fd) { uint32_t bbe = MI_BATCH_BUFFER_END; struct drm_i915_gem_exec_object2 *execobj; struct drm_i915_gem_execbuffer2 execbuf; uint64_t gtt_size, ram_size; uint64_t alignment, max_alignment, count, i; gtt_size = gem_aperture_size(fd); if (!gem_uses_full_ppgtt(fd)) gtt_size /= 2; /* We have to *share* our GTT! */ ram_size = intel_get_total_ram_mb(); ram_size *= 1024 * 1024; count = ram_size / 4096; if (count > file_max()) /* vfs cap */ count = file_max(); max_alignment = find_last_bit(gtt_size / count); if (max_alignment <= 13) max_alignment = 4096; else max_alignment = 1ull << (max_alignment - 1); count = gtt_size / max_alignment / 2; igt_info("gtt_size=%lld MiB, max-alignment=%lld, count=%lld\n", (long long)gtt_size/1024/1024, (long long)max_alignment, (long long)count); intel_require_memory(count, 4096, CHECK_RAM); execobj = calloc(sizeof(*execobj), count + 1); igt_assert(execobj); for (i = 0; i < count; i++) { execobj[i].handle = gem_create(fd, 4096); if ((gtt_size-1) >> 32) execobj[i].flags = 1<<3; /* EXEC_OBJECT_SUPPORTS_48B_ADDRESS */ } execobj[i].handle = gem_create(fd, 4096); if ((gtt_size-1) >> 32) execobj[i].flags = 1<<3; /* EXEC_OBJECT_SUPPORTS_48B_ADDRESS */ gem_write(fd, execobj[i].handle, 0, &bbe, sizeof(bbe)); memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)execobj; execbuf.buffer_count = count + 1; igt_require(__gem_execbuf(fd, &execbuf) == 0); for (alignment = 4096; alignment < gtt_size; alignment <<= 1) { for (i = 0; i < count; i++) execobj[i].alignment = alignment; if (alignment > max_alignment) { uint64_t factor = alignment / max_alignment; execbuf.buffer_count = 2*count / factor; execbuf.buffers_ptr = (uintptr_t)(execobj + count - execbuf.buffer_count + 1); } igt_debug("testing %lld x alignment=%#llx [%db]\n", (long long)execbuf.buffer_count - 1, (long long)alignment, find_last_bit(alignment)-1); gem_execbuf(fd, &execbuf); for(i = count - execbuf.buffer_count + 1; i < count; i++) { igt_assert_eq_u64(execobj[i].alignment, alignment); igt_assert_eq_u64(execobj[i].offset % alignment, 0); } } for (i = 0; i < count; i++) gem_close(fd, execobj[i].handle); gem_close(fd, execobj[i].handle); free(execobj); } static void single(int fd) { struct drm_i915_gem_exec_object2 execobj; struct drm_i915_gem_execbuffer2 execbuf; uint32_t batch = MI_BATCH_BUFFER_END; uint64_t gtt_size; int non_pot; memset(&execobj, 0, sizeof(execobj)); execobj.handle = gem_create(fd, 4096); execobj.flags = 1<<3; /* EXEC_OBJECT_SUPPORTS_48B_ADDRESS */ gem_write(fd, execobj.handle, 0, &batch, sizeof(batch)); memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)&execobj; execbuf.buffer_count = 1; gtt_size = gem_aperture_size(fd); if (__gem_execbuf(fd, &execbuf)) { execobj.flags = 0; gtt_size = 1ull << 32; gem_execbuf(fd, &execbuf); } execobj.alignment = 3*4096; non_pot = __gem_execbuf(fd, &execbuf) == 0; igt_debug("execbuffer() accepts non-power-of-two alignment? %s\n", non_pot ? "yes" : "no"); for (execobj.alignment = 4096; execobj.alignment <= 64<<20; execobj.alignment += 4096) { if (!non_pot && execobj.alignment & -execobj.alignment) continue; igt_debug("starting offset: %#llx, next alignment: %#llx\n", (long long)execobj.offset, (long long)execobj.alignment); gem_execbuf(fd, &execbuf); igt_assert_eq_u64(execobj.offset % execobj.alignment, 0); } for (execobj.alignment = 4096; execobj.alignment < gtt_size; execobj.alignment <<= 1) { igt_debug("starting offset: %#llx, next alignment: %#llx [%db]\n", (long long)execobj.offset, (long long)execobj.alignment, find_last_bit(execobj.alignment)-1); gem_execbuf(fd, &execbuf); igt_assert_eq_u64(execobj.offset % execobj.alignment, 0); } gem_close(fd, execobj.handle); } igt_main { int fd = -1; igt_fixture fd = drm_open_driver(DRIVER_INTEL); igt_subtest("single") /* basic! */ single(fd); igt_subtest("many") many(fd); } intel-gpu-tools-1.14/tests/kms_frontbuffer_tracking.c0000644000175000017500000026213312665336131020023 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: Paulo Zanoni * */ #include "igt.h" #include #include #include #include #include IGT_TEST_DESCRIPTION("Test the Kernel's frontbuffer tracking mechanism and " "its related features: FBC and PSR"); /* * One of the aspects of this test is that, for every subtest, we try different * combinations of the parameters defined by the struct below. Because of this, * a single addition of a new parameter or subtest function can lead to hundreds * of new subtests. * * In order to reduce the number combinations we cut the cases that don't make * sense, such as writing on the secondary screen when there is only a single * pipe, or flipping when the target is the offscreen buffer. We also hide some * combinations that are somewhat redundant and don't add much value to the * test. For example, since we already do the offscreen testing with a single * pipe enabled, there's no much value in doing it again with dual pipes. If you * still want to try these redundant tests, you need to use the --show-hidden * option. * * The most important hidden thing is the FEATURE_NONE set of tests. Whenever * you get a failure on any test, it is important to check whether the same test * fails with FEATURE_NONE - replace the feature name for "nop". If the nop test * also fails, then it's likely the problem will be on the IGT side instead of * the Kernel side. We don't expose this set of tests by default because (i) * they take a long time to test; and (ii) if the feature tests work, then it's * very likely that the nop tests will also work. */ struct test_mode { /* Are we going to enable just one monitor, or are we going to setup a * dual screen environment for the test? */ enum { PIPE_SINGLE = 0, PIPE_DUAL, PIPE_COUNT, } pipes; /* The primary screen is the one that's supposed to have the "feature" * enabled on, but we have the option to draw on the secondary screen or * on some offscreen buffer. We also only theck the CRC of the primary * screen. */ enum { SCREEN_PRIM = 0, SCREEN_SCND, SCREEN_OFFSCREEN, SCREEN_COUNT, } screen; /* When we draw, we can draw directly on the primary plane, on the * cursor or on the sprite plane. */ enum { PLANE_PRI = 0, PLANE_CUR, PLANE_SPR, PLANE_COUNT, } plane; /* We can organize the screens in a way that each screen has its own * framebuffer, or in a way that all screens point to the same * framebuffer, but on different places. This includes the offscreen * screen. */ enum { FBS_INDIVIDUAL = 0, FBS_SHARED, FBS_COUNT, } fbs; /* Which features are we going to test now? This is a mask! * FEATURE_DEFAULT is a special value which instruct the test to just * keep what's already enabled by default in the Kernel. */ enum { FEATURE_NONE = 0, FEATURE_FBC = 1, FEATURE_PSR = 2, FEATURE_COUNT = 4, FEATURE_DEFAULT = 4, } feature; /* Possible pixel formats. We just use FORMAT_DEFAULT for most tests and * only test a few things on the other formats. */ enum pixel_format { FORMAT_RGB888 = 0, FORMAT_RGB565, FORMAT_RGB101010, FORMAT_COUNT, FORMAT_DEFAULT = FORMAT_RGB888, } format; /* There are multiple APIs where we can do the equivalent of a page flip * and they exercise slightly different codepaths inside the Kernel. */ enum flip_type { FLIP_PAGEFLIP, FLIP_PAGEFLIP_EVENT, FLIP_MODESET, FLIP_PLANES, FLIP_COUNT, } flip; enum igt_draw_method method; }; enum color { COLOR_RED, COLOR_GREEN, COLOR_BLUE, COLOR_MAGENTA, COLOR_CYAN, COLOR_SCND_BG, COLOR_PRIM_BG = COLOR_BLUE, COLOR_OFFSCREEN_BG = COLOR_SCND_BG, }; struct rect { int x; int y; int w; int h; uint32_t color; }; #define MAX_CONNECTORS 32 #define MAX_PLANES 32 struct { int fd; drmModeResPtr res; drmModeConnectorPtr connectors[MAX_CONNECTORS]; drmModePlaneResPtr plane_res; drmModePlanePtr planes[MAX_PLANES]; uint64_t plane_types[MAX_PLANES]; drm_intel_bufmgr *bufmgr; } drm; struct { bool can_test; bool supports_compressing; bool supports_last_action; struct timespec last_action; } fbc = { .can_test = false, .supports_last_action = false, .supports_compressing = false, }; struct { bool can_test; } psr = { .can_test = false, }; #define SINK_CRC_SIZE 12 typedef struct { char data[SINK_CRC_SIZE]; } sink_crc_t; struct both_crcs { igt_crc_t pipe; sink_crc_t sink; }; igt_pipe_crc_t *pipe_crc; struct { bool initialized; struct both_crcs crc; } blue_crcs[FORMAT_COUNT]; struct both_crcs *wanted_crc; struct { int fd; bool supported; } sink_crc = { .fd = -1, .supported = false, }; /* The goal of this structure is to easily allow us to deal with cases where we * have a big framebuffer and the CRTC is just displaying a subregion of this * big FB. */ struct fb_region { struct igt_fb *fb; int x; int y; int w; int h; }; struct draw_pattern_info { bool frames_stack; int n_rects; struct rect (*get_rect)(struct fb_region *fb, int r); bool initialized[FORMAT_COUNT]; struct both_crcs *crcs[FORMAT_COUNT]; }; /* Draw big rectangles on the screen. */ struct draw_pattern_info pattern1; /* 64x64 rectangles at x:0,y:0, just so we can draw on the cursor and sprite. */ struct draw_pattern_info pattern2; /* 64x64 rectangles at different positions, same color, for the move test. */ struct draw_pattern_info pattern3; /* Just a fullscreen green square. */ struct draw_pattern_info pattern4; /* Command line parameters. */ struct { bool check_status; bool check_crc; bool fbc_check_compression; bool fbc_check_last_action; bool no_edp; bool small_modes; bool show_hidden; int step; int only_pipes; int shared_fb_x_offset; int shared_fb_y_offset; } opt = { .check_status = true, .check_crc = true, .fbc_check_compression = true, .fbc_check_last_action = true, .no_edp = false, .small_modes = false, .show_hidden= false, .step = 0, .only_pipes = PIPE_COUNT, .shared_fb_x_offset = 500, .shared_fb_y_offset = 500, }; struct modeset_params { uint32_t crtc_id; uint32_t connector_id; uint32_t sprite_id; drmModeModeInfoPtr mode; struct fb_region fb; struct fb_region cursor; struct fb_region sprite; }; struct modeset_params prim_mode_params; struct modeset_params scnd_mode_params; struct fb_region offscreen_fb; struct screen_fbs { bool initialized; struct igt_fb prim_pri; struct igt_fb prim_cur; struct igt_fb prim_spr; struct igt_fb scnd_pri; struct igt_fb scnd_cur; struct igt_fb scnd_spr; struct igt_fb offscreen; struct igt_fb big; } fbs[FORMAT_COUNT]; struct { pthread_t thread; bool stop; uint32_t handle; uint32_t size; uint32_t stride; int width; int height; uint32_t color; int bpp; } busy_thread = { .stop = true, }; drmModeModeInfo std_1024_mode = { .clock = 65000, .hdisplay = 1024, .hsync_start = 1048, .hsync_end = 1184, .htotal = 1344, .hskew = 0, .vdisplay = 768, .vsync_start = 771, .vsync_end = 777, .vtotal = 806, .vscan = 0, .vrefresh = 60, .flags = 0xA, .type = 0x40, .name = "Custom 1024x768", }; static drmModeModeInfoPtr get_connector_smallest_mode(drmModeConnectorPtr c) { int i; drmModeModeInfoPtr smallest = NULL; for (i = 0; i < c->count_modes; i++) { drmModeModeInfoPtr mode = &c->modes[i]; if (!smallest) smallest = mode; if (mode->hdisplay * mode->vdisplay < smallest->hdisplay * smallest->vdisplay) smallest = mode; } if (c->connector_type == DRM_MODE_CONNECTOR_eDP) smallest = &std_1024_mode; return smallest; } static drmModeConnectorPtr get_connector(uint32_t id) { int i; for (i = 0; i < drm.res->count_connectors; i++) if (drm.res->connectors[i] == id) return drm.connectors[i]; igt_assert(false); } static void print_mode_info(const char *screen, struct modeset_params *params) { drmModeConnectorPtr c = get_connector(params->connector_id); igt_info("%s screen: %s %s\n", screen, kmstest_connector_type_str(c->connector_type), params->mode->name); } static void init_mode_params(struct modeset_params *params, uint32_t crtc_id, int crtc_index, uint32_t connector_id, drmModeModeInfoPtr mode) { uint32_t plane_id = 0; int i; for (i = 0; i < drm.plane_res->count_planes && plane_id == 0; i++) if ((drm.planes[i]->possible_crtcs & (1 << crtc_index)) && drm.plane_types[i] == DRM_PLANE_TYPE_OVERLAY) plane_id = drm.planes[i]->plane_id; igt_assert(plane_id); params->crtc_id = crtc_id; params->connector_id = connector_id; params->mode = mode; params->sprite_id = plane_id; params->fb.fb = NULL; params->fb.w = mode->hdisplay; params->fb.h = mode->vdisplay; params->cursor.fb = NULL; params->cursor.x = 0; params->cursor.y = 0; params->cursor.w = 64; params->cursor.h = 64; params->sprite.fb = NULL; params->sprite.x = 0; params->sprite.y = 0; params->sprite.w = 64; params->sprite.h = 64; } static bool connector_get_mode(drmModeConnectorPtr c, drmModeModeInfoPtr *mode) { *mode = NULL; if (c->connection != DRM_MODE_CONNECTED || !c->count_modes) return false; if (c->connector_type == DRM_MODE_CONNECTOR_eDP && opt.no_edp) return false; if (opt.small_modes) *mode = get_connector_smallest_mode(c); else *mode = &c->modes[0]; /* On HSW the CRC WA is so awful that it makes you think everything is * bugged. */ if (IS_HASWELL(intel_get_drm_devid(drm.fd)) && c->connector_type == DRM_MODE_CONNECTOR_eDP) *mode = &std_1024_mode; return true; } static bool init_modeset_cached_params(void) { int i; uint32_t prim_connector_id = 0, scnd_connector_id = 0; drmModeModeInfoPtr prim_mode = NULL, scnd_mode = NULL; drmModeModeInfoPtr tmp_mode; /* First, try to find an eDP monitor since it's the only possible type * for PSR. */ for (i = 0; i < drm.res->count_connectors; i++) { if (drm.connectors[i]->connector_type != DRM_MODE_CONNECTOR_eDP) continue; if (connector_get_mode(drm.connectors[i], &tmp_mode)) { prim_connector_id = drm.res->connectors[i]; prim_mode = tmp_mode; } } for (i = 0; i < drm.res->count_connectors; i++) { /* Don't pick again what we just selected on the above loop. */ if (drm.res->connectors[i] == prim_connector_id) continue; if (connector_get_mode(drm.connectors[i], &tmp_mode)) { if (!prim_connector_id) { prim_connector_id = drm.res->connectors[i]; prim_mode = tmp_mode; } else if (!scnd_connector_id) { scnd_connector_id = drm.res->connectors[i]; scnd_mode = tmp_mode; break; } } } if (!prim_connector_id) return false; init_mode_params(&prim_mode_params, drm.res->crtcs[0], 0, prim_connector_id, prim_mode); print_mode_info("Primary", &prim_mode_params); if (!scnd_connector_id) { scnd_mode_params.connector_id = 0; return true; } igt_assert(drm.res->count_crtcs >= 2); init_mode_params(&scnd_mode_params, drm.res->crtcs[1], 1, scnd_connector_id, scnd_mode); print_mode_info("Secondary", &scnd_mode_params); return true; } static void create_fb(enum pixel_format pformat, int width, int height, uint64_t tiling, int plane, struct igt_fb *fb) { uint32_t format; unsigned int size, stride; int bpp; uint64_t tiling_for_size; switch (pformat) { case FORMAT_RGB888: if (plane == PLANE_CUR) format = DRM_FORMAT_ARGB8888; else format = DRM_FORMAT_XRGB8888; break; case FORMAT_RGB565: /* Only the primary plane supports 16bpp! */ if (plane == PLANE_PRI) format = DRM_FORMAT_RGB565; else if (plane == PLANE_CUR) format = DRM_FORMAT_ARGB8888; else format = DRM_FORMAT_XRGB8888; break; case FORMAT_RGB101010: if (plane == PLANE_PRI) format = DRM_FORMAT_XRGB2101010; else if (plane == PLANE_CUR) format = DRM_FORMAT_ARGB8888; else format = DRM_FORMAT_XRGB8888; break; default: igt_assert(false); } /* We want all frontbuffers with the same width/height/format to have * the same size regardless of tiling since we want to properly exercise * the Kernel's specific tiling-checking code paths without accidentally * hitting size-checking ones first. */ bpp = igt_drm_format_to_bpp(format); if (plane == PLANE_CUR) tiling_for_size = LOCAL_DRM_FORMAT_MOD_NONE; else tiling_for_size = LOCAL_I915_FORMAT_MOD_X_TILED; igt_calc_fb_size(drm.fd, width, height, bpp, tiling_for_size, &size, &stride); igt_create_fb_with_bo_size(drm.fd, width, height, format, tiling, fb, size, stride); } static uint32_t pick_color(struct igt_fb *fb, enum color ecolor) { uint32_t color, r, g, b, b2, a; bool alpha = false; switch (fb->drm_format) { case DRM_FORMAT_RGB565: a = 0x0; r = 0x1F << 11; g = 0x3F << 5; b = 0x1F; b2 = 0x10; break; case DRM_FORMAT_ARGB8888: alpha = true; case DRM_FORMAT_XRGB8888: a = 0xFF << 24; r = 0xFF << 16; g = 0xFF << 8; b = 0xFF; b2 = 0x80; break; case DRM_FORMAT_ARGB2101010: alpha = true; case DRM_FORMAT_XRGB2101010: a = 0x3 << 30; r = 0x3FF << 20; g = 0x3FF << 10; b = 0x3FF; b2 = 0x200; break; default: igt_assert(false); } switch (ecolor) { case COLOR_RED: color = r; break; case COLOR_GREEN: color = g; break; case COLOR_BLUE: color = b; break; case COLOR_MAGENTA: color = r | b; break; case COLOR_CYAN: color = g | b; break; case COLOR_SCND_BG: color = b2; break; default: igt_assert(false); } if (alpha) color |= a; return color; } static void fill_fb(struct igt_fb *fb, enum color ecolor) { igt_draw_fill_fb(drm.fd, fb, pick_color(fb, ecolor)); } /* * This is how the prim, scnd and offscreen FBs should be positioned inside the * shared FB. The prim buffer starts at the X and Y offsets defined by * opt.shared_fb_{x,y}_offset, then scnd starts at the same X pixel offset, * right after prim ends on the Y axis, then the offscreen fb starts after scnd * ends. Just like the picture: * * +-------------------------+ * | shared fb | * | +------------------+ | * | | prim | | * | | | | * | | | | * | | | | * | +------------------+--+ * | | scnd | * | | | * | | | * | +---------------+-----+ * | | offscreen | | * | | | | * | | | | * +---+---------------+-----+ * * We do it vertically instead of the more common horizontal case in order to * avoid super huge strides not supported by FBC. */ static void create_shared_fb(enum pixel_format format) { int prim_w, prim_h, scnd_w, scnd_h, offs_w, offs_h, big_w, big_h; struct screen_fbs *s = &fbs[format]; prim_w = prim_mode_params.mode->hdisplay; prim_h = prim_mode_params.mode->vdisplay; if (scnd_mode_params.connector_id) { scnd_w = scnd_mode_params.mode->hdisplay; scnd_h = scnd_mode_params.mode->vdisplay; } else { scnd_w = 0; scnd_h = 0; } offs_w = offscreen_fb.w; offs_h = offscreen_fb.h; big_w = prim_w; if (scnd_w > big_w) big_w = scnd_w; if (offs_w > big_w) big_w = offs_w; big_w += opt.shared_fb_x_offset; big_h = prim_h + scnd_h + offs_h + opt.shared_fb_y_offset; create_fb(format, big_w, big_h, LOCAL_I915_FORMAT_MOD_X_TILED, PLANE_PRI, &s->big); } static void create_fbs(enum pixel_format format) { struct screen_fbs *s = &fbs[format]; if (s->initialized) return; s->initialized = true; create_fb(format, prim_mode_params.mode->hdisplay, prim_mode_params.mode->vdisplay, LOCAL_I915_FORMAT_MOD_X_TILED, PLANE_PRI, &s->prim_pri); create_fb(format, prim_mode_params.cursor.w, prim_mode_params.cursor.h, LOCAL_DRM_FORMAT_MOD_NONE, PLANE_CUR, &s->prim_cur); create_fb(format, prim_mode_params.sprite.w, prim_mode_params.sprite.h, LOCAL_I915_FORMAT_MOD_X_TILED, PLANE_SPR, &s->prim_spr); create_fb(format, offscreen_fb.w, offscreen_fb.h, LOCAL_I915_FORMAT_MOD_X_TILED, PLANE_PRI, &s->offscreen); create_shared_fb(format); if (!scnd_mode_params.connector_id) return; create_fb(format, scnd_mode_params.mode->hdisplay, scnd_mode_params.mode->vdisplay, LOCAL_I915_FORMAT_MOD_X_TILED, PLANE_PRI, &s->scnd_pri); create_fb(format, scnd_mode_params.cursor.w, scnd_mode_params.cursor.h, LOCAL_DRM_FORMAT_MOD_NONE, PLANE_CUR, &s->scnd_cur); create_fb(format, scnd_mode_params.sprite.w, scnd_mode_params.sprite.h, LOCAL_I915_FORMAT_MOD_X_TILED, PLANE_SPR, &s->scnd_spr); } static void destroy_fbs(enum pixel_format format) { struct screen_fbs *s = &fbs[format]; if (!s->initialized) return; if (scnd_mode_params.connector_id) { igt_remove_fb(drm.fd, &s->scnd_pri); igt_remove_fb(drm.fd, &s->scnd_cur); igt_remove_fb(drm.fd, &s->scnd_spr); } igt_remove_fb(drm.fd, &s->prim_pri); igt_remove_fb(drm.fd, &s->prim_cur); igt_remove_fb(drm.fd, &s->prim_spr); igt_remove_fb(drm.fd, &s->offscreen); igt_remove_fb(drm.fd, &s->big); } static bool set_mode_for_params(struct modeset_params *params) { int rc; rc = drmModeSetCrtc(drm.fd, params->crtc_id, params->fb.fb->fb_id, params->fb.x, params->fb.y, ¶ms->connector_id, 1, params->mode); return (rc == 0); } static bool fbc_is_enabled(void) { char buf[128]; igt_debugfs_read("i915_fbc_status", buf); return strstr(buf, "FBC enabled\n"); } static void fbc_print_status(void) { char buf[128]; igt_debugfs_read("i915_fbc_status", buf); igt_info("FBC status:\n%s\n", buf); } static bool psr_is_enabled(void) { char buf[256]; igt_debugfs_read("i915_edp_psr_status", buf); return strstr(buf, "\nActive: yes\n") && strstr(buf, "\nHW Enabled & Active bit: yes\n"); } static void psr_print_status(void) { char buf[256]; igt_debugfs_read("i915_edp_psr_status", buf); igt_info("PSR status:\n%s\n", buf); } static struct timespec fbc_get_last_action(void) { struct timespec ret = { 0, 0 }; char buf[128]; char *action; ssize_t n_read; igt_debugfs_read("i915_fbc_status", buf); action = strstr(buf, "\nLast action:"); igt_assert(action); n_read = sscanf(action, "Last action: %ld.%ld", &ret.tv_sec, &ret.tv_nsec); igt_assert(n_read == 2); return ret; } static bool fbc_last_action_changed(void) { struct timespec t_new, t_old; t_old = fbc.last_action; t_new = fbc_get_last_action(); fbc.last_action = t_new; #if 0 igt_info("old: %ld.%ld\n", t_old.tv_sec, t_old.tv_nsec); igt_info("new: %ld.%ld\n", t_new.tv_sec, t_new.tv_nsec); #endif return t_old.tv_sec != t_new.tv_sec || t_old.tv_nsec != t_new.tv_nsec; } static void fbc_update_last_action(void) { if (!fbc.supports_last_action) return; fbc.last_action = fbc_get_last_action(); #if 0 igt_info("Last action: %ld.%ld\n", fbc.last_action.tv_sec, fbc.last_action.tv_nsec); #endif } static void fbc_setup_last_action(void) { ssize_t n_read; char buf[128]; char *action; igt_debugfs_read("i915_fbc_status", buf); action = strstr(buf, "\nLast action:"); if (!action) { igt_info("FBC last action not supported\n"); return; } fbc.supports_last_action = true; n_read = sscanf(action, "Last action: %ld.%ld", &fbc.last_action.tv_sec, &fbc.last_action.tv_nsec); igt_assert(n_read == 2); } static bool fbc_is_compressing(void) { char buf[128]; igt_debugfs_read("i915_fbc_status", buf); return strstr(buf, "\nCompressing: yes\n") != NULL; } static bool fbc_wait_for_compression(void) { return igt_wait(fbc_is_compressing(), 2000, 1); } static void fbc_setup_compressing(void) { char buf[128]; igt_debugfs_read("i915_fbc_status", buf); if (strstr(buf, "\nCompressing:")) fbc.supports_compressing = true; else igt_info("FBC compression information not supported\n"); } static bool fbc_not_enough_stolen(void) { char buf[128]; igt_debugfs_read("i915_fbc_status", buf); return strstr(buf, "FBC disabled: not enough stolen memory\n"); } static bool fbc_wait_until_enabled(void) { return igt_wait(fbc_is_enabled(), 2000, 1); } static bool psr_wait_until_enabled(void) { return igt_wait(psr_is_enabled(), 5000, 1); } #define fbc_enable() igt_set_module_param_int("enable_fbc", 1) #define fbc_disable() igt_set_module_param_int("enable_fbc", 0) #define psr_enable() igt_set_module_param_int("enable_psr", 1) #define psr_disable() igt_set_module_param_int("enable_psr", 0) static void get_sink_crc(sink_crc_t *crc, bool mandatory) { int rc, errno_; lseek(sink_crc.fd, 0, SEEK_SET); rc = read(sink_crc.fd, crc->data, SINK_CRC_SIZE); errno_ = errno; if (rc == -1 && errno_ == ETIMEDOUT) { if (mandatory) igt_skip("Sink CRC is unreliable on this machine. Try running this test again individually\n"); else igt_info("Sink CRC is unreliable on this machine. Try running this test again individually\n"); } igt_assert(rc == SINK_CRC_SIZE); } static bool sink_crc_equal(sink_crc_t *a, sink_crc_t *b) { return (memcmp(a->data, b->data, SINK_CRC_SIZE) == 0); } #define assert_sink_crc_equal(a, b) igt_assert(sink_crc_equal(a, b)) static struct rect pat1_get_rect(struct fb_region *fb, int r) { struct rect rect; switch (r) { case 0: rect.x = 0; rect.y = 0; rect.w = fb->w / 8; rect.h = fb->h / 8; rect.color = pick_color(fb->fb, COLOR_GREEN); break; case 1: rect.x = fb->w / 8 * 4; rect.y = fb->h / 8 * 4; rect.w = fb->w / 8 * 2; rect.h = fb->h / 8 * 2; rect.color = pick_color(fb->fb, COLOR_RED); break; case 2: rect.x = fb->w / 16 + 1; rect.y = fb->h / 16 + 1; rect.w = fb->w / 8 + 1; rect.h = fb->h / 8 + 1; rect.color = pick_color(fb->fb, COLOR_MAGENTA); break; case 3: rect.x = fb->w - 1; rect.y = fb->h - 1; rect.w = 1; rect.h = 1; rect.color = pick_color(fb->fb, COLOR_CYAN); break; default: igt_assert(false); } return rect; } static struct rect pat2_get_rect(struct fb_region *fb, int r) { struct rect rect; rect.x = 0; rect.y = 0; rect.w = 64; rect.h = 64; switch (r) { case 0: rect.color = pick_color(fb->fb, COLOR_GREEN); break; case 1: rect.x = 31; rect.y = 31; rect.w = 31; rect.h = 31; rect.color = pick_color(fb->fb, COLOR_RED); break; case 2: rect.x = 16; rect.y = 16; rect.w = 32; rect.h = 32; rect.color = pick_color(fb->fb, COLOR_MAGENTA); break; case 3: rect.color = pick_color(fb->fb, COLOR_CYAN); break; default: igt_assert(false); } return rect; } static struct rect pat3_get_rect(struct fb_region *fb, int r) { struct rect rect; rect.w = 64; rect.h = 64; rect.color = pick_color(fb->fb, COLOR_GREEN); switch (r) { case 0: rect.x = 0; rect.y = 0; break; case 1: rect.x = 64; rect.y = 64; break; case 2: rect.x = 1; rect.y = 1; break; case 3: rect.x = fb->w - 64; rect.y = fb->h - 64; break; case 4: rect.x = fb->w / 2 - 32; rect.y = fb->h / 2 - 32; break; default: igt_assert(false); } return rect; } static struct rect pat4_get_rect(struct fb_region *fb, int r) { struct rect rect; igt_assert_eq(r, 0); rect.x = 0; rect.y = 0; rect.w = fb->w; rect.h = fb->h; rect.color = pick_color(fb->fb, COLOR_GREEN); return rect; } static void fb_dirty_ioctl(struct fb_region *fb, struct rect *rect) { int rc; drmModeClip clip = { .x1 = rect->x, .x2 = rect->x + rect->w, .y1 = rect->y, .y2 = rect->y + rect->h, }; rc = drmModeDirtyFB(drm.fd, fb->fb->fb_id, &clip, 1); igt_assert(rc == 0 || rc == -ENOSYS); } static void draw_rect(struct draw_pattern_info *pattern, struct fb_region *fb, enum igt_draw_method method, int r) { struct rect rect = pattern->get_rect(fb, r); igt_draw_rect_fb(drm.fd, drm.bufmgr, NULL, fb->fb, method, fb->x + rect.x, fb->y + rect.y, rect.w, rect.h, rect.color); if (method == IGT_DRAW_MMAP_WC) fb_dirty_ioctl(fb, &rect); } static void draw_rect_igt_fb(struct draw_pattern_info *pattern, struct igt_fb *fb, enum igt_draw_method method, int r) { struct fb_region region = { .fb = fb, .x = 0, .y = 0, .w = fb->width, .h = fb->height, }; draw_rect(pattern, ®ion, method, r); } static void fill_fb_region(struct fb_region *region, enum color ecolor) { uint32_t color = pick_color(region->fb, ecolor); igt_draw_rect_fb(drm.fd, NULL, NULL, region->fb, IGT_DRAW_MMAP_CPU, region->x, region->y, region->w, region->h, color); } static void unset_all_crtcs(void) { int i, rc; for (i = 0; i < drm.res->count_crtcs; i++) { rc = drmModeSetCrtc(drm.fd, drm.res->crtcs[i], -1, 0, 0, NULL, 0, NULL); igt_assert_eq(rc, 0); rc = drmModeSetCursor(drm.fd, drm.res->crtcs[i], 0, 0, 0); igt_assert_eq(rc, 0); } for (i = 0; i < drm.plane_res->count_planes; i++) { rc = drmModeSetPlane(drm.fd, drm.plane_res->planes[i], 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); igt_assert_eq(rc, 0); } } static void disable_features(const struct test_mode *t) { if (t->feature == FEATURE_DEFAULT) return; fbc_disable(); psr_disable(); } static void *busy_thread_func(void *data) { while (!busy_thread.stop) igt_draw_rect(drm.fd, drm.bufmgr, NULL, busy_thread.handle, busy_thread.size, busy_thread.stride, IGT_DRAW_BLT, 0, 0, busy_thread.width, busy_thread.height, busy_thread.color, busy_thread.bpp); pthread_exit(0); } static void start_busy_thread(struct igt_fb *fb) { int rc; igt_assert(busy_thread.stop == true); busy_thread.stop = false; busy_thread.handle = fb->gem_handle; busy_thread.size = fb->size; busy_thread.stride = fb->stride; busy_thread.width = fb->width; busy_thread.height = fb->height; busy_thread.color = pick_color(fb, COLOR_PRIM_BG); busy_thread.bpp = igt_drm_format_to_bpp(fb->drm_format); rc = pthread_create(&busy_thread.thread, NULL, busy_thread_func, NULL); igt_assert_eq(rc, 0); } static void stop_busy_thread(void) { if (!busy_thread.stop) { busy_thread.stop = true; igt_assert(pthread_join(busy_thread.thread, NULL) == 0); } } static void print_crc(const char *str, struct both_crcs *crc) { int i; char *pipe_str; pipe_str = igt_crc_to_string(&crc->pipe); igt_debug("%s pipe:[%s] sink:[", str, pipe_str); for (i = 0; i < SINK_CRC_SIZE; i++) igt_debug("%c", crc->sink.data[i]); igt_debug("]\n"); free(pipe_str); } static void collect_crcs(struct both_crcs *crcs, bool mandatory_sink_crc) { igt_pipe_crc_collect_crc(pipe_crc, &crcs->pipe); if (sink_crc.supported) get_sink_crc(&crcs->sink, mandatory_sink_crc); else memcpy(&crcs->sink, "unsupported!", SINK_CRC_SIZE); } static void init_blue_crc(enum pixel_format format, bool mandatory_sink_crc) { struct igt_fb blue; int rc; if (blue_crcs[format].initialized) return; create_fb(format, prim_mode_params.mode->hdisplay, prim_mode_params.mode->vdisplay, LOCAL_I915_FORMAT_MOD_X_TILED, PLANE_PRI, &blue); fill_fb(&blue, COLOR_PRIM_BG); rc = drmModeSetCrtc(drm.fd, prim_mode_params.crtc_id, blue.fb_id, 0, 0, &prim_mode_params.connector_id, 1, prim_mode_params.mode); igt_assert_eq(rc, 0); collect_crcs(&blue_crcs[format].crc, mandatory_sink_crc); print_crc("Blue CRC: ", &blue_crcs[format].crc); unset_all_crtcs(); igt_remove_fb(drm.fd, &blue); blue_crcs[format].initialized = true; } static void init_crcs(enum pixel_format format, struct draw_pattern_info *pattern, bool mandatory_sink_crc) { int r, r_, rc; struct igt_fb tmp_fbs[pattern->n_rects]; if (pattern->initialized[format]) return; pattern->crcs[format] = calloc(pattern->n_rects, sizeof(*(pattern->crcs[format]))); for (r = 0; r < pattern->n_rects; r++) create_fb(format, prim_mode_params.mode->hdisplay, prim_mode_params.mode->vdisplay, LOCAL_I915_FORMAT_MOD_X_TILED, PLANE_PRI, &tmp_fbs[r]); for (r = 0; r < pattern->n_rects; r++) fill_fb(&tmp_fbs[r], COLOR_PRIM_BG); if (pattern->frames_stack) { for (r = 0; r < pattern->n_rects; r++) for (r_ = 0; r_ <= r; r_++) draw_rect_igt_fb(pattern, &tmp_fbs[r], IGT_DRAW_PWRITE, r_); } else { for (r = 0; r < pattern->n_rects; r++) draw_rect_igt_fb(pattern, &tmp_fbs[r], IGT_DRAW_PWRITE, r); } for (r = 0; r < pattern->n_rects; r++) { rc = drmModeSetCrtc(drm.fd, prim_mode_params.crtc_id, tmp_fbs[r].fb_id, 0, 0, &prim_mode_params.connector_id, 1, prim_mode_params.mode); igt_assert_eq(rc, 0); collect_crcs(&pattern->crcs[format][r], mandatory_sink_crc); } for (r = 0; r < pattern->n_rects; r++) { igt_debug("Rect %d CRC:", r); print_crc("", &pattern->crcs[format][r]); } unset_all_crtcs(); for (r = 0; r < pattern->n_rects; r++) igt_remove_fb(drm.fd, &tmp_fbs[r]); pattern->initialized[format] = true; } static uint64_t get_plane_type(uint32_t plane_id) { bool found; uint64_t prop_value; drmModePropertyPtr prop; found = kmstest_get_property(drm.fd, plane_id, DRM_MODE_OBJECT_PLANE, "type", NULL, &prop_value, &prop); igt_assert(found); igt_assert(prop->flags & DRM_MODE_PROP_ENUM); igt_assert(prop_value < prop->count_enums); drmModeFreeProperty(prop); return prop_value; } static void setup_drm(void) { int i, rc; drm.fd = drm_open_driver_master(DRIVER_INTEL); drm.res = drmModeGetResources(drm.fd); igt_assert(drm.res->count_connectors <= MAX_CONNECTORS); for (i = 0; i < drm.res->count_connectors; i++) drm.connectors[i] = drmModeGetConnectorCurrent(drm.fd, drm.res->connectors[i]); rc = drmSetClientCap(drm.fd, DRM_CLIENT_CAP_UNIVERSAL_PLANES, 1); igt_require(rc == 0); drm.plane_res = drmModeGetPlaneResources(drm.fd); igt_assert(drm.plane_res->count_planes <= MAX_PLANES); for (i = 0; i < drm.plane_res->count_planes; i++) { drm.planes[i] = drmModeGetPlane(drm.fd, drm.plane_res->planes[i]); drm.plane_types[i] = get_plane_type(drm.plane_res->planes[i]); } drm.bufmgr = drm_intel_bufmgr_gem_init(drm.fd, 4096); igt_assert(drm.bufmgr); drm_intel_bufmgr_gem_enable_reuse(drm.bufmgr); } static void teardown_drm(void) { int i; drm_intel_bufmgr_destroy(drm.bufmgr); for (i = 0; i < drm.plane_res->count_planes; i++) drmModeFreePlane(drm.planes[i]); drmModeFreePlaneResources(drm.plane_res); for (i = 0; i < drm.res->count_connectors; i++) drmModeFreeConnector(drm.connectors[i]); drmModeFreeResources(drm.res); close(drm.fd); } static void setup_modeset(void) { igt_require(init_modeset_cached_params()); offscreen_fb.fb = NULL; offscreen_fb.w = 1024; offscreen_fb.h = 1024; create_fbs(FORMAT_DEFAULT); kmstest_set_vt_graphics_mode(); } static void teardown_modeset(void) { destroy_fbs(FORMAT_DEFAULT); } static void setup_sink_crc(void) { ssize_t rc; sink_crc_t crc; int errno_; drmModeConnectorPtr c; c = get_connector(prim_mode_params.connector_id); if (c->connector_type != DRM_MODE_CONNECTOR_eDP) { igt_info("Sink CRC not supported: primary screen is not eDP\n"); return; } /* We need to make sure there's a mode set on the eDP screen and it's * not on DPMS state, otherwise we fall into the "Unexpected sink CRC * error" case. */ prim_mode_params.fb.fb = &fbs[FORMAT_DEFAULT].prim_pri; prim_mode_params.fb.x = prim_mode_params.fb.y = 0; fill_fb_region(&prim_mode_params.fb, COLOR_PRIM_BG); set_mode_for_params(&prim_mode_params); sink_crc.fd = igt_debugfs_open("i915_sink_crc_eDP1", O_RDONLY); igt_assert_lte(0, sink_crc.fd); rc = read(sink_crc.fd, crc.data, SINK_CRC_SIZE); errno_ = errno; if (rc == -1 && errno_ == ENOTTY) igt_info("Sink CRC not supported: panel doesn't support it\n"); if (rc == -1 && errno_ == ETIMEDOUT) igt_info("Sink CRC not reliable on this panel: skipping it\n"); else if (rc == SINK_CRC_SIZE) sink_crc.supported = true; else igt_info("Unexpected sink CRC error, rc=:%zd errno:%d %s\n", rc, errno_, strerror(errno_)); } static void setup_crcs(void) { enum pixel_format f; pipe_crc = igt_pipe_crc_new(0, INTEL_PIPE_CRC_SOURCE_AUTO); setup_sink_crc(); for (f = 0; f < FORMAT_COUNT; f++) blue_crcs[f].initialized = false; pattern1.frames_stack = true; pattern1.n_rects = 4; pattern1.get_rect = pat1_get_rect; for (f = 0; f < FORMAT_COUNT; f++) { pattern1.initialized[f] = false; pattern1.crcs[f] = NULL; } pattern2.frames_stack = true; pattern2.n_rects = 4; pattern2.get_rect = pat2_get_rect; for (f = 0; f < FORMAT_COUNT; f++) { pattern2.initialized[f] = false; pattern2.crcs[f] = NULL; } pattern3.frames_stack = false; pattern3.n_rects = 5; pattern3.get_rect = pat3_get_rect; for (f = 0; f < FORMAT_COUNT; f++) { pattern3.initialized[f] = false; pattern3.crcs[f] = NULL; } pattern4.frames_stack = false; pattern4.n_rects = 1; pattern4.get_rect = pat4_get_rect; for (f = 0; f < FORMAT_COUNT; f++) { pattern4.initialized[f] = false; pattern4.crcs[f] = NULL; } } static void teardown_crcs(void) { enum pixel_format f; for (f = 0; f < FORMAT_COUNT; f++) { if (pattern1.crcs[f]) free(pattern1.crcs[f]); if (pattern2.crcs[f]) free(pattern2.crcs[f]); if (pattern3.crcs[f]) free(pattern3.crcs[f]); if (pattern4.crcs[f]) free(pattern4.crcs[f]); } if (sink_crc.fd != -1) close(sink_crc.fd); igt_pipe_crc_free(pipe_crc); } static bool fbc_supported_on_chipset(void) { char buf[128]; igt_debugfs_read("i915_fbc_status", buf); return !strstr(buf, "FBC unsupported on this chipset\n"); } static void setup_fbc(void) { if (!fbc_supported_on_chipset()) { igt_info("Can't test FBC: not supported on this chipset\n"); return; } fbc.can_test = true; fbc_setup_last_action(); fbc_setup_compressing(); } static void teardown_fbc(void) { } static bool psr_sink_has_support(void) { char buf[256]; igt_debugfs_read("i915_edp_psr_status", buf); return strstr(buf, "Sink_Support: yes\n"); } static void setup_psr(void) { if (get_connector(prim_mode_params.connector_id)->connector_type != DRM_MODE_CONNECTOR_eDP) { igt_info("Can't test PSR: no usable eDP screen.\n"); return; } if (!psr_sink_has_support()) { igt_info("Can't test PSR: not supported by sink.\n"); return; } psr.can_test = true; } static void teardown_psr(void) { } static void setup_environment(void) { setup_drm(); setup_modeset(); setup_fbc(); setup_psr(); setup_crcs(); } static void teardown_environment(void) { stop_busy_thread(); teardown_crcs(); teardown_psr(); teardown_fbc(); teardown_modeset(); teardown_drm(); } static void wait_user(int step, const char *msg) { if (opt.step < step) return; igt_info("%s Press enter...\n", msg); while (getchar() != '\n') ; } static struct modeset_params *pick_params(const struct test_mode *t) { switch (t->screen) { case SCREEN_PRIM: return &prim_mode_params; case SCREEN_SCND: return &scnd_mode_params; case SCREEN_OFFSCREEN: return NULL; default: igt_assert(false); } } static struct fb_region *pick_target(const struct test_mode *t, struct modeset_params *params) { if (!params) return &offscreen_fb; switch (t->plane) { case PLANE_PRI: return ¶ms->fb; case PLANE_CUR: return ¶ms->cursor; case PLANE_SPR: return ¶ms->sprite; default: igt_assert(false); } } static void do_flush(const struct test_mode *t) { struct modeset_params *params = pick_params(t); struct fb_region *target = pick_target(t, params); gem_set_domain(drm.fd, target->fb->gem_handle, I915_GEM_DOMAIN_GTT, 0); } #define DONT_ASSERT_CRC (1 << 0) #define DONT_ASSERT_FEATURE_STATUS (1 << 1) #define FBC_ASSERT_FLAGS (0xF << 2) #define ASSERT_FBC_ENABLED (1 << 2) #define ASSERT_FBC_DISABLED (1 << 3) #define ASSERT_LAST_ACTION_CHANGED (1 << 4) #define ASSERT_NO_ACTION_CHANGE (1 << 5) #define PSR_ASSERT_FLAGS (3 << 6) #define ASSERT_PSR_ENABLED (1 << 6) #define ASSERT_PSR_DISABLED (1 << 7) static int adjust_assertion_flags(const struct test_mode *t, int flags) { if (!(flags & DONT_ASSERT_FEATURE_STATUS)) { if (!(flags & ASSERT_FBC_DISABLED)) flags |= ASSERT_FBC_ENABLED; if (!(flags & ASSERT_PSR_DISABLED)) flags |= ASSERT_PSR_ENABLED; } if ((t->feature & FEATURE_FBC) == 0) flags &= ~FBC_ASSERT_FLAGS; if ((t->feature & FEATURE_PSR) == 0) flags &= ~PSR_ASSERT_FLAGS; return flags; } #define do_crc_assertions(flags, mandatory_sink_crc) do { \ int flags__ = (flags); \ struct both_crcs crc_; \ \ if (!opt.check_crc || (flags__ & DONT_ASSERT_CRC)) \ break; \ \ collect_crcs(&crc_, mandatory_sink_crc); \ print_crc("Calculated CRC:", &crc_); \ \ igt_assert(wanted_crc); \ igt_assert_crc_equal(&crc_.pipe, &wanted_crc->pipe); \ if (mandatory_sink_crc) \ assert_sink_crc_equal(&crc_.sink, &wanted_crc->sink); \ else \ if (!sink_crc_equal(&crc_.sink, &wanted_crc->sink)) \ igt_info("Sink CRC differ, but not required\n"); \ } while (0) #define do_status_assertions(flags_) do { \ if (!opt.check_status) { \ /* Make sure we settle before continuing. */ \ sleep(1); \ break; \ } \ \ if (flags_ & ASSERT_FBC_ENABLED) { \ igt_require(!fbc_not_enough_stolen()); \ if (!fbc_wait_until_enabled()) { \ fbc_print_status(); \ igt_assert_f(false, "FBC disabled\n"); \ } \ \ if (fbc.supports_compressing && \ opt.fbc_check_compression) \ igt_assert(fbc_wait_for_compression()); \ } else if (flags_ & ASSERT_FBC_DISABLED) { \ igt_assert(!fbc_wait_until_enabled()); \ } \ \ if (flags_ & ASSERT_PSR_ENABLED) { \ if (!psr_wait_until_enabled()) { \ psr_print_status(); \ igt_assert_f(false, "PSR disabled\n"); \ } \ } else if (flags_ & ASSERT_PSR_DISABLED) { \ igt_assert(!psr_wait_until_enabled()); \ } \ } while (0) #define do_assertions(flags) do { \ int flags_ = adjust_assertion_flags(t, (flags)); \ bool mandatory_sink_crc = t->feature & FEATURE_PSR; \ \ wait_user(2, "Paused before assertions."); \ \ /* Check the CRC to make sure the drawing operations work \ * immediately, independently of the features being enabled. */ \ do_crc_assertions(flags_, mandatory_sink_crc); \ \ /* Now we can flush things to make the test faster. */ \ do_flush(t); \ \ do_status_assertions(flags_); \ \ /* Check CRC again to make sure the compressed screen is ok, \ * except if we're not drawing on the primary screen. On this \ * case, the first check should be enough and a new CRC check \ * would only delay the test suite while adding no value to the \ * test suite. */ \ if (t->screen == SCREEN_PRIM) \ do_crc_assertions(flags_, mandatory_sink_crc); \ \ if (fbc.supports_last_action && opt.fbc_check_last_action) { \ if (flags_ & ASSERT_LAST_ACTION_CHANGED) \ igt_assert(fbc_last_action_changed()); \ else if (flags_ & ASSERT_NO_ACTION_CHANGE) \ igt_assert(!fbc_last_action_changed()); \ } \ \ wait_user(1, "Paused after assertions."); \ } while (0) static void enable_prim_screen_and_wait(const struct test_mode *t) { fill_fb_region(&prim_mode_params.fb, COLOR_PRIM_BG); set_mode_for_params(&prim_mode_params); wanted_crc = &blue_crcs[t->format].crc; fbc_update_last_action(); do_assertions(ASSERT_NO_ACTION_CHANGE); } static void enable_scnd_screen_and_wait(const struct test_mode *t) { fill_fb_region(&scnd_mode_params.fb, COLOR_SCND_BG); set_mode_for_params(&scnd_mode_params); do_assertions(ASSERT_NO_ACTION_CHANGE); } static void set_cursor_for_test(const struct test_mode *t, struct modeset_params *params) { int rc; fill_fb_region(¶ms->cursor, COLOR_PRIM_BG); rc = drmModeMoveCursor(drm.fd, params->crtc_id, 0, 0); igt_assert_eq(rc, 0); rc = drmModeSetCursor(drm.fd, params->crtc_id, params->cursor.fb->gem_handle, params->cursor.w, params->cursor.h); igt_assert_eq(rc, 0); do_assertions(ASSERT_NO_ACTION_CHANGE); } static void set_sprite_for_test(const struct test_mode *t, struct modeset_params *params) { int rc; fill_fb_region(¶ms->sprite, COLOR_PRIM_BG); rc = drmModeSetPlane(drm.fd, params->sprite_id, params->crtc_id, params->sprite.fb->fb_id, 0, 0, 0, params->sprite.w, params->sprite.h, 0, 0, params->sprite.w << 16, params->sprite.h << 16); igt_assert_eq(rc, 0); do_assertions(ASSERT_NO_ACTION_CHANGE); } static void enable_features_for_test(const struct test_mode *t) { if (t->feature == FEATURE_DEFAULT) return; if (t->feature & FEATURE_FBC) fbc_enable(); if (t->feature & FEATURE_PSR) psr_enable(); } static void check_test_requirements(const struct test_mode *t) { if (t->pipes == PIPE_DUAL) igt_require_f(scnd_mode_params.connector_id, "Can't test dual pipes with the current outputs\n"); if (t->feature & FEATURE_FBC) igt_require_f(fbc.can_test, "Can't test FBC with this chipset\n"); if (t->feature & FEATURE_PSR) { igt_require_f(psr.can_test, "Can't test PSR with the current outputs\n"); igt_require_f(sink_crc.supported, "Can't test PSR without sink CRCs\n"); } if (opt.only_pipes != PIPE_COUNT) igt_require(t->pipes == opt.only_pipes); } static void set_crtc_fbs(const struct test_mode *t) { struct screen_fbs *s = &fbs[t->format]; create_fbs(t->format); switch (t->fbs) { case FBS_INDIVIDUAL: prim_mode_params.fb.fb = &s->prim_pri; scnd_mode_params.fb.fb = &s->scnd_pri; offscreen_fb.fb = &s->offscreen; prim_mode_params.fb.x = 0; scnd_mode_params.fb.x = 0; offscreen_fb.x = 0; prim_mode_params.fb.y = 0; scnd_mode_params.fb.y = 0; offscreen_fb.y = 0; break; case FBS_SHARED: /* Please see the comment at the top of create_shared_fb(). */ prim_mode_params.fb.fb = &s->big; scnd_mode_params.fb.fb = &s->big; offscreen_fb.fb = &s->big; prim_mode_params.fb.x = opt.shared_fb_x_offset; scnd_mode_params.fb.x = opt.shared_fb_x_offset; offscreen_fb.x = opt.shared_fb_x_offset; prim_mode_params.fb.y = opt.shared_fb_y_offset; scnd_mode_params.fb.y = prim_mode_params.fb.y + prim_mode_params.fb.h; offscreen_fb.y = scnd_mode_params.fb.y + scnd_mode_params.fb.h; break; default: igt_assert(false); } prim_mode_params.cursor.fb = &s->prim_cur; prim_mode_params.sprite.fb = &s->prim_spr; scnd_mode_params.cursor.fb = &s->scnd_cur; scnd_mode_params.sprite.fb = &s->scnd_spr; } static void prepare_subtest_data(const struct test_mode *t, struct draw_pattern_info *pattern) { check_test_requirements(t); stop_busy_thread(); disable_features(t); set_crtc_fbs(t); if (t->screen == SCREEN_OFFSCREEN) fill_fb_region(&offscreen_fb, COLOR_OFFSCREEN_BG); unset_all_crtcs(); init_blue_crc(t->format, t->feature & FEATURE_PSR); if (pattern) init_crcs(t->format, pattern, t->feature & FEATURE_PSR); enable_features_for_test(t); } static void prepare_subtest_screens(const struct test_mode *t) { enable_prim_screen_and_wait(t); if (t->screen == SCREEN_PRIM) { if (t->plane == PLANE_CUR) set_cursor_for_test(t, &prim_mode_params); if (t->plane == PLANE_SPR) set_sprite_for_test(t, &prim_mode_params); } if (t->pipes == PIPE_SINGLE) return; enable_scnd_screen_and_wait(t); if (t->screen == SCREEN_SCND) { if (t->plane == PLANE_CUR) set_cursor_for_test(t, &scnd_mode_params); if (t->plane == PLANE_SPR) set_sprite_for_test(t, &scnd_mode_params); } } static void prepare_subtest(const struct test_mode *t, struct draw_pattern_info *pattern) { prepare_subtest_data(t, pattern); prepare_subtest_screens(t); } /* * rte - the basic sanity test * * METHOD * Just disable all screens, assert everything is disabled, then enable all * screens - including primary, cursor and sprite planes - and assert that * the tested feature is enabled. * * EXPECTED RESULTS * Blue screens and t->feature enabled. * * FAILURES * A failure here means that every other subtest will probably fail too. It * probably means that the Kernel is just not enabling the feature we want. */ static void rte_subtest(const struct test_mode *t) { prepare_subtest_data(t, NULL); unset_all_crtcs(); do_assertions(ASSERT_FBC_DISABLED | ASSERT_PSR_DISABLED | DONT_ASSERT_CRC); enable_prim_screen_and_wait(t); set_cursor_for_test(t, &prim_mode_params); set_sprite_for_test(t, &prim_mode_params); if (t->pipes == PIPE_SINGLE) return; enable_scnd_screen_and_wait(t); set_cursor_for_test(t, &scnd_mode_params); set_sprite_for_test(t, &scnd_mode_params); } static void update_wanted_crc(const struct test_mode *t, struct both_crcs *crc) { if (t->screen == SCREEN_PRIM) wanted_crc = crc; } static bool op_disables_psr(const struct test_mode *t, enum igt_draw_method method) { if (method != IGT_DRAW_MMAP_GTT) return false; if (t->screen == SCREEN_PRIM) return true; /* On FBS_SHARED, even if the target is not the PSR screen * (SCREEN_PRIM), all primary planes share the same frontbuffer, so a * write to the second screen primary plane - or offscreen plane - will * touch the framebuffer that's also used by the primary screen. */ if (t->fbs == FBS_SHARED && t->plane == PLANE_PRI) return true; return false; } /* * draw - draw a set of rectangles on the screen using the provided method * * METHOD * Just set the screens as appropriate and then start drawing a series of * rectangles on the target screen. The important guy here is the drawing * method used. * * EXPECTED RESULTS * The feature either stays enabled or gets reenabled after the oprations. You * will also see the rectangles on the target screen. * * FAILURES * A failure here indicates a problem somewhere between the Kernel's * frontbuffer tracking infrastructure or the feature itself. You need to pay * attention to which drawing method is being used. */ static void draw_subtest(const struct test_mode *t) { int r; int assertions = 0; struct draw_pattern_info *pattern; struct modeset_params *params = pick_params(t); struct fb_region *target; switch (t->screen) { case SCREEN_PRIM: if (t->method != IGT_DRAW_MMAP_GTT && t->plane == PLANE_PRI) assertions |= ASSERT_LAST_ACTION_CHANGED; else assertions |= ASSERT_NO_ACTION_CHANGE; break; case SCREEN_SCND: case SCREEN_OFFSCREEN: assertions |= ASSERT_NO_ACTION_CHANGE; break; default: igt_assert(false); } switch (t->plane) { case PLANE_PRI: pattern = &pattern1; break; case PLANE_CUR: case PLANE_SPR: pattern = &pattern2; break; default: igt_assert(false); } if (op_disables_psr(t, t->method)) assertions |= ASSERT_PSR_DISABLED; prepare_subtest(t, pattern); target = pick_target(t, params); for (r = 0; r < pattern->n_rects; r++) { igt_debug("Drawing rect %d\n", r); draw_rect(pattern, target, t->method, r); update_wanted_crc(t, &pattern->crcs[t->format][r]); do_assertions(assertions); } } /* * multidraw - draw a set of rectangles on the screen using alternated drawing * methods * * METHOD * This is just like the draw subtest, but now we keep alternating between two * drawing methods. Each time we run multidraw_subtest we will test all the * possible pairs of drawing methods. * * EXPECTED RESULTS * The same as the draw subtest. * * FAILURES * If you get a failure here, first you need to check whether you also get * failures on the individual draw subtests. If yes, then go fix every single * draw subtest first. If all the draw subtests pass but this one fails, then * you have to study how one drawing method is stopping the other from * properly working. */ static void multidraw_subtest(const struct test_mode *t) { int r; int assertions = 0; struct draw_pattern_info *pattern; struct modeset_params *params = pick_params(t); struct fb_region *target; enum igt_draw_method m1, m2, used_method; switch (t->plane) { case PLANE_PRI: pattern = &pattern1; break; case PLANE_CUR: case PLANE_SPR: pattern = &pattern2; break; default: igt_assert(false); } prepare_subtest(t, pattern); target = pick_target(t, params); for (m1 = 0; m1 < IGT_DRAW_METHOD_COUNT; m1++) { for (m2 = m1 + 1; m2 < IGT_DRAW_METHOD_COUNT; m2++) { igt_debug("Methods %s and %s\n", igt_draw_get_method_name(m1), igt_draw_get_method_name(m2)); for (r = 0; r < pattern->n_rects; r++) { used_method = (r % 2 == 0) ? m1 : m2; igt_debug("Used method %s\n", igt_draw_get_method_name(used_method)); draw_rect(pattern, target, used_method, r); update_wanted_crc(t, &pattern->crcs[t->format][r]); assertions = used_method != IGT_DRAW_MMAP_GTT ? ASSERT_LAST_ACTION_CHANGED : ASSERT_NO_ACTION_CHANGE; if (op_disables_psr(t, used_method)) assertions |= ASSERT_PSR_DISABLED; do_assertions(assertions); } fill_fb_region(target, COLOR_PRIM_BG); update_wanted_crc(t, &blue_crcs[t->format].crc); do_assertions(ASSERT_NO_ACTION_CHANGE); } } } static bool format_is_valid(int feature_flags, enum pixel_format format) { int devid = intel_get_drm_devid(drm.fd); if (!(feature_flags & FEATURE_FBC)) return true; switch (format) { case FORMAT_RGB888: return true; case FORMAT_RGB565: if (IS_GEN2(devid) || IS_G4X(devid)) return false; return true; case FORMAT_RGB101010: return false; default: igt_assert(false); } } /* * badformat - test pixel formats that are not supported by at least one feature * * METHOD * We just do a modeset on a buffer with the given pixel format and check the * status of the relevant features. * * EXPECTED RESULTS * No assertion failures :) * * FAILURES * If you get a feature enabled/disabled assertion failure, then you should * probably check the Kernel code for the feature that checks the pixel * formats. If you get a CRC assertion failure, then you should use the * appropriate command line arguments that will allow you to look at the * screen, then judge what to do based on what you see. */ static void badformat_subtest(const struct test_mode *t) { bool fbc_valid = format_is_valid(FEATURE_FBC, t->format); bool psr_valid = format_is_valid(FEATURE_PSR, t->format); int assertions = ASSERT_NO_ACTION_CHANGE; prepare_subtest_data(t, NULL); fill_fb_region(&prim_mode_params.fb, COLOR_PRIM_BG); set_mode_for_params(&prim_mode_params); wanted_crc = &blue_crcs[t->format].crc; if (!fbc_valid) assertions |= ASSERT_FBC_DISABLED; if (!psr_valid) assertions |= ASSERT_PSR_DISABLED; do_assertions(assertions); } /* * format_draw - test pixel formats that are not FORMAT_DEFAULT * * METHOD * The real subtest to be executed depends on whether the pixel format is * supported by the features being tested or not. Check the documentation of * each subtest. * * EXPECTED RESULTS * See the documentation for each subtest. * * FAILURES * See the documentation for each subtest. */ static void format_draw_subtest(const struct test_mode *t) { if (format_is_valid(t->feature, t->format)) draw_subtest(t); else badformat_subtest(t); } /* * slow_draw - sleep a little bit between drawing operations * * METHOD * This test is basically the same as the draw subtest, except that we sleep a * little bit after each drawing operation. The goal is to detect problems * that can happen in case a drawing operation is done while the machine is in * some deep sleep states. * * EXPECTED RESULTS * The pattern appears on the screen as expected. * * FAILURES * I've seen this happen in a SKL machine and still haven't investigated it. * My guess would be that preventing deep sleep states fixes the problem. */ static void slow_draw_subtest(const struct test_mode *t) { int r; struct draw_pattern_info *pattern = &pattern1; struct modeset_params *params = pick_params(t); struct fb_region *target; prepare_subtest(t, pattern); sleep(2); target = pick_target(t, params); for (r = 0; r < pattern->n_rects; r++) { sleep(2); draw_rect(pattern, target, t->method, r); sleep(2); update_wanted_crc(t, &pattern->crcs[t->format][r]); do_assertions(0); } } static void flip_handler(int fd, unsigned int sequence, unsigned int tv_sec, unsigned int tv_usec, void *data) { igt_debug("Flip event received.\n"); } static void wait_flip_event(void) { int rc; drmEventContext evctx; struct pollfd pfd; evctx.version = DRM_EVENT_CONTEXT_VERSION; evctx.vblank_handler = NULL; evctx.page_flip_handler = flip_handler; pfd.fd = drm.fd; pfd.events = POLLIN; pfd.revents = 0; rc = poll(&pfd, 1, 1000); switch (rc) { case 0: igt_assert_f(false, "Poll timeout\n"); break; case 1: rc = drmHandleEvent(drm.fd, &evctx); igt_assert_eq(rc, 0); break; default: igt_assert_f(false, "Unexpected poll rc %d\n", rc); break; } } static void set_prim_plane_for_params(struct modeset_params *params) { int rc, i, crtc_index = -1; uint32_t plane_id = 0; for (i = 0; i < drm.res->count_crtcs; i++) if (drm.res->crtcs[i] == params->crtc_id) crtc_index = i; igt_assert(crtc_index >= 0); for (i = 0; i < drm.plane_res->count_planes; i++) if ((drm.planes[i]->possible_crtcs & (1 << crtc_index)) && drm.plane_types[i] == DRM_PLANE_TYPE_PRIMARY) plane_id = drm.planes[i]->plane_id; igt_assert(plane_id); rc = drmModeSetPlane(drm.fd, plane_id, params->crtc_id, params->fb.fb->fb_id, 0, 0, 0, params->mode->hdisplay, params->mode->vdisplay, params->fb.x << 16, params->fb.y << 16, params->fb.w << 16, params->fb.h << 16); igt_assert(rc == 0); } static void page_flip_for_params(struct modeset_params *params, enum flip_type type) { int rc; switch (type) { case FLIP_PAGEFLIP: rc = drmModePageFlip(drm.fd, params->crtc_id, params->fb.fb->fb_id, 0, NULL); igt_assert_eq(rc, 0); break; case FLIP_PAGEFLIP_EVENT: rc = drmModePageFlip(drm.fd, params->crtc_id, params->fb.fb->fb_id, DRM_MODE_PAGE_FLIP_EVENT, NULL); igt_assert_eq(rc, 0); wait_flip_event(); break; case FLIP_MODESET: set_mode_for_params(params); break; case FLIP_PLANES: set_prim_plane_for_params(params); break; default: igt_assert(false); } } /* * flip - just exercise page flips with the patterns we have * * METHOD * We draw the pattern on a backbuffer using the provided method, then we * flip, making this the frontbuffer. We can flip both using the dedicated * pageflip IOCTL or the modeset IOCTL. * * EXPECTED RESULTS * Everything works as expected, screen contents are properly updated. * * FAILURES * On a failure here you need to go directly to the Kernel's flip code and see * how it interacts with the feature being tested. */ static void flip_subtest(const struct test_mode *t) { int r; int assertions = 0; struct igt_fb fb2, *orig_fb; struct modeset_params *params = pick_params(t); struct draw_pattern_info *pattern = &pattern1; enum color bg_color; switch (t->screen) { case SCREEN_PRIM: assertions |= ASSERT_LAST_ACTION_CHANGED; bg_color = COLOR_PRIM_BG; break; case SCREEN_SCND: assertions |= ASSERT_NO_ACTION_CHANGE; bg_color = COLOR_SCND_BG; break; default: igt_assert(false); } prepare_subtest(t, pattern); create_fb(t->format, params->fb.fb->width, params->fb.fb->height, LOCAL_I915_FORMAT_MOD_X_TILED, t->plane, &fb2); fill_fb(&fb2, bg_color); orig_fb = params->fb.fb; for (r = 0; r < pattern->n_rects; r++) { params->fb.fb = (r % 2 == 0) ? &fb2 : orig_fb; if (r != 0) draw_rect(pattern, ¶ms->fb, t->method, r - 1); draw_rect(pattern, ¶ms->fb, t->method, r); update_wanted_crc(t, &pattern->crcs[t->format][r]); page_flip_for_params(params, t->flip); do_assertions(assertions); } igt_remove_fb(drm.fd, &fb2); } /* * fliptrack - check if the hardware tracking works after page flips * * METHOD * Flip to a new buffer, then draw on it using MMAP_GTT and check the CRC to * make sure the hardware tracking detected the write. * * EXPECTED RESULTS * Everything works as expected, screen contents are properly updated. * * FAILURES * First you need to check if the draw and flip subtests pass. Only after both * are passing this test can be useful. If we're failing only on this subtest, * then maybe we are not properly updating the hardware tracking registers * during the flip operations. */ static void fliptrack_subtest(const struct test_mode *t, enum flip_type type) { int r; struct igt_fb fb2, *orig_fb; struct modeset_params *params = pick_params(t); struct draw_pattern_info *pattern = &pattern1; prepare_subtest(t, pattern); create_fb(t->format, params->fb.fb->width, params->fb.fb->height, LOCAL_I915_FORMAT_MOD_X_TILED, t->plane, &fb2); fill_fb(&fb2, COLOR_PRIM_BG); orig_fb = params->fb.fb; for (r = 0; r < pattern->n_rects; r++) { params->fb.fb = (r % 2 == 0) ? &fb2 : orig_fb; if (r != 0) draw_rect(pattern, ¶ms->fb, t->method, r - 1); page_flip_for_params(params, type); do_assertions(0); draw_rect(pattern, ¶ms->fb, t->method, r); update_wanted_crc(t, &pattern->crcs[t->format][r]); do_assertions(ASSERT_PSR_DISABLED); } igt_remove_fb(drm.fd, &fb2); } /* * move - just move the sprite or cursor around * * METHOD * Move the surface around, following the defined pattern. * * EXPECTED RESULTS * The move operations are properly detected by the Kernel, and the screen is * properly updated every time. * * FAILURES * If you get a failure here, check how the Kernel is enabling or disabling * your feature when it moves the planes around. */ static void move_subtest(const struct test_mode *t) { int r, rc; int assertions = ASSERT_NO_ACTION_CHANGE; struct modeset_params *params = pick_params(t); struct draw_pattern_info *pattern = &pattern3; bool repeat = false; prepare_subtest(t, pattern); /* Just paint the right color since we start at 0x0. */ draw_rect(pattern, pick_target(t, params), t->method, 0); update_wanted_crc(t, &pattern->crcs[t->format][0]); do_assertions(assertions); for (r = 1; r < pattern->n_rects; r++) { struct rect rect = pattern->get_rect(¶ms->fb, r); switch (t->plane) { case PLANE_CUR: rc = drmModeMoveCursor(drm.fd, params->crtc_id, rect.x, rect.y); igt_assert_eq(rc, 0); break; case PLANE_SPR: rc = drmModeSetPlane(drm.fd, params->sprite_id, params->crtc_id, params->sprite.fb->fb_id, 0, rect.x, rect.y, rect.w, rect.h, 0, 0, rect.w << 16, rect.h << 16); igt_assert_eq(rc, 0); break; default: igt_assert(false); } update_wanted_crc(t, &pattern->crcs[t->format][r]); do_assertions(assertions); /* "Move" the last rect to the same position just to make sure * this works too. */ if (r+1 == pattern->n_rects && !repeat) { repeat = true; r--; } } } /* * onoff - just enable and disable the sprite or cursor plane a few times * * METHOD * Just enable and disable the desired plane a few times. * * EXPECTED RESULTS * Everything is properly detected by the Kernel and the screen contents are * accurate. * * FAILURES * As usual, if you get a failure here you need to check how the feature is * being handled when the planes are enabled or disabled. */ static void onoff_subtest(const struct test_mode *t) { int r, rc; int assertions = ASSERT_NO_ACTION_CHANGE; struct modeset_params *params = pick_params(t); struct draw_pattern_info *pattern = &pattern3; prepare_subtest(t, pattern); /* Just paint the right color since we start at 0x0. */ draw_rect(pattern, pick_target(t, params), t->method, 0); update_wanted_crc(t, &pattern->crcs[t->format][0]); do_assertions(assertions); for (r = 0; r < 4; r++) { if (r % 2 == 0) { switch (t->plane) { case PLANE_CUR: rc = drmModeSetCursor(drm.fd, params->crtc_id, 0, 0, 0); igt_assert_eq(rc, 0); break; case PLANE_SPR: rc = drmModeSetPlane(drm.fd, params->sprite_id, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); igt_assert_eq(rc, 0); break; default: igt_assert(false); } update_wanted_crc(t, &blue_crcs[t->format].crc); } else { switch (t->plane) { case PLANE_CUR: rc = drmModeSetCursor(drm.fd, params->crtc_id, params->cursor.fb->gem_handle, params->cursor.w, params->cursor.h); igt_assert_eq(rc, 0); break; case PLANE_SPR: rc = drmModeSetPlane(drm.fd, params->sprite_id, params->crtc_id, params->sprite.fb->fb_id, 0, 0, 0, params->sprite.w, params->sprite.h, 0, 0, params->sprite.w << 16, params->sprite.h << 16); igt_assert_eq(rc, 0); break; default: igt_assert(false); } update_wanted_crc(t, &pattern->crcs[t->format][0]); } do_assertions(assertions); } } static bool prim_plane_disabled(void) { int i, rc; bool disabled, found = false; for (i = 0; i < drm.plane_res->count_planes; i++) { /* We just pick the first CRTC for the primary plane. */ if ((drm.planes[i]->possible_crtcs & 0x1) && drm.plane_types[i] == DRM_PLANE_TYPE_PRIMARY) { found = true; disabled = (drm.planes[i]->crtc_id == 0); } } igt_assert(found); rc = drmSetClientCap(drm.fd, DRM_CLIENT_CAP_UNIVERSAL_PLANES, 0); igt_assert_eq(rc, 0); return disabled; } /* * fullscreen_plane - put a fullscreen plane covering the whole screen * * METHOD * As simple as the description above. * * EXPECTED RESULTS * It depends on the feature being tested. FBC gets disabled, but PSR doesn't. * * FAILURES * Again, if you get failures here you need to dig into the Kernel code, see * how it is handling your feature on this specific case. */ static void fullscreen_plane_subtest(const struct test_mode *t) { struct draw_pattern_info *pattern = &pattern4; struct igt_fb fullscreen_fb; struct rect rect; struct modeset_params *params = pick_params(t); int assertions; int rc; prepare_subtest(t, pattern); rect = pattern->get_rect(¶ms->fb, 0); create_fb(t->format, rect.w, rect.h, LOCAL_I915_FORMAT_MOD_X_TILED, t->plane, &fullscreen_fb); /* Call pick_color() again since PRI and SPR may not support the same * pixel formats. */ rect.color = pick_color(&fullscreen_fb, COLOR_GREEN); igt_draw_fill_fb(drm.fd, &fullscreen_fb, rect.color); rc = drmModeSetPlane(drm.fd, params->sprite_id, params->crtc_id, fullscreen_fb.fb_id, 0, 0, 0, fullscreen_fb.width, fullscreen_fb.height, 0, 0, fullscreen_fb.width << 16, fullscreen_fb.height << 16); igt_assert_eq(rc, 0); update_wanted_crc(t, &pattern->crcs[t->format][0]); switch (t->screen) { case SCREEN_PRIM: assertions = ASSERT_LAST_ACTION_CHANGED; if (prim_plane_disabled()) assertions |= ASSERT_FBC_DISABLED; break; case SCREEN_SCND: assertions = ASSERT_NO_ACTION_CHANGE; break; default: igt_assert(false); } do_assertions(assertions); rc = drmModeSetPlane(drm.fd, params->sprite_id, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); igt_assert_eq(rc, 0); if (t->screen == SCREEN_PRIM) assertions = ASSERT_LAST_ACTION_CHANGED; update_wanted_crc(t, &blue_crcs[t->format].crc); do_assertions(assertions); igt_remove_fb(drm.fd, &fullscreen_fb); } /* * scaledprimary - try different primary plane scaling strategies * * METHOD * Enable the primary plane, use drmModeSetPlane to force scaling in * different ways. * * EXPECTED RESULTS * SKIP on platforms that don't support primary plane scaling. Success on all * others. * * FAILURES * TODO: although we're exercising the code here, we're not really doing * assertions in order to check if things are working properly. The biggest * issue this code would be able to find would be an incorrectly calculated * CFB size, and today we don't have means to assert this. One day we might * implement some sort of stolen memory checking mechanism, then we'll be able * to force it to run after every drmModeSetPlane call here, so we'll be * checking if the expected CFB size is actually what we think it is. */ static void scaledprimary_subtest(const struct test_mode *t) { struct igt_fb new_fb, *old_fb; struct modeset_params *params = pick_params(t); int i, rc; uint32_t plane_id; igt_require_f(intel_gen(intel_get_drm_devid(drm.fd)) >= 9, "Can't test primary plane scaling before gen 9\n"); prepare_subtest(t, NULL); old_fb = params->fb.fb; create_fb(t->format, params->fb.fb->width, params->fb.fb->height, LOCAL_I915_FORMAT_MOD_X_TILED, t->plane, &new_fb); fill_fb(&new_fb, COLOR_BLUE); igt_draw_rect_fb(drm.fd, drm.bufmgr, NULL, &new_fb, t->method, params->fb.x, params->fb.y, params->fb.w / 2, params->fb.h / 2, pick_color(&new_fb, COLOR_GREEN)); igt_draw_rect_fb(drm.fd, drm.bufmgr, NULL, &new_fb, t->method, params->fb.x + params->fb.w / 2, params->fb.y + params->fb.h / 2, params->fb.w / 2, params->fb.h / 2, pick_color(&new_fb, COLOR_RED)); igt_draw_rect_fb(drm.fd, drm.bufmgr, NULL, &new_fb, t->method, params->fb.x + params->fb.w / 2, params->fb.y + params->fb.h / 2, params->fb.w / 4, params->fb.h / 4, pick_color(&new_fb, COLOR_MAGENTA)); for (i = 0; i < drm.plane_res->count_planes; i++) if ((drm.planes[i]->possible_crtcs & 1) && drm.plane_types[i] == DRM_PLANE_TYPE_PRIMARY) plane_id = drm.planes[i]->plane_id; /* No scaling. */ rc = drmModeSetPlane(drm.fd, plane_id, params->crtc_id, new_fb.fb_id, 0, 0, 0, params->mode->hdisplay, params->mode->vdisplay, params->fb.x << 16, params->fb.y << 16, params->fb.w << 16, params->fb.h << 16); igt_assert(rc == 0); do_assertions(DONT_ASSERT_CRC); /* Source upscaling. */ rc = drmModeSetPlane(drm.fd, plane_id, params->crtc_id, new_fb.fb_id, 0, 0, 0, params->mode->hdisplay, params->mode->vdisplay, params->fb.x << 16, params->fb.y << 16, (params->fb.w / 2) << 16, (params->fb.h / 2) << 16); igt_assert(rc == 0); do_assertions(DONT_ASSERT_CRC); /* Destination doesn't fill the entire CRTC, no scaling. */ rc = drmModeSetPlane(drm.fd, plane_id, params->crtc_id, new_fb.fb_id, 0, params->mode->hdisplay / 4, params->mode->vdisplay / 4, params->mode->hdisplay / 2, params->mode->vdisplay / 2, params->fb.x << 16, params->fb.y << 16, (params->fb.w / 2) << 16, (params->fb.h / 2) << 16); igt_assert(rc == 0); do_assertions(DONT_ASSERT_CRC); /* Destination doesn't fill the entire CRTC, upscaling. */ rc = drmModeSetPlane(drm.fd, plane_id, params->crtc_id, new_fb.fb_id, 0, params->mode->hdisplay / 4, params->mode->vdisplay / 4, params->mode->hdisplay / 2, params->mode->vdisplay / 2, (params->fb.x + params->fb.w / 2) << 16, (params->fb.y + params->fb.h / 2) << 16, (params->fb.w / 4) << 16, (params->fb.h / 4) << 16); igt_assert(rc == 0); do_assertions(DONT_ASSERT_CRC); /* Back to the good and old blue fb. */ rc = drmModeSetPlane(drm.fd, plane_id, params->crtc_id, old_fb->fb_id, 0, 0, 0, params->mode->hdisplay, params->mode->vdisplay, params->fb.x << 16, params->fb.y << 16, params->fb.w << 16, params->fb.h << 16); igt_assert(rc == 0); do_assertions(0); igt_remove_fb(drm.fd, &new_fb); } /** * modesetfrombusy - modeset from a busy buffer to a non-busy buffer * * METHOD * Set a mode, make the frontbuffer busy using BLT writes, do a modeset to a * non-busy buffer, then check if the features are enabled. The goal of this * test is to exercise a bug we had on the frontbuffer tracking infrastructure * code. * * EXPECTED RESULTS * No assertions fail. * * FAILURES * If you're failing this test, then you probably need "drm/i915: Clear * fb_tracking.busy_bits also for synchronous flips" or any other patch that * properly updates dev_priv->fb_tracking.busy_bits when we're alternating * between buffers with different busyness. */ static void modesetfrombusy_subtest(const struct test_mode *t) { struct modeset_params *params = pick_params(t); struct igt_fb fb2; prepare_subtest(t, NULL); create_fb(t->format, params->fb.fb->width, params->fb.fb->height, LOCAL_I915_FORMAT_MOD_X_TILED, t->plane, &fb2); fill_fb(&fb2, COLOR_PRIM_BG); start_busy_thread(params->fb.fb); usleep(10000); unset_all_crtcs(); params->fb.fb = &fb2; set_mode_for_params(params); do_assertions(0); stop_busy_thread(); igt_remove_fb(drm.fd, &fb2); } /** * suspend - make sure suspend/resume keeps us on the same state * * METHOD * Set a mode, assert FBC is there, suspend, resume, assert FBC is still * there. Unset modes, assert FBC is disabled, resuspend, resume, assert FBC * is still disabled. * * EXPECTED RESULTS * Suspend/resume doesn't affect the FBC state. * * FAILURES * A lot of different things could lead to a bug here, you'll have to check * the Kernel code. */ static void suspend_subtest(const struct test_mode *t) { struct modeset_params *params = pick_params(t); prepare_subtest(t, NULL); sleep(5); igt_system_suspend_autoresume(); sleep(5); do_assertions(0); unset_all_crtcs(); sleep(5); igt_system_suspend_autoresume(); sleep(5); do_assertions(ASSERT_FBC_DISABLED | ASSERT_PSR_DISABLED | DONT_ASSERT_CRC); set_mode_for_params(params); do_assertions(0); } /** * farfromfence - test drawing as far from the fence start as possible * * METHOD * One of the possible problems with FBC is that if the mode being displayed * is very far away from the fence we might setup the hardware frontbuffer * tracking in the wrong way. So this test tries to set a really tall FB, * makes the CRTC point to the bottom of that FB, then it tries to exercise * the hardware frontbuffer tracking through GTT mmap operations. * * EXPECTED RESULTS * Everything succeeds. * * FAILURES * If you're getting wrong CRC calulations, then the hardware tracking might * be misconfigured and needs to be checked. If we're failing because FBC is * disabled and the reason is that there's not enough stolen memory, then the * Kernel might be calculating the amount of stolen memory needed based on the * whole framebuffer size, and not just on the needed size: in this case, you * need a newer Kernel. */ static void farfromfence_subtest(const struct test_mode *t) { int r; struct igt_fb tall_fb; struct modeset_params *params = pick_params(t); struct draw_pattern_info *pattern = &pattern1; struct fb_region *target; int max_height, assertions = 0; int gen = intel_gen(intel_get_drm_devid(drm.fd)); switch (gen) { case 2: max_height = 2048; break; case 3: max_height = 4096; break; default: max_height = 8192; break; } /* Gen 9 doesn't do the same dspaddr_offset magic as the older * gens, so FBC may not be enabled there. */ if (gen >= 9) assertions |= DONT_ASSERT_FEATURE_STATUS; prepare_subtest(t, pattern); target = pick_target(t, params); create_fb(t->format, params->mode->hdisplay, max_height, LOCAL_I915_FORMAT_MOD_X_TILED, t->plane, &tall_fb); fill_fb(&tall_fb, COLOR_PRIM_BG); params->fb.fb = &tall_fb; params->fb.x = 0; params->fb.y = max_height - params->mode->vdisplay; set_mode_for_params(params); do_assertions(assertions); for (r = 0; r < pattern->n_rects; r++) { draw_rect(pattern, target, t->method, r); update_wanted_crc(t, &pattern->crcs[t->format][r]); /* GTT draws disable PSR. */ do_assertions(assertions | ASSERT_PSR_DISABLED); } igt_remove_fb(drm.fd, &tall_fb); } static void try_invalid_strides(void) { uint32_t gem_handle; int rc; /* Sizes that the Kernel shouldn't even allow for tiled */ gem_handle = gem_create(drm.fd, 2048); /* Smaller than 512, yet still 64-byte aligned. */ rc = __gem_set_tiling(drm.fd, gem_handle, I915_TILING_X, 448); igt_assert_eq(rc, -EINVAL); /* Bigger than 512, but not 64-byte aligned. */ rc = __gem_set_tiling(drm.fd, gem_handle, I915_TILING_X, 1022); igt_assert_eq(rc, -EINVAL); /* Just make sure something actually works. */ rc = __gem_set_tiling(drm.fd, gem_handle, I915_TILING_X, 1024); igt_assert_eq(rc, 0); gem_close(drm.fd, gem_handle); } /** * badstride - try to use buffers with strides that are not supported * * METHOD * First we try to create buffers with strides that are not allowed for tiled * surfaces and assert the Kernel rejects them. Then we create buffers with * strides that are allowed by the Kernel, but that are incompatible with FBC * and we assert that FBC stays disabled after we set a mode on those buffers. * * EXPECTED RESULTS * The invalid strides are rejected, and the valid strides that are * incompatible with FBC result in FBC disabled. * * FAILURES * There are two possible places where the Kernel can be broken: either the * code that checks valid strides for tiled buffers or the code that checks * the valid strides for FBC. */ static void badstride_subtest(const struct test_mode *t) { struct igt_fb wide_fb, *old_fb; struct modeset_params *params = pick_params(t); int rc; try_invalid_strides(); prepare_subtest(t, NULL); old_fb = params->fb.fb; create_fb(t->format, params->fb.fb->width + 4096, params->fb.fb->height, LOCAL_I915_FORMAT_MOD_X_TILED, t->plane, &wide_fb); igt_assert(wide_fb.stride > 16384); fill_fb(&wide_fb, COLOR_PRIM_BG); /* Try a simple modeset with the new fb. */ params->fb.fb = &wide_fb; set_mode_for_params(params); do_assertions(ASSERT_FBC_DISABLED); /* Go back to the old fb so FBC works again. */ params->fb.fb = old_fb; set_mode_for_params(params); do_assertions(0); /* We're doing the equivalent of a modeset, but with the planes API. */ params->fb.fb = &wide_fb; set_prim_plane_for_params(params); do_assertions(ASSERT_FBC_DISABLED); params->fb.fb = old_fb; set_mode_for_params(params); do_assertions(0); /* We can't use the page flip IOCTL to flip to a buffer with a different * stride. */ rc = drmModePageFlip(drm.fd, params->crtc_id, wide_fb.fb_id, 0, NULL); igt_assert(rc == -EINVAL); do_assertions(0); igt_remove_fb(drm.fd, &wide_fb); } /** * stridechange - change the frontbuffer stride by doing a modeset * * METHOD * This test sets a mode on a CRTC, then creates a buffer with a different * stride - still compatible with FBC -, and sets the mode on it. The Kernel * currently shortcuts the modeset path for this case, so it won't trigger * calls to xx_crtc_enable or xx_crtc_disable, and that could lead to * problems, so test the case. * * EXPECTED RESULTS * With the current Kernel, FBC may or may not remain enabled on this case, * but we can still check the CRC values. * * FAILURES * A bad Kernel may just not resize the CFB while keeping FBC enabled, and * this can lead to underruns or stolen memory corruption. Underruns usually * lead to CRC check errors, and stolen memory corruption can't be easily * checked currently. A bad Kernel may also just throw some WARNs on dmesg. */ static void stridechange_subtest(const struct test_mode *t) { struct igt_fb new_fb, *old_fb; struct modeset_params *params = pick_params(t); int rc; prepare_subtest(t, NULL); old_fb = params->fb.fb; create_fb(t->format, params->fb.fb->width + 512, params->fb.fb->height, LOCAL_I915_FORMAT_MOD_X_TILED, t->plane, &new_fb); fill_fb(&new_fb, COLOR_PRIM_BG); igt_assert(old_fb->stride != new_fb.stride); /* We can't assert that FBC will be enabled since there may not be * enough space for the CFB, but we can check the CRC. */ params->fb.fb = &new_fb; set_mode_for_params(params); do_assertions(DONT_ASSERT_FEATURE_STATUS); /* Go back to the fb that can have FBC. */ params->fb.fb = old_fb; set_mode_for_params(params); do_assertions(0); /* This operation is the same as above, but with the planes API. */ params->fb.fb = &new_fb; set_prim_plane_for_params(params); do_assertions(DONT_ASSERT_FEATURE_STATUS); params->fb.fb = old_fb; set_prim_plane_for_params(params); do_assertions(0); /* We just can't page flip with a new stride. */ rc = drmModePageFlip(drm.fd, params->crtc_id, new_fb.fb_id, 0, NULL); igt_assert(rc == -EINVAL); do_assertions(0); igt_remove_fb(drm.fd, &new_fb); } /** * tilingchange - alternate between tiled and untiled in multiple ways * * METHOD * This test alternates between tiled and untiled frontbuffers of the same * size and format through multiple different APIs: the page flip IOCTL, * normal modesets and the plane APIs. * * EXPECTED RESULTS * FBC gets properly disabled for the untiled FB and reenabled for the * tiled FB. * * FAILURES * Bad Kernels may somehow leave FBC enabled, which can cause FIFO underruns * that lead to CRC assertion failures. */ static void tilingchange_subtest(const struct test_mode *t) { struct igt_fb new_fb, *old_fb; struct modeset_params *params = pick_params(t); enum flip_type flip_type; prepare_subtest(t, NULL); old_fb = params->fb.fb; create_fb(t->format, params->fb.fb->width, params->fb.fb->height, LOCAL_DRM_FORMAT_MOD_NONE, t->plane, &new_fb); fill_fb(&new_fb, COLOR_PRIM_BG); for (flip_type = 0; flip_type < FLIP_COUNT; flip_type++) { igt_debug("Flip type: %d\n", flip_type); /* Set a buffer with no tiling. */ params->fb.fb = &new_fb; page_flip_for_params(params, flip_type); do_assertions(ASSERT_FBC_DISABLED); /* Put FBC back in a working state. */ params->fb.fb = old_fb; page_flip_for_params(params, flip_type); do_assertions(0); } } /* * basic - do some basic operations regardless of which features are enabled * * METHOD * This subtest does page flips and draw operations and checks the CRCs of the * results. The big difference between this and the others is that here we * don't enable/disable any features such as FBC or PSR: we go with whatever * the Kernel has enabled by default for us. This subtest only does things * that are exercised by the other subtests and in a less exhaustive way: it's * completely redundant. On the other hand, it is very quick and was created * with the CI system in mind: it's a quick way to detect regressions, so if * it fails, then we can run the other subtests to find out why. * * EXPECTED RESULTS * Passed CRC assertions. * * FAILURES * If you get a failure here, you should run the more specific draw and flip * subtests of each feature in order to discover what exactly is failing and * why. * * TODO: do sink CRC assertions in case sink_crc.supported. Only do this after * our sink CRC code gets 100% reliable, in order to avoid CI false negatives. */ static void basic_subtest(const struct test_mode *t) { struct draw_pattern_info *pattern = &pattern1; struct modeset_params *params = pick_params(t); enum igt_draw_method method; struct igt_fb *fb1, fb2; int r; int assertions = DONT_ASSERT_FEATURE_STATUS; prepare_subtest(t, pattern); create_fb(t->format, params->fb.fb->width, params->fb.fb->height, LOCAL_I915_FORMAT_MOD_X_TILED, t->plane, &fb2); fb1 = params->fb.fb; for (r = 0, method = 0; method < IGT_DRAW_METHOD_COUNT; method++, r++) { if (r == pattern->n_rects) { params->fb.fb = (params->fb.fb == fb1) ? &fb2 : fb1; fill_fb_region(¶ms->fb, COLOR_PRIM_BG); update_wanted_crc(t, &blue_crcs[t->format].crc); page_flip_for_params(params, t->flip); do_assertions(assertions); r = 0; } draw_rect(pattern, ¶ms->fb, method, r); update_wanted_crc(t, &pattern->crcs[t->format][r]); do_assertions(assertions); } } static int opt_handler(int option, int option_index, void *data) { switch (option) { case 's': opt.check_status = false; break; case 'c': opt.check_crc = false; break; case 'o': opt.fbc_check_compression = false; break; case 'a': opt.fbc_check_last_action = false; break; case 'e': opt.no_edp = true; break; case 'm': opt.small_modes = true; break; case 'i': opt.show_hidden = true; break; case 't': opt.step++; break; case 'x': errno = 0; opt.shared_fb_x_offset = strtol(optarg, NULL, 0); igt_assert(errno == 0); break; case 'y': errno = 0; opt.shared_fb_y_offset = strtol(optarg, NULL, 0); igt_assert(errno == 0); break; case '1': igt_assert_eq(opt.only_pipes, PIPE_COUNT); opt.only_pipes = PIPE_SINGLE; break; case '2': igt_assert_eq(opt.only_pipes, PIPE_COUNT); opt.only_pipes = PIPE_DUAL; break; default: igt_assert(false); } return 0; } const char *help_str = " --no-status-check Don't check for enable/disable status\n" " --no-crc-check Don't check for CRC values\n" " --no-fbc-compression-check Don't check for the FBC compression status\n" " --no-fbc-action-check Don't check for the FBC last action\n" " --no-edp Don't use eDP monitors\n" " --use-small-modes Use smaller resolutions for the modes\n" " --show-hidden Show hidden subtests\n" " --step Stop on each step so you can check the screen\n" " --shared-fb-x offset Use 'offset' as the X offset for the shared FB\n" " --shared-fb-y offset Use 'offset' as the Y offset for the shared FB\n" " --1p-only Only run subtests that use 1 pipe\n" " --2p-only Only run subtests that use 2 pipes\n"; static const char *pipes_str(int pipes) { switch (pipes) { case PIPE_SINGLE: return "1p"; case PIPE_DUAL: return "2p"; default: igt_assert(false); } } static const char *screen_str(int screen) { switch (screen) { case SCREEN_PRIM: return "primscrn"; case SCREEN_SCND: return "scndscrn"; case SCREEN_OFFSCREEN: return "offscren"; default: igt_assert(false); } } static const char *plane_str(int plane) { switch (plane) { case PLANE_PRI: return "pri"; case PLANE_CUR: return "cur"; case PLANE_SPR: return "spr"; default: igt_assert(false); } } static const char *fbs_str(int fb) { switch (fb) { case FBS_INDIVIDUAL: return "indfb"; case FBS_SHARED: return "shrfb"; default: igt_assert(false); } } static const char *feature_str(int feature) { switch (feature) { case FEATURE_NONE: return "nop"; case FEATURE_FBC: return "fbc"; case FEATURE_PSR: return "psr"; case FEATURE_FBC | FEATURE_PSR: return "fbcpsr"; default: igt_assert(false); } } static const char *format_str(enum pixel_format format) { switch (format) { case FORMAT_RGB888: return "rgb888"; case FORMAT_RGB565: return "rgb565"; case FORMAT_RGB101010: return "rgb101010"; default: igt_assert(false); } } static const char *flip_str(enum flip_type flip) { switch (flip) { case FLIP_PAGEFLIP: return "pg"; case FLIP_PAGEFLIP_EVENT: return "ev"; case FLIP_MODESET: return "ms"; case FLIP_PLANES: return "pl"; default: igt_assert(false); } } #define TEST_MODE_ITER_BEGIN(t) \ t.format = FORMAT_DEFAULT; \ t.flip = FLIP_PAGEFLIP; \ for (t.feature = 0; t.feature < FEATURE_COUNT; t.feature++) { \ for (t.pipes = 0; t.pipes < PIPE_COUNT; t.pipes++) { \ for (t.screen = 0; t.screen < SCREEN_COUNT; t.screen++) { \ for (t.plane = 0; t.plane < PLANE_COUNT; t.plane++) { \ for (t.fbs = 0; t.fbs < FBS_COUNT; t.fbs++) { \ for (t.method = 0; t.method < IGT_DRAW_METHOD_COUNT; t.method++) { \ if (t.pipes == PIPE_SINGLE && t.screen == SCREEN_SCND) \ continue; \ if (t.screen == SCREEN_OFFSCREEN && t.plane != PLANE_PRI) \ continue; \ if (!opt.show_hidden && t.pipes == PIPE_DUAL && \ t.screen == SCREEN_OFFSCREEN) \ continue; \ if (!opt.show_hidden && t.feature == FEATURE_NONE) \ continue; \ if (!opt.show_hidden && t.fbs == FBS_SHARED && \ (t.plane == PLANE_CUR || t.plane == PLANE_SPR)) \ continue; #define TEST_MODE_ITER_END } } } } } } int main(int argc, char *argv[]) { struct test_mode t; struct option long_options[] = { { "no-status-check", 0, 0, 's'}, { "no-crc-check", 0, 0, 'c'}, { "no-fbc-compression-check", 0, 0, 'o'}, { "no-fbc-action-check", 0, 0, 'a'}, { "no-edp", 0, 0, 'e'}, { "use-small-modes", 0, 0, 'm'}, { "show-hidden", 0, 0, 'i'}, { "step", 0, 0, 't'}, { "shared-fb-x", 1, 0, 'x'}, { "shared-fb-y", 1, 0, 'y'}, { "1p-only", 0, 0, '1'}, { "2p-only", 0, 0, '2'}, { 0, 0, 0, 0 } }; igt_subtest_init_parse_opts(&argc, argv, "", long_options, help_str, opt_handler, NULL); igt_fixture setup_environment(); for (t.feature = 0; t.feature < FEATURE_COUNT; t.feature++) { if (!opt.show_hidden && t.feature == FEATURE_NONE) continue; for (t.pipes = 0; t.pipes < PIPE_COUNT; t.pipes++) { t.screen = SCREEN_PRIM; t.plane = PLANE_PRI; t.fbs = FBS_INDIVIDUAL; t.format = FORMAT_DEFAULT; /* Make sure nothing is using these values. */ t.flip = -1; t.method = -1; igt_subtest_f("%s-%s-rte", feature_str(t.feature), pipes_str(t.pipes)) rte_subtest(&t); } } TEST_MODE_ITER_BEGIN(t) igt_subtest_f("%s-%s-%s-%s-%s-draw-%s", feature_str(t.feature), pipes_str(t.pipes), screen_str(t.screen), plane_str(t.plane), fbs_str(t.fbs), igt_draw_get_method_name(t.method)) draw_subtest(&t); TEST_MODE_ITER_END TEST_MODE_ITER_BEGIN(t) if (t.plane != PLANE_PRI || t.screen == SCREEN_OFFSCREEN || (!opt.show_hidden && t.method != IGT_DRAW_BLT)) continue; for (t.flip = 0; t.flip < FLIP_COUNT; t.flip++) igt_subtest_f("%s-%s-%s-%s-%sflip-%s", feature_str(t.feature), pipes_str(t.pipes), screen_str(t.screen), fbs_str(t.fbs), flip_str(t.flip), igt_draw_get_method_name(t.method)) flip_subtest(&t); TEST_MODE_ITER_END TEST_MODE_ITER_BEGIN(t) if (t.plane != PLANE_PRI || t.screen != SCREEN_PRIM || t.method != IGT_DRAW_MMAP_GTT || (t.feature & FEATURE_FBC) == 0) continue; igt_subtest_f("%s-%s-%s-fliptrack", feature_str(t.feature), pipes_str(t.pipes), fbs_str(t.fbs)) fliptrack_subtest(&t, FLIP_PAGEFLIP); TEST_MODE_ITER_END TEST_MODE_ITER_BEGIN(t) if (t.screen == SCREEN_OFFSCREEN || t.method != IGT_DRAW_BLT || t.plane == PLANE_PRI) continue; igt_subtest_f("%s-%s-%s-%s-%s-move", feature_str(t.feature), pipes_str(t.pipes), screen_str(t.screen), plane_str(t.plane), fbs_str(t.fbs)) move_subtest(&t); igt_subtest_f("%s-%s-%s-%s-%s-onoff", feature_str(t.feature), pipes_str(t.pipes), screen_str(t.screen), plane_str(t.plane), fbs_str(t.fbs)) onoff_subtest(&t); TEST_MODE_ITER_END TEST_MODE_ITER_BEGIN(t) if (t.screen == SCREEN_OFFSCREEN || t.method != IGT_DRAW_BLT || t.plane != PLANE_SPR) continue; igt_subtest_f("%s-%s-%s-%s-%s-fullscreen", feature_str(t.feature), pipes_str(t.pipes), screen_str(t.screen), plane_str(t.plane), fbs_str(t.fbs)) fullscreen_plane_subtest(&t); TEST_MODE_ITER_END TEST_MODE_ITER_BEGIN(t) if (t.screen != SCREEN_PRIM || t.method != IGT_DRAW_BLT || (!opt.show_hidden && t.plane != PLANE_PRI) || (!opt.show_hidden && t.fbs != FBS_INDIVIDUAL)) continue; igt_subtest_f("%s-%s-%s-%s-multidraw", feature_str(t.feature), pipes_str(t.pipes), plane_str(t.plane), fbs_str(t.fbs)) multidraw_subtest(&t); TEST_MODE_ITER_END TEST_MODE_ITER_BEGIN(t) if (t.pipes != PIPE_SINGLE || t.screen != SCREEN_PRIM || t.plane != PLANE_PRI || t.fbs != FBS_INDIVIDUAL || t.method != IGT_DRAW_MMAP_GTT) continue; igt_subtest_f("%s-farfromfence", feature_str(t.feature)) farfromfence_subtest(&t); TEST_MODE_ITER_END TEST_MODE_ITER_BEGIN(t) if (t.pipes != PIPE_SINGLE || t.screen != SCREEN_PRIM || t.plane != PLANE_PRI || t.fbs != FBS_INDIVIDUAL) continue; for (t.format = 0; t.format < FORMAT_COUNT; t.format++) { /* Skip what we already tested. */ if (t.format == FORMAT_DEFAULT) continue; igt_subtest_f("%s-%s-draw-%s", feature_str(t.feature), format_str(t.format), igt_draw_get_method_name(t.method)) format_draw_subtest(&t); } TEST_MODE_ITER_END TEST_MODE_ITER_BEGIN(t) if (t.pipes != PIPE_SINGLE || t.screen != SCREEN_PRIM || t.plane != PLANE_PRI || t.method != IGT_DRAW_MMAP_CPU) continue; igt_subtest_f("%s-%s-scaledprimary", feature_str(t.feature), fbs_str(t.fbs)) scaledprimary_subtest(&t); TEST_MODE_ITER_END TEST_MODE_ITER_BEGIN(t) if (t.pipes != PIPE_SINGLE || t.screen != SCREEN_PRIM || t.plane != PLANE_PRI || t.fbs != FBS_INDIVIDUAL || t.method != IGT_DRAW_MMAP_CPU) continue; igt_subtest_f("%s-modesetfrombusy", feature_str(t.feature)) modesetfrombusy_subtest(&t); if (t.feature & FEATURE_FBC) { igt_subtest_f("%s-badstride", feature_str(t.feature)) badstride_subtest(&t); igt_subtest_f("%s-stridechange", feature_str(t.feature)) stridechange_subtest(&t); igt_subtest_f("%s-tilingchange", feature_str(t.feature)) tilingchange_subtest(&t); } if (t.feature & FEATURE_PSR) igt_subtest_f("%s-slowdraw", feature_str(t.feature)) slow_draw_subtest(&t); igt_subtest_f("%s-suspend", feature_str(t.feature)) suspend_subtest(&t); TEST_MODE_ITER_END t.pipes = PIPE_SINGLE; t.screen = SCREEN_PRIM; t.plane = PLANE_PRI; t.fbs = FBS_INDIVIDUAL; t.feature = FEATURE_DEFAULT; t.format = FORMAT_DEFAULT; t.flip = FLIP_PAGEFLIP; igt_subtest("basic") basic_subtest(&t); igt_fixture teardown_environment(); igt_exit(); } intel-gpu-tools-1.14/tests/gem_eio.c0000644000175000017500000001041412665336131014342 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ /* * Testcase: Test that only specific ioctl report a wedged GPU. * */ #include "igt.h" #include #include #include #include #include #include #include #include #include IGT_TEST_DESCRIPTION("Test that specific ioctls report a wedged GPU (EIO)."); static bool i915_reset_control(bool enable) { const char *path = "/sys/module/i915/parameters/reset"; int fd, ret; igt_debug("%s GPU reset\n", enable ? "Enabling" : "Disabling"); fd = open(path, O_RDWR); igt_require(fd >= 0); ret = write(fd, &"NY"[enable], 1) == 1; close(fd); return ret; } static void trigger_reset(int fd) { igt_force_gpu_reset(); /* And just check the gpu is indeed running again */ igt_debug("Checking that the GPU recovered\n"); gem_quiescent_gpu(fd); } static void wedge_gpu(int fd) { /* First idle the GPU then disable GPU resets before injecting a hang */ gem_quiescent_gpu(fd); igt_require(i915_reset_control(false)); igt_debug("Wedging GPU by injecting hang\n"); igt_post_hang_ring(fd, igt_hang_ring(fd, I915_EXEC_DEFAULT)); igt_assert(i915_reset_control(true)); } static int __gem_throttle(int fd) { int err = 0; if (drmIoctl(fd, DRM_IOCTL_I915_GEM_THROTTLE, NULL)) err = -errno; return err; } static void test_throttle(int fd) { wedge_gpu(fd); igt_assert_eq(__gem_throttle(fd), -EIO); trigger_reset(fd); } static void test_execbuf(int fd) { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 exec; uint32_t tmp[] = { MI_BATCH_BUFFER_END }; memset(&exec, 0, sizeof(exec)); memset(&execbuf, 0, sizeof(execbuf)); exec.handle = gem_create(fd, 4096); gem_write(fd, exec.handle, 0, tmp, sizeof(tmp)); execbuf.buffers_ptr = (uintptr_t)&exec; execbuf.buffer_count = 1; wedge_gpu(fd); igt_assert_eq(__gem_execbuf(fd, &execbuf), -EIO); gem_close(fd, exec.handle); trigger_reset(fd); } static int __gem_wait(int fd, uint32_t handle, int64_t timeout) { struct drm_i915_gem_wait wait; int err = 0; memset(&wait, 0, sizeof(wait)); wait.bo_handle = handle; wait.timeout_ns = timeout; if (drmIoctl(fd, DRM_IOCTL_I915_GEM_WAIT, &wait)) err = -errno; return err; } static void test_wait(int fd) { igt_hang_ring_t hang; /* If the request we wait on completes due to a hang (even for * that request), the user expects the return value to 0 (success). */ hang = igt_hang_ring(fd, I915_EXEC_DEFAULT); igt_assert_eq(__gem_wait(fd, hang.handle, -1), 0); igt_post_hang_ring(fd, hang); /* If the GPU is wedged during the wait, again we expect the return * value to be 0 (success). */ igt_require(i915_reset_control(false)); hang = igt_hang_ring(fd, I915_EXEC_DEFAULT); igt_assert_eq(__gem_wait(fd, hang.handle, -1), 0); igt_post_hang_ring(fd, hang); igt_require(i915_reset_control(true)); trigger_reset(fd); } igt_main { int fd = -1; igt_skip_on_simulation(); igt_fixture { fd = drm_open_driver(DRIVER_INTEL); igt_require_hang_ring(fd, I915_EXEC_DEFAULT); } igt_subtest("throttle") test_throttle(fd); igt_subtest("execbuf") test_execbuf(fd); igt_subtest("wait") test_wait(fd); igt_fixture close(fd); } intel-gpu-tools-1.14/tests/gem_wait.c0000644000175000017500000001615612665336131014543 00000000000000/* * Copyright © 2012 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Ben Widawsky * */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include #include "intel_bufmgr.h" #define MSEC_PER_SEC 1000L #define USEC_PER_MSEC 1000L #define NSEC_PER_USEC 1000L #define NSEC_PER_MSEC 1000000L #define USEC_PER_SEC 1000000L #define NSEC_PER_SEC 1000000000L #define ENOUGH_WORK_IN_SECONDS 2 #define BUF_SIZE (8<<20) #define BUF_PAGES ((8<<20)>>12) drm_intel_bo *dst, *dst2; /* returns time diff in milliseconds */ static int64_t do_time_diff(struct timespec *end, struct timespec *start) { int64_t ret; ret = (MSEC_PER_SEC * difftime(end->tv_sec, start->tv_sec)) + ((end->tv_nsec/NSEC_PER_MSEC) - (start->tv_nsec/NSEC_PER_MSEC)); return ret; } static void blt_color_fill(struct intel_batchbuffer *batch, drm_intel_bo *buf, const unsigned int pages) { const unsigned short height = pages/4; const unsigned short width = 4096; COLOR_BLIT_COPY_BATCH_START(COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB); OUT_BATCH((3 << 24) | /* 32 Bit Color */ (0xF0 << 16) | /* Raster OP copy background register */ 0); /* Dest pitch is 0 */ OUT_BATCH(0); OUT_BATCH(width << 16 | height); OUT_RELOC_FENCED(buf, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(rand()); /* random pattern */ ADVANCE_BATCH(); } static void render_timeout(int fd) { drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; int64_t timeout = ENOUGH_WORK_IN_SECONDS * NSEC_PER_SEC; int64_t negative_timeout = -1; int ret; const bool do_signals = true; /* signals will seem to make the operation * use less process CPU time */ bool done = false; int i, iter = 1; igt_skip_on_simulation(); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); drm_intel_bufmgr_gem_enable_reuse(bufmgr); batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd)); dst = drm_intel_bo_alloc(bufmgr, "dst", BUF_SIZE, 4096); dst2 = drm_intel_bo_alloc(bufmgr, "dst2", BUF_SIZE, 4096); igt_skip_on_f(gem_wait(fd, dst->handle, &timeout) == -EINVAL, "kernel doesn't support wait_timeout, skipping test\n"); timeout = ENOUGH_WORK_IN_SECONDS * NSEC_PER_SEC; /* Figure out a rough number of fills required to consume 1 second of * GPU work. */ do { struct timespec start, end; long diff; #ifndef CLOCK_MONOTONIC_RAW #define CLOCK_MONOTONIC_RAW CLOCK_MONOTONIC #endif igt_assert(clock_gettime(CLOCK_MONOTONIC_RAW, &start) == 0); for (i = 0; i < iter; i++) blt_color_fill(batch, dst, BUF_PAGES); intel_batchbuffer_flush(batch); drm_intel_bo_wait_rendering(dst); igt_assert(clock_gettime(CLOCK_MONOTONIC_RAW, &end) == 0); diff = do_time_diff(&end, &start); igt_assert(diff >= 0); if ((diff / MSEC_PER_SEC) > ENOUGH_WORK_IN_SECONDS) done = true; else iter <<= 1; } while (!done && iter < 1000000); igt_assert_lt(iter, 1000000); igt_debug("%d iters is enough work\n", iter); gem_quiescent_gpu(fd); if (do_signals) igt_fork_signal_helper(); /* We should be able to do half as much work in the same amount of time, * but because we might schedule almost twice as much as required, we * might accidentally time out. Hence add some fudge. */ for (i = 0; i < iter/3; i++) blt_color_fill(batch, dst2, BUF_PAGES); intel_batchbuffer_flush(batch); igt_assert(gem_bo_busy(fd, dst2->handle) == true); igt_assert_eq(gem_wait(fd, dst2->handle, &timeout), 0); igt_assert(gem_bo_busy(fd, dst2->handle) == false); igt_assert_neq(timeout, 0); if (timeout == (ENOUGH_WORK_IN_SECONDS * NSEC_PER_SEC)) igt_info("Buffer was already done!\n"); else igt_info("Finished with %fs remaining\n", timeout*1e-9); /* check that polling with timeout=0 works. */ timeout = 0; igt_assert_eq(gem_wait(fd, dst2->handle, &timeout), 0); igt_assert_eq(timeout, 0); /* Now check that we correctly time out, twice the auto-tune load should * be good enough. */ timeout = ENOUGH_WORK_IN_SECONDS * NSEC_PER_SEC; for (i = 0; i < iter*2; i++) blt_color_fill(batch, dst2, BUF_PAGES); intel_batchbuffer_flush(batch); ret = gem_wait(fd, dst2->handle, &timeout); igt_assert_eq(ret, -ETIME); igt_assert_eq(timeout, 0); igt_assert(gem_bo_busy(fd, dst2->handle) == true); /* check that polling with timeout=0 works. */ timeout = 0; igt_assert_eq(gem_wait(fd, dst2->handle, &timeout), -ETIME); igt_assert_eq(timeout, 0); /* Now check that we can pass negative (infinite) timeouts. */ negative_timeout = -1; for (i = 0; i < iter; i++) blt_color_fill(batch, dst2, BUF_PAGES); intel_batchbuffer_flush(batch); igt_assert_eq(gem_wait(fd, dst2->handle, &negative_timeout), 0); igt_assert_eq(negative_timeout, -1); /* infinity always remains */ igt_assert(gem_bo_busy(fd, dst2->handle) == false); if (do_signals) igt_stop_signal_helper(); drm_intel_bo_unreference(dst2); drm_intel_bo_unreference(dst); intel_batchbuffer_free(batch); drm_intel_bufmgr_destroy(bufmgr); } static void invalid_flags(int fd) { struct drm_i915_gem_wait wait; int ret; uint32_t handle; handle = gem_create(fd, 4096); wait.bo_handle = handle; wait.timeout_ns = 1; /* NOTE: This test intentionally tests for just the next available flag. * Don't "fix" this testcase without the ABI testcases for new flags * first. */ wait.flags = 1; ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_WAIT, &wait); igt_assert(ret != 0 && errno == EINVAL); gem_close(fd, handle); } static void invalid_buf(int fd) { struct drm_i915_gem_wait wait; int ret; wait.bo_handle = 0; wait.timeout_ns = 1; wait.flags = 0; ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_WAIT, &wait); igt_assert(ret != 0 && errno == ENOENT); } int drm_fd; igt_main { igt_fixture drm_fd = drm_open_driver(DRIVER_INTEL); igt_subtest("render_timeout") render_timeout(drm_fd); igt_subtest("invalid-flags") invalid_flags(drm_fd); igt_subtest("invalid-buf") invalid_buf(drm_fd); igt_fixture close(drm_fd); } intel-gpu-tools-1.14/tests/gem_ctx_bad_exec.c0000644000175000017500000000617012665336131016202 00000000000000/* * Copyright © 2012 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Ben Widawsky * */ /* * Negative test cases: * test we can't submit contexts to unsupported rings */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include "drm.h" IGT_TEST_DESCRIPTION("Test that context cannot be submitted to unsupported" " rings."); /* Copied from gem_exec_nop.c */ static int exec(int fd, uint32_t handle, int ring, int ctx_id) { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 gem_exec; int ret = 0; gem_exec.handle = handle; gem_exec.relocation_count = 0; gem_exec.relocs_ptr = 0; gem_exec.alignment = 0; gem_exec.offset = 0; gem_exec.flags = 0; gem_exec.rsvd1 = 0; gem_exec.rsvd2 = 0; execbuf.buffers_ptr = (uintptr_t)&gem_exec; execbuf.buffer_count = 1; execbuf.batch_start_offset = 0; execbuf.batch_len = 8; execbuf.cliprects_ptr = 0; execbuf.num_cliprects = 0; execbuf.DR1 = 0; execbuf.DR4 = 0; execbuf.flags = ring; i915_execbuffer2_set_context_id(execbuf, ctx_id); execbuf.rsvd2 = 0; ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); gem_sync(fd, handle); return ret; } uint32_t handle; uint32_t batch[2] = {MI_BATCH_BUFFER_END}; uint32_t ctx_id; int fd; igt_main { igt_skip_on_simulation(); igt_fixture { fd = drm_open_driver_render(DRIVER_INTEL); ctx_id = gem_context_create(fd); handle = gem_create(fd, 4096); gem_write(fd, handle, 0, batch, sizeof(batch)); } igt_subtest("render") igt_assert(exec(fd, handle, I915_EXEC_RENDER, ctx_id) == 0); igt_subtest("bsd") igt_assert(exec(fd, handle, I915_EXEC_BSD, ctx_id) != 0); igt_subtest("blt") igt_assert(exec(fd, handle, I915_EXEC_BLT, ctx_id) != 0); #ifdef I915_EXEC_VEBOX igt_fixture igt_require(gem_has_vebox(fd)); igt_subtest("vebox") igt_assert(exec(fd, handle, I915_EXEC_VEBOX, ctx_id) != 0); #endif } intel-gpu-tools-1.14/tests/vc4_create_bo.c0000644000175000017500000000506012665336131015436 00000000000000/* * Copyright © 2016 Broadcom * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ #include "igt.h" #include "igt_vc4.h" #include #include #include #include #include #include #include #include #include #include "vc4_drm.h" igt_main { int fd; igt_fixture { fd = drm_open_driver(DRIVER_VC4); } igt_subtest("create-bo-4096") { int handle = igt_vc4_create_bo(fd, 4096); gem_close(fd, handle); } igt_subtest("create-bo-0") { struct drm_vc4_create_bo arg = { .size = 0, }; do_ioctl_err(fd, DRM_IOCTL_VC4_CREATE_BO, &arg, EINVAL); } igt_subtest("create-bo-zeroed") { int fd2 = drm_open_driver(DRIVER_VC4); int handle; uint32_t *map; /* A size different from any used in our other tests, to try * to convince it to land as the only one of its size in the * kernel BO cache */ size_t size = 3 * 4096, i; /* Make a BO and free it on our main fd. */ handle = igt_vc4_create_bo(fd, size); map = igt_vc4_mmap_bo(fd, handle, size, PROT_READ | PROT_WRITE); memset(map, 0xd0, size); munmap(map, size); gem_close(fd, handle); /* Now, allocate a BO on the other fd and make sure it doesn't * have the old contents. */ handle = igt_vc4_create_bo(fd2, size); map = igt_vc4_mmap_bo(fd2, handle, size, PROT_READ | PROT_WRITE); for (i = 0; i < size / 4; i++) igt_assert_eq_u32(map[i], 0x0); munmap(map, size); gem_close(fd2, handle); close(fd2); } igt_fixture close(fd); } intel-gpu-tools-1.14/tests/gem_unfence_active_buffers.c0000644000175000017500000001136012665336131020261 00000000000000/* * Copyright © 2012 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * */ /** @file gem_unfence_active_buffers.c * * Testcase: Check for use-after free in the fence stealing code * * If we're stealing the fence of a active object where the active list is the * only thing holding a reference, we need to be careful not to access the old * object we're stealing the fence from after that reference has been dropped by * retire_requests. * * Note that this needs slab poisoning enabled in the kernel to reliably hit the * problem - the race window is too small. */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include "drm.h" #include "intel_bufmgr.h" IGT_TEST_DESCRIPTION("Check for use-after-free in the fence stealing code."); static drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; uint32_t devid; #define TEST_SIZE (1024*1024) #define TEST_STRIDE (4*1024) uint32_t data[TEST_SIZE/4]; igt_simple_main { int i, ret, fd, num_fences; drm_intel_bo *busy_bo, *test_bo; uint32_t tiling = I915_TILING_X; igt_skip_on_simulation(); for (i = 0; i < 1024*256; i++) data[i] = i; fd = drm_open_driver(DRIVER_INTEL); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); drm_intel_bufmgr_gem_enable_reuse(bufmgr); devid = intel_get_drm_devid(fd); batch = intel_batchbuffer_alloc(bufmgr, devid); igt_info("filling ring\n"); busy_bo = drm_intel_bo_alloc(bufmgr, "busy bo bo", 16*1024*1024, 4096); for (i = 0; i < 250; i++) { BLIT_COPY_BATCH_START(0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ 2*1024*4); OUT_BATCH(0 << 16 | 1024); OUT_BATCH((2048) << 16 | (2048)); OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(0 << 16 | 0); OUT_BATCH(2*1024*4); OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, 0, 0); ADVANCE_BATCH(); if (batch->gen >= 6) { BEGIN_BATCH(3, 0); OUT_BATCH(XY_SETUP_CLIP_BLT_CMD); OUT_BATCH(0); OUT_BATCH(0); ADVANCE_BATCH(); } } intel_batchbuffer_flush(batch); num_fences = gem_available_fences(fd); igt_info("creating havoc on %i fences\n", num_fences); for (i = 0; i < num_fences*2; i++) { test_bo = drm_intel_bo_alloc(bufmgr, "test_bo", TEST_SIZE, 4096); ret = drm_intel_bo_set_tiling(test_bo, &tiling, TEST_STRIDE); igt_assert(ret == 0); drm_intel_bo_disable_reuse(test_bo); BLIT_COPY_BATCH_START(0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ TEST_STRIDE); OUT_BATCH(0 << 16 | 0); OUT_BATCH((1) << 16 | (1)); OUT_RELOC_FENCED(test_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(0 << 16 | 0); OUT_BATCH(TEST_STRIDE); OUT_RELOC_FENCED(test_bo, I915_GEM_DOMAIN_RENDER, 0, 0); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); igt_info("test bo offset: %#lx\n", test_bo->offset); drm_intel_bo_unreference(test_bo); } /* launch a few batchs to ensure the damaged slab objects get reused. */ for (i = 0; i < 10; i++) { BLIT_COPY_BATCH_START(0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ 2*1024*4); OUT_BATCH(0 << 16 | 1024); OUT_BATCH((1) << 16 | (1)); OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(0 << 16 | 0); OUT_BATCH(2*1024*4); OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, 0, 0); ADVANCE_BATCH(); if (batch->gen >= 8) { BEGIN_BATCH(3, 0); OUT_BATCH(XY_SETUP_CLIP_BLT_CMD); OUT_BATCH(0); OUT_BATCH(0); ADVANCE_BATCH(); } } intel_batchbuffer_flush(batch); } intel-gpu-tools-1.14/tests/gem_readwrite.c0000644000175000017500000001015712665336131015560 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include "drm.h" #define OBJECT_SIZE 16384 static int do_read(int fd, int handle, void *buf, int offset, int size) { struct drm_i915_gem_pread gem_pread; /* Ensure that we don't have any convenient data in buf in case * we fail. */ memset(buf, 0xd0, size); memset(&gem_pread, 0, sizeof(gem_pread)); gem_pread.handle = handle; gem_pread.data_ptr = (uintptr_t)buf; gem_pread.size = size; gem_pread.offset = offset; return ioctl(fd, DRM_IOCTL_I915_GEM_PREAD, &gem_pread); } static int do_write(int fd, int handle, void *buf, int offset, int size) { struct drm_i915_gem_pwrite gem_pwrite; memset(&gem_pwrite, 0, sizeof(gem_pwrite)); gem_pwrite.handle = handle; gem_pwrite.data_ptr = (uintptr_t)buf; gem_pwrite.size = size; gem_pwrite.offset = offset; return ioctl(fd, DRM_IOCTL_I915_GEM_PWRITE, &gem_pwrite); } int fd; uint32_t handle; igt_main { uint8_t expected[OBJECT_SIZE]; uint8_t buf[OBJECT_SIZE]; int ret; igt_skip_on_simulation(); igt_fixture { fd = drm_open_driver(DRIVER_INTEL); handle = gem_create(fd, OBJECT_SIZE); } igt_subtest("new-obj") { igt_info("Testing contents of newly created object.\n"); ret = do_read(fd, handle, buf, 0, OBJECT_SIZE); igt_assert(ret == 0); memset(&expected, 0, sizeof(expected)); igt_assert(memcmp(expected, buf, sizeof(expected)) == 0); } igt_subtest("beyond-EOB") { igt_info("Testing read beyond end of buffer.\n"); ret = do_read(fd, handle, buf, OBJECT_SIZE / 2, OBJECT_SIZE); igt_assert(ret == -1 && errno == EINVAL); } igt_subtest("read-write") { igt_info("Testing full write of buffer\n"); memset(buf, 0, sizeof(buf)); memset(buf + 1024, 0x01, 1024); memset(expected + 1024, 0x01, 1024); ret = do_write(fd, handle, buf, 0, OBJECT_SIZE); igt_assert(ret == 0); ret = do_read(fd, handle, buf, 0, OBJECT_SIZE); igt_assert(ret == 0); igt_assert(memcmp(buf, expected, sizeof(buf)) == 0); igt_info("Testing partial write of buffer\n"); memset(buf + 4096, 0x02, 1024); memset(expected + 4096, 0x02, 1024); ret = do_write(fd, handle, buf + 4096, 4096, 1024); igt_assert(ret == 0); ret = do_read(fd, handle, buf, 0, OBJECT_SIZE); igt_assert(ret == 0); igt_assert(memcmp(buf, expected, sizeof(buf)) == 0); igt_info("Testing partial read of buffer\n"); ret = do_read(fd, handle, buf, 512, 1024); igt_assert(ret == 0); igt_assert(memcmp(buf, expected + 512, 1024) == 0); } igt_subtest("read-bad-handle") { igt_info("Testing read of bad buffer handle\n"); ret = do_read(fd, 1234, buf, 0, 1024); igt_assert(ret == -1 && errno == ENOENT); } igt_subtest("write-bad-handle") { igt_info("Testing write of bad buffer handle\n"); ret = do_write(fd, 1234, buf, 0, 1024); igt_assert(ret == -1 && errno == ENOENT); } igt_fixture close(fd); } intel-gpu-tools-1.14/tests/gen3_mixed_blits.c0000644000175000017500000003412312665336131016160 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ /** @file gen3_linear_render_blits.c * * This is a test of doing many blits, with a working set * larger than the aperture size. * * The goal is to simply ensure the basics work. */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include "drm.h" #include "i915_reg.h" #define WIDTH (512) #define HEIGHT (512) static inline uint32_t pack_float(float f) { union { uint32_t dw; float f; } u; u.f = f; return u.dw; } static uint32_t fill_reloc(struct drm_i915_gem_relocation_entry *reloc, uint32_t offset, uint32_t handle, uint32_t read_domain, uint32_t write_domain) { reloc->target_handle = handle; reloc->delta = 0; reloc->offset = offset * sizeof(uint32_t); reloc->presumed_offset = 0; reloc->read_domains = read_domain; reloc->write_domain = write_domain; return reloc->presumed_offset + reloc->delta; } static void render_copy(int fd, uint32_t dst, int dst_tiling, uint32_t src, int src_tiling, int use_fence) { uint32_t batch[1024], *b = batch; struct drm_i915_gem_relocation_entry reloc[2], *r = reloc; struct drm_i915_gem_exec_object2 obj[3]; struct drm_i915_gem_execbuffer2 exec; uint32_t handle; uint32_t tiling_bits; int ret; /* invariant state */ *b++ = (_3DSTATE_AA_CMD | AA_LINE_ECAAR_WIDTH_ENABLE | AA_LINE_ECAAR_WIDTH_1_0 | AA_LINE_REGION_WIDTH_ENABLE | AA_LINE_REGION_WIDTH_1_0); *b++ = (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD | IAB_MODIFY_ENABLE | IAB_MODIFY_FUNC | (BLENDFUNC_ADD << IAB_FUNC_SHIFT) | IAB_MODIFY_SRC_FACTOR | (BLENDFACT_ONE << IAB_SRC_FACTOR_SHIFT) | IAB_MODIFY_DST_FACTOR | (BLENDFACT_ZERO << IAB_DST_FACTOR_SHIFT)); *b++ = (_3DSTATE_DFLT_DIFFUSE_CMD); *b++ = (0); *b++ = (_3DSTATE_DFLT_SPEC_CMD); *b++ = (0); *b++ = (_3DSTATE_DFLT_Z_CMD); *b++ = (0); *b++ = (_3DSTATE_COORD_SET_BINDINGS | CSB_TCB(0, 0) | CSB_TCB(1, 1) | CSB_TCB(2, 2) | CSB_TCB(3, 3) | CSB_TCB(4, 4) | CSB_TCB(5, 5) | CSB_TCB(6, 6) | CSB_TCB(7, 7)); *b++ = (_3DSTATE_RASTER_RULES_CMD | ENABLE_POINT_RASTER_RULE | OGL_POINT_RASTER_RULE | ENABLE_LINE_STRIP_PROVOKE_VRTX | ENABLE_TRI_FAN_PROVOKE_VRTX | LINE_STRIP_PROVOKE_VRTX(1) | TRI_FAN_PROVOKE_VRTX(2) | ENABLE_TEXKILL_3D_4D | TEXKILL_4D); *b++ = (_3DSTATE_MODES_4_CMD | ENABLE_LOGIC_OP_FUNC | LOGIC_OP_FUNC(LOGICOP_COPY) | ENABLE_STENCIL_WRITE_MASK | STENCIL_WRITE_MASK(0xff) | ENABLE_STENCIL_TEST_MASK | STENCIL_TEST_MASK(0xff)); *b++ = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | I1_LOAD_S(4) | I1_LOAD_S(5) | 2); *b++ = (0x00000000); /* Disable texture coordinate wrap-shortest */ *b++ = ((1 << S4_POINT_WIDTH_SHIFT) | S4_LINE_WIDTH_ONE | S4_CULLMODE_NONE | S4_VFMT_XY); *b++ = (0x00000000); /* Stencil. */ *b++ = (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT); *b++ = (_3DSTATE_SCISSOR_RECT_0_CMD); *b++ = (0); *b++ = (0); *b++ = (_3DSTATE_DEPTH_SUBRECT_DISABLE); *b++ = (_3DSTATE_LOAD_INDIRECT | 0); /* disable indirect state */ *b++ = (0); *b++ = (_3DSTATE_STIPPLE); *b++ = (0x00000000); *b++ = (_3DSTATE_BACKFACE_STENCIL_OPS | BFO_ENABLE_STENCIL_TWO_SIDE | 0); /* samler state */ if (use_fence) { tiling_bits = MS3_USE_FENCE_REGS; } else { tiling_bits = 0; if (src_tiling != I915_TILING_NONE) tiling_bits = MS3_TILED_SURFACE; if (src_tiling == I915_TILING_Y) tiling_bits |= MS3_TILE_WALK; } #define TEX_COUNT 1 *b++ = (_3DSTATE_MAP_STATE | (3 * TEX_COUNT)); *b++ = ((1 << TEX_COUNT) - 1); *b = fill_reloc(r++, b-batch, src, I915_GEM_DOMAIN_SAMPLER, 0); b++; *b++ = (MAPSURF_32BIT | MT_32BIT_ARGB8888 | tiling_bits | (HEIGHT - 1) << MS3_HEIGHT_SHIFT | (WIDTH - 1) << MS3_WIDTH_SHIFT); *b++ = ((WIDTH-1) << MS4_PITCH_SHIFT); *b++ = (_3DSTATE_SAMPLER_STATE | (3 * TEX_COUNT)); *b++ = ((1 << TEX_COUNT) - 1); *b++ = (MIPFILTER_NONE << SS2_MIP_FILTER_SHIFT | FILTER_NEAREST << SS2_MAG_FILTER_SHIFT | FILTER_NEAREST << SS2_MIN_FILTER_SHIFT); *b++ = (TEXCOORDMODE_WRAP << SS3_TCX_ADDR_MODE_SHIFT | TEXCOORDMODE_WRAP << SS3_TCY_ADDR_MODE_SHIFT | 0 << SS3_TEXTUREMAP_INDEX_SHIFT); *b++ = (0x00000000); /* render target state */ if (use_fence) { tiling_bits = BUF_3D_USE_FENCE; } else { tiling_bits = 0; if (dst_tiling != I915_TILING_NONE) tiling_bits = BUF_3D_TILED_SURFACE; if (dst_tiling == I915_TILING_Y) tiling_bits |= BUF_3D_TILE_WALK_Y; } *b++ = (_3DSTATE_BUF_INFO_CMD); *b++ = (BUF_3D_ID_COLOR_BACK | tiling_bits | WIDTH*4); *b = fill_reloc(r++, b-batch, dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER); b++; *b++ = (_3DSTATE_DST_BUF_VARS_CMD); *b++ = (COLR_BUF_ARGB8888 | DSTORG_HORT_BIAS(0x8) | DSTORG_VERT_BIAS(0x8)); /* draw rect is unconditional */ *b++ = (_3DSTATE_DRAW_RECT_CMD); *b++ = (0x00000000); *b++ = (0x00000000); /* ymin, xmin */ *b++ = (DRAW_YMAX(HEIGHT - 1) | DRAW_XMAX(WIDTH - 1)); /* yorig, xorig (relate to color buffer?) */ *b++ = (0x00000000); /* texfmt */ *b++ = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(1) | I1_LOAD_S(2) | I1_LOAD_S(6) | 2); *b++ = ((4 << S1_VERTEX_WIDTH_SHIFT) | (4 << S1_VERTEX_PITCH_SHIFT)); *b++ = (~S2_TEXCOORD_FMT(0, TEXCOORDFMT_NOT_PRESENT) | S2_TEXCOORD_FMT(0, TEXCOORDFMT_2D)); *b++ = (S6_CBUF_BLEND_ENABLE | S6_COLOR_WRITE_ENABLE | BLENDFUNC_ADD << S6_CBUF_BLEND_FUNC_SHIFT | BLENDFACT_ONE << S6_CBUF_SRC_BLEND_FACT_SHIFT | BLENDFACT_ZERO << S6_CBUF_DST_BLEND_FACT_SHIFT); /* pixel shader */ *b++ = (_3DSTATE_PIXEL_SHADER_PROGRAM | (1 + 3*3 - 2)); /* decl FS_T0 */ *b++ = (D0_DCL | REG_TYPE(FS_T0) << D0_TYPE_SHIFT | REG_NR(FS_T0) << D0_NR_SHIFT | ((REG_TYPE(FS_T0) != REG_TYPE_S) ? D0_CHANNEL_ALL : 0)); *b++ = (0); *b++ = (0); /* decl FS_S0 */ *b++ = (D0_DCL | (REG_TYPE(FS_S0) << D0_TYPE_SHIFT) | (REG_NR(FS_S0) << D0_NR_SHIFT) | ((REG_TYPE(FS_S0) != REG_TYPE_S) ? D0_CHANNEL_ALL : 0)); *b++ = (0); *b++ = (0); /* texld(FS_OC, FS_S0, FS_T0 */ *b++ = (T0_TEXLD | (REG_TYPE(FS_OC) << T0_DEST_TYPE_SHIFT) | (REG_NR(FS_OC) << T0_DEST_NR_SHIFT) | (REG_NR(FS_S0) << T0_SAMPLER_NR_SHIFT)); *b++ = ((REG_TYPE(FS_T0) << T1_ADDRESS_REG_TYPE_SHIFT) | (REG_NR(FS_T0) << T1_ADDRESS_REG_NR_SHIFT)); *b++ = (0); *b++ = (PRIM3D_RECTLIST | (3*4 - 1)); *b++ = pack_float(WIDTH); *b++ = pack_float(HEIGHT); *b++ = pack_float(WIDTH); *b++ = pack_float(HEIGHT); *b++ = pack_float(0); *b++ = pack_float(HEIGHT); *b++ = pack_float(0); *b++ = pack_float(HEIGHT); *b++ = pack_float(0); *b++ = pack_float(0); *b++ = pack_float(0); *b++ = pack_float(0); *b++ = MI_BATCH_BUFFER_END; if ((b - batch) & 1) *b++ = 0; igt_assert(b - batch <= 1024); handle = gem_create(fd, 4096); gem_write(fd, handle, 0, batch, (b-batch)*sizeof(batch[0])); igt_assert(r-reloc == 2); tiling_bits = 0; if (use_fence) tiling_bits = EXEC_OBJECT_NEEDS_FENCE; obj[0].handle = dst; obj[0].relocation_count = 0; obj[0].relocs_ptr = 0; obj[0].alignment = 0; obj[0].offset = 0; obj[0].flags = tiling_bits; obj[0].rsvd1 = 0; obj[0].rsvd2 = 0; obj[1].handle = src; obj[1].relocation_count = 0; obj[1].relocs_ptr = 0; obj[1].alignment = 0; obj[1].offset = 0; obj[1].flags = tiling_bits; obj[1].rsvd1 = 0; obj[1].rsvd2 = 0; obj[2].handle = handle; obj[2].relocation_count = 2; obj[2].relocs_ptr = (uintptr_t)reloc; obj[2].alignment = 0; obj[2].offset = 0; obj[2].flags = 0; obj[2].rsvd1 = obj[2].rsvd2 = 0; exec.buffers_ptr = (uintptr_t)obj; exec.buffer_count = 3; exec.batch_start_offset = 0; exec.batch_len = (b-batch)*sizeof(batch[0]); exec.DR1 = exec.DR4 = 0; exec.num_cliprects = 0; exec.cliprects_ptr = 0; exec.flags = 0; i915_execbuffer2_set_context_id(exec, 0); exec.rsvd2 = 0; ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &exec); while (ret && errno == EBUSY) { drmCommandNone(fd, DRM_I915_GEM_THROTTLE); ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &exec); } igt_assert_eq(ret, 0); gem_close(fd, handle); } static void blt_copy(int fd, uint32_t dst, uint32_t src) { uint32_t batch[1024], *b = batch; struct drm_i915_gem_relocation_entry reloc[2], *r = reloc; struct drm_i915_gem_exec_object2 obj[3]; struct drm_i915_gem_execbuffer2 exec; uint32_t handle; int ret; *b++ = (XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA | XY_SRC_COPY_BLT_WRITE_RGB | 6); *b++ = 3 << 24 | 0xcc << 16 | WIDTH * 4; *b++ = 0; *b++ = HEIGHT << 16 | WIDTH; *b = fill_reloc(r++, b-batch, dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER); b++; *b++ = 0; *b++ = WIDTH*4; *b = fill_reloc(r++, b-batch, src, I915_GEM_DOMAIN_RENDER, 0); b++; *b++ = MI_BATCH_BUFFER_END; if ((b - batch) & 1) *b++ = 0; igt_assert(b - batch <= 1024); handle = gem_create(fd, 4096); gem_write(fd, handle, 0, batch, (b-batch)*sizeof(batch[0])); igt_assert(r-reloc == 2); obj[0].handle = dst; obj[0].relocation_count = 0; obj[0].relocs_ptr = 0; obj[0].alignment = 0; obj[0].offset = 0; obj[0].flags = EXEC_OBJECT_NEEDS_FENCE; obj[0].rsvd1 = 0; obj[0].rsvd2 = 0; obj[1].handle = src; obj[1].relocation_count = 0; obj[1].relocs_ptr = 0; obj[1].alignment = 0; obj[1].offset = 0; obj[1].flags = EXEC_OBJECT_NEEDS_FENCE; obj[1].rsvd1 = 0; obj[1].rsvd2 = 0; obj[2].handle = handle; obj[2].relocation_count = 2; obj[2].relocs_ptr = (uintptr_t)reloc; obj[2].alignment = 0; obj[2].offset = 0; obj[2].flags = 0; obj[2].rsvd1 = obj[2].rsvd2 = 0; exec.buffers_ptr = (uintptr_t)obj; exec.buffer_count = 3; exec.batch_start_offset = 0; exec.batch_len = (b-batch)*sizeof(batch[0]); exec.DR1 = exec.DR4 = 0; exec.num_cliprects = 0; exec.cliprects_ptr = 0; exec.flags = 0; i915_execbuffer2_set_context_id(exec, 0); exec.rsvd2 = 0; ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &exec); while (ret && errno == EBUSY) { drmCommandNone(fd, DRM_I915_GEM_THROTTLE); ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &exec); } igt_assert_eq(ret, 0); gem_close(fd, handle); } static void copy(int fd, uint32_t dst, int dst_tiling, uint32_t src, int src_tiling) { retry: switch (random() % 3) { case 0: render_copy(fd, dst, dst_tiling, src, src_tiling, 0); break; case 1: render_copy(fd, dst, dst_tiling, src, src_tiling, 1); break; case 2: if (dst_tiling == I915_TILING_Y || src_tiling == I915_TILING_Y) goto retry; blt_copy(fd, dst, src); break; } } static uint32_t create_bo(int fd, uint32_t val, int tiling) { uint32_t handle; uint32_t *v; int i; handle = gem_create(fd, WIDTH*HEIGHT*4); gem_set_tiling(fd, handle, tiling, WIDTH*4); /* Fill the BO with dwords starting at val */ v = gem_mmap__gtt(fd, handle, WIDTH * HEIGHT * 4, PROT_READ | PROT_WRITE); for (i = 0; i < WIDTH*HEIGHT; i++) v[i] = val++; munmap(v, WIDTH*HEIGHT*4); return handle; } static void check_bo(int fd, uint32_t handle, uint32_t val) { uint32_t *v; int i; v = gem_mmap__gtt(fd, handle, WIDTH * HEIGHT * 4, PROT_READ); for (i = 0; i < WIDTH*HEIGHT; i++) { igt_assert_f(v[i] == val, "Expected 0x%08x, found 0x%08x " "at offset 0x%08x\n", val, v[i], i * 4); val++; } munmap(v, WIDTH*HEIGHT*4); } int main(int argc, char **argv) { uint32_t *handle, *tiling, *start_val; uint32_t start = 0; int i, fd, count; igt_simple_init(argc, argv); fd = drm_open_driver(DRIVER_INTEL); igt_require(IS_GEN3(intel_get_drm_devid(fd))); count = 0; if (argc > 1) count = atoi(argv[1]); if (count == 0) count = 3 * gem_aperture_size(fd) / (1024*1024) / 2; igt_info("Using %d 1MiB buffers\n", count); handle = malloc(sizeof(uint32_t)*count*3); tiling = handle + count; start_val = tiling + count; for (i = 0; i < count; i++) { handle[i] = create_bo(fd, start, tiling[i] = i % 3); start_val[i] = start; start += 1024 * 1024 / 4; } igt_info("Verifying initialisation..."); fflush(stdout); for (i = 0; i < count; i++) check_bo(fd, handle[i], start_val[i]); igt_info("done\n"); igt_info("Cyclic blits, forward..."); fflush(stdout); for (i = 0; i < count * 32; i++) { int src = i % count; int dst = (i + 1) % count; copy(fd, handle[dst], tiling[dst], handle[src], tiling[src]); start_val[dst] = start_val[src]; } igt_info("verifying..."); fflush(stdout); for (i = 0; i < count; i++) check_bo(fd, handle[i], start_val[i]); igt_info("done\n"); igt_info("Cyclic blits, backward..."); fflush(stdout); for (i = 0; i < count * 32; i++) { int src = (i + 1) % count; int dst = i % count; copy(fd, handle[dst], tiling[dst], handle[src], tiling[src]); start_val[dst] = start_val[src]; } igt_info("verifying..."); fflush(stdout); for (i = 0; i < count; i++) check_bo(fd, handle[i], start_val[i]); igt_info("done\n"); igt_info("Random blits..."); fflush(stdout); for (i = 0; i < count * 32; i++) { int src = random() % count; int dst = random() % count; while (src == dst) dst = random() % count; copy(fd, handle[dst], tiling[dst], handle[src], tiling[src]); start_val[dst] = start_val[src]; } igt_info("verifying..."); fflush(stdout); for (i = 0; i < count; i++) check_bo(fd, handle[i], start_val[i]); igt_info("done\n"); igt_exit(); } intel-gpu-tools-1.14/tests/tools_test0000755000175000017500000000057612665336131014727 00000000000000#!/bin/bash # Test some of the most critical tools we have accidentally broken before. # TODO: Possibly make tests parse output SOURCE_DIR="$( dirname "${BASH_SOURCE[0]}" )" . $SOURCE_DIR/drm_lib.sh # ARB_MODE has existed for many gens PATH=$SOURCE_DIR/../tools:$PATH do_or_die "intel_reg_read 0x4030" do_or_die "intel_reg_dumper" # TODO: Add more tests exit $IGT_EXIT_SUCCESS intel-gpu-tools-1.14/tests/gem_render_tiled_blits.c0000644000175000017500000001344012665336131017425 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ /** @file gem_linear_render_blits.c * * This is a test of doing many blits, with a working set * larger than the aperture size. * * The goal is to simply ensure the basics work. */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include "intel_bufmgr.h" #define WIDTH 512 #define STRIDE (WIDTH*4) #define HEIGHT 512 #define SIZE (HEIGHT*STRIDE) static igt_render_copyfunc_t render_copy; static drm_intel_bo *linear; static uint32_t data[WIDTH*HEIGHT]; static int snoop; static void check_bo(struct intel_batchbuffer *batch, struct igt_buf *buf, uint32_t val) { struct igt_buf tmp; uint32_t *ptr; int i; tmp.bo = linear; tmp.stride = STRIDE; tmp.tiling = I915_TILING_NONE; tmp.size = SIZE; render_copy(batch, NULL, buf, 0, 0, WIDTH, HEIGHT, &tmp, 0, 0); if (snoop) { do_or_die(dri_bo_map(linear, 0)); ptr = linear->virtual; } else { do_or_die(drm_intel_bo_get_subdata(linear, 0, sizeof(data), data)); ptr = data; } for (i = 0; i < WIDTH*HEIGHT; i++) { igt_assert_f(ptr[i] == val, "Expected 0x%08x, found 0x%08x " "at offset 0x%08x\n", val, ptr[i], i * 4); val++; } if (ptr != data) dri_bo_unmap(linear); } static void run_test (int fd, int count) { drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; uint32_t *start_val; struct igt_buf *buf; uint32_t start = 0; int i, j; uint32_t devid; devid = intel_get_drm_devid(fd); render_copy = igt_get_render_copyfunc(devid); igt_require(render_copy); snoop = 1; if (IS_GEN2(devid)) /* chipset only handles cached -> uncached */ snoop = 0; if (IS_BROADWATER(devid) || IS_CRESTLINE(devid)) /* snafu */ snoop = 0; bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); drm_intel_bufmgr_gem_set_vma_cache_size(bufmgr, 32); batch = intel_batchbuffer_alloc(bufmgr, devid); linear = drm_intel_bo_alloc(bufmgr, "linear", WIDTH*HEIGHT*4, 0); if (snoop) { gem_set_caching(fd, linear->handle, 1); igt_info("Using a snoop linear buffer for comparisons\n"); } buf = malloc(sizeof(*buf)*count); start_val = malloc(sizeof(*start_val)*count); for (i = 0; i < count; i++) { uint32_t tiling = I915_TILING_X + (random() & 1); unsigned long pitch = STRIDE; uint32_t *ptr; buf[i].bo = drm_intel_bo_alloc_tiled(bufmgr, "", WIDTH, HEIGHT, 4, &tiling, &pitch, 0); buf[i].stride = pitch; buf[i].tiling = tiling; buf[i].size = SIZE; start_val[i] = start; do_or_die(drm_intel_gem_bo_map_gtt(buf[i].bo)); ptr = buf[i].bo->virtual; for (j = 0; j < WIDTH*HEIGHT; j++) ptr[j] = start++; drm_intel_gem_bo_unmap_gtt(buf[i].bo); } igt_info("Verifying initialisation...\n"); for (i = 0; i < count; i++) check_bo(batch, &buf[i], start_val[i]); igt_info("Cyclic blits, forward...\n"); for (i = 0; i < count * 4; i++) { int src = i % count; int dst = (i + 1) % count; render_copy(batch, NULL, buf+src, 0, 0, WIDTH, HEIGHT, buf+dst, 0, 0); start_val[dst] = start_val[src]; } for (i = 0; i < count; i++) check_bo(batch, &buf[i], start_val[i]); igt_info("Cyclic blits, backward...\n"); for (i = 0; i < count * 4; i++) { int src = (i + 1) % count; int dst = i % count; render_copy(batch, NULL, buf+src, 0, 0, WIDTH, HEIGHT, buf+dst, 0, 0); start_val[dst] = start_val[src]; } for (i = 0; i < count; i++) check_bo(batch, &buf[i], start_val[i]); igt_info("Random blits...\n"); for (i = 0; i < count * 4; i++) { int src = random() % count; int dst = random() % count; if (src == dst) continue; render_copy(batch, NULL, buf+src, 0, 0, WIDTH, HEIGHT, buf+dst, 0, 0); start_val[dst] = start_val[src]; } for (i = 0; i < count; i++) check_bo(batch, &buf[i], start_val[i]); /* release resources */ drm_intel_bo_unreference(linear); for (i = 0; i < count; i++) { drm_intel_bo_unreference(buf[i].bo); } intel_batchbuffer_free(batch); drm_intel_bufmgr_destroy(bufmgr); } igt_main { int fd = 0; int count = 0; igt_fixture { fd = drm_open_driver(DRIVER_INTEL); } igt_subtest("basic") { run_test(fd, 2); } /* the rest of the tests are too long for simulation */ igt_skip_on_simulation(); igt_subtest("apperture-thrash") { count = 3 * gem_aperture_size(fd) / SIZE / 2; intel_require_memory(count, SIZE, CHECK_RAM); run_test(fd, count); } igt_subtest("swap-thrash") { uint64_t swap_mb = intel_get_total_swap_mb(); igt_require(swap_mb > 0); count = ((intel_get_avail_ram_mb() + (swap_mb / 2)) * 1024*1024) / SIZE; intel_require_memory(count, SIZE, CHECK_RAM | CHECK_SWAP); run_test(fd, count); } } intel-gpu-tools-1.14/tests/gem_ctx_basic.c0000644000175000017500000000764212665336131015536 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Ben Widawsky * */ /* * This test is useful for finding memory and refcount leaks. */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include "drm.h" #include "intel_bufmgr.h" IGT_TEST_DESCRIPTION("Basic test for memory and refcount leaks."); /* options */ int num_contexts = 10; int uncontexted = 0; /* test only context create/destroy */ int multiple_fds = 1; int iter = 10000; /* globals */ pthread_t *threads; int devid; int fd; static void init_buffer(drm_intel_bufmgr *bufmgr, struct igt_buf *buf, uint32_t size) { buf->bo = drm_intel_bo_alloc(bufmgr, "", size, 4096); buf->size = size; igt_assert(buf->bo); buf->tiling = I915_TILING_NONE; buf->stride = 4096; } static void *work(void *arg) { struct intel_batchbuffer *batch; igt_render_copyfunc_t rendercopy = igt_get_render_copyfunc(devid); drm_intel_context *context; drm_intel_bufmgr *bufmgr; int td_fd; int i; if (multiple_fds) td_fd = fd = drm_open_driver_render(DRIVER_INTEL); else td_fd = fd; igt_assert_lte(0, td_fd); bufmgr = drm_intel_bufmgr_gem_init(td_fd, 4096); batch = intel_batchbuffer_alloc(bufmgr, devid); context = drm_intel_gem_context_create(bufmgr); igt_require(context); for (i = 0; i < iter; i++) { struct igt_buf src, dst; init_buffer(bufmgr, &src, 4096); init_buffer(bufmgr, &dst, 4096); if (uncontexted) { igt_assert(rendercopy); rendercopy(batch, NULL, &src, 0, 0, 0, 0, &dst, 0, 0); } else { int ret; ret = drm_intel_bo_subdata(batch->bo, 0, 4096, batch->buffer); igt_assert_eq(ret, 0); intel_batchbuffer_flush_with_context(batch, context); } } drm_intel_gem_context_destroy(context); intel_batchbuffer_free(batch); drm_intel_bufmgr_destroy(bufmgr); if (multiple_fds) close(td_fd); pthread_exit(NULL); } static int opt_handler(int opt, int opt_index, void *data) { switch (opt) { case 'i': iter = atoi(optarg); break; case 'c': num_contexts = atoi(optarg); break; case 'm': multiple_fds = 1; break; case 'u': uncontexted = 1; break; } return 0; } int main(int argc, char *argv[]) { int i; igt_simple_init_parse_opts(&argc, argv, "i:c:n:mu", NULL, NULL, opt_handler, NULL); fd = drm_open_driver_render(DRIVER_INTEL); devid = intel_get_drm_devid(fd); if (igt_run_in_simulation()) { num_contexts = 2; iter = 4; } threads = calloc(num_contexts, sizeof(*threads)); for (i = 0; i < num_contexts; i++) pthread_create(&threads[i], NULL, work, &i); for (i = 0; i < num_contexts; i++) { void *retval; igt_assert(pthread_join(threads[i], &retval) == 0); } free(threads); close(fd); igt_exit(); } intel-gpu-tools-1.14/tests/gem_write_read_ring_switch.c0000644000175000017500000001270612665336131020321 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include "i830_reg.h" IGT_TEST_DESCRIPTION("Check read/write syncpoints when switching rings."); #define LOCAL_I915_EXEC_VEBOX (4<<0) static drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; static drm_intel_bo *load_bo, *target_bo, *dummy_bo; int fd; /* Testcase: check read/write syncpoints when switching rings * * We've had a bug where the syncpoint for the last write was mangled after a * ring switch using semaphores. This resulted in cpu reads returning before the * write actually completed. This test exercises this. */ #define COLOR 0xffffffff static void run_test(int ring) { uint32_t *ptr; int i; gem_require_ring(fd, ring); /* Testing render only makes sense with separate blt. */ if (ring == I915_EXEC_RENDER) gem_require_ring(fd, I915_EXEC_BLT); target_bo = drm_intel_bo_alloc(bufmgr, "target bo", 4096, 4096); igt_assert(target_bo); /* Need to map first so that we can do our own domain mangement with * set_domain. */ drm_intel_bo_map(target_bo, 0); ptr = target_bo->virtual; igt_assert(*ptr == 0); /* put some load onto the gpu to keep the light buffers active for long * enough */ for (i = 0; i < 1000; i++) { BLIT_COPY_BATCH_START(0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ 4096); OUT_BATCH(0); /* dst x1,y1 */ OUT_BATCH((1024 << 16) | 512); OUT_RELOC_FENCED(load_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH((0 << 16) | 512); /* src x1, y1 */ OUT_BATCH(4096); OUT_RELOC_FENCED(load_bo, I915_GEM_DOMAIN_RENDER, 0, 0); ADVANCE_BATCH(); } COLOR_BLIT_COPY_BATCH_START(0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xff << 16) | 128); OUT_BATCH(0); /* dst x1,y1 */ OUT_BATCH((1 << 16) | 1); OUT_RELOC_FENCED(target_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(COLOR); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); /* Emit an empty batch so that signalled seqno on the target ring > * signalled seqnoe on the blt ring. This is required to hit the bug. */ BEGIN_BATCH(2, 0); OUT_BATCH(MI_NOOP); OUT_BATCH(MI_NOOP); ADVANCE_BATCH(); intel_batchbuffer_flush_on_ring(batch, ring); /* For the ring->ring sync it's important to only emit a read reloc, for * otherwise the obj->last_write_seqno will be updated. */ if (ring == I915_EXEC_RENDER) { BEGIN_BATCH(4, 1); OUT_BATCH(MI_COND_BATCH_BUFFER_END | MI_DO_COMPARE); OUT_BATCH(0xffffffff); /* compare dword */ OUT_RELOC(target_bo, I915_GEM_DOMAIN_RENDER, 0, 0); OUT_BATCH(MI_NOOP); ADVANCE_BATCH(); } else { BEGIN_BATCH(4, 1); OUT_BATCH(MI_FLUSH_DW | 1); OUT_BATCH(0); /* reserved */ OUT_RELOC(target_bo, I915_GEM_DOMAIN_RENDER, 0, 0); OUT_BATCH(MI_NOOP | (1<<22) | (0xf)); ADVANCE_BATCH(); } intel_batchbuffer_flush_on_ring(batch, ring); gem_set_domain(fd, target_bo->handle, I915_GEM_DOMAIN_GTT, 0); igt_assert(*ptr == COLOR); drm_intel_bo_unmap(target_bo); drm_intel_bo_unreference(target_bo); } igt_main { static const struct { const char *name; int ring; } tests[] = { { "blt2render", I915_EXEC_RENDER }, { "blt2bsd", I915_EXEC_BSD }, { "blt2vebox", LOCAL_I915_EXEC_VEBOX }, }; int i; igt_skip_on_simulation(); igt_fixture { fd = drm_open_driver(DRIVER_INTEL); /* Test requires MI_FLUSH_DW and MI_COND_BATCH_BUFFER_END */ igt_require(intel_gen(intel_get_drm_devid(fd)) >= 6); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); igt_assert(bufmgr); /* don't enable buffer reuse!! */ //drm_intel_bufmgr_gem_enable_reuse(bufmgr); batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd)); igt_assert(batch); dummy_bo = drm_intel_bo_alloc(bufmgr, "dummy bo", 4096, 4096); igt_assert(dummy_bo); load_bo = drm_intel_bo_alloc(bufmgr, "load bo", 1024*4096, 4096); igt_assert(load_bo); } for (i = 0; i < ARRAY_SIZE(tests); i++) { igt_subtest(tests[i].name) run_test(tests[i].ring); } igt_fork_signal_helper(); for (i = 0; i < ARRAY_SIZE(tests); i++) { igt_subtest_f("%s-interruptible", tests[i].name) run_test(tests[i].ring); } igt_stop_signal_helper(); igt_fixture { drm_intel_bufmgr_destroy(bufmgr); close(fd); } } intel-gpu-tools-1.14/tests/pm_lpsp.c0000644000175000017500000001407412665336131014416 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Author: Paulo Zanoni * */ #include "igt.h" #include #include #include #include static bool supports_lpsp(uint32_t devid) { return IS_HASWELL(devid) || IS_BROADWELL(devid); } static bool lpsp_is_enabled(int drm_fd) { uint32_t val; val = INREG(HSW_PWR_WELL_CTL2); return !(val & HSW_PWR_WELL_STATE_ENABLED); } /* The LPSP mode is all about an enabled pipe, but we expect to also be in the * low power mode when no pipes are enabled, so do this check anyway. */ static void screens_disabled_subtest(int drm_fd, drmModeResPtr drm_res) { kmstest_unset_all_crtcs(drm_fd, drm_res); igt_assert(lpsp_is_enabled(drm_fd)); } static uint32_t create_fb(int drm_fd, int width, int height) { struct igt_fb fb; return igt_create_pattern_fb(drm_fd, width, height, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, &fb); } static void edp_subtest(int drm_fd, drmModeResPtr drm_res, drmModeConnectorPtr *drm_connectors, uint32_t devid, bool use_panel_fitter) { int i, rc; uint32_t connector_id = 0, crtc_id = 0, buffer_id = 0; drmModeModeInfoPtr mode = NULL; drmModeModeInfo std_1024_mode = { .clock = 65000, .hdisplay = 1024, .hsync_start = 1048, .hsync_end = 1184, .htotal = 1344, .hskew = 0, .vdisplay = 768, .vsync_start = 771, .vsync_end = 777, .vtotal = 806, .vscan = 0, .vrefresh = 60, .flags = 0xA, .type = 0x40, .name = "Custom 1024x768", }; kmstest_unset_all_crtcs(drm_fd, drm_res); for (i = 0; i < drm_res->count_connectors; i++) { drmModeConnectorPtr c = drm_connectors[i]; if (c->connector_type != DRM_MODE_CONNECTOR_eDP) continue; if (c->connection != DRM_MODE_CONNECTED) continue; if (!use_panel_fitter && c->count_modes) { connector_id = c->connector_id; mode = &c->modes[0]; break; } if (use_panel_fitter) { connector_id = c->connector_id; /* This is one of the modes Xorg creates for panels, so * it should work just fine. Notice that Gens that * support LPSP are too new for panels with native * 1024x768 resolution, so this should force the panel * fitter. */ igt_assert(c->count_modes && c->modes[0].hdisplay > 1024); igt_assert(c->count_modes && c->modes[0].vdisplay > 768); mode = &std_1024_mode; break; } } igt_require(connector_id); crtc_id = drm_res->crtcs[0]; buffer_id = create_fb(drm_fd, mode->hdisplay, mode->vdisplay); igt_assert(crtc_id); igt_assert(buffer_id); igt_assert(connector_id); igt_assert(mode); rc = drmModeSetCrtc(drm_fd, crtc_id, buffer_id, 0, 0, &connector_id, 1, mode); igt_assert_eq(rc, 0); if (use_panel_fitter) { if (IS_HASWELL(devid)) igt_assert(!lpsp_is_enabled(drm_fd)); else igt_assert(lpsp_is_enabled(drm_fd)); } else { igt_assert(lpsp_is_enabled(drm_fd)); } } static void non_edp_subtest(int drm_fd, drmModeResPtr drm_res, drmModeConnectorPtr *drm_connectors) { int i, rc; uint32_t connector_id = 0, crtc_id = 0, buffer_id = 0; drmModeModeInfoPtr mode = NULL; kmstest_unset_all_crtcs(drm_fd, drm_res); for (i = 0; i < drm_res->count_connectors; i++) { drmModeConnectorPtr c = drm_connectors[i]; if (c->connector_type == DRM_MODE_CONNECTOR_eDP) continue; if (c->connection != DRM_MODE_CONNECTED) continue; if (c->count_modes) { connector_id = c->connector_id; mode = &c->modes[0]; break; } } igt_require(connector_id); crtc_id = drm_res->crtcs[0]; buffer_id = create_fb(drm_fd, mode->hdisplay, mode->vdisplay); igt_assert(crtc_id); igt_assert(buffer_id); igt_assert(connector_id); igt_assert(mode); rc = drmModeSetCrtc(drm_fd, crtc_id, buffer_id, 0, 0, &connector_id, 1, mode); igt_assert_eq(rc, 0); igt_assert(!lpsp_is_enabled(drm_fd)); } #define MAX_CONNECTORS 32 int drm_fd; uint32_t devid; drmModeResPtr drm_res; drmModeConnectorPtr drm_connectors[MAX_CONNECTORS]; igt_main { igt_fixture { int i; drm_fd = drm_open_driver_master(DRIVER_INTEL); igt_require(drm_fd >= 0); devid = intel_get_drm_devid(drm_fd); drm_res = drmModeGetResources(drm_fd); igt_assert(drm_res->count_connectors <= MAX_CONNECTORS); for (i = 0; i < drm_res->count_connectors; i++) drm_connectors[i] = drmModeGetConnectorCurrent(drm_fd, drm_res->connectors[i]); igt_pm_enable_audio_runtime_pm(); igt_require(supports_lpsp(devid)); intel_register_access_init(intel_get_pci_device(), 0); kmstest_set_vt_graphics_mode(); } igt_subtest("screens-disabled") screens_disabled_subtest(drm_fd, drm_res); igt_subtest("edp-native") edp_subtest(drm_fd, drm_res, drm_connectors, devid, false); igt_subtest("edp-panel-fitter") edp_subtest(drm_fd, drm_res, drm_connectors, devid, true); igt_subtest("non-edp") non_edp_subtest(drm_fd, drm_res, drm_connectors); igt_fixture { int i; intel_register_access_fini(); for (i = 0; i < drm_res->count_connectors; i++) drmModeFreeConnector(drm_connectors[i]); drmModeFreeResources(drm_res); close(drm_fd); } } intel-gpu-tools-1.14/tests/gem_exec_reloc.c0000644000175000017500000001533412665336131015704 00000000000000/* * Copyright © 2016 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ #include "igt.h" IGT_TEST_DESCRIPTION("Basic sanity check of execbuf-ioctl relocations."); static uint32_t find_last_set(uint64_t x) { uint32_t i = 0; while (x) { x >>= 1; i++; } return i; } static void write_dword(int fd, uint32_t target_handle, uint64_t target_offset, uint32_t value) { int gen = intel_gen(intel_get_drm_devid(fd)); struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 obj[2]; struct drm_i915_gem_relocation_entry reloc; uint32_t buf[16]; int i; memset(obj, 0, sizeof(obj)); obj[0].handle = target_handle; obj[1].handle = gem_create(fd, 4096); i = 0; buf[i++] = MI_STORE_DWORD_IMM | (gen < 6 ? 1<<22 : 0); if (gen >= 8) { buf[i++] = target_offset; buf[i++] = target_offset >> 32; } else if (gen >= 4) { buf[i++] = 0; buf[i++] = target_offset; } else { buf[i-1]--; buf[i++] = target_offset; } buf[i++] = value; buf[i++] = MI_BATCH_BUFFER_END; gem_write(fd, obj[1].handle, 0, buf, sizeof(buf)); memset(&reloc, 0, sizeof(reloc)); if (gen >= 8 || gen < 4) reloc.offset = sizeof(uint32_t); else reloc.offset = 2*sizeof(uint32_t); reloc.target_handle = target_handle; reloc.delta = target_offset; reloc.read_domains = I915_GEM_DOMAIN_INSTRUCTION; reloc.write_domain = I915_GEM_DOMAIN_INSTRUCTION; obj[1].relocation_count = 1; obj[1].relocs_ptr = (uintptr_t)&reloc; memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)obj; execbuf.buffer_count = 2; execbuf.flags = I915_EXEC_SECURE; gem_execbuf(fd, &execbuf); gem_close(fd, obj[1].handle); } enum mode { MEM, CPU, WC, GTT }; static void from_mmap(int fd, uint64_t size, enum mode mode) { uint32_t bbe = MI_BATCH_BUFFER_END; struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 obj; struct drm_i915_gem_relocation_entry *relocs; uint32_t reloc_handle; uint64_t value; uint64_t max, i; int retry = 2; intel_require_memory(1, size, CHECK_RAM); memset(&obj, 0, sizeof(obj)); obj.handle = gem_create(fd, 4096); gem_write(fd, obj.handle, 0, &bbe, sizeof(bbe)); max = size / sizeof(*relocs); switch (mode) { case MEM: relocs = mmap(0, size, PROT_WRITE, MAP_PRIVATE | MAP_ANON, -1, 0); igt_assert(relocs != (void *)-1); break; case GTT: reloc_handle = gem_create(fd, size); relocs = gem_mmap__gtt(fd, reloc_handle, size, PROT_WRITE); gem_set_domain(fd, reloc_handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); gem_close(fd, reloc_handle); break; case CPU: reloc_handle = gem_create(fd, size); relocs = gem_mmap__cpu(fd, reloc_handle, 0, size, PROT_WRITE); gem_set_domain(fd, reloc_handle, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU); gem_close(fd, reloc_handle); break; case WC: reloc_handle = gem_create(fd, size); relocs = gem_mmap__wc(fd, reloc_handle, 0, size, PROT_WRITE); gem_set_domain(fd, reloc_handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); gem_close(fd, reloc_handle); break; } for (i = 0; i < max; i++) { relocs[i].target_handle = obj.handle; relocs[i].presumed_offset = ~0ull; relocs[i].offset = 1024; relocs[i].delta = i; relocs[i].read_domains = I915_GEM_DOMAIN_INSTRUCTION; relocs[i].write_domain = 0; } obj.relocation_count = max; obj.relocs_ptr = (uintptr_t)relocs; memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)&obj; execbuf.buffer_count = 1; while (relocs[0].presumed_offset == ~0ull && retry--) gem_execbuf(fd, &execbuf); gem_read(fd, obj.handle, 1024, &value, sizeof(value)); gem_close(fd, obj.handle); igt_assert_eq_u64(value, obj.offset + max - 1); if (relocs[0].presumed_offset != ~0ull) { for (i = 0; i < max; i++) igt_assert_eq_u64(relocs[i].presumed_offset, obj.offset); } munmap(relocs, size); } static void from_gpu(int fd) { uint32_t bbe = MI_BATCH_BUFFER_END; struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 obj; struct drm_i915_gem_relocation_entry *relocs; uint32_t reloc_handle; uint64_t value; memset(&obj, 0, sizeof(obj)); obj.handle = gem_create(fd, 4096); gem_write(fd, obj.handle, 0, &bbe, sizeof(bbe)); reloc_handle = gem_create(fd, 4096); write_dword(fd, reloc_handle, offsetof(struct drm_i915_gem_relocation_entry, target_handle), obj.handle); write_dword(fd, reloc_handle, offsetof(struct drm_i915_gem_relocation_entry, offset), 1024); write_dword(fd, reloc_handle, offsetof(struct drm_i915_gem_relocation_entry, read_domains), I915_GEM_DOMAIN_INSTRUCTION); relocs = gem_mmap__cpu(fd, reloc_handle, 0, 4096, PROT_READ); gem_set_domain(fd, reloc_handle, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU); gem_close(fd, reloc_handle); obj.relocation_count = 1; obj.relocs_ptr = (uintptr_t)relocs; memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)&obj; execbuf.buffer_count = 1; gem_execbuf(fd, &execbuf); gem_read(fd, obj.handle, 1024, &value, sizeof(value)); gem_close(fd, obj.handle); igt_assert_eq_u64(value, obj.offset); igt_assert_eq_u64(relocs->presumed_offset, obj.offset); munmap(relocs, 4096); } igt_main { uint64_t size; int fd = -1; igt_fixture fd = drm_open_driver_master(DRIVER_INTEL); for (size = 4096; size <= 4ull*1024*1024*1024; size <<= 1) { igt_subtest_f("mmap-%u", find_last_set(size) - 1) from_mmap(fd, size, MEM); igt_subtest_f("cpu-%u", find_last_set(size) - 1) from_mmap(fd, size, CPU); igt_subtest_f("wc-%u", find_last_set(size) - 1) from_mmap(fd, size, WC); igt_subtest_f("gtt-%u", find_last_set(size) - 1) from_mmap(fd, size, GTT); } igt_subtest("gpu") from_gpu(fd); igt_fixture close(fd); } intel-gpu-tools-1.14/tests/pm_rc6_residency.c0000644000175000017500000001367612665336131016206 00000000000000/* * Copyright © 2012 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Ben Widawsky * */ #define _GNU_SOURCE #include "igt.h" #include #include #include #include #include #include #define SLEEP_DURATION 3 /* in seconds */ #define RC6_ENABLED 1 #define RC6P_ENABLED 2 #define RC6PP_ENABLED 4 struct residencies { int rc6; int media_rc6; int rc6p; int rc6pp; int duration; }; static unsigned int readit(const char *path) { unsigned int ret; int scanned; FILE *file; file = fopen(path, "r"); igt_assert(file); scanned = fscanf(file, "%u", &ret); igt_assert_eq(scanned, 1); fclose(file); return ret; } static unsigned long get_rc6_enabled_mask(void) { unsigned long rc6_mask; char *path; int ret; ret = asprintf(&path, "/sys/class/drm/card%d/power/rc6_enable", drm_get_card()); igt_assert_neq(ret, -1); rc6_mask = readit(path); free(path); return rc6_mask; } static int read_rc6_residency(const char *name_of_rc6_residency) { unsigned int residency; const int device = drm_get_card(); char *path ; int ret; ret = asprintf(&path, "/sys/class/drm/card%d/power/%s_residency_ms", device, name_of_rc6_residency); igt_assert_neq(ret, -1); residency = readit(path); free(path); return residency; } static void residency_accuracy(unsigned int diff, unsigned int duration, const char *name_of_rc6_residency) { double ratio; ratio = (double)diff / duration; igt_info("Residency in %s or deeper state: %u ms (sleep duration %u ms) (ratio to expected duration: %.02f)\n", name_of_rc6_residency, diff, duration, ratio); igt_assert_f(ratio > 0.9 && ratio <= 1, "Sysfs RC6 residency counter is inaccurate.\n"); } static void read_residencies(int devid, unsigned int rc6_mask, struct residencies *res) { if (rc6_mask & RC6_ENABLED) res->rc6 = read_rc6_residency("rc6"); if ((rc6_mask & RC6_ENABLED) && (IS_VALLEYVIEW(devid) || IS_CHERRYVIEW(devid))) res->media_rc6 = read_rc6_residency("media_rc6"); if (rc6_mask & RC6P_ENABLED) res->rc6p = read_rc6_residency("rc6p"); if (rc6_mask & RC6PP_ENABLED) res->rc6pp = read_rc6_residency("rc6pp"); } static unsigned long gettime_ms(void) { struct timespec ts; clock_gettime(CLOCK_MONOTONIC, &ts); return ts.tv_sec * 1000 + ts.tv_nsec / 1000000; } static void measure_residencies(int devid, unsigned int rc6_mask, struct residencies *res) { struct residencies start = { }; struct residencies end = { }; int retry; unsigned long t; if (!rc6_mask) return; /* * For some reason my ivb isn't idle even after syncing up with the gpu. * Let's add a sleep just to make it happy. */ sleep(8); /* * Retry in case of counter wrap-around. We simply re-run the * measurement, since the valid counter range is different on * different platforms and so fixing it up would be non-trivial. */ for (retry = 0; retry < 2; retry++) { t = gettime_ms(); read_residencies(devid, rc6_mask, &start); sleep(SLEEP_DURATION); read_residencies(devid, rc6_mask, &end); t = gettime_ms() - t; if (end.rc6 >= start.rc6 && end.media_rc6 >= start.media_rc6 && end.rc6p >= start.rc6p && end.rc6pp >= start.rc6pp) break; } igt_assert_f(retry < 2, "residency values are not consistent\n"); res->rc6 = end.rc6 - start.rc6; res->rc6p = end.rc6p - start.rc6p; res->rc6pp = end.rc6pp - start.rc6pp; res->media_rc6 = end.media_rc6 - start.media_rc6; res->duration = t; /* * For the purposes of this test case we want a given residency value * to include the time spent in the corresponding RC state _and_ also * the time spent in any enabled deeper states. So for example if any * of RC6P or RC6PP is enabled we want the time spent in these states * to be also included in the RC6 residency value. The kernel reported * residency values are exclusive, so add up things here. */ res->rc6p += res->rc6pp; res->rc6 += res->rc6p; } igt_main { unsigned int rc6_mask; int fd; int devid = 0; struct residencies res; igt_skip_on_simulation(); /* Use drm_open_driver to verify device existence */ igt_fixture { fd = drm_open_driver(DRIVER_INTEL); devid = intel_get_drm_devid(fd); close(fd); rc6_mask = get_rc6_enabled_mask(); measure_residencies(devid, rc6_mask, &res); } igt_subtest("rc6-accuracy") { igt_skip_on(!(rc6_mask & RC6_ENABLED)); residency_accuracy(res.rc6, res.duration, "rc6"); } igt_subtest("media-rc6-accuracy") { igt_skip_on(!((rc6_mask & RC6_ENABLED) && (IS_VALLEYVIEW(devid) || IS_CHERRYVIEW(devid)))); residency_accuracy(res.media_rc6, res.duration, "media_rc6"); } igt_subtest("rc6p-accuracy") { igt_skip_on(!(rc6_mask & RC6P_ENABLED)); residency_accuracy(res.rc6p, res.duration, "rc6p"); } igt_subtest("rc6pp-accuracy") { igt_skip_on(!(rc6_mask & RC6PP_ENABLED)); residency_accuracy(res.rc6pp, res.duration, "rc6pp"); } } intel-gpu-tools-1.14/tests/gem_exec_parse.c0000644000175000017500000002737012665336131015715 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include "igt.h" #include #include #include #include #include #ifndef I915_PARAM_CMD_PARSER_VERSION #define I915_PARAM_CMD_PARSER_VERSION 28 #endif static void exec_batch_patched(int fd, uint32_t cmd_bo, uint32_t *cmds, int size, int patch_offset, uint64_t expected_value) { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 objs[2]; struct drm_i915_gem_relocation_entry reloc[1]; uint32_t target_bo = gem_create(fd, 4096); uint64_t actual_value = 0; gem_write(fd, cmd_bo, 0, cmds, size); reloc[0].offset = patch_offset; reloc[0].delta = 0; reloc[0].target_handle = target_bo; reloc[0].read_domains = I915_GEM_DOMAIN_RENDER; reloc[0].write_domain = I915_GEM_DOMAIN_RENDER; reloc[0].presumed_offset = 0; objs[0].handle = target_bo; objs[0].relocation_count = 0; objs[0].relocs_ptr = 0; objs[0].alignment = 0; objs[0].offset = 0; objs[0].flags = 0; objs[0].rsvd1 = 0; objs[0].rsvd2 = 0; objs[1].handle = cmd_bo; objs[1].relocation_count = 1; objs[1].relocs_ptr = (uintptr_t)reloc; objs[1].alignment = 0; objs[1].offset = 0; objs[1].flags = 0; objs[1].rsvd1 = 0; objs[1].rsvd2 = 0; execbuf.buffers_ptr = (uintptr_t)objs; execbuf.buffer_count = 2; execbuf.batch_start_offset = 0; execbuf.batch_len = size; execbuf.cliprects_ptr = 0; execbuf.num_cliprects = 0; execbuf.DR1 = 0; execbuf.DR4 = 0; execbuf.flags = I915_EXEC_RENDER; i915_execbuffer2_set_context_id(execbuf, 0); execbuf.rsvd2 = 0; gem_execbuf(fd, &execbuf); gem_sync(fd, cmd_bo); gem_read(fd,target_bo, 0, &actual_value, sizeof(actual_value)); igt_assert_eq(expected_value, actual_value); gem_close(fd, target_bo); } static int __exec_batch(int fd, uint32_t cmd_bo, uint32_t *cmds, int size, int ring) { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 objs[1]; gem_write(fd, cmd_bo, 0, cmds, size); objs[0].handle = cmd_bo; objs[0].relocation_count = 0; objs[0].relocs_ptr = 0; objs[0].alignment = 0; objs[0].offset = 0; objs[0].flags = 0; objs[0].rsvd1 = 0; objs[0].rsvd2 = 0; execbuf.buffers_ptr = (uintptr_t)objs; execbuf.buffer_count = 1; execbuf.batch_start_offset = 0; execbuf.batch_len = size; execbuf.cliprects_ptr = 0; execbuf.num_cliprects = 0; execbuf.DR1 = 0; execbuf.DR4 = 0; execbuf.flags = ring; i915_execbuffer2_set_context_id(execbuf, 0); execbuf.rsvd2 = 0; return __gem_execbuf(fd, &execbuf); } #define exec_batch(fd, bo, cmds, sz, ring, expected) \ igt_assert_eq(__exec_batch(fd, bo, cmds, sz, ring), expected) static void exec_split_batch(int fd, uint32_t *cmds, int size, int ring, int expected_ret) { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 objs[1]; uint32_t cmd_bo; uint32_t noop[1024] = { 0 }; const int alloc_size = 4096 * 2; const int actual_start_offset = 4096-sizeof(uint32_t); /* Allocate and fill a 2-page batch with noops */ cmd_bo = gem_create(fd, alloc_size); gem_write(fd, cmd_bo, 0, noop, sizeof(noop)); gem_write(fd, cmd_bo, 4096, noop, sizeof(noop)); /* Write the provided commands such that the first dword * of the command buffer is the last dword of the first * page (i.e. the command is split across the two pages). */ gem_write(fd, cmd_bo, actual_start_offset, cmds, size); objs[0].handle = cmd_bo; objs[0].relocation_count = 0; objs[0].relocs_ptr = 0; objs[0].alignment = 0; objs[0].offset = 0; objs[0].flags = 0; objs[0].rsvd1 = 0; objs[0].rsvd2 = 0; execbuf.buffers_ptr = (uintptr_t)objs; execbuf.buffer_count = 1; /* NB: We want batch_start_offset and batch_len to point to the block * of the actual commands (i.e. at the last dword of the first page), * but have to adjust both the start offset and length to meet the * kernel driver's requirements on the alignment of those fields. */ execbuf.batch_start_offset = actual_start_offset & ~0x7; execbuf.batch_len = ALIGN(size + actual_start_offset - execbuf.batch_start_offset, 0x8); execbuf.cliprects_ptr = 0; execbuf.num_cliprects = 0; execbuf.DR1 = 0; execbuf.DR4 = 0; execbuf.flags = ring; i915_execbuffer2_set_context_id(execbuf, 0); execbuf.rsvd2 = 0; igt_assert_eq(__gem_execbuf(fd, &execbuf), expected_ret); gem_sync(fd, cmd_bo); gem_close(fd, cmd_bo); } static void exec_batch_chained(int fd, uint32_t cmd_bo, uint32_t *cmds, int size, int patch_offset, uint64_t expected_value) { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 objs[3]; struct drm_i915_gem_relocation_entry reloc; struct drm_i915_gem_relocation_entry first_level_reloc; uint32_t target_bo = gem_create(fd, 4096); uint32_t first_level_bo = gem_create(fd, 4096); uint64_t actual_value = 0; static uint32_t first_level_cmds[] = { MI_BATCH_BUFFER_START | MI_BATCH_NON_SECURE_I965, 0, MI_BATCH_BUFFER_END, 0, }; if (IS_HASWELL(intel_get_drm_devid(fd))) first_level_cmds[0] |= MI_BATCH_NON_SECURE_HSW; gem_write(fd, first_level_bo, 0, first_level_cmds, sizeof(first_level_cmds)); gem_write(fd, cmd_bo, 0, cmds, size); reloc.offset = patch_offset; reloc.delta = 0; reloc.target_handle = target_bo; reloc.read_domains = I915_GEM_DOMAIN_RENDER; reloc.write_domain = I915_GEM_DOMAIN_RENDER; reloc.presumed_offset = 0; first_level_reloc.offset = 4; first_level_reloc.delta = 0; first_level_reloc.target_handle = cmd_bo; first_level_reloc.read_domains = I915_GEM_DOMAIN_INSTRUCTION; first_level_reloc.write_domain = 0; first_level_reloc.presumed_offset = 0; objs[0].handle = target_bo; objs[0].relocation_count = 0; objs[0].relocs_ptr = 0; objs[0].alignment = 0; objs[0].offset = 0; objs[0].flags = 0; objs[0].rsvd1 = 0; objs[0].rsvd2 = 0; objs[1].handle = cmd_bo; objs[1].relocation_count = 1; objs[1].relocs_ptr = (uintptr_t)&reloc; objs[1].alignment = 0; objs[1].offset = 0; objs[1].flags = 0; objs[1].rsvd1 = 0; objs[1].rsvd2 = 0; objs[2].handle = first_level_bo; objs[2].relocation_count = 1; objs[2].relocs_ptr = (uintptr_t)&first_level_reloc; objs[2].alignment = 0; objs[2].offset = 0; objs[2].flags = 0; objs[2].rsvd1 = 0; objs[2].rsvd2 = 0; execbuf.buffers_ptr = (uintptr_t)objs; execbuf.buffer_count = 3; execbuf.batch_start_offset = 0; execbuf.batch_len = sizeof(first_level_cmds); execbuf.cliprects_ptr = 0; execbuf.num_cliprects = 0; execbuf.DR1 = 0; execbuf.DR4 = 0; execbuf.flags = I915_EXEC_RENDER; i915_execbuffer2_set_context_id(execbuf, 0); execbuf.rsvd2 = 0; gem_execbuf(fd, &execbuf); gem_sync(fd, cmd_bo); gem_read(fd,target_bo, 0, &actual_value, sizeof(actual_value)); igt_assert_eq(expected_value, actual_value); gem_close(fd, first_level_bo); gem_close(fd, target_bo); } uint32_t handle; int fd; #define MI_ARB_ON_OFF (0x8 << 23) #define MI_DISPLAY_FLIP ((0x14 << 23) | 1) #define GFX_OP_PIPE_CONTROL ((0x3<<29)|(0x3<<27)|(0x2<<24)|2) #define PIPE_CONTROL_QW_WRITE (1<<14) #define PIPE_CONTROL_LRI_POST_OP (1<<23) #define OACONTROL 0x2360 igt_main { igt_fixture { int parser_version = 0; drm_i915_getparam_t gp; int rc; fd = drm_open_driver(DRIVER_INTEL); gp.param = I915_PARAM_CMD_PARSER_VERSION; gp.value = &parser_version; rc = drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp); igt_require(!rc && parser_version > 0); igt_require(gem_uses_ppgtt(fd)); handle = gem_create(fd, 4096); /* ATM cmd parser only exists on gen7. */ igt_require(intel_gen(intel_get_drm_devid(fd)) == 7); } igt_subtest("basic-allowed") { uint32_t pc[] = { GFX_OP_PIPE_CONTROL, PIPE_CONTROL_QW_WRITE, 0, /* To be patched */ 0x12000000, 0, MI_BATCH_BUFFER_END, }; exec_batch_patched(fd, handle, pc, sizeof(pc), 8, /* patch offset, */ 0x12000000); } igt_subtest("basic-rejected") { uint32_t arb_on_off[] = { MI_ARB_ON_OFF, MI_BATCH_BUFFER_END, }; uint32_t display_flip[] = { MI_DISPLAY_FLIP, 0, 0, 0, MI_BATCH_BUFFER_END, 0 }; exec_batch(fd, handle, arb_on_off, sizeof(arb_on_off), I915_EXEC_RENDER, -EINVAL); exec_batch(fd, handle, arb_on_off, sizeof(arb_on_off), I915_EXEC_BSD, -EINVAL); if (gem_has_vebox(fd)) { exec_batch(fd, handle, arb_on_off, sizeof(arb_on_off), I915_EXEC_VEBOX, -EINVAL); } exec_batch(fd, handle, display_flip, sizeof(display_flip), I915_EXEC_BLT, -EINVAL); } igt_subtest("registers") { uint32_t lri_bad[] = { MI_LOAD_REGISTER_IMM, 0, /* disallowed register address */ 0x12000000, MI_BATCH_BUFFER_END, }; uint32_t lri_ok[] = { MI_LOAD_REGISTER_IMM, 0x5280, /* allowed register address (SO_WRITE_OFFSET[0]) */ 0x1, MI_BATCH_BUFFER_END, }; exec_batch(fd, handle, lri_bad, sizeof(lri_bad), I915_EXEC_RENDER, -EINVAL); exec_batch(fd, handle, lri_ok, sizeof(lri_ok), I915_EXEC_RENDER, 0); } igt_subtest("bitmasks") { uint32_t pc[] = { GFX_OP_PIPE_CONTROL, (PIPE_CONTROL_QW_WRITE | PIPE_CONTROL_LRI_POST_OP), 0, /* To be patched */ 0x12000000, 0, MI_BATCH_BUFFER_END, }; exec_batch(fd, handle, pc, sizeof(pc), I915_EXEC_RENDER, -EINVAL); } igt_subtest("batch-without-end") { uint32_t noop[1024] = { 0 }; exec_batch(fd, handle, noop, sizeof(noop), I915_EXEC_RENDER, -EINVAL); } igt_subtest("cmd-crossing-page") { uint32_t lri_ok[] = { MI_LOAD_REGISTER_IMM, 0x5280, /* allowed register address (SO_WRITE_OFFSET[0]) */ 0x1, MI_BATCH_BUFFER_END, }; exec_split_batch(fd, lri_ok, sizeof(lri_ok), I915_EXEC_RENDER, 0); } igt_subtest("oacontrol-tracking") { uint32_t lri_ok[] = { MI_LOAD_REGISTER_IMM, OACONTROL, 0x31337000, MI_LOAD_REGISTER_IMM, OACONTROL, 0x0, MI_BATCH_BUFFER_END, 0 }; uint32_t lri_bad[] = { MI_LOAD_REGISTER_IMM, OACONTROL, 0x31337000, MI_BATCH_BUFFER_END, }; uint32_t lri_extra_bad[] = { MI_LOAD_REGISTER_IMM, OACONTROL, 0x31337000, MI_LOAD_REGISTER_IMM, OACONTROL, 0x0, MI_LOAD_REGISTER_IMM, OACONTROL, 0x31337000, MI_BATCH_BUFFER_END, }; exec_batch(fd, handle, lri_ok, sizeof(lri_ok), I915_EXEC_RENDER, 0); exec_batch(fd, handle, lri_bad, sizeof(lri_bad), I915_EXEC_RENDER, -EINVAL); exec_batch(fd, handle, lri_extra_bad, sizeof(lri_extra_bad), I915_EXEC_RENDER, -EINVAL); } igt_subtest("chained-batch") { uint32_t pc[] = { GFX_OP_PIPE_CONTROL, PIPE_CONTROL_QW_WRITE, 0, /* To be patched */ 0x12000000, 0, MI_BATCH_BUFFER_END, }; exec_batch_chained(fd, handle, pc, sizeof(pc), 8, /* patch offset, */ 0x12000000); } igt_fixture { gem_close(fd, handle); close(fd); } } intel-gpu-tools-1.14/tests/gem_bad_address.c0000644000175000017500000000422012665336131016017 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * Jesse Barnes (based on gem_bad_blit.c) * */ #include "igt.h" #include #include #include #include #include #include #include #include #include "drm.h" #include "intel_bufmgr.h" static drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; #define BAD_GTT_DEST ((512*1024*1024)) /* past end of aperture */ static void bad_store(void) { BEGIN_BATCH(4, 0); OUT_BATCH(MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL | 1 << 21); OUT_BATCH(0); OUT_BATCH(BAD_GTT_DEST); OUT_BATCH(0xdeadbeef); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); } igt_simple_main { int fd; fd = drm_open_driver(DRIVER_INTEL); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); drm_intel_bufmgr_gem_enable_reuse(bufmgr); batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd)); bad_store(); intel_batchbuffer_free(batch); drm_intel_bufmgr_destroy(bufmgr); close(fd); } intel-gpu-tools-1.14/tests/ddx_intel_after_fbdev0000755000175000017500000000300512665336131017017 00000000000000#!/bin/bash # # Testcase: Load Intel DDX after fbdev was loaded # whoami | grep -q root || { echo "ERROR: not running as root" exit 1 } # no other X session should be running find /tmp/ -name .X*lock 2>/dev/null | grep -q X && { echo "ERROR: X session already running" exit 1 } TMPDIR=$(mktemp -d /tmp/igt.XXXX) || { echo "ERROR: Failed to create temp dir" exit 1 } cat > $TMPDIR/xorg.conf.fbdev << EOF Section "Device" Driver "fbdev" Identifier "Device[fbdev]" EndSection EOF cat > $TMPDIR/xorg.conf.intel << EOF Section "Device" Driver "intel" Identifier "Device[intel]" EndSection EOF # log before fbdev dmesg -c > $TMPDIR/dmesg.1.before.fbdev cp /var/log/Xorg.0.log $TMPDIR/Xorg.0.log.1.before.fbdev # run fbdev xinit -- /usr/bin/X -config $TMPDIR/xorg.conf.fbdev & sleep 5 if [ -f `which intel_reg` ]; then `which intel_reg` dump > $TMPDIR/intel_reg_dump.1.fbdev fi killall X # log after fbdev & before intel dmesg -c > $TMPDIR/dmesg.2.after.fbdev.before.intel cp /var/log/Xorg.0.log $TMPDIR/Xorg.0.log.2.after.fbdev.before.intel sleep 5 # run intel xinit -- /usr/bin/X -config $TMPDIR/xorg.conf.intel & sleep 5 if [ -f `which intel_reg` ]; then `which intel_reg` dump > $TMPDIR/intel_reg_dump.2.intel fi killall X # log after intel dmesg -c > $TMPDIR/dmesg.3.after.intel cp /var/log/Xorg.0.log $TMPDIR/Xorg.0.log.3.after.intel cp $0 $TMPDIR/ tar czf $TMPDIR.tar.gz $TMPDIR/* if [ -f $TMPDIR.tar.gz ]; then echo $TMPDIR.tar.gz contains this script, all configs and logs generated on this tests fi exit 0 intel-gpu-tools-1.14/tests/gem_fenced_exec_thrash.c0000644000175000017500000001414012665336131017367 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ #define _GNU_SOURCE #include "igt.h" #include #include #include #include #include #include #include #include IGT_TEST_DESCRIPTION("Test execbuf fence accounting."); #define WIDTH 1024 #define HEIGHT 1024 #define OBJECT_SIZE (4*WIDTH*HEIGHT) #define BATCH_SIZE 4096 #define MAX_FENCES 32 /* * Testcase: execbuf fence accounting * * We had a bug where we were falsely accounting upon reservation already * fenced buffers as occupying a fence register even if they did not require * one for the batch. * * We aim to exercise this by performing a sequence of fenced BLT * with 2*num_avail_fence buffers, but alternating which half are fenced in * each command. */ static drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; uint32_t devid; static void emit_dummy_load(void) { int i; uint32_t tile_flags = 0; uint32_t tiling_mode = I915_TILING_X; unsigned long pitch; drm_intel_bo *dummy_bo; dummy_bo = drm_intel_bo_alloc_tiled(bufmgr, "tiled dummy_bo", 2048, 2048, 4, &tiling_mode, &pitch, 0); if (IS_965(devid)) { pitch /= 4; tile_flags = XY_SRC_COPY_BLT_SRC_TILED | XY_SRC_COPY_BLT_DST_TILED; } for (i = 0; i < 5; i++) { BLIT_COPY_BATCH_START(tile_flags); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ pitch); OUT_BATCH(0 << 16 | 1024); OUT_BATCH((2048) << 16 | (2048)); OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(0 << 16 | 0); OUT_BATCH(pitch); OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, 0, 0); ADVANCE_BATCH(); if (batch->gen >= 6) { BEGIN_BATCH(3, 0); OUT_BATCH(XY_SETUP_CLIP_BLT_CMD); OUT_BATCH(0); OUT_BATCH(0); ADVANCE_BATCH(); } } intel_batchbuffer_flush(batch); drm_intel_bo_unreference(dummy_bo); } static uint32_t tiled_bo_create (int fd) { uint32_t handle; handle = gem_create(fd, OBJECT_SIZE); gem_set_tiling(fd, handle, I915_TILING_X, WIDTH*4); return handle; } static uint32_t batch_create (int fd) { uint32_t buf[] = { MI_BATCH_BUFFER_END, 0 }; uint32_t batch_handle; batch_handle = gem_create(fd, BATCH_SIZE); gem_write(fd, batch_handle, 0, buf, sizeof(buf)); return batch_handle; } static void fill_reloc(struct drm_i915_gem_relocation_entry *reloc, uint32_t handle) { reloc->offset = 2 * sizeof(uint32_t); reloc->target_handle = handle; reloc->read_domains = I915_GEM_DOMAIN_RENDER; reloc->write_domain = 0; } #define BUSY_LOAD (1 << 0) #define INTERRUPTIBLE (1 << 1) static void run_test(int fd, int num_fences, int expected_errno, unsigned flags) { struct drm_i915_gem_execbuffer2 execbuf[2]; struct drm_i915_gem_exec_object2 exec[2][2*MAX_FENCES+3]; struct drm_i915_gem_relocation_entry reloc[2*MAX_FENCES+2]; int i, n; int loop = 1000; if (flags & BUSY_LOAD) { bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); batch = intel_batchbuffer_alloc(bufmgr, devid); /* Takes forever otherwise. */ loop = 50; } if (flags & INTERRUPTIBLE) igt_fork_signal_helper(); memset(execbuf, 0, sizeof(execbuf)); memset(exec, 0, sizeof(exec)); memset(reloc, 0, sizeof(reloc)); for (n = 0; n < 2*num_fences; n++) { uint32_t handle = tiled_bo_create(fd); exec[1][2*num_fences - n-1].handle = exec[0][n].handle = handle; fill_reloc(&reloc[n], handle); } for (i = 0; i < 2; i++) { for (n = 0; n < num_fences; n++) exec[i][n].flags = EXEC_OBJECT_NEEDS_FENCE; exec[i][2*num_fences].handle = batch_create(fd); exec[i][2*num_fences].relocs_ptr = (uintptr_t)reloc; exec[i][2*num_fences].relocation_count = 2*num_fences; execbuf[i].buffers_ptr = (uintptr_t)exec[i]; execbuf[i].buffer_count = 2*num_fences+1; execbuf[i].batch_len = 2*sizeof(uint32_t); } do { if (flags & BUSY_LOAD) emit_dummy_load(); igt_assert_eq(__gem_execbuf(fd, &execbuf[0]), -expected_errno); igt_assert_eq(__gem_execbuf(fd, &execbuf[1]), -expected_errno); } while (--loop); if (flags & INTERRUPTIBLE) igt_stop_signal_helper(); /* Cleanup */ for (n = 0; n < 2*num_fences; n++) gem_close(fd, exec[0][n].handle); for (i = 0; i < 2; i++) gem_close(fd, exec[i][2*num_fences].handle); if (flags & BUSY_LOAD) { intel_batchbuffer_free(batch); drm_intel_bufmgr_destroy(bufmgr); } } int fd; int num_fences; igt_main { igt_skip_on_simulation(); igt_fixture { fd = drm_open_driver(DRIVER_INTEL); num_fences = gem_available_fences(fd); igt_assert(num_fences > 4); devid = intel_get_drm_devid(fd); igt_assert(num_fences <= MAX_FENCES); } igt_subtest("2-spare-fences") run_test(fd, num_fences - 2, 0, 0); for (unsigned flags = 0; flags < 4; flags++) { igt_subtest_f("no-spare-fences%s%s", flags & BUSY_LOAD ? "-busy" : "", flags & INTERRUPTIBLE ? "-interruptible" : "") run_test(fd, num_fences, 0, flags); } igt_subtest("too-many-fences") run_test(fd, num_fences + 1, intel_gen(devid) >= 4 ? 0 : EDEADLK, 0); igt_fixture close(fd); } intel-gpu-tools-1.14/tests/core_get_client_auth.c0000644000175000017500000000534212665336131017110 00000000000000/* * Copyright © 2012,2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * * Based upon code from libva/va/drm/va_drm_auth.c: */ /* * Testcase: Check that the hollowed-out get_client ioctl still works for libva * * Oh dear, libva, why do you do such funny things? */ #define _GNU_SOURCE #include "igt.h" #include #include #include #include #ifdef __linux__ # include #else # include #endif #include "drm.h" /* Checks whether the thread id is the current thread */ static bool is_local_tid(pid_t tid) { #ifndef __linux__ return pthread_self() == tid; #elif !defined(ANDROID) /* On Linux systems, drmGetClient() would return the thread ID instead of the actual process ID */ return syscall(SYS_gettid) == tid; #else return gettid() == tid; #endif } static bool check_auth(int fd) { pid_t client_pid; int i, auth, pid, uid; unsigned long magic, iocs; bool is_authenticated = false; client_pid = getpid(); for (i = 0; !is_authenticated; i++) { if (drmGetClient(fd, i, &auth, &pid, &uid, &magic, &iocs) != 0) break; is_authenticated = auth && (pid == client_pid || is_local_tid(pid)); } return is_authenticated; } igt_main { /* root (which we run igt as) should always be authenticated */ igt_subtest("simple") { int fd = drm_open_driver(DRIVER_ANY); igt_assert(check_auth(fd) == true); close(fd); } igt_subtest("master-drop") { int fd = drm_open_driver(DRIVER_ANY); int fd2 = drm_open_driver(DRIVER_ANY); igt_assert(check_auth(fd2) == true); close(fd); igt_assert(check_auth(fd2) == true); close(fd2); } } intel-gpu-tools-1.14/tests/kms_fbcon_fbt.c0000644000175000017500000001457012665336131015541 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: Paulo Zanoni * */ #include "igt.h" #include #include #include IGT_TEST_DESCRIPTION("Test the relationship between fbcon and the frontbuffer " "tracking infrastructure."); #define MAX_CONNECTORS 32 static bool do_wait_user = false; struct drm_info { int fd; drmModeResPtr res; drmModeConnectorPtr connectors[MAX_CONNECTORS]; }; static void wait_user(const char *msg) { if (!do_wait_user) return; igt_info("%s Press enter...\n", msg); while (getchar() != '\n') ; } static void setup_drm(struct drm_info *drm) { int i; drm->fd = drm_open_driver_master(DRIVER_INTEL); drm->res = drmModeGetResources(drm->fd); igt_assert(drm->res->count_connectors <= MAX_CONNECTORS); for (i = 0; i < drm->res->count_connectors; i++) drm->connectors[i] = drmModeGetConnectorCurrent(drm->fd, drm->res->connectors[i]); kmstest_set_vt_graphics_mode(); } static void teardown_drm(struct drm_info *drm) { int i; kmstest_restore_vt_mode(); for (i = 0; i < drm->res->count_connectors; i++) drmModeFreeConnector(drm->connectors[i]); drmModeFreeResources(drm->res); igt_assert(close(drm->fd) == 0); } static bool fbc_supported_on_chipset(void) { char buf[128]; igt_debugfs_read("i915_fbc_status", buf); return !strstr(buf, "FBC unsupported on this chipset\n"); } static bool connector_can_fbc(drmModeConnectorPtr connector) { return true; } static bool fbc_is_enabled(void) { char buf[128]; igt_debugfs_read("i915_fbc_status", buf); return strstr(buf, "FBC enabled\n"); } static bool fbc_wait_until_enabled(void) { return igt_wait(fbc_is_enabled(), 5000, 1); } typedef bool (*connector_possible_fn)(drmModeConnectorPtr connector); static void set_mode_for_one_screen(struct drm_info *drm, struct igt_fb *fb, connector_possible_fn connector_possible) { int i, rc; uint32_t connector_id = 0, crtc_id; drmModeModeInfoPtr mode; uint32_t buffer_id; drmModeConnectorPtr c = NULL; for (i = 0; i < drm->res->count_connectors; i++) { c = drm->connectors[i]; if (c->connection == DRM_MODE_CONNECTED && c->count_modes && connector_possible(c)) { connector_id = c->connector_id; mode = &c->modes[0]; break; } } igt_require_f(connector_id, "No connector available\n"); crtc_id = drm->res->crtcs[0]; buffer_id = igt_create_fb(drm->fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_I915_FORMAT_MOD_X_TILED, fb); igt_draw_fill_fb(drm->fd, fb, 0xFF); igt_info("Setting %dx%d mode for %s connector\n", mode->hdisplay, mode->vdisplay, kmstest_connector_type_str(c->connector_type)); rc = drmModeSetCrtc(drm->fd, crtc_id, buffer_id, 0, 0, &connector_id, 1, mode); igt_assert_eq(rc, 0); } static bool psr_supported_on_chipset(void) { char buf[256]; igt_debugfs_read("i915_edp_psr_status", buf); return strstr(buf, "Sink_Support: yes\n"); } static bool connector_can_psr(drmModeConnectorPtr connector) { return (connector->connector_type == DRM_MODE_CONNECTOR_eDP); } static bool psr_is_enabled(void) { char buf[256]; igt_debugfs_read("i915_edp_psr_status", buf); return strstr(buf, "\nActive: yes\n"); } static bool psr_wait_until_enabled(void) { return igt_wait(psr_is_enabled(), 5000, 1); } struct feature { bool (*supported_on_chipset)(void); bool (*wait_until_enabled)(void); bool (*connector_possible_fn)(drmModeConnectorPtr connector); const char *param_name; } fbc = { .supported_on_chipset = fbc_supported_on_chipset, .wait_until_enabled = fbc_wait_until_enabled, .connector_possible_fn = connector_can_fbc, .param_name = "enable_fbc", }, psr = { .supported_on_chipset = psr_supported_on_chipset, .wait_until_enabled = psr_wait_until_enabled, .connector_possible_fn = connector_can_psr, .param_name = "enable_psr", }; static void disable_features(void) { igt_set_module_param_int(fbc.param_name, 0); igt_set_module_param_int(psr.param_name, 0); } static void subtest(struct feature *feature, bool suspend) { struct drm_info drm; struct igt_fb fb; igt_require(feature->supported_on_chipset()); disable_features(); igt_set_module_param_int(feature->param_name, 1); setup_drm(&drm); kmstest_unset_all_crtcs(drm.fd, drm.res); wait_user("Modes unset."); igt_assert(!feature->wait_until_enabled()); set_mode_for_one_screen(&drm, &fb, feature->connector_possible_fn); wait_user("Screen set."); igt_assert(feature->wait_until_enabled()); if (suspend) { igt_system_suspend_autoresume(); sleep(5); igt_assert(feature->wait_until_enabled()); } igt_remove_fb(drm.fd, &fb); teardown_drm(&drm); /* Wait for fbcon to restore itself. */ sleep(3); wait_user("Back to fbcon."); igt_assert(!feature->wait_until_enabled()); if (suspend) { igt_system_suspend_autoresume(); sleep(5); igt_assert(!feature->wait_until_enabled()); } } static void setup_environment(void) { int drm_fd; drm_fd = drm_open_driver_master(DRIVER_INTEL); igt_require(drm_fd >= 0); igt_assert(close(drm_fd) == 0); } static void teardown_environment(void) { } igt_main { igt_fixture setup_environment(); igt_subtest("fbc") subtest(&fbc, false); igt_subtest("psr") subtest(&psr, false); igt_subtest("fbc-suspend") subtest(&fbc, true); igt_subtest("psr-suspend") subtest(&psr, true); igt_fixture teardown_environment(); } intel-gpu-tools-1.14/tests/gem_mmap_offset_exhaustion.c0000644000175000017500000000527112665336131020342 00000000000000/* * Copyright © 2012 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include "drm.h" IGT_TEST_DESCRIPTION("Checks whether the kernel handles mmap offset exhaustion" " correctly."); #define OBJECT_SIZE (1024*1024) /* Testcase: checks whether the kernel handles mmap offset exhaustion correctly * * Currently the kernel doesn't reap the mmap offset of purged objects, albeit * there's nothing that prevents it ABI-wise and it helps to get out of corners * (because drm_mm is only 32bit on 32bit archs unfortunately. * * Note that on 64bit machines we have plenty of address space (because drm_mm * uses unsigned long). */ static void create_and_map_bo(int fd) { uint32_t handle; char *ptr; handle = gem_create(fd, OBJECT_SIZE); ptr = gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_READ | PROT_WRITE); /* touch it to force it into the gtt */ *ptr = 0; /* but then unmap it again because we only have limited address space on * 32 bit */ munmap(ptr, OBJECT_SIZE); /* we happily leak objects to exhaust mmap offset space, the kernel will * reap backing storage. */ gem_madvise(fd, handle, I915_MADV_DONTNEED); } igt_simple_main { int fd, i; igt_skip_on_simulation(); fd = drm_open_driver(DRIVER_INTEL); /* we have 32bit of address space, so try to fit one MB more * than that. */ for (i = 0; i < 4096 + 1; i++) create_and_map_bo(fd); close(fd); } intel-gpu-tools-1.14/tests/drv_module_reload_basic0000755000175000017500000000263312665336131017353 00000000000000#!/bin/bash # # Testcase: Reload the drm module # # ... we've broken this way too often :( # SOURCE_DIR="$( dirname "${BASH_SOURCE[0]}" )" . $SOURCE_DIR/drm_lib.sh # no other drm service should be running, so we can just unbind # we must kick away fbcon (but only fbcon) for vtcon in /sys/class/vtconsole/vtcon*/ ; do if grep "frame buffer device" $vtcon/name > /dev/null ; then echo unbinding $vtcon: `cat $vtcon/name` echo 0 > $vtcon/bind fi done # The sound driver uses our power well pkill alsactl rmmod snd_hda_intel &> /dev/null #ignore errors in ips - gen5 only rmmod intel_ips &> /dev/null rmmod i915 #ignore errors in intel-gtt, often built-in rmmod intel-gtt &> /dev/null # drm may be used by other devices (nouveau, radeon, udl, etc) rmmod drm_kms_helper &> /dev/null rmmod drm &> /dev/null if lsmod | grep i915 &> /dev/null ; then echo WARNING: i915.ko still loaded! exit $IGT_EXIT_FAILURE else echo module successfully unloaded fi modprobe i915 echo 1 > /sys/class/vtconsole/vtcon1/bind modprobe snd_hda_intel # does the device exist? if $SOURCE_DIR/gem_alive > /dev/null ; then echo "module successfully loaded again" else echo "failed to reload module successfully" exit $IGT_EXIT_FAILURE fi # then try to run something if ! $SOURCE_DIR/gem_linear_blits --run-subtest basic > /dev/null ; then echo "failed to execute a simple batch after reload" exit $IGT_EXIT_FAILURE fi exit $IGT_EXIT_SUCCESS intel-gpu-tools-1.14/tests/gem_multi_bsd_sync_loop.c0000644000175000017500000001127412665336131017642 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter (based on gem_ring_sync_loop_*.c) * Zhao Yakui * */ #include "igt.h" #include #include #include #include #include #include #include #include #include "drm.h" #include "intel_bufmgr.h" #include "i830_reg.h" IGT_TEST_DESCRIPTION("Basic check of ring<->ring sync using a dummy reloc."); static drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; static drm_intel_bo *target_buffer; #define NUM_FD 50 static int mfd[NUM_FD]; static drm_intel_bufmgr *mbufmgr[NUM_FD]; static struct intel_batchbuffer *mbatch[NUM_FD]; static drm_intel_bo *mbuffer[NUM_FD]; /* * Testcase: Basic check of ring<->ring sync using a dummy reloc * * Extremely efficient at catching missed irqs with semaphores=0 ... */ #define MI_COND_BATCH_BUFFER_END (0x36<<23 | 1) #define MI_DO_COMPARE (1<<21) static void store_dword_loop(int fd) { int i; int num_rings = gem_get_num_rings(fd); srandom(0xdeadbeef); for (i = 0; i < SLOW_QUICK(0x100000, 10); i++) { int ring, mindex; ring = random() % num_rings + 1; mindex = random() % NUM_FD; batch = mbatch[mindex]; if (ring == I915_EXEC_RENDER) { BEGIN_BATCH(4, 1); OUT_BATCH(MI_COND_BATCH_BUFFER_END | MI_DO_COMPARE); OUT_BATCH(0xffffffff); /* compare dword */ OUT_RELOC(mbuffer[mindex], I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(MI_NOOP); ADVANCE_BATCH(); } else { BEGIN_BATCH(4, 1); OUT_BATCH(MI_FLUSH_DW | 1); OUT_BATCH(0); /* reserved */ OUT_RELOC(mbuffer[mindex], I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(MI_NOOP | (1<<22) | (0xf)); ADVANCE_BATCH(); } intel_batchbuffer_flush_on_ring(batch, ring); } drm_intel_bo_map(target_buffer, 0); // map to force waiting on rendering drm_intel_bo_unmap(target_buffer); } igt_simple_main { int fd; int devid; int i; fd = drm_open_driver(DRIVER_INTEL); devid = intel_get_drm_devid(fd); gem_require_ring(fd, I915_EXEC_BLT); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); igt_assert_f(bufmgr, "fail to initialize the buf manager\n"); drm_intel_bufmgr_gem_enable_reuse(bufmgr); target_buffer = drm_intel_bo_alloc(bufmgr, "target bo", 4096, 4096); igt_assert_f(target_buffer, "fail to create the gem bo\n"); /* Create multiple drm_fd and map one gem_object among multi drm_fd */ { unsigned int target_flink; char buffer_name[32]; igt_assert(dri_bo_flink(target_buffer, &target_flink) == 0); for (i = 0; i < NUM_FD; i++) { sprintf(buffer_name, "Target buffer %d\n", i); mfd[i] = drm_open_driver(DRIVER_INTEL); mbufmgr[i] = drm_intel_bufmgr_gem_init(mfd[i], 4096); igt_assert_f(mbufmgr[i], "fail to initialize buf manager for drm_fd %d\n", mfd[i]); drm_intel_bufmgr_gem_enable_reuse(mbufmgr[i]); mbatch[i] = intel_batchbuffer_alloc(mbufmgr[i], devid); igt_assert_f(mbatch[i], "fail to create batchbuffer for drm_fd %d\n", mfd[i]); mbuffer[i] = intel_bo_gem_create_from_name(mbufmgr[i], buffer_name, target_flink); igt_assert_f(mbuffer[i], "fail to create buffer bo from global " "gem handle %d for drm_fd %d\n", target_flink, mfd[i]); } } store_dword_loop(fd); { for (i = 0; i < NUM_FD; i++) { dri_bo_unreference(mbuffer[i]); intel_batchbuffer_free(mbatch[i]); drm_intel_bufmgr_destroy(mbufmgr[i]); close(mfd[i]); } } drm_intel_bo_unreference(target_buffer); drm_intel_bufmgr_destroy(bufmgr); close(fd); } intel-gpu-tools-1.14/tests/gem_bad_length.c0000644000175000017500000000663012665336131015662 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include "drm.h" IGT_TEST_DESCRIPTION("Test minimal bo_create and batchbuffer exec."); /* * Testcase: Minimal bo_create and batchbuffer exec * * Originally this caught an kernel oops due to the unchecked assumption that * objects have size > 0. */ static uint32_t do_gem_create(int fd, int size, int *retval) { struct drm_i915_gem_create create; int ret; create.handle = 0; create.size = (size + 4095) & -4096; ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_CREATE, &create); igt_assert(retval || ret == 0); if (retval) *retval = errno; return create.handle; } #if 0 static int gem_exec(int fd, struct drm_i915_gem_execbuffer2 *execbuf) { return drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, execbuf); } #endif static void create0(int fd) { int retval = 0; igt_info("trying to create a zero-length gem object\n"); do_gem_create(fd, 0, &retval); igt_assert(retval == EINVAL); } #if 0 static void exec0(int fd) { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 exec[1]; uint32_t buf[2] = { MI_BATCH_BUFFER_END, 0 }; /* Just try executing with a zero-length bo. * We expect the kernel to either accept the nop batch, or reject it * for the zero-length buffer, but never crash. */ exec[0].handle = gem_create(fd, 4096); gem_write(fd, exec[0].handle, 0, buf, sizeof(buf)); exec[0].relocation_count = 0; exec[0].relocs_ptr = 0; exec[0].alignment = 0; exec[0].offset = 0; exec[0].flags = 0; exec[0].rsvd1 = 0; exec[0].rsvd2 = 0; execbuf.buffers_ptr = (uintptr_t)exec; execbuf.buffer_count = 1; execbuf.batch_start_offset = 0; execbuf.batch_len = sizeof(buf); execbuf.cliprects_ptr = 0; execbuf.num_cliprects = 0; execbuf.DR1 = 0; execbuf.DR4 = 0; execbuf.flags = 0; i915_execbuffer2_set_context_id(execbuf, 0); execbuf.rsvd2 = 0; igt_info("trying to run an empty batchbuffer\n"); gem_exec(fd, &execbuf); gem_close(fd, exec[0].handle); } #endif igt_simple_main { int fd; igt_skip_on_simulation(); fd = drm_open_driver(DRIVER_INTEL); create0(fd); //exec0(fd); close(fd); } intel-gpu-tools-1.14/tests/gem_exec_bad_domains.c0000644000175000017500000001365412665336131017043 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * */ #include "igt.h" #include #include #include #include #include #include #include #include #include "drm.h" #include "intel_bufmgr.h" /* Testcase: Test whether the kernel rejects relocations with non-gpu domains * * If it does not, it'll oops somewhen later on because we don't expect that. */ IGT_TEST_DESCRIPTION("Test whether the kernel rejects relocations with non-gpu" " domains."); static drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; #define BAD_GTT_DEST ((512*1024*1024)) /* past end of aperture */ static int run_batch(void) { unsigned int used = batch->ptr - batch->buffer; int ret; if (used == 0) return 0; /* Round batchbuffer usage to 2 DWORDs. */ if ((used & 4) == 0) { *(uint32_t *) (batch->ptr) = 0; /* noop */ batch->ptr += 4; } /* Mark the end of the buffer. */ *(uint32_t *)(batch->ptr) = MI_BATCH_BUFFER_END; /* noop */ batch->ptr += 4; used = batch->ptr - batch->buffer; ret = drm_intel_bo_subdata(batch->bo, 0, used, batch->buffer); igt_assert_eq(ret, 0); batch->ptr = NULL; ret = drm_intel_bo_mrb_exec(batch->bo, used, NULL, 0, 0, 0); intel_batchbuffer_reset(batch); return ret; } #define I915_GEM_GPU_DOMAINS \ (I915_GEM_DOMAIN_RENDER | \ I915_GEM_DOMAIN_SAMPLER | \ I915_GEM_DOMAIN_COMMAND | \ I915_GEM_DOMAIN_INSTRUCTION | \ I915_GEM_DOMAIN_VERTEX) static void multi_write_domain(int fd) { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 exec[2]; struct drm_i915_gem_relocation_entry reloc[1]; uint32_t handle, handle_target; int ret; handle = gem_create(fd, 4096); handle_target = gem_create(fd, 4096); exec[0].handle = handle_target; exec[0].relocation_count = 0; exec[0].relocs_ptr = 0; exec[0].alignment = 0; exec[0].offset = 0; exec[0].flags = 0; exec[0].rsvd1 = 0; exec[0].rsvd2 = 0; exec[1].handle = handle; exec[1].relocation_count = 1; exec[1].relocs_ptr = (uintptr_t) reloc; exec[1].alignment = 0; exec[1].offset = 0; exec[1].flags = 0; exec[1].rsvd1 = 0; exec[1].rsvd2 = 0; reloc[0].offset = 4; reloc[0].delta = 0; reloc[0].target_handle = handle_target; reloc[0].read_domains = I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION; reloc[0].write_domain = I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION; reloc[0].presumed_offset = 0; execbuf.buffers_ptr = (uintptr_t)exec; execbuf.buffer_count = 2; execbuf.batch_start_offset = 0; execbuf.batch_len = 8; execbuf.cliprects_ptr = 0; execbuf.num_cliprects = 0; execbuf.DR1 = 0; execbuf.DR4 = 0; execbuf.flags = 0; i915_execbuffer2_set_context_id(execbuf, 0); execbuf.rsvd2 = 0; ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); igt_assert(ret != 0 && errno == EINVAL); gem_close(fd, handle); gem_close(fd, handle_target); } int fd; drm_intel_bo *tmp; igt_main { igt_fixture { fd = drm_open_driver(DRIVER_INTEL); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); drm_intel_bufmgr_gem_enable_reuse(bufmgr); batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd)); tmp = drm_intel_bo_alloc(bufmgr, "tmp", 128 * 128, 4096); } igt_subtest("cpu-domain") { BEGIN_BATCH(2, 1); OUT_BATCH(0); OUT_RELOC(tmp, I915_GEM_DOMAIN_CPU, 0, 0); ADVANCE_BATCH(); igt_assert(run_batch() == -EINVAL); BEGIN_BATCH(2, 1); OUT_BATCH(0); OUT_RELOC(tmp, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU, 0); ADVANCE_BATCH(); igt_assert(run_batch() == -EINVAL); } igt_subtest("gtt-domain") { BEGIN_BATCH(2, 1); OUT_BATCH(0); OUT_RELOC(tmp, I915_GEM_DOMAIN_GTT, 0, 0); ADVANCE_BATCH(); igt_assert(run_batch() == -EINVAL); BEGIN_BATCH(2, 1); OUT_BATCH(0); OUT_RELOC(tmp, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT, 0); ADVANCE_BATCH(); igt_assert(run_batch() == -EINVAL); } /* Note: Older kernels disallow this. Punt on the skip check though * since this is too old. */ igt_subtest("conflicting-write-domain") { BEGIN_BATCH(4, 2); OUT_BATCH(0); OUT_RELOC(tmp, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(0); OUT_RELOC(tmp, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, 0); ADVANCE_BATCH(); igt_assert(run_batch() == 0); } igt_subtest("double-write-domain") multi_write_domain(fd); igt_subtest("invalid-gpu-domain") { BEGIN_BATCH(2, 1); OUT_BATCH(0); OUT_RELOC(tmp, ~(I915_GEM_GPU_DOMAINS | I915_GEM_DOMAIN_GTT | I915_GEM_DOMAIN_CPU), 0, 0); ADVANCE_BATCH(); igt_assert(run_batch() == -EINVAL); BEGIN_BATCH(2, 1); OUT_BATCH(0); OUT_RELOC(tmp, I915_GEM_DOMAIN_GTT << 1, I915_GEM_DOMAIN_GTT << 1, 0); ADVANCE_BATCH(); igt_assert(run_batch() == -EINVAL); } igt_fixture { intel_batchbuffer_free(batch); drm_intel_bufmgr_destroy(bufmgr); close(fd); } } intel-gpu-tools-1.14/tests/core_getclient.c0000644000175000017500000000406212665336131015726 00000000000000/* * Copyright © 2007 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * */ #include "igt.h" #include #include #include #include IGT_TEST_DESCRIPTION("Tests the DRM_IOCTL_GET_CLIENT ioctl."); igt_simple_main { int fd, ret; drm_client_t client; fd = drm_open_driver(DRIVER_ANY); /* Look for client index 0. This should exist whether we're operating * on an otherwise unused drm device, or the X Server is running on * the device. */ client.idx = 0; ret = ioctl(fd, DRM_IOCTL_GET_CLIENT, &client); igt_assert(ret == 0); /* Look for some absurd client index and make sure it's invalid. * The DRM drivers currently always return data, so the user has * no real way to detect when the list has terminated. That's bad, * and this test is XFAIL as a result. */ client.idx = 0x7fffffff; ret = ioctl(fd, DRM_IOCTL_GET_CLIENT, &client); igt_assert(ret == -1 && errno == EINVAL); close(fd); } intel-gpu-tools-1.14/tests/gem_reloc_overflow.c0000644000175000017500000002514112665336131016620 00000000000000/* * Copyright 2013 Google * Copyright 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Kees Cook * Daniel Vetter * Rafael Barbalho * */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "drm.h" IGT_TEST_DESCRIPTION("Check that kernel relocation overflows are caught."); /* * Testcase: Kernel relocation overflows are caught. */ int fd, entries, num; size_t reloc_size; uint32_t *handles; struct drm_i915_gem_exec_object2 *execobjs; struct drm_i915_gem_execbuffer2 execbuf = { 0 }; struct drm_i915_gem_relocation_entry *reloc; uint32_t handle; uint32_t batch_handle; static void source_offset_tests(int devid, bool reloc_gtt) { struct drm_i915_gem_relocation_entry single_reloc; void *dst_gtt; const char *relocation_type; if (reloc_gtt) relocation_type = "reloc-gtt"; else relocation_type = "reloc-cpu"; igt_fixture { handle = gem_create(fd, 8192); execobjs[1].handle = batch_handle; execobjs[1].relocation_count = 0; execobjs[1].relocs_ptr = 0; execobjs[0].handle = handle; execobjs[0].relocation_count = 1; execobjs[0].relocs_ptr = (uintptr_t) &single_reloc; execbuf.buffer_count = 2; if (reloc_gtt) { dst_gtt = __gem_mmap__gtt(fd, handle, 8192, PROT_READ | PROT_WRITE); igt_assert(dst_gtt != MAP_FAILED); gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); memset(dst_gtt, 0, 8192); munmap(dst_gtt, 8192); relocation_type = "reloc-gtt"; } else { relocation_type = "reloc-cpu"; } } /* Special tests for 64b relocs. */ igt_subtest_f("source-offset-page-stradle-gen8-%s", relocation_type) { igt_require(intel_gen(devid) >= 8); single_reloc.offset = 4096 - 4; single_reloc.delta = 0; single_reloc.target_handle = handle; single_reloc.read_domains = I915_GEM_DOMAIN_RENDER; single_reloc.write_domain = I915_GEM_DOMAIN_RENDER; single_reloc.presumed_offset = 0; igt_assert(ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf) == 0); single_reloc.delta = 1024; igt_assert(ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf) == 0); } igt_subtest_f("source-offset-end-gen8-%s", relocation_type) { igt_require(intel_gen(devid) >= 8); single_reloc.offset = 8192 - 8; single_reloc.delta = 0; single_reloc.target_handle = handle; single_reloc.read_domains = I915_GEM_DOMAIN_RENDER; single_reloc.write_domain = I915_GEM_DOMAIN_RENDER; single_reloc.presumed_offset = 0; igt_assert(ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf) == 0); } igt_subtest_f("source-offset-overflow-gen8-%s", relocation_type) { igt_require(intel_gen(devid) >= 8); single_reloc.offset = 8192 - 4; single_reloc.delta = 0; single_reloc.target_handle = handle; single_reloc.read_domains = I915_GEM_DOMAIN_RENDER; single_reloc.write_domain = I915_GEM_DOMAIN_RENDER; single_reloc.presumed_offset = 0; igt_assert(ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf) != 0); igt_assert(errno == EINVAL); } /* Tests for old 4byte relocs on pre-gen8. */ igt_subtest_f("source-offset-end-%s", relocation_type) { igt_require(intel_gen(devid) < 8); single_reloc.offset = 8192 - 4; single_reloc.delta = 0; single_reloc.target_handle = handle; single_reloc.read_domains = I915_GEM_DOMAIN_RENDER; single_reloc.write_domain = I915_GEM_DOMAIN_RENDER; single_reloc.presumed_offset = 0; igt_assert(ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf) == 0); } igt_subtest_f("source-offset-big-%s", relocation_type) { single_reloc.offset = 8192; single_reloc.delta = 0; single_reloc.target_handle = handle; single_reloc.read_domains = I915_GEM_DOMAIN_RENDER; single_reloc.write_domain = I915_GEM_DOMAIN_RENDER; single_reloc.presumed_offset = 0; igt_assert(ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf) != 0); igt_assert(errno == EINVAL); } igt_subtest_f("source-offset-negative-%s", relocation_type) { single_reloc.offset = (int64_t) -4; single_reloc.delta = 0; single_reloc.target_handle = handle; single_reloc.read_domains = I915_GEM_DOMAIN_RENDER; single_reloc.write_domain = I915_GEM_DOMAIN_RENDER; single_reloc.presumed_offset = 0; igt_assert(ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf) != 0); igt_assert(errno == EINVAL); } igt_subtest_f("source-offset-unaligned-%s", relocation_type) { single_reloc.offset = 1; single_reloc.delta = 0; single_reloc.target_handle = handle; single_reloc.read_domains = I915_GEM_DOMAIN_RENDER; single_reloc.write_domain = I915_GEM_DOMAIN_RENDER; single_reloc.presumed_offset = 0; igt_assert(ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf) != 0); igt_assert(errno == EINVAL); } igt_fixture { gem_close(fd, handle); } } static void reloc_tests(void) { int i; unsigned int total_unsigned = 0; igt_subtest("invalid-address") { /* Attempt unmapped single entry. */ execobjs[0].relocation_count = 1; execobjs[0].relocs_ptr = 0; execbuf.buffer_count = 1; errno = 0; ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); igt_assert(errno == EFAULT); } igt_subtest("single-overflow") { /* Attempt single overflowed entry. */ execobjs[0].relocation_count = (1 << 31); execobjs[0].relocs_ptr = (uintptr_t)reloc; execbuf.buffer_count = 1; errno = 0; ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); igt_assert(errno == EINVAL); } igt_fixture { execobjs[0].handle = batch_handle; execobjs[0].relocation_count = 0; execobjs[0].relocs_ptr = 0; execbuf.buffer_count = 1; /* Make sure the batch would succeed except for the thing we're * testing. */ execbuf.batch_start_offset = 0; execbuf.batch_len = 8; igt_assert(ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf) == 0); } igt_subtest("batch-start-unaligned") { execbuf.batch_start_offset = 1; execbuf.batch_len = 8; igt_assert(ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf) != 0); igt_assert(errno == EINVAL); } igt_subtest("batch-end-unaligned") { execbuf.batch_start_offset = 0; execbuf.batch_len = 7; igt_assert(ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf) != 0); igt_assert(errno == EINVAL); } igt_fixture { /* Undo damage for next tests. */ execbuf.batch_start_offset = 0; execbuf.batch_len = 8; } igt_subtest("wrapped-overflow") { /* Attempt wrapped overflow entries. */ for (i = 0; i < num; i++) { struct drm_i915_gem_exec_object2 *obj = &execobjs[i]; obj->handle = handles[i]; if (i == num - 1) { /* Wraps to 1 on last count. */ obj->relocation_count = 1 - total_unsigned; obj->relocs_ptr = (uintptr_t)reloc; } else { obj->relocation_count = entries; obj->relocs_ptr = (uintptr_t)reloc; } total_unsigned += obj->relocation_count; } execbuf.buffer_count = num; errno = 0; ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); igt_assert(errno == EINVAL); } } static void buffer_count_tests(void) { igt_subtest("buffercount-overflow") { for (int i = 0; i < num; i++) { execobjs[i].relocation_count = 0; execobjs[i].relocs_ptr = 0; execobjs[i].handle = handles[i]; } execobjs[0].relocation_count = 0; execobjs[0].relocs_ptr = 0; /* We only have num buffers actually, but the overflow will make * sure we blow up the kernel before we blow up userspace. */ execbuf.buffer_count = num; /* Put a real batch at the end. */ execobjs[num - 1].handle = batch_handle; /* Make sure the basic thing would work first ... */ errno = 0; ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); igt_assert(errno == 0); /* ... then be evil: Overflow of the pointer table (which has a * bit of lead datastructures, so no + 1 needed to overflow). */ execbuf.buffer_count = INT_MAX / sizeof(void *); errno = 0; ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); igt_assert(errno == EINVAL); /* ... then be evil: Copying/allocating the array. */ execbuf.buffer_count = UINT_MAX / sizeof(execobjs[0]) + 1; errno = 0; ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); igt_assert(errno == EINVAL); } } igt_main { int devid = 0; igt_fixture { int ring; uint32_t batch_data [2] = { MI_NOOP, MI_BATCH_BUFFER_END }; fd = drm_open_driver(DRIVER_INTEL); devid = intel_get_drm_devid(fd); /* Create giant reloc buffer area. */ num = 257; entries = ((1ULL << 32) / (num - 1)); reloc_size = entries * sizeof(struct drm_i915_gem_relocation_entry); reloc = mmap(NULL, reloc_size, PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANON, -1, 0); igt_assert(reloc != MAP_FAILED); /* Allocate the handles we'll need to wrap. */ handles = calloc(num, sizeof(*handles)); for (int i = 0; i < num; i++) handles[i] = gem_create(fd, 4096); if (intel_gen(devid) >= 6) ring = I915_EXEC_BLT; else ring = 0; /* Create relocation objects. */ execobjs = calloc(num, sizeof(*execobjs)); execbuf.buffers_ptr = (uintptr_t)execobjs; execbuf.batch_start_offset = 0; execbuf.batch_len = 8; execbuf.cliprects_ptr = 0; execbuf.num_cliprects = 0; execbuf.DR1 = 0; execbuf.DR4 = 0; execbuf.flags = ring; i915_execbuffer2_set_context_id(execbuf, 0); execbuf.rsvd2 = 0; batch_handle = gem_create(fd, 4096); gem_write(fd, batch_handle, 0, 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prime_nv_test.c prime_self_import.c prime_udl.c template.c \ $(testdisplay_SOURCES) vc4_create_bo.c vc4_wait_bo.c \ vc4_wait_seqno.c am__can_run_installinfo = \ case $$AM_UPDATE_INFO_DIR in \ n|no|NO) false;; \ *) (install-info --version) >/dev/null 2>&1;; \ esac am__dist_pkgdata_DATA_DIST = pass.png 1080p-left.png 1080p-right.png DATA = $(dist_pkgdata_DATA) $(pkgdata_DATA) am__tagged_files = $(HEADERS) $(SOURCES) $(TAGS_FILES) $(LISP) # Read a list of newline-separated strings from the standard input, # and print each of them once, without duplicates. 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GNU make to not export all variables. # Otherwise a system limit (for SysV at least) may be exceeded. .NOEXPORT: intel-gpu-tools-1.14/tests/gem_pipe_control_store_loop.c0000644000175000017500000001335612665336131020540 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter (based on gem_storedw_*.c) * */ /* * Testcase: (TLB-)Coherency of pipe_control QW writes * * Writes a counter-value into an always newly allocated target bo (by disabling * buffer reuse). Decently trashes on tlb inconsistencies, too. */ #include "igt.h" #include #include #include #include #include #include #include #include #include "drm.h" #include "intel_bufmgr.h" IGT_TEST_DESCRIPTION("Test (TLB-)Coherency of pipe_control QW writes."); static drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; uint32_t devid; #define GFX_OP_PIPE_CONTROL ((0x3<<29)|(0x3<<27)|(0x2<<24)|2) #define PIPE_CONTROL_WRITE_IMMEDIATE (1<<14) #define PIPE_CONTROL_WRITE_TIMESTAMP (3<<14) #define PIPE_CONTROL_DEPTH_STALL (1<<13) #define PIPE_CONTROL_WC_FLUSH (1<<12) #define PIPE_CONTROL_IS_FLUSH (1<<11) /* MBZ on Ironlake */ #define PIPE_CONTROL_TC_FLUSH (1<<10) /* GM45+ only */ #define PIPE_CONTROL_STALL_AT_SCOREBOARD (1<<1) #define PIPE_CONTROL_CS_STALL (1<<20) #define PIPE_CONTROL_GLOBAL_GTT (1<<2) /* in addr dword */ /* Like the store dword test, but we create new command buffers each time */ static void store_pipe_control_loop(bool preuse_buffer) { int i, val = 0; uint32_t *buf; drm_intel_bo *target_bo; for (i = 0; i < SLOW_QUICK(0x10000, 4); i++) { /* we want to check tlb consistency of the pipe_control target, * so get a new buffer every time around */ target_bo = drm_intel_bo_alloc(bufmgr, "target bo", 4096, 4096); igt_assert(target_bo); if (preuse_buffer) { COLOR_BLIT_COPY_BATCH_START(0); OUT_BATCH((3 << 24) | (0xf0 << 16) | 64); OUT_BATCH(0); OUT_BATCH(1 << 16 | 1); /* * IMPORTANT: We need to preuse the buffer in a * different domain than what the pipe control write * (and kernel wa) uses! */ OUT_RELOC_FENCED(target_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(0xdeadbeef); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); } /* gem_storedw_batches_loop.c is a bit overenthusiastic with * creating new batchbuffers - with buffer reuse disabled, the * support code will do that for us. */ if (batch->gen >= 8) { BEGIN_BATCH(4, 1); OUT_BATCH(GFX_OP_PIPE_CONTROL + 1); OUT_BATCH(PIPE_CONTROL_WRITE_IMMEDIATE); OUT_RELOC_FENCED(target_bo, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, PIPE_CONTROL_GLOBAL_GTT); OUT_BATCH(val); /* write data */ ADVANCE_BATCH(); } else if (batch->gen >= 6) { /* work-around hw issue, see intel_emit_post_sync_nonzero_flush * in mesa sources. */ BEGIN_BATCH(4, 1); OUT_BATCH(GFX_OP_PIPE_CONTROL); OUT_BATCH(PIPE_CONTROL_CS_STALL | PIPE_CONTROL_STALL_AT_SCOREBOARD); OUT_BATCH(0); /* address */ OUT_BATCH(0); /* write data */ ADVANCE_BATCH(); BEGIN_BATCH(4, 1); OUT_BATCH(GFX_OP_PIPE_CONTROL); OUT_BATCH(PIPE_CONTROL_WRITE_IMMEDIATE); OUT_RELOC(target_bo, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, PIPE_CONTROL_GLOBAL_GTT); OUT_BATCH(val); /* write data */ ADVANCE_BATCH(); } else if (batch->gen >= 4) { BEGIN_BATCH(4, 1); OUT_BATCH(GFX_OP_PIPE_CONTROL | PIPE_CONTROL_WC_FLUSH | PIPE_CONTROL_TC_FLUSH | PIPE_CONTROL_WRITE_IMMEDIATE | 2); OUT_RELOC(target_bo, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, PIPE_CONTROL_GLOBAL_GTT); OUT_BATCH(val); OUT_BATCH(0xdeadbeef); ADVANCE_BATCH(); } intel_batchbuffer_flush_on_ring(batch, 0); drm_intel_bo_map(target_bo, 1); buf = target_bo->virtual; igt_assert(buf[0] == val); drm_intel_bo_unmap(target_bo); /* Make doublesure that this buffer won't get reused. */ drm_intel_bo_disable_reuse(target_bo); drm_intel_bo_unreference(target_bo); val++; } } int fd; igt_main { igt_fixture { fd = drm_open_driver(DRIVER_INTEL); devid = intel_get_drm_devid(fd); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); igt_assert(bufmgr); igt_skip_on(IS_GEN2(devid) || IS_GEN3(devid)); igt_skip_on(devid == PCI_CHIP_I965_G); /* has totally broken pipe control */ /* IMPORTANT: No call to * drm_intel_bufmgr_gem_enable_reuse(bufmgr); * here because we wan't to have fresh buffers (to trash the tlb) * every time! */ batch = intel_batchbuffer_alloc(bufmgr, devid); igt_assert(batch); } igt_subtest("fresh-buffer") store_pipe_control_loop(false); igt_subtest("reused-buffer") store_pipe_control_loop(true); igt_fixture { intel_batchbuffer_free(batch); drm_intel_bufmgr_destroy(bufmgr); close(fd); } } intel-gpu-tools-1.14/tests/gem_userptr_blits.c0000644000175000017500000010666512665336131016505 00000000000000/* * Copyright © 2009-2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * Chris Wilson * Tvrtko Ursulin * */ /** @file gem_userptr_blits.c * * This is a test of doing many blits using a mixture of normal system pages * and uncached linear buffers, with a working set larger than the * aperture size. * * The goal is to simply ensure the basics work. */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include #include "drm.h" #include "i915_drm.h" #include "intel_bufmgr.h" #include "eviction_common.c" #ifndef PAGE_SIZE #define PAGE_SIZE 4096 #endif static uint32_t userptr_flags = LOCAL_I915_USERPTR_UNSYNCHRONIZED; #define WIDTH 512 #define HEIGHT 512 static uint32_t linear[WIDTH*HEIGHT]; static void gem_userptr_test_unsynchronized(void) { userptr_flags = LOCAL_I915_USERPTR_UNSYNCHRONIZED; } static void gem_userptr_test_synchronized(void) { userptr_flags = 0; } static void gem_userptr_sync(int fd, uint32_t handle) { gem_set_domain(fd, handle, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU); } static void copy(int fd, uint32_t dst, uint32_t src, unsigned int error) { uint32_t batch[12]; struct drm_i915_gem_relocation_entry reloc[2]; struct drm_i915_gem_exec_object2 obj[3]; struct drm_i915_gem_execbuffer2 exec; uint32_t handle; int ret, i=0; batch[i++] = XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA | XY_SRC_COPY_BLT_WRITE_RGB; if (intel_gen(intel_get_drm_devid(fd)) >= 8) batch[i - 1] |= 8; else batch[i - 1] |= 6; batch[i++] = (3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ WIDTH*4; batch[i++] = 0; /* dst x1,y1 */ batch[i++] = (HEIGHT << 16) | WIDTH; /* dst x2,y2 */ batch[i++] = 0; /* dst reloc */ if (intel_gen(intel_get_drm_devid(fd)) >= 8) batch[i++] = 0; batch[i++] = 0; /* src x1,y1 */ batch[i++] = WIDTH*4; batch[i++] = 0; /* src reloc */ if (intel_gen(intel_get_drm_devid(fd)) >= 8) batch[i++] = 0; batch[i++] = MI_BATCH_BUFFER_END; batch[i++] = MI_NOOP; handle = gem_create(fd, 4096); gem_write(fd, handle, 0, batch, sizeof(batch)); reloc[0].target_handle = dst; reloc[0].delta = 0; reloc[0].offset = 4 * sizeof(batch[0]); reloc[0].presumed_offset = 0; reloc[0].read_domains = I915_GEM_DOMAIN_RENDER; reloc[0].write_domain = I915_GEM_DOMAIN_RENDER; reloc[1].target_handle = src; reloc[1].delta = 0; reloc[1].offset = 7 * sizeof(batch[0]); if (intel_gen(intel_get_drm_devid(fd)) >= 8) reloc[1].offset += sizeof(batch[0]); reloc[1].presumed_offset = 0; reloc[1].read_domains = I915_GEM_DOMAIN_RENDER; reloc[1].write_domain = 0; memset(&exec, 0, sizeof(exec)); memset(obj, 0, sizeof(obj)); obj[exec.buffer_count++].handle = dst; if (src != dst) obj[exec.buffer_count++].handle = src; obj[exec.buffer_count].handle = handle; obj[exec.buffer_count].relocation_count = 2; obj[exec.buffer_count].relocs_ptr = (uintptr_t)reloc; exec.buffer_count++; exec.buffers_ptr = (uintptr_t)obj; exec.flags = HAS_BLT_RING(intel_get_drm_devid(fd)) ? I915_EXEC_BLT : 0; ret = __gem_execbuf(fd, &exec); gem_close(fd, handle); if (error == ~0) igt_assert_neq(ret, 0); else igt_assert_eq(ret, -error); } static int blit(int fd, uint32_t dst, uint32_t src, uint32_t *all_bo, int n_bo) { uint32_t batch[12]; struct drm_i915_gem_relocation_entry reloc[2]; struct drm_i915_gem_exec_object2 *obj; struct drm_i915_gem_execbuffer2 exec; uint32_t handle; int n, ret, i=0; batch[i++] = XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA | XY_SRC_COPY_BLT_WRITE_RGB; if (intel_gen(intel_get_drm_devid(fd)) >= 8) batch[i - 1] |= 8; else batch[i - 1] |= 6; batch[i++] = (3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ WIDTH*4; batch[i++] = 0; /* dst x1,y1 */ batch[i++] = (HEIGHT << 16) | WIDTH; /* dst x2,y2 */ batch[i++] = 0; /* dst reloc */ if (intel_gen(intel_get_drm_devid(fd)) >= 8) batch[i++] = 0; batch[i++] = 0; /* src x1,y1 */ batch[i++] = WIDTH*4; batch[i++] = 0; /* src reloc */ if (intel_gen(intel_get_drm_devid(fd)) >= 8) batch[i++] = 0; batch[i++] = MI_BATCH_BUFFER_END; batch[i++] = MI_NOOP; handle = gem_create(fd, 4096); gem_write(fd, handle, 0, batch, sizeof(batch)); reloc[0].target_handle = dst; reloc[0].delta = 0; reloc[0].offset = 4 * sizeof(batch[0]); reloc[0].presumed_offset = 0; reloc[0].read_domains = I915_GEM_DOMAIN_RENDER; reloc[0].write_domain = I915_GEM_DOMAIN_RENDER; reloc[1].target_handle = src; reloc[1].delta = 0; reloc[1].offset = 7 * sizeof(batch[0]); if (intel_gen(intel_get_drm_devid(fd)) >= 8) reloc[1].offset += sizeof(batch[0]); reloc[1].presumed_offset = 0; reloc[1].read_domains = I915_GEM_DOMAIN_RENDER; reloc[1].write_domain = 0; memset(&exec, 0, sizeof(exec)); obj = calloc(n_bo + 1, sizeof(*obj)); for (n = 0; n < n_bo; n++) obj[n].handle = all_bo[n]; obj[n].handle = handle; obj[n].relocation_count = 2; obj[n].relocs_ptr = (uintptr_t)reloc; exec.buffers_ptr = (uintptr_t)obj; exec.buffer_count = n_bo + 1; exec.flags = HAS_BLT_RING(intel_get_drm_devid(fd)) ? I915_EXEC_BLT : 0; ret = __gem_execbuf(fd, &exec); gem_close(fd, handle); free(obj); return ret; } static uint32_t create_userptr(int fd, uint32_t val, uint32_t *ptr) { uint32_t handle; int i; gem_userptr(fd, ptr, sizeof(linear), 0, userptr_flags, &handle); igt_assert(handle != 0); /* Fill the BO with dwords starting at val */ for (i = 0; i < WIDTH*HEIGHT; i++) ptr[i] = val++; return handle; } static void **handle_ptr_map; static unsigned *handle_size_map; static unsigned int num_handle_map; static void reset_handle_ptr(void) { if (num_handle_map == 0) return; free(handle_ptr_map); handle_ptr_map = NULL; free(handle_size_map); handle_size_map = NULL; num_handle_map = 0; } static void add_handle_ptr(uint32_t handle, void *ptr, int size) { if (handle >= num_handle_map) { int max = (4096 + handle) & -4096; handle_ptr_map = realloc(handle_ptr_map, max * sizeof(void*)); igt_assert(handle_ptr_map); memset(handle_ptr_map + num_handle_map, 0, (max - num_handle_map) * sizeof(void*)); handle_size_map = realloc(handle_size_map, max * sizeof(unsigned)); igt_assert(handle_size_map); memset(handle_ptr_map + num_handle_map, 0, (max - num_handle_map) * sizeof(unsigned)); num_handle_map = max; } handle_ptr_map[handle] = ptr; handle_size_map[handle] = size; } static void *get_handle_ptr(uint32_t handle) { igt_assert(handle < num_handle_map); return handle_ptr_map[handle]; } static void free_handle_ptr(uint32_t handle) { igt_assert(handle < num_handle_map); igt_assert(handle_ptr_map[handle]); munmap(handle_ptr_map[handle], handle_size_map[handle]); handle_ptr_map[handle] = NULL; } static uint32_t create_userptr_bo(int fd, uint64_t size) { void *ptr; uint32_t handle; ptr = mmap(NULL, size, PROT_READ | PROT_WRITE, MAP_ANONYMOUS | MAP_SHARED, -1, 0); igt_assert(ptr != MAP_FAILED); gem_userptr(fd, (uint32_t *)ptr, size, 0, userptr_flags, &handle); add_handle_ptr(handle, ptr, size); return handle; } static void flink_userptr_bo(uint32_t old_handle, uint32_t new_handle) { igt_assert(old_handle < num_handle_map); igt_assert(handle_ptr_map[old_handle]); add_handle_ptr(new_handle, handle_ptr_map[old_handle], handle_size_map[old_handle]); } static void clear(int fd, uint32_t handle, uint64_t size) { void *ptr = get_handle_ptr(handle); igt_assert(ptr != NULL); memset(ptr, 0, size); } static void free_userptr_bo(int fd, uint32_t handle) { gem_close(fd, handle); free_handle_ptr(handle); } static uint32_t create_bo(int fd, uint32_t val) { uint32_t handle; int i; handle = gem_create(fd, sizeof(linear)); /* Fill the BO with dwords starting at val */ for (i = 0; i < WIDTH*HEIGHT; i++) linear[i] = val++; gem_write(fd, handle, 0, linear, sizeof(linear)); return handle; } static void check_cpu(uint32_t *ptr, uint32_t val) { int i; for (i = 0; i < WIDTH*HEIGHT; i++) { igt_assert_f(ptr[i] == val, "Expected 0x%08x, found 0x%08x " "at offset 0x%08x\n", val, ptr[i], i * 4); val++; } } static void check_gpu(int fd, uint32_t handle, uint32_t val) { gem_read(fd, handle, 0, linear, sizeof(linear)); check_cpu(linear, val); } static int has_userptr(int fd) { uint32_t handle = 0; void *ptr; uint32_t oldflags; int ret; igt_assert(posix_memalign(&ptr, PAGE_SIZE, PAGE_SIZE) == 0); oldflags = userptr_flags; gem_userptr_test_unsynchronized(); ret = __gem_userptr(fd, ptr, PAGE_SIZE, 0, userptr_flags, &handle); userptr_flags = oldflags; if (ret != 0) { free(ptr); return 0; } gem_close(fd, handle); free(ptr); return handle != 0; } static int test_input_checking(int fd) { struct local_i915_gem_userptr userptr; int ret; /* Invalid flags. */ memset(&userptr, 0, sizeof(userptr)); userptr.user_ptr = 0; userptr.user_size = 0; userptr.flags = ~0; ret = drmIoctl(fd, LOCAL_IOCTL_I915_GEM_USERPTR, &userptr); igt_assert_neq(ret, 0); /* Too big. */ memset(&userptr, 0, sizeof(userptr)); userptr.user_ptr = 0; userptr.user_size = ~0; userptr.flags = 0; ret = drmIoctl(fd, LOCAL_IOCTL_I915_GEM_USERPTR, &userptr); igt_assert_neq(ret, 0); /* Both wrong. */ memset(&userptr, 0, sizeof(userptr)); userptr.user_ptr = 0; userptr.user_size = ~0; userptr.flags = ~0; ret = drmIoctl(fd, LOCAL_IOCTL_I915_GEM_USERPTR, &userptr); igt_assert_neq(ret, 0); return 0; } static int test_access_control(int fd) { igt_fork(child, 1) { void *ptr; int ret; uint32_t handle; igt_drop_root(); /* CAP_SYS_ADMIN is needed for UNSYNCHRONIZED mappings. */ gem_userptr_test_unsynchronized(); igt_assert(posix_memalign(&ptr, PAGE_SIZE, PAGE_SIZE) == 0); ret = __gem_userptr(fd, ptr, PAGE_SIZE, 0, userptr_flags, &handle); if (ret == 0) gem_close(fd, handle); free(ptr); igt_assert(ret == EPERM); } igt_waitchildren(); return 0; } static int test_invalid_null_pointer(int fd) { uint32_t handle; /* NULL pointer. */ gem_userptr(fd, NULL, PAGE_SIZE, 0, userptr_flags, &handle); copy(fd, handle, handle, ~0); /* QQQ Precise errno? */ gem_close(fd, handle); return 0; } static int test_invalid_gtt_mapping(int fd) { uint32_t handle, handle2; void *ptr; /* GTT mapping */ handle = create_bo(fd, 0); ptr = gem_mmap__gtt(fd, handle, sizeof(linear), PROT_READ | PROT_WRITE); gem_close(fd, handle); igt_assert(((unsigned long)ptr & (PAGE_SIZE - 1)) == 0); igt_assert((sizeof(linear) & (PAGE_SIZE - 1)) == 0); gem_userptr(fd, ptr, sizeof(linear), 0, userptr_flags, &handle2); copy(fd, handle2, handle2, ~0); /* QQQ Precise errno? */ gem_close(fd, handle2); munmap(ptr, sizeof(linear)); return 0; } #define PE_GTT_MAP 0x1 #define PE_BUSY 0x2 static void test_process_exit(int fd, int flags) { if (flags & PE_GTT_MAP) igt_require(gem_has_llc(fd)); igt_fork(child, 1) { uint32_t handle; handle = create_userptr_bo(fd, sizeof(linear)); if (flags & PE_GTT_MAP) { uint32_t *ptr = __gem_mmap__gtt(fd, handle, sizeof(linear), PROT_READ | PROT_WRITE); if (ptr) *ptr = 0; } if (flags & PE_BUSY) copy(fd, handle, handle, 0); } igt_waitchildren(); } static void test_forked_access(int fd) { uint32_t handle1 = 0, handle2 = 0; void *ptr1 = NULL, *ptr2 = NULL; int ret; ret = posix_memalign(&ptr1, PAGE_SIZE, sizeof(linear)); #ifdef MADV_DONTFORK ret |= madvise(ptr1, sizeof(linear), MADV_DONTFORK); #endif gem_userptr(fd, ptr1, sizeof(linear), 0, userptr_flags, &handle1); igt_assert(ptr1); igt_assert(handle1); ret = posix_memalign(&ptr2, PAGE_SIZE, sizeof(linear)); #ifdef MADV_DONTFORK ret |= madvise(ptr2, sizeof(linear), MADV_DONTFORK); #endif gem_userptr(fd, ptr2, sizeof(linear), 0, userptr_flags, &handle2); igt_assert(ptr2); igt_assert(handle2); memset(ptr1, 0x1, sizeof(linear)); memset(ptr2, 0x2, sizeof(linear)); igt_fork(child, 1) { copy(fd, handle1, handle2, 0); } igt_waitchildren(); gem_userptr_sync(fd, handle1); gem_userptr_sync(fd, handle2); gem_close(fd, handle1); gem_close(fd, handle2); igt_assert(memcmp(ptr1, ptr2, sizeof(linear)) == 0); #ifdef MADV_DOFORK ret = madvise(ptr1, sizeof(linear), MADV_DOFORK); igt_assert_eq(ret, 0); #endif free(ptr1); #ifdef MADV_DOFORK ret = madvise(ptr2, sizeof(linear), MADV_DOFORK); igt_assert_eq(ret, 0); #endif free(ptr2); } static int test_forbidden_ops(int fd) { struct drm_i915_gem_pread gem_pread; struct drm_i915_gem_pwrite gem_pwrite; void *ptr; int ret; uint32_t handle; char buf[PAGE_SIZE]; memset(&gem_pread, 0, sizeof(gem_pread)); memset(&gem_pwrite, 0, sizeof(gem_pwrite)); igt_assert(posix_memalign(&ptr, PAGE_SIZE, PAGE_SIZE) == 0); gem_userptr(fd, ptr, PAGE_SIZE, 0, userptr_flags, &handle); /* pread/pwrite are not always forbidden, but when they * are they should fail with EINVAL. */ gem_pread.handle = handle; gem_pread.offset = 0; gem_pread.size = PAGE_SIZE; gem_pread.data_ptr = (uintptr_t)buf; ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_PREAD, &gem_pread); igt_assert(ret == 0 || errno == EINVAL); gem_pwrite.handle = handle; gem_pwrite.offset = 0; gem_pwrite.size = PAGE_SIZE; gem_pwrite.data_ptr = (uintptr_t)buf; ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_PWRITE, &gem_pwrite); igt_assert(ret == 0 || errno == EINVAL); gem_close(fd, handle); free(ptr); return 0; } static void test_relocations(int fd) { struct drm_i915_gem_relocation_entry *reloc; struct drm_i915_gem_exec_object2 obj; struct drm_i915_gem_execbuffer2 exec; unsigned size; void *ptr; int i; size = PAGE_SIZE + ALIGN(sizeof(*reloc)*256, PAGE_SIZE); memset(&obj, 0, sizeof(obj)); igt_assert(posix_memalign(&ptr, PAGE_SIZE, size) == 0); gem_userptr(fd, ptr, size, 0, userptr_flags, &obj.handle); if (!gem_has_llc(fd)) gem_set_caching(fd, obj.handle, 0); *(uint32_t *)ptr = MI_BATCH_BUFFER_END; reloc = (typeof(reloc))((char *)ptr + PAGE_SIZE); obj.relocs_ptr = (uintptr_t)reloc; obj.relocation_count = 256; memset(reloc, 0, 256*sizeof(*reloc)); for (i = 0; i < 256; i++) { reloc[i].offset = 2048 - 4*i; reloc[i].target_handle = obj.handle; reloc[i].read_domains = I915_GEM_DOMAIN_INSTRUCTION; } memset(&exec, 0, sizeof(exec)); exec.buffers_ptr = (uintptr_t)&obj; exec.buffer_count = 1; gem_execbuf(fd, &exec); gem_sync(fd, obj.handle); gem_close(fd, obj.handle); free(ptr); } static unsigned char counter; static void (* volatile orig_sigbus)(int sig, siginfo_t *info, void *param); static volatile unsigned long sigbus_start; static volatile long sigbus_cnt = -1; static void *umap(int fd, uint32_t handle) { void *ptr; if (gem_has_llc(fd)) { ptr = gem_mmap__gtt(fd, handle, sizeof(linear), PROT_READ | PROT_WRITE); } else { uint32_t tmp = gem_create(fd, sizeof(linear)); copy(fd, tmp, handle, 0); ptr = gem_mmap__cpu(fd, tmp, 0, sizeof(linear), PROT_READ); gem_close(fd, tmp); } return ptr; } static void check_bo(int fd1, uint32_t handle1, int is_userptr, int fd2, uint32_t handle2) { unsigned char *ptr1, *ptr2; unsigned long size = sizeof(linear); ptr2 = umap(fd2, handle2); if (is_userptr) ptr1 = is_userptr > 0 ? get_handle_ptr(handle1) : ptr2; else ptr1 = umap(fd1, handle1); igt_assert(ptr1); igt_assert(ptr2); sigbus_start = (unsigned long)ptr2; igt_assert(memcmp(ptr1, ptr2, sizeof(linear)) == 0); if (gem_has_llc(fd1)) { counter++; memset(ptr1, counter, size); memset(ptr2, counter, size); } if (!is_userptr) munmap(ptr1, sizeof(linear)); munmap(ptr2, sizeof(linear)); } static int export_handle(int fd, uint32_t handle, int *outfd) { struct drm_prime_handle args; int ret; args.handle = handle; args.flags = DRM_CLOEXEC; args.fd = -1; ret = drmIoctl(fd, DRM_IOCTL_PRIME_HANDLE_TO_FD, &args); if (ret) ret = errno; *outfd = args.fd; return ret; } static void sigbus(int sig, siginfo_t *info, void *param) { unsigned long ptr = (unsigned long)info->si_addr; void *addr; if (ptr >= sigbus_start && ptr < sigbus_start + sizeof(linear)) { /* replace mapping to allow progress */ munmap((void *)sigbus_start, sizeof(linear)); addr = mmap((void *)sigbus_start, sizeof(linear), PROT_READ | PROT_WRITE, MAP_ANONYMOUS | MAP_PRIVATE | MAP_FIXED, -1, 0); igt_assert((unsigned long)addr == sigbus_start); memset(addr, counter, sizeof(linear)); sigbus_cnt++; return; } if (orig_sigbus) orig_sigbus(sig, info, param); igt_assert(0); } static int test_dmabuf(void) { int fd1, fd2; uint32_t handle, handle_import; int dma_buf_fd = -1; int ret; fd1 = drm_open_driver(DRIVER_INTEL); handle = create_userptr_bo(fd1, sizeof(linear)); memset(get_handle_ptr(handle), counter, sizeof(linear)); ret = export_handle(fd1, handle, &dma_buf_fd); if (userptr_flags & LOCAL_I915_USERPTR_UNSYNCHRONIZED && ret) { igt_assert(ret == EINVAL || ret == ENODEV); free_userptr_bo(fd1, handle); close(fd1); return 0; } else { igt_assert_eq(ret, 0); igt_assert_lte(0, dma_buf_fd); } fd2 = drm_open_driver(DRIVER_INTEL); handle_import = prime_fd_to_handle(fd2, dma_buf_fd); check_bo(fd1, handle, 1, fd2, handle_import); /* close dma_buf, check whether nothing disappears. */ close(dma_buf_fd); check_bo(fd1, handle, 1, fd2, handle_import); /* destroy userptr object and expect SIGBUS */ free_userptr_bo(fd1, handle); close(fd1); if (gem_has_llc(fd2)) { struct sigaction sigact, orig_sigact; memset(&sigact, 0, sizeof(sigact)); sigact.sa_sigaction = sigbus; sigact.sa_flags = SA_SIGINFO; ret = sigaction(SIGBUS, &sigact, &orig_sigact); igt_assert_eq(ret, 0); orig_sigbus = orig_sigact.sa_sigaction; sigbus_cnt = 0; check_bo(fd2, handle_import, -1, fd2, handle_import); igt_assert(sigbus_cnt > 0); ret = sigaction(SIGBUS, &orig_sigact, NULL); igt_assert_eq(ret, 0); } close(fd2); reset_handle_ptr(); return 0; } static int test_usage_restrictions(int fd) { void *ptr; int ret; uint32_t handle; igt_assert(posix_memalign(&ptr, PAGE_SIZE, PAGE_SIZE * 2) == 0); /* Address not aligned. */ ret = __gem_userptr(fd, (char *)ptr + 1, PAGE_SIZE, 0, userptr_flags, &handle); igt_assert_neq(ret, 0); /* Size not rounded to page size. */ ret = __gem_userptr(fd, ptr, PAGE_SIZE - 1, 0, userptr_flags, &handle); igt_assert_neq(ret, 0); /* Both wrong. */ ret = __gem_userptr(fd, (char *)ptr + 1, PAGE_SIZE - 1, 0, userptr_flags, &handle); igt_assert_neq(ret, 0); /* Read-only not supported. */ ret = __gem_userptr(fd, (char *)ptr, PAGE_SIZE, 1, userptr_flags, &handle); igt_assert_neq(ret, 0); free(ptr); return 0; } static int test_create_destroy(int fd, int time) { struct timespec start, now; uint32_t handle; void *ptr; int n; igt_fork_signal_helper(); clock_gettime(CLOCK_MONOTONIC, &start); do { for (n = 0; n < 1000; n++) { igt_assert(posix_memalign(&ptr, PAGE_SIZE, PAGE_SIZE) == 0); do_or_die(__gem_userptr(fd, ptr, PAGE_SIZE, 0, userptr_flags, &handle)); gem_close(fd, handle); free(ptr); } clock_gettime(CLOCK_MONOTONIC, &now); now.tv_sec -= time; } while (now.tv_sec < start.tv_sec || (now.tv_sec == start.tv_sec && now.tv_nsec < start.tv_nsec)); igt_stop_signal_helper(); return 0; } static int test_coherency(int fd, int count) { uint32_t *memory; uint32_t *cpu, *cpu_val; uint32_t *gpu, *gpu_val; uint32_t start = 0; int i, ret; igt_info("Using 2x%d 1MiB buffers\n", count); intel_require_memory(2*count, sizeof(linear), CHECK_RAM); ret = posix_memalign((void **)&memory, PAGE_SIZE, count*sizeof(linear)); igt_assert(ret == 0 && memory); gpu = malloc(sizeof(uint32_t)*count*4); gpu_val = gpu + count; cpu = gpu_val + count; cpu_val = cpu + count; for (i = 0; i < count; i++) { gpu[i] = create_bo(fd, start); gpu_val[i] = start; start += WIDTH*HEIGHT; } for (i = 0; i < count; i++) { cpu[i] = create_userptr(fd, start, memory+i*WIDTH*HEIGHT); cpu_val[i] = start; start += WIDTH*HEIGHT; } igt_info("Verifying initialisation...\n"); for (i = 0; i < count; i++) { check_gpu(fd, gpu[i], gpu_val[i]); check_cpu(memory+i*WIDTH*HEIGHT, cpu_val[i]); } igt_info("Cyclic blits cpu->gpu, forward...\n"); for (i = 0; i < count * 4; i++) { int src = i % count; int dst = (i + 1) % count; copy(fd, gpu[dst], cpu[src], 0); gpu_val[dst] = cpu_val[src]; } for (i = 0; i < count; i++) check_gpu(fd, gpu[i], gpu_val[i]); igt_info("Cyclic blits gpu->cpu, backward...\n"); for (i = 0; i < count * 4; i++) { int src = (i + 1) % count; int dst = i % count; copy(fd, cpu[dst], gpu[src], 0); cpu_val[dst] = gpu_val[src]; } for (i = 0; i < count; i++) { gem_userptr_sync(fd, cpu[i]); check_cpu(memory+i*WIDTH*HEIGHT, cpu_val[i]); } igt_info("Random blits...\n"); for (i = 0; i < count * 4; i++) { int src = random() % count; int dst = random() % count; if (random() & 1) { copy(fd, gpu[dst], cpu[src], 0); gpu_val[dst] = cpu_val[src]; } else { copy(fd, cpu[dst], gpu[src], 0); cpu_val[dst] = gpu_val[src]; } } for (i = 0; i < count; i++) { check_gpu(fd, gpu[i], gpu_val[i]); gem_close(fd, gpu[i]); gem_userptr_sync(fd, cpu[i]); check_cpu(memory+i*WIDTH*HEIGHT, cpu_val[i]); gem_close(fd, cpu[i]); } free(gpu); free(memory); return 0; } static struct igt_eviction_test_ops fault_ops = { .create = create_userptr_bo, .flink = flink_userptr_bo, .close = free_userptr_bo, .copy = blit, .clear = clear, }; static int can_swap(void) { unsigned long as, ram; /* Cannot swap if not enough address space */ /* FIXME: Improve check criteria. */ if (sizeof(void*) < 8) as = 3 * 1024; else as = 256 * 1024; /* Just a big number */ ram = intel_get_total_ram_mb(); if ((as - 128) < (ram - 256)) return 0; return 1; } static void test_forking_evictions(int fd, int size, int count, unsigned flags) { int trash_count; int num_threads; trash_count = intel_get_total_ram_mb() * 11 / 10; /* Use the fact test will spawn a number of child * processes meaning swapping will be triggered system * wide even if one process on it's own can't do it. */ num_threads = min(sysconf(_SC_NPROCESSORS_ONLN) * 4, 12); trash_count /= num_threads; if (count > trash_count) count = trash_count; forking_evictions(fd, &fault_ops, size, count, trash_count, flags); reset_handle_ptr(); } static void test_mlocked_evictions(int fd, int size, int count) { count = min(256, count/2); mlocked_evictions(fd, &fault_ops, size, count); reset_handle_ptr(); } static void test_swapping_evictions(int fd, int size, int count) { int trash_count; igt_skip_on_f(!can_swap(), "Not enough process address space for swapping tests.\n"); trash_count = intel_get_total_ram_mb() * 11 / 10; swapping_evictions(fd, &fault_ops, size, count, trash_count); reset_handle_ptr(); } static void test_minor_evictions(int fd, int size, int count) { minor_evictions(fd, &fault_ops, size, count); reset_handle_ptr(); } static void test_major_evictions(int fd, int size, int count) { major_evictions(fd, &fault_ops, size, count); reset_handle_ptr(); } static void test_overlap(int fd, int expected) { char *ptr; int ret; uint32_t handle, handle2; igt_assert(posix_memalign((void *)&ptr, PAGE_SIZE, PAGE_SIZE * 3) == 0); gem_userptr(fd, ptr + PAGE_SIZE, PAGE_SIZE, 0, userptr_flags, &handle); /* before, no overlap */ ret = __gem_userptr(fd, ptr, PAGE_SIZE, 0, userptr_flags, &handle2); if (ret == 0) gem_close(fd, handle2); igt_assert_eq(ret, 0); /* after, no overlap */ ret = __gem_userptr(fd, ptr + PAGE_SIZE * 2, PAGE_SIZE, 0, userptr_flags, &handle2); if (ret == 0) gem_close(fd, handle2); igt_assert_eq(ret, 0); /* exactly overlapping */ ret = __gem_userptr(fd, ptr + PAGE_SIZE, PAGE_SIZE, 0, userptr_flags, &handle2); if (ret == 0) gem_close(fd, handle2); igt_assert(ret == 0 || ret == expected); /* start overlaps */ ret = __gem_userptr(fd, ptr, PAGE_SIZE * 2, 0, userptr_flags, &handle2); if (ret == 0) gem_close(fd, handle2); igt_assert(ret == 0 || ret == expected); /* end overlaps */ ret = __gem_userptr(fd, ptr + PAGE_SIZE, PAGE_SIZE * 2, 0, userptr_flags, &handle2); if (ret == 0) gem_close(fd, handle2); igt_assert(ret == 0 || ret == expected); /* subsumes */ ret = __gem_userptr(fd, ptr, PAGE_SIZE * 3, 0, userptr_flags, &handle2); if (ret == 0) gem_close(fd, handle2); igt_assert(ret == 0 || ret == expected); gem_close(fd, handle); free(ptr); } static void test_unmap(int fd, int expected) { char *ptr, *bo_ptr; const unsigned int num_obj = 3; unsigned int i; uint32_t bo[num_obj + 1]; size_t map_size = sizeof(linear) * num_obj + (PAGE_SIZE - 1); int ret; ptr = mmap(NULL, map_size, PROT_READ | PROT_WRITE, MAP_ANONYMOUS | MAP_PRIVATE, -1, 0); igt_assert(ptr != MAP_FAILED); bo_ptr = (char *)ALIGN((unsigned long)ptr, PAGE_SIZE); for (i = 0; i < num_obj; i++, bo_ptr += sizeof(linear)) { gem_userptr(fd, bo_ptr, sizeof(linear), 0, userptr_flags, &bo[i]); } bo[num_obj] = create_bo(fd, 0); for (i = 0; i < num_obj; i++) copy(fd, bo[num_obj], bo[i], 0); ret = munmap(ptr, map_size); igt_assert_eq(ret, 0); for (i = 0; i < num_obj; i++) copy(fd, bo[num_obj], bo[i], expected); for (i = 0; i < (num_obj + 1); i++) gem_close(fd, bo[i]); } static void test_unmap_after_close(int fd) { char *ptr, *bo_ptr; const unsigned int num_obj = 3; unsigned int i; uint32_t bo[num_obj + 1]; size_t map_size = sizeof(linear) * num_obj + (PAGE_SIZE - 1); int ret; ptr = mmap(NULL, map_size, PROT_READ | PROT_WRITE, MAP_ANONYMOUS | MAP_PRIVATE, -1, 0); igt_assert(ptr != MAP_FAILED); bo_ptr = (char *)ALIGN((unsigned long)ptr, PAGE_SIZE); for (i = 0; i < num_obj; i++, bo_ptr += sizeof(linear)) { gem_userptr(fd, bo_ptr, sizeof(linear), 0, userptr_flags, &bo[i]); } bo[num_obj] = create_bo(fd, 0); for (i = 0; i < num_obj; i++) copy(fd, bo[num_obj], bo[i], 0); for (i = 0; i < (num_obj + 1); i++) gem_close(fd, bo[i]); ret = munmap(ptr, map_size); igt_assert_eq(ret, 0); } static void test_unmap_cycles(int fd, int expected) { int i; for (i = 0; i < 1000; i++) test_unmap(fd, expected); } #define MM_STRESS_LOOPS 100000 struct stress_thread_data { unsigned int stop; int exit_code; }; static void *mm_stress_thread(void *data) { struct stress_thread_data *stdata = (struct stress_thread_data *)data; void *ptr; int ret; while (!stdata->stop) { ptr = mmap(NULL, PAGE_SIZE, PROT_READ | PROT_WRITE, MAP_ANONYMOUS | MAP_PRIVATE, -1, 0); if (ptr == MAP_FAILED) { stdata->exit_code = -EFAULT; break; } ret = munmap(ptr, PAGE_SIZE); if (ret) { stdata->exit_code = errno; break; } } return NULL; } static void test_stress_mm(int fd) { int ret; pthread_t t; unsigned int loops = MM_STRESS_LOOPS; uint32_t handle; void *ptr; struct stress_thread_data stdata; memset(&stdata, 0, sizeof(stdata)); igt_assert(posix_memalign(&ptr, PAGE_SIZE, PAGE_SIZE) == 0); ret = pthread_create(&t, NULL, mm_stress_thread, &stdata); igt_assert_eq(ret, 0); while (loops--) { gem_userptr(fd, ptr, PAGE_SIZE, 0, userptr_flags, &handle); gem_close(fd, handle); } free(ptr); stdata.stop = 1; ret = pthread_join(t, NULL); igt_assert_eq(ret, 0); igt_assert_eq(stdata.exit_code, 0); } struct userptr_close_thread_data { int fd; void *ptr; bool overlap; bool stop; pthread_mutex_t mutex; }; static void *mm_userptr_close_thread(void *data) { struct userptr_close_thread_data *t = (struct userptr_close_thread_data *)data; int num_handles = t->overlap ? 2 : 1; uint32_t handle[num_handles]; /* Be pedantic and enforce the required memory barriers */ pthread_mutex_lock(&t->mutex); while (!t->stop) { pthread_mutex_unlock(&t->mutex); for (int i = 0; i < num_handles; i++) gem_userptr(t->fd, t->ptr, PAGE_SIZE, 0, userptr_flags, &handle[i]); for (int i = 0; i < num_handles; i++) gem_close(t->fd, handle[i]); pthread_mutex_lock(&t->mutex); } pthread_mutex_unlock(&t->mutex); return NULL; } static void test_invalidate_close_race(int fd, bool overlap) { pthread_t t; unsigned int loops = MM_STRESS_LOOPS; struct userptr_close_thread_data t_data; memset(&t_data, 0, sizeof(t_data)); t_data.fd = fd; t_data.overlap = overlap; igt_assert(posix_memalign(&t_data.ptr, PAGE_SIZE, PAGE_SIZE) == 0); pthread_mutex_init(&t_data.mutex, NULL); igt_assert(pthread_create(&t, NULL, mm_userptr_close_thread, &t_data) == 0); while (loops--) { mprotect(t_data.ptr, PAGE_SIZE, PROT_READ | PROT_WRITE | PROT_EXEC); mprotect(t_data.ptr, PAGE_SIZE, PROT_READ | PROT_WRITE); } pthread_mutex_lock(&t_data.mutex); t_data.stop = 1; pthread_mutex_unlock(&t_data.mutex); pthread_join(t, NULL); pthread_mutex_destroy(&t_data.mutex); free(t_data.ptr); } uint64_t total_ram; uint64_t aperture_size; int fd, count; int main(int argc, char **argv) { int size = sizeof(linear); igt_subtest_init(argc, argv); igt_fixture { int ret; fd = drm_open_driver(DRIVER_INTEL); igt_assert(fd >= 0); ret = has_userptr(fd); igt_skip_on_f(ret == 0, "No userptr support - %s (%d)\n", strerror(errno), ret); size = sizeof(linear); aperture_size = gem_aperture_size(fd); igt_info("Aperture size is %lu MiB\n", (long)(aperture_size / (1024*1024))); if (argc > 1) count = atoi(argv[1]); if (count == 0) count = 2 * aperture_size / (1024*1024) / 3; total_ram = intel_get_total_ram_mb(); igt_info("Total RAM is %'llu MiB\n", (long long)total_ram); if (count > total_ram * 3 / 4) { count = intel_get_total_ram_mb() * 3 / 4; igt_info("Not enough RAM to run test, reducing buffer count.\n"); } } igt_subtest("input-checking") test_input_checking(fd); igt_subtest("usage-restrictions") test_usage_restrictions(fd); igt_subtest("invalid-null-pointer") test_invalid_null_pointer(fd); igt_subtest("invalid-gtt-mapping") test_invalid_gtt_mapping(fd); igt_subtest("forked-access") test_forked_access(fd); igt_subtest("forbidden-operations") test_forbidden_ops(fd); igt_subtest("relocations") test_relocations(fd); igt_info("Testing unsynchronized mappings...\n"); gem_userptr_test_unsynchronized(); igt_subtest("create-destroy-unsync") test_create_destroy(fd, 5); igt_subtest("unsync-overlap") test_overlap(fd, 0); igt_subtest("unsync-unmap") test_unmap(fd, 0); igt_subtest("unsync-unmap-cycles") test_unmap_cycles(fd, 0); igt_subtest("unsync-unmap-after-close") test_unmap_after_close(fd); igt_subtest("coherency-unsync") test_coherency(fd, count); igt_subtest("dmabuf-unsync") test_dmabuf(); for (unsigned flags = 0; flags < ALL_FORKING_EVICTIONS + 1; flags++) { igt_subtest_f("forked-unsync%s%s%s-%s", flags & FORKING_EVICTIONS_SWAPPING ? "-swapping" : "", flags & FORKING_EVICTIONS_DUP_DRMFD ? "-multifd" : "", flags & FORKING_EVICTIONS_MEMORY_PRESSURE ? "-mempressure" : "", flags & FORKING_EVICTIONS_INTERRUPTIBLE ? "interruptible" : "normal") { test_forking_evictions(fd, size, count, flags); } } igt_subtest("mlocked-unsync-normal") test_mlocked_evictions(fd, size, count); igt_subtest("swapping-unsync-normal") test_swapping_evictions(fd, size, count); igt_subtest("minor-unsync-normal") test_minor_evictions(fd, size, count); igt_subtest("major-unsync-normal") { size = 200 * 1024 * 1024; count = (gem_aperture_size(fd) / size) + 2; test_major_evictions(fd, size, count); } igt_fixture { size = sizeof(linear); count = 2 * gem_aperture_size(fd) / (1024*1024) / 3; if (count > total_ram * 3 / 4) count = intel_get_total_ram_mb() * 3 / 4; } igt_fork_signal_helper(); igt_subtest("mlocked-unsync-interruptible") test_mlocked_evictions(fd, size, count); igt_subtest("swapping-unsync-interruptible") test_swapping_evictions(fd, size, count); igt_subtest("minor-unsync-interruptible") test_minor_evictions(fd, size, count); igt_subtest("major-unsync-interruptible") { size = 200 * 1024 * 1024; count = (gem_aperture_size(fd) / size) + 2; test_major_evictions(fd, size, count); } igt_stop_signal_helper(); igt_info("Testing synchronized mappings...\n"); igt_fixture { size = sizeof(linear); count = 2 * gem_aperture_size(fd) / (1024*1024) / 3; if (count > total_ram * 3 / 4) count = intel_get_total_ram_mb() * 3 / 4; } gem_userptr_test_synchronized(); igt_subtest("process-exit") test_process_exit(fd, 0); igt_subtest("process-exit-gtt") test_process_exit(fd, PE_GTT_MAP); igt_subtest("process-exit-busy") test_process_exit(fd, PE_BUSY); igt_subtest("process-exit-gtt-busy") test_process_exit(fd, PE_GTT_MAP | PE_BUSY); igt_subtest("create-destroy-sync") test_create_destroy(fd, 5); igt_subtest("sync-overlap") test_overlap(fd, EINVAL); igt_subtest("sync-unmap") test_unmap(fd, EFAULT); igt_subtest("sync-unmap-cycles") test_unmap_cycles(fd, EFAULT); igt_subtest("sync-unmap-after-close") test_unmap_after_close(fd); igt_subtest("stress-mm") test_stress_mm(fd); igt_subtest("stress-mm-invalidate-close") test_invalidate_close_race(fd, false); igt_subtest("stress-mm-invalidate-close-overlap") test_invalidate_close_race(fd, true); igt_subtest("coherency-sync") test_coherency(fd, count); igt_subtest("dmabuf-sync") test_dmabuf(); for (unsigned flags = 0; flags < ALL_FORKING_EVICTIONS + 1; flags++) { igt_subtest_f("forked-sync%s%s%s-%s", flags & FORKING_EVICTIONS_SWAPPING ? "-swapping" : "", flags & FORKING_EVICTIONS_DUP_DRMFD ? "-multifd" : "", flags & FORKING_EVICTIONS_MEMORY_PRESSURE ? "-mempressure" : "", flags & FORKING_EVICTIONS_INTERRUPTIBLE ? "interruptible" : "normal") { test_forking_evictions(fd, size, count, flags); } } igt_subtest("mlocked-normal-sync") test_mlocked_evictions(fd, size, count); igt_subtest("swapping-normal-sync") test_swapping_evictions(fd, size, count); igt_subtest("minor-normal-sync") test_minor_evictions(fd, size, count); igt_subtest("major-normal-sync") { size = 200 * 1024 * 1024; count = (gem_aperture_size(fd) / size) + 2; test_major_evictions(fd, size, count); } igt_fixture { size = 1024 * 1024; count = 2 * gem_aperture_size(fd) / (1024*1024) / 3; if (count > total_ram * 3 / 4) count = intel_get_total_ram_mb() * 3 / 4; } igt_fork_signal_helper(); igt_subtest("mlocked-sync-interruptible") test_mlocked_evictions(fd, size, count); igt_subtest("swapping-sync-interruptible") test_swapping_evictions(fd, size, count); igt_subtest("minor-sync-interruptible") test_minor_evictions(fd, size, count); igt_subtest("major-sync-interruptible") { size = 200 * 1024 * 1024; count = (gem_aperture_size(fd) / size) + 2; test_major_evictions(fd, size, count); } igt_stop_signal_helper(); igt_subtest("access-control") test_access_control(fd); igt_exit(); } intel-gpu-tools-1.14/tests/gem_ctx_thrash.c0000644000175000017500000002312412665336131015737 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include "igt.h" #include #include #include #include #include #include #include IGT_TEST_DESCRIPTION("Fill the Gobal GTT with context objects and VMs\n"); #define NUM_THREADS (2*sysconf(_SC_NPROCESSORS_ONLN)) static void xchg_int(void *array, unsigned i, unsigned j) { int *A = array; igt_swap(A[i], A[j]); } static unsigned get_num_contexts(int fd) { uint64_t ggtt_size; unsigned size; unsigned count; /* Compute the number of contexts we can allocate to fill the GGTT */ ggtt_size = gem_global_aperture_size(fd); size = 64 << 10; /* Most gen require at least 64k for ctx */ count = 3 * (ggtt_size / size) / 2; igt_info("Creating %lld contexts (assuming of size %lld)\n", (long long)count, (long long)size); intel_require_memory(count, size, CHECK_RAM | CHECK_SWAP); return count; } static int has_engine(int fd, const struct intel_execution_engine *e, uint32_t ctx) { uint32_t bbe = MI_BATCH_BUFFER_END; struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 exec; int ret; memset(&exec, 0, sizeof(exec)); exec.handle = gem_create(fd, 4096); gem_write(fd, exec.handle, 0, &bbe, sizeof(bbe)); memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)&exec; execbuf.buffer_count = 1; execbuf.flags = e->exec_id | e->flags; execbuf.rsvd1 = ctx; ret = __gem_execbuf(fd, &execbuf); gem_close(fd, exec.handle); return ret; } static void single(const char *name, bool all_engines) { struct drm_i915_gem_exec_object2 *obj; struct drm_i915_gem_relocation_entry *reloc; const struct intel_execution_engine *e; unsigned engines[16]; uint64_t size; uint32_t *ctx, *map, scratch; unsigned num_ctx; int fd, gen, num_engines; #define MAX_LOOP 16 fd = drm_open_driver_master(DRIVER_INTEL); gen = intel_gen(intel_get_drm_devid(fd)); num_ctx = get_num_contexts(fd); num_engines = 0; if (all_engines) { for (e = intel_execution_engines; e->name; e++) { if (e->exec_id == 0) continue; if (has_engine(fd, e, 0)) continue; if (e->exec_id == I915_EXEC_BSD) { int is_bsd2 = e->flags != 0; if (gem_has_bsd2(fd) != is_bsd2) continue; } igt_require(has_engine(fd, e, 1) == -ENOENT); engines[num_engines++] = e->exec_id | e->flags; if (num_engines == ARRAY_SIZE(engines)) break; } } else engines[num_engines++] = 0; size = ALIGN(num_ctx * sizeof(uint32_t), 4096); scratch = gem_create(fd, ALIGN(num_ctx * sizeof(uint32_t), 4096)); gem_set_caching(fd, scratch, I915_CACHING_CACHED); obj = calloc(num_ctx, 2 * sizeof(*obj)); reloc = calloc(num_ctx, sizeof(*reloc)); ctx = malloc(num_ctx * sizeof(uint32_t)); igt_assert(ctx); for (unsigned n = 0; n < num_ctx; n++) { ctx[n] = gem_context_create(fd); obj[2*n + 0].handle = scratch; reloc[n].target_handle = scratch; reloc[n].presumed_offset = 0; reloc[n].offset = sizeof(uint32_t); reloc[n].delta = n * sizeof(uint32_t); reloc[n].read_domains = I915_GEM_DOMAIN_INSTRUCTION; reloc[n].write_domain = 0; /* lies! */ if (gen >= 4 && gen < 8) reloc[n].offset += sizeof(uint32_t); obj[2*n + 1].relocs_ptr = (uintptr_t)&reloc[n]; obj[2*n + 1].relocation_count = 1; } map = gem_mmap__cpu(fd, scratch, 0, size, PROT_WRITE); for (unsigned loop = 1; loop <= MAX_LOOP; loop <<= 1) { unsigned count = loop * num_ctx; uint32_t *all; all = malloc(count * sizeof(uint32_t)); for (unsigned n = 0; n < count; n++) all[n] = ctx[n % num_ctx]; igt_permute_array(all, count, xchg_int); for (unsigned n = 0; n < count; n++) { struct drm_i915_gem_execbuffer2 execbuf; unsigned r = n % num_ctx; uint64_t offset = reloc[r].presumed_offset + reloc[r].delta; uint32_t handle = gem_create(fd, 4096); uint32_t buf[16]; int i; buf[i = 0] = MI_STORE_DWORD_IMM; if (gen >= 8) { buf[++i] = offset; buf[++i] = offset >> 32; } else if (gen >= 4) { if (gen < 6) buf[i] |= 1 << 22; buf[++i] = 0; buf[++i] = offset; } else { buf[i]--; buf[++i] = offset; } buf[++i] = all[n]; buf[++i] = MI_BATCH_BUFFER_END; gem_write(fd, handle, 0, buf, sizeof(buf)); obj[2*r + 1].handle = handle; memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)&obj[2*r]; execbuf.buffer_count = 2; execbuf.flags = engines[n % num_engines]; execbuf.rsvd1 = all[n]; gem_execbuf(fd, &execbuf); gem_close(fd, handle); } /* Note we lied about the write-domain when writing from the * GPU (in order to avoid inter-ring synchronisation), so now * we have to force the synchronisation here. */ gem_set_domain(fd, scratch, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU); for (unsigned n = count - num_ctx; n < count; n++) igt_assert_eq(map[n % num_ctx], all[n]); free(all); igt_progress(name, loop, MAX_LOOP); } munmap(map, size); free(ctx); close(fd); } static void processes(void) { const struct intel_execution_engine *e; unsigned engines[16]; int num_engines; struct rlimit rlim; unsigned num_ctx; uint32_t name; int fd, *fds; fd = drm_open_driver(DRIVER_INTEL); num_ctx = get_num_contexts(fd); num_engines = 0; for (e = intel_execution_engines; e->name; e++) { if (e->exec_id == 0) continue; if (has_engine(fd, e, 0)) continue; if (e->exec_id == I915_EXEC_BSD) { int is_bsd2 = e->flags != 0; if (gem_has_bsd2(fd) != is_bsd2) continue; } engines[num_engines++] = e->exec_id | e->flags; if (num_engines == ARRAY_SIZE(engines)) break; } /* tweak rlimits to allow us to create this many files */ igt_assert(getrlimit(RLIMIT_NOFILE, &rlim) == 0); if (rlim.rlim_cur < ALIGN(num_ctx + 1024, 1024)) { rlim.rlim_cur = ALIGN(num_ctx + 1024, 1024); if (rlim.rlim_cur > rlim.rlim_max) rlim.rlim_max = rlim.rlim_cur; igt_assert(setrlimit(RLIMIT_NOFILE, &rlim) == 0); } fds = malloc(num_ctx * sizeof(int)); igt_assert(fds); for (unsigned n = 0; n < num_ctx; n++) { fds[n] = drm_open_driver(DRIVER_INTEL); if (fds[n] == -1) { int err = errno; for (unsigned i = n; i--; ) close(fds[i]); free(fds); errno = err; igt_assert_f(0, "failed to create context %lld/%lld\n", (long long)n, (long long)num_ctx); } } if (1) { uint32_t bbe = MI_BATCH_BUFFER_END; name = gem_create(fd, 4096); gem_write(fd, name, 0, &bbe, sizeof(bbe)); name = gem_flink(fd, name); } igt_fork(child, NUM_THREADS) { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 obj; memset(&obj, 0, sizeof(obj)); memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)&obj; execbuf.buffer_count = 1; igt_permute_array(fds, num_ctx, xchg_int); for (unsigned n = 0; n < num_ctx; n++) { obj.handle = gem_open(fds[n], name); execbuf.flags = engines[n % num_engines]; gem_execbuf(fds[n], &execbuf); gem_close(fds[n], obj.handle); } } igt_waitchildren(); for (unsigned n = 0; n < num_ctx; n++) close(fds[n]); free(fds); close(fd); } struct thread { int fd; uint32_t *all_ctx; unsigned num_ctx; uint32_t batch; }; static void *thread(void *data) { struct thread *t = data; struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 obj; uint32_t *ctx; memset(&obj, 0, sizeof(obj)); obj.handle = t->batch; memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)&obj; execbuf.buffer_count = 1; ctx = malloc(t->num_ctx * sizeof(uint32_t)); igt_assert(ctx); memcpy(ctx, t->all_ctx, t->num_ctx * sizeof(uint32_t)); igt_permute_array(ctx, t->num_ctx, xchg_int); for (unsigned n = 0; n < t->num_ctx; n++) { execbuf.rsvd1 = ctx[n]; gem_execbuf(t->fd, &execbuf); } free(ctx); return NULL; } static void threads(void) { uint32_t bbe = MI_BATCH_BUFFER_END; pthread_t threads[NUM_THREADS]; struct thread data; data.fd = drm_open_driver_render(DRIVER_INTEL); data.num_ctx = get_num_contexts(data.fd); data.all_ctx = malloc(data.num_ctx * sizeof(uint32_t)); igt_assert(data.all_ctx); for (unsigned n = 0; n < data.num_ctx; n++) data.all_ctx[n] = gem_context_create(data.fd); data.batch = gem_create(data.fd, 4096); gem_write(data.fd, data.batch, 0, &bbe, sizeof(bbe)); for (int n = 0; n < NUM_THREADS; n++) pthread_create(&threads[n], NULL, thread, &data); for (int n = 0; n < NUM_THREADS; n++) pthread_join(threads[n], NULL); close(data.fd); } igt_main { igt_skip_on_simulation(); igt_subtest("single") single("single", false); igt_subtest("engines") single("engines", true); igt_subtest("processes") processes(); igt_subtest("threads") threads(); } intel-gpu-tools-1.14/tests/gem_madvise.c0000644000175000017500000000767412665336131015234 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include "drm.h" IGT_TEST_DESCRIPTION("Checks that the kernel reports EFAULT when trying to use" " purged bo."); #define OBJECT_SIZE (1024*1024) /* Testcase: checks that the kernel reports EFAULT when trying to use purged bo * */ static jmp_buf jmp; static void __attribute__((noreturn)) sigtrap(int sig) { longjmp(jmp, sig); } static void dontneed_before_mmap(void) { int fd = drm_open_driver(DRIVER_INTEL); uint32_t handle; char *ptr; handle = gem_create(fd, OBJECT_SIZE); gem_madvise(fd, handle, I915_MADV_DONTNEED); ptr = __gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_READ | PROT_WRITE); igt_assert(ptr == NULL); igt_assert(errno == EFAULT); close(fd); } static void dontneed_after_mmap(void) { int fd = drm_open_driver(DRIVER_INTEL); uint32_t handle; char *ptr; handle = gem_create(fd, OBJECT_SIZE); ptr = __gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_READ | PROT_WRITE); igt_assert(ptr); gem_madvise(fd, handle, I915_MADV_DONTNEED); close(fd); signal(SIGBUS, sigtrap); switch (setjmp(jmp)) { case SIGBUS: break; case 0: *ptr = 0; default: igt_assert(!"reached"); break; } munmap(ptr, OBJECT_SIZE); signal(SIGBUS, SIG_DFL); } static void dontneed_before_pwrite(void) { int fd = drm_open_driver(DRIVER_INTEL); uint32_t buf[] = { MI_BATCH_BUFFER_END, 0 }; struct drm_i915_gem_pwrite gem_pwrite; gem_pwrite.handle = gem_create(fd, OBJECT_SIZE); gem_pwrite.offset = 0; gem_pwrite.size = sizeof(buf); gem_pwrite.data_ptr = (uintptr_t)buf; gem_madvise(fd, gem_pwrite.handle, I915_MADV_DONTNEED); igt_assert(drmIoctl(fd, DRM_IOCTL_I915_GEM_PWRITE, &gem_pwrite)); igt_assert(errno == EFAULT); gem_close(fd, gem_pwrite.handle); close(fd); } static void dontneed_before_exec(void) { int fd = drm_open_driver(DRIVER_INTEL); struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 exec; uint32_t buf[] = { MI_BATCH_BUFFER_END, 0 }; memset(&execbuf, 0, sizeof(execbuf)); memset(&exec, 0, sizeof(exec)); exec.handle = gem_create(fd, OBJECT_SIZE); gem_write(fd, exec.handle, 0, buf, sizeof(buf)); gem_madvise(fd, exec.handle, I915_MADV_DONTNEED); execbuf.buffers_ptr = (uintptr_t)&exec; execbuf.buffer_count = 1; execbuf.batch_len = sizeof(buf); gem_execbuf(fd, &execbuf); gem_close(fd, exec.handle); close(fd); } igt_main { igt_skip_on_simulation(); igt_subtest("dontneed-before-mmap") dontneed_before_mmap(); igt_subtest("dontneed-after-mmap") dontneed_after_mmap(); igt_subtest("dontneed-before-pwrite") dontneed_before_pwrite(); igt_subtest("dontneed-before-exec") dontneed_before_exec(); } intel-gpu-tools-1.14/tests/testdisplay.c0000644000175000017500000004676612665336131015326 00000000000000/* * Copyright 2010 Intel Corporation * Jesse Barnes * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ /* * This program is intended for testing of display functionality. It should * allow for testing of * - hotplug * - mode setting * - clone & twin modes * - panel fitting * - test patterns & pixel generators * Additional programs can test the detected outputs against VBT provided * device lists (both docked & undocked). * * TODO: * - pixel generator in transcoder * - test pattern reg in pipe * - test patterns on outputs (e.g. TV) * - handle hotplug (leaks crtcs, can't handle clones) * - allow mode force * - expose output specific controls * - e.g. DDC-CI brightness * - HDMI controls * - panel brightness * - DP commands (e.g. poweroff) * - verify outputs against VBT/physical connectors */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "testdisplay.h" #include #include #define SUBTEST_OPTS 1 #define HELP_DESCRIPTION 2 #define Yb_OPT 3 #define Yf_OPT 4 static int tio_fd; struct termios saved_tio; drmModeRes *resources; int drm_fd, modes; int test_all_modes = 0, test_preferred_mode = 0, force_mode = 0, test_plane, test_stereo_modes; uint64_t tiling = LOCAL_DRM_FORMAT_MOD_NONE; int sleep_between_modes = 5; int do_dpms = 0; /* This aliases to DPMS_ON */ uint32_t depth = 24, stride, bpp; int qr_code = 0; int specified_mode_num = -1, specified_disp_id = -1; drmModeModeInfo force_timing; int crtc_x, crtc_y, crtc_w, crtc_h, width, height; unsigned int plane_fb_id; unsigned int plane_crtc_id; unsigned int plane_id; int plane_width, plane_height; static const uint32_t SPRITE_COLOR_KEY = 0x00aaaaaa; /* * Mode setting with the kernel interfaces is a bit of a chore. * First you have to find the connector in question and make sure the * requested mode is available. * Then you need to find the encoder attached to that connector so you * can bind it with a free crtc. */ struct connector { uint32_t id; int mode_valid; drmModeModeInfo mode; drmModeEncoder *encoder; drmModeConnector *connector; int crtc; int crtc_idx; int pipe; }; static void dump_connectors_fd(int drmfd) { int i, j; drmModeRes *mode_resources = drmModeGetResources(drmfd); if (!mode_resources) { igt_warn("drmModeGetResources failed: %s\n", strerror(errno)); return; } igt_info("Connectors:\n"); igt_info("id\tencoder\tstatus\t\ttype\tsize (mm)\tmodes\n"); for (i = 0; i < mode_resources->count_connectors; i++) { drmModeConnector *connector; connector = drmModeGetConnectorCurrent(drmfd, mode_resources->connectors[i]); if (!connector) { igt_warn("could not get connector %i: %s\n", mode_resources->connectors[i], strerror(errno)); continue; } igt_info("%d\t%d\t%s\t%s\t%dx%d\t\t%d\n", connector->connector_id, connector->encoder_id, kmstest_connector_status_str(connector->connection), kmstest_connector_type_str(connector->connector_type), connector->mmWidth, connector->mmHeight, connector->count_modes); if (!connector->count_modes) continue; igt_info(" modes:\n"); igt_info(" name refresh (Hz) hdisp hss hse htot vdisp ""vss vse vtot flags type clock\n"); for (j = 0; j < connector->count_modes; j++){ igt_info("[%d]", j); kmstest_dump_mode(&connector->modes[j]); } drmModeFreeConnector(connector); } igt_info("\n"); drmModeFreeResources(mode_resources); } static void dump_crtcs_fd(int drmfd) { int i; drmModeRes *mode_resources = drmModeGetResources(drmfd); igt_info("CRTCs:\n"); igt_info("id\tfb\tpos\tsize\n"); for (i = 0; i < mode_resources->count_crtcs; i++) { drmModeCrtc *crtc; crtc = drmModeGetCrtc(drmfd, mode_resources->crtcs[i]); if (!crtc) { igt_warn("could not get crtc %i: %s\n", mode_resources->crtcs[i], strerror(errno)); continue; } igt_info("%d\t%d\t(%d,%d)\t(%dx%d)\n", crtc->crtc_id, crtc->buffer_id, crtc->x, crtc->y, crtc->width, crtc->height); kmstest_dump_mode(&crtc->mode); drmModeFreeCrtc(crtc); } igt_info("\n"); drmModeFreeResources(mode_resources); } static void dump_info(void) { dump_connectors_fd(drm_fd); dump_crtcs_fd(drm_fd); } static void connector_find_preferred_mode(uint32_t connector_id, unsigned long crtc_idx_mask, int mode_num, struct connector *c, bool probe) { struct kmstest_connector_config config; bool ret; if (probe) ret = kmstest_probe_connector_config(drm_fd, connector_id, crtc_idx_mask, &config); else ret = kmstest_get_connector_config(drm_fd, connector_id, crtc_idx_mask, &config); if (!ret) { c->mode_valid = 0; return; } c->connector = config.connector; c->encoder = config.encoder; c->crtc = config.crtc->crtc_id; c->crtc_idx = config.crtc_idx; c->pipe = config.pipe; if (mode_num != -1) { igt_assert(mode_num < config.connector->count_modes); c->mode = config.connector->modes[mode_num]; } else { c->mode = config.default_mode; } c->mode_valid = 1; } static void paint_color_key(struct igt_fb *fb_info) { int i, j; uint32_t *fb_ptr; fb_ptr = gem_mmap__gtt(drm_fd, fb_info->gem_handle, fb_info->size, PROT_READ | PROT_WRITE); for (i = crtc_y; i < crtc_y + crtc_h; i++) for (j = crtc_x; j < crtc_x + crtc_w; j++) { uint32_t offset; offset = (i * fb_info->stride / 4) + j; fb_ptr[offset] = SPRITE_COLOR_KEY; } munmap(fb_ptr, fb_info->size); } static void paint_image(cairo_t *cr, const char *file) { int img_x, img_y, img_w, img_h; img_y = height * (0.10 ); img_h = height * 0.08 * 4; img_w = img_h; img_x = (width / 2) - (img_w / 2); igt_paint_image(cr, file, img_x, img_y, img_h, img_w); } static void paint_output_info(struct connector *c, struct igt_fb *fb) { cairo_t *cr = igt_get_cairo_ctx(drm_fd, fb); int l_width = fb->width; int l_height = fb->height; double str_width; double x, y, top_y; double max_width; int i; cairo_move_to(cr, l_width / 2, l_height / 2); /* Print connector and mode name */ cairo_set_font_size(cr, 48); igt_cairo_printf_line(cr, align_hcenter, 10, "%s", kmstest_connector_type_str(c->connector->connector_type)); cairo_set_font_size(cr, 36); str_width = igt_cairo_printf_line(cr, align_hcenter, 10, "%s @ %dHz on %s encoder", c->mode.name, c->mode.vrefresh, kmstest_encoder_type_str(c->encoder->encoder_type)); cairo_rel_move_to(cr, -str_width / 2, 0); /* List available modes */ cairo_set_font_size(cr, 18); str_width = igt_cairo_printf_line(cr, align_left, 10, "Available modes:"); cairo_rel_move_to(cr, str_width, 0); cairo_get_current_point(cr, &x, &top_y); max_width = 0; for (i = 0; i < c->connector->count_modes; i++) { cairo_get_current_point(cr, &x, &y); if (y >= l_height) { x += max_width + 10; max_width = 0; cairo_move_to(cr, x, top_y); } str_width = igt_cairo_printf_line(cr, align_right, 10, "%s @ %dHz", c->connector->modes[i].name, c->connector->modes[i].vrefresh); if (str_width > max_width) max_width = str_width; } if (qr_code) paint_image(cr, "pass.png"); igt_assert(!cairo_status(cr)); cairo_destroy(cr); } static void sighandler(int signo) { return; } static void set_single(void) { int sigs[] = { SIGUSR1 }; struct sigaction sa; sa.sa_handler = sighandler; sigemptyset(&sa.sa_mask); igt_warn_on_f(sigaction(sigs[0], &sa, NULL) == -1, "Could not set signal handler"); } static void set_mode(struct connector *c) { unsigned int fb_id = 0; struct igt_fb fb_info[2] = { }; int j, test_mode_num, current_fb = 0, old_fb = -1; test_mode_num = 1; if (force_mode){ memcpy( &c->mode, &force_timing, sizeof(force_timing)); c->mode.vrefresh =(force_timing.clock*1e3)/(force_timing.htotal*force_timing.vtotal); c->mode_valid = 1; sprintf(c->mode.name, "%dx%d", force_timing.hdisplay, force_timing.vdisplay); } else if (test_all_modes) test_mode_num = c->connector->count_modes; for (j = 0; j < test_mode_num; j++) { if (test_all_modes) c->mode = c->connector->modes[j]; /* set_mode() only tests 2D modes */ if (c->mode.flags & DRM_MODE_FLAG_3D_MASK) continue; if (!c->mode_valid) continue; width = c->mode.hdisplay; height = c->mode.vdisplay; fb_id = igt_create_pattern_fb(drm_fd, width, height, igt_bpp_depth_to_drm_format(bpp, depth), tiling, &fb_info[current_fb]); paint_output_info(c, &fb_info[current_fb]); paint_color_key(&fb_info[current_fb]); igt_info("CRTC(%u):[%d]", c->crtc, j); kmstest_dump_mode(&c->mode); if (drmModeSetCrtc(drm_fd, c->crtc, fb_id, 0, 0, &c->id, 1, &c->mode)) { igt_warn("failed to set mode (%dx%d@%dHz): %s\n", width, height, c->mode.vrefresh, strerror(errno)); igt_remove_fb(drm_fd, &fb_info[current_fb]); continue; } if (old_fb != -1) igt_remove_fb(drm_fd, &fb_info[old_fb]); old_fb = current_fb; current_fb = 1 - current_fb; if (sleep_between_modes && test_all_modes && !qr_code) sleep(sleep_between_modes); if (do_dpms) { kmstest_set_connector_dpms(drm_fd, c->connector, do_dpms); sleep(sleep_between_modes); kmstest_set_connector_dpms(drm_fd, c->connector, DRM_MODE_DPMS_ON); } if (qr_code){ set_single(); pause(); } } if (test_all_modes && old_fb != -1) igt_remove_fb(drm_fd, &fb_info[old_fb]); drmModeFreeEncoder(c->encoder); drmModeFreeConnector(c->connector); } static void do_set_stereo_mode(struct connector *c) { uint32_t fb_id; fb_id = igt_create_stereo_fb(drm_fd, &c->mode, igt_bpp_depth_to_drm_format(bpp, depth), tiling); igt_warn_on_f(drmModeSetCrtc(drm_fd, c->crtc, fb_id, 0, 0, &c->id, 1, &c->mode), "failed to set mode (%dx%d@%dHz): %s\n", width, height, c->mode.vrefresh, strerror(errno)); } static void set_stereo_mode(struct connector *c) { int i, n; if (specified_mode_num != -1) n = 1; else n = c->connector->count_modes; for (i = 0; i < n; i++) { if (specified_mode_num == -1) c->mode = c->connector->modes[i]; if (!c->mode_valid) continue; if (!(c->mode.flags & DRM_MODE_FLAG_3D_MASK)) continue; igt_info("CRTC(%u): [%d]", c->crtc, i); kmstest_dump_mode(&c->mode); do_set_stereo_mode(c); if (qr_code) { set_single(); pause(); } else if (sleep_between_modes) sleep(sleep_between_modes); if (do_dpms) { kmstest_set_connector_dpms(drm_fd, c->connector, DRM_MODE_DPMS_OFF); sleep(sleep_between_modes); kmstest_set_connector_dpms(drm_fd, c->connector, DRM_MODE_DPMS_ON); } } drmModeFreeEncoder(c->encoder); drmModeFreeConnector(c->connector); } /* * Re-probe outputs and light up as many as possible. * * On Intel, we have two CRTCs that we can drive independently with * different timings and scanout buffers. * * Each connector has a corresponding encoder, except in the SDVO case * where an encoder may have multiple connectors. */ int update_display(bool probe) { struct connector *connectors; int c; resources = drmModeGetResources(drm_fd); if (!resources) { igt_warn("drmModeGetResources failed: %s\n", strerror(errno)); return 0; } connectors = calloc(resources->count_connectors, sizeof(struct connector)); if (!connectors) return 0; if (test_preferred_mode || test_all_modes || force_mode || specified_disp_id != -1) { unsigned long crtc_idx_mask = -1UL; /* Find any connected displays */ for (c = 0; c < resources->count_connectors; c++) { struct connector *connector = &connectors[c]; connector->id = resources->connectors[c]; if (specified_disp_id != -1 && connector->id != specified_disp_id) continue; connector_find_preferred_mode(connector->id, crtc_idx_mask, specified_mode_num, connector, probe); if (!connector->mode_valid) continue; set_mode(connector); if (test_preferred_mode || force_mode || specified_mode_num != -1) crtc_idx_mask &= ~(1 << connector->crtc_idx); } } if (test_stereo_modes) { for (c = 0; c < resources->count_connectors; c++) { struct connector *connector = &connectors[c]; connector->id = resources->connectors[c]; if (specified_disp_id != -1 && connector->id != specified_disp_id) continue; connector_find_preferred_mode(connector->id, -1UL, specified_mode_num, connector, probe); if (!connector->mode_valid) continue; set_stereo_mode(connector); } } free(connectors); drmModeFreeResources(resources); return 1; } static char optstr[] = "3hiaf:s:d:p:mrto:j:y"; static void __attribute__((noreturn)) usage(char *name, char opt) { igt_info("usage: %s [-hiasdpmtf]\n", name); igt_info("\t-i\tdump info\n"); igt_info("\t-a\ttest all modes\n"); igt_info("\t-s\t\tsleep between each mode test\n"); igt_info("\t-d\t\tbit depth of scanout buffer\n"); igt_info("\t-p\t,, test overlay plane\n"); igt_info("\t-m\ttest the preferred mode\n"); igt_info("\t-3\ttest all 3D modes\n"); igt_info("\t-t\tuse a tiled framebuffer\n"); igt_info("\t-j\tdo dpms off, optional arg to select dpms leve (1-3)\n"); igt_info("\t-r\tprint a QR code on the screen whose content is \"pass\" for the automatic test\n"); igt_info("\t-o\t,\tonly test specified mode on the specified display\n"); igt_info("\t-f\t,,,,,\n"); igt_info("\t\t,,,\n"); igt_info("\t\ttest force mode\n"); igt_info("\tDefault is to test all modes.\n"); exit((opt != 'h') ? -1 : 0); } #define dump_resource(res) if (res) dump_##res() static void __attribute__((noreturn)) cleanup_and_exit(int ret) { close(drm_fd); exit(ret); } static gboolean input_event(GIOChannel *source, GIOCondition condition, gpointer data) { gchar buf[2]; gsize count; count = read(g_io_channel_unix_get_fd(source), buf, sizeof(buf)); if (buf[0] == 'q' && (count == 1 || buf[1] == '\n')) { cleanup_and_exit(0); } return TRUE; } static void enter_exec_path( char **argv ) { char *exec_path = NULL; char *pos = NULL; short len_path = 0; int ret; len_path = strlen( argv[0] ); exec_path = (char*) malloc(len_path); memcpy(exec_path, argv[0], len_path); pos = strrchr(exec_path, '/'); if (pos != NULL) *(pos+1) = '\0'; ret = chdir(exec_path); igt_assert_eq(ret, 0); free(exec_path); } static void restore_termio_mode(int sig) { tcsetattr(tio_fd, TCSANOW, &saved_tio); close(tio_fd); } static void set_termio_mode(void) { struct termios tio; /* don't attempt to set terminal attributes if not in the foreground * process group */ if (getpgrp() != tcgetpgrp(STDOUT_FILENO)) return; tio_fd = dup(STDIN_FILENO); tcgetattr(tio_fd, &saved_tio); igt_install_exit_handler(restore_termio_mode); tio = saved_tio; tio.c_lflag &= ~(ICANON | ECHO); tcsetattr(tio_fd, TCSANOW, &tio); } int main(int argc, char **argv) { int c; int ret = 0; GIOChannel *stdinchannel; GMainLoop *mainloop; float force_clock; bool opt_dump_info = false; struct option long_opts[] = { {"list-subtests", 0, 0, SUBTEST_OPTS}, {"run-subtest", 1, 0, SUBTEST_OPTS}, {"help-description", 0, 0, HELP_DESCRIPTION}, {"help", 0, 0, 'h'}, {"yb", 0, 0, Yb_OPT}, {"yf", 0, 0, Yf_OPT}, { 0, 0, 0, 0 } }; igt_skip_on_simulation(); enter_exec_path( argv ); while ((c = getopt_long(argc, argv, optstr, long_opts, NULL)) != -1) { switch (c) { case '3': test_stereo_modes = 1; break; case 'i': opt_dump_info = true; break; case 'a': test_all_modes = 1; break; case 'f': force_mode = 1; if(sscanf(optarg,"%f,%hu,%hu,%hu,%hu,%hu,%hu,%hu,%hu", &force_clock,&force_timing.hdisplay, &force_timing.hsync_start,&force_timing.hsync_end,&force_timing.htotal, &force_timing.vdisplay, &force_timing.vsync_start, &force_timing.vsync_end, &force_timing.vtotal)!= 9) usage(argv[0], c); force_timing.clock = force_clock*1000; break; case 's': sleep_between_modes = atoi(optarg); break; case 'j': do_dpms = atoi(optarg); if (do_dpms == 0) do_dpms = DRM_MODE_DPMS_OFF; break; case 'd': depth = atoi(optarg); igt_info("using depth %d\n", depth); break; case 'p': if (sscanf(optarg, "%d,%d,%d,%d,%d,%d", &plane_width, &plane_height, &crtc_x, &crtc_y, &crtc_w, &crtc_h) != 6) usage(argv[0], c); test_plane = 1; break; case 'm': test_preferred_mode = 1; break; case 't': tiling = LOCAL_I915_FORMAT_MOD_X_TILED; break; case 'y': case Yb_OPT: tiling = LOCAL_I915_FORMAT_MOD_Y_TILED; break; case Yf_OPT: tiling = LOCAL_I915_FORMAT_MOD_Yf_TILED; break; case 'r': qr_code = 1; break; case 'o': sscanf(optarg, "%d,%d", &specified_disp_id, &specified_mode_num); break; case SUBTEST_OPTS: /* invalid subtest options */ exit(IGT_EXIT_INVALID); break; case HELP_DESCRIPTION: igt_info("Tests display functionality."); exit(0); break; default: /* fall through */ case 'h': usage(argv[0], c); break; } } set_termio_mode(); if (depth <= 8) bpp = 8; else if (depth <= 16) bpp = 16; else if (depth <= 32) bpp = 32; if (!test_all_modes && !force_mode && !test_preferred_mode && specified_mode_num == -1 && !test_stereo_modes) test_all_modes = 1; drm_fd = drm_open_driver(DRIVER_INTEL); if (test_stereo_modes && drmSetClientCap(drm_fd, DRM_CLIENT_CAP_STEREO_3D, 1) < 0) { igt_warn("DRM_CLIENT_CAP_STEREO_3D failed\n"); goto out_close; } if (opt_dump_info) { dump_info(); goto out_close; } kmstest_set_vt_graphics_mode(); mainloop = g_main_loop_new(NULL, FALSE); if (!mainloop) { igt_warn("failed to create glib mainloop\n"); ret = -1; goto out_close; } if (!testdisplay_setup_hotplug()) { igt_warn("failed to initialize hotplug support\n"); goto out_mainloop; } stdinchannel = g_io_channel_unix_new(0); if (!stdinchannel) { igt_warn("failed to create stdin GIO channel\n"); goto out_hotplug; } ret = g_io_add_watch(stdinchannel, G_IO_IN | G_IO_ERR, input_event, NULL); if (ret < 0) { igt_warn("failed to add watch on stdin GIO channel\n"); goto out_stdio; } ret = 0; if (!update_display(false)) { ret = 1; goto out_stdio; } if (test_all_modes) goto out_stdio; g_main_loop_run(mainloop); out_stdio: g_io_channel_shutdown(stdinchannel, TRUE, NULL); out_hotplug: testdisplay_cleanup_hotplug(); out_mainloop: g_main_loop_unref(mainloop); out_close: close(drm_fd); igt_assert_eq(ret, 0); igt_exit(); } intel-gpu-tools-1.14/tests/gem_tiled_partial_pwrite_pread.c0000644000175000017500000001707612665336131021163 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * */ #include "igt.h" #include #include #include #include #include #include #include #include #include IGT_TEST_DESCRIPTION("Test pwrite/pread consistency when touching partial" " cachelines."); /* * Testcase: pwrite/pread consistency when touching partial cachelines * * Some fancy new pwrite/pread optimizations clflush in-line while * reading/writing. Check whether all required clflushes happen. * * Unfortunately really old mesa used unaligned pread/pwrite for s/w fallback * rendering, so we need to check whether this works on tiled buffers, too. * */ static drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; drm_intel_bo *scratch_bo; drm_intel_bo *staging_bo; drm_intel_bo *tiled_staging_bo; unsigned long scratch_pitch; #define BO_SIZE (32*4096) uint32_t devid; uint64_t mappable_gtt_limit; int fd; static void copy_bo(drm_intel_bo *src, int src_tiled, drm_intel_bo *dst, int dst_tiled) { unsigned long dst_pitch = scratch_pitch; unsigned long src_pitch = scratch_pitch; uint32_t cmd_bits = 0; /* dst is tiled ... */ if (intel_gen(devid) >= 4 && dst_tiled) { dst_pitch /= 4; cmd_bits |= XY_SRC_COPY_BLT_DST_TILED; } if (intel_gen(devid) >= 4 && dst_tiled) { src_pitch /= 4; cmd_bits |= XY_SRC_COPY_BLT_SRC_TILED; } BLIT_COPY_BATCH_START(cmd_bits); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ dst_pitch); OUT_BATCH(0 << 16 | 0); OUT_BATCH(BO_SIZE/scratch_pitch << 16 | 1024); OUT_RELOC_FENCED(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(0 << 16 | 0); OUT_BATCH(src_pitch); OUT_RELOC_FENCED(src, I915_GEM_DOMAIN_RENDER, 0, 0); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); } static void blt_bo_fill(drm_intel_bo *tmp_bo, drm_intel_bo *bo, int val) { uint8_t *gtt_ptr; int i; drm_intel_gem_bo_map_gtt(tmp_bo); gtt_ptr = tmp_bo->virtual; for (i = 0; i < BO_SIZE; i++) gtt_ptr[i] = val; drm_intel_gem_bo_unmap_gtt(tmp_bo); if (bo->offset < mappable_gtt_limit && (IS_G33(devid) || intel_gen(devid) >= 4)) igt_trash_aperture(); copy_bo(tmp_bo, 0, bo, 1); } #define MAX_BLT_SIZE 128 #define ROUNDS 200 uint8_t tmp[BO_SIZE]; uint8_t compare_tmp[BO_SIZE]; static void test_partial_reads(void) { int i, j; for (i = 0; i < ROUNDS; i++) { int start, len; int val = i % 256; blt_bo_fill(staging_bo, scratch_bo, i); start = random() % BO_SIZE; len = random() % (BO_SIZE-start) + 1; drm_intel_bo_get_subdata(scratch_bo, start, len, tmp); for (j = 0; j < len; j++) { igt_assert_f(tmp[j] == val, "mismatch at %i, got: %i, expected: %i\n", start + j, tmp[j], val); } igt_progress("partial reads test: ", i, ROUNDS); } } static void test_partial_writes(void) { int i, j; for (i = 0; i < ROUNDS; i++) { int start, len; int val = i % 256; blt_bo_fill(staging_bo, scratch_bo, i); start = random() % BO_SIZE; len = random() % (BO_SIZE-start) + 1; memset(tmp, i + 63, BO_SIZE); drm_intel_bo_subdata(scratch_bo, start, len, tmp); copy_bo(scratch_bo, 1, tiled_staging_bo, 1); drm_intel_bo_get_subdata(tiled_staging_bo, 0, BO_SIZE, compare_tmp); for (j = 0; j < start; j++) { igt_assert_f(compare_tmp[j] == val, "mismatch at %i, got: %i, expected: %i\n", j, tmp[j], val); } for (; j < start + len; j++) { igt_assert_f(compare_tmp[j] == tmp[0], "mismatch at %i, got: %i, expected: %i\n", j, tmp[j], i); } for (; j < BO_SIZE; j++) { igt_assert_f(compare_tmp[j] == val, "mismatch at %i, got: %i, expected: %i\n", j, tmp[j], val); } drm_intel_gem_bo_unmap_gtt(staging_bo); igt_progress("partial writes test: ", i, ROUNDS); } } static void test_partial_read_writes(void) { int i, j; for (i = 0; i < ROUNDS; i++) { int start, len; int val = i % 256; blt_bo_fill(staging_bo, scratch_bo, i); /* partial read */ start = random() % BO_SIZE; len = random() % (BO_SIZE-start) + 1; drm_intel_bo_get_subdata(scratch_bo, start, len, tmp); for (j = 0; j < len; j++) { igt_assert_f(tmp[j] == val, "mismatch in read at %i, got: %i, expected: %i\n", start + j, tmp[j], val); } /* Change contents through gtt to make the pread cachelines * stale. */ val = (i + 17) % 256; blt_bo_fill(staging_bo, scratch_bo, val); /* partial write */ start = random() % BO_SIZE; len = random() % (BO_SIZE-start) + 1; memset(tmp, i + 63, BO_SIZE); drm_intel_bo_subdata(scratch_bo, start, len, tmp); copy_bo(scratch_bo, 1, tiled_staging_bo, 1); drm_intel_bo_get_subdata(tiled_staging_bo, 0, BO_SIZE, compare_tmp); for (j = 0; j < start; j++) { igt_assert_f(compare_tmp[j] == val, "mismatch at %i, got: %i, expected: %i\n", j, tmp[j], val); } for (; j < start + len; j++) { igt_assert_f(compare_tmp[j] == tmp[0], "mismatch at %i, got: %i, expected: %i\n", j, tmp[j], tmp[0]); } for (; j < BO_SIZE; j++) { igt_assert_f(compare_tmp[j] == val, "mismatch at %i, got: %i, expected: %i\n", j, tmp[j], val); } drm_intel_gem_bo_unmap_gtt(staging_bo); igt_progress("partial read/writes test: ", i, ROUNDS); } } igt_main { uint32_t tiling_mode = I915_TILING_X; igt_skip_on_simulation(); srandom(0xdeadbeef); igt_fixture { fd = drm_open_driver(DRIVER_INTEL); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); //drm_intel_bufmgr_gem_enable_reuse(bufmgr); devid = intel_get_drm_devid(fd); batch = intel_batchbuffer_alloc(bufmgr, devid); /* overallocate the buffers we're actually using because */ scratch_bo = drm_intel_bo_alloc_tiled(bufmgr, "scratch bo", 1024, BO_SIZE/4096, 4, &tiling_mode, &scratch_pitch, 0); igt_assert(tiling_mode == I915_TILING_X); igt_assert(scratch_pitch == 4096); staging_bo = drm_intel_bo_alloc(bufmgr, "staging bo", BO_SIZE, 4096); tiled_staging_bo = drm_intel_bo_alloc_tiled(bufmgr, "scratch bo", 1024, BO_SIZE/4096, 4, &tiling_mode, &scratch_pitch, 0); igt_init_aperture_trashers(bufmgr); mappable_gtt_limit = gem_mappable_aperture_size(); } igt_subtest("reads") test_partial_reads(); igt_subtest("writes") test_partial_writes(); igt_subtest("writes-after-reads") test_partial_read_writes(); igt_fixture { igt_cleanup_aperture_trashers(); drm_intel_bufmgr_destroy(bufmgr); close(fd); } } intel-gpu-tools-1.14/tests/gem_pwrite_pread.c0000644000175000017500000002517412665336131016264 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include "drm.h" #include "intel_bufmgr.h" #define OBJECT_SIZE 16384 #define COPY_BLT_CMD (2<<29|0x53<<22) #define BLT_WRITE_ALPHA (1<<21) #define BLT_WRITE_RGB (1<<20) #define BLT_SRC_TILED (1<<15) #define BLT_DST_TILED (1<<11) uint32_t is_64bit; uint32_t exec_flags; static inline void build_batch(uint32_t *batch, int len, uint32_t *batch_len) { unsigned int i = 0; batch[i++] = COPY_BLT_CMD | BLT_WRITE_ALPHA | BLT_WRITE_RGB | (is_64bit ? 8 : 6); batch[i++] = 0xcc << 16 | 1 << 25 | 1 << 24 | len; batch[i++] = 0; batch[i++] = 1 << 16 | (len / 4); batch[i++] = 0; /* dst */ if (is_64bit) batch[i++] = 0; batch[i++] = 0; batch[i++] = len; batch[i++] = 0; /* src */ if (is_64bit) batch[i++] = 0; batch[i++] = MI_BATCH_BUFFER_END; batch[i++] = 0; *batch_len = i * 4; } #define BUILD_EXEC \ uint32_t batch[12]; \ struct drm_i915_gem_relocation_entry reloc[] = { \ { dst, 0, 4*sizeof(uint32_t), 0, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER }, \ { src, 0, (is_64bit ? 8 : 7)*sizeof(uint32_t), 0, I915_GEM_DOMAIN_RENDER, 0 }, \ }; \ struct drm_i915_gem_exec_object2 exec[] = { \ { src }, \ { dst }, \ { gem_create(fd, 4096), 2, (uintptr_t)reloc } \ }; \ struct drm_i915_gem_execbuffer2 execbuf = { \ (uintptr_t)exec, 3, \ 0, 0, \ 0, 0, 0, 0, \ exec_flags, \ }; \ build_batch(batch, len, &execbuf.batch_len); \ gem_write(fd, exec[2].handle, 0, batch, execbuf.batch_len); static void copy(int fd, uint32_t src, uint32_t dst, void *buf, int len, int loops) { BUILD_EXEC; while (loops--) { gem_write(fd, src, 0, buf, len); do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); gem_read(fd, dst, 0, buf, len); } gem_close(fd, exec[2].handle); } static void as_gtt_mmap(int fd, uint32_t src, uint32_t dst, void *buf, int len, int loops) { uint32_t *src_ptr, *dst_ptr; BUILD_EXEC; src_ptr = gem_mmap__gtt(fd, src, OBJECT_SIZE, PROT_WRITE); dst_ptr = gem_mmap__gtt(fd, dst, OBJECT_SIZE, PROT_READ); while (loops--) { gem_set_domain(fd, src, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); memcpy(src_ptr, buf, len); do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); gem_set_domain(fd, dst, I915_GEM_DOMAIN_GTT, 0); memcpy(buf, dst_ptr, len); } munmap(dst_ptr, len); munmap(src_ptr, len); gem_close(fd, exec[2].handle); } static void as_cpu_mmap(int fd, uint32_t src, uint32_t dst, void *buf, int len, int loops) { uint32_t *src_ptr, *dst_ptr; BUILD_EXEC; src_ptr = gem_mmap__cpu(fd, src, 0, OBJECT_SIZE, PROT_WRITE); dst_ptr = gem_mmap__cpu(fd, dst, 0, OBJECT_SIZE, PROT_READ); while (loops--) { gem_set_domain(fd, src, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU); memcpy(src_ptr, buf, len); do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); gem_set_domain(fd, dst, I915_GEM_DOMAIN_CPU, 0); memcpy(buf, dst_ptr, len); } munmap(dst_ptr, len); munmap(src_ptr, len); gem_close(fd, exec[2].handle); } static void test_copy(int fd, uint32_t src, uint32_t dst, uint32_t *buf, int len) { int i; BUILD_EXEC; for (i = 0; i < len/4; i++) buf[i] = i; gem_write(fd, src, 0, buf, len); memset(buf, 0, len); do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); gem_read(fd, dst, 0, buf, len); gem_close(fd, exec[2].handle); for (i = 0; i < len/4; i++) igt_assert(buf[i] == i); } static void test_as_gtt_mmap(int fd, uint32_t src, uint32_t dst, int len) { uint32_t *src_ptr, *dst_ptr; int i; BUILD_EXEC; src_ptr = gem_mmap__gtt(fd, src, OBJECT_SIZE, PROT_WRITE); dst_ptr = gem_mmap__gtt(fd, dst, OBJECT_SIZE, PROT_READ); gem_set_domain(fd, src, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); for (i = 0; i < len/4; i++) src_ptr[i] = i; do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); gem_close(fd, exec[2].handle); gem_set_domain(fd, dst, I915_GEM_DOMAIN_GTT, 0); for (i = 0; i < len/4; i++) igt_assert(dst_ptr[i] == i); munmap(dst_ptr, len); munmap(src_ptr, len); } static void test_as_cpu_mmap(int fd, uint32_t src, uint32_t dst, int len) { uint32_t *src_ptr, *dst_ptr; int i; BUILD_EXEC; src_ptr = gem_mmap__cpu(fd, src, 0, OBJECT_SIZE, PROT_WRITE); dst_ptr = gem_mmap__cpu(fd, dst, 0, OBJECT_SIZE, PROT_READ); gem_set_domain(fd, src, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU); for (i = 0; i < len/4; i++) src_ptr[i] = i; do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); gem_close(fd, exec[2].handle); gem_set_domain(fd, dst, I915_GEM_DOMAIN_CPU, 0); for (i = 0; i < len/4; i++) igt_assert(dst_ptr[i] == i); munmap(dst_ptr, len); munmap(src_ptr, len); } static double elapsed(const struct timeval *start, const struct timeval *end, int loop) { return (1e6*(end->tv_sec - start->tv_sec) + (end->tv_usec - start->tv_usec))/loop; } static const char *bytes_per_sec(char *buf, double v) { const char *order[] = { "", "KiB", "MiB", "GiB", "TiB", NULL, }, **o = order; while (v > 1000 && o[1]) { v /= 1000; o++; } sprintf(buf, "%.1f%s/s", v, *o); return buf; } uint32_t *tmp, src, dst; int fd; int main(int argc, char **argv) { int object_size = 0; uint32_t buf[20]; int count; igt_subtest_init(argc, argv); igt_skip_on_simulation(); if (argc > 1) object_size = atoi(argv[1]); if (object_size == 0) object_size = OBJECT_SIZE; object_size = (object_size + 3) & -4; igt_fixture { uint32_t devid; fd = drm_open_driver(DRIVER_INTEL); dst = gem_create(fd, object_size); src = gem_create(fd, object_size); tmp = malloc(object_size); gem_set_caching(fd, src, 0); gem_set_caching(fd, dst, 0); devid = intel_get_drm_devid(fd); is_64bit = intel_gen(devid) >= 8; exec_flags = HAS_BLT_RING(devid) ? I915_EXEC_BLT : 0; } igt_subtest("uncached-copy-correctness") test_copy(fd, src, dst, tmp, object_size); igt_subtest("uncached-copy-performance") { for (count = 1; count <= 1<<17; count <<= 1) { struct timeval start, end; gettimeofday(&start, NULL); copy(fd, src, dst, tmp, object_size, count); gettimeofday(&end, NULL); igt_info("Time to uncached copy %d bytes x %6d: %7.3fµs, %s\n", object_size, count, elapsed(&start, &end, count), bytes_per_sec((char *)buf, object_size/elapsed(&start, &end, count)*1e6)); fflush(stdout); } } igt_subtest("uncached-pwrite-blt-gtt_mmap-correctness") test_as_gtt_mmap(fd, src, dst, object_size); igt_subtest("uncached-pwrite-blt-gtt_mmap-performance") { for (count = 1; count <= 1<<17; count <<= 1) { struct timeval start, end; gettimeofday(&start, NULL); as_gtt_mmap(fd, src, dst, tmp, object_size, count); gettimeofday(&end, NULL); igt_info("** mmap uncached copy %d bytes x %6d: %7.3fµs, %s\n", object_size, count, elapsed(&start, &end, count), bytes_per_sec((char *)buf, object_size/elapsed(&start, &end, count)*1e6)); fflush(stdout); } } igt_fixture { gem_set_caching(fd, src, 1); gem_set_caching(fd, dst, 1); } igt_subtest("snooped-copy-correctness") test_copy(fd, src, dst, tmp, object_size); igt_subtest("snooped-copy-performance") { for (count = 1; count <= 1<<17; count <<= 1) { struct timeval start, end; gettimeofday(&start, NULL); copy(fd, src, dst, tmp, object_size, count); gettimeofday(&end, NULL); igt_info("Time to snooped copy %d bytes x %6d: %7.3fµs, %s\n", object_size, count, elapsed(&start, &end, count), bytes_per_sec((char *)buf, object_size/elapsed(&start, &end, count)*1e6)); fflush(stdout); } } igt_subtest("snooped-pwrite-blt-cpu_mmap-correctness") test_as_cpu_mmap(fd, src, dst, object_size); igt_subtest("snooped-pwrite-blt-cpu_mmap-performance") { for (count = 1; count <= 1<<17; count <<= 1) { struct timeval start, end; gettimeofday(&start, NULL); as_cpu_mmap(fd, src, dst, tmp, object_size, count); gettimeofday(&end, NULL); igt_info("** mmap snooped copy %d bytes x %6d: %7.3fµs, %s\n", object_size, count, elapsed(&start, &end, count), bytes_per_sec((char *)buf, object_size/elapsed(&start, &end, count)*1e6)); fflush(stdout); } } igt_fixture { gem_set_caching(fd, src, 2); gem_set_caching(fd, dst, 2); } igt_subtest("display-copy-correctness") test_copy(fd, src, dst, tmp, object_size); igt_subtest("display-copy-performance") { for (count = 1; count <= 1<<17; count <<= 1) { struct timeval start, end; gettimeofday(&start, NULL); copy(fd, src, dst, tmp, object_size, count); gettimeofday(&end, NULL); igt_info("Time to display copy %d bytes x %6d: %7.3fµs, %s\n", object_size, count, elapsed(&start, &end, count), bytes_per_sec((char *)buf, object_size/elapsed(&start, &end, count)*1e6)); fflush(stdout); } } igt_subtest("display-pwrite-blt-gtt_mmap-correctness") test_as_gtt_mmap(fd, src, dst, object_size); igt_subtest("display-pwrite-blt-gtt_mmap-performance") { for (count = 1; count <= 1<<17; count <<= 1) { struct timeval start, end; gettimeofday(&start, NULL); as_gtt_mmap(fd, src, dst, tmp, object_size, count); gettimeofday(&end, NULL); igt_info("** mmap display copy %d bytes x %6d: %7.3fµs, %s\n", object_size, count, elapsed(&start, &end, count), bytes_per_sec((char *)buf, object_size/elapsed(&start, &end, count)*1e6)); fflush(stdout); } } igt_fixture { free(tmp); gem_close(fd, src); gem_close(fd, dst); close(fd); } igt_exit(); } intel-gpu-tools-1.14/tests/gem_lut_handle.c0000644000175000017500000001637412665336131015720 00000000000000/* * Copyright © 2012,2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ /* Exercises the basic execbuffer using the handle LUT interface */ #include "igt.h" #include #include #include #include #include #include #include #include #include "drm.h" IGT_TEST_DESCRIPTION("Exercises the basic execbuffer using the handle LUT" " interface."); #define BATCH_SIZE (1024*1024) #define LOCAL_I915_EXEC_HANDLE_LUT (1<<12) #define NORMAL 0 #define USE_LUT 0x1 #define BROKEN 0x2 static int exec(int fd, uint32_t handle, unsigned int flags) { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 gem_exec[1]; struct drm_i915_gem_relocation_entry gem_reloc[1]; gem_reloc[0].offset = 1024; gem_reloc[0].delta = 0; gem_reloc[0].target_handle = !!(flags & USE_LUT) ^ !!(flags & BROKEN) ? 0 : handle; gem_reloc[0].read_domains = I915_GEM_DOMAIN_RENDER; gem_reloc[0].write_domain = 0; gem_reloc[0].presumed_offset = 0; gem_exec[0].handle = handle; gem_exec[0].relocation_count = 1; gem_exec[0].relocs_ptr = (uintptr_t) gem_reloc; gem_exec[0].alignment = 0; gem_exec[0].offset = 0; gem_exec[0].flags = 0; gem_exec[0].rsvd1 = 0; gem_exec[0].rsvd2 = 0; execbuf.buffers_ptr = (uintptr_t)gem_exec; execbuf.buffer_count = 1; execbuf.batch_start_offset = 0; execbuf.batch_len = 8; execbuf.cliprects_ptr = 0; execbuf.num_cliprects = 0; execbuf.DR1 = 0; execbuf.DR4 = 0; execbuf.flags = flags & USE_LUT ? LOCAL_I915_EXEC_HANDLE_LUT : 0; i915_execbuffer2_set_context_id(execbuf, 0); execbuf.rsvd2 = 0; if (drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf)) return -errno; return 0; } static int many_exec(int fd, uint32_t batch, int num_exec, int num_reloc, unsigned flags) { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 *gem_exec; struct drm_i915_gem_relocation_entry *gem_reloc; unsigned max_handle = batch; int ret, n; gem_exec = calloc(num_exec+1, sizeof(*gem_exec)); gem_reloc = calloc(num_reloc, sizeof(*gem_reloc)); igt_assert(gem_exec && gem_reloc); for (n = 0; n < num_exec; n++) { gem_exec[n].handle = gem_create(fd, 4096); if (gem_exec[n].handle > max_handle) max_handle = gem_exec[n].handle; gem_exec[n].relocation_count = 0; gem_exec[n].relocs_ptr = 0; gem_exec[n].alignment = 0; gem_exec[n].offset = 0; gem_exec[n].flags = 0; gem_exec[n].rsvd1 = 0; gem_exec[n].rsvd2 = 0; } gem_exec[n].handle = batch; gem_exec[n].relocation_count = num_reloc; gem_exec[n].relocs_ptr = (uintptr_t) gem_reloc; if (flags & USE_LUT) max_handle = num_exec + 1; max_handle++; for (n = 0; n < num_reloc; n++) { uint32_t target; if (flags & BROKEN) { target = -(rand() % 4096) - 1; } else { target = rand() % (num_exec + 1); if ((flags & USE_LUT) == 0) target = gem_exec[target].handle; } gem_reloc[n].offset = 1024; gem_reloc[n].delta = 0; gem_reloc[n].target_handle = target; gem_reloc[n].read_domains = I915_GEM_DOMAIN_RENDER; gem_reloc[n].write_domain = 0; gem_reloc[n].presumed_offset = 0; } execbuf.buffers_ptr = (uintptr_t)gem_exec; execbuf.buffer_count = num_exec + 1; execbuf.batch_start_offset = 0; execbuf.batch_len = 8; execbuf.cliprects_ptr = 0; execbuf.num_cliprects = 0; execbuf.DR1 = 0; execbuf.DR4 = 0; execbuf.flags = flags & USE_LUT ? LOCAL_I915_EXEC_HANDLE_LUT : 0; i915_execbuffer2_set_context_id(execbuf, 0); execbuf.rsvd2 = 0; ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); if (ret < 0) ret = -errno; for (n = 0; n < num_exec; n++) gem_close(fd, gem_exec[n].handle); free(gem_exec); free(gem_reloc); return ret; } #define fail(x) igt_assert((x) == -ENOENT) #define pass(x) igt_assert((x) == 0) igt_simple_main { uint32_t batch[2] = {MI_BATCH_BUFFER_END}; uint32_t handle; int fd, i; fd = drm_open_driver(DRIVER_INTEL); handle = gem_create(fd, 4096); gem_write(fd, handle, 0, batch, sizeof(batch)); do_or_die(exec(fd, handle, NORMAL)); fail(exec(fd, handle, BROKEN)); igt_skip_on(exec(fd, handle, USE_LUT)); do_or_die(exec(fd, handle, USE_LUT)); fail(exec(fd, handle, USE_LUT | BROKEN)); for (i = 2; i <= SLOW_QUICK(65536, 8); i *= 2) { if (many_exec(fd, handle, i+1, i+1, NORMAL) == -ENOSPC) break; pass(many_exec(fd, handle, i-1, i-1, NORMAL)); pass(many_exec(fd, handle, i-1, i, NORMAL)); pass(many_exec(fd, handle, i-1, i+1, NORMAL)); pass(many_exec(fd, handle, i, i-1, NORMAL)); pass(many_exec(fd, handle, i, i, NORMAL)); pass(many_exec(fd, handle, i, i+1, NORMAL)); pass(many_exec(fd, handle, i+1, i-1, NORMAL)); pass(many_exec(fd, handle, i+1, i, NORMAL)); pass(many_exec(fd, handle, i+1, i+1, NORMAL)); fail(many_exec(fd, handle, i-1, i-1, NORMAL | BROKEN)); fail(many_exec(fd, handle, i-1, i, NORMAL | BROKEN)); fail(many_exec(fd, handle, i-1, i+1, NORMAL | BROKEN)); fail(many_exec(fd, handle, i, i-1, NORMAL | BROKEN)); fail(many_exec(fd, handle, i, i, NORMAL | BROKEN)); fail(many_exec(fd, handle, i, i+1, NORMAL | BROKEN)); fail(many_exec(fd, handle, i+1, i-1, NORMAL | BROKEN)); fail(many_exec(fd, handle, i+1, i, NORMAL | BROKEN)); fail(many_exec(fd, handle, i+1, i+1, NORMAL | BROKEN)); pass(many_exec(fd, handle, i-1, i-1, USE_LUT)); pass(many_exec(fd, handle, i-1, i, USE_LUT)); pass(many_exec(fd, handle, i-1, i+1, USE_LUT)); pass(many_exec(fd, handle, i, i-1, USE_LUT)); pass(many_exec(fd, handle, i, i, USE_LUT)); pass(many_exec(fd, handle, i, i+1, USE_LUT)); pass(many_exec(fd, handle, i+1, i-1, USE_LUT)); pass(many_exec(fd, handle, i+1, i, USE_LUT)); pass(many_exec(fd, handle, i+1, i+1, USE_LUT)); fail(many_exec(fd, handle, i-1, i-1, USE_LUT | BROKEN)); fail(many_exec(fd, handle, i-1, i, USE_LUT | BROKEN)); fail(many_exec(fd, handle, i-1, i+1, USE_LUT | BROKEN)); fail(many_exec(fd, handle, i, i-1, USE_LUT | BROKEN)); fail(many_exec(fd, handle, i, i, USE_LUT | BROKEN)); fail(many_exec(fd, handle, i, i+1, USE_LUT | BROKEN)); fail(many_exec(fd, handle, i+1, i-1, USE_LUT | BROKEN)); fail(many_exec(fd, handle, i+1, i, USE_LUT | BROKEN)); fail(many_exec(fd, handle, i+1, i+1, USE_LUT | BROKEN)); } } intel-gpu-tools-1.14/tests/gem_reset_stats.c0000644000175000017500000004625412665336131016141 00000000000000/* * Copyright (c) 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Mika Kuoppala * */ #define _GNU_SOURCE #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #define RS_NO_ERROR 0 #define RS_BATCH_ACTIVE (1 << 0) #define RS_BATCH_PENDING (1 << 1) #define RS_UNKNOWN (1 << 2) static uint32_t devid; struct local_drm_i915_reset_stats { __u32 ctx_id; __u32 flags; __u32 reset_count; __u32 batch_active; __u32 batch_pending; __u32 pad; }; #define MAX_FD 32 #define GET_RESET_STATS_IOCTL DRM_IOWR(DRM_COMMAND_BASE + 0x32, struct local_drm_i915_reset_stats) #define LOCAL_I915_EXEC_VEBOX (4 << 0) static void sync_gpu(void) { int fd = drm_open_driver(DRIVER_INTEL); gem_quiescent_gpu(fd); close(fd); } static int noop(int fd, uint32_t ctx, const struct intel_execution_engine *e) { const uint32_t bbe = MI_BATCH_BUFFER_END; struct drm_i915_gem_execbuffer2 eb; struct drm_i915_gem_exec_object2 exec; int ret; memset(&exec, 0, sizeof(exec)); exec.handle = gem_create(fd, 4096); igt_assert((int)exec.handle > 0); gem_write(fd, exec.handle, 0, &bbe, sizeof(bbe)); memset(&eb, 0, sizeof(eb)); eb.buffers_ptr = (uintptr_t)&exec; eb.buffer_count = 1; eb.flags = e->exec_id | e->flags; i915_execbuffer2_set_context_id(eb, ctx); ret = __gem_execbuf(fd, &eb); if (ret < 0) { gem_close(fd, exec.handle); return ret; } return exec.handle; } static int has_engine(int fd, uint32_t ctx, const struct intel_execution_engine *e) { int handle = noop(fd, ctx, e); if (handle < 0) return 0; gem_close(fd, handle); return 1; } static void check_context(const struct intel_execution_engine *e) { int fd = drm_open_driver(DRIVER_INTEL); igt_require(has_engine(fd, gem_context_create(fd), e)); close(fd); } static int gem_reset_stats(int fd, int ctx_id, struct local_drm_i915_reset_stats *rs) { memset(rs, 0, sizeof(*rs)); rs->ctx_id = ctx_id; rs->reset_count = -1; if (drmIoctl(fd, GET_RESET_STATS_IOCTL, rs)) return -errno; igt_assert(rs->reset_count != -1); return 0; } static int gem_reset_status(int fd, int ctx_id) { struct local_drm_i915_reset_stats rs; int ret; ret = gem_reset_stats(fd, ctx_id, &rs); if (ret) return ret; if (rs.batch_active) return RS_BATCH_ACTIVE; if (rs.batch_pending) return RS_BATCH_PENDING; return RS_NO_ERROR; } #define BAN HANG_ALLOW_BAN #define ASYNC 2 static void inject_hang(int fd, uint32_t ctx, const struct intel_execution_engine *e, unsigned flags) { igt_hang_ring_t hang; hang = igt_hang_ctx(fd, ctx, e->exec_id | e->flags, flags & BAN, NULL); if ((flags & ASYNC) == 0) igt_post_hang_ring(fd, hang); } static const char *status_to_string(int x) { const char *strings[] = { "No error", "Guilty", "Pending", }; if (x >= ARRAY_SIZE(strings)) return "Unknown"; return strings[x]; } static int _assert_reset_status(int idx, int fd, int ctx, int status) { int rs; rs = gem_reset_status(fd, ctx); if (rs < 0) { igt_info("reset status for %d ctx %d returned %d\n", idx, ctx, rs); return rs; } if (rs != status) { igt_info("%d:%d expected '%s' [%d], found '%s' [%d]\n", idx, ctx, status_to_string(status), status, status_to_string(rs), rs); return 1; } return 0; } #define assert_reset_status(idx, fd, ctx, status) \ igt_assert(_assert_reset_status(idx, fd, ctx, status) == 0) static void test_rs(const struct intel_execution_engine *e, int num_fds, int hang_index, int rs_assumed_no_hang) { int fd[MAX_FD]; int i; igt_assert_lte(num_fds, MAX_FD); igt_assert_lt(hang_index, MAX_FD); igt_debug("num fds=%d, hang index=%d\n", num_fds, hang_index); for (i = 0; i < num_fds; i++) { fd[i] = drm_open_driver(DRIVER_INTEL); assert_reset_status(i, fd[i], 0, RS_NO_ERROR); } sync_gpu(); for (i = 0; i < num_fds; i++) { if (i == hang_index) inject_hang(fd[i], 0, e, ASYNC); else igt_assert(noop(fd[i], 0, e) > 0); } sync_gpu(); for (i = 0; i < num_fds; i++) { if (hang_index < 0) { assert_reset_status(i, fd[i], 0, rs_assumed_no_hang); continue; } if (i < hang_index) assert_reset_status(i, fd[i], 0, RS_NO_ERROR); if (i == hang_index) assert_reset_status(i, fd[i], 0, RS_BATCH_ACTIVE); if (i > hang_index) assert_reset_status(i, fd[i], 0, RS_BATCH_PENDING); } for (i = 0; i < num_fds; i++) close(fd[i]); } #define MAX_CTX 100 static void test_rs_ctx(const struct intel_execution_engine *e, int num_fds, int num_ctx, int hang_index, int hang_context) { int i, j; int fd[MAX_FD]; int ctx[MAX_FD][MAX_CTX]; igt_assert_lte(num_fds, MAX_FD); igt_assert_lt(hang_index, MAX_FD); igt_assert_lte(num_ctx, MAX_CTX); igt_assert_lt(hang_context, MAX_CTX); test_rs(e, num_fds, -1, RS_NO_ERROR); for (i = 0; i < num_fds; i++) { fd[i] = drm_open_driver(DRIVER_INTEL); igt_assert(fd[i]); assert_reset_status(i, fd[i], 0, RS_NO_ERROR); for (j = 0; j < num_ctx; j++) { ctx[i][j] = gem_context_create(fd[i]); } assert_reset_status(i, fd[i], 0, RS_NO_ERROR); } for (i = 0; i < num_fds; i++) { assert_reset_status(i, fd[i], 0, RS_NO_ERROR); for (j = 0; j < num_ctx; j++) assert_reset_status(i, fd[i], ctx[i][j], RS_NO_ERROR); assert_reset_status(i, fd[i], 0, RS_NO_ERROR); } for (i = 0; i < num_fds; i++) { for (j = 0; j < num_ctx; j++) { if (i == hang_index && j == hang_context) inject_hang(fd[i], ctx[i][j], e, ASYNC); else igt_assert(noop(fd[i], ctx[i][j], e) > 0); } } sync_gpu(); for (i = 0; i < num_fds; i++) assert_reset_status(i, fd[i], 0, RS_NO_ERROR); for (i = 0; i < num_fds; i++) { for (j = 0; j < num_ctx; j++) { if (i < hang_index) assert_reset_status(i, fd[i], ctx[i][j], RS_NO_ERROR); if (i == hang_index && j < hang_context) assert_reset_status(i, fd[i], ctx[i][j], RS_NO_ERROR); if (i == hang_index && j == hang_context) assert_reset_status(i, fd[i], ctx[i][j], RS_BATCH_ACTIVE); if (i == hang_index && j > hang_context) assert_reset_status(i, fd[i], ctx[i][j], RS_BATCH_PENDING); if (i > hang_index) assert_reset_status(i, fd[i], ctx[i][j], RS_BATCH_PENDING); } } for (i = 0; i < num_fds; i++) { assert_reset_status(i, fd[i], 0, RS_NO_ERROR); close(fd[i]); } } static void test_ban(const struct intel_execution_engine *e) { struct local_drm_i915_reset_stats rs_bad, rs_good; int fd_bad, fd_good; int ban, retry = 10; int active_count = 0, pending_count = 0; fd_bad = drm_open_driver(DRIVER_INTEL); fd_good = drm_open_driver(DRIVER_INTEL); assert_reset_status(fd_bad, fd_bad, 0, RS_NO_ERROR); assert_reset_status(fd_good, fd_good, 0, RS_NO_ERROR); noop(fd_bad, 0, e); noop(fd_good, 0, e); assert_reset_status(fd_bad, fd_bad, 0, RS_NO_ERROR); assert_reset_status(fd_good, fd_good, 0, RS_NO_ERROR); inject_hang(fd_bad, 0, e, BAN | ASYNC); active_count++; noop(fd_good, 0, e); noop(fd_good, 0, e); /* The second hang will count as pending and be discarded */ active_count--; pending_count += 2; /* inject hang does 2 execs (query, then hang) */ while (retry--) { inject_hang(fd_bad, 0, e, BAN); active_count++; ban = noop(fd_bad, 0, e); if (ban == -EIO) break; /* Should not happen often but sometimes hang is declared too * slow due to our way of faking hang using loop */ gem_close(fd_bad, ban); igt_info("retrying for ban (%d)\n", retry); } igt_assert_eq(ban, -EIO); igt_assert_lt(0, noop(fd_good, 0, e)); assert_reset_status(fd_bad, fd_bad, 0, RS_BATCH_ACTIVE); igt_assert_eq(gem_reset_stats(fd_bad, 0, &rs_bad), 0); igt_assert_eq(rs_bad.batch_active, active_count); igt_assert_eq(rs_bad.batch_pending, pending_count); assert_reset_status(fd_good, fd_good, 0, RS_BATCH_PENDING); igt_assert_eq(gem_reset_stats(fd_good, 0, &rs_good), 0); igt_assert_eq(rs_good.batch_active, 0); igt_assert_eq(rs_good.batch_pending, 2); close(fd_bad); close(fd_good); } static void test_ban_ctx(const struct intel_execution_engine *e) { struct local_drm_i915_reset_stats rs_bad, rs_good; int fd, ban, retry = 10; uint32_t ctx_good, ctx_bad; int active_count = 0, pending_count = 0; fd = drm_open_driver(DRIVER_INTEL); assert_reset_status(fd, fd, 0, RS_NO_ERROR); ctx_good = gem_context_create(fd); ctx_bad = gem_context_create(fd); assert_reset_status(fd, fd, 0, RS_NO_ERROR); assert_reset_status(fd, fd, ctx_good, RS_NO_ERROR); assert_reset_status(fd, fd, ctx_bad, RS_NO_ERROR); noop(fd, ctx_bad, e); noop(fd, ctx_good, e); assert_reset_status(fd, fd, ctx_good, RS_NO_ERROR); assert_reset_status(fd, fd, ctx_bad, RS_NO_ERROR); inject_hang(fd, ctx_bad, e, BAN | ASYNC); active_count++; noop(fd, ctx_good, e); noop(fd, ctx_good, e); /* This second hang will count as pending and be discarded */ active_count--; pending_count++; while (retry--) { inject_hang(fd, ctx_bad, e, BAN); active_count++; ban = noop(fd, ctx_bad, e); if (ban == -EIO) break; /* Should not happen often but sometimes hang is declared too * slow due to our way of faking hang using loop */ gem_close(fd, ban); igt_info("retrying for ban (%d)\n", retry); } igt_assert_eq(ban, -EIO); igt_assert_lt(0, noop(fd, ctx_good, e)); assert_reset_status(fd, fd, ctx_bad, RS_BATCH_ACTIVE); igt_assert_eq(gem_reset_stats(fd, ctx_bad, &rs_bad), 0); igt_assert_eq(rs_bad.batch_active, active_count); igt_assert_eq(rs_bad.batch_pending, pending_count); assert_reset_status(fd, fd, ctx_good, RS_BATCH_PENDING); igt_assert_eq(gem_reset_stats(fd, ctx_good, &rs_good), 0); igt_assert_eq(rs_good.batch_active, 0); igt_assert_eq(rs_good.batch_pending, 2); close(fd); } static void test_unrelated_ctx(const struct intel_execution_engine *e) { int fd1,fd2; int ctx_guilty, ctx_unrelated; fd1 = drm_open_driver(DRIVER_INTEL); fd2 = drm_open_driver(DRIVER_INTEL); assert_reset_status(0, fd1, 0, RS_NO_ERROR); assert_reset_status(1, fd2, 0, RS_NO_ERROR); ctx_guilty = gem_context_create(fd1); ctx_unrelated = gem_context_create(fd2); assert_reset_status(0, fd1, ctx_guilty, RS_NO_ERROR); assert_reset_status(1, fd2, ctx_unrelated, RS_NO_ERROR); inject_hang(fd1, ctx_guilty, e, 0); assert_reset_status(0, fd1, ctx_guilty, RS_BATCH_ACTIVE); assert_reset_status(1, fd2, ctx_unrelated, RS_NO_ERROR); gem_sync(fd2, noop(fd2, ctx_unrelated, e)); assert_reset_status(0, fd1, ctx_guilty, RS_BATCH_ACTIVE); assert_reset_status(1, fd2, ctx_unrelated, RS_NO_ERROR); close(fd1); close(fd2); } static int get_reset_count(int fd, int ctx) { int ret; struct local_drm_i915_reset_stats rs; ret = gem_reset_stats(fd, ctx, &rs); if (ret) return ret; return rs.reset_count; } static void test_close_pending_ctx(const struct intel_execution_engine *e) { int fd = drm_open_driver(DRIVER_INTEL); uint32_t ctx = gem_context_create(fd); assert_reset_status(fd, fd, ctx, RS_NO_ERROR); inject_hang(fd, ctx, e, 0); gem_context_destroy(fd, ctx); igt_assert_eq(__gem_context_destroy(fd, ctx), -ENOENT); close(fd); } static void test_close_pending(const struct intel_execution_engine *e) { int fd = drm_open_driver(DRIVER_INTEL); assert_reset_status(fd, fd, 0, RS_NO_ERROR); inject_hang(fd, 0, e, 0); close(fd); } static void noop_on_each_ring(int fd, const bool reverse) { const uint32_t bbe = MI_BATCH_BUFFER_END; struct drm_i915_gem_execbuffer2 eb; struct drm_i915_gem_exec_object2 obj; const struct intel_execution_engine *e; memset(&obj, 0, sizeof(obj)); obj.handle = gem_create(fd, 4096); gem_write(fd, obj.handle, 0, &bbe, sizeof(bbe)); memset(&eb, 0, sizeof(eb)); eb.buffers_ptr = (uintptr_t)&obj; eb.buffer_count = 1; if (reverse) { for (e = intel_execution_engines; e->name; e++) ; while (--e >= intel_execution_engines) { eb.flags = e->exec_id | e->flags; __gem_execbuf(fd, &eb); } } else { for (e = intel_execution_engines; e->name; e++) { eb.flags = e->exec_id | e->flags; __gem_execbuf(fd, &eb); } } gem_sync(fd, obj.handle); gem_close(fd, obj.handle); } static void test_close_pending_fork(const struct intel_execution_engine *e, const bool reverse) { int fd = drm_open_driver(DRIVER_INTEL); igt_hang_ring_t hang; int pid; assert_reset_status(fd, fd, 0, RS_NO_ERROR); hang = igt_hang_ctx(fd, 0, e->exec_id | e->flags, 0, NULL); sleep(1); /* Avoid helpers as we need to kill the child * without any extra signal handling on behalf of * lib/drmtest.c */ pid = fork(); if (pid == 0) { const int fd2 = drm_open_driver(DRIVER_INTEL); igt_assert_lte(0, fd2); /* The crucial component is that we schedule the same noop batch * on each ring. This exercises batch_obj reference counting, * when gpu is reset and ring lists are cleared. */ noop_on_each_ring(fd2, reverse); close(fd2); pause(); exit(0); } else { igt_assert_lt(0, pid); sleep(1); /* Kill the child to reduce refcounts on batch_objs */ kill(pid, SIGKILL); } igt_post_hang_ring(fd, hang); close(fd); } static void test_reset_count(const struct intel_execution_engine *e, const bool create_ctx) { int fd = drm_open_driver(DRIVER_INTEL); int ctx; long c1, c2; if (create_ctx) ctx = gem_context_create(fd); else ctx = 0; assert_reset_status(fd, fd, ctx, RS_NO_ERROR); c1 = get_reset_count(fd, ctx); igt_assert(c1 >= 0); inject_hang(fd, ctx, e, 0); assert_reset_status(fd, fd, ctx, RS_BATCH_ACTIVE); c2 = get_reset_count(fd, ctx); igt_assert(c2 >= 0); igt_assert(c2 == (c1 + 1)); igt_fork(child, 1) { igt_drop_root(); c2 = get_reset_count(fd, ctx); if (ctx == 0) igt_assert(c2 == -EPERM); else igt_assert(c2 == 0); } igt_waitchildren(); if (create_ctx) gem_context_destroy(fd, ctx); close(fd); } static int _test_params(int fd, int ctx, uint32_t flags, uint32_t pad) { struct local_drm_i915_reset_stats rs; memset(&rs, 0, sizeof(rs)); rs.ctx_id = ctx; rs.flags = flags; rs.reset_count = rand(); rs.batch_active = rand(); rs.batch_pending = rand(); rs.pad = pad; if (drmIoctl(fd, GET_RESET_STATS_IOCTL, &rs)) return -errno; return 0; } typedef enum { root = 0, user } cap_t; static void _check_param_ctx(const int fd, const int ctx, const cap_t cap) { const uint32_t bad = rand() + 1; if (ctx == 0) { if (cap == root) igt_assert_eq(_test_params(fd, ctx, 0, 0), 0); else igt_assert_eq(_test_params(fd, ctx, 0, 0), -EPERM); } igt_assert_eq(_test_params(fd, ctx, 0, bad), -EINVAL); igt_assert_eq(_test_params(fd, ctx, bad, 0), -EINVAL); igt_assert_eq(_test_params(fd, ctx, bad, bad), -EINVAL); } static void check_params(const int fd, const int ctx, cap_t cap) { igt_assert(ioctl(fd, GET_RESET_STATS_IOCTL, 0) == -1); igt_assert_eq(_test_params(fd, 0xbadbad, 0, 0), -ENOENT); _check_param_ctx(fd, ctx, cap); } static void _test_param(const int fd, const int ctx) { check_params(fd, ctx, root); igt_fork(child, 1) { check_params(fd, ctx, root); igt_drop_root(); check_params(fd, ctx, user); } check_params(fd, ctx, root); igt_waitchildren(); } static void test_params_ctx(void) { int fd; fd = drm_open_driver(DRIVER_INTEL); _test_param(fd, gem_context_create(fd)); close(fd); } static void test_params(void) { int fd; fd = drm_open_driver(DRIVER_INTEL); _test_param(fd, 0); close(fd); } static const struct intel_execution_engine * next_engine(int fd, const struct intel_execution_engine *e) { do { e++; if (e->name == NULL) e = intel_execution_engines; if (e->exec_id == 0) e++; } while (!has_engine(fd, 0, e)); return e; } static void defer_hangcheck(const struct intel_execution_engine *engine) { const struct intel_execution_engine *next; int fd, count_start, count_end; int seconds = 30; fd = drm_open_driver(DRIVER_INTEL); next = next_engine(fd, engine); igt_skip_on(next == engine); count_start = get_reset_count(fd, 0); igt_assert_lte(0, count_start); inject_hang(fd, 0, engine, 0); while (--seconds) { noop(fd, 0, next); count_end = get_reset_count(fd, 0); igt_assert_lte(0, count_end); if (count_end > count_start) break; sleep(1); } igt_assert_lt(count_start, count_end); close(fd); } static bool gem_has_reset_stats(int fd) { struct local_drm_i915_reset_stats rs; int ret; /* Carefully set flags and pad to zero, otherwise we get -EINVAL */ memset(&rs, 0, sizeof(rs)); ret = drmIoctl(fd, GET_RESET_STATS_IOCTL, &rs); if (ret == 0) return true; /* If we get EPERM, we have support but did not have CAP_SYSADM */ if (ret == -1 && errno == EPERM) return true; return false; } #define RUN_TEST(...) do { sync_gpu(); __VA_ARGS__; sync_gpu(); } while (0) #define RUN_CTX_TEST(...) do { check_context(e); RUN_TEST(__VA_ARGS__); } while (0) igt_main { const struct intel_execution_engine *e; igt_skip_on_simulation(); igt_fixture { int fd; bool has_reset_stats; fd = drm_open_driver(DRIVER_INTEL); devid = intel_get_drm_devid(fd); has_reset_stats = gem_has_reset_stats(fd); close(fd); igt_require_f(has_reset_stats, "No reset stats ioctl support. Too old kernel?\n"); } igt_subtest("params") test_params(); igt_subtest_f("params-ctx") RUN_TEST(test_params_ctx()); for (e = intel_execution_engines; e->name; e++) { igt_subtest_f("reset-stats-%s", e->name) RUN_TEST(test_rs(e, 4, 1, 0)); igt_subtest_f("reset-stats-ctx-%s", e->name) RUN_CTX_TEST(test_rs_ctx(e, 4, 4, 1, 2)); igt_subtest_f("ban-%s", e->name) RUN_TEST(test_ban(e)); igt_subtest_f("ban-ctx-%s", e->name) RUN_CTX_TEST(test_ban_ctx(e)); igt_subtest_f("reset-count-%s", e->name) RUN_TEST(test_reset_count(e, false)); igt_subtest_f("reset-count-ctx-%s", e->name) RUN_CTX_TEST(test_reset_count(e, true)); igt_subtest_f("unrelated-ctx-%s", e->name) RUN_CTX_TEST(test_unrelated_ctx(e)); igt_subtest_f("close-pending-%s", e->name) RUN_TEST(test_close_pending(e)); igt_subtest_f("close-pending-ctx-%s", e->name) RUN_CTX_TEST(test_close_pending_ctx(e)); igt_subtest_f("close-pending-fork-%s", e->name) RUN_TEST(test_close_pending_fork(e, false)); igt_subtest_f("close-pending-fork-reverse-%s", e->name) RUN_TEST(test_close_pending_fork(e, true)); igt_subtest_f("defer-hangcheck-%s", e->name) RUN_TEST(defer_hangcheck(e)); } } intel-gpu-tools-1.14/tests/prime_nv_api.c0000644000175000017500000002650012665336131015411 00000000000000/* wierd use of API tests */ /* test1- export buffer from intel, import same fd twice into nouveau, check handles match test2 - export buffer from intel, import fd once, close fd, try import again fail if it succeeds test3 - export buffer from intel, import twice on nouveau, check handle is the same test4 - export handle twice from intel, import into nouveau twice, check handle is the same */ #include "igt.h" #include #include #include #include #include #include "intel_bufmgr.h" #include "nouveau.h" #define BO_SIZE (256*1024) int intel_fd = -1, intel_fd2 = -1, nouveau_fd = -1, nouveau_fd2 = -1; drm_intel_bufmgr *bufmgr; drm_intel_bufmgr *bufmgr2; struct nouveau_device *ndev, *ndev2; struct nouveau_client *nclient, *nclient2; uint32_t devid; struct intel_batchbuffer *intel_batch; static void find_and_open_devices(void) { int i; char path[80]; struct stat buf; FILE *fl; char vendor_id[8]; int venid; for (i = 0; i < 9; i++) { char *ret; sprintf(path, "/sys/class/drm/card%d/device/vendor", i); if (stat(path, &buf)) break; fl = fopen(path, "r"); if (!fl) break; ret = fgets(vendor_id, 8, fl); igt_assert(ret); fclose(fl); venid = strtoul(vendor_id, NULL, 16); sprintf(path, "/dev/dri/card%d", i); if (venid == 0x8086) { intel_fd = open(path, O_RDWR); igt_assert(intel_fd); intel_fd2 = open(path, O_RDWR); igt_assert(intel_fd2); } else if (venid == 0x10de) { nouveau_fd = open(path, O_RDWR); igt_assert(nouveau_fd); nouveau_fd2 = open(path, O_RDWR); igt_assert(nouveau_fd2); } } } static void test_i915_nv_import_twice(void) { drm_intel_bo *test_intel_bo; int prime_fd; struct nouveau_bo *nvbo = NULL, *nvbo2 = NULL; test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096); igt_assert(drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd) == 0); igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0); igt_assert(nouveau_bo_prime_handle_ref(ndev2, prime_fd, &nvbo2) == 0); close(prime_fd); nouveau_bo_ref(NULL, &nvbo2); nouveau_bo_ref(NULL, &nvbo); drm_intel_bo_unreference(test_intel_bo); } static void test_i915_nv_import_twice_check_flink_name(void) { drm_intel_bo *test_intel_bo; int prime_fd; struct nouveau_bo *nvbo = NULL, *nvbo2 = NULL; uint32_t flink_name1, flink_name2; test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096); igt_assert(drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd) == 0); igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0); igt_assert(nouveau_bo_prime_handle_ref(ndev2, prime_fd, &nvbo2) == 0); close(prime_fd); igt_assert(nouveau_bo_name_get(nvbo, &flink_name1) == 0); igt_assert(nouveau_bo_name_get(nvbo2, &flink_name2) == 0); igt_assert_eq_u32(flink_name1, flink_name2); nouveau_bo_ref(NULL, &nvbo2); nouveau_bo_ref(NULL, &nvbo); drm_intel_bo_unreference(test_intel_bo); } static void test_i915_nv_reimport_twice_check_flink_name(void) { drm_intel_bo *test_intel_bo; int prime_fd; struct nouveau_bo *nvbo = NULL, *nvbo2 = NULL; uint32_t flink_name1, flink_name2; test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096); igt_assert(drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd) == 0); igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0); /* create a new dma-buf */ close(prime_fd); igt_assert(drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd) == 0); igt_assert(nouveau_bo_prime_handle_ref(ndev2, prime_fd, &nvbo2) == 0); close(prime_fd); igt_assert(nouveau_bo_name_get(nvbo, &flink_name1) == 0); igt_assert(nouveau_bo_name_get(nvbo2, &flink_name2) == 0); igt_assert_eq_u32(flink_name1, flink_name2); nouveau_bo_ref(NULL, &nvbo2); nouveau_bo_ref(NULL, &nvbo); drm_intel_bo_unreference(test_intel_bo); } static void test_nv_i915_import_twice_check_flink_name(void) { drm_intel_bo *intel_bo = NULL, *intel_bo2 = NULL; int prime_fd; struct nouveau_bo *nvbo = NULL; uint32_t flink_name1, flink_name2; igt_assert(nouveau_bo_new(ndev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP, 0, BO_SIZE, NULL, &nvbo) == 0); igt_assert(nouveau_bo_set_prime(nvbo, &prime_fd) == 0); intel_bo = drm_intel_bo_gem_create_from_prime(bufmgr, prime_fd, BO_SIZE); igt_assert(intel_bo); intel_bo2 = drm_intel_bo_gem_create_from_prime(bufmgr2, prime_fd, BO_SIZE); igt_assert(intel_bo2); close(prime_fd); igt_assert(drm_intel_bo_flink(intel_bo, &flink_name1) == 0); igt_assert(drm_intel_bo_flink(intel_bo2, &flink_name2) == 0); igt_assert_eq_u32(flink_name1, flink_name2); nouveau_bo_ref(NULL, &nvbo); drm_intel_bo_unreference(intel_bo); drm_intel_bo_unreference(intel_bo2); } static void test_nv_i915_reimport_twice_check_flink_name(void) { drm_intel_bo *intel_bo = NULL, *intel_bo2 = NULL; int prime_fd; struct nouveau_bo *nvbo = NULL; uint32_t flink_name1, flink_name2; igt_assert(nouveau_bo_new(ndev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP, 0, BO_SIZE, NULL, &nvbo) == 0); igt_assert(nouveau_bo_set_prime(nvbo, &prime_fd) == 0); intel_bo = drm_intel_bo_gem_create_from_prime(bufmgr, prime_fd, BO_SIZE); igt_assert(intel_bo); close(prime_fd); igt_assert(nouveau_bo_set_prime(nvbo, &prime_fd) == 0); intel_bo2 = drm_intel_bo_gem_create_from_prime(bufmgr2, prime_fd, BO_SIZE); igt_assert(intel_bo2); close(prime_fd); igt_assert(drm_intel_bo_flink(intel_bo, &flink_name1) == 0); igt_assert(drm_intel_bo_flink(intel_bo2, &flink_name2) == 0); igt_assert_eq_u32(flink_name1, flink_name2); nouveau_bo_ref(NULL, &nvbo); drm_intel_bo_unreference(intel_bo); drm_intel_bo_unreference(intel_bo2); } static void test_i915_nv_import_vs_close(void) { drm_intel_bo *test_intel_bo; int prime_fd; struct nouveau_bo *nvbo = NULL, *nvbo2 = NULL; test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096); igt_assert(test_intel_bo); igt_assert(drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd) == 0); igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0); close(prime_fd); igt_assert(nouveau_bo_prime_handle_ref(ndev2, prime_fd, &nvbo2) < 0); nouveau_bo_ref(NULL, &nvbo2); nouveau_bo_ref(NULL, &nvbo); drm_intel_bo_unreference(test_intel_bo); } /* import handle twice on one driver */ static void test_i915_nv_double_import(void) { drm_intel_bo *test_intel_bo; int prime_fd; struct nouveau_bo *nvbo = NULL, *nvbo2 = NULL; test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096); igt_assert(test_intel_bo); igt_assert(drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd) == 0); igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0); igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo2) == 0); close(prime_fd); igt_assert(nvbo->handle == nvbo2->handle); nouveau_bo_ref(NULL, &nvbo2); nouveau_bo_ref(NULL, &nvbo); drm_intel_bo_unreference(test_intel_bo); } /* export handle twice from one driver - import twice see if we get same object */ static void test_i915_nv_double_export(void) { drm_intel_bo *test_intel_bo; int prime_fd, prime_fd2; struct nouveau_bo *nvbo = NULL, *nvbo2 = NULL; test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096); igt_assert(test_intel_bo); drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd); drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd2); igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0); close(prime_fd); igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd2, &nvbo2) == 0); close(prime_fd2); igt_assert(nvbo->handle == nvbo2->handle); nouveau_bo_ref(NULL, &nvbo2); nouveau_bo_ref(NULL, &nvbo); drm_intel_bo_unreference(test_intel_bo); } /* export handle from intel driver - reimport to intel driver see if you get same object */ static void test_i915_self_import(void) { drm_intel_bo *test_intel_bo, *test_intel_bo2; int prime_fd; test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096); drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd); test_intel_bo2 = drm_intel_bo_gem_create_from_prime(bufmgr, prime_fd, BO_SIZE); close(prime_fd); igt_assert(test_intel_bo2); igt_assert(test_intel_bo->handle == test_intel_bo2->handle); drm_intel_bo_unreference(test_intel_bo); } /* nouveau export reimport test */ static void test_nv_self_import(void) { int prime_fd; struct nouveau_bo *nvbo, *nvbo2; igt_assert(nouveau_bo_new(ndev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP, 0, BO_SIZE, NULL, &nvbo) == 0); igt_assert(nouveau_bo_set_prime(nvbo, &prime_fd) == 0); igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo2) == 0); close(prime_fd); igt_assert(nvbo->handle == nvbo2->handle); nouveau_bo_ref(NULL, &nvbo); nouveau_bo_ref(NULL, &nvbo2); } /* export handle from intel driver - reimport to another intel driver bufmgr see if you get same object */ static void test_i915_self_import_to_different_fd(void) { drm_intel_bo *test_intel_bo, *test_intel_bo2; int prime_fd; test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096); drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd); test_intel_bo2 = drm_intel_bo_gem_create_from_prime(bufmgr2, prime_fd, BO_SIZE); close(prime_fd); igt_assert(test_intel_bo2); drm_intel_bo_unreference(test_intel_bo2); drm_intel_bo_unreference(test_intel_bo); } /* nouveau export reimport to other driver test */ static void test_nv_self_import_to_different_fd(void) { int prime_fd; struct nouveau_bo *nvbo, *nvbo2; igt_assert(nouveau_bo_new(ndev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP, 0, BO_SIZE, NULL, &nvbo) == 0); igt_assert(nouveau_bo_set_prime(nvbo, &prime_fd) == 0); igt_assert(nouveau_bo_prime_handle_ref(ndev2, prime_fd, &nvbo2) == 0); close(prime_fd); /* not sure what to test for, just make sure we don't explode */ nouveau_bo_ref(NULL, &nvbo); nouveau_bo_ref(NULL, &nvbo2); } igt_main { igt_fixture { find_and_open_devices(); igt_require(nouveau_fd != -1); igt_require(nouveau_fd2 != -1); igt_require(intel_fd != -1); igt_require(intel_fd2 != -1); /* set up intel bufmgr */ bufmgr = drm_intel_bufmgr_gem_init(intel_fd, 4096); igt_assert(bufmgr); /* Do not enable reuse, we share (almost) all buffers. */ //drm_intel_bufmgr_gem_enable_reuse(bufmgr); bufmgr2 = drm_intel_bufmgr_gem_init(intel_fd2, 4096); igt_assert(bufmgr2); drm_intel_bufmgr_gem_enable_reuse(bufmgr2); /* set up nouveau bufmgr */ igt_assert(nouveau_device_wrap(nouveau_fd, 0, &ndev) >= 0); igt_assert(nouveau_client_new(ndev, &nclient) >= 0); /* set up nouveau bufmgr */ igt_assert(nouveau_device_wrap(nouveau_fd2, 0, &ndev2) >= 0); igt_assert(nouveau_client_new(ndev2, &nclient2) >= 0);; /* set up an intel batch buffer */ devid = intel_get_drm_devid(intel_fd); intel_batch = intel_batchbuffer_alloc(bufmgr, devid); igt_assert(intel_batch); } #define xtest(name) \ igt_subtest(#name) \ test_##name(); xtest(i915_nv_import_twice); xtest(i915_nv_import_twice_check_flink_name); xtest(i915_nv_reimport_twice_check_flink_name); xtest(nv_i915_import_twice_check_flink_name); xtest(nv_i915_reimport_twice_check_flink_name); xtest(i915_nv_import_vs_close); xtest(i915_nv_double_import); xtest(i915_nv_double_export); xtest(i915_self_import); xtest(nv_self_import); xtest(i915_self_import_to_different_fd); xtest(nv_self_import_to_different_fd); igt_fixture { intel_batchbuffer_free(intel_batch); nouveau_device_del(&ndev); drm_intel_bufmgr_destroy(bufmgr); close(intel_fd); close(nouveau_fd); } } intel-gpu-tools-1.14/tests/gem_gtt_hog.c0000644000175000017500000001167612665336131015234 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include #include "drm.h" static const uint32_t canary = 0xdeadbeef; typedef struct data { int fd; int devid; int intel_gen; } data_t; static double elapsed(const struct timeval *start, const struct timeval *end) { return 1e6*(end->tv_sec - start->tv_sec) + (end->tv_usec - start->tv_usec); } static void busy(data_t *data, uint32_t handle, int size, int loops) { struct drm_i915_gem_relocation_entry reloc[20]; struct drm_i915_gem_exec_object2 gem_exec[2]; struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_pwrite gem_pwrite; struct drm_i915_gem_create create; uint32_t buf[170], *b; int i; memset(reloc, 0, sizeof(reloc)); memset(gem_exec, 0, sizeof(gem_exec)); memset(&execbuf, 0, sizeof(execbuf)); b = buf; for (i = 0; i < 20; i++) { *b++ = XY_COLOR_BLT_CMD_NOLEN | ((data->intel_gen >= 8) ? 5 : 4) | COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB; *b++ = 0xf0 << 16 | 1 << 25 | 1 << 24 | 4096; *b++ = 0; *b++ = size >> 12 << 16 | 1024; reloc[i].offset = (b - buf) * sizeof(uint32_t); reloc[i].target_handle = handle; reloc[i].read_domains = I915_GEM_DOMAIN_RENDER; reloc[i].write_domain = I915_GEM_DOMAIN_RENDER; *b++ = 0; if (data->intel_gen >= 8) *b++ = 0; *b++ = canary; } *b++ = MI_BATCH_BUFFER_END; if ((b - buf) & 1) *b++ = 0; gem_exec[0].handle = handle; gem_exec[0].flags = EXEC_OBJECT_NEEDS_FENCE; create.handle = 0; create.size = 4096; drmIoctl(data->fd, DRM_IOCTL_I915_GEM_CREATE, &create); gem_exec[1].handle = create.handle; gem_exec[1].relocation_count = 20; gem_exec[1].relocs_ptr = (uintptr_t)reloc; execbuf.buffers_ptr = (uintptr_t)gem_exec; execbuf.buffer_count = 2; execbuf.batch_len = (b - buf) * sizeof(buf[0]); execbuf.flags = 1 << 11; if (HAS_BLT_RING(data->devid)) execbuf.flags |= I915_EXEC_BLT; gem_pwrite.handle = gem_exec[1].handle; gem_pwrite.offset = 0; gem_pwrite.size = execbuf.batch_len; gem_pwrite.data_ptr = (uintptr_t)buf; if (drmIoctl(data->fd, DRM_IOCTL_I915_GEM_PWRITE, &gem_pwrite) == 0) { while (loops--) drmIoctl(data->fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); } drmIoctl(data->fd, DRM_IOCTL_GEM_CLOSE, &create.handle); } static void run(data_t *data, int child) { const int size = 4096 * (256 + child * child); const int tiling = child % 2; const int write = child % 2; uint32_t handle = gem_create(data->fd, size); uint32_t *ptr; uint32_t x; igt_assert(handle); if (tiling != I915_TILING_NONE) gem_set_tiling(data->fd, handle, tiling, 4096); /* load up the unfaulted bo */ busy(data, handle, size, 100); /* Note that we ignore the API and rely on the implict * set-to-gtt-domain within the fault handler. */ if (write) { ptr = gem_mmap__gtt(data->fd, handle, size, PROT_READ | PROT_WRITE); ptr[rand() % (size / 4)] = canary; } else { ptr = gem_mmap__gtt(data->fd, handle, size, PROT_READ); } x = ptr[rand() % (size / 4)]; munmap(ptr, size); igt_assert_eq_u32(x, canary); } igt_simple_main { struct timeval start, end; pid_t children[64]; data_t data = {}; /* check for an intel gpu before goint nuts. */ int fd = drm_open_driver(DRIVER_INTEL); close(fd); igt_skip_on_simulation(); data.fd = drm_open_driver(DRIVER_INTEL); data.devid = intel_get_drm_devid(data.fd); data.intel_gen = intel_gen(data.devid); gettimeofday(&start, NULL); igt_fork(child, ARRAY_SIZE(children)) run(&data, child); igt_waitchildren(); gettimeofday(&end, NULL); igt_info("Time to execute %zu children: %7.3fms\n", ARRAY_SIZE(children), elapsed(&start, &end) / 1000); } intel-gpu-tools-1.14/tests/drm_lib.sh0000755000175000017500000000340412665336131014542 00000000000000#!/bin/sh IGT_EXIT_TIMEOUT=78 IGT_EXIT_SKIP=77 IGT_EXIT_SUCCESS=0 IGT_EXIT_INVALID=79 IGT_EXIT_FAILURE=99 # hacked-up long option parsing for arg in $@ ; do case $arg in --list-subtests) exit $IGT_EXIT_INVALID ;; --run-subtest) exit $IGT_EXIT_INVALID ;; --debug) IGT_LOG_LEVEL=debug ;; --help-description) echo $IGT_TEST_DESCRIPTION exit $IGT_EXIT_SUCCESS ;; --help) echo "Usage: `basename $0` [OPTIONS]" echo " --list-subtests" echo " --run-subtest " echo " --debug" echo " --help-description" echo " --help" exit $IGT_EXIT_SUCCESS ;; esac done skip() { echo "$@" exit $IGT_EXIT_SKIP } die() { echo "$@" exit $IGT_EXIT_FAILURE } do_or_die() { $@ > /dev/null 2>&1 || (echo "FAIL: $@ ($?)" && exit $IGT_EXIT_FAILURE) } if [ -d /debug/dri ] ; then debugfs_path=/debug/dri fi if [ -d /sys/kernel/debug/dri ] ; then debugfs_path=/sys/kernel/debug/dri fi i915_dfs_path=x for minor in `seq 0 16`; do if [ -f $debugfs_path/$minor/i915_error_state ] ; then i915_dfs_path=$debugfs_path/$minor break fi done if [ $i915_dfs_path = "x" ] ; then skip " i915 debugfs path not found." fi # read everything we can if [ `cat $i915_dfs_path/clients | wc -l` -gt "2" ] ; then [ -n "$DRM_LIB_ALLOW_NO_MASTER" ] || \ die "ERROR: other drm clients running" fi whoami | grep -q root || ( echo ERROR: not running as root; exit $IGT_EXIT_FAILURE ) i915_sfs_path= if [ -d /sys/class/drm ] ; then sysfs_path=/sys/class/drm if [ -f $sysfs_path/card$minor/error ] ; then i915_sfs_path="$sysfs_path/card$minor" fi fi # sysfs may not exist as the 'error' is a new interface in 3.11 function drmtest_skip_on_simulation() { [ -n "$INTEL_SIMULATION" ] && exit $IGT_EXIT_SKIP } drmtest_skip_on_simulation intel-gpu-tools-1.14/tests/gem_set_tiling_vs_blt.c0000644000175000017500000001777012665336131017314 00000000000000/* * Copyright © 2012 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * */ /** @file gem_set_tiling_vs_blt.c * * Testcase: Check for proper synchronization of tiling changes vs. tiled gpu * access * * The blitter on gen3 and earlier needs properly set up fences. Which also * means that for untiled blits we may not set up a fence before that blt has * finished. * * Current kernels have a bug there, but it's pretty hard to hit because you * need: * - a blt on an untiled object which is aligned correctly for tiling. * - a set_tiling to switch that object to tiling * - another blt without any intervening cpu access that uses this object. * * Testcase has been extended to also check tiled->untiled and tiled->tiled * transitions (i.e. changing stride). */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include "drm.h" #include "intel_bufmgr.h" IGT_TEST_DESCRIPTION("Check for proper synchronization of tiling changes vs." " tiled gpu access."); static drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; uint32_t devid; #define TEST_SIZE (1024*1024) #define TEST_STRIDE (4*1024) #define TEST_HEIGHT(stride) (TEST_SIZE/(stride)) #define TEST_WIDTH(stride) ((stride)/4) uint32_t data[TEST_SIZE/4]; static void do_test(uint32_t tiling, unsigned stride, uint32_t tiling_after, unsigned stride_after) { drm_intel_bo *busy_bo, *test_bo, *target_bo; int i, ret; uint32_t *ptr; uint32_t test_bo_handle; uint32_t blt_stride, blt_bits; bool tiling_changed = false; igt_info("filling ring .. "); busy_bo = drm_intel_bo_alloc(bufmgr, "busy bo bo", 16*1024*1024, 4096); for (i = 0; i < 250; i++) { BLIT_COPY_BATCH_START(0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ 2*1024*4); OUT_BATCH(0 << 16 | 1024); OUT_BATCH((2048) << 16 | (2048)); OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(0 << 16 | 0); OUT_BATCH(2*1024*4); OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, 0, 0); ADVANCE_BATCH(); if (batch->gen >= 6) { BEGIN_BATCH(3, 0); OUT_BATCH(XY_SETUP_CLIP_BLT_CMD); OUT_BATCH(0); OUT_BATCH(0); ADVANCE_BATCH(); } } intel_batchbuffer_flush(batch); igt_info("playing tricks .. "); /* first allocate the target so it gets out of the way of playing funky * tricks */ target_bo = drm_intel_bo_alloc(bufmgr, "target bo", TEST_SIZE, 4096); /* allocate buffer with parameters _after_ transition we want to check * and touch it, so that it's properly aligned in the gtt. */ test_bo = drm_intel_bo_alloc(bufmgr, "tiled busy bo", TEST_SIZE, 4096); test_bo_handle = test_bo->handle; ret = drm_intel_bo_set_tiling(test_bo, &tiling_after, stride_after); igt_assert_eq(ret, 0); drm_intel_gem_bo_map_gtt(test_bo); ptr = test_bo->virtual; *ptr = 0; ptr = NULL; drm_intel_gem_bo_unmap_gtt(test_bo); drm_intel_bo_unreference(test_bo); test_bo = NULL; /* note we need a bo bigger than batches, otherwise the buffer reuse * trick will fail. */ test_bo = drm_intel_bo_alloc(bufmgr, "busy bo", TEST_SIZE, 4096); /* double check that the reuse trick worked */ igt_assert(test_bo_handle == test_bo->handle); test_bo_handle = test_bo->handle; /* ensure we have the right tiling before we start. */ ret = drm_intel_bo_set_tiling(test_bo, &tiling, stride); igt_assert_eq(ret, 0); if (tiling == I915_TILING_NONE) { drm_intel_bo_subdata(test_bo, 0, TEST_SIZE, data); } else { drm_intel_gem_bo_map_gtt(test_bo); ptr = test_bo->virtual; memcpy(ptr, data, TEST_SIZE); ptr = NULL; drm_intel_gem_bo_unmap_gtt(test_bo); } blt_stride = stride; blt_bits = 0; if (intel_gen(devid) >= 4 && tiling != I915_TILING_NONE) { blt_stride /= 4; blt_bits = XY_SRC_COPY_BLT_SRC_TILED; } BLIT_COPY_BATCH_START(blt_bits); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ stride); OUT_BATCH(0 << 16 | 0); OUT_BATCH((TEST_HEIGHT(stride)) << 16 | (TEST_WIDTH(stride))); OUT_RELOC_FENCED(target_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(0 << 16 | 0); OUT_BATCH(blt_stride); OUT_RELOC_FENCED(test_bo, I915_GEM_DOMAIN_RENDER, 0, 0); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); drm_intel_bo_unreference(test_bo); test_bo = drm_intel_bo_alloc_for_render(bufmgr, "tiled busy bo", TEST_SIZE, 4096); /* double check that the reuse trick worked */ igt_assert(test_bo_handle == test_bo->handle); ret = drm_intel_bo_set_tiling(test_bo, &tiling_after, stride_after); igt_assert_eq(ret, 0); /* Note: We don't care about gen4+ here because the blitter doesn't use * fences there. So not setting tiling flags on the tiled buffer is ok. */ BLIT_COPY_BATCH_START(0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ stride_after); OUT_BATCH(0 << 16 | 0); OUT_BATCH((1) << 16 | (1)); OUT_RELOC_FENCED(test_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(0 << 16 | 0); OUT_BATCH(stride_after); OUT_RELOC_FENCED(test_bo, I915_GEM_DOMAIN_RENDER, 0, 0); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); /* Now try to trick the kernel the kernel into changing up the fencing * too early. */ igt_info("checking .. "); memset(data, 0, TEST_SIZE); drm_intel_bo_get_subdata(target_bo, 0, TEST_SIZE, data); for (i = 0; i < TEST_SIZE/4; i++) igt_assert(data[i] == i); /* check whether tiling on the test_bo actually changed. */ drm_intel_gem_bo_map_gtt(test_bo); ptr = test_bo->virtual; for (i = 0; i < TEST_SIZE/4; i++) if (ptr[i] != data[i]) tiling_changed = true; ptr = NULL; drm_intel_gem_bo_unmap_gtt(test_bo); igt_assert(tiling_changed); drm_intel_bo_unreference(test_bo); drm_intel_bo_unreference(target_bo); drm_intel_bo_unreference(busy_bo); igt_info("done\n"); } int fd; igt_main { int i; uint32_t tiling, tiling_after; igt_skip_on_simulation(); igt_fixture { for (i = 0; i < 1024*256; i++) data[i] = i; fd = drm_open_driver(DRIVER_INTEL); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); drm_intel_bufmgr_gem_enable_reuse(bufmgr); devid = intel_get_drm_devid(fd); batch = intel_batchbuffer_alloc(bufmgr, devid); } igt_subtest("untiled-to-tiled") { tiling = I915_TILING_NONE; tiling_after = I915_TILING_X; do_test(tiling, TEST_STRIDE, tiling_after, TEST_STRIDE); igt_assert(tiling == I915_TILING_NONE); igt_assert(tiling_after == I915_TILING_X); } igt_subtest("tiled-to-untiled") { tiling = I915_TILING_X; tiling_after = I915_TILING_NONE; do_test(tiling, TEST_STRIDE, tiling_after, TEST_STRIDE); igt_assert(tiling == I915_TILING_X); igt_assert(tiling_after == I915_TILING_NONE); } igt_subtest("tiled-to-tiled") { tiling = I915_TILING_X; tiling_after = I915_TILING_X; do_test(tiling, TEST_STRIDE/2, tiling_after, TEST_STRIDE); igt_assert(tiling == I915_TILING_X); igt_assert(tiling_after == I915_TILING_X); } } intel-gpu-tools-1.14/tests/gem_tiled_swapping.c0000644000175000017500000001354112665336131016603 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * */ /** @file gem_tiled_pread_pwrite.c * * This is a test of pread's behavior on tiled objects with respect to the * reported swizzling value. * * The goal is to exercise the slow_bit17_copy path for reading on bit17 * machines, but will also be useful for catching swizzling value bugs on * other systems. */ /* * Testcase: Exercise swizzle code for swapping * * The swizzle checks in the swapin path are at a different place than the ones * for pread/pwrite, so we need to check them separately. * * This test obviously needs swap present (and exits if none is detected). */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include IGT_TEST_DESCRIPTION("Exercise swizzle code for swapping."); #define WIDTH 512 #define HEIGHT 512 #define LINEAR_DWORDS (4 * WIDTH * HEIGHT) static uint32_t current_tiling_mode; #define PAGE_SIZE 4096 #define AVAIL_RAM 512 static uint32_t create_bo(int fd) { uint32_t handle; uint32_t *data; handle = gem_create(fd, LINEAR_DWORDS); gem_set_tiling(fd, handle, current_tiling_mode, WIDTH * sizeof(uint32_t)); data = __gem_mmap__gtt(fd, handle, LINEAR_DWORDS, PROT_READ | PROT_WRITE); if (data == NULL) { gem_close(fd, handle); return 0; } munmap(data, LINEAR_DWORDS); return handle; } static void fill_bo(int fd, uint32_t handle) { uint32_t *data; int i; data = gem_mmap__gtt(fd, handle, LINEAR_DWORDS, PROT_READ | PROT_WRITE); gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); for (i = 0; i < WIDTH*HEIGHT; i++) data[i] = i; munmap(data, LINEAR_DWORDS); } static void check_bo(int fd, uint32_t handle) { uint32_t *data; int j; data = gem_mmap__gtt(fd, handle, LINEAR_DWORDS, PROT_READ); gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, 0); j = rand() % (WIDTH * HEIGHT); igt_assert_f(data[j] == j, "mismatch at %i: %i\n", j, data[j]); munmap(data, LINEAR_DWORDS); } uint32_t *bo_handles; struct thread { pthread_t thread; int *idx_arr; int fd, count; }; static void *thread_run(void *data) { struct thread *t = data; int i; for (i = 0; i < t->count; i++) check_bo(t->fd, bo_handles[t->idx_arr[i]]); return NULL; } static void thread_init(struct thread *t, int fd, int count) { int i; t->fd = fd; t->count = count; t->idx_arr = calloc(count, sizeof(int)); igt_assert(t->idx_arr); for (i = 0; i < count; i++) t->idx_arr[i] = i; igt_permute_array(t->idx_arr, count, igt_exchange_int); } static void thread_fini(struct thread *t) { free(t->idx_arr); } static void check_memory_layout(void) { igt_skip_on_f(igt_debugfs_search("i915_swizzle_info", "L-shaped"), "L-shaped memory configuration detected\n"); igt_debug("normal memory configuration detected, continuing\n"); } igt_main { struct thread *threads; int fd, n, count, num_threads; igt_fixture { size_t lock_size; current_tiling_mode = I915_TILING_X; intel_purge_vm_caches(); fd = drm_open_driver(DRIVER_INTEL); check_memory_layout(); /* lock RAM, leaving only 512MB available */ lock_size = max(0, intel_get_total_ram_mb() - AVAIL_RAM); igt_lock_mem(lock_size); /* need slightly more than available memory */ count = min(intel_get_total_ram_mb(), AVAIL_RAM) * 1.25; bo_handles = calloc(count, sizeof(uint32_t)); igt_assert(bo_handles); num_threads = gem_available_fences(fd); threads = calloc(num_threads, sizeof(struct thread)); igt_assert(threads); igt_info("Using %d 1MiB objects (available RAM: %ld/%ld, swap: %ld)\n", count, (long)intel_get_avail_ram_mb(), (long)intel_get_total_ram_mb(), (long)intel_get_total_swap_mb()); intel_require_memory(count, 1024*1024, CHECK_RAM | CHECK_SWAP); for (n = 0; n < count; n++) { bo_handles[n] = create_bo(fd); /* Not enough mmap address space possible. */ igt_require(bo_handles[n]); } } igt_subtest("non-threaded") { for (n = 0; n < count; n++) fill_bo(fd, bo_handles[n]); thread_init(&threads[0], fd, count); thread_run(&threads[0]); thread_run(&threads[0]); thread_run(&threads[0]); thread_fini(&threads[0]); } /* Once more with threads */ igt_subtest("threaded") { for (n = 0; n < count; n++) fill_bo(fd, bo_handles[n]); for (n = 0; n < num_threads; n++) thread_init(&threads[n], fd, count); thread_run(&threads[0]); for (n = 0; n < num_threads; n++) pthread_create(&threads[n].thread, NULL, thread_run, &threads[n]); for (n = 0; n < num_threads; n++) pthread_join(threads[n].thread, NULL); thread_run(&threads[0]); for (n = 0; n < num_threads; n++) thread_fini(&threads[n]); } close(fd); } intel-gpu-tools-1.14/tests/gem_cs_prefetch.c0000644000175000017500000001072512665336131016060 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * */ /* * Testcase: Test the CS prefetch behaviour on batches * * Historically the batch prefetcher doesn't check whether it's crossing page * boundaries and likes to throw up when it gets a pagefault in return for his * over-eager behaviour. Check for this. * * This test for a bug where we've failed to plug a scratch pte entry into the * very last gtt pte. */ #include "igt.h" IGT_TEST_DESCRIPTION("Test the CS prefetch behaviour on batches."); #define BATCH_SIZE 4096 struct shadow { uint32_t handle; struct drm_i915_gem_relocation_entry reloc; }; static void gem_require_store_dword(int fd, unsigned ring) { int gen = intel_gen(intel_get_drm_devid(fd)); ring &= ~(3 << 13); igt_skip_on_f(gen == 6 && ring == I915_EXEC_BSD, "MI_STORE_DATA broken on gen6 bsd\n"); } static void setup(int fd, int gen, struct shadow *shadow) { uint32_t buf[16]; int i; shadow->handle = gem_create(fd, 4096); i = 0; buf[i++] = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0); if (gen >= 8) { buf[i++] = BATCH_SIZE - sizeof(uint32_t); buf[i++] = 0; } else if (gen >= 4) { buf[i++] = 0; buf[i++] = BATCH_SIZE - sizeof(uint32_t); } else { buf[i-1]--; buf[i++] = BATCH_SIZE - sizeof(uint32_t); } buf[i++] = MI_BATCH_BUFFER_END; buf[i++] = MI_BATCH_BUFFER_END; gem_write(fd, shadow->handle, 0, buf, sizeof(buf)); memset(&shadow->reloc, 0, sizeof(shadow->reloc)); if (gen >= 8 || gen < 4) shadow->reloc.offset = sizeof(uint32_t); else shadow->reloc.offset = 2*sizeof(uint32_t); shadow->reloc.delta = BATCH_SIZE - sizeof(uint32_t); shadow->reloc.read_domains = I915_GEM_DOMAIN_INSTRUCTION; shadow->reloc.write_domain = I915_GEM_DOMAIN_INSTRUCTION; } static void can_test_ring(unsigned ring) { int master = drm_open_driver_master(DRIVER_INTEL); int fd = drm_open_driver(DRIVER_INTEL); /* Dance to avoid dying with master open */ close(master); gem_require_ring(fd, ring); gem_require_store_dword(fd, ring); close(fd); } static void test_ring(unsigned ring) { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 obj[2]; struct shadow shadow; uint64_t i, count; int fd, gen; can_test_ring(ring); fd = drm_open_driver_master(DRIVER_INTEL); gen = intel_gen(intel_get_drm_devid(fd)); setup(fd, gen, &shadow); count = gem_aperture_size(fd) / BATCH_SIZE; intel_require_memory(count, BATCH_SIZE, CHECK_RAM); /* Fill the entire gart with batches and run them. */ memset(obj, 0, sizeof(obj)); obj[1].handle = shadow.handle; obj[1].relocs_ptr = (uintptr_t)&shadow.reloc; obj[1].relocation_count = 1; memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)obj; execbuf.flags = ring; if (gen < 6) execbuf.flags |= I915_EXEC_SECURE; for (i = 0; i < count; i++) { /* Create the new batch using the GPU */ obj[0].handle = gem_create(fd, BATCH_SIZE); shadow.reloc.target_handle = obj[0].handle; execbuf.buffer_count = 2; gem_execbuf(fd, &execbuf); /* ...then execute the new batch */ execbuf.buffer_count = 1; gem_execbuf(fd, &execbuf); /* ...and leak the handle to consume the GTT */ } close(fd); } igt_main { const struct intel_execution_engine *e; igt_skip_on_simulation(); for (e = intel_execution_engines; e->name; e++) igt_subtest_f("%s%s", e->exec_id ? "" : "basic-", e->name) test_ring(e->exec_id | e->flags); } intel-gpu-tools-1.14/tests/gem_seqno_wrap.c0000644000175000017500000002705212665336131015752 00000000000000/* * Copyright (c) 2012 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Mika Kuoppala * */ /* * This test runs blitcopy -> rendercopy with multiple buffers over wrap * boundary. */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include "intel_bufmgr.h" IGT_TEST_DESCRIPTION("Runs blitcopy -> rendercopy with multiple buffers over" " wrap boundary."); static int devid; static int card_index = 0; static uint32_t last_seqno = 0; static struct intel_batchbuffer *batch_blt; static struct intel_batchbuffer *batch_3d; struct option_struct { int rounds; int background; int timeout; int dontwrap; int prewrap_space; int random; int buffers; }; static struct option_struct options; static void init_buffer(drm_intel_bufmgr *bufmgr, struct igt_buf *buf, drm_intel_bo *bo, int width, int height) { /* buf->bo = drm_intel_bo_alloc(bufmgr, "", size, 4096); */ buf->bo = bo; buf->size = width * height * 4; igt_assert(buf->bo); buf->tiling = I915_TILING_NONE; buf->num_tiles = width * height * 4; buf->stride = width * 4; } static void set_bo(drm_intel_bo *bo, uint32_t val, int width, int height) { int size = width * height; uint32_t *vaddr; drm_intel_gem_bo_start_gtt_access(bo, true); vaddr = bo->virtual; while (size--) *vaddr++ = val; } static void cmp_bo(drm_intel_bo *bo, uint32_t val, int width, int height) { int size = width * height; uint32_t *vaddr; drm_intel_gem_bo_start_gtt_access(bo, false); vaddr = bo->virtual; while (size--) { igt_assert_f(*vaddr++ == val, "%d: 0x%x differs from assumed 0x%x\n" "seqno_before_test 0x%x, " " approximated seqno on test fail 0x%x\n", width * height - size, *vaddr-1, val, last_seqno, last_seqno + val * 2); } } static drm_intel_bo * create_bo(drm_intel_bufmgr *bufmgr, uint32_t val, int width, int height) { drm_intel_bo *bo; bo = drm_intel_bo_alloc(bufmgr, "bo", width * height * 4, 0); igt_assert(bo); /* gtt map doesn't have a write parameter, so just keep the mapping * around (to avoid the set_domain with the gtt write domain set) and * manually tell the kernel when we start access the gtt. */ drm_intel_gem_bo_map_gtt(bo); set_bo(bo, val, width, height); return bo; } static void release_bo(drm_intel_bo *bo) { drm_intel_gem_bo_unmap_gtt(bo); drm_intel_bo_unreference(bo); } static void render_copyfunc(struct igt_buf *src, struct igt_buf *dst, int width, int height) { const int src_x = 0, src_y = 0, dst_x = 0, dst_y = 0; igt_render_copyfunc_t rendercopy = igt_get_render_copyfunc(devid); static int warned = 0; if (rendercopy) { rendercopy(batch_3d, NULL, src, src_x, src_y, width, height, dst, dst_x, dst_y); intel_batchbuffer_flush(batch_3d); } else { if (!warned) { igt_info("No render copy found for this gen, ""test is shallow!\n"); warned = 1; } igt_assert(dst->bo); igt_assert(src->bo); intel_copy_bo(batch_blt, dst->bo, src->bo, width*height*4); intel_batchbuffer_flush(batch_blt); } } static void exchange_uint(void *array, unsigned i, unsigned j) { unsigned *i_arr = array; igt_swap(i_arr[i], i_arr[j]); } static void run_sync_test(int num_buffers, bool verify) { drm_intel_bufmgr *bufmgr; int max; drm_intel_bo **src, **dst1, **dst2; int width = 128, height = 128; int fd; int i; unsigned int *p_dst1, *p_dst2; struct igt_buf *s_src, *s_dst; fd = drm_open_driver(DRIVER_INTEL); gem_quiescent_gpu(fd); devid = intel_get_drm_devid(fd); max = gem_aperture_size (fd) / (1024 * 1024) / 2; if (num_buffers > max) num_buffers = max; bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); drm_intel_bufmgr_gem_enable_reuse(bufmgr); batch_blt = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd)); igt_assert(batch_blt); batch_3d = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd)); igt_assert(batch_3d); src = malloc(num_buffers * sizeof(*src)); igt_assert(src); dst1 = malloc(num_buffers * sizeof(*dst1)); igt_assert(dst1); dst2 = malloc(num_buffers * sizeof(*dst2)); igt_assert(dst2); s_src = malloc(num_buffers * sizeof(*s_src)); igt_assert(s_src); s_dst = malloc(num_buffers * sizeof(*s_dst)); igt_assert(s_dst); p_dst1 = malloc(num_buffers * sizeof(unsigned int)); igt_assert(p_dst1); p_dst2 = malloc(num_buffers * sizeof(unsigned int)); igt_assert(p_dst2); for (i = 0; i < num_buffers; i++) { p_dst1[i] = p_dst2[i] = i; src[i] = create_bo(bufmgr, i, width, height); igt_assert(src[i]); dst1[i] = create_bo(bufmgr, ~i, width, height); igt_assert(dst1[i]); dst2[i] = create_bo(bufmgr, ~i, width, height); igt_assert(dst2[i]); init_buffer(bufmgr, &s_src[i], src[i], width, height); init_buffer(bufmgr, &s_dst[i], dst1[i], width, height); } igt_permute_array(p_dst1, num_buffers, exchange_uint); igt_permute_array(p_dst2, num_buffers, exchange_uint); for (i = 0; i < num_buffers; i++) render_copyfunc(&s_src[i], &s_dst[p_dst1[i]], width, height); /* Only sync between buffers if this is actual test run and * not a seqno filler */ if (verify) { for (i = 0; i < num_buffers; i++) intel_copy_bo(batch_blt, dst2[p_dst2[i]], dst1[p_dst1[i]], width*height*4); for (i = 0; i < num_buffers; i++) { cmp_bo(dst2[p_dst2[i]], i, width, height); } } for (i = 0; i < num_buffers; i++) { release_bo(src[i]); release_bo(dst1[i]); release_bo(dst2[i]); } intel_batchbuffer_free(batch_3d); intel_batchbuffer_free(batch_blt); drm_intel_bufmgr_destroy(bufmgr); free(p_dst1); free(p_dst2); free(s_dst); free(s_src); free(dst2); free(dst1); free(src); gem_quiescent_gpu(fd); close(fd); } static int __read_seqno(uint32_t *seqno) { int fh; char buf[32]; int r; char *p; unsigned long int tmp; fh = igt_debugfs_open("i915_next_seqno", O_RDONLY); r = read(fh, buf, sizeof(buf) - 1); close(fh); if (r < 0) { igt_warn("read"); return -errno; } buf[r] = 0; p = strstr(buf, "0x"); if (!p) p = buf; errno = 0; tmp = strtoul(p, NULL, 0); if (tmp == ULONG_MAX && errno) { igt_warn("strtoul"); return -errno; } *seqno = tmp; igt_debug("next_seqno: 0x%x\n", *seqno); return 0; } static int read_seqno(void) { uint32_t seqno = 0; int r; int wrap = 0; r = __read_seqno(&seqno); igt_assert_eq(r, 0); if (last_seqno > seqno) wrap++; last_seqno = seqno; return wrap; } static int write_seqno(uint32_t seqno) { int fh; char buf[32]; int r; uint32_t rb = -1; if (options.dontwrap) return 0; fh = igt_debugfs_open("i915_next_seqno", O_RDWR); igt_assert(snprintf(buf, sizeof(buf), "0x%x", seqno) > 0); r = write(fh, buf, strnlen(buf, sizeof(buf))); close(fh); if (r < 0) return r; igt_assert(r == strnlen(buf, sizeof(buf))); last_seqno = seqno; igt_debug("next_seqno set to: 0x%x\n", seqno); r = __read_seqno(&rb); if (r < 0) return r; if (rb != seqno) { igt_info("seqno readback differs rb:0x%x vs w:0x%x\n", rb, seqno); return -1; } return 0; } static uint32_t calc_prewrap_val(void) { const int pval = options.prewrap_space; if (options.random == 0) return pval; if (pval == 0) return 0; return (random() % pval); } static void run_test(void) { run_sync_test(options.buffers, true); } static void preset_run_once(void) { igt_assert_eq(write_seqno(1), 0); run_test(); igt_assert_eq(write_seqno(0x7fffffff), 0); run_test(); igt_assert_eq(write_seqno(0xffffffff), 0); run_test(); igt_assert_eq(write_seqno(0xfffffff0), 0); run_test(); } static void random_run_once(void) { uint32_t val; do { val = random() % UINT32_MAX; if (RAND_MAX < UINT32_MAX) val += random(); } while (val == 0); igt_assert_eq(write_seqno(val), 0); run_test(); } static void wrap_run_once(void) { const uint32_t pw_val = calc_prewrap_val(); igt_assert_eq(write_seqno(UINT32_MAX - pw_val), 0); while(!read_seqno()) run_test(); } static void background_run_once(void) { const uint32_t pw_val = calc_prewrap_val(); igt_assert_eq(write_seqno(UINT32_MAX - pw_val), 0); while(!read_seqno()) sleep(3); } static int parse_options(int opt, int opt_index, void *data) { switch(opt) { case 'b': options.background = 1; igt_info("running in background inducing wraps\n"); break; case 'd': options.dontwrap = 1; igt_info("won't wrap after testruns\n"); break; case 'n': options.rounds = atoi(optarg); igt_info("running %d rounds\n", options.rounds); break; case 'i': options.buffers = atoi(optarg); igt_info("buffers %d\n", options.buffers); break; case 't': options.timeout = atoi(optarg); if (options.timeout == 0) options.timeout = 10; igt_info("setting timeout to %d seconds\n", options.timeout); break; case 'r': options.random = 0; break; case 'p': options.prewrap_space = atoi(optarg); igt_info("prewrap set to %d (0x%x)\n", options.prewrap_space, UINT32_MAX - options.prewrap_space); break; } return 0; } int main(int argc, char **argv) { int wcount = 0; static struct option long_options[] = { {"rounds", required_argument, 0, 'n'}, {"background", no_argument, 0, 'b'}, {"timeout", required_argument, 0, 't'}, {"dontwrap", no_argument, 0, 'd'}, {"prewrap", required_argument, 0, 'p'}, {"norandom", no_argument, 0, 'r'}, {"buffers", required_argument, 0, 'i'}, { 0, 0, 0, 0 } }; const char *help = " -b --background run in background inducing wraps\n" " -n --rounds=num run num times across wrap boundary, 0 == forever\n" " -t --timeout=sec set timeout to wait for testrun to sec seconds\n" " -d --dontwrap don't wrap just run the test\n" " -p --prewrap=n set seqno to WRAP - n for each testrun\n" " -r --norandom dont randomize prewrap space\n" " -i --buffers number of buffers to copy\n"; options.rounds = SLOW_QUICK(50, 2); options.background = 0; options.dontwrap = 0; options.timeout = 20; options.random = 1; options.prewrap_space = 21; options.buffers = 10; igt_simple_init_parse_opts(&argc, argv, "n:bvt:dp:ri:", long_options, help, parse_options, NULL); card_index = drm_get_card(); srandom(time(NULL)); while(options.rounds == 0 || wcount < options.rounds) { if (options.background) { background_run_once(); } else { preset_run_once(); random_run_once(); wrap_run_once(); } wcount++; igt_debug("%s done: %d\n", options.dontwrap ? "tests" : "wraps", wcount); } igt_assert_eq(options.rounds, wcount); igt_exit(); } intel-gpu-tools-1.14/tests/gem_concurrent_blit.c0000644000175000017500000000064712665336131016771 00000000000000/* This test is just a duplicate of gem_concurrent_all. */ /* However the executeable will be gem_concurrent_blit. */ /* The main function examines argv[0] and, in the case */ /* of gem_concurent_blit runs only a subset of the */ /* available subtests. This avoids the use of */ /* non-standard command line parameters which can cause */ /* problems for automated testing */ #include "gem_concurrent_all.c" intel-gpu-tools-1.14/tests/gem_gtt_cpu_tlb.c0000644000175000017500000000525012665336131016076 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * */ /** @file gem_gtt_cpu_tlb.c * * This test checks whether gtt tlbs for cpu access are correctly invalidated. */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include "drm.h" IGT_TEST_DESCRIPTION("Check whether gtt tlbs for cpu access are correctly" " invalidated."); #define OBJ_SIZE (1024*1024) #define PAGE_SIZE 4096 static uint32_t create_bo(int fd) { uint32_t handle; uint32_t *data; int i; handle = gem_create(fd, OBJ_SIZE); /* Fill the BO with dwords starting at start_val */ data = gem_mmap__gtt(fd, handle, OBJ_SIZE, PROT_READ | PROT_WRITE); for (i = 0; i < OBJ_SIZE/4; i++) data[i] = i; munmap(data, OBJ_SIZE); return handle; } igt_simple_main { int fd; int i; uint32_t handle; uint32_t *ptr; igt_skip_on_simulation(); fd = drm_open_driver(DRIVER_INTEL); handle = gem_create(fd, OBJ_SIZE); /* touch one page */ ptr = gem_mmap__gtt(fd, handle, OBJ_SIZE, PROT_READ | PROT_WRITE); *ptr = 0xdeadbeef; munmap(ptr, OBJ_SIZE); gem_close(fd, handle); /* stirr up the page allocator a bit. */ ptr = malloc(OBJ_SIZE); igt_assert(ptr); memset(ptr, 0x1, OBJ_SIZE); handle = create_bo(fd); /* Read a bunch of random subsets of the data and check that they come * out right. */ gem_read(fd, handle, 0, ptr, OBJ_SIZE); for (i = 0; i < OBJ_SIZE/4; i++) igt_assert(ptr[i] == i); close(fd); } intel-gpu-tools-1.14/tests/vc4_wait_seqno.c0000644000175000017500000000400212665336131015657 00000000000000/* * Copyright © 2016 Broadcom * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include "vc4_drm.h" igt_main { int fd; igt_fixture fd = drm_open_driver(DRIVER_VC4); /* A 64-bit seqno should never hit the maximum value over the * lifetime of the system. (A submit per 1000 cycles at 1Ghz * would still take 584000 years). As a result, we can wait * for it and be sure of a timeout. */ igt_subtest("bad-seqno-0ns") { struct drm_vc4_wait_seqno arg = { .seqno = ~0ull, .timeout_ns = 0, }; do_ioctl_err(fd, DRM_IOCTL_VC4_WAIT_SEQNO, &arg, ETIME); } igt_subtest("bad-seqno-1ns") { struct drm_vc4_wait_seqno arg = { .seqno = ~0ull, .timeout_ns = 1, }; do_ioctl_err(fd, DRM_IOCTL_VC4_WAIT_SEQNO, &arg, ETIME); } igt_fixture close(fd); } intel-gpu-tools-1.14/tests/gem_ctx_param_basic.c0000644000175000017500000001167112665336131016713 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter */ #include "igt.h" #include #include #include IGT_TEST_DESCRIPTION("Basic test for context set/get param input validation."); int fd; int32_t ctx; #define LOCAL_I915_GEM_CONTEXT_GETPARAM 0x34 #define LOCAL_I915_GEM_CONTEXT_SETPARAM 0x35 #define LOCAL_IOCTL_I915_GEM_CONTEXT_GETPARAM DRM_IOWR (DRM_COMMAND_BASE + LOCAL_I915_GEM_CONTEXT_GETPARAM, struct local_i915_gem_context_param) #define LOCAL_IOCTL_I915_GEM_CONTEXT_SETPARAM DRM_IOWR (DRM_COMMAND_BASE + LOCAL_I915_GEM_CONTEXT_SETPARAM, struct local_i915_gem_context_param) #define TEST_SUCCESS(ioc) \ do_ioctl(fd, (ioc), &ctx_param); #define TEST_FAIL(ioc, exp_errno) \ do_ioctl_err(fd, (ioc), &ctx_param, exp_errno); igt_main { struct local_i915_gem_context_param ctx_param; memset(&ctx_param, 0, sizeof(ctx_param)); igt_fixture { fd = drm_open_driver_render(DRIVER_INTEL); ctx = gem_context_create(fd); } ctx_param.param = LOCAL_CONTEXT_PARAM_BAN_PERIOD; igt_subtest("basic") { ctx_param.context = ctx; TEST_SUCCESS(LOCAL_IOCTL_I915_GEM_CONTEXT_GETPARAM); TEST_SUCCESS(LOCAL_IOCTL_I915_GEM_CONTEXT_SETPARAM); } igt_subtest("basic-default") { ctx_param.context = 0; TEST_SUCCESS(LOCAL_IOCTL_I915_GEM_CONTEXT_GETPARAM); TEST_SUCCESS(LOCAL_IOCTL_I915_GEM_CONTEXT_SETPARAM); } igt_subtest("invalid-ctx-get") { ctx_param.context = 2; TEST_FAIL(LOCAL_IOCTL_I915_GEM_CONTEXT_GETPARAM, ENOENT); } igt_subtest("invalid-ctx-set") { ctx_param.context = ctx; TEST_SUCCESS(LOCAL_IOCTL_I915_GEM_CONTEXT_GETPARAM); ctx_param.context = 2; TEST_FAIL(LOCAL_IOCTL_I915_GEM_CONTEXT_SETPARAM, ENOENT); } igt_subtest("invalid-size-get") { ctx_param.context = ctx; ctx_param.size = 8; TEST_SUCCESS(LOCAL_IOCTL_I915_GEM_CONTEXT_GETPARAM); igt_assert(ctx_param.size == 0); } igt_subtest("invalid-size-set") { ctx_param.context = ctx; TEST_SUCCESS(LOCAL_IOCTL_I915_GEM_CONTEXT_GETPARAM); ctx_param.size = 8; TEST_FAIL(LOCAL_IOCTL_I915_GEM_CONTEXT_SETPARAM, EINVAL); ctx_param.size = 0; } ctx_param.param = LOCAL_CONTEXT_PARAM_BAN_PERIOD; igt_subtest("non-root-set") { igt_fork(child, 1) { igt_drop_root(); ctx_param.context = ctx; TEST_SUCCESS(LOCAL_IOCTL_I915_GEM_CONTEXT_GETPARAM); ctx_param.value--; TEST_FAIL(LOCAL_IOCTL_I915_GEM_CONTEXT_SETPARAM, EPERM); } igt_waitchildren(); } igt_subtest("root-set") { ctx_param.context = ctx; TEST_SUCCESS(LOCAL_IOCTL_I915_GEM_CONTEXT_GETPARAM); ctx_param.value--; TEST_SUCCESS(LOCAL_IOCTL_I915_GEM_CONTEXT_SETPARAM); } ctx_param.param = LOCAL_CONTEXT_PARAM_NO_ZEROMAP; igt_subtest("non-root-set-no-zeromap") { igt_fork(child, 1) { igt_drop_root(); ctx_param.context = ctx; TEST_SUCCESS(LOCAL_IOCTL_I915_GEM_CONTEXT_GETPARAM); ctx_param.value--; TEST_SUCCESS(LOCAL_IOCTL_I915_GEM_CONTEXT_SETPARAM); } igt_waitchildren(); } igt_subtest("root-set-no-zeromap-enabled") { ctx_param.context = ctx; TEST_SUCCESS(LOCAL_IOCTL_I915_GEM_CONTEXT_GETPARAM); ctx_param.value = 1; TEST_SUCCESS(LOCAL_IOCTL_I915_GEM_CONTEXT_SETPARAM); } igt_subtest("root-set-no-zeromap-disabled") { ctx_param.context = ctx; TEST_SUCCESS(LOCAL_IOCTL_I915_GEM_CONTEXT_GETPARAM); ctx_param.value = 0; TEST_SUCCESS(LOCAL_IOCTL_I915_GEM_CONTEXT_SETPARAM); } /* NOTE: This testcase intentionally tests for the next free parameter * to catch ABI extensions. Don't "fix" this testcase without adding all * the tests for the new param first. */ ctx_param.param = LOCAL_CONTEXT_PARAM_GTT_SIZE + 1; igt_subtest("invalid-param-get") { ctx_param.context = ctx; TEST_FAIL(LOCAL_IOCTL_I915_GEM_CONTEXT_GETPARAM, EINVAL); } igt_subtest("invalid-param-set") { ctx_param.context = ctx; TEST_FAIL(LOCAL_IOCTL_I915_GEM_CONTEXT_SETPARAM, EINVAL); } igt_fixture close(fd); } intel-gpu-tools-1.14/tests/1080p-right.png0000644000175000017500000012300612665336131015165 00000000000000PNG  IHDR8gV pHYs  tIME 00n IDATx}aH"%R$EJC")JUI6][-a +0n [ SU5YZ4j6lnk ԀL0VxHJxx{~>8=9P|3 @L\y{'m~8bpsۼ_zo?~ɫ ՟8dO}ΏDNn~1DWfYV: ?H 3r%@$C}&bFۼ 7XbL iwC6#@CȃL^'{hgQI 2ĭ7 m 4@~;IdjcP 0<7>kgY 6!6#@zgZoK}&k+2-ax|΁33e0 P b曟nksg#COb@_/b__dh j ~ '4Ĩ,Cۿ"7 `:rw."upp+`H[  Dޠ/^Tw1 @  l:E`:unrׯ1zbX:bh`5 5hqG4qppkjq4$^bݻ_s1S z4hعtd LqTXDЁ)OxrWW* &MXl|&@Ӡ%=hK;Б7A HqGljVA[ ' hF OZA =@TH^AкjGuZ,qGB! ׯIz-"ghQh) t-rwV' W!/D@ h+&Bn Cez7~БM1 F:An3 !qGOzgaq㫹~jceH h?/~*(4Ȋih[8"'@}Ӡ5Y1 $':]/V9B^8 XY=r\K `B3 >)!MBk:g@ $#WoI_ٍ$4й gݽv3.@D& :lLzRgŋz(NCy㍏euyU2 @xSq@ ‘!!@FPȌ .u +-^I@By3 J7*w[`k=NB@@ L@CFsNCK@9hIh4a4?gbn]Cy7=a9dh(?*eУVv ( h)JaOCm2 40~!ܯs6oГ;'@z΍97aFHpعP1 !u pyx4D8L~BS7gx4yQdh` ܹO:܈|9: 0[Zyt8 } wmՏH@L@;sv3|teǽ]e'  _=%/‚ L:tKY~]o27vuC @:{ :v8ax@ٹQi8l .4Е7-ۿeleya0 4Љ>|p7䘡͜=֛\ڵ_Kf @&w5hP V ;׆ fnzcڄ#lkܨl *4Ўyb }'0dGHc6G F0=׋X9| @th`s7rؿmha)@9`3*C%x aT3h4}Gj?ÓO"dX[+y"+F-/0ds4q5 mlm΍#}yh/1Аs~t V7G_ם0@h`s :\ z.Bg}pqBZ 0p2 ,4Hz0 8kܨ4vz9ah æ/N40xs}{ܹO܀MwnȻ8\-={D +SdFÕO<0@h sP!+ܘc@tg[8`Kwnf;7cT7x2 E3 t…5l}Eᄈ N r4Jzz΍5Vv'Jb@_jx4kGb  |ޞeЅ <xqWVa+W~@L@CA >}Zgy 30vnT ?9s =zŝ^,$#6lJ2Q90V{\vwxfYysLdx<^qݽctٹ xӡ՝ Vp@V΍58&L|br?sc58|$Jzs]דּU[C^%bb@&GF37N]24P2ReSK۹u@hH Dҥe3tVNX4hX%%/3F4{k8У0W /@L@C2 >)2mvnuǕB1 i0 da0Y˗^:c AS;7cfjq3 sHca΍[{,(4=cFZ#8΍{ H;7tFf[5scI F$зqH@^|䭎  A|D!>d୍2 { @C}m; -=l94Ԭaw DKҠgw-8Y DGsOd}._ >3}Y!nwXSN؋ uGx9zaCЇEk4 -=jkFي@ld Ēus*ExrSnhI'Uȉ hQh;7h,٪1+4Uo3uwn@kb3$ГpL\eG",]_sK {E2cbs)2uHF]p4^Zتs34ҠAw@/ƌ<o0 a<qK~ wjq}2 d Ȑ {5$mV2 F!0}/ݼb]'3  !s/P^ @~AW@)rZ[5u:C_o9ai@whH5P\gf`4[Irgognu^w\WƇjx< s4h WW!{3Xs-a tvҲj9,bh`};;?W[1gFFaF 57ggB3g-_ Ͱ?ݱp-zEGo̻Q߹- g4 `Z tagvv勡C.ȞP_!Tۜgn%kmXؿt4@Ol BO<̛n^6|t#hy;7( h(O|xsى9s/?x9&@0}8`O<oiǣh^V2}>Š H[z≿4@fpO"o=W~tsN7}P;a0@z\zabs%E$?0 :ipпWUK36n-3@L@@ή^ڴrX0|dy?w_@D3Wv^op4;b 0w_s~<wxs 0z?(6_vtԓO~1p@cd,G~c(0w_۬Az/M-qtw}hT"}<w_ޓOByC9ϑ3 Lh.<Bza?` KՠmrߨXqgĚ?3 1j2 sP@ڵ!4#A}` :{pЊ>oygys 5 Xڵɍٳ@$ `v@C}Jh`ʵkprXw%Σh\}`#Tׯ$L"vo/qaY^~|XxX4$(4B~M7sn2:-=ААW&W#e Μ! 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v DO0YrPK3BBW4Qb[:֤A uiCuIENDB`intel-gpu-tools-1.14/tests/drv_missed_irq_hang0000755000175000017500000000277412665336131016541 00000000000000#!/bin/bash # # Testcase: Simulate missed breadcrumb interrupts # SOURCE_DIR="$( dirname "${BASH_SOURCE[0]}" )" . $SOURCE_DIR/drm_lib.sh oldpath=`pwd` cd $i915_dfs_path function blt_wait { (cd $oldpath; $SOURCE_DIR/gem_exec_blt 16384) > /dev/null (cd $oldpath; $SOURCE_DIR/gem_exec_blt 65536) > /dev/null (cd $oldpath; $SOURCE_DIR/gem_exec_blt 262144) > /dev/null } function check_for_missed_irq { if test `cat i915_ring_missed_irq` = 0x00000000; then echo "missed interrupts undetected" exit $IGT_EXIT_FAILURE fi } function check_for_hang { if cat i915_error_state | grep -v "no error state collected" > /dev/null ; then echo "gpu hang reported" exit $IGT_EXIT_FAILURE fi } if [ ! -f i915_ring_missed_irq ] ; then echo "kernel doesn't support interrupt masking" exit $IGT_EXIT_SKIP fi # clear error state first echo > i915_error_state check_for_hang echo 0xf > i915_ring_test_irq echo "Interrupts masked" if test `cat i915_ring_test_irq` != 0x0000000f; then echo "Failed to set interrupt mask" exit $IGT_EXIT_FAILURE fi blt_wait check_for_missed_irq check_for_hang blt_wait check_for_hang echo 0 > i915_ring_test_irq echo "Interrupts unmasked" if test `cat i915_ring_test_irq` != 0x00000000; then echo "Failed to clear interrupt mask" exit $IGT_EXIT_FAILURE fi blt_wait check_for_hang echo 0 > i915_ring_missed_irq echo "Cleared missed interrupts" if test `cat i915_ring_missed_irq` != 0x00000000; then echo "Failed to clear missed interrupts" exit $IGT_EXIT_FAILURE fi exit $IGT_EXIT_SUCCESS intel-gpu-tools-1.14/tests/gem_set_tiling_vs_gtt.c0000644000175000017500000000765012665336131017325 00000000000000/* * Copyright © 2012 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include "drm.h" IGT_TEST_DESCRIPTION("Check set_tiling vs gtt mmap coherency."); #define OBJECT_SIZE (1024*1024) #define TEST_STRIDE (1024*4) /** * Testcase: Check set_tiling vs gtt mmap coherency */ igt_simple_main { int fd; uint32_t *ptr; uint32_t data[OBJECT_SIZE/4]; int i; uint32_t handle; bool tiling_changed; int tile_height; igt_skip_on_simulation(); fd = drm_open_driver(DRIVER_INTEL); if (IS_GEN2(intel_get_drm_devid(fd))) tile_height = 16; else tile_height = 8; handle = gem_create(fd, OBJECT_SIZE); ptr = gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_READ | PROT_WRITE); /* gtt coherency is done with set_domain in libdrm, don't break that */ gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); for (i = 0; i < OBJECT_SIZE/4; i++) ptr[i] = data[i] = i; gem_set_tiling(fd, handle, I915_TILING_X, TEST_STRIDE); igt_info("testing untiled->tiled\n"); tiling_changed = false; gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, 0); /* Too lazy to check for the correct tiling, and impossible anyway on * bit17 swizzling machines. */ for (i = 0; i < OBJECT_SIZE/4; i++) if (ptr[i] != data[i]) tiling_changed = true; igt_assert(tiling_changed); gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); for (i = 0; i < OBJECT_SIZE/4; i++) ptr[i] = data[i] = i; gem_set_tiling(fd, handle, I915_TILING_X, TEST_STRIDE*2); igt_info("testing tiled->tiled\n"); gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, 0); for (i = 0; i < OBJECT_SIZE/4; i++) { int tile_row = i / (TEST_STRIDE * tile_height / 4); int row = i / (TEST_STRIDE * 2 / 4); int half = i & (TEST_STRIDE / 4); int ofs = i % (TEST_STRIDE / 4); int data_i = (tile_row/2)*(TEST_STRIDE * tile_height / 4) + row*TEST_STRIDE/4 + half*tile_height + ofs; uint32_t val = data[data_i]; igt_assert_f(ptr[i] == val, "mismatch at %i, row=%i, half=%i, ofs=%i, " "read: 0x%08x, expected: 0x%08x\n", i, row, half, ofs, ptr[i], val); } gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); for (i = 0; i < OBJECT_SIZE/4; i++) ptr[i] = data[i] = i; gem_set_tiling(fd, handle, I915_TILING_NONE, 0); igt_info("testing tiled->untiled\n"); tiling_changed = false; gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, 0); /* Too lazy to check for the correct tiling, and impossible anyway on * bit17 swizzling machines. */ for (i = 0; i < OBJECT_SIZE/4; i++) if (ptr[i] != data[i]) tiling_changed = true; igt_assert(tiling_changed); munmap(ptr, OBJECT_SIZE); close(fd); } intel-gpu-tools-1.14/tests/gem_media_fill.c0000644000175000017500000000740312665336131015657 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Damien Lespiau * Xiang, Haihao */ /* * This file is a basic test for the media_fill() function, a very simple * workload for the Media pipeline. */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include "drm.h" #include "intel_bufmgr.h" IGT_TEST_DESCRIPTION("Basic test for the media_fill() function, a very simple" " workload for the Media pipeline."); #define WIDTH 64 #define STRIDE (WIDTH) #define HEIGHT 64 #define SIZE (HEIGHT*STRIDE) #define COLOR_C4 0xc4 #define COLOR_4C 0x4c typedef struct { int drm_fd; uint32_t devid; drm_intel_bufmgr *bufmgr; uint8_t linear[WIDTH * HEIGHT]; } data_t; static void scratch_buf_init(data_t *data, struct igt_buf *buf, int width, int height, int stride, uint8_t color) { drm_intel_bo *bo; int i; bo = drm_intel_bo_alloc(data->bufmgr, "", SIZE, 4096); for (i = 0; i < width * height; i++) data->linear[i] = color; gem_write(data->drm_fd, bo->handle, 0, data->linear, sizeof(data->linear)); buf->bo = bo; buf->stride = stride; buf->tiling = I915_TILING_NONE; buf->size = SIZE; } static void scratch_buf_check(data_t *data, struct igt_buf *buf, int x, int y, uint8_t color) { uint8_t val; gem_read(data->drm_fd, buf->bo->handle, 0, data->linear, sizeof(data->linear)); val = data->linear[y * WIDTH + x]; igt_assert_f(val == color, "Expected 0x%02x, found 0x%02x at (%d,%d)\n", color, val, x, y); } igt_simple_main { data_t data = {0, }; struct intel_batchbuffer *batch = NULL; struct igt_buf dst; igt_fillfunc_t media_fill = NULL; int i, j; data.drm_fd = drm_open_driver_render(DRIVER_INTEL); data.devid = intel_get_drm_devid(data.drm_fd); data.bufmgr = drm_intel_bufmgr_gem_init(data.drm_fd, 4096); igt_assert(data.bufmgr); media_fill = igt_get_media_fillfunc(data.devid); igt_require_f(media_fill, "no media-fill function\n"); batch = intel_batchbuffer_alloc(data.bufmgr, data.devid); igt_assert(batch); scratch_buf_init(&data, &dst, WIDTH, HEIGHT, STRIDE, COLOR_C4); for (i = 0; i < WIDTH; i++) { for (j = 0; j < HEIGHT; j++) { scratch_buf_check(&data, &dst, i, j, COLOR_C4); } } media_fill(batch, &dst, 0, 0, WIDTH / 2, HEIGHT / 2, COLOR_4C); for (i = 0; i < WIDTH; i++) { for (j = 0; j < HEIGHT; j++) { if (i < WIDTH / 2 && j < HEIGHT / 2) scratch_buf_check(&data, &dst, i, j, COLOR_4C); else scratch_buf_check(&data, &dst, i, j, COLOR_C4); } } } intel-gpu-tools-1.14/tests/gem_tiled_wc.c0000644000175000017500000001462612665336131015371 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ /** @file gem_tiled_wc.c * * This is a test of write-combining mmap's behavior on tiled objects * with respect to the reported swizzling value. * * The goal is to exercise the complications that arise when using a linear * view of a tiled object that is subject to hardware swizzling. This is * useful to check that we are presenting the correct view of the object * to userspace, and that userspace has to respect the swizzle. */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include "drm.h" #define WIDTH 512 #define HEIGHT 512 #define SIZE (WIDTH*HEIGHT*sizeof(uint32_t)) #define PAGE_SIZE 4096 static int tile_width; static int tile_height; static int tile_size; static uint32_t create_bo(int fd) { uint32_t handle; uint32_t *data; int i; handle = gem_create(fd, SIZE); gem_set_tiling(fd, handle, I915_TILING_X, WIDTH * sizeof(uint32_t)); /* Fill the BO with dwords starting at start_val */ data = gem_mmap__gtt(fd, handle, SIZE, PROT_READ | PROT_WRITE); for (i = 0; i < WIDTH*HEIGHT; i++) data[i] = i; munmap(data, SIZE); return handle; } static int swizzle_bit(int bit, int offset) { return (offset & (1 << bit)) >> (bit - 6); } /* Translate from a swizzled offset in the tiled buffer to the corresponding * value from the original linear buffer. */ static uint32_t calculate_expected(int offset) { int tile_off = offset & (tile_size - 1); int tile_base = offset & -tile_size; int tile_index = tile_base / tile_size; int tiles_per_row = 4*WIDTH / tile_width; /* base x,y values from the tile (page) index. */ int base_y = tile_index / tiles_per_row * tile_height; int base_x = tile_index % tiles_per_row * (tile_width/4); /* x, y offsets within the tile */ int tile_y = tile_off / tile_width; int tile_x = (tile_off % tile_width) / 4; igt_debug("%s(%d): %3d, %3d, %3d,%3d = %d\n", __func__, offset, base_x, base_y, tile_x, tile_y, (base_y + tile_y) * WIDTH + base_x + tile_x); return (base_y + tile_y) * WIDTH + base_x + tile_x; } static void get_tiling(int fd, uint32_t handle, uint32_t *tiling, uint32_t *swizzle) { struct drm_i915_gem_get_tiling2 { uint32_t handle; uint32_t tiling_mode; uint32_t swizzle_mode; uint32_t phys_swizzle_mode; } arg; #define DRM_IOCTL_I915_GEM_GET_TILING2 DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_TILING, struct drm_i915_gem_get_tiling2) memset(&arg, 0, sizeof(arg)); arg.handle = handle; do_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg); igt_require(arg.phys_swizzle_mode == arg.swizzle_mode); *tiling = arg.tiling_mode; *swizzle = arg.swizzle_mode; } igt_simple_main { int fd; int i, iter = 100; uint32_t tiling, swizzle; uint32_t handle; fd = drm_open_driver(DRIVER_INTEL); gem_require_mmap_wc(fd); handle = create_bo(fd); get_tiling(fd, handle, &tiling, &swizzle); if (IS_GEN2(intel_get_drm_devid(fd))) { tile_height = 16; tile_width = 128; tile_size = 2048; } else { tile_height = 8; tile_width = 512; tile_size = PAGE_SIZE; } /* Read a bunch of random subsets of the data and check that they come * out right. */ for (i = 0; i < iter; i++) { int size = WIDTH * HEIGHT * 4; int offset = (random() % size) & ~3; int len = (random() % size) & ~3; int first_page, last_page; uint32_t *linear; int j; if (len == 0) len = 4; if (offset + len > size) len = size - offset; if (i == 0) { offset = 0; len = size; } first_page = offset & ~(PAGE_SIZE-1); last_page = (offset + len + PAGE_SIZE) & ~(PAGE_SIZE-1); linear = gem_mmap__wc(fd, handle, first_page, last_page - first_page, PROT_READ); /* Translate from offsets in the read buffer to the swizzled * address that it corresponds to. This is the opposite of * what Mesa does (calculate offset to be read given the linear * offset it's looking for). */ for (j = offset; j < offset + len; j += 4) { uint32_t expected_val, found_val; int swizzled_offset; const char *swizzle_str; switch (swizzle) { case I915_BIT_6_SWIZZLE_NONE: swizzled_offset = j; swizzle_str = "none"; break; case I915_BIT_6_SWIZZLE_9: swizzled_offset = j ^ swizzle_bit(9, j); swizzle_str = "bit9"; break; case I915_BIT_6_SWIZZLE_9_10: swizzled_offset = j ^ swizzle_bit(9, j) ^ swizzle_bit(10, j); swizzle_str = "bit9^10"; break; case I915_BIT_6_SWIZZLE_9_11: swizzled_offset = j ^ swizzle_bit(9, j) ^ swizzle_bit(11, j); swizzle_str = "bit9^11"; break; case I915_BIT_6_SWIZZLE_9_10_11: swizzled_offset = j ^ swizzle_bit(9, j) ^ swizzle_bit(10, j) ^ swizzle_bit(11, j); swizzle_str = "bit9^10^11"; break; default: igt_skip("unknown swizzling"); break; } igt_debug("Checking offset %d swizzled %s -> %d\n", j, swizzle_str, swizzled_offset); expected_val = calculate_expected(swizzled_offset); found_val = linear[(j - first_page)/ 4]; igt_assert_f(expected_val == found_val, "Bad read [%d]: %d instead of %d at 0x%08x " "for read from 0x%08x to 0x%08x, swizzle=%s\n", i, found_val, expected_val, j, offset, offset + len, swizzle_str); } munmap(linear, last_page - first_page); } close(fd); } intel-gpu-tools-1.14/tests/gem_mmap_gtt.c0000644000175000017500000003655312665336131015412 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ #define _GNU_SOURCE #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include "drm.h" #ifndef PAGE_SIZE #define PAGE_SIZE 4096 #endif static int OBJECT_SIZE = 16*1024*1024; static void set_domain_gtt(int fd, uint32_t handle) { gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); } static void * mmap_bo(int fd, uint32_t handle) { void *ptr; ptr = gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_READ | PROT_WRITE); return ptr; } static void * create_pointer(int fd) { uint32_t handle; void *ptr; handle = gem_create(fd, OBJECT_SIZE); ptr = mmap_bo(fd, handle); gem_close(fd, handle); return ptr; } static void test_access(int fd) { uint32_t handle, flink, handle2; struct drm_i915_gem_mmap_gtt mmap_arg; int fd2; handle = gem_create(fd, OBJECT_SIZE); igt_assert(handle); fd2 = drm_open_driver(DRIVER_INTEL); /* Check that fd1 can mmap. */ mmap_arg.handle = handle; do_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &mmap_arg); igt_assert(mmap64(0, OBJECT_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, fd, mmap_arg.offset)); /* Check that the same offset on the other fd doesn't work. */ igt_assert(mmap64(0, OBJECT_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, fd2, mmap_arg.offset) == MAP_FAILED); igt_assert(errno == EACCES); flink = gem_flink(fd, handle); igt_assert(flink); handle2 = gem_open(fd2, flink); igt_assert(handle2); /* Recheck that it works after flink. */ /* Check that the same offset on the other fd doesn't work. */ igt_assert(mmap64(0, OBJECT_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, fd2, mmap_arg.offset)); } static void test_short(int fd) { struct drm_i915_gem_mmap_gtt mmap_arg; int pages, p; mmap_arg.handle = gem_create(fd, OBJECT_SIZE); igt_assert(mmap_arg.handle); do_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &mmap_arg); for (pages = 1; pages <= OBJECT_SIZE / PAGE_SIZE; pages <<= 1) { uint8_t *r, *w; w = mmap64(0, pages * PAGE_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, fd, mmap_arg.offset); igt_assert(w != MAP_FAILED); r = mmap64(0, pages * PAGE_SIZE, PROT_READ, MAP_SHARED, fd, mmap_arg.offset); igt_assert(r != MAP_FAILED); for (p = 0; p < pages; p++) { w[p*PAGE_SIZE] = r[p*PAGE_SIZE]; w[p*PAGE_SIZE+(PAGE_SIZE-1)] = r[p*PAGE_SIZE+(PAGE_SIZE-1)]; } munmap(r, pages * PAGE_SIZE); munmap(w, pages * PAGE_SIZE); } gem_close(fd, mmap_arg.handle); } static void test_copy(int fd) { void *src, *dst; /* copy from a fresh src to fresh dst to force pagefault on both */ src = create_pointer(fd); dst = create_pointer(fd); memcpy(dst, src, OBJECT_SIZE); memcpy(src, dst, OBJECT_SIZE); munmap(dst, OBJECT_SIZE); munmap(src, OBJECT_SIZE); } enum test_read_write { READ_BEFORE_WRITE, READ_AFTER_WRITE, }; static void test_read_write(int fd, enum test_read_write order) { uint32_t handle; void *ptr; volatile uint32_t val = 0; handle = gem_create(fd, OBJECT_SIZE); ptr = gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_READ | PROT_WRITE); if (order == READ_BEFORE_WRITE) { val = *(uint32_t *)ptr; *(uint32_t *)ptr = val; } else { *(uint32_t *)ptr = val; val = *(uint32_t *)ptr; } gem_close(fd, handle); munmap(ptr, OBJECT_SIZE); } static void test_read_write2(int fd, enum test_read_write order) { uint32_t handle; void *r, *w; volatile uint32_t val = 0; handle = gem_create(fd, OBJECT_SIZE); r = gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_READ); w = gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_READ | PROT_WRITE); if (order == READ_BEFORE_WRITE) { val = *(uint32_t *)r; *(uint32_t *)w = val; } else { *(uint32_t *)w = val; val = *(uint32_t *)r; } gem_close(fd, handle); munmap(r, OBJECT_SIZE); munmap(w, OBJECT_SIZE); } static void test_write(int fd) { void *src; uint32_t dst; /* copy from a fresh src to fresh dst to force pagefault on both */ src = create_pointer(fd); dst = gem_create(fd, OBJECT_SIZE); gem_write(fd, dst, 0, src, OBJECT_SIZE); gem_close(fd, dst); munmap(src, OBJECT_SIZE); } static void test_write_gtt(int fd) { uint32_t dst; char *dst_gtt; void *src; dst = gem_create(fd, OBJECT_SIZE); /* prefault object into gtt */ dst_gtt = mmap_bo(fd, dst); set_domain_gtt(fd, dst); memset(dst_gtt, 0, OBJECT_SIZE); munmap(dst_gtt, OBJECT_SIZE); src = create_pointer(fd); gem_write(fd, dst, 0, src, OBJECT_SIZE); gem_close(fd, dst); munmap(src, OBJECT_SIZE); } static void test_coherency(int fd) { uint32_t handle; uint32_t *gtt, *cpu; int i; igt_require(igt_setup_clflush()); handle = gem_create(fd, OBJECT_SIZE); gtt = gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_READ | PROT_WRITE); cpu = gem_mmap__cpu(fd, handle, 0, OBJECT_SIZE, PROT_READ | PROT_WRITE); set_domain_gtt(fd, handle); for (i = 0; i < OBJECT_SIZE / 64; i++) { int x = 16*i + (i%16); gtt[x] = i; igt_clflush_range(&cpu[x], sizeof(cpu[x])); igt_assert_eq(cpu[x], i); } munmap(cpu, OBJECT_SIZE); munmap(gtt, OBJECT_SIZE); gem_close(fd, handle); } static int tile_width(uint32_t devid, int tiling) { if (intel_gen(devid) == 2) return 128; else if (tiling == I915_TILING_X) return 512; else if (IS_915(devid)) return 512; else return 128; } static void test_huge_bo(int fd, int huge, int tiling) { uint32_t bo; char *ptr; char *tiled_pattern; char *linear_pattern; uint64_t size, last_offset; uint32_t devid = intel_get_drm_devid(fd); int pitch = tile_width(devid, tiling); int i; switch (huge) { case -1: size = gem_mappable_aperture_size() / 2; /* Power of two fence size, natural fence * alignment, and the guard page at the end * gtt means that if the entire gtt is * mappable, we can't usually fit in a tiled * object half the size of the gtt. Let's use * a quarter size one instead. */ if (tiling && intel_gen(intel_get_drm_devid(fd)) < 4 && size >= gem_global_aperture_size(fd) / 2) size /= 2; break; case 0: size = gem_mappable_aperture_size() + PAGE_SIZE; break; default: size = gem_global_aperture_size(fd) + PAGE_SIZE; break; } intel_require_memory(1, size, CHECK_RAM); last_offset = size - PAGE_SIZE; /* Create pattern */ bo = gem_create(fd, PAGE_SIZE); if (tiling) igt_require(__gem_set_tiling(fd, bo, tiling, pitch) == 0); linear_pattern = gem_mmap__gtt(fd, bo, PAGE_SIZE, PROT_READ | PROT_WRITE); for (i = 0; i < PAGE_SIZE; i++) linear_pattern[i] = i; tiled_pattern = gem_mmap__cpu(fd, bo, 0, PAGE_SIZE, PROT_READ); gem_set_domain(fd, bo, I915_GEM_DOMAIN_CPU | I915_GEM_DOMAIN_GTT, 0); gem_close(fd, bo); bo = gem_create(fd, size); if (tiling) igt_require(__gem_set_tiling(fd, bo, tiling, pitch) == 0); /* Initialise first/last page through CPU mmap */ ptr = gem_mmap__cpu(fd, bo, 0, size, PROT_READ | PROT_WRITE); memcpy(ptr, tiled_pattern, PAGE_SIZE); memcpy(ptr + last_offset, tiled_pattern, PAGE_SIZE); munmap(ptr, size); /* Obtain mapping for the object through GTT. */ ptr = __gem_mmap__gtt(fd, bo, size, PROT_READ | PROT_WRITE); igt_require_f(ptr, "Huge BO GTT mapping not supported.\n"); set_domain_gtt(fd, bo); /* Access through GTT should still provide the CPU written values. */ igt_assert(memcmp(ptr , linear_pattern, PAGE_SIZE) == 0); igt_assert(memcmp(ptr + last_offset, linear_pattern, PAGE_SIZE) == 0); gem_set_tiling(fd, bo, I915_TILING_NONE, 0); igt_assert(memcmp(ptr , tiled_pattern, PAGE_SIZE) == 0); igt_assert(memcmp(ptr + last_offset, tiled_pattern, PAGE_SIZE) == 0); munmap(ptr, size); gem_close(fd, bo); munmap(tiled_pattern, PAGE_SIZE); munmap(linear_pattern, PAGE_SIZE); } static void test_huge_copy(int fd, int huge, int tiling_a, int tiling_b) { uint32_t devid = intel_get_drm_devid(fd); uint64_t huge_object_size, i; uint32_t bo, *pattern_a, *pattern_b; char *a, *b; switch (huge) { case -2: huge_object_size = gem_mappable_aperture_size() / 4; break; case -1: huge_object_size = gem_mappable_aperture_size() / 2; break; case 0: huge_object_size = gem_mappable_aperture_size() + PAGE_SIZE; break; default: huge_object_size = gem_global_aperture_size(fd) + PAGE_SIZE; break; } intel_require_memory(2, huge_object_size, CHECK_RAM); pattern_a = malloc(PAGE_SIZE); for (i = 0; i < PAGE_SIZE/4; i++) pattern_a[i] = i; pattern_b = malloc(PAGE_SIZE); for (i = 0; i < PAGE_SIZE/4; i++) pattern_b[i] = ~i; bo = gem_create(fd, huge_object_size); if (tiling_a) igt_require(__gem_set_tiling(fd, bo, tiling_a, tile_width(devid, tiling_a)) == 0); a = __gem_mmap__gtt(fd, bo, huge_object_size, PROT_READ | PROT_WRITE); igt_require(a); gem_close(fd, bo); for (i = 0; i < huge_object_size / PAGE_SIZE; i++) { memcpy(a + PAGE_SIZE*i, pattern_a, PAGE_SIZE); igt_progress("Writing a ", i, huge_object_size / PAGE_SIZE); } bo = gem_create(fd, huge_object_size); if (tiling_b) igt_require(__gem_set_tiling(fd, bo, tiling_b, tile_width(devid, tiling_b)) == 0); b = __gem_mmap__gtt(fd, bo, huge_object_size, PROT_READ | PROT_WRITE); igt_require(b); gem_close(fd, bo); for (i = 0; i < huge_object_size / PAGE_SIZE; i++) { memcpy(b + PAGE_SIZE*i, pattern_b, PAGE_SIZE); igt_progress("Writing b ", i, huge_object_size / PAGE_SIZE); } for (i = 0; i < huge_object_size / PAGE_SIZE; i++) { if (i & 1) memcpy(a + i *PAGE_SIZE, b + i*PAGE_SIZE, PAGE_SIZE); else memcpy(b + i *PAGE_SIZE, a + i*PAGE_SIZE, PAGE_SIZE); igt_progress("Copying a<->b ", i, huge_object_size / PAGE_SIZE); } for (i = 0; i < huge_object_size / PAGE_SIZE; i++) { if (i & 1) igt_assert(memcmp(pattern_b, a + PAGE_SIZE*i, PAGE_SIZE) == 0); else igt_assert(memcmp(pattern_a, a + PAGE_SIZE*i, PAGE_SIZE) == 0); igt_progress("Checking a ", i, huge_object_size / PAGE_SIZE); } munmap(a, huge_object_size); for (i = 0; i < huge_object_size / PAGE_SIZE; i++) { if (i & 1) igt_assert(memcmp(pattern_b, b + PAGE_SIZE*i, PAGE_SIZE) == 0); else igt_assert(memcmp(pattern_a, b + PAGE_SIZE*i, PAGE_SIZE) == 0); igt_progress("Checking b ", i, huge_object_size / PAGE_SIZE); } munmap(b, huge_object_size); free(pattern_a); free(pattern_b); } static void test_read(int fd) { void *dst; uint32_t src; /* copy from a fresh src to fresh dst to force pagefault on both */ dst = create_pointer(fd); src = gem_create(fd, OBJECT_SIZE); gem_read(fd, src, 0, dst, OBJECT_SIZE); gem_close(fd, src); munmap(dst, OBJECT_SIZE); } static void test_write_cpu_read_gtt(int fd) { uint32_t handle; uint32_t *src, *dst; igt_require(gem_has_llc(fd)); handle = gem_create(fd, OBJECT_SIZE); dst = gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_READ); src = gem_mmap__cpu(fd, handle, 0, OBJECT_SIZE, PROT_WRITE); gem_close(fd, handle); memset(src, 0xaa, OBJECT_SIZE); igt_assert(memcmp(dst, src, OBJECT_SIZE) == 0); munmap(src, OBJECT_SIZE); munmap(dst, OBJECT_SIZE); } struct thread_fault_concurrent { pthread_t thread; int id; uint32_t **ptr; }; static void * thread_fault_concurrent(void *closure) { struct thread_fault_concurrent *t = closure; uint32_t val = 0; int n; for (n = 0; n < 32; n++) { if (n & 1) *t->ptr[(n + t->id) % 32] = val; else val = *t->ptr[(n + t->id) % 32]; } return NULL; } static void test_fault_concurrent(int fd) { uint32_t *ptr[32]; struct thread_fault_concurrent thread[64]; int n; for (n = 0; n < 32; n++) { ptr[n] = create_pointer(fd); } for (n = 0; n < 64; n++) { thread[n].ptr = ptr; thread[n].id = n; pthread_create(&thread[n].thread, NULL, thread_fault_concurrent, &thread[n]); } for (n = 0; n < 64; n++) pthread_join(thread[n].thread, NULL); for (n = 0; n < 32; n++) { munmap(ptr[n], OBJECT_SIZE); } } static void run_without_prefault(int fd, void (*func)(int fd)) { igt_disable_prefault(); func(fd); igt_enable_prefault(); } int fd; igt_main { if (igt_run_in_simulation()) OBJECT_SIZE = 1 * 1024 * 1024; igt_fixture fd = drm_open_driver(DRIVER_INTEL); igt_subtest("basic") test_access(fd); igt_subtest("basic-short") test_short(fd); igt_subtest("basic-copy") test_copy(fd); igt_subtest("basic-read") test_read(fd); igt_subtest("basic-write") test_write(fd); igt_subtest("basic-write-gtt") test_write_gtt(fd); igt_subtest("coherency") test_coherency(fd); igt_subtest("basic-read-write") test_read_write(fd, READ_BEFORE_WRITE); igt_subtest("basic-write-read") test_read_write(fd, READ_AFTER_WRITE); igt_subtest("basic-read-write-distinct") test_read_write2(fd, READ_BEFORE_WRITE); igt_subtest("basic-write-read-distinct") test_read_write2(fd, READ_AFTER_WRITE); igt_subtest("fault-concurrent") test_fault_concurrent(fd); igt_subtest("basic-read-no-prefault") run_without_prefault(fd, test_read); igt_subtest("basic-write-no-prefault") run_without_prefault(fd, test_write); igt_subtest("basic-write-gtt-no-prefault") run_without_prefault(fd, test_write_gtt); igt_subtest("basic-write-cpu-read-gtt") test_write_cpu_read_gtt(fd); igt_subtest("basic-small-bo") test_huge_bo(fd, -1, I915_TILING_NONE); igt_subtest("basic-small-bo-tiledX") test_huge_bo(fd, -1, I915_TILING_X); igt_subtest("basic-small-bo-tiledY") test_huge_bo(fd, -1, I915_TILING_Y); igt_subtest("big-bo") test_huge_bo(fd, 0, I915_TILING_NONE); igt_subtest("big-bo-tiledX") test_huge_bo(fd, 0, I915_TILING_X); igt_subtest("big-bo-tiledY") test_huge_bo(fd, 0, I915_TILING_Y); igt_subtest("huge-bo") test_huge_bo(fd, 1, I915_TILING_NONE); igt_subtest("huge-bo-tiledX") test_huge_bo(fd, 1, I915_TILING_X); igt_subtest("huge-bo-tiledY") test_huge_bo(fd, 1, I915_TILING_Y); igt_subtest("basic-small-copy") test_huge_copy(fd, -2, I915_TILING_NONE, I915_TILING_NONE); igt_subtest("basic-small-copy-XY") test_huge_copy(fd, -2, I915_TILING_X, I915_TILING_Y); igt_subtest("medium-copy") test_huge_copy(fd, -1, I915_TILING_NONE, I915_TILING_NONE); igt_subtest("medium-copy-XY") test_huge_copy(fd, -1, I915_TILING_X, I915_TILING_Y); igt_subtest("big-copy") test_huge_copy(fd, 0, I915_TILING_NONE, I915_TILING_NONE); igt_subtest("big-copy-XY") test_huge_copy(fd, 0, I915_TILING_X, I915_TILING_Y); igt_subtest("huge-copy") test_huge_copy(fd, 1, I915_TILING_NONE, I915_TILING_NONE); igt_subtest("huge-copy-XY") test_huge_copy(fd, 1, I915_TILING_X, I915_TILING_Y); igt_fixture close(fd); } intel-gpu-tools-1.14/tests/gem_tiled_blits.c0000644000175000017500000001412512665336131016067 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * */ /** @file gem_tiled_blits.c * * This is a test of doing many tiled blits, with a working set * larger than the aperture size. * * The goal is to catch a couple types of failure; * - Fence management problems on pre-965. * - A17 or L-shaped memory tiling workaround problems in acceleration. * * The model is to fill a collection of 1MB objects in a way that can't trip * over A6 swizzling -- upload data to a non-tiled object, blit to the tiled * object. Then, copy the 1MB objects randomly between each other for a while. * Finally, download their data through linear objects again and see what * resulted. */ #include "igt.h" #include #include #include #include #include #include #include #include #include IGT_TEST_DESCRIPTION("Test doing many tiled blits, with a working set larger" " than the aperture size."); static drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; static int width = 512, height = 512; static drm_intel_bo * create_bo(uint32_t start_val) { drm_intel_bo *bo, *linear_bo; uint32_t *linear; uint32_t tiling = I915_TILING_X; int i; bo = drm_intel_bo_alloc(bufmgr, "tiled bo", 1024 * 1024, 4096); do_or_die(drm_intel_bo_set_tiling(bo, &tiling, width * 4)); igt_assert(tiling == I915_TILING_X); linear_bo = drm_intel_bo_alloc(bufmgr, "linear src", 1024 * 1024, 4096); /* Fill the BO with dwords starting at start_val */ do_or_die(drm_intel_bo_map(linear_bo, 1)); linear = linear_bo->virtual; for (i = 0; i < 1024 * 1024 / 4; i++) linear[i] = start_val++; drm_intel_bo_unmap(linear_bo); intel_copy_bo (batch, bo, linear_bo, width*height*4); drm_intel_bo_unreference(linear_bo); return bo; } static void check_bo(drm_intel_bo *bo, uint32_t start_val) { drm_intel_bo *linear_bo; uint32_t *linear; int i; linear_bo = drm_intel_bo_alloc(bufmgr, "linear dst", 1024 * 1024, 4096); intel_copy_bo(batch, linear_bo, bo, width*height*4); do_or_die(drm_intel_bo_map(linear_bo, 0)); linear = linear_bo->virtual; for (i = 0; i < 1024 * 1024 / 4; i++) { igt_assert_f(linear[i] == start_val, "Expected 0x%08x, found 0x%08x " "at offset 0x%08x\n", start_val, linear[i], i * 4); start_val++; } drm_intel_bo_unmap(linear_bo); drm_intel_bo_unreference(linear_bo); } static void run_test(int count) { drm_intel_bo **bo; uint32_t *bo_start_val; uint32_t start = 0; int i; igt_debug("Using %d 1MiB buffers\n", count); bo = malloc(sizeof(drm_intel_bo *)*count); bo_start_val = malloc(sizeof(uint32_t)*count); for (i = 0; i < count; i++) { bo[i] = create_bo(start); bo_start_val[i] = start; start += 1024 * 1024 / 4; } igt_info("Verifying initialisation...\n"); for (i = 0; i < count; i++) check_bo(bo[i], bo_start_val[i]); igt_info("Cyclic blits, forward...\n"); for (i = 0; i < count * 4; i++) { int src = i % count; int dst = (i+1) % count; if (src == dst) continue; intel_copy_bo(batch, bo[dst], bo[src], width*height*4); bo_start_val[dst] = bo_start_val[src]; } for (i = 0; i < count; i++) check_bo(bo[i], bo_start_val[i]); if (igt_run_in_simulation()) { for (i = 0; i < count; i++) drm_intel_bo_unreference(bo[i]); free(bo_start_val); free(bo); return; } igt_info("Cyclic blits, backward...\n"); for (i = 0; i < count * 4; i++) { int src = (i+1) % count; int dst = i % count; if (src == dst) continue; intel_copy_bo(batch, bo[dst], bo[src], width*height*4); bo_start_val[dst] = bo_start_val[src]; } for (i = 0; i < count; i++) check_bo(bo[i], bo_start_val[i]); igt_info("Random blits...\n"); for (i = 0; i < count * 4; i++) { int src = random() % count; int dst = random() % count; if (src == dst) continue; intel_copy_bo(batch, bo[dst], bo[src], width*height*4); bo_start_val[dst] = bo_start_val[src]; } for (i = 0; i < count; i++) { check_bo(bo[i], bo_start_val[i]); drm_intel_bo_unreference(bo[i]); } free(bo_start_val); free(bo); } int fd; int main(int argc, char **argv) { igt_subtest_init(argc, argv); igt_fixture { fd = drm_open_driver(DRIVER_INTEL); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); drm_intel_bufmgr_gem_enable_reuse(bufmgr); drm_intel_bufmgr_gem_set_vma_cache_size(bufmgr, 32); batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd)); } igt_subtest("basic") run_test(2); igt_subtest("normal") { int count; count = 3 * gem_aperture_size(fd) / (1024*1024) / 2; count += (count & 1) == 0; intel_require_memory(count, 1024*1024, CHECK_RAM); run_test(count); } igt_subtest("interruptible") { int count; count = 3 * gem_aperture_size(fd) / (1024*1024) / 2; count += (count & 1) == 0; intel_require_memory(count, 1024*1024, CHECK_RAM); igt_fork_signal_helper(); run_test(count); igt_stop_signal_helper(); } igt_fixture { intel_batchbuffer_free(batch); drm_intel_bufmgr_destroy(bufmgr); close(fd); } igt_exit(); } intel-gpu-tools-1.14/tests/kms_addfb_basic.c0000644000175000017500000002603312665336131016015 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include "drm.h" #include "drm_fourcc.h" uint32_t gem_bo; uint32_t gem_bo_small; static void invalid_tests(int fd) { struct local_drm_mode_fb_cmd2 f = {}; f.width = 512; f.height = 512; f.pixel_format = DRM_FORMAT_XRGB8888; f.pitches[0] = 512*4; igt_fixture { gem_bo = gem_create(fd, 1024*1024*4); igt_assert(gem_bo); gem_bo_small = gem_create(fd, 1024*1024*4 - 4096); igt_assert(gem_bo_small); f.handles[0] = gem_bo; igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_ADDFB2, &f) == 0); igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_RMFB, &f.fb_id) == 0); f.fb_id = 0; } f.flags = LOCAL_DRM_MODE_FB_MODIFIERS; igt_subtest("unused-handle") { igt_require_fb_modifiers(fd); f.handles[1] = gem_bo_small; igt_assert(drmIoctl(fd, LOCAL_DRM_IOCTL_MODE_ADDFB2, &f) == -1 && errno == EINVAL); f.handles[1] = 0; } igt_subtest("unused-pitches") { igt_require_fb_modifiers(fd); f.pitches[1] = 512; igt_assert(drmIoctl(fd, LOCAL_DRM_IOCTL_MODE_ADDFB2, &f) == -1 && errno == EINVAL); f.pitches[1] = 0; } igt_subtest("unused-offsets") { igt_require_fb_modifiers(fd); f.offsets[1] = 512; igt_assert(drmIoctl(fd, LOCAL_DRM_IOCTL_MODE_ADDFB2, &f) == -1 && errno == EINVAL); f.offsets[1] = 0; } igt_subtest("unused-modifier") { igt_require_fb_modifiers(fd); f.modifier[1] = LOCAL_I915_FORMAT_MOD_X_TILED; igt_assert(drmIoctl(fd, LOCAL_DRM_IOCTL_MODE_ADDFB2, &f) == -1 && errno == EINVAL); f.modifier[1] = 0; } igt_subtest("clobberred-modifier") { f.flags = 0; f.modifier[0] = 0; gem_set_tiling(fd, gem_bo, I915_TILING_X, 512*4); igt_assert(drmIoctl(fd, LOCAL_DRM_IOCTL_MODE_ADDFB2, &f) == 0); igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_RMFB, &f.fb_id) == 0); f.fb_id = 0; igt_assert(f.modifier[0] == 0); } igt_fixture { gem_close(fd, gem_bo); gem_close(fd, gem_bo_small); } } static void pitch_tests(int fd) { struct drm_mode_fb_cmd2 f = {}; int bad_pitches[] = { 0, 32, 63, 128, 256, 256*4, 999, 64*1024 }; int i; f.width = 512; f.height = 512; f.pixel_format = DRM_FORMAT_XRGB8888; f.pitches[0] = 1024*4; igt_fixture { gem_bo = gem_create(fd, 1024*1024*4); igt_assert(gem_bo); } igt_subtest("no-handle") { igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_ADDFB2, &f) == -1 && errno == EINVAL); } f.handles[0] = gem_bo; igt_subtest("basic") { igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_ADDFB2, &f) == 0); igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_RMFB, &f.fb_id) == 0); f.fb_id = 0; } for (i = 0; i < ARRAY_SIZE(bad_pitches); i++) { igt_subtest_f("bad-pitch-%i", bad_pitches[i]) { f.pitches[0] = bad_pitches[i]; igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_ADDFB2, &f) == -1 && errno == EINVAL); } } igt_fixture gem_set_tiling(fd, gem_bo, I915_TILING_X, 1024*4); f.pitches[0] = 1024*4; igt_subtest("basic-X-tiled") { igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_ADDFB2, &f) == 0); igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_RMFB, &f.fb_id) == 0); f.fb_id = 0; } igt_subtest("framebuffer-vs-set-tiling") { igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_ADDFB2, &f) == 0); igt_assert(__gem_set_tiling(fd, gem_bo, I915_TILING_X, 512*4) == -EBUSY); igt_assert(__gem_set_tiling(fd, gem_bo, I915_TILING_X, 1024*4) == -EBUSY); igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_RMFB, &f.fb_id) == 0); f.fb_id = 0; } f.pitches[0] = 512*4; igt_subtest("tile-pitch-mismatch") { igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_ADDFB2, &f) == -1 && errno == EINVAL); } igt_fixture gem_set_tiling(fd, gem_bo, I915_TILING_Y, 1024*4); f.pitches[0] = 1024*4; igt_subtest("basic-Y-tiled") { igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_ADDFB2, &f) == -1 && errno == EINVAL); } igt_fixture gem_close(fd, gem_bo); } static void size_tests(int fd) { struct drm_mode_fb_cmd2 f = {}; struct drm_mode_fb_cmd2 f_16 = {}; struct drm_mode_fb_cmd2 f_8 = {}; f.width = 1024; f.height = 1024; f.pixel_format = DRM_FORMAT_XRGB8888; f.pitches[0] = 1024*4; f_16.width = 1024; f_16.height = 1024*2; f_16.pixel_format = DRM_FORMAT_RGB565; f_16.pitches[0] = 1024*2; f_8.width = 1024*2; f_8.height = 1024*2; f_8.pixel_format = DRM_FORMAT_C8; f_8.pitches[0] = 1024*2; igt_fixture { gem_bo = gem_create(fd, 1024*1024*4); igt_assert(gem_bo); gem_bo_small = gem_create(fd, 1024*1024*4 - 4096); igt_assert(gem_bo_small); } f.handles[0] = gem_bo; f_16.handles[0] = gem_bo; f_8.handles[0] = gem_bo; igt_subtest("size-max") { igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_ADDFB2, &f) == 0); igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_RMFB, &f.fb_id) == 0); f.fb_id = 0; igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_ADDFB2, &f_16) == 0); igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_RMFB, &f_16.fb_id) == 0); f.fb_id = 0; igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_ADDFB2, &f_8) == 0); igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_RMFB, &f_8.fb_id) == 0); f.fb_id = 0; } f.width++; f_16.width++; f_8.width++; igt_subtest("too-wide") { igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_ADDFB2, &f) == -1 && errno == EINVAL); igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_ADDFB2, &f_16) == -1 && errno == EINVAL); igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_ADDFB2, &f_8) == -1 && errno == EINVAL); } f.width--; f_16.width--; f_8.width--; f.height++; f_16.height++; f_8.height++; igt_subtest("too-high") { igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_ADDFB2, &f) == -1 && errno == EINVAL); igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_ADDFB2, &f_16) == -1 && errno == EINVAL); igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_ADDFB2, &f_8) == -1 && errno == EINVAL); } f.handles[0] = gem_bo_small; igt_subtest("bo-too-small") { igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_ADDFB2, &f) == -1 && errno == EINVAL); } /* Just to check that the parameters would work. */ f.height = 1020; igt_subtest("small-bo") { igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_ADDFB2, &f) == 0); igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_RMFB, &f.fb_id) == 0); f.fb_id = 0; } igt_fixture gem_set_tiling(fd, gem_bo_small, I915_TILING_X, 1024*4); igt_subtest("bo-too-small-due-to-tiling") { igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_ADDFB2, &f) == -1 && errno == EINVAL); } igt_fixture { gem_close(fd, gem_bo); gem_close(fd, gem_bo_small); } } static void addfb25_tests(int fd) { struct local_drm_mode_fb_cmd2 f = {}; igt_fixture { gem_bo = gem_create(fd, 1024*1024*4); igt_assert(gem_bo); memset(&f, 0, sizeof(f)); f.width = 1024; f.height = 1024; f.pixel_format = DRM_FORMAT_XRGB8888; f.pitches[0] = 1024*4; f.modifier[0] = LOCAL_DRM_FORMAT_MOD_NONE; f.handles[0] = gem_bo; } igt_subtest("addfb25-modifier-no-flag") { igt_require_fb_modifiers(fd); f.modifier[0] = LOCAL_I915_FORMAT_MOD_X_TILED; igt_assert(drmIoctl(fd, LOCAL_DRM_IOCTL_MODE_ADDFB2, &f) < 0 && errno == EINVAL); } igt_fixture f.flags = LOCAL_DRM_MODE_FB_MODIFIERS; igt_subtest("addfb25-bad-modifier") { igt_require_fb_modifiers(fd); f.modifier[0] = ~0; igt_assert(drmIoctl(fd, LOCAL_DRM_IOCTL_MODE_ADDFB2, &f) < 0 && errno == EINVAL); } igt_fixture gem_set_tiling(fd, gem_bo, I915_TILING_X, 1024*4); igt_subtest("addfb25-X-tiled-mismatch") { igt_require_fb_modifiers(fd); f.modifier[0] = LOCAL_DRM_FORMAT_MOD_NONE; igt_assert(drmIoctl(fd, LOCAL_DRM_IOCTL_MODE_ADDFB2, &f) < 0 && errno == EINVAL); } igt_subtest("addfb25-X-tiled") { igt_require_fb_modifiers(fd); f.modifier[0] = LOCAL_I915_FORMAT_MOD_X_TILED; igt_assert(drmIoctl(fd, LOCAL_DRM_IOCTL_MODE_ADDFB2, &f) == 0); igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_RMFB, &f.fb_id) == 0); f.fb_id = 0; } igt_subtest("addfb25-framebuffer-vs-set-tiling") { igt_require_fb_modifiers(fd); f.modifier[0] = LOCAL_I915_FORMAT_MOD_X_TILED; igt_assert(drmIoctl(fd, LOCAL_DRM_IOCTL_MODE_ADDFB2, &f) == 0); igt_assert(__gem_set_tiling(fd, gem_bo, I915_TILING_X, 512*4) == -EBUSY); igt_assert(__gem_set_tiling(fd, gem_bo, I915_TILING_X, 1024*4) == -EBUSY); igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_RMFB, &f.fb_id) == 0); f.fb_id = 0; } igt_fixture gem_close(fd, gem_bo); } static void addfb25_ytile(int fd, int gen) { struct local_drm_mode_fb_cmd2 f = {}; int shouldret; igt_fixture { gem_bo = gem_create(fd, 1024*1024*4); igt_assert(gem_bo); gem_bo_small = gem_create(fd, 1024*1023*4); igt_assert(gem_bo_small); shouldret = gen >= 9 ? 0 : -1; memset(&f, 0, sizeof(f)); f.width = 1024; f.height = 1024; f.pixel_format = DRM_FORMAT_XRGB8888; f.pitches[0] = 1024*4; f.flags = LOCAL_DRM_MODE_FB_MODIFIERS; f.modifier[0] = LOCAL_DRM_FORMAT_MOD_NONE; f.handles[0] = gem_bo; } igt_subtest("addfb25-Y-tiled") { igt_require_fb_modifiers(fd); f.modifier[0] = LOCAL_I915_FORMAT_MOD_Y_TILED; igt_assert(drmIoctl(fd, LOCAL_DRM_IOCTL_MODE_ADDFB2, &f) == shouldret); if (!shouldret) igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_RMFB, &f.fb_id) == 0); f.fb_id = 0; } igt_subtest("addfb25-Yf-tiled") { igt_require_fb_modifiers(fd); f.modifier[0] = LOCAL_I915_FORMAT_MOD_Yf_TILED; igt_assert(drmIoctl(fd, LOCAL_DRM_IOCTL_MODE_ADDFB2, &f) == shouldret); if (!shouldret) igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_RMFB, &f.fb_id) == 0); f.fb_id = 0; } igt_subtest("addfb25-Y-tiled-small") { igt_require_fb_modifiers(fd); igt_require(gen >= 9); f.modifier[0] = LOCAL_I915_FORMAT_MOD_Y_TILED; f.height = 1023; f.handles[0] = gem_bo_small; igt_assert(drmIoctl(fd, LOCAL_DRM_IOCTL_MODE_ADDFB2, &f) < 0 && errno == EINVAL); f.fb_id = 0; } igt_fixture { gem_close(fd, gem_bo); gem_close(fd, gem_bo_small); } } int fd; int gen; igt_main { igt_fixture { fd = drm_open_driver_master(DRIVER_INTEL); gen = intel_gen(intel_get_drm_devid(fd)); } invalid_tests(fd); pitch_tests(fd); size_tests(fd); addfb25_tests(fd); addfb25_ytile(fd, gen); igt_fixture close(fd); } intel-gpu-tools-1.14/tests/gem_stolen.c0000644000175000017500000002021512665336131015072 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Ankitprasad Sharma * */ /** @file gem_create_stolen.c * * This is a test for the extended gem_create ioctl, that includes allocation * of object from stolen memory. * * The goal is to simply ensure the basics work, and invalid input combinations * are rejected. */ #include #include #include #include #include #include #include #include #include #include #include #include "ioctl_wrappers.h" #include "intel_bufmgr.h" #include "intel_batchbuffer.h" #include "intel_io.h" #include "intel_chipset.h" #include "igt_aux.h" #include "drmtest.h" #include "drm.h" #include "i915_drm.h" IGT_TEST_DESCRIPTION("This test verifies the exetended gem_create ioctl," " that includes allocation of obj from stolen region"); #define CLEAR(s) memset(&s, 0, sizeof(s)) #define SIZE 1024*1024 #define DWORD_SIZE 4 #define DATA 0xdead #define LARGE_SIZE 0xffffffff #define MAX_OBJECTS 100 static drm_intel_bufmgr *bufmgr; static struct intel_batchbuffer *batch; static void verify_copy_op(drm_intel_bo *src, drm_intel_bo *dest) { uint32_t *virt, i, ret; /* Fill the src BO with dwords */ ret = drm_intel_gem_bo_map_gtt(src); igt_assert(!ret); virt = src->virtual; for (i = 0; i < SIZE/DWORD_SIZE; i++) virt[i] = i; intel_copy_bo(batch, dest, src, SIZE); ret = drm_intel_gem_bo_map_gtt(dest); igt_assert(!ret); virt = dest->virtual; /* verify */ for (i = 0; i < SIZE/DWORD_SIZE; i++) igt_assert_eq(virt[i], i); drm_intel_bo_unmap(src); drm_intel_bo_unmap(dest); } static void stolen_pwrite(int fd) { drm_intel_bo *bo; uint32_t buf[SIZE/DWORD_SIZE]; uint32_t handle = 0; uint32_t *virt; int i, ret = 0; for (i = 0; i < SIZE/DWORD_SIZE; i++) buf[i] = DATA; gem_require_stolen_support(fd); handle = gem_create_stolen(fd, SIZE); gem_write(fd, handle, 0, buf, SIZE); bo = gem_handle_to_libdrm_bo(bufmgr, fd, "bo", handle); ret = drm_intel_gem_bo_map_gtt(bo); igt_assert(!ret); virt = bo->virtual; for (i = 0; i < SIZE/DWORD_SIZE; i++) igt_assert_eq(virt[i], DATA); drm_intel_bo_unmap(bo); drm_intel_bo_unreference(bo); gem_close(fd, handle); } static void stolen_pread(int fd) { drm_intel_bo *bo; uint32_t buf[SIZE/DWORD_SIZE]; uint32_t handle = 0; uint32_t *virt; int i, ret = 0; CLEAR(buf); gem_require_stolen_support(fd); handle = gem_create_stolen(fd, SIZE); bo = gem_handle_to_libdrm_bo(bufmgr, fd, "bo", handle); ret = drm_intel_gem_bo_map_gtt(bo); igt_assert(!ret); virt = bo->virtual; for (i = 0; i < SIZE/DWORD_SIZE; i++) virt[i] = DATA; drm_intel_bo_unmap(bo); drm_intel_bo_unreference(bo); gem_read(fd, handle, 0, buf, SIZE); for (i = 0; i < SIZE/DWORD_SIZE; i++) igt_assert_eq(buf[i], DATA); gem_close(fd, handle); } static void copy_test(int fd) { drm_intel_bo *src, *dest; uint32_t src_handle = 0, dest_handle = 0; gem_require_stolen_support(fd); src_handle = gem_create_stolen(fd, SIZE); dest_handle = gem_create_stolen(fd, SIZE); src = gem_handle_to_libdrm_bo(bufmgr, fd, "src_bo", src_handle); dest = gem_handle_to_libdrm_bo(bufmgr, fd, "dst_bo", dest_handle); igt_assert(src != NULL); igt_assert(dest != NULL); verify_copy_op(src, dest); drm_intel_bo_unreference(src); drm_intel_bo_unreference(dest); gem_close(fd, src_handle); gem_close(fd, dest_handle); } static void verify_object_clear(int fd) { drm_intel_bo *bo; uint32_t handle = 0; uint32_t *virt; int i, ret; gem_require_stolen_support(fd); handle = gem_create_stolen(fd, SIZE); bo = gem_handle_to_libdrm_bo(bufmgr, fd, "verify_bo", handle); igt_assert(bo != NULL); ret = drm_intel_gem_bo_map_gtt(bo); igt_assert(!ret); /* Verify if the BO is zeroed */ virt = bo->virtual; for (i = 0; i < SIZE / DWORD_SIZE; i++) igt_assert(!virt[i]); drm_intel_bo_unmap(bo); drm_intel_bo_unreference(bo); gem_close(fd, handle); } static void stolen_large_obj_alloc(int fd) { uint32_t handle = 0; gem_require_stolen_support(fd); handle = __gem_create_stolen(fd, (unsigned long long) LARGE_SIZE + 4096); igt_assert(!handle); } static void stolen_fill_purge_test(int fd) { drm_intel_bo *bo; int obj_count = 0, i = 0; int _ret = 0, j = 0; uint32_t handle[MAX_OBJECTS]; uint32_t new_handle; uint32_t *virt; int retained; gem_require_stolen_support(fd); /* Exhaust Stolen space */ do { handle[i] = __gem_create_stolen(fd, SIZE); if (handle[i] != 0) { bo = gem_handle_to_libdrm_bo(bufmgr, fd, "verify_bo", handle[i]); igt_assert(bo != NULL); _ret = drm_intel_gem_bo_map_gtt(bo); igt_assert(!_ret); virt = bo->virtual; for (j = 0; j < SIZE/DWORD_SIZE; j++) virt[j] = DATA; drm_intel_bo_unmap(bo); drm_intel_bo_unreference(bo); obj_count++; } i++; } while (handle[i-1] && i < MAX_OBJECTS); igt_assert(obj_count > 0); /* Mark all stolen objects purgeable */ for (i = 0; i < obj_count; i++) retained = gem_madvise(fd, handle[i], I915_MADV_DONTNEED); /* Try to allocate one more object */ new_handle = gem_create_stolen(fd, SIZE); /* Check if the retained object's memory contents are intact */ for (i = 0; i < obj_count; i++) { retained = gem_madvise(fd, handle[i], I915_MADV_WILLNEED); if (retained) { bo = gem_handle_to_libdrm_bo(bufmgr, fd, "verify_bo", handle[i]); igt_assert(bo != NULL); _ret = drm_intel_gem_bo_map_gtt(bo); igt_assert(!_ret); virt = bo->virtual; for (j = 0; j < SIZE/DWORD_SIZE; j++) igt_assert_eq(virt[j], DATA); drm_intel_bo_unmap(bo); drm_intel_bo_unreference(bo); } } gem_close(fd, new_handle); for (i = 0; i < obj_count; i++) gem_close(fd, handle[i]); } static void stolen_no_mmap(int fd) { void *addr; uint32_t handle = 0; gem_require_stolen_support(fd); handle = gem_create_stolen(fd, SIZE); addr = gem_mmap__cpu(fd, handle, 0, SIZE, PROT_READ | PROT_WRITE); igt_assert(addr == NULL); gem_close(fd, handle); } igt_main { int fd; uint32_t devid; igt_skip_on_simulation(); igt_fixture { fd = drm_open_driver(DRIVER_INTEL); devid = intel_get_drm_devid(fd); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); batch = intel_batchbuffer_alloc(bufmgr, devid); } igt_subtest("stolen-clear") verify_object_clear(fd); /* * stolen mem special cases - checking for non cpu mappable */ igt_subtest("stolen-no-mmap") stolen_no_mmap(fd); /* checking for pread/pwrite interfaces */ igt_subtest("stolen-pwrite") stolen_pwrite(fd); igt_subtest("stolen-pread") stolen_pread(fd); /* Functional Test - blt copy */ igt_subtest("stolen-copy") copy_test(fd); igt_subtest("large-object-alloc") stolen_large_obj_alloc(fd); /* Filling stolen completely and marking all the objects * purgeable. Then trying to add one more object, to verify * the purging logic. * Again marking all objects WILLNEED and verifying the * contents of the retained objects. */ igt_subtest("stolen-fill-purge") stolen_fill_purge_test(fd); igt_fixture { intel_batchbuffer_free(batch); drm_intel_bufmgr_destroy(bufmgr); } } intel-gpu-tools-1.14/tests/gem_read_read_speed.c0000644000175000017500000001405712665336131016663 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ /** @file gem_read_read_speed.c * * This is a test of performance with multiple readers from the same source. */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include "intel_bufmgr.h" IGT_TEST_DESCRIPTION("Test speed of concurrent reads between engines."); igt_render_copyfunc_t rendercopy; struct intel_batchbuffer *batch; int width, height; static int gem_param(int fd, int name) { drm_i915_getparam_t gp; int v = -1; /* No param uses the sign bit, reserve it for errors */ memset(&gp, 0, sizeof(gp)); gp.param = name; gp.value = &v; if (drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp)) return -1; return v; } static int semaphores_enabled(int fd) { FILE *file; int detected = -1; int ret; ret = gem_param(fd, 20); if (ret != -1) return ret > 0; file = fopen("/sys/module/i915/parameters/semaphores", "r"); if (file) { int value; if (fscanf(file, "%d", &value) == 1) detected = value; fclose(file); } return detected; } static drm_intel_bo *rcs_copy_bo(drm_intel_bo *dst, drm_intel_bo *src) { struct igt_buf d = { .bo = dst, .size = width * height * 4, .num_tiles = width * height * 4, .stride = width * 4, }, s = { .bo = src, .size = width * height * 4, .num_tiles = width * height * 4, .stride = width * 4, }; uint32_t swizzle; drm_intel_bo *bo = batch->bo; drm_intel_bo_reference(bo); drm_intel_bo_get_tiling(dst, &d.tiling, &swizzle); drm_intel_bo_get_tiling(src, &s.tiling, &swizzle); rendercopy(batch, NULL, &s, 0, 0, width, height, &d, 0, 0); return bo; } static drm_intel_bo *bcs_copy_bo(drm_intel_bo *dst, drm_intel_bo *src) { drm_intel_bo *bo = batch->bo; drm_intel_bo_reference(bo); intel_blt_copy(batch, src, 0, 0, 4*width, dst, 0, 0, 4*width, width, height, 32); return bo; } static void set_bo(drm_intel_bo *bo, uint32_t val) { int size = width * height; uint32_t *vaddr; do_or_die(drm_intel_bo_map(bo, 1)); vaddr = bo->virtual; while (size--) *vaddr++ = val; drm_intel_bo_unmap(bo); } static double elapsed(const struct timespec *start, const struct timespec *end, int loop) { return (1e6*(end->tv_sec - start->tv_sec) + (end->tv_nsec - start->tv_nsec)/1000)/loop; } static drm_intel_bo *create_bo(drm_intel_bufmgr *bufmgr, const char *name) { uint32_t tiling_mode = I915_TILING_X; unsigned long pitch; return drm_intel_bo_alloc_tiled(bufmgr, name, width, height, 4, &tiling_mode, &pitch, 0); } static void run(drm_intel_bufmgr *bufmgr, int _width, int _height, bool write_bcs, bool write_rcs) { drm_intel_bo *src = NULL, *bcs = NULL, *rcs = NULL; drm_intel_bo *bcs_batch, *rcs_batch; struct timespec start, end; int loops = 1000; width = _width; height = _height; src = create_bo(bufmgr, "src"); bcs = create_bo(bufmgr, "bcs"); rcs = create_bo(bufmgr, "rcs"); set_bo(src, 0xdeadbeef); if (write_bcs) { bcs_batch = bcs_copy_bo(src, bcs); } else { bcs_batch = bcs_copy_bo(bcs, src); } if (write_rcs) { rcs_batch = rcs_copy_bo(src, rcs); } else { rcs_batch = rcs_copy_bo(rcs, src); } drm_intel_bo_unreference(rcs); drm_intel_bo_unreference(bcs); drm_intel_gem_bo_start_gtt_access(src, true); clock_gettime(CLOCK_MONOTONIC, &start); for (int i = 0; i < loops; i++) { drm_intel_gem_bo_context_exec(rcs_batch, NULL, 4096, I915_EXEC_RENDER); drm_intel_gem_bo_context_exec(bcs_batch, NULL, 4096, I915_EXEC_BLT); } drm_intel_gem_bo_start_gtt_access(src, true); clock_gettime(CLOCK_MONOTONIC, &end); igt_info("Time to %s-%s %dx%d [%dk]: %7.3fµs\n", write_bcs ? "write" : "read", write_rcs ? "write" : "read", width, height, 4*width*height/1024, elapsed(&start, &end, loops)); drm_intel_bo_unreference(rcs_batch); drm_intel_bo_unreference(bcs_batch); drm_intel_bo_unreference(src); } igt_main { const int sizes[] = {1, 128, 256, 512, 1024, 2048, 4096, 8192, 0}; drm_intel_bufmgr *bufmgr = NULL; int fd, i; igt_skip_on_simulation(); igt_fixture { int devid; fd = drm_open_driver(DRIVER_INTEL); devid = intel_get_drm_devid(fd); igt_require(intel_gen(devid) >= 6); rendercopy = igt_get_render_copyfunc(devid); igt_require(rendercopy); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); igt_assert(bufmgr); batch = intel_batchbuffer_alloc(bufmgr, devid); igt_info("Semaphores: %d\n", semaphores_enabled(fd)); } for (i = 0; sizes[i] != 0; i++) { igt_subtest_f("read-read-%dx%d", sizes[i], sizes[i]) run(bufmgr, sizes[i], sizes[i], false, false); igt_subtest_f("read-write-%dx%d", sizes[i], sizes[i]) run(bufmgr, sizes[i], sizes[i], false, true); igt_subtest_f("write-read-%dx%d", sizes[i], sizes[i]) run(bufmgr, sizes[i], sizes[i], true, false); igt_subtest_f("write-write-%dx%d", sizes[i], sizes[i]) run(bufmgr, sizes[i], sizes[i], true, true); } } intel-gpu-tools-1.14/tests/gem_ringfill.c0000644000175000017500000001335612665336131015404 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * */ /** @file gem_ringfill.c * * This is a test of doing many tiny batchbuffer operations, in the hope of * catching failure to manage the ring properly near full. */ #include "igt.h" #include "igt_gt.h" static void check_bo(int fd, uint32_t handle) { uint32_t *map; int i; igt_debug("Verifying result\n"); map = gem_mmap__cpu(fd, handle, 0, 4096, PROT_READ); gem_set_domain(fd, handle, I915_GEM_DOMAIN_CPU, 0); for (i = 0; i < 1024; i++) igt_assert_eq(map[i], i); munmap(map, 4096); } static void fill_ring(int fd, struct drm_i915_gem_execbuffer2 *execbuf) { int i; /* The ring we've been using is 128k, and each rendering op * will use at least 8 dwords: * * BATCH_START * BATCH_START offset * MI_FLUSH * STORE_DATA_INDEX * STORE_DATA_INDEX offset * STORE_DATA_INDEX value * MI_USER_INTERRUPT * (padding) * * So iterate just a little more than that -- if we don't fill the ring * doing this, we aren't likely to with this test. */ igt_debug("Executing execbuf %d times\n", 128*1024/(8*4)); for (i = 0; i < 128*1024 / (8 * 4); i++) gem_execbuf(fd, execbuf); } #define INTERRUPTIBLE 0x1 #define HANG 0x2 #define CHILD 0x8 #define FORKED 0x8 #define BOMB 0x10 static void run_test(int fd, unsigned ring, unsigned flags) { const int gen = intel_gen(intel_get_drm_devid(fd)); const uint32_t bbe = MI_BATCH_BUFFER_END; struct drm_i915_gem_exec_object2 obj[2]; struct drm_i915_gem_relocation_entry reloc[1024]; struct drm_i915_gem_execbuffer2 execbuf; struct igt_hang_ring hang; uint32_t *batch, *b; int i; gem_require_ring(fd, ring); igt_skip_on_f(gen == 6 && (ring & ~(3<<13)) == I915_EXEC_BSD, "MI_STORE_DATA broken on gen6 bsd\n"); gem_quiescent_gpu(fd); memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)obj; execbuf.buffer_count = 2; execbuf.flags = ring | (1 << 11); if (gen < 6) execbuf.flags |= I915_EXEC_SECURE; memset(obj, 0, sizeof(obj)); obj[0].handle = gem_create(fd, 4096); obj[0].flags |= EXEC_OBJECT_WRITE; obj[1].handle = gem_create(fd, 1024*16 + 4096); gem_write(fd, obj[1].handle, 0, &bbe, sizeof(bbe)); igt_require(__gem_execbuf(fd, &execbuf) == 0); obj[1].relocs_ptr = (uintptr_t)reloc; obj[1].relocation_count = 1024; batch = gem_mmap__cpu(fd, obj[1].handle, 0, 16*1024 + 4096, PROT_WRITE | PROT_READ); gem_set_domain(fd, obj[1].handle, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU); memset(reloc, 0, sizeof(reloc)); b = batch; for (i = 0; i < 1024; i++) { uint64_t offset; reloc[i].target_handle = obj[0].handle; reloc[i].presumed_offset = obj[0].offset; reloc[i].offset = (b - batch + 1) * sizeof(*batch); reloc[i].delta = i * sizeof(uint32_t); reloc[i].read_domains = I915_GEM_DOMAIN_INSTRUCTION; reloc[i].write_domain = I915_GEM_DOMAIN_INSTRUCTION; offset = obj[0].offset + reloc[i].delta; *b++ = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0); if (gen >= 8) { *b++ = offset; *b++ = offset >> 32; } else if (gen >= 4) { *b++ = 0; *b++ = offset; reloc[i].offset += sizeof(*batch); } else { b[-1] -= 1; *b++ = offset; } *b++ = i; } *b++ = MI_BATCH_BUFFER_END; munmap(batch, 16*1024+4096); gem_execbuf(fd, &execbuf); check_bo(fd, obj[0].handle); memset(&hang, 0, sizeof(hang)); if (flags & HANG) hang = igt_hang_ring(fd, ring & ~(3<<13)); if (flags & INTERRUPTIBLE) igt_fork_signal_helper(); if (flags & (CHILD | FORKED | BOMB)) { int nchild; if (flags & CHILD) nchild = 1; else if (flags & FORKED) nchild = sysconf(_SC_NPROCESSORS_ONLN); else nchild = 8*sysconf(_SC_NPROCESSORS_ONLN); igt_debug("Forking %d children\n", nchild); igt_fork(child, nchild) fill_ring(fd, &execbuf); igt_waitchildren(); } else fill_ring(fd, &execbuf); if (flags & INTERRUPTIBLE) igt_stop_signal_helper(); if (flags & HANG) igt_post_hang_ring(fd, hang); else check_bo(fd, obj[0].handle); gem_close(fd, obj[1].handle); gem_close(fd, obj[0].handle); } igt_main { const struct { const char *suffix; unsigned flags; } modes[] = { { "", 0 }, { "-interruptible", INTERRUPTIBLE }, { "-hang", HANG }, { "-child", CHILD }, { "-forked", FORKED }, { "-bomb", BOMB | INTERRUPTIBLE }, { NULL, 0 } }, *mode; const struct intel_execution_engine *e; int fd; igt_fixture fd = drm_open_driver_master(DRIVER_INTEL); for (mode = modes; mode->suffix; mode++) { for (e = intel_execution_engines; e->name; e++) { igt_subtest_f("%s%s%s", e->exec_id ? "" : "basic-", e->name, mode->suffix) run_test(fd, e->exec_id | e->flags, mode->flags); } } igt_fixture close(fd); } intel-gpu-tools-1.14/tests/gem_ring_sync_copy.c0000644000175000017500000002211512665336131016614 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Damien Lespiau */ /* * The goal of this test is to ensure that we respect inter ring dependencies * * For each pair of rings R1, R2 where we have copy support (i.e. blt, * rendercpy and mediafill) do: * - Throw a busy load onto R1. gem_concurrent_blt just uses lots of buffers * for this effect. * - Fill three buffers A, B, C with unique data. * - Copy A to B on ring R1 * * Then come the three different variants. * - Copy B to C on ring R2, check that C now contains what A originally * contained. This is the write->read hazard. gem_concurrent_blt calls this * early read. * - Copy C to A on ring R2, check that B now contains what A originally * contained. This is the read->write hazard, gem_concurrent_blt calls it * overwrite_source. * - Copy C to B on ring R2 and check that B contains what C originally * contained. This is the write/write hazard. gem_concurrent_blt doesn't * have that since for the cpu case it's too boring. * */ #include "igt.h" #include #include IGT_TEST_DESCRIPTION("Ensure inter-ring dependencies are respected."); #define WIDTH 512 #define HEIGHT 512 #define NUM_BUSY_BUFFERS 32 typedef struct { int drm_fd; uint32_t devid; drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; /* number of buffers to keep the ring busy for a while */ unsigned int n_buffers_load; uint32_t linear[WIDTH * HEIGHT]; struct { igt_render_copyfunc_t copy; struct igt_buf *srcs; struct igt_buf *dsts; } render; struct { drm_intel_bo **srcs; drm_intel_bo **dsts; } blitter; } data_t; enum ring { RENDER, BLITTER, }; enum test { TEST_WRITE_READ, TEST_READ_WRITE, TEST_WRITE_WRITE, }; static const char *ring_name(enum ring ring) { const char *names[] = { "render", "blitter", }; return names[ring]; } static drm_intel_bo *bo_create(data_t *data, int width, int height, int val) { drm_intel_bo *bo; int i; bo = drm_intel_bo_alloc(data->bufmgr, "", 4 * width * height, 4096); igt_assert(bo); for (i = 0; i < width * height; i++) data->linear[i] = val; gem_write(data->drm_fd, bo->handle, 0, data->linear, sizeof(data->linear)); return bo; } static void bo_check(data_t *data, drm_intel_bo *bo, uint32_t val) { int i; gem_read(data->drm_fd, bo->handle, 0, data->linear, sizeof(data->linear)); for (i = 0; i < WIDTH * HEIGHT; i++) igt_assert_eq_u32(data->linear[i], val); } static void scratch_buf_init_from_bo(struct igt_buf *buf, drm_intel_bo *bo) { buf->bo = bo; buf->stride = 4 * WIDTH; buf->tiling = I915_TILING_NONE; buf->size = 4 * WIDTH * HEIGHT; } static void scratch_buf_init(data_t *data, struct igt_buf *buf, int width, int height, uint32_t color) { drm_intel_bo *bo; bo = bo_create(data, width, height, color); scratch_buf_init_from_bo(buf, bo); } /* * Provide a few ring specific vfuncs for run_test(). * * busy() Queue a n_buffers_load workloads onto the ring to keep it busy * busy_fini() Clean up after busy * copy() Copy one BO to another */ /* * Render ring */ static void render_busy(data_t *data) { size_t array_size; int i; /* allocate 32 buffer objects and re-use them as needed */ array_size = NUM_BUSY_BUFFERS * sizeof(struct igt_buf); data->render.srcs = malloc(array_size); data->render.dsts = malloc(array_size); for (i = 0; i < NUM_BUSY_BUFFERS; i++) { scratch_buf_init(data, &data->render.srcs[i], WIDTH, HEIGHT, 0xdeadbeef); scratch_buf_init(data, &data->render.dsts[i], WIDTH, HEIGHT, 0xdeadbeef); } for (i = 0; i < data->n_buffers_load; i++) { data->render.copy(data->batch, NULL, /* context */ &data->render.srcs[i % NUM_BUSY_BUFFERS], 0, 0, /* src_x, src_y */ WIDTH, HEIGHT, &data->render.dsts[i % NUM_BUSY_BUFFERS], 0, 0 /* dst_x, dst_y */); } } static void render_busy_fini(data_t *data) { int i; for (i = 0; i < NUM_BUSY_BUFFERS; i++) { drm_intel_bo_unreference(data->render.srcs[i].bo); drm_intel_bo_unreference(data->render.dsts[i].bo); } free(data->render.srcs); free(data->render.dsts); data->render.srcs = NULL; data->render.dsts = NULL; } static void render_copy(data_t *data, drm_intel_bo *src, drm_intel_bo *dst) { struct igt_buf src_buf, dst_buf; scratch_buf_init_from_bo(&src_buf, src); scratch_buf_init_from_bo(&dst_buf, dst); data->render.copy(data->batch, NULL, /* context */ &src_buf, 0, 0, /* src_x, src_y */ WIDTH, HEIGHT, &dst_buf, 0, 0 /* dst_x, dst_y */); } /* * Blitter ring */ static void blitter_busy(data_t *data) { size_t array_size; int i; /* allocate 32 buffer objects and re-use them as needed */ array_size = NUM_BUSY_BUFFERS * sizeof(drm_intel_bo *); data->blitter.srcs = malloc(array_size); data->blitter.dsts = malloc(array_size); for (i = 0; i < NUM_BUSY_BUFFERS; i++) { data->blitter.srcs[i] = bo_create(data, WIDTH, HEIGHT, 0xdeadbeef); data->blitter.dsts[i] = bo_create(data, WIDTH, HEIGHT, 0xdeadbeef); } for (i = 0; i < data->n_buffers_load; i++) { intel_copy_bo(data->batch, data->blitter.srcs[i % NUM_BUSY_BUFFERS], data->blitter.dsts[i % NUM_BUSY_BUFFERS], WIDTH*HEIGHT*4); } } static void blitter_busy_fini(data_t *data) { int i; for (i = 0; i < NUM_BUSY_BUFFERS; i++) { drm_intel_bo_unreference(data->blitter.srcs[i]); drm_intel_bo_unreference(data->blitter.dsts[i]); } free(data->blitter.srcs); free(data->blitter.dsts); data->blitter.srcs = NULL; data->blitter.dsts = NULL; } static void blitter_copy(data_t *data, drm_intel_bo *src, drm_intel_bo *dst) { intel_copy_bo(data->batch, dst, src, WIDTH*HEIGHT*4); } struct ring_ops { void (*busy)(data_t *data); void (*busy_fini)(data_t *data); void (*copy)(data_t *data, drm_intel_bo *src, drm_intel_bo *dst); } ops [] = { { .busy = render_busy, .busy_fini = render_busy_fini, .copy = render_copy, }, { .busy = blitter_busy, .busy_fini = blitter_busy_fini, .copy = blitter_copy, }, }; static void run_test(data_t *data, enum ring r1, enum ring r2, enum test test) { struct ring_ops *r1_ops = &ops[r1]; struct ring_ops *r2_ops = &ops[r2]; drm_intel_bo *a, *b, *c; a = bo_create(data, WIDTH, HEIGHT, 0xa); b = bo_create(data, WIDTH, HEIGHT, 0xb); c = bo_create(data, WIDTH, HEIGHT, 0xc); r1_ops->busy(data); r1_ops->copy(data, a, b); switch (test) { case TEST_WRITE_READ: r2_ops->copy(data, b, c); bo_check(data, c, 0xa); break; case TEST_READ_WRITE: r2_ops->copy(data, c, a); bo_check(data, b, 0xa); break; case TEST_WRITE_WRITE: r2_ops->copy(data, c, b); bo_check(data, b, 0xc); break; default: igt_fail(IGT_EXIT_FAILURE); } r1_ops->busy_fini(data); } igt_main { data_t data = {0, }; int i; struct combination { int r1, r2; } ring_combinations [] = { { RENDER, BLITTER }, { BLITTER, RENDER }, }; igt_fixture { data.drm_fd = drm_open_driver_render(DRIVER_INTEL); data.devid = intel_get_drm_devid(data.drm_fd); data.n_buffers_load = 1000; data.bufmgr = drm_intel_bufmgr_gem_init(data.drm_fd, 4096); igt_assert(data.bufmgr); drm_intel_bufmgr_gem_enable_reuse(data.bufmgr); data.render.copy = igt_get_render_copyfunc(data.devid); igt_require_f(data.render.copy, "no render-copy function\n"); data.batch = intel_batchbuffer_alloc(data.bufmgr, data.devid); igt_assert(data.batch); } for (i = 0; i < ARRAY_SIZE(ring_combinations); i++) { struct combination *c = &ring_combinations[i]; igt_subtest_f("sync-%s-%s-write-read", ring_name(c->r1), ring_name(c->r2)) run_test(&data, c->r1, c->r2, TEST_WRITE_READ); igt_subtest_f("sync-%s-%s-read-write", ring_name(c->r1), ring_name(c->r2)) run_test(&data, c->r1, c->r2, TEST_READ_WRITE); igt_subtest_f("sync-%s-%s-write-write", ring_name(c->r1), ring_name(c->r2)) run_test(&data, c->r1, c->r2, TEST_WRITE_WRITE); } igt_fixture { intel_batchbuffer_free(data.batch); drm_intel_bufmgr_destroy(data.bufmgr); close(data.drm_fd); } } intel-gpu-tools-1.14/tests/kms_fbc_crc.c0000644000175000017500000003523112665336131015175 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include "igt.h" #include #include #include #include IGT_TEST_DESCRIPTION( "Performs various write operations to the scanout buffer while FBC is " "enabled. CRC checks will be used to make sure the modifications to scanout " "buffer are detected."); enum test_mode { TEST_PAGE_FLIP, TEST_MMAP_CPU, TEST_MMAP_GTT, TEST_BLT, TEST_RENDER, TEST_CONTEXT, TEST_PAGE_FLIP_AND_MMAP_CPU, TEST_PAGE_FLIP_AND_MMAP_GTT, TEST_PAGE_FLIP_AND_BLT, TEST_PAGE_FLIP_AND_RENDER, TEST_PAGE_FLIP_AND_CONTEXT, }; typedef struct { int drm_fd; igt_crc_t ref_crc[4]; igt_pipe_crc_t *pipe_crc; drm_intel_bufmgr *bufmgr; drm_intel_context *ctx[2]; uint32_t devid; igt_display_t display; igt_output_t *output; enum pipe pipe; igt_plane_t *primary; struct igt_fb fb[2]; } data_t; static const char *test_mode_str(enum test_mode mode) { static const char * const test_modes[] = { [TEST_PAGE_FLIP] = "page_flip", [TEST_MMAP_CPU] = "mmap_cpu", [TEST_MMAP_GTT] = "mmap_gtt", [TEST_BLT] = "blt", [TEST_RENDER] = "render", [TEST_CONTEXT] = "context", [TEST_PAGE_FLIP_AND_MMAP_CPU] = "page_flip_and_mmap_cpu", [TEST_PAGE_FLIP_AND_MMAP_GTT] = "page_flip_and_mmap_gtt", [TEST_PAGE_FLIP_AND_BLT] = "page_flip_and_blt", [TEST_PAGE_FLIP_AND_RENDER] = "page_flip_and_render", [TEST_PAGE_FLIP_AND_CONTEXT] = "page_flip_and_context", }; return test_modes[mode]; } static void fill_blt(data_t *data, uint32_t handle, struct igt_fb *fb, unsigned char color) { drm_intel_bo *dst = gem_handle_to_libdrm_bo(data->bufmgr, data->drm_fd, "", handle); struct intel_batchbuffer *batch; unsigned flags; int pitch; uint32_t pixel = color | (color << 8) | (color << 16) | (color << 24); batch = intel_batchbuffer_alloc(data->bufmgr, data->devid); igt_assert(batch); pitch = fb->stride; flags = XY_COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB; if (fb->tiling && batch->gen >= 4) { flags |= XY_COLOR_BLT_TILED; pitch /= 4; } COLOR_BLIT_COPY_BATCH_START(flags); OUT_BATCH(3 << 24 | 0xf0 << 16 | pitch); OUT_BATCH(0); OUT_BATCH(1 << 16 | 1); OUT_RELOC_FENCED(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(pixel); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); intel_batchbuffer_free(batch); gem_bo_busy(data->drm_fd, handle); } static void scratch_buf_init(struct igt_buf *buf, drm_intel_bo *bo) { buf->bo = bo; buf->stride = 4096; buf->tiling = I915_TILING_X; buf->size = 4096; } static void exec_nop(data_t *data, uint32_t handle, drm_intel_context *context) { drm_intel_bo *dst; struct intel_batchbuffer *batch; dst = gem_handle_to_libdrm_bo(data->bufmgr, data->drm_fd, "", handle); igt_assert(dst); batch = intel_batchbuffer_alloc(data->bufmgr, data->devid); igt_assert(batch); /* add the reloc to make sure the kernel will think we write to dst */ BEGIN_BATCH(4, 1); OUT_BATCH(MI_BATCH_BUFFER_END); OUT_BATCH(MI_NOOP); OUT_RELOC(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(MI_NOOP); ADVANCE_BATCH(); intel_batchbuffer_flush_with_context(batch, context); intel_batchbuffer_free(batch); } static void fill_render(data_t *data, uint32_t handle, drm_intel_context *context, unsigned char color) { drm_intel_bo *src, *dst; struct intel_batchbuffer *batch; struct igt_buf src_buf, dst_buf; const uint8_t buf[4] = { color, color, color, color }; igt_render_copyfunc_t rendercopy = igt_get_render_copyfunc(data->devid); igt_skip_on(!rendercopy); dst = gem_handle_to_libdrm_bo(data->bufmgr, data->drm_fd, "", handle); igt_assert(dst); src = drm_intel_bo_alloc(data->bufmgr, "", 4096, 4096); igt_assert(src); gem_write(data->drm_fd, src->handle, 0, buf, 4); scratch_buf_init(&src_buf, src); scratch_buf_init(&dst_buf, dst); batch = intel_batchbuffer_alloc(data->bufmgr, data->devid); igt_assert(batch); rendercopy(batch, context, &src_buf, 0, 0, 1, 1, &dst_buf, 0, 0); intel_batchbuffer_free(batch); gem_bo_busy(data->drm_fd, handle); } static void fill_mmap_cpu(data_t *data, uint32_t handle, unsigned char color) { void *ptr; ptr = gem_mmap__cpu(data->drm_fd, handle, 0, 4096, PROT_WRITE); gem_set_domain(data->drm_fd, handle, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU); memset(ptr, color, 4); munmap(ptr, 4096); gem_sw_finish(data->drm_fd, handle); } static void fill_mmap_gtt(data_t *data, uint32_t handle, unsigned char color) { void *ptr; ptr = gem_mmap__gtt(data->drm_fd, handle, 4096, PROT_WRITE); gem_set_domain(data->drm_fd, handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); memset(ptr, color, 4); munmap(ptr, 4096); } static bool fbc_enabled(data_t *data) { char str[128] = {}; igt_debugfs_read("i915_fbc_status", str); return strstr(str, "FBC enabled") != NULL; } static bool wait_for_fbc_enabled(data_t *data) { return igt_wait(fbc_enabled(data), 3000, 30); } static void check_crc(data_t *data, enum test_mode mode) { igt_pipe_crc_t *pipe_crc = data->pipe_crc; igt_crc_t crc, *ref_crc; switch (mode) { case TEST_PAGE_FLIP: ref_crc = &data->ref_crc[1]; break; case TEST_MMAP_CPU: case TEST_MMAP_GTT: case TEST_BLT: case TEST_RENDER: case TEST_CONTEXT: ref_crc = &data->ref_crc[2]; break; case TEST_PAGE_FLIP_AND_MMAP_CPU: case TEST_PAGE_FLIP_AND_MMAP_GTT: case TEST_PAGE_FLIP_AND_BLT: case TEST_PAGE_FLIP_AND_RENDER: case TEST_PAGE_FLIP_AND_CONTEXT: ref_crc = &data->ref_crc[3]; break; default: igt_assert(false); } igt_pipe_crc_collect_crc(pipe_crc, &crc); igt_assert_crc_equal(&crc, ref_crc); } static void test_crc(data_t *data, enum test_mode mode) { uint32_t crtc_id = data->output->config.crtc->crtc_id; uint32_t handle = data->fb[0].gem_handle; drm_intel_context *context = NULL; igt_assert(fbc_enabled(data)); if (mode == TEST_PAGE_FLIP || mode >= TEST_PAGE_FLIP_AND_MMAP_CPU) { handle = data->fb[1].gem_handle; igt_assert(drmModePageFlip(data->drm_fd, crtc_id, data->fb[1].fb_id, 0, NULL) == 0); if (mode != TEST_PAGE_FLIP) igt_assert(wait_for_fbc_enabled(data)); } switch (mode) { case TEST_PAGE_FLIP: break; case TEST_MMAP_CPU: case TEST_PAGE_FLIP_AND_MMAP_CPU: fill_mmap_cpu(data, handle, 0xff); break; case TEST_MMAP_GTT: case TEST_PAGE_FLIP_AND_MMAP_GTT: fill_mmap_gtt(data, handle, 0xff); break; case TEST_BLT: case TEST_PAGE_FLIP_AND_BLT: fill_blt(data, handle, data->fb, ~0); break; case TEST_CONTEXT: case TEST_PAGE_FLIP_AND_CONTEXT: context = data->ctx[1]; case TEST_RENDER: case TEST_PAGE_FLIP_AND_RENDER: fill_render(data, handle, context, 0xff); break; } /* * Make sure we're looking at new data (two vblanks * to leave some leeway for the kernel if we ever do * some kind of delayed FBC disable for GTT mmaps. */ igt_wait_for_vblank(data->drm_fd, data->pipe); igt_wait_for_vblank(data->drm_fd, data->pipe); check_crc(data, mode); /* * Allow time for FBC to kick in again if it * got disabled during dirtyfb or page flip. */ igt_assert(wait_for_fbc_enabled(data)); check_crc(data, mode); } static bool prepare_crtc(data_t *data) { igt_display_t *display = &data->display; igt_output_t *output = data->output; /* select the pipe we want to use */ igt_output_set_pipe(output, data->pipe); igt_display_commit(display); if (!output->valid) { igt_output_set_pipe(output, PIPE_ANY); igt_display_commit(display); return false; } return true; } static void create_fbs(data_t *data, bool tiled, struct igt_fb *fbs) { int rc; drmModeModeInfo *mode = igt_output_get_mode(data->output); uint64_t tiling = tiled ? LOCAL_I915_FORMAT_MOD_X_TILED : LOCAL_DRM_FORMAT_MOD_NONE; rc = igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, tiling, 0.0, 0.0, 0.0, &fbs[0]); igt_assert(rc); rc = igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, tiling, 0.1, 0.1, 0.1, &fbs[1]); igt_assert(rc); } /* Since we want to be really safe that the CRCs are actually what we really * want, use untiled FBs, so FBC won't happen to disrupt things. Also do the * drawing before setting the modes, just to be sure. */ static void get_ref_crcs(data_t *data) { igt_display_t *display = &data->display; struct igt_fb fbs[4]; int i; create_fbs(data, false, &fbs[0]); create_fbs(data, false, &fbs[2]); fill_mmap_gtt(data, fbs[2].gem_handle, 0xff); fill_mmap_gtt(data, fbs[3].gem_handle, 0xff); for (i = 0; i < 4; i++) { igt_plane_set_fb(data->primary, &fbs[i]); igt_display_commit(display); igt_wait_for_vblank(data->drm_fd, data->pipe); igt_assert(!fbc_enabled(data)); igt_pipe_crc_collect_crc(data->pipe_crc, &data->ref_crc[i]); igt_assert(!fbc_enabled(data)); } igt_plane_set_fb(data->primary, &data->fb[1]); igt_display_commit(display); for (i = 0; i < 4; i++) igt_remove_fb(data->drm_fd, &fbs[i]); } static bool prepare_test(data_t *data, enum test_mode test_mode) { igt_display_t *display = &data->display; igt_output_t *output = data->output; igt_pipe_crc_t *pipe_crc; data->primary = igt_output_get_plane(data->output, IGT_PLANE_PRIMARY); create_fbs(data, true, data->fb); igt_pipe_crc_free(data->pipe_crc); data->pipe_crc = NULL; pipe_crc = igt_pipe_crc_new(data->pipe, INTEL_PIPE_CRC_SOURCE_AUTO); data->pipe_crc = pipe_crc; get_ref_crcs(data); /* scanout = fb[1] */ igt_plane_set_fb(data->primary, &data->fb[1]); igt_display_commit(display); if (!wait_for_fbc_enabled(data)) { igt_info("FBC not enabled\n"); igt_plane_set_fb(data->primary, NULL); igt_output_set_pipe(output, PIPE_ANY); igt_display_commit(display); igt_remove_fb(data->drm_fd, &data->fb[0]); igt_remove_fb(data->drm_fd, &data->fb[1]); return false; } if (test_mode == TEST_CONTEXT || test_mode == TEST_PAGE_FLIP_AND_CONTEXT) { data->ctx[0] = drm_intel_gem_context_create(data->bufmgr); igt_assert(data->ctx[0]); data->ctx[1] = drm_intel_gem_context_create(data->bufmgr); igt_assert(data->ctx[1]); /* * Disable FBC RT address for both contexts * (by "rendering" to a non-scanout buffer). */ exec_nop(data, data->fb[0].gem_handle, data->ctx[1]); exec_nop(data, data->fb[0].gem_handle, data->ctx[0]); exec_nop(data, data->fb[0].gem_handle, data->ctx[1]); exec_nop(data, data->fb[0].gem_handle, data->ctx[0]); } /* scanout = fb[0] */ igt_plane_set_fb(data->primary, &data->fb[0]); igt_display_commit(display); igt_assert(wait_for_fbc_enabled(data)); if (test_mode == TEST_CONTEXT || test_mode == TEST_PAGE_FLIP_AND_CONTEXT) { /* * make ctx[0] FBC RT address point to fb[0], ctx[1] * FBC RT address is left as disabled. */ exec_nop(data, data->fb[0].gem_handle, data->ctx[0]); igt_assert(wait_for_fbc_enabled(data)); } igt_wait_for_vblank(data->drm_fd, data->pipe); return true; } static void finish_crtc(data_t *data, enum test_mode mode) { igt_pipe_crc_free(data->pipe_crc); data->pipe_crc = NULL; if (mode == TEST_CONTEXT || mode == TEST_PAGE_FLIP_AND_CONTEXT) { drm_intel_gem_context_destroy(data->ctx[0]); drm_intel_gem_context_destroy(data->ctx[1]); } igt_plane_set_fb(data->primary, NULL); igt_output_set_pipe(data->output, PIPE_ANY); igt_display_commit(&data->display); igt_remove_fb(data->drm_fd, &data->fb[0]); igt_remove_fb(data->drm_fd, &data->fb[1]); } static void reset_display(data_t *data) { igt_display_t *display = &data->display; for_each_connected_output(display, data->output) { if (data->output->valid) { data->primary = igt_output_get_plane(data->output, IGT_PLANE_PRIMARY); igt_plane_set_fb(data->primary, NULL); } igt_output_set_pipe(data->output, PIPE_ANY); } } static void run_test(data_t *data, enum test_mode mode) { igt_display_t *display = &data->display; int valid_tests = 0; if (mode == TEST_CONTEXT || mode == TEST_PAGE_FLIP_AND_CONTEXT) { drm_intel_context *ctx = drm_intel_gem_context_create(data->bufmgr); igt_require(ctx); drm_intel_gem_context_destroy(ctx); } reset_display(data); for_each_connected_output(display, data->output) { for_each_pipe(display, data->pipe) { if (!prepare_crtc(data)) continue; igt_info("Beginning %s on pipe %s, connector %s\n", igt_subtest_name(), kmstest_pipe_name(data->pipe), igt_output_name(data->output)); if (!prepare_test(data, mode)) { igt_info("%s on pipe %s, connector %s: SKIPPED\n", igt_subtest_name(), kmstest_pipe_name(data->pipe), igt_output_name(data->output)); continue; } valid_tests++; test_crc(data, mode); igt_info("%s on pipe %s, connector %s: PASSED\n", igt_subtest_name(), kmstest_pipe_name(data->pipe), igt_output_name(data->output)); finish_crtc(data, mode); } } igt_require_f(valid_tests, "no valid crtc/connector combinations found\n"); } igt_main { data_t data = {}; enum test_mode mode; igt_skip_on_simulation(); igt_fixture { char buf[128]; data.drm_fd = drm_open_driver_master(DRIVER_INTEL); kmstest_set_vt_graphics_mode(); data.devid = intel_get_drm_devid(data.drm_fd); igt_require_pipe_crc(); igt_debugfs_read("i915_fbc_status", buf); igt_require_f(!strstr(buf, "unsupported on this chipset"), "FBC not supported\n"); if (intel_gen(data.devid) >= 6) igt_set_module_param_int("enable_fbc", 1); data.bufmgr = drm_intel_bufmgr_gem_init(data.drm_fd, 4096); igt_assert(data.bufmgr); drm_intel_bufmgr_gem_enable_reuse(data.bufmgr); igt_display_init(&data.display, data.drm_fd); } for (mode = TEST_PAGE_FLIP; mode <= TEST_PAGE_FLIP_AND_CONTEXT; mode++) { igt_subtest_f("%s", test_mode_str(mode)) { run_test(&data, mode); } } igt_fixture { drm_intel_bufmgr_destroy(data.bufmgr); igt_display_fini(&data.display); } } intel-gpu-tools-1.14/tests/pass.png0000644000175000017500000000107112665336131014245 00000000000000PNG  IHDR6 pHYsnu>IDATxܱ0\pKp). Js).Ёtv opLFَ",=bX,򕇗p!8L3X,NV/\}aBW6)fGn,{C,Q>6~Zq:L9bl_CS.9X,]c?Knh悕SbZ]CD~3_ğhbZMB`X?KڭX!P=cSjӋb{Y_CXlBybvK+lsne[b;[/ιY9ObCli~حl,VO{ rSSpX,]9CEsbR8=0owO) b{.^+9~Fl/j=?W?vZe{ZbMֲA--c&[|?bl[X,b=Ax+y IENDB`intel-gpu-tools-1.14/tests/testdisplay.h0000644000175000017500000000260012665336131015306 00000000000000/* * Copyright 2010 Intel Corporation * Jesse Barnes * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ #include #include #include #include extern int drm_fd; gboolean testdisplay_setup_hotplug(void); void testdisplay_cleanup_hotplug(void); /* called by the hotplug code */ int update_display(bool probe); intel-gpu-tools-1.14/tests/kms_pipe_crc_basic.c0000644000175000017500000001615012665336131016540 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include "igt.h" #include #include #include #include typedef struct { int drm_fd; igt_display_t display; struct igt_fb fb; } data_t; static struct { double r, g, b; igt_crc_t crc; } colors[2] = { { .r = 0.0, .g = 1.0, .b = 0.0 }, { .r = 0.0, .g = 1.0, .b = 1.0 }, }; static uint64_t submit_batch(int fd, unsigned ring_id) { const uint32_t batch[] = { MI_NOOP, MI_BATCH_BUFFER_END }; struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 exec; uint64_t presumed_offset; gem_require_ring(fd, ring_id); exec.handle = gem_create(fd, 4096); gem_write(fd, exec.handle, 0, batch, sizeof(batch)); exec.relocation_count = 0; exec.relocs_ptr = 0; exec.alignment = 0; exec.offset = 0; exec.flags = 0; exec.rsvd1 = 0; exec.rsvd2 = 0; execbuf.buffers_ptr = (uintptr_t)&exec; execbuf.buffer_count = 1; execbuf.batch_start_offset = 0; execbuf.batch_len = sizeof(batch); execbuf.cliprects_ptr = 0; execbuf.num_cliprects = 0; execbuf.DR1 = 0; execbuf.DR4 = 0; execbuf.flags = ring_id; i915_execbuffer2_set_context_id(execbuf, 0); execbuf.rsvd2 = 0; gem_execbuf(fd, &execbuf); gem_sync(fd, exec.handle); presumed_offset = exec.offset; igt_set_stop_rings(igt_to_stop_ring_flag(ring_id)); gem_execbuf(fd, &execbuf); gem_sync(fd, exec.handle); igt_assert(igt_get_stop_rings() == STOP_RING_NONE); igt_assert(presumed_offset == exec.offset); gem_close(fd, exec.handle); return exec.offset; } static void test_bad_command(data_t *data, const char *cmd) { FILE *ctl; size_t written; ctl = igt_debugfs_fopen("i915_display_crc_ctl", "r+"); written = fwrite(cmd, 1, strlen(cmd), ctl); fflush(ctl); igt_assert_eq(written, strlen(cmd)); igt_assert(ferror(ctl)); igt_assert_eq(errno, EINVAL); fclose(ctl); } #define N_CRCS 3 #define TEST_SEQUENCE (1<<0) #define TEST_NONBLOCK (1<<1) static int test_read_crc_for_output(data_t *data, int pipe, igt_output_t *output, unsigned flags) { igt_display_t *display = &data->display; igt_plane_t *primary; drmModeModeInfo *mode; igt_pipe_crc_t *pipe_crc; igt_crc_t *crcs = NULL; int c, j; for (c = 0; c < ARRAY_SIZE(colors); c++) { char *crc_str; int n_crcs; igt_output_set_pipe(output, pipe); igt_display_commit(display); if (!output->valid) { igt_output_set_pipe(output, PIPE_ANY); return 0; } igt_debug("Clearing the fb with color (%.02lf,%.02lf,%.02lf)\n", colors[c].r, colors[c].g, colors[c].b); mode = igt_output_get_mode(output); igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, colors[c].r, colors[c].g, colors[c].b, &data->fb); primary = igt_output_get_plane(output, 0); igt_plane_set_fb(primary, &data->fb); igt_display_commit(display); if (flags & TEST_NONBLOCK) pipe_crc = igt_pipe_crc_new_nonblock(pipe, INTEL_PIPE_CRC_SOURCE_AUTO); else pipe_crc = igt_pipe_crc_new(pipe, INTEL_PIPE_CRC_SOURCE_AUTO); igt_pipe_crc_start(pipe_crc); /* wait for N_CRCS vblanks and the corresponding N_CRCS CRCs */ if (flags & TEST_NONBLOCK) { int i; for (i = 0; i < N_CRCS; i++) igt_wait_for_vblank(data->drm_fd, pipe); n_crcs = igt_pipe_crc_get_crcs(pipe_crc, N_CRCS * 3, &crcs); /* allow a one frame difference */ igt_assert_lte(n_crcs, N_CRCS + 1); igt_assert_lte(N_CRCS, n_crcs + 1); } else { n_crcs = igt_pipe_crc_get_crcs(pipe_crc, N_CRCS, &crcs); igt_assert_eq(n_crcs, N_CRCS); } igt_pipe_crc_stop(pipe_crc); /* * save the CRC in colors so it can be compared to the CRC of * other fbs */ colors[c].crc = crcs[0]; crc_str = igt_crc_to_string(&crcs[0]); igt_debug("CRC for this fb: %s\n", crc_str); free(crc_str); /* and ensure that they'are all equal, we haven't changed the fb */ for (j = 0; j < (n_crcs - 1); j++) igt_assert_crc_equal(&crcs[j], &crcs[j + 1]); if (flags & TEST_SEQUENCE) for (j = 0; j < (n_crcs - 1); j++) igt_assert_eq(crcs[j].frame + 1, crcs[j + 1].frame); free(crcs); igt_pipe_crc_free(pipe_crc); igt_remove_fb(data->drm_fd, &data->fb); igt_plane_set_fb(primary, NULL); igt_output_set_pipe(output, PIPE_ANY); } return 1; } static void test_read_crc(data_t *data, int pipe, unsigned flags) { igt_display_t *display = &data->display; int valid_connectors = 0; igt_output_t *output; igt_skip_on(pipe >= data->display.n_pipes); for_each_connected_output(display, output) { igt_info("%s: Testing connector %s using pipe %s\n", igt_subtest_name(), igt_output_name(output), kmstest_pipe_name(pipe)); valid_connectors += test_read_crc_for_output(data, pipe, output, flags); } igt_require_f(valid_connectors, "No connector found for pipe %i\n", pipe); } data_t data = {0, }; igt_main { igt_skip_on_simulation(); igt_fixture { data.drm_fd = drm_open_driver_master(DRIVER_INTEL); igt_enable_connectors(); kmstest_set_vt_graphics_mode(); igt_require_pipe_crc(); igt_display_init(&data.display, data.drm_fd); } igt_subtest("bad-pipe") test_bad_command(&data, "pipe D none"); igt_subtest("bad-source") test_bad_command(&data, "pipe A foo"); igt_subtest("bad-nb-words-1") test_bad_command(&data, "pipe foo"); igt_subtest("bad-nb-words-3") test_bad_command(&data, "pipe A none option"); for (int i = 0; i < 3; i++) { igt_subtest_f("read-crc-pipe-%c", 'A'+i) test_read_crc(&data, i, 0); igt_subtest_f("read-crc-pipe-%c-frame-sequence", 'A'+i) test_read_crc(&data, i, TEST_SEQUENCE); igt_subtest_f("nonblocking-crc-pipe-%c", 'A'+i) test_read_crc(&data, i, TEST_NONBLOCK); igt_subtest_f("nonblocking-crc-pipe-%c-frame-sequence", 'A'+i) test_read_crc(&data, i, TEST_SEQUENCE | TEST_NONBLOCK); igt_subtest_f("suspend-read-crc-pipe-%c", 'A'+i) { igt_system_suspend_autoresume(); test_read_crc(&data, i, 0); } igt_subtest_f("hang-read-crc-pipe-%c", 'A'+i) { submit_batch(data.drm_fd, I915_EXEC_RENDER); test_read_crc(&data, i, 0); } } igt_fixture { igt_display_fini(&data.display); } } intel-gpu-tools-1.14/tests/core_prop_blob.c0000644000175000017500000001741312665336131015732 00000000000000/* * Copyright © 2014-2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Damien Lespiau * Daniel Stone */ #include "igt.h" #include #include #include #include IGT_TEST_DESCRIPTION("Tests behaviour of mass-data 'blob' properties."); struct local_drm_mode_get_blob { uint32_t blob_id; uint32_t length; uint64_t data; }; struct local_drm_mode_create_blob { uint64_t data; uint32_t length; uint32_t blob_id; }; struct local_drm_mode_destroy_blob { uint32_t blob_id; }; #define LOCAL_DRM_IOCTL_MODE_GETPROPBLOB DRM_IOWR(0xAC, \ struct local_drm_mode_get_blob) #define LOCAL_DRM_IOCTL_MODE_CREATEPROPBLOB DRM_IOWR(0xBD, \ struct local_drm_mode_create_blob) #define LOCAL_DRM_IOCTL_MODE_DESTROYPROPBLOB DRM_IOWR(0xBE, \ struct local_drm_mode_destroy_blob) static const struct drm_mode_modeinfo test_mode_valid = { .clock = 1234, .hdisplay = 640, .hsync_start = 641, .hsync_end = 642, .htotal = 643, .hskew = 0, .vdisplay = 480, .vsync_start = 481, .vsync_end = 482, .vtotal = 483, .vscan = 0, .vrefresh = 60000, .flags = 0, .type = 0, .name = "FROMUSER", }; #define ioctl_or_ret_errno(fd, ioc, ioc_data) { \ if (drmIoctl(fd, ioc, ioc_data) != 0) \ return errno; \ } static void igt_require_propblob(int fd) { struct local_drm_mode_create_blob c; struct local_drm_mode_destroy_blob d; uint32_t blob_data; c.data = (uintptr_t) &blob_data; c.length = sizeof(blob_data); igt_require(drmIoctl(fd, LOCAL_DRM_IOCTL_MODE_CREATEPROPBLOB, &c) == 0); d.blob_id = c.blob_id; igt_require(drmIoctl(fd, LOCAL_DRM_IOCTL_MODE_DESTROYPROPBLOB, &d) == 0); } static int validate_prop(int fd, uint32_t prop_id) { struct local_drm_mode_get_blob get; struct drm_mode_modeinfo ret_mode; get.blob_id = prop_id; get.length = 0; get.data = (uintptr_t) 0; ioctl_or_ret_errno(fd, LOCAL_DRM_IOCTL_MODE_GETPROPBLOB, &get); if (get.length != sizeof(test_mode_valid)) return ENOMEM; get.data = (uintptr_t) &ret_mode; ioctl_or_ret_errno(fd, LOCAL_DRM_IOCTL_MODE_GETPROPBLOB, &get); if (memcmp(&ret_mode, &test_mode_valid, sizeof(test_mode_valid)) != 0) return EINVAL; return 0; } static uint32_t create_prop(int fd) { struct local_drm_mode_create_blob create; create.length = sizeof(test_mode_valid); create.data = (uintptr_t) &test_mode_valid; do_ioctl(fd, LOCAL_DRM_IOCTL_MODE_CREATEPROPBLOB, &create); igt_assert_neq_u32(create.blob_id, 0); return create.blob_id; } static int destroy_prop(int fd, uint32_t prop_id) { struct local_drm_mode_destroy_blob destroy; destroy.blob_id = prop_id; ioctl_or_ret_errno(fd, LOCAL_DRM_IOCTL_MODE_DESTROYPROPBLOB, &destroy); return 0; } static void test_validate(int fd) { struct local_drm_mode_create_blob create; struct local_drm_mode_get_blob get; char too_small[32]; uint32_t prop_id; memset(too_small, 0, sizeof(too_small)); /* Outlandish size. */ create.length = 0x10000; create.data = (uintptr_t) &too_small; do_ioctl_err(fd, LOCAL_DRM_IOCTL_MODE_CREATEPROPBLOB, &create, EFAULT); /* Outlandish address. */ create.length = sizeof(test_mode_valid); create.data = (uintptr_t) 0xdeadbeee; do_ioctl_err(fd, LOCAL_DRM_IOCTL_MODE_CREATEPROPBLOB, &create, EFAULT); /* When we pass an incorrect size, the kernel should correct us. */ prop_id = create_prop(fd); get.blob_id = prop_id; get.length = sizeof(too_small); get.data = (uintptr_t) too_small; do_ioctl(fd, LOCAL_DRM_IOCTL_MODE_GETPROPBLOB, &get); igt_assert_eq_u32(get.length, sizeof(test_mode_valid)); get.blob_id = prop_id; get.data = (uintptr_t) 0xdeadbeee; do_ioctl_err(fd, LOCAL_DRM_IOCTL_MODE_CREATEPROPBLOB, &create, EFAULT); } static void test_lifetime(int fd) { int fd2; uint32_t prop_id, prop_id2; fd2 = drm_open_driver(DRIVER_ANY); igt_assert_fd(fd2); /* Ensure clients can see properties created by other clients. */ prop_id = create_prop(fd); igt_assert_eq(validate_prop(fd, prop_id), 0); igt_assert_eq(validate_prop(fd2, prop_id), 0); /* ... but can't destroy them. */ igt_assert_eq(destroy_prop(fd2, prop_id), EPERM); /* Make sure properties can't be accessed once explicitly destroyed. */ prop_id2 = create_prop(fd2); igt_assert_eq(validate_prop(fd2, prop_id2), 0); igt_assert_eq(destroy_prop(fd2, prop_id2), 0); igt_assert_eq(validate_prop(fd2, prop_id2), ENOENT); igt_assert_eq(validate_prop(fd, prop_id2), ENOENT); /* Make sure properties are cleaned up on client exit. */ prop_id2 = create_prop(fd2); igt_assert_eq(validate_prop(fd, prop_id2), 0); igt_assert_eq(close(fd2), 0); igt_assert_eq(validate_prop(fd, prop_id2), ENOENT); igt_assert_eq(validate_prop(fd, prop_id), 0); igt_assert_eq(destroy_prop(fd, prop_id), 0); igt_assert_eq(validate_prop(fd, prop_id), ENOENT); } static void test_multiple(int fd) { uint32_t prop_ids[5]; int fd2; int i; fd2 = drm_open_driver(DRIVER_ANY); igt_assert_fd(fd2); /* Ensure destroying multiple properties explicitly works as needed. */ for (i = 0; i < ARRAY_SIZE(prop_ids); i++) { prop_ids[i] = create_prop(fd2); igt_assert_eq(validate_prop(fd, prop_ids[i]), 0); igt_assert_eq(validate_prop(fd2, prop_ids[i]), 0); } for (i = 0; i < ARRAY_SIZE(prop_ids); i++) { igt_assert_eq(destroy_prop(fd2, prop_ids[i]), 0); igt_assert_eq(validate_prop(fd2, prop_ids[i]), ENOENT); } igt_assert_eq(close(fd2), 0); fd2 = drm_open_driver(DRIVER_ANY); igt_assert_fd(fd2); /* Ensure that multiple properties get cleaned up on fd close. */ for (i = 0; i < ARRAY_SIZE(prop_ids); i++) { prop_ids[i] = create_prop(fd2); igt_assert_eq(validate_prop(fd, prop_ids[i]), 0); igt_assert_eq(validate_prop(fd2, prop_ids[i]), 0); } igt_assert_eq(close(fd2), 0); for (i = 0; i < ARRAY_SIZE(prop_ids); i++) igt_assert_eq(validate_prop(fd, prop_ids[i]), ENOENT); } static void test_core(int fd) { uint32_t prop_id; /* The first hurdle. */ prop_id = create_prop(fd); igt_assert_eq(validate_prop(fd, prop_id), 0); igt_assert_eq(destroy_prop(fd, prop_id), 0); /* Look up some invalid property IDs. They should fail. */ igt_assert_eq(validate_prop(fd, 0xffffffff), ENOENT); igt_assert_eq(validate_prop(fd, 0), ENOENT); } static void test_basic(int fd) { uint32_t prop_id; /* A very simple gating test to ensure property support exists. */ prop_id = create_prop(fd); igt_assert_eq(destroy_prop(fd, prop_id), 0); } igt_main { int fd; igt_skip_on_simulation(); igt_fixture { fd = drm_open_driver(DRIVER_ANY); igt_require(fd >= 0); igt_require_propblob(fd); } igt_subtest("basic") test_basic(fd); igt_subtest("blob-prop-core") test_core(fd); igt_subtest("blob-prop-validate") test_validate(fd); igt_subtest("blob-prop-lifetime") test_lifetime(fd); igt_subtest("blob-multiple") test_multiple(fd); igt_fixture close(fd); } intel-gpu-tools-1.14/tests/gem_exec_faulting_reloc.c0000644000175000017500000001452212665336131017573 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include "drm.h" /* Testcase: Submit patches with relocations in memory that will fault * * To be really evil, use a gtt mmap for them. */ IGT_TEST_DESCRIPTION("Submit patches with relocations in memory that will" " fault."); #define OBJECT_SIZE 16384 #define COPY_BLT_CMD_NOLEN (2<<29|0x53<<22) #define BLT_WRITE_ALPHA (1<<21) #define BLT_WRITE_RGB (1<<20) #define BLT_SRC_TILED (1<<15) #define BLT_DST_TILED (1<<11) uint32_t devid; static int gem_linear_blt(uint32_t *batch, uint32_t src, uint32_t dst, uint32_t length, struct drm_i915_gem_relocation_entry *reloc) { uint32_t *b = batch; int height = length / (16 * 1024); igt_assert_lte(height, 1 << 16); if (height) { int i = 0; b[i++] = COPY_BLT_CMD_NOLEN | BLT_WRITE_ALPHA | BLT_WRITE_RGB; if (intel_gen(devid) >= 8) b[i-1] |= 8; else b[i-1] |= 6; b[i++] = 0xcc << 16 | 1 << 25 | 1 << 24 | (16*1024); b[i++] = 0; b[i++] = height << 16 | (4*1024); b[i++] = 0; reloc->offset = (b-batch+4) * sizeof(uint32_t); reloc->delta = 0; reloc->target_handle = dst; reloc->read_domains = I915_GEM_DOMAIN_RENDER; reloc->write_domain = I915_GEM_DOMAIN_RENDER; reloc->presumed_offset = 0; reloc++; if (intel_gen(devid) >= 8) b[i++] = 0; /* FIXME: use real high dword */ b[i++] = 0; b[i++] = 16*1024; b[i++] = 0; reloc->offset = (b-batch+7) * sizeof(uint32_t); if (intel_gen(devid) >= 8) { reloc->offset += sizeof(uint32_t); b[i++] = 0; /* FIXME: use real high dword */ } reloc->delta = 0; reloc->target_handle = src; reloc->read_domains = I915_GEM_DOMAIN_RENDER; reloc->write_domain = 0; reloc->presumed_offset = 0; reloc++; if (intel_gen(devid) >= 8) b += 10; else b += 8; length -= height * 16*1024; } if (length) { int i = 0; b[i++] = COPY_BLT_CMD_NOLEN | BLT_WRITE_ALPHA | BLT_WRITE_RGB; if (intel_gen(devid) >= 8) b[i-1] |= 8; else b[i-1] |= 6; b[i++] = 0xcc << 16 | 1 << 25 | 1 << 24 | (16*1024); b[i++] = height << 16; b[i++] = (1+height) << 16 | (length / 4); b[i++] = 0; reloc->offset = (b-batch+4) * sizeof(uint32_t); reloc->delta = 0; reloc->target_handle = dst; reloc->read_domains = I915_GEM_DOMAIN_RENDER; reloc->write_domain = I915_GEM_DOMAIN_RENDER; reloc->presumed_offset = 0; reloc++; if (intel_gen(devid) >= 8) b[i++] = 0; /* FIXME: use real high dword */ b[i++] = height << 16; b[i++] = 16*1024; b[i++] = 0; reloc->offset = (b-batch+7) * sizeof(uint32_t); if (intel_gen(devid) >= 8) { reloc->offset += sizeof(uint32_t); b[i++] = 0; /* FIXME: use real high dword */ } reloc->delta = 0; reloc->target_handle = src; reloc->read_domains = I915_GEM_DOMAIN_RENDER; reloc->write_domain = 0; reloc->presumed_offset = 0; reloc++; if (intel_gen(devid) >= 8) b += 10; else b += 8; } b[0] = MI_BATCH_BUFFER_END; b[1] = 0; return (b+2 - batch) * sizeof(uint32_t); } static void run(int object_size) { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 exec[3]; struct drm_i915_gem_relocation_entry reloc[4]; uint32_t buf[40]; uint32_t handle, handle_relocs, src, dst; void *gtt_relocs; int fd, len; int ring; fd = drm_open_driver(DRIVER_INTEL); devid = intel_get_drm_devid(fd); handle = gem_create(fd, 4096); src = gem_create(fd, object_size); dst = gem_create(fd, object_size); len = gem_linear_blt(buf, src, dst, object_size, reloc); gem_write(fd, handle, 0, buf, len); exec[0].handle = src; exec[0].relocation_count = 0; exec[0].relocs_ptr = 0; exec[0].alignment = 0; exec[0].offset = 0; exec[0].flags = 0; exec[0].rsvd1 = 0; exec[0].rsvd2 = 0; exec[1].handle = dst; exec[1].relocation_count = 0; exec[1].relocs_ptr = 0; exec[1].alignment = 0; exec[1].offset = 0; exec[1].flags = 0; exec[1].rsvd1 = 0; exec[1].rsvd2 = 0; handle_relocs = gem_create(fd, 4096); gem_write(fd, handle_relocs, 0, reloc, sizeof(reloc)); gtt_relocs = gem_mmap__gtt(fd, handle_relocs, 4096, PROT_READ | PROT_WRITE); exec[2].handle = handle; if (intel_gen(devid) >= 8) exec[2].relocation_count = len > 56 ? 4 : 2; else exec[2].relocation_count = len > 40 ? 4 : 2; /* A newly mmap gtt bo will fault on first access. */ exec[2].relocs_ptr = (uintptr_t)gtt_relocs; exec[2].alignment = 0; exec[2].offset = 0; exec[2].flags = 0; exec[2].rsvd1 = 0; exec[2].rsvd2 = 0; ring = 0; if (HAS_BLT_RING(devid)) ring = I915_EXEC_BLT; execbuf.buffers_ptr = (uintptr_t)exec; execbuf.buffer_count = 3; execbuf.batch_start_offset = 0; execbuf.batch_len = len; execbuf.cliprects_ptr = 0; execbuf.num_cliprects = 0; execbuf.DR1 = 0; execbuf.DR4 = 0; execbuf.flags = ring; i915_execbuffer2_set_context_id(execbuf, 0); execbuf.rsvd2 = 0; gem_execbuf(fd, &execbuf); gem_sync(fd, handle); gem_close(fd, handle); close(fd); } igt_main { igt_subtest("normal") run(OBJECT_SIZE); igt_subtest("no-prefault") { igt_disable_prefault(); run(OBJECT_SIZE); igt_enable_prefault(); } } intel-gpu-tools-1.14/tests/gem_basic.c0000644000175000017500000000433612665336131014655 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include "drm.h" static void test_bad_close(int fd) { struct drm_gem_close close_bo; int ret; igt_info("Testing error return on bad close ioctl.\n"); close_bo.handle = 0x10101010; ret = ioctl(fd, DRM_IOCTL_GEM_CLOSE, &close_bo); igt_assert(ret == -1 && errno == EINVAL); } static void test_create_close(int fd) { uint32_t handle; igt_info("Testing creating and closing an object.\n"); handle = gem_create(fd, 16*1024); gem_close(fd, handle); } static void test_create_fd_close(int fd) { igt_info("Testing closing with an object allocated.\n"); gem_create(fd, 16*1024); /* leak it */ close(fd); } int fd; igt_main { igt_fixture fd = drm_open_driver(DRIVER_INTEL); igt_subtest("bad-close") test_bad_close(fd); igt_subtest("create-close") test_create_close(fd); igt_subtest("create-fd-close") test_create_fd_close(fd); } intel-gpu-tools-1.14/tests/gem_render_linear_blits.c0000644000175000017500000001253212665336131017577 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ /** @file gem_linear_render_blits.c * * This is a test of doing many blits, with a working set * larger than the aperture size. * * The goal is to simply ensure the basics work. */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include "intel_bufmgr.h" #define WIDTH 512 #define STRIDE (WIDTH*4) #define HEIGHT 512 #define SIZE (HEIGHT*STRIDE) static uint32_t linear[WIDTH*HEIGHT]; static igt_render_copyfunc_t render_copy; static void check_bo(int fd, uint32_t handle, uint32_t val) { int i; gem_read(fd, handle, 0, linear, sizeof(linear)); for (i = 0; i < WIDTH*HEIGHT; i++) { igt_assert_f(linear[i] == val, "Expected 0x%08x, found 0x%08x " "at offset 0x%08x\n", val, linear[i], i * 4); val++; } } static void run_test (int fd, int count) { drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; uint32_t *start_val; drm_intel_bo **bo; uint32_t start = 0; int i, j; render_copy = igt_get_render_copyfunc(intel_get_drm_devid(fd)); igt_require(render_copy); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd)); bo = malloc(sizeof(*bo)*count); start_val = malloc(sizeof(*start_val)*count); for (i = 0; i < count; i++) { bo[i] = drm_intel_bo_alloc(bufmgr, "", SIZE, 4096); start_val[i] = start; for (j = 0; j < WIDTH*HEIGHT; j++) linear[j] = start++; gem_write(fd, bo[i]->handle, 0, linear, sizeof(linear)); } igt_info("Verifying initialisation - %d buffers of %d bytes\n", count, SIZE); for (i = 0; i < count; i++) check_bo(fd, bo[i]->handle, start_val[i]); igt_info("Cyclic blits, forward...\n"); for (i = 0; i < count * 4; i++) { struct igt_buf src, dst; src.bo = bo[i % count]; src.stride = STRIDE; src.tiling = I915_TILING_NONE; src.size = SIZE; dst.bo = bo[(i + 1) % count]; dst.stride = STRIDE; dst.tiling = I915_TILING_NONE; dst.size = SIZE; render_copy(batch, NULL, &src, 0, 0, WIDTH, HEIGHT, &dst, 0, 0); start_val[(i + 1) % count] = start_val[i % count]; } for (i = 0; i < count; i++) check_bo(fd, bo[i]->handle, start_val[i]); if (igt_run_in_simulation()) return; igt_info("Cyclic blits, backward...\n"); for (i = 0; i < count * 4; i++) { struct igt_buf src, dst; src.bo = bo[(i + 1) % count]; src.stride = STRIDE; src.tiling = I915_TILING_NONE; src.size = SIZE; dst.bo = bo[i % count]; dst.stride = STRIDE; dst.tiling = I915_TILING_NONE; dst.size = SIZE; render_copy(batch, NULL, &src, 0, 0, WIDTH, HEIGHT, &dst, 0, 0); start_val[i % count] = start_val[(i + 1) % count]; } for (i = 0; i < count; i++) check_bo(fd, bo[i]->handle, start_val[i]); igt_info("Random blits...\n"); for (i = 0; i < count * 4; i++) { struct igt_buf src, dst; int s = random() % count; int d = random() % count; if (s == d) continue; src.bo = bo[s]; src.stride = STRIDE; src.tiling = I915_TILING_NONE; src.size = SIZE; dst.bo = bo[d]; dst.stride = STRIDE; dst.tiling = I915_TILING_NONE; dst.size = SIZE; render_copy(batch, NULL, &src, 0, 0, WIDTH, HEIGHT, &dst, 0, 0); start_val[d] = start_val[s]; } for (i = 0; i < count; i++) check_bo(fd, bo[i]->handle, start_val[i]); /* release resources */ for (i = 0; i < count; i++) { drm_intel_bo_unreference(bo[i]); } intel_batchbuffer_free(batch); drm_intel_bufmgr_destroy(bufmgr); } igt_main { static int fd = 0; int count=0; igt_fixture { fd = drm_open_driver(DRIVER_INTEL); } igt_subtest("basic") { run_test(fd, 2); } /* the rest of the tests are too long for simulation */ igt_skip_on_simulation(); igt_subtest("apperture-thrash") { count = 3 * gem_aperture_size(fd) / SIZE / 2; intel_require_memory(count, SIZE, CHECK_RAM); run_test(fd, count); } igt_subtest("swap-thrash") { uint64_t swap_mb = intel_get_total_swap_mb(); igt_require(swap_mb > 0); count = ((intel_get_avail_ram_mb() + (swap_mb / 2)) * 1024*1024) / SIZE; intel_require_memory(count, SIZE, CHECK_RAM | CHECK_SWAP); run_test(fd, count); } } intel-gpu-tools-1.14/tests/gem_tiled_pread_pwrite.c0000644000175000017500000000750412665336131017442 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * */ /** @file gem_tiled_pread_pwrite.c * * This is a test of pread's behavior on tiled objects with respect to the * reported swizzling value. * * The goal is to exercise the slow_bit17_copy path for reading on bit17 * machines, but will also be useful for catching swizzling value bugs on * other systems. */ /* * Testcase: Test swizzling by testing pwrite does the inverse of pread * * Together with the explicit pread testcase, this should cover our swizzle * handling. * * Note that this test will use swap in an effort to test all of ram. */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include IGT_TEST_DESCRIPTION("Test swizzling by testing pwrite does the inverse of" " pread."); #define WIDTH 512 #define HEIGHT 512 static uint32_t linear[WIDTH * HEIGHT]; static uint32_t current_tiling_mode; #define PAGE_SIZE 4096 static uint32_t create_bo_and_fill(int fd) { uint32_t handle; uint32_t *data; int i; handle = gem_create(fd, sizeof(linear)); gem_set_tiling(fd, handle, current_tiling_mode, WIDTH * sizeof(uint32_t)); /* Fill the BO with dwords starting at start_val */ data = gem_mmap__gtt(fd, handle, sizeof(linear), PROT_READ | PROT_WRITE); for (i = 0; i < WIDTH*HEIGHT; i++) data[i] = i; munmap(data, sizeof(linear)); return handle; } static uint32_t create_bo(int fd) { uint32_t handle; handle = gem_create(fd, sizeof(linear)); gem_set_tiling(fd, handle, current_tiling_mode, WIDTH * sizeof(uint32_t)); return handle; } igt_simple_main { int fd; uint32_t *data; int i, j; uint32_t tiling, swizzle; uint32_t handle, handle_target; int count; fd = drm_open_driver(DRIVER_INTEL); count = SLOW_QUICK(intel_get_total_ram_mb() * 9 / 10, 8) ; for (i = 0; i < count/2; i++) { current_tiling_mode = I915_TILING_X; handle = create_bo_and_fill(fd); gem_get_tiling(fd, handle, &tiling, &swizzle); gem_read(fd, handle, 0, linear, sizeof(linear)); handle_target = create_bo(fd); gem_write(fd, handle_target, 0, linear, sizeof(linear)); /* Check the target bo's contents. */ data = gem_mmap__gtt(fd, handle_target, sizeof(linear), PROT_READ | PROT_WRITE); for (j = 0; j < WIDTH*HEIGHT; j++) igt_assert_f(data[j] == j, "mismatch at %i: %i\n", j, data[j]); munmap(data, sizeof(linear)); /* Leak both bos so that we use all of system mem! */ gem_madvise(fd, handle_target, I915_MADV_DONTNEED); gem_madvise(fd, handle, I915_MADV_DONTNEED); igt_progress("gem_tiled_pread_pwrite: ", i, count/2); } close(fd); } intel-gpu-tools-1.14/tests/gem_fence_thrash.c0000644000175000017500000001407212665336131016223 00000000000000/* * Copyright © 2008-9 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include "drm.h" #define OBJECT_SIZE (128*1024) /* restricted to 1MiB alignment on i915 fences */ /* Before introduction of the LRU list for fences, allocation of a fence for a page * fault would use the first inactive fence (i.e. in preference one with no outstanding * GPU activity, or it would wait on the first to finish). Given the choice, it would simply * reuse the fence that had just been allocated for the previous page-fault - the worst choice * when copying between two buffers and thus constantly swapping fences. */ struct test { int fd; int tiling; int num_surfaces; }; static void * bo_create (int fd, int tiling) { uint32_t handle; void *ptr; handle = gem_create(fd, OBJECT_SIZE); /* dirty cpu caches a bit ... */ ptr = gem_mmap__cpu(fd, handle, 0, OBJECT_SIZE, PROT_READ | PROT_WRITE); memset(ptr, 0, OBJECT_SIZE); munmap(ptr, OBJECT_SIZE); gem_set_tiling(fd, handle, tiling, 1024); ptr = gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_READ | PROT_WRITE); gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); gem_close(fd, handle); return ptr; } static void * bo_copy (void *_arg) { struct test *t = (struct test *)_arg; int fd = t->fd; int n; char *a, *b; a = bo_create (fd, t->tiling); b = bo_create (fd, t->tiling); for (n = 0; n < 1000; n++) { memcpy (a, b, OBJECT_SIZE); sched_yield (); } munmap(a, OBJECT_SIZE); munmap(b, OBJECT_SIZE); return NULL; } static void _bo_write_verify(struct test *t) { int fd = t->fd; int i, k; uint32_t **s; uint32_t v; unsigned int dwords = OBJECT_SIZE >> 2; const char *tile_str[] = { "none", "x", "y" }; igt_assert(t->tiling >= 0 && t->tiling <= I915_TILING_Y); igt_assert_lt(0, t->num_surfaces); s = calloc(sizeof(*s), t->num_surfaces); igt_assert(s); for (k = 0; k < t->num_surfaces; k++) s[k] = bo_create(fd, t->tiling); for (k = 0; k < t->num_surfaces; k++) { volatile uint32_t *a = s[k]; for (i = 0; i < dwords; i++) { a[i] = i; v = a[i]; igt_assert_f(v == i, "tiling %s: write failed at %d (%x)\n", tile_str[t->tiling], i, v); } for (i = 0; i < dwords; i++) { v = a[i]; igt_assert_f(v == i, "tiling %s: verify failed at %d (%x)\n", tile_str[t->tiling], i, v); } } for (k = 0; k < t->num_surfaces; k++) munmap(s[k], OBJECT_SIZE); free(s); } static void * bo_write_verify(void *_arg) { struct test *t = (struct test *)_arg; int i; for (i = 0; i < 10; i++) _bo_write_verify(t); return 0; } static int run_test(int threads_per_fence, void *f, int tiling, int surfaces_per_thread) { struct test t; pthread_t *threads; int n, num_fences, num_threads; t.fd = drm_open_driver(DRIVER_INTEL); t.tiling = tiling; t.num_surfaces = surfaces_per_thread; num_fences = gem_available_fences(t.fd); igt_assert_lt(0, num_fences); num_threads = threads_per_fence * num_fences; igt_info("%s: threads %d, fences %d, tiling %d, surfaces per thread %d\n", f == bo_copy ? "copy" : "write-verify", num_threads, num_fences, tiling, surfaces_per_thread); if (threads_per_fence) { threads = calloc(sizeof(*threads), num_threads); igt_assert(threads != NULL); for (n = 0; n < num_threads; n++) pthread_create (&threads[n], NULL, f, &t); for (n = 0; n < num_threads; n++) pthread_join (threads[n], NULL); free(threads); } else { void *(*func)(void *) = f; igt_assert(func(&t) == (void *)0); } close(t.fd); return 0; } igt_main { igt_skip_on_simulation(); igt_subtest("bo-write-verify-none") igt_assert(run_test(0, bo_write_verify, I915_TILING_NONE, 80) == 0); igt_subtest("bo-write-verify-x") igt_assert(run_test(0, bo_write_verify, I915_TILING_X, 80) == 0); igt_subtest("bo-write-verify-y") igt_assert(run_test(0, bo_write_verify, I915_TILING_Y, 80) == 0); igt_subtest("bo-write-verify-threaded-none") igt_assert(run_test(5, bo_write_verify, I915_TILING_NONE, 2) == 0); igt_subtest("bo-write-verify-threaded-x") { igt_assert(run_test(2, bo_write_verify, I915_TILING_X, 2) == 0); igt_assert(run_test(5, bo_write_verify, I915_TILING_X, 2) == 0); igt_assert(run_test(10, bo_write_verify, I915_TILING_X, 2) == 0); igt_assert(run_test(20, bo_write_verify, I915_TILING_X, 2) == 0); } igt_subtest("bo-write-verify-threaded-y") { igt_assert(run_test(2, bo_write_verify, I915_TILING_Y, 2) == 0); igt_assert(run_test(5, bo_write_verify, I915_TILING_Y, 2) == 0); igt_assert(run_test(10, bo_write_verify, I915_TILING_Y, 2) == 0); igt_assert(run_test(20, bo_write_verify, I915_TILING_Y, 2) == 0); } igt_subtest("bo-copy") igt_assert(run_test(1, bo_copy, I915_TILING_X, 1) == 0); } intel-gpu-tools-1.14/tests/kms_fence_pin_leak.c0000644000175000017500000001430412665336131016534 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include "igt.h" #include #include #include #include #include IGT_TEST_DESCRIPTION("Exercises full ppgtt fence pin_count leak in the " "kernel."); typedef struct { int drm_fd; uint32_t devid; drm_intel_bufmgr *bufmgr; igt_display_t display; drm_intel_bo *bos[64]; /* >= num fence registers */ } data_t; static void exec_nop(data_t *data, uint32_t handle, drm_intel_context *context) { drm_intel_bo *dst; struct intel_batchbuffer *batch; dst = gem_handle_to_libdrm_bo(data->bufmgr, data->drm_fd, "", handle); igt_assert(dst); batch = intel_batchbuffer_alloc(data->bufmgr, data->devid); igt_assert(batch); /* add the reloc to make sure the kernel will think we write to dst */ BEGIN_BATCH(4, 1); OUT_BATCH(MI_BATCH_BUFFER_END); OUT_BATCH(MI_NOOP); OUT_RELOC(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(MI_NOOP); ADVANCE_BATCH(); intel_batchbuffer_flush_with_context(batch, context); intel_batchbuffer_free(batch); drm_intel_bo_unreference(dst); } static void alloc_fence_objs(data_t *data) { int i; for (i = 0; i < ARRAY_SIZE(data->bos); i++) { drm_intel_bo *bo; bo = drm_intel_bo_alloc(data->bufmgr, "fence bo", 4096, 4096); igt_assert(bo); gem_set_tiling(data->drm_fd, bo->handle, I915_TILING_X, 512); data->bos[i] = bo; } } static void touch_fences(data_t *data) { int i; for (i = 0; i < ARRAY_SIZE(data->bos); i++) { uint32_t handle = data->bos[i]->handle; void *ptr; ptr = gem_mmap__gtt(data->drm_fd, handle, 4096, PROT_WRITE); gem_set_domain(data->drm_fd, handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); memset(ptr, 0, 4); munmap(ptr, 4096); } } static void free_fence_objs(data_t *data) { int i; for (i = 0; i < ARRAY_SIZE(data->bos); i++) drm_intel_bo_unreference(data->bos[i]); } static bool run_single_test(data_t *data, enum pipe pipe, igt_output_t *output) { igt_display_t *display = &data->display; drmModeModeInfo *mode; igt_plane_t *primary; struct igt_fb fb[2]; int i; igt_output_set_pipe(output, pipe); igt_display_commit(display); if (!output->valid) { igt_output_set_pipe(output, PIPE_ANY); igt_display_commit(display); return false; } mode = igt_output_get_mode(output); primary = igt_output_get_plane(output, IGT_PLANE_PRIMARY); igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_I915_FORMAT_MOD_X_TILED , /* need a fence so must be tiled */ 0.0, 0.0, 0.0, &fb[0]); igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_I915_FORMAT_MOD_X_TILED, /* need a fence so must be tiled */ 0.0, 0.0, 0.0, &fb[1]); igt_plane_set_fb(primary, &fb[0]); igt_display_commit(display); for (i = 0; i < 64; i++) { drm_intel_context *ctx; /* * Link fb.gem_handle to the ppgtt vm of ctx so that the context * destruction will unbind the obj from the ppgtt vm in question. */ ctx = drm_intel_gem_context_create(data->bufmgr); igt_assert(ctx); exec_nop(data, fb[i&1].gem_handle, ctx); drm_intel_gem_context_destroy(ctx); /* Force a context switch to make sure ctx gets destroyed for real. */ exec_nop(data, fb[i&1].gem_handle, NULL); gem_sync(data->drm_fd, fb[i&1].gem_handle); /* * Make only the current fb has a fence and * the next fb will pick a new fence. Assuming * all fences are associated with an object, the * kernel will always pick a fence with pin_count==0. */ touch_fences(data); /* * Pin the new buffer and unpin the old buffer from display. If * the kernel is buggy the ppgtt unbind will have dropped the * fence for the old buffer, and now the display code will try * to unpin only to find no fence there. So the pin_count will leak. */ igt_plane_set_fb(primary, &fb[!(i&1)]); igt_display_commit(display); igt_print_activity(); } igt_plane_set_fb(primary, NULL); igt_output_set_pipe(output, PIPE_ANY); igt_display_commit(display); igt_remove_fb(data->drm_fd, &fb[1]); igt_remove_fb(data->drm_fd, &fb[0]); igt_info("\n"); return true; } static void run_test(data_t *data) { igt_display_t *display = &data->display; igt_output_t *output; enum pipe p; for_each_connected_output(display, output) { for_each_pipe(display, p) { if (run_single_test(data, p, output)) return; /* one time ought to be enough */ } } igt_skip("no valid crtc/connector combinations found\n"); } igt_simple_main { drm_intel_context *ctx; data_t data = {}; igt_skip_on_simulation(); data.drm_fd = drm_open_driver_master(DRIVER_INTEL); data.devid = intel_get_drm_devid(data.drm_fd); kmstest_set_vt_graphics_mode(); data.bufmgr = drm_intel_bufmgr_gem_init(data.drm_fd, 4096); igt_assert(data.bufmgr); drm_intel_bufmgr_gem_enable_reuse(data.bufmgr); igt_display_init(&data.display, data.drm_fd); ctx = drm_intel_gem_context_create(data.bufmgr); igt_require(ctx); drm_intel_gem_context_destroy(ctx); alloc_fence_objs(&data); run_test(&data); free_fence_objs(&data); drm_intel_bufmgr_destroy(data.bufmgr); igt_display_fini(&data.display); } intel-gpu-tools-1.14/tests/gem_exec_params.c0000644000175000017500000001750112665336131016061 00000000000000/* * Copyright (c) 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include "drm.h" #define LOCAL_I915_EXEC_VEBOX (4<<0) #define LOCAL_I915_EXEC_BSD_MASK (3<<13) #define LOCAL_I915_EXEC_BSD_RING1 (1<<13) #define LOCAL_I915_EXEC_BSD_RING2 (2<<13) #define LOCAL_I915_EXEC_RESOURCE_STREAMER (1<<15) static bool has_ring(int fd, unsigned ring_exec_flags) { switch (ring_exec_flags & I915_EXEC_RING_MASK) { case 0: case I915_EXEC_RENDER: return true; case I915_EXEC_BSD: if (ring_exec_flags & LOCAL_I915_EXEC_BSD_MASK) return gem_has_bsd2(fd); else return gem_has_bsd(fd); case I915_EXEC_BLT: return gem_has_blt(fd); case I915_EXEC_VEBOX: return gem_has_vebox(fd); } igt_assert_f(0, "invalid exec flag 0x%x\n", ring_exec_flags); return false; } struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 gem_exec[1]; uint32_t batch[2] = {MI_BATCH_BUFFER_END}; uint32_t handle, devid; int fd; igt_main { const struct intel_execution_engine *e; igt_fixture { fd = drm_open_driver(DRIVER_INTEL); devid = intel_get_drm_devid(fd); handle = gem_create(fd, 4096); gem_write(fd, handle, 0, batch, sizeof(batch)); gem_exec[0].handle = handle; gem_exec[0].relocation_count = 0; gem_exec[0].relocs_ptr = 0; gem_exec[0].alignment = 0; gem_exec[0].offset = 0; gem_exec[0].flags = 0; gem_exec[0].rsvd1 = 0; gem_exec[0].rsvd2 = 0; execbuf.buffers_ptr = (uintptr_t)gem_exec; execbuf.buffer_count = 1; execbuf.batch_start_offset = 0; execbuf.batch_len = 8; execbuf.cliprects_ptr = 0; execbuf.num_cliprects = 0; execbuf.DR1 = 0; execbuf.DR4 = 0; execbuf.flags = 0; i915_execbuffer2_set_context_id(execbuf, 0); execbuf.rsvd2 = 0; } igt_subtest("control") { for (e = intel_execution_engines; e->name; e++) { if (has_ring(fd, e->exec_id | e->flags)) { execbuf.flags = e->exec_id | e->flags; gem_execbuf(fd, &execbuf); } } } #define RUN_FAIL(expected_errno) do { \ igt_assert(drmIoctl(fd, \ DRM_IOCTL_I915_GEM_EXECBUFFER2, \ &execbuf) == -1); \ igt_assert_eq(errno, expected_errno); \ } while(0) igt_subtest("no-bsd") { igt_require(!gem_has_bsd(fd)); execbuf.flags = I915_EXEC_BSD; RUN_FAIL(EINVAL); } igt_subtest("no-blt") { igt_require(!gem_has_blt(fd)); execbuf.flags = I915_EXEC_BLT; RUN_FAIL(EINVAL); } igt_subtest("no-vebox") { igt_require(!gem_has_vebox(fd)); execbuf.flags = LOCAL_I915_EXEC_VEBOX; RUN_FAIL(EINVAL); } igt_subtest("invalid-ring") { execbuf.flags = I915_EXEC_RING_MASK; RUN_FAIL(EINVAL); } igt_subtest("invalid-ring2") { execbuf.flags = LOCAL_I915_EXEC_VEBOX+1; RUN_FAIL(EINVAL); } igt_subtest("invalid-bsd-ring") { igt_require(gem_has_bsd2(fd)); execbuf.flags = I915_EXEC_BSD | LOCAL_I915_EXEC_BSD_MASK; RUN_FAIL(EINVAL); } igt_subtest("invalid-bsd1-flag-on-render") { execbuf.flags = I915_EXEC_RENDER | LOCAL_I915_EXEC_BSD_RING1; RUN_FAIL(EINVAL); } igt_subtest("invalid-bsd2-flag-on-render") { execbuf.flags = I915_EXEC_RENDER | LOCAL_I915_EXEC_BSD_RING2; RUN_FAIL(EINVAL); } igt_subtest("invalid-bsd1-flag-on-blt") { execbuf.flags = I915_EXEC_BLT | LOCAL_I915_EXEC_BSD_RING1; RUN_FAIL(EINVAL); } igt_subtest("invalid-bsd2-flag-on-blt") { execbuf.flags = I915_EXEC_BLT | LOCAL_I915_EXEC_BSD_RING2; RUN_FAIL(EINVAL); } igt_subtest("invalid-bsd1-flag-on-vebox") { igt_require(gem_has_vebox(fd)); execbuf.flags = LOCAL_I915_EXEC_VEBOX | LOCAL_I915_EXEC_BSD_RING1; RUN_FAIL(EINVAL); } igt_subtest("invalid-bsd2-flag-on-vebox") { igt_require(gem_has_vebox(fd)); execbuf.flags = LOCAL_I915_EXEC_VEBOX | LOCAL_I915_EXEC_BSD_RING2; RUN_FAIL(EINVAL); } igt_subtest("rel-constants-invalid-ring") { igt_require(gem_has_bsd(fd)); execbuf.flags = I915_EXEC_BSD | I915_EXEC_CONSTANTS_ABSOLUTE; RUN_FAIL(EINVAL); } igt_subtest("rel-constants-invalid-rel-gen5") { igt_require(intel_gen(devid) > 5); execbuf.flags = I915_EXEC_RENDER | I915_EXEC_CONSTANTS_REL_SURFACE; RUN_FAIL(EINVAL); } igt_subtest("rel-constants-invalid") { execbuf.flags = I915_EXEC_RENDER | (I915_EXEC_CONSTANTS_REL_SURFACE+(1<<6)); RUN_FAIL(EINVAL); } igt_subtest("sol-reset-invalid") { igt_require(gem_has_bsd(fd)); execbuf.flags = I915_EXEC_BSD | I915_EXEC_GEN7_SOL_RESET; RUN_FAIL(EINVAL); } igt_subtest("sol-reset-not-gen7") { igt_require(intel_gen(devid) != 7); execbuf.flags = I915_EXEC_RENDER | I915_EXEC_GEN7_SOL_RESET; RUN_FAIL(EINVAL); } igt_subtest("secure-non-root") { igt_fork(child, 1) { igt_drop_root(); execbuf.flags = I915_EXEC_RENDER | I915_EXEC_SECURE; RUN_FAIL(EPERM); } igt_waitchildren(); } igt_subtest("secure-non-master") { do_or_die(drmDropMaster(fd)); execbuf.flags = I915_EXEC_RENDER | I915_EXEC_SECURE; RUN_FAIL(EPERM); do_or_die(drmSetMaster(fd)); igt_assert(drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf) == 0); } /* HANDLE_LUT and NO_RELOC are already exercised by gem_exec_lut_handle */ igt_subtest("invalid-flag") { /* NOTE: This test intentionally exercise the next available * flag. Don't "fix" this testcase without adding the required * tests for the new flag first. */ execbuf.flags = I915_EXEC_RENDER | (LOCAL_I915_EXEC_RESOURCE_STREAMER << 1); RUN_FAIL(EINVAL); } /* rsvd1 aka context id is already exercised by gem_ctx_bad_exec */ igt_subtest("cliprects-invalid") { igt_require(intel_gen(devid) >= 5); execbuf.flags = 0; execbuf.num_cliprects = 1; RUN_FAIL(EINVAL); execbuf.num_cliprects = 0; } igt_subtest("rs-invalid-on-bsd-ring") { igt_require(IS_HASWELL(devid) || intel_gen(devid) >= 8); execbuf.flags = I915_EXEC_BSD | LOCAL_I915_EXEC_RESOURCE_STREAMER; RUN_FAIL(EINVAL); } igt_subtest("rs-invalid-on-blt-ring") { igt_require(IS_HASWELL(devid) || intel_gen(devid) >= 8); execbuf.flags = I915_EXEC_BLT | LOCAL_I915_EXEC_RESOURCE_STREAMER; RUN_FAIL(EINVAL); } igt_subtest("rs-invalid-on-vebox-ring") { igt_require(IS_HASWELL(devid) || intel_gen(devid) >= 8); execbuf.flags = I915_EXEC_VEBOX | LOCAL_I915_EXEC_RESOURCE_STREAMER; RUN_FAIL(EINVAL); } igt_subtest("rs-invalid-gen") { igt_require(!IS_HASWELL(devid) && intel_gen(devid) < 8); execbuf.flags = I915_EXEC_RENDER | LOCAL_I915_EXEC_RESOURCE_STREAMER; RUN_FAIL(EINVAL); } #define DIRT(name) \ igt_subtest(#name "-dirt") { \ execbuf.flags = 0; \ execbuf.name = 1; \ RUN_FAIL(EINVAL); \ execbuf.name = 0; \ } DIRT(rsvd2); DIRT(cliprects_ptr); DIRT(DR1); DIRT(DR4); #undef DIRT #undef RUN_FAIL igt_fixture { gem_close(fd, handle); close(fd); } } intel-gpu-tools-1.14/tests/core_getstats.c0000644000175000017500000000322512665336131015606 00000000000000/* * Copyright © 2007 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * */ #include "igt.h" #include #include #include #include /** * Checks DRM_IOCTL_GET_STATS. * * I don't care too much about the actual contents, just that the kernel * doesn't crash. */ IGT_TEST_DESCRIPTION("Tests the DRM_IOCTL_GET_STATS ioctl."); igt_simple_main { int fd, ret; drm_stats_t stats; fd = drm_open_driver(DRIVER_ANY); ret = ioctl(fd, DRM_IOCTL_GET_STATS, &stats); igt_assert(ret == 0); close(fd); } intel-gpu-tools-1.14/tests/gem_pread_after_blit.c0000644000175000017500000001510212665336131017053 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * */ /** @file gem_pread_after_blit.c * * This is a test of pread's behavior when getting values out of just-drawn-to * buffers. * * The goal is to catch failure in the whole-buffer-flush or * ranged-buffer-flush paths in the kernel. */ #include "igt.h" #include #include #include #include #include #include #include #include #include IGT_TEST_DESCRIPTION("Test pread behavior when getting values out of" " just-drawn-to buffers."); static drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; static const int width = 512, height = 512; static const int size = 1024 * 1024; #define PAGE_SIZE 4096 static drm_intel_bo * create_bo(uint32_t val) { drm_intel_bo *bo; uint32_t *vaddr; int i; bo = drm_intel_bo_alloc(bufmgr, "src bo", size, 4096); /* Fill the BO with dwords starting at start_val */ drm_intel_bo_map(bo, 1); vaddr = bo->virtual; for (i = 0; i < 1024 * 1024 / 4; i++) vaddr[i] = val++; drm_intel_bo_unmap(bo); return bo; } static void verify_large_read(drm_intel_bo *bo, uint32_t val) { uint32_t buf[size / 4]; int i; drm_intel_bo_get_subdata(bo, 0, size, buf); for (i = 0; i < size / 4; i++) { igt_assert_f(buf[i] == val, "Unexpected value 0x%08x instead of " "0x%08x at offset 0x%08x (%p)\n", buf[i], val, i * 4, buf); val++; } } /** This reads at the size that Mesa usees for software fallbacks. */ static void verify_small_read(drm_intel_bo *bo, uint32_t val) { uint32_t buf[4096 / 4]; int offset, i; for (i = 0; i < 4096 / 4; i++) buf[i] = 0x00c0ffee; for (offset = 0; offset < size; offset += PAGE_SIZE) { drm_intel_bo_get_subdata(bo, offset, PAGE_SIZE, buf); for (i = 0; i < PAGE_SIZE; i += 4) { igt_assert_f(buf[i / 4] == val, "Unexpected value 0x%08x instead of " "0x%08x at offset 0x%08x\n", buf[i / 4], val, i * 4); val++; } } } typedef struct igt_hang_ring (*do_hang)(int fd); static struct igt_hang_ring no_hang(int fd) { return (struct igt_hang_ring){0}; } static struct igt_hang_ring bcs_hang(int fd) { return igt_hang_ring(fd, batch->gen >= 6 ? I915_EXEC_BLT : I915_EXEC_DEFAULT); } static void do_test(int fd, int cache_level, drm_intel_bo *src[2], const uint32_t start[2], drm_intel_bo *tmp[2], int loop, do_hang do_hang_func) { struct igt_hang_ring hang; if (cache_level != -1) { gem_set_caching(fd, tmp[0]->handle, cache_level); gem_set_caching(fd, tmp[1]->handle, cache_level); } do { /* First, do a full-buffer read after blitting */ intel_copy_bo(batch, tmp[0], src[0], width*height*4); hang = do_hang_func(fd); verify_large_read(tmp[0], start[0]); igt_post_hang_ring(fd, hang); intel_copy_bo(batch, tmp[0], src[1], width*height*4); hang = do_hang_func(fd); verify_large_read(tmp[0], start[1]); igt_post_hang_ring(fd, hang); intel_copy_bo(batch, tmp[0], src[0], width*height*4); hang = do_hang_func(fd); verify_small_read(tmp[0], start[0]); igt_post_hang_ring(fd, hang); intel_copy_bo(batch, tmp[0], src[1], width*height*4); hang = do_hang_func(fd); verify_small_read(tmp[0], start[1]); igt_post_hang_ring(fd, hang); intel_copy_bo(batch, tmp[0], src[0], width*height*4); hang = do_hang_func(fd); verify_large_read(tmp[0], start[0]); igt_post_hang_ring(fd, hang); intel_copy_bo(batch, tmp[0], src[0], width*height*4); intel_copy_bo(batch, tmp[1], src[1], width*height*4); hang = do_hang_func(fd); verify_large_read(tmp[0], start[0]); verify_large_read(tmp[1], start[1]); igt_post_hang_ring(fd, hang); intel_copy_bo(batch, tmp[0], src[0], width*height*4); intel_copy_bo(batch, tmp[1], src[1], width*height*4); hang = do_hang_func(fd); verify_large_read(tmp[1], start[1]); verify_large_read(tmp[0], start[0]); igt_post_hang_ring(fd, hang); intel_copy_bo(batch, tmp[1], src[0], width*height*4); intel_copy_bo(batch, tmp[0], src[1], width*height*4); hang = do_hang_func(fd); verify_large_read(tmp[0], start[1]); verify_large_read(tmp[1], start[0]); igt_post_hang_ring(fd, hang); } while (--loop); } drm_intel_bo *src[2], *dst[2]; int fd; igt_main { const uint32_t start[2] = {0, 1024 * 1024 / 4}; const struct { const char *name; int cache; } tests[] = { { "default", -1 }, { "uncached", 0 }, { "snooped", 1 }, { "display", 2 }, { NULL, -1 }, }, *t; igt_skip_on_simulation(); igt_fixture { fd = drm_open_driver(DRIVER_INTEL); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); drm_intel_bufmgr_gem_enable_reuse(bufmgr); batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd)); src[0] = create_bo(start[0]); src[1] = create_bo(start[1]); dst[0] = drm_intel_bo_alloc(bufmgr, "dst bo", size, 4096); dst[1] = drm_intel_bo_alloc(bufmgr, "dst bo", size, 4096); } for (t = tests; t->name; t++) { igt_subtest_f("%s-normal", t->name) do_test(fd, t->cache, src, start, dst, 1, no_hang); igt_fork_signal_helper(); igt_subtest_f("%s-interruptible", t->name) do_test(fd, t->cache, src, start, dst, 100, no_hang); igt_stop_signal_helper(); igt_subtest_f("%s-hang", t->name) do_test(fd, t->cache, src, start, dst, 1, bcs_hang); } igt_fixture { drm_intel_bo_unreference(src[0]); drm_intel_bo_unreference(src[1]); drm_intel_bo_unreference(dst[0]); drm_intel_bo_unreference(dst[1]); intel_batchbuffer_free(batch); drm_intel_bufmgr_destroy(bufmgr); } close(fd); } intel-gpu-tools-1.14/tests/gem_evict_everything.c0000644000175000017500000001607012665336131017150 00000000000000/* * Copyright © 2011,2012,2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * Daniel Vetter * */ /* * Testcase: run a couple of big batches to force the eviction code. */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include "drm.h" #include "eviction_common.c" IGT_TEST_DESCRIPTION("Run a couple of big batches to force the eviction" " code."); #define HEIGHT 256 #define WIDTH 1024 static int copy(int fd, uint32_t dst, uint32_t src, uint32_t *all_bo, int n_bo) { uint32_t batch[12]; struct drm_i915_gem_relocation_entry reloc[2]; struct drm_i915_gem_exec_object2 *obj; struct drm_i915_gem_execbuffer2 exec; uint32_t handle; int n, ret, i=0; batch[i++] = (XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA | XY_SRC_COPY_BLT_WRITE_RGB | 6); if (intel_gen(intel_get_drm_devid(fd)) >= 8) batch[i - 1] += 2; batch[i++] = (3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ WIDTH*4; batch[i++] = 0; /* dst x1,y1 */ batch[i++] = (HEIGHT << 16) | WIDTH; /* dst x2,y2 */ batch[i++] = 0; /* dst reloc */ if (intel_gen(intel_get_drm_devid(fd)) >= 8) batch[i++] = 0; /* FIXME */ batch[i++] = 0; /* src x1,y1 */ batch[i++] = WIDTH*4; batch[i++] = 0; /* src reloc */ if (intel_gen(intel_get_drm_devid(fd)) >= 8) batch[i++] = 0; /* FIXME */ batch[i++] = MI_BATCH_BUFFER_END; batch[i++] = MI_NOOP; handle = gem_create(fd, 4096); gem_write(fd, handle, 0, batch, sizeof(batch)); reloc[0].target_handle = dst; reloc[0].delta = 0; reloc[0].offset = 4 * sizeof(batch[0]); reloc[0].presumed_offset = 0; reloc[0].read_domains = I915_GEM_DOMAIN_RENDER; reloc[0].write_domain = I915_GEM_DOMAIN_RENDER; reloc[1].target_handle = src; reloc[1].delta = 0; reloc[1].offset = 7 * sizeof(batch[0]); if (intel_gen(intel_get_drm_devid(fd)) >= 8) reloc[1].offset += sizeof(batch[0]); reloc[1].presumed_offset = 0; reloc[1].read_domains = I915_GEM_DOMAIN_RENDER; reloc[1].write_domain = 0; obj = calloc(n_bo + 1, sizeof(*obj)); for (n = 0; n < n_bo; n++) obj[n].handle = all_bo[n]; obj[n].handle = handle; obj[n].relocation_count = 2; obj[n].relocs_ptr = (uintptr_t)reloc; exec.buffers_ptr = (uintptr_t)obj; exec.buffer_count = n_bo + 1; exec.batch_start_offset = 0; exec.batch_len = i * 4; exec.DR1 = exec.DR4 = 0; exec.num_cliprects = 0; exec.cliprects_ptr = 0; exec.flags = HAS_BLT_RING(intel_get_drm_devid(fd)) ? I915_EXEC_BLT : 0; i915_execbuffer2_set_context_id(exec, 0); exec.rsvd2 = 0; ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &exec); if (ret) ret = errno; gem_close(fd, handle); free(obj); return ret; } static void clear(int fd, uint32_t handle, uint64_t size) { void *base = gem_mmap__cpu(fd, handle, 0, size, PROT_WRITE); memset(base, 0, size); munmap(base, size); } static struct igt_eviction_test_ops fault_ops = { .create = gem_create, .close = gem_close, .copy = copy, .clear = clear, }; static void test_forking_evictions(int fd, int size, int count, unsigned flags) { int trash_count; trash_count = intel_get_total_ram_mb() * 11 / 10; intel_require_memory(trash_count, size, CHECK_RAM | CHECK_SWAP); forking_evictions(fd, &fault_ops, size, count, trash_count, flags); } static void test_mlocked_evictions(int fd, int size, int count) { mlocked_evictions(fd, &fault_ops, size, count); } static void test_swapping_evictions(int fd, int size, int count) { int trash_count; trash_count = intel_get_total_ram_mb() * 11 / 10; intel_require_memory(trash_count, size, CHECK_RAM | CHECK_SWAP); swapping_evictions(fd, &fault_ops, size, count, trash_count); } static void test_minor_evictions(int fd, int size, int count) { minor_evictions(fd, &fault_ops, size, count); } static void test_major_evictions(int fd, int size, int count) { major_evictions(fd, &fault_ops, size, count); } igt_main { uint64_t size, count; int fd; size = count = 0; fd = -1; igt_fixture { fd = drm_open_driver(DRIVER_INTEL); size = 1024 * 1024; count = 3*gem_aperture_size(fd) / size / 4; } for (unsigned flags = 0; flags < ALL_FORKING_EVICTIONS + 1; flags++) { igt_subtest_f("forked%s%s%s-%s", flags & FORKING_EVICTIONS_SWAPPING ? "-swapping" : "", flags & FORKING_EVICTIONS_DUP_DRMFD ? "-multifd" : "", flags & FORKING_EVICTIONS_MEMORY_PRESSURE ? "-mempressure" : "", flags & FORKING_EVICTIONS_INTERRUPTIBLE ? "interruptible" : "normal") { test_forking_evictions(fd, size, count, flags); } } igt_subtest("mlocked-normal") test_mlocked_evictions(fd, size, count); igt_subtest("swapping-normal") test_swapping_evictions(fd, size, count); igt_subtest("minor-normal") test_minor_evictions(fd, size, count); igt_subtest("major-normal") { size = 3*gem_aperture_size(fd) / 4; count = 4; test_major_evictions(fd, size, count); } igt_fixture { size = 1024 * 1024; count = 3*gem_aperture_size(fd) / size / 4; } igt_fork_signal_helper(); igt_subtest("mlocked-interruptible") test_mlocked_evictions(fd, size, count); igt_subtest("swapping-interruptible") test_swapping_evictions(fd, size, count); igt_subtest("minor-interruptible") test_minor_evictions(fd, size, count); igt_subtest("major-interruptible") { size = 3*gem_aperture_size(fd) / 4; count = 4; test_major_evictions(fd, size, count); } igt_fixture { igt_fork_hang_helper(); size = 1024 * 1024; count = 3*gem_aperture_size(fd) / size / 4; } igt_subtest("mlocked-hang") test_mlocked_evictions(fd, size, count); igt_subtest("swapping-hang") test_swapping_evictions(fd, size, count); igt_subtest("minor-hang") test_minor_evictions(fd, size, count); igt_subtest("major-hang") { size = 3*gem_aperture_size(fd) / 4; count = 4; test_major_evictions(fd, size, count); } igt_stop_hang_helper(); igt_fixture { igt_stop_signal_helper(); close(fd); } } intel-gpu-tools-1.14/tests/kms_flip_tiling.c0000644000175000017500000002020212665336131016104 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Ander Conselvan de Oliveira */ #include "igt.h" #include #include #include #include IGT_TEST_DESCRIPTION("Test page flips and tiling scenarios"); typedef struct { int drm_fd; igt_display_t display; int gen; } data_t; static igt_pipe_crc_t *_pipe_crc; static igt_pipe_crc_t *pipe_crc_new(int pipe) { if (_pipe_crc) { igt_pipe_crc_free(_pipe_crc); _pipe_crc = NULL; } _pipe_crc = igt_pipe_crc_new(pipe, INTEL_PIPE_CRC_SOURCE_AUTO); igt_assert(_pipe_crc); return _pipe_crc; } static void pipe_crc_free(void) { if (_pipe_crc) { igt_pipe_crc_free(_pipe_crc); _pipe_crc = NULL; } } static void wait_for_pageflip(int fd) { drmEventContext evctx = { .version = DRM_EVENT_CONTEXT_VERSION }; struct timeval timeout = { .tv_sec = 0, .tv_usec = 50000 }; fd_set fds; int ret; /* Wait for pageflip completion, then consume event on fd */ FD_ZERO(&fds); FD_SET(fd, &fds); do { ret = select(fd + 1, &fds, NULL, NULL, &timeout); } while (ret < 0 && errno == EINTR); igt_assert_eq(ret, 1); igt_assert(drmHandleEvent(fd, &evctx) == 0); } static void test_flip_tiling(data_t *data, igt_output_t *output, uint64_t tiling[2]) { drmModeModeInfo *mode; igt_plane_t *primary; struct igt_fb fb[2]; igt_pipe_crc_t *pipe_crc; igt_crc_t reference_crc, crc; int fb_id, pipe, ret, width; pipe = output->config.pipe; pipe_crc = pipe_crc_new(pipe); igt_output_set_pipe(output, pipe); mode = igt_output_get_mode(output); primary = igt_output_get_plane(output, 0); width = mode->hdisplay; if (tiling[0] != tiling[1] && (tiling[0] != LOCAL_DRM_FORMAT_MOD_NONE || tiling[1] != LOCAL_DRM_FORMAT_MOD_NONE)) { /* * Since a page flip to a buffer with different stride * doesn't work, choose width so that the stride of both * buffers is the same. */ width = 512; while (width < mode->hdisplay) width *= 2; } fb_id = igt_create_pattern_fb(data->drm_fd, width, mode->vdisplay, DRM_FORMAT_XRGB8888, tiling[0], &fb[0]); igt_assert(fb_id); /* Second fb has different background so CRC does not match. */ fb_id = igt_create_color_pattern_fb(data->drm_fd, width, mode->vdisplay, DRM_FORMAT_XRGB8888, tiling[1], 0.5, 0.5, 0.5, &fb[1]); igt_assert(fb_id); /* Set the crtc and generate a reference CRC. */ igt_plane_set_fb(primary, &fb[1]); igt_display_commit(&data->display); igt_pipe_crc_collect_crc(pipe_crc, &reference_crc); /* Commit the first fb. */ igt_plane_set_fb(primary, &fb[0]); igt_display_commit(&data->display); /* Flip to the second fb. */ ret = drmModePageFlip(data->drm_fd, output->config.crtc->crtc_id, fb[1].fb_id, DRM_MODE_PAGE_FLIP_EVENT, NULL); /* * Page flip should work but some transitions may be temporarily * on some kernels. */ igt_require(ret == 0); wait_for_pageflip(data->drm_fd); /* Get a crc and compare with the reference. */ igt_pipe_crc_collect_crc(pipe_crc, &crc); igt_assert_crc_equal(&reference_crc, &crc); /* Clean up. */ igt_plane_set_fb(primary, NULL); pipe_crc_free(); igt_output_set_pipe(output, PIPE_ANY); igt_display_commit(&data->display); igt_remove_fb(data->drm_fd, &fb[0]); igt_remove_fb(data->drm_fd, &fb[1]); } static data_t data; igt_output_t *output; igt_main { igt_skip_on_simulation(); igt_fixture { data.drm_fd = drm_open_driver_master(DRIVER_INTEL); data.gen = intel_gen(intel_get_drm_devid(data.drm_fd)); kmstest_set_vt_graphics_mode(); igt_require_pipe_crc(); igt_display_init(&data.display, data.drm_fd); } /* * Test that a page flip from a tiled buffer to a linear one works * correctly. First, it sets the crtc with the linear buffer and * generates a reference crc for the pipe. Then, the crtc is set with * the tiled one and page flip to the linear one issued. A new crc is * generated and compared to the reference one. */ igt_subtest_f("flip-changes-tiling") { uint64_t tiling[2] = { LOCAL_I915_FORMAT_MOD_X_TILED, LOCAL_DRM_FORMAT_MOD_NONE }; for_each_connected_output(&data.display, output) test_flip_tiling(&data, output, tiling); } igt_subtest_f("flip-changes-tiling-Y") { uint64_t tiling[2] = { LOCAL_I915_FORMAT_MOD_Y_TILED, LOCAL_DRM_FORMAT_MOD_NONE }; igt_require_fb_modifiers(data.drm_fd); igt_require(data.gen >= 9); for_each_connected_output(&data.display, output) test_flip_tiling(&data, output, tiling); } igt_subtest_f("flip-changes-tiling-Yf") { uint64_t tiling[2] = { LOCAL_I915_FORMAT_MOD_Yf_TILED, LOCAL_DRM_FORMAT_MOD_NONE }; igt_require_fb_modifiers(data.drm_fd); igt_require(data.gen >= 9); for_each_connected_output(&data.display, output) test_flip_tiling(&data, output, tiling); } /* * Test that a page flip from a tiled buffer to another tiled one works * correctly. First, it sets the crtc with the tiled buffer and * generates a reference crc for the pipe. Then a page flip to second * tiled buffer is issued. A new crc is generated and compared to the * reference one. */ igt_subtest_f("flip-X-tiled") { uint64_t tiling[2] = { LOCAL_I915_FORMAT_MOD_X_TILED, LOCAL_I915_FORMAT_MOD_X_TILED }; for_each_connected_output(&data.display, output) test_flip_tiling(&data, output, tiling); } igt_subtest_f("flip-Y-tiled") { uint64_t tiling[2] = { LOCAL_I915_FORMAT_MOD_Y_TILED, LOCAL_I915_FORMAT_MOD_Y_TILED }; igt_require_fb_modifiers(data.drm_fd); igt_require(data.gen >= 9); for_each_connected_output(&data.display, output) test_flip_tiling(&data, output, tiling); } igt_subtest_f("flip-Yf-tiled") { uint64_t tiling[2] = { LOCAL_I915_FORMAT_MOD_Yf_TILED, LOCAL_I915_FORMAT_MOD_Yf_TILED }; igt_require_fb_modifiers(data.drm_fd); igt_require(data.gen >= 9); for_each_connected_output(&data.display, output) test_flip_tiling(&data, output, tiling); } /* * Test that a page flip from a linear buffer to a tiled one works * correctly. First, it sets the crtc with the linear buffer and * generates a reference crc for the pipe. Then a page flip to a tiled * buffer is issued. A new crc is generated and compared to the * reference one. */ igt_subtest_f("flip-to-X-tiled") { uint64_t tiling[2] = { LOCAL_DRM_FORMAT_MOD_NONE, LOCAL_I915_FORMAT_MOD_X_TILED }; for_each_connected_output(&data.display, output) test_flip_tiling(&data, output, tiling); } igt_subtest_f("flip-to-Y-tiled") { uint64_t tiling[2] = { LOCAL_DRM_FORMAT_MOD_NONE, LOCAL_I915_FORMAT_MOD_Y_TILED }; igt_require_fb_modifiers(data.drm_fd); igt_require(data.gen >= 9); for_each_connected_output(&data.display, output) test_flip_tiling(&data, output, tiling); } igt_subtest_f("flip-to-Yf-tiled") { uint64_t tiling[2] = { LOCAL_DRM_FORMAT_MOD_NONE, LOCAL_I915_FORMAT_MOD_Yf_TILED }; igt_require_fb_modifiers(data.drm_fd); igt_require(data.gen >= 9); for_each_connected_output(&data.display, output) test_flip_tiling(&data, output, tiling); } igt_fixture { igt_display_fini(&data.display); } } intel-gpu-tools-1.14/tests/kms_cursor_crc.c0000644000175000017500000004537212665336131015767 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include "igt.h" #include #include #include #include #include IGT_TEST_DESCRIPTION( "Use the display CRC support to validate cursor plane functionality. " "The test will position the cursor plane either fully onscreen, " "partially onscreen, or fully offscreen, using either a fully opaque " "or fully transparent surface. In each case it then reads the PF CRC " "and compares it with the CRC value obtained when the cursor plane " "was disabled."); #ifndef DRM_CAP_CURSOR_WIDTH #define DRM_CAP_CURSOR_WIDTH 0x8 #endif #ifndef DRM_CAP_CURSOR_HEIGHT #define DRM_CAP_CURSOR_HEIGHT 0x9 #endif typedef struct { int drm_fd; igt_display_t display; struct igt_fb primary_fb; struct igt_fb fb; igt_output_t *output; enum pipe pipe; igt_crc_t ref_crc; int left, right, top, bottom; int screenw, screenh; int refresh; int curw, curh; /* cursor size */ int cursor_max_w, cursor_max_h; igt_pipe_crc_t *pipe_crc; uint32_t devid; unsigned flags; } data_t; #define TEST_DPMS (1<<0) #define TEST_SUSPEND (1<<1) static void draw_cursor(cairo_t *cr, int x, int y, int cw, int ch) { int wl, wr, ht, hb; /* deal with odd cursor width/height */ wl = cw / 2; wr = (cw + 1) / 2; ht = ch / 2; hb = (ch + 1) / 2; /* Cairo doesn't like to be fed numbers that are too wild */ if ((x < SHRT_MIN) || (x > SHRT_MAX) || (y < SHRT_MIN) || (y > SHRT_MAX)) return; cairo_set_antialias(cr, CAIRO_ANTIALIAS_NONE); /* 4 color rectangles in the corners, RGBY */ igt_paint_color_alpha(cr, x, y, wl, ht, 1.0, 0.0, 0.0, 1.0); igt_paint_color_alpha(cr, x + wl, y, wr, ht, 0.0, 1.0, 0.0, 1.0); igt_paint_color_alpha(cr, x, y + ht, wl, hb, 0.0, 0.0, 1.0, 1.0); igt_paint_color_alpha(cr, x + wl, y + ht, wr, hb, 0.5, 0.5, 0.5, 1.0); } static void cursor_enable(data_t *data) { igt_output_t *output = data->output; igt_plane_t *cursor; cursor = igt_output_get_plane(output, IGT_PLANE_CURSOR); igt_plane_set_fb(cursor, &data->fb); igt_plane_set_size(cursor, data->curw, data->curh); } static void cursor_disable(data_t *data) { igt_output_t *output = data->output; igt_plane_t *cursor; cursor = igt_output_get_plane(output, IGT_PLANE_CURSOR); igt_plane_set_fb(cursor, NULL); } static void do_single_test(data_t *data, int x, int y) { igt_display_t *display = &data->display; igt_pipe_crc_t *pipe_crc = data->pipe_crc; igt_crc_t crc, ref_crc; igt_plane_t *cursor; cairo_t *cr = igt_get_cairo_ctx(data->drm_fd, &data->primary_fb); igt_print_activity(); /* Hardware test */ igt_paint_test_pattern(cr, data->screenw, data->screenh); cursor_enable(data); cursor = igt_output_get_plane(data->output, IGT_PLANE_CURSOR); igt_plane_set_position(cursor, x, y); igt_display_commit(display); igt_wait_for_vblank(data->drm_fd, data->pipe); igt_pipe_crc_collect_crc(pipe_crc, &crc); if (data->flags & (TEST_DPMS | TEST_SUSPEND)) { igt_crc_t crc_after; if (data->flags & TEST_DPMS) { igt_debug("dpms off/on cycle\n"); kmstest_set_connector_dpms(data->drm_fd, data->output->config.connector, DRM_MODE_DPMS_OFF); kmstest_set_connector_dpms(data->drm_fd, data->output->config.connector, DRM_MODE_DPMS_ON); } if (data->flags & TEST_SUSPEND) igt_system_suspend_autoresume(); igt_pipe_crc_collect_crc(pipe_crc, &crc_after); igt_assert_crc_equal(&crc, &crc_after); } cursor_disable(data); igt_display_commit(display); /* Now render the same in software and collect crc */ draw_cursor(cr, x, y, data->curw, data->curh); igt_display_commit(display); igt_wait_for_vblank(data->drm_fd, data->pipe); igt_pipe_crc_collect_crc(pipe_crc, &ref_crc); igt_assert_crc_equal(&crc, &ref_crc); /* Clear screen afterwards */ igt_paint_color(cr, 0, 0, data->screenw, data->screenh, 0.0, 0.0, 0.0); } static void do_fail_test(data_t *data, int x, int y, int expect) { igt_display_t *display = &data->display; igt_plane_t *cursor; cairo_t *cr = igt_get_cairo_ctx(data->drm_fd, &data->primary_fb); int ret; igt_print_activity(); /* Hardware test */ igt_paint_test_pattern(cr, data->screenw, data->screenh); cursor_enable(data); cursor = igt_output_get_plane(data->output, IGT_PLANE_CURSOR); igt_plane_set_position(cursor, x, y); ret = igt_display_try_commit2(display, COMMIT_LEGACY); igt_plane_set_position(cursor, 0, 0); cursor_disable(data); igt_display_commit(display); igt_assert_eq(ret, expect); } static void do_test(data_t *data, int left, int right, int top, int bottom) { do_single_test(data, left, top); do_single_test(data, right, top); do_single_test(data, right, bottom); do_single_test(data, left, bottom); } static void test_crc_onscreen(data_t *data) { int left = data->left; int right = data->right; int top = data->top; int bottom = data->bottom; int cursor_w = data->curw; int cursor_h = data->curh; /* fully inside */ do_test(data, left, right, top, bottom); /* 2 pixels inside */ do_test(data, left - (cursor_w-2), right + (cursor_w-2), top , bottom ); do_test(data, left , right , top - (cursor_h-2), bottom + (cursor_h-2)); do_test(data, left - (cursor_w-2), right + (cursor_w-2), top - (cursor_h-2), bottom + (cursor_h-2)); /* 1 pixel inside */ do_test(data, left - (cursor_w-1), right + (cursor_w-1), top , bottom ); do_test(data, left , right , top - (cursor_h-1), bottom + (cursor_h-1)); do_test(data, left - (cursor_w-1), right + (cursor_w-1), top - (cursor_h-1), bottom + (cursor_h-1)); } static void test_crc_offscreen(data_t *data) { int left = data->left; int right = data->right; int top = data->top; int bottom = data->bottom; int cursor_w = data->curw; int cursor_h = data->curh; /* fully outside */ do_test(data, left - (cursor_w), right + (cursor_w), top , bottom ); do_test(data, left , right , top - (cursor_h), bottom + (cursor_h)); do_test(data, left - (cursor_w), right + (cursor_w), top - (cursor_h), bottom + (cursor_h)); /* fully outside by 1 extra pixels */ do_test(data, left - (cursor_w+1), right + (cursor_w+1), top , bottom ); do_test(data, left , right , top - (cursor_h+1), bottom + (cursor_h+1)); do_test(data, left - (cursor_w+1), right + (cursor_w+1), top - (cursor_h+1), bottom + (cursor_h+1)); /* fully outside by 2 extra pixels */ do_test(data, left - (cursor_w+2), right + (cursor_w+2), top , bottom ); do_test(data, left , right , top - (cursor_h+2), bottom + (cursor_h+2)); do_test(data, left - (cursor_w+2), right + (cursor_w+2), top - (cursor_h+2), bottom + (cursor_h+2)); /* fully outside by a lot of extra pixels */ do_test(data, left - (cursor_w+512), right + (cursor_w+512), top , bottom ); do_test(data, left , right , top - (cursor_h+512), bottom + (cursor_h+512)); do_test(data, left - (cursor_w+512), right + (cursor_w+512), top - (cursor_h+512), bottom + (cursor_h+512)); /* go nuts */ do_test(data, INT_MIN, INT_MAX - cursor_w, INT_MIN, INT_MAX - cursor_h); do_test(data, SHRT_MIN, SHRT_MAX, SHRT_MIN, SHRT_MAX); /* Make sure we get -ERANGE on integer overflow */ do_fail_test(data, INT_MAX - cursor_w + 1, INT_MAX - cursor_h + 1, -ERANGE); } static void test_crc_sliding(data_t *data) { int i; /* Make sure cursor moves smoothly and pixel-by-pixel, and that there are * no alignment issues. Horizontal, vertical and diagonal test. */ for (i = 0; i < 16; i++) { do_single_test(data, i, 0); do_single_test(data, 0, i); do_single_test(data, i, i); } } static void test_crc_random(data_t *data) { int i, max; max = data->flags & (TEST_DPMS | TEST_SUSPEND) ? 2 : 50; /* Random cursor placement */ for (i = 0; i < max; i++) { int x = rand() % (data->screenw + data->curw * 2) - data->curw; int y = rand() % (data->screenh + data->curh * 2) - data->curh; do_single_test(data, x, y); } } static bool prepare_crtc(data_t *data, igt_output_t *output, int cursor_w, int cursor_h) { drmModeModeInfo *mode; igt_display_t *display = &data->display; igt_plane_t *primary; /* select the pipe we want to use */ igt_output_set_pipe(output, data->pipe); cursor_disable(data); igt_display_commit(display); if (!output->valid) { igt_output_set_pipe(output, PIPE_ANY); igt_display_commit(display); return false; } /* create and set the primary plane fb */ mode = igt_output_get_mode(output); igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, 0.0, 0.0, 0.0, &data->primary_fb); primary = igt_output_get_plane(output, IGT_PLANE_PRIMARY); igt_plane_set_fb(primary, &data->primary_fb); igt_display_commit(display); /* create the pipe_crc object for this pipe */ if (data->pipe_crc) igt_pipe_crc_free(data->pipe_crc); data->pipe_crc = igt_pipe_crc_new(data->pipe, INTEL_PIPE_CRC_SOURCE_AUTO); /* x/y position where the cursor is still fully visible */ data->left = 0; data->right = mode->hdisplay - cursor_w; data->top = 0; data->bottom = mode->vdisplay - cursor_h; data->screenw = mode->hdisplay; data->screenh = mode->vdisplay; data->curw = cursor_w; data->curh = cursor_h; data->refresh = mode->vrefresh; /* make sure cursor is disabled */ cursor_disable(data); igt_wait_for_vblank(data->drm_fd, data->pipe); /* get reference crc w/o cursor */ igt_pipe_crc_collect_crc(data->pipe_crc, &data->ref_crc); return true; } static void cleanup_crtc(data_t *data, igt_output_t *output) { igt_display_t *display = &data->display; igt_plane_t *primary; igt_pipe_crc_free(data->pipe_crc); data->pipe_crc = NULL; igt_remove_fb(data->drm_fd, &data->primary_fb); primary = igt_output_get_plane(output, IGT_PLANE_PRIMARY); igt_plane_set_fb(primary, NULL); igt_output_set_pipe(output, PIPE_ANY); igt_display_commit(display); } static void run_test(data_t *data, void (*testfunc)(data_t *), int cursor_w, int cursor_h) { igt_display_t *display = &data->display; igt_output_t *output; enum pipe p; int valid_tests = 0; igt_require(cursor_w <= data->cursor_max_w && cursor_h <= data->cursor_max_h); for_each_connected_output(display, output) { data->output = output; for_each_pipe(display, p) { data->pipe = p; if (!prepare_crtc(data, output, cursor_w, cursor_h)) continue; valid_tests++; igt_info("Beginning %s on pipe %s, connector %s\n", igt_subtest_name(), kmstest_pipe_name(data->pipe), igt_output_name(output)); testfunc(data); igt_info("\n%s on pipe %s, connector %s: PASSED\n\n", igt_subtest_name(), kmstest_pipe_name(data->pipe), igt_output_name(output)); /* cleanup what prepare_crtc() has done */ cleanup_crtc(data, output); } } igt_require_f(valid_tests, "no valid crtc/connector combinations found\n"); } static void create_cursor_fb(data_t *data, int cur_w, int cur_h) { cairo_t *cr; uint32_t fb_id; /* * Make the FB slightly taller and leave the extra * line opaque white, so that we can see that the * hardware won't scan beyond what it should (esp. * with non-square cursors). */ fb_id = igt_create_color_fb(data->drm_fd, cur_w, cur_h + 1, DRM_FORMAT_ARGB8888, LOCAL_DRM_FORMAT_MOD_NONE, 1.0, 1.0, 1.0, &data->fb); igt_assert(fb_id); cr = igt_get_cairo_ctx(data->drm_fd, &data->fb); draw_cursor(cr, 0, 0, cur_w, cur_h); igt_assert(cairo_status(cr) == 0); } static bool has_nonsquare_cursors(uint32_t devid) { /* * Test non-square cursors a bit on the platforms * that support such things. */ return devid == PCI_CHIP_845_G || devid == PCI_CHIP_I865_G; } static void test_cursor_size(data_t *data) { igt_display_t *display = &data->display; igt_pipe_crc_t *pipe_crc = data->pipe_crc; igt_crc_t crc[10], ref_crc; cairo_t *cr; uint32_t fb_id; int i, size; int cursor_max_size = data->cursor_max_w; int ret; /* Create a maximum size cursor, then change the size in flight to * smaller ones to see that the size is applied correctly */ fb_id = igt_create_fb(data->drm_fd, cursor_max_size, cursor_max_size, DRM_FORMAT_ARGB8888, LOCAL_DRM_FORMAT_MOD_NONE, &data->fb); igt_assert(fb_id); /* Use a solid white rectangle as the cursor */ cr = igt_get_cairo_ctx(data->drm_fd, &data->fb); igt_paint_color_alpha(cr, 0, 0, cursor_max_size, cursor_max_size, 1.0, 1.0, 1.0, 1.0); /* Hardware test loop */ cursor_enable(data); ret = drmModeMoveCursor(data->drm_fd, data->output->config.crtc->crtc_id, 0, 0); igt_assert_eq(ret, 0); for (i = 0, size = cursor_max_size; size >= 64; size /= 2, i++) { /* Change size in flight: */ ret = drmModeSetCursor(data->drm_fd, data->output->config.crtc->crtc_id, data->fb.gem_handle, size, size); igt_assert_eq(ret, 0); igt_wait_for_vblank(data->drm_fd, data->pipe); igt_pipe_crc_collect_crc(pipe_crc, &crc[i]); } cursor_disable(data); /* Software test loop */ cr = igt_get_cairo_ctx(data->drm_fd, &data->primary_fb); for (i = 0, size = cursor_max_size; size >= 64; size /= 2, i++) { /* Now render the same in software and collect crc */ igt_paint_color_alpha(cr, 0, 0, size, size, 1.0, 1.0, 1.0, 1.0); igt_display_commit(display); igt_wait_for_vblank(data->drm_fd, data->pipe); igt_pipe_crc_collect_crc(pipe_crc, &ref_crc); /* Clear screen afterwards */ igt_paint_color(cr, 0, 0, data->screenw, data->screenh, 0.0, 0.0, 0.0); igt_assert_crc_equal(&crc[i], &ref_crc); } } static void test_rapid_movement(data_t *data) { struct timeval start, end, delta; int x = 0, y = 0; long usec; int crtc_id = data->output->config.crtc->crtc_id; igt_assert_eq(drmModeSetCursor(data->drm_fd, crtc_id, data->fb.gem_handle, data->curw, data->curh), 0); gettimeofday(&start, NULL); for ( ; x < 100; x++) igt_assert_eq(drmModeMoveCursor(data->drm_fd, crtc_id, x, y), 0); for ( ; y < 100; y++) igt_assert_eq(drmModeMoveCursor(data->drm_fd, crtc_id, x, y), 0); for ( ; x > 0; x--) igt_assert_eq(drmModeMoveCursor(data->drm_fd, crtc_id, x, y), 0); for ( ; y > 0; y--) igt_assert_eq(drmModeMoveCursor(data->drm_fd, crtc_id, x, y), 0); gettimeofday(&end, NULL); /* * We've done 400 cursor updates now. If we're being throttled to * vblank, then that would take roughly 400/refresh seconds. If the * elapsed time is greater than 90% of that value, we'll consider it * a failure (since cursor updates shouldn't be throttled). */ timersub(&end, &start, &delta); usec = delta.tv_usec + 1000000 * delta.tv_sec; igt_assert_lt(usec, 0.9 * 400 * 1000000 / data->refresh); igt_assert_eq(drmModeSetCursor(data->drm_fd, crtc_id, 0, data->curw, data->curh), 0); } static void run_test_generic(data_t *data) { int cursor_size; for (cursor_size = 64; cursor_size <= 512; cursor_size *= 2) { int w = cursor_size; int h = cursor_size; igt_fixture create_cursor_fb(data, w, h); /* Using created cursor FBs to test cursor support */ igt_subtest_f("cursor-%dx%d-onscreen", w, h) run_test(data, test_crc_onscreen, w, h); igt_subtest_f("cursor-%dx%d-offscreen", w, h) run_test(data, test_crc_offscreen, w, h); igt_subtest_f("cursor-%dx%d-sliding", w, h) run_test(data, test_crc_sliding, w, h); igt_subtest_f("cursor-%dx%d-random", w, h) run_test(data, test_crc_random, w, h); igt_subtest_f("cursor-%dx%d-dpms", w, h) { data->flags = TEST_DPMS; run_test(data, test_crc_random, w, h); data->flags = 0; } igt_subtest_f("cursor-%dx%d-suspend", w, h) { data->flags = TEST_SUSPEND; run_test(data, test_crc_random, w, h); data->flags = 0; } igt_subtest_f("cursor-%dx%d-rapid-movement", w, h) { run_test(data, test_rapid_movement, w, h); } igt_fixture igt_remove_fb(data->drm_fd, &data->fb); /* * Test non-square cursors a bit on the platforms * that support such things. And make it a bit more * interesting by using a non-pot height. */ h /= 3; igt_fixture create_cursor_fb(data, w, h); /* Using created cursor FBs to test cursor support */ igt_subtest_f("cursor-%dx%d-onscreen", w, h) { igt_require(has_nonsquare_cursors(data->devid)); run_test(data, test_crc_onscreen, w, h); } igt_subtest_f("cursor-%dx%d-offscreen", w, h) { igt_require(has_nonsquare_cursors(data->devid)); run_test(data, test_crc_offscreen, w, h); } igt_subtest_f("cursor-%dx%d-sliding", w, h) { igt_require(has_nonsquare_cursors(data->devid)); run_test(data, test_crc_sliding, w, h); } igt_subtest_f("cursor-%dx%d-random", w, h) { igt_require(has_nonsquare_cursors(data->devid)); run_test(data, test_crc_random, w, h); } igt_fixture igt_remove_fb(data->drm_fd, &data->fb); } } static data_t data; igt_main { uint64_t cursor_width = 64, cursor_height = 64; int ret; igt_skip_on_simulation(); igt_fixture { data.drm_fd = drm_open_driver_master(DRIVER_INTEL); data.devid = intel_get_drm_devid(data.drm_fd); ret = drmGetCap(data.drm_fd, DRM_CAP_CURSOR_WIDTH, &cursor_width); igt_assert(ret == 0 || errno == EINVAL); /* Not making use of cursor_height since it is same as width, still reading */ ret = drmGetCap(data.drm_fd, DRM_CAP_CURSOR_HEIGHT, &cursor_height); igt_assert(ret == 0 || errno == EINVAL); /* We assume width and height are same so max is assigned width */ igt_assert_eq(cursor_width, cursor_height); kmstest_set_vt_graphics_mode(); igt_require_pipe_crc(); igt_display_init(&data.display, data.drm_fd); } data.cursor_max_w = cursor_width; data.cursor_max_h = cursor_height; igt_subtest_f("cursor-size-change") run_test(&data, test_cursor_size, cursor_width, cursor_height); run_test_generic(&data); igt_fixture { igt_display_fini(&data.display); } } intel-gpu-tools-1.14/tests/gem_flink_race.c0000644000175000017500000001056112665336131015666 00000000000000/* * Copyright (c) 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter */ #define _GNU_SOURCE #include "igt.h" #include #include #include #include #include #include #include #include "intel_bufmgr.h" IGT_TEST_DESCRIPTION("Check for flink/open vs. gem close races."); /* Testcase: check for flink/open vs. gem close races * * The gem flink open ioctl had a little race with gem close which could result * in the flink name and corresponding reference getting leaked. */ /* We want lockless and I'm to lazy to dig out an atomic library. On x86 this * works, too. */ volatile int pls_die = 0; int fd; static void *thread_fn_flink_name(void *p) { struct drm_gem_open open_struct; int ret; while (!pls_die) { memset(&open_struct, 0, sizeof(open_struct)); open_struct.name = 1; ret = ioctl(fd, DRM_IOCTL_GEM_OPEN, &open_struct); if (ret == 0) { uint32_t name = gem_flink(fd, open_struct.handle); igt_assert(name == 1); gem_close(fd, open_struct.handle); } else igt_assert(errno == ENOENT); } return (void *)0; } static void test_flink_name(void) { pthread_t *threads; int r, i, num_threads; void *status; num_threads = sysconf(_SC_NPROCESSORS_ONLN) - 1; if (!num_threads) num_threads = 1; threads = calloc(num_threads, sizeof(pthread_t)); fd = drm_open_driver(DRIVER_INTEL); for (i = 0; i < num_threads; i++) { r = pthread_create(&threads[i], NULL, thread_fn_flink_name, NULL); igt_assert_eq(r, 0); } for (i = 0; i < 1000000; i++) { uint32_t handle; handle = gem_create(fd, 4096); gem_flink(fd, handle); gem_close(fd, handle); } pls_die = 1; for (i = 0; i < num_threads; i++) { pthread_join(threads[i], &status); igt_assert(status == 0); } close(fd); } static void *thread_fn_flink_close(void *p) { struct drm_gem_flink flink; struct drm_gem_close close_bo; uint32_t handle; while (!pls_die) { /* We want to race gem close against flink on handle one.*/ handle = gem_create(fd, 4096); if (handle != 1) gem_close(fd, handle); /* raw ioctl since we expect this to fail */ flink.handle = 1; ioctl(fd, DRM_IOCTL_GEM_FLINK, &flink); close_bo.handle = 1; ioctl(fd, DRM_IOCTL_GEM_CLOSE, &close_bo); } return (void *)0; } static void test_flink_close(void) { pthread_t *threads; int r, i, num_threads; int obj_count; void *status; int fake; /* Allocate exit handler fds in here so that we dont screw * up the counts */ fake = drm_open_driver(DRIVER_INTEL); obj_count = igt_get_stable_obj_count(fake); num_threads = sysconf(_SC_NPROCESSORS_ONLN); threads = calloc(num_threads, sizeof(pthread_t)); fd = drm_open_driver(DRIVER_INTEL); for (i = 0; i < num_threads; i++) { r = pthread_create(&threads[i], NULL, thread_fn_flink_close, NULL); igt_assert_eq(r, 0); } sleep(5); pls_die = 1; for (i = 0; i < num_threads; i++) { pthread_join(threads[i], &status); igt_assert(status == 0); } close(fd); obj_count = igt_get_stable_obj_count(fake) - obj_count; igt_info("leaked %i objects\n", obj_count); close(fake); igt_assert_eq(obj_count, 0); } igt_main { igt_skip_on_simulation(); igt_subtest("flink_name") test_flink_name(); igt_subtest("flink_close") test_flink_close(); } intel-gpu-tools-1.14/tests/gem_linear_blits.c0000644000175000017500000001432512665336131016242 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * */ /** @file gem_linear_blits.c * * This is a test of doing many blits, with a working set * larger than the aperture size. * * The goal is to simply ensure the basics work. */ #include "igt.h" #include #include #include #include #include #include #include #include #include IGT_TEST_DESCRIPTION("Test doing many blits with a working set larger than the" " aperture size."); #define WIDTH 512 #define HEIGHT 512 static uint32_t linear[WIDTH*HEIGHT]; static void copy(int fd, uint32_t dst, uint32_t src) { uint32_t batch[12]; struct drm_i915_gem_relocation_entry reloc[2]; struct drm_i915_gem_exec_object2 obj[3]; struct drm_i915_gem_execbuffer2 exec; int i = 0; batch[i++] = XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA | XY_SRC_COPY_BLT_WRITE_RGB; if (intel_gen(intel_get_drm_devid(fd)) >= 8) batch[i - 1] |= 8; else batch[i - 1] |= 6; batch[i++] = (3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ WIDTH*4; batch[i++] = 0; /* dst x1,y1 */ batch[i++] = (HEIGHT << 16) | WIDTH; /* dst x2,y2 */ batch[i++] = 0; /* dst reloc */ if (intel_gen(intel_get_drm_devid(fd)) >= 8) batch[i++] = 0; batch[i++] = 0; /* src x1,y1 */ batch[i++] = WIDTH*4; batch[i++] = 0; /* src reloc */ if (intel_gen(intel_get_drm_devid(fd)) >= 8) batch[i++] = 0; batch[i++] = MI_BATCH_BUFFER_END; batch[i++] = MI_NOOP; memset(reloc, 0, sizeof(reloc)); reloc[0].target_handle = dst; reloc[0].delta = 0; reloc[0].offset = 4 * sizeof(batch[0]); reloc[0].presumed_offset = 0; reloc[0].read_domains = I915_GEM_DOMAIN_RENDER; reloc[0].write_domain = I915_GEM_DOMAIN_RENDER; reloc[1].target_handle = src; reloc[1].delta = 0; reloc[1].offset = 7 * sizeof(batch[0]); if (intel_gen(intel_get_drm_devid(fd)) >= 8) reloc[1].offset += sizeof(batch[0]); reloc[1].presumed_offset = 0; reloc[1].read_domains = I915_GEM_DOMAIN_RENDER; reloc[1].write_domain = 0; memset(obj, 0, sizeof(obj)); obj[0].handle = dst; obj[1].handle = src; obj[2].handle = gem_create(fd, 4096); gem_write(fd, obj[2].handle, 0, batch, i * sizeof(batch[0])); obj[2].relocation_count = 2; obj[2].relocs_ptr = (uintptr_t)reloc; memset(&exec, 0, sizeof(exec)); exec.buffers_ptr = (uintptr_t)obj; exec.buffer_count = 3; exec.batch_len = i * sizeof(batch[0]); exec.flags = gem_has_blt(fd) ? I915_EXEC_BLT : 0; gem_execbuf(fd, &exec); gem_close(fd, obj[2].handle); } static uint32_t create_bo(int fd, uint32_t val) { uint32_t handle; int i; handle = gem_create(fd, sizeof(linear)); /* Fill the BO with dwords starting at val */ for (i = 0; i < WIDTH*HEIGHT; i++) linear[i] = val++; gem_write(fd, handle, 0, linear, sizeof(linear)); return handle; } static void check_bo(int fd, uint32_t handle, uint32_t val) { int i; gem_read(fd, handle, 0, linear, sizeof(linear)); for (i = 0; i < WIDTH*HEIGHT; i++) { igt_assert_f(linear[i] == val, "Expected 0x%08x, found 0x%08x " "at offset 0x%08x\n", val, linear[i], i * 4); val++; } } static void run_test(int fd, int count) { uint32_t *handle, *start_val; uint32_t start = 0; int i; igt_debug("Using %d 1MiB buffers\n", count); handle = malloc(sizeof(uint32_t)*count*2); start_val = handle + count; for (i = 0; i < count; i++) { handle[i] = create_bo(fd, start); start_val[i] = start; start += 1024 * 1024 / 4; } igt_debug("Verifying initialisation...\n"); for (i = 0; i < count; i++) check_bo(fd, handle[i], start_val[i]); igt_debug("Cyclic blits, forward...\n"); for (i = 0; i < count * 4; i++) { int src = i % count; int dst = (i + 1) % count; copy(fd, handle[dst], handle[src]); start_val[dst] = start_val[src]; } for (i = 0; i < count; i++) check_bo(fd, handle[i], start_val[i]); igt_debug("Cyclic blits, backward...\n"); for (i = 0; i < count * 4; i++) { int src = (i + 1) % count; int dst = i % count; copy(fd, handle[dst], handle[src]); start_val[dst] = start_val[src]; } for (i = 0; i < count; i++) check_bo(fd, handle[i], start_val[i]); igt_debug("Random blits...\n"); for (i = 0; i < count * 4; i++) { int src = random() % count; int dst = random() % count; if (src == dst) continue; copy(fd, handle[dst], handle[src]); start_val[dst] = start_val[src]; } for (i = 0; i < count; i++) { check_bo(fd, handle[i], start_val[i]); gem_close(fd, handle[i]); } free(handle); } int main(int argc, char **argv) { int fd = 0; igt_subtest_init(argc, argv); igt_fixture { fd = drm_open_driver(DRIVER_INTEL); } igt_subtest("basic") run_test(fd, 2); igt_subtest("normal") { int count; count = 3 * gem_aperture_size(fd) / (1024*1024) / 2; igt_require(count > 1); intel_require_memory(count, sizeof(linear), CHECK_RAM); run_test(fd, count); } igt_subtest("interruptible") { int count; count = 3 * gem_aperture_size(fd) / (1024*1024) / 2; igt_require(count > 1); intel_require_memory(count, sizeof(linear), CHECK_RAM); igt_fork_signal_helper(); run_test(fd, count); igt_stop_signal_helper(); } igt_exit(); } intel-gpu-tools-1.14/tests/gem_hang.c0000644000175000017500000000512012665336131014501 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * Jesse Barnes (based on gem_bad_blit.c) * */ #include "igt.h" #include #include #include #include #include #include #include #include #include "drm.h" #include "intel_bufmgr.h" static drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; static int bad_pipe; static void gpu_hang(void) { int cmd; cmd = bad_pipe ? MI_WAIT_FOR_PIPEB_SCAN_LINE_WINDOW : MI_WAIT_FOR_PIPEA_SCAN_LINE_WINDOW; BEGIN_BATCH(6, 0); /* The documentation says that the LOAD_SCAN_LINES command * always comes in pairs. Don't ask me why. */ OUT_BATCH(MI_LOAD_SCAN_LINES_INCL | (bad_pipe << 20)); OUT_BATCH((0 << 16) | 2048); OUT_BATCH(MI_LOAD_SCAN_LINES_INCL | (bad_pipe << 20)); OUT_BATCH((0 << 16) | 2048); OUT_BATCH(MI_WAIT_FOR_EVENT | cmd); OUT_BATCH(MI_NOOP); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); } int main(int argc, char **argv) { int fd; igt_simple_init(argc, argv); igt_assert_f(argc == 2, "usage: %s \n", argv[0]); bad_pipe = atoi(argv[1]); fd = drm_open_driver(DRIVER_INTEL); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); drm_intel_bufmgr_gem_enable_reuse(bufmgr); batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd)); gpu_hang(); intel_batchbuffer_free(batch); drm_intel_bufmgr_destroy(bufmgr); close(fd); igt_exit(); } intel-gpu-tools-1.14/tests/check_drm_clients0000755000175000017500000000015412665336131016160 00000000000000#!/bin/bash SOURCE_DIR="$( dirname "${BASH_SOURCE[0]}" )" . $SOURCE_DIR/drm_lib.sh exit $IGT_EXIT_SUCCESS intel-gpu-tools-1.14/tests/prime_nv_pcopy.c0000644000175000017500000005733312665336131016002 00000000000000/* basic set of prime tests between intel and nouveau */ /* test list - 1. share buffer from intel -> nouveau. 2. share buffer from nouveau -> intel 3. share intel->nouveau, map on both, write intel, read nouveau 4. share intel->nouveau, blit intel fill, readback on nouveau test 1 + map buffer, read/write, map other size. do some hw actions on the buffer some illegal operations - close prime fd try and map TODO add some nouveau rendering tests */ #include "igt.h" #include #include #include #include #include #include #include #include #include "intel_bufmgr.h" #include "nouveau.h" static int intel_fd = -1, nouveau_fd = -1; static drm_intel_bufmgr *bufmgr; static struct nouveau_device *ndev; static struct nouveau_client *nclient; static uint32_t devid; static struct intel_batchbuffer *batch; static struct nouveau_object *nchannel, *pcopy; static struct nouveau_bufctx *nbufctx; static struct nouveau_pushbuf *npush; static struct nouveau_bo *query_bo; static uint32_t query_counter; static volatile uint32_t *query; static uint32_t memtype_intel, tile_intel_y, tile_intel_x; #define SUBC_COPY(x) 6, (x) #define NV01_SUBCHAN_OBJECT 0 #define NV01_SUBC(subc, mthd) SUBC_##subc((NV01_SUBCHAN_##mthd)) typedef struct { uint32_t w, h; uint32_t pitch, lines; } rect; static void nv_bo_alloc(struct nouveau_bo **bo, rect *r, uint32_t w, uint32_t h, uint32_t tile_mode, int handle, uint32_t dom) { uint32_t size; uint32_t dx = 1, dy = 1, memtype = 0; *bo = NULL; if (tile_mode) { uint32_t tile_y; uint32_t tile_x; /* Y major tiling */ if ((tile_mode & 0xf) == 0xe) /* but the internal layout is different */ tile_x = 7; else tile_x = 6 + (tile_mode & 0xf); if (ndev->chipset < 0xc0) { memtype = 0x70; tile_y = 2; } else { memtype = 0xfe; tile_y = 3; } if ((tile_mode & 0xf) == 0xe) memtype = memtype_intel; tile_y += ((tile_mode & 0xf0)>>4); dx = 1 << tile_x; dy = 1 << tile_y; igt_debug("Tiling requirements: x y %u %u\n", dx, dy); } r->w = w; r->h = h; r->pitch = w = (w + dx-1) & ~(dx-1); r->lines = h = (h + dy-1) & ~(dy-1); size = w*h; if (handle < 0) { union nouveau_bo_config cfg; cfg.nv50.memtype = memtype; cfg.nv50.tile_mode = tile_mode; if (dom == NOUVEAU_BO_GART) dom |= NOUVEAU_BO_MAP; igt_assert(nouveau_bo_new(ndev, dom, 4096, size, &cfg, bo) == 0); igt_assert(nouveau_bo_map(*bo, NOUVEAU_BO_RDWR, nclient) == 0); igt_debug("new flags %08x memtype %08x tile %08x\n", (*bo)->flags, (*bo)->config.nv50.memtype, (*bo)->config.nv50.tile_mode); if (tile_mode == tile_intel_y || tile_mode == tile_intel_x) { igt_debug("tile mode was: %02x, now: %02x\n", (*bo)->config.nv50.tile_mode, tile_mode); /* Doesn't like intel tiling much.. */ (*bo)->config.nv50.tile_mode = tile_mode; } } else { igt_assert(nouveau_bo_prime_handle_ref(ndev, handle, bo) == 0); close(handle); igt_assert_f((*bo)->size >= size, "expected bo size to be at least %u," "but received %"PRIu64"\n", size, (*bo)->size); igt_debug("prime flags %08x memtype %08x tile %08x\n", (*bo)->flags, (*bo)->config.nv50.memtype, (*bo)->config.nv50.tile_mode); (*bo)->config.nv50.memtype = memtype; (*bo)->config.nv50.tile_mode = tile_mode; } igt_debug("size: %"PRIu64"\n", (*bo)->size); } static inline void PUSH_DATA(struct nouveau_pushbuf *push, uint32_t data) { *push->cur++ = data; } static inline void BEGIN_NV04(struct nouveau_pushbuf *push, int subc, int mthd, int size) { PUSH_DATA (push, 0x00000000 | (size << 18) | (subc << 13) | mthd); } static inline void BEGIN_NI04(struct nouveau_pushbuf *push, int subc, int mthd, int size) { PUSH_DATA (push, 0x40000000 | (size << 18) | (subc << 13) | mthd); } static inline void BEGIN_NVC0(struct nouveau_pushbuf *push, int subc, int mthd, int size) { PUSH_DATA (push, 0x20000000 | (size << 16) | (subc << 13) | (mthd / 4)); } static inline void BEGIN_NVXX(struct nouveau_pushbuf *push, int subc, int mthd, int size) { if (ndev->chipset < 0xc0) BEGIN_NV04(push, subc, mthd, size); else BEGIN_NVC0(push, subc, mthd, size); } static void noop_intel(drm_intel_bo *bo) { BEGIN_BATCH(3, 1); OUT_BATCH(MI_NOOP); OUT_BATCH(MI_BATCH_BUFFER_END); OUT_RELOC(bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); } static void find_and_open_devices(void) { int i; char path[80], *unused; struct stat buf; FILE *fl; char vendor_id[8] = {}; int venid; for (i = 0; i < 9; i++) { sprintf(path, "/sys/class/drm/card%d/device/vendor", i); if (stat(path, &buf)) break; fl = fopen(path, "r"); if (!fl) break; unused = fgets(vendor_id, sizeof(vendor_id)-1, fl); (void)unused; fclose(fl); venid = strtoul(vendor_id, NULL, 16); sprintf(path, "/dev/dri/card%d", i); if (venid == 0x8086) { intel_fd = open(path, O_RDWR); igt_assert(intel_fd); } else if (venid == 0x10de) { nouveau_fd = open(path, O_RDWR); igt_assert(nouveau_fd); } } } static void init_nouveau(void) { struct nv04_fifo nv04_data = { .vram = 0xbeef0201, .gart = 0xbeef0202 }; struct nvc0_fifo nvc0_data = { }; struct nouveau_fifo *fifo; int size; uint32_t class; void *data; igt_assert(nouveau_device_wrap(nouveau_fd, 0, &ndev) == 0); igt_assert(nouveau_client_new(ndev, &nclient) == 0); igt_skip_on_f(ndev->chipset < 0xa3 || ndev->chipset == 0xaa || ndev->chipset == 0xac, "Your card doesn't support PCOPY\n"); // TODO: Get a kepler and add support for it igt_skip_on_f(ndev->chipset >= 0xe0, "Unsure how kepler works!\n"); igt_assert(nouveau_bo_new(ndev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP, 4096, 4096, NULL, &query_bo) == 0); igt_assert(nouveau_bo_map(query_bo, NOUVEAU_BO_RDWR, nclient) == 0); query = query_bo->map; *query = query_counter; if (ndev->chipset < 0xc0) { class = 0x85b5; data = &nv04_data; size = sizeof(nv04_data); } else { class = ndev->chipset < 0xe0 ? 0x490b5 : 0xa0b5; data = &nvc0_data; size = sizeof(nvc0_data); } igt_assert(nouveau_object_new(&ndev->object, 0, NOUVEAU_FIFO_CHANNEL_CLASS, data, size, &nchannel) == 0); fifo = nchannel->data; igt_assert(nouveau_pushbuf_new(nclient, nchannel, 4, 32 * 1024, true, &npush) == 0); igt_assert(nouveau_bufctx_new(nclient, 1, &nbufctx) == 0); npush->user_priv = nbufctx; /* Hope this is enough init for PCOPY */ igt_assert(nouveau_object_new(nchannel, class, class & 0xffff, NULL, 0, &pcopy) == 0); igt_assert(nouveau_pushbuf_space(npush, 512, 0, 0) == 0); if (ndev->chipset < 0xc0) { struct nv04_fifo *nv04_fifo = (struct nv04_fifo*)fifo; tile_intel_y = 0x3e; tile_intel_x = 0x13; BEGIN_NV04(npush, NV01_SUBC(COPY, OBJECT), 1); PUSH_DATA(npush, pcopy->handle); BEGIN_NV04(npush, SUBC_COPY(0x0180), 3); PUSH_DATA(npush, nv04_fifo->vram); PUSH_DATA(npush, nv04_fifo->vram); PUSH_DATA(npush, nv04_fifo->vram); } else { tile_intel_y = 0x2e; tile_intel_x = 0x03; BEGIN_NVC0(npush, NV01_SUBC(COPY, OBJECT), 1); PUSH_DATA(npush, pcopy->handle); } nouveau_pushbuf_kick(npush, npush->channel); } static void fill16(void *ptr, uint32_t val) { uint32_t *p = ptr; val = (val) | (val << 8) | (val << 16) | (val << 24); p[0] = p[1] = p[2] = p[3] = val; } #define TILE_SIZE 4096 static void swtile_y(uint8_t *out, const uint8_t *in, int w, int h) { uint32_t x, y, dx, dy; uint8_t *endptr = out + w * h; igt_assert(!(w % 128)); igt_assert(!(h % 32)); for (y = 0; y < h; y += 32) { for (x = 0; x < w; x += 128, out += TILE_SIZE) { for (dx = 0; dx < 8; ++dx) { for (dy = 0; dy < 32; ++dy) { uint32_t out_ofs = (dx * 32 + dy) * 16; uint32_t in_ofs = (y + dy) * w + (x + 16 * dx); igt_assert(out_ofs < TILE_SIZE); igt_assert(in_ofs < w*h); // To do the Y tiling quirk: // out_ofs = out_ofs ^ (((out_ofs >> 9) & 1) << 6); memcpy(&out[out_ofs], &in[in_ofs], 16); } } } } igt_assert(out == endptr); } static void swtile_x(uint8_t *out, const uint8_t *in, int w, int h) { uint32_t x, y, dy; uint8_t *endptr = out + w * h; igt_assert(!(w % 512)); igt_assert(!(h % 8)); for (y = 0; y < h; y += 8) { for (x = 0; x < w; x += 512, out += TILE_SIZE) { for (dy = 0; dy < 8; ++dy) { uint32_t out_ofs = 512 * dy; uint32_t in_ofs = (y + dy) * w + x; igt_assert(out_ofs < TILE_SIZE); igt_assert(in_ofs < w*h); memcpy(&out[out_ofs], &in[in_ofs], 512); } } } igt_assert(out == endptr); } static void perform_copy(struct nouveau_bo *nvbo, const rect *dst, uint32_t dst_x, uint32_t dst_y, struct nouveau_bo *nvbi, const rect *src, uint32_t src_x, uint32_t src_y, uint32_t w, uint32_t h) { struct nouveau_pushbuf_refn refs[] = { { nvbi, (nvbi->flags & NOUVEAU_BO_APER) | NOUVEAU_BO_RD }, { nvbo, (nvbo->flags & NOUVEAU_BO_APER) | NOUVEAU_BO_WR }, { query_bo, NOUVEAU_BO_GART | NOUVEAU_BO_RDWR } }; uint32_t cpp = 1, exec = 0x00003000; /* QUERY|QUERY_SHORT|FORMAT */ uint32_t src_off = 0, dst_off = 0; struct nouveau_pushbuf *push = npush; int ret; if (nvbi->config.nv50.tile_mode == tile_intel_y) igt_debug("src is y-tiled\n"); if (nvbo->config.nv50.tile_mode == tile_intel_y) igt_debug("dst is y-tiled\n"); igt_assert(nouveau_pushbuf_space(push, 64, 0, 0) == 0); igt_assert(nouveau_pushbuf_refn(push, refs, 3) == 0); if (!nvbi->config.nv50.tile_mode) { src_off = src_y * src->pitch + src_x; exec |= 0x00000010; } if (!nvbo->config.nv50.tile_mode) { dst_off = dst_y * dst->pitch + dst_x; exec |= 0x00000100; } BEGIN_NVXX(push, SUBC_COPY(0x0200), 7); PUSH_DATA (push, nvbi->config.nv50.tile_mode); PUSH_DATA (push, src->pitch / cpp); PUSH_DATA (push, src->h); PUSH_DATA (push, 1); PUSH_DATA (push, 0); PUSH_DATA (push, src_x / cpp); PUSH_DATA (push, src_y); BEGIN_NVXX(push, SUBC_COPY(0x0220), 7); PUSH_DATA (push, nvbo->config.nv50.tile_mode); PUSH_DATA (push, dst->pitch / cpp); PUSH_DATA (push, dst->h); PUSH_DATA (push, 1); PUSH_DATA (push, 0); PUSH_DATA (push, dst_x / cpp); PUSH_DATA (push, dst_y); BEGIN_NVXX(push, SUBC_COPY(0x030c), 9); PUSH_DATA (push, (nvbi->offset + src_off) >> 32); PUSH_DATA (push, (nvbi->offset + src_off)); PUSH_DATA (push, (nvbo->offset + dst_off) >> 32); PUSH_DATA (push, (nvbo->offset + dst_off)); PUSH_DATA (push, src->pitch); PUSH_DATA (push, dst->pitch); PUSH_DATA (push, w / cpp); PUSH_DATA (push, h); PUSH_DATA (push, 0x03333120); BEGIN_NVXX(push, SUBC_COPY(0x0338), 3); PUSH_DATA (push, (query_bo->offset) >> 32); PUSH_DATA (push, (query_bo->offset)); PUSH_DATA (push, ++query_counter); BEGIN_NVXX(push, SUBC_COPY(0x0300), 1); PUSH_DATA (push, exec); ret = nouveau_pushbuf_kick(push, push->channel); while (!ret && *query < query_counter) { usleep(1000); } igt_assert_eq(ret, 0); } static void check1_macro(uint32_t *p, uint32_t w, uint32_t h) { uint32_t i, val, j; for (i = 0; i < 256; ++i, p += 4) { val = (i) | (i << 8) | (i << 16) | (i << 24); igt_assert_f(p[0] == val && p[1] == val && p[2] == val && p[3] == val, "Retile check failed in first tile!\n" "%08x %08x %08x %08x instead of %08x\n", p[0], p[1], p[2], p[3], val); } val = 0x3e3e3e3e; for (i = 0; i < 256 * (w-1); ++i, p += 4) { igt_assert_f(p[0] == val && p[1] == val && p[2] == val && p[3] == val, "Retile check failed in second tile!\n" "%08x %08x %08x %08x instead of %08x\n", p[0], p[1], p[2], p[3], val); } for (j = 1; j < h; ++j) { val = 0x7e7e7e7e; for (i = 0; i < 256; ++i, p += 4) { igt_assert_f(p[0] == val && p[1] == val && p[2] == val && p[3] == val, "Retile check failed in third tile!\n" "%08x %08x %08x %08x instead of %08x\n", p[0], p[1], p[2], p[3], val); } val = 0xcececece; for (i = 0; i < 256 * (w-1); ++i, p += 4) { igt_assert_f(p[0] == val && p[1] == val && p[2] == val && p[3] == val, "Retile check failed in fourth tile!\n" "%08x %08x %08x %08x instead of %08x\n", p[0], p[1], p[2], p[3], val); } } } /* test 1, see if we can copy from linear to intel Y format safely */ static void test1_macro(void) { int prime_fd = -1; struct nouveau_bo *nvbo = NULL, *nvbi = NULL; rect dst, src; uint8_t *ptr; uint32_t w = 2 * 128, h = 2 * 32, x, y; nv_bo_alloc(&nvbi, &src, w, h, 0, -1, NOUVEAU_BO_GART); nv_bo_alloc(&nvbo, &dst, w, h, tile_intel_y, -1, NOUVEAU_BO_GART); nouveau_bo_set_prime(nvbo, &prime_fd); /* Set up something for our tile that should map into the first * y-major tile, assuming my understanding of documentation is * correct */ /* First tile should be read out in groups of 16 bytes that * are all set to a linear increasing value.. */ ptr = nvbi->map; for (x = 0; x < 128; x += 16) for (y = 0; y < 32; ++y) fill16(&ptr[y * w + x], x * 2 + y); /* second tile */ for (x = 128; x < w; x += 16) for (y = 0; y < 32; ++y) fill16(&ptr[y * w + x], 0x3e); /* third tile */ for (x = 0; x < 128; x += 16) for (y = 32; y < h; ++y) fill16(&ptr[y * w + x], 0x7e); /* last tile */ for (x = 128; x < w; x += 16) for (y = 32; y < h; ++y) fill16(&ptr[y * w + x], 0xce); memset(nvbo->map, 0xfc, w * h); if (pcopy) perform_copy(nvbo, &dst, 0, 0, nvbi, &src, 0, 0, w, h); else swtile_y(nvbo->map, nvbi->map, w, h); check1_macro(nvbo->map, w/128, h/32); nouveau_bo_ref(NULL, &nvbo); nouveau_bo_ref(NULL, &nvbi); close(prime_fd); } static void dump_line(uint8_t *map) { uint32_t dx, dy; igt_debug("Dumping sub-tile:\n"); for (dy = 0; dy < 32; ++dy) { for (dx = 0; dx < 15; ++dx, ++map) { igt_debug("%02x ", *map); } igt_debug("%02x\n", *(map++)); } } static void check1_micro(void *map, uint32_t pitch, uint32_t lines, uint32_t dst_x, uint32_t dst_y, uint32_t w, uint32_t h) { uint32_t x, y; /* check only the relevant subrectangle [0..w) [0...h) */ uint8_t *m = map; for (y = 0; y < h; ++y, m += pitch) { for (x = 0; x < w; ++x) { uint8_t expected = ((y & 3) << 6) | (x & 0x3f); if (expected != m[x]) dump_line(m); igt_assert_f(expected == m[x], "failed check at x=%u y=%u, expected %02x got %02x\n", x, y, expected, m[x]); } } } /* test 1, but check micro format, should be unaffected by bit9 swizzling */ static void test1_micro(void) { struct nouveau_bo *bo_intel = NULL, *bo_nvidia = NULL, *bo_linear = NULL; rect intel, nvidia, linear; uint32_t tiling = I915_TILING_Y; uint32_t src_x = 0, src_y = 0; uint32_t dst_x = 0, dst_y = 0; uint32_t x, y, w = 256, h = 64; drm_intel_bo *test_intel_bo; int prime_fd; test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", w * h, 4096); igt_assert(test_intel_bo); drm_intel_bo_set_tiling(test_intel_bo, &tiling, w); igt_assert(tiling == I915_TILING_Y); igt_assert(drm_intel_gem_bo_map_gtt(test_intel_bo) == 0); drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd); igt_assert_lte(0, prime_fd); noop_intel(test_intel_bo); nv_bo_alloc(&bo_intel, &intel, w, h, tile_intel_y, prime_fd, 0); nv_bo_alloc(&bo_nvidia, &nvidia, w, h, 0x10, -1, NOUVEAU_BO_VRAM); nv_bo_alloc(&bo_linear, &linear, w, h, 0, -1, NOUVEAU_BO_GART); for (y = 0; y < linear.h; ++y) { uint8_t *map = bo_linear->map; map += y * linear.pitch; for (x = 0; x < linear.pitch; ++x) { uint8_t pos = x & 0x3f; /* low 4 bits: micro tile pos */ /* 2 bits: x pos in tile (wraps) */ /* 2 bits: y pos in tile (wraps) */ pos |= (y & 3) << 6; map[x] = pos; } } perform_copy(bo_nvidia, &nvidia, 0, 0, bo_linear, &linear, 0, 0, nvidia.pitch, nvidia.h); /* Perform the actual sub rectangle copy */ if (pcopy) perform_copy(bo_intel, &intel, dst_x, dst_y, bo_nvidia, &nvidia, src_x, src_y, w, h); else swtile_y(test_intel_bo->virtual, bo_linear->map, w, h); noop_intel(test_intel_bo); check1_micro(test_intel_bo->virtual, intel.pitch, intel.h, dst_x, dst_y, w, h); nouveau_bo_ref(NULL, &bo_linear); nouveau_bo_ref(NULL, &bo_nvidia); nouveau_bo_ref(NULL, &bo_intel); drm_intel_bo_unreference(test_intel_bo); } /* test 2, see if we can copy from linear to intel X format safely * Seems nvidia lacks a method to do it, so just keep this test * as a reference for potential future tests. Software tiling is * used for now */ static void test2(void) { struct nouveau_bo *nvbo = NULL, *nvbi = NULL; rect dst, src; uint8_t *ptr; uint32_t w = 1024, h = 16, x, y; nv_bo_alloc(&nvbi, &src, w, h, 0, -1, NOUVEAU_BO_GART); nv_bo_alloc(&nvbo, &dst, w, h, tile_intel_x, -1, NOUVEAU_BO_GART); /* Set up something for our tile that should map into the first * y-major tile, assuming my understanding of documentation is * correct */ /* First tile should be read out in groups of 16 bytes that * are all set to a linear increasing value.. */ ptr = nvbi->map; for (y = 0; y < 8; ++y) for (x = 0; x < 512; x += 16) fill16(&ptr[y * w + x], (y * 512 + x)/16); for (y = 0; y < 8; ++y) for (x = 512; x < w; x += 16) fill16(&ptr[y * w + x], 0x3e); for (y = 8; y < h; ++y) for (x = 0; x < 512; x += 16) fill16(&ptr[y * w + x], 0x7e); for (y = 8; y < h; ++y) for (x = 512; x < w; x += 16) fill16(&ptr[y * w + x], 0xce); memset(nvbo->map, 0xfc, w * h); /* do this in software, there is no X major tiling in PCOPY (yet?) */ if (0 && pcopy) perform_copy(nvbo, &dst, 0, 0, nvbi, &src, 0, 0, w, h); else swtile_x(nvbo->map, nvbi->map, w, h); check1_macro(nvbo->map, w/512, h/8); nouveau_bo_ref(NULL, &nvbo); nouveau_bo_ref(NULL, &nvbi); } static void check3(const uint32_t *p, uint32_t pitch, uint32_t lines, uint32_t sub_x, uint32_t sub_y, uint32_t sub_w, uint32_t sub_h) { uint32_t x, y; sub_w += sub_x; sub_h += sub_y; igt_assert_f(p[pitch * lines / 4 - 1] != 0x03030303, "copy failed: Not all lines have been copied back!\n"); for (y = 0; y < lines; ++y) { for (x = 0; x < pitch; x += 4, ++p) { uint32_t expected; if ((x < sub_x || x >= sub_w) || (y < sub_y || y >= sub_h)) expected = 0x80808080; else expected = 0x04040404; igt_assert_f(*p == expected, "%u,%u should be %08x, but is %08x\n", x, y, expected, *p); } } } /* copy from nvidia bo to intel bo and copy to a linear bo to check if tiling went succesful */ static void test3_base(int tile_src, int tile_dst) { struct nouveau_bo *bo_intel = NULL, *bo_nvidia = NULL, *bo_linear = NULL; rect intel, nvidia, linear; uint32_t cpp = 4; uint32_t src_x = 1 * cpp, src_y = 1; uint32_t dst_x = 2 * cpp, dst_y = 26; uint32_t w = 298 * cpp, h = 298; drm_intel_bo *test_intel_bo; int prime_fd; test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", 2048 * cpp * 768, 4096); igt_assert(test_intel_bo); drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd); igt_assert_lte(0, prime_fd); nv_bo_alloc(&bo_intel, &intel, 2048 * cpp, 768, tile_dst, prime_fd, 0); nv_bo_alloc(&bo_nvidia, &nvidia, 300 * cpp, 300, tile_src, -1, NOUVEAU_BO_VRAM); nv_bo_alloc(&bo_linear, &linear, 2048 * cpp, 768, 0, -1, NOUVEAU_BO_GART); noop_intel(test_intel_bo); memset(bo_linear->map, 0x80, bo_linear->size); perform_copy(bo_intel, &intel, 0, 0, bo_linear, &linear, 0, 0, linear.pitch, linear.h); noop_intel(test_intel_bo); memset(bo_linear->map, 0x04, bo_linear->size); perform_copy(bo_nvidia, &nvidia, 0, 0, bo_linear, &linear, 0, 0, nvidia.pitch, nvidia.h); /* Perform the actual sub rectangle copy */ noop_intel(test_intel_bo); perform_copy(bo_intel, &intel, dst_x, dst_y, bo_nvidia, &nvidia, src_x, src_y, w, h); noop_intel(test_intel_bo); memset(bo_linear->map, 0x3, bo_linear->size); noop_intel(test_intel_bo); perform_copy(bo_linear, &linear, 0, 0, bo_intel, &intel, 0, 0, intel.pitch, intel.h); noop_intel(test_intel_bo); check3(bo_linear->map, linear.pitch, linear.h, dst_x, dst_y, w, h); nouveau_bo_ref(NULL, &bo_linear); nouveau_bo_ref(NULL, &bo_nvidia); nouveau_bo_ref(NULL, &bo_intel); drm_intel_bo_unreference(test_intel_bo); } static void test3_1(void) { /* nvidia tiling to intel */ test3_base(0x40, tile_intel_y); } static void test3_2(void) { /* intel tiling to nvidia */ test3_base(tile_intel_y, 0x40); } static void test3_3(void) { /* intel tiling to linear */ test3_base(tile_intel_y, 0); } static void test3_4(void) { /* linear tiling to intel */ test3_base(0, tile_intel_y); } static void test3_5(void) { /* linear to linear */ test3_base(0, 0); } /* Acquire when == SEQUENCE */ #define SEMA_ACQUIRE_EQUAL 1 /* Release, and write a 16 byte query structure to sema: * { (uint32)seq, (uint32)0, (uint64)timestamp } */ #define SEMA_WRITE_LONG 2 /* Acquire when >= SEQUENCE */ #define SEMA_ACQUIRE_GEQUAL 4 /* Test only new style semaphores, old ones are AWFUL */ static void test_semaphore(void) { drm_intel_bo *test_intel_bo = NULL; struct nouveau_bo *sema_bo = NULL; int prime_fd; uint32_t *sema; struct nouveau_pushbuf *push = npush; igt_skip_on(ndev->chipset < 0x84); /* Should probably be kept in sysmem */ test_intel_bo = drm_intel_bo_alloc(bufmgr, "semaphore bo", 4096, 4096); igt_assert(test_intel_bo); drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd); igt_assert_lte(0, prime_fd); igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &sema_bo) == 0); close(prime_fd); igt_assert(drm_intel_gem_bo_map_gtt(test_intel_bo) == 0); sema = test_intel_bo->virtual; sema++; *sema = 0; igt_assert(nouveau_pushbuf_space(push, 64, 0, 0) == 0); igt_assert(nouveau_pushbuf_refn(push, &(struct nouveau_pushbuf_refn) { sema_bo, NOUVEAU_BO_GART|NOUVEAU_BO_RDWR }, 1) == 0); if (ndev->chipset < 0xc0) { struct nv04_fifo *nv04_fifo = nchannel->data; /* kernel binds it's own dma object here and overwrites old one, * so just rebind vram every time we submit */ BEGIN_NV04(npush, SUBC_COPY(0x0060), 1); PUSH_DATA(npush, nv04_fifo->vram); } BEGIN_NVXX(push, SUBC_COPY(0x0010), 4); PUSH_DATA(push, sema_bo->offset >> 32); PUSH_DATA(push, sema_bo->offset + 4); PUSH_DATA(push, 2); // SEQUENCE PUSH_DATA(push, SEMA_WRITE_LONG); // TRIGGER BEGIN_NVXX(push, SUBC_COPY(0x0018), 2); PUSH_DATA(push, 3); PUSH_DATA(push, SEMA_ACQUIRE_EQUAL); BEGIN_NVXX(push, SUBC_COPY(0x0018), 2); PUSH_DATA(push, 4); PUSH_DATA(push, SEMA_WRITE_LONG); BEGIN_NVXX(push, SUBC_COPY(0x0018), 2); PUSH_DATA(push, 5); PUSH_DATA(push, SEMA_ACQUIRE_GEQUAL); BEGIN_NVXX(push, SUBC_COPY(0x0018), 2); PUSH_DATA(push, 6); PUSH_DATA(push, SEMA_WRITE_LONG); BEGIN_NVXX(push, SUBC_COPY(0x0018), 2); PUSH_DATA(push, 7); PUSH_DATA(push, SEMA_ACQUIRE_GEQUAL); BEGIN_NVXX(push, SUBC_COPY(0x0018), 2); PUSH_DATA(push, 9); PUSH_DATA(push, SEMA_WRITE_LONG); nouveau_pushbuf_kick(push, push->channel); usleep(1000); igt_assert(*sema == 2); *sema = 3; usleep(1000); igt_assert(*sema == 4); *sema = 5; usleep(1000); igt_assert(*sema == 6); *sema = 8; usleep(1000); igt_assert(*sema == 9); nouveau_bo_ref(NULL, &sema_bo); drm_intel_bo_unreference(test_intel_bo); } igt_main { igt_fixture { find_and_open_devices(); igt_require(nouveau_fd != -1); igt_require(intel_fd != -1); /* set up intel bufmgr */ bufmgr = drm_intel_bufmgr_gem_init(intel_fd, 4096); igt_assert(bufmgr); /* Do not enable reuse, we share (almost) all buffers. */ //drm_intel_bufmgr_gem_enable_reuse(bufmgr); /* set up nouveau bufmgr */ init_nouveau(); /* set up an intel batch buffer */ devid = intel_get_drm_devid(intel_fd); batch = intel_batchbuffer_alloc(bufmgr, devid); igt_assert(batch); } #define xtest(x, args...) \ igt_subtest( #x ) \ (x)(args); xtest(test1_macro); xtest(test1_micro); //xtest(test1_swizzle); xtest(test2); xtest(test3_1); xtest(test3_2); xtest(test3_3); xtest(test3_4); xtest(test3_5); xtest(test_semaphore); igt_fixture { nouveau_bo_ref(NULL, &query_bo); nouveau_object_del(&pcopy); nouveau_bufctx_del(&nbufctx); nouveau_pushbuf_del(&npush); nouveau_object_del(&nchannel); intel_batchbuffer_free(batch); nouveau_client_del(&nclient); nouveau_device_del(&ndev); drm_intel_bufmgr_destroy(bufmgr); close(intel_fd); close(nouveau_fd); } } intel-gpu-tools-1.14/tests/Makefile.sources0000644000175000017500000001243712665336131015723 00000000000000NOUVEAU_TESTS_M = \ prime_nv_api \ prime_nv_pcopy \ prime_nv_test \ $(NULL) VC4_TESTS_M = \ vc4_create_bo \ vc4_wait_bo \ vc4_wait_seqno \ $(NULL) TESTS_progs_M = \ core_get_client_auth \ drv_getparams_basic \ drv_suspend \ drv_hangman \ gem_bad_reloc \ gem_basic \ gem_busy \ gem_caching \ gem_close_race \ gem_concurrent_blit \ gem_concurrent_all \ gem_create \ gem_cs_tlb \ gem_ctx_param_basic \ gem_ctx_bad_exec \ gem_ctx_exec \ gem_dummy_reloc_loop \ gem_eio \ gem_evict_alignment \ gem_evict_everything \ gem_exec_alignment \ gem_exec_bad_domains \ gem_exec_basic \ gem_exec_faulting_reloc \ gem_exec_nop \ gem_exec_params \ gem_exec_parse \ gem_exec_reloc \ gem_fenced_exec_thrash \ gem_fence_thrash \ gem_fence_upload \ gem_flink_basic \ gem_flink_race \ gem_linear_blits \ gem_madvise \ gem_mmap \ gem_mmap_gtt \ gem_mmap_wc \ gem_partial_pwrite_pread \ gem_persistent_relocs \ gem_pipe_control_store_loop \ gem_ppgtt \ gem_pread \ gem_pread_after_blit \ gem_pwrite \ gem_pwrite_pread \ gem_pwrite_snooped \ gem_readwrite \ gem_read_read_speed \ gem_reloc_overflow \ gem_reloc_vs_gpu \ gem_render_copy_redux \ gem_request_retire \ gem_reset_stats \ gem_ringfill \ gem_set_tiling_vs_blt \ gem_softpin \ gem_stolen \ gem_storedw_batches_loop \ gem_streaming_writes \ gem_tiled_blits \ gem_tiled_partial_pwrite_pread \ gem_userptr_blits \ gem_write_read_ring_switch \ kms_addfb_basic \ kms_atomic \ kms_chv_cursor_fail \ kms_cursor_crc \ kms_draw_crc \ kms_fbc_crc \ kms_fbcon_fbt \ kms_flip \ kms_flip_event_leak \ kms_flip_tiling \ kms_frontbuffer_tracking \ kms_legacy_colorkey \ kms_mmio_vs_cs_flip \ kms_pipe_b_c_ivb \ kms_pipe_crc_basic \ kms_plane \ kms_psr_sink_crc \ kms_render \ kms_rotation_crc \ kms_setmode \ kms_universal_plane \ kms_vblank \ kms_crtc_background_color \ kms_plane_scaling \ kms_panel_fitting \ pm_backlight \ pm_lpsp \ pm_rpm \ pm_rps \ pm_rc6_residency \ pm_sseu \ prime_mmap \ prime_mmap_coherency \ prime_self_import \ template \ $(NULL) TESTS_progs = \ core_auth \ core_getclient \ core_getstats \ core_getversion \ core_prop_blob \ core_setmaster_vs_auth \ drm_import_export \ drm_read \ drm_vma_limiter \ drm_vma_limiter_cached \ drm_vma_limiter_cpu \ drm_vma_limiter_gtt \ gem_bad_length \ gem_cpu_reloc \ gem_cs_prefetch \ gem_ctx_bad_destroy \ gem_ctx_basic \ gem_ctx_create \ gem_ctx_thrash \ gem_double_irq_loop \ gem_exec_big \ gem_exec_blt \ gem_exec_lut_handle \ gem_fd_exhaustion \ gem_gtt_cpu_tlb \ gem_gtt_hog \ gem_gtt_speed \ gem_hangcheck_forcewake \ gem_largeobject \ gem_lut_handle \ gem_mmap_offset_exhaustion \ gem_media_fill \ gem_gpgpu_fill \ gem_pin \ gem_reg_read \ gem_render_copy \ gem_render_linear_blits \ gem_render_tiled_blits \ gem_ring_sync_copy \ gem_ring_sync_loop \ gem_multi_bsd_sync_loop \ gem_seqno_wrap \ gem_set_tiling_vs_gtt \ gem_set_tiling_vs_pwrite \ gem_storedw_loop \ gem_sync \ gem_threaded_access_tiled \ gem_tiled_fence_blits \ gem_tiled_pread_basic \ gem_tiled_pread_pwrite \ gem_tiled_swapping \ gem_tiled_wb \ gem_tiled_wc \ gem_tiling_max_stride \ gem_unfence_active_buffers \ gem_unref_active_buffers \ gem_wait \ gem_workarounds \ gen3_mixed_blits \ gen3_render_linear_blits \ gen3_render_mixed_blits \ gen3_render_tiledx_blits \ gen3_render_tiledy_blits \ gen7_forcewake_mt \ kms_3d \ kms_fence_pin_leak \ kms_force_connector_basic \ kms_mmap_write_crc \ kms_pwrite_crc \ kms_sink_crc_basic \ prime_udl \ $(NULL) # IMPORTANT: The ZZ_ tests need to be run last! # ... and make can't deal with inlined comments ... TESTS_scripts_M = \ $(NULL) TESTS_scripts = \ debugfs_emon_crash \ drv_debugfs_reader \ drv_missed_irq_hang \ drv_module_reload_basic \ kms_sysfs_edid_timing \ sysfs_l3_parity \ test_rte_check \ tools_test \ $(NULL) # This target contains testcases which support automagic subtest enumeration # from the piglit testrunner with --list-subtests and running individual # subtests with --run-subtest # # Your testcase should probably use an igt_main and igt_fixture and should have # a pile of igt_subtest blocks. multi_kernel_tests = \ $(TESTS_progs_M) \ $(TESTS_scripts_M) \ $(NULL) # This target is for simple testcase which don't expose any subtest. # # Your testcase should probably use igt_simple_main, but none of the other magic # blocks like igt_fixture or igt_subtest. single_kernel_tests = \ $(TESTS_progs) \ $(TESTS_scripts) \ $(NULL) kernel_tests = \ $(single_kernel_tests) \ $(multi_kernel_tests) \ $(NULL) # Test that exercise specific asserts in the test framework library and are # hence expected to fail. XFAIL_TESTS = \ igt_no_exit \ igt_no_exit_list_only \ igt_no_subtest \ $(NULL) # IMPORTANT: These tests here are all disabled because the result in sometime # unrecoverable gpu hangs. Don't put real testcases here. HANG = \ gem_bad_batch \ gem_hang \ gem_bad_blit \ gem_bad_address \ gem_non_secure_batch \ $(NULL) scripts = \ check_drm_clients \ ddx_intel_after_fbdev \ debugfs_wedged \ drm_lib.sh \ $(NULL) IMAGES = pass.png 1080p-left.png 1080p-right.png testdisplay_SOURCES = \ testdisplay.c \ testdisplay.h \ testdisplay_hotplug.c \ $(NULL) TESTS_progs += testdisplay common_files = \ eviction_common.c \ $(NULL) intel-gpu-tools-1.14/tests/gem_cs_tlb.c0000644000175000017500000001016612665336131015040 00000000000000/* * Copyright © 2011,2012 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * Daniel Vetter * */ /* * Testcase: Check whether we correctly invalidate the cs tlb * * Motivated by a strange bug on launchpad where *acth != ipehr, on snb notably * where everything should be coherent by default. * * https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1063252 */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include IGT_TEST_DESCRIPTION("Check whether we correctly invalidate the cs tlb."); #define LOCAL_I915_EXEC_VEBOX (4<<0) #define EXEC_OBJECT_PINNED (1<<4) #define BATCH_SIZE (1024*1024) static bool has_softpin(int fd) { struct drm_i915_getparam gp; int val = 0; memset(&gp, 0, sizeof(gp)); gp.param = 37; /* I915_PARAM_HAS_EXEC_SOFTPIN */ gp.value = &val; if (drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp)) return 0; errno = 0; return (val == 1); } static void * mmap_coherent(int fd, uint32_t handle, int size) { int domain; void *ptr; if (gem_has_llc(fd) || !gem_mmap__has_wc(fd)) { domain = I915_GEM_DOMAIN_CPU; ptr = gem_mmap__cpu(fd, handle, 0, size, PROT_WRITE); } else { domain = I915_GEM_DOMAIN_GTT; ptr = gem_mmap__wc(fd, handle, 0, size, PROT_WRITE); } gem_set_domain(fd, handle, domain, domain); return ptr; } static void run_on_ring(int fd, unsigned ring_id, const char *ring_name) { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 execobj; struct { uint32_t handle; uint32_t *batch; } obj[2]; unsigned i; char buf[100]; gem_require_ring(fd, ring_id); igt_require(has_softpin(fd)); for (i = 0; i < 2; i++) { obj[i].handle = gem_create(fd, BATCH_SIZE); obj[i].batch = mmap_coherent(fd, obj[i].handle, BATCH_SIZE); memset(obj[i].batch, 0xff, BATCH_SIZE); } memset(&execobj, 0, sizeof(execobj)); execobj.handle = obj[0].handle; obj[0].batch[0] = MI_BATCH_BUFFER_END; memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)&execobj; execbuf.buffer_count = 1; execbuf.flags = ring_id; /* Execute once to allocate a gtt-offset */ gem_execbuf(fd, &execbuf); execobj.flags = EXEC_OBJECT_PINNED; sprintf(buf, "Testing %s cs tlb coherency: ", ring_name); for (i = 0; i < BATCH_SIZE/64; i++) { execobj.handle = obj[i&1].handle; obj[i&1].batch[i*64/4] = MI_BATCH_BUFFER_END; execbuf.batch_start_offset = i*64; gem_execbuf(fd, &execbuf); } for (i = 0; i < 2; i++) { gem_close(fd, obj[i].handle); munmap(obj[i].batch, BATCH_SIZE); } } igt_main { const struct intel_execution_engine *e; int fd = -1; igt_skip_on_simulation(); igt_fixture fd = drm_open_driver(DRIVER_INTEL); for (e = intel_execution_engines; e->name; e++) igt_subtest_f("%s%s", e->exec_id ? "" : "basic-", e->name) run_on_ring(fd, e->exec_id | e->flags, e->name); igt_fixture close(fd); } intel-gpu-tools-1.14/tests/gem_fence_upload.c0000644000175000017500000002570112665336131016217 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "igt.h" #include #include #include #include #include #include #include #include #include #include "drm.h" #include "i915_drm.h" #define OBJECT_SIZE (1024*1024) /* restricted to 1MiB alignment on i915 fences */ static double elapsed(const struct timeval *start, const struct timeval *end) { return (end->tv_sec - start->tv_sec) + 1e-6*(end->tv_usec - start->tv_usec); } static void performance(void) { int n, loop, count; int fd, num_fences; double linear[2], tiled[2]; fd = drm_open_driver(DRIVER_INTEL); num_fences = gem_available_fences(fd); igt_require(num_fences > 0); for (count = 2; count < 4*num_fences; count *= 2) { struct timeval start, end; uint32_t handle[count]; void *ptr[count]; for (n = 0; n < count; n++) { handle[n] = gem_create(fd, OBJECT_SIZE); ptr[n] = gem_mmap__gtt(fd, handle[n], OBJECT_SIZE, PROT_READ | PROT_WRITE); } gettimeofday(&start, NULL); for (loop = 0; loop < 1024; loop++) { for (n = 0; n < count; n++) memset(ptr[n], 0, OBJECT_SIZE); } gettimeofday(&end, NULL); linear[count != 2] = count * loop / elapsed(&start, &end); igt_info("Upload rate for %d linear surfaces: %7.3fMiB/s\n", count, linear[count != 2]); for (n = 0; n < count; n++) gem_set_tiling(fd, handle[n], I915_TILING_X, 1024); gettimeofday(&start, NULL); for (loop = 0; loop < 1024; loop++) { for (n = 0; n < count; n++) memset(ptr[n], 0, OBJECT_SIZE); } gettimeofday(&end, NULL); tiled[count != 2] = count * loop / elapsed(&start, &end); igt_info("Upload rate for %d tiled surfaces: %7.3fMiB/s\n", count, tiled[count != 2]); for (n = 0; n < count; n++) { munmap(ptr[n], OBJECT_SIZE); gem_close(fd, handle[n]); } } errno = 0; igt_assert(linear[1] > 0.75 * linear[0]); igt_assert(tiled[1] > 0.75 * tiled[0]); } struct thread_performance { pthread_t thread; int id, count, direction, loops; void **ptr; }; static void *read_thread_performance(void *closure) { struct thread_performance *t = closure; uint32_t x = 0; int n, m; for (n = 0; n < t->loops; n++) { uint32_t *src = t->ptr[rand() % t->count]; src += (rand() % 256) * 4096 / 4; for (m = 0; m < 4096/4; m++) x += src[m]; } return (void *)(uintptr_t)x; } static void *write_thread_performance(void *closure) { struct thread_performance *t = closure; int n; for (n = 0; n < t->loops; n++) { uint32_t *dst = t->ptr[rand() % t->count]; dst += (rand() % 256) * 4096 / 4; memset(dst, 0, 4096); } return NULL; } #define READ (1<<0) #define WRITE (1<<1) static const char *direction_string(unsigned mask) { switch (mask) { case READ: return "Download"; case WRITE: return "Upload"; case READ | WRITE: return "Combined"; default: return "Unknown"; } } static void thread_performance(unsigned mask) { const int loops = 4096; int n, count; int fd, num_fences; double linear[2], tiled[2]; fd = drm_open_driver(DRIVER_INTEL); num_fences = gem_available_fences(fd); igt_require(num_fences > 0); for (count = 2; count < 4*num_fences; count *= 2) { const int nthreads = (mask & READ ? count : 0) + (mask & WRITE ? count : 0); struct timeval start, end; struct thread_performance readers[count]; struct thread_performance writers[count]; uint32_t handle[count]; void *ptr[count]; for (n = 0; n < count; n++) { handle[n] = gem_create(fd, OBJECT_SIZE); ptr[n] = gem_mmap__gtt(fd, handle[n], OBJECT_SIZE, PROT_READ | PROT_WRITE); if (mask & READ) { readers[n].id = n; readers[n].direction = READ; readers[n].ptr = ptr; readers[n].count = count; readers[n].loops = loops; } if (mask & WRITE) { writers[n].id = count - n - 1; writers[n].direction = WRITE; writers[n].ptr = ptr; writers[n].count = count; writers[n].loops = loops; } } gettimeofday(&start, NULL); for (n = 0; n < count; n++) { if (mask & READ) pthread_create(&readers[n].thread, NULL, read_thread_performance, &readers[n]); if (mask & WRITE) pthread_create(&writers[n].thread, NULL, write_thread_performance, &writers[n]); } for (n = 0; n < count; n++) { if (mask & READ) pthread_join(readers[n].thread, NULL); if (mask & WRITE) pthread_join(writers[n].thread, NULL); } gettimeofday(&end, NULL); linear[count != 2] = nthreads * loops / elapsed(&start, &end) / (OBJECT_SIZE / 4096); igt_info("%s rate for %d linear surfaces, %d threads: %7.3fMiB/s\n", direction_string(mask), count, nthreads, linear[count != 2]); for (n = 0; n < count; n++) gem_set_tiling(fd, handle[n], I915_TILING_X, 1024); gettimeofday(&start, NULL); for (n = 0; n < count; n++) { if (mask & READ) pthread_create(&readers[n].thread, NULL, read_thread_performance, &readers[n]); if (mask & WRITE) pthread_create(&writers[n].thread, NULL, write_thread_performance, &writers[n]); } for (n = 0; n < count; n++) { if (mask & READ) pthread_join(readers[n].thread, NULL); if (mask & WRITE) pthread_join(writers[n].thread, NULL); } gettimeofday(&end, NULL); tiled[count != 2] = nthreads * loops / elapsed(&start, &end) / (OBJECT_SIZE / 4096); igt_info("%s rate for %d tiled surfaces, %d threads: %7.3fMiB/s\n", direction_string(mask), count, nthreads, tiled[count != 2]); for (n = 0; n < count; n++) { munmap(ptr[n], OBJECT_SIZE); gem_close(fd, handle[n]); } } errno = 0; igt_assert(linear[1] > 0.75 * linear[0]); igt_assert(tiled[1] > 0.75 * tiled[0]); } struct thread_contention { pthread_t thread; uint32_t handle; int loops, fd; }; static void *no_contention(void *closure) { struct thread_contention *t = closure; int n; for (n = 0; n < t->loops; n++) { uint32_t *ptr = gem_mmap__gtt(t->fd, t->handle, OBJECT_SIZE, PROT_READ | PROT_WRITE); memset(ptr + (rand() % 256) * 4096 / 4, 0, 4096); munmap(ptr, OBJECT_SIZE); } return NULL; } static void *wc_mmap(void *closure) { struct thread_contention *t = closure; int n; for (n = 0; n < t->loops; n++) { uint32_t *ptr = gem_mmap__wc(t->fd, t->handle, 0, OBJECT_SIZE, PROT_READ | PROT_WRITE); memset(ptr + (rand() % 256) * 4096 / 4, 0, 4096); munmap(ptr, OBJECT_SIZE); } return NULL; } static void thread_contention(void) { const int loops = 4096; int n, count; int fd, num_fences; double linear[2], tiled[2]; fd = drm_open_driver(DRIVER_INTEL); num_fences = gem_available_fences(fd); igt_require(num_fences > 0); for (count = 1; count < 4*num_fences; count *= 2) { struct timeval start, end; struct thread_contention threads[count]; for (n = 0; n < count; n++) { threads[n].handle = gem_create(fd, OBJECT_SIZE); threads[n].loops = loops; threads[n].fd = fd; } gettimeofday(&start, NULL); for (n = 0; n < count; n++) pthread_create(&threads[n].thread, NULL, no_contention, &threads[n]); for (n = 0; n < count; n++) pthread_join(threads[n].thread, NULL); gettimeofday(&end, NULL); linear[count != 2] = count * loops / elapsed(&start, &end) / (OBJECT_SIZE / 4096); igt_info("Contended upload rate for %d linear threads: %7.3fMiB/s\n", count, linear[count != 2]); for (n = 0; n < count; n++) gem_set_tiling(fd, threads[n].handle, I915_TILING_X, 1024); gettimeofday(&start, NULL); for (n = 0; n < count; n++) pthread_create(&threads[n].thread, NULL, no_contention, &threads[n]); for (n = 0; n < count; n++) pthread_join(threads[n].thread, NULL); gettimeofday(&end, NULL); tiled[count != 2] = count * loops / elapsed(&start, &end) / (OBJECT_SIZE / 4096); igt_info("Contended upload rate for %d tiled threads: %7.3fMiB/s\n", count, tiled[count != 2]); for (n = 0; n < count; n++) { gem_close(fd, threads[n].handle); } } errno = 0; igt_assert(linear[1] > 0.75 * linear[0]); igt_assert(tiled[1] > 0.75 * tiled[0]); } static void wc_contention(void) { const int loops = 4096; int n, count; int fd, num_fences; double linear[2], tiled[2]; fd = drm_open_driver(DRIVER_INTEL); gem_require_mmap_wc(fd); num_fences = gem_available_fences(fd); igt_require(num_fences > 0); for (count = 1; count < 4*num_fences; count *= 2) { struct timeval start, end; struct thread_contention threads[count]; for (n = 0; n < count; n++) { threads[n].handle = gem_create(fd, OBJECT_SIZE); threads[n].loops = loops; threads[n].fd = fd; } gettimeofday(&start, NULL); for (n = 0; n < count; n++) pthread_create(&threads[n].thread, NULL, wc_mmap, &threads[n]); for (n = 0; n < count; n++) pthread_join(threads[n].thread, NULL); gettimeofday(&end, NULL); linear[count != 2] = count * loops / elapsed(&start, &end) / (OBJECT_SIZE / 4096); igt_info("Contended upload rate for %d linear threads/wc: %7.3fMiB/s\n", count, linear[count != 2]); for (n = 0; n < count; n++) gem_set_tiling(fd, threads[n].handle, I915_TILING_X, 1024); gettimeofday(&start, NULL); for (n = 0; n < count; n++) pthread_create(&threads[n].thread, NULL, wc_mmap, &threads[n]); for (n = 0; n < count; n++) pthread_join(threads[n].thread, NULL); gettimeofday(&end, NULL); tiled[count != 2] = count * loops / elapsed(&start, &end) / (OBJECT_SIZE / 4096); igt_info("Contended upload rate for %d tiled threads/wc: %7.3fMiB/s\n", count, tiled[count != 2]); for (n = 0; n < count; n++) { gem_close(fd, threads[n].handle); } } errno = 0; igt_assert(linear[1] > 0.75 * linear[0]); igt_assert(tiled[1] > 0.75 * tiled[0]); } igt_main { igt_skip_on_simulation(); igt_subtest("performance") performance(); igt_subtest("thread-contention") thread_contention(); igt_subtest("wc-contention") wc_contention(); igt_subtest("thread-performance-read") thread_performance(READ); igt_subtest("thread-performance-write") thread_performance(WRITE); igt_subtest("thread-performance-both") thread_performance(READ | WRITE); } intel-gpu-tools-1.14/tests/prime_udl.c0000644000175000017500000000704512665336131014724 00000000000000/* basic set of prime tests between intel and nouveau */ /* test list - 1. share buffer from intel -> nouveau. 2. share buffer from nouveau -> intel 3. share intel->nouveau, map on both, write intel, read nouveau 4. share intel->nouveau, blit intel fill, readback on nouveau test 1 + map buffer, read/write, map other size. do some hw actions on the buffer some illegal operations - close prime fd try and map TODO add some nouveau rendering tests */ #include "igt.h" #include #include #include #include #include #include #include #include #include "xf86drm.h" #include #include "intel_bufmgr.h" int intel_fd = -1, udl_fd = -1; drm_intel_bufmgr *bufmgr; uint32_t devid; struct intel_batchbuffer *intel_batch; #define BO_SIZE (640*480*2) static int find_and_open_devices(void) { int i; char path[80]; struct stat buf; FILE *fl; char vendor_id[8]; int venid; for (i = 0; i < 9; i++) { sprintf(path, "/sys/class/drm/card%d/device/vendor", i); if (stat(path, &buf)) { /* look for usb dev */ sprintf(path, "/sys/class/drm/card%d/device/idVendor", i); if (stat(path, &buf)) break; } fl = fopen(path, "r"); if (!fl) break; igt_assert(fgets(vendor_id, 8, fl) != NULL); fclose(fl); venid = strtoul(vendor_id, NULL, 16); sprintf(path, "/dev/dri/card%d", i); if (venid == 0x8086) { intel_fd = open(path, O_RDWR); if (!intel_fd) return -1; } else if (venid == 0x17e9) { udl_fd = open(path, O_RDWR); if (!udl_fd) return -1; } } return 0; } static int dumb_bo_destroy(int fd, uint32_t handle) { struct drm_mode_destroy_dumb arg; int ret; memset(&arg, 0, sizeof(arg)); arg.handle = handle; ret = drmIoctl(fd, DRM_IOCTL_MODE_DESTROY_DUMB, &arg); if (ret) return -errno; return 0; } /* * simple share and import */ static int test1(void) { drm_intel_bo *test_intel_bo; int prime_fd; int ret; uint32_t udl_handle; test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096); drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd); ret = drmPrimeFDToHandle(udl_fd, prime_fd, &udl_handle); dumb_bo_destroy(udl_fd, udl_handle); drm_intel_bo_unreference(test_intel_bo); return ret; } static int test2(void) { drm_intel_bo *test_intel_bo; uint32_t fb_id; drmModeClip clip; int prime_fd; uint32_t udl_handle; int ret; test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096); drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd); ret = drmPrimeFDToHandle(udl_fd, prime_fd, &udl_handle); if (ret) goto out; ret = drmModeAddFB(udl_fd, 640, 480, 16, 16, 640, udl_handle, &fb_id); if (ret) goto out; clip.x1 = 0; clip.y1 = 0; clip.x2 = 10; clip.y2 = 10; ret = drmModeDirtyFB(udl_fd, fb_id, &clip, 1); if (ret) { return ret; } out: dumb_bo_destroy(udl_fd, udl_handle); drm_intel_bo_unreference(test_intel_bo); return ret; } igt_simple_main { igt_skip_on_simulation(); igt_assert(find_and_open_devices() >= 0); igt_skip_on(udl_fd == -1); igt_skip_on(intel_fd == -1); /* set up intel bufmgr */ bufmgr = drm_intel_bufmgr_gem_init(intel_fd, 4096); drm_intel_bufmgr_gem_enable_reuse(bufmgr); /* set up an intel batch buffer */ devid = intel_get_drm_devid(intel_fd); intel_batch = intel_batchbuffer_alloc(bufmgr, devid); /* create an object on the i915 */ igt_assert(test1() == 0); igt_assert(test2() == 0); intel_batchbuffer_free(intel_batch); drm_intel_bufmgr_destroy(bufmgr); close(intel_fd); close(udl_fd); } intel-gpu-tools-1.14/tests/kms_mmap_write_crc.c0000644000175000017500000002007412665336131016606 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Tiago Vignatti */ #include #include #include #include #include #include "drmtest.h" #include "igt_debugfs.h" #include "igt_kms.h" #include "intel_chipset.h" #include "ioctl_wrappers.h" #include "igt_aux.h" IGT_TEST_DESCRIPTION( "Use the display CRC support to validate mmap write to an already uncached future scanout buffer."); #define ROUNDS 10 typedef struct { int drm_fd; igt_display_t display; struct igt_fb fb[2]; igt_output_t *output; igt_plane_t *primary; enum pipe pipe; igt_crc_t ref_crc; igt_pipe_crc_t *pipe_crc; uint32_t devid; } data_t; static int ioctl_sync = true; int dma_buf_fd; static char *dmabuf_mmap_framebuffer(int drm_fd, struct igt_fb *fb) { char *ptr = NULL; dma_buf_fd = prime_handle_to_fd_for_mmap(drm_fd, fb->gem_handle); igt_skip_on(dma_buf_fd == -1 && errno == EINVAL); ptr = mmap(NULL, fb->size, PROT_READ | PROT_WRITE, MAP_SHARED, dma_buf_fd, 0); igt_assert(ptr != MAP_FAILED); return ptr; } static void test(data_t *data) { igt_display_t *display = &data->display; igt_output_t *output = data->output; struct igt_fb *fb = &data->fb[1]; drmModeModeInfo *mode; cairo_t *cr; char *ptr; uint32_t caching; void *buf; igt_crc_t crc; mode = igt_output_get_mode(output); /* create a non-white fb where we can write later */ igt_create_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, fb); ptr = dmabuf_mmap_framebuffer(data->drm_fd, fb); cr = igt_get_cairo_ctx(data->drm_fd, fb); igt_paint_test_pattern(cr, fb->width, fb->height); cairo_destroy(cr); /* flip to it to make it UC/WC and fully flushed */ igt_plane_set_fb(data->primary, fb); igt_display_commit(display); /* flip back the original white buffer */ igt_plane_set_fb(data->primary, &data->fb[0]); igt_display_commit(display); /* make sure caching mode has become UC/WT */ caching = gem_get_caching(data->drm_fd, fb->gem_handle); igt_assert(caching == I915_CACHING_NONE || caching == I915_CACHING_DISPLAY); /* * firstly demonstrate the need for DMA_BUF_SYNC_START ("begin_cpu_access") */ if (ioctl_sync) prime_sync_start(dma_buf_fd, true); /* use dmabuf pointer to make the other fb all white too */ buf = malloc(fb->size); igt_assert(buf != NULL); memset(buf, 0xff, fb->size); memcpy(ptr, buf, fb->size); free(buf); /* and flip to it */ igt_plane_set_fb(data->primary, fb); igt_display_commit(display); /* check that the crc is as expected, which requires that caches got flushed */ igt_pipe_crc_collect_crc(data->pipe_crc, &crc); igt_assert_crc_equal(&crc, &data->ref_crc); /* * now demonstrates the need for DMA_BUF_SYNC_END ("end_cpu_access") */ /* start over, writing non-white to the fb again and flip to it to make it * fully flushed */ cr = igt_get_cairo_ctx(data->drm_fd, fb); igt_paint_test_pattern(cr, fb->width, fb->height); cairo_destroy(cr); igt_plane_set_fb(data->primary, fb); igt_display_commit(display); /* sync start, to move to CPU domain */ if (ioctl_sync) prime_sync_start(dma_buf_fd, true); /* use dmabuf pointer in the same fb to make it all white */ buf = malloc(fb->size); igt_assert(buf != NULL); memset(buf, 0xff, fb->size); memcpy(ptr, buf, fb->size); free(buf); /* if we don't change to the GTT domain again, the whites won't get flushed * and therefore we demonstrates the need for sync end here */ if (ioctl_sync) prime_sync_end(dma_buf_fd, true); /* check that the crc is as expected, which requires that caches got flushed */ igt_pipe_crc_collect_crc(data->pipe_crc, &crc); igt_assert_crc_equal(&crc, &data->ref_crc); } static bool prepare_crtc(data_t *data) { igt_display_t *display = &data->display; igt_output_t *output = data->output; drmModeModeInfo *mode; /* select the pipe we want to use */ igt_output_set_pipe(output, data->pipe); igt_display_commit(display); if (!output->valid) { igt_output_set_pipe(output, PIPE_ANY); igt_display_commit(display); return false; } mode = igt_output_get_mode(output); /* create a white reference fb and flip to it */ igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, 1.0, 1.0, 1.0, &data->fb[0]); data->primary = igt_output_get_plane(output, IGT_PLANE_PRIMARY); igt_plane_set_fb(data->primary, &data->fb[0]); igt_display_commit(display); if (data->pipe_crc) igt_pipe_crc_free(data->pipe_crc); data->pipe_crc = igt_pipe_crc_new(data->pipe, INTEL_PIPE_CRC_SOURCE_AUTO); /* get reference crc for the white fb */ igt_pipe_crc_collect_crc(data->pipe_crc, &data->ref_crc); return true; } static void cleanup_crtc(data_t *data) { igt_display_t *display = &data->display; igt_output_t *output = data->output; igt_pipe_crc_free(data->pipe_crc); data->pipe_crc = NULL; igt_plane_set_fb(data->primary, NULL); igt_output_set_pipe(output, PIPE_ANY); igt_display_commit(display); igt_remove_fb(data->drm_fd, &data->fb[0]); igt_remove_fb(data->drm_fd, &data->fb[1]); } static void run_test(data_t *data) { igt_display_t *display = &data->display; igt_output_t *output; enum pipe pipe; for_each_connected_output(display, output) { data->output = output; for_each_pipe(display, pipe) { data->pipe = pipe; if (!prepare_crtc(data)) continue; test(data); cleanup_crtc(data); /* once is enough */ return; } } igt_skip("no valid crtc/connector combinations found\n"); } /** * fork_cpuhog_helper: * * Fork a child process that loops indefinitely to consume CPU. This is used to * fill the CPU caches with random information so they can get stalled, * provoking incoherency with the GPU most likely. */ static void fork_cpuhog_helper(void) { /* TODO: if the parent is about to die before its child, e.g. * igt_assert_crc_equal() fails, there will be a boring exit handler * waiting the child to exit also. A workaround is to simply disable that * handler, buy this needs to be fixed properly in an elegant way. */ igt_disable_exit_handler(); igt_fork(hog, 1) { while (1) { usleep(10); /* quite ramdom really. */ if ((int)getppid() == 1) /* Parent has died, so must we. */ exit(0); } } } static int opt_handler(int opt, int opt_index, void *data) { if (opt == 'n') { ioctl_sync = false; igt_info("set via cmd line to not use sync ioctls\n"); } return 0; } static data_t data; int main(int argc, char **argv) { int i; igt_simple_init_parse_opts(&argc, argv, "n", NULL, NULL, opt_handler, NULL); igt_skip_on_simulation(); igt_fixture { data.drm_fd = drm_open_driver_master(DRIVER_INTEL); data.devid = intel_get_drm_devid(data.drm_fd); kmstest_set_vt_graphics_mode(); igt_require_pipe_crc(); igt_display_init(&data.display, data.drm_fd); } igt_info("Using %d rounds for the test\n", ROUNDS); fork_cpuhog_helper(); for (i = 0; i < ROUNDS; i++) run_test(&data); igt_fixture { igt_display_fini(&data.display); } igt_exit(); } intel-gpu-tools-1.14/tests/kms_panel_fitting.c0000644000175000017500000001455712665336131016447 00000000000000/* * Copyright © 2013,2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include "igt.h" #include IGT_TEST_DESCRIPTION("Test display panel fitting"); typedef struct { uint32_t devid; int drm_fd; igt_display_t display; igt_crc_t ref_crc; igt_pipe_crc_t *pipe_crc; int image_w; int image_h; struct igt_fb fb1; struct igt_fb fb2; struct igt_fb fb3; int fb_id1; int fb_id2; int fb_id3; igt_plane_t *plane1; igt_plane_t *plane2; igt_plane_t *plane3; igt_plane_t *plane4; } data_t; #define FILE_NAME "1080p-left.png" static void prepare_crtc(data_t *data, igt_output_t *output, enum pipe pipe, igt_plane_t *plane, drmModeModeInfo *mode, enum igt_commit_style s) { igt_display_t *display = &data->display; igt_output_set_pipe(output, pipe); /* create the pipe_crc object for this pipe */ igt_pipe_crc_free(data->pipe_crc); data->pipe_crc = igt_pipe_crc_new(pipe, INTEL_PIPE_CRC_SOURCE_AUTO); /* before allocating, free if any older fb */ if (data->fb_id1) { igt_remove_fb(data->drm_fd, &data->fb1); data->fb_id1 = 0; } /* allocate fb for plane 1 */ data->fb_id1 = igt_create_pattern_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_I915_FORMAT_MOD_X_TILED, /* tiled */ &data->fb1); igt_assert(data->fb_id1); /* * We always set the primary plane to actually enable the pipe as * there's no way (that works) to light up a pipe with only a sprite * plane enabled at the moment. */ if (!plane->is_primary) { igt_plane_t *primary; primary = igt_output_get_plane(output, IGT_PLANE_PRIMARY); igt_plane_set_fb(primary, &data->fb1); } igt_plane_set_fb(plane, &data->fb1); if (s == COMMIT_LEGACY) { int ret; ret = drmModeSetCrtc(data->drm_fd, output->config.crtc->crtc_id, data->fb_id1, plane->pan_x, plane->pan_y, &output->id, 1, mode); igt_assert_eq(ret, 0); } else { igt_display_commit2(display, s); } } static void cleanup_crtc(data_t *data, igt_output_t *output, igt_plane_t *plane) { igt_display_t *display = &data->display; igt_pipe_crc_free(data->pipe_crc); data->pipe_crc = NULL; if (data->fb_id1) { igt_remove_fb(data->drm_fd, &data->fb1); data->fb_id1 = 0; } if (data->fb_id2) { igt_remove_fb(data->drm_fd, &data->fb2); data->fb_id2 = 0; } if (data->fb_id3) { igt_remove_fb(data->drm_fd, &data->fb3); data->fb_id3 = 0; } if (!plane->is_primary) { igt_plane_t *primary; primary = igt_output_get_plane(output, IGT_PLANE_PRIMARY); igt_plane_set_fb(primary, NULL); } igt_plane_set_fb(plane, NULL); igt_output_set_pipe(output, PIPE_ANY); igt_display_commit2(display, COMMIT_UNIVERSAL); } static void test_panel_fitting(data_t *d) { igt_display_t *display = &d->display; igt_output_t *output; cairo_surface_t *image; enum pipe pipe; int valid_tests = 0; for_each_connected_output(display, output) { drmModeModeInfo *mode, native_mode; igt_require(output->config.connector->connector_type == DRM_MODE_CONNECTOR_eDP); pipe = output->config.pipe; igt_output_set_pipe(output, pipe); mode = igt_output_get_mode(output); native_mode = *mode; /* allocate fb2 with image size */ image = cairo_image_surface_create_from_png(FILE_NAME); igt_assert(cairo_surface_status(image) == CAIRO_STATUS_SUCCESS); d->image_w = cairo_image_surface_get_width(image); d->image_h = cairo_image_surface_get_height(image); cairo_surface_destroy(image); d->fb_id2 = igt_create_image_fb(d->drm_fd, 0, 0, DRM_FORMAT_XRGB8888, LOCAL_I915_FORMAT_MOD_X_TILED, /* tiled */ FILE_NAME, &d->fb2); igt_assert(d->fb_id2); /* Set up display to enable panel fitting */ mode->hdisplay = 640; mode->vdisplay = 480; d->plane1 = igt_output_get_plane(output, IGT_PLANE_PRIMARY); prepare_crtc(d, output, pipe, d->plane1, mode, COMMIT_LEGACY); /* disable panel fitting */ prepare_crtc(d, output, pipe, d->plane1, &native_mode, COMMIT_LEGACY); /* enable panel fitting */ mode->hdisplay = 800; mode->vdisplay = 600; prepare_crtc(d, output, pipe, d->plane1, mode, COMMIT_LEGACY); /* disable panel fitting */ prepare_crtc(d, output, pipe, d->plane1, &native_mode, COMMIT_LEGACY); /* Set up fb2->plane2 mapping. */ d->plane2 = igt_output_get_plane(output, IGT_PLANE_2); igt_plane_set_fb(d->plane2, &d->fb2); /* enable sprite plane */ igt_fb_set_position(&d->fb2, d->plane2, 100, 100); igt_fb_set_size(&d->fb2, d->plane2, d->fb2.width-200, d->fb2.height-200); igt_plane_set_position(d->plane2, 100, 100); igt_plane_set_size(d->plane2, mode->hdisplay-200, mode->vdisplay-200); igt_display_commit2(display, COMMIT_UNIVERSAL); /* enable panel fitting along with sprite scaling */ mode->hdisplay = 1024; mode->vdisplay = 768; prepare_crtc(d, output, pipe, d->plane1, mode, COMMIT_LEGACY); /* back to single plane mode */ igt_plane_set_fb(d->plane2, NULL); igt_display_commit2(display, COMMIT_UNIVERSAL); valid_tests++; cleanup_crtc(d, output, d->plane1); } igt_require_f(valid_tests, "no valid crtc/connector combinations found\n"); } igt_simple_main { data_t data = {}; igt_skip_on_simulation(); data.drm_fd = drm_open_driver(DRIVER_INTEL); igt_require_pipe_crc(); igt_display_init(&data.display, data.drm_fd); data.devid = intel_get_drm_devid(data.drm_fd); test_panel_fitting(&data); igt_display_fini(&data.display); } intel-gpu-tools-1.14/tests/kms_chv_cursor_fail.c0000644000175000017500000002634312665336131016770 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include "igt.h" #include #include #include #include #include IGT_TEST_DESCRIPTION("Exercise CHV pipe C cursor fail"); #ifndef DRM_CAP_CURSOR_WIDTH #define DRM_CAP_CURSOR_WIDTH 0x8 #endif #ifndef DRM_CAP_CURSOR_HEIGHT #define DRM_CAP_CURSOR_HEIGHT 0x9 #endif typedef struct { int drm_fd; igt_display_t display; struct igt_fb primary_fb; struct igt_fb fb; igt_output_t *output; enum pipe pipe; igt_crc_t ref_crc; int curw, curh; /* cursor size */ igt_pipe_crc_t *pipe_crc; uint32_t devid; bool colored, jump, disable; int jump_x, jump_y; } data_t; enum { EDGE_LEFT = 0x1, EDGE_RIGHT = 0x2, EDGE_TOP = 0x4, EDGE_BOTTOM = 0x8, }; static void cursor_disable(data_t *data) { igt_output_t *output = data->output; igt_plane_t *cursor; cursor = igt_output_get_plane(output, IGT_PLANE_CURSOR); igt_plane_set_fb(cursor, NULL); } static void create_cursor_fb(data_t *data, int cur_w, int cur_h) { cairo_t *cr; uint32_t fb_id; fb_id = igt_create_fb(data->drm_fd, cur_w, cur_h, DRM_FORMAT_ARGB8888, LOCAL_DRM_FORMAT_MOD_NONE, &data->fb); igt_assert(fb_id); cr = igt_get_cairo_ctx(data->drm_fd, &data->fb); if (data->colored) igt_paint_color_alpha(cr, 0, 0, data->fb.width, data->fb.height, 1.0, 0.0, 0.0, 1.0); else igt_paint_color_alpha(cr, 0, 0, data->fb.width, data->fb.height, 0.0, 0.0, 0.0, 0.0); igt_assert(cairo_status(cr) == 0); cairo_destroy(cr); } static void cursor_move(data_t *data, int x, int y, int i) { int crtc_id = data->output->config.crtc->crtc_id; igt_debug("[%d] x=%d, y=%d\n", i, x, y); /* * The "fixed" kernel will refuse the ioctl when pipe C cursor * would straddle the left screen edge (which is when the hw * fails). So let's accept a failure from the ioctl in that case. */ igt_assert(drmModeMoveCursor(data->drm_fd, crtc_id, x, y) == 0 || (IS_CHERRYVIEW(data->devid) && data->pipe == PIPE_C && x < 0 && x > -data->curw)); igt_wait_for_vblank(data->drm_fd, data->pipe); } #define XSTEP 8 #define YSTEP 32 #define XOFF 0 #define NCRC 128 static void test_edge_pos(data_t *data, int sx, int ex, int y, bool swap_axis) { igt_crc_t *crc = NULL; int i, n, x, xdir; if (sx > ex) xdir = -1; else xdir = 1; igt_pipe_crc_start(data->pipe_crc); i = 0; for (x = sx + XOFF; xdir * (x - ex - XOFF) <= 0; x += xdir * XSTEP) { int xx, yy; if (swap_axis) { xx = y; yy = x; } else { xx = x; yy = y; } if (data->jump) { cursor_move(data, data->jump_x, data->jump_y, i++); } if (data->disable) { cursor_move(data, -data->curw, -data->curh, i++); } cursor_move(data, xx, yy, i++); if (data->jump) { cursor_move(data, data->jump_x, data->jump_y, i++); } if (data->disable) { cursor_move(data, -data->curw, -data->curh, i++); } } n = igt_pipe_crc_get_crcs(data->pipe_crc, NCRC, &crc); igt_pipe_crc_stop(data->pipe_crc); if (!data->colored) { igt_debug("Checking CRCs: "); for (i = 0; i < n; i++) { igt_debug("[%d] ", i); igt_assert_crc_equal(&data->ref_crc, &crc[i]); } igt_debug("\n"); } igt_pipe_crc_start(data->pipe_crc); } static void test_edge(data_t *data, int sy, int ey, int sx, int ex, bool swap_axis) { int crtc_id = data->output->config.crtc->crtc_id; int y, ydir; if (sy > ey) ydir = -1; else ydir = 1; igt_assert_eq(drmModeMoveCursor(data->drm_fd, crtc_id, -data->curw, -data->curh), 0); igt_assert_eq(drmModeSetCursor(data->drm_fd, crtc_id, data->fb.gem_handle, data->curw, data->curh), 0); for (y = sy; ydir * (y - ey) <= 0; ) { test_edge_pos(data, sx, ex, y, swap_axis); y += ydir * YSTEP; test_edge_pos(data, ex, sx, y, swap_axis); y += ydir * YSTEP; } igt_assert_eq(drmModeMoveCursor(data->drm_fd, crtc_id, -data->curw, -data->curh), 0); igt_assert_eq(drmModeSetCursor(data->drm_fd, crtc_id, 0, data->curw, data->curh), 0); } static void test_edges(data_t *data, unsigned int edges) { drmModeModeInfo *mode = igt_output_get_mode(data->output); if (edges & EDGE_LEFT) { test_edge(data, mode->vdisplay, -data->curh, -data->curw, 0, false); test_edge(data, -data->curh, mode->vdisplay, -data->curw, 0, false); } if (edges & EDGE_RIGHT) { test_edge(data, mode->vdisplay, -data->curh, mode->hdisplay - data->curw, mode->hdisplay, false); test_edge(data, -data->curh, mode->vdisplay, mode->hdisplay - data->curw, mode->hdisplay, false); } if (edges & EDGE_TOP) { test_edge(data, mode->hdisplay, -data->curw, -data->curh, 0, true); test_edge(data, -data->curw, mode->hdisplay, -data->curh, 0, true); } if (edges & EDGE_BOTTOM) { test_edge(data, mode->hdisplay, -data->curw, mode->vdisplay - data->curh, mode->vdisplay, true); test_edge(data, -data->curw, mode->hdisplay, mode->vdisplay - data->curh, mode->vdisplay, true); } } static bool prepare_crtc(data_t *data) { drmModeModeInfo *mode; igt_display_t *display = &data->display; igt_plane_t *primary; /* select the pipe we want to use */ igt_output_set_pipe(data->output, data->pipe); cursor_disable(data); igt_display_commit(display); if (!data->output->valid) { igt_output_set_pipe(data->output, PIPE_ANY); igt_display_commit(display); return false; } mode = igt_output_get_mode(data->output); igt_create_pattern_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, &data->primary_fb); primary = igt_output_get_plane(data->output, IGT_PLANE_PRIMARY); igt_plane_set_fb(primary, &data->primary_fb); igt_display_commit(display); data->jump_x = (mode->hdisplay - data->curw) / 2; data->jump_y = (mode->vdisplay - data->curh) / 2; /* create the pipe_crc object for this pipe */ if (data->pipe_crc) igt_pipe_crc_free(data->pipe_crc); data->pipe_crc = igt_pipe_crc_new_nonblock(data->pipe, INTEL_PIPE_CRC_SOURCE_AUTO); /* make sure cursor is disabled */ cursor_disable(data); igt_wait_for_vblank(data->drm_fd, data->pipe); /* get reference crc w/o cursor */ igt_pipe_crc_collect_crc(data->pipe_crc, &data->ref_crc); igt_pipe_crc_collect_crc(data->pipe_crc, &data->ref_crc); igt_pipe_crc_collect_crc(data->pipe_crc, &data->ref_crc); return true; } static void cleanup_crtc(data_t *data) { igt_display_t *display = &data->display; igt_plane_t *primary; igt_pipe_crc_free(data->pipe_crc); data->pipe_crc = NULL; igt_remove_fb(data->drm_fd, &data->primary_fb); primary = igt_output_get_plane(data->output, IGT_PLANE_PRIMARY); igt_plane_set_fb(primary, NULL); igt_output_set_pipe(data->output, PIPE_ANY); igt_display_commit(display); } static void test_crtc(data_t *data, unsigned int edges) { igt_display_t *display = &data->display; int valid_tests = 0; create_cursor_fb(data, data->curw, data->curh); for_each_connected_output(display, data->output) { if (!prepare_crtc(data)) continue; valid_tests++; igt_info("Beginning %s on pipe %s, connector %s\n", igt_subtest_name(), kmstest_pipe_name(data->pipe), igt_output_name(data->output)); test_edges(data, edges); igt_info("\n%s on pipe %s, connector %s: PASSED\n\n", igt_subtest_name(), kmstest_pipe_name(data->pipe), igt_output_name(data->output)); /* cleanup what prepare_crtc() has done */ cleanup_crtc(data); } igt_remove_fb(data->drm_fd, &data->fb); igt_require_f(valid_tests, "no valid crtc/connector combinations found\n"); } static int opt_handler(int opt, int opt_index, void *_data) { data_t *data = _data; switch (opt) { case 'c': data->colored = true; break; case 'd': data->disable = true; break; case 'j': data->jump = true; break; default: break; } return 0; } static data_t data; static uint64_t max_curw = 64, max_curh = 64; int main(int argc, char **argv) { static const struct option long_opts[] = { { .name = "colored", .val = 'c' }, { .name = "disable", .val = 'd'}, { .name = "jump", .val = 'j' }, {} }; static const char *help_str = " --colored\t\tUse a colored cursor (disables CRC checks)\n" " --disable\t\tDisable the cursor between each step\n" " --jump\t\tJump the cursor to middle of the screen between each step)\n"; igt_subtest_init_parse_opts(&argc, argv, "", long_opts, help_str, opt_handler, &data); igt_skip_on_simulation(); igt_fixture { int ret; data.drm_fd = drm_open_driver_master(DRIVER_INTEL); data.devid = intel_get_drm_devid(data.drm_fd); ret = drmGetCap(data.drm_fd, DRM_CAP_CURSOR_WIDTH, &max_curw); igt_assert(ret == 0 || errno == EINVAL); /* Not making use of cursor_height since it is same as width, still reading */ ret = drmGetCap(data.drm_fd, DRM_CAP_CURSOR_HEIGHT, &max_curh); igt_assert(ret == 0 || errno == EINVAL); kmstest_set_vt_graphics_mode(); igt_require_pipe_crc(); igt_display_init(&data.display, data.drm_fd); } for (data.curw = 64; data.curw <= 256; data.curw *= 2) { data.curh = data.curw; for (data.pipe = PIPE_A; data.pipe <= PIPE_C; data.pipe++) { igt_subtest_f("pipe-%s-%dx%d-left-edge", kmstest_pipe_name(data.pipe), data.curw, data.curh) { igt_require(data.pipe < data.display.n_pipes); igt_require(data.curw <= max_curw && data.curh <= max_curh); test_crtc(&data, EDGE_LEFT); } igt_subtest_f("pipe-%s-%dx%d-right-edge", kmstest_pipe_name(data.pipe), data.curw, data.curh) { igt_require(data.pipe < data.display.n_pipes); igt_require(data.curw <= max_curw && data.curh <= max_curh); test_crtc(&data, EDGE_RIGHT); } igt_subtest_f("pipe-%s-%dx%d-top-edge", kmstest_pipe_name(data.pipe), data.curw, data.curh) { igt_require(data.pipe < data.display.n_pipes); igt_require(data.curw <= max_curw && data.curh <= max_curh); test_crtc(&data, EDGE_TOP); } igt_subtest_f("pipe-%s-%dx%d-bottom-edge", kmstest_pipe_name(data.pipe), data.curw, data.curh) { igt_require(data.pipe < data.display.n_pipes); igt_require(data.curw <= max_curw && data.curh <= max_curh); test_crtc(&data, EDGE_BOTTOM); } } } igt_fixture igt_display_fini(&data.display); igt_exit(); } intel-gpu-tools-1.14/tests/debugfs_wedged0000755000175000017500000000046312665336131015461 00000000000000#!/bin/sh SOURCE_DIR="$( dirname "${BASH_SOURCE[0]}" )" . $SOURCE_DIR/drm_lib.sh # Testcase: wedge the hw to check the error_state reading # # Unfortunately wedged is permanent, so this test is not run by default echo 1 > ${i915_dfs_path}/i915_wedged cat $i915_dfs_path/i915_error_state > /dev/null 2>&1 intel-gpu-tools-1.14/tests/gem_bad_reloc.c0000644000175000017500000001466712665336131015516 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include "drm.h" IGT_TEST_DESCRIPTION("Simulates SNA behaviour using negative self-relocations" " for STATE_BASE_ADDRESS command packets."); #define USE_LUT (1 << 12) /* Simulates SNA behaviour using negative self-relocations for * STATE_BASE_ADDRESS command packets. If they wrap around (to values greater * than the total size of the GTT), the GPU will hang. * See https://bugs.freedesktop.org/show_bug.cgi?id=78533 */ static int negative_reloc(int fd, unsigned flags) { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 gem_exec[2]; struct drm_i915_gem_relocation_entry gem_reloc[1000]; uint64_t gtt_max = gem_aperture_size(fd); uint32_t buf[1024] = {MI_BATCH_BUFFER_END}; int i; #define BIAS (256*1024) igt_require(intel_gen(intel_get_drm_devid(fd)) >= 7); memset(gem_exec, 0, sizeof(gem_exec)); gem_exec[0].handle = gem_create(fd, 4096); gem_write(fd, gem_exec[0].handle, 0, buf, 8); gem_reloc[0].offset = 1024; gem_reloc[0].delta = 0; gem_reloc[0].target_handle = gem_exec[0].handle; gem_reloc[0].read_domains = I915_GEM_DOMAIN_COMMAND; gem_exec[1].handle = gem_create(fd, 4096); gem_write(fd, gem_exec[1].handle, 0, buf, 8); gem_exec[1].relocation_count = 1; gem_exec[1].relocs_ptr = (uintptr_t)gem_reloc; memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)gem_exec; execbuf.buffer_count = 2; execbuf.batch_len = 8; do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); gem_close(fd, gem_exec[1].handle); igt_info("Found offset %lld for 4k batch\n", (long long)gem_exec[0].offset); /* * Ideally we'd like to be able to control where the kernel is going to * place the buffer. We don't SKIP here because it causes the test * to "randomly" flip-flop between the SKIP and PASS states. */ if (gem_exec[0].offset < BIAS) { igt_info("Offset is below BIAS, not testing anything\n"); return 0; } memset(gem_reloc, 0, sizeof(gem_reloc)); for (i = 0; i < sizeof(gem_reloc)/sizeof(gem_reloc[0]); i++) { gem_reloc[i].offset = 8 + 4*i; gem_reloc[i].delta = -BIAS*i/1024; gem_reloc[i].target_handle = flags & USE_LUT ? 0 : gem_exec[0].handle; gem_reloc[i].read_domains = I915_GEM_DOMAIN_COMMAND; } gem_exec[0].relocation_count = sizeof(gem_reloc)/sizeof(gem_reloc[0]); gem_exec[0].relocs_ptr = (uintptr_t)gem_reloc; execbuf.buffer_count = 1; execbuf.flags = flags & USE_LUT; do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); igt_info("Batch is now at offset %lld\n", (long long)gem_exec[0].offset); gem_read(fd, gem_exec[0].handle, 0, buf, sizeof(buf)); gem_close(fd, gem_exec[0].handle); for (i = 0; i < sizeof(gem_reloc)/sizeof(gem_reloc[0]); i++) igt_assert(buf[2 + i] < gtt_max); return 0; } static int negative_reloc_blt(int fd) { const int gen = intel_gen(intel_get_drm_devid(fd)); struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 gem_exec[1024][2]; struct drm_i915_gem_relocation_entry gem_reloc; uint32_t buf[1024], *b; int i; memset(&gem_reloc, 0, sizeof(gem_reloc)); gem_reloc.offset = 4 * sizeof(uint32_t); gem_reloc.presumed_offset = ~0ULL; gem_reloc.delta = -4096; gem_reloc.target_handle = 0; gem_reloc.read_domains = I915_GEM_DOMAIN_RENDER; gem_reloc.write_domain = I915_GEM_DOMAIN_RENDER; for (i = 0; i < 1024; i++) { memset(gem_exec[i], 0, sizeof(gem_exec[i])); gem_exec[i][0].handle = gem_create(fd, 4096); gem_exec[i][0].flags = EXEC_OBJECT_NEEDS_FENCE; b = buf; *b++ = XY_COLOR_BLT_CMD_NOLEN | ((gen >= 8) ? 5 : 4) | COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB; *b++ = 0xf0 << 16 | 1 << 25 | 1 << 24 | 4096; *b++ = 1 << 16 | 0; *b++ = 2 << 16 | 1024; *b++ = ~0; if (gen >= 8) *b++ = ~0; *b++ = 0xc0ffee ^ i; *b++ = MI_BATCH_BUFFER_END; if ((b - buf) & 1) *b++ = 0; gem_exec[i][1].handle = gem_create(fd, 4096); gem_write(fd, gem_exec[i][1].handle, 0, buf, (b - buf) * sizeof(uint32_t)); gem_exec[i][1].relocation_count = 1; gem_exec[i][1].relocs_ptr = (uintptr_t)&gem_reloc; } memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffer_count = 2; execbuf.batch_len = (b - buf) * sizeof(uint32_t); execbuf.flags = USE_LUT; if (gen >= 6) execbuf.flags |= I915_EXEC_BLT; for (i = 0; i < 1024; i++) { execbuf.buffers_ptr = (uintptr_t)gem_exec[i]; gem_execbuf(fd, &execbuf); } for (i = 1024; i--;) { gem_read(fd, gem_exec[i][0].handle, i*sizeof(uint32_t), buf + i, sizeof(uint32_t)); gem_close(fd, gem_exec[i][0].handle); gem_close(fd, gem_exec[i][1].handle); } if (0) { for (i = 0; i < 1024; i += 8) igt_info("%08x %08x %08x %08x %08x %08x %08x %08x\n", buf[i + 0], buf[i + 1], buf[i + 2], buf[i + 3], buf[i + 4], buf[i + 5], buf[i + 6], buf[i + 7]); } for (i = 0; i < 1024; i++) igt_assert_eq(buf[i], 0xc0ffee ^ i); return 0; } int fd; igt_main { igt_fixture { fd = drm_open_driver(DRIVER_INTEL); } igt_subtest("negative-reloc") negative_reloc(fd, 0); igt_subtest("negative-reloc-lut") negative_reloc(fd, USE_LUT); igt_subtest("negative-reloc-blt") negative_reloc_blt(fd); igt_fixture { close(fd); } } intel-gpu-tools-1.14/tests/kms_crtc_background_color.c0000644000175000017500000001332712665336131020146 00000000000000/* * Copyright © 2013,2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include "igt.h" #include IGT_TEST_DESCRIPTION("Test crtc background color feature"); typedef struct { int gfx_fd; igt_display_t display; struct igt_fb fb; igt_crc_t ref_crc; igt_pipe_crc_t *pipe_crc; } data_t; #define BLACK 0x000000 /* BGR 8bpc */ #define CYAN 0xFFFF00 /* BGR 8bpc */ #define PURPLE 0xFF00FF /* BGR 8bpc */ #define WHITE 0xFFFFFF /* BGR 8bpc */ #define BLACK64 0x000000000000 /* BGR 16bpc */ #define CYAN64 0xFFFFFFFF0000 /* BGR 16bpc */ #define PURPLE64 0xFFFF0000FFFF /* BGR 16bpc */ #define YELLOW64 0x0000FFFFFFFF /* BGR 16bpc */ #define WHITE64 0xFFFFFFFFFFFF /* BGR 16bpc */ #define RED64 0x00000000FFFF /* BGR 16bpc */ #define GREEN64 0x0000FFFF0000 /* BGR 16bpc */ #define BLUE64 0xFFFF00000000 /* BGR 16bpc */ static void paint_background(data_t *data, struct igt_fb *fb, drmModeModeInfo *mode, uint32_t background, double alpha) { cairo_t *cr; int w, h; double r, g, b; w = mode->hdisplay; h = mode->vdisplay; cr = igt_get_cairo_ctx(data->gfx_fd, &data->fb); /* Paint with background color */ r = (double) (background & 0xFF) / 255.0; g = (double) ((background & 0xFF00) >> 8) / 255.0; b = (double) ((background & 0xFF0000) >> 16) / 255.0; igt_paint_color_alpha(cr, 0, 0, w, h, r, g, b, alpha); cairo_destroy(cr); } static void prepare_crtc(data_t *data, igt_output_t *output, enum pipe pipe, igt_plane_t *plane, int opaque_buffer, int plane_color, uint64_t pipe_background_color) { drmModeModeInfo *mode; igt_display_t *display = &data->display; int fb_id; double alpha; igt_output_set_pipe(output, pipe); /* create the pipe_crc object for this pipe */ igt_pipe_crc_free(data->pipe_crc); data->pipe_crc = igt_pipe_crc_new(pipe, INTEL_PIPE_CRC_SOURCE_AUTO); mode = igt_output_get_mode(output); fb_id = igt_create_fb(data->gfx_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, /* tiled */ &data->fb); igt_assert(fb_id); /* To make FB pixel win with background color, set alpha as full opaque */ igt_crtc_set_background(plane->pipe, pipe_background_color); if (opaque_buffer) alpha = 1.0; /* alpha 1 is fully opque */ else alpha = 0.0; /* alpha 0 is fully transparent */ paint_background(data, &data->fb, mode, plane_color, alpha); igt_plane_set_fb(plane, &data->fb); igt_display_commit2(display, COMMIT_UNIVERSAL); } static void cleanup_crtc(data_t *data, igt_output_t *output, igt_plane_t *plane) { igt_display_t *display = &data->display; igt_pipe_crc_free(data->pipe_crc); data->pipe_crc = NULL; igt_remove_fb(data->gfx_fd, &data->fb); igt_crtc_set_background(plane->pipe, BLACK64); igt_plane_set_fb(plane, NULL); igt_output_set_pipe(output, PIPE_ANY); igt_display_commit2(display, COMMIT_UNIVERSAL); } static void test_crtc_background(data_t *data) { igt_display_t *display = &data->display; igt_output_t *output; enum pipe pipe; int valid_tests = 0; igt_require(data->display.has_universal_planes); for_each_connected_output(display, output) { igt_plane_t *plane; pipe = output->config.pipe; igt_output_set_pipe(output, pipe); plane = igt_output_get_plane(output, IGT_PLANE_PRIMARY); igt_require(plane->pipe->background_property); prepare_crtc(data, output, pipe, plane, 1, PURPLE, BLACK64); /* Now set background without using a plane, i.e., * Disable the plane to let hw background color win blend. */ igt_plane_set_fb(plane, NULL); igt_crtc_set_background(plane->pipe, PURPLE64); igt_display_commit2(display, COMMIT_UNIVERSAL); /* Try few other background colors */ igt_crtc_set_background(plane->pipe, CYAN64); igt_display_commit2(display, COMMIT_UNIVERSAL); igt_crtc_set_background(plane->pipe, YELLOW64); igt_display_commit2(display, COMMIT_UNIVERSAL); igt_crtc_set_background(plane->pipe, RED64); igt_display_commit2(display, COMMIT_UNIVERSAL); igt_crtc_set_background(plane->pipe, GREEN64); igt_display_commit2(display, COMMIT_UNIVERSAL); igt_crtc_set_background(plane->pipe, BLUE64); igt_display_commit2(display, COMMIT_UNIVERSAL); igt_crtc_set_background(plane->pipe, WHITE64); igt_display_commit2(display, COMMIT_UNIVERSAL); valid_tests++; cleanup_crtc(data, output, plane); } igt_require_f(valid_tests, "no valid crtc/connector combinations found\n"); } igt_simple_main { data_t data = {}; igt_skip_on_simulation(); data.gfx_fd = drm_open_driver(DRIVER_INTEL); igt_require_pipe_crc(); igt_display_init(&data.display, data.gfx_fd); test_crtc_background(&data); igt_display_fini(&data.display); } intel-gpu-tools-1.14/tests/gem_bad_blit.c0000644000175000017500000000646412665336131015340 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * */ /** @file gem_tiled_blits.c * * This is a test of doing many tiled blits, with a working set * larger than the aperture size. * * The goal is to catch a couple types of failure; * - Fence management problems on pre-965. * - A17 or L-shaped memory tiling workaround problems in acceleration. * * The model is to fill a collection of 1MB objects in a way that can't trip * over A6 swizzling -- upload data to a non-tiled object, blit to the tiled * object. Then, copy the 1MB objects randomly between each other for a while. * Finally, download their data through linear objects again and see what * resulted. */ #include "igt.h" #include #include #include #include #include #include #include #include #include "drm.h" #include "intel_bufmgr.h" static drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; #define BAD_GTT_DEST (256*1024*1024ULL) /* past end of aperture */ static void bad_blit(drm_intel_bo *src_bo, uint32_t devid) { uint32_t src_pitch = 512, dst_pitch = 512; uint32_t cmd_bits = 0; if (IS_965(devid)) { src_pitch /= 4; cmd_bits |= XY_SRC_COPY_BLT_SRC_TILED; } if (IS_965(devid)) { dst_pitch /= 4; cmd_bits |= XY_SRC_COPY_BLT_DST_TILED; } BLIT_COPY_BATCH_START(cmd_bits); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ dst_pitch); OUT_BATCH(0); /* dst x1,y1 */ OUT_BATCH((64 << 16) | 64); /* 64x64 blit */ OUT_BATCH(BAD_GTT_DEST); if (batch->gen >= 8) OUT_BATCH(BAD_GTT_DEST >> 32); /* Upper 16 bits */ OUT_BATCH(0); /* src x1,y1 */ OUT_BATCH(src_pitch); OUT_RELOC_FENCED(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); } igt_simple_main { drm_intel_bo *src; int fd; fd = drm_open_driver(DRIVER_INTEL); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); drm_intel_bufmgr_gem_enable_reuse(bufmgr); batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd)); src = drm_intel_bo_alloc(bufmgr, "src", 128 * 128, 4096); bad_blit(src, batch->devid); intel_batchbuffer_free(batch); drm_intel_bufmgr_destroy(bufmgr); close(fd); } intel-gpu-tools-1.14/tests/kms_plane_scaling.c0000644000175000017500000002410612665336131016412 00000000000000/* * Copyright © 2013,2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include "igt.h" #include IGT_TEST_DESCRIPTION("Test display plane scaling"); typedef struct { uint32_t devid; int drm_fd; igt_display_t display; igt_crc_t ref_crc; igt_pipe_crc_t *pipe_crc; int image_w; int image_h; int num_scalers; struct igt_fb fb1; struct igt_fb fb2; struct igt_fb fb3; int fb_id1; int fb_id2; int fb_id3; igt_plane_t *plane1; igt_plane_t *plane2; igt_plane_t *plane3; igt_plane_t *plane4; } data_t; #define FILE_NAME "1080p-left.png" static void prepare_crtc(data_t *data, igt_output_t *output, enum pipe pipe, igt_plane_t *plane, drmModeModeInfo *mode, enum igt_commit_style s) { igt_display_t *display = &data->display; igt_output_set_pipe(output, pipe); /* create the pipe_crc object for this pipe */ igt_pipe_crc_free(data->pipe_crc); data->pipe_crc = igt_pipe_crc_new(pipe, INTEL_PIPE_CRC_SOURCE_AUTO); /* before allocating, free if any older fb */ if (data->fb_id1) { igt_remove_fb(data->drm_fd, &data->fb1); data->fb_id1 = 0; } /* allocate fb for plane 1 */ data->fb_id1 = igt_create_pattern_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_I915_FORMAT_MOD_X_TILED, /* tiled */ &data->fb1); igt_assert(data->fb_id1); /* * We always set the primary plane to actually enable the pipe as * there's no way (that works) to light up a pipe with only a sprite * plane enabled at the moment. */ if (!plane->is_primary) { igt_plane_t *primary; primary = igt_output_get_plane(output, IGT_PLANE_PRIMARY); igt_plane_set_fb(primary, &data->fb1); } igt_plane_set_fb(plane, &data->fb1); if (s == COMMIT_LEGACY) { int ret; ret = drmModeSetCrtc(data->drm_fd, output->config.crtc->crtc_id, data->fb_id1, plane->pan_x, plane->pan_y, &output->id, 1, mode); igt_assert_eq(ret, 0); } else { igt_display_commit2(display, s); } } static void cleanup_crtc(data_t *data, igt_output_t *output, igt_plane_t *plane) { igt_display_t *display = &data->display; igt_pipe_crc_free(data->pipe_crc); data->pipe_crc = NULL; if (data->fb_id1) { igt_remove_fb(data->drm_fd, &data->fb1); data->fb_id1 = 0; } if (data->fb_id2) { igt_remove_fb(data->drm_fd, &data->fb2); data->fb_id2 = 0; } if (data->fb_id3) { igt_remove_fb(data->drm_fd, &data->fb3); data->fb_id3 = 0; } if (!plane->is_primary) { igt_plane_t *primary; primary = igt_output_get_plane(output, IGT_PLANE_PRIMARY); igt_plane_set_fb(primary, NULL); } igt_plane_set_fb(plane, NULL); igt_output_set_pipe(output, PIPE_ANY); igt_display_commit2(display, COMMIT_UNIVERSAL); } /* does iterative scaling on plane2 */ static void iterate_plane_scaling(data_t *d, drmModeModeInfo *mode) { igt_display_t *display = &d->display; if (mode->hdisplay >= d->fb2.width) { int w, h; /* fixed fb */ igt_fb_set_position(&d->fb2, d->plane2, 0, 0); igt_fb_set_size(&d->fb2, d->plane2, d->fb2.width, d->fb2.height); igt_plane_set_position(d->plane2, 0, 0); /* adjust plane size */ for (w = d->fb2.width; w <= mode->hdisplay; w+=10) { h = w * d->fb2.height / d->fb2.width; igt_plane_set_size(d->plane2, w, h); igt_display_commit2(display, COMMIT_UNIVERSAL); } } else { int w, h; /* fixed plane */ igt_plane_set_position(d->plane2, 0, 0); igt_plane_set_size(d->plane2, mode->hdisplay, mode->vdisplay); igt_fb_set_position(&d->fb2, d->plane2, 0, 0); /* adjust fb size */ for (w = mode->hdisplay; w <= d->fb2.width; w+=10) { h = w * mode->hdisplay / mode->vdisplay; igt_fb_set_size(&d->fb2, d->plane2, w, h); igt_display_commit2(display, COMMIT_UNIVERSAL); } } } static void test_plane_scaling(data_t *d) { igt_display_t *display = &d->display; igt_output_t *output; enum pipe pipe; int valid_tests = 0; int primary_plane_scaling = 0; /* For now */ igt_require(d->display.has_universal_planes); igt_require(d->num_scalers); for_each_connected_output(display, output) { drmModeModeInfo *mode; pipe = output->config.pipe; igt_output_set_pipe(output, pipe); mode = igt_output_get_mode(output); /* allocate fb2 with image size */ d->fb_id2 = igt_create_image_fb(d->drm_fd, 0, 0, DRM_FORMAT_XRGB8888, LOCAL_I915_FORMAT_MOD_X_TILED, /* tiled */ FILE_NAME, &d->fb2); igt_assert(d->fb_id2); d->fb_id3 = igt_create_pattern_fb(d->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_I915_FORMAT_MOD_X_TILED, /* tiled */ &d->fb3); igt_assert(d->fb_id3); /* Set up display with plane 1 */ d->plane1 = igt_output_get_plane(output, IGT_PLANE_PRIMARY); prepare_crtc(d, output, pipe, d->plane1, mode, COMMIT_UNIVERSAL); if (primary_plane_scaling) { /* Primary plane upscaling */ igt_fb_set_position(&d->fb1, d->plane1, 100, 100); igt_fb_set_size(&d->fb1, d->plane1, 500, 500); igt_plane_set_position(d->plane1, 0, 0); igt_plane_set_size(d->plane1, mode->hdisplay, mode->vdisplay); igt_display_commit2(display, COMMIT_UNIVERSAL); /* Primary plane 1:1 no scaling */ igt_fb_set_position(&d->fb1, d->plane1, 0, 0); igt_fb_set_size(&d->fb1, d->plane1, d->fb1.width, d->fb1.height); igt_plane_set_position(d->plane1, 0, 0); igt_plane_set_size(d->plane1, mode->hdisplay, mode->vdisplay); igt_display_commit2(display, COMMIT_UNIVERSAL); } /* Set up fb2->plane2 mapping. */ d->plane2 = igt_output_get_plane(output, IGT_PLANE_2); igt_plane_set_fb(d->plane2, &d->fb2); /* 2nd plane windowed */ igt_fb_set_position(&d->fb2, d->plane2, 100, 100); igt_fb_set_size(&d->fb2, d->plane2, d->fb2.width-200, d->fb2.height-200); igt_plane_set_position(d->plane2, 100, 100); igt_plane_set_size(d->plane2, mode->hdisplay-200, mode->vdisplay-200); igt_display_commit2(display, COMMIT_UNIVERSAL); iterate_plane_scaling(d, mode); /* 2nd plane up scaling */ igt_fb_set_position(&d->fb2, d->plane2, 100, 100); igt_fb_set_size(&d->fb2, d->plane2, 500, 500); igt_plane_set_position(d->plane2, 10, 10); igt_plane_set_size(d->plane2, mode->hdisplay-20, mode->vdisplay-20); igt_display_commit2(display, COMMIT_UNIVERSAL); /* 2nd plane downscaling */ igt_fb_set_position(&d->fb2, d->plane2, 0, 0); igt_fb_set_size(&d->fb2, d->plane2, d->fb2.width, d->fb2.height); igt_plane_set_position(d->plane2, 10, 10); igt_plane_set_size(d->plane2, 500, 500 * d->fb2.height/d->fb2.width); igt_display_commit2(display, COMMIT_UNIVERSAL); if (primary_plane_scaling) { /* Primary plane up scaling */ igt_fb_set_position(&d->fb1, d->plane1, 100, 100); igt_fb_set_size(&d->fb1, d->plane1, 500, 500); igt_plane_set_position(d->plane1, 0, 0); igt_plane_set_size(d->plane1, mode->hdisplay, mode->vdisplay); igt_display_commit2(display, COMMIT_UNIVERSAL); } /* Set up fb3->plane3 mapping. */ d->plane3 = igt_output_get_plane(output, IGT_PLANE_3); igt_plane_set_fb(d->plane3, &d->fb3); /* 3rd plane windowed - no scaling */ igt_fb_set_position(&d->fb3, d->plane3, 100, 100); igt_fb_set_size(&d->fb3, d->plane3, d->fb3.width-300, d->fb3.height-300); igt_plane_set_position(d->plane3, 100, 100); igt_plane_set_size(d->plane3, mode->hdisplay-300, mode->vdisplay-300); igt_display_commit2(display, COMMIT_UNIVERSAL); /* Switch scaler from plane 2 to plane 3 */ igt_fb_set_position(&d->fb2, d->plane2, 100, 100); igt_fb_set_size(&d->fb2, d->plane2, d->fb2.width-200, d->fb2.height-200); igt_plane_set_position(d->plane2, 100, 100); igt_plane_set_size(d->plane2, d->fb2.width-200, d->fb2.height-200); igt_fb_set_position(&d->fb3, d->plane3, 100, 100); igt_fb_set_size(&d->fb3, d->plane3, d->fb3.width-400, d->fb3.height-400); igt_plane_set_position(d->plane3, 10, 10); igt_plane_set_size(d->plane3, mode->hdisplay-300, mode->vdisplay-300); igt_display_commit2(display, COMMIT_UNIVERSAL); if (primary_plane_scaling) { /* Switch scaler from plane 1 to plane 2 */ igt_fb_set_position(&d->fb1, d->plane1, 0, 0); igt_fb_set_size(&d->fb1, d->plane1, d->fb1.width, d->fb1.height); igt_plane_set_position(d->plane1, 0, 0); igt_plane_set_size(d->plane1, mode->hdisplay, mode->vdisplay); igt_fb_set_position(&d->fb2, d->plane2, 100, 100); igt_fb_set_size(&d->fb2, d->plane2, d->fb2.width-500,d->fb2.height-500); igt_plane_set_position(d->plane2, 100, 100); igt_plane_set_size(d->plane2, mode->hdisplay-200, mode->vdisplay-200); igt_display_commit2(display, COMMIT_UNIVERSAL); } /* back to single plane mode */ igt_plane_set_fb(d->plane2, NULL); igt_plane_set_fb(d->plane3, NULL); igt_display_commit2(display, COMMIT_UNIVERSAL); valid_tests++; cleanup_crtc(d, output, d->plane1); } igt_require_f(valid_tests, "no valid crtc/connector combinations found\n"); } igt_simple_main { data_t data = {}; igt_skip_on_simulation(); data.drm_fd = drm_open_driver(DRIVER_INTEL); igt_require_pipe_crc(); igt_display_init(&data.display, data.drm_fd); data.devid = intel_get_drm_devid(data.drm_fd); data.num_scalers = intel_gen(data.devid) >= 9 ? 2 : 0; test_plane_scaling(&data); igt_display_fini(&data.display); } intel-gpu-tools-1.14/tests/gem_largeobject.c0000644000175000017500000000453112665336131016052 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Jesse Barnes * */ #include "igt.h" #include #include #include #include #include #include #include #include #include "drm.h" /* Should take 64 pages to store the page pointers on 64 bit */ #define OBJ_SIZE (128 * 1024 * 1024) unsigned char data[OBJ_SIZE]; static void test_large_object(int fd) { struct drm_i915_gem_create create; struct drm_i915_gem_pin pin; uint32_t obj_size; char *ptr; memset(&create, 0, sizeof(create)); memset(&pin, 0, sizeof(pin)); if (gem_aperture_size(fd)*3/4 < OBJ_SIZE/2) obj_size = OBJ_SIZE / 4; else if (gem_aperture_size(fd)*3/4 < OBJ_SIZE) obj_size = OBJ_SIZE / 2; else obj_size = OBJ_SIZE; create.size = obj_size; igt_info("obj size %i\n", obj_size); igt_assert(ioctl(fd, DRM_IOCTL_I915_GEM_CREATE, &create) == 0); /* prefault */ ptr = gem_mmap__gtt(fd, create.handle, obj_size, PROT_WRITE | PROT_READ); *ptr = 0; gem_write(fd, create.handle, 0, data, obj_size); /* kernel should clean this up for us */ } igt_simple_main { int fd; igt_skip_on_simulation(); fd = drm_open_driver(DRIVER_INTEL); test_large_object(fd); } intel-gpu-tools-1.14/tests/gem_unref_active_buffers.c0000644000175000017500000000564512665336131017766 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * */ /* * Testcase: Unreferencing of active buffers * * Execs buffers and immediately unreferences them, hence the kernel active list * will be the last one to hold a reference on them. Usually libdrm bo caching * prevents that by keeping another reference. */ #include "igt.h" #include #include #include #include #include #include #include #include #include "drm.h" #include "intel_bufmgr.h" IGT_TEST_DESCRIPTION("Test unreferencing of active buffers."); static drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; static drm_intel_bo *load_bo; igt_simple_main { int fd, i; igt_skip_on_simulation(); fd = drm_open_driver(DRIVER_INTEL); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); igt_assert(bufmgr); /* don't enable buffer reuse!! */ //drm_intel_bufmgr_gem_enable_reuse(bufmgr); batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd)); igt_assert(batch); /* put some load onto the gpu to keep the light buffers active for long * enough */ for (i = 0; i < 1000; i++) { load_bo = drm_intel_bo_alloc(bufmgr, "target bo", 1024*4096, 4096); igt_assert(load_bo); BLIT_COPY_BATCH_START(0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ 4096); OUT_BATCH(0); /* dst x1,y1 */ OUT_BATCH((1024 << 16) | 512); OUT_RELOC_FENCED(load_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH((0 << 16) | 512); /* src x1, y1 */ OUT_BATCH(4096); OUT_RELOC_FENCED(load_bo, I915_GEM_DOMAIN_RENDER, 0, 0); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); drm_intel_bo_disable_reuse(load_bo); drm_intel_bo_unreference(load_bo); } drm_intel_bufmgr_destroy(bufmgr); close(fd); } intel-gpu-tools-1.14/tests/gem_gpgpu_fill.c0000644000175000017500000000722212665336131015721 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Damien Lespiau * Xiang, Haihao */ /* * This file is a basic test for the gpgpu_fill() function, a very simple * workload for the GPGPU pipeline. */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include "drm.h" #include "intel_bufmgr.h" #define WIDTH 64 #define HEIGHT 64 #define STRIDE (WIDTH) #define SIZE (HEIGHT*STRIDE) #define COLOR_C4 0xc4 #define COLOR_4C 0x4c typedef struct { int drm_fd; uint32_t devid; drm_intel_bufmgr *bufmgr; uint8_t linear[WIDTH * HEIGHT]; } data_t; static void scratch_buf_init(data_t *data, struct igt_buf *buf, int width, int height, int stride, uint8_t color) { drm_intel_bo *bo; int i; bo = drm_intel_bo_alloc(data->bufmgr, "", SIZE, 4096); for (i = 0; i < width * height; i++) data->linear[i] = color; gem_write(data->drm_fd, bo->handle, 0, data->linear, sizeof(data->linear)); buf->bo = bo; buf->stride = stride; buf->tiling = I915_TILING_NONE; buf->size = SIZE; } static void scratch_buf_check(data_t *data, struct igt_buf *buf, int x, int y, uint8_t color) { uint8_t val; gem_read(data->drm_fd, buf->bo->handle, 0, data->linear, sizeof(data->linear)); val = data->linear[y * WIDTH + x]; igt_assert_f(val == color, "Expected 0x%02x, found 0x%02x at (%d,%d)\n", color, val, x, y); } igt_simple_main { data_t data = {0, }; struct intel_batchbuffer *batch = NULL; struct igt_buf dst; igt_fillfunc_t gpgpu_fill = NULL; int i, j; data.drm_fd = drm_open_driver_render(DRIVER_INTEL); data.devid = intel_get_drm_devid(data.drm_fd); data.bufmgr = drm_intel_bufmgr_gem_init(data.drm_fd, 4096); igt_assert(data.bufmgr); gpgpu_fill = igt_get_gpgpu_fillfunc(data.devid); igt_require_f(gpgpu_fill, "no gpgpu-fill function\n"); batch = intel_batchbuffer_alloc(data.bufmgr, data.devid); igt_assert(batch); scratch_buf_init(&data, &dst, WIDTH, HEIGHT, STRIDE, COLOR_C4); for (i = 0; i < WIDTH; i++) { for (j = 0; j < HEIGHT; j++) { scratch_buf_check(&data, &dst, i, j, COLOR_C4); } } gpgpu_fill(batch, &dst, 0, 0, WIDTH / 2, HEIGHT / 2, COLOR_4C); for (i = 0; i < WIDTH; i++) { for (j = 0; j < HEIGHT; j++) { if (i < WIDTH / 2 && j < HEIGHT / 2) scratch_buf_check(&data, &dst, i, j, COLOR_4C); else scratch_buf_check(&data, &dst, i, j, COLOR_C4); } } } intel-gpu-tools-1.14/tests/gem_alive.c0000644000175000017500000000102212665336131014661 00000000000000#include "igt.h" #include #include #include #include #include #include int main(void) { struct drm_i915_gem_sw_finish arg = { 0 }; int fd; signal(SIGALRM, SIG_IGN); fd = __drm_open_driver(DRIVER_INTEL); if (fd < 0) return IGT_EXIT_SKIP; alarm(1); if (ioctl(fd, DRM_IOCTL_I915_GEM_SW_FINISH, &arg) == 0) return IGT_EXIT_SKIP; switch (errno) { case ENOENT: return 0; case EIO: return 1; case EINTR: return 2; default: return 3; } } intel-gpu-tools-1.14/tests/gem_fd_exhaustion.c0000644000175000017500000000502412665336131016427 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * */ #include "igt.h" #include #include #include #include #include #include #define FD_ARR_SZ 100 int fd_arr[FD_ARR_SZ]; igt_simple_main { int fd, i; struct rlimit rlim; unsigned nofile_rlim; FILE *file_max = fopen("/proc/sys/fs/file-max", "r"); igt_assert(fscanf(file_max, "%u", &nofile_rlim) == 1); fclose(file_max); igt_info("System limit for open files is %u\n", nofile_rlim); igt_assert(getrlimit(RLIMIT_NOFILE, &rlim) == 0); rlim.rlim_cur = nofile_rlim; rlim.rlim_max = nofile_rlim; igt_assert(setrlimit(RLIMIT_NOFILE, &rlim) == 0); fd = drm_open_driver(DRIVER_INTEL); igt_assert(open("/dev/null", O_RDONLY) >= 0); igt_fork(n, 1) { igt_drop_root(); for (i = 0; ; i++) { int tmp_fd = open("/dev/null", O_RDONLY); uint32_t handle; if (tmp_fd >= 0 && i < FD_ARR_SZ) fd_arr[i] = tmp_fd; handle = __gem_create(fd, 4096); if (handle) gem_close(fd, handle); if (tmp_fd < 0) { /* Ensure we actually hit the failure path ... */ igt_assert(handle == 0); igt_info("fd exhaustion after %i rounds.\n", i); break; } } /* The child will free all the fds when exiting, so no need to * clean up to mess to ensure that the parent can at least run * the exit handlers. */ } igt_waitchildren(); close(fd); } intel-gpu-tools-1.14/tests/gem_evict_alignment.c0000644000175000017500000001421112665336131016735 00000000000000/* * Copyright © 2011,2012 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * Daniel Vetter * */ /* * Testcase: run a couple of big batches to force the unbind on misalignment code. */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include IGT_TEST_DESCRIPTION("Run a couple of big batches to force the unbind on" " misalignment code."); #define HEIGHT 256 #define WIDTH 1024 static void copy(int fd, uint32_t dst, uint32_t src, uint32_t *all_bo, int n_bo, int alignment, int error) { uint32_t batch[12]; struct drm_i915_gem_relocation_entry reloc[2]; struct drm_i915_gem_exec_object2 *obj; struct drm_i915_gem_execbuffer2 exec; uint32_t handle; int n, ret, i=0; batch[i++] = (XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA | XY_SRC_COPY_BLT_WRITE_RGB | 6); if (intel_gen(intel_get_drm_devid(fd)) >= 8) batch[i - 1] += 2; batch[i++] = (3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ WIDTH*4; batch[i++] = 0; /* dst x1,y1 */ batch[i++] = (HEIGHT << 16) | WIDTH; /* dst x2,y2 */ batch[i++] = 0; /* dst reloc */ if (intel_gen(intel_get_drm_devid(fd)) >= 8) batch[i++] = 0; /* FIXME */ batch[i++] = 0; /* src x1,y1 */ batch[i++] = WIDTH*4; batch[i++] = 0; /* src reloc */ if (intel_gen(intel_get_drm_devid(fd)) >= 8) batch[i++] = 0; /* FIXME */ batch[i++] = MI_BATCH_BUFFER_END; batch[i++] = MI_NOOP; handle = gem_create(fd, 4096); gem_write(fd, handle, 0, batch, sizeof(batch)); reloc[0].target_handle = dst; reloc[0].delta = 0; reloc[0].offset = 4 * sizeof(batch[0]); reloc[0].presumed_offset = 0; reloc[0].read_domains = I915_GEM_DOMAIN_RENDER; reloc[0].write_domain = I915_GEM_DOMAIN_RENDER; reloc[1].target_handle = src; reloc[1].delta = 0; reloc[1].offset = 7 * sizeof(batch[0]); reloc[1].presumed_offset = 0; reloc[1].read_domains = I915_GEM_DOMAIN_RENDER; reloc[1].write_domain = 0; obj = calloc(n_bo + 1, sizeof(*obj)); for (n = 0; n < n_bo; n++) { obj[n].handle = all_bo[n]; obj[n].alignment = alignment; } obj[n].handle = handle; obj[n].relocation_count = 2; obj[n].relocs_ptr = (uintptr_t)reloc; exec.buffers_ptr = (uintptr_t)obj; exec.buffer_count = n_bo + 1; exec.batch_start_offset = 0; exec.batch_len = i * 4; exec.DR1 = exec.DR4 = 0; exec.num_cliprects = 0; exec.cliprects_ptr = 0; exec.flags = HAS_BLT_RING(intel_get_drm_devid(fd)) ? I915_EXEC_BLT : 0; i915_execbuffer2_set_context_id(exec, 0); exec.rsvd2 = 0; ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &exec); if (ret) ret = errno; igt_assert_eq(ret, error); gem_close(fd, handle); free(obj); } static void minor_evictions(int fd, int size, int count) { uint32_t *bo, *sel; int n, m, alignment, pass, fail; intel_require_memory(2 * count, size, CHECK_RAM); bo = malloc(3*count*sizeof(*bo)); igt_assert(bo); for (n = 0; n < 2*count; n++) bo[n] = gem_create(fd, size); sel = bo + n; for (alignment = m = 4096; alignment <= size; alignment <<= 1) { for (fail = 0; fail < 10; fail++) { for (pass = 0; pass < 100; pass++) { for (n = 0; n < count; n++, m += 7) sel[n] = bo[m%(2*count)]; copy(fd, sel[0], sel[1], sel, count, alignment, 0); } copy(fd, bo[0], bo[0], bo, 2*count, alignment, ENOSPC); } } for (n = 0; n < 2*count; n++) gem_close(fd, bo[n]); free(bo); } static void major_evictions(int fd, int size, int count) { int n, m, loop, alignment, max; uint32_t *bo; intel_require_memory(count, size, CHECK_RAM); bo = malloc(count*sizeof(*bo)); igt_assert(bo); for (n = 0; n < count; n++) bo[n] = gem_create(fd, size); max = gem_aperture_size(fd) - size; for (alignment = m = 4096; alignment < max; alignment <<= 1) { for (loop = 0; loop < 100; loop++, m += 17) { n = m % count; copy(fd, bo[n], bo[n], &bo[n], 1, alignment, 0); } } for (n = 0; n < count; n++) gem_close(fd, bo[n]); free(bo); } igt_main { uint64_t size, count; int fd = -1; igt_fixture { fd = drm_open_driver(DRIVER_INTEL); } igt_subtest("minor-normal") { size = 1024 * 1024; count = 3*gem_aperture_size(fd) / size / 4; minor_evictions(fd, size, count); } igt_subtest("major-normal") { size = 3*gem_aperture_size(fd) / 4; count = 4; major_evictions(fd, size, count); } igt_fork_signal_helper(); igt_subtest("minor-interruptible") { size = 1024 * 1024; count = 3*gem_aperture_size(fd) / size / 4; minor_evictions(fd, size, count); } igt_subtest("major-interruptible") { size = 3*gem_aperture_size(fd) / 4; count = 4; major_evictions(fd, size, count); } igt_subtest("minor-hang") { igt_fork_hang_helper(); size = 1024 * 1024; count = 3*gem_aperture_size(fd) / size / 4; minor_evictions(fd, size, count); } igt_subtest("major-hang") { size = 3*gem_aperture_size(fd) / 4; count = 4; major_evictions(fd, size, count); } igt_stop_signal_helper(); igt_fixture { igt_stop_hang_helper(); close(fd); } } intel-gpu-tools-1.14/tests/drv_debugfs_reader0000755000175000017500000000025412665336131016335 00000000000000#!/bin/bash SOURCE_DIR="$( dirname "${BASH_SOURCE[0]}" )" . $SOURCE_DIR/drm_lib.sh # read everything we can cat $i915_dfs_path/* > /dev/null 2>&1 exit $IGT_EXIT_SUCCESS intel-gpu-tools-1.14/tests/gem_set_tiling_vs_pwrite.c0000644000175000017500000000547012665336131020037 00000000000000/* * Copyright © 2012 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include "drm.h" IGT_TEST_DESCRIPTION("Check set_tiling vs pwrite coherency."); #define OBJECT_SIZE (1024*1024) #define TEST_STRIDE (1024*4) /** * Testcase: Check set_tiling vs pwrite coherency */ igt_simple_main { int fd; uint32_t *ptr; uint32_t data[OBJECT_SIZE/4]; int i; uint32_t handle; igt_skip_on_simulation(); fd = drm_open_driver(DRIVER_INTEL); for (i = 0; i < OBJECT_SIZE/4; i++) data[i] = i; handle = gem_create(fd, OBJECT_SIZE); ptr = gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_READ | PROT_WRITE); gem_set_tiling(fd, handle, I915_TILING_X, TEST_STRIDE); /* touch it */ gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); *ptr = 0xdeadbeef; igt_info("testing pwrite on tiled buffer\n"); gem_write(fd, handle, 0, data, OBJECT_SIZE); memset(data, 0, OBJECT_SIZE); gem_read(fd, handle, 0, data, OBJECT_SIZE); for (i = 0; i < OBJECT_SIZE/4; i++) igt_assert(i == data[i]); /* touch it before changing the tiling, so that the fence sticks around */ gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); *ptr = 0xdeadbeef; gem_set_tiling(fd, handle, I915_TILING_NONE, 0); igt_info("testing pwrite on untiled, but still fenced buffer\n"); gem_write(fd, handle, 0, data, OBJECT_SIZE); memset(data, 0, OBJECT_SIZE); gem_read(fd, handle, 0, data, OBJECT_SIZE); for (i = 0; i < OBJECT_SIZE/4; i++) igt_assert(i == data[i]); munmap(ptr, OBJECT_SIZE); close(fd); } intel-gpu-tools-1.14/tests/kms_mmio_vs_cs_flip.c0000644000175000017500000003761412665336131016773 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ #include "igt.h" #include #include #include #include #include typedef struct { int drm_fd; igt_display_t display; igt_pipe_crc_t *pipe_crc; drm_intel_bufmgr *bufmgr; drm_intel_bo *busy_bo; uint32_t devid; bool flip_done; } data_t; static void exec_nop(data_t *data, uint32_t handle, unsigned int ring) { struct intel_batchbuffer *batch; drm_intel_bo *bo; batch = intel_batchbuffer_alloc(data->bufmgr, data->devid); igt_assert(batch); bo = gem_handle_to_libdrm_bo(data->bufmgr, data->drm_fd, "", handle); igt_assert(bo); /* add relocs to make sure the kernel will think we write to dst */ BEGIN_BATCH(4, 1); OUT_BATCH(MI_BATCH_BUFFER_END); OUT_BATCH(MI_NOOP); OUT_RELOC(bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(MI_NOOP); ADVANCE_BATCH(); intel_batchbuffer_flush_on_ring(batch, ring); intel_batchbuffer_free(batch); drm_intel_bo_unreference(bo); } static void exec_blt(data_t *data) { struct intel_batchbuffer *batch; int w, h, pitch, i; batch = intel_batchbuffer_alloc(data->bufmgr, data->devid); igt_assert(batch); w = 8192; h = data->busy_bo->size / (8192 * 4); pitch = w * 4; for (i = 0; i < 40; i++) { BLIT_COPY_BATCH_START(0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ pitch); OUT_BATCH(0 << 16 | 0); OUT_BATCH(h << 16 | w); OUT_RELOC_FENCED(data->busy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(0 << 16 | 0); OUT_BATCH(pitch); OUT_RELOC_FENCED(data->busy_bo, I915_GEM_DOMAIN_RENDER, 0, 0); ADVANCE_BATCH(); } intel_batchbuffer_flush(batch); intel_batchbuffer_free(batch); } static void page_flip_handler(int fd, unsigned int frame, unsigned int sec, unsigned int usec, void *_data) { data_t *data = _data; data->flip_done = true; } static void wait_for_flip(data_t *data, uint32_t flip_handle) { struct timeval timeout = { .tv_sec = 3, .tv_usec = 0, }; drmEventContext evctx = { .version = DRM_EVENT_CONTEXT_VERSION, .page_flip_handler = page_flip_handler, }; fd_set fds; FD_ZERO(&fds); FD_SET(data->drm_fd, &fds); while (!data->flip_done) { int ret = select(data->drm_fd + 1, &fds, NULL, NULL, &timeout); if (ret < 0 && errno == EINTR) continue; igt_assert_lte(0, ret); do_or_die(drmHandleEvent(data->drm_fd, &evctx)); } /* * The flip completion may have been signalled prematurely, so * also submit another nop batch and wait for it to make sure * the ring has really been drained. */ if (IS_GEN7(data->devid) || IS_GEN8(data->devid)) exec_nop(data, flip_handle, I915_EXEC_BLT); else exec_nop(data, flip_handle, I915_EXEC_RENDER); gem_sync(data->drm_fd, flip_handle); } static void make_gpu_busy(data_t *data, uint32_t flip_handle) { /* * Make sure flip_handle has been used on the blt ring. * This should make the flip use the same ring on gen7+. */ if (IS_GEN7(data->devid) || IS_GEN8(data->devid)) exec_nop(data, flip_handle, I915_EXEC_BLT); /* * Add a pile commands to the ring. The flip will be * stuck behing these commands and hence gets delayed * significantly. */ exec_blt(data); /* * Make sure the render ring will block until the blt ring is clear. * This is in case the flip will execute on the render ring and the * blits were on the blt ring (this will be the case on gen6 at least). * * We can't add an explicit dependency between flip_handle and the * blits since that would cause the driver to block until the blits * have completed before it will perform a subsequent mmio flip, * and so the test would fail to exercise the mmio vs. CS flip race. */ if (HAS_BLT_RING(data->devid)) exec_nop(data, data->busy_bo->handle, I915_EXEC_RENDER); } /* * 1. set primary plane to full red * 2. grab a reference crc * 3. set primary plane to full blue * 4. queue lots of GPU activity to delay the subsequent page flip * 5. queue a page flip to the same blue fb * 6. toggle a fullscreen sprite (green) on and back off again * 7. set primary plane to red fb * 8. wait for GPU to finish * 9. compare current crc with reference crc * * We expect the primary plane to display full red at the end. * If the sprite operations have interfered with the page flip, * the driver may have mistakenly completed the flip before * it was executed by the CS, and hence the subsequent mmio * flips may have overtaken it. So once we've finished everything * the CS flip may have been the last thing to occur, which means * the primary plane may be full blue instead of the red it's * supposed to be. */ static bool test_plane(data_t *data, igt_output_t *output, enum pipe pipe, enum igt_plane plane) { struct igt_fb red_fb, green_fb, blue_fb; drmModeModeInfo *mode; igt_plane_t *primary, *sprite; igt_crc_t ref_crc, crc; int ret; igt_output_set_pipe(output, pipe); igt_display_commit(&data->display); if (!output->valid) { igt_output_set_pipe(output, PIPE_ANY); igt_display_commit(&data->display); return false; } primary = igt_output_get_plane(output, 0); sprite = igt_output_get_plane(output, plane); mode = igt_output_get_mode(output); igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, 1.0, 0.0, 0.0, &red_fb); igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, 0.0, 1.0, 0.0, &green_fb); igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, 0.0, 0.0, 1.0, &blue_fb); /* * Make sure these buffers are suited for display use * because most of the modeset operations must be fast * later on. */ igt_plane_set_fb(primary, &blue_fb); igt_display_commit(&data->display); igt_plane_set_fb(sprite, &green_fb); igt_display_commit(&data->display); igt_plane_set_fb(sprite, NULL); igt_display_commit(&data->display); if (data->pipe_crc) igt_pipe_crc_free(data->pipe_crc); data->pipe_crc = igt_pipe_crc_new(pipe, INTEL_PIPE_CRC_SOURCE_AUTO); /* set red fb and grab reference crc */ igt_plane_set_fb(primary, &red_fb); igt_display_commit(&data->display); igt_pipe_crc_collect_crc(data->pipe_crc, &ref_crc); ret = drmModeSetCrtc(data->drm_fd, output->config.crtc->crtc_id, blue_fb.fb_id, 0, 0, &output->id, 1, mode); igt_assert_eq(ret, 0); make_gpu_busy(data, blue_fb.gem_handle); data->flip_done = false; ret = drmModePageFlip(data->drm_fd, output->config.crtc->crtc_id, blue_fb.fb_id, DRM_MODE_PAGE_FLIP_EVENT, data); igt_assert_eq(ret, 0); /* * Toggle a fullscreen sprite on and back off. This will result * in the primary plane getting disabled and re-enbled, and that * leads to mmio flips. The driver may then mistake the flip done * interrupts from the mmio flips as the flip done interrupts for * the CS flip, and hence subsequent mmio flips won't wait for the * CS flips like they should. */ ret = drmModeSetPlane(data->drm_fd, sprite->drm_plane->plane_id, output->config.crtc->crtc_id, green_fb.fb_id, 0, 0, 0, mode->hdisplay, mode->vdisplay, 0, 0, mode->hdisplay << 16, mode->vdisplay << 16); igt_assert_eq(ret, 0); ret = drmModeSetPlane(data->drm_fd, sprite->drm_plane->plane_id, output->config.crtc->crtc_id, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); igt_assert_eq(ret, 0); /* * Set primary plane to red fb. This should wait for the CS flip * to complete. But if the kernel mistook the flip done interrupt * from the mmio flip as the flip done from the CS flip, this will * not wait for anything. And hence the the CS flip will actually * occur after this mmio flip. */ ret = drmModeSetCrtc(data->drm_fd, output->config.crtc->crtc_id, red_fb.fb_id, 0, 0, &output->id, 1, mode); igt_assert_eq(ret, 0); /* Make sure the flip has been executed */ wait_for_flip(data, blue_fb.gem_handle); /* Grab crc and compare with the extected result */ igt_pipe_crc_collect_crc(data->pipe_crc, &crc); igt_plane_set_fb(primary, NULL); igt_display_commit(&data->display); igt_remove_fb(data->drm_fd, &red_fb); igt_remove_fb(data->drm_fd, &green_fb); igt_remove_fb(data->drm_fd, &blue_fb); igt_pipe_crc_free(data->pipe_crc); data->pipe_crc = NULL; igt_output_set_pipe(output, PIPE_ANY); igt_display_commit(&data->display); igt_assert_crc_equal(&ref_crc, &crc); return true; } /* * 1. set primary plane to full red * 2. grab a reference crc * 3. set primary plane to full green * 4. wait for vblank * 5. pan primary plane a bit (to cause a mmio flip w/o vblank wait) * 6. queue lots of GPU activity to delay the subsequent page flip * 6. queue a page flip to a blue fb * 7. set primary plane to red fb * 8. wait for GPU to finish * 9. compare current crc with reference crc * * We expect the primary plane to display full red at the end. * If the previously schedule primary plane pan operation has interfered * with the following page flip, the driver may have mistakenly completed * the flip before it was executed by the CS, and hence the subsequent mmio * flips may have overtaken it. So once we've finished everything * the CS flip may have been the last thing to occur, which means * the primary plane may be full blue instead of the red it's * supposed to be. */ static bool test_crtc(data_t *data, igt_output_t *output, enum pipe pipe) { struct igt_fb red_fb, green_fb, blue_fb; drmModeModeInfo *mode; igt_plane_t *primary; igt_crc_t ref_crc, crc; int ret; igt_output_set_pipe(output, pipe); igt_display_commit(&data->display); if (!output->valid) { igt_output_set_pipe(output, PIPE_ANY); igt_display_commit(&data->display); return false; } primary = igt_output_get_plane(output, 0); mode = igt_output_get_mode(output); igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay+1, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, 1.0, 0.0, 0.0, &red_fb); igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay+1, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, 0.0, 0.0, 1.0, &blue_fb); igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay+1, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, 0.0, 1.0, 0.0, &green_fb); /* * Make sure these buffers are suited for display use * because most of the modeset operations must be fast * later on. */ igt_plane_set_fb(primary, &green_fb); igt_display_commit(&data->display); igt_plane_set_fb(primary, &blue_fb); igt_display_commit(&data->display); if (data->pipe_crc) igt_pipe_crc_free(data->pipe_crc); data->pipe_crc = igt_pipe_crc_new(pipe, INTEL_PIPE_CRC_SOURCE_AUTO); /* set red fb and grab reference crc */ igt_plane_set_fb(primary, &red_fb); igt_display_commit(&data->display); igt_pipe_crc_collect_crc(data->pipe_crc, &ref_crc); /* * Further down we need to issue an mmio flip w/o the kernel * waiting for vblank. The easiest way is to just pan within * the same FB. So pan away a bit here, and later we undo this * with another pan which will result in the desired mmio flip. */ ret = drmModeSetCrtc(data->drm_fd, output->config.crtc->crtc_id, green_fb.fb_id, 0, 1, &output->id, 1, mode); igt_assert_eq(ret, 0); /* * Make it more likely that the CS flip has been submitted into the * ring by the time the mmio flip from the drmModeSetCrtc() below * completes. The driver will then mistake the flip done interrupt * from the mmio flip as the flip done interrupt from the CS flip. */ igt_wait_for_vblank(data->drm_fd, pipe); /* now issue the mmio flip w/o vblank waits in the kernel, ie. pan a bit */ ret = drmModeSetCrtc(data->drm_fd, output->config.crtc->crtc_id, green_fb.fb_id, 0, 0, &output->id, 1, mode); igt_assert_eq(ret, 0); make_gpu_busy(data, blue_fb.gem_handle); /* * Submit the CS flip. The commands must be emitted into the ring * before the mmio flip from the panning operation completes. */ data->flip_done = false; ret = drmModePageFlip(data->drm_fd, output->config.crtc->crtc_id, blue_fb.fb_id, DRM_MODE_PAGE_FLIP_EVENT, data); igt_assert_eq(ret, 0); /* * Set primary plane to red fb. This should wait for the CS flip * to complete. But if the kernel mistook the flip done interrupt * from the mmio flip as the flip done from the CS flip, this will * not wait for anything. And hence the the CS flip will actually * occur after this mmio flip. */ ret = drmModeSetCrtc(data->drm_fd, output->config.crtc->crtc_id, red_fb.fb_id, 0, 0, &output->id, 1, mode); igt_assert_eq(ret, 0); /* Make sure the flip has been executed */ wait_for_flip(data, blue_fb.gem_handle); /* Grab crc and compare with the extected result */ igt_pipe_crc_collect_crc(data->pipe_crc, &crc); igt_plane_set_fb(primary, NULL); igt_display_commit(&data->display); igt_remove_fb(data->drm_fd, &red_fb); igt_remove_fb(data->drm_fd, &green_fb); igt_remove_fb(data->drm_fd, &blue_fb); igt_pipe_crc_free(data->pipe_crc); data->pipe_crc = NULL; igt_output_set_pipe(output, PIPE_ANY); igt_display_commit(&data->display); igt_assert_crc_equal(&ref_crc, &crc); return true; } static void run_plane_test(data_t *data) { igt_output_t *output; enum igt_plane plane = 1; /* testing with one sprite is enough */ int valid_tests = 0; enum pipe pipe; for_each_connected_output(&data->display, output) { for_each_pipe(&data->display, pipe) { igt_require(data->display.pipes[pipe].n_planes > 2); if (test_plane(data, output, pipe, plane)) valid_tests++; } } igt_require_f(valid_tests, "no valid crtc/connector combinations found\n"); } static void run_crtc_test(data_t *data) { igt_output_t *output; int valid_tests = 0; enum pipe pipe; for_each_connected_output(&data->display, output) { for_each_pipe(&data->display, pipe) { if (test_crtc(data, output, pipe)) valid_tests++; } } igt_require_f(valid_tests, "no valid crtc/connector combinations found\n"); } static data_t data; igt_main { igt_skip_on_simulation(); igt_fixture { data.drm_fd = drm_open_driver_master(DRIVER_INTEL); kmstest_set_vt_graphics_mode(); data.devid = intel_get_drm_devid(data.drm_fd); igt_require_pipe_crc(); igt_display_init(&data.display, data.drm_fd); data.bufmgr = drm_intel_bufmgr_gem_init(data.drm_fd, 4096); igt_assert(data.bufmgr); drm_intel_bufmgr_gem_enable_reuse(data.bufmgr); data.busy_bo = drm_intel_bo_alloc(data.bufmgr, "bo", 64*1024*1024, 4096); gem_set_tiling(data.drm_fd, data.busy_bo->handle, 0, 4096); } igt_subtest_f("setplane_vs_cs_flip") run_plane_test(&data); igt_subtest_f("setcrtc_vs_cs_flip") run_crtc_test(&data); igt_fixture { drm_intel_bo_unreference(data.busy_bo); drm_intel_bufmgr_destroy(data.bufmgr); igt_display_fini(&data.display); } } intel-gpu-tools-1.14/tests/gen3_render_tiledx_blits.c0000644000175000017500000002533112665336131017703 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ /** @file gen3_linear_render_blits.c * * This is a test of doing many blits, with a working set * larger than the aperture size. * * The goal is to simply ensure the basics work. */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include "drm.h" #include "i915_reg.h" #define WIDTH 512 #define HEIGHT 512 static inline uint32_t pack_float(float f) { union { uint32_t dw; float f; } u; u.f = f; return u.dw; } static uint32_t fill_reloc(struct drm_i915_gem_relocation_entry *reloc, uint32_t offset, uint32_t handle, uint32_t read_domain, uint32_t write_domain) { reloc->target_handle = handle; reloc->delta = 0; reloc->offset = offset * sizeof(uint32_t); reloc->presumed_offset = 0; reloc->read_domains = read_domain; reloc->write_domain = write_domain; return reloc->presumed_offset + reloc->delta; } static void copy(int fd, uint32_t dst, uint32_t src) { uint32_t batch[1024], *b = batch; struct drm_i915_gem_relocation_entry reloc[2], *r = reloc; struct drm_i915_gem_exec_object2 obj[3]; struct drm_i915_gem_execbuffer2 exec; uint32_t handle; int ret; /* invariant state */ *b++ = (_3DSTATE_AA_CMD | AA_LINE_ECAAR_WIDTH_ENABLE | AA_LINE_ECAAR_WIDTH_1_0 | AA_LINE_REGION_WIDTH_ENABLE | AA_LINE_REGION_WIDTH_1_0); *b++ = (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD | IAB_MODIFY_ENABLE | IAB_MODIFY_FUNC | (BLENDFUNC_ADD << IAB_FUNC_SHIFT) | IAB_MODIFY_SRC_FACTOR | (BLENDFACT_ONE << IAB_SRC_FACTOR_SHIFT) | IAB_MODIFY_DST_FACTOR | (BLENDFACT_ZERO << IAB_DST_FACTOR_SHIFT)); *b++ = (_3DSTATE_DFLT_DIFFUSE_CMD); *b++ = (0); *b++ = (_3DSTATE_DFLT_SPEC_CMD); *b++ = (0); *b++ = (_3DSTATE_DFLT_Z_CMD); *b++ = (0); *b++ = (_3DSTATE_COORD_SET_BINDINGS | CSB_TCB(0, 0) | CSB_TCB(1, 1) | CSB_TCB(2, 2) | CSB_TCB(3, 3) | CSB_TCB(4, 4) | CSB_TCB(5, 5) | CSB_TCB(6, 6) | CSB_TCB(7, 7)); *b++ = (_3DSTATE_RASTER_RULES_CMD | ENABLE_POINT_RASTER_RULE | OGL_POINT_RASTER_RULE | ENABLE_LINE_STRIP_PROVOKE_VRTX | ENABLE_TRI_FAN_PROVOKE_VRTX | LINE_STRIP_PROVOKE_VRTX(1) | TRI_FAN_PROVOKE_VRTX(2) | ENABLE_TEXKILL_3D_4D | TEXKILL_4D); *b++ = (_3DSTATE_MODES_4_CMD | ENABLE_LOGIC_OP_FUNC | LOGIC_OP_FUNC(LOGICOP_COPY) | ENABLE_STENCIL_WRITE_MASK | STENCIL_WRITE_MASK(0xff) | ENABLE_STENCIL_TEST_MASK | STENCIL_TEST_MASK(0xff)); *b++ = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | I1_LOAD_S(4) | I1_LOAD_S(5) | 2); *b++ = (0x00000000); /* Disable texture coordinate wrap-shortest */ *b++ = ((1 << S4_POINT_WIDTH_SHIFT) | S4_LINE_WIDTH_ONE | S4_CULLMODE_NONE | S4_VFMT_XY); *b++ = (0x00000000); /* Stencil. */ *b++ = (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT); *b++ = (_3DSTATE_SCISSOR_RECT_0_CMD); *b++ = (0); *b++ = (0); *b++ = (_3DSTATE_DEPTH_SUBRECT_DISABLE); *b++ = (_3DSTATE_LOAD_INDIRECT | 0); /* disable indirect state */ *b++ = (0); *b++ = (_3DSTATE_STIPPLE); *b++ = (0x00000000); *b++ = (_3DSTATE_BACKFACE_STENCIL_OPS | BFO_ENABLE_STENCIL_TWO_SIDE | 0); /* samler state */ #define TEX_COUNT 1 *b++ = (_3DSTATE_MAP_STATE | (3 * TEX_COUNT)); *b++ = ((1 << TEX_COUNT) - 1); *b = fill_reloc(r++, b-batch, src, I915_GEM_DOMAIN_SAMPLER, 0); b++; *b++ = (MAPSURF_32BIT | MT_32BIT_ARGB8888 | MS3_TILED_SURFACE | (HEIGHT - 1) << MS3_HEIGHT_SHIFT | (WIDTH - 1) << MS3_WIDTH_SHIFT); *b++ = ((WIDTH-1) << MS4_PITCH_SHIFT); *b++ = (_3DSTATE_SAMPLER_STATE | (3 * TEX_COUNT)); *b++ = ((1 << TEX_COUNT) - 1); *b++ = (MIPFILTER_NONE << SS2_MIP_FILTER_SHIFT | FILTER_NEAREST << SS2_MAG_FILTER_SHIFT | FILTER_NEAREST << SS2_MIN_FILTER_SHIFT); *b++ = (TEXCOORDMODE_WRAP << SS3_TCX_ADDR_MODE_SHIFT | TEXCOORDMODE_WRAP << SS3_TCY_ADDR_MODE_SHIFT | 0 << SS3_TEXTUREMAP_INDEX_SHIFT); *b++ = (0x00000000); /* render target state */ *b++ = (_3DSTATE_BUF_INFO_CMD); *b++ = (BUF_3D_ID_COLOR_BACK | BUF_3D_TILED_SURFACE | WIDTH*4); *b = fill_reloc(r++, b-batch, dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER); b++; *b++ = (_3DSTATE_DST_BUF_VARS_CMD); *b++ = (COLR_BUF_ARGB8888 | DSTORG_HORT_BIAS(0x8) | DSTORG_VERT_BIAS(0x8)); /* draw rect is unconditional */ *b++ = (_3DSTATE_DRAW_RECT_CMD); *b++ = (0x00000000); *b++ = (0x00000000); /* ymin, xmin */ *b++ = (DRAW_YMAX(HEIGHT - 1) | DRAW_XMAX(WIDTH - 1)); /* yorig, xorig (relate to color buffer?) */ *b++ = (0x00000000); /* texfmt */ *b++ = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(1) | I1_LOAD_S(2) | I1_LOAD_S(6) | 2); *b++ = ((4 << S1_VERTEX_WIDTH_SHIFT) | (4 << S1_VERTEX_PITCH_SHIFT)); *b++ = (~S2_TEXCOORD_FMT(0, TEXCOORDFMT_NOT_PRESENT) | S2_TEXCOORD_FMT(0, TEXCOORDFMT_2D)); *b++ = (S6_CBUF_BLEND_ENABLE | S6_COLOR_WRITE_ENABLE | BLENDFUNC_ADD << S6_CBUF_BLEND_FUNC_SHIFT | BLENDFACT_ONE << S6_CBUF_SRC_BLEND_FACT_SHIFT | BLENDFACT_ZERO << S6_CBUF_DST_BLEND_FACT_SHIFT); /* pixel shader */ *b++ = (_3DSTATE_PIXEL_SHADER_PROGRAM | (1 + 3*3 - 2)); /* decl FS_T0 */ *b++ = (D0_DCL | REG_TYPE(FS_T0) << D0_TYPE_SHIFT | REG_NR(FS_T0) << D0_NR_SHIFT | ((REG_TYPE(FS_T0) != REG_TYPE_S) ? D0_CHANNEL_ALL : 0)); *b++ = (0); *b++ = (0); /* decl FS_S0 */ *b++ = (D0_DCL | (REG_TYPE(FS_S0) << D0_TYPE_SHIFT) | (REG_NR(FS_S0) << D0_NR_SHIFT) | ((REG_TYPE(FS_S0) != REG_TYPE_S) ? D0_CHANNEL_ALL : 0)); *b++ = (0); *b++ = (0); /* texld(FS_OC, FS_S0, FS_T0 */ *b++ = (T0_TEXLD | (REG_TYPE(FS_OC) << T0_DEST_TYPE_SHIFT) | (REG_NR(FS_OC) << T0_DEST_NR_SHIFT) | (REG_NR(FS_S0) << T0_SAMPLER_NR_SHIFT)); *b++ = ((REG_TYPE(FS_T0) << T1_ADDRESS_REG_TYPE_SHIFT) | (REG_NR(FS_T0) << T1_ADDRESS_REG_NR_SHIFT)); *b++ = (0); *b++ = (PRIM3D_RECTLIST | (3*4 - 1)); *b++ = pack_float(WIDTH); *b++ = pack_float(HEIGHT); *b++ = pack_float(WIDTH); *b++ = pack_float(HEIGHT); *b++ = pack_float(0); *b++ = pack_float(HEIGHT); *b++ = pack_float(0); *b++ = pack_float(HEIGHT); *b++ = pack_float(0); *b++ = pack_float(0); *b++ = pack_float(0); *b++ = pack_float(0); *b++ = MI_BATCH_BUFFER_END; if ((b - batch) & 1) *b++ = 0; igt_assert(b - batch <= 1024); handle = gem_create(fd, 4096); gem_write(fd, handle, 0, batch, (b-batch)*sizeof(batch[0])); igt_assert(r-reloc == 2); obj[0].handle = dst; obj[0].relocation_count = 0; obj[0].relocs_ptr = 0; obj[0].alignment = 0; obj[0].offset = 0; obj[0].flags = 0; obj[0].rsvd1 = 0; obj[0].rsvd2 = 0; obj[1].handle = src; obj[1].relocation_count = 0; obj[1].relocs_ptr = 0; obj[1].alignment = 0; obj[1].offset = 0; obj[1].flags = 0; obj[1].rsvd1 = 0; obj[1].rsvd2 = 0; obj[2].handle = handle; obj[2].relocation_count = 2; obj[2].relocs_ptr = (uintptr_t)reloc; obj[2].alignment = 0; obj[2].offset = 0; obj[2].flags = 0; obj[2].rsvd1 = obj[2].rsvd2 = 0; exec.buffers_ptr = (uintptr_t)obj; exec.buffer_count = 3; exec.batch_start_offset = 0; exec.batch_len = (b-batch)*sizeof(batch[0]); exec.DR1 = exec.DR4 = 0; exec.num_cliprects = 0; exec.cliprects_ptr = 0; exec.flags = 0; i915_execbuffer2_set_context_id(exec, 0); exec.rsvd2 = 0; ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &exec); while (ret && errno == EBUSY) { drmCommandNone(fd, DRM_I915_GEM_THROTTLE); ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &exec); } igt_assert_eq(ret, 0); gem_close(fd, handle); } static uint32_t create_bo(int fd, uint32_t val) { uint32_t handle; uint32_t *v; int i; handle = gem_create(fd, WIDTH*HEIGHT*4); gem_set_tiling(fd, handle, I915_TILING_X, WIDTH*4); /* Fill the BO with dwords starting at val */ v = gem_mmap__gtt(fd, handle, WIDTH * HEIGHT * 4, PROT_READ | PROT_WRITE); for (i = 0; i < WIDTH*HEIGHT; i++) v[i] = val++; munmap(v, WIDTH*HEIGHT*4); return handle; } static void check_bo(int fd, uint32_t handle, uint32_t val) { uint32_t *v; int i; v = gem_mmap__gtt(fd, handle, WIDTH * HEIGHT * 4, PROT_READ); for (i = 0; i < WIDTH*HEIGHT; i++) { igt_assert_f(v[i] == val, "Expected 0x%08x, found 0x%08x " "at offset 0x%08x\n", val, v[i], i * 4); val++; } munmap(v, WIDTH*HEIGHT*4); } int main(int argc, char **argv) { uint32_t *handle, *start_val; uint32_t start = 0; int i, fd, count; igt_simple_init(argc, argv); fd = drm_open_driver(DRIVER_INTEL); igt_require(IS_GEN3(intel_get_drm_devid(fd))); count = 0; if (argc > 1) count = atoi(argv[1]); if (count == 0) count = 3 * gem_aperture_size(fd) / (1024*1024) / 2; igt_info("Using %d 1MiB buffers\n", count); handle = malloc(sizeof(uint32_t)*count*2); start_val = handle + count; for (i = 0; i < count; i++) { handle[i] = create_bo(fd, start); start_val[i] = start; start += 1024 * 1024 / 4; } igt_info("Verifying initialisation...\n"); for (i = 0; i < count; i++) check_bo(fd, handle[i], start_val[i]); igt_info("Cyclic blits, forward...\n"); for (i = 0; i < count * 4; i++) { int src = i % count; int dst = (i + 1) % count; copy(fd, handle[dst], handle[src]); start_val[dst] = start_val[src]; } for (i = 0; i < count; i++) check_bo(fd, handle[i], start_val[i]); igt_info("Cyclic blits, backward...\n"); for (i = 0; i < count * 4; i++) { int src = (i + 1) % count; int dst = i % count; copy(fd, handle[dst], handle[src]); start_val[dst] = start_val[src]; } for (i = 0; i < count; i++) check_bo(fd, handle[i], start_val[i]); igt_info("Random blits...\n"); for (i = 0; i < count * 4; i++) { int src = random() % count; int dst = random() % count; if (src == dst) continue; copy(fd, handle[dst], handle[src]); start_val[dst] = start_val[src]; } for (i = 0; i < count; i++) check_bo(fd, handle[i], start_val[i]); igt_exit(); } intel-gpu-tools-1.14/tests/Makefile.am0000644000175000017500000000666612665336131014644 00000000000000include Makefile.sources if HAVE_NOUVEAU TESTS_progs_M += $(NOUVEAU_TESTS_M) endif if HAVE_VC4 TESTS_progs_M += $(VC4_TESTS_M) endif if BUILD_TESTS test-list.txt: Makefile.sources @echo TESTLIST > $@ @echo ${single_kernel_tests} ${multi_kernel_tests} >> $@ @echo END TESTLIST >> $@ noinst_PROGRAMS = \ $(HANG) \ $(TESTS_testsuite) \ $(NULL) pkglibexec_PROGRAMS = \ gem_alive \ gem_stress \ $(TESTS_progs) \ $(TESTS_progs_M) \ $(NULL) dist_pkglibexec_SCRIPTS = \ $(TESTS_scripts) \ $(TESTS_scripts_M) \ $(scripts) \ $(NULL) dist_pkgdata_DATA = \ $(IMAGES) \ $(NULL) all-local: .gitignore .gitignore: Makefile.sources @echo "$(pkglibexec_PROGRAMS) $(HANG) test-list.txt .gitignore" | sed 's/\s\+/\n/g' | sort > $@ pkgdata_DATA = test-list.txt EXTRA_PROGRAMS = $(HANG) EXTRA_DIST = $(common_files) CLEANFILES = $(EXTRA_PROGRAMS) test-list.txt .gitignore AM_CFLAGS = $(DRM_CFLAGS) $(CWARNFLAGS) $(DEBUG_CFLAGS)\ -I$(srcdir)/.. \ -I$(srcdir)/../lib \ -include "$(srcdir)/../lib/check-ndebug.h" \ -DIGT_SRCDIR=\""$(abs_srcdir)"\" \ -DIGT_DATADIR=\""$(pkgdatadir)"\" \ $(LIBUNWIND_CFLAGS) \ $(NULL) LDADD = ../lib/libintel_tools.la $(PCIACCESS_LIBS) $(DRM_LIBS) $(LIBUNWIND_LIBS) LDADD += $(CAIRO_LIBS) $(LIBUDEV_LIBS) $(GLIB_LIBS) -lm AM_CFLAGS += $(CAIRO_CFLAGS) $(LIBUDEV_CFLAGS) $(GLIB_CFLAGS) AM_LDFLAGS = -Wl,--as-needed drm_import_export_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS) drm_import_export_LDADD = $(LDADD) -lpthread gem_close_race_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS) gem_close_race_LDADD = $(LDADD) -lpthread gem_ctx_basic_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS) gem_ctx_basic_LDADD = $(LDADD) -lpthread gem_ctx_thrash_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS) gem_ctx_thrash_LDADD = $(LDADD) -lpthread gem_fence_thrash_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS) gem_fence_thrash_LDADD = $(LDADD) -lpthread gem_fence_upload_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS) gem_fence_upload_LDADD = $(LDADD) -lpthread gem_flink_race_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS) gem_flink_race_LDADD = $(LDADD) -lpthread gem_mmap_gtt_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS) gem_mmap_gtt_LDADD = $(LDADD) -lpthread gem_mmap_wc_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS) gem_mmap_wc_LDADD = $(LDADD) -lpthread gem_threaded_access_tiled_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS) gem_threaded_access_tiled_LDADD = $(LDADD) -lpthread gem_tiled_swapping_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS) gem_tiled_swapping_LDADD = $(LDADD) -lpthread prime_self_import_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS) prime_self_import_LDADD = $(LDADD) -lpthread gen7_forcewake_mt_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS) gen7_forcewake_mt_LDADD = $(LDADD) -lpthread gem_userptr_blits_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS) gem_userptr_blits_LDADD = $(LDADD) -lpthread gem_wait_LDADD = $(LDADD) -lrt kms_flip_LDADD = $(LDADD) -lrt -lpthread pm_rc6_residency_LDADD = $(LDADD) -lrt prime_nv_test_CFLAGS = $(AM_CFLAGS) $(DRM_NOUVEAU_CFLAGS) prime_nv_test_LDADD = $(LDADD) $(DRM_NOUVEAU_LIBS) prime_nv_api_CFLAGS = $(AM_CFLAGS) $(DRM_NOUVEAU_CFLAGS) prime_nv_api_LDADD = $(LDADD) $(DRM_NOUVEAU_LIBS) prime_nv_pcopy_CFLAGS = $(AM_CFLAGS) $(DRM_NOUVEAU_CFLAGS) prime_nv_pcopy_LDADD = $(LDADD) $(DRM_NOUVEAU_LIBS) vc4_create_bo_CFLAGS = $(AM_CFLAGS) $(DRM_VC4_CFLAGS) vc4_create_bo_LDADD = $(LDADD) $(DRM_VC4_LIBS) vc4_wait_bo_CFLAGS = $(AM_CFLAGS) $(DRM_VC4_CFLAGS) vc4_wait_bo_LDADD = $(LDADD) $(DRM_VC4_LIBS) vc4_wait_seqno_CFLAGS = $(AM_CFLAGS) $(DRM_VC4_CFLAGS) vc4_wait_seqno_LDADD = $(LDADD) $(DRM_VC4_LIBS) endif intel-gpu-tools-1.14/tests/gem_cpu_reloc.c0000644000175000017500000001630712665336131015550 00000000000000/* * Copyright © 2012 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ /* * Testcase: Test the relocations through the CPU domain * * Attempt to stress test performing relocations whilst the batch is in the * CPU domain. * * A freshly allocated buffer starts in the CPU domain, and the pwrite * should also be performed whilst in the CPU domain and so we should * execute the relocations within the CPU domain. If for any reason one of * those steps should land it in the GTT domain, we take the secondary * precaution of filling the mappable portion of the GATT. * * In order to detect whether a relocation fails, we first fill a target * buffer with a sequence of invalid commands that would cause the GPU to * immediate hang, and then attempt to overwrite them with a legal, if * short, batchbuffer using a BLT. Then we come to execute the bo, if the * relocation fail and we either copy across all zeros or garbage, then the * GPU will hang. */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include "intel_bufmgr.h" IGT_TEST_DESCRIPTION("Test the relocations through the CPU domain."); static uint32_t use_blt; static void copy(int fd, uint32_t batch, uint32_t src, uint32_t dst) { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_relocation_entry gem_reloc[2]; struct drm_i915_gem_exec_object2 gem_exec[3]; gem_reloc[0].offset = 4 * sizeof(uint32_t); gem_reloc[0].delta = 0; gem_reloc[0].target_handle = dst; gem_reloc[0].read_domains = I915_GEM_DOMAIN_RENDER; gem_reloc[0].write_domain = I915_GEM_DOMAIN_RENDER; gem_reloc[0].presumed_offset = 0; gem_reloc[1].offset = 7 * sizeof(uint32_t); if (intel_gen(intel_get_drm_devid(fd)) >= 8) gem_reloc[1].offset += sizeof(uint32_t); gem_reloc[1].delta = 0; gem_reloc[1].target_handle = src; gem_reloc[1].read_domains = I915_GEM_DOMAIN_RENDER; gem_reloc[1].write_domain = 0; gem_reloc[1].presumed_offset = 0; memset(gem_exec, 0, sizeof(gem_exec)); gem_exec[0].handle = src; gem_exec[1].handle = dst; gem_exec[2].handle = batch; gem_exec[2].relocation_count = 2; gem_exec[2].relocs_ptr = (uintptr_t)gem_reloc; memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)gem_exec; execbuf.buffer_count = 3; execbuf.batch_len = 4096; execbuf.flags = use_blt; gem_execbuf(fd, &execbuf); } static void exec(int fd, uint32_t handle) { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 gem_exec; memset(&gem_exec, 0, sizeof(gem_exec)); gem_exec.handle = handle; memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)&gem_exec; execbuf.buffer_count = 1; execbuf.batch_len = 4096; gem_execbuf(fd, &execbuf); } uint32_t gen6_batch[] = { (XY_SRC_COPY_BLT_CMD | 6 | XY_SRC_COPY_BLT_WRITE_ALPHA | XY_SRC_COPY_BLT_WRITE_RGB), (3 << 24 | /* 32 bits */ 0xcc << 16 | /* copy ROP */ 4096), 0 << 16 | 0, /* dst x1, y1 */ 1 << 16 | 2, 0, /* dst relocation */ 0 << 16 | 0, /* src x1, y1 */ 4096, 0, /* src relocation */ MI_BATCH_BUFFER_END, }; uint32_t gen8_batch[] = { (XY_SRC_COPY_BLT_CMD | 8 | XY_SRC_COPY_BLT_WRITE_ALPHA | XY_SRC_COPY_BLT_WRITE_RGB), (3 << 24 | /* 32 bits */ 0xcc << 16 | /* copy ROP */ 4096), 0 << 16 | 0, /* dst x1, y1 */ 1 << 16 | 2, 0, /* dst relocation */ 0, /* FIXME */ 0 << 16 | 0, /* src x1, y1 */ 4096, 0, /* src relocation */ 0, /* FIXME */ MI_BATCH_BUFFER_END, }; uint32_t *batch = gen6_batch; uint32_t batch_size = sizeof(gen6_batch); static void run_test(int fd, int count) { const uint32_t hang[] = {-1, -1, -1, -1}; const uint32_t end[] = {MI_BATCH_BUFFER_END, 0}; uint32_t noop; uint32_t *handles; int i; noop = intel_get_drm_devid(fd); use_blt = 0; if (intel_gen(noop) >= 6) use_blt = I915_EXEC_BLT; if (intel_gen(noop) >= 8) { batch = gen8_batch; batch_size += 2 * 4; } handles = malloc (count * sizeof(uint32_t)); igt_assert(handles); noop = gem_create(fd, 4096); gem_write(fd, noop, 0, end, sizeof(end)); /* fill the entire gart with batches and run them */ for (i = 0; i < count; i++) { uint32_t bad; handles[i] = gem_create(fd, 4096); gem_write(fd, handles[i], 0, batch, batch_size); bad = gem_create(fd, 4096); gem_write(fd, bad, 0, hang, sizeof(hang)); gem_write(fd, bad, 4096-sizeof(end), end, sizeof(end)); /* launch the newly created batch */ copy(fd, handles[i], noop, bad); exec(fd, bad); gem_close(fd, bad); igt_progress("gem_cpu_reloc: ", i, 2*count); } /* And again in reverse to try and catch the relocation code out */ for (i = 0; i < count; i++) { uint32_t bad; bad = gem_create(fd, 4096); gem_write(fd, bad, 0, hang, sizeof(hang)); gem_write(fd, bad, 4096-sizeof(end), end, sizeof(end)); /* launch the newly created batch */ copy(fd, handles[count-i-1], noop, bad); exec(fd, bad); gem_close(fd, bad); igt_progress("gem_cpu_reloc: ", count+i, 3*count); } /* Third time lucky? */ for (i = 0; i < count; i++) { uint32_t bad; bad = gem_create(fd, 4096); gem_write(fd, bad, 0, hang, sizeof(hang)); gem_write(fd, bad, 4096-sizeof(end), end, sizeof(end)); /* launch the newly created batch */ gem_set_domain(fd, handles[i], I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU); copy(fd, handles[i], noop, bad); exec(fd, bad); gem_close(fd, bad); igt_progress("gem_cpu_reloc: ", 2*count+i, 3*count); } igt_info("Subtest suceeded, cleanup up - this might take a while.\n"); for (i = 0; i < count; i++) { gem_close(fd, handles[i]); } gem_close(fd, noop); free(handles); } igt_main { uint64_t aper_size; int fd, count; igt_fixture { fd = drm_open_driver(DRIVER_INTEL); } igt_subtest("basic") { run_test (fd, 10); } igt_skip_on_simulation(); igt_subtest("full") { aper_size = gem_mappable_aperture_size(); count = aper_size / 4096 * 2; /* count + 2 (noop & bad) buffers. A gem object appears to require about 2kb + buffer + kernel overhead */ intel_require_memory(2+count, 2048+4096, CHECK_RAM); run_test (fd, count); } igt_fixture { close(fd); } } intel-gpu-tools-1.14/tests/sysfs_l3_parity0000755000175000017500000000134312665336131015656 00000000000000#!/bin/bash SOURCE_DIR="$( dirname "${BASH_SOURCE[0]}" )" . $SOURCE_DIR/drm_lib.sh if ! find /sys/class/drm/card*/ | grep l3_parity > /dev/null ; then echo "no l3_parity interface, skipping test" exit $IGT_EXIT_SKIP fi $SOURCE_DIR/../tools/intel_l3_parity -r 0 -b 0 -s 0 -e #Check that we can remap a row $SOURCE_DIR/../tools/intel_l3_parity -r 0 -b 0 -s 0 -d disabled=`$SOURCE_DIR/../tools/intel_l3_parity -l | grep -c 'Row 0, Bank 0, Subbank 0 is disabled'` if [ "$disabled" != "1" ] ; then echo "Fail" exit $IGT_EXIT_FAILURE fi $SOURCE_DIR/../tools/intel_l3_parity -r 0 -b 0 -s 0 -e #Check that we can clear remaps if [ `$SOURCE_DIR/../tools/intel_l3_parity -l | wc -l` != 1 ] ; then echo "Fail 2" exit $IGT_EXIT_FAILURE fi intel-gpu-tools-1.14/tests/gem_ppgtt.c0000644000175000017500000001746512665336131014741 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include #include "intel_bufmgr.h" #include "igt_debugfs.h" #define WIDTH 512 #define STRIDE (WIDTH*4) #define HEIGHT 512 #define SIZE (HEIGHT*STRIDE) static drm_intel_bo *create_bo(drm_intel_bufmgr *bufmgr, uint32_t pixel) { drm_intel_bo *bo; uint32_t *v; bo = drm_intel_bo_alloc(bufmgr, "surface", SIZE, 4096); igt_assert(bo); do_or_die(drm_intel_bo_map(bo, 1)); v = bo->virtual; for (int i = 0; i < SIZE/4; i++) v[i] = pixel; drm_intel_bo_unmap(bo); return bo; } static void scratch_buf_init(struct igt_buf *buf, drm_intel_bufmgr *bufmgr, uint32_t pixel) { buf->bo = create_bo(bufmgr, pixel); buf->stride = STRIDE; buf->tiling = I915_TILING_NONE; buf->size = SIZE; } static void scratch_buf_fini(struct igt_buf *buf) { dri_bo_unreference(buf->bo); memset(buf, 0, sizeof(*buf)); } static void fork_rcs_copy(int target, dri_bo **dst, int count, unsigned flags) #define CREATE_CONTEXT 0x1 { igt_render_copyfunc_t render_copy; int devid; for (int child = 0; child < count; child++) { int fd = drm_open_driver(DRIVER_INTEL); drm_intel_bufmgr *bufmgr; devid = intel_get_drm_devid(fd); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); igt_assert(bufmgr); dst[child] = create_bo(bufmgr, ~0); if (flags & CREATE_CONTEXT) { drm_intel_context *ctx; ctx = drm_intel_gem_context_create(dst[child]->bufmgr); igt_require(ctx); } render_copy = igt_get_render_copyfunc(devid); igt_require_f(render_copy, "no render-copy function\n"); } igt_fork(child, count) { struct intel_batchbuffer *batch; struct igt_buf buf; batch = intel_batchbuffer_alloc(dst[child]->bufmgr, devid); igt_assert(batch); if (flags & CREATE_CONTEXT) { drm_intel_context *ctx; ctx = drm_intel_gem_context_create(dst[child]->bufmgr); intel_batchbuffer_set_context(batch, ctx); } buf.bo = dst[child]; buf.stride = STRIDE; buf.tiling = I915_TILING_NONE; buf.size = SIZE; for (int i = 0; i <= target; i++) { struct igt_buf src; scratch_buf_init(&src, dst[child]->bufmgr, i | child << 16); render_copy(batch, NULL, &src, 0, 0, WIDTH, HEIGHT, &buf, 0, 0); scratch_buf_fini(&src); } } } static void fork_bcs_copy(int target, dri_bo **dst, int count) { int devid; for (int child = 0; child < count; child++) { drm_intel_bufmgr *bufmgr; int fd = drm_open_driver(DRIVER_INTEL); devid = intel_get_drm_devid(fd); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); igt_assert(bufmgr); dst[child] = create_bo(bufmgr, ~0); } igt_fork(child, count) { struct intel_batchbuffer *batch; batch = intel_batchbuffer_alloc(dst[child]->bufmgr, devid); igt_assert(batch); for (int i = 0; i <= target; i++) { dri_bo *src[2]; src[0] = create_bo(dst[child]->bufmgr, ~0); src[1] = create_bo(dst[child]->bufmgr, i | child << 16); intel_copy_bo(batch, src[0], src[1], SIZE); intel_copy_bo(batch, dst[child], src[0], SIZE); dri_bo_unreference(src[1]); dri_bo_unreference(src[0]); } } } static void surfaces_check(dri_bo **bo, int count, uint32_t expected) { for (int child = 0; child < count; child++) { uint32_t *ptr; do_or_die(drm_intel_bo_map(bo[child], 0)); ptr = bo[child]->virtual; for (int j = 0; j < SIZE/4; j++) igt_assert_eq(ptr[j], expected | child << 16); drm_intel_bo_unmap(bo[child]); } } static uint64_t exec_and_get_offset(int fd, uint32_t batch) { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 exec[1]; uint32_t batch_data[2] = { MI_BATCH_BUFFER_END }; gem_write(fd, batch, 0, batch_data, sizeof(batch_data)); memset(exec, 0, sizeof(exec)); exec[0].handle = batch; memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)exec; execbuf.buffer_count = 1; gem_execbuf(fd, &execbuf); igt_assert_neq(exec[0].offset, -1); return exec[0].offset; } static void flink_and_close(void) { uint32_t fd, fd2; uint32_t bo, flinked_bo, new_bo, name; uint64_t offset, offset_new; fd = drm_open_driver(DRIVER_INTEL); igt_require(gem_uses_full_ppgtt(fd)); bo = gem_create(fd, 4096); name = gem_flink(fd, bo); fd2 = drm_open_driver(DRIVER_INTEL); flinked_bo = gem_open(fd2, name); offset = exec_and_get_offset(fd2, flinked_bo); gem_sync(fd2, flinked_bo); gem_close(fd2, flinked_bo); /* the flinked bo VMA should have been cleared now, so a new bo of the * same size should get the same offset */ new_bo = gem_create(fd2, 4096); offset_new = exec_and_get_offset(fd2, new_bo); gem_close(fd2, new_bo); igt_assert_eq(offset, offset_new); gem_close(fd, bo); close(fd); close(fd2); } static void flink_and_exit(void) { uint32_t fd, fd2; uint32_t bo, flinked_bo, name; char match[100]; int to_match; bool matched; int retry = 0; const int retries = 50; fd = drm_open_driver(DRIVER_INTEL); igt_require(gem_uses_full_ppgtt(fd)); bo = gem_create(fd, 4096); name = gem_flink(fd, bo); to_match = snprintf(match, sizeof(match), "(name: %u)", name); igt_assert(to_match < sizeof(match)); fd2 = drm_open_driver(DRIVER_INTEL); flinked_bo = gem_open(fd2, name); exec_and_get_offset(fd2, flinked_bo); gem_sync(fd2, flinked_bo); /* Verify looking for string works OK. */ matched = igt_debugfs_search("i915_gem_gtt", match); igt_assert_eq(matched, true); gem_close(fd2, flinked_bo); /* Close the context. */ close(fd2); retry: /* Give cleanup some time to run. */ usleep(100000); /* The flinked bo VMA should have been cleared now, so list of VMAs * in debugfs should not contain the one for the imported object. */ matched = igt_debugfs_search("i915_gem_gtt", match); if (matched && retry++ < retries) goto retry; igt_assert_eq(matched, false); gem_close(fd, bo); close(fd); } #define N_CHILD 8 int main(int argc, char **argv) { igt_subtest_init(argc, argv); igt_subtest("blt-vs-render-ctx0") { dri_bo *bcs[1], *rcs[N_CHILD]; fork_bcs_copy(0x4000, bcs, 1); fork_rcs_copy(0x8000 / N_CHILD, rcs, N_CHILD, 0); igt_waitchildren(); surfaces_check(bcs, 1, 0x4000); surfaces_check(rcs, N_CHILD, 0x8000 / N_CHILD); } igt_subtest("blt-vs-render-ctxN") { dri_bo *bcs[1], *rcs[N_CHILD]; fork_rcs_copy(0x8000 / N_CHILD, rcs, N_CHILD, CREATE_CONTEXT); fork_bcs_copy(0x4000, bcs, 1); igt_waitchildren(); surfaces_check(bcs, 1, 0x4000); surfaces_check(rcs, N_CHILD, 0x8000 / N_CHILD); } igt_subtest("flink-and-close-vma-leak") flink_and_close(); igt_subtest("flink-and-exit-vma-leak") flink_and_exit(); igt_exit(); } intel-gpu-tools-1.14/tests/drm_vma_limiter.c0000644000175000017500000000617612665336131016122 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter */ #include "igt.h" #include #include #include #include #include #include #include #include #include "drm.h" #include "intel_bufmgr.h" static drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; /* Testcase: check whether the libdrm vma limiter works * * We've had reports of the X server exhausting the default rlimit of 64k vma's * in the kernel. libdrm has grown facilities to limit the vma caching since, * this checks whether they actually work. */ IGT_TEST_DESCRIPTION("Check whether the libdrm vma limiter works."); /* we do both cpu and gtt maps, so only need half of 64k to exhaust */ #define BO_ARRAY_SIZE 35000 drm_intel_bo *bos[BO_ARRAY_SIZE]; igt_simple_main { int fd; int i; char *ptr; igt_skip_on_simulation(); fd = drm_open_driver(DRIVER_INTEL); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); drm_intel_bufmgr_gem_enable_reuse(bufmgr); batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd)); drm_intel_bufmgr_gem_set_vma_cache_size(bufmgr, 500); for (i = 0; i < BO_ARRAY_SIZE; i++) { bos[i] = drm_intel_bo_alloc(bufmgr, "mmap bo", 4096, 4096); igt_assert(bos[i]); drm_intel_bo_map(bos[i], 1); ptr = bos[i]->virtual; igt_assert(ptr); *ptr = 'c'; drm_intel_bo_unmap(bos[i]); drm_intel_gem_bo_map_gtt(bos[i]); ptr = bos[i]->virtual; igt_assert(ptr); *ptr = 'c'; drm_intel_gem_bo_unmap_gtt(bos[i]); } /* and recheck whether a second map of the same still works */ for (i = 0; i < BO_ARRAY_SIZE; i++) { bos[i] = drm_intel_bo_alloc(bufmgr, "mmap bo", 4096, 4096); igt_assert(bos[i]); drm_intel_bo_map(bos[i], 1); ptr = bos[i]->virtual; igt_assert(*ptr = 'c'); drm_intel_bo_unmap(bos[i]); drm_intel_gem_bo_map_gtt(bos[i]); ptr = bos[i]->virtual; igt_assert(*ptr = 'c'); drm_intel_gem_bo_unmap_gtt(bos[i]); } intel_batchbuffer_free(batch); drm_intel_bufmgr_destroy(bufmgr); close(fd); } intel-gpu-tools-1.14/tests/drv_suspend.c0000644000175000017500000001255512665336131015302 00000000000000/* * Copyright © 2013, 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * David Weinehall * */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #define OBJECT_SIZE (16*1024*1024) static void test_fence_restore(int fd, bool tiled2untiled, bool hibernate) { uint32_t handle1, handle2, handle_tiled; uint32_t *ptr1, *ptr2, *ptr_tiled; int i; /* We wall the tiled object with untiled canary objects to make sure * that we detect tile leaking in both directions. */ handle1 = gem_create(fd, OBJECT_SIZE); handle2 = gem_create(fd, OBJECT_SIZE); handle_tiled = gem_create(fd, OBJECT_SIZE); /* Access the buffer objects in the order we want to have the laid out. */ ptr1 = gem_mmap__gtt(fd, handle1, OBJECT_SIZE, PROT_READ | PROT_WRITE); for (i = 0; i < OBJECT_SIZE/sizeof(uint32_t); i++) ptr1[i] = i; ptr_tiled = gem_mmap__gtt(fd, handle_tiled, OBJECT_SIZE, PROT_READ | PROT_WRITE); if (tiled2untiled) gem_set_tiling(fd, handle_tiled, I915_TILING_X, 2048); for (i = 0; i < OBJECT_SIZE/sizeof(uint32_t); i++) ptr_tiled[i] = i; ptr2 = gem_mmap__gtt(fd, handle2, OBJECT_SIZE, PROT_READ | PROT_WRITE); for (i = 0; i < OBJECT_SIZE/sizeof(uint32_t); i++) ptr2[i] = i; if (tiled2untiled) gem_set_tiling(fd, handle_tiled, I915_TILING_NONE, 2048); else gem_set_tiling(fd, handle_tiled, I915_TILING_X, 2048); if (hibernate) igt_system_hibernate_autoresume(); else igt_system_suspend_autoresume(); igt_info("checking the first canary object\n"); for (i = 0; i < OBJECT_SIZE/sizeof(uint32_t); i++) igt_assert(ptr1[i] == i); igt_info("checking the second canary object\n"); for (i = 0; i < OBJECT_SIZE/sizeof(uint32_t); i++) igt_assert(ptr2[i] == i); gem_close(fd, handle1); gem_close(fd, handle2); gem_close(fd, handle_tiled); munmap(ptr1, OBJECT_SIZE); munmap(ptr2, OBJECT_SIZE); munmap(ptr_tiled, OBJECT_SIZE); } static void test_debugfs_reader(bool hibernate) { struct igt_helper_process reader = {}; reader.use_SIGKILL = true; igt_fork_helper(&reader) { static const char dfs_base[] = "/sys/kernel/debug/dri"; static char tmp[1024]; snprintf(tmp, sizeof(tmp) - 1, "while true; do find %s/%i/ -type f | xargs cat > /dev/null 2>&1; done", dfs_base, drm_get_card()); igt_assert(execl("/bin/sh", "sh", "-c", tmp, (char *) NULL) != -1); } sleep(1); if (hibernate) igt_system_hibernate_autoresume(); else igt_system_suspend_autoresume(); sleep(1); igt_stop_helper(&reader); } static void test_sysfs_reader(bool hibernate) { struct igt_helper_process reader = {}; reader.use_SIGKILL = true; igt_fork_helper(&reader) { static const char dfs_base[] = "/sys/class/drm/card"; static char tmp[1024]; snprintf(tmp, sizeof(tmp) - 1, "while true; do find %s%i*/ -type f | xargs cat > /dev/null 2>&1; done", dfs_base, drm_get_card()); igt_assert(execl("/bin/sh", "sh", "-c", tmp, (char *) NULL) != -1); } sleep(1); if (hibernate) igt_system_hibernate_autoresume(); else igt_system_suspend_autoresume(); sleep(1); igt_stop_helper(&reader); } static void test_forcewake(bool hibernate) { int fw_fd; fw_fd = igt_open_forcewake_handle(); igt_assert_lte(0, fw_fd); if (hibernate) igt_system_hibernate_autoresume(); else igt_system_suspend_autoresume(); close (fw_fd); } int fd; igt_main { igt_skip_on_simulation(); igt_fixture fd = drm_open_driver(DRIVER_INTEL); igt_subtest("fence-restore-tiled2untiled") test_fence_restore(fd, true, false); igt_subtest("fence-restore-untiled") test_fence_restore(fd, false, false); igt_subtest("debugfs-reader") test_debugfs_reader(false); igt_subtest("sysfs-reader") test_sysfs_reader(false); igt_subtest("forcewake") test_forcewake(false); igt_subtest("fence-restore-tiled2untiled-hibernate") test_fence_restore(fd, true, true); igt_subtest("fence-restore-untiled-hibernate") test_fence_restore(fd, false, true); igt_subtest("debugfs-reader-hibernate") test_debugfs_reader(true); igt_subtest("sysfs-reader-hibernate") test_sysfs_reader(true); igt_subtest("forcewake-hibernate") test_forcewake(true); igt_fixture close(fd); } intel-gpu-tools-1.14/tests/gem_tiled_wb.c0000644000175000017500000001512312665336131015361 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ /** @file gem_tiled_wc.c * * This is a test of write-combining mmap's behavior on tiled objects * with respect to the reported swizzling value. * * The goal is to exercise the complications that arise when using a linear * view of a tiled object that is subject to hardware swizzling. This is * useful to check that we are presenting the correct view of the object * to userspace, and that userspace has to respect the swizzle. */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include "drm.h" IGT_TEST_DESCRIPTION("This is a test of write-combining mmap's behavior on" " tiled objects with respect to the reported swizzling" " value."); #define WIDTH 512 #define HEIGHT 512 #define SIZE (WIDTH*HEIGHT*sizeof(uint32_t)) #define PAGE_SIZE 4096 static int tile_width; static int tile_height; static int tile_size; static uint32_t create_bo(int fd) { uint32_t handle; uint32_t *data; int i; handle = gem_create(fd, SIZE); gem_set_tiling(fd, handle, I915_TILING_X, WIDTH * sizeof(uint32_t)); /* Write throught the fence to tiled the data. * We then manually detile on reading back through the mmap(wc). */ data = gem_mmap__gtt(fd, handle, SIZE, PROT_READ | PROT_WRITE); for (i = 0; i < WIDTH*HEIGHT; i++) data[i] = i; munmap(data, SIZE); gem_set_domain(fd, handle, I915_GEM_DOMAIN_CPU, 0); return handle; } static int swizzle_bit(int bit, int offset) { return (offset & (1 << bit)) >> (bit - 6); } /* Translate from a swizzled offset in the tiled buffer to the corresponding * value from the original linear buffer. */ static uint32_t calculate_expected(int offset) { int tile_off = offset & (tile_size - 1); int tile_base = offset & -tile_size; int tile_index = tile_base / tile_size; int tiles_per_row = 4*WIDTH / tile_width; /* base x,y values from the tile (page) index. */ int base_y = tile_index / tiles_per_row * tile_height; int base_x = tile_index % tiles_per_row * (tile_width/4); /* x, y offsets within the tile */ int tile_y = tile_off / tile_width; int tile_x = (tile_off % tile_width) / 4; igt_debug("%3d, %3d, %3d,%3d\n", base_x, base_y, tile_x, tile_y); return (base_y + tile_y) * WIDTH + base_x + tile_x; } static void get_tiling(int fd, uint32_t handle, uint32_t *tiling, uint32_t *swizzle) { struct drm_i915_gem_get_tiling2 { uint32_t handle; uint32_t tiling_mode; uint32_t swizzle_mode; uint32_t phys_swizzle_mode; } arg; #define DRM_IOCTL_I915_GEM_GET_TILING2 DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_TILING, struct drm_i915_gem_get_tiling2) memset(&arg, 0, sizeof(arg)); arg.handle = handle; do_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg); igt_require(arg.phys_swizzle_mode == arg.swizzle_mode); *tiling = arg.tiling_mode; *swizzle = arg.swizzle_mode; } igt_simple_main { int fd; int i, iter = 100; uint32_t tiling, swizzle; uint32_t handle; fd = drm_open_driver(DRIVER_INTEL); handle = create_bo(fd); get_tiling(fd, handle, &tiling, &swizzle); if (IS_GEN2(intel_get_drm_devid(fd))) { tile_height = 16; tile_width = 128; tile_size = 2048; } else { tile_height = 8; tile_width = 512; tile_size = PAGE_SIZE; } /* Read a bunch of random subsets of the data and check that they come * out right. */ for (i = 0; i < iter; i++) { int size = WIDTH * HEIGHT * 4; int offset = (random() % size) & ~3; int len = (random() % size) & ~3; int first_page, last_page; uint32_t *linear; int j; if (len == 0) len = 4; if (offset + len > size) len = size - offset; if (i == 0) { offset = 0; len = size; } first_page = offset & ~(PAGE_SIZE-1); last_page = (offset + len + PAGE_SIZE) & ~(PAGE_SIZE-1); offset -= first_page; linear = gem_mmap__cpu(fd, handle, first_page, last_page - first_page, PROT_READ); /* Translate from offsets in the read buffer to the swizzled * address that it corresponds to. This is the opposite of * what Mesa does (calculate offset to be read given the linear * offset it's looking for). */ for (j = offset; j < offset + len; j += 4) { uint32_t expected_val, found_val; int swizzled_offset = j + first_page; const char *swizzle_str; switch (swizzle) { case I915_BIT_6_SWIZZLE_NONE: swizzle_str = "none"; break; case I915_BIT_6_SWIZZLE_9: swizzled_offset ^= swizzle_bit(9, swizzled_offset); swizzle_str = "bit9"; break; case I915_BIT_6_SWIZZLE_9_10: swizzled_offset ^= swizzle_bit(9, swizzled_offset) ^ swizzle_bit(10, swizzled_offset); swizzle_str = "bit9^10"; break; case I915_BIT_6_SWIZZLE_9_11: swizzled_offset ^= swizzle_bit(9, swizzled_offset) ^ swizzle_bit(11, swizzled_offset); swizzle_str = "bit9^11"; break; case I915_BIT_6_SWIZZLE_9_10_11: swizzled_offset ^= swizzle_bit(9, swizzled_offset) ^ swizzle_bit(10, swizzled_offset) ^ swizzle_bit(11, swizzled_offset); swizzle_str = "bit9^10^11"; break; default: igt_skip("unknown swizzling"); break; } expected_val = calculate_expected(swizzled_offset); found_val = linear[j / 4]; igt_assert_f(expected_val == found_val, "Bad read [%d]: %d instead of %d at 0x%08x " "for read from 0x%08x to 0x%08x, swizzle=%s\n", i, found_val, expected_val, j + first_page, offset, offset + len, swizzle_str); } munmap(linear, last_page - first_page); } close(fd); } intel-gpu-tools-1.14/tests/gem_ctx_create.c0000644000175000017500000000406112665336131015710 00000000000000/* * Copyright © 2012 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Ben Widawsky * */ #include "igt.h" #include #include #include int ret, fd; struct drm_i915_gem_context_create create; igt_main { igt_fixture fd = drm_open_driver_render(DRIVER_INTEL); igt_subtest("basic") { create.ctx_id = rand(); create.pad = 0; ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_CONTEXT_CREATE, &create); igt_skip_on(ret != 0 && (errno == ENODEV || errno == EINVAL)); igt_assert(ret == 0); igt_assert(create.ctx_id != 0); } igt_subtest("invalid-pad") { create.ctx_id = rand(); create.pad = 0; ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_CONTEXT_CREATE, &create); igt_skip_on(ret != 0 && (errno == ENODEV || errno == EINVAL)); igt_assert(ret == 0); igt_assert(create.ctx_id != 0); create.pad = 1; igt_assert(drmIoctl(fd, DRM_IOCTL_I915_GEM_CONTEXT_CREATE, &create) < 0 && errno == EINVAL); } igt_fixture close(fd); } intel-gpu-tools-1.14/tests/gem_non_secure_batch.c0000644000175000017500000000532112665336131017070 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter (based on gem_storedw_*.c) * */ #include "igt.h" #include #include #include #include #include #include #include #include #include "drm.h" #include "intel_bufmgr.h" #include "i830_reg.h" IGT_TEST_DESCRIPTION("Basic check of non-secure batches."); static drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; /* * Testcase: Basic check of non-secure batches * * This test tries to stop the render ring with a MI_LOAD_REG command, which * should fail if the non-secure handling works correctly. */ static int num_rings = 1; static void mi_lri_loop(void) { int i; srandom(0xdeadbeef); for (i = 0; i < 0x100; i++) { int ring = random() % num_rings + 1; BEGIN_BATCH(4, 0); OUT_BATCH(MI_LOAD_REGISTER_IMM); OUT_BATCH(0x203c); /* RENDER RING CTL */ OUT_BATCH(0); /* try to stop the ring */ OUT_BATCH(MI_NOOP); ADVANCE_BATCH(); intel_batchbuffer_flush_on_ring(batch, ring); } } igt_simple_main { int fd; int devid; fd = drm_open_driver(DRIVER_INTEL); devid = intel_get_drm_devid(fd); if (HAS_BSD_RING(devid)) num_rings++; if (HAS_BLT_RING(devid)) num_rings++; igt_info("num rings detected: %i\n", num_rings); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); igt_assert(bufmgr); drm_intel_bufmgr_gem_enable_reuse(bufmgr); batch = intel_batchbuffer_alloc(bufmgr, devid); igt_assert(batch); mi_lri_loop(); gem_quiescent_gpu(fd); intel_batchbuffer_free(batch); drm_intel_bufmgr_destroy(bufmgr); close(fd); } intel-gpu-tools-1.14/tests/gem_reloc_vs_gpu.c0000644000175000017500000002155012665336131016260 00000000000000/* * Copyright © 2011,2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * */ #define _GNU_SOURCE #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include IGT_TEST_DESCRIPTION("Test kernel relocations vs. gpu races."); /* * Testcase: Kernel relocations vs. gpu races * */ static drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; uint32_t blob[2048*2048]; #define NUM_TARGET_BOS 16 drm_intel_bo *pc_target_bo[NUM_TARGET_BOS]; drm_intel_bo *dummy_bo; drm_intel_bo *special_bo; uint32_t devid; int special_reloc_ofs; int special_batch_len; static void create_special_bo(void) { uint32_t data[1024]; int len = 0; int small_pitch = 64; #define BATCH(dw) data[len++] = (dw); memset(data, 0, 4096); special_bo = drm_intel_bo_alloc(bufmgr, "special batch", 4096, 4096); if (intel_gen(devid) >= 8) { BATCH(MI_NOOP); BATCH(XY_COLOR_BLT_CMD_NOLEN | 5 | COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB); } else { BATCH(XY_COLOR_BLT_CMD_NOLEN | 4 | COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB); } BATCH((3 << 24) | (0xf0 << 16) | small_pitch); BATCH(0); BATCH(1 << 16 | 1); special_reloc_ofs = 4*len; BATCH(0); if (intel_gen(devid) >= 8) BATCH(0); BATCH(0xdeadbeef); #define CMD_POLY_STIPPLE_OFFSET 0x7906 /* batchbuffer end */ if (IS_GEN5(batch->devid)) { BATCH(CMD_POLY_STIPPLE_OFFSET << 16); BATCH(0); } igt_assert_eq(len % 2, 0); BATCH(MI_NOOP); BATCH(MI_BATCH_BUFFER_END); drm_intel_bo_subdata(special_bo, 0, 4096, data); special_batch_len = len*4; } static void emit_dummy_load(int pitch) { int i; uint32_t tile_flags = 0; if (IS_965(devid)) { pitch /= 4; tile_flags = XY_SRC_COPY_BLT_SRC_TILED | XY_SRC_COPY_BLT_DST_TILED; } for (i = 0; i < 10; i++) { BLIT_COPY_BATCH_START(tile_flags); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ pitch); OUT_BATCH(0 << 16 | 1024); OUT_BATCH((2048) << 16 | (2048)); OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(0 << 16 | 0); OUT_BATCH(pitch); OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, 0, 0); ADVANCE_BATCH(); if (batch->gen >= 6) { BEGIN_BATCH(3, 0); OUT_BATCH(XY_SETUP_CLIP_BLT_CMD); OUT_BATCH(0); OUT_BATCH(0); ADVANCE_BATCH(); } } intel_batchbuffer_flush(batch); } static void reloc_and_emit(int fd, drm_intel_bo *target_bo, bool faulting_reloc) { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 exec[2]; struct drm_i915_gem_relocation_entry reloc[1]; uint32_t handle_relocs; void *gtt_relocs; memset(&execbuf, 0, sizeof(execbuf)); memset(exec, 0, sizeof(exec)); memset(reloc, 0, sizeof(reloc)); exec[0].handle = target_bo->handle; reloc[0].offset = special_reloc_ofs; reloc[0].target_handle = target_bo->handle; reloc[0].read_domains = I915_GEM_DOMAIN_RENDER; reloc[0].write_domain = I915_GEM_DOMAIN_RENDER; /* We do not track the last patched value, so force the relocation * every time. */ reloc[0].presumed_offset = -1; handle_relocs = gem_create(fd, 4096); gem_write(fd, handle_relocs, 0, reloc, sizeof(reloc)); gtt_relocs = gem_mmap__gtt(fd, handle_relocs, 4096, PROT_READ | PROT_WRITE); exec[1].handle = special_bo->handle; exec[1].relocation_count = 1; /* A newly mmap gtt bo will fault on first access. */ if (faulting_reloc) exec[1].relocs_ptr = (uintptr_t)gtt_relocs; else exec[1].relocs_ptr = (uintptr_t)reloc; execbuf.buffers_ptr = (uintptr_t)exec; execbuf.buffer_count = 2; execbuf.batch_len = special_batch_len; if (intel_gen(devid) >= 6) execbuf.flags |= I915_EXEC_BLT; gem_execbuf(fd, &execbuf); gem_close(fd, handle_relocs); } static struct igt_hang_ring no_hang(int fd) { return (struct igt_hang_ring){0}; } static struct igt_hang_ring bcs_hang(int fd) { return igt_hang_ring(fd, I915_EXEC_BLT); } static void do_test(int fd, bool faulting_reloc, struct igt_hang_ring (*do_hang)(int fd)) { uint32_t tiling_mode = I915_TILING_X; unsigned long pitch, act_size; uint32_t test; int i; if (faulting_reloc) igt_disable_prefault(); act_size = 2048; dummy_bo = drm_intel_bo_alloc_tiled(bufmgr, "tiled dummy_bo", act_size, act_size, 4, &tiling_mode, &pitch, 0); drm_intel_bo_subdata(dummy_bo, 0, act_size*act_size*4, blob); create_special_bo(); for (i = 0; i < NUM_TARGET_BOS; i++) { struct igt_hang_ring hang; pc_target_bo[i] = drm_intel_bo_alloc(bufmgr, "special batch", 4096, 4096); emit_dummy_load(pitch); igt_assert(pc_target_bo[i]->offset == 0); hang = do_hang(fd); reloc_and_emit(fd, pc_target_bo[i], faulting_reloc); igt_post_hang_ring(fd, hang); } /* Only check at the end to avoid unnecessary synchronous behaviour. */ for (i = 0; i < NUM_TARGET_BOS; i++) { drm_intel_bo_get_subdata(pc_target_bo[i], 0, 4, &test); igt_assert_f(test == 0xdeadbeef, "mismatch in buffer %i: 0x%08x instead of 0xdeadbeef\n", i, test); drm_intel_bo_unreference(pc_target_bo[i]); } drm_intel_gem_bo_map_gtt(dummy_bo); drm_intel_gem_bo_unmap_gtt(dummy_bo); drm_intel_bo_unreference(special_bo); drm_intel_bo_unreference(dummy_bo); if (faulting_reloc) igt_enable_prefault(); } #define INTERRUPT (1 << 0) #define FAULTING (1 << 1) #define THRASH (1 << 2) #define THRASH_INACTIVE (1 << 3) #define HANG (1 << 4) #define ALL_FLAGS (HANG | INTERRUPT | FAULTING | THRASH | THRASH_INACTIVE) static void do_forked_test(int fd, unsigned flags) { int num_threads = sysconf(_SC_NPROCESSORS_ONLN); struct igt_helper_process thrasher = {}; if (flags & HANG) igt_require_hang_ring(fd, I915_EXEC_BLT); if (flags & (THRASH | THRASH_INACTIVE)) { uint64_t val = (flags & THRASH_INACTIVE) ? (DROP_RETIRE | DROP_BOUND | DROP_UNBOUND) : DROP_ALL; igt_fork_helper(&thrasher) { while (1) { usleep(1000); igt_drop_caches_set(val); } } } igt_fork(i, num_threads * 4) { /* re-create process local data */ fd = drm_open_driver(DRIVER_INTEL); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); batch = intel_batchbuffer_alloc(bufmgr, devid); if (flags & INTERRUPT) igt_fork_signal_helper(); do_test(fd, flags & FAULTING, flags & HANG ? bcs_hang : no_hang); if (flags & INTERRUPT) igt_stop_signal_helper(); } igt_waitchildren(); if (flags & (THRASH | THRASH_INACTIVE)) igt_stop_helper(&thrasher); } int fd; #define MAX_BLT_SIZE 128 igt_main { igt_skip_on_simulation(); memset(blob, 'A', sizeof(blob)); igt_fixture { fd = drm_open_driver(DRIVER_INTEL); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); /* disable reuse, otherwise the test fails */ //drm_intel_bufmgr_gem_enable_reuse(bufmgr); devid = intel_get_drm_devid(fd); batch = intel_batchbuffer_alloc(bufmgr, devid); } igt_subtest("normal") do_test(fd, false, no_hang); igt_subtest("faulting-reloc") do_test(fd, true, no_hang); igt_fork_signal_helper(); igt_subtest("interruptible") do_test(fd, false, no_hang); igt_subtest("interruptible-hang") do_test(fd, false, bcs_hang); igt_subtest("faulting-reloc-interruptible") do_test(fd, true, no_hang); igt_subtest("faulting-reloc-interruptible-hang") do_test(fd, true, bcs_hang); igt_stop_signal_helper(); for (unsigned flags = 0; flags <= ALL_FLAGS; flags++) { if ((flags & THRASH) && (flags & THRASH_INACTIVE)) continue; igt_subtest_f("forked%s%s%s%s%s", flags & INTERRUPT ? "-interruptible" : "", flags & FAULTING ? "-faulting-reloc" : "", flags & THRASH ? "-thrashing" : "", flags & THRASH_INACTIVE ? "-thrash-inactive" : "", flags & HANG ? "-hang": "") do_forked_test(fd, flags); } igt_fixture { intel_batchbuffer_free(batch); drm_intel_bufmgr_destroy(bufmgr); close(fd); } } intel-gpu-tools-1.14/tests/prime_mmap_coherency.c0000644000175000017500000001762512665336131017136 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Tiago Vignatti */ /** @file prime_mmap_coherency.c * * TODO: need to show the need for prime_sync_end(). */ #include "igt.h" IGT_TEST_DESCRIPTION("Test dma-buf mmap on !llc platforms mostly and provoke" " coherency bugs so we know for sure where we need the sync ioctls."); #define ROUNDS 20 int fd; int stale = 0; static drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; static int width = 1024, height = 1024; /* * Exercises the need for read flush: * 1. create a BO and write '0's, in GTT domain. * 2. read BO using the dma-buf CPU mmap. * 3. write '1's, in GTT domain. * 4. read again through the mapped dma-buf. */ static void test_read_flush(bool expect_stale_cache) { drm_intel_bo *bo_1; drm_intel_bo *bo_2; uint32_t *ptr_cpu; uint32_t *ptr_gtt; int dma_buf_fd, i; if (expect_stale_cache) igt_require(!gem_has_llc(fd)); bo_1 = drm_intel_bo_alloc(bufmgr, "BO 1", width * height * 4, 4096); /* STEP #1: put the BO 1 in GTT domain. We use the blitter to copy and fill * zeros to BO 1, so commands will be submitted and likely to place BO 1 in * the GTT domain. */ bo_2 = drm_intel_bo_alloc(bufmgr, "BO 2", width * height * 4, 4096); intel_copy_bo(batch, bo_1, bo_2, width * height); gem_sync(fd, bo_1->handle); drm_intel_bo_unreference(bo_2); /* STEP #2: read BO 1 using the dma-buf CPU mmap. This dirties the CPU caches. */ dma_buf_fd = prime_handle_to_fd_for_mmap(fd, bo_1->handle); igt_skip_on(errno == EINVAL); ptr_cpu = mmap(NULL, width * height, PROT_READ | PROT_WRITE, MAP_SHARED, dma_buf_fd, 0); igt_assert(ptr_cpu != MAP_FAILED); for (i = 0; i < (width * height) / 4; i++) igt_assert_eq(ptr_cpu[i], 0); /* STEP #3: write 0x11 into BO 1. */ bo_2 = drm_intel_bo_alloc(bufmgr, "BO 2", width * height * 4, 4096); ptr_gtt = gem_mmap__gtt(fd, bo_2->handle, width * height, PROT_READ | PROT_WRITE); memset(ptr_gtt, 0x11, width * height); munmap(ptr_gtt, width * height); intel_copy_bo(batch, bo_1, bo_2, width * height); gem_sync(fd, bo_1->handle); drm_intel_bo_unreference(bo_2); /* STEP #4: read again using the CPU mmap. Doing #1 before #3 makes sure we * don't do a full CPU cache flush in step #3 again. That makes sure all the * stale cachelines from step #2 survive (mostly, a few will be evicted) * until we try to read them again in step #4. This behavior could be fixed * by flush CPU read right before accessing the CPU pointer */ if (!expect_stale_cache) prime_sync_start(dma_buf_fd, false); for (i = 0; i < (width * height) / 4; i++) if (ptr_cpu[i] != 0x11111111) { igt_warn_on_f(!expect_stale_cache, "Found 0x%08x at offset 0x%08x\n", ptr_cpu[i], i); stale++; } drm_intel_bo_unreference(bo_1); munmap(ptr_cpu, width * height); } /* * Exercises the need for write flush: * 1. create BO 1 and write '0's, in GTT domain. * 2. write '1's into BO 1 using the dma-buf CPU mmap. * 3. copy BO 1 to new BO 2, in GTT domain. * 4. read via dma-buf mmap BO 2. */ static void test_write_flush(bool expect_stale_cache) { drm_intel_bo *bo_1; drm_intel_bo *bo_2; uint32_t *ptr_cpu; uint32_t *ptr2_cpu; int dma_buf_fd, dma_buf2_fd, i; if (expect_stale_cache) igt_require(!gem_has_llc(fd)); bo_1 = drm_intel_bo_alloc(bufmgr, "BO 1", width * height * 4, 4096); /* STEP #1: Put the BO 1 in GTT domain. We use the blitter to copy and fill * zeros to BO 1, so commands will be submitted and likely to place BO 1 in * the GTT domain. */ bo_2 = drm_intel_bo_alloc(bufmgr, "BO 2", width * height * 4, 4096); intel_copy_bo(batch, bo_1, bo_2, width * height); gem_sync(fd, bo_1->handle); drm_intel_bo_unreference(bo_2); /* STEP #2: Write '1's into BO 1 using the dma-buf CPU mmap. */ dma_buf_fd = prime_handle_to_fd_for_mmap(fd, bo_1->handle); igt_skip_on(errno == EINVAL); ptr_cpu = mmap(NULL, width * height, PROT_READ | PROT_WRITE, MAP_SHARED, dma_buf_fd, 0); igt_assert(ptr_cpu != MAP_FAILED); /* This is the main point of this test: !llc hw requires a cache write * flush right here (explained in step #4). */ if (!expect_stale_cache) prime_sync_start(dma_buf_fd, true); memset(ptr_cpu, 0x11, width * height); /* STEP #3: Copy BO 1 into BO 2, using blitter. */ bo_2 = drm_intel_bo_alloc(bufmgr, "BO 2", width * height * 4, 4096); intel_copy_bo(batch, bo_2, bo_1, width * height); gem_sync(fd, bo_2->handle); /* STEP #4: compare BO 2 against written BO 1. In !llc hardware, there * should be some cache lines that didn't get flushed out and are still 0, * requiring cache flush before the write in step 2. */ dma_buf2_fd = prime_handle_to_fd_for_mmap(fd, bo_2->handle); igt_skip_on(errno == EINVAL); ptr2_cpu = mmap(NULL, width * height, PROT_READ | PROT_WRITE, MAP_SHARED, dma_buf2_fd, 0); igt_assert(ptr2_cpu != MAP_FAILED); for (i = 0; i < (width * height) / 4; i++) if (ptr2_cpu[i] != 0x11111111) { igt_warn_on_f(!expect_stale_cache, "Found 0x%08x at offset 0x%08x\n", ptr2_cpu[i], i); stale++; } drm_intel_bo_unreference(bo_1); drm_intel_bo_unreference(bo_2); munmap(ptr_cpu, width * height); } int main(int argc, char **argv) { int i; bool expect_stale_cache; igt_subtest_init(argc, argv); igt_fixture { fd = drm_open_driver(DRIVER_INTEL); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd)); } /* Cache coherency and the eviction are pretty much unpredictable, so * reproducing boils down to trial and error to hit different scenarios. * TODO: We may want to improve tests a bit by picking random subranges. */ igt_info("%d rounds for each test\n", ROUNDS); igt_subtest("read") { stale = 0; expect_stale_cache = false; igt_info("exercising read flush\n"); for (i = 0; i < ROUNDS; i++) test_read_flush(expect_stale_cache); igt_fail_on_f(stale, "num of stale cache lines %d\n", stale); } /* Only for !llc platforms */ igt_subtest("read-and-fail") { stale = 0; expect_stale_cache = true; igt_info("exercising read flush and expect to fail on !llc\n"); for (i = 0; i < ROUNDS; i++) test_read_flush(expect_stale_cache); igt_fail_on_f(!stale, "couldn't find any stale cache lines\n"); } igt_subtest("write") { stale = 0; expect_stale_cache = false; igt_info("exercising write flush\n"); for (i = 0; i < ROUNDS; i++) test_write_flush(expect_stale_cache); igt_fail_on_f(stale, "num of stale cache lines %d\n", stale); } /* Only for !llc platforms */ igt_subtest("write-and-fail") { stale = 0; expect_stale_cache = true; igt_info("exercising write flush and expect to fail on !llc\n"); for (i = 0; i < ROUNDS; i++) test_write_flush(expect_stale_cache); igt_fail_on_f(!stale, "couldn't find any stale cache lines\n"); } igt_fixture { intel_batchbuffer_free(batch); drm_intel_bufmgr_destroy(bufmgr); close(fd); } igt_exit(); } intel-gpu-tools-1.14/tests/gem_sync.c0000644000175000017500000001152512665336131014546 00000000000000/* * Copyright © 2016 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ #include #include "igt.h" IGT_TEST_DESCRIPTION("Basic check of ring<->ring write synchronisation."); /* * Testcase: Basic check of sync * * Extremely efficient at catching missed irqs */ static double gettime(void) { static clockid_t clock = -1; struct timespec ts; /* Stay on the same clock for consistency. */ if (clock != (clockid_t)-1) { if (clock_gettime(clock, &ts)) goto error; goto out; } #ifdef CLOCK_MONOTONIC_RAW if (!clock_gettime(clock = CLOCK_MONOTONIC_RAW, &ts)) goto out; #endif #ifdef CLOCK_MONOTONIC_COARSE if (!clock_gettime(clock = CLOCK_MONOTONIC_COARSE, &ts)) goto out; #endif if (!clock_gettime(clock = CLOCK_MONOTONIC, &ts)) goto out; error: igt_warn("Could not read monotonic time: %s\n", strerror(errno)); igt_assert(0); return 0; out: return ts.tv_sec + 1e-9*ts.tv_nsec; } static int has_engine(int fd, const struct intel_execution_engine *e) { uint32_t bbe = MI_BATCH_BUFFER_END; struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 exec; int ret; memset(&exec, 0, sizeof(exec)); exec.handle = gem_create(fd, 4096); gem_write(fd, exec.handle, 0, &bbe, sizeof(bbe)); memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)&exec; execbuf.buffer_count = 1; execbuf.flags = e->exec_id | e->flags; ret = __gem_execbuf(fd, &execbuf); gem_close(fd, exec.handle); return ret; } static void sync_ring(int fd, unsigned ring, int num_children) { unsigned engines[16]; const char *names[16]; int num_engines = 0; if (ring == ~0u) { const struct intel_execution_engine *e; for (e = intel_execution_engines; e->name; e++) { if (e->exec_id == 0) continue; if (has_engine(fd, e)) continue; if (e->exec_id == I915_EXEC_BSD) { int is_bsd2 = e->flags != 0; if (gem_has_bsd2(fd) != is_bsd2) continue; } names[num_engines] = e->name; engines[num_engines++] = e->exec_id | e->flags; if (num_engines == ARRAY_SIZE(engines)) break; } num_children *= num_engines; } else { gem_require_ring(fd, ring); names[num_engines] = NULL; engines[num_engines++] = ring; } intel_detect_and_clear_missed_interrupts(fd); igt_fork(child, num_children) { const uint32_t bbe = MI_BATCH_BUFFER_END; struct drm_i915_gem_exec_object2 object; struct drm_i915_gem_execbuffer2 execbuf; double start, elapsed; unsigned long cycles; memset(&object, 0, sizeof(object)); object.handle = gem_create(fd, 4096); gem_write(fd, object.handle, 0, &bbe, sizeof(bbe)); memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)&object; execbuf.buffer_count = 1; execbuf.flags = engines[child % num_engines]; gem_execbuf(fd, &execbuf); start = gettime(); cycles = 0; do { do { gem_execbuf(fd, &execbuf); gem_sync(fd, object.handle); } while (++cycles & 1023); } while ((elapsed = gettime() - start) < SLOW_QUICK(10, 1)); igt_info("%s%sompleted %ld cycles: %.3f us\n", names[child % num_engines] ?: "", names[child % num_engines] ? " c" : "C", cycles, elapsed*1e6/cycles); gem_close(fd, object.handle); } igt_waitchildren_timeout(20, NULL); igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); } igt_main { const struct intel_execution_engine *e; const int ncpus = sysconf(_SC_NPROCESSORS_ONLN); int fd = -1; igt_skip_on_simulation(); igt_fixture fd = drm_open_driver(DRIVER_INTEL); for (e = intel_execution_engines; e->name; e++) { igt_subtest_f("basic-%s", e->name) sync_ring(fd, e->exec_id | e->flags, 1); igt_subtest_f("forked-%s", e->name) sync_ring(fd, e->exec_id | e->flags, ncpus); } igt_subtest("basic-all") sync_ring(fd, ~0u, 1); igt_subtest("forked-all") sync_ring(fd, ~0u, ncpus); igt_fixture close(fd); } intel-gpu-tools-1.14/tests/pm_rps.c0000644000175000017500000004054012665336131014241 00000000000000/* * Copyright © 2012 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Ben Widawsky * Jeff McGee * */ #define _GNU_SOURCE #include "igt.h" #include #include #include #include #include #include #include #include #include #include "intel_bufmgr.h" static int drm_fd; static const char sysfs_base_path[] = "/sys/class/drm/card%d/gt_%s_freq_mhz"; enum { CUR, MIN, MAX, RP0, RP1, RPn, NUMFREQ }; static int origfreqs[NUMFREQ]; struct junk { const char *name; const char *mode; FILE *filp; } stuff[] = { { "cur", "r", NULL }, { "min", "rb+", NULL }, { "max", "rb+", NULL }, { "RP0", "r", NULL }, { "RP1", "r", NULL }, { "RPn", "r", NULL }, { NULL, NULL, NULL } }; static int readval(FILE *filp) { int val; int scanned; rewind(filp); scanned = fscanf(filp, "%d", &val); igt_assert_eq(scanned, 1); return val; } static void read_freqs(int *freqs) { int i; for (i = 0; i < NUMFREQ; i++) freqs[i] = readval(stuff[i].filp); } static void nsleep(unsigned long ns) { struct timespec ts; int ret; ts.tv_sec = 0; ts.tv_nsec = ns; do { struct timespec rem; ret = nanosleep(&ts, &rem); igt_assert(ret == 0 || errno == EINTR); ts = rem; } while (ret && errno == EINTR); } static void wait_freq_settle(void) { int timeout = 10; while (1) { int freqs[NUMFREQ]; read_freqs(freqs); if (freqs[CUR] >= freqs[MIN] && freqs[CUR] <= freqs[MAX]) break; nsleep(1000000); if (!timeout--) break; } } static int do_writeval(FILE *filp, int val, int lerrno, bool readback_check) { int ret, orig; orig = readval(filp); rewind(filp); ret = fprintf(filp, "%d", val); if (lerrno) { /* Expecting specific error */ igt_assert(ret == EOF && errno == lerrno); if (readback_check) igt_assert_eq(readval(filp), orig); } else { /* Expecting no error */ igt_assert_neq(ret, 0); wait_freq_settle(); if (readback_check) igt_assert_eq(readval(filp), val); } return ret; } #define writeval(filp, val) do_writeval(filp, val, 0, true) #define writeval_inval(filp, val) do_writeval(filp, val, EINVAL, true) #define writeval_nocheck(filp, val) do_writeval(filp, val, 0, false) static void checkit(const int *freqs) { igt_assert_lte(freqs[MIN], freqs[MAX]); igt_assert_lte(freqs[CUR], freqs[MAX]); igt_assert_lte(freqs[RPn], freqs[CUR]); igt_assert_lte(freqs[RPn], freqs[MIN]); igt_assert_lte(freqs[MAX], freqs[RP0]); igt_assert_lte(freqs[RP1], freqs[RP0]); igt_assert_lte(freqs[RPn], freqs[RP1]); igt_assert_neq(freqs[RP0], 0); igt_assert_neq(freqs[RP1], 0); } static void matchit(const int *freqs1, const int *freqs2) { igt_assert_eq(freqs1[CUR], freqs2[CUR]); igt_assert_eq(freqs1[MIN], freqs2[MIN]); igt_assert_eq(freqs1[MAX], freqs2[MAX]); igt_assert_eq(freqs1[RP0], freqs2[RP0]); igt_assert_eq(freqs1[RP1], freqs2[RP1]); igt_assert_eq(freqs1[RPn], freqs2[RPn]); } static void dump(const int *freqs) { int i; igt_debug("gt freq (MHz):"); for (i = 0; i < NUMFREQ; i++) igt_debug(" %s=%d", stuff[i].name, freqs[i]); igt_debug("\n"); } enum load { LOW, HIGH }; static struct load_helper { int devid; int has_ppgtt; drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; drm_intel_bo *target_buffer; enum load load; bool exit; struct igt_helper_process igt_proc; drm_intel_bo *src, *dst; } lh; static void load_helper_signal_handler(int sig) { if (sig == SIGUSR2) lh.load = lh.load == LOW ? HIGH : LOW; else lh.exit = true; } static void emit_store_dword_imm(uint32_t val) { int cmd; struct intel_batchbuffer *batch = lh.batch; cmd = MI_STORE_DWORD_IMM; if (!lh.has_ppgtt) cmd |= MI_MEM_VIRTUAL; BEGIN_BATCH(4, 0); /* just ignore the reloc we emit and count dwords */ OUT_BATCH(cmd); if (batch->gen >= 8) { OUT_RELOC(lh.target_buffer, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, 0); } else { OUT_BATCH(0); /* reserved */ OUT_RELOC(lh.target_buffer, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, 0); } OUT_BATCH(val); ADVANCE_BATCH(); } #define LOAD_HELPER_PAUSE_USEC 500 #define LOAD_HELPER_BO_SIZE (16*1024*1024) static void load_helper_set_load(enum load load) { igt_assert(lh.igt_proc.running); if (lh.load == load) return; lh.load = load; kill(lh.igt_proc.pid, SIGUSR2); } static void load_helper_run(enum load load) { /* * FIXME fork helpers won't get cleaned up when started from within a * subtest, so handle the case where it sticks around a bit too long. */ if (lh.igt_proc.running) { load_helper_set_load(load); return; } lh.load = load; igt_fork_helper(&lh.igt_proc) { uint32_t val = 0; signal(SIGUSR1, load_helper_signal_handler); signal(SIGUSR2, load_helper_signal_handler); while (!lh.exit) { if (lh.load == HIGH) intel_copy_bo(lh.batch, lh.dst, lh.src, LOAD_HELPER_BO_SIZE); emit_store_dword_imm(val); intel_batchbuffer_flush_on_ring(lh.batch, 0); val++; /* Lower the load by pausing after every submitted * write. */ if (lh.load == LOW) usleep(LOAD_HELPER_PAUSE_USEC); } /* Map buffer to stall for write completion */ drm_intel_bo_map(lh.target_buffer, 0); drm_intel_bo_unmap(lh.target_buffer); igt_debug("load helper sent %u dword writes\n", val); } } static void load_helper_stop(void) { kill(lh.igt_proc.pid, SIGUSR1); igt_assert(igt_wait_helper(&lh.igt_proc) == 0); } static void load_helper_init(void) { lh.devid = intel_get_drm_devid(drm_fd); lh.has_ppgtt = gem_uses_ppgtt(drm_fd); /* MI_STORE_DATA can only use GTT address on gen4+/g33 and needs * snoopable mem on pre-gen6. Hence load-helper only works on gen6+, but * that's also all we care about for the rps testcase*/ igt_assert(intel_gen(lh.devid) >= 6); lh.bufmgr = drm_intel_bufmgr_gem_init(drm_fd, 4096); igt_assert(lh.bufmgr); drm_intel_bufmgr_gem_enable_reuse(lh.bufmgr); lh.batch = intel_batchbuffer_alloc(lh.bufmgr, lh.devid); igt_assert(lh.batch); lh.target_buffer = drm_intel_bo_alloc(lh.bufmgr, "target bo", 4096, 4096); igt_assert(lh.target_buffer); lh.dst = drm_intel_bo_alloc(lh.bufmgr, "dst bo", LOAD_HELPER_BO_SIZE, 4096); igt_assert(lh.dst); lh.src = drm_intel_bo_alloc(lh.bufmgr, "src bo", LOAD_HELPER_BO_SIZE, 4096); igt_assert(lh.src); } static void load_helper_deinit(void) { if (lh.igt_proc.running) load_helper_stop(); if (lh.target_buffer) drm_intel_bo_unreference(lh.target_buffer); if (lh.src) drm_intel_bo_unreference(lh.src); if (lh.dst) drm_intel_bo_unreference(lh.dst); if (lh.batch) intel_batchbuffer_free(lh.batch); if (lh.bufmgr) drm_intel_bufmgr_destroy(lh.bufmgr); } static void do_load_gpu(void) { load_helper_run(LOW); nsleep(10000000); load_helper_stop(); } /* Return a frequency rounded by HW to the nearest supported value */ static int get_hw_rounded_freq(int target) { int freqs[NUMFREQ]; int old_freq; int idx; int ret; read_freqs(freqs); if (freqs[MIN] > target) idx = MIN; else idx = MAX; old_freq = freqs[idx]; writeval_nocheck(stuff[idx].filp, target); read_freqs(freqs); ret = freqs[idx]; writeval_nocheck(stuff[idx].filp, old_freq); return ret; } static void min_max_config(void (*check)(void), bool load_gpu) { int fmid = (origfreqs[RPn] + origfreqs[RP0]) / 2; /* * hw (and so kernel) rounds to the nearest value supported by * the given platform. */ fmid = get_hw_rounded_freq(fmid); igt_debug("\nCheck original min and max...\n"); if (load_gpu) do_load_gpu(); check(); igt_debug("\nSet min=RPn and max=RP0...\n"); writeval(stuff[MIN].filp, origfreqs[RPn]); writeval(stuff[MAX].filp, origfreqs[RP0]); if (load_gpu) do_load_gpu(); check(); igt_debug("\nIncrease min to midpoint...\n"); writeval(stuff[MIN].filp, fmid); if (load_gpu) do_load_gpu(); check(); igt_debug("\nIncrease min to RP0...\n"); writeval(stuff[MIN].filp, origfreqs[RP0]); if (load_gpu) do_load_gpu(); check(); igt_debug("\nIncrease min above RP0 (invalid)...\n"); writeval_inval(stuff[MIN].filp, origfreqs[RP0] + 1000); check(); igt_debug("\nDecrease max to RPn (invalid)...\n"); writeval_inval(stuff[MAX].filp, origfreqs[RPn]); check(); igt_debug("\nDecrease min to midpoint...\n"); writeval(stuff[MIN].filp, fmid); if (load_gpu) do_load_gpu(); check(); igt_debug("\nDecrease min to RPn...\n"); writeval(stuff[MIN].filp, origfreqs[RPn]); if (load_gpu) do_load_gpu(); check(); igt_debug("\nDecrease min below RPn (invalid)...\n"); writeval_inval(stuff[MIN].filp, 0); check(); igt_debug("\nDecrease max to midpoint...\n"); writeval(stuff[MAX].filp, fmid); check(); igt_debug("\nDecrease max to RPn...\n"); writeval(stuff[MAX].filp, origfreqs[RPn]); check(); igt_debug("\nDecrease max below RPn (invalid)...\n"); writeval_inval(stuff[MAX].filp, 0); check(); igt_debug("\nIncrease min to RP0 (invalid)...\n"); writeval_inval(stuff[MIN].filp, origfreqs[RP0]); check(); igt_debug("\nIncrease max to midpoint...\n"); writeval(stuff[MAX].filp, fmid); check(); igt_debug("\nIncrease max to RP0...\n"); writeval(stuff[MAX].filp, origfreqs[RP0]); check(); igt_debug("\nIncrease max above RP0 (invalid)...\n"); writeval_inval(stuff[MAX].filp, origfreqs[RP0] + 1000); check(); writeval(stuff[MIN].filp, origfreqs[MIN]); writeval(stuff[MAX].filp, origfreqs[MAX]); } static void basic_check(void) { int freqs[NUMFREQ]; read_freqs(freqs); dump(freqs); checkit(freqs); } #define IDLE_WAIT_TIMESTEP_MSEC 100 #define IDLE_WAIT_TIMEOUT_MSEC 10000 static void idle_check(void) { int freqs[NUMFREQ]; int wait = 0; /* Monitor frequencies until cur settles down to min, which should * happen within the allotted time */ do { read_freqs(freqs); dump(freqs); checkit(freqs); if (freqs[CUR] == freqs[RPn]) break; usleep(1000 * IDLE_WAIT_TIMESTEP_MSEC); wait += IDLE_WAIT_TIMESTEP_MSEC; } while (wait < IDLE_WAIT_TIMEOUT_MSEC); igt_assert_eq(freqs[CUR], freqs[RPn]); igt_debug("Required %d msec to reach cur=idle\n", wait); } #define LOADED_WAIT_TIMESTEP_MSEC 100 #define LOADED_WAIT_TIMEOUT_MSEC 3000 static void loaded_check(void) { int freqs[NUMFREQ]; int wait = 0; /* Monitor frequencies until cur increases to max, which should * happen within the allotted time */ do { read_freqs(freqs); dump(freqs); checkit(freqs); if (freqs[CUR] == freqs[MAX]) break; usleep(1000 * LOADED_WAIT_TIMESTEP_MSEC); wait += LOADED_WAIT_TIMESTEP_MSEC; } while (wait < LOADED_WAIT_TIMEOUT_MSEC); igt_assert_eq(freqs[CUR], freqs[MAX]); igt_debug("Required %d msec to reach cur=max\n", wait); } #define STABILIZE_WAIT_TIMESTEP_MSEC 100 #define STABILIZE_WAIT_TIMEOUT_MSEC 10000 static void stabilize_check(int *freqs) { int wait = 0; do { read_freqs(freqs); dump(freqs); usleep(1000 * STABILIZE_WAIT_TIMESTEP_MSEC); wait += STABILIZE_WAIT_TIMESTEP_MSEC; } while (wait < STABILIZE_WAIT_TIMEOUT_MSEC); igt_debug("Waited %d msec to stabilize cur\n", wait); } /* * reset - test that turbo works across a ring stop * * METHOD * Apply a low GPU load, collect the resulting frequencies, then stop * the GPU by stopping the rings. Apply alternating high and low loads * following the restart, comparing against the previous low load freqs * and whether the GPU ramped to max freq successfully. Finally check * that we return to idle at the end. * * EXPECTED RESULTS * Low load freqs match, high load freqs reach max, and GPU returns to * idle at the end. * * FAILURES * Failures here could indicate turbo doesn't work across a ring stop * or that load generation routines don't successfully generate stable * or maximal GPU loads. It could also indicate a thermal limit if the * GPU isn't able to reach its maximum frequency. */ static void reset(void) { int pre_freqs[NUMFREQ]; int post_freqs[NUMFREQ]; /* * quiescent_gpu upsets the gpu and makes it get pegged to max somehow. * Don't ask. */ sleep(10); igt_debug("Apply low load...\n"); load_helper_run(LOW); stabilize_check(pre_freqs); igt_debug("Stop rings...\n"); igt_set_stop_rings(STOP_RING_DEFAULTS); while (igt_get_stop_rings()) usleep(1000 * 100); igt_debug("Ring stop cleared\n"); igt_debug("Apply high load...\n"); load_helper_set_load(HIGH); loaded_check(); igt_debug("Apply low load...\n"); load_helper_set_load(LOW); stabilize_check(post_freqs); matchit(pre_freqs, post_freqs); igt_debug("Apply high load...\n"); load_helper_set_load(HIGH); loaded_check(); igt_debug("Removing load...\n"); load_helper_stop(); idle_check(); } /* * blocking - test that GPU returns to idle after a forced blocking boost * and a low GPU load. Frequencies resulting from the low load are also * expected to match.o * * METHOD * Collect frequencies resulting from a low GPU load and compare with * frequencies collected after a quiesce and a second low load, then * verify idle. * * EXPECTED RESULTS * Frequencies match and GPU successfully returns to idle afterward. * * FAILURES * Failures in this test could be due to several possible bugs: * - load generation creates unstable frequencies, though stabilize_check() * is supposed to catch this * - quiescent_gpu() call does not boost GPU to max freq * - frequency ramp down is too slow, causing second set of collected * frequencies to be higher than the first */ static void blocking(void) { int pre_freqs[NUMFREQ]; int post_freqs[NUMFREQ]; int fd = drm_open_driver(DRIVER_INTEL); igt_assert_lte(0, fd); /* * quiescent_gpu upsets the gpu and makes it get pegged to max somehow. * Don't ask. */ sleep(10); igt_debug("Apply low load...\n"); load_helper_run(LOW); stabilize_check(pre_freqs); load_helper_stop(); sleep(5); igt_debug("Kick gpu hard ...\n"); /* This relies on the blocking waits in quiescent_gpu and the kernel * boost logic to ramp the gpu to full load. */ gem_quiescent_gpu(fd); gem_quiescent_gpu(fd); igt_debug("Apply low load again...\n"); load_helper_run(LOW); stabilize_check(post_freqs); load_helper_stop(); matchit(pre_freqs, post_freqs); igt_debug("Removing load...\n"); idle_check(); } static void pm_rps_exit_handler(int sig) { if (origfreqs[MIN] > readval(stuff[MAX].filp)) { writeval(stuff[MAX].filp, origfreqs[MAX]); writeval(stuff[MIN].filp, origfreqs[MIN]); } else { writeval(stuff[MIN].filp, origfreqs[MIN]); writeval(stuff[MAX].filp, origfreqs[MAX]); } load_helper_deinit(); close(drm_fd); } igt_main { igt_skip_on_simulation(); igt_fixture { const int device = drm_get_card(); struct junk *junk = stuff; int ret; /* Use drm_open_driver to verify device existence */ drm_fd = drm_open_driver(DRIVER_INTEL); do { int val = -1; char *path; ret = asprintf(&path, sysfs_base_path, device, junk->name); igt_assert(ret != -1); junk->filp = fopen(path, junk->mode); igt_require(junk->filp); setbuf(junk->filp, NULL); val = readval(junk->filp); igt_assert(val >= 0); junk++; } while(junk->name != NULL); read_freqs(origfreqs); igt_install_exit_handler(pm_rps_exit_handler); load_helper_init(); } igt_subtest("basic-api") min_max_config(basic_check, false); igt_subtest("min-max-config-idle") min_max_config(idle_check, true); igt_subtest("min-max-config-loaded") { load_helper_run(HIGH); min_max_config(loaded_check, false); load_helper_stop(); } igt_subtest("reset") reset(); igt_subtest("blocking") blocking(); } intel-gpu-tools-1.14/tests/gem_partial_pwrite_pread.c0000644000175000017500000001626412665336131020000 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * */ #include "igt.h" #include #include #include #include #include #include #include #include #include IGT_TEST_DESCRIPTION("Test pwrite/pread consistency when touching partial" " cachelines."); /* * Testcase: pwrite/pread consistency when touching partial cachelines * * Some fancy new pwrite/pread optimizations clflush in-line while * reading/writing. Check whether all required clflushes happen. * */ static drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; drm_intel_bo *scratch_bo; drm_intel_bo *staging_bo; #define BO_SIZE (4*4096) uint32_t devid; uint64_t mappable_gtt_limit; int fd; static void copy_bo(drm_intel_bo *src, drm_intel_bo *dst) { BLIT_COPY_BATCH_START(0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ 4096); OUT_BATCH(0 << 16 | 0); OUT_BATCH((BO_SIZE/4096) << 16 | 1024); OUT_RELOC_FENCED(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(0 << 16 | 0); OUT_BATCH(4096); OUT_RELOC_FENCED(src, I915_GEM_DOMAIN_RENDER, 0, 0); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); } static void blt_bo_fill(drm_intel_bo *tmp_bo, drm_intel_bo *bo, uint8_t val) { uint8_t *gtt_ptr; int i; do_or_die(drm_intel_gem_bo_map_gtt(tmp_bo)); gtt_ptr = tmp_bo->virtual; for (i = 0; i < BO_SIZE; i++) gtt_ptr[i] = val; drm_intel_gem_bo_unmap_gtt(tmp_bo); if (bo->offset < mappable_gtt_limit && (IS_G33(devid) || intel_gen(devid) >= 4)) igt_trash_aperture(); copy_bo(tmp_bo, bo); } #define MAX_BLT_SIZE 128 #define ROUNDS 1000 uint8_t tmp[BO_SIZE]; static void get_range(int *start, int *len) { *start = random() % (BO_SIZE - 1); *len = random() % (BO_SIZE - *start - 1) + 1; } static void test_partial_reads(void) { int i, j; igt_info("checking partial reads\n"); for (i = 0; i < ROUNDS; i++) { uint8_t val = i; int start, len; blt_bo_fill(staging_bo, scratch_bo, val); get_range(&start, &len); do_or_die(drm_intel_bo_get_subdata(scratch_bo, start, len, tmp)); for (j = 0; j < len; j++) { igt_assert_f(tmp[j] == val, "mismatch at %i [%i + %i], got: %i, expected: %i\n", j, start, len, tmp[j], val); } igt_progress("partial reads test: ", i, ROUNDS); } } static void test_partial_writes(void) { int i, j; uint8_t *gtt_ptr; igt_info("checking partial writes\n"); for (i = 0; i < ROUNDS; i++) { uint8_t val = i; int start, len; blt_bo_fill(staging_bo, scratch_bo, val); memset(tmp, i + 63, BO_SIZE); get_range(&start, &len); drm_intel_bo_subdata(scratch_bo, start, len, tmp); copy_bo(scratch_bo, staging_bo); drm_intel_gem_bo_map_gtt(staging_bo); gtt_ptr = staging_bo->virtual; for (j = 0; j < start; j++) { igt_assert_f(gtt_ptr[j] == val, "mismatch at %i (start=%i), got: %i, expected: %i\n", j, start, tmp[j], val); } for (; j < start + len; j++) { igt_assert_f(gtt_ptr[j] == tmp[0], "mismatch at %i (%i/%i), got: %i, expected: %i\n", j, j-start, len, tmp[j], i); } for (; j < BO_SIZE; j++) { igt_assert_f(gtt_ptr[j] == val, "mismatch at %i (end=%i), got: %i, expected: %i\n", j, start+len, tmp[j], val); } drm_intel_gem_bo_unmap_gtt(staging_bo); igt_progress("partial writes test: ", i, ROUNDS); } } static void test_partial_read_writes(void) { int i, j; uint8_t *gtt_ptr; igt_info("checking partial writes after partial reads\n"); for (i = 0; i < ROUNDS; i++) { uint8_t val = i; int start, len; blt_bo_fill(staging_bo, scratch_bo, val); /* partial read */ get_range(&start, &len); drm_intel_bo_get_subdata(scratch_bo, start, len, tmp); for (j = 0; j < len; j++) { igt_assert_f(tmp[j] == val, "mismatch in read at %i [%i + %i], got: %i, expected: %i\n", j, start, len, tmp[j], val); } /* Change contents through gtt to make the pread cachelines * stale. */ val += 17; blt_bo_fill(staging_bo, scratch_bo, val); /* partial write */ memset(tmp, i + 63, BO_SIZE); get_range(&start, &len); drm_intel_bo_subdata(scratch_bo, start, len, tmp); copy_bo(scratch_bo, staging_bo); do_or_die(drm_intel_gem_bo_map_gtt(staging_bo)); gtt_ptr = staging_bo->virtual; for (j = 0; j < start; j++) { igt_assert_f(gtt_ptr[j] == val, "mismatch at %i (start=%i), got: %i, expected: %i\n", j, start, tmp[j], val); } for (; j < start + len; j++) { igt_assert_f(gtt_ptr[j] == tmp[0], "mismatch at %i (%i/%i), got: %i, expected: %i\n", j, j - start, len, tmp[j], tmp[0]); } for (; j < BO_SIZE; j++) { igt_assert_f(gtt_ptr[j] == val, "mismatch at %i (end=%i), got: %i, expected: %i\n", j, start + len, tmp[j], val); } drm_intel_gem_bo_unmap_gtt(staging_bo); igt_progress("partial read/writes test: ", i, ROUNDS); } } static void do_tests(int cache_level, const char *suffix) { igt_fixture { if (cache_level != -1) gem_set_caching(fd, scratch_bo->handle, cache_level); } igt_subtest_f("reads%s", suffix) test_partial_reads(); igt_subtest_f("write%s", suffix) test_partial_writes(); igt_subtest_f("writes-after-reads%s", suffix) test_partial_read_writes(); } igt_main { srandom(0xdeadbeef); igt_skip_on_simulation(); igt_fixture { fd = drm_open_driver(DRIVER_INTEL); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); //drm_intel_bufmgr_gem_enable_reuse(bufmgr); devid = intel_get_drm_devid(fd); batch = intel_batchbuffer_alloc(bufmgr, devid); /* overallocate the buffers we're actually using because */ scratch_bo = drm_intel_bo_alloc(bufmgr, "scratch bo", BO_SIZE, 4096); staging_bo = drm_intel_bo_alloc(bufmgr, "staging bo", BO_SIZE, 4096); igt_init_aperture_trashers(bufmgr); mappable_gtt_limit = gem_mappable_aperture_size(); } do_tests(-1, ""); /* Repeat the tests using different levels of snooping */ do_tests(0, "-uncached"); do_tests(1, "-snoop"); do_tests(2, "-display"); igt_fixture { igt_cleanup_aperture_trashers(); drm_intel_bufmgr_destroy(bufmgr); close(fd); } } intel-gpu-tools-1.14/tests/gem_double_irq_loop.c0000644000175000017500000000677612665336131016764 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter (based on gem_storedw_*.c) * */ #include "igt.h" #include #include #include #include #include #include #include #include #include "drm.h" #include "intel_bufmgr.h" #include "i830_reg.h" static drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; static drm_intel_bo *target_buffer, *blt_bo; /* * Testcase: Basic check for missed irqs on blt * * Execs one large and then immediately a tiny batch on the blt ring. Then waits * on the second batch. This hopefully catches races in our irq acknowledgement. */ IGT_TEST_DESCRIPTION("Basic check for missed IRQs on blt ring."); #define MI_COND_BATCH_BUFFER_END (0x36<<23 | 1) #define MI_DO_COMPARE (1<<21) static void dummy_reloc_loop(void) { int i; for (i = 0; i < 0x800; i++) { BLIT_COPY_BATCH_START(0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ 4*4096); OUT_BATCH(2048 << 16 | 0); OUT_BATCH((4096) << 16 | (2048)); OUT_RELOC_FENCED(blt_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(0 << 16 | 0); OUT_BATCH(4*4096); OUT_RELOC_FENCED(blt_bo, I915_GEM_DOMAIN_RENDER, 0, 0); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); BEGIN_BATCH(4, 1); OUT_BATCH(MI_FLUSH_DW | 1); OUT_BATCH(0); /* reserved */ OUT_RELOC(target_buffer, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(MI_NOOP | (1<<22) | (0xf)); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); drm_intel_bo_map(target_buffer, 0); // map to force completion drm_intel_bo_unmap(target_buffer); } } igt_simple_main { int fd; int devid; igt_skip_on_simulation(); fd = drm_open_driver(DRIVER_INTEL); devid = intel_get_drm_devid(fd); igt_require_f(HAS_BLT_RING(devid), "not (yet) implemented for pre-snb\n"); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); igt_assert(bufmgr); drm_intel_bufmgr_gem_enable_reuse(bufmgr); batch = intel_batchbuffer_alloc(bufmgr, devid); igt_assert(batch); target_buffer = drm_intel_bo_alloc(bufmgr, "target bo", 4096, 4096); igt_assert(target_buffer); blt_bo = drm_intel_bo_alloc(bufmgr, "target bo", 4*4096*4096, 4096); igt_assert(blt_bo); dummy_reloc_loop(); drm_intel_bo_unreference(target_buffer); intel_batchbuffer_free(batch); drm_intel_bufmgr_destroy(bufmgr); close(fd); } intel-gpu-tools-1.14/tests/kms_plane.c0000644000175000017500000002614012665336131014712 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Damien Lespiau */ #include "igt.h" #include #include #include #include typedef struct { float red; float green; float blue; } color_t; typedef struct { int drm_fd; igt_display_t display; igt_pipe_crc_t *pipe_crc; } data_t; static color_t red = { 1.0f, 0.0f, 0.0f }; static color_t green = { 0.0f, 1.0f, 0.0f }; static color_t blue = { 0.0f, 0.0f, 1.0f }; /* * Common code across all tests, acting on data_t */ static void test_init(data_t *data, enum pipe pipe) { data->pipe_crc = igt_pipe_crc_new(pipe, INTEL_PIPE_CRC_SOURCE_AUTO); } static void test_fini(data_t *data) { igt_pipe_crc_free(data->pipe_crc); } static void test_grab_crc(data_t *data, igt_output_t *output, enum pipe pipe, color_t *fb_color, igt_crc_t *crc /* out */) { struct igt_fb fb; drmModeModeInfo *mode; igt_plane_t *primary; char *crc_str; igt_output_set_pipe(output, pipe); primary = igt_output_get_plane(output, 0); mode = igt_output_get_mode(output); igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, fb_color->red, fb_color->green, fb_color->blue, &fb); igt_plane_set_fb(primary, &fb); igt_display_commit(&data->display); igt_pipe_crc_collect_crc(data->pipe_crc, crc); igt_plane_set_fb(primary, NULL); igt_display_commit(&data->display); igt_remove_fb(data->drm_fd, &fb); crc_str = igt_crc_to_string(crc); igt_debug("CRC for a (%.02f,%.02f,%.02f) fb: %s\n", fb_color->red, fb_color->green, fb_color->blue, crc_str); free(crc_str); } /* * Plane position test. * - We start by grabbing a reference CRC of a full green fb being scanned * out on the primary plane * - Then we scannout 2 planes: * - the primary plane uses a green fb with a black rectangle * - a plane, on top of the primary plane, with a green fb that is set-up * to cover the black rectangle of the primary plane fb * The resulting CRC should be identical to the reference CRC */ typedef struct { data_t *data; igt_crc_t reference_crc; } test_position_t; /* * create a green fb with a black rectangle at (rect_x,rect_y) and of size * (rect_w,rect_h) */ static void create_fb_for_mode__position(data_t *data, drmModeModeInfo *mode, double rect_x, double rect_y, double rect_w, double rect_h, struct igt_fb *fb /* out */) { unsigned int fb_id; cairo_t *cr; fb_id = igt_create_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, fb); igt_assert(fb_id); cr = igt_get_cairo_ctx(data->drm_fd, fb); igt_paint_color(cr, 0, 0, mode->hdisplay, mode->vdisplay, 0.0, 1.0, 0.0); igt_paint_color(cr, rect_x, rect_y, rect_w, rect_h, 0.0, 0.0, 0.0); igt_assert(cairo_status(cr) == 0); cairo_destroy(cr); } enum { TEST_POSITION_FULLY_COVERED = 1 << 0, TEST_DPMS = 1 << 1, }; static void test_plane_position_with_output(data_t *data, enum pipe pipe, enum igt_plane plane, igt_output_t *output, unsigned int flags) { test_position_t test = { .data = data }; igt_plane_t *primary, *sprite; struct igt_fb primary_fb, sprite_fb; drmModeModeInfo *mode; igt_crc_t crc, crc2; igt_info("Testing connector %s using pipe %s plane %d\n", igt_output_name(output), kmstest_pipe_name(pipe), plane); test_init(data, pipe); test_grab_crc(data, output, pipe, &green, &test.reference_crc); igt_output_set_pipe(output, pipe); mode = igt_output_get_mode(output); primary = igt_output_get_plane(output, 0); sprite = igt_output_get_plane(output, plane); create_fb_for_mode__position(data, mode, 100, 100, 64, 64, &primary_fb); igt_plane_set_fb(primary, &primary_fb); igt_create_color_fb(data->drm_fd, 64, 64, /* width, height */ DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, 0.0, 1.0, 0.0, &sprite_fb); igt_plane_set_fb(sprite, &sprite_fb); if (flags & TEST_POSITION_FULLY_COVERED) igt_plane_set_position(sprite, 100, 100); else igt_plane_set_position(sprite, 132, 132); igt_display_commit(&data->display); igt_pipe_crc_collect_crc(data->pipe_crc, &crc); if (flags & TEST_DPMS) { kmstest_set_connector_dpms(data->drm_fd, output->config.connector, DRM_MODE_DPMS_OFF); kmstest_set_connector_dpms(data->drm_fd, output->config.connector, DRM_MODE_DPMS_ON); } igt_pipe_crc_collect_crc(data->pipe_crc, &crc2); if (flags & TEST_POSITION_FULLY_COVERED) igt_assert_crc_equal(&test.reference_crc, &crc); else ;/* FIXME: missing reference CRCs */ igt_assert_crc_equal(&crc, &crc2); igt_plane_set_fb(primary, NULL); igt_plane_set_fb(sprite, NULL); /* reset the constraint on the pipe */ igt_output_set_pipe(output, PIPE_ANY); test_fini(data); } static void test_plane_position(data_t *data, enum pipe pipe, enum igt_plane plane, unsigned int flags) { igt_output_t *output; igt_skip_on(pipe >= data->display.n_pipes); igt_skip_on(plane >= data->display.pipes[pipe].n_planes); for_each_connected_output(&data->display, output) test_plane_position_with_output(data, pipe, plane, output, flags); } /* * Plane panning test. * - We start by grabbing reference CRCs of a full red and a full blue fb * being scanned out on the primary plane * - Then we create a big fb, sized (2 * hdisplay, 2 * vdisplay) and: * - fill the top left quarter with red * - fill the bottom right quarter with blue * - The TEST_PANNING_TOP_LEFT test makes sure that with panning at (0, 0) * we do get the same CRC than the full red fb. * - The TEST_PANNING_BOTTOM_RIGHT test makes sure that with panning at * (vdisplay, hdisplay) we do get the same CRC than the full blue fb. */ typedef struct { data_t *data; igt_crc_t red_crc, blue_crc; } test_panning_t; static void create_fb_for_mode__panning(data_t *data, drmModeModeInfo *mode, struct igt_fb *fb /* out */) { unsigned int fb_id; cairo_t *cr; fb_id = igt_create_fb(data->drm_fd, mode->hdisplay * 2, mode->vdisplay * 2, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, fb); igt_assert(fb_id); cr = igt_get_cairo_ctx(data->drm_fd, fb); igt_paint_color(cr, 0, 0, mode->hdisplay, mode->vdisplay, 1.0, 0.0, 0.0); igt_paint_color(cr, mode->hdisplay, mode->vdisplay, mode->hdisplay, mode->vdisplay, 0.0, 0.0, 1.0); igt_assert(cairo_status(cr) == 0); cairo_destroy(cr); } enum { TEST_PANNING_TOP_LEFT = 1 << 0, TEST_PANNING_BOTTOM_RIGHT = 1 << 1, TEST_SUSPEND_RESUME = 1 << 2, }; static void test_plane_panning_with_output(data_t *data, enum pipe pipe, enum igt_plane plane, igt_output_t *output, unsigned int flags) { test_panning_t test = { .data = data }; igt_plane_t *primary; struct igt_fb primary_fb; drmModeModeInfo *mode; igt_crc_t crc; igt_info("Testing connector %s using pipe %s plane %d\n", igt_output_name(output), kmstest_pipe_name(pipe), plane); test_init(data, pipe); test_grab_crc(data, output, pipe, &red, &test.red_crc); test_grab_crc(data, output, pipe, &blue, &test.blue_crc); igt_output_set_pipe(output, pipe); mode = igt_output_get_mode(output); primary = igt_output_get_plane(output, 0); create_fb_for_mode__panning(data, mode, &primary_fb); igt_plane_set_fb(primary, &primary_fb); if (flags & TEST_PANNING_TOP_LEFT) igt_plane_set_panning(primary, 0, 0); else igt_plane_set_panning(primary, mode->hdisplay, mode->vdisplay); igt_plane_set_position(primary, 0, 0); igt_display_commit(&data->display); if (flags & TEST_SUSPEND_RESUME) igt_system_suspend_autoresume(); igt_pipe_crc_collect_crc(data->pipe_crc, &crc); if (flags & TEST_PANNING_TOP_LEFT) igt_assert_crc_equal(&test.red_crc, &crc); else igt_assert_crc_equal(&test.blue_crc, &crc); igt_plane_set_fb(primary, NULL); /* reset states to neutral values, assumed by other tests */ igt_output_set_pipe(output, PIPE_ANY); igt_plane_set_panning(primary, 0, 0); test_fini(data); } static void test_plane_panning(data_t *data, enum pipe pipe, enum igt_plane plane, unsigned int flags) { igt_output_t *output; igt_skip_on(pipe >= data->display.n_pipes); igt_skip_on(plane >= data->display.pipes[pipe].n_planes); for_each_connected_output(&data->display, output) test_plane_panning_with_output(data, pipe, plane, output, flags); } static void run_tests_for_pipe_plane(data_t *data, enum pipe pipe, enum igt_plane plane) { igt_subtest_f("plane-position-covered-pipe-%s-plane-%d", kmstest_pipe_name(pipe), plane) test_plane_position(data, pipe, plane, TEST_POSITION_FULLY_COVERED); igt_subtest_f("plane-position-hole-pipe-%s-plane-%d", kmstest_pipe_name(pipe), plane) test_plane_position(data, pipe, plane, 0); igt_subtest_f("plane-position-hole-dpms-pipe-%s-plane-%d", kmstest_pipe_name(pipe), plane) test_plane_position(data, pipe, plane, TEST_DPMS); igt_subtest_f("plane-panning-top-left-pipe-%s-plane-%d", kmstest_pipe_name(pipe), plane) test_plane_panning(data, pipe, plane, TEST_PANNING_TOP_LEFT); igt_subtest_f("plane-panning-bottom-right-pipe-%s-plane-%d", kmstest_pipe_name(pipe), plane) test_plane_panning(data, pipe, plane, TEST_PANNING_BOTTOM_RIGHT); igt_subtest_f("plane-panning-bottom-right-suspend-pipe-%s-plane-%d", kmstest_pipe_name(pipe), plane) test_plane_panning(data, pipe, plane, TEST_PANNING_BOTTOM_RIGHT | TEST_SUSPEND_RESUME); } static void run_tests_for_pipe(data_t *data, enum pipe pipe) { int plane; for (plane = 1; plane < IGT_MAX_PLANES; plane++) run_tests_for_pipe_plane(data, pipe, plane); } static data_t data; igt_main { igt_skip_on_simulation(); igt_fixture { data.drm_fd = drm_open_driver_master(DRIVER_INTEL); kmstest_set_vt_graphics_mode(); igt_require_pipe_crc(); igt_display_init(&data.display, data.drm_fd); } for (int pipe = 0; pipe < I915_MAX_PIPES; pipe++) run_tests_for_pipe(&data, pipe); igt_fixture { igt_display_fini(&data.display); } } intel-gpu-tools-1.14/tests/gem_stress.c0000644000175000017500000006217612665336131015125 00000000000000/* * Copyright © 2011 Daniel Vetter * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * * Partially based upon gem_tiled_fence_blits.c */ /** @file gem_stress.c * * This is a general gem coherency test. It's designed to eventually replicate * any possible sequence of access patterns. It works by copying a set of tiles * between two sets of backing buffer objects, randomly permutating the assinged * position on each copy operations. * * The copy operation are done in tiny portions (to reduce any race windows * for corruptions, hence increasing the chances for observing one) and are * constantly switched between all means to copy stuff (fenced blitter, unfenced * render, mmap, pwrite/read). * * After every complete move of a set tiling parameters of a buffer are randomly * changed to simulate the effects of libdrm caching. * * Buffers are 1mb big to nicely fit into fences on gen2/3. A few are further * split up to test relaxed fencing. Using this to push the average working set * size over the available gtt space forces objects to be mapped as unfenceable * (and as a side-effect tests gtt map/unmap coherency). * * In short: designed for maximum evilness. */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include "intel_bufmgr.h" IGT_TEST_DESCRIPTION("General gem coherency test."); #define CMD_POLY_STIPPLE_OFFSET 0x7906 #define DUCTAPE 0xdead0001 #define TILESZ 0xdead0002 #define CHCK_RENDER 0xdead0003 /** TODO: * - beat on relaxed fencing (i.e. mappable/fenceable tracking in the kernel) * - render copy (to check fence tracking and cache coherency management by the * kernel) * - multi-threading: probably just a wrapper script to launch multiple * instances + an option to accordingly reduce the working set * - gen6 inter-ring coherency (needs render copy, first) * - variable buffer size * - add an option to fork a second process that randomly sends signals to the * first one (to check consistency of the kernel recovery paths) */ drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; int drm_fd; int devid; int num_fences; drm_intel_bo *busy_bo; struct option_struct { unsigned scratch_buf_size; unsigned max_dimension; unsigned num_buffers; int trace_tile; int no_hw; int gpu_busy_load; int use_render; int use_blt; int forced_tiling; int use_cpu_maps; int total_rounds; int fail; int tiles_per_buf; int ducttape; int tile_size; int check_render_cpyfn; int use_signal_helper; }; struct option_struct options; #define MAX_BUFS 4096 #define SCRATCH_BUF_SIZE 1024*1024 #define BUSY_BUF_SIZE (256*4096) #define TILE_BYTES(size) ((size)*(size)*sizeof(uint32_t)) static struct igt_buf buffers[2][MAX_BUFS]; /* tile i is at logical position tile_permutation[i] */ static unsigned *tile_permutation; static unsigned num_buffers = 0; static unsigned current_set = 0; static unsigned target_set = 0; static unsigned num_total_tiles = 0; int fence_storm = 0; static int gpu_busy_load = 10; struct { unsigned num_failed; unsigned max_failed_reads; } stats; static void tile2xy(struct igt_buf *buf, unsigned tile, unsigned *x, unsigned *y) { igt_assert(tile < buf->num_tiles); *x = (tile*options.tile_size) % (buf->stride/sizeof(uint32_t)); *y = ((tile*options.tile_size) / (buf->stride/sizeof(uint32_t))) * options.tile_size; } static void emit_blt(drm_intel_bo *src_bo, uint32_t src_tiling, unsigned src_pitch, unsigned src_x, unsigned src_y, unsigned w, unsigned h, drm_intel_bo *dst_bo, uint32_t dst_tiling, unsigned dst_pitch, unsigned dst_x, unsigned dst_y) { uint32_t cmd_bits = 0; if (IS_965(devid) && src_tiling) { src_pitch /= 4; cmd_bits |= XY_SRC_COPY_BLT_SRC_TILED; } if (IS_965(devid) && dst_tiling) { dst_pitch /= 4; cmd_bits |= XY_SRC_COPY_BLT_DST_TILED; } /* copy lower half to upper half */ BLIT_COPY_BATCH_START(cmd_bits); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ dst_pitch); OUT_BATCH(dst_y << 16 | dst_x); OUT_BATCH((dst_y+h) << 16 | (dst_x+w)); OUT_RELOC_FENCED(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(src_y << 16 | src_x); OUT_BATCH(src_pitch); OUT_RELOC_FENCED(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0); ADVANCE_BATCH(); if (batch->gen >= 6) { BEGIN_BATCH(3, 0); OUT_BATCH(XY_SETUP_CLIP_BLT_CMD); OUT_BATCH(0); OUT_BATCH(0); ADVANCE_BATCH(); } } /* All this gem trashing wastes too much cpu time, so give the gpu something to * do to increase changes for races. */ static void keep_gpu_busy(void) { int tmp; tmp = 1 << gpu_busy_load; igt_assert_lte(tmp, 1024); emit_blt(busy_bo, 0, 4096, 0, 0, tmp, 128, busy_bo, 0, 4096, 0, 128); } static void set_to_cpu_domain(struct igt_buf *buf, int writing) { gem_set_domain(drm_fd, buf->bo->handle, I915_GEM_DOMAIN_CPU, writing ? I915_GEM_DOMAIN_CPU : 0); } static unsigned int copyfunc_seq = 0; static void (*copyfunc)(struct igt_buf *src, unsigned src_x, unsigned src_y, struct igt_buf *dst, unsigned dst_x, unsigned dst_y, unsigned logical_tile_no); /* stride, x, y in units of uint32_t! */ static void cpucpy2d(uint32_t *src, unsigned src_stride, unsigned src_x, unsigned src_y, uint32_t *dst, unsigned dst_stride, unsigned dst_x, unsigned dst_y, unsigned logical_tile_no) { int i, j; int failed = 0; for (i = 0; i < options.tile_size; i++) { for (j = 0; j < options.tile_size; j++) { unsigned dst_ofs = dst_x + j + dst_stride * (dst_y + i); unsigned src_ofs = src_x + j + src_stride * (src_y + i); unsigned expect = logical_tile_no*options.tile_size*options.tile_size + i*options.tile_size + j; uint32_t tmp = src[src_ofs]; if (tmp != expect) { igt_info("mismatch at tile %i pos %i, read %i, expected %i, diff %i\n", logical_tile_no, i * options.tile_size + j, tmp, expect, (int)tmp - expect); igt_fail_on(options.trace_tile >= 0 && options.fail); failed++; } /* when not aborting, correct any errors */ dst[dst_ofs] = expect; } } igt_fail_on(failed && options.fail); if (failed > stats.max_failed_reads) stats.max_failed_reads = failed; if (failed) stats.num_failed++; } static void cpu_copyfunc(struct igt_buf *src, unsigned src_x, unsigned src_y, struct igt_buf *dst, unsigned dst_x, unsigned dst_y, unsigned logical_tile_no) { igt_assert(batch->ptr == batch->buffer); if (options.ducttape) drm_intel_bo_wait_rendering(dst->bo); if (options.use_cpu_maps) { set_to_cpu_domain(src, 0); set_to_cpu_domain(dst, 1); } cpucpy2d(src->data, src->stride/sizeof(uint32_t), src_x, src_y, dst->data, dst->stride/sizeof(uint32_t), dst_x, dst_y, logical_tile_no); } static void prw_copyfunc(struct igt_buf *src, unsigned src_x, unsigned src_y, struct igt_buf *dst, unsigned dst_x, unsigned dst_y, unsigned logical_tile_no) { uint32_t tmp_tile[options.tile_size*options.tile_size]; int i; igt_assert(batch->ptr == batch->buffer); if (options.ducttape) drm_intel_bo_wait_rendering(dst->bo); if (src->tiling == I915_TILING_NONE) { for (i = 0; i < options.tile_size; i++) { unsigned ofs = src_x*sizeof(uint32_t) + src->stride*(src_y + i); drm_intel_bo_get_subdata(src->bo, ofs, options.tile_size*sizeof(uint32_t), tmp_tile + options.tile_size*i); } } else { if (options.use_cpu_maps) set_to_cpu_domain(src, 0); cpucpy2d(src->data, src->stride/sizeof(uint32_t), src_x, src_y, tmp_tile, options.tile_size, 0, 0, logical_tile_no); } if (dst->tiling == I915_TILING_NONE) { for (i = 0; i < options.tile_size; i++) { unsigned ofs = dst_x*sizeof(uint32_t) + dst->stride*(dst_y + i); drm_intel_bo_subdata(dst->bo, ofs, options.tile_size*sizeof(uint32_t), tmp_tile + options.tile_size*i); } } else { if (options.use_cpu_maps) set_to_cpu_domain(dst, 1); cpucpy2d(tmp_tile, options.tile_size, 0, 0, dst->data, dst->stride/sizeof(uint32_t), dst_x, dst_y, logical_tile_no); } } static void blitter_copyfunc(struct igt_buf *src, unsigned src_x, unsigned src_y, struct igt_buf *dst, unsigned dst_x, unsigned dst_y, unsigned logical_tile_no) { static unsigned keep_gpu_busy_counter = 0; /* check both edges of the fence usage */ if (keep_gpu_busy_counter & 1 && !fence_storm) keep_gpu_busy(); emit_blt(src->bo, src->tiling, src->stride, src_x, src_y, options.tile_size, options.tile_size, dst->bo, dst->tiling, dst->stride, dst_x, dst_y); if (!(keep_gpu_busy_counter & 1) && !fence_storm) keep_gpu_busy(); keep_gpu_busy_counter++; if (src->tiling) fence_storm--; if (dst->tiling) fence_storm--; if (fence_storm <= 1) { fence_storm = 0; intel_batchbuffer_flush(batch); } } static void render_copyfunc(struct igt_buf *src, unsigned src_x, unsigned src_y, struct igt_buf *dst, unsigned dst_x, unsigned dst_y, unsigned logical_tile_no) { static unsigned keep_gpu_busy_counter = 0; igt_render_copyfunc_t rendercopy = igt_get_render_copyfunc(devid); /* check both edges of the fence usage */ if (keep_gpu_busy_counter & 1) keep_gpu_busy(); if (rendercopy) { /* * Flush outstanding blts so that they don't end up on * the render ring when that's not allowed (gen6+). */ intel_batchbuffer_flush(batch); rendercopy(batch, NULL, src, src_x, src_y, options.tile_size, options.tile_size, dst, dst_x, dst_y); } else blitter_copyfunc(src, src_x, src_y, dst, dst_x, dst_y, logical_tile_no); if (!(keep_gpu_busy_counter & 1)) keep_gpu_busy(); keep_gpu_busy_counter++; intel_batchbuffer_flush(batch); } static void next_copyfunc(int tile) { if (fence_storm) { if (tile == options.trace_tile) igt_info(" using fence storm\n"); return; } if (copyfunc_seq % 61 == 0 && options.forced_tiling != I915_TILING_NONE) { if (tile == options.trace_tile) igt_info(" using fence storm\n"); fence_storm = num_fences; copyfunc = blitter_copyfunc; } else if (copyfunc_seq % 17 == 0) { if (tile == options.trace_tile) igt_info(" using cpu\n"); copyfunc = cpu_copyfunc; } else if (copyfunc_seq % 19 == 0) { if (tile == options.trace_tile) igt_info(" using prw\n"); copyfunc = prw_copyfunc; } else if (copyfunc_seq % 3 == 0 && options.use_render) { if (tile == options.trace_tile) igt_info(" using render\n"); copyfunc = render_copyfunc; } else if (options.use_blt){ if (tile == options.trace_tile) igt_info(" using blitter\n"); copyfunc = blitter_copyfunc; } else if (options.use_render){ if (tile == options.trace_tile) igt_info(" using render\n"); copyfunc = render_copyfunc; } else { copyfunc = cpu_copyfunc; } copyfunc_seq++; } static void fan_out(void) { uint32_t tmp_tile[options.tile_size*options.tile_size]; uint32_t seq = 0; int i, k; unsigned tile, buf_idx, x, y; for (i = 0; i < num_total_tiles; i++) { tile = i; buf_idx = tile / options.tiles_per_buf; tile %= options.tiles_per_buf; tile2xy(&buffers[current_set][buf_idx], tile, &x, &y); for (k = 0; k < options.tile_size*options.tile_size; k++) tmp_tile[k] = seq++; if (options.use_cpu_maps) set_to_cpu_domain(&buffers[current_set][buf_idx], 1); cpucpy2d(tmp_tile, options.tile_size, 0, 0, buffers[current_set][buf_idx].data, buffers[current_set][buf_idx].stride / sizeof(uint32_t), x, y, i); } for (i = 0; i < num_total_tiles; i++) tile_permutation[i] = i; } static void fan_in_and_check(void) { uint32_t tmp_tile[options.tile_size*options.tile_size]; unsigned tile, buf_idx, x, y; int i; for (i = 0; i < num_total_tiles; i++) { tile = tile_permutation[i]; buf_idx = tile / options.tiles_per_buf; tile %= options.tiles_per_buf; tile2xy(&buffers[current_set][buf_idx], tile, &x, &y); if (options.use_cpu_maps) set_to_cpu_domain(&buffers[current_set][buf_idx], 0); cpucpy2d(buffers[current_set][buf_idx].data, buffers[current_set][buf_idx].stride / sizeof(uint32_t), x, y, tmp_tile, options.tile_size, 0, 0, i); } } static void sanitize_stride(struct igt_buf *buf) { if (igt_buf_height(buf) > options.max_dimension) buf->stride = buf->size / options.max_dimension; if (igt_buf_height(buf) < options.tile_size) buf->stride = buf->size / options.tile_size; if (igt_buf_width(buf) < options.tile_size) buf->stride = options.tile_size * sizeof(uint32_t); igt_assert(buf->stride <= 8192); igt_assert(igt_buf_width(buf) <= options.max_dimension); igt_assert(igt_buf_height(buf) <= options.max_dimension); igt_assert(igt_buf_width(buf) >= options.tile_size); igt_assert(igt_buf_height(buf) >= options.tile_size); } static void init_buffer(struct igt_buf *buf, unsigned size) { buf->bo = drm_intel_bo_alloc(bufmgr, "tiled bo", size, 4096); buf->size = size; igt_assert(buf->bo); buf->tiling = I915_TILING_NONE; buf->stride = 4096; sanitize_stride(buf); if (options.no_hw) buf->data = malloc(size); else { if (options.use_cpu_maps) drm_intel_bo_map(buf->bo, 1); else drm_intel_gem_bo_map_gtt(buf->bo); buf->data = buf->bo->virtual; } buf->num_tiles = options.tiles_per_buf; } static void exchange_buf(void *array, unsigned i, unsigned j) { struct igt_buf *buf_arr, tmp; buf_arr = array; memcpy(&tmp, &buf_arr[i], sizeof(struct igt_buf)); memcpy(&buf_arr[i], &buf_arr[j], sizeof(struct igt_buf)); memcpy(&buf_arr[j], &tmp, sizeof(struct igt_buf)); } static void init_set(unsigned set) { long int r; int i; igt_permute_array(buffers[set], num_buffers, exchange_buf); if (current_set == 1 && options.gpu_busy_load == 0) { gpu_busy_load++; if (gpu_busy_load > 10) gpu_busy_load = 6; } for (i = 0; i < num_buffers; i++) { r = random(); if ((r & 3) != 0) continue; r >>= 2; if ((r & 3) != 0) buffers[set][i].tiling = I915_TILING_X; else buffers[set][i].tiling = I915_TILING_NONE; r >>= 2; if (options.forced_tiling >= 0) buffers[set][i].tiling = options.forced_tiling; if (buffers[set][i].tiling == I915_TILING_NONE) { /* min 64 byte stride */ r %= 8; buffers[set][i].stride = 64 * (1 << r); } else if (IS_GEN2(devid)) { /* min 128 byte stride */ r %= 7; buffers[set][i].stride = 128 * (1 << r); } else { /* min 512 byte stride */ r %= 5; buffers[set][i].stride = 512 * (1 << r); } sanitize_stride(&buffers[set][i]); gem_set_tiling(drm_fd, buffers[set][i].bo->handle, buffers[set][i].tiling, buffers[set][i].stride); if (options.trace_tile != -1 && i == options.trace_tile/options.tiles_per_buf) igt_info("changing buffer %i containing tile %i: tiling %i, stride %i\n", i, options.trace_tile, buffers[set][i].tiling, buffers[set][i].stride); } } static void exchange_uint(void *array, unsigned i, unsigned j) { unsigned *i_arr = array; igt_swap(i_arr[i], i_arr[j]); } static void copy_tiles(unsigned *permutation) { unsigned src_tile, src_buf_idx, src_x, src_y; unsigned dst_tile, dst_buf_idx, dst_x, dst_y; struct igt_buf *src_buf, *dst_buf; int i, idx; for (i = 0; i < num_total_tiles; i++) { /* tile_permutation is independent of current_permutation, so * abuse it to randomize the order of the src bos */ idx = tile_permutation[i]; src_buf_idx = idx / options.tiles_per_buf; src_tile = idx % options.tiles_per_buf; src_buf = &buffers[current_set][src_buf_idx]; tile2xy(src_buf, src_tile, &src_x, &src_y); dst_buf_idx = permutation[idx] / options.tiles_per_buf; dst_tile = permutation[idx] % options.tiles_per_buf; dst_buf = &buffers[target_set][dst_buf_idx]; tile2xy(dst_buf, dst_tile, &dst_x, &dst_y); if (options.trace_tile == i) igt_info("copying tile %i from %i (%i, %i) to %i (%i, %i)", i, tile_permutation[i], src_buf_idx, src_tile, permutation[idx], dst_buf_idx, dst_tile); if (options.no_hw) { cpucpy2d(src_buf->data, src_buf->stride / sizeof(uint32_t), src_x, src_y, dst_buf->data, dst_buf->stride / sizeof(uint32_t), dst_x, dst_y, i); } else { next_copyfunc(i); copyfunc(src_buf, src_x, src_y, dst_buf, dst_x, dst_y, i); } } intel_batchbuffer_flush(batch); } static void sanitize_tiles_per_buf(void) { if (options.tiles_per_buf > options.scratch_buf_size / TILE_BYTES(options.tile_size)) options.tiles_per_buf = options.scratch_buf_size / TILE_BYTES(options.tile_size); } static int parse_options(int opt, int opt_index, void *data) { int tmp; switch(opt) { case 'd': options.no_hw = 1; igt_info("no-hw debug mode\n"); break; case 'S': options.use_signal_helper = 0; igt_info("disabling that pesky nuisance who keeps interrupting us\n"); break; case 's': tmp = atoi(optarg); if (tmp < options.tile_size*8192) igt_info("scratch buffer size needs to be at least %i\n", options.tile_size * 8192); else if (tmp & (tmp - 1)) { igt_info("scratch buffer size needs to be a power-of-two\n"); } else { igt_info("fixed scratch buffer size to %u\n", tmp); options.scratch_buf_size = tmp; sanitize_tiles_per_buf(); } break; case 'g': tmp = atoi(optarg); if (tmp < 0 || tmp > 10) igt_info("gpu busy load needs to be bigger than 0 and smaller than 10\n"); else { igt_info("gpu busy load factor set to %i\n", tmp); gpu_busy_load = options.gpu_busy_load = tmp; } break; case 'c': options.num_buffers = atoi(optarg); igt_info("buffer count set to %i\n", options.num_buffers); break; case 't': options.trace_tile = atoi(optarg); igt_info("tracing tile %i\n", options.trace_tile); break; case 'r': options.use_render = 0; igt_info("disabling render copy\n"); break; case 'b': options.use_blt = 0; igt_info("disabling blt copy\n"); break; case 'u': options.forced_tiling = I915_TILING_NONE; igt_info("disabling tiling\n"); break; case 'x': if (options.use_cpu_maps) { igt_info("tiling not possible with cpu maps\n"); } else { options.forced_tiling = I915_TILING_X; igt_info("using only X-tiling\n"); } break; case 'm': options.use_cpu_maps = 1; options.forced_tiling = I915_TILING_NONE; igt_info("disabling tiling\n"); break; case 'o': options.total_rounds = atoi(optarg); igt_info("total rounds %i\n", options.total_rounds); break; case 'f': options.fail = 0; igt_info("not failing when detecting errors\n"); break; case 'p': options.tiles_per_buf = atoi(optarg); igt_info("tiles per buffer %i\n", options.tiles_per_buf); break; case DUCTAPE: options.ducttape = 0; igt_info("applying duct-tape\n"); break; case TILESZ: options.tile_size = atoi(optarg); sanitize_tiles_per_buf(); igt_info("til size %i\n", options.tile_size); break; case CHCK_RENDER: options.check_render_cpyfn = 1; igt_info("checking render copy function\n"); break; } /* actually 32767, according to docs, but that kills our nice pot calculations. */ options.max_dimension = 16*1024; if (options.use_render) { if (IS_GEN2(devid) || IS_GEN3(devid)) options.max_dimension = 2048; else options.max_dimension = 8192; } igt_info("Limiting buffer to %dx%d\n", options.max_dimension, options.max_dimension); return 0; } static void init(void) { int i; unsigned tmp; if (options.num_buffers == 0) { tmp = gem_aperture_size(drm_fd); tmp = min(256 * (1024 * 1024), tmp); num_buffers = 2 * tmp / options.scratch_buf_size / 3; num_buffers /= 2; igt_info("using %u buffers\n", num_buffers); } else num_buffers = options.num_buffers; bufmgr = drm_intel_bufmgr_gem_init(drm_fd, 4096); drm_intel_bufmgr_gem_enable_reuse(bufmgr); drm_intel_bufmgr_gem_enable_fenced_relocs(bufmgr); num_fences = gem_available_fences(drm_fd); igt_assert_lt(4, num_fences); batch = intel_batchbuffer_alloc(bufmgr, devid); busy_bo = drm_intel_bo_alloc(bufmgr, "tiled bo", BUSY_BUF_SIZE, 4096); if (options.forced_tiling >= 0) gem_set_tiling(drm_fd, busy_bo->handle, options.forced_tiling, 4096); for (i = 0; i < num_buffers; i++) { init_buffer(&buffers[0][i], options.scratch_buf_size); init_buffer(&buffers[1][i], options.scratch_buf_size); num_total_tiles += buffers[0][i].num_tiles; } current_set = 0; /* just in case it helps reproducability */ srandom(0xdeadbeef); } static void check_render_copyfunc(void) { struct igt_buf src, dst; uint32_t *ptr; int i, j, pass; if (!options.check_render_cpyfn) return; init_buffer(&src, options.scratch_buf_size); init_buffer(&dst, options.scratch_buf_size); for (pass = 0; pass < 16; pass++) { int sx = random() % (igt_buf_width(&src)-options.tile_size); int sy = random() % (igt_buf_height(&src)-options.tile_size); int dx = random() % (igt_buf_width(&dst)-options.tile_size); int dy = random() % (igt_buf_height(&dst)-options.tile_size); if (options.use_cpu_maps) set_to_cpu_domain(&src, 1); memset(src.data, 0xff, options.scratch_buf_size); for (j = 0; j < options.tile_size; j++) { ptr = (uint32_t*)((char *)src.data + sx*4 + (sy+j) * src.stride); for (i = 0; i < options.tile_size; i++) ptr[i] = j * options.tile_size + i; } render_copyfunc(&src, sx, sy, &dst, dx, dy, 0); if (options.use_cpu_maps) set_to_cpu_domain(&dst, 0); for (j = 0; j < options.tile_size; j++) { ptr = (uint32_t*)((char *)dst.data + dx*4 + (dy+j) * dst.stride); for (i = 0; i < options.tile_size; i++) if (ptr[i] != j * options.tile_size + i) { igt_info("render copyfunc mismatch at (%d, %d): found %d, expected %d\n", i, j, ptr[i], j * options.tile_size + i); } } } } int main(int argc, char **argv) { int i, j; unsigned *current_permutation, *tmp_permutation; static struct option long_options[] = { {"no-hw", 0, 0, 'd'}, {"buf-size", 1, 0, 's'}, {"gpu-busy-load", 1, 0, 'g'}, {"no-signals", 0, 0, 'S'}, {"buffer-count", 1, 0, 'c'}, {"trace-tile", 1, 0, 't'}, {"disable-blt", 0, 0, 'b'}, {"disable-render", 0, 0, 'r'}, {"untiled", 0, 0, 'u'}, {"x-tiled", 0, 0, 'x'}, {"use-cpu-maps", 0, 0, 'm'}, {"rounds", 1, 0, 'o'}, {"no-fail", 0, 0, 'f'}, {"tiles-per-buf", 0, 0, 'p'}, {"remove-duct-tape", 0, 0, DUCTAPE}, {"tile-size", 1, 0, TILESZ}, {"check-render-cpyfn", 0, 0, CHCK_RENDER}, {NULL, 0, 0, 0}, }; options.scratch_buf_size = 256*4096; options.no_hw = 0; options.use_signal_helper = 1; options.gpu_busy_load = 0; options.num_buffers = 0; options.trace_tile = -1; options.use_render = 1; options.use_blt = 1; options.forced_tiling = -1; options.use_cpu_maps = 0; options.total_rounds = 512; options.fail = 1; options.ducttape = 1; options.tile_size = 16; options.tiles_per_buf = options.scratch_buf_size / TILE_BYTES(options.tile_size); options.check_render_cpyfn = 0; igt_simple_init_parse_opts(&argc, argv,"ds:g:c:t:rbuxmo:fp:", long_options, NULL, parse_options, NULL); drm_fd = drm_open_driver(DRIVER_INTEL); devid = intel_get_drm_devid(drm_fd); /* start our little helper early before too may allocations occur */ if (options.use_signal_helper) igt_fork_signal_helper(); init(); check_render_copyfunc(); tile_permutation = malloc(num_total_tiles*sizeof(uint32_t)); current_permutation = malloc(num_total_tiles*sizeof(uint32_t)); tmp_permutation = malloc(num_total_tiles*sizeof(uint32_t)); igt_assert(tile_permutation); igt_assert(current_permutation); igt_assert(tmp_permutation); fan_out(); for (i = 0; i < options.total_rounds; i++) { igt_info("round %i\n", i); if (i % 64 == 63) { fan_in_and_check(); igt_info("everything correct after %i rounds\n", i + 1); } target_set = (current_set + 1) & 1; init_set(target_set); for (j = 0; j < num_total_tiles; j++) current_permutation[j] = j; igt_permute_array(current_permutation, num_total_tiles, exchange_uint); copy_tiles(current_permutation); memcpy(tmp_permutation, tile_permutation, sizeof(unsigned)*num_total_tiles); /* accumulate the permutations */ for (j = 0; j < num_total_tiles; j++) tile_permutation[j] = current_permutation[tmp_permutation[j]]; current_set = target_set; } fan_in_and_check(); igt_info("num failed tiles %u, max incoherent bytes %zd\n", stats.num_failed, stats.max_failed_reads * sizeof(uint32_t)); intel_batchbuffer_free(batch); drm_intel_bufmgr_destroy(bufmgr); close(drm_fd); igt_stop_signal_helper(); igt_exit(); } intel-gpu-tools-1.14/tests/pm_sseu.c0000644000175000017500000002121212665336131014407 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Jeff McGee */ #include "igt.h" #include #include #include #include #include #include "i915_drm.h" #include "intel_bufmgr.h" IGT_TEST_DESCRIPTION("Tests slice/subslice/EU power gating functionality.\n"); static double to_dt(const struct timespec *start, const struct timespec *end) { double dt; dt = (end->tv_sec - start->tv_sec) * 1e3; dt += (end->tv_nsec - start->tv_nsec) * 1e-6; return dt; } struct status { struct { int slice_total; int subslice_total; int subslice_per; int eu_total; int eu_per; bool has_slice_pg; bool has_subslice_pg; bool has_eu_pg; } info; struct { int slice_total; int subslice_total; int subslice_per; int eu_total; int eu_per; } hw; }; #define DBG_STATUS_BUF_SIZE 4096 struct { int init; int status_fd; char status_buf[DBG_STATUS_BUF_SIZE]; } dbg; static void dbg_get_status_section(const char *title, char **first, char **last) { char *pos; *first = strstr(dbg.status_buf, title); igt_assert(*first != NULL); pos = *first; do { pos = strchr(pos, '\n'); igt_assert(pos != NULL); pos++; } while (*pos == ' '); /* lines in the section begin with a space */ *last = pos - 1; } static int dbg_get_int(const char *first, const char *last, const char *name) { char *pos; pos = strstr(first, name); igt_assert(pos != NULL); pos = strstr(pos, ":"); igt_assert(pos != NULL); pos += 2; igt_assert(pos != last); return strtol(pos, &pos, 10); } static bool dbg_get_bool(const char *first, const char *last, const char *name) { char *pos; pos = strstr(first, name); igt_assert(pos != NULL); pos = strstr(pos, ":"); igt_assert(pos != NULL); pos += 2; igt_assert(pos < last); if (*pos == 'y') return true; if (*pos == 'n') return false; igt_assert_f(false, "Could not read boolean value for %s.\n", name); return false; } static void dbg_get_status(struct status *stat) { char *first, *last; int nread; lseek(dbg.status_fd, 0, SEEK_SET); nread = read(dbg.status_fd, dbg.status_buf, DBG_STATUS_BUF_SIZE); igt_assert_lt(nread, DBG_STATUS_BUF_SIZE); dbg.status_buf[nread] = '\0'; memset(stat, 0, sizeof(*stat)); dbg_get_status_section("SSEU Device Info", &first, &last); stat->info.slice_total = dbg_get_int(first, last, "Available Slice Total:"); stat->info.subslice_total = dbg_get_int(first, last, "Available Subslice Total:"); stat->info.subslice_per = dbg_get_int(first, last, "Available Subslice Per Slice:"); stat->info.eu_total = dbg_get_int(first, last, "Available EU Total:"); stat->info.eu_per = dbg_get_int(first, last, "Available EU Per Subslice:"); stat->info.has_slice_pg = dbg_get_bool(first, last, "Has Slice Power Gating:"); stat->info.has_subslice_pg = dbg_get_bool(first, last, "Has Subslice Power Gating:"); stat->info.has_eu_pg = dbg_get_bool(first, last, "Has EU Power Gating:"); dbg_get_status_section("SSEU Device Status", &first, &last); stat->hw.slice_total = dbg_get_int(first, last, "Enabled Slice Total:"); stat->hw.subslice_total = dbg_get_int(first, last, "Enabled Subslice Total:"); stat->hw.subslice_per = dbg_get_int(first, last, "Enabled Subslice Per Slice:"); stat->hw.eu_total = dbg_get_int(first, last, "Enabled EU Total:"); stat->hw.eu_per = dbg_get_int(first, last, "Enabled EU Per Subslice:"); } static void dbg_init(void) { dbg.status_fd = igt_debugfs_open("i915_sseu_status", O_RDONLY); igt_skip_on_f(dbg.status_fd == -1, "debugfs entry 'i915_sseu_status' not found\n"); dbg.init = 1; } static void dbg_deinit(void) { switch (dbg.init) { case 1: close(dbg.status_fd); } } struct { int init; int drm_fd; int devid; int gen; int has_ppgtt; drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; igt_media_spinfunc_t spinfunc; struct igt_buf buf; uint32_t spins_per_msec; } gem; static void gem_check_spin(uint32_t spins) { uint32_t *data; data = (uint32_t*)gem.buf.bo->virtual; igt_assert_eq_u32(*data, spins); } static uint32_t gem_get_target_spins(double dt) { struct timespec tstart, tdone; double prev_dt, cur_dt; uint32_t spins; int i, ret; /* Double increments until we bound the target time */ prev_dt = 0.0; for (i = 0; i < 32; i++) { spins = 1 << i; clock_gettime(CLOCK_MONOTONIC, &tstart); gem.spinfunc(gem.batch, &gem.buf, spins); ret = drm_intel_bo_map(gem.buf.bo, 0); igt_assert_eq(ret, 0); clock_gettime(CLOCK_MONOTONIC, &tdone); gem_check_spin(spins); drm_intel_bo_unmap(gem.buf.bo); cur_dt = to_dt(&tstart, &tdone); if (cur_dt > dt) break; prev_dt = cur_dt; } igt_assert_neq(i, 32); /* Linearly interpolate between i and i-1 to get target increments */ spins = 1 << (i-1); /* lower bound spins */ spins += spins * (dt - prev_dt)/(cur_dt - prev_dt); /* target spins */ return spins; } static void gem_init(void) { gem.drm_fd = drm_open_driver(DRIVER_INTEL); gem.init = 1; gem.devid = intel_get_drm_devid(gem.drm_fd); gem.gen = intel_gen(gem.devid); igt_require_f(gem.gen >= 8, "SSEU power gating only relevant for Gen8+"); gem.has_ppgtt = gem_uses_ppgtt(gem.drm_fd); gem.bufmgr = drm_intel_bufmgr_gem_init(gem.drm_fd, 4096); igt_assert(gem.bufmgr); gem.init = 2; drm_intel_bufmgr_gem_enable_reuse(gem.bufmgr); gem.batch = intel_batchbuffer_alloc(gem.bufmgr, gem.devid); igt_assert(gem.batch); gem.init = 3; gem.spinfunc = igt_get_media_spinfunc(gem.devid); igt_assert(gem.spinfunc); gem.buf.stride = sizeof(uint32_t); gem.buf.tiling = I915_TILING_NONE; gem.buf.size = gem.buf.stride; gem.buf.bo = drm_intel_bo_alloc(gem.bufmgr, "", gem.buf.size, 4096); igt_assert(gem.buf.bo); gem.init = 4; gem.spins_per_msec = gem_get_target_spins(100) / 100; } static void gem_deinit(void) { switch (gem.init) { case 4: drm_intel_bo_unmap(gem.buf.bo); drm_intel_bo_unreference(gem.buf.bo); case 3: intel_batchbuffer_free(gem.batch); case 2: drm_intel_bufmgr_destroy(gem.bufmgr); case 1: close(gem.drm_fd); } } static void check_full_enable(struct status *stat) { igt_assert_eq(stat->hw.slice_total, stat->info.slice_total); igt_assert_eq(stat->hw.subslice_total, stat->info.subslice_total); igt_assert_eq(stat->hw.subslice_per, stat->info.subslice_per); /* * EU are powered in pairs, but it is possible for one EU in the pair * to be non-functional due to fusing. The determination of enabled * EU does not account for this and can therefore actually exceed the * available count. Allow for this small discrepancy in our * comparison. */ igt_assert_lte(stat->info.eu_total, stat->hw.eu_total); igt_assert_lte(stat->info.eu_per, stat->hw.eu_per); } static void full_enable(void) { struct status stat; const int spin_msec = 10; int ret, spins; /* Simulation doesn't currently model slice/subslice/EU power gating. */ igt_skip_on_simulation(); /* * Gen9 SKL is the first case in which render power gating can leave * slice/subslice/EU in a partially enabled state upon resumption of * render work. So start checking that this is prevented as of Gen9. */ igt_require(gem.gen >= 9); spins = spin_msec * gem.spins_per_msec; gem.spinfunc(gem.batch, &gem.buf, spins); usleep(2000); /* 2ms wait to make sure batch is running */ dbg_get_status(&stat); ret = drm_intel_bo_map(gem.buf.bo, 0); igt_assert_eq(ret, 0); gem_check_spin(spins); drm_intel_bo_unmap(gem.buf.bo); check_full_enable(&stat); } static void exit_handler(int sig) { gem_deinit(); dbg_deinit(); } igt_main { igt_fixture { igt_install_exit_handler(exit_handler); dbg_init(); gem_init(); } igt_subtest("full-enable") full_enable(); } intel-gpu-tools-1.14/tests/gem_ctx_bad_destroy.c0000644000175000017500000000450212665336131016744 00000000000000/* * Copyright © 2012 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Ben Widawsky * */ /* * Negative test cases for destroy contexts */ #include "igt.h" #include #include #include IGT_TEST_DESCRIPTION("Negative test cases for destroy contexts."); uint32_t ctx_id; int fd; igt_main { igt_fixture { fd = drm_open_driver_render(DRIVER_INTEL); ctx_id = gem_context_create(fd); /* Make sure a proper destroy works first */ gem_context_destroy(fd, ctx_id); } /* try double destroy */ igt_subtest("double-destroy") { ctx_id = gem_context_create(fd); gem_context_destroy(fd, ctx_id); igt_assert(__gem_context_destroy(fd, ctx_id) == -ENOENT); } igt_subtest("invalid-ctx") igt_assert(__gem_context_destroy(fd, 2) == -ENOENT); igt_subtest("invalid-default-ctx") igt_assert(__gem_context_destroy(fd, 0) == -ENOENT); igt_subtest("invalid-pad") { struct drm_i915_gem_context_destroy destroy; ctx_id = gem_context_create(fd); memset(&destroy, 0, sizeof(destroy)); destroy.ctx_id = ctx_id; destroy.pad = 1; igt_assert(drmIoctl(fd, DRM_IOCTL_I915_GEM_CONTEXT_DESTROY, &destroy) < 0 && errno == EINVAL); gem_context_destroy(fd, ctx_id); } igt_fixture close(fd); } intel-gpu-tools-1.14/tests/gem_render_copy_redux.c0000644000175000017500000001435212665336131017313 00000000000000/* * Copyright © 2013-2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Damien Lespiau */ /* * This file is an "advanced" test for the render_copy() function, a very simple * workload for the 3D engine. The basic test in gem_render_copy.c is intentionally * kept extremely simple to allow for aub instrumentation and to ease debugging of * the render copy functions themselves. This test on the overhand aims to stress * the execbuffer interface with a simple render workload. */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include #include "intel_bufmgr.h" IGT_TEST_DESCRIPTION("Advanced test for the render_copy() function."); #define WIDTH 512 #define STRIDE (WIDTH*4) #define HEIGHT 512 #define SIZE (HEIGHT*STRIDE) #define SRC_COLOR 0xffff00ff #define DST_COLOR 0xfff0ff00 typedef struct { int fd; uint32_t devid; drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; igt_render_copyfunc_t render_copy; uint32_t linear[WIDTH * HEIGHT]; } data_t; static void data_init(data_t *data) { data->fd = drm_open_driver(DRIVER_INTEL); data->devid = intel_get_drm_devid(data->fd); data->bufmgr = drm_intel_bufmgr_gem_init(data->fd, 4096); igt_assert(data->bufmgr); data->render_copy = igt_get_render_copyfunc(data->devid); igt_require_f(data->render_copy, "no render-copy function\n"); data->batch = intel_batchbuffer_alloc(data->bufmgr, data->devid); igt_assert(data->batch); } static void data_fini(data_t *data) { intel_batchbuffer_free(data->batch); drm_intel_bufmgr_destroy(data->bufmgr); close(data->fd); } static void scratch_buf_init(data_t *data, struct igt_buf *buf, int width, int height, int stride, uint32_t color) { drm_intel_bo *bo; int i; bo = drm_intel_bo_alloc(data->bufmgr, "", SIZE, 4096); for (i = 0; i < width * height; i++) data->linear[i] = color; gem_write(data->fd, bo->handle, 0, data->linear, sizeof(data->linear)); buf->bo = bo; buf->stride = stride; buf->tiling = I915_TILING_NONE; buf->size = SIZE; } static void scratch_buf_fini(data_t *data, struct igt_buf *buf) { dri_bo_unreference(buf->bo); memset(buf, 0, sizeof(*buf)); } static void scratch_buf_check(data_t *data, struct igt_buf *buf, int x, int y, uint32_t color) { uint32_t val; gem_read(data->fd, buf->bo->handle, 0, data->linear, sizeof(data->linear)); val = data->linear[y * WIDTH + x]; igt_assert_f(val == color, "Expected 0x%08x, found 0x%08x at (%d,%d)\n", color, val, x, y); } static void copy(data_t *data) { struct igt_buf src, dst; scratch_buf_init(data, &src, WIDTH, HEIGHT, STRIDE, SRC_COLOR); scratch_buf_init(data, &dst, WIDTH, HEIGHT, STRIDE, DST_COLOR); scratch_buf_check(data, &src, WIDTH / 2, HEIGHT / 2, SRC_COLOR); scratch_buf_check(data, &dst, WIDTH / 2, HEIGHT / 2, DST_COLOR); data->render_copy(data->batch, NULL, &src, 0, 0, WIDTH, HEIGHT, &dst, WIDTH / 2, HEIGHT / 2); scratch_buf_check(data, &dst, 10, 10, DST_COLOR); scratch_buf_check(data, &dst, WIDTH - 10, HEIGHT - 10, SRC_COLOR); scratch_buf_fini(data, &src); scratch_buf_fini(data, &dst); } static void copy_flink(data_t *data) { data_t local; struct igt_buf src, dst; struct igt_buf local_src, local_dst; struct igt_buf flink; uint32_t name; data_init(&local); scratch_buf_init(data, &src, WIDTH, HEIGHT, STRIDE, 0); scratch_buf_init(data, &dst, WIDTH, HEIGHT, STRIDE, DST_COLOR); data->render_copy(data->batch, NULL, &src, 0, 0, WIDTH, HEIGHT, &dst, WIDTH, HEIGHT); scratch_buf_init(&local, &local_src, WIDTH, HEIGHT, STRIDE, 0); scratch_buf_init(&local, &local_dst, WIDTH, HEIGHT, STRIDE, SRC_COLOR); local.render_copy(local.batch, NULL, &local_src, 0, 0, WIDTH, HEIGHT, &local_dst, WIDTH, HEIGHT); drm_intel_bo_flink(local_dst.bo, &name); flink = local_dst; flink.bo = drm_intel_bo_gem_create_from_name(data->bufmgr, "flink", name); data->render_copy(data->batch, NULL, &flink, 0, 0, WIDTH, HEIGHT, &dst, WIDTH / 2, HEIGHT / 2); scratch_buf_check(data, &dst, 10, 10, DST_COLOR); scratch_buf_check(data, &dst, WIDTH - 10, HEIGHT - 10, SRC_COLOR); scratch_buf_check(data, &dst, 10, 10, DST_COLOR); scratch_buf_check(data, &dst, WIDTH - 10, HEIGHT - 10, SRC_COLOR); scratch_buf_fini(data, &src); scratch_buf_fini(data, &flink); scratch_buf_fini(data, &dst); scratch_buf_fini(&local, &local_src); scratch_buf_fini(&local, &local_dst); data_fini(&local); } int main(int argc, char **argv) { data_t data = {0, }; igt_subtest_init(argc, argv); igt_fixture { data_init(&data); } igt_subtest("normal") { int loop = 100; while (loop--) copy(&data); } igt_subtest("interruptible") { int loop = 100; igt_fork_signal_helper(); while (loop--) copy(&data); igt_stop_signal_helper(); } igt_subtest("flink") { int loop = 100; while (loop--) copy_flink(&data); } igt_subtest("flink-interruptible") { int loop = 100; igt_fork_signal_helper(); while (loop--) copy_flink(&data); igt_stop_signal_helper(); } igt_exit(); } intel-gpu-tools-1.14/tests/drm_vma_limiter_cached.c0000644000175000017500000000746112665336131017407 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter */ #include "igt.h" #include #include #include #include #include #include #include #include #include "drm.h" #include "intel_bufmgr.h" static drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; /* Testcase: check whether the libdrm vma limiter works * * We've had reports of the X server exhausting the default rlimit of 64k vma's * in the kernel. libdrm has grown facilities to limit the vma caching since, * this checks whether they actually work. * * This one checks whether mmaps of unused cached bos are also properly reaped. */ /* we do both cpu and gtt maps, so only need half of 64k to exhaust */ igt_simple_main { int fd; int i; char *ptr; drm_intel_bo *load_bo; igt_skip_on_simulation(); fd = drm_open_driver(DRIVER_INTEL); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); drm_intel_bufmgr_gem_enable_reuse(bufmgr); batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd)); load_bo = drm_intel_bo_alloc(bufmgr, "target bo", 1024*4096, 4096); igt_assert(load_bo); drm_intel_bufmgr_gem_set_vma_cache_size(bufmgr, 500); /* IMPORTANT: we need to enable buffer reuse, otherwise we won't test * the libdrm bo cache! */ drm_intel_bufmgr_gem_enable_reuse(bufmgr); /* put some load onto the gpu to keep the light buffers active for long * enough */ for (i = 0; i < 10000; i++) { BLIT_COPY_BATCH_START(0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ 4096); OUT_BATCH(0); /* dst x1,y1 */ OUT_BATCH((1024 << 16) | 512); OUT_RELOC(load_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH((0 << 16) | 512); /* src x1, y1 */ OUT_BATCH(4096); OUT_RELOC(load_bo, I915_GEM_DOMAIN_RENDER, 0, 0); ADVANCE_BATCH(); } #define GROUP_SZ 100 for (i = 0; i < 68000; ) { int j; drm_intel_bo *bo[GROUP_SZ]; for (j = 0; j < GROUP_SZ; j++, i++) { bo[j] = drm_intel_bo_alloc(bufmgr, "mmap bo", 4096, 4096); igt_assert(bo[j]); drm_intel_gem_bo_map_gtt(bo[j]); ptr = bo[j]->virtual; igt_assert(ptr); *ptr = 'c'; drm_intel_gem_bo_unmap_gtt(bo[j]); /* put it onto the active list ... */ COLOR_BLIT_COPY_BATCH_START(0); OUT_BATCH((3 << 24) | /* 32 bits */ 128); OUT_BATCH(0); /* dst x1,y1 */ OUT_BATCH((1 << 16) | 1); OUT_RELOC(bo[j], I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(0xffffffff); /* color */ ADVANCE_BATCH(); } intel_batchbuffer_flush(batch); for (j = 0; j < GROUP_SZ; j++) drm_intel_bo_unreference(bo[j]); } intel_batchbuffer_free(batch); drm_intel_bufmgr_destroy(bufmgr); close(fd); } intel-gpu-tools-1.14/tests/gem_pwrite.c0000644000175000017500000001507312665336131015106 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include "drm.h" #define OBJECT_SIZE 16384 #define COPY_BLT_CMD (2<<29|0x53<<22|0x6) #define BLT_WRITE_ALPHA (1<<21) #define BLT_WRITE_RGB (1<<20) #define BLT_SRC_TILED (1<<15) #define BLT_DST_TILED (1<<11) static void do_gem_write(int fd, uint32_t handle, void *buf, int len, int loops) { while (loops--) gem_write(fd, handle, 0, buf, len); } static double elapsed(const struct timeval *start, const struct timeval *end, int loop) { return (1e6*(end->tv_sec - start->tv_sec) + (end->tv_usec - start->tv_usec))/loop; } static const char *bytes_per_sec(char *buf, double v) { const char *order[] = { "", "KiB", "MiB", "GiB", "TiB", NULL, }, **o = order; while (v > 1000 && o[1]) { v /= 1000; o++; } sprintf(buf, "%.1f%s/s", v, *o); return buf; } static void test_big_cpu(int fd, int scale) { uint64_t offset, size; uint32_t handle; size = scale * gem_global_aperture_size(fd) >> 2; intel_require_memory(1, size, CHECK_RAM); igt_require(gem_mmap__has_wc(fd)); handle = gem_create(fd, size); gem_set_domain(fd, handle, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU); for (offset = 0; offset < size; offset += 4096) { int suboffset = (offset >> 12) % (4096 - sizeof(offset)); uint64_t tmp; gem_write(fd, handle, offset + suboffset , &offset, sizeof(offset)); gem_read(fd, handle, offset + suboffset, &tmp, sizeof(tmp)); igt_assert_eq(offset, tmp); } gem_close(fd, handle); } static void test_big_gtt(int fd, int scale) { uint64_t offset, size; uint64_t *ptr; uint32_t handle; size = scale * gem_global_aperture_size(fd) >> 2; intel_require_memory(1, size, CHECK_RAM); igt_require(gem_mmap__has_wc(fd)); handle = gem_create(fd, size); gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); ptr = gem_mmap__wc(fd, handle, 0, size, PROT_READ); for (offset = 0; offset < size; offset += 4096) { int suboffset = (offset >> 12) % (4096 / sizeof(offset) - 1) * sizeof(offset); gem_write(fd, handle, offset + suboffset, &offset, sizeof(offset)); igt_assert_eq(ptr[(offset + suboffset)/sizeof(offset)], offset); } munmap(ptr, size); gem_close(fd, handle); } uint32_t *src, dst; uint32_t *src_user, dst_stolen; int fd; int main(int argc, char **argv) { int object_size = 0; double usecs; const char* bps; char buf[100]; int count; const struct { int level; const char *name; } cache[] = { { 0, "uncached" }, { 1, "snoop" }, { 2, "display" }, { -1 }, }, *c; igt_skip_on_simulation(); igt_subtest_init(argc, argv); if (argc > 1 && atoi(argv[1])) object_size = atoi(argv[1]); if (object_size == 0) object_size = OBJECT_SIZE; object_size = (object_size + 3) & -4; igt_fixture { fd = drm_open_driver(DRIVER_INTEL); dst = gem_create(fd, object_size); src = malloc(object_size); dst_stolen = gem_create_stolen(fd, object_size); src_user = malloc(object_size); } igt_subtest("basic") { for (count = 1; count <= 1<<17; count <<= 1) { struct timeval start, end; gettimeofday(&start, NULL); do_gem_write(fd, dst, src, object_size, count); gettimeofday(&end, NULL); usecs = elapsed(&start, &end, count); bps = bytes_per_sec(buf, object_size/usecs*1e6); igt_info("Time to pwrite %d bytes x %6d: %7.3fµs, %s\n", object_size, count, usecs, bps); fflush(stdout); } } for (c = cache; c->level != -1; c++) { igt_subtest(c->name) { gem_set_caching(fd, dst, c->level); for (count = 1; count <= 1<<17; count <<= 1) { struct timeval start, end; gettimeofday(&start, NULL); do_gem_write(fd, dst, src, object_size, count); gettimeofday(&end, NULL); usecs = elapsed(&start, &end, count); bps = bytes_per_sec(buf, object_size/usecs*1e6); igt_info("Time to %s pwrite %d bytes x %6d: %7.3fµs, %s\n", c->name, object_size, count, usecs, bps); fflush(stdout); } } } igt_subtest("stolen-normal") { for (count = 1; count <= 1<<17; count <<= 1) { struct timeval start, end; gettimeofday(&start, NULL); do_gem_write(fd, dst_stolen, src_user, object_size, count); gettimeofday(&end, NULL); usecs = elapsed(&start, &end, count); bps = bytes_per_sec(buf, object_size/usecs*1e6); igt_info("Time to pwrite %d bytes x %6d: %7.3fµs, %s\n", object_size, count, usecs, bps); fflush(stdout); } } for (c = cache; c->level != -1; c++) { igt_subtest_f("stolen-%s", c->name) { gem_set_caching(fd, dst, c->level); for (count = 1; count <= 1<<17; count <<= 1) { struct timeval start, end; gettimeofday(&start, NULL); do_gem_write(fd, dst_stolen, src_user, object_size, count); gettimeofday(&end, NULL); bps = bytes_per_sec(buf, object_size/usecs*1e6); igt_info("Time to stolen-%s pwrite %d bytes x %6d: %7.3fµs, %s\n", c->name, object_size, count, usecs, bps); fflush(stdout); } } } igt_fixture { free(src); gem_close(fd, dst); free(src_user); gem_close(fd, dst_stolen); } igt_subtest("big-cpu") test_big_cpu(fd, 3); igt_subtest("big-gtt") test_big_gtt(fd, 3); igt_subtest("huge-cpu") test_big_cpu(fd, 6); igt_subtest("huge-gtt") test_big_gtt(fd, 6); igt_fixture close(fd); igt_exit(); } intel-gpu-tools-1.14/tests/gem_render_copy.c0000644000175000017500000001356312665336131016107 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Damien Lespiau */ /* * This file is a basic test for the render_copy() function, a very simple * workload for the 3D engine. */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include "intel_bufmgr.h" IGT_TEST_DESCRIPTION("Basic test for the render_copy() function."); #define WIDTH 512 #define STRIDE (WIDTH*4) #define HEIGHT 512 #define SIZE (HEIGHT*STRIDE) #define SRC_COLOR 0xffff00ff #define DST_COLOR 0xfff0ff00 typedef struct { int drm_fd; uint32_t devid; drm_intel_bufmgr *bufmgr; uint32_t linear[WIDTH * HEIGHT]; } data_t; static int opt_dump_png = false; static int check_all_pixels = false; static void scratch_buf_write_to_png(struct igt_buf *buf, const char *filename) { cairo_surface_t *surface; cairo_status_t ret; drm_intel_bo_map(buf->bo, 0); surface = cairo_image_surface_create_for_data(buf->bo->virtual, CAIRO_FORMAT_RGB24, igt_buf_width(buf), igt_buf_height(buf), buf->stride); ret = cairo_surface_write_to_png(surface, filename); igt_assert(ret == CAIRO_STATUS_SUCCESS); cairo_surface_destroy(surface); drm_intel_bo_unmap(buf->bo); } static void scratch_buf_init(data_t *data, struct igt_buf *buf, int width, int height, int stride, uint32_t color) { drm_intel_bo *bo; int i; bo = drm_intel_bo_alloc(data->bufmgr, "", SIZE, 4096); for (i = 0; i < width * height; i++) data->linear[i] = color; gem_write(data->drm_fd, bo->handle, 0, data->linear, sizeof(data->linear)); buf->bo = bo; buf->stride = stride; buf->tiling = I915_TILING_NONE; buf->size = SIZE; } static void scratch_buf_check(data_t *data, struct igt_buf *buf, int x, int y, uint32_t color) { uint32_t val; gem_read(data->drm_fd, buf->bo->handle, 0, data->linear, sizeof(data->linear)); val = data->linear[y * WIDTH + x]; igt_assert_f(val == color, "Expected 0x%08x, found 0x%08x at (%d,%d)\n", color, val, x, y); } static int opt_handler(int opt, int opt_index, void *data) { if (opt == 'd') { opt_dump_png = true; } if (opt == 'a') { check_all_pixels = true; } return 0; } int main(int argc, char **argv) { data_t data = {0, }; struct intel_batchbuffer *batch = NULL; struct igt_buf src, dst; igt_render_copyfunc_t render_copy = NULL; int opt_dump_aub = igt_aub_dump_enabled(); igt_simple_init_parse_opts(&argc, argv, "da", NULL, NULL, opt_handler, NULL); igt_fixture { data.drm_fd = drm_open_driver_render(DRIVER_INTEL); data.devid = intel_get_drm_devid(data.drm_fd); data.bufmgr = drm_intel_bufmgr_gem_init(data.drm_fd, 4096); igt_assert(data.bufmgr); render_copy = igt_get_render_copyfunc(data.devid); igt_require_f(render_copy, "no render-copy function\n"); batch = intel_batchbuffer_alloc(data.bufmgr, data.devid); igt_assert(batch); } scratch_buf_init(&data, &src, WIDTH, HEIGHT, STRIDE, SRC_COLOR); scratch_buf_init(&data, &dst, WIDTH, HEIGHT, STRIDE, DST_COLOR); scratch_buf_check(&data, &src, WIDTH / 2, HEIGHT / 2, SRC_COLOR); scratch_buf_check(&data, &dst, WIDTH / 2, HEIGHT / 2, DST_COLOR); if (opt_dump_png) { scratch_buf_write_to_png(&src, "source.png"); scratch_buf_write_to_png(&dst, "destination.png"); } if (opt_dump_aub) { drm_intel_bufmgr_gem_set_aub_filename(data.bufmgr, "rendercopy.aub"); drm_intel_bufmgr_gem_set_aub_dump(data.bufmgr, true); } /* This will copy the src to the mid point of the dst buffer. Presumably * the out of bounds accesses will get clipped. * Resulting buffer should look like: * _______ * |dst|dst| * |dst|src| * ------- */ render_copy(batch, NULL, &src, 0, 0, WIDTH, HEIGHT, &dst, WIDTH / 2, HEIGHT / 2); if (opt_dump_png) scratch_buf_write_to_png(&dst, "result.png"); if (opt_dump_aub) { drm_intel_gem_bo_aub_dump_bmp(dst.bo, 0, 0, WIDTH, HEIGHT, AUB_DUMP_BMP_FORMAT_ARGB_8888, STRIDE, 0); drm_intel_bufmgr_gem_set_aub_dump(data.bufmgr, false); } else if (check_all_pixels) { uint32_t val; int i, j; gem_read(data.drm_fd, dst.bo->handle, 0, data.linear, sizeof(data.linear)); for (i = 0; i < WIDTH; i++) { for (j = 0; j < HEIGHT; j++) { uint32_t color = DST_COLOR; val = data.linear[j * WIDTH + i]; if (j >= HEIGHT/2 && i >= WIDTH/2) color = SRC_COLOR; igt_assert_f(val == color, "Expected 0x%08x, found 0x%08x at (%d,%d)\n", color, val, i, j); } } } else { scratch_buf_check(&data, &dst, 10, 10, DST_COLOR); scratch_buf_check(&data, &dst, WIDTH - 10, HEIGHT - 10, SRC_COLOR); } igt_exit(); } intel-gpu-tools-1.14/tests/prime_mmap.c0000644000175000017500000003121412665336131015065 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Rob Bradford * Tiago Vignatti * */ /* * Testcase: Check whether mmap()ing dma-buf works */ #define _GNU_SOURCE #include #include #include #include #include #include #include #include #include #include #include "drm.h" #include "i915_drm.h" #include "drmtest.h" #include "igt_debugfs.h" #include "ioctl_wrappers.h" #define BO_SIZE (16*1024) static int fd; char pattern[] = {0xff, 0x00, 0x00, 0x00, 0x00, 0xff, 0x00, 0x00, 0x00, 0x00, 0xff, 0x00, 0x00, 0x00, 0x00, 0xff}; static void fill_bo(uint32_t handle, size_t size) { off_t i; for (i = 0; i < size; i+=sizeof(pattern)) { gem_write(fd, handle, i, pattern, sizeof(pattern)); } } static void fill_bo_cpu(char *ptr) { memcpy(ptr, pattern, sizeof(pattern)); } static void test_correct(void) { int dma_buf_fd; char *ptr1, *ptr2; uint32_t handle; handle = gem_create(fd, BO_SIZE); fill_bo(handle, BO_SIZE); dma_buf_fd = prime_handle_to_fd(fd, handle); igt_assert(errno == 0); /* Check correctness vs GEM_MMAP_GTT */ ptr1 = gem_mmap__gtt(fd, handle, BO_SIZE, PROT_READ); ptr2 = mmap(NULL, BO_SIZE, PROT_READ, MAP_SHARED, dma_buf_fd, 0); igt_assert(ptr1 != MAP_FAILED); igt_assert(ptr2 != MAP_FAILED); igt_assert(memcmp(ptr1, ptr2, BO_SIZE) == 0); /* Check pattern correctness */ igt_assert(memcmp(ptr2, pattern, sizeof(pattern)) == 0); munmap(ptr1, BO_SIZE); munmap(ptr2, BO_SIZE); close(dma_buf_fd); gem_close(fd, handle); } static void test_map_unmap(void) { int dma_buf_fd; char *ptr; uint32_t handle; handle = gem_create(fd, BO_SIZE); fill_bo(handle, BO_SIZE); dma_buf_fd = prime_handle_to_fd(fd, handle); igt_assert(errno == 0); ptr = mmap(NULL, BO_SIZE, PROT_READ, MAP_SHARED, dma_buf_fd, 0); igt_assert(ptr != MAP_FAILED); igt_assert(memcmp(ptr, pattern, sizeof(pattern)) == 0); /* Unmap and remap */ munmap(ptr, BO_SIZE); ptr = mmap(NULL, BO_SIZE, PROT_READ, MAP_SHARED, dma_buf_fd, 0); igt_assert(ptr != MAP_FAILED); igt_assert(memcmp(ptr, pattern, sizeof(pattern)) == 0); munmap(ptr, BO_SIZE); close(dma_buf_fd); gem_close(fd, handle); } /* prime and then unprime and then prime again the same handle */ static void test_reprime(void) { int dma_buf_fd; char *ptr; uint32_t handle; handle = gem_create(fd, BO_SIZE); fill_bo(handle, BO_SIZE); dma_buf_fd = prime_handle_to_fd(fd, handle); igt_assert(errno == 0); ptr = mmap(NULL, BO_SIZE, PROT_READ, MAP_SHARED, dma_buf_fd, 0); igt_assert(ptr != MAP_FAILED); igt_assert(memcmp(ptr, pattern, sizeof(pattern)) == 0); close (dma_buf_fd); igt_assert(memcmp(ptr, pattern, sizeof(pattern)) == 0); munmap(ptr, BO_SIZE); dma_buf_fd = prime_handle_to_fd(fd, handle); ptr = mmap(NULL, BO_SIZE, PROT_READ, MAP_SHARED, dma_buf_fd, 0); igt_assert(ptr != MAP_FAILED); igt_assert(memcmp(ptr, pattern, sizeof(pattern)) == 0); munmap(ptr, BO_SIZE); close(dma_buf_fd); gem_close(fd, handle); } /* map from another process */ static void test_forked(void) { int dma_buf_fd; char *ptr; uint32_t handle; handle = gem_create(fd, BO_SIZE); fill_bo(handle, BO_SIZE); dma_buf_fd = prime_handle_to_fd(fd, handle); igt_assert(errno == 0); igt_fork(childno, 1) { ptr = mmap(NULL, BO_SIZE, PROT_READ, MAP_SHARED, dma_buf_fd, 0); igt_assert(ptr != MAP_FAILED); igt_assert(memcmp(ptr, pattern, sizeof(pattern)) == 0); munmap(ptr, BO_SIZE); close(dma_buf_fd); } close(dma_buf_fd); igt_waitchildren(); gem_close(fd, handle); } /* test simple CPU write */ static void test_correct_cpu_write(void) { int dma_buf_fd; char *ptr; uint32_t handle; handle = gem_create(fd, BO_SIZE); dma_buf_fd = prime_handle_to_fd_for_mmap(fd, handle); /* Skip if DRM_RDWR is not supported */ igt_skip_on(errno == EINVAL); /* Check correctness of map using write protection (PROT_WRITE) */ ptr = mmap(NULL, BO_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, dma_buf_fd, 0); igt_assert(ptr != MAP_FAILED); /* Fill bo using CPU */ fill_bo_cpu(ptr); /* Check pattern correctness */ igt_assert(memcmp(ptr, pattern, sizeof(pattern)) == 0); munmap(ptr, BO_SIZE); close(dma_buf_fd); gem_close(fd, handle); } /* map from another process and then write using CPU */ static void test_forked_cpu_write(void) { int dma_buf_fd; char *ptr; uint32_t handle; handle = gem_create(fd, BO_SIZE); dma_buf_fd = prime_handle_to_fd_for_mmap(fd, handle); /* Skip if DRM_RDWR is not supported */ igt_skip_on(errno == EINVAL); igt_fork(childno, 1) { ptr = mmap(NULL, BO_SIZE, PROT_READ | PROT_WRITE , MAP_SHARED, dma_buf_fd, 0); igt_assert(ptr != MAP_FAILED); fill_bo_cpu(ptr); igt_assert(memcmp(ptr, pattern, sizeof(pattern)) == 0); munmap(ptr, BO_SIZE); close(dma_buf_fd); } close(dma_buf_fd); igt_waitchildren(); gem_close(fd, handle); } static void test_refcounting(void) { int dma_buf_fd; char *ptr; uint32_t handle; handle = gem_create(fd, BO_SIZE); fill_bo(handle, BO_SIZE); dma_buf_fd = prime_handle_to_fd(fd, handle); igt_assert(errno == 0); /* Close gem object before mapping */ gem_close(fd, handle); ptr = mmap(NULL, BO_SIZE, PROT_READ, MAP_SHARED, dma_buf_fd, 0); igt_assert(ptr != MAP_FAILED); igt_assert(memcmp(ptr, pattern, sizeof(pattern)) == 0); munmap(ptr, BO_SIZE); close (dma_buf_fd); } /* dup before mmap */ static void test_dup(void) { int dma_buf_fd; char *ptr; uint32_t handle; handle = gem_create(fd, BO_SIZE); fill_bo(handle, BO_SIZE); dma_buf_fd = dup(prime_handle_to_fd(fd, handle)); igt_assert(errno == 0); ptr = mmap(NULL, BO_SIZE, PROT_READ, MAP_SHARED, dma_buf_fd, 0); igt_assert(ptr != MAP_FAILED); igt_assert(memcmp(ptr, pattern, sizeof(pattern)) == 0); munmap(ptr, BO_SIZE); gem_close(fd, handle); close (dma_buf_fd); } /* Used for error case testing to avoid wrapper */ static int prime_handle_to_fd_no_assert(uint32_t handle, int flags, int *fd_out) { struct drm_prime_handle args; int ret; args.handle = handle; args.flags = flags; args.fd = -1; ret = drmIoctl(fd, DRM_IOCTL_PRIME_HANDLE_TO_FD, &args); if (ret) ret = errno; *fd_out = args.fd; return ret; } /* test for mmap(dma_buf_export(userptr)) */ static void test_userptr(void) { int ret, dma_buf_fd; void *ptr; uint32_t handle; /* create userptr bo */ ret = posix_memalign(&ptr, 4096, BO_SIZE); igt_assert_eq(ret, 0); /* we are not allowed to export unsynchronized userptr. Just create a normal * one */ gem_userptr(fd, (uint32_t *)ptr, BO_SIZE, 0, 0, &handle); /* export userptr */ ret = prime_handle_to_fd_no_assert(handle, DRM_CLOEXEC, &dma_buf_fd); if (ret) { igt_assert(ret == EINVAL || ret == ENODEV); goto free_userptr; } else { igt_assert_eq(ret, 0); igt_assert_lte(0, dma_buf_fd); } /* a userptr doesn't have the obj->base.filp, but can be exported via * dma-buf, so make sure it fails here */ ptr = mmap(NULL, BO_SIZE, PROT_READ, MAP_SHARED, dma_buf_fd, 0); igt_assert(ptr == MAP_FAILED && errno == ENODEV); free_userptr: gem_close(fd, handle); close(dma_buf_fd); } static void test_errors(void) { int i, dma_buf_fd; char *ptr; uint32_t handle; int invalid_flags[] = {DRM_CLOEXEC - 1, DRM_CLOEXEC + 1, DRM_RDWR - 1, DRM_RDWR + 1}; /* Test for invalid flags */ handle = gem_create(fd, BO_SIZE); for (i = 0; i < sizeof(invalid_flags) / sizeof(invalid_flags[0]); i++) { prime_handle_to_fd_no_assert(handle, invalid_flags[i], &dma_buf_fd); igt_assert_eq(errno, EINVAL); errno = 0; } /* Close gem object before priming */ handle = gem_create(fd, BO_SIZE); fill_bo(handle, BO_SIZE); gem_close(fd, handle); prime_handle_to_fd_no_assert(handle, DRM_CLOEXEC, &dma_buf_fd); igt_assert(dma_buf_fd == -1 && errno == ENOENT); errno = 0; /* close fd before mapping */ handle = gem_create(fd, BO_SIZE); fill_bo(handle, BO_SIZE); dma_buf_fd = prime_handle_to_fd(fd, handle); igt_assert(errno == 0); close(dma_buf_fd); ptr = mmap(NULL, BO_SIZE, PROT_READ, MAP_SHARED, dma_buf_fd, 0); igt_assert(ptr == MAP_FAILED && errno == EBADF); errno = 0; gem_close(fd, handle); /* Map too big */ handle = gem_create(fd, BO_SIZE); fill_bo(handle, BO_SIZE); dma_buf_fd = prime_handle_to_fd(fd, handle); igt_assert(errno == 0); ptr = mmap(NULL, BO_SIZE * 2, PROT_READ, MAP_SHARED, dma_buf_fd, 0); igt_assert(ptr == MAP_FAILED && errno == EINVAL); errno = 0; close(dma_buf_fd); gem_close(fd, handle); /* Overlapping the end of the buffer */ handle = gem_create(fd, BO_SIZE); dma_buf_fd = prime_handle_to_fd(fd, handle); igt_assert(errno == 0); ptr = mmap(NULL, BO_SIZE, PROT_READ, MAP_SHARED, dma_buf_fd, BO_SIZE / 2); igt_assert(ptr == MAP_FAILED && errno == EINVAL); errno = 0; close(dma_buf_fd); gem_close(fd, handle); } /* Test for invalid flags on sync ioctl */ static void test_invalid_sync_flags(void) { int i, dma_buf_fd; uint32_t handle; struct local_dma_buf_sync sync; int invalid_flags[] = {-1, 0x00, LOCAL_DMA_BUF_SYNC_RW + 1, LOCAL_DMA_BUF_SYNC_VALID_FLAGS_MASK + 1}; handle = gem_create(fd, BO_SIZE); dma_buf_fd = prime_handle_to_fd(fd, handle); for (i = 0; i < sizeof(invalid_flags) / sizeof(invalid_flags[0]); i++) { memset(&sync, 0, sizeof(sync)); sync.flags = invalid_flags[i]; drmIoctl(dma_buf_fd, LOCAL_DMA_BUF_IOCTL_SYNC, &sync); igt_assert_eq(errno, EINVAL); errno = 0; } } static void test_aperture_limit(void) { int dma_buf_fd1, dma_buf_fd2; char *ptr1, *ptr2; uint32_t handle1, handle2; /* Two buffers the sum of which > mappable aperture */ uint64_t size1 = (gem_mappable_aperture_size() * 7) / 8; uint64_t size2 = (gem_mappable_aperture_size() * 3) / 8; handle1 = gem_create(fd, size1); fill_bo(handle1, BO_SIZE); dma_buf_fd1 = prime_handle_to_fd(fd, handle1); igt_assert(errno == 0); ptr1 = mmap(NULL, size1, PROT_READ, MAP_SHARED, dma_buf_fd1, 0); igt_assert(ptr1 != MAP_FAILED); igt_assert(memcmp(ptr1, pattern, sizeof(pattern)) == 0); handle2 = gem_create(fd, size1); fill_bo(handle2, BO_SIZE); dma_buf_fd2 = prime_handle_to_fd(fd, handle2); igt_assert(errno == 0); ptr2 = mmap(NULL, size2, PROT_READ, MAP_SHARED, dma_buf_fd2, 0); igt_assert(ptr2 != MAP_FAILED); igt_assert(memcmp(ptr2, pattern, sizeof(pattern)) == 0); igt_assert(memcmp(ptr1, ptr2, BO_SIZE) == 0); munmap(ptr1, size1); munmap(ptr2, size2); close(dma_buf_fd1); close(dma_buf_fd2); gem_close(fd, handle1); gem_close(fd, handle2); } static int check_for_dma_buf_mmap(void) { int dma_buf_fd; char *ptr; uint32_t handle; int ret = 1; handle = gem_create(fd, BO_SIZE); dma_buf_fd = prime_handle_to_fd(fd, handle); ptr = mmap(NULL, BO_SIZE, PROT_READ, MAP_SHARED, dma_buf_fd, 0); if (ptr != MAP_FAILED) ret = 0; munmap(ptr, BO_SIZE); gem_close(fd, handle); close(dma_buf_fd); return ret; } igt_main { struct { const char *name; void (*fn)(void); } tests[] = { { "test_correct", test_correct }, { "test_map_unmap", test_map_unmap }, { "test_reprime", test_reprime }, { "test_forked", test_forked }, { "test_correct_cpu_write", test_correct_cpu_write }, { "test_forked_cpu_write", test_forked_cpu_write }, { "test_refcounting", test_refcounting }, { "test_dup", test_dup }, { "test_userptr", test_userptr }, { "test_errors", test_errors }, { "test_invalid_sync_flags", test_invalid_sync_flags }, { "test_aperture_limit", test_aperture_limit }, }; int i; igt_fixture { fd = drm_open_driver(DRIVER_INTEL); igt_skip_on((check_for_dma_buf_mmap() != 0)); errno = 0; } for (i = 0; i < ARRAY_SIZE(tests); i++) { igt_subtest(tests[i].name) tests[i].fn(); } igt_fixture close(fd); } intel-gpu-tools-1.14/tests/gem_persistent_relocs.c0000644000175000017500000002231212665336131017335 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * */ #define _GNU_SOURCE #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include IGT_TEST_DESCRIPTION("Test persistent relocations as used by uxa/libva."); /* * Testcase: Persistent relocations as used by uxa/libva * * Note: this currently fails on byt/full-ppgtt * https://bugs.freedesktop.org/show_bug.cgi?id=84859 */ static drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; uint32_t blob[2048*2048]; #define NUM_TARGET_BOS 16 drm_intel_bo *pc_target_bo[NUM_TARGET_BOS]; drm_intel_bo *dummy_bo; drm_intel_bo *special_bos[NUM_TARGET_BOS]; uint32_t relocs_bo_handle[NUM_TARGET_BOS]; void *gtt_relocs_ptr[NUM_TARGET_BOS]; uint32_t devid; int special_reloc_ofs; int special_line_ofs; int special_batch_len; int small_pitch = 64; static drm_intel_bo *create_special_bo(void) { drm_intel_bo *bo; uint32_t data[1024]; int len = 0; #define BATCH(dw) data[len++] = (dw); memset(data, 0, 4096); bo = drm_intel_bo_alloc(bufmgr, "special batch", 4096, 4096); if (intel_gen(devid) >= 8) { BATCH(MI_NOOP); BATCH(XY_COLOR_BLT_CMD_NOLEN | 5 | COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB); } else { BATCH(XY_COLOR_BLT_CMD_NOLEN | 4 | COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB); } BATCH((3 << 24) | (0xf0 << 16) | small_pitch); special_line_ofs = 4*len; BATCH(0); BATCH(1 << 16 | 1); special_reloc_ofs = 4*len; BATCH(0); if (intel_gen(devid) >= 8) BATCH(0); /* FIXME */ BATCH(0xdeadbeef); #define CMD_POLY_STIPPLE_OFFSET 0x7906 /* batchbuffer end */ if (IS_GEN5(batch->devid)) { BATCH(CMD_POLY_STIPPLE_OFFSET << 16); BATCH(0); } igt_assert_eq(len % 2, 0); BATCH(MI_NOOP); BATCH(MI_BATCH_BUFFER_END); drm_intel_bo_subdata(bo, 0, 4096, data); special_batch_len = len*4; return bo; } static void emit_dummy_load(int pitch) { int i; uint32_t tile_flags = 0; if (IS_965(devid)) { pitch /= 4; tile_flags = XY_SRC_COPY_BLT_SRC_TILED | XY_SRC_COPY_BLT_DST_TILED; } for (i = 0; i < 5; i++) { BLIT_COPY_BATCH_START(tile_flags); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ pitch); OUT_BATCH(0 << 16 | 1024); OUT_BATCH((2048) << 16 | (2048)); OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(0 << 16 | 0); OUT_BATCH(pitch); OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, 0, 0); ADVANCE_BATCH(); if (batch->gen >= 6) { BEGIN_BATCH(3, 0); OUT_BATCH(XY_SETUP_CLIP_BLT_CMD); OUT_BATCH(0); OUT_BATCH(0); ADVANCE_BATCH(); } } intel_batchbuffer_flush(batch); } static void faulting_reloc_and_emit(int fd, drm_intel_bo *target_bo, void *gtt_relocs, drm_intel_bo *special_bo) { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 exec[2]; int ring; if (intel_gen(devid) >= 6) ring = I915_EXEC_BLT; else ring = 0; exec[0].handle = target_bo->handle; exec[0].relocation_count = 0; exec[0].relocs_ptr = 0; exec[0].alignment = 0; exec[0].offset = 0; exec[0].flags = 0; exec[0].rsvd1 = 0; exec[0].rsvd2 = 0; exec[1].handle = special_bo->handle; exec[1].relocation_count = 1; /* A newly mmap gtt bo will fault on first access. */ exec[1].relocs_ptr = (uintptr_t)gtt_relocs; exec[1].alignment = 0; exec[1].offset = 0; exec[1].flags = 0; exec[1].rsvd1 = 0; exec[1].rsvd2 = 0; execbuf.buffers_ptr = (uintptr_t)exec; execbuf.buffer_count = 2; execbuf.batch_start_offset = 0; execbuf.batch_len = special_batch_len; execbuf.cliprects_ptr = 0; execbuf.num_cliprects = 0; execbuf.DR1 = 0; execbuf.DR4 = 0; execbuf.flags = ring; i915_execbuffer2_set_context_id(execbuf, 0); execbuf.rsvd2 = 0; gem_execbuf(fd, &execbuf); } static void do_test(int fd, bool faulting_reloc) { uint32_t tiling_mode = I915_TILING_X; unsigned long pitch, act_size; uint32_t test; int i, repeat; if (faulting_reloc) igt_disable_prefault(); act_size = 2048; dummy_bo = drm_intel_bo_alloc_tiled(bufmgr, "tiled dummy_bo", act_size, act_size, 4, &tiling_mode, &pitch, 0); drm_intel_bo_subdata(dummy_bo, 0, act_size*act_size*4, blob); for (i = 0; i < NUM_TARGET_BOS; i++) { struct drm_i915_gem_relocation_entry reloc[1]; special_bos[i] = create_special_bo(); pc_target_bo[i] = drm_intel_bo_alloc(bufmgr, "special batch", 4096, 4096); igt_assert(pc_target_bo[i]->offset == 0); reloc[0].offset = special_reloc_ofs; reloc[0].delta = 0; reloc[0].target_handle = pc_target_bo[i]->handle; reloc[0].read_domains = I915_GEM_DOMAIN_RENDER; reloc[0].write_domain = I915_GEM_DOMAIN_RENDER; reloc[0].presumed_offset = 0; relocs_bo_handle[i] = gem_create(fd, 4096); gem_write(fd, relocs_bo_handle[i], 0, reloc, sizeof(reloc)); gtt_relocs_ptr[i] = gem_mmap__gtt(fd, relocs_bo_handle[i], 4096, PROT_READ | PROT_WRITE); } /* repeat must be smaller than 4096/small_pitch */ for (repeat = 0; repeat < 8; repeat++) { for (i = 0; i < NUM_TARGET_BOS; i++) { uint32_t data[2] = { (repeat << 16) | 0, ((repeat + 1) << 16) | 1 }; drm_intel_bo_subdata(special_bos[i], special_line_ofs, 8, &data); emit_dummy_load(pitch); faulting_reloc_and_emit(fd, pc_target_bo[i], gtt_relocs_ptr[i], special_bos[i]); } } /* Only check at the end to avoid unnecessarily synchronous behaviour. */ for (i = 0; i < NUM_TARGET_BOS; i++) { /* repeat must be smaller than 4096/small_pitch */ for (repeat = 0; repeat < 8; repeat++) { drm_intel_bo_get_subdata(pc_target_bo[i], repeat*small_pitch, 4, &test); igt_assert_f(test == 0xdeadbeef, "mismatch in buffer %i: 0x%08x instead of 0xdeadbeef at offset %i\n", i, test, repeat*small_pitch); } drm_intel_bo_unreference(pc_target_bo[i]); drm_intel_bo_unreference(special_bos[i]); gem_close(fd, relocs_bo_handle[i]); munmap(gtt_relocs_ptr[i], 4096); } drm_intel_gem_bo_map_gtt(dummy_bo); drm_intel_gem_bo_unmap_gtt(dummy_bo); drm_intel_bo_unreference(dummy_bo); if (faulting_reloc) igt_enable_prefault(); } #define INTERRUPT (1 << 0) #define FAULTING (1 << 1) #define THRASH (1 << 2) #define THRASH_INACTIVE (1 << 3) #define ALL_FLAGS (INTERRUPT | FAULTING | THRASH | THRASH_INACTIVE) static void do_forked_test(int fd, unsigned flags) { int num_threads = sysconf(_SC_NPROCESSORS_ONLN); struct igt_helper_process thrasher = {}; if (flags & (THRASH | THRASH_INACTIVE)) { uint64_t val = (flags & THRASH_INACTIVE) ? (DROP_RETIRE | DROP_BOUND | DROP_UNBOUND) : DROP_ALL; igt_fork_helper(&thrasher) { while (1) { usleep(1000); igt_drop_caches_set(val); } } } igt_fork(i, num_threads) { /* re-create process local data */ bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); batch = intel_batchbuffer_alloc(bufmgr, devid); if (flags & INTERRUPT) igt_fork_signal_helper(); do_test(fd, flags & FAULTING); if (flags & INTERRUPT) igt_stop_signal_helper(); } igt_waitchildren(); if (flags & (THRASH | THRASH_INACTIVE)) igt_stop_helper(&thrasher); } int fd; #define MAX_BLT_SIZE 128 igt_main { igt_skip_on_simulation(); memset(blob, 'A', sizeof(blob)); igt_fixture { fd = drm_open_driver(DRIVER_INTEL); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); /* disable reuse, otherwise the test fails */ //drm_intel_bufmgr_gem_enable_reuse(bufmgr); devid = intel_get_drm_devid(fd); batch = intel_batchbuffer_alloc(bufmgr, devid); } igt_subtest("normal") do_test(fd, false); igt_fork_signal_helper(); igt_subtest("interruptible") do_test(fd, false); igt_stop_signal_helper(); for (unsigned flags = 0; flags <= ALL_FLAGS; flags++) { if ((flags & THRASH) && (flags & THRASH_INACTIVE)) continue; igt_subtest_f("forked%s%s%s%s", flags & INTERRUPT ? "-interruptible" : "", flags & FAULTING ? "-faulting-reloc" : "", flags & THRASH ? "-thrashing" : "", flags & THRASH_INACTIVE ? "-thrash-inactive" : "") do_forked_test(fd, flags); } igt_fixture { intel_batchbuffer_free(batch); drm_intel_bufmgr_destroy(bufmgr); close(fd); } } intel-gpu-tools-1.14/tests/gem_threaded_access_tiled.c0000644000175000017500000000562112665336131020054 00000000000000/* * Copyright (c) 2012 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Mika Kuoppala */ #include "igt.h" #include #include #include #include #include #include "intel_bufmgr.h" IGT_TEST_DESCRIPTION("Check parallel access to tiled memory."); /* Testcase: check parallel access to tiled memory * * Parallel access to tiled memory caused sigbus */ #define NUM_THREADS 2 #define WIDTH 4096 #define HEIGHT 4096 struct thread_ctx { drm_intel_bo *bo; }; static drm_intel_bufmgr *bufmgr; static struct thread_ctx tctx[NUM_THREADS]; static void *copy_fn(void *p) { unsigned char *buf; struct thread_ctx *c = p; buf = malloc(WIDTH * HEIGHT); if (buf == NULL) return (void *)1; memcpy(buf, c->bo->virtual, WIDTH * HEIGHT); free(buf); return (void *)0; } static int copy_tile_threaded(drm_intel_bo *bo) { int i; int r; pthread_t thr[NUM_THREADS]; void *status; for (i = 0; i < NUM_THREADS; i++) { tctx[i].bo = bo; r = pthread_create(&thr[i], NULL, copy_fn, (void *)&tctx[i]); igt_assert_eq(r, 0); } for (i = 0; i < NUM_THREADS; i++) { pthread_join(thr[i], &status); igt_assert(status == 0); } return 0; } igt_simple_main { int fd; drm_intel_bo *bo; uint32_t tiling_mode = I915_TILING_Y; unsigned long pitch = 0; int r; igt_skip_on_simulation(); fd = drm_open_driver(DRIVER_INTEL); igt_assert(fd >= 0); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); igt_assert(bufmgr); bo = drm_intel_bo_alloc_tiled(bufmgr, "mmap bo", WIDTH, HEIGHT, 1, &tiling_mode, &pitch, 0); igt_assert(bo); r = drm_intel_gem_bo_map_gtt(bo); igt_assert(!r); r = copy_tile_threaded(bo); igt_assert(!r); r = drm_intel_gem_bo_unmap_gtt(bo); igt_assert(!r); drm_intel_bo_unreference(bo); drm_intel_bufmgr_destroy(bufmgr); close(fd); } intel-gpu-tools-1.14/tests/gem_pin.c0000644000175000017500000001512412665336131014357 00000000000000/* * Copyright © 20013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ /* Exercises pinning of small bo */ #include "igt.h" #include #include #include #include #include #include #include #include #include IGT_TEST_DESCRIPTION("Exercises pinning of small buffer objects."); #define COPY_BLT_CMD (2<<29|0x53<<22|0x6) #define BLT_WRITE_ALPHA (1<<21) #define BLT_WRITE_RGB (1<<20) static void exec(int fd, uint32_t handle, uint32_t offset) { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 gem_exec[1]; struct drm_i915_gem_relocation_entry gem_reloc[1]; gem_reloc[0].offset = 1024; gem_reloc[0].delta = 0; gem_reloc[0].target_handle = handle; gem_reloc[0].read_domains = I915_GEM_DOMAIN_RENDER; gem_reloc[0].write_domain = 0; gem_reloc[0].presumed_offset = 0; gem_exec[0].handle = handle; gem_exec[0].relocation_count = 1; gem_exec[0].relocs_ptr = (uintptr_t) gem_reloc; gem_exec[0].alignment = 0; gem_exec[0].offset = 0; gem_exec[0].flags = 0; gem_exec[0].rsvd1 = 0; gem_exec[0].rsvd2 = 0; execbuf.buffers_ptr = (uintptr_t)gem_exec; execbuf.buffer_count = 1; execbuf.batch_start_offset = 0; execbuf.batch_len = 8; execbuf.cliprects_ptr = 0; execbuf.num_cliprects = 0; execbuf.DR1 = 0; execbuf.DR4 = 0; execbuf.flags = 0; i915_execbuffer2_set_context_id(execbuf, 0); execbuf.rsvd2 = 0; do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); igt_assert(gem_exec[0].offset == offset); } static int gem_linear_blt(int fd, uint32_t *batch, uint32_t src, uint32_t dst, uint32_t length, struct drm_i915_gem_relocation_entry *reloc) { uint32_t *b = batch; *b++ = COPY_BLT_CMD | BLT_WRITE_ALPHA | BLT_WRITE_RGB; *b++ = 0x66 << 16 | 1 << 25 | 1 << 24 | (4*1024); *b++ = 0; *b++ = (length / (4*1024)) << 16 | 1024; *b++ = 0; reloc->offset = (b-batch-1) * sizeof(uint32_t); reloc->delta = 0; reloc->target_handle = dst; reloc->read_domains = I915_GEM_DOMAIN_RENDER; reloc->write_domain = I915_GEM_DOMAIN_RENDER; reloc->presumed_offset = 0; reloc++; if (intel_gen(intel_get_drm_devid(fd)) >= 8) *b++ = 0; /* FIXME */ *b++ = 0; *b++ = 4*1024; *b++ = 0; reloc->offset = (b-batch-1) * sizeof(uint32_t); reloc->delta = 0; reloc->target_handle = src; reloc->read_domains = I915_GEM_DOMAIN_RENDER; reloc->write_domain = 0; reloc->presumed_offset = 0; reloc++; if (intel_gen(intel_get_drm_devid(fd)) >= 8) *b++ = 0; /* FIXME */ *b++ = MI_BATCH_BUFFER_END; *b++ = 0; return (b - batch) * sizeof(uint32_t); } static void make_busy(int fd, uint32_t handle) { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 obj[2]; struct drm_i915_gem_relocation_entry reloc[2]; uint32_t batch[20]; uint32_t tmp; int count; tmp = gem_create(fd, 1024*1024); obj[0].handle = tmp; obj[0].relocation_count = 0; obj[0].relocs_ptr = 0; obj[0].alignment = 0; obj[0].offset = 0; obj[0].flags = 0; obj[0].rsvd1 = 0; obj[0].rsvd2 = 0; obj[1].handle = handle; obj[1].relocation_count = 2; obj[1].relocs_ptr = (uintptr_t) reloc; obj[1].alignment = 0; obj[1].offset = 0; obj[1].flags = 0; obj[1].rsvd1 = 0; obj[1].rsvd2 = 0; execbuf.buffers_ptr = (uintptr_t)obj; execbuf.buffer_count = 2; execbuf.batch_start_offset = 0; execbuf.batch_len = gem_linear_blt(fd, batch, tmp, tmp, 1024*1024,reloc); execbuf.cliprects_ptr = 0; execbuf.num_cliprects = 0; execbuf.DR1 = 0; execbuf.DR4 = 0; execbuf.flags = 0; if (HAS_BLT_RING(intel_get_drm_devid(fd))) execbuf.flags |= I915_EXEC_BLT; i915_execbuffer2_set_context_id(execbuf, 0); execbuf.rsvd2 = 0; gem_write(fd, handle, 0, batch, execbuf.batch_len); for (count = 0; count < 10; count++) do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); gem_close(fd, tmp); } static int test_can_pin(int fd) { struct drm_i915_gem_pin pin; int ret; pin.handle = gem_create(fd, 4096);; pin.alignment = 0; ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_PIN, &pin); gem_close(fd, pin.handle); return ret == 0;; } static uint32_t gem_pin(int fd, int handle, int alignment) { struct drm_i915_gem_pin pin; pin.handle = handle; pin.alignment = alignment; do_ioctl(fd, DRM_IOCTL_I915_GEM_PIN, &pin); return pin.offset; } igt_simple_main { const uint32_t batch[2] = {MI_BATCH_BUFFER_END}; struct timeval start, now; uint32_t *handle, *offset; int fd, i; igt_skip_on_simulation(); fd = drm_open_driver(DRIVER_INTEL); igt_require(test_can_pin(fd)); handle = malloc(sizeof(uint32_t)*100); offset = malloc(sizeof(uint32_t)*100); /* Race creation/use against interrupts */ igt_fork_signal_helper(); gettimeofday(&start, NULL); do { for (i = 0; i < 100; i++) { if (i & 1) { /* pin anidle bo */ handle[i] = gem_create(fd, 4096); offset[i] = gem_pin(fd, handle[i], 0); igt_assert(offset[i]); gem_write(fd, handle[i], 0, batch, sizeof(batch)); } else { /* try to pin an anidle bo */ handle[i] = gem_create(fd, 4096); make_busy(fd, handle[i]); offset[i] = gem_pin(fd, handle[i], 256*1024); igt_assert(offset[i]); igt_assert((offset[i] & (256*1024-1)) == 0); gem_write(fd, handle[i], 0, batch, sizeof(batch)); } } for (i = 0; i < 1000; i++) { int j = rand() % 100; exec(fd, handle[j], offset[j]); } for (i = 0; i < 100; i++) gem_close(fd, handle[i]); gettimeofday(&now, NULL); } while ((now.tv_sec - start.tv_sec)*1000 + (now.tv_usec - start.tv_usec) / 1000 < 10000); igt_stop_signal_helper(); } intel-gpu-tools-1.14/tests/gem_create.c0000644000175000017500000001047512665336131015040 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Ankitprasad Sharma * */ /** @file gem_create.c * * This is a test for the extended and old gem_create ioctl, that * includes allocation of object from stolen memory and shmem. * * The goal is to simply ensure that basics work and invalid input * combinations are rejected. */ #include #include #include #include #include #include #include #include #include #include #include #include "ioctl_wrappers.h" #include "intel_bufmgr.h" #include "intel_batchbuffer.h" #include "intel_io.h" #include "intel_chipset.h" #include "igt_aux.h" #include "drmtest.h" #include "drm.h" #include "i915_drm.h" IGT_TEST_DESCRIPTION("This is a test for the extended & old gem_create ioctl," " that includes allocation of object from stolen memory" " and shmem."); #define CLEAR(s) memset(&s, 0, sizeof(s)) #define PAGE_SIZE 4096 struct local_i915_gem_create_v2 { uint64_t size; uint32_t handle; uint32_t pad; #define I915_CREATE_PLACEMENT_STOLEN (1<<0) uint32_t flags; } create; #define LOCAL_IOCTL_I915_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_CREATE, struct local_i915_gem_create_v2) static void invalid_flag_test(int fd) { int ret; gem_require_stolen_support(fd); create.handle = 0; create.size = PAGE_SIZE; create.flags = ~I915_CREATE_PLACEMENT_STOLEN; ret = drmIoctl(fd, LOCAL_IOCTL_I915_GEM_CREATE, &create); igt_assert(ret <= 0); create.flags = ~0; ret = drmIoctl(fd, LOCAL_IOCTL_I915_GEM_CREATE, &create); igt_assert(ret <= 0); } static void invalid_size_test(int fd) { int handle; handle = __gem_create(fd, 0); igt_assert(!handle); } /* * Creating an object with non-aligned size and trying to access it with an * offset, which is greater than the requested size but smaller than the * object's last page boundary. pwrite here must be successful. */ static void valid_nonaligned_size(int fd) { int handle; char buf[PAGE_SIZE]; handle = gem_create(fd, PAGE_SIZE / 2); gem_write(fd, handle, PAGE_SIZE / 2, buf, PAGE_SIZE / 2); gem_close(fd, handle); } /* * Creating an object with non-aligned size and trying to access it with an * offset, which is greater than the requested size and larger than the * object's last page boundary. pwrite here must fail. */ static void invalid_nonaligned_size(int fd) { int handle; char buf[PAGE_SIZE]; struct drm_i915_gem_pwrite gem_pwrite; handle = gem_create(fd, PAGE_SIZE / 2); CLEAR(gem_pwrite); gem_pwrite.handle = handle; gem_pwrite.offset = PAGE_SIZE / 2; gem_pwrite.size = PAGE_SIZE; gem_pwrite.data_ptr = (uintptr_t)buf; /* This should fail. Hence cannot use gem_write. */ igt_assert(drmIoctl(fd, DRM_IOCTL_I915_GEM_PWRITE, &gem_pwrite)); gem_close(fd, handle); } igt_main { int fd = -1; igt_skip_on_simulation(); igt_fixture { fd = drm_open_driver(DRIVER_INTEL); } igt_subtest("stolen-invalid-flag") invalid_flag_test(fd); igt_subtest("create-invalid-size") invalid_size_test(fd); igt_subtest("create-valid-nonaligned") valid_nonaligned_size(fd); igt_subtest("create-invalid-nonaligned") invalid_nonaligned_size(fd); } intel-gpu-tools-1.14/tests/kms_psr_sink_crc.c0000644000175000017500000003616612665336131016303 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include "igt.h" #include #include #include #include #include "intel_bufmgr.h" bool running_with_psr_disabled; #define CRC_BLACK "000000000000" enum planes { PRIMARY, SPRITE, CURSOR, }; enum operations { PAGE_FLIP, MMAP_GTT, MMAP_GTT_WAITING, MMAP_CPU, BLT, RENDER, PLANE_MOVE, PLANE_ONOFF, }; static const char *op_str(enum operations op) { static const char * const name[] = { [PAGE_FLIP] = "page_flip", [MMAP_GTT] = "mmap_gtt", [MMAP_GTT_WAITING] = "mmap_gtt_waiting", [MMAP_CPU] = "mmap_cpu", [BLT] = "blt", [RENDER] = "render", [PLANE_MOVE] = "plane_move", [PLANE_ONOFF] = "plane_onoff", }; return name[op]; } typedef struct { int drm_fd; enum planes test_plane; enum operations op; uint32_t devid; uint32_t crtc_id; igt_display_t display; drm_intel_bufmgr *bufmgr; struct igt_fb fb_green, fb_white; igt_plane_t *primary, *sprite, *cursor; int mod_size; int mod_stride; drmModeModeInfo *mode; igt_output_t *output; } data_t; static void create_cursor_fb(data_t *data) { cairo_t *cr; uint32_t fb_id; fb_id = igt_create_fb(data->drm_fd, 64, 64, DRM_FORMAT_ARGB8888, LOCAL_DRM_FORMAT_MOD_NONE, &data->fb_white); igt_assert(fb_id); cr = igt_get_cairo_ctx(data->drm_fd, &data->fb_white); igt_paint_color_alpha(cr, 0, 0, 64, 64, 1.0, 1.0, 1.0, 1.0); igt_assert(cairo_status(cr) == 0); } static void setup_output(data_t *data) { igt_display_t *display = &data->display; igt_output_t *output; for_each_connected_output(display, output) { drmModeConnectorPtr c = output->config.connector; if (c->connector_type != DRM_MODE_CONNECTOR_eDP || c->connection != DRM_MODE_CONNECTED) continue; igt_output_set_pipe(output, PIPE_ANY); data->crtc_id = output->config.crtc->crtc_id; data->output = output; data->mode = igt_output_get_mode(output); return; } } static void display_init(data_t *data) { igt_display_init(&data->display, data->drm_fd); setup_output(data); } static void display_fini(data_t *data) { igt_display_fini(&data->display); } static void fill_blt(data_t *data, uint32_t handle, unsigned char color) { drm_intel_bo *dst = gem_handle_to_libdrm_bo(data->bufmgr, data->drm_fd, "", handle); struct intel_batchbuffer *batch; batch = intel_batchbuffer_alloc(data->bufmgr, data->devid); igt_assert(batch); COLOR_BLIT_COPY_BATCH_START(0); OUT_BATCH((1 << 24) | (0xf0 << 16) | 0); OUT_BATCH(0); OUT_BATCH(0xfff << 16 | 0xfff); OUT_RELOC(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(color); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); intel_batchbuffer_free(batch); gem_bo_busy(data->drm_fd, handle); } static void scratch_buf_init(struct igt_buf *buf, drm_intel_bo *bo, int size, int stride) { buf->bo = bo; buf->stride = stride; buf->tiling = I915_TILING_X; buf->size = size; } static void fill_render(data_t *data, uint32_t handle, unsigned char color) { drm_intel_bo *src, *dst; struct intel_batchbuffer *batch; struct igt_buf src_buf, dst_buf; const uint8_t buf[4] = { color, color, color, color }; igt_render_copyfunc_t rendercopy = igt_get_render_copyfunc(data->devid); igt_skip_on(!rendercopy); dst = gem_handle_to_libdrm_bo(data->bufmgr, data->drm_fd, "", handle); igt_assert(dst); src = drm_intel_bo_alloc(data->bufmgr, "", data->mod_size, 4096); igt_assert(src); gem_write(data->drm_fd, src->handle, 0, buf, 4); scratch_buf_init(&src_buf, src, data->mod_size, data->mod_stride); scratch_buf_init(&dst_buf, dst, data->mod_size, data->mod_stride); batch = intel_batchbuffer_alloc(data->bufmgr, data->devid); igt_assert(batch); rendercopy(batch, NULL, &src_buf, 0, 0, 0xff, 0xff, &dst_buf, 0, 0); intel_batchbuffer_free(batch); gem_bo_busy(data->drm_fd, handle); } static bool psr_possible(data_t *data) { char buf[512]; igt_debugfs_read("i915_edp_psr_status", buf); return running_with_psr_disabled || strstr(buf, "Sink_Support: yes\n"); } static bool psr_active(data_t *data) { char buf[512]; igt_debugfs_read("i915_edp_psr_status", buf); return running_with_psr_disabled || strstr(buf, "HW Enabled & Active bit: yes\n"); } static bool wait_psr_entry(data_t *data) { int timeout = 5; while (timeout--) { if (psr_active(data)) return true; sleep(1); } return false; } static void get_sink_crc(data_t *data, char *crc) { int ret; FILE *file; if (igt_interactive_debug) return; file = igt_debugfs_fopen("i915_sink_crc_eDP1", "r"); igt_require(file); ret = fscanf(file, "%s\n", crc); igt_require_f(ret > 0, "Sink CRC is unreliable on this machine. Try manual debug with --interactive-debug=no-crc\n"); fclose(file); igt_debug("%s\n", crc); igt_debug_wait_for_keypress("crc"); /* The important value was already taken. * Now give a time for human eyes */ usleep(300000); /* Black screen is always invalid */ igt_assert(strcmp(crc, CRC_BLACK) != 0); } static bool is_green(char *crc) { char color_mask[5] = "FFFF\0"; char rs[5], gs[5], bs[5]; unsigned int rh, gh, bh, mask; int ret; if (igt_interactive_debug) return false; sscanf(color_mask, "%4x", &mask); memcpy(rs, &crc[0], 4); rs[4] = '\0'; ret = sscanf(rs, "%4x", &rh); igt_require(ret > 0); memcpy(gs, &crc[4], 4); gs[4] = '\0'; ret = sscanf(gs, "%4x", &gh); igt_require(ret > 0); memcpy(bs, &crc[8], 4); bs[4] = '\0'; ret = sscanf(bs, "%4x", &bh); igt_require(ret > 0); return ((rh & mask) == 0 && (gh & mask) != 0 && (bh & mask) == 0); } static void assert_or_manual(bool condition, const char *expected) { igt_debug_manual_check("no-crc", expected); igt_assert(igt_interactive_debug || condition); } static void run_test(data_t *data) { uint32_t handle = data->fb_white.gem_handle; igt_plane_t *test_plane; void *ptr; char ref_crc[12]; char crc[12]; const char *expected = ""; /* Confirm that screen became Green */ get_sink_crc(data, ref_crc); assert_or_manual(is_green(ref_crc), "screen GREEN"); /* Confirm screen stays Green after PSR got active */ igt_assert(wait_psr_entry(data)); get_sink_crc(data, ref_crc); assert_or_manual(is_green(ref_crc), "screen GREEN"); /* Setting a secondary fb/plane */ switch (data->test_plane) { case PRIMARY: default: test_plane = data->primary; break; case SPRITE: test_plane = data->sprite; break; case CURSOR: test_plane = data->cursor; break; } igt_plane_set_fb(test_plane, &data->fb_white); igt_display_commit(&data->display); /* Confirm it is not Green anymore */ igt_assert(wait_psr_entry(data)); get_sink_crc(data, ref_crc); if (data->test_plane == PRIMARY) assert_or_manual(!is_green(ref_crc), "screen WHITE"); else assert_or_manual(!is_green(ref_crc), "GREEN background with WHITE box"); switch (data->op) { case PAGE_FLIP: /* Only in use when testing primary plane */ igt_assert(drmModePageFlip(data->drm_fd, data->crtc_id, data->fb_green.fb_id, 0, NULL) == 0); get_sink_crc(data, crc); assert_or_manual(is_green(crc), "screen GREEN"); expected = "still GREEN"; break; case MMAP_GTT: ptr = gem_mmap__gtt(data->drm_fd, handle, data->mod_size, PROT_WRITE); gem_set_domain(data->drm_fd, handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); memset(ptr, 0xcc, data->mod_size); munmap(ptr, data->mod_size); expected = "BLACK or TRANSPARENT mark on top of plane in test"; break; case MMAP_GTT_WAITING: ptr = gem_mmap__gtt(data->drm_fd, handle, data->mod_size, PROT_WRITE); gem_set_domain(data->drm_fd, handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); /* Printing white on white so the screen shouldn't change */ memset(ptr, 0xff, data->mod_size); get_sink_crc(data, crc); if (data->test_plane == PRIMARY) assert_or_manual(strcmp(ref_crc, crc) == 0, "screen WHITE"); else assert_or_manual(strcmp(ref_crc, crc) == 0, "GREEN background with WHITE box"); igt_info("Waiting 10s...\n"); sleep(10); /* Now lets print black to change the screen */ memset(ptr, 0, data->mod_size); munmap(ptr, data->mod_size); expected = "BLACK or TRANSPARENT mark on top of plane in test"; break; case MMAP_CPU: ptr = gem_mmap__cpu(data->drm_fd, handle, 0, data->mod_size, PROT_WRITE); gem_set_domain(data->drm_fd, handle, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU); memset(ptr, 0, data->mod_size); munmap(ptr, data->mod_size); gem_sw_finish(data->drm_fd, handle); expected = "BLACK or TRANSPARENT mark on top of plane in test"; break; case BLT: fill_blt(data, handle, 0); expected = "BLACK or TRANSPARENT mark on top of plane in test"; break; case RENDER: fill_render(data, handle, 0); expected = "BLACK or TRANSPARENT mark on top of plane in test"; break; case PLANE_MOVE: /* Only in use when testing Sprite and Cursor */ igt_plane_set_position(test_plane, 500, 500); igt_display_commit(&data->display); expected = "White box moved to 500x500"; break; case PLANE_ONOFF: /* Only in use when testing Sprite and Cursor */ igt_plane_set_fb(test_plane, NULL); igt_display_commit(&data->display); expected = "screen GREEN"; break; } get_sink_crc(data, crc); assert_or_manual(strcmp(ref_crc, crc) != 0, expected); } static void test_cleanup(data_t *data) { igt_plane_set_fb(data->primary, NULL); if (data->test_plane == SPRITE) igt_plane_set_fb(data->sprite, NULL); if (data->test_plane == CURSOR) igt_plane_set_fb(data->cursor, NULL); igt_display_commit(&data->display); igt_remove_fb(data->drm_fd, &data->fb_green); igt_remove_fb(data->drm_fd, &data->fb_white); } static void setup_test_plane(data_t *data) { uint32_t white_h, white_v; igt_create_color_fb(data->drm_fd, data->mode->hdisplay, data->mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_I915_FORMAT_MOD_X_TILED, 0.0, 1.0, 0.0, &data->fb_green); data->primary = igt_output_get_plane(data->output, IGT_PLANE_PRIMARY); igt_plane_set_fb(data->primary, NULL); white_h = data->mode->hdisplay; white_v = data->mode->vdisplay; /* Ignoring pitch and bpp to avoid changing full screen */ data->mod_size = white_h * white_v; data->mod_stride = white_h * 4; switch (data->test_plane) { case SPRITE: data->sprite = igt_output_get_plane(data->output, IGT_PLANE_2); igt_plane_set_fb(data->sprite, NULL); /* To make it different for human eyes let's make * sprite visible in only one quarter of the primary */ white_h = white_h/2; white_v = white_v/2; case PRIMARY: igt_create_color_fb(data->drm_fd, white_h, white_v, DRM_FORMAT_XRGB8888, LOCAL_I915_FORMAT_MOD_X_TILED, 1.0, 1.0, 1.0, &data->fb_white); break; case CURSOR: data->cursor = igt_output_get_plane(data->output, IGT_PLANE_CURSOR); igt_plane_set_fb(data->cursor, NULL); create_cursor_fb(data); igt_plane_set_position(data->cursor, 0, 0); /* Cursor is 64 x 64, ignoring pitch and bbp again */ data->mod_size = 64 * 64; break; } igt_display_commit(&data->display); igt_plane_set_fb(data->primary, &data->fb_green); igt_display_commit(&data->display); } static void dpms_off_on(data_t data) { kmstest_set_connector_dpms(data.drm_fd, data.output->config.connector, DRM_MODE_DPMS_OFF); sleep(1); kmstest_set_connector_dpms(data.drm_fd, data.output->config.connector, DRM_MODE_DPMS_ON); } static int opt_handler(int opt, int opt_index, void *data) { switch (opt) { case 'n': running_with_psr_disabled = true; break; default: igt_assert(0); } return 0; } int main(int argc, char *argv[]) { const char *help_str = " --no-psr\tRun test without PSR to check the CRC test logic."; static struct option long_options[] = { {"no-psr", 0, 0, 'n'}, { 0, 0, 0, 0 } }; data_t data = {}; enum operations op; igt_subtest_init_parse_opts(&argc, argv, "", long_options, help_str, opt_handler, NULL); igt_skip_on_simulation(); igt_fixture { data.drm_fd = drm_open_driver_master(DRIVER_INTEL); kmstest_set_vt_graphics_mode(); data.devid = intel_get_drm_devid(data.drm_fd); igt_set_module_param_int("enable_psr", running_with_psr_disabled ? 0 : 1); igt_skip_on(!psr_possible(&data)); data.bufmgr = drm_intel_bufmgr_gem_init(data.drm_fd, 4096); igt_assert(data.bufmgr); drm_intel_bufmgr_gem_enable_reuse(data.bufmgr); display_init(&data); } igt_subtest("psr_basic") { setup_test_plane(&data); igt_assert(wait_psr_entry(&data)); } for (op = PAGE_FLIP; op <= RENDER; op++) { igt_subtest_f("primary_%s", op_str(op)) { data.test_plane = PRIMARY; data.op = op; setup_test_plane(&data); igt_assert(wait_psr_entry(&data)); run_test(&data); test_cleanup(&data); } } for (op = MMAP_GTT; op <= PLANE_ONOFF; op++) { igt_subtest_f("sprite_%s", op_str(op)) { data.test_plane = SPRITE; data.op = op; setup_test_plane(&data); igt_assert(wait_psr_entry(&data)); run_test(&data); test_cleanup(&data); } } for (op = MMAP_GTT; op <= PLANE_ONOFF; op++) { igt_subtest_f("cursor_%s", op_str(op)) { data.test_plane = CURSOR; data.op = op; setup_test_plane(&data); igt_assert(wait_psr_entry(&data)); run_test(&data); test_cleanup(&data); } } igt_subtest_f("dpms_off_psr_active") { data.test_plane = PRIMARY; data.op = RENDER; setup_test_plane(&data); igt_assert(wait_psr_entry(&data)); dpms_off_on(data); run_test(&data); test_cleanup(&data); } igt_subtest_f("dpms_off_psr_exit") { data.test_plane = SPRITE; data.op = PLANE_ONOFF; setup_test_plane(&data); dpms_off_on(data); igt_assert(wait_psr_entry(&data)); run_test(&data); test_cleanup(&data); } igt_subtest_f("suspend_psr_active") { data.test_plane = PRIMARY; data.op = PAGE_FLIP; setup_test_plane(&data); igt_assert(wait_psr_entry(&data)); igt_system_suspend_autoresume(); run_test(&data); test_cleanup(&data); } igt_subtest_f("suspend_psr_exit") { data.test_plane = CURSOR; data.op = PLANE_ONOFF; setup_test_plane(&data); igt_system_suspend_autoresume(); igt_assert(wait_psr_entry(&data)); run_test(&data); test_cleanup(&data); } igt_fixture { drm_intel_bufmgr_destroy(data.bufmgr); display_fini(&data); } igt_exit(); } intel-gpu-tools-1.14/tests/gem_ctx_exec.c0000644000175000017500000001460512665336131015376 00000000000000/* * Copyright © 2012 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Ben Widawsky * */ /* * This test covers basic context switch functionality */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include IGT_TEST_DESCRIPTION("Test basic context switch functionality."); /* Copied from gem_exec_nop.c */ static int exec(int fd, uint32_t handle, int ring, int ctx_id) { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 gem_exec; int ret = 0; gem_exec.handle = handle; gem_exec.relocation_count = 0; gem_exec.relocs_ptr = 0; gem_exec.alignment = 0; gem_exec.offset = 0; gem_exec.flags = 0; gem_exec.rsvd1 = 0; gem_exec.rsvd2 = 0; execbuf.buffers_ptr = (uintptr_t)&gem_exec; execbuf.buffer_count = 1; execbuf.batch_start_offset = 0; execbuf.batch_len = 8; execbuf.cliprects_ptr = 0; execbuf.num_cliprects = 0; execbuf.DR1 = 0; execbuf.DR4 = 0; execbuf.flags = ring; i915_execbuffer2_set_context_id(execbuf, ctx_id); execbuf.rsvd2 = 0; ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); return ret; } static void big_exec(int fd, uint32_t handle, int ring) { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 *gem_exec; uint32_t ctx_id1, ctx_id2; int num_buffers = gem_global_aperture_size(fd) / 4096; int i; /* Make sure we only fill half of RAM with gem objects. */ igt_require(intel_get_total_ram_mb() * 1024 / 2 > num_buffers * 4); gem_exec = calloc(num_buffers + 1, sizeof(*gem_exec)); igt_assert(gem_exec); memset(gem_exec, 0, (num_buffers + 1) * sizeof(*gem_exec)); ctx_id1 = gem_context_create(fd); ctx_id2 = gem_context_create(fd); gem_exec[0].handle = handle; execbuf.buffers_ptr = (uintptr_t)gem_exec; execbuf.buffer_count = num_buffers + 1; execbuf.batch_start_offset = 0; execbuf.batch_len = 8; execbuf.cliprects_ptr = 0; execbuf.num_cliprects = 0; execbuf.DR1 = 0; execbuf.DR4 = 0; execbuf.flags = ring; execbuf.rsvd2 = 0; execbuf.buffer_count = 1; i915_execbuffer2_set_context_id(execbuf, ctx_id1); do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); for (i = 0; i < num_buffers; i++) { uint32_t tmp_handle = gem_create(fd, 4096); gem_exec[i].handle = tmp_handle; } gem_exec[i].handle = handle; execbuf.buffer_count = i + 1; /* figure out how many buffers we can exactly fit */ while (drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf) != 0) { i--; gem_close(fd, gem_exec[i].handle); gem_exec[i].handle = handle; execbuf.buffer_count--; igt_info("trying buffer count %i\n", i - 1); } igt_info("reduced buffer count to %i from %i\n", i - 1, num_buffers); /* double check that it works */ do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); i915_execbuffer2_set_context_id(execbuf, ctx_id2); do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); gem_sync(fd, handle); } uint32_t handle; uint32_t batch[2] = {0, MI_BATCH_BUFFER_END}; uint32_t ctx_id, ctx_id2; int fd; igt_main { igt_skip_on_simulation(); igt_fixture { fd = drm_open_driver_render(DRIVER_INTEL); handle = gem_create(fd, 4096); /* check that we can create contexts. */ ctx_id = gem_context_create(fd); gem_context_destroy(fd, ctx_id); gem_write(fd, handle, 0, batch, sizeof(batch)); } igt_subtest("basic") { ctx_id = gem_context_create(fd); igt_assert(exec(fd, handle, I915_EXEC_RENDER, ctx_id) == 0); gem_sync(fd, handle); gem_context_destroy(fd, ctx_id); ctx_id = gem_context_create(fd); igt_assert(exec(fd, handle, I915_EXEC_RENDER, ctx_id) == 0); gem_sync(fd, handle); gem_context_destroy(fd, ctx_id); igt_assert(exec(fd, handle, I915_EXEC_RENDER, ctx_id) < 0); gem_sync(fd, handle); } igt_subtest("eviction") big_exec(fd, handle, I915_EXEC_RENDER); igt_subtest("reset-pin-leak") { int i; /* * Use an explicit context to isolate the test from * any major code changes related to the per-file * default context (eg. if they would be eliminated). */ ctx_id = gem_context_create(fd); /* * Iterate enough times that the kernel will * become unhappy if the ggtt pin count for * the last context is leaked at every reset. */ for (i = 0; i < 20; i++) { igt_hang_ring_t hang = igt_hang_ring(fd, I915_EXEC_RENDER); igt_assert(exec(fd, handle, I915_EXEC_RENDER, 0) == 0); igt_assert(exec(fd, handle, I915_EXEC_RENDER, ctx_id) == 0); igt_post_hang_ring(fd, hang); } gem_context_destroy(fd, ctx_id); } igt_subtest("lrc-lite-restore") { int i, j; /* * Need 2 contexts to be able to replicate a lite restore, * i.e. a running context is resubmitted. */ ctx_id = gem_context_create(fd); ctx_id2 = gem_context_create(fd); /* * Queue several small batchbuffers to be sure we'll send execlists * with 2 valid context, and likely cause a lite restore when ctxB * is resubmitted at the top of the new execlist. */ for (i = 0; i < 20; i++) { for (j = 0; j < 200; j++) { igt_assert(exec(fd, handle, I915_EXEC_RENDER, ctx_id) == 0); igt_assert(exec(fd, handle, I915_EXEC_RENDER, ctx_id2) == 0); } gem_sync(fd, handle); } gem_context_destroy(fd, ctx_id); gem_context_destroy(fd, ctx_id2); } } intel-gpu-tools-1.14/tests/kms_force_connector_basic.c0000644000175000017500000001624112665336131020125 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include "igt.h" IGT_TEST_DESCRIPTION("Check the debugfs force connector/edid features work" " correctly."); #define CHECK_MODE(m, h, w, r) \ igt_assert_eq(m.hdisplay, h); igt_assert_eq(m.vdisplay, w); \ igt_assert_eq(m.vrefresh, r); static void reset_connectors(void) { int drm_fd = 0; drmModeRes *res; drmModeConnector *connector = NULL; drm_fd = drm_open_driver_master(DRIVER_INTEL); res = drmModeGetResources(drm_fd); for (int i = 0; i < res->count_connectors; i++) { connector = drmModeGetConnectorCurrent(drm_fd, res->connectors[i]); kmstest_force_connector(drm_fd, connector, FORCE_CONNECTOR_UNSPECIFIED); kmstest_force_edid(drm_fd, connector, NULL, 0); drmModeFreeConnector(connector); } igt_set_module_param_int("load_detect_test", 0); } static int opt_handler(int opt, int opt_index, void *data) { switch (opt) { case 'r': reset_connectors(); exit(0); break; } return 0; } int main(int argc, char **argv) { /* force the VGA output and test that it worked */ int drm_fd = 0; drmModeRes *res; drmModeConnector *vga_connector = NULL, *temp; int start_n_modes, start_connection; struct option long_opts[] = { {"reset", 0, 0, 'r'}, {0, 0, 0, 0} }; const char *help_str = " --reset\t\tReset all connector force states and edid.\n"; igt_subtest_init_parse_opts(&argc, argv, "", long_opts, help_str, opt_handler, NULL); igt_fixture { drm_fd = drm_open_driver_master(DRIVER_INTEL); res = drmModeGetResources(drm_fd); igt_assert(res); /* find the vga connector */ for (int i = 0; i < res->count_connectors; i++) { vga_connector = drmModeGetConnectorCurrent(drm_fd, res->connectors[i]); if (vga_connector->connector_type == DRM_MODE_CONNECTOR_VGA) { start_n_modes = vga_connector->count_modes; start_connection = vga_connector->connection; break; } drmModeFreeConnector(vga_connector); vga_connector = NULL; } igt_require(vga_connector); igt_skip_on(vga_connector->connection == DRM_MODE_CONNECTED); } igt_subtest("force-load-detect") { /* * disable all outputs to make sure we have a * free crtc available for load detect */ kmstest_set_vt_graphics_mode(); kmstest_unset_all_crtcs(drm_fd, res); igt_set_module_param_int("load_detect_test", 1); /* This can't use drmModeGetConnectorCurrent * because connector probing is the point of this test. */ temp = drmModeGetConnector(drm_fd, vga_connector->connector_id); igt_set_module_param_int("load_detect_test", 0); igt_assert(temp->connection != DRM_MODE_UNKNOWNCONNECTION); drmModeFreeConnector(temp); } igt_subtest("force-connector-state") { igt_display_t display; /* force the connector on and check the reported values */ kmstest_force_connector(drm_fd, vga_connector, FORCE_CONNECTOR_ON); temp = drmModeGetConnectorCurrent(drm_fd, vga_connector->connector_id); igt_assert_eq(temp->connection, DRM_MODE_CONNECTED); igt_assert_lt(0, temp->count_modes); drmModeFreeConnector(temp); /* attempt to use the display */ kmstest_set_vt_graphics_mode(); igt_display_init(&display, drm_fd); igt_display_commit(&display); igt_display_fini(&display); /* force the connector off */ kmstest_force_connector(drm_fd, vga_connector, FORCE_CONNECTOR_OFF); temp = drmModeGetConnectorCurrent(drm_fd, vga_connector->connector_id); igt_assert_eq(temp->connection, DRM_MODE_DISCONNECTED); igt_assert_eq(0, temp->count_modes); drmModeFreeConnector(temp); /* check that the previous state is restored */ kmstest_force_connector(drm_fd, vga_connector, FORCE_CONNECTOR_UNSPECIFIED); temp = drmModeGetConnectorCurrent(drm_fd, vga_connector->connector_id); igt_assert_eq(temp->connection, start_connection); drmModeFreeConnector(temp); } igt_subtest("force-edid") { kmstest_force_connector(drm_fd, vga_connector, FORCE_CONNECTOR_ON); temp = drmModeGetConnectorCurrent(drm_fd, vga_connector->connector_id); drmModeFreeConnector(temp); /* test edid forcing */ kmstest_force_edid(drm_fd, vga_connector, igt_kms_get_base_edid(), EDID_LENGTH); temp = drmModeGetConnectorCurrent(drm_fd, vga_connector->connector_id); igt_debug("num_conn %i\n", temp->count_modes); CHECK_MODE(temp->modes[0], 1920, 1080, 60); /* Don't check non-preferred modes to avoid to tight coupling * with the in-kernel EDID parser. */ drmModeFreeConnector(temp); /* remove edid */ kmstest_force_edid(drm_fd, vga_connector, NULL, 0); kmstest_force_connector(drm_fd, vga_connector, FORCE_CONNECTOR_UNSPECIFIED); temp = drmModeGetConnectorCurrent(drm_fd, vga_connector->connector_id); /* the connector should now have the same number of modes that * it started with */ igt_assert_eq(temp->count_modes, start_n_modes); drmModeFreeConnector(temp); } igt_subtest("prune-stale-modes") { int i; kmstest_force_connector(drm_fd, vga_connector, FORCE_CONNECTOR_ON); /* test pruning of stale modes */ kmstest_force_edid(drm_fd, vga_connector, igt_kms_get_alt_edid(), EDID_LENGTH); temp = drmModeGetConnectorCurrent(drm_fd, vga_connector->connector_id); for (i = 0; i < temp->count_modes; i++) { if (temp->modes[i].hdisplay == 1400 && temp->modes[i].vdisplay == 1050) break; } igt_assert_f(i != temp->count_modes, "1400x1050 not on mode list\n"); drmModeFreeConnector(temp); kmstest_force_edid(drm_fd, vga_connector, igt_kms_get_base_edid(), EDID_LENGTH); temp = drmModeGetConnectorCurrent(drm_fd, vga_connector->connector_id); for (i = 0; i < temp->count_modes; i++) { if (temp->modes[i].hdisplay == 1400 && temp->modes[i].vdisplay == 1050) break; } igt_assert_f(i == temp->count_modes, "1400x1050 not pruned from mode list\n"); drmModeFreeConnector(temp); kmstest_force_edid(drm_fd, vga_connector, NULL, 0); kmstest_force_connector(drm_fd, vga_connector, FORCE_CONNECTOR_UNSPECIFIED); } igt_fixture { drmModeFreeConnector(vga_connector); close(drm_fd); reset_connectors(); } igt_exit(); } intel-gpu-tools-1.14/tests/template.c0000644000175000017500000000507312665336131014556 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * */ #include "igt.h" IGT_TEST_DESCRIPTION("Template test."); /* * Note that test function (and code called by them) should generally not return * a variable indicating success/failure. Instead use the igt_require/igt_assert * macros to skip out of the entire subtest. * * Also, helper functions should only return a status code if the callers have a * real need to differentiate. If the only thing they do is call igt_assert or a * similar macro then it'll result in simpler code when the check is moved * completely into the helper. */ static void test_A(int fd) { } static void test_B(int fd) { } /* * Variables which are written to in igt_fixtures/subtest blocks need to be * allocated outside of the relevant function scope, otherwise gcc will wreak * havoc (since these magic blocks use setjmp/longjmp internally). * * Common practice is to put variables used in the main test function into * global scope, but only right above the main function itself (to avoid leaking * it into other functions). */ int drm_fd; igt_main { igt_fixture { drm_fd = drm_open_driver(DRIVER_INTEL); igt_require(drm_fd >= 0); /* Set up other interesting stuff shared by all tests. */ } igt_subtest("A") test_A(drm_fd); igt_subtest("B") test_B(drm_fd); /* * Note that subtest names can be programatically generated. See the * various uses of igt_subtest_f for a few neat ideas. */ igt_fixture { close(drm_fd); } } intel-gpu-tools-1.14/tests/prime_self_import.c0000644000175000017500000002451112665336131016460 00000000000000/* * Copyright © 2012-2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * */ /* * Testcase: Check whether prime import/export works on the same device * * ... but with different fds, i.e. the wayland usecase. */ #define _GNU_SOURCE #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include "drm.h" IGT_TEST_DESCRIPTION("Check whether prime import/export works on the same" " device... but with different fds."); #define BO_SIZE (16*1024) static char counter; volatile int pls_die = 0; static void check_bo(int fd1, uint32_t handle1, int fd2, uint32_t handle2) { char *ptr1, *ptr2; int i; ptr1 = gem_mmap__gtt(fd1, handle1, BO_SIZE, PROT_READ | PROT_WRITE); ptr2 = gem_mmap__gtt(fd2, handle2, BO_SIZE, PROT_READ | PROT_WRITE); /* check whether it's still our old object first. */ for (i = 0; i < BO_SIZE; i++) { igt_assert(ptr1[i] == counter); igt_assert(ptr2[i] == counter); } counter++; memset(ptr1, counter, BO_SIZE); igt_assert(memcmp(ptr1, ptr2, BO_SIZE) == 0); munmap(ptr1, BO_SIZE); munmap(ptr2, BO_SIZE); } static void test_with_fd_dup(void) { int fd1, fd2; uint32_t handle, handle_import; int dma_buf_fd1, dma_buf_fd2; counter = 0; fd1 = drm_open_driver(DRIVER_INTEL); fd2 = drm_open_driver(DRIVER_INTEL); handle = gem_create(fd1, BO_SIZE); dma_buf_fd1 = prime_handle_to_fd(fd1, handle); gem_close(fd1, handle); dma_buf_fd2 = dup(dma_buf_fd1); close(dma_buf_fd1); handle_import = prime_fd_to_handle(fd2, dma_buf_fd2); check_bo(fd2, handle_import, fd2, handle_import); close(dma_buf_fd2); check_bo(fd2, handle_import, fd2, handle_import); close(fd1); close(fd2); } static void test_with_two_bos(void) { int fd1, fd2; uint32_t handle1, handle2, handle_import; int dma_buf_fd; counter = 0; fd1 = drm_open_driver(DRIVER_INTEL); fd2 = drm_open_driver(DRIVER_INTEL); handle1 = gem_create(fd1, BO_SIZE); handle2 = gem_create(fd1, BO_SIZE); dma_buf_fd = prime_handle_to_fd(fd1, handle1); handle_import = prime_fd_to_handle(fd2, dma_buf_fd); close(dma_buf_fd); gem_close(fd1, handle1); dma_buf_fd = prime_handle_to_fd(fd1, handle2); handle_import = prime_fd_to_handle(fd2, dma_buf_fd); check_bo(fd1, handle2, fd2, handle_import); gem_close(fd1, handle2); close(dma_buf_fd); check_bo(fd2, handle_import, fd2, handle_import); close(fd1); close(fd2); } static void test_with_one_bo_two_files(void) { int fd1, fd2; uint32_t handle_import, handle_open, handle_orig, flink_name; int dma_buf_fd1, dma_buf_fd2; fd1 = drm_open_driver(DRIVER_INTEL); fd2 = drm_open_driver(DRIVER_INTEL); handle_orig = gem_create(fd1, BO_SIZE); dma_buf_fd1 = prime_handle_to_fd(fd1, handle_orig); flink_name = gem_flink(fd1, handle_orig); handle_open = gem_open(fd2, flink_name); dma_buf_fd2 = prime_handle_to_fd(fd2, handle_open); handle_import = prime_fd_to_handle(fd2, dma_buf_fd2); /* dma-buf self importing an flink bo should give the same handle */ igt_assert_eq_u32(handle_import, handle_open); close(fd1); close(fd2); close(dma_buf_fd1); close(dma_buf_fd2); } static void test_with_one_bo(void) { int fd1, fd2; uint32_t handle, handle_import1, handle_import2, handle_selfimport; int dma_buf_fd; fd1 = drm_open_driver(DRIVER_INTEL); fd2 = drm_open_driver(DRIVER_INTEL); handle = gem_create(fd1, BO_SIZE); dma_buf_fd = prime_handle_to_fd(fd1, handle); handle_import1 = prime_fd_to_handle(fd2, dma_buf_fd); check_bo(fd1, handle, fd2, handle_import1); /* reimport should give us the same handle so that userspace can check * whether it has that bo already somewhere. */ handle_import2 = prime_fd_to_handle(fd2, dma_buf_fd); igt_assert_eq_u32(handle_import1, handle_import2); /* Same for re-importing on the exporting fd. */ handle_selfimport = prime_fd_to_handle(fd1, dma_buf_fd); igt_assert_eq_u32(handle, handle_selfimport); /* close dma_buf, check whether nothing disappears. */ close(dma_buf_fd); check_bo(fd1, handle, fd2, handle_import1); gem_close(fd1, handle); check_bo(fd2, handle_import1, fd2, handle_import1); /* re-import into old exporter */ dma_buf_fd = prime_handle_to_fd(fd2, handle_import1); /* but drop all references to the obj in between */ gem_close(fd2, handle_import1); handle = prime_fd_to_handle(fd1, dma_buf_fd); handle_import1 = prime_fd_to_handle(fd2, dma_buf_fd); check_bo(fd1, handle, fd2, handle_import1); /* Completely rip out exporting fd. */ close(fd1); check_bo(fd2, handle_import1, fd2, handle_import1); } static void *thread_fn_reimport_vs_close(void *p) { struct drm_gem_close close_bo; int *fds = p; int fd = fds[0]; int dma_buf_fd = fds[1]; uint32_t handle; while (!pls_die) { handle = prime_fd_to_handle(fd, dma_buf_fd); close_bo.handle = handle; ioctl(fd, DRM_IOCTL_GEM_CLOSE, &close_bo); } return (void *)0; } static void test_reimport_close_race(void) { pthread_t *threads; int r, i, num_threads; int fds[2]; int obj_count; void *status; uint32_t handle; int fake; /* Allocate exit handler fds in here so that we dont screw * up the counts */ fake = drm_open_driver(DRIVER_INTEL); obj_count = igt_get_stable_obj_count(fake); num_threads = sysconf(_SC_NPROCESSORS_ONLN); threads = calloc(num_threads, sizeof(pthread_t)); fds[0] = drm_open_driver(DRIVER_INTEL); handle = gem_create(fds[0], BO_SIZE); fds[1] = prime_handle_to_fd(fds[0], handle); for (i = 0; i < num_threads; i++) { r = pthread_create(&threads[i], NULL, thread_fn_reimport_vs_close, (void *)(uintptr_t)fds); igt_assert_eq(r, 0); } sleep(5); pls_die = 1; for (i = 0; i < num_threads; i++) { pthread_join(threads[i], &status); igt_assert(status == 0); } close(fds[0]); close(fds[1]); obj_count = igt_get_stable_obj_count(fake) - obj_count; igt_info("leaked %i objects\n", obj_count); close(fake); igt_assert_eq(obj_count, 0); } static void *thread_fn_export_vs_close(void *p) { struct drm_prime_handle prime_h2f; struct drm_gem_close close_bo; int fd = (uintptr_t)p; uint32_t handle; while (!pls_die) { /* We want to race gem close against prime export on handle one.*/ handle = gem_create(fd, 4096); if (handle != 1) gem_close(fd, handle); /* raw ioctl since we expect this to fail */ /* WTF: for gem_flink_race I've unconditionally used handle == 1 * here, but with prime it seems to help a _lot_ to use * something more random. */ prime_h2f.handle = 1; prime_h2f.flags = DRM_CLOEXEC; prime_h2f.fd = -1; ioctl(fd, DRM_IOCTL_PRIME_HANDLE_TO_FD, &prime_h2f); close_bo.handle = 1; ioctl(fd, DRM_IOCTL_GEM_CLOSE, &close_bo); close(prime_h2f.fd); } return (void *)0; } static void test_export_close_race(void) { pthread_t *threads; int r, i, num_threads; int fd; int obj_count; void *status; int fake; num_threads = sysconf(_SC_NPROCESSORS_ONLN); threads = calloc(num_threads, sizeof(pthread_t)); /* Allocate exit handler fds in here so that we dont screw * up the counts */ fake = drm_open_driver(DRIVER_INTEL); obj_count = igt_get_stable_obj_count(fake); fd = drm_open_driver(DRIVER_INTEL); for (i = 0; i < num_threads; i++) { r = pthread_create(&threads[i], NULL, thread_fn_export_vs_close, (void *)(uintptr_t)fd); igt_assert_eq(r, 0); } sleep(5); pls_die = 1; for (i = 0; i < num_threads; i++) { pthread_join(threads[i], &status); igt_assert(status == 0); } close(fd); obj_count = igt_get_stable_obj_count(fake) - obj_count; igt_info("leaked %i objects\n", obj_count); close(fake); igt_assert_eq(obj_count, 0); } static void test_llseek_size(void) { int fd, i; uint32_t handle; int dma_buf_fd; counter = 0; fd = drm_open_driver(DRIVER_INTEL); for (i = 0; i < 10; i++) { int bufsz = 4096 << i; handle = gem_create(fd, bufsz); dma_buf_fd = prime_handle_to_fd(fd, handle); gem_close(fd, handle); igt_assert(prime_get_size(dma_buf_fd) == bufsz); close(dma_buf_fd); } close(fd); } static void test_llseek_bad(void) { int fd; uint32_t handle; int dma_buf_fd; counter = 0; fd = drm_open_driver(DRIVER_INTEL); handle = gem_create(fd, BO_SIZE); dma_buf_fd = prime_handle_to_fd(fd, handle); gem_close(fd, handle); igt_require(lseek(dma_buf_fd, 0, SEEK_END) >= 0); igt_assert(lseek(dma_buf_fd, -1, SEEK_END) == -1 && errno == EINVAL); igt_assert(lseek(dma_buf_fd, 1, SEEK_SET) == -1 && errno == EINVAL); igt_assert(lseek(dma_buf_fd, BO_SIZE, SEEK_SET) == -1 && errno == EINVAL); igt_assert(lseek(dma_buf_fd, BO_SIZE + 1, SEEK_SET) == -1 && errno == EINVAL); igt_assert(lseek(dma_buf_fd, BO_SIZE - 1, SEEK_SET) == -1 && errno == EINVAL); close(dma_buf_fd); close(fd); } igt_main { struct { const char *name; void (*fn)(void); } tests[] = { { "basic-with_one_bo", test_with_one_bo }, { "basic-with_one_bo_two_files", test_with_one_bo_two_files }, { "basic-with_two_bos", test_with_two_bos }, { "basic-with_fd_dup", test_with_fd_dup }, { "export-vs-gem_close-race", test_export_close_race }, { "reimport-vs-gem_close-race", test_reimport_close_race }, { "basic-llseek-size", test_llseek_size }, { "basic-llseek-bad", test_llseek_bad }, }; int i; for (i = 0; i < ARRAY_SIZE(tests); i++) { igt_subtest(tests[i].name) tests[i].fn(); } } intel-gpu-tools-1.14/tests/gem_tiled_pread_basic.c0000644000175000017500000001303712665336131017207 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * */ /** @file gem_tiled_pread.c * * This is a test of pread's behavior on tiled objects with respect to the * reported swizzling value. * * The goal is to exercise the slow_bit17_copy path for reading on bit17 * machines, but will also be useful for catching swizzling value bugs on * other systems. */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include "drm.h" IGT_TEST_DESCRIPTION("Test pread behavior on tiled objects with respect to the" " reported swizzling value."); #define WIDTH 512 #define HEIGHT 512 static uint32_t linear[WIDTH * HEIGHT]; #define PAGE_SIZE 4096 static int tile_width; static int tile_height; static int tile_size; static uint32_t create_bo(int fd) { uint32_t handle; uint32_t *data; int i; handle = gem_create(fd, sizeof(linear)); gem_set_tiling(fd, handle, I915_TILING_X, WIDTH * sizeof(uint32_t)); /* Fill the BO with dwords starting at start_val */ data = gem_mmap__gtt(fd, handle, sizeof(linear), PROT_READ | PROT_WRITE); for (i = 0; i < WIDTH*HEIGHT; i++) data[i] = i; munmap(data, sizeof(linear)); return handle; } static int swizzle_bit(int bit, int offset) { return (offset & (1 << bit)) >> (bit - 6); } /* Translate from a swizzled offset in the tiled buffer to the corresponding * value from the original linear buffer. */ static uint32_t calculate_expected(int offset) { int tile_off = offset & (tile_size - 1); int tile_base = offset & -tile_size; int tile_index = tile_base / tile_size; int tiles_per_row = 4*WIDTH / tile_width; /* base x,y values from the tile (page) index. */ int base_y = tile_index / tiles_per_row * tile_height; int base_x = tile_index % tiles_per_row * (tile_width/4); /* x, y offsets within the tile */ int tile_y = tile_off / tile_width; int tile_x = (tile_off % tile_width) / 4; igt_debug("%3d, %3d, %3d,%3d\n", base_x, base_y, tile_x, tile_y); return (base_y + tile_y) * WIDTH + base_x + tile_x; } igt_simple_main { int fd; int i, iter = 100; uint32_t tiling, swizzle; uint32_t handle; uint32_t devid; fd = drm_open_driver(DRIVER_INTEL); handle = create_bo(fd); gem_get_tiling(fd, handle, &tiling, &swizzle); devid = intel_get_drm_devid(fd); if (IS_GEN2(devid)) { tile_height = 16; tile_width = 128; tile_size = 2048; } else { tile_height = 8; tile_width = 512; tile_size = PAGE_SIZE; } /* Read a bunch of random subsets of the data and check that they come * out right. */ for (i = 0; i < iter; i++) { int size = WIDTH * HEIGHT * 4; int offset = (random() % size) & ~3; int len = (random() % size) & ~3; int j; if (len == 0) len = 4; if (offset + len > size) len = size - offset; if (i == 0) { offset = 0; len = size; } gem_read(fd, handle, offset, linear, len); /* Translate from offsets in the read buffer to the swizzled * address that it corresponds to. This is the opposite of * what Mesa does (calculate offset to be read given the linear * offset it's looking for). */ for (j = offset; j < offset + len; j += 4) { uint32_t expected_val, found_val; int swizzled_offset; const char *swizzle_str; switch (swizzle) { case I915_BIT_6_SWIZZLE_NONE: swizzled_offset = j; swizzle_str = "none"; break; case I915_BIT_6_SWIZZLE_9: swizzled_offset = j ^ swizzle_bit(9, j); swizzle_str = "bit9"; break; case I915_BIT_6_SWIZZLE_9_10: swizzled_offset = j ^ swizzle_bit(9, j) ^ swizzle_bit(10, j); swizzle_str = "bit9^10"; break; case I915_BIT_6_SWIZZLE_9_11: swizzled_offset = j ^ swizzle_bit(9, j) ^ swizzle_bit(11, j); swizzle_str = "bit9^11"; break; case I915_BIT_6_SWIZZLE_9_10_11: swizzled_offset = j ^ swizzle_bit(9, j) ^ swizzle_bit(10, j) ^ swizzle_bit(11, j); swizzle_str = "bit9^10^11"; break; default: igt_assert_f(0, "Bad swizzle bits; %d\n", swizzle); } expected_val = calculate_expected(swizzled_offset); found_val = linear[(j - offset) / 4]; igt_assert_f(expected_val == found_val, "Bad read [%d]: %d instead of %d at 0x%08x " "for read from 0x%08x to 0x%08x, swizzle=%s\n", i, found_val, expected_val, j, offset, offset + len, swizzle_str); } } close(fd); } intel-gpu-tools-1.14/tests/gem_softpin.c0000644000175000017500000003355512665336131015263 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Vinay Belgaumkar * Thomas Daniel * */ #include "igt.h" #define EXEC_OBJECT_PINNED (1<<4) #define EXEC_OBJECT_SUPPORTS_48B_ADDRESS (1<<3) /* gen8_canonical_addr * Used to convert any address into canonical form, i.e. [63:48] == [47]. * Based on kernel's sign_extend64 implementation. * @address - a virtual address */ #define GEN8_HIGH_ADDRESS_BIT 47 static uint64_t gen8_canonical_addr(uint64_t address) { __u8 shift = 63 - GEN8_HIGH_ADDRESS_BIT; return (__s64)(address << shift) >> shift; } static void test_invalid(int fd) { const uint32_t bbe = MI_BATCH_BUFFER_END; struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 object; memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)&object; execbuf.buffer_count = 1; memset(&object, 0, sizeof(object)); object.handle = gem_create(fd, 2*4096); object.flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS | EXEC_OBJECT_PINNED; gem_write(fd, object.handle, 0, &bbe, sizeof(bbe)); /* Check invalid alignment */ object.offset = 4096; object.alignment = 64*1024; igt_assert_eq(__gem_execbuf(fd, &execbuf), -EINVAL); object.alignment = 0; /* Check wraparound */ object.offset = -4096ULL; igt_assert_eq(__gem_execbuf(fd, &execbuf), -EINVAL); /* Check beyond bounds of aperture */ object.offset = gem_aperture_size(fd) - 4096; object.offset = gen8_canonical_addr(object.offset); igt_assert_eq(__gem_execbuf(fd, &execbuf), -EINVAL); /* Check gen8 canonical addressing */ if (gem_aperture_size(fd) > 1ull< 1ull<<32) { object.flags = EXEC_OBJECT_PINNED; object.offset = 1ull<<32; igt_assert_eq(__gem_execbuf(fd, &execbuf), -EINVAL); object.offset = gen8_canonical_addr(object.offset); object.flags |= EXEC_OBJECT_SUPPORTS_48B_ADDRESS; igt_assert_eq(__gem_execbuf(fd, &execbuf), 0); } } static void test_softpin(int fd) { const uint32_t size = 1024 * 1024; const uint32_t bbe = MI_BATCH_BUFFER_END; struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 object; uint64_t offset, end; uint32_t last_handle; int loop; last_handle = gem_create(fd, size); memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)&object; execbuf.buffer_count = 1; for (loop = 0; loop < 1024; loop++) { memset(&object, 0, sizeof(object)); object.handle = gem_create(fd, 2*size); gem_write(fd, object.handle, 0, &bbe, sizeof(bbe)); /* Find a hole */ gem_execbuf(fd, &execbuf); gem_close(fd, object.handle); gem_close(fd, last_handle); igt_debug("Made a 2 MiB hole: %08llx\n", object.offset); object.handle = gem_create(fd, size); gem_write(fd, object.handle, 0, &bbe, sizeof(bbe)); object.flags |= EXEC_OBJECT_PINNED; end = object.offset + size; for (offset = object.offset; offset <= end; offset += 4096) { object.offset = offset; gem_execbuf(fd, &execbuf); igt_assert_eq_u64(object.offset, offset); } last_handle = object.handle; } } static void test_overlap(int fd) { const uint32_t size = 1024 * 1024; const uint32_t bbe = MI_BATCH_BUFFER_END; struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 object[2]; uint64_t offset; uint32_t handle; handle = gem_create(fd, 3*size); gem_write(fd, handle, 0, &bbe, sizeof(bbe)); memset(object, 0, sizeof(object)); object[0].handle = handle; /* Find a hole */ memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)object; execbuf.buffer_count = 1; gem_execbuf(fd, &execbuf); igt_debug("Made a 3x1 MiB hole: %08llx\n", object[0].offset); object[0].handle = gem_create(fd, size); object[0].offset += size; object[0].flags |= EXEC_OBJECT_PINNED; object[1].handle = gem_create(fd, size); object[1].flags |= EXEC_OBJECT_PINNED; gem_write(fd, object[1].handle, 0, &bbe, sizeof(bbe)); execbuf.buffer_count = 2; /* Check that we fit into our hole */ object[1].offset = object[0].offset - size; gem_execbuf(fd, &execbuf); igt_assert_eq_u64(object[1].offset + size, object[0].offset); object[1].offset = object[0].offset + size; gem_execbuf(fd, &execbuf); igt_assert_eq_u64(object[1].offset - size, object[0].offset); /* Try all possible page-aligned overlaps */ for (offset = object[0].offset - size + 4096; offset < object[0].offset + size; offset += 4096) { object[1].offset = offset; igt_debug("[0]=[%08llx - %08llx] [1]=[%08llx - %08llx]\n", (long long)object[0].offset, (long long)object[0].offset + size, (long long)object[1].offset, (long long)object[1].offset + size); igt_assert_eq(__gem_execbuf(fd, &execbuf), -EINVAL); igt_assert_eq_u64(object[1].offset, offset); } gem_close(fd, object[1].handle); gem_close(fd, object[0].handle); gem_close(fd, handle); } static uint64_t busy_batch(int fd) { const int gen = intel_gen(intel_get_drm_devid(fd)); const int has_64bit_reloc = gen >= 8; struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 object[2]; uint32_t *map; int factor = 10; int i = 0; memset(object, 0, sizeof(object)); object[0].handle = gem_create(fd, 1024*1024); object[1].handle = gem_create(fd, 4096); map = gem_mmap__cpu(fd, object[1].handle, 0, 4096, PROT_WRITE); gem_set_domain(fd, object[1].handle, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU); *map = MI_BATCH_BUFFER_END; memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)object; execbuf.buffer_count = 2; if (gen >= 6) execbuf.flags = I915_EXEC_BLT; gem_execbuf(fd, &execbuf); igt_debug("Active offsets = [%08llx, %08llx]\n", object[0].offset, object[1].offset); #define COPY_BLT_CMD (2<<29|0x53<<22|0x6) #define BLT_WRITE_ALPHA (1<<21) #define BLT_WRITE_RGB (1<<20) gem_set_domain(fd, object[1].handle, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU); while (factor--) { /* XY_SRC_COPY */ map[i++] = COPY_BLT_CMD | BLT_WRITE_ALPHA | BLT_WRITE_RGB; if (has_64bit_reloc) map[i-1] += 2; map[i++] = 0xcc << 16 | 1 << 25 | 1 << 24 | (4*1024); map[i++] = 0; map[i++] = 256 << 16 | 1024; map[i++] = object[0].offset; if (has_64bit_reloc) map[i++] = object[0].offset >> 32; map[i++] = 0; map[i++] = 4096; map[i++] = object[0].offset; if (has_64bit_reloc) map[i++] = object[0].offset >> 32; } map[i++] = MI_BATCH_BUFFER_END; munmap(map, 4096); object[0].flags = EXEC_OBJECT_PINNED | EXEC_OBJECT_WRITE; object[1].flags = EXEC_OBJECT_PINNED; gem_execbuf(fd, &execbuf); gem_close(fd, object[0].handle); gem_close(fd, object[1].handle); return object[1].offset; } static void test_evict_active(int fd) { const uint32_t bbe = MI_BATCH_BUFFER_END; struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 object; uint64_t expected; memset(&object, 0, sizeof(object)); object.handle = gem_create(fd, 4096); gem_write(fd, object.handle, 0, &bbe, sizeof(bbe)); expected = busy_batch(fd); object.offset = expected; object.flags = EXEC_OBJECT_PINNED; /* Replace the active batch with ourselves, forcing an eviction */ memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)&object; execbuf.buffer_count = 1; gem_execbuf(fd, &execbuf); gem_close(fd, object.handle); igt_assert_eq_u64(object.offset, expected); } static void test_evict_snoop(int fd) { const uint32_t bbe = MI_BATCH_BUFFER_END; struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 object[2]; uint64_t hole; igt_require(!gem_has_llc(fd)); igt_require(!gem_uses_ppgtt(fd)); memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)object; execbuf.buffer_count = 1; /* Find a hole */ memset(object, 0, sizeof(object)); object[0].handle = gem_create(fd, 3*4096); gem_write(fd, object[0].handle, 0, &bbe, sizeof(bbe)); gem_execbuf(fd, &execbuf); gem_close(fd, object[0].handle); hole = object[0].offset; /* Create a snoop + uncached pair */ object[0].handle = gem_create(fd, 4096); object[0].flags = EXEC_OBJECT_PINNED; gem_set_caching(fd, object[0].handle, 1); object[1].handle = gem_create(fd, 4096); object[1].flags = EXEC_OBJECT_PINNED; gem_write(fd, object[1].handle, 4096-sizeof(bbe), &bbe, sizeof(bbe)); execbuf.buffer_count = 2; /* snoop abutting before uncached -> error */ object[0].offset = hole; object[1].offset = hole + 4096; igt_assert_eq(__gem_execbuf(fd, &execbuf), -EINVAL); /* snoop abutting after uncached -> error */ object[0].offset = hole + 4096; object[1].offset = hole; igt_assert_eq(__gem_execbuf(fd, &execbuf), -EINVAL); /* with gap -> okay */ object[0].offset = hole + 2*4096; object[1].offset = hole; igt_assert_eq(__gem_execbuf(fd, &execbuf), 0); /* And we should force the snoop away (or the GPU may hang) */ object[0].flags = 0; object[1].offset = hole + 4096; igt_assert_eq(__gem_execbuf(fd, &execbuf), 0); igt_assert(object[0].offset != hole); igt_assert(object[0].offset != hole + 2*4096); gem_close(fd, object[0].handle); gem_close(fd, object[1].handle); } static void test_evict_hang(int fd) { const uint32_t bbe = MI_BATCH_BUFFER_END; struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 object; uint64_t expected; igt_hang_ring_t hang; memset(&object, 0, sizeof(object)); object.handle = gem_create(fd, 4096); gem_write(fd, object.handle, 0, &bbe, sizeof(bbe)); hang = igt_hang_ctx(fd, 0, 0, 0, (uint64_t *)&expected); object.offset = expected; object.flags = EXEC_OBJECT_PINNED; /* Replace the hanging batch with ourselves, forcing an eviction */ memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)&object; execbuf.buffer_count = 1; gem_execbuf(fd, &execbuf); gem_close(fd, object.handle); igt_assert_eq_u64(object.offset, expected); igt_post_hang_ring(fd, hang); } static void xchg_offset(void *array, unsigned i, unsigned j) { struct drm_i915_gem_exec_object2 *object = array; uint64_t tmp = object[i].offset; object[i].offset = object[j].offset; object[j].offset = tmp; } static void test_noreloc(int fd) { const int gen = intel_gen(intel_get_drm_devid(fd)); const uint32_t size = 4096; const uint32_t bbe = MI_BATCH_BUFFER_END; struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 object[257]; uint64_t offset; uint32_t handle; uint32_t *batch, *b; int i, loop; handle = gem_create(fd, (ARRAY_SIZE(object)+1)*size); gem_write(fd, handle, 0, &bbe, sizeof(bbe)); memset(object, 0, sizeof(object)); object[0].handle = handle; /* Find a hole */ memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)object; execbuf.buffer_count = 1; if (gen < 6) execbuf.flags |= I915_EXEC_SECURE; gem_execbuf(fd, &execbuf); gem_close(fd, object[0].handle); igt_debug("Made a %dx%d KiB hole: %08llx\n", (int)ARRAY_SIZE(object), size/1024, object[0].offset); offset = object[0].offset; for (i = 0; i < ARRAY_SIZE(object) - 1; i++) { object[i].handle = gem_create(fd, size); object[i].offset = offset + i*size; object[i].flags = EXEC_OBJECT_PINNED | EXEC_OBJECT_WRITE; } object[i].handle = gem_create(fd, 2*size); object[i].offset = offset + i*size; object[i].flags = EXEC_OBJECT_PINNED; b = batch = gem_mmap__cpu(fd, object[i].handle, 0, 2*size, PROT_WRITE); gem_set_domain(fd, object[i].handle, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU); for (i = 0; i < ARRAY_SIZE(object) - 1; i++) { *b++ = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0); if (gen >= 8) { *b++ = object[i].offset; *b++ = object[i].offset >> 32; } else if (gen >= 4) { *b++ = 0; *b++ = object[i].offset; } else { b[-1]--; *b++ = object[i].offset; } *b++ = i; } *b++ = MI_BATCH_BUFFER_END; igt_assert(b - batch <= 2*size/sizeof(uint32_t)); munmap(batch, size); execbuf.buffer_count = ARRAY_SIZE(object); for (loop = 0; loop < 1024; loop++) { igt_permute_array(object, ARRAY_SIZE(object)-1, xchg_offset); gem_execbuf(fd, &execbuf); for (i = 0; i < ARRAY_SIZE(object) - 1; i++) { uint32_t val; gem_read(fd, object[i].handle, 0, &val, sizeof(val)); igt_assert_eq(val, (object[i].offset - offset)/size); } } for (i = 0; i < ARRAY_SIZE(object); i++) gem_close(fd, object[i].handle); } igt_main { int fd = -1; igt_skip_on_simulation(); igt_fixture { fd = drm_open_driver_master(DRIVER_INTEL); igt_require(gem_has_softpin(fd)); } igt_subtest("invalid") test_invalid(fd); igt_subtest("softpin") test_softpin(fd); igt_subtest("overlap") test_overlap(fd); igt_subtest("noreloc") test_noreloc(fd); igt_subtest("evict-active") test_evict_active(fd); igt_subtest("evict-snoop") test_evict_snoop(fd); igt_subtest("evict-hang") test_evict_hang(fd); igt_fixture close(fd); } intel-gpu-tools-1.14/tests/gem_exec_nop.c0000644000175000017500000000576112665336131015377 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include #include "drm.h" #define LOCAL_I915_EXEC_NO_RELOC (1<<11) #define LOCAL_I915_EXEC_HANDLE_LUT (1<<12) #define LOCAL_I915_EXEC_VEBOX (4<<0) const uint32_t batch[2] = {MI_BATCH_BUFFER_END}; int device; static void loop(int fd, uint32_t handle, unsigned ring_id, const char *ring_name) { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 gem_exec[1]; int count; gem_require_ring(fd, ring_id); memset(&gem_exec, 0, sizeof(gem_exec)); gem_exec[0].handle = handle; memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)gem_exec; execbuf.buffer_count = 1; execbuf.flags = ring_id; execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT; execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC; if (drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf)) { execbuf.flags = ring_id; do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); } gem_sync(fd, handle); for (count = 1; count <= SLOW_QUICK(1<<17, 1<<4); count <<= 1) { int loops = count; gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, 0); while (loops--) do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); gem_sync(fd, handle); } } igt_main { const struct intel_execution_engine *e; uint32_t handle = 0; igt_fixture { device = drm_open_driver(DRIVER_INTEL); handle = gem_create(device, 4096); gem_write(device, handle, 0, batch, sizeof(batch)); } for (e = intel_execution_engines; e->name; e++) igt_subtest_f("%s", e->name) loop(device, handle, e->exec_id | e->flags, e->name); igt_fixture { gem_close(device, handle); close(device); } } intel-gpu-tools-1.14/tests/kms_setmode.c0000644000175000017500000004263512665336131015262 00000000000000/* * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Imre Deak */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "igt.h" #include #include #include #include #include #include #include "intel_bufmgr.h" #define MAX_CONNECTORS 10 #define MAX_CRTCS 3 /* max combinations with repetitions */ #define MAX_COMBINATION_COUNT \ (MAX_CONNECTORS * MAX_CONNECTORS * MAX_CONNECTORS) #define MAX_COMBINATION_ELEMS MAX_CRTCS static int drm_fd; static drmModeRes *drm_resources; static int filter_test_id; static bool dry_run; const drmModeModeInfo mode_640_480 = { .name = "640x480", .vrefresh = 60, .clock = 25200, .hdisplay = 640, .hsync_start = 656, .hsync_end = 752, .htotal = 800, .vdisplay = 480, .vsync_start = 490, .vsync_end = 492, .vtotal = 525, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, }; enum test_flags { TEST_INVALID = 0x01, TEST_CLONE = 0x02, TEST_SINGLE_CRTC_CLONE = 0x04, TEST_EXCLUSIVE_CRTC_CLONE = 0x08, }; struct test_config { const char *name; enum test_flags flags; drmModeRes *resources; }; struct connector_config { drmModeConnector *connector; int crtc_idx; bool connected; drmModeModeInfo default_mode; }; struct crtc_config { int crtc_idx; int crtc_id; int pipe_id; int connector_count; struct connector_config *cconfs; struct igt_fb fb_info; drmModeModeInfo mode; }; static bool drm_mode_equal(drmModeModeInfo *m1, drmModeModeInfo *m2) { #define COMP(x) do { if (m1->x != m2->x) return false; } while (0) COMP(vrefresh); COMP(clock); COMP(hdisplay); COMP(hsync_start); COMP(hsync_end); COMP(htotal); COMP(vdisplay); COMP(vsync_start); COMP(vsync_end); COMP(vtotal); COMP(flags); return true; } static bool connector_supports_mode(drmModeConnector *connector, drmModeModeInfo *mode) { int i; for (i = 0; i < connector->count_modes; i++) if (drm_mode_equal(&connector->modes[i], mode)) return true; return false; } static bool crtc_supports_mode(struct crtc_config *crtc, drmModeModeInfo *mode) { int i; for (i = 0; i < crtc->connector_count; i++) { if (!connector_supports_mode(crtc->cconfs[i].connector, mode)) return false; } return true; } static int paint_fb(struct igt_fb *fb, const char *test_name, const char **crtc_str, int crtc_count, int current_crtc_idx) { double x, y; cairo_t *cr; int i; cr = igt_get_cairo_ctx(drm_fd, fb); cairo_move_to(cr, fb->width / 2, fb->height / 2); cairo_set_font_size(cr, 24); igt_cairo_printf_line(cr, align_hcenter, 40, "%s", test_name); cairo_get_current_point(cr, &x, &y); cairo_move_to(cr, 60, y); for (i = 0; i < crtc_count; i++) { if (i == current_crtc_idx) { cairo_get_current_point(cr, &x, &y); cairo_move_to(cr, x - 20, y); igt_cairo_printf_line(cr, align_right, 20, "X"); cairo_move_to(cr, x, y); } igt_cairo_printf_line(cr, align_left, 20, "%s", crtc_str[i]); } cairo_destroy(cr); return 0; } static void create_fb_for_crtc(struct crtc_config *crtc, struct igt_fb *fb_info) { int bpp; int depth; int fb_id; bpp = 32; depth = 24; fb_id = igt_create_pattern_fb(drm_fd, crtc->mode.hdisplay, crtc->mode.vdisplay, igt_bpp_depth_to_drm_format(bpp, depth), LOCAL_DRM_FORMAT_MOD_NONE, fb_info); igt_assert_lt(0, fb_id); } static void get_mode_for_crtc(struct crtc_config *crtc, drmModeModeInfo *mode_ret) { drmModeModeInfo mode; int i; /* * First try to select a default mode that is supported by all * connectors. */ for (i = 0; i < crtc->connector_count; i++) { mode = crtc->cconfs[i].default_mode; if (crtc_supports_mode(crtc, &mode)) goto found; } /* * Then just fall back to find any that is supported by all * connectors. */ for (i = 0; i < crtc->cconfs[0].connector->count_modes; i++) { mode = crtc->cconfs[0].connector->modes[i]; if (crtc_supports_mode(crtc, &mode)) goto found; } /* * If none is found then just pick the default mode of the first * connector and hope the other connectors can support it by scaling * etc. */ mode = crtc->cconfs[0].default_mode; found: *mode_ret = mode; } static int get_encoder_idx(drmModeRes *resources, drmModeEncoder *encoder) { int i; for (i = 0; i < resources->count_encoders; i++) if (resources->encoders[i] == encoder->encoder_id) return i; igt_assert(0); } static void get_crtc_config_str(struct crtc_config *crtc, char *buf, size_t buf_size) { int pos; int i; pos = snprintf(buf, buf_size, "CRTC[%d] [Pipe %s] Mode: %s@%dHz Connectors: ", crtc->crtc_id, kmstest_pipe_name(crtc->pipe_id), crtc->mode.name, crtc->mode.vrefresh); if (pos > buf_size) return; for (i = 0; i < crtc->connector_count; i++) { drmModeConnector *connector = crtc->cconfs[i].connector; pos += snprintf(&buf[pos], buf_size - pos, "%s%s-%d[%d]%s", i ? ", " : "", kmstest_connector_type_str(connector->connector_type), connector->connector_type_id, connector->connector_id, crtc->cconfs[i].connected ? "" : " (NC)"); if (pos > buf_size) return; } } static void setup_crtcs(drmModeRes *resources, struct connector_config *cconf, int connector_count, struct crtc_config *crtcs, int *crtc_count_ret, bool *config_valid_ret) { struct crtc_config *crtc; int crtc_count; bool config_valid; int i; int encoder_usage_count[resources->count_encoders]; i = 0; crtc_count = 0; crtc = crtcs; config_valid = true; while (i < connector_count) { drmModeCrtc *drm_crtc; unsigned long encoder_mask; int j; igt_assert_lt(crtc_count, MAX_CRTCS); crtc->crtc_idx = cconf[i].crtc_idx; drm_crtc = drmModeGetCrtc(drm_fd, resources->crtcs[crtc->crtc_idx]); crtc->crtc_id = drm_crtc->crtc_id; drmModeFreeCrtc(drm_crtc); crtc->pipe_id = kmstest_get_pipe_from_crtc_id(drm_fd, crtc->crtc_id); crtc->connector_count = 1; for (j = i + 1; j < connector_count; j++) if (cconf[j].crtc_idx == crtc->crtc_idx) crtc->connector_count++; crtc->cconfs = malloc(sizeof(*crtc->cconfs) * crtc->connector_count); igt_assert(crtc->cconfs); encoder_mask = 0; for (j = 0; j < crtc->connector_count; j++) { drmModeConnector *connector; drmModeEncoder *encoder; crtc->cconfs[j] = cconf[i + j]; connector = cconf[i + j].connector; /* Intel connectors have only a single encoder */ if (connector->count_encoders == 1) { encoder = drmModeGetEncoder(drm_fd, connector->encoders[0]); } else { igt_assert_eq(connector->connector_type, DRM_MODE_CONNECTOR_DisplayPort); igt_assert(connector->count_encoders >= crtc->crtc_idx); encoder = drmModeGetEncoder(drm_fd, connector->encoders[crtc_count]); } igt_assert(encoder); config_valid &= !!(encoder->possible_crtcs & (1 << crtc->crtc_idx)); encoder_mask |= 1 << get_encoder_idx(resources, encoder); config_valid &= !(encoder_mask & ~encoder->possible_clones); drmModeFreeEncoder(encoder); } get_mode_for_crtc(crtc, &crtc->mode); create_fb_for_crtc(crtc, &crtc->fb_info); i += crtc->connector_count; crtc_count++; crtc++; } memset(encoder_usage_count, 0, sizeof(encoder_usage_count)); for (i = 0; i < connector_count; i++) { drmModeConnector *connector = cconf[i].connector; drmModeEncoder *encoder; int idx = 0; /* DP MST configs are presumed valid */ if (connector->count_encoders > 1) idx = cconf[i].crtc_idx; encoder = drmModeGetEncoder(drm_fd, connector->encoders[idx]); encoder_usage_count[get_encoder_idx(resources, encoder)]++; drmModeFreeEncoder(encoder); } for (i = 0; i < resources->count_encoders; i++) if (encoder_usage_count[i] > 1) config_valid = false; *crtc_count_ret = crtc_count; *config_valid_ret = config_valid; } static void cleanup_crtcs(struct crtc_config *crtcs, int crtc_count) { int i; for (i = 0; i < crtc_count; i++) { free(crtcs[i].cconfs); } } static uint32_t *get_connector_ids(struct crtc_config *crtc) { uint32_t *ids; int i; ids = malloc(sizeof(*ids) * crtc->connector_count); igt_assert(ids); for (i = 0; i < crtc->connector_count; i++) ids[i] = crtc->cconfs[i].connector->connector_id; return ids; } static void test_crtc_config(const struct test_config *tconf, struct crtc_config *crtcs, int crtc_count) { char str_buf[MAX_CRTCS][1024]; const char *crtc_strs[MAX_CRTCS]; struct crtc_config *crtc; static int test_id; bool config_failed = false; bool connector_connected = false; int ret = 0; int i; test_id++; if (filter_test_id && filter_test_id != test_id) return; igt_info(" Test id#%d CRTC count %d\n", test_id, crtc_count); for (i = 0; i < crtc_count; i++) { get_crtc_config_str(&crtcs[i], str_buf[i], sizeof(str_buf[i])); crtc_strs[i] = &str_buf[i][0]; } if (dry_run) { for (i = 0; i < crtc_count; i++) igt_info(" %s\n", crtc_strs[i]); return; } for (i = 0; i < crtc_count; i++) { uint32_t *ids; int j; crtc = &crtcs[i]; igt_info(" %s\n", crtc_strs[i]); create_fb_for_crtc(crtc, &crtc->fb_info); paint_fb(&crtc->fb_info, tconf->name, crtc_strs, crtc_count, i); ids = get_connector_ids(crtc); ret = drmModeSetCrtc(drm_fd, crtc->crtc_id, crtc->fb_info.fb_id, 0, 0, ids, crtc->connector_count, &crtc->mode); free(ids); if (ret < 0) { igt_assert_eq(errno, EINVAL); config_failed = true; } for (j = 0; j < crtc->connector_count; j++) connector_connected |= crtc->cconfs[j].connected; } igt_assert(config_failed == !!(tconf->flags & TEST_INVALID)); if (ret == 0 && connector_connected && !(tconf->flags & TEST_INVALID)) sleep(5); for (i = 0; i < crtc_count; i++) { if (crtcs[i].fb_info.fb_id) { drmModeSetCrtc(drm_fd, crtcs[i].crtc_id, 0, 0, 0, NULL, 0, NULL); drmModeRmFB(drm_fd, crtcs[i].fb_info.fb_id); crtcs[i].fb_info.fb_id = 0; } } return; } static void test_one_combination(const struct test_config *tconf, struct connector_config *cconfs, int connector_count) { struct crtc_config crtcs[MAX_CRTCS]; int crtc_count; bool config_valid; setup_crtcs(tconf->resources, cconfs, connector_count, crtcs, &crtc_count, &config_valid); if (config_valid == !(tconf->flags & TEST_INVALID)) test_crtc_config(tconf, crtcs, crtc_count); cleanup_crtcs(crtcs, crtc_count); } static int assign_crtc_to_connectors(const struct test_config *tconf, int *crtc_idxs, int connector_count, struct connector_config *cconfs) { unsigned long crtc_idx_mask; int i; crtc_idx_mask = 0; for (i = 0; i < connector_count; i++) { int crtc_idx = crtc_idxs[i]; if ((tconf->flags & TEST_SINGLE_CRTC_CLONE) && crtc_idx_mask & ~(1 << crtc_idx)) return -1; if ((tconf->flags & TEST_EXCLUSIVE_CRTC_CLONE) && crtc_idx_mask & (1 << crtc_idx)) return -1; crtc_idx_mask |= 1 << crtc_idx; cconfs[i].crtc_idx = crtc_idx; } return 0; } static int get_one_connector(drmModeRes *resources, int connector_id, struct connector_config *cconf) { drmModeConnector *connector; drmModeModeInfo mode; connector = drmModeGetConnectorCurrent(drm_fd, connector_id); igt_assert(connector); cconf->connector = connector; cconf->connected = connector->connection == DRM_MODE_CONNECTED; /* * For DP/eDP we need a connected sink, since mode setting depends * on successful link training and retrieved DPCD parameters. */ switch (connector->connector_type) { case DRM_MODE_CONNECTOR_DisplayPort: case DRM_MODE_CONNECTOR_eDP: if (!cconf->connected) { drmModeFreeConnector(connector); return -1; } } if (cconf->connected) { if (!kmstest_get_connector_default_mode(drm_fd, connector, &mode)) mode = mode_640_480; } else { mode = mode_640_480; } cconf->default_mode = mode; return 0; } static int get_connectors(drmModeRes *resources, int *connector_idxs, int connector_count, struct connector_config *cconfs) { int i; for (i = 0; i < connector_count; i++) { int connector_idx; int connector_id; connector_idx = connector_idxs[i]; igt_assert_lt(connector_idx, resources->count_connectors); connector_id = resources->connectors[connector_idx]; if (get_one_connector(resources, connector_id, &cconfs[i]) < 0) goto err; } return 0; err: while (i--) drmModeFreeConnector(cconfs[i].connector); return -1; } static void free_connectors(struct connector_config *cconfs, int connector_count) { int i; for (i = 0; i < connector_count; i++) drmModeFreeConnector(cconfs[i].connector); } struct combination { int elems[MAX_COMBINATION_ELEMS]; }; struct combination_set { int count; struct combination items[MAX_COMBINATION_COUNT]; }; /* * Get all possible selection of k elements from n elements with or without * repetitions. */ static void iterate_combinations(int n, int k, bool allow_repetitions, int depth, int base, struct combination *comb, struct combination_set *set) { int v; if (!k) { igt_assert(set->count < ARRAY_SIZE(set->items)); set->items[set->count++] = *comb; return; } for (v = base; v < n; v++) { comb->elems[depth] = v; iterate_combinations(n, k - 1, allow_repetitions, depth + 1, allow_repetitions ? 0 : v + 1, comb, set); } } static void get_combinations(int n, int k, bool allow_repetitions, struct combination_set *set) { struct combination comb; igt_assert(k <= ARRAY_SIZE(set->items[0].elems)); set->count = 0; iterate_combinations(n, k, allow_repetitions, 0, 0, &comb, set); } static void test_combinations(const struct test_config *tconf, int connector_count) { struct combination_set connector_combs; struct combination_set crtc_combs; struct connector_config *cconfs; int i; get_combinations(tconf->resources->count_connectors, connector_count, false, &connector_combs); get_combinations(tconf->resources->count_crtcs, connector_count, true, &crtc_combs); igt_info("Testing: %s %d connector combinations\n", tconf->name, connector_count); for (i = 0; i < connector_combs.count; i++) { int *connector_idxs; int ret; int j; cconfs = malloc(sizeof(*cconfs) * connector_count); igt_assert(cconfs); connector_idxs = &connector_combs.items[i].elems[0]; ret = get_connectors(tconf->resources, connector_idxs, connector_count, cconfs); if (ret < 0) goto free_cconfs; for (j = 0; j < crtc_combs.count; j++) { int *crtc_idxs = &crtc_combs.items[j].elems[0]; ret = assign_crtc_to_connectors(tconf, crtc_idxs, connector_count, cconfs); if (ret < 0) continue; test_one_combination(tconf, cconfs, connector_count); } free_connectors(cconfs, connector_count); free_cconfs: free(cconfs); } } static void run_test(const struct test_config *tconf) { int connector_num; connector_num = tconf->flags & TEST_CLONE ? 2 : 1; for (; connector_num <= tconf->resources->count_crtcs; connector_num++) test_combinations(tconf, connector_num); } static int opt_handler(int opt, int opt_index, void *data) { switch (opt) { case 'd': dry_run = true; break; case 't': filter_test_id = atoi(optarg); break; default: igt_assert(0); } return 0; } int main(int argc, char **argv) { const struct { enum test_flags flags; const char *name; } tests[] = { { TEST_CLONE | TEST_SINGLE_CRTC_CLONE, "basic-clone-single-crtc" }, { TEST_INVALID | TEST_CLONE | TEST_SINGLE_CRTC_CLONE, "invalid-clone-single-crtc" }, { TEST_INVALID | TEST_CLONE | TEST_EXCLUSIVE_CRTC_CLONE, "invalid-clone-exclusive-crtc" }, { TEST_CLONE | TEST_EXCLUSIVE_CRTC_CLONE, "clone-exclusive-crtc" }, }; const char *help_str = " -d\t\tDon't run any test, only print what would be done. (still needs DRM access)\n" " -t \tRun only the test with this id."; int i; int ret; ret = igt_subtest_init_parse_opts(&argc, argv, "dt:", NULL, help_str, opt_handler, NULL); if (ret < 0) return ret == -1 ? 0 : ret; igt_skip_on_simulation(); igt_assert_f(!(dry_run && filter_test_id), "only one of -d and -t is accepted\n"); igt_fixture { drm_fd = drm_open_driver_master(DRIVER_INTEL); if (!dry_run) kmstest_set_vt_graphics_mode(); drm_resources = drmModeGetResources(drm_fd); igt_assert(drm_resources); } for (i = 0; i < ARRAY_SIZE(tests); i++) { igt_subtest(tests[i].name) { struct test_config tconf = { .flags = tests[i].flags, .name = tests[i].name, .resources = drm_resources, }; run_test(&tconf); } } igt_fixture { drmModeFreeResources(drm_resources); close(drm_fd); } igt_exit(); } intel-gpu-tools-1.14/tests/gem_mmap_wc.c0000644000175000017500000002475712665336131015230 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ #define _GNU_SOURCE #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include "drm.h" struct local_i915_gem_mmap_v2 { uint32_t handle; uint32_t pad; uint64_t offset; uint64_t size; uint64_t addr_ptr; uint64_t flags; #define I915_MMAP_WC 0x1 }; #define LOCAL_IOCTL_I915_GEM_MMAP_v2 DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_MMAP, struct local_i915_gem_mmap_v2) static int OBJECT_SIZE = 16*1024*1024; static void set_domain(int fd, uint32_t handle) { gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); } static void * mmap_bo(int fd, uint32_t handle) { void *ptr; ptr = gem_mmap__wc(fd, handle, 0, OBJECT_SIZE, PROT_READ | PROT_WRITE); return ptr; } static void * create_pointer(int fd) { uint32_t handle; void *ptr; handle = gem_create(fd, OBJECT_SIZE); ptr = mmap_bo(fd, handle); set_domain(fd, handle); gem_close(fd, handle); return ptr; } static void test_invalid_flags(int fd) { struct drm_i915_getparam gp; struct local_i915_gem_mmap_v2 arg; uint64_t flag = I915_MMAP_WC; int val = -1; memset(&arg, 0, sizeof(arg)); arg.handle = gem_create(fd, 4096); arg.offset = 0; arg.size = 4096; memset(&gp, 0, sizeof(gp)); gp.param = 30; /* MMAP_VERSION */ gp.value = &val; /* Do we have the new mmap_ioctl? */ drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp); if (val >= 1) { /* * Only MMAP_WC flag is supported in version 1, so any other * flag should be rejected. */ flag <<= 1; while (flag) { arg.flags = flag; igt_assert(drmIoctl(fd, LOCAL_IOCTL_I915_GEM_MMAP_v2, &arg) == -1); igt_assert_eq(errno, EINVAL); flag <<= 1; } } gem_close(fd, arg.handle); } static void test_copy(int fd) { void *src, *dst; gem_require_mmap_wc(fd); /* copy from a fresh src to fresh dst to force pagefault on both */ src = create_pointer(fd); dst = create_pointer(fd); memcpy(dst, src, OBJECT_SIZE); memcpy(src, dst, OBJECT_SIZE); munmap(dst, OBJECT_SIZE); munmap(src, OBJECT_SIZE); } enum test_read_write { READ_BEFORE_WRITE, READ_AFTER_WRITE, }; static void test_read_write(int fd, enum test_read_write order) { uint32_t handle; void *ptr; volatile uint32_t val = 0; handle = gem_create(fd, OBJECT_SIZE); set_domain(fd, handle); ptr = mmap_bo(fd, handle); igt_assert(ptr != MAP_FAILED); if (order == READ_BEFORE_WRITE) { val = *(uint32_t *)ptr; *(uint32_t *)ptr = val; } else { *(uint32_t *)ptr = val; val = *(uint32_t *)ptr; } gem_close(fd, handle); munmap(ptr, OBJECT_SIZE); } static void test_read_write2(int fd, enum test_read_write order) { uint32_t handle; void *r, *w; volatile uint32_t val = 0; gem_require_mmap_wc(fd); handle = gem_create(fd, OBJECT_SIZE); set_domain(fd, handle); r = gem_mmap__wc(fd, handle, 0, OBJECT_SIZE, PROT_READ); w = gem_mmap__wc(fd, handle, 0, OBJECT_SIZE, PROT_READ | PROT_WRITE); if (order == READ_BEFORE_WRITE) { val = *(uint32_t *)r; *(uint32_t *)w = val; } else { *(uint32_t *)w = val; val = *(uint32_t *)r; } gem_close(fd, handle); munmap(r, OBJECT_SIZE); munmap(w, OBJECT_SIZE); } static void test_write(int fd) { void *src; uint32_t dst; gem_require_mmap_wc(fd); /* copy from a fresh src to fresh dst to force pagefault on both */ src = create_pointer(fd); dst = gem_create(fd, OBJECT_SIZE); gem_write(fd, dst, 0, src, OBJECT_SIZE); gem_close(fd, dst); munmap(src, OBJECT_SIZE); } static void test_coherency(int fd) { uint32_t handle; uint32_t *wc, *cpu; int i; igt_require(igt_setup_clflush()); handle = gem_create(fd, OBJECT_SIZE); wc = gem_mmap__wc(fd, handle, 0, OBJECT_SIZE, PROT_READ | PROT_WRITE); cpu = gem_mmap__cpu(fd, handle, 0, OBJECT_SIZE, PROT_READ | PROT_WRITE); gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); for (i = 0; i < OBJECT_SIZE / 64; i++) { int x = 16*i + (i%16); wc[x] = i; igt_clflush_range(&cpu[x], sizeof(cpu[x])); igt_assert_eq(cpu[x], i); } munmap(cpu, OBJECT_SIZE); munmap(wc, OBJECT_SIZE); gem_close(fd, handle); } static void test_write_gtt(int fd) { uint32_t dst; char *dst_gtt; void *src; gem_require_mmap_wc(fd); dst = gem_create(fd, OBJECT_SIZE); set_domain(fd, dst); /* prefault object into gtt */ dst_gtt = mmap_bo(fd, dst); memset(dst_gtt, 0, OBJECT_SIZE); munmap(dst_gtt, OBJECT_SIZE); src = create_pointer(fd); gem_write(fd, dst, 0, src, OBJECT_SIZE); gem_close(fd, dst); munmap(src, OBJECT_SIZE); } static void test_read(int fd) { void *dst; uint32_t src; gem_require_mmap_wc(fd); /* copy from a fresh src to fresh dst to force pagefault on both */ dst = create_pointer(fd); src = gem_create(fd, OBJECT_SIZE); gem_read(fd, src, 0, dst, OBJECT_SIZE); gem_close(fd, src); munmap(dst, OBJECT_SIZE); } static void test_close(int fd) { uint32_t handle = gem_create(fd, OBJECT_SIZE); uint8_t *ptr = mmap_bo(fd, handle); int i; memset(ptr, 0xcc, OBJECT_SIZE); gem_close(fd, handle); for (i = 0; i < 4096; i++) igt_assert(ptr[i*4096+i] == 0xcc); munmap(ptr, OBJECT_SIZE); } static void test_write_cpu_read_wc(int fd, int force_domain) { uint32_t handle; uint32_t *src, *dst; gem_require_mmap_wc(fd); handle = gem_create(fd, OBJECT_SIZE); dst = gem_mmap__wc(fd, handle, 0, OBJECT_SIZE, PROT_READ); src = gem_mmap__cpu(fd, handle, 0, OBJECT_SIZE, PROT_WRITE); memset(src, 0xaa, OBJECT_SIZE); if (force_domain) set_domain(fd, handle); igt_assert(memcmp(dst, src, OBJECT_SIZE) == 0); gem_close(fd, handle); munmap(src, OBJECT_SIZE); munmap(dst, OBJECT_SIZE); } static void test_write_gtt_read_wc(int fd) { uint32_t handle; uint32_t *src, *dst; gem_require_mmap_wc(fd); handle = gem_create(fd, OBJECT_SIZE); set_domain(fd, handle); dst = gem_mmap__wc(fd, handle, 0, OBJECT_SIZE, PROT_READ); src = gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_WRITE); memset(src, 0xaa, OBJECT_SIZE); igt_assert(memcmp(dst, src, OBJECT_SIZE) == 0); gem_close(fd, handle); munmap(src, OBJECT_SIZE); munmap(dst, OBJECT_SIZE); } static void test_set_cache_level(int fd) { struct drm_mode_cursor arg; struct drm_mode_card_res res; uint32_t crtc[32]; int active_crtc = 0; int n; /* We want to trigger an old WARN in set-cache-level when * it sees an unbound object in the GTT domain, following * the introduction of mmap(wc). */ memset(&arg, 0, sizeof(arg)); arg.flags = DRM_MODE_CURSOR_BO; arg.width = arg.height = 64; arg.handle = gem_create(fd, 64*64*4); set_domain(fd, arg.handle); /* Bind the object to the cursor to force set-cache-level(DISPLAY) */ memset(&res, 0, sizeof(res)); res.count_crtcs = 32; res.crtc_id_ptr = (uintptr_t)crtc; do_ioctl(fd, DRM_IOCTL_MODE_GETRESOURCES, &res); for (n = 0; n < res.count_crtcs; n++) { struct drm_mode_crtc mode; memset(&mode, 0, sizeof(mode)); mode.crtc_id = crtc[n]; do_ioctl(fd, DRM_IOCTL_MODE_GETCRTC, &mode); if (!mode.mode_valid) continue; active_crtc++; arg.crtc_id = crtc[n]; do_ioctl(fd, DRM_IOCTL_MODE_CURSOR, &arg); } gem_close(fd, arg.handle); igt_require(active_crtc); } struct thread_fault_concurrent { pthread_t thread; int id; uint32_t **ptr; }; static void * thread_fault_concurrent(void *closure) { struct thread_fault_concurrent *t = closure; uint32_t val = 0; int n; for (n = 0; n < 32; n++) { if (n & 1) *t->ptr[(n + t->id) % 32] = val; else val = *t->ptr[(n + t->id) % 32]; } return NULL; } static void test_fault_concurrent(int fd) { uint32_t *ptr[32]; struct thread_fault_concurrent thread[64]; int n; gem_require_mmap_wc(fd); for (n = 0; n < 32; n++) { ptr[n] = create_pointer(fd); } for (n = 0; n < 64; n++) { thread[n].ptr = ptr; thread[n].id = n; pthread_create(&thread[n].thread, NULL, thread_fault_concurrent, &thread[n]); } for (n = 0; n < 64; n++) pthread_join(thread[n].thread, NULL); for (n = 0; n < 32; n++) { munmap(ptr[n], OBJECT_SIZE); } } static void run_without_prefault(int fd, void (*func)(int fd)) { igt_disable_prefault(); func(fd); igt_enable_prefault(); } int fd; igt_main { if (igt_run_in_simulation()) OBJECT_SIZE = 1 * 1024 * 1024; igt_fixture fd = drm_open_driver(DRIVER_INTEL); igt_subtest("invalid-flags") test_invalid_flags(fd); igt_subtest("close") test_close(fd); igt_subtest("copy") test_copy(fd); igt_subtest("read") test_read(fd); igt_subtest("write") test_write(fd); igt_subtest("coherency") test_coherency(fd); igt_subtest("write-gtt") test_write_gtt(fd); igt_subtest("read-write") test_read_write(fd, READ_BEFORE_WRITE); igt_subtest("write-read") test_read_write(fd, READ_AFTER_WRITE); igt_subtest("read-write-distinct") test_read_write2(fd, READ_BEFORE_WRITE); igt_subtest("write-read-distinct") test_read_write2(fd, READ_AFTER_WRITE); igt_subtest("fault-concurrent") test_fault_concurrent(fd); igt_subtest("read-no-prefault") run_without_prefault(fd, test_read); igt_subtest("write-no-prefault") run_without_prefault(fd, test_write); igt_subtest("write-gtt-no-prefault") run_without_prefault(fd, test_write_gtt); igt_subtest("write-cpu-read-wc") test_write_cpu_read_wc(fd, 1); igt_subtest("write-cpu-read-wc-unflushed") test_write_cpu_read_wc(fd, 0); igt_subtest("write-gtt-read-wc") test_write_gtt_read_wc(fd); igt_subtest("set-cache-level") test_set_cache_level(fd); igt_fixture close(fd); } intel-gpu-tools-1.14/tests/kms_flip_event_leak.c0000644000175000017500000000703512665336131016744 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include "igt.h" #include #include #include #include typedef struct { int drm_fd; igt_display_t display; } data_t; IGT_TEST_DESCRIPTION( "This test tries to provoke the kernel into leaking a pending page flip " "event when the fd is closed before the flip has completed. The test " "itself won't fail even if the kernel leaks the event, but the resulting " "dmesg WARN will indicate a failure."); static bool test(data_t *data, enum pipe pipe, igt_output_t *output) { igt_plane_t *primary; drmModeModeInfo *mode; struct igt_fb fb[2]; int fd, ret; /* select the pipe we want to use */ igt_output_set_pipe(output, pipe); igt_display_commit(&data->display); if (!output->valid) { igt_output_set_pipe(output, PIPE_ANY); igt_display_commit(&data->display); return false; } primary = igt_output_get_plane(output, IGT_PLANE_PRIMARY); mode = igt_output_get_mode(output); igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_I915_FORMAT_MOD_X_TILED, 0.0, 0.0, 0.0, &fb[0]); igt_plane_set_fb(primary, &fb[0]); igt_display_commit2(&data->display, COMMIT_LEGACY); fd = drm_open_driver(DRIVER_INTEL); ret = drmDropMaster(data->drm_fd); igt_assert_eq(ret, 0); ret = drmSetMaster(fd); igt_assert_eq(ret, 0); igt_create_color_fb(fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_I915_FORMAT_MOD_X_TILED, 0.0, 0.0, 0.0, &fb[1]); ret = drmModePageFlip(fd, output->config.crtc->crtc_id, fb[1].fb_id, DRM_MODE_PAGE_FLIP_EVENT, data); igt_assert_eq(ret, 0); ret = close(fd); igt_assert_eq(ret, 0); ret = drmSetMaster(data->drm_fd); igt_assert_eq(ret, 0); igt_plane_set_fb(primary, NULL); igt_output_set_pipe(output, PIPE_ANY); igt_display_commit(&data->display); igt_remove_fb(data->drm_fd, &fb[0]); return true; } igt_simple_main { data_t data = {}; igt_output_t *output; int valid_tests = 0; enum pipe pipe; igt_skip_on_simulation(); data.drm_fd = drm_open_driver_master(DRIVER_INTEL); kmstest_set_vt_graphics_mode(); igt_display_init(&data.display, data.drm_fd); for_each_pipe(&data.display, pipe) { for_each_connected_output(&data.display, output) { if (test(&data, pipe, output)) valid_tests++; } } igt_require_f(valid_tests, "no valid crtc/connector combinations found\n"); igt_display_fini(&data.display); } intel-gpu-tools-1.14/tests/gem_dummy_reloc_loop.c0000644000175000017500000002066712665336131017151 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter (based on gem_storedw_*.c) * */ #include "igt.h" #include #include #include #include #include #include #include #include #include "drm.h" #include "intel_bufmgr.h" #include "i830_reg.h" #define LOCAL_I915_EXEC_VEBOX (4<<0) #define LOCAL_I915_EXEC_BSD_RING1 (1<<13) #define LOCAL_I915_EXEC_BSD_RING2 (2<<13) static drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; static drm_intel_bo *target_buffer; #define NUM_FD 50 static int mfd[NUM_FD]; static drm_intel_bufmgr *mbufmgr[NUM_FD]; static struct intel_batchbuffer *mbatch[NUM_FD]; static drm_intel_bo *mbuffer[NUM_FD]; /* * Testcase: Basic check of ring<->cpu sync using a dummy reloc * * The last test (that randomly switches the ring) seems to be pretty effective * at hitting the missed irq bug that's worked around with the HWSTAM irq write. */ IGT_TEST_DESCRIPTION("Check ring<->cpu sync using a dummy reloc."); #define MI_COND_BATCH_BUFFER_END (0x36<<23 | 1) #define MI_DO_COMPARE (1<<21) static void dummy_reloc_loop(int ring) { int i; for (i = 0; i < 0x100000; i++) { BEGIN_BATCH(4, 1); if (ring == I915_EXEC_RENDER) { OUT_BATCH(MI_COND_BATCH_BUFFER_END | MI_DO_COMPARE); OUT_BATCH(0xffffffff); /* compare dword */ OUT_RELOC(target_buffer, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(MI_NOOP); } else { OUT_BATCH(MI_FLUSH_DW | 1); OUT_BATCH(0); /* reserved */ OUT_RELOC(target_buffer, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(MI_NOOP | (1<<22) | (0xf)); } ADVANCE_BATCH(); intel_batchbuffer_flush_on_ring(batch, ring); drm_intel_bo_map(target_buffer, 0); // map to force completion drm_intel_bo_unmap(target_buffer); } } static void dummy_reloc_loop_random_ring(int num_rings) { int i; srandom(0xdeadbeef); for (i = 0; i < 0x100000; i++) { int ring = random() % num_rings + 1; BEGIN_BATCH(4, 1); if (ring == I915_EXEC_RENDER) { OUT_BATCH(MI_COND_BATCH_BUFFER_END | MI_DO_COMPARE); OUT_BATCH(0xffffffff); /* compare dword */ OUT_RELOC(target_buffer, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(MI_NOOP); } else { OUT_BATCH(MI_FLUSH_DW | 1); OUT_BATCH(0); /* reserved */ OUT_RELOC(target_buffer, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(MI_NOOP | (1<<22) | (0xf)); } ADVANCE_BATCH(); intel_batchbuffer_flush_on_ring(batch, ring); drm_intel_bo_map(target_buffer, 0); // map to force waiting on rendering drm_intel_bo_unmap(target_buffer); } } static void dummy_reloc_loop_random_ring_multi_fd(int num_rings) { int i; struct intel_batchbuffer *saved_batch; saved_batch = batch; srandom(0xdeadbeef); for (i = 0; i < 0x100000; i++) { int mindex; int ring = random() % num_rings + 1; mindex = random() % NUM_FD; batch = mbatch[mindex]; BEGIN_BATCH(4, 1); if (ring == I915_EXEC_RENDER) { OUT_BATCH(MI_COND_BATCH_BUFFER_END | MI_DO_COMPARE); OUT_BATCH(0xffffffff); /* compare dword */ OUT_RELOC(mbuffer[mindex], I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(MI_NOOP); } else { OUT_BATCH(MI_FLUSH_DW | 1); OUT_BATCH(0); /* reserved */ OUT_RELOC(mbuffer[mindex], I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(MI_NOOP | (1<<22) | (0xf)); } ADVANCE_BATCH(); intel_batchbuffer_flush_on_ring(batch, ring); drm_intel_bo_map(target_buffer, 0); // map to force waiting on rendering drm_intel_bo_unmap(target_buffer); } batch = saved_batch; } int fd; int devid; int num_rings; igt_main { igt_skip_on_simulation(); igt_fixture { int i; fd = drm_open_driver(DRIVER_INTEL); devid = intel_get_drm_devid(fd); num_rings = gem_get_num_rings(fd); /* Not yet implemented on pre-snb. */ igt_require(HAS_BLT_RING(devid)); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); igt_assert(bufmgr); drm_intel_bufmgr_gem_enable_reuse(bufmgr); batch = intel_batchbuffer_alloc(bufmgr, devid); igt_assert(batch); target_buffer = drm_intel_bo_alloc(bufmgr, "target bo", 4096, 4096); igt_assert(target_buffer); /* Create multi drm_fd and map one gem object to multi gem_contexts */ { unsigned int target_flink; char buffer_name[32]; igt_assert(dri_bo_flink(target_buffer, &target_flink) == 0); for (i = 0; i < NUM_FD; i++) { sprintf(buffer_name, "Target buffer %d\n", i); mfd[i] = drm_open_driver(DRIVER_INTEL); mbufmgr[i] = drm_intel_bufmgr_gem_init(mfd[i], 4096); igt_assert_f(mbufmgr[i], "fail to initialize buf manager " "for drm_fd %d\n", mfd[i]); drm_intel_bufmgr_gem_enable_reuse(mbufmgr[i]); mbatch[i] = intel_batchbuffer_alloc(mbufmgr[i], devid); igt_assert_f(mbatch[i], "fail to create batchbuffer " "for drm_fd %d\n", mfd[i]); mbuffer[i] = intel_bo_gem_create_from_name( mbufmgr[i], buffer_name, target_flink); igt_assert_f(mbuffer[i], "fail to create gem bo from global " "gem_handle %d for drm_fd %d\n", target_flink, mfd[i]); } } } igt_subtest("render") { igt_info("running dummy loop on render\n"); dummy_reloc_loop(I915_EXEC_RENDER); igt_info("dummy loop run on render completed\n"); } igt_subtest("bsd") { gem_require_ring(fd, I915_EXEC_BSD); sleep(2); igt_info("running dummy loop on bsd\n"); dummy_reloc_loop(I915_EXEC_BSD); igt_info("dummy loop run on bsd completed\n"); } igt_subtest("blt") { gem_require_ring(fd, I915_EXEC_BLT); sleep(2); igt_info("running dummy loop on blt\n"); dummy_reloc_loop(I915_EXEC_BLT); igt_info("dummy loop run on blt completed\n"); } #ifdef I915_EXEC_VEBOX igt_subtest("vebox") { gem_require_ring(fd, I915_EXEC_VEBOX); sleep(2); igt_info("running dummy loop on vebox\n"); dummy_reloc_loop(LOCAL_I915_EXEC_VEBOX); igt_info("dummy loop run on vebox completed\n"); } #endif igt_subtest("bsd-ring1") { igt_require(gem_has_bsd2(fd)); sleep(2); igt_info("running dummy loop on bsd-ring1\n"); dummy_reloc_loop(I915_EXEC_BSD|LOCAL_I915_EXEC_BSD_RING1); igt_info("dummy loop run on bsd-ring1 completed\n"); } igt_subtest("bsd-ring2") { igt_require(gem_has_bsd2(fd)); sleep(2); igt_info("running dummy loop on bsd-ring2\n"); dummy_reloc_loop(I915_EXEC_BSD|LOCAL_I915_EXEC_BSD_RING2); igt_info("dummy loop run on bsd-ring2 completed\n"); } igt_subtest("mixed") { if (num_rings > 1) { sleep(2); igt_info("running dummy loop on random rings\n"); dummy_reloc_loop_random_ring(num_rings); igt_info("dummy loop run on random rings completed\n"); } } igt_subtest("mixed_multi_fd") { if (num_rings > 1) { sleep(2); igt_info("running dummy loop on random rings based on " "multi drm_fd\n"); dummy_reloc_loop_random_ring_multi_fd(num_rings); igt_info("dummy loop run on random rings based on " "multi drm_fd completed\n"); } } igt_fixture { int i; /* Free the buffer/batchbuffer/buffer mgr for multi-fd */ { for (i = 0; i < NUM_FD; i++) { dri_bo_unreference(mbuffer[i]); intel_batchbuffer_free(mbatch[i]); drm_intel_bufmgr_destroy(mbufmgr[i]); close(mfd[i]); } } drm_intel_bo_unreference(target_buffer); intel_batchbuffer_free(batch); drm_intel_bufmgr_destroy(bufmgr); close(fd); } } intel-gpu-tools-1.14/tests/gem_reg_read.c0000644000175000017500000000772612665336131015352 00000000000000/* * Copyright © 2012 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Ben Widawsky * */ #include "igt.h" #include #include #include #include #include static bool is_x86_64; static bool has_proper_timestamp; struct local_drm_i915_reg_read { __u64 offset; __u64 val; /* Return value */ }; #define REG_READ_IOCTL DRM_IOWR(DRM_COMMAND_BASE + 0x31, struct local_drm_i915_reg_read) #define RENDER_RING_TIMESTAMP 0x2358 static int read_register(int fd, uint64_t offset, uint64_t * val) { int ret = 0; struct local_drm_i915_reg_read reg_read; reg_read.offset = offset; if (drmIoctl(fd, REG_READ_IOCTL, ®_read)) ret = -errno; *val = reg_read.val; return ret; } static bool check_kernel_x86_64(void) { int ret; struct utsname uts; ret = uname(&uts); igt_assert_eq(ret, 0); if (!strcmp(uts.machine, "x86_64")) return true; return false; } static bool check_timestamp(int fd) { int ret; uint64_t val; ret = read_register(fd, RENDER_RING_TIMESTAMP | 1, &val); return ret == 0; } static int timer_query(int fd, uint64_t * val) { uint64_t offset; int ret; offset = RENDER_RING_TIMESTAMP; if (has_proper_timestamp) offset |= 1; ret = read_register(fd, offset, val); /* * When reading the timestamp register with single 64b read, we are observing * invalid values on x86_64: * * [f = valid counter value | X = garbage] * * i386: 0x0000000fffffffff * x86_64: 0xffffffffXXXXXXXX * * In the absence of a corrected register read ioctl, attempt * to fix up the return value to be vaguely useful. */ if (is_x86_64 && !has_proper_timestamp) *val >>= 32; return ret; } static void test_timestamp_moving(int fd) { uint64_t first_val, second_val; igt_fail_on(timer_query(fd, &first_val) != 0); sleep(1); igt_fail_on(timer_query(fd, &second_val) != 0); igt_assert(second_val != first_val); } static void test_timestamp_monotonic(int fd) { uint64_t first_val, second_val; time_t start; bool retry = true; igt_fail_on(timer_query(fd, &first_val) != 0); time(&start); do { retry: igt_fail_on(timer_query(fd, &second_val) != 0); if (second_val < first_val && retry) { /* We may hit timestamp overflow once */ retry = false; first_val = second_val; goto retry; } igt_assert(second_val >= first_val); } while(difftime(time(NULL), start) < 5); } igt_main { uint64_t val = 0; int fd = -1; igt_fixture { fd = drm_open_driver(DRIVER_INTEL); is_x86_64 = check_kernel_x86_64(); has_proper_timestamp = check_timestamp(fd); } igt_subtest("bad-register") igt_assert_eq(read_register(fd, 0x12345678, &val), -EINVAL); igt_subtest("timestamp-moving") { igt_skip_on(timer_query(fd, &val) != 0); test_timestamp_moving(fd); } igt_subtest("timestamp-monotonic") { igt_skip_on(timer_query(fd, &val) != 0); test_timestamp_monotonic(fd); } igt_fixture { close(fd); } } intel-gpu-tools-1.14/tests/drv_hangman.c0000644000175000017500000002037512665336131015231 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Mika Kuoppala * Oscar Mateo * */ #include "igt.h" #include #include #include #include #ifndef I915_PARAM_CMD_PARSER_VERSION #define I915_PARAM_CMD_PARSER_VERSION 28 #endif static char read_buffer[1024]; static int _read_sysfs(void *dst, int maxlen, const char* path, const char *fname) { int fd; char full[PATH_MAX]; int r, e; igt_assert(snprintf(full, PATH_MAX, "%s/%s", path, fname) < PATH_MAX); fd = open(full, O_RDONLY); if (fd == -1) return -errno; r = read(fd, dst, maxlen); e = errno; close(fd); if (r < 0) return -e; return r; } static int read_sysfs(void *dst, int maxlen, const char *fname) { char path[PATH_MAX]; igt_assert(snprintf(path, PATH_MAX, "/sys/class/drm/card%d", drm_get_card()) < PATH_MAX); return _read_sysfs(dst, maxlen, path, fname); } static void test_sysfs_error_exists(void) { igt_assert_lt(0, read_sysfs(read_buffer, sizeof(read_buffer), "error")); } static void test_debugfs_error_state_exists(void) { int fd; igt_assert_lte(0, (fd = igt_debugfs_open("i915_error_state", O_RDONLY))); close (fd); } static void test_debugfs_ring_stop_exists(void) { int fd; igt_assert_lte(0, (fd = igt_debugfs_open("i915_ring_stop", O_RDONLY))); close(fd); } static void read_dfs(const char *fname, char *d, int maxlen) { int fd; int l; igt_assert_lte(0, (fd = igt_debugfs_open(fname, O_RDONLY))); igt_assert_lt(0, (l = read(fd, d, maxlen - 1))); igt_assert_lt(l, maxlen); d[l] = 0; close(fd); igt_debug("dfs entry %s read '%s'\n", fname, d); } static int compare_dfs_entry(const char *fname, const char *s) { const int l = min(strlen(s), sizeof(read_buffer)); read_dfs(fname, read_buffer, l + 1); return strncmp(read_buffer, s, l); } static void assert_dfs_entry(const char *fname, const char *s) { igt_fail_on_f(compare_dfs_entry(fname, s) != 0, "contents of %s: '%s' (expected '%s')\n", fname, read_buffer, s); } static void assert_dfs_entry_not(const char *fname, const char *s) { igt_fail_on_f(compare_dfs_entry(fname, s) == 0, "contents of %s: '%s' (expected not '%s'\n", fname, read_buffer, s); } static void assert_error_state_clear(void) { assert_dfs_entry("i915_error_state", "no error state collected"); } static void assert_error_state_collected(void) { assert_dfs_entry_not("i915_error_state", "no error state collected"); } const uint32_t *batch; static uint64_t submit_hang(int fd, unsigned ring_id) { uint64_t offset; igt_hang_ring_t hang; hang = igt_hang_ctx(fd, 0, ring_id, HANG_ALLOW_CAPTURE, &offset); batch = gem_mmap__cpu(fd, hang.handle, 0, 4096, PROT_READ); gem_set_domain(fd, hang.handle, I915_GEM_DOMAIN_CPU, 0); igt_post_hang_ring(fd, hang); return offset; } static void clear_error_state(void) { int fd; const char *b = "1"; igt_assert_lte(0, (fd = igt_debugfs_open("i915_error_state", O_WRONLY))); igt_assert(write(fd, b, 1) == 1); close(fd); } static void test_error_state_basic(void) { int fd; fd = drm_open_driver(DRIVER_INTEL); clear_error_state(); assert_error_state_clear(); submit_hang(fd, I915_EXEC_RENDER); close(fd); assert_error_state_collected(); clear_error_state(); assert_error_state_clear(); } static void check_error_state(const int gen, const bool uses_cmd_parser, const char *expected_ring_name, uint64_t expected_offset) { FILE *file; char *line = NULL; size_t line_size = 0; file = igt_debugfs_fopen("i915_error_state", "r"); igt_require(file); while (getline(&line, &line_size, file) > 0) { char *dashes; uint32_t gtt_offset_upper, gtt_offset_lower; int matched; dashes = strstr(line, "---"); if (!dashes) continue; matched = sscanf(dashes, "--- gtt_offset = 0x%08x %08x\n", >t_offset_upper, >t_offset_lower); if (matched) { char expected_line[64]; uint64_t gtt_offset; int i; strncpy(expected_line, line, dashes - line); expected_line[dashes - line - 1] = '\0'; igt_assert(strstr(expected_line, expected_ring_name)); gtt_offset = gtt_offset_upper; if (matched == 2) { gtt_offset <<= 32; gtt_offset |= gtt_offset_lower; } if (!uses_cmd_parser) igt_assert_eq_u64(gtt_offset, expected_offset); for (i = 0; i < 1024; i++) { igt_assert(getline(&line, &line_size, file) > 0); snprintf(expected_line, sizeof(expected_line), "%08x : %08x", 4*i, batch[i]); igt_assert(strstr(line, expected_line)); } break; } } free(line); fclose(file); } static bool uses_cmd_parser(int fd, int gen) { int parser_version = 0; drm_i915_getparam_t gp; int rc; gp.param = I915_PARAM_CMD_PARSER_VERSION; gp.value = &parser_version; rc = drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp); if (rc || parser_version == 0) return false; if (!gem_uses_ppgtt(fd)) return false; if (gen != 7) return false; return true; } static void test_error_state_capture(unsigned ring_id, const char *ring_name) { int fd, gen; uint64_t offset; bool cmd_parser; fd = drm_open_driver(DRIVER_INTEL); clear_error_state(); gen = intel_gen(intel_get_drm_devid(fd)); cmd_parser = uses_cmd_parser(fd, gen); offset = submit_hang(fd, ring_id); close(fd); check_error_state(gen, cmd_parser, ring_name, offset); } /* This test covers the case where we end up in an uninitialised area of the * ppgtt and keep executing through it. This is particularly relevant if 48b * ppgtt is enabled because the ppgtt is massively bigger compared to the 32b * case and it takes a lot more time to wrap, so the acthd can potentially keep * increasing for a long time */ #define NSEC_PER_SEC 1000000000L static void hangcheck_unterminated(void) { int fd; /* timeout needs to be greater than ~5*hangcheck */ int64_t timeout_ns = 100 * NSEC_PER_SEC; /* 100 seconds */ struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 gem_exec; uint32_t handle; fd = drm_open_driver(DRIVER_INTEL); igt_require(gem_uses_full_ppgtt(fd)); igt_require_hang_ring(fd, 0); handle = gem_create(fd, 4096); memset(&gem_exec, 0, sizeof(gem_exec)); gem_exec.handle = handle; memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)&gem_exec; execbuf.buffer_count = 1; gem_execbuf(fd, &execbuf); if (gem_wait(fd, handle, &timeout_ns) != 0) { /* need to manually trigger an hang to clean before failing */ igt_force_gpu_reset(); igt_assert_f(0, "unterminated batch did not trigger an hang!"); } close(fd); } igt_main { const struct intel_execution_engine *e; igt_skip_on_simulation(); igt_subtest("error-state-debugfs-entry") test_debugfs_error_state_exists(); igt_subtest("error-state-sysfs-entry") test_sysfs_error_exists(); igt_subtest("ring-stop-sysfs-entry") test_debugfs_ring_stop_exists(); igt_subtest("error-state-basic") test_error_state_basic(); for (e = intel_execution_engines; e->name; e++) { if (e->exec_id == 0) continue; igt_subtest_f("error-state-capture-%s", e->name) test_error_state_capture(e->exec_id | e->flags, e->full_name); } igt_subtest("hangcheck-unterminated") hangcheck_unterminated(); } intel-gpu-tools-1.14/tests/gem_busy.c0000644000175000017500000001537212665336131014560 00000000000000/* * Copyright © 2016 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ #include "igt.h" /* Exercise the busy-ioctl, ensuring the ABI is never broken */ IGT_TEST_DESCRIPTION("Basic check of busy-ioctl ABI."); enum { TEST = 0, BUSY, BATCH }; static void __gem_busy(int fd, uint32_t handle, uint32_t *read, uint32_t *write) { struct drm_i915_gem_busy busy; memset(&busy, 0, sizeof(busy)); busy.handle = handle; do_ioctl(fd, DRM_IOCTL_I915_GEM_BUSY, &busy); *write = busy.busy & 0xffff; *read = busy.busy >> 16; } static uint32_t busy_blt(int fd) { const int gen = intel_gen(intel_get_drm_devid(fd)); const int has_64bit_reloc = gen >= 8; struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 object[2]; struct drm_i915_gem_relocation_entry reloc[200], *r; uint32_t read, write; uint32_t *map; int factor = 100; int i = 0; memset(object, 0, sizeof(object)); object[0].handle = gem_create(fd, 1024*1024); object[1].handle = gem_create(fd, 4096); r = memset(reloc, 0, sizeof(reloc)); map = gem_mmap__cpu(fd, object[1].handle, 0, 4096, PROT_WRITE); gem_set_domain(fd, object[1].handle, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU); #define COPY_BLT_CMD (2<<29|0x53<<22|0x6) #define BLT_WRITE_ALPHA (1<<21) #define BLT_WRITE_RGB (1<<20) while (factor--) { /* XY_SRC_COPY */ map[i++] = COPY_BLT_CMD | BLT_WRITE_ALPHA | BLT_WRITE_RGB; if (has_64bit_reloc) map[i-1] += 2; map[i++] = 0xcc << 16 | 1 << 25 | 1 << 24 | (4*1024); map[i++] = 0; map[i++] = 256 << 16 | 1024; r->offset = i * sizeof(uint32_t); r->target_handle = object[0].handle; r->read_domains = I915_GEM_DOMAIN_RENDER; r->write_domain = I915_GEM_DOMAIN_RENDER; r++; map[i++] = 0; if (has_64bit_reloc) map[i++] = 0; map[i++] = 0; map[i++] = 4096; r->offset = i * sizeof(uint32_t); r->target_handle = object[0].handle; r->read_domains = I915_GEM_DOMAIN_RENDER; r->write_domain = 0; r++; map[i++] = 0; if (has_64bit_reloc) map[i++] = 0; } map[i++] = MI_BATCH_BUFFER_END; igt_assert(i <= 4096/sizeof(uint32_t)); igt_assert(r - reloc <= ARRAY_SIZE(reloc)); munmap(map, 4096); object[1].relocs_ptr = (uintptr_t)reloc; object[1].relocation_count = r - reloc; memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (unsigned long)object; execbuf.buffer_count = 2; if (gen >= 6) execbuf.flags = I915_EXEC_BLT; gem_execbuf(fd, &execbuf); __gem_busy(fd, object[0].handle, &read, &write); igt_assert_eq(read, 1 << write); igt_assert_eq(write, gen >= 6 ? I915_EXEC_BLT : I915_EXEC_RENDER); igt_debug("Created busy handle %d\n", object[0].handle); gem_close(fd, object[1].handle); return object[0].handle; } static bool exec_noop(int fd, uint32_t *handles, unsigned ring, bool write) { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 exec[3]; memset(exec, 0, sizeof(exec)); exec[0].handle = handles[BUSY]; exec[1].handle = handles[TEST]; if (write) exec[1].flags |= EXEC_OBJECT_WRITE; exec[2].handle = handles[BATCH]; memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)exec; execbuf.buffer_count = 3; execbuf.flags = ring; igt_debug("Queuing handle for %s on ring %d\n", write ? "writing" : "reading", ring & 0x7); return __gem_execbuf(fd, &execbuf) == 0; } static bool still_busy(int fd, uint32_t handle) { uint32_t read, write; __gem_busy(fd, handle, &read, &write); return write; } static void test_ring(int fd, unsigned ring, uint32_t flags) { uint32_t bbe = MI_BATCH_BUFFER_END; uint32_t handle[3]; uint32_t read, write; uint32_t active; unsigned i; gem_require_ring(fd, ring | flags); handle[TEST] = gem_create(fd, 4096); handle[BATCH] = gem_create(fd, 4096); gem_write(fd, handle[BATCH], 0, &bbe, sizeof(bbe)); /* Create a long running batch which we can use to hog the GPU */ handle[BUSY] = busy_blt(fd); /* Queue a batch after the busy, it should block and remain "busy" */ igt_assert(exec_noop(fd, handle, ring | flags, false)); igt_assert(still_busy(fd, handle[BUSY])); __gem_busy(fd, handle[TEST], &read, &write); igt_assert_eq(read, 1 << ring); igt_assert_eq(write, 0); /* Requeue with a write */ igt_assert(exec_noop(fd, handle, ring | flags, true)); igt_assert(still_busy(fd, handle[BUSY])); __gem_busy(fd, handle[TEST], &read, &write); igt_assert_eq(read, 1 << ring); igt_assert_eq(write, ring); /* Now queue it for a read across all available rings */ active = 0; for (i = I915_EXEC_RENDER; i <= I915_EXEC_VEBOX; i++) { if (exec_noop(fd, handle, i | flags, false)) active |= 1 << i; } igt_assert(still_busy(fd, handle[BUSY])); __gem_busy(fd, handle[TEST], &read, &write); igt_assert_eq(read, active); igt_assert_eq(write, ring); /* from the earlier write */ /* Check that our long batch was long enough */ igt_assert(still_busy(fd, handle[BUSY])); /* And make sure it becomes idle again */ gem_sync(fd, handle[TEST]); __gem_busy(fd, handle[TEST], &read, &write); igt_assert_eq(read, 0); igt_assert_eq(write, 0); for (i = TEST; i <= BATCH; i++) gem_close(fd, handle[i]); } static bool has_semaphores(int fd) { struct drm_i915_getparam gp; int val = -1; memset(&gp, 0, sizeof(gp)); gp.param = I915_PARAM_HAS_SEMAPHORES; gp.value = &val; drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp); errno = 0; return val > 0; } igt_main { const struct intel_execution_engine *e; int fd = -1; igt_skip_on_simulation(); igt_fixture { fd = drm_open_driver(DRIVER_INTEL); igt_require(has_semaphores(fd)); } for (e = intel_execution_engines; e->name; e++) { if (e->exec_id == 0) /* default exec-id is purely symbolic */ continue; igt_subtest_f("%s", e->name) test_ring(fd, e->exec_id, e->flags); } igt_fixture close(fd); } intel-gpu-tools-1.14/tests/gem_request_retire.c0000644000175000017500000001415212665336131016633 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Tvrtko Ursulin * */ /** @file gem_request_retire * * Collection of tests targeting request retirement code paths. */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include #include "drm.h" #include "i915_drm.h" #include "intel_bufmgr.h" IGT_TEST_DESCRIPTION("Collection of tests targeting request retirement code" " paths."); #define WIDTH 4096 #define HEIGHT 4096 #define BO_SIZE (WIDTH * HEIGHT * sizeof(uint32_t)) static uint32_t blit(int fd, uint32_t dst, uint32_t src, uint32_t ctx_id) { const unsigned int copies = 1000; uint32_t batch[12 * copies + 5]; struct drm_i915_gem_relocation_entry reloc[2 * copies]; struct drm_i915_gem_exec_object2 obj[3]; struct drm_i915_gem_execbuffer2 exec; uint32_t handle; unsigned int i = 0, j, r = 0; for (j = 0; j < copies; j++) { reloc[r].target_handle = dst; reloc[r].delta = 0; reloc[r].offset = (i + 4) * sizeof(uint32_t); reloc[r].presumed_offset = 0; reloc[r].read_domains = I915_GEM_DOMAIN_RENDER; reloc[r].write_domain = I915_GEM_DOMAIN_RENDER; r++; reloc[r].target_handle = src; reloc[r].delta = 0; reloc[r].offset = (i + 7) * sizeof(uint32_t); if (intel_gen(intel_get_drm_devid(fd)) >= 8) reloc[r].offset += sizeof(uint32_t); reloc[r].presumed_offset = 0; reloc[r].read_domains = I915_GEM_DOMAIN_RENDER; reloc[r].write_domain = 0; r++; batch[i++] = XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA | XY_SRC_COPY_BLT_WRITE_RGB; if (intel_gen(intel_get_drm_devid(fd)) >= 8) batch[i - 1] |= 8; else batch[i - 1] |= 6; batch[i++] = (3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ WIDTH*4; batch[i++] = 0; /* dst x1,y1 */ batch[i++] = (HEIGHT << 16) | WIDTH; /* dst x2,y2 */ batch[i++] = 0; /* dst reloc */ if (intel_gen(intel_get_drm_devid(fd)) >= 8) batch[i++] = 0; batch[i++] = 0; /* src x1,y1 */ batch[i++] = WIDTH*4; batch[i++] = 0; /* src reloc */ if (intel_gen(intel_get_drm_devid(fd)) >= 8) batch[i++] = 0; } batch[i++] = MI_BATCH_BUFFER_END; while (i % 4) batch[i++] = MI_NOOP; handle = gem_create(fd, sizeof(batch)); gem_write(fd, handle, 0, batch, sizeof(batch)); memset(obj, 0, sizeof(obj)); memset(&exec, 0, sizeof(exec)); obj[exec.buffer_count++].handle = dst; if (src != dst) obj[exec.buffer_count++].handle = src; obj[exec.buffer_count].handle = handle; obj[exec.buffer_count].relocation_count = 2 * copies; obj[exec.buffer_count].relocs_ptr = (uintptr_t)reloc; exec.buffer_count++; exec.buffers_ptr = (uintptr_t)obj; exec.batch_len = i * sizeof(uint32_t); exec.flags = I915_EXEC_BLT; i915_execbuffer2_set_context_id(exec, ctx_id); gem_execbuf(fd, &exec); return handle; } static uint32_t noop(int fd, uint32_t src, uint32_t ctx_id) { uint32_t batch[4]; struct drm_i915_gem_exec_object2 obj[2]; struct drm_i915_gem_execbuffer2 exec; uint32_t handle; unsigned int i = 0; batch[i++] = MI_NOOP; batch[i++] = MI_BATCH_BUFFER_END; batch[i++] = MI_NOOP; batch[i++] = MI_NOOP; handle = gem_create(fd, 4096); gem_write(fd, handle, 0, batch, sizeof(batch)); memset(obj, 0, sizeof(obj)); memset(&exec, 0, sizeof(exec)); obj[exec.buffer_count++].handle = src; obj[exec.buffer_count].handle = handle; obj[exec.buffer_count].relocation_count = 0; obj[exec.buffer_count].relocs_ptr = (uintptr_t)0; exec.buffer_count++; exec.buffers_ptr = (uintptr_t)obj; exec.batch_len = i * sizeof(uint32_t); exec.flags = I915_EXEC_RENDER; i915_execbuffer2_set_context_id(exec, ctx_id); gem_execbuf(fd, &exec); return handle; } /* * A single bo is operated from batchbuffers submitted from two contexts and on * different rings. * One execbuf finishes way ahead of the other at which point the respective * context is destroyed. */ static void test_retire_vma_not_inactive(int fd) { uint32_t ctx_id; uint32_t src, dst; uint32_t blit_bb, noop_bb; igt_require(HAS_BLT_RING(intel_get_drm_devid(fd))); ctx_id = gem_context_create(fd); /* Create some bos batch buffers will operate on. */ src = gem_create(fd, BO_SIZE); dst = gem_create(fd, BO_SIZE); /* Submit a long running batch. */ blit_bb = blit(fd, dst, src, 0); /* Submit a quick batch referencing the same object. */ noop_bb = noop(fd, src, ctx_id); /* Wait for the quick batch to complete. */ gem_sync(fd, noop_bb); gem_close(fd, noop_bb); /* Now destroy the context in which the quick batch was submitted. */ gem_context_destroy(fd, ctx_id); /* Wait for the slow batch to finish and clean up. */ gem_sync(fd, blit_bb); gem_close(fd, blit_bb); gem_close(fd, src); gem_close(fd, dst); } int fd; int main(int argc, char **argv) { igt_subtest_init(argc, argv); igt_fixture { fd = drm_open_driver(DRIVER_INTEL); igt_assert(fd >= 0); } igt_subtest("retire-vma-not-inactive") test_retire_vma_not_inactive(fd); igt_exit(); } intel-gpu-tools-1.14/tests/drm_vma_limiter_cpu.c0000644000175000017500000000542412665336131016764 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter */ #include "igt.h" #include #include #include #include #include #include #include #include #include "drm.h" #include "intel_bufmgr.h" static drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; /* Testcase: check whether the libdrm vma limiter works * * We've had reports of the X server exhausting the default rlimit of 64k vma's * in the kernel. libdrm has grown facilities to limit the vma caching since, * this checks whether they actually work. * * This one checks cpu mmaps only. */ #define BO_ARRAY_SIZE 68000 drm_intel_bo *bos[BO_ARRAY_SIZE]; igt_simple_main { int fd; int i; char *ptr; igt_skip_on_simulation(); fd = drm_open_driver(DRIVER_INTEL); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); drm_intel_bufmgr_gem_enable_reuse(bufmgr); batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd)); drm_intel_bufmgr_gem_set_vma_cache_size(bufmgr, 500); for (i = 0; i < BO_ARRAY_SIZE; i++) { bos[i] = drm_intel_bo_alloc(bufmgr, "mmap bo", 4096, 4096); igt_assert(bos[i]); drm_intel_bo_map(bos[i], 1); ptr = bos[i]->virtual; igt_assert(ptr); *ptr = 'c'; drm_intel_bo_unmap(bos[i]); } /* and recheck whether a second map of the same still works */ for (i = 0; i < BO_ARRAY_SIZE; i++) { bos[i] = drm_intel_bo_alloc(bufmgr, "mmap bo", 4096, 4096); igt_assert(bos[i]); drm_intel_bo_map(bos[i], 1); ptr = bos[i]->virtual; igt_assert(*ptr = 'c'); drm_intel_bo_unmap(bos[i]); } intel_batchbuffer_free(batch); drm_intel_bufmgr_destroy(bufmgr); close(fd); } intel-gpu-tools-1.14/tests/gem_concurrent_all.c0000644000175000017500000012272312665336131016607 00000000000000/* * Copyright © 2009,2012,2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * Chris Wilson * Daniel Vetter * */ /** @file gem_concurrent.c * * This is a test of pread/pwrite/mmap behavior when writing to active * buffers. * * Based on gem_gtt_concurrent_blt. */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include "intel_bufmgr.h" IGT_TEST_DESCRIPTION("Test of pread/pwrite/mmap behavior when writing to active" " buffers."); int fd, devid, gen; int all; int pass; struct buffers { const struct access_mode *mode; drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; drm_intel_bo **src, **dst; drm_intel_bo *snoop, *spare; uint32_t *tmp; int width, height, size; int count, num_buffers; }; #define MIN_BUFFERS 3 static void blt_copy_bo(struct buffers *b, drm_intel_bo *dst, drm_intel_bo *src); static void nop_release_bo(drm_intel_bo *bo) { drm_intel_bo_unreference(bo); } static void prw_set_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val) { for (int i = 0; i < b->size; i++) b->tmp[i] = val; drm_intel_bo_subdata(bo, 0, 4*b->size, b->tmp); } static void prw_cmp_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val) { uint32_t *vaddr; vaddr = b->tmp; do_or_die(drm_intel_bo_get_subdata(bo, 0, 4*b->size, vaddr)); for (int i = 0; i < b->size; i++) igt_assert_eq_u32(vaddr[i], val); } #define pixel(y, width) ((y)*(width) + (((y) + pass)%(width))) static void partial_set_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val) { for (int y = 0; y < b->height; y++) do_or_die(drm_intel_bo_subdata(bo, 4*pixel(y, b->width), 4, &val)); } static void partial_cmp_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val) { for (int y = 0; y < b->height; y++) { uint32_t buf; do_or_die(drm_intel_bo_get_subdata(bo, 4*pixel(y, b->width), 4, &buf)); igt_assert_eq_u32(buf, val); } } static drm_intel_bo * create_normal_bo(drm_intel_bufmgr *bufmgr, uint64_t size) { drm_intel_bo *bo; bo = drm_intel_bo_alloc(bufmgr, "bo", size, 0); igt_assert(bo); return bo; } static bool can_create_normal(void) { return true; } static drm_intel_bo * create_private_bo(drm_intel_bufmgr *bufmgr, uint64_t size) { drm_intel_bo *bo; uint32_t handle; /* XXX gem_create_with_flags(fd, size, I915_CREATE_PRIVATE); */ handle = gem_create(fd, size); bo = gem_handle_to_libdrm_bo(bufmgr, fd, "stolen", handle); gem_close(fd, handle); return bo; } static bool can_create_private(void) { return false; } static drm_intel_bo * create_stolen_bo(drm_intel_bufmgr *bufmgr, uint64_t size) { drm_intel_bo *bo; uint32_t handle; /* XXX gem_create_with_flags(fd, size, I915_CREATE_STOLEN); */ handle = gem_create(fd, size); bo = gem_handle_to_libdrm_bo(bufmgr, fd, "stolen", handle); gem_close(fd, handle); return bo; } static bool can_create_stolen(void) { /* XXX check num_buffers against available stolen */ return false; } static drm_intel_bo * (*create_func)(drm_intel_bufmgr *bufmgr, uint64_t size); static bool create_cpu_require(void) { return create_func != create_stolen_bo; } static drm_intel_bo * unmapped_create_bo(drm_intel_bufmgr *bufmgr, int width, int height) { return create_func(bufmgr, (uint64_t)4*width*height); } static bool create_snoop_require(void) { if (!create_cpu_require()) return false; return !gem_has_llc(fd); } static drm_intel_bo * snoop_create_bo(drm_intel_bufmgr *bufmgr, int width, int height) { drm_intel_bo *bo; bo = unmapped_create_bo(bufmgr, width, height); gem_set_caching(fd, bo->handle, I915_CACHING_CACHED); drm_intel_bo_disable_reuse(bo); return bo; } static bool create_userptr_require(void) { static int found = -1; if (found < 0) { struct drm_i915_gem_userptr arg; found = 0; memset(&arg, 0, sizeof(arg)); arg.user_ptr = -4096ULL; arg.user_size = 8192; errno = 0; drmIoctl(fd, LOCAL_IOCTL_I915_GEM_USERPTR, &arg); if (errno == EFAULT) { igt_assert(posix_memalign((void **)&arg.user_ptr, 4096, arg.user_size) == 0); found = drmIoctl(fd, LOCAL_IOCTL_I915_GEM_USERPTR, &arg) == 0; free((void *)(uintptr_t)arg.user_ptr); } } return found; } static drm_intel_bo * userptr_create_bo(drm_intel_bufmgr *bufmgr, int width, int height) { struct local_i915_gem_userptr userptr; drm_intel_bo *bo; void *ptr; memset(&userptr, 0, sizeof(userptr)); userptr.user_size = width * height * 4; userptr.user_size = (userptr.user_size + 4095) & -4096; ptr = mmap(NULL, userptr.user_size, PROT_READ | PROT_WRITE, MAP_ANON | MAP_SHARED, -1, 0); igt_assert(ptr != (void *)-1); userptr.user_ptr = (uintptr_t)ptr; do_or_die(drmIoctl(fd, LOCAL_IOCTL_I915_GEM_USERPTR, &userptr)); bo = gem_handle_to_libdrm_bo(bufmgr, fd, "userptr", userptr.handle); bo->virtual = (void *)(uintptr_t)userptr.user_ptr; gem_close(fd, userptr.handle); return bo; } static void userptr_set_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val) { int size = b->size; uint32_t *vaddr = bo->virtual; gem_set_domain(fd, bo->handle, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU); while (size--) *vaddr++ = val; } static void userptr_cmp_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val) { int size = b->size; uint32_t *vaddr = bo->virtual; gem_set_domain(fd, bo->handle, I915_GEM_DOMAIN_CPU, 0); while (size--) igt_assert_eq_u32(*vaddr++, val); } static void userptr_release_bo(drm_intel_bo *bo) { igt_assert(bo->virtual); munmap(bo->virtual, bo->size); bo->virtual = NULL; drm_intel_bo_unreference(bo); } static bool create_dmabuf_require(void) { static int found = -1; if (found < 0) { struct drm_prime_handle args; void *ptr; memset(&args, 0, sizeof(args)); args.handle = gem_create(fd, 4096); args.flags = DRM_RDWR; args.fd = -1; drmIoctl(fd, DRM_IOCTL_PRIME_HANDLE_TO_FD, &args); gem_close(fd, args.handle); found = 0; ptr = mmap(NULL, 4096, PROT_READ, MAP_SHARED, args.fd, 0); if (ptr != MAP_FAILED) { found = 1; munmap(ptr, 4096); } close(args.fd); } return found; } struct dmabuf { int fd; void *map; }; static drm_intel_bo * dmabuf_create_bo(drm_intel_bufmgr *bufmgr, int width, int height) { struct drm_prime_handle args; drm_intel_bo *bo; struct dmabuf *dmabuf; int size; size = 4*width*height; size = (size + 4095) & -4096; memset(&args, 0, sizeof(args)); args.handle = gem_create(fd, size); args.flags = DRM_RDWR; args.fd = -1; do_ioctl(fd, DRM_IOCTL_PRIME_HANDLE_TO_FD, &args); gem_close(fd, args.handle); bo = drm_intel_bo_gem_create_from_prime(bufmgr, args.fd, size); igt_assert(bo); dmabuf = malloc(sizeof(*dmabuf)); igt_assert(dmabuf); dmabuf->fd = args.fd; dmabuf->map = mmap(NULL, size, PROT_READ | PROT_WRITE, MAP_SHARED, dmabuf->fd, 0); igt_assert(dmabuf->map != (void *)-1); bo->virtual = dmabuf; return bo; } static void dmabuf_set_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val) { struct dmabuf *dmabuf = bo->virtual; uint32_t *v; int size; prime_sync_start(dmabuf->fd, true); for (v = dmabuf->map, size = b->size; size--; v++) *v = val; prime_sync_end(dmabuf->fd, true); } static void dmabuf_cmp_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val) { struct dmabuf *dmabuf = bo->virtual; uint32_t *v; int size; prime_sync_start(dmabuf->fd, false); for (v = dmabuf->map, size = b->size; size--; v++) igt_assert_eq_u32(*v, val); prime_sync_end(dmabuf->fd, false); } static void dmabuf_release_bo(drm_intel_bo *bo) { struct dmabuf *dmabuf = bo->virtual; igt_assert(dmabuf); munmap(dmabuf->map, bo->size); close(dmabuf->fd); free(dmabuf); bo->virtual = NULL; drm_intel_bo_unreference(bo); } static void gtt_set_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val) { uint32_t *vaddr = bo->virtual; int size = b->size; drm_intel_gem_bo_start_gtt_access(bo, true); while (size--) *vaddr++ = val; } static void gtt_cmp_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val) { uint32_t *vaddr = bo->virtual; /* GTT access is slow. So we just compare a few points */ drm_intel_gem_bo_start_gtt_access(bo, false); for (int y = 0; y < b->height; y++) igt_assert_eq_u32(vaddr[pixel(y, b->width)], val); } static drm_intel_bo * map_bo(drm_intel_bo *bo) { /* gtt map doesn't have a write parameter, so just keep the mapping * around (to avoid the set_domain with the gtt write domain set) and * manually tell the kernel when we start access the gtt. */ do_or_die(drm_intel_gem_bo_map_gtt(bo)); return bo; } static drm_intel_bo * tile_bo(drm_intel_bo *bo, int width) { uint32_t tiling = I915_TILING_X; uint32_t stride = width * 4; do_or_die(drm_intel_bo_set_tiling(bo, &tiling, stride)); return bo; } static drm_intel_bo * gtt_create_bo(drm_intel_bufmgr *bufmgr, int width, int height) { return map_bo(unmapped_create_bo(bufmgr, width, height)); } static drm_intel_bo * gttX_create_bo(drm_intel_bufmgr *bufmgr, int width, int height) { return tile_bo(gtt_create_bo(bufmgr, width, height), width); } static drm_intel_bo * wc_create_bo(drm_intel_bufmgr *bufmgr, int width, int height) { drm_intel_bo *bo; gem_require_mmap_wc(fd); bo = unmapped_create_bo(bufmgr, width, height); bo->virtual = __gem_mmap__wc(fd, bo->handle, 0, bo->size, PROT_READ | PROT_WRITE); return bo; } static void wc_release_bo(drm_intel_bo *bo) { igt_assert(bo->virtual); munmap(bo->virtual, bo->size); bo->virtual = NULL; nop_release_bo(bo); } static drm_intel_bo * gpu_create_bo(drm_intel_bufmgr *bufmgr, int width, int height) { return unmapped_create_bo(bufmgr, width, height); } static drm_intel_bo * gpuX_create_bo(drm_intel_bufmgr *bufmgr, int width, int height) { return tile_bo(gpu_create_bo(bufmgr, width, height), width); } static void cpu_set_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val) { int size = b->size; uint32_t *vaddr; do_or_die(drm_intel_bo_map(bo, true)); vaddr = bo->virtual; while (size--) *vaddr++ = val; drm_intel_bo_unmap(bo); } static void cpu_cmp_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val) { int size = b->size; uint32_t *vaddr; do_or_die(drm_intel_bo_map(bo, false)); vaddr = bo->virtual; while (size--) igt_assert_eq_u32(*vaddr++, val); drm_intel_bo_unmap(bo); } static void gpu_set_bo(struct buffers *buffers, drm_intel_bo *bo, uint32_t val) { struct drm_i915_gem_relocation_entry reloc[1]; struct drm_i915_gem_exec_object2 gem_exec[2]; struct drm_i915_gem_execbuffer2 execbuf; uint32_t buf[10], *b; uint32_t tiling, swizzle; drm_intel_bo_get_tiling(bo, &tiling, &swizzle); memset(reloc, 0, sizeof(reloc)); memset(gem_exec, 0, sizeof(gem_exec)); memset(&execbuf, 0, sizeof(execbuf)); b = buf; *b++ = XY_COLOR_BLT_CMD_NOLEN | ((gen >= 8) ? 5 : 4) | COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB; if (gen >= 4 && tiling) { b[-1] |= XY_COLOR_BLT_TILED; *b = buffers->width; } else *b = buffers->width << 2; *b++ |= 0xf0 << 16 | 1 << 25 | 1 << 24; *b++ = 0; *b++ = buffers->height << 16 | buffers->width; reloc[0].offset = (b - buf) * sizeof(uint32_t); reloc[0].target_handle = bo->handle; reloc[0].read_domains = I915_GEM_DOMAIN_RENDER; reloc[0].write_domain = I915_GEM_DOMAIN_RENDER; *b++ = 0; if (gen >= 8) *b++ = 0; *b++ = val; *b++ = MI_BATCH_BUFFER_END; if ((b - buf) & 1) *b++ = 0; gem_exec[0].handle = bo->handle; gem_exec[0].flags = EXEC_OBJECT_NEEDS_FENCE; gem_exec[1].handle = gem_create(fd, 4096); gem_exec[1].relocation_count = 1; gem_exec[1].relocs_ptr = (uintptr_t)reloc; execbuf.buffers_ptr = (uintptr_t)gem_exec; execbuf.buffer_count = 2; execbuf.batch_len = (b - buf) * sizeof(buf[0]); if (gen >= 6) execbuf.flags = I915_EXEC_BLT; gem_write(fd, gem_exec[1].handle, 0, buf, execbuf.batch_len); gem_execbuf(fd, &execbuf); gem_close(fd, gem_exec[1].handle); } static void gpu_cmp_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val) { blt_copy_bo(b, b->snoop, bo); cpu_cmp_bo(b, b->snoop, val); } const struct access_mode { const char *name; bool (*require)(void); void (*set_bo)(struct buffers *b, drm_intel_bo *bo, uint32_t val); void (*cmp_bo)(struct buffers *b, drm_intel_bo *bo, uint32_t val); drm_intel_bo *(*create_bo)(drm_intel_bufmgr *bufmgr, int width, int height); void (*release_bo)(drm_intel_bo *bo); } access_modes[] = { { .name = "prw", .set_bo = prw_set_bo, .cmp_bo = prw_cmp_bo, .create_bo = unmapped_create_bo, .release_bo = nop_release_bo, }, { .name = "partial", .set_bo = partial_set_bo, .cmp_bo = partial_cmp_bo, .create_bo = unmapped_create_bo, .release_bo = nop_release_bo, }, { .name = "cpu", .require = create_cpu_require, .set_bo = cpu_set_bo, .cmp_bo = cpu_cmp_bo, .create_bo = unmapped_create_bo, .release_bo = nop_release_bo, }, { .name = "snoop", .require = create_snoop_require, .set_bo = cpu_set_bo, .cmp_bo = cpu_cmp_bo, .create_bo = snoop_create_bo, .release_bo = nop_release_bo, }, { .name = "userptr", .require = create_userptr_require, .set_bo = userptr_set_bo, .cmp_bo = userptr_cmp_bo, .create_bo = userptr_create_bo, .release_bo = userptr_release_bo, }, { .name = "dmabuf", .require = create_dmabuf_require, .set_bo = dmabuf_set_bo, .cmp_bo = dmabuf_cmp_bo, .create_bo = dmabuf_create_bo, .release_bo = dmabuf_release_bo, }, { .name = "gtt", .set_bo = gtt_set_bo, .cmp_bo = gtt_cmp_bo, .create_bo = gtt_create_bo, .release_bo = nop_release_bo, }, { .name = "gttX", .set_bo = gtt_set_bo, .cmp_bo = gtt_cmp_bo, .create_bo = gttX_create_bo, .release_bo = nop_release_bo, }, { .name = "wc", .set_bo = gtt_set_bo, .cmp_bo = gtt_cmp_bo, .create_bo = wc_create_bo, .release_bo = wc_release_bo, }, { .name = "gpu", .set_bo = gpu_set_bo, .cmp_bo = gpu_cmp_bo, .create_bo = gpu_create_bo, .release_bo = nop_release_bo, }, { .name = "gpuX", .set_bo = gpu_set_bo, .cmp_bo = gpu_cmp_bo, .create_bo = gpuX_create_bo, .release_bo = nop_release_bo, }, }; igt_render_copyfunc_t rendercopy; static void buffers_init(struct buffers *data, const struct access_mode *mode, int num_buffers, int width, int height, int _fd, int enable_reuse) { memset(data, 0, sizeof(*data)); data->mode = mode; data->num_buffers = num_buffers; data->count = 0; data->width = width; data->height = height; data->size = width * height; data->tmp = malloc(4*data->size); igt_assert(data->tmp); data->bufmgr = drm_intel_bufmgr_gem_init(_fd, 4096); igt_assert(data->bufmgr); data->src = malloc(2*sizeof(drm_intel_bo *)*num_buffers); igt_assert(data->src); data->dst = data->src + num_buffers; if (enable_reuse) drm_intel_bufmgr_gem_enable_reuse(data->bufmgr); data->batch = intel_batchbuffer_alloc(data->bufmgr, devid); igt_assert(data->batch); } static void buffers_destroy(struct buffers *data) { int count = data->count; if (count == 0) return; for (int i = 0; i < count; i++) { data->mode->release_bo(data->src[i]); data->mode->release_bo(data->dst[i]); } nop_release_bo(data->snoop); data->mode->release_bo(data->spare); data->count = 0; } static void buffers_create(struct buffers *data) { int count = data->num_buffers; int width = data->width, height = data->height; igt_assert(data->bufmgr); buffers_destroy(data); igt_assert(data->count == 0); for (int i = 0; i < count; i++) { data->src[i] = data->mode->create_bo(data->bufmgr, width, height); data->dst[i] = data->mode->create_bo(data->bufmgr, width, height); } data->spare = data->mode->create_bo(data->bufmgr, width, height); data->snoop = snoop_create_bo(data->bufmgr, width, height); data->count = count; } static void buffers_fini(struct buffers *data) { if (data->bufmgr == NULL) return; buffers_destroy(data); free(data->tmp); free(data->src); intel_batchbuffer_free(data->batch); drm_intel_bufmgr_destroy(data->bufmgr); memset(data, 0, sizeof(*data)); } typedef void (*do_copy)(struct buffers *b, drm_intel_bo *dst, drm_intel_bo *src); typedef struct igt_hang_ring (*do_hang)(void); static void render_copy_bo(struct buffers *b, drm_intel_bo *dst, drm_intel_bo *src) { struct igt_buf d = { .bo = dst, .size = b->size * 4, .num_tiles = b->size * 4, .stride = b->width * 4, }, s = { .bo = src, .size = b->size * 4, .num_tiles = b->size * 4, .stride = b->width * 4, }; uint32_t swizzle; drm_intel_bo_get_tiling(dst, &d.tiling, &swizzle); drm_intel_bo_get_tiling(src, &s.tiling, &swizzle); rendercopy(b->batch, NULL, &s, 0, 0, b->width, b->height, &d, 0, 0); } static void blt_copy_bo(struct buffers *b, drm_intel_bo *dst, drm_intel_bo *src) { intel_blt_copy(b->batch, src, 0, 0, 4*b->width, dst, 0, 0, 4*b->width, b->width, b->height, 32); } static void cpu_copy_bo(struct buffers *b, drm_intel_bo *dst, drm_intel_bo *src) { const int size = b->size * sizeof(uint32_t); void *d, *s; gem_set_domain(fd, src->handle, I915_GEM_DOMAIN_CPU, 0); gem_set_domain(fd, dst->handle, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU); s = gem_mmap__cpu(fd, src->handle, 0, size, PROT_READ); d = gem_mmap__cpu(fd, dst->handle, 0, size, PROT_WRITE); memcpy(d, s, size); munmap(d, size); munmap(s, size); } static void gtt_copy_bo(struct buffers *b, drm_intel_bo *dst, drm_intel_bo *src) { const int size = b->size * sizeof(uint32_t); void *d, *s; gem_set_domain(fd, src->handle, I915_GEM_DOMAIN_GTT, 0); gem_set_domain(fd, dst->handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); s = gem_mmap__gtt(fd, src->handle, size, PROT_READ); d = gem_mmap__gtt(fd, dst->handle, size, PROT_WRITE); memcpy(d, s, size); munmap(d, size); munmap(s, size); } static void wc_copy_bo(struct buffers *b, drm_intel_bo *dst, drm_intel_bo *src) { const int size = b->width * sizeof(uint32_t); void *d, *s; gem_set_domain(fd, src->handle, I915_GEM_DOMAIN_GTT, 0); gem_set_domain(fd, dst->handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); s = gem_mmap__wc(fd, src->handle, 0, size, PROT_READ); d = gem_mmap__wc(fd, dst->handle, 0, size, PROT_WRITE); memcpy(d, s, size); munmap(d, size); munmap(s, size); } static struct igt_hang_ring no_hang(void) { return (struct igt_hang_ring){0, 0}; } static struct igt_hang_ring bcs_hang(void) { return igt_hang_ring(fd, I915_EXEC_BLT); } static struct igt_hang_ring rcs_hang(void) { return igt_hang_ring(fd, I915_EXEC_RENDER); } static void do_basic0(struct buffers *buffers, do_copy do_copy_func, do_hang do_hang_func) { gem_quiescent_gpu(fd); buffers->mode->set_bo(buffers, buffers->src[0], 0xdeadbeef); for (int i = 0; i < buffers->count; i++) { struct igt_hang_ring hang = do_hang_func(); do_copy_func(buffers, buffers->dst[i], buffers->src[0]); buffers->mode->cmp_bo(buffers, buffers->dst[i], 0xdeadbeef); igt_post_hang_ring(fd, hang); } } static void do_basic1(struct buffers *buffers, do_copy do_copy_func, do_hang do_hang_func) { gem_quiescent_gpu(fd); for (int i = 0; i < buffers->count; i++) { struct igt_hang_ring hang = do_hang_func(); buffers->mode->set_bo(buffers, buffers->src[i], i); buffers->mode->set_bo(buffers, buffers->dst[i], ~i); do_copy_func(buffers, buffers->dst[i], buffers->src[i]); usleep(0); /* let someone else claim the mutex */ buffers->mode->cmp_bo(buffers, buffers->dst[i], i); igt_post_hang_ring(fd, hang); } } static void do_basicN(struct buffers *buffers, do_copy do_copy_func, do_hang do_hang_func) { struct igt_hang_ring hang; gem_quiescent_gpu(fd); for (int i = 0; i < buffers->count; i++) { buffers->mode->set_bo(buffers, buffers->src[i], i); buffers->mode->set_bo(buffers, buffers->dst[i], ~i); } hang = do_hang_func(); for (int i = 0; i < buffers->count; i++) { do_copy_func(buffers, buffers->dst[i], buffers->src[i]); usleep(0); /* let someone else claim the mutex */ } for (int i = 0; i < buffers->count; i++) buffers->mode->cmp_bo(buffers, buffers->dst[i], i); igt_post_hang_ring(fd, hang); } static void do_overwrite_source(struct buffers *buffers, do_copy do_copy_func, do_hang do_hang_func) { struct igt_hang_ring hang; int i; gem_quiescent_gpu(fd); for (i = 0; i < buffers->count; i++) { buffers->mode->set_bo(buffers, buffers->src[i], i); buffers->mode->set_bo(buffers, buffers->dst[i], ~i); } for (i = 0; i < buffers->count; i++) do_copy_func(buffers, buffers->dst[i], buffers->src[i]); hang = do_hang_func(); for (i = buffers->count; i--; ) buffers->mode->set_bo(buffers, buffers->src[i], 0xdeadbeef); for (i = 0; i < buffers->count; i++) buffers->mode->cmp_bo(buffers, buffers->dst[i], i); igt_post_hang_ring(fd, hang); } static void do_overwrite_source_read(struct buffers *buffers, do_copy do_copy_func, do_hang do_hang_func, int do_rcs) { const int half = buffers->count/2; struct igt_hang_ring hang; int i; gem_quiescent_gpu(fd); for (i = 0; i < half; i++) { buffers->mode->set_bo(buffers, buffers->src[i], i); buffers->mode->set_bo(buffers, buffers->dst[i], ~i); buffers->mode->set_bo(buffers, buffers->dst[i+half], ~i); } for (i = 0; i < half; i++) { do_copy_func(buffers, buffers->dst[i], buffers->src[i]); if (do_rcs) render_copy_bo(buffers, buffers->dst[i+half], buffers->src[i]); else blt_copy_bo(buffers, buffers->dst[i+half], buffers->src[i]); } hang = do_hang_func(); for (i = half; i--; ) buffers->mode->set_bo(buffers, buffers->src[i], 0xdeadbeef); for (i = 0; i < half; i++) { buffers->mode->cmp_bo(buffers, buffers->dst[i], i); buffers->mode->cmp_bo(buffers, buffers->dst[i+half], i); } igt_post_hang_ring(fd, hang); } static void do_overwrite_source_read_bcs(struct buffers *buffers, do_copy do_copy_func, do_hang do_hang_func) { do_overwrite_source_read(buffers, do_copy_func, do_hang_func, 0); } static void do_overwrite_source_read_rcs(struct buffers *buffers, do_copy do_copy_func, do_hang do_hang_func) { do_overwrite_source_read(buffers, do_copy_func, do_hang_func, 1); } static void do_overwrite_source__rev(struct buffers *buffers, do_copy do_copy_func, do_hang do_hang_func) { struct igt_hang_ring hang; int i; gem_quiescent_gpu(fd); for (i = 0; i < buffers->count; i++) { buffers->mode->set_bo(buffers, buffers->src[i], i); buffers->mode->set_bo(buffers, buffers->dst[i], ~i); } for (i = 0; i < buffers->count; i++) do_copy_func(buffers, buffers->dst[i], buffers->src[i]); hang = do_hang_func(); for (i = 0; i < buffers->count; i++) buffers->mode->set_bo(buffers, buffers->src[i], 0xdeadbeef); for (i = buffers->count; i--; ) buffers->mode->cmp_bo(buffers, buffers->dst[i], i); igt_post_hang_ring(fd, hang); } static void do_overwrite_source__one(struct buffers *buffers, do_copy do_copy_func, do_hang do_hang_func) { struct igt_hang_ring hang; gem_quiescent_gpu(fd); buffers->mode->set_bo(buffers, buffers->src[0], 0); buffers->mode->set_bo(buffers, buffers->dst[0], ~0); do_copy_func(buffers, buffers->dst[0], buffers->src[0]); hang = do_hang_func(); buffers->mode->set_bo(buffers, buffers->src[0], 0xdeadbeef); buffers->mode->cmp_bo(buffers, buffers->dst[0], 0); igt_post_hang_ring(fd, hang); } static void do_intermix(struct buffers *buffers, do_copy do_copy_func, do_hang do_hang_func, int do_rcs) { const int half = buffers->count/2; struct igt_hang_ring hang; int i; gem_quiescent_gpu(fd); for (i = 0; i < buffers->count; i++) { buffers->mode->set_bo(buffers, buffers->src[i], 0xdeadbeef^~i); buffers->mode->set_bo(buffers, buffers->dst[i], i); } for (i = 0; i < half; i++) { if (do_rcs == 1 || (do_rcs == -1 && i & 1)) render_copy_bo(buffers, buffers->dst[i], buffers->src[i]); else blt_copy_bo(buffers, buffers->dst[i], buffers->src[i]); do_copy_func(buffers, buffers->dst[i+half], buffers->src[i]); if (do_rcs == 1 || (do_rcs == -1 && (i & 1) == 0)) render_copy_bo(buffers, buffers->dst[i], buffers->dst[i+half]); else blt_copy_bo(buffers, buffers->dst[i], buffers->dst[i+half]); do_copy_func(buffers, buffers->dst[i+half], buffers->src[i+half]); } hang = do_hang_func(); for (i = 0; i < 2*half; i++) buffers->mode->cmp_bo(buffers, buffers->dst[i], 0xdeadbeef^~i); igt_post_hang_ring(fd, hang); } static void do_intermix_rcs(struct buffers *buffers, do_copy do_copy_func, do_hang do_hang_func) { do_intermix(buffers, do_copy_func, do_hang_func, 1); } static void do_intermix_bcs(struct buffers *buffers, do_copy do_copy_func, do_hang do_hang_func) { do_intermix(buffers, do_copy_func, do_hang_func, 0); } static void do_intermix_both(struct buffers *buffers, do_copy do_copy_func, do_hang do_hang_func) { do_intermix(buffers, do_copy_func, do_hang_func, -1); } static void do_early_read(struct buffers *buffers, do_copy do_copy_func, do_hang do_hang_func) { struct igt_hang_ring hang; int i; gem_quiescent_gpu(fd); for (i = buffers->count; i--; ) buffers->mode->set_bo(buffers, buffers->src[i], 0xdeadbeef); for (i = 0; i < buffers->count; i++) do_copy_func(buffers, buffers->dst[i], buffers->src[i]); hang = do_hang_func(); for (i = buffers->count; i--; ) buffers->mode->cmp_bo(buffers, buffers->dst[i], 0xdeadbeef); igt_post_hang_ring(fd, hang); } static void do_read_read_bcs(struct buffers *buffers, do_copy do_copy_func, do_hang do_hang_func) { struct igt_hang_ring hang; int i; gem_quiescent_gpu(fd); for (i = buffers->count; i--; ) buffers->mode->set_bo(buffers, buffers->src[i], 0xdeadbeef ^ i); for (i = 0; i < buffers->count; i++) { do_copy_func(buffers, buffers->dst[i], buffers->src[i]); blt_copy_bo(buffers, buffers->spare, buffers->src[i]); } buffers->mode->cmp_bo(buffers, buffers->spare, 0xdeadbeef^(buffers->count-1)); hang = do_hang_func(); for (i = buffers->count; i--; ) buffers->mode->cmp_bo(buffers, buffers->dst[i], 0xdeadbeef ^ i); igt_post_hang_ring(fd, hang); } static void do_write_read_bcs(struct buffers *buffers, do_copy do_copy_func, do_hang do_hang_func) { struct igt_hang_ring hang; int i; gem_quiescent_gpu(fd); for (i = buffers->count; i--; ) buffers->mode->set_bo(buffers, buffers->src[i], 0xdeadbeef ^ i); for (i = 0; i < buffers->count; i++) { blt_copy_bo(buffers, buffers->spare, buffers->src[i]); do_copy_func(buffers, buffers->dst[i], buffers->spare); } hang = do_hang_func(); for (i = buffers->count; i--; ) buffers->mode->cmp_bo(buffers, buffers->dst[i], 0xdeadbeef ^ i); igt_post_hang_ring(fd, hang); } static void do_read_read_rcs(struct buffers *buffers, do_copy do_copy_func, do_hang do_hang_func) { struct igt_hang_ring hang; int i; gem_quiescent_gpu(fd); for (i = buffers->count; i--; ) buffers->mode->set_bo(buffers, buffers->src[i], 0xdeadbeef ^ i); for (i = 0; i < buffers->count; i++) { do_copy_func(buffers, buffers->dst[i], buffers->src[i]); render_copy_bo(buffers, buffers->spare, buffers->src[i]); } buffers->mode->cmp_bo(buffers, buffers->spare, 0xdeadbeef^(buffers->count-1)); hang = do_hang_func(); for (i = buffers->count; i--; ) buffers->mode->cmp_bo(buffers, buffers->dst[i], 0xdeadbeef ^ i); igt_post_hang_ring(fd, hang); } static void do_write_read_rcs(struct buffers *buffers, do_copy do_copy_func, do_hang do_hang_func) { struct igt_hang_ring hang; int i; gem_quiescent_gpu(fd); for (i = buffers->count; i--; ) buffers->mode->set_bo(buffers, buffers->src[i], 0xdeadbeef ^ i); for (i = 0; i < buffers->count; i++) { render_copy_bo(buffers, buffers->spare, buffers->src[i]); do_copy_func(buffers, buffers->dst[i], buffers->spare); } hang = do_hang_func(); for (i = buffers->count; i--; ) buffers->mode->cmp_bo(buffers, buffers->dst[i], 0xdeadbeef ^ i); igt_post_hang_ring(fd, hang); } static void do_gpu_read_after_write(struct buffers *buffers, do_copy do_copy_func, do_hang do_hang_func) { struct igt_hang_ring hang; int i; gem_quiescent_gpu(fd); for (i = buffers->count; i--; ) buffers->mode->set_bo(buffers, buffers->src[i], 0xabcdabcd); for (i = 0; i < buffers->count; i++) do_copy_func(buffers, buffers->dst[i], buffers->src[i]); for (i = buffers->count; i--; ) do_copy_func(buffers, buffers->spare, buffers->dst[i]); hang = do_hang_func(); for (i = buffers->count; i--; ) buffers->mode->cmp_bo(buffers, buffers->dst[i], 0xabcdabcd); igt_post_hang_ring(fd, hang); } typedef void (*do_test)(struct buffers *buffers, do_copy do_copy_func, do_hang do_hang_func); typedef void (*run_wrap)(struct buffers *buffers, do_test do_test_func, do_copy do_copy_func, do_hang do_hang_func); static void run_single(struct buffers *buffers, do_test do_test_func, do_copy do_copy_func, do_hang do_hang_func) { do_test_func(buffers, do_copy_func, do_hang_func); igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); } static void run_interruptible(struct buffers *buffers, do_test do_test_func, do_copy do_copy_func, do_hang do_hang_func) { for (pass = 0; pass < 10; pass++) do_test_func(buffers, do_copy_func, do_hang_func); pass = 0; igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); } static void run_child(struct buffers *buffers, do_test do_test_func, do_copy do_copy_func, do_hang do_hang_func) { /* We inherit the buffers from the parent, but the bufmgr/batch * needs to be local as the cache of reusable itself will be COWed, * leading to the child closing an object without the parent knowing. */ igt_fork(child, 1) do_test_func(buffers, do_copy_func, do_hang_func); igt_waitchildren(); igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); } static void __run_forked(struct buffers *buffers, int num_children, int loops, do_test do_test_func, do_copy do_copy_func, do_hang do_hang_func) { int _num_buffers = buffers->num_buffers; _num_buffers /= num_children; _num_buffers += MIN_BUFFERS; igt_fork(child, num_children) { /* recreate process local variables */ fd = drm_open_driver(DRIVER_INTEL); buffers_init(buffers, buffers->mode, _num_buffers, buffers->width, buffers->height, fd, true); buffers_create(buffers); for (pass = 0; pass < loops; pass++) do_test_func(buffers, do_copy_func, do_hang_func); pass = 0; } igt_waitchildren(); igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); } static void run_forked(struct buffers *buffers, do_test do_test_func, do_copy do_copy_func, do_hang do_hang_func) { __run_forked(buffers, sysconf(_SC_NPROCESSORS_ONLN), 10, do_test_func, do_copy_func, do_hang_func); } static void run_bomb(struct buffers *buffers, do_test do_test_func, do_copy do_copy_func, do_hang do_hang_func) { __run_forked(buffers, 8*sysconf(_SC_NPROCESSORS_ONLN), 10, do_test_func, do_copy_func, do_hang_func); } static void bit17_require(void) { struct drm_i915_gem_get_tiling2 { uint32_t handle; uint32_t tiling_mode; uint32_t swizzle_mode; uint32_t phys_swizzle_mode; } arg; #define DRM_IOCTL_I915_GEM_GET_TILING2 DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_TILING, struct drm_i915_gem_get_tiling2) memset(&arg, 0, sizeof(arg)); arg.handle = gem_create(fd, 4096); gem_set_tiling(fd, arg.handle, I915_TILING_X, 512); do_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg); gem_close(fd, arg.handle); igt_require(arg.phys_swizzle_mode == arg.swizzle_mode); } static void cpu_require(void) { bit17_require(); } static void gtt_require(void) { } static void wc_require(void) { bit17_require(); gem_require_mmap_wc(fd); } static void bcs_require(void) { } static void rcs_require(void) { igt_require(rendercopy); } static void run_basic_modes(const char *prefix, const struct access_mode *mode, const int num_buffers, const char *suffix, run_wrap run_wrap_func) { const struct { const char *prefix; do_copy copy; void (*require)(void); } pipelines[] = { { "cpu", cpu_copy_bo, cpu_require }, { "gtt", gtt_copy_bo, gtt_require }, { "wc", wc_copy_bo, wc_require }, { "blt", blt_copy_bo, bcs_require }, { "render", render_copy_bo, rcs_require }, { NULL, NULL } }, *pskip = pipelines + 3, *p; const struct { const char *suffix; do_hang hang; } hangs[] = { { "", no_hang }, { "-hang-blt", bcs_hang }, { "-hang-render", rcs_hang }, { NULL, NULL }, }, *h; for (h = hangs; h->suffix; h++) { if (!all && *h->suffix) continue; for (p = all ? pipelines : pskip; p->prefix; p++) { struct buffers buffers; igt_fixture buffers_init(&buffers, mode, num_buffers, 512, 512, fd, run_wrap_func != run_child); igt_subtest_f("%s-%s-%s-sanitycheck0%s%s", prefix, mode->name, p->prefix, suffix, h->suffix) { p->require(); buffers_create(&buffers); run_wrap_func(&buffers, do_basic0, p->copy, h->hang); } igt_subtest_f("%s-%s-%s-sanitycheck1%s%s", prefix, mode->name, p->prefix, suffix, h->suffix) { p->require(); buffers_create(&buffers); run_wrap_func(&buffers, do_basic1, p->copy, h->hang); } igt_subtest_f("%s-%s-%s-sanitycheckN%s%s", prefix, mode->name, p->prefix, suffix, h->suffix) { p->require(); buffers_create(&buffers); run_wrap_func(&buffers, do_basicN, p->copy, h->hang); } /* try to overwrite the source values */ igt_subtest_f("%s-%s-%s-overwrite-source-one%s%s", prefix, mode->name, p->prefix, suffix, h->suffix) { p->require(); buffers_create(&buffers); run_wrap_func(&buffers, do_overwrite_source__one, p->copy, h->hang); } igt_subtest_f("%s-%s-%s-overwrite-source%s%s", prefix, mode->name, p->prefix, suffix, h->suffix) { p->require(); buffers_create(&buffers); run_wrap_func(&buffers, do_overwrite_source, p->copy, h->hang); } igt_subtest_f("%s-%s-%s-overwrite-source-read-bcs%s%s", prefix, mode->name, p->prefix, suffix, h->suffix) { p->require(); buffers_create(&buffers); run_wrap_func(&buffers, do_overwrite_source_read_bcs, p->copy, h->hang); } igt_subtest_f("%s-%s-%s-overwrite-source-read-rcs%s%s", prefix, mode->name, p->prefix, suffix, h->suffix) { p->require(); igt_require(rendercopy); buffers_create(&buffers); run_wrap_func(&buffers, do_overwrite_source_read_rcs, p->copy, h->hang); } igt_subtest_f("%s-%s-%s-overwrite-source-rev%s%s", prefix, mode->name, p->prefix, suffix, h->suffix) { p->require(); buffers_create(&buffers); run_wrap_func(&buffers, do_overwrite_source__rev, p->copy, h->hang); } /* try to intermix copies with GPU copies*/ igt_subtest_f("%s-%s-%s-intermix-rcs%s%s", prefix, mode->name, p->prefix, suffix, h->suffix) { p->require(); igt_require(rendercopy); buffers_create(&buffers); run_wrap_func(&buffers, do_intermix_rcs, p->copy, h->hang); } igt_subtest_f("%s-%s-%s-intermix-bcs%s%s", prefix, mode->name, p->prefix, suffix, h->suffix) { p->require(); igt_require(rendercopy); buffers_create(&buffers); run_wrap_func(&buffers, do_intermix_bcs, p->copy, h->hang); } igt_subtest_f("%s-%s-%s-intermix-both%s%s", prefix, mode->name, p->prefix, suffix, h->suffix) { p->require(); igt_require(rendercopy); buffers_create(&buffers); run_wrap_func(&buffers, do_intermix_both, p->copy, h->hang); } /* try to read the results before the copy completes */ igt_subtest_f("%s-%s-%s-early-read%s%s", prefix, mode->name, p->prefix, suffix, h->suffix) { p->require(); buffers_create(&buffers); run_wrap_func(&buffers, do_early_read, p->copy, h->hang); } /* concurrent reads */ igt_subtest_f("%s-%s-%s-read-read-bcs%s%s", prefix, mode->name, p->prefix, suffix, h->suffix) { p->require(); buffers_create(&buffers); run_wrap_func(&buffers, do_read_read_bcs, p->copy, h->hang); } igt_subtest_f("%s-%s-%s-read-read-rcs%s%s", prefix, mode->name, p->prefix, suffix, h->suffix) { p->require(); igt_require(rendercopy); buffers_create(&buffers); run_wrap_func(&buffers, do_read_read_rcs, p->copy, h->hang); } /* split copying between rings */ igt_subtest_f("%s-%s-%s-write-read-bcs%s%s", prefix, mode->name, p->prefix, suffix, h->suffix) { p->require(); buffers_create(&buffers); run_wrap_func(&buffers, do_write_read_bcs, p->copy, h->hang); } igt_subtest_f("%s-%s-%s-write-read-rcs%s%s", prefix, mode->name, p->prefix, suffix, h->suffix) { p->require(); igt_require(rendercopy); buffers_create(&buffers); run_wrap_func(&buffers, do_write_read_rcs, p->copy, h->hang); } /* and finally try to trick the kernel into loosing the pending write */ igt_subtest_f("%s-%s-%s-gpu-read-after-write%s%s", prefix, mode->name, p->prefix, suffix, h->suffix) { p->require(); buffers_create(&buffers); run_wrap_func(&buffers, do_gpu_read_after_write, p->copy, h->hang); } igt_fixture buffers_fini(&buffers); } } } static void run_modes(const char *style, const struct access_mode *mode, const int num_buffers, unsigned allow_mem) { if (!igt_only_list_subtests()) { if (mode->require && !mode->require()) return; igt_debug("%s: using 2x%d buffers, each 1MiB\n", style, num_buffers); if (!__intel_check_memory(2*num_buffers, 1024*1024, allow_mem, NULL, NULL)) return; } run_basic_modes(style, mode, num_buffers, "", run_single); run_basic_modes(style, mode, num_buffers, "-child", run_child); run_basic_modes(style, mode, num_buffers, "-forked", run_forked); igt_fork_signal_helper(); run_basic_modes(style, mode, num_buffers, "-interruptible", run_interruptible); run_basic_modes(style, mode, num_buffers, "-bomb", run_bomb); igt_stop_signal_helper(); } igt_main { const struct { const char *name; drm_intel_bo *(*create)(drm_intel_bufmgr *, uint64_t size); bool (*require)(void); } create[] = { { "", create_normal_bo, can_create_normal}, { "private-", create_private_bo, can_create_private }, { "stolen-", create_stolen_bo, can_create_stolen }, { NULL, NULL } }, *c; uint64_t pin_sz = 0; void *pinned = NULL; int num_buffers = 0; int i; igt_skip_on_simulation(); if (strstr(igt_test_name(), "all")) all = true; igt_fixture { fd = drm_open_driver(DRIVER_INTEL); intel_detect_and_clear_missed_interrupts(fd); devid = intel_get_drm_devid(fd); gen = intel_gen(devid); rendercopy = igt_get_render_copyfunc(devid); } for (c = create; c->name; c++) { char name[80]; create_func = c->create; num_buffers = MIN_BUFFERS; if (c->require()) { snprintf(name, sizeof(name), "%s%s", c->name, "tiny"); for (i = 0; i < ARRAY_SIZE(access_modes); i++) run_modes(name, &access_modes[i], num_buffers, CHECK_RAM); } igt_fixture { num_buffers = gem_mappable_aperture_size() / (1024 * 1024) / 4; } if (c->require()) { snprintf(name, sizeof(name), "%s%s", c->name, "small"); for (i = 0; i < ARRAY_SIZE(access_modes); i++) run_modes(name, &access_modes[i], num_buffers, CHECK_RAM); } igt_fixture { num_buffers = gem_mappable_aperture_size() / (1024 * 1024); } if (c->require()) { snprintf(name, sizeof(name), "%s%s", c->name, "thrash"); for (i = 0; i < ARRAY_SIZE(access_modes); i++) run_modes(name, &access_modes[i], num_buffers, CHECK_RAM); } igt_fixture { num_buffers = gem_global_aperture_size(fd) / (1024 * 1024); } if (c->require()) { snprintf(name, sizeof(name), "%s%s", c->name, "global"); for (i = 0; i < ARRAY_SIZE(access_modes); i++) run_modes(name, &access_modes[i], num_buffers, CHECK_RAM); } igt_fixture { num_buffers = gem_aperture_size(fd) / (1024 * 1024); } if (c->require()) { snprintf(name, sizeof(name), "%s%s", c->name, "full"); for (i = 0; i < ARRAY_SIZE(access_modes); i++) run_modes(name, &access_modes[i], num_buffers, CHECK_RAM); } igt_fixture { num_buffers = gem_mappable_aperture_size() / (1024 * 1024); pin_sz = intel_get_avail_ram_mb() - num_buffers; igt_debug("Pinning %ld MiB\n", pin_sz); pin_sz *= 1024 * 1024; if (posix_memalign(&pinned, 4096, pin_sz) || mlock(pinned, pin_sz) || madvise(pinned, pin_sz, MADV_DONTFORK)) { free(pinned); pinned = NULL; } igt_require(pinned); } if (c->require()) { snprintf(name, sizeof(name), "%s%s", c->name, "swap"); for (i = 0; i < ARRAY_SIZE(access_modes); i++) run_modes(name, &access_modes[i], num_buffers, CHECK_RAM | CHECK_SWAP); } igt_fixture { if (pinned) { munlock(pinned, pin_sz); free(pinned); pinned = NULL; } } } } intel-gpu-tools-1.14/tests/gen3_render_linear_blits.c0000644000175000017500000002502612665336131017665 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ /** @file gen3_linear_render_blits.c * * This is a test of doing many blits, with a working set * larger than the aperture size. * * The goal is to simply ensure the basics work. */ #include "igt.h" #include #include #include #include #include #include #include #include #include "drm.h" #include "i915_reg.h" #define WIDTH 512 #define HEIGHT 512 static uint32_t linear[WIDTH*HEIGHT]; static inline uint32_t pack_float(float f) { union { uint32_t dw; float f; } u; u.f = f; return u.dw; } static uint32_t fill_reloc(struct drm_i915_gem_relocation_entry *reloc, uint32_t offset, uint32_t handle, uint32_t read_domain, uint32_t write_domain) { reloc->target_handle = handle; reloc->delta = 0; reloc->offset = offset * sizeof(uint32_t); reloc->presumed_offset = 0; reloc->read_domains = read_domain; reloc->write_domain = write_domain; return reloc->presumed_offset + reloc->delta; } static void copy(int fd, uint32_t dst, uint32_t src) { uint32_t batch[1024], *b = batch; struct drm_i915_gem_relocation_entry reloc[2], *r = reloc; struct drm_i915_gem_exec_object2 obj[3]; struct drm_i915_gem_execbuffer2 exec; uint32_t handle; int ret; /* invariant state */ *b++ = (_3DSTATE_AA_CMD | AA_LINE_ECAAR_WIDTH_ENABLE | AA_LINE_ECAAR_WIDTH_1_0 | AA_LINE_REGION_WIDTH_ENABLE | AA_LINE_REGION_WIDTH_1_0); *b++ = (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD | IAB_MODIFY_ENABLE | IAB_MODIFY_FUNC | (BLENDFUNC_ADD << IAB_FUNC_SHIFT) | IAB_MODIFY_SRC_FACTOR | (BLENDFACT_ONE << IAB_SRC_FACTOR_SHIFT) | IAB_MODIFY_DST_FACTOR | (BLENDFACT_ZERO << IAB_DST_FACTOR_SHIFT)); *b++ = (_3DSTATE_DFLT_DIFFUSE_CMD); *b++ = (0); *b++ = (_3DSTATE_DFLT_SPEC_CMD); *b++ = (0); *b++ = (_3DSTATE_DFLT_Z_CMD); *b++ = (0); *b++ = (_3DSTATE_COORD_SET_BINDINGS | CSB_TCB(0, 0) | CSB_TCB(1, 1) | CSB_TCB(2, 2) | CSB_TCB(3, 3) | CSB_TCB(4, 4) | CSB_TCB(5, 5) | CSB_TCB(6, 6) | CSB_TCB(7, 7)); *b++ = (_3DSTATE_RASTER_RULES_CMD | ENABLE_POINT_RASTER_RULE | OGL_POINT_RASTER_RULE | ENABLE_LINE_STRIP_PROVOKE_VRTX | ENABLE_TRI_FAN_PROVOKE_VRTX | LINE_STRIP_PROVOKE_VRTX(1) | TRI_FAN_PROVOKE_VRTX(2) | ENABLE_TEXKILL_3D_4D | TEXKILL_4D); *b++ = (_3DSTATE_MODES_4_CMD | ENABLE_LOGIC_OP_FUNC | LOGIC_OP_FUNC(LOGICOP_COPY) | ENABLE_STENCIL_WRITE_MASK | STENCIL_WRITE_MASK(0xff) | ENABLE_STENCIL_TEST_MASK | STENCIL_TEST_MASK(0xff)); *b++ = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | I1_LOAD_S(4) | I1_LOAD_S(5) | 2); *b++ = (0x00000000); /* Disable texture coordinate wrap-shortest */ *b++ = ((1 << S4_POINT_WIDTH_SHIFT) | S4_LINE_WIDTH_ONE | S4_CULLMODE_NONE | S4_VFMT_XY); *b++ = (0x00000000); /* Stencil. */ *b++ = (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT); *b++ = (_3DSTATE_SCISSOR_RECT_0_CMD); *b++ = (0); *b++ = (0); *b++ = (_3DSTATE_DEPTH_SUBRECT_DISABLE); *b++ = (_3DSTATE_LOAD_INDIRECT | 0); /* disable indirect state */ *b++ = (0); *b++ = (_3DSTATE_STIPPLE); *b++ = (0x00000000); *b++ = (_3DSTATE_BACKFACE_STENCIL_OPS | BFO_ENABLE_STENCIL_TWO_SIDE | 0); /* samler state */ #define TEX_COUNT 1 *b++ = (_3DSTATE_MAP_STATE | (3 * TEX_COUNT)); *b++ = ((1 << TEX_COUNT) - 1); *b = fill_reloc(r++, b-batch, src, I915_GEM_DOMAIN_SAMPLER, 0); b++; *b++ = (MAPSURF_32BIT | MT_32BIT_ARGB8888 | (HEIGHT - 1) << MS3_HEIGHT_SHIFT | (WIDTH - 1) << MS3_WIDTH_SHIFT); *b++ = ((WIDTH-1) << MS4_PITCH_SHIFT); *b++ = (_3DSTATE_SAMPLER_STATE | (3 * TEX_COUNT)); *b++ = ((1 << TEX_COUNT) - 1); *b++ = (MIPFILTER_NONE << SS2_MIP_FILTER_SHIFT | FILTER_NEAREST << SS2_MAG_FILTER_SHIFT | FILTER_NEAREST << SS2_MIN_FILTER_SHIFT); *b++ = (TEXCOORDMODE_WRAP << SS3_TCX_ADDR_MODE_SHIFT | TEXCOORDMODE_WRAP << SS3_TCY_ADDR_MODE_SHIFT | 0 << SS3_TEXTUREMAP_INDEX_SHIFT); *b++ = (0x00000000); /* render target state */ *b++ = (_3DSTATE_BUF_INFO_CMD); *b++ = (BUF_3D_ID_COLOR_BACK | WIDTH*4); *b = fill_reloc(r++, b-batch, dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER); b++; *b++ = (_3DSTATE_DST_BUF_VARS_CMD); *b++ = (COLR_BUF_ARGB8888 | DSTORG_HORT_BIAS(0x8) | DSTORG_VERT_BIAS(0x8)); /* draw rect is unconditional */ *b++ = (_3DSTATE_DRAW_RECT_CMD); *b++ = (0x00000000); *b++ = (0x00000000); /* ymin, xmin */ *b++ = (DRAW_YMAX(HEIGHT - 1) | DRAW_XMAX(WIDTH - 1)); /* yorig, xorig (relate to color buffer?) */ *b++ = (0x00000000); /* texfmt */ *b++ = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(1) | I1_LOAD_S(2) | I1_LOAD_S(6) | 2); *b++ = ((4 << S1_VERTEX_WIDTH_SHIFT) | (4 << S1_VERTEX_PITCH_SHIFT)); *b++ = (~S2_TEXCOORD_FMT(0, TEXCOORDFMT_NOT_PRESENT) | S2_TEXCOORD_FMT(0, TEXCOORDFMT_2D)); *b++ = (S6_CBUF_BLEND_ENABLE | S6_COLOR_WRITE_ENABLE | BLENDFUNC_ADD << S6_CBUF_BLEND_FUNC_SHIFT | BLENDFACT_ONE << S6_CBUF_SRC_BLEND_FACT_SHIFT | BLENDFACT_ZERO << S6_CBUF_DST_BLEND_FACT_SHIFT); /* pixel shader */ *b++ = (_3DSTATE_PIXEL_SHADER_PROGRAM | (1 + 3*3 - 2)); /* decl FS_T0 */ *b++ = (D0_DCL | REG_TYPE(FS_T0) << D0_TYPE_SHIFT | REG_NR(FS_T0) << D0_NR_SHIFT | ((REG_TYPE(FS_T0) != REG_TYPE_S) ? D0_CHANNEL_ALL : 0)); *b++ = (0); *b++ = (0); /* decl FS_S0 */ *b++ = (D0_DCL | (REG_TYPE(FS_S0) << D0_TYPE_SHIFT) | (REG_NR(FS_S0) << D0_NR_SHIFT) | ((REG_TYPE(FS_S0) != REG_TYPE_S) ? D0_CHANNEL_ALL : 0)); *b++ = (0); *b++ = (0); /* texld(FS_OC, FS_S0, FS_T0 */ *b++ = (T0_TEXLD | (REG_TYPE(FS_OC) << T0_DEST_TYPE_SHIFT) | (REG_NR(FS_OC) << T0_DEST_NR_SHIFT) | (REG_NR(FS_S0) << T0_SAMPLER_NR_SHIFT)); *b++ = ((REG_TYPE(FS_T0) << T1_ADDRESS_REG_TYPE_SHIFT) | (REG_NR(FS_T0) << T1_ADDRESS_REG_NR_SHIFT)); *b++ = (0); *b++ = (PRIM3D_RECTLIST | (3*4 - 1)); *b++ = pack_float(WIDTH); *b++ = pack_float(HEIGHT); *b++ = pack_float(WIDTH); *b++ = pack_float(HEIGHT); *b++ = pack_float(0); *b++ = pack_float(HEIGHT); *b++ = pack_float(0); *b++ = pack_float(HEIGHT); *b++ = pack_float(0); *b++ = pack_float(0); *b++ = pack_float(0); *b++ = pack_float(0); *b++ = MI_BATCH_BUFFER_END; if ((b - batch) & 1) *b++ = 0; igt_assert(b - batch <= 1024); handle = gem_create(fd, 4096); gem_write(fd, handle, 0, batch, (b-batch)*sizeof(batch[0])); igt_assert(r-reloc == 2); obj[0].handle = dst; obj[0].relocation_count = 0; obj[0].relocs_ptr = 0; obj[0].alignment = 0; obj[0].offset = 0; obj[0].flags = 0; obj[0].rsvd1 = 0; obj[0].rsvd2 = 0; obj[1].handle = src; obj[1].relocation_count = 0; obj[1].relocs_ptr = 0; obj[1].alignment = 0; obj[1].offset = 0; obj[1].flags = 0; obj[1].rsvd1 = 0; obj[1].rsvd2 = 0; obj[2].handle = handle; obj[2].relocation_count = 2; obj[2].relocs_ptr = (uintptr_t)reloc; obj[2].alignment = 0; obj[2].offset = 0; obj[2].flags = 0; obj[2].rsvd1 = obj[2].rsvd2 = 0; exec.buffers_ptr = (uintptr_t)obj; exec.buffer_count = 3; exec.batch_start_offset = 0; exec.batch_len = (b-batch)*sizeof(batch[0]); exec.DR1 = exec.DR4 = 0; exec.num_cliprects = 0; exec.cliprects_ptr = 0; exec.flags = 0; i915_execbuffer2_set_context_id(exec, 0); exec.rsvd2 = 0; ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &exec); while (ret && errno == EBUSY) { drmCommandNone(fd, DRM_I915_GEM_THROTTLE); ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &exec); } igt_assert_eq(ret, 0); gem_close(fd, handle); } static uint32_t create_bo(int fd, uint32_t val) { uint32_t handle; int i; handle = gem_create(fd, sizeof(linear)); /* Fill the BO with dwords starting at val */ for (i = 0; i < WIDTH*HEIGHT; i++) linear[i] = val++; gem_write(fd, handle, 0, linear, sizeof(linear)); return handle; } static void check_bo(int fd, uint32_t handle, uint32_t val) { int i; gem_read(fd, handle, 0, linear, sizeof(linear)); for (i = 0; i < WIDTH*HEIGHT; i++) { igt_assert_f(linear[i] == val, "Expected 0x%08x, found 0x%08x " "at offset 0x%08x\n", val, linear[i], i * 4); val++; } } int main(int argc, char **argv) { uint32_t *handle, *start_val; uint32_t start = 0; int i, fd, count; igt_simple_init(argc, argv); fd = drm_open_driver(DRIVER_INTEL); igt_require(IS_GEN3(intel_get_drm_devid(fd))); count = 0; if (argc > 1) count = atoi(argv[1]); if (count == 0) count = 3 * gem_aperture_size(fd) / (1024*1024) / 2; igt_info("Using %d 1MiB buffers\n", count); handle = malloc(sizeof(uint32_t)*count*2); start_val = handle + count; for (i = 0; i < count; i++) { handle[i] = create_bo(fd, start); start_val[i] = start; start += 1024 * 1024 / 4; } igt_info("Verifying initialisation...\n"); for (i = 0; i < count; i++) check_bo(fd, handle[i], start_val[i]); igt_info("Cyclic blits, forward...\n"); for (i = 0; i < count * 4; i++) { int src = i % count; int dst = (i + 1) % count; copy(fd, handle[dst], handle[src]); start_val[dst] = start_val[src]; } for (i = 0; i < count; i++) check_bo(fd, handle[i], start_val[i]); igt_info("Cyclic blits, backward...\n"); for (i = 0; i < count * 4; i++) { int src = (i + 1) % count; int dst = i % count; copy(fd, handle[dst], handle[src]); start_val[dst] = start_val[src]; } for (i = 0; i < count; i++) check_bo(fd, handle[i], start_val[i]); igt_info("Random blits...\n"); for (i = 0; i < count * 4; i++) { int src = random() % count; int dst = random() % count; if (src == dst) continue; copy(fd, handle[dst], handle[src]); start_val[dst] = start_val[src]; } for (i = 0; i < count; i++) check_bo(fd, handle[i], start_val[i]); igt_exit(); } intel-gpu-tools-1.14/tests/gem_flink_basic.c0000644000175000017500000001022512665336131016032 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * */ #include "igt.h" #include #include #include #include #include #include #include #include #include "drm.h" static void test_flink(int fd) { struct drm_i915_gem_create create; struct drm_gem_flink flink; struct drm_gem_open open_struct; int ret; igt_info("Testing flink and open.\n"); memset(&create, 0, sizeof(create)); create.size = 16 * 1024; ret = ioctl(fd, DRM_IOCTL_I915_GEM_CREATE, &create); igt_assert_eq(ret, 0); flink.handle = create.handle; ret = ioctl(fd, DRM_IOCTL_GEM_FLINK, &flink); igt_assert_eq(ret, 0); open_struct.name = flink.name; ret = ioctl(fd, DRM_IOCTL_GEM_OPEN, &open_struct); igt_assert_eq(ret, 0); igt_assert(open_struct.handle != 0); } static void test_double_flink(int fd) { struct drm_i915_gem_create create; struct drm_gem_flink flink; struct drm_gem_flink flink2; int ret; igt_info("Testing repeated flink.\n"); memset(&create, 0, sizeof(create)); create.size = 16 * 1024; ret = ioctl(fd, DRM_IOCTL_I915_GEM_CREATE, &create); igt_assert_eq(ret, 0); flink.handle = create.handle; ret = ioctl(fd, DRM_IOCTL_GEM_FLINK, &flink); igt_assert_eq(ret, 0); flink2.handle = create.handle; ret = ioctl(fd, DRM_IOCTL_GEM_FLINK, &flink2); igt_assert_eq(ret, 0); igt_assert(flink2.name == flink.name); } static void test_bad_flink(int fd) { struct drm_gem_flink flink; int ret; igt_info("Testing error return on bad flink ioctl.\n"); flink.handle = 0x10101010; ret = ioctl(fd, DRM_IOCTL_GEM_FLINK, &flink); igt_assert(ret == -1 && errno == ENOENT); } static void test_bad_open(int fd) { struct drm_gem_open open_struct; int ret; igt_info("Testing error return on bad open ioctl.\n"); open_struct.name = 0x10101010; ret = ioctl(fd, DRM_IOCTL_GEM_OPEN, &open_struct); igt_assert(ret == -1 && errno == ENOENT); } static void test_flink_lifetime(int fd) { struct drm_i915_gem_create create; struct drm_gem_flink flink; struct drm_gem_open open_struct; int ret, fd2; igt_info("Testing flink lifetime.\n"); fd2 = drm_open_driver(DRIVER_INTEL); memset(&create, 0, sizeof(create)); create.size = 16 * 1024; ret = ioctl(fd2, DRM_IOCTL_I915_GEM_CREATE, &create); igt_assert_eq(ret, 0); flink.handle = create.handle; ret = ioctl(fd2, DRM_IOCTL_GEM_FLINK, &flink); igt_assert_eq(ret, 0); open_struct.name = flink.name; ret = ioctl(fd, DRM_IOCTL_GEM_OPEN, &open_struct); igt_assert_eq(ret, 0); igt_assert(open_struct.handle != 0); close(fd2); fd2 = drm_open_driver(DRIVER_INTEL); open_struct.name = flink.name; ret = ioctl(fd2, DRM_IOCTL_GEM_OPEN, &open_struct); igt_assert_eq(ret, 0); igt_assert(open_struct.handle != 0); } int fd; igt_main { igt_fixture fd = drm_open_driver(DRIVER_INTEL); igt_subtest("basic") test_flink(fd); igt_subtest("double-flink") test_double_flink(fd); igt_subtest("bad-flink") test_bad_flink(fd); igt_subtest("bad-open") test_bad_open(fd); igt_subtest("flink-lifetime") test_flink_lifetime(fd); } intel-gpu-tools-1.14/tests/kms_flip.c0000644000175000017500000014043512665336131014551 00000000000000/* * Copyright 2012 Intel Corporation * Jesse Barnes * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "igt.h" #include #include #include #include #include #include #include #include #include #ifdef HAVE_LINUX_KD_H #include #elif HAVE_SYS_KD_H #include #endif #include #include #define TEST_DPMS (1 << 0) #define TEST_WITH_DUMMY_BCS (1 << 1) #define TEST_WITH_DUMMY_RCS (1 << 2) #define TEST_PAN (1 << 3) #define TEST_MODESET (1 << 4) #define TEST_CHECK_TS (1 << 5) #define TEST_EBUSY (1 << 6) #define TEST_EINVAL (1 << 7) #define TEST_FLIP (1 << 8) #define TEST_VBLANK (1 << 9) #define TEST_VBLANK_BLOCK (1 << 10) #define TEST_VBLANK_ABSOLUTE (1 << 11) #define TEST_VBLANK_EXPIRED_SEQ (1 << 12) #define TEST_FB_RECREATE (1 << 13) #define TEST_RMFB (1 << 14) #define TEST_HANG (1 << 15) #define TEST_NOEVENT (1 << 16) #define TEST_FB_BAD_TILING (1 << 17) #define TEST_SINGLE_BUFFER (1 << 18) #define TEST_DPMS_OFF (1 << 19) #define TEST_NO_2X_OUTPUT (1 << 20) #define TEST_DPMS_OFF_OTHERS (1 << 21) #define TEST_ENOENT (1 << 22) #define TEST_FENCE_STRESS (1 << 23) #define TEST_VBLANK_RACE (1 << 24) #define TEST_RPM (1 << 25) #define TEST_SUSPEND (1 << 26) #define TEST_TS_CONT (1 << 27) #define TEST_BO_TOOBIG (1 << 28) #define TEST_HANG_ONCE (1 << 29) #define TEST_BASIC (1 << 30) #define EVENT_FLIP (1 << 0) #define EVENT_VBLANK (1 << 1) #ifndef DRM_CAP_TIMESTAMP_MONOTONIC #define DRM_CAP_TIMESTAMP_MONOTONIC 6 #endif #define USEC_PER_SEC 1000000L #define NSEC_PER_SEC 1000000000L drmModeRes *resources; int drm_fd; static drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; uint32_t devid; int test_time = 3; static bool monotonic_timestamp; static pthread_t vblank_wait_thread; static drmModeConnector *last_connector; uint32_t *fb_ptr; struct type_name { int type; const char *name; }; struct event_state { const char *name; /* * Event data for the last event that has already passed our check. * Updated using the below current_* vars in update_state(). */ struct timeval last_ts; /* kernel reported timestamp */ struct timeval last_received_ts; /* the moment we received it */ unsigned int last_seq; /* kernel reported seq. num */ /* * Event data for for the current event that we just received and * going to check for validity. Set in event_handler(). */ struct timeval current_ts; /* kernel reported timestamp */ struct timeval current_received_ts; /* the moment we received it */ unsigned int current_seq; /* kernel reported seq. num */ int count; /* # of events of this type */ /* Step between the current and next 'target' sequence number. */ int seq_step; }; static void dump_event_state(const struct event_state *es) { igt_debug("name = %s\n" "last_ts = %ld.%ld usec\n" "last_received_ts = %ld.%ld usec\n" "last_seq = %u\n" "current_ts = %ld.%ld usec\n" "current_received_ts = %ld.%ld usec\n" "current_seq = %u\n" "count = %u\n" "seq_step = %d\n", es->name, es->last_ts.tv_sec, es->last_ts.tv_usec, es->last_received_ts.tv_sec, es->last_received_ts.tv_usec, es->last_seq, es->current_ts.tv_sec, es->current_ts.tv_usec, es->current_received_ts.tv_sec, es->current_received_ts.tv_usec, es->current_seq, es->count, es->seq_step); } struct test_output { int mode_valid; drmModeModeInfo kmode[4]; drmModeEncoder *kencoder[4]; drmModeConnector *kconnector[4]; uint32_t _connector[4]; uint32_t _crtc[4]; int _pipe[4]; int count; /* 1:1 mapping between crtc:connector */ int flags; int pipe; /* primary pipe for vblank */ unsigned int current_fb_id; unsigned int fb_width; unsigned int fb_height; unsigned int fb_ids[3]; int bpp, depth; struct igt_fb fb_info[3]; struct event_state flip_state; struct event_state vblank_state; /* Overall step between each round */ int seq_step; unsigned int pending_events; int flip_count; }; static unsigned long gettime_us(void) { struct timespec ts; clock_gettime(CLOCK_MONOTONIC, &ts); return ts.tv_sec * 1000000 + ts.tv_nsec / 1000; } static int calibrate_dummy_load(struct test_output *o, const char *ring_name, int (*emit)(struct test_output *o, int limit, int timeout)) { unsigned long start; int ops = 1; start = gettime_us(); do { unsigned long diff; int ret; ret = emit(o, (ops+1)/2, 10); diff = gettime_us() - start; if (ret || diff / USEC_PER_SEC >= 1) break; ops += ops; } while (ops < 100000); igt_debug("%s dummy load calibrated: %d operations / second\n", ring_name, ops); return ops; } static void blit_copy(drm_intel_bo *dst, drm_intel_bo *src, unsigned int width, unsigned int height, unsigned int dst_pitch, unsigned int src_pitch) { BLIT_COPY_BATCH_START(0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ dst_pitch); OUT_BATCH(0 << 16 | 0); OUT_BATCH(height << 16 | width); OUT_RELOC_FENCED(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(0 << 16 | 0); OUT_BATCH(src_pitch); OUT_RELOC_FENCED(src, I915_GEM_DOMAIN_RENDER, 0, 0); ADVANCE_BATCH(); if (batch->gen >= 6) { BEGIN_BATCH(3, 0); OUT_BATCH(XY_SETUP_CLIP_BLT_CMD); OUT_BATCH(0); OUT_BATCH(0); ADVANCE_BATCH(); } } static int _emit_dummy_load__bcs(struct test_output *o, int limit, int timeout) { int i, ret = 0; drm_intel_bo *src_bo, *dst_bo, *fb_bo; struct igt_fb *fb_info = &o->fb_info[o->current_fb_id]; src_bo = drm_intel_bo_alloc(bufmgr, "dummy_bo", 2048*2048*4, 4096); igt_assert(src_bo); dst_bo = drm_intel_bo_alloc(bufmgr, "dummy_bo", 2048*2048*4, 4096); igt_assert(dst_bo); fb_bo = gem_handle_to_libdrm_bo(bufmgr, drm_fd, "imported", fb_info->gem_handle); igt_assert(fb_bo); for (i = 0; i < limit; i++) { blit_copy(dst_bo, src_bo, 2048, 2048, 2048*4, 2048*4); igt_swap(src_bo, dst_bo); } blit_copy(fb_bo, src_bo, min(o->fb_width, 2048), min(o->fb_height, 2048), fb_info->stride, 2048*4); intel_batchbuffer_flush(batch); if (timeout > 0) ret = drm_intel_gem_bo_wait(fb_bo, timeout * NSEC_PER_SEC); drm_intel_bo_unreference(src_bo); drm_intel_bo_unreference(dst_bo); drm_intel_bo_unreference(fb_bo); return ret; } static void emit_dummy_load__bcs(struct test_output *o, int seconds) { static int ops_per_sec; if (ops_per_sec == 0) ops_per_sec = calibrate_dummy_load(o, "bcs", _emit_dummy_load__bcs); _emit_dummy_load__bcs(o, seconds * ops_per_sec, 0); } static void emit_fence_stress(struct test_output *o) { const int num_fences = gem_available_fences(drm_fd); struct igt_fb *fb_info = &o->fb_info[o->current_fb_id]; struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 *exec; uint32_t buf[2] = { MI_BATCH_BUFFER_END, 0 }; drm_intel_bo **bo; int i; bo = calloc(sizeof(*bo), num_fences); exec = calloc(sizeof(*exec), num_fences+1); for (i = 0; i < num_fences - 1; i++) { uint32_t tiling = I915_TILING_X; unsigned long pitch = 0; bo[i] = drm_intel_bo_alloc_tiled(bufmgr, "X tiled bo", 1024, 1024, 4, &tiling, &pitch, 0); exec[i].handle = bo[i]->handle; exec[i].flags = EXEC_OBJECT_NEEDS_FENCE; } exec[i].handle = fb_info->gem_handle; exec[i].flags = EXEC_OBJECT_NEEDS_FENCE; exec[++i].handle = gem_create(drm_fd, 4096); gem_write(drm_fd, exec[i].handle, 0, buf, sizeof(buf)); memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)exec; execbuf.buffer_count = i + 1; execbuf.batch_len = sizeof(buf); if (HAS_BLT_RING(intel_get_drm_devid(drm_fd))) execbuf.flags = I915_EXEC_BLT; gem_execbuf(drm_fd, &execbuf); gem_close(drm_fd, exec[i].handle); for (i = 0; i < num_fences - 1; i++) drm_intel_bo_unreference(bo[i]); free(bo); free(exec); } static int _emit_dummy_load__rcs(struct test_output *o, int limit, int timeout) { const struct igt_fb *fb_info = &o->fb_info[o->current_fb_id]; igt_render_copyfunc_t copyfunc; struct igt_buf sb[3], *src, *dst, *fb; int i, ret = 0; copyfunc = igt_get_render_copyfunc(devid); if (copyfunc == NULL) return _emit_dummy_load__bcs(o, limit, timeout); sb[0].bo = drm_intel_bo_alloc(bufmgr, "dummy_bo", 2048*2048*4, 4096); igt_assert(sb[0].bo); sb[0].size = sb[0].bo->size; sb[0].tiling = I915_TILING_NONE; sb[0].data = NULL; sb[0].num_tiles = sb[0].bo->size; sb[0].stride = 4 * 2048; sb[1].bo = drm_intel_bo_alloc(bufmgr, "dummy_bo", 2048*2048*4, 4096); igt_assert(sb[1].bo); sb[1].size = sb[1].bo->size; sb[1].tiling = I915_TILING_NONE; sb[1].data = NULL; sb[1].num_tiles = sb[1].bo->size; sb[1].stride = 4 * 2048; sb[2].bo = gem_handle_to_libdrm_bo(bufmgr, drm_fd, "imported", fb_info->gem_handle); igt_assert(sb[2].bo); sb[2].size = sb[2].bo->size; sb[2].tiling = fb_info->tiling; sb[2].data = NULL; sb[2].num_tiles = sb[2].bo->size; sb[2].stride = fb_info->stride; src = &sb[0]; dst = &sb[1]; fb = &sb[2]; for (i = 0; i < limit; i++) { copyfunc(batch, NULL, src, 0, 0, 2048, 2048, dst, 0, 0); igt_swap(src, dst); } copyfunc(batch, NULL, src, 0, 0, min(o->fb_width, 2048), min(o->fb_height, 2048), fb, 0, 0); intel_batchbuffer_flush(batch); if (timeout > 0) ret = drm_intel_gem_bo_wait(fb->bo, timeout * NSEC_PER_SEC); drm_intel_bo_unreference(sb[0].bo); drm_intel_bo_unreference(sb[1].bo); drm_intel_bo_unreference(sb[2].bo); return ret; } static void emit_dummy_load__rcs(struct test_output *o, int seconds) { static int ops_per_sec; if (ops_per_sec == 0) ops_per_sec = calibrate_dummy_load(o, "rcs", _emit_dummy_load__rcs); _emit_dummy_load__bcs(o, seconds * ops_per_sec, 0); } static void dpms_off_other_outputs(struct test_output *o) { int i, n; drmModeConnector *connector; uint32_t connector_id; for (i = 0; i < resources->count_connectors; i++) { connector_id = resources->connectors[i]; for (n = 0; n < o->count; n++) { if (connector_id == o->kconnector[n]->connector_id) goto next; } connector = drmModeGetConnectorCurrent(drm_fd, connector_id); kmstest_set_connector_dpms(drm_fd, connector, DRM_MODE_DPMS_ON); kmstest_set_connector_dpms(drm_fd, connector, DRM_MODE_DPMS_OFF); drmModeFreeConnector(connector); next: ; } } static void set_dpms(struct test_output *o, int mode) { for (int n = 0; n < o->count; n++) kmstest_set_connector_dpms(drm_fd, o->kconnector[n], mode); } static void set_flag(unsigned int *v, unsigned int flag) { igt_assert(!(*v & flag)); *v |= flag; } static void clear_flag(unsigned int *v, unsigned int flag) { igt_assert(*v & flag); *v &= ~flag; } static int do_page_flip(struct test_output *o, uint32_t fb_id, bool event) { int n, ret = 0; o->flip_count = 0; for (n = 0; ret == 0 && n < o->count; n++) ret = drmModePageFlip(drm_fd, o->_crtc[n], fb_id, event ? DRM_MODE_PAGE_FLIP_EVENT : 0, event ? (void *)((unsigned long)o | (n==0)) : NULL); if (ret == 0 && event) set_flag(&o->pending_events, EVENT_FLIP); return ret; } struct vblank_reply { unsigned int sequence; struct timeval ts; }; static int __wait_for_vblank(unsigned int flags, int crtc_idx, int target_seq, unsigned long ret_data, struct vblank_reply *reply) { drmVBlank wait_vbl; int ret; unsigned crtc_idx_mask; bool event = !(flags & TEST_VBLANK_BLOCK); memset(&wait_vbl, 0, sizeof(wait_vbl)); crtc_idx_mask = crtc_idx << DRM_VBLANK_HIGH_CRTC_SHIFT; igt_assert(!(crtc_idx_mask & ~DRM_VBLANK_HIGH_CRTC_MASK)); wait_vbl.request.type = crtc_idx_mask; if (flags & TEST_VBLANK_ABSOLUTE) wait_vbl.request.type |= DRM_VBLANK_ABSOLUTE; else wait_vbl.request.type |= DRM_VBLANK_RELATIVE; if (event) { wait_vbl.request.type |= DRM_VBLANK_EVENT; wait_vbl.request.signal = ret_data; } wait_vbl.request.sequence = target_seq; ret = drmWaitVBlank(drm_fd, &wait_vbl); if (ret == 0) { reply->ts.tv_sec = wait_vbl.reply.tval_sec; reply->ts.tv_usec = wait_vbl.reply.tval_usec; reply->sequence = wait_vbl.reply.sequence; } else ret = -errno; return ret; } static int do_wait_for_vblank(struct test_output *o, int pipe_id, int target_seq, struct vblank_reply *reply) { int ret; unsigned flags = o->flags; /* Absolute waits only works once we have a frame counter. */ if (!(o->vblank_state.count > 0)) flags &= ~TEST_VBLANK_ABSOLUTE; ret = __wait_for_vblank(flags, pipe_id, target_seq, (unsigned long)o, reply); if (ret == 0 && !(o->flags & TEST_VBLANK_BLOCK)) set_flag(&o->pending_events, EVENT_VBLANK); return ret; } static bool analog_tv_connector(struct test_output *o) { uint32_t connector_type = o->kconnector[0]->connector_type; return connector_type == DRM_MODE_CONNECTOR_TV || connector_type == DRM_MODE_CONNECTOR_9PinDIN || connector_type == DRM_MODE_CONNECTOR_SVIDEO || connector_type == DRM_MODE_CONNECTOR_Composite; } static void event_handler(struct event_state *es, unsigned int frame, unsigned int sec, unsigned int usec) { struct timeval now; if (monotonic_timestamp) { struct timespec ts; clock_gettime(CLOCK_MONOTONIC, &ts); now.tv_sec = ts.tv_sec; now.tv_usec = ts.tv_nsec / 1000; } else { gettimeofday(&now, NULL); } es->current_received_ts = now; es->current_ts.tv_sec = sec; es->current_ts.tv_usec = usec; es->current_seq = frame; } static void page_flip_handler(int fd, unsigned int frame, unsigned int sec, unsigned int usec, void *data) { int primary = (unsigned long)data & 1; struct test_output *o = (void *)((unsigned long)data & ~ 1); if (++o->flip_count == o->count) clear_flag(&o->pending_events, EVENT_FLIP); if (primary) event_handler(&o->flip_state, frame, sec, usec); } static double frame_time(struct test_output *o) { return 1000.0 * o->kmode[0].htotal * o->kmode[0].vtotal / o->kmode[0].clock; } static void *vblank_wait_thread_func(void *data) { struct test_output *o = data; struct vblank_reply reply; int i; for (i = 0; i < 32; i++) { unsigned long start = gettime_us(); __wait_for_vblank(TEST_VBLANK_BLOCK, o->pipe, 20, (unsigned long)o, &reply); if (gettime_us() - start > 2 * frame_time(o)) return (void*)1; } return 0; } static void spawn_vblank_wait_thread(struct test_output *o) { igt_assert(pthread_create(&vblank_wait_thread, NULL, vblank_wait_thread_func, o) == 0); } static void join_vblank_wait_thread(void) { igt_assert(pthread_join(vblank_wait_thread, NULL) == 0); } static void fixup_premature_vblank_ts(struct test_output *o, struct event_state *es) { /* * In case a power off event preempts the completion of a * wait-for-vblank event the kernel will return a wf-vblank event with * a zeroed-out timestamp. In order that check_state() doesn't * complain replace this ts with a valid ts. As we can't calculate the * exact timestamp, just use the time we received the event. */ struct timeval tv; if (!(o->flags & (TEST_DPMS | TEST_MODESET))) return; if (o->vblank_state.current_ts.tv_sec != 0 || o->vblank_state.current_ts.tv_usec != 0) return; tv.tv_sec = 0; tv.tv_usec = 1; timersub(&es->current_received_ts, &tv, &es->current_ts); } static void vblank_handler(int fd, unsigned int frame, unsigned int sec, unsigned int usec, void *data) { struct test_output *o = data; clear_flag(&o->pending_events, EVENT_VBLANK); event_handler(&o->vblank_state, frame, sec, usec); fixup_premature_vblank_ts(o, &o->vblank_state); } static void check_state(struct test_output *o, struct event_state *es) { struct timeval diff; double usec_interflip; dump_event_state(es); timersub(&es->current_ts, &es->current_received_ts, &diff); if (!analog_tv_connector(o)) { igt_assert_f(diff.tv_sec < 0 || (diff.tv_sec == 0 && diff.tv_usec <= 2000), "%s ts delayed for too long: %lds, %ldusec\n", es->name, diff.tv_sec, diff.tv_usec); } if (es->count == 0) return; timersub(&es->current_ts, &es->last_received_ts, &diff); igt_assert_f(timercmp(&es->last_received_ts, &es->current_ts, <), "%s ts before the %s was issued!\n" "timerdiff %lds, %ldusec\n", es->name, es->name, diff.tv_sec, diff.tv_usec); /* check only valid if no modeset happens in between, that increments by * (1 << 23) on each step. This bounding matches the one in * DRM_IOCTL_WAIT_VBLANK. */ if (!(o->flags & (TEST_DPMS | TEST_MODESET))) igt_assert_f(es->current_seq - (es->last_seq + o->seq_step) <= 1UL << 23, "unexpected %s seq %u, should be >= %u\n", es->name, es->current_seq, es->last_seq + o->seq_step); /* Check that the vblank frame didn't wrap unexpectedly. */ if (o->flags & TEST_TS_CONT) { /* Ignore seq_step here since vblank waits time out immediately * when we kill the crtc. */ igt_assert_f(es->current_seq - es->last_seq >= 0, "unexpected %s seq %u, should be >= %u\n", es->name, es->current_seq, es->last_seq); igt_assert_f(es->current_seq - es->last_seq <= 150, "unexpected %s seq %u, should be < %u\n", es->name, es->current_seq, es->last_seq + 150); igt_debug("testing ts continuity: Current frame %u, old frame %u\n", es->current_seq, es->last_seq); } if ((o->flags & TEST_CHECK_TS) && (!analog_tv_connector(o))) { timersub(&es->current_ts, &es->last_ts, &diff); usec_interflip = (double)o->seq_step * frame_time(o); igt_assert_f(fabs((((double) diff.tv_usec) - usec_interflip) / usec_interflip) <= 0.005, "inter-%s ts jitter: %lds, %ldusec\n", es->name, diff.tv_sec, diff.tv_usec); igt_assert_f(es->current_seq == es->last_seq + o->seq_step, "unexpected %s seq %u, expected %u\n", es->name, es->current_seq, es->last_seq + o->seq_step); } } static void check_state_correlation(struct test_output *o, struct event_state *es1, struct event_state *es2) { struct timeval tv_diff; double ftime; double usec_diff; int seq_diff; if (es1->count == 0 || es2->count == 0) return; timersub(&es2->current_ts, &es1->current_ts, &tv_diff); usec_diff = tv_diff.tv_sec * 1000 * 1000 + tv_diff.tv_usec; seq_diff = es2->current_seq - es1->current_seq; ftime = frame_time(o); usec_diff -= seq_diff * ftime; igt_assert_f(fabs(usec_diff) / ftime <= 0.005, "timestamp mismatch between %s and %s (diff %.4f sec)\n", es1->name, es2->name, usec_diff / 1000 / 1000); } static void check_all_state(struct test_output *o, unsigned int completed_events) { bool flip, vblank; flip = completed_events & EVENT_FLIP; vblank = completed_events & EVENT_VBLANK; if (flip) check_state(o, &o->flip_state); if (vblank) check_state(o, &o->vblank_state); /* FIXME: Correlation check is broken. */ if (flip && vblank && 0) check_state_correlation(o, &o->flip_state, &o->vblank_state); } static void recreate_fb(struct test_output *o) { drmModeFBPtr r; struct igt_fb *fb_info = &o->fb_info[o->current_fb_id]; uint32_t new_fb_id; /* Call rmfb/getfb/addfb to ensure those don't introduce stalls */ r = drmModeGetFB(drm_fd, fb_info->fb_id); igt_assert(r); do_or_die(drmModeAddFB(drm_fd, o->fb_width, o->fb_height, o->depth, o->bpp, fb_info->stride, r->handle, &new_fb_id)); gem_close(drm_fd, r->handle); drmFree(r); do_or_die(drmModeRmFB(drm_fd, fb_info->fb_id)); o->fb_ids[o->current_fb_id] = new_fb_id; o->fb_info[o->current_fb_id].fb_id = new_fb_id; } static void set_y_tiling(struct test_output *o, int fb_idx) { drmModeFBPtr r; struct igt_fb *fb_info = &o->fb_info[fb_idx]; /* Call rmfb/getfb/addfb to ensure those don't introduce stalls */ r = drmModeGetFB(drm_fd, fb_info->fb_id); igt_assert(r); /* Newer kernels don't allow such shenagians any more, so skip the test. */ igt_require(__gem_set_tiling(drm_fd, r->handle, I915_TILING_Y, fb_info->stride) == 0); gem_close(drm_fd, r->handle); drmFree(r); } static void stop_rings(bool stop) { if (stop) igt_set_stop_rings(STOP_RING_DEFAULTS); else igt_set_stop_rings(STOP_RING_NONE); } static void eat_error_state(void) { static const char dfs_entry_error[] = "i915_error_state"; static const char data[] = ""; int fd; fd = igt_debugfs_open(dfs_entry_error, O_WRONLY); igt_assert_lte(0, fd); igt_assert(write(fd, data, sizeof(data)) == sizeof(data)); close(fd); /* and check whether stop_rings is not reset, i.e. the hang has indeed * happened */ igt_assert_f(igt_get_stop_rings() == STOP_RING_NONE, "no gpu hang detected, stop_rings is still 0x%x\n", igt_get_stop_rings()); close(fd); } static void unhang_gpu(int fd, uint32_t handle) { gem_sync(drm_fd, handle); gem_close(drm_fd, handle); eat_error_state(); stop_rings(false); } static uint32_t hang_gpu(int fd) { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 gem_exec; uint32_t b[2] = {MI_BATCH_BUFFER_END}; stop_rings(true); memset(&gem_exec, 0, sizeof(gem_exec)); gem_exec.handle = gem_create(fd, 4096); gem_write(fd, gem_exec.handle, 0, b, sizeof(b)); memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)&gem_exec; execbuf.buffer_count = 1; execbuf.batch_len = sizeof(b); if (drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf)) { igt_assert_f(errno == EIO, "failed to exercise page flip hang recovery\n"); unhang_gpu(fd, gem_exec.handle); gem_exec.handle = 0; } return gem_exec.handle; } static bool is_hung(int fd) { if (drmIoctl(fd, DRM_IOCTL_I915_GEM_THROTTLE, 0) == 0) return false; return errno == EIO; } static int set_mode(struct test_output *o, uint32_t fb, int x, int y) { int n; for (n = o->count - 1; n >= 0; n--) { if (fb == 0) { int ret = drmModeSetCrtc(drm_fd, o->_crtc[n], 0, 0, 0, 0, 0, 0); if (ret) return ret; } else { int ret = drmModeSetCrtc(drm_fd, o->_crtc[n], fb, x, y, &o->_connector[n], 1, &o->kmode[n]); if (ret) return ret; } } return 0; } /* Return mask of completed events. */ static unsigned int run_test_step(struct test_output *o) { unsigned int new_fb_id; /* for funny reasons page_flip returns -EBUSY on disabled crtcs ... */ int expected_einval = o->flags & TEST_MODESET ? -EBUSY : -EINVAL; unsigned int completed_events = 0; bool do_flip; bool do_vblank; struct vblank_reply vbl_reply; unsigned int target_seq; uint32_t hang = 0; /* Suppress GCC warning */ target_seq = o->vblank_state.seq_step; /* Absolute waits only works once we have a frame counter. */ if (o->flags & TEST_VBLANK_ABSOLUTE && o->vblank_state.count > 0) target_seq += o->vblank_state.last_seq; /* * It's possible that we don't have a pending flip here, in case both * wf-vblank and flip were scheduled and the wf-vblank event was * delivered earlier. The same applies to vblank events w.r.t flip. */ do_flip = (o->flags & TEST_FLIP) && !(o->pending_events & EVENT_FLIP); do_vblank = (o->flags & TEST_VBLANK) && !(o->pending_events & EVENT_VBLANK); if (o->flags & TEST_DPMS_OFF_OTHERS) dpms_off_other_outputs(o); if (!(o->flags & TEST_SINGLE_BUFFER)) o->current_fb_id = !o->current_fb_id; if (o->flags & TEST_WITH_DUMMY_BCS) emit_dummy_load__bcs(o, 1); if (o->flags & TEST_WITH_DUMMY_RCS) emit_dummy_load__rcs(o, 1); if (o->flags & TEST_FB_RECREATE) recreate_fb(o); new_fb_id = o->fb_ids[o->current_fb_id]; if (o->flags & TEST_FB_BAD_TILING) new_fb_id = o->fb_ids[2]; if ((o->flags & TEST_VBLANK_EXPIRED_SEQ) && !(o->pending_events & EVENT_VBLANK) && o->flip_state.count > 0) { struct vblank_reply reply; unsigned int exp_seq; unsigned long start; exp_seq = o->flip_state.current_seq; start = gettime_us(); do_or_die(__wait_for_vblank(TEST_VBLANK_ABSOLUTE | TEST_VBLANK_BLOCK, o->pipe, exp_seq, 0, &reply)); igt_assert(gettime_us() - start < 500); igt_assert(reply.sequence == exp_seq); igt_assert(timercmp(&reply.ts, &o->flip_state.last_ts, ==)); } if (o->flags & TEST_ENOENT) { /* hope that fb 0xfffffff0 does not exist */ igt_assert(do_page_flip(o, 0xfffffff0, false) == -ENOENT); igt_assert(set_mode(o, 0xfffffff0, 0, 0) == -ENOENT); } if (do_flip && (o->flags & TEST_EINVAL) && o->flip_state.count > 0) igt_assert(do_page_flip(o, new_fb_id, true) == expected_einval); if (o->flags & TEST_FB_BAD_TILING) new_fb_id = o->fb_ids[o->current_fb_id]; if (do_vblank && (o->flags & TEST_EINVAL) && o->vblank_state.count > 0) igt_assert(do_wait_for_vblank(o, o->pipe, target_seq, &vbl_reply) == -EINVAL); if (o->flags & TEST_VBLANK_RACE) { spawn_vblank_wait_thread(o); if (o->flags & TEST_MODESET) igt_assert_f(set_mode(o, 0 /* no fb */, 0, 0) == 0, "failed to disable output: %s\n", strerror(errno)); } if (o->flags & TEST_DPMS_OFF) set_dpms(o, DRM_MODE_DPMS_OFF); if (o->flags & TEST_MODESET) igt_assert(set_mode(o, o->fb_ids[o->current_fb_id], 0, 0) == 0); if (o->flags & TEST_DPMS) set_dpms(o, DRM_MODE_DPMS_ON); if (o->flags & TEST_VBLANK_RACE) { struct vblank_reply reply; unsigned long start, end; /* modeset/DPMS is done, vblank wait should work normally now */ start = gettime_us(); igt_assert(__wait_for_vblank(TEST_VBLANK_BLOCK, o->pipe, 2, 0, &reply) == 0); end = gettime_us(); /* * we waited for two vblanks, so verify that * we were blocked for ~1-2 frames. */ igt_assert_f(end - start > 0.9 * frame_time(o) && end - start < 2.1 * frame_time(o), "wait for two vblanks took %lu usec (frame time %f usec)\n", end - start, frame_time(o)); join_vblank_wait_thread(); } igt_print_activity(); if (do_flip && (o->flags & TEST_HANG)) { hang = hang_gpu(drm_fd); igt_assert_f(hang, "failed to exercise page flip hang recovery\n"); } /* try to make sure we can issue two flips during the same frame */ if (do_flip && (o->flags & TEST_EBUSY)) { struct vblank_reply reply; igt_assert(__wait_for_vblank(TEST_VBLANK_BLOCK, o->pipe, 1, 0, &reply) == 0); } if (do_flip) do_or_die(do_page_flip(o, new_fb_id, !(o->flags & TEST_NOEVENT))); if (o->flags & TEST_FENCE_STRESS) emit_fence_stress(o); if (do_vblank) { do_or_die(do_wait_for_vblank(o, o->pipe, target_seq, &vbl_reply)); if (o->flags & TEST_VBLANK_BLOCK) { event_handler(&o->vblank_state, vbl_reply.sequence, vbl_reply.ts.tv_sec, vbl_reply.ts.tv_usec); completed_events = EVENT_VBLANK; } } if (do_flip && (o->flags & TEST_EBUSY)) igt_assert(do_page_flip(o, new_fb_id, true) == -EBUSY); if (do_flip && (o->flags & TEST_RMFB)) recreate_fb(o); /* pan before the flip completes */ if (o->flags & TEST_PAN) { int count = do_flip ? o->flip_state.count : o->vblank_state.count; int x_ofs = min(count * 10, o->fb_width - o->kmode[0].hdisplay); /* Make sure DSPSURF changes value */ if (o->flags & TEST_HANG) o->current_fb_id = !o->current_fb_id; /* Make sure DSPSURF changes value */ if (o->flags & TEST_HANG) o->current_fb_id = !o->current_fb_id; igt_assert_f(set_mode(o, o->fb_ids[o->current_fb_id], x_ofs, 0) == 0, "failed to pan (%dx%d@%dHz)+%d: %s\n", o->kmode[0].hdisplay, o->kmode[0].vdisplay, o->kmode[0].vrefresh, x_ofs, strerror(errno)); } if (o->flags & TEST_DPMS) set_dpms(o, DRM_MODE_DPMS_OFF); if (o->flags & TEST_MODESET && !(o->flags & TEST_RMFB) && !(o->flags & TEST_VBLANK_RACE)) igt_assert_f(set_mode(o, 0 /* no fb */, 0, 0) == 0, "failed to disable output: %s\n", strerror(errno)); if (o->flags & TEST_RPM) igt_assert(igt_wait_for_pm_status(IGT_RUNTIME_PM_STATUS_SUSPENDED)); if (o->flags & TEST_SUSPEND) igt_system_suspend_autoresume(); if (do_vblank && (o->flags & TEST_EINVAL) && o->vblank_state.count > 0) igt_assert(do_wait_for_vblank(o, o->pipe, target_seq, &vbl_reply) == -EINVAL); if (do_flip && (o->flags & TEST_EINVAL) && !(o->flags & TEST_FB_BAD_TILING)) igt_assert(do_page_flip(o, new_fb_id, true) == expected_einval); if (hang) unhang_gpu(drm_fd, hang); return completed_events; } static void update_state(struct event_state *es) { es->last_received_ts = es->current_received_ts; es->last_ts = es->current_ts; es->last_seq = es->current_seq; es->count++; } static void update_all_state(struct test_output *o, unsigned int completed_events) { if (completed_events & EVENT_FLIP) update_state(&o->flip_state); if (completed_events & EVENT_VBLANK) update_state(&o->vblank_state); } static void connector_find_preferred_mode(uint32_t connector_id, int crtc_idx, struct test_output *o) { struct kmstest_connector_config config; if (!kmstest_get_connector_config(drm_fd, connector_id, 1 << crtc_idx, &config)) { o->mode_valid = 0; return; } o->pipe = config.pipe; o->kconnector[0] = config.connector; o->kencoder[0] = config.encoder; o->_crtc[0] = config.crtc->crtc_id; o->_pipe[0] = config.pipe; o->kmode[0] = config.default_mode; o->mode_valid = 1; o->fb_width = o->kmode[0].hdisplay; o->fb_height = o->kmode[0].vdisplay; drmModeFreeCrtc(config.crtc); } static bool mode_compatible(const drmModeModeInfo *a, const drmModeModeInfo *b) { int d_refresh; if (a->hdisplay != b->hdisplay) return false; if (a->vdisplay != b->vdisplay) return false; d_refresh = a->vrefresh - b->vrefresh; if (d_refresh < -1 || d_refresh > 1) return false; return true; } static void connector_find_compatible_mode(int crtc_idx0, int crtc_idx1, struct test_output *o) { struct kmstest_connector_config config[2]; drmModeModeInfo *mode[2]; int n, m; if (!kmstest_get_connector_config(drm_fd, o->_connector[0], 1 << crtc_idx0, &config[0])) return; if (!kmstest_get_connector_config(drm_fd, o->_connector[1], 1 << crtc_idx1, &config[1])) { kmstest_free_connector_config(&config[0]); return; } mode[0] = &config[0].default_mode; mode[1] = &config[1].default_mode; if (!mode_compatible(mode[0], mode[1])) { for (n = 0; n < config[0].connector->count_modes; n++) { mode[0] = &config[0].connector->modes[n]; for (m = 0; m < config[1].connector->count_modes; m++) { mode[1] = &config[1].connector->modes[m]; if (mode_compatible(mode[0], mode[1])) goto found; } } /* hope for the best! */ mode[1] = mode[0] = &config[0].default_mode; } found: o->pipe = config[0].pipe; o->fb_width = mode[0]->hdisplay; o->fb_height = mode[0]->vdisplay; o->mode_valid = 1; o->kconnector[0] = config[0].connector; o->kencoder[0] = config[0].encoder; o->_crtc[0] = config[0].crtc->crtc_id; o->_pipe[0] = config[0].pipe; o->kmode[0] = *mode[0]; o->kconnector[1] = config[1].connector; o->kencoder[1] = config[1].encoder; o->_crtc[1] = config[1].crtc->crtc_id; o->_pipe[1] = config[1].pipe; o->kmode[1] = *mode[1]; drmModeFreeCrtc(config[0].crtc); drmModeFreeCrtc(config[1].crtc); } static void paint_flip_mode(struct igt_fb *fb, bool odd_frame) { cairo_t *cr = igt_get_cairo_ctx(drm_fd, fb); int width = fb->width; int height = fb->height; igt_paint_test_pattern(cr, width, height); if (odd_frame) cairo_rectangle(cr, width/4, height/2, width/4, height/8); else cairo_rectangle(cr, width/2, height/2, width/4, height/8); cairo_set_source_rgb(cr, 1, 1, 1); cairo_fill(cr); igt_assert(!cairo_status(cr)); cairo_destroy(cr); } static int fb_is_bound(struct test_output *o, int fb) { int n; for (n = 0; n < o->count; n++) { struct drm_mode_crtc mode; mode.crtc_id = o->_crtc[n]; if (drmIoctl(drm_fd, DRM_IOCTL_MODE_GETCRTC, &mode)) return 0; if (!mode.mode_valid || mode.fb_id != fb) return false; } return true; } static void check_final_state(struct test_output *o, struct event_state *es, unsigned int elapsed) { igt_assert_f(es->count > 0, "no %s event received\n", es->name); /* Verify we drop no frames, but only if it's not a TV encoder, since * those use some funny fake timings behind userspace's back. */ if (o->flags & TEST_CHECK_TS && !analog_tv_connector(o)) { int expected; int count = es->count; count *= o->seq_step; expected = elapsed / frame_time(o); igt_assert_f(count >= expected * 99/100 && count <= expected * 101/100, "dropped frames, expected %d, counted %d, encoder type %d\n", expected, count, o->kencoder[0]->encoder_type); } } /* * Wait until at least one pending event completes. Return mask of completed * events. */ static unsigned int wait_for_events(struct test_output *o) { drmEventContext evctx; struct timeval timeout = { .tv_sec = 3, .tv_usec = 0 }; fd_set fds; unsigned int event_mask; int ret; event_mask = o->pending_events; igt_assert(event_mask); memset(&evctx, 0, sizeof evctx); evctx.version = DRM_EVENT_CONTEXT_VERSION; evctx.vblank_handler = vblank_handler; evctx.page_flip_handler = page_flip_handler; /* make timeout lax with the dummy load */ if (o->flags & (TEST_WITH_DUMMY_BCS | TEST_WITH_DUMMY_RCS)) timeout.tv_sec *= 60; FD_ZERO(&fds); FD_SET(drm_fd, &fds); do { do { ret = select(drm_fd + 1, &fds, NULL, NULL, &timeout); } while (ret < 0 && errno == EINTR); igt_assert_f(ret >= 0, "select error (errno %i)\n", errno); igt_assert_f(ret > 0, "select timed out or error (ret %d)\n", ret); igt_assert_f(!FD_ISSET(0, &fds), "no fds active, breaking\n"); do_or_die(drmHandleEvent(drm_fd, &evctx)); } while (o->pending_events); event_mask ^= o->pending_events; igt_assert(event_mask); return event_mask; } /* Returned the elapsed time in us */ static unsigned event_loop(struct test_output *o, unsigned duration_ms) { unsigned long start, end; uint32_t hang = 0; /* Suppress GCC warning */ int count = 0; if (o->flags & TEST_HANG_ONCE) { hang = hang_gpu(drm_fd); igt_assert_f(hang, "failed to exercise page flip hang recovery\n"); } start = gettime_us(); while (1) { unsigned int completed_events; completed_events = run_test_step(o); if (o->pending_events) completed_events |= wait_for_events(o); check_all_state(o, completed_events); update_all_state(o, completed_events); if (count && (gettime_us() - start) / 1000 >= duration_ms) break; count++; } end = gettime_us(); if (hang) unhang_gpu(drm_fd, hang); /* Flush any remaining events */ if (o->pending_events) wait_for_events(o); return end - start; } static void free_test_output(struct test_output *o) { int i; for (i = 0; i < o->count; i++) { drmModeFreeEncoder(o->kencoder[i]); drmModeFreeConnector(o->kconnector[i]); } } static void run_test_on_crtc_set(struct test_output *o, int *crtc_idxs, int crtc_count, int duration_ms) { char test_name[128]; unsigned elapsed; unsigned bo_size = 0; uint64_t tiling; int i; switch (crtc_count) { case 1: connector_find_preferred_mode(o->_connector[0], crtc_idxs[0], o); if (!o->mode_valid) return; snprintf(test_name, sizeof(test_name), "%s on pipe %s, connector %s-%d", igt_subtest_name(), kmstest_pipe_name(o->_pipe[0]), kmstest_connector_type_str(o->kconnector[0]->connector_type), o->kconnector[0]->connector_type_id); break; case 2: connector_find_compatible_mode(crtc_idxs[0], crtc_idxs[1], o); if (!o->mode_valid) return; snprintf(test_name, sizeof(test_name), "%s on pipe %s:%s, connector %s-%d:%s-%d", igt_subtest_name(), kmstest_pipe_name(o->_pipe[0]), kmstest_pipe_name(o->_pipe[1]), kmstest_connector_type_str(o->kconnector[0]->connector_type), o->kconnector[0]->connector_type_id, kmstest_connector_type_str(o->kconnector[1]->connector_type), o->kconnector[1]->connector_type_id); break; default: igt_assert(0); } igt_assert_eq(o->count, crtc_count); last_connector = o->kconnector[0]; igt_info("Beginning %s\n", test_name); if (o->flags & TEST_PAN) o->fb_width *= 2; tiling = LOCAL_DRM_FORMAT_MOD_NONE; if (o->flags & TEST_FENCE_STRESS) tiling = LOCAL_I915_FORMAT_MOD_X_TILED; /* 256 MB is usually the maximum mappable aperture, * (make it 4x times that to ensure failure) */ if (o->flags & TEST_BO_TOOBIG) bo_size = 4*256*1024*1024; o->fb_ids[0] = igt_create_fb(drm_fd, o->fb_width, o->fb_height, igt_bpp_depth_to_drm_format(o->bpp, o->depth), tiling, &o->fb_info[0]); o->fb_ids[1] = igt_create_fb_with_bo_size(drm_fd, o->fb_width, o->fb_height, igt_bpp_depth_to_drm_format(o->bpp, o->depth), tiling, &o->fb_info[1], bo_size, 0); o->fb_ids[2] = igt_create_fb(drm_fd, o->fb_width, o->fb_height, igt_bpp_depth_to_drm_format(o->bpp, o->depth), LOCAL_I915_FORMAT_MOD_X_TILED, &o->fb_info[2]); igt_assert(o->fb_ids[0]); igt_assert(o->fb_ids[1]); if (o->flags & TEST_FB_BAD_TILING) igt_require(o->fb_ids[2]); paint_flip_mode(&o->fb_info[0], false); if (!(o->flags & TEST_BO_TOOBIG)) paint_flip_mode(&o->fb_info[1], true); if (o->fb_ids[2]) paint_flip_mode(&o->fb_info[2], true); if (o->flags & TEST_FB_BAD_TILING) set_y_tiling(o, 2); for (i = 0; i < o->count; i++) kmstest_dump_mode(&o->kmode[i]); kmstest_unset_all_crtcs(drm_fd, resources); if (set_mode(o, o->fb_ids[0], 0, 0)) { /* We may fail to apply the mode if there are hidden * constraints, such as bandwidth on the third pipe. */ igt_assert_f(crtc_count > 1 || crtc_idxs[0] < 2, "set_mode may only fail on the 3rd pipe or in multiple crtc tests\n"); igt_info("\n%s: SKIPPED\n\n", test_name); goto out; } igt_assert(fb_is_bound(o, o->fb_ids[0])); /* quiescent the hw a bit so ensure we don't miss a single frame */ if (o->flags & TEST_CHECK_TS) sleep(1); if (o->flags & TEST_BO_TOOBIG) { igt_assert_eq(do_page_flip(o, o->fb_ids[1], true), -E2BIG); goto out; } else igt_assert_eq(do_page_flip(o, o->fb_ids[1], true), 0); wait_for_events(o); o->current_fb_id = 1; if (o->flags & TEST_FLIP) o->flip_state.seq_step = 1; else o->flip_state.seq_step = 0; if (o->flags & TEST_VBLANK) o->vblank_state.seq_step = 10; else o->vblank_state.seq_step = 0; /* We run the vblank and flip actions in parallel by default. */ o->seq_step = max(o->vblank_state.seq_step, o->flip_state.seq_step); elapsed = event_loop(o, duration_ms); if (o->flags & TEST_FLIP && !(o->flags & TEST_NOEVENT)) check_final_state(o, &o->flip_state, elapsed); if (o->flags & TEST_VBLANK) check_final_state(o, &o->vblank_state, elapsed); igt_info("\n%s: PASSED\n\n", test_name); out: if (o->fb_ids[2]) igt_remove_fb(drm_fd, &o->fb_info[2]); igt_remove_fb(drm_fd, &o->fb_info[1]); igt_remove_fb(drm_fd, &o->fb_info[0]); last_connector = NULL; free_test_output(o); } static int run_test(int duration, int flags) { struct test_output o; int i, n, modes = 0; igt_require((flags & TEST_HANG) == 0 || !is_hung(drm_fd)); if (flags & TEST_RPM) igt_require(igt_setup_runtime_pm()); resources = drmModeGetResources(drm_fd); igt_assert(resources); /* Count output configurations to scale test runtime. */ for (i = 0; i < resources->count_connectors; i++) { for (n = 0; n < resources->count_crtcs; n++) { memset(&o, 0, sizeof(o)); o.count = 1; o._connector[0] = resources->connectors[i]; o.flags = flags; o.flip_state.name = "flip"; o.vblank_state.name = "vblank"; o.bpp = 32; o.depth = 24; connector_find_preferred_mode(o._connector[0], n, &o); if (o.mode_valid) modes++; free_test_output(&o); } } igt_require(modes); duration = duration * 1000 / modes; duration = max(500, duration); /* Find any connected displays */ for (i = 0; i < resources->count_connectors; i++) { for (n = 0; n < resources->count_crtcs; n++) { int crtc_idx; memset(&o, 0, sizeof(o)); o.count = 1; o._connector[0] = resources->connectors[i]; o.flags = flags; o.flip_state.name = "flip"; o.vblank_state.name = "vblank"; o.bpp = 32; o.depth = 24; crtc_idx = n; run_test_on_crtc_set(&o, &crtc_idx, 1, duration); } } drmModeFreeResources(resources); return 1; } static int run_pair(int duration, int flags) { struct test_output o; int i, j, m, n, modes = 0; igt_require((flags & TEST_HANG) == 0 || !is_hung(drm_fd)); resources = drmModeGetResources(drm_fd); igt_assert(resources); /* Find a pair of connected displays */ for (i = 0; i < resources->count_connectors; i++) { for (n = 0; n < resources->count_crtcs; n++) { for (j = i + 1; j < resources->count_connectors; j++) { for (m = n + 1; m < resources->count_crtcs; m++) { memset(&o, 0, sizeof(o)); o.count = 2; o._connector[0] = resources->connectors[i]; o._connector[1] = resources->connectors[j]; o.flags = flags; o.flip_state.name = "flip"; o.vblank_state.name = "vblank"; o.bpp = 32; o.depth = 24; connector_find_compatible_mode(n, m, &o); if (o.mode_valid) modes++; free_test_output(&o); } } } } /* If we have fewer than 2 connected outputs then we won't have any * configuration at all. So skip in that case. */ igt_require_f(modes, "At least two displays required\n"); duration = duration * 1000 / modes; duration = max(duration, 500); /* Find a pair of connected displays */ for (i = 0; i < resources->count_connectors; i++) { for (n = 0; n < resources->count_crtcs; n++) { for (j = i + 1; j < resources->count_connectors; j++) { for (m = n + 1; m < resources->count_crtcs; m++) { int crtc_idxs[2]; memset(&o, 0, sizeof(o)); o.count = 2; o._connector[0] = resources->connectors[i]; o._connector[1] = resources->connectors[j]; o.flags = flags; o.flip_state.name = "flip"; o.vblank_state.name = "vblank"; o.bpp = 32; o.depth = 24; crtc_idxs[0] = n; crtc_idxs[1] = m; run_test_on_crtc_set(&o, crtc_idxs, 2, duration); } } } } drmModeFreeResources(resources); return 1; } static void get_timestamp_format(void) { uint64_t cap_mono; int ret; ret = drmGetCap(drm_fd, DRM_CAP_TIMESTAMP_MONOTONIC, &cap_mono); igt_assert(ret == 0 || errno == EINVAL); monotonic_timestamp = ret == 0 && cap_mono == 1; igt_info("Using %s timestamps\n", monotonic_timestamp ? "monotonic" : "real"); } static void kms_flip_exit_handler(int sig) { igt_fixture { if (last_connector) kmstest_set_connector_dpms(drm_fd, last_connector, DRM_MODE_DPMS_ON); } } static void test_nonblocking_read(int in) { char buffer[1024]; int fd = dup(in); int ret; ret = -1; if (fd != -1) ret = fcntl(fd, F_GETFL); if (ret != -1) { ret |= O_NONBLOCK; ret = fcntl(fd, F_SETFL, ret); } igt_require(ret != -1); igt_set_timeout(5, "Nonblocking DRM fd reading"); ret = read(fd, buffer, sizeof(buffer)); igt_reset_timeout(); igt_assert_eq(ret, -1); igt_assert_eq(errno, EAGAIN); close(fd); } int main(int argc, char **argv) { struct { int duration; int flags; const char *name; } tests[] = { { 30, TEST_VBLANK, "wf_vblank" }, { 30, TEST_VBLANK | TEST_CHECK_TS, "wf_vblank-ts-check" }, { 30, TEST_VBLANK | TEST_VBLANK_BLOCK | TEST_CHECK_TS, "blocking-wf_vblank" }, { 30, TEST_VBLANK | TEST_VBLANK_ABSOLUTE, "absolute-wf_vblank" }, { 30, TEST_VBLANK | TEST_VBLANK_BLOCK | TEST_VBLANK_ABSOLUTE, "blocking-absolute-wf_vblank" }, { 60, TEST_VBLANK | TEST_DPMS | TEST_EINVAL, "wf_vblank-vs-dpms" }, { 60, TEST_VBLANK | TEST_DPMS | TEST_WITH_DUMMY_BCS, "blt-wf_vblank-vs-dpms" }, { 60, TEST_VBLANK | TEST_DPMS | TEST_WITH_DUMMY_RCS, "rcs-wf_vblank-vs-dpms" }, { 60, TEST_VBLANK | TEST_MODESET | TEST_EINVAL, "wf_vblank-vs-modeset" }, { 60, TEST_VBLANK | TEST_MODESET | TEST_WITH_DUMMY_BCS, "blt-wf_vblank-vs-modeset" }, { 60, TEST_VBLANK | TEST_MODESET | TEST_WITH_DUMMY_RCS, "rcs-wf_vblank-vs-modeset" }, { 30, TEST_FLIP | TEST_BASIC, "plain-flip" }, { 30, TEST_FLIP | TEST_EBUSY , "busy-flip" }, { 30, TEST_FLIP | TEST_FENCE_STRESS , "flip-vs-fences" }, { 30, TEST_FLIP | TEST_CHECK_TS, "plain-flip-ts-check" }, { 30, TEST_FLIP | TEST_CHECK_TS | TEST_FB_RECREATE, "plain-flip-fb-recreate" }, { 30, TEST_FLIP | TEST_RMFB | TEST_MODESET , "flip-vs-rmfb" }, { 60, TEST_FLIP | TEST_DPMS | TEST_EINVAL | TEST_BASIC, "flip-vs-dpms" }, { 60, TEST_FLIP | TEST_DPMS | TEST_WITH_DUMMY_BCS, "blt-flip-vs-dpms" }, { 60, TEST_FLIP | TEST_DPMS | TEST_WITH_DUMMY_RCS, "render-flip-vs-dpms" }, { 30, TEST_FLIP | TEST_PAN, "flip-vs-panning" }, { 60, TEST_FLIP | TEST_PAN | TEST_WITH_DUMMY_BCS, "blt-flip-vs-panning" }, { 60, TEST_FLIP | TEST_PAN | TEST_WITH_DUMMY_RCS, "render-flip-vs-panning" }, { 60, TEST_FLIP | TEST_MODESET | TEST_EINVAL | TEST_BASIC, "flip-vs-modeset" }, { 60, TEST_FLIP | TEST_MODESET | TEST_WITH_DUMMY_BCS, "blt-flip-vs-modeset" }, { 60, TEST_FLIP | TEST_MODESET | TEST_WITH_DUMMY_RCS, "render-flip-vs-modeset" }, { 30, TEST_FLIP | TEST_VBLANK_EXPIRED_SEQ, "flip-vs-expired-vblank" }, { 30, TEST_FLIP | TEST_VBLANK | TEST_VBLANK_ABSOLUTE | TEST_CHECK_TS, "flip-vs-absolute-wf_vblank" }, { 30, TEST_FLIP | TEST_VBLANK | TEST_CHECK_TS | TEST_BASIC, "flip-vs-wf_vblank" }, { 30, TEST_FLIP | TEST_VBLANK | TEST_VBLANK_BLOCK | TEST_CHECK_TS, "flip-vs-blocking-wf-vblank" }, { 30, TEST_FLIP | TEST_MODESET | TEST_HANG | TEST_NOEVENT, "flip-vs-modeset-vs-hang" }, { 30, TEST_FLIP | TEST_PAN | TEST_HANG, "flip-vs-panning-vs-hang" }, { 30, TEST_VBLANK | TEST_HANG_ONCE, "vblank-vs-hang" }, { 1, TEST_FLIP | TEST_EINVAL | TEST_FB_BAD_TILING, "flip-vs-bad-tiling" }, { 1, TEST_DPMS_OFF | TEST_MODESET | TEST_FLIP, "flip-vs-dpms-off-vs-modeset" }, { 1, TEST_DPMS_OFF | TEST_MODESET | TEST_FLIP | TEST_SINGLE_BUFFER, "single-buffer-flip-vs-dpms-off-vs-modeset" }, { 30, TEST_FLIP | TEST_NO_2X_OUTPUT | TEST_DPMS_OFF_OTHERS , "dpms-off-confusion" }, { 0, TEST_ENOENT | TEST_NOEVENT, "nonexisting-fb" }, { 10, TEST_DPMS_OFF | TEST_DPMS | TEST_VBLANK_RACE, "dpms-vs-vblank-race" }, { 10, TEST_MODESET | TEST_VBLANK_RACE, "modeset-vs-vblank-race" }, { 10, TEST_VBLANK | TEST_DPMS | TEST_RPM | TEST_TS_CONT, "vblank-vs-dpms-rpm" }, { 10, TEST_VBLANK | TEST_MODESET | TEST_RPM | TEST_TS_CONT, "vblank-vs-modeset-rpm" }, { 0, TEST_VBLANK | TEST_DPMS | TEST_SUSPEND | TEST_TS_CONT, "vblank-vs-dpms-suspend" }, { 0, TEST_VBLANK | TEST_MODESET | TEST_SUSPEND | TEST_TS_CONT, "vblank-vs-modeset-suspend" }, { 0, TEST_VBLANK | TEST_SUSPEND | TEST_TS_CONT, "vblank-vs-suspend" }, { 0, TEST_BO_TOOBIG | TEST_NO_2X_OUTPUT, "bo-too-big" }, }; int i; igt_subtest_init(argc, argv); igt_skip_on_simulation(); igt_fixture { drm_fd = drm_open_driver_master(DRIVER_INTEL); igt_enable_connectors(); kmstest_set_vt_graphics_mode(); igt_install_exit_handler(kms_flip_exit_handler); get_timestamp_format(); bufmgr = drm_intel_bufmgr_gem_init(drm_fd, 4096); devid = intel_get_drm_devid(drm_fd); batch = intel_batchbuffer_alloc(bufmgr, devid); } igt_subtest("nonblocking-read") test_nonblocking_read(drm_fd); for (i = 0; i < sizeof(tests) / sizeof (tests[0]); i++) { igt_subtest_f("%s%s", tests[i].flags & TEST_BASIC ? "basic-" : "", tests[i].name) run_test(tests[i].duration, tests[i].flags); if (tests[i].flags & TEST_NO_2X_OUTPUT) continue; /* code doesn't disable all crtcs, so skip rpm tests */ if (tests[i].flags & TEST_RPM) continue; igt_subtest_f( "2x-%s", tests[i].name) run_pair(tests[i].duration, tests[i].flags); } igt_fork_signal_helper(); for (i = 0; i < sizeof(tests) / sizeof (tests[0]); i++) { /* relative blocking vblank waits that get constantly interrupt * take forver. So don't do them. */ if ((tests[i].flags & TEST_VBLANK_BLOCK) && !(tests[i].flags & TEST_VBLANK_ABSOLUTE)) continue; igt_subtest_f( "%s-interruptible", tests[i].name) run_test(tests[i].duration, tests[i].flags); if (tests[i].flags & TEST_NO_2X_OUTPUT) continue; /* code doesn't disable all crtcs, so skip rpm tests */ if (tests[i].flags & TEST_RPM) continue; igt_subtest_f( "2x-%s-interruptible", tests[i].name) run_pair(tests[i].duration, tests[i].flags); } igt_stop_signal_helper(); /* * Let drm_fd leak, since it's needed by the dpms restore * exit_handler and igt_exit() won't return. */ igt_exit(); } intel-gpu-tools-1.14/tests/prime_nv_test.c0000644000175000017500000002337212665336131015623 00000000000000/* basic set of prime tests between intel and nouveau */ /* test list - 1. share buffer from intel -> nouveau. 2. share buffer from nouveau -> intel 3. share intel->nouveau, map on both, write intel, read nouveau 4. share intel->nouveau, blit intel fill, readback on nouveau test 1 + map buffer, read/write, map other size. do some hw actions on the buffer some illegal operations - close prime fd try and map TODO add some nouveau rendering tests */ #include "igt.h" #include #include #include #include #include #include #include #include "intel_bufmgr.h" #include "nouveau.h" int intel_fd = -1, nouveau_fd = -1; drm_intel_bufmgr *bufmgr; struct nouveau_device *ndev; struct nouveau_client *nclient; uint32_t devid; struct intel_batchbuffer *intel_batch; #define BO_SIZE (256*1024) static int find_and_open_devices(void) { int i; char path[80]; struct stat buf; FILE *fl; char vendor_id[8]; int venid; for (i = 0; i < 9; i++) { char *ret; sprintf(path, "/sys/class/drm/card%d/device/vendor", i); if (stat(path, &buf)) break; fl = fopen(path, "r"); if (!fl) break; ret = fgets(vendor_id, 8, fl); igt_assert(ret); fclose(fl); venid = strtoul(vendor_id, NULL, 16); sprintf(path, "/dev/dri/card%d", i); if (venid == 0x8086) { intel_fd = open(path, O_RDWR); if (!intel_fd) return -1; } else if (venid == 0x10de) { nouveau_fd = open(path, O_RDWR); if (!nouveau_fd) return -1; } } return 0; } /* * prime test 1 - * allocate buffer on intel, * set prime on buffer, * retrive buffer from nouveau, * close prime_fd, * unref buffers */ static void test_i915_nv_sharing(void) { drm_intel_bo *test_intel_bo; int prime_fd; struct nouveau_bo *nvbo; test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096); igt_assert(test_intel_bo); drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd); igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0); close(prime_fd); nouveau_bo_ref(NULL, &nvbo); drm_intel_bo_unreference(test_intel_bo); } /* * prime test 2 - * allocate buffer on nouveau * set prime on buffer, * retrive buffer from intel * close prime_fd, * unref buffers */ static void test_nv_i915_sharing(void) { drm_intel_bo *test_intel_bo; int prime_fd; struct nouveau_bo *nvbo; igt_assert(nouveau_bo_new(ndev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP, 0, BO_SIZE, NULL, &nvbo) == 0); igt_assert(nouveau_bo_set_prime(nvbo, &prime_fd) == 0); test_intel_bo = drm_intel_bo_gem_create_from_prime(bufmgr, prime_fd, BO_SIZE); close(prime_fd); igt_assert(test_intel_bo); nouveau_bo_ref(NULL, &nvbo); drm_intel_bo_unreference(test_intel_bo); } /* * allocate intel, give to nouveau, map on nouveau * write 0xdeadbeef, non-gtt map on intel, read */ static void test_nv_write_i915_cpu_mmap_read(void) { drm_intel_bo *test_intel_bo; int prime_fd; struct nouveau_bo *nvbo = NULL; uint32_t *ptr; test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096); drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd); igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0); close(prime_fd); igt_assert(nouveau_bo_map(nvbo, NOUVEAU_BO_RDWR, nclient) == 0); ptr = nvbo->map; *ptr = 0xdeadbeef; drm_intel_bo_map(test_intel_bo, 1); ptr = test_intel_bo->virtual; igt_assert(ptr); igt_assert(*ptr == 0xdeadbeef); nouveau_bo_ref(NULL, &nvbo); drm_intel_bo_unreference(test_intel_bo); } /* * allocate intel, give to nouveau, map on nouveau * write 0xdeadbeef, gtt map on intel, read */ static void test_nv_write_i915_gtt_mmap_read(void) { drm_intel_bo *test_intel_bo; int prime_fd; struct nouveau_bo *nvbo = NULL; uint32_t *ptr; test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096); drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd); igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0); close(prime_fd); igt_assert(nouveau_bo_map(nvbo, NOUVEAU_BO_RDWR, nclient) == 0); ptr = nvbo->map; *ptr = 0xdeadbeef; drm_intel_gem_bo_map_gtt(test_intel_bo); ptr = test_intel_bo->virtual; igt_assert(ptr); igt_assert(*ptr == 0xdeadbeef); nouveau_bo_ref(NULL, &nvbo); drm_intel_bo_unreference(test_intel_bo); } /* test drm_intel_bo_map doesn't work properly, this tries to map the backing shmem fd, which doesn't exist for these objects */ static void test_i915_import_cpu_mmap(void) { drm_intel_bo *test_intel_bo; int prime_fd; struct nouveau_bo *nvbo; uint32_t *ptr; igt_skip("cpu mmap support for imported dma-bufs not yet implemented\n"); igt_assert(nouveau_bo_new(ndev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP, 0, BO_SIZE, NULL, &nvbo) == 0); igt_assert(nouveau_bo_set_prime(nvbo, &prime_fd) == 0); test_intel_bo = drm_intel_bo_gem_create_from_prime(bufmgr, prime_fd, BO_SIZE); close(prime_fd); igt_assert(test_intel_bo); igt_assert(nouveau_bo_map(nvbo, NOUVEAU_BO_RDWR, nclient) == 0); ptr = nvbo->map; *ptr = 0xdeadbeef; igt_assert(drm_intel_bo_map(test_intel_bo, 0) == 0); igt_assert(test_intel_bo->virtual); ptr = test_intel_bo->virtual; igt_assert(*ptr == 0xdeadbeef); nouveau_bo_ref(NULL, &nvbo); drm_intel_bo_unreference(test_intel_bo); } /* test drm_intel_bo_map_gtt works properly, this tries to map the backing shmem fd, which doesn't exist for these objects */ static void test_i915_import_gtt_mmap(void) { drm_intel_bo *test_intel_bo; int prime_fd; struct nouveau_bo *nvbo; uint32_t *ptr; igt_assert(nouveau_bo_new(ndev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP, 0, BO_SIZE, NULL, &nvbo) == 0); igt_assert(nouveau_bo_set_prime(nvbo, &prime_fd) == 0); test_intel_bo = drm_intel_bo_gem_create_from_prime(bufmgr, prime_fd, BO_SIZE); close(prime_fd); igt_assert(test_intel_bo); igt_assert(nouveau_bo_map(nvbo, NOUVEAU_BO_RDWR, nclient) == 0); ptr = nvbo->map; *ptr = 0xdeadbeef; *(ptr + 1) = 0xa55a55; igt_assert(drm_intel_gem_bo_map_gtt(test_intel_bo) == 0); igt_assert(test_intel_bo->virtual); ptr = test_intel_bo->virtual; igt_assert(*ptr == 0xdeadbeef); nouveau_bo_ref(NULL, &nvbo); drm_intel_bo_unreference(test_intel_bo); } /* test 7 - import from nouveau into intel, test pread/pwrite fail */ static void test_i915_import_pread_pwrite(void) { drm_intel_bo *test_intel_bo; int prime_fd; struct nouveau_bo *nvbo; uint32_t *ptr; uint32_t buf[64]; igt_assert(nouveau_bo_new(ndev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP, 0, BO_SIZE, NULL, &nvbo) == 0); igt_assert(nouveau_bo_set_prime(nvbo, &prime_fd) == 0); test_intel_bo = drm_intel_bo_gem_create_from_prime(bufmgr, prime_fd, BO_SIZE); close(prime_fd); igt_assert(test_intel_bo); igt_assert(nouveau_bo_map(nvbo, NOUVEAU_BO_RDWR, nclient) == 0); ptr = nvbo->map; *ptr = 0xdeadbeef; gem_read(intel_fd, test_intel_bo->handle, 0, buf, 256); igt_assert(buf[0] == 0xdeadbeef); buf[0] = 0xabcdef55; gem_write(intel_fd, test_intel_bo->handle, 0, buf, 4); igt_assert(*ptr == 0xabcdef55); nouveau_bo_ref(NULL, &nvbo); drm_intel_bo_unreference(test_intel_bo); } static void set_bo(drm_intel_bo *bo, uint32_t val, int width, int height) { int size = width * height; uint32_t *vaddr; drm_intel_gem_bo_start_gtt_access(bo, true); vaddr = bo->virtual; while (size--) *vaddr++ = val; } static drm_intel_bo * create_bo(drm_intel_bufmgr *ibufmgr, uint32_t val, int width, int height) { drm_intel_bo *bo; bo = drm_intel_bo_alloc(ibufmgr, "bo", 4*width*height, 0); igt_assert(bo); /* gtt map doesn't have a write parameter, so just keep the mapping * around (to avoid the set_domain with the gtt write domain set) and * manually tell the kernel when we start access the gtt. */ drm_intel_gem_bo_map_gtt(bo); set_bo(bo, val, width, height); return bo; } /* use intel hw to fill the BO with a blit from another BO, then readback from the nouveau bo, check value is correct */ static void test_i915_blt_fill_nv_read(void) { drm_intel_bo *test_intel_bo, *src_bo; int prime_fd; struct nouveau_bo *nvbo = NULL; uint32_t *ptr; src_bo = create_bo(bufmgr, 0xaa55aa55, 256, 1); test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096); drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd); igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0); close(prime_fd); intel_copy_bo(intel_batch, test_intel_bo, src_bo, BO_SIZE); igt_assert(nouveau_bo_map(nvbo, NOUVEAU_BO_RDWR, nclient) == 0); drm_intel_bo_map(test_intel_bo, 0); ptr = nvbo->map; igt_assert(*ptr == 0xaa55aa55); nouveau_bo_ref(NULL, &nvbo); drm_intel_bo_unreference(test_intel_bo); } /* test 8 use nouveau to do blit */ /* test 9 nouveau copy engine?? */ igt_main { igt_fixture { igt_assert(find_and_open_devices() == 0); igt_require(nouveau_fd != -1); igt_require(intel_fd != -1); /* set up intel bufmgr */ bufmgr = drm_intel_bufmgr_gem_init(intel_fd, 4096); igt_assert(bufmgr); /* Do not enable reuse, we share (almost) all buffers. */ //drm_intel_bufmgr_gem_enable_reuse(bufmgr); /* set up nouveau bufmgr */ igt_assert(nouveau_device_wrap(nouveau_fd, 0, &ndev) == 0); igt_assert(nouveau_client_new(ndev, &nclient) == 0); /* set up an intel batch buffer */ devid = intel_get_drm_devid(intel_fd); intel_batch = intel_batchbuffer_alloc(bufmgr, devid); } #define xtest(name) \ igt_subtest(#name) \ test_##name(); xtest(i915_nv_sharing); xtest(nv_i915_sharing); xtest(nv_write_i915_cpu_mmap_read); xtest(nv_write_i915_gtt_mmap_read); xtest(i915_import_cpu_mmap); xtest(i915_import_gtt_mmap); xtest(i915_import_pread_pwrite); xtest(i915_blt_fill_nv_read); igt_fixture { intel_batchbuffer_free(intel_batch); nouveau_device_del(&ndev); drm_intel_bufmgr_destroy(bufmgr); close(intel_fd); close(nouveau_fd); } } intel-gpu-tools-1.14/tests/gem_workarounds.c0000644000175000017500000001026512665336131016150 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Arun Siluvery * */ #define _GNU_SOURCE #include "igt.h" enum operation { GPU_RESET, SUSPEND_RESUME, SIMPLE_READ, }; struct intel_wa_reg { uint32_t addr; uint32_t value; uint32_t mask; }; static struct intel_wa_reg *wa_regs; static int num_wa_regs; static void wait_gpu(void) { int fd = drm_open_driver(DRIVER_INTEL); gem_quiescent_gpu(fd); close(fd); } static void test_hang_gpu(void) { int fd = drm_open_driver(DRIVER_INTEL); igt_post_hang_ring(fd, igt_hang_ring(fd, I915_EXEC_DEFAULT)); close(fd); } static void test_suspend_resume(void) { igt_info("Suspending the device ...\n"); igt_system_suspend_autoresume(); } static int workaround_fail_count(void) { int i, fail_count = 0; /* There is a small delay after coming ot of rc6 to the correct render context values will get loaded by hardware (bdw,chv). This here ensures that we have the correct context loaded before we start to read values */ wait_gpu(); igt_debug("Address\tval\t\tmask\t\tread\t\tresult\n"); for (i = 0; i < num_wa_regs; ++i) { const uint32_t val = intel_register_read(wa_regs[i].addr); const bool ok = (wa_regs[i].value & wa_regs[i].mask) == (val & wa_regs[i].mask); igt_debug("0x%05X\t0x%08X\t0x%08X\t0x%08X\t%s\n", wa_regs[i].addr, wa_regs[i].value, wa_regs[i].mask, val, ok ? "OK" : "FAIL"); if (!ok) { igt_warn("0x%05X\t0x%08X\t0x%08X\t0x%08X\t%s\n", wa_regs[i].addr, wa_regs[i].value, wa_regs[i].mask, val, ok ? "OK" : "FAIL"); fail_count++; } } return fail_count; } static void check_workarounds(enum operation op) { igt_assert_eq(workaround_fail_count(), 0); switch (op) { case GPU_RESET: test_hang_gpu(); break; case SUSPEND_RESUME: test_suspend_resume(); break; case SIMPLE_READ: return; default: igt_assert(0); } igt_assert_eq(workaround_fail_count(), 0); } igt_main { igt_fixture { struct pci_device *pci_dev; FILE *file; char *line = NULL; size_t line_size; int i; pci_dev = intel_get_pci_device(); igt_require(pci_dev); intel_register_access_init(pci_dev, 0); file = igt_debugfs_fopen("i915_wa_registers", "r"); igt_assert(getline(&line, &line_size, file) > 0); igt_debug("i915_wa_registers: %s", line); sscanf(line, "Workarounds applied: %d", &num_wa_regs); if (IS_BROADWELL(pci_dev->device_id) || IS_CHERRYVIEW(pci_dev->device_id)) igt_assert(num_wa_regs > 0); else igt_assert(num_wa_regs >= 0); wa_regs = malloc(num_wa_regs * sizeof(*wa_regs)); igt_assert(wa_regs); i = 0; while (getline(&line, &line_size, file) > 0) { igt_debug("%s", line); igt_assert(i < num_wa_regs); if (sscanf(line, "0x%X: 0x%08X, mask: 0x%08X", &wa_regs[i].addr, &wa_regs[i].value, &wa_regs[i].mask) == 3) i++; } free(line); fclose(file); } igt_subtest("read") check_workarounds(SIMPLE_READ); igt_subtest("reset") check_workarounds(GPU_RESET); igt_subtest("suspend-resume") check_workarounds(SUSPEND_RESUME); igt_fixture { free(wa_regs); intel_register_access_fini(); } } intel-gpu-tools-1.14/tests/gem_pwrite_snooped.c0000644000175000017500000000722112665336131016631 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include "drm.h" IGT_TEST_DESCRIPTION( "pwrite to a snooped bo then make it uncached and check that the GPU sees the data."); static int fd; static uint32_t devid; static drm_intel_bufmgr *bufmgr; static void blit(drm_intel_bo *dst, drm_intel_bo *src, unsigned int width, unsigned int height, unsigned int dst_pitch, unsigned int src_pitch) { struct intel_batchbuffer *batch; batch = intel_batchbuffer_alloc(bufmgr, devid); igt_assert(batch); BLIT_COPY_BATCH_START(0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ dst_pitch); OUT_BATCH(0 << 16 | 0); OUT_BATCH(height << 16 | width); OUT_RELOC_FENCED(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(0 << 16 | 0); OUT_BATCH(src_pitch); OUT_RELOC_FENCED(src, I915_GEM_DOMAIN_RENDER, 0, 0); ADVANCE_BATCH(); if (batch->gen >= 6) { BEGIN_BATCH(3, 0); OUT_BATCH(XY_SETUP_CLIP_BLT_CMD); OUT_BATCH(0); OUT_BATCH(0); ADVANCE_BATCH(); } intel_batchbuffer_flush(batch); intel_batchbuffer_free(batch); } static void *memchr_inv(const void *s, int c, size_t n) { const uint8_t *us = s; const uint8_t uc = c; #pragma GCC diagnostic push #pragma GCC diagnostic ignored "-Wcast-qual" while (n--) { if (*us != uc) return (void *) us; us++; } #pragma GCC diagnostic pop return NULL; } static void test(int w, int h) { int object_size = w * h * 4; drm_intel_bo *src, *dst; void *buf; src = drm_intel_bo_alloc(bufmgr, "src", object_size, 4096); igt_assert(src); dst = drm_intel_bo_alloc(bufmgr, "dst", object_size, 4096); igt_assert(dst); buf = malloc(object_size); igt_assert(buf); memset(buf, 0xff, object_size); gem_set_domain(fd, src->handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); gem_set_caching(fd, src->handle, I915_CACHING_CACHED); gem_write(fd, src->handle, 0, buf, object_size); gem_set_caching(fd, src->handle, I915_CACHING_NONE); blit(dst, src, w, h, w * 4, h * 4); memset(buf, 0x00, object_size); gem_read(fd, dst->handle, 0, buf, object_size); igt_assert(memchr_inv(buf, 0xff, object_size) == NULL); } igt_simple_main { igt_skip_on_simulation(); fd = drm_open_driver(DRIVER_INTEL); devid = intel_get_drm_devid(fd); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); test(256, 256); drm_intel_bufmgr_destroy(bufmgr); close(fd); } intel-gpu-tools-1.14/tests/kms_draw_crc.c0000644000175000017500000001716712665336131015410 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ /* This program tests whether the igt_draw library actually works. */ #include "igt.h" #define MAX_CONNECTORS 32 struct modeset_params { uint32_t crtc_id; uint32_t connector_id; drmModeModeInfoPtr mode; }; int drm_fd; drmModeResPtr drm_res; drmModeConnectorPtr drm_connectors[MAX_CONNECTORS]; drm_intel_bufmgr *bufmgr; igt_pipe_crc_t *pipe_crc; #define N_FORMATS 3 static const uint32_t formats[N_FORMATS] = { DRM_FORMAT_XRGB8888, DRM_FORMAT_RGB565, DRM_FORMAT_XRGB2101010, }; struct base_crc { bool set; igt_crc_t crc; }; struct base_crc base_crcs[N_FORMATS]; struct modeset_params ms; static void find_modeset_params(void) { int i; uint32_t connector_id = 0, crtc_id; drmModeModeInfoPtr mode = NULL; for (i = 0; i < drm_res->count_connectors; i++) { drmModeConnectorPtr c = drm_connectors[i]; if (c->count_modes) { connector_id = c->connector_id; mode = &c->modes[0]; break; } } igt_require(connector_id); crtc_id = drm_res->crtcs[0]; igt_assert(crtc_id); igt_assert(mode); ms.connector_id = connector_id; ms.crtc_id = crtc_id; ms.mode = mode; } static uint32_t get_color(uint32_t drm_format, bool r, bool g, bool b) { uint32_t color = 0; switch (drm_format) { case DRM_FORMAT_RGB565: color |= r ? 0x1F << 11 : 0; color |= g ? 0x3F << 5 : 0; color |= b ? 0x1F : 0; break; case DRM_FORMAT_XRGB8888: color |= r ? 0xFF << 16 : 0; color |= g ? 0xFF << 8 : 0; color |= b ? 0xFF : 0; break; case DRM_FORMAT_XRGB2101010: color |= r ? 0x3FF << 20 : 0; color |= g ? 0x3FF << 10 : 0; color |= b ? 0x3FF : 0; break; default: igt_assert(false); } return color; } static void get_method_crc(enum igt_draw_method method, uint32_t drm_format, uint64_t tiling, igt_crc_t *crc) { struct igt_fb fb; int rc; igt_create_fb(drm_fd, ms.mode->hdisplay, ms.mode->vdisplay, drm_format, tiling, &fb); igt_draw_rect_fb(drm_fd, bufmgr, NULL, &fb, method, 0, 0, fb.width, fb.height, get_color(drm_format, 0, 0, 1)); igt_draw_rect_fb(drm_fd, bufmgr, NULL, &fb, method, fb.width / 4, fb.height / 4, fb.width / 2, fb.height / 2, get_color(drm_format, 0, 1, 0)); igt_draw_rect_fb(drm_fd, bufmgr, NULL, &fb, method, fb.width / 8, fb.height / 8, fb.width / 4, fb.height / 4, get_color(drm_format, 1, 0, 0)); igt_draw_rect_fb(drm_fd, bufmgr, NULL, &fb, method, fb.width / 2, fb.height / 2, fb.width / 3, fb.height / 3, get_color(drm_format, 1, 0, 1)); igt_draw_rect_fb(drm_fd, bufmgr, NULL, &fb, method, 1, 1, 15, 15, get_color(drm_format, 0, 1, 1)); rc = drmModeSetCrtc(drm_fd, ms.crtc_id, fb.fb_id, 0, 0, &ms.connector_id, 1, ms.mode); igt_assert_eq(rc, 0); igt_pipe_crc_collect_crc(pipe_crc, crc); kmstest_unset_all_crtcs(drm_fd, drm_res); igt_remove_fb(drm_fd, &fb); } static void draw_method_subtest(enum igt_draw_method method, uint32_t format_index, uint64_t tiling) { igt_crc_t crc; kmstest_unset_all_crtcs(drm_fd, drm_res); find_modeset_params(); /* Use IGT_DRAW_MMAP_GTT on an untiled buffer as the parameter for * comparison. Cache the value so we don't recompute it for every single * subtest. */ if (!base_crcs[format_index].set) { get_method_crc(IGT_DRAW_MMAP_GTT, formats[format_index], LOCAL_DRM_FORMAT_MOD_NONE, &base_crcs[format_index].crc); base_crcs[format_index].set = true; } get_method_crc(method, formats[format_index], tiling, &crc); igt_assert_crc_equal(&crc, &base_crcs[format_index].crc); } static void get_fill_crc(uint64_t tiling, igt_crc_t *crc) { struct igt_fb fb; int rc; igt_create_fb(drm_fd, ms.mode->hdisplay, ms.mode->vdisplay, DRM_FORMAT_XRGB8888, tiling, &fb); igt_draw_fill_fb(drm_fd, &fb, 0xFF); rc = drmModeSetCrtc(drm_fd, ms.crtc_id, fb.fb_id, 0, 0, &ms.connector_id, 1, ms.mode); igt_assert_eq(rc, 0); igt_pipe_crc_collect_crc(pipe_crc, crc); kmstest_unset_all_crtcs(drm_fd, drm_res); igt_remove_fb(drm_fd, &fb); } static void fill_fb_subtest(void) { int rc; struct igt_fb fb; igt_crc_t base_crc, crc; kmstest_unset_all_crtcs(drm_fd, drm_res); find_modeset_params(); igt_create_fb(drm_fd, ms.mode->hdisplay, ms.mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, &fb); igt_draw_rect_fb(drm_fd, bufmgr, NULL, &fb, IGT_DRAW_MMAP_GTT, 0, 0, fb.width, fb.height, 0xFF); rc = drmModeSetCrtc(drm_fd, ms.crtc_id, fb.fb_id, 0, 0, &ms.connector_id, 1, ms.mode); igt_assert_eq(rc, 0); igt_pipe_crc_collect_crc(pipe_crc, &base_crc); get_fill_crc(LOCAL_DRM_FORMAT_MOD_NONE, &crc); igt_assert_crc_equal(&crc, &base_crc); get_fill_crc(LOCAL_I915_FORMAT_MOD_X_TILED, &crc); igt_assert_crc_equal(&crc, &base_crc); kmstest_unset_all_crtcs(drm_fd, drm_res); igt_remove_fb(drm_fd, &fb); } static void setup_environment(void) { int i; drm_fd = drm_open_driver_master(DRIVER_INTEL); igt_require(drm_fd >= 0); drm_res = drmModeGetResources(drm_fd); igt_assert(drm_res->count_connectors <= MAX_CONNECTORS); for (i = 0; i < drm_res->count_connectors; i++) drm_connectors[i] = drmModeGetConnectorCurrent(drm_fd, drm_res->connectors[i]); kmstest_set_vt_graphics_mode(); bufmgr = drm_intel_bufmgr_gem_init(drm_fd, 4096); igt_assert(bufmgr); drm_intel_bufmgr_gem_enable_reuse(bufmgr); pipe_crc = igt_pipe_crc_new(0, INTEL_PIPE_CRC_SOURCE_AUTO); } static void teardown_environment(void) { int i; igt_pipe_crc_free(pipe_crc); drm_intel_bufmgr_destroy(bufmgr); for (i = 0; i < drm_res->count_connectors; i++) drmModeFreeConnector(drm_connectors[i]); drmModeFreeResources(drm_res); close(drm_fd); } static const char *format_str(int format_index) { switch (formats[format_index]) { case DRM_FORMAT_RGB565: return "rgb565"; case DRM_FORMAT_XRGB8888: return "xrgb8888"; case DRM_FORMAT_XRGB2101010: return "xrgb2101010"; default: igt_assert(false); } } igt_main { enum igt_draw_method method; int format_index; igt_fixture setup_environment(); for (format_index = 0; format_index < N_FORMATS; format_index++) { for (method = 0; method < IGT_DRAW_METHOD_COUNT; method++) { igt_subtest_f("draw-method-%s-%s-untiled", format_str(format_index), igt_draw_get_method_name(method)) draw_method_subtest(method, format_index, LOCAL_DRM_FORMAT_MOD_NONE); igt_subtest_f("draw-method-%s-%s-tiled", format_str(format_index), igt_draw_get_method_name(method)) draw_method_subtest(method, format_index, LOCAL_I915_FORMAT_MOD_X_TILED); } } igt_subtest("fill-fb") fill_fb_subtest(); igt_fixture teardown_environment(); } intel-gpu-tools-1.14/tests/drm_vma_limiter_gtt.c0000644000175000017500000000556512665336131017001 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter */ #include "igt.h" #include #include #include #include #include #include #include #include #include "drm.h" #include "intel_bufmgr.h" static drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; /* Testcase: check whether the libdrm vma limiter works * * We've had reports of the X server exhausting the default rlimit of 64k vma's * in the kernel. libdrm has grown facilities to limit the vma caching since, * this checks whether they actually work. * * This one checks cpu mmaps only. */ /* we do both cpu and gtt maps, so only need half of 64k to exhaust */ #define BO_ARRAY_SIZE 68000 drm_intel_bo *bos[BO_ARRAY_SIZE]; igt_simple_main { int fd; int i; char *ptr; igt_skip_on_simulation(); fd = drm_open_driver(DRIVER_INTEL); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); drm_intel_bufmgr_gem_enable_reuse(bufmgr); batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd)); drm_intel_bufmgr_gem_set_vma_cache_size(bufmgr, 500); for (i = 0; i < BO_ARRAY_SIZE; i++) { bos[i] = drm_intel_bo_alloc(bufmgr, "mmap bo", 4096, 4096); igt_assert(bos[i]); drm_intel_gem_bo_map_gtt(bos[i]); ptr = bos[i]->virtual; igt_assert(ptr); *ptr = 'c'; drm_intel_gem_bo_unmap_gtt(bos[i]); } /* and recheck whether a second map of the same still works */ for (i = 0; i < BO_ARRAY_SIZE; i++) { bos[i] = drm_intel_bo_alloc(bufmgr, "mmap bo", 4096, 4096); igt_assert(bos[i]); drm_intel_gem_bo_map_gtt(bos[i]); ptr = bos[i]->virtual; igt_assert(*ptr = 'c'); drm_intel_gem_bo_unmap_gtt(bos[i]); } intel_batchbuffer_free(batch); drm_intel_bufmgr_destroy(bufmgr); close(fd); } intel-gpu-tools-1.14/tests/testdisplay_hotplug.c0000644000175000017500000000657712665336131017064 00000000000000/* * Copyright 2010 Intel Corporation * Jesse Barnes * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ #include "igt.h" #include #include #include #include #include "testdisplay.h" #ifdef HAVE_CONFIG_H #include "config.h" #endif #if HAVE_UDEV #include static struct udev_monitor *uevent_monitor; static struct udev *udev; static GIOChannel *udevchannel; static gboolean hotplug_event(GIOChannel *source, GIOCondition condition, gpointer data) { struct udev_device *dev; dev_t udev_devnum; struct stat s; const char *hotplug; dev = udev_monitor_receive_device(uevent_monitor); if (!dev) goto out; udev_devnum = udev_device_get_devnum(dev); fstat(drm_fd, &s); hotplug = udev_device_get_property_value(dev, "HOTPLUG"); if (memcmp(&s.st_rdev, &udev_devnum, sizeof(dev_t)) == 0 && hotplug && atoi(hotplug) == 1) update_display(true); udev_device_unref(dev); out: return TRUE; } gboolean testdisplay_setup_hotplug(void) { int ret; udev = udev_new(); if (!udev) { igt_warn("failed to create udev object\n"); goto out; } uevent_monitor = udev_monitor_new_from_netlink(udev, "udev"); if (!uevent_monitor) { igt_warn("failed to create udev event monitor\n"); goto out; } ret = udev_monitor_filter_add_match_subsystem_devtype(uevent_monitor, "drm", "drm_minor"); if (ret < 0) { igt_warn("failed to filter for drm events\n"); goto out; } ret = udev_monitor_enable_receiving(uevent_monitor); if (ret < 0) { igt_warn("failed to enable udev event reception\n"); goto out; } udevchannel = g_io_channel_unix_new(udev_monitor_get_fd(uevent_monitor)); if (!udevchannel) { igt_warn("failed to create udev GIO channel\n"); goto out; } ret = g_io_add_watch(udevchannel, G_IO_IN | G_IO_ERR, hotplug_event, udev); if (ret < 0) { igt_warn("failed to add watch on udev GIO channel\n"); goto out; } return TRUE; out: testdisplay_cleanup_hotplug(); return FALSE; } void testdisplay_cleanup_hotplug(void) { if (udevchannel) g_io_channel_shutdown(udevchannel, TRUE, NULL); if (uevent_monitor) udev_monitor_unref(uevent_monitor); if (udev) udev_unref(udev); } #else gboolean testdisplay_setup_hotplug(void) { igt_warn("no hotplug support on this platform\n"); return TRUE; } void testdisplay_cleanup_hotplug(void) { } #endif intel-gpu-tools-1.14/tests/kms_legacy_colorkey.c0000644000175000017500000000421512665336131016765 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ #include "igt.h" #include IGT_TEST_DESCRIPTION("Check that the legacy set colorkey ioctl only works on sprite planes."); static int drm_fd; static igt_display_t display; static int p; static igt_plane_t *plane; static uint32_t max_id; static void test_plane(uint32_t plane_id, int expected_ret) { struct drm_intel_sprite_colorkey ckey = { .plane_id = plane_id, }; igt_assert(drmCommandWrite(drm_fd, DRM_I915_SET_SPRITE_COLORKEY, &ckey, sizeof(ckey)) == expected_ret); } igt_simple_main { igt_skip_on_simulation(); drm_fd = drm_open_driver_master(DRIVER_INTEL); kmstest_set_vt_graphics_mode(); igt_display_init(&display, drm_fd); for_each_pipe(&display, p) { for_each_plane_on_pipe(&display, p, plane) { test_plane(plane->drm_plane->plane_id, (plane->is_cursor || plane->is_primary) ? -ENOENT : 0); max_id = max(max_id, plane->drm_plane->plane_id); } } /* try some invalid IDs too */ test_plane(0, -ENOENT); test_plane(max_id + 1, -ENOENT); igt_display_fini(&display); } intel-gpu-tools-1.14/tests/drm_read.c0000644000175000017500000001242212665336131014514 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ /* * Testcase: boundary testing of read(drm_fd) */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include "drm.h" IGT_TEST_DESCRIPTION("Call read(drm) and see if it behaves."); static void sighandler(int sig) { } static void assert_empty(int fd) { struct pollfd pfd = {fd, POLLIN}; do_or_die(poll(&pfd, 1, 0)); } static void generate_event(int fd) { union drm_wait_vblank vbl; /* We require that pipe 0 is running */ vbl.request.type = DRM_VBLANK_RELATIVE | DRM_VBLANK_EVENT; vbl.request.sequence = 0; do_ioctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl); } static void wait_for_event(int fd) { struct pollfd pfd = {fd, POLLIN}; igt_assert(poll(&pfd, 1, -1) == 1); } static int setup(int in, int nonblock) { int fd; int ret = -1; alarm(0); fd = dup(in); if (fd != -1) ret = fcntl(fd, F_GETFL); if (ret != -1) { if (nonblock) ret |= O_NONBLOCK; else ret &= ~O_NONBLOCK; ret = fcntl(fd, F_SETFL, ret); } igt_require(ret != -1); assert_empty(fd); return fd; } static void teardown(int fd) { alarm(0); assert_empty(fd); close(fd); errno = 0; } static void test_invalid_buffer(int in) { int fd = setup(in, 0); alarm(1); igt_assert_eq(read(fd, (void *)-1, 4096), -1); igt_assert_eq(errno, EFAULT); teardown(fd); } static uint32_t dumb_create(int fd) { struct drm_mode_create_dumb arg; arg.bpp = 32; arg.width = 32; arg.height = 32; do_ioctl(fd, DRM_IOCTL_MODE_CREATE_DUMB, &arg); igt_assert(arg.size >= 4096); return arg.handle; } static void test_fault_buffer(int in) { int fd = setup(in, 0); struct drm_mode_map_dumb arg; char *buf; memset(&arg, 0, sizeof(arg)); arg.handle = dumb_create(fd); do_ioctl(fd, DRM_IOCTL_MODE_MAP_DUMB, &arg); buf = mmap(0, 4096, PROT_WRITE, MAP_SHARED, fd, arg.offset); igt_assert(buf != MAP_FAILED); generate_event(fd); alarm(1); igt_assert(read(fd, buf, 4096) > 0); munmap(buf, 4096); teardown(fd); } static void test_empty(int in, int nonblock, int expected) { char buffer[1024]; int fd = setup(in, nonblock); alarm(1); igt_assert_eq(read(fd, buffer, sizeof(buffer)), -1); igt_assert_eq(errno, expected); teardown(fd); } static void test_short_buffer(int in, int nonblock) { char buffer[1024]; /* events are typically 32 bytes */ int fd = setup(in, nonblock); generate_event(fd); generate_event(fd); wait_for_event(fd); alarm(3); igt_assert_eq(read(fd, buffer, 4), 0); igt_assert(read(fd, buffer, 40) > 0); igt_assert(read(fd, buffer, 40) > 0); teardown(fd); } static int pipe0_enabled(int fd) { struct drm_mode_card_res res; uint32_t crtcs[32]; int i; /* We assume we can generate events on pipe 0. So we have better * make sure that is running! */ memset(&res, 0, sizeof(res)); res.count_crtcs = 32; res.crtc_id_ptr = (uintptr_t)crtcs; if (drmIoctl(fd, DRM_IOCTL_MODE_GETRESOURCES, &res)) return 0; if (res.count_crtcs > 32) return 0; for (i = 0; i < res.count_crtcs; i++) { struct drm_i915_get_pipe_from_crtc_id get_pipe; struct drm_mode_crtc mode; memset(&get_pipe, 0, sizeof(get_pipe)); memset(&mode, 0, sizeof(mode)); mode.crtc_id = crtcs[i]; get_pipe.pipe = -1; get_pipe.crtc_id = mode.crtc_id; drmIoctl(fd, DRM_IOCTL_I915_GET_PIPE_FROM_CRTC_ID, &get_pipe); if (get_pipe.pipe) continue; drmIoctl(fd, DRM_IOCTL_MODE_GETCRTC, &mode); return mode.mode_valid && mode.mode.clock; } return 0; } igt_main { int fd; signal(SIGALRM, sighandler); siginterrupt(SIGALRM, 1); igt_fixture { fd = drm_open_driver_master(DRIVER_INTEL); igt_require(pipe0_enabled(fd)); } igt_subtest("invalid-buffer") test_invalid_buffer(fd); igt_subtest("fault-buffer") test_fault_buffer(fd); igt_subtest("empty-block") test_empty(fd, 0, EINTR); igt_subtest("empty-nonblock") test_empty(fd, 1, EAGAIN); igt_subtest("short-buffer-block") test_short_buffer(fd, 0); igt_subtest("short-buffer-nonblock") test_short_buffer(fd, 1); } intel-gpu-tools-1.14/tests/gen7_forcewake_mt.c0000644000175000017500000001167112665336131016332 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ /* * Testcase: Exercise a suspect workaround required for FORCEWAKE_MT * */ #include "igt.h" #include #include #include #include "drm.h" IGT_TEST_DESCRIPTION("Exercise a suspect workaround required for" " FORCEWAKE_MT."); #define FORCEWAKE_MT 0xa188 struct thread { pthread_t thread; void *mmio; int fd; int bit; }; static const struct pci_id_match match[] = { INTEL_IVB_D_IDS(NULL), INTEL_IVB_M_IDS(NULL), INTEL_HSW_D_IDS(NULL), INTEL_HSW_M_IDS(NULL), { 0, 0, 0 }, }; static struct pci_device *__igfx_get(void) { struct pci_device *dev; if (pci_system_init()) return 0; dev = pci_device_find_by_slot(0, 0, 2, 0); if (dev == NULL || dev->vendor_id != 0x8086) { struct pci_device_iterator *iter; iter = pci_id_match_iterator_create(match); if (!iter) return 0; dev = pci_device_next(iter); pci_iterator_destroy(iter); } return dev; } static void *igfx_get_mmio(void) { struct pci_device *pci = __igfx_get(); void *mmio = NULL; int error; igt_skip_on(pci == NULL); igt_skip_on(intel_gen(pci->device_id) != 7); error = pci_device_probe(pci); igt_assert_eq(error, 0); error = pci_device_map_range(pci, pci->regions[0].base_addr, 2*1024*1024, PCI_DEV_MAP_FLAG_WRITABLE, &mmio); igt_assert_eq(error, 0); igt_assert(mmio != NULL); return mmio; } static void *thread(void *arg) { struct thread *t = arg; uint32_t *forcewake_mt = (uint32_t *)((char *)t->mmio + FORCEWAKE_MT); uint32_t bit = 1 << t->bit; while (1) { *forcewake_mt = bit << 16 | bit; igt_assert(*forcewake_mt & bit); *forcewake_mt = bit << 16; igt_assert((*forcewake_mt & bit) == 0); } return NULL; } #define MI_STORE_REGISTER_MEM (0x24<<23) igt_simple_main { struct thread t[16]; int i; t[0].fd = drm_open_driver(DRIVER_INTEL); t[0].mmio = igfx_get_mmio(); for (i = 2; i < 16; i++) { t[i] = t[0]; t[i].bit = i; pthread_create(&t[i].thread, NULL, thread, &t[i]); } sleep(2); for (i = 0; i < 1000; i++) { uint32_t *p; struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 exec[2]; struct drm_i915_gem_relocation_entry reloc[2]; uint32_t b[] = { MI_LOAD_REGISTER_IMM, FORCEWAKE_MT, 2 << 16 | 2, MI_STORE_REGISTER_MEM | 1, FORCEWAKE_MT, 0, // to be patched MI_LOAD_REGISTER_IMM, FORCEWAKE_MT, 2 << 16, MI_STORE_REGISTER_MEM | 1, FORCEWAKE_MT, 1 * sizeof(uint32_t), // to be patched MI_BATCH_BUFFER_END, 0 }; memset(exec, 0, sizeof(exec)); exec[1].handle = gem_create(t[0].fd, 4096); exec[1].relocation_count = 2; exec[1].relocs_ptr = (uintptr_t)reloc; gem_write(t[0].fd, exec[1].handle, 0, b, sizeof(b)); exec[0].handle = gem_create(t[0].fd, 4096); reloc[0].offset = 5 * sizeof(uint32_t); reloc[0].delta = 0; reloc[0].target_handle = exec[0].handle; reloc[0].read_domains = I915_GEM_DOMAIN_RENDER; reloc[0].write_domain = I915_GEM_DOMAIN_RENDER; reloc[0].presumed_offset = 0; reloc[1].offset = 11 * sizeof(uint32_t); reloc[1].delta = 1 * sizeof(uint32_t); reloc[1].target_handle = exec[0].handle; reloc[1].read_domains = I915_GEM_DOMAIN_RENDER; reloc[1].write_domain = I915_GEM_DOMAIN_RENDER; reloc[1].presumed_offset = 0; memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)&exec; execbuf.buffer_count = 2; execbuf.batch_len = sizeof(b); execbuf.flags = I915_EXEC_SECURE; gem_execbuf(t[0].fd, &execbuf); gem_sync(t[0].fd, exec[1].handle); p = gem_mmap__gtt(t[0].fd, exec[0].handle, 4096, PROT_READ); igt_info("[%d]={ %08x %08x }\n", i, p[0], p[1]); igt_assert(p[0] & 2); igt_assert((p[1] & 2) == 0); munmap(p, 4096); gem_close(t[0].fd, exec[0].handle); gem_close(t[0].fd, exec[1].handle); usleep(1000); } } intel-gpu-tools-1.14/tests/gem_streaming_writes.c0000644000175000017500000002777212665336131017173 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ #define _GNU_SOURCE #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include "drm.h" #define OBJECT_SIZE 1024*1024 #define CHUNK_SIZE 32 #define COPY_BLT_CMD (2<<29|0x53<<22|0x6) #define BLT_WRITE_ALPHA (1<<21) #define BLT_WRITE_RGB (1<<20) #define BLT_WRITE_ARGB (BLT_WRITE_ALPHA | BLT_WRITE_RGB) #define LOCAL_I915_EXEC_HANDLE_LUT (1<<12) IGT_TEST_DESCRIPTION("Test of streaming writes into active GPU sources"); #define SRC 0 #define DST 1 #define BATCH 2 #define src exec[SRC].handle #define src_offset exec[SRC].offset #define dst exec[DST].handle #define dst_offset exec[DST].offset static void test_streaming(int fd, int mode, int sync) { const int has_64bit_reloc = intel_gen(intel_get_drm_devid(fd)) >= 8; struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 exec[3]; struct drm_i915_gem_relocation_entry reloc[128]; uint32_t tmp[] = { MI_BATCH_BUFFER_END }; uint64_t __src_offset, __dst_offset; uint32_t *s, *d; uint32_t offset; struct { uint32_t handle; uint64_t offset; } *batch; int i, n; memset(exec, 0, sizeof(exec)); exec[SRC].handle = gem_create(fd, OBJECT_SIZE); exec[DST].handle = gem_create(fd, OBJECT_SIZE); switch (mode) { case 0: /* cpu/snoop */ gem_set_caching(fd, src, I915_CACHING_CACHED); s = gem_mmap__cpu(fd, src, 0, OBJECT_SIZE, PROT_READ | PROT_WRITE); break; case 1: /* gtt */ s = gem_mmap__gtt(fd, src, OBJECT_SIZE, PROT_READ | PROT_WRITE); break; case 2: /* wc */ s = gem_mmap__wc(fd, src, 0, OBJECT_SIZE, PROT_READ | PROT_WRITE); break; } *s = 0; /* fault the object into the mappable range first (for GTT) */ d = gem_mmap__cpu(fd, dst, 0, OBJECT_SIZE, PROT_READ); gem_write(fd, dst, 0, tmp, sizeof(tmp)); memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)exec; execbuf.buffer_count = 2; execbuf.flags = LOCAL_I915_EXEC_HANDLE_LUT; if (__gem_execbuf(fd, &execbuf)) { execbuf.flags = 0; igt_require(__gem_execbuf(fd, &execbuf) == 0); } /* We assume that the active objects are fixed to avoid relocations */ __src_offset = src_offset; __dst_offset = dst_offset; memset(reloc, 0, sizeof(reloc)); for (i = 0; i < 64; i++) { reloc[2*i+0].offset = 64*i + 4 * sizeof(uint32_t); reloc[2*i+0].delta = 0; reloc[2*i+0].target_handle = execbuf.flags & LOCAL_I915_EXEC_HANDLE_LUT ? DST : dst; reloc[2*i+0].presumed_offset = dst_offset; reloc[2*i+0].read_domains = I915_GEM_DOMAIN_RENDER; reloc[2*i+0].write_domain = I915_GEM_DOMAIN_RENDER; reloc[2*i+1].offset = 64*i + 7 * sizeof(uint32_t); if (has_64bit_reloc) reloc[2*i+1].offset += sizeof(uint32_t); reloc[2*i+1].delta = 0; reloc[2*i+1].target_handle = execbuf.flags & LOCAL_I915_EXEC_HANDLE_LUT ? SRC : src; reloc[2*i+1].presumed_offset = src_offset; reloc[2*i+1].read_domains = I915_GEM_DOMAIN_RENDER; reloc[2*i+1].write_domain = 0; } gem_execbuf(fd, &execbuf); igt_assert_eq_u64(__src_offset, src_offset); igt_assert_eq_u64(__dst_offset, dst_offset); exec[DST].flags = EXEC_OBJECT_WRITE; exec[BATCH].relocation_count = 2; execbuf.buffer_count = 3; execbuf.flags |= I915_EXEC_NO_RELOC; if (gem_has_blt(fd)) execbuf.flags |= I915_EXEC_BLT; batch = malloc(sizeof(*batch) * (OBJECT_SIZE / CHUNK_SIZE / 64)); for (i = n = 0; i < OBJECT_SIZE / CHUNK_SIZE / 64; i++) { uint32_t *base; batch[i].handle = gem_create(fd, 4096); batch[i].offset = 0; base = gem_mmap__cpu(fd, batch[i].handle, 0, 4096, PROT_WRITE); gem_set_domain(fd, batch[i].handle, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU); for (int j = 0; j < 64; j++) { unsigned x = (n * CHUNK_SIZE) % 4096 >> 2; unsigned y = (n * CHUNK_SIZE) / 4096; uint32_t *b = base + 16 * j; int k = 0; b[k] = COPY_BLT_CMD | BLT_WRITE_ARGB; if (has_64bit_reloc) b[k] += 2; k++; b[k++] = 0xcc << 16 | 1 << 25 | 1 << 24 | 4096; b[k++] = (y << 16) | x; b[k++] = ((y+1) << 16) | (x + (CHUNK_SIZE >> 2)); b[k++] = dst_offset; if (has_64bit_reloc) b[k++] = dst_offset >> 32; b[k++] = (y << 16) | x; b[k++] = 4096; b[k++] = src_offset; if (has_64bit_reloc) b[k++] = src_offset >> 32; b[k++] = MI_BATCH_BUFFER_END; n++; } munmap(base, 4096); } for (int pass = 0; pass < 256; pass++) { int domain = mode ? I915_GEM_DOMAIN_GTT : I915_GEM_DOMAIN_CPU; gem_set_domain(fd, src, domain, domain); if (pass == 0) { for (i = 0; i < OBJECT_SIZE/4; i++) s[i] = i; } /* Now copy from the src to the dst in 32byte chunks */ for (offset = 0; offset < OBJECT_SIZE; offset += CHUNK_SIZE) { int b; if (pass) { if (sync) gem_set_domain(fd, src, domain, domain); for (i = 0; i < CHUNK_SIZE/4; i++) s[offset/4 + i] = (OBJECT_SIZE*pass + offset)/4 + i; } igt_assert(exec[DST].flags & EXEC_OBJECT_WRITE); b = offset / CHUNK_SIZE / 64; n = offset / CHUNK_SIZE % 64; exec[BATCH].relocs_ptr = (uintptr_t)(reloc + 2*n); exec[BATCH].handle = batch[b].handle; exec[BATCH].offset = batch[b].offset; execbuf.batch_start_offset = 64*n; gem_execbuf(fd, &execbuf); igt_assert_eq_u64(__src_offset, src_offset); igt_assert_eq_u64(__dst_offset, dst_offset); batch[b].offset = exec[BATCH].offset; } gem_set_domain(fd, dst, I915_GEM_DOMAIN_CPU, 0); for (offset = 0; offset < OBJECT_SIZE/4; offset++) igt_assert_eq(pass*OBJECT_SIZE/4 + offset, d[offset]); } for (i = 0; i < OBJECT_SIZE / CHUNK_SIZE / 64; i++) gem_close(fd, batch[i].handle); free(batch); munmap(s, OBJECT_SIZE); gem_close(fd, src); munmap(d, OBJECT_SIZE); gem_close(fd, dst); } static void test_batch(int fd, int mode, int reverse) { const int has_64bit_reloc = intel_gen(intel_get_drm_devid(fd)) >= 8; struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 exec[3]; struct drm_i915_gem_relocation_entry reloc[2]; uint32_t tmp[] = { MI_BATCH_BUFFER_END }; uint64_t __src_offset, __dst_offset; bool need_64b_start_offset = true; uint64_t batch_size; uint32_t *s, *d; uint32_t *base; uint32_t offset; memset(exec, 0, sizeof(exec)); exec[DST].handle = gem_create(fd, OBJECT_SIZE); exec[SRC].handle = gem_create(fd, OBJECT_SIZE); s = gem_mmap__wc(fd, src, 0, OBJECT_SIZE, PROT_READ | PROT_WRITE); d = gem_mmap__cpu(fd, dst, 0, OBJECT_SIZE, PROT_READ); memset(reloc, 0, sizeof(reloc)); reloc[0].offset = 4 * sizeof(uint32_t); reloc[0].delta = 0; reloc[0].target_handle = execbuf.flags & LOCAL_I915_EXEC_HANDLE_LUT ? DST : dst; reloc[0].presumed_offset = dst_offset; reloc[0].read_domains = I915_GEM_DOMAIN_RENDER; reloc[0].write_domain = I915_GEM_DOMAIN_RENDER; reloc[1].offset = 7 * sizeof(uint32_t); if (has_64bit_reloc) reloc[1].offset += sizeof(uint32_t); reloc[1].delta = 0; reloc[1].target_handle = execbuf.flags & LOCAL_I915_EXEC_HANDLE_LUT ? SRC : src; reloc[1].presumed_offset = src_offset; reloc[1].read_domains = I915_GEM_DOMAIN_RENDER; reloc[1].write_domain = 0; batch_size = ALIGN(OBJECT_SIZE / CHUNK_SIZE * 128, 4096); exec[BATCH].relocs_ptr = (uintptr_t)reloc; exec[BATCH].relocation_count = 2; exec[BATCH].handle = gem_create(fd, batch_size); switch (mode) { case 0: /* cpu/snoop */ igt_require(gem_has_llc(fd)); base = gem_mmap__cpu(fd, exec[BATCH].handle, 0, batch_size, PROT_READ | PROT_WRITE); break; case 1: /* gtt */ base = gem_mmap__gtt(fd, exec[BATCH].handle, batch_size, PROT_READ | PROT_WRITE); break; case 2: /* wc */ base = gem_mmap__wc(fd, exec[BATCH].handle, 0, batch_size, PROT_READ | PROT_WRITE); break; } *base = 0; /* fault the object into the mappable range first */ gem_write(fd, exec[BATCH].handle, 0, tmp, sizeof(tmp)); memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)exec; execbuf.buffer_count = 3; execbuf.flags = LOCAL_I915_EXEC_HANDLE_LUT; if (gem_has_blt(fd)) execbuf.flags |= I915_EXEC_BLT; if (__gem_execbuf(fd, &execbuf)) { execbuf.flags &= ~LOCAL_I915_EXEC_HANDLE_LUT; gem_execbuf(fd, &execbuf); } execbuf.flags |= I915_EXEC_NO_RELOC; exec[DST].flags = EXEC_OBJECT_WRITE; /* We assume that the active objects are fixed to avoid relocations */ exec[BATCH].relocation_count = 0; __src_offset = src_offset; __dst_offset = dst_offset; offset = mode ? I915_GEM_DOMAIN_GTT : I915_GEM_DOMAIN_CPU; gem_set_domain(fd, exec[BATCH].handle, offset, offset); for (int pass = 0; pass < 256; pass++) { gem_set_domain(fd, src, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); for (offset = 0; offset < OBJECT_SIZE/4; offset++) s[offset] = OBJECT_SIZE*pass/4 + offset; /* Now copy from the src to the dst in 32byte chunks */ for (offset = 0; offset < OBJECT_SIZE / CHUNK_SIZE; offset++) { unsigned x = (offset * CHUNK_SIZE) % 4096 >> 2; unsigned y = (offset * CHUNK_SIZE) / 4096; int k; execbuf.batch_start_offset = 128 * offset; if (!need_64b_start_offset) execbuf.batch_start_offset += 8 * (pass & 7); igt_assert(execbuf.batch_start_offset <= batch_size - 64); if (reverse) execbuf.batch_start_offset = batch_size - execbuf.batch_start_offset - 64; igt_assert(execbuf.batch_start_offset <= batch_size - 64); k = execbuf.batch_start_offset / 4; base[k] = COPY_BLT_CMD | BLT_WRITE_ARGB; if (has_64bit_reloc) base[k] += 2; k++; base[k++] = 0xcc << 16 | 1 << 25 | 1 << 24 | 4096; base[k++] = (y << 16) | x; base[k++] = ((y+1) << 16) | (x + (CHUNK_SIZE >> 2)); base[k++] = dst_offset; if (has_64bit_reloc) base[k++] = dst_offset >> 32; base[k++] = (y << 16) | x; base[k++] = 4096; base[k++] = src_offset; if (has_64bit_reloc) base[k++] = src_offset >> 32; base[k++] = MI_BATCH_BUFFER_END; igt_assert(exec[DST].flags & EXEC_OBJECT_WRITE); gem_execbuf(fd, &execbuf); igt_assert_eq_u64(__src_offset, src_offset); igt_assert_eq_u64(__dst_offset, dst_offset); } gem_set_domain(fd, dst, I915_GEM_DOMAIN_CPU, 0); for (offset = 0; offset < OBJECT_SIZE/4; offset++) igt_assert_eq(pass*OBJECT_SIZE/4 + offset, d[offset]); } munmap(base, OBJECT_SIZE / CHUNK_SIZE * 128); gem_close(fd, exec[BATCH].handle); munmap(s, OBJECT_SIZE); gem_close(fd, src); munmap(d, OBJECT_SIZE); gem_close(fd, dst); } igt_main { int fd, sync; igt_fixture fd = drm_open_driver(DRIVER_INTEL); for (sync = 2; sync--; ) { igt_subtest_f("cpu%s", sync ? "-sync":"") test_streaming(fd, 0, sync); igt_subtest_f("gtt%s", sync ? "-sync":"") test_streaming(fd, 1, sync); igt_subtest_f("wc%s", sync ? "-sync":"") test_streaming(fd, 2, sync); } igt_subtest("batch-cpu") test_batch(fd, 0, 0); igt_subtest("batch-gtt") test_batch(fd, 1, 0); igt_subtest("batch-wc") test_batch(fd, 2, 0); igt_subtest("batch-reverse-cpu") test_batch(fd, 0, 1); igt_subtest("batch-reverse-gtt") test_batch(fd, 1, 1); igt_subtest("batch-reverse-wc") test_batch(fd, 2, 1); igt_fixture close(fd); } intel-gpu-tools-1.14/tests/drm_import_export.c0000644000175000017500000001653412665336131016524 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter */ #define _GNU_SOURCE #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include int fd; drm_intel_bufmgr *bufmgr; int fd1; drm_intel_bufmgr *bufmgr1; bool use_flink; static void new_buffers(void) { unsigned int *buf1; drm_intel_bo *bo1, *bo2; bo1 = drm_intel_bo_alloc(bufmgr, "buf1",16384, 4096); igt_assert(bo1); drm_intel_bo_map(bo1, 1); bo2 = drm_intel_bo_alloc(bufmgr, "buf2", 16384, 4096); igt_assert(bo2); drm_intel_bo_map(bo2, 1); buf1 = (unsigned int *)bo1->virtual; igt_assert(buf1); memset(buf1, 0, 16384); buf1[4000]=0x05000000; drm_intel_bo_exec(bo1, 16384, NULL, 0,0); drm_intel_bo_wait_rendering(bo1); drm_intel_bo_unmap( bo1 ); drm_intel_bo_unreference(bo1); drm_intel_bo_unmap( bo2 ); drm_intel_bo_unreference(bo2); } static void test_surfaces(drm_intel_bo *bo_shared) { drm_intel_bo * bo; int loop=2; while(loop--) { if (use_flink) { uint32_t name; drm_intel_bo_flink(bo_shared, &name); bo = drm_intel_bo_gem_create_from_name(bufmgr, "shared resource", name); } else { int prime_fd; drm_intel_bo_gem_export_to_prime(bo_shared, &prime_fd); bo = drm_intel_bo_gem_create_from_prime(bufmgr, prime_fd, 4096); close(prime_fd); } igt_assert(bo); new_buffers(); drm_intel_bo_unreference(bo); } } static void start_test(void) { int i; for (i=0; i < 16384; i++) { drm_intel_bo * bo_shared; bo_shared = drm_intel_bo_alloc(bufmgr1, "buf-shared",16384, 4096); test_surfaces(bo_shared); drm_intel_bo_unreference(bo_shared); } } static void * test_thread(void * par) { #ifdef __linux__ igt_debug("start %ld\n", syscall(SYS_gettid)); #else igt_debug("start %ld\n", (long) pthread_self()); #endif start_test(); return NULL; } #define IMPORT_RACE_LOOPS 100000 struct import_race_thread_data { int prime_fd; uint32_t flink_name; unsigned int stop; pthread_mutex_t mutex; }; /* * Attempt to import the bo. It is possible that GEM_CLOSE was already called * in different thread and from i915 point of view the handle is no longer * valid (thus create_from_prime/name should fail). */ static void *import_close_thread(void *data) { struct import_race_thread_data *t = (struct import_race_thread_data *)data; drm_intel_bo *bo; pthread_mutex_lock(&t->mutex); while (!t->stop) { pthread_mutex_unlock(&t->mutex); bo = NULL; if (use_flink) bo = drm_intel_bo_gem_create_from_name(bufmgr, "buf-shared", t->flink_name); else { pthread_mutex_lock(&t->mutex); if (t->prime_fd != -1) { bo = drm_intel_bo_gem_create_from_prime(bufmgr, t->prime_fd, 4096); pthread_mutex_unlock(&t->mutex); } else /* Lock should be held on entering the loop */ continue; } if (bo == NULL) { /* * If the bo is NULL it means that we've unreferenced in other * thread - therefore we should expect ENOENT */ igt_assert_eq(errno, ENOENT); } else { drm_intel_bo_unreference(bo); } pthread_mutex_lock(&t->mutex); } pthread_mutex_unlock(&t->mutex); return NULL; } /* * It is possible to race between unreference of the underlying BO and importing * it from prime_fd/name. Verify that the behaviour of libdrm is consistent for * prime/flink. */ static void test_import_close_race(void) { pthread_t t; unsigned int loops = IMPORT_RACE_LOOPS; drm_intel_bo *bo; struct import_race_thread_data t_data; memset(&t_data, 0, sizeof(t_data)); pthread_mutex_init(&t_data.mutex, NULL); t_data.prime_fd = -1; igt_assert_eq(pthread_create(&t, NULL, import_close_thread , &t_data), 0); while (loops--) { bo = drm_intel_bo_alloc(bufmgr, "buf-shared", 4096, 4096); igt_assert(bo != NULL); /* * We setup the test in such way, that create_from_* can race between * unreference. If we're using prime, prime_fd is always a valid fd. */ if (use_flink) igt_assert_eq(drm_intel_bo_flink(bo, &(t_data.flink_name)), 0); else { pthread_mutex_lock(&t_data.mutex); igt_assert_eq(drm_intel_bo_gem_export_to_prime(bo, &(t_data.prime_fd)), 0); igt_assert_neq(t_data.prime_fd, -1); pthread_mutex_unlock(&t_data.mutex); } drm_intel_bo_unreference(bo); pthread_mutex_lock(&t_data.mutex); close(t_data.prime_fd); t_data.prime_fd = -1; pthread_mutex_unlock(&t_data.mutex); } pthread_mutex_lock(&t_data.mutex); t_data.stop = 1; pthread_mutex_unlock(&t_data.mutex); pthread_join(t, NULL); pthread_mutex_destroy(&t_data.mutex); } pthread_t test_thread_id1; pthread_t test_thread_id2; pthread_t test_thread_id3; pthread_t test_thread_id4; igt_main { igt_fixture { fd1 = drm_open_driver(DRIVER_INTEL); igt_assert(fd1 >= 0); bufmgr1 = drm_intel_bufmgr_gem_init(fd1, 8 *1024); igt_assert(bufmgr1); drm_intel_bufmgr_gem_enable_reuse(bufmgr1); fd = drm_open_driver(DRIVER_INTEL); igt_assert(fd >= 0); bufmgr = drm_intel_bufmgr_gem_init(fd, 8 *1024); igt_assert(bufmgr); drm_intel_bufmgr_gem_enable_reuse(bufmgr); } igt_subtest("import-close-race-flink") { use_flink = true; test_import_close_race(); } igt_subtest("import-close-race-prime") { use_flink = false; test_import_close_race(); } igt_subtest("flink") { use_flink = true; pthread_create(&test_thread_id1, NULL, test_thread, NULL); pthread_create(&test_thread_id2, NULL, test_thread, NULL); pthread_create(&test_thread_id3, NULL, test_thread, NULL); pthread_create(&test_thread_id4, NULL, test_thread, NULL); pthread_join(test_thread_id1, NULL); pthread_join(test_thread_id2, NULL); pthread_join(test_thread_id3, NULL); pthread_join(test_thread_id4, NULL); } igt_subtest("prime") { use_flink = false; pthread_create(&test_thread_id1, NULL, test_thread, NULL); pthread_create(&test_thread_id2, NULL, test_thread, NULL); pthread_create(&test_thread_id3, NULL, test_thread, NULL); pthread_create(&test_thread_id4, NULL, test_thread, NULL); pthread_join(test_thread_id1, NULL); pthread_join(test_thread_id2, NULL); pthread_join(test_thread_id3, NULL); pthread_join(test_thread_id4, NULL); } } intel-gpu-tools-1.14/tests/kms_sink_crc_basic.c0000644000175000017500000001007612665336131016550 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include "igt.h" #include #include #include #include #include #include "drm_fourcc.h" #define CRC_BLACK "000000000000" enum color { RED, GREEN, }; typedef struct { int drm_fd; igt_display_t display; struct igt_fb fb_green, fb_red; igt_plane_t *primary; } data_t; static void get_crc(char *crc) { int ret; FILE *file; file = igt_debugfs_fopen("i915_sink_crc_eDP1", "r"); igt_require(file); ret = fscanf(file, "%s\n", crc); igt_require(ret > 0); fclose(file); /* Black screen is always invalid */ igt_assert(strcmp(crc, CRC_BLACK) != 0); } static void assert_color(char *crc, enum color color) { char color_mask[5] = "FFFF\0"; char rs[5], gs[5], bs[5]; unsigned int rh, gh, bh, mask; int ret; sscanf(color_mask, "%4x", &mask); memcpy(rs, &crc[0], 4); rs[4] = '\0'; ret = sscanf(rs, "%4x", &rh); igt_require(ret > 0); memcpy(gs, &crc[4], 4); gs[4] = '\0'; ret = sscanf(gs, "%4x", &gh); igt_require(ret > 0); memcpy(bs, &crc[8], 4); bs[4] = '\0'; ret = sscanf(bs, "%4x", &bh); igt_require(ret > 0); switch (color) { case RED: igt_assert((rh & mask) != 0 && (gh & mask) == 0 && (bh & mask) == 0); break; case GREEN: igt_assert((rh & mask) == 0 && (gh & mask) != 0 && (bh & mask) == 0); break; default: igt_fail(IGT_EXIT_FAILURE); } } static void basic_sink_crc_check(data_t *data) { char crc[13]; /* Go Green */ igt_plane_set_fb(data->primary, &data->fb_green); igt_display_commit(&data->display); /* It should be Green */ get_crc(crc); assert_color(crc, GREEN); /* Go Red */ igt_plane_set_fb(data->primary, &data->fb_red); igt_display_commit(&data->display); /* It should be Red */ get_crc(crc); assert_color(crc, RED); } static void run_test(data_t *data) { igt_display_t *display = &data->display; igt_output_t *output; drmModeModeInfo *mode; for_each_connected_output(display, output) { drmModeConnectorPtr c = output->config.connector; if (c->connector_type != DRM_MODE_CONNECTOR_eDP || c->connection != DRM_MODE_CONNECTED) continue; igt_output_set_pipe(output, PIPE_ANY); mode = igt_output_get_mode(output); igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_I915_FORMAT_MOD_X_TILED, 0.0, 1.0, 0.0, &data->fb_green); igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_I915_FORMAT_MOD_X_TILED, 1.0, 0.0, 0.0, &data->fb_red); data->primary = igt_output_get_plane(output, IGT_PLANE_PRIMARY); basic_sink_crc_check(data); return; } igt_skip("no eDP with CRC support found\n"); } igt_simple_main { data_t data = {}; igt_skip_on_simulation(); data.drm_fd = drm_open_driver_master(DRIVER_INTEL); kmstest_set_vt_graphics_mode(); igt_display_init(&data.display, data.drm_fd); run_test(&data); igt_display_fini(&data.display); } intel-gpu-tools-1.14/tests/pm_rpm.c0000644000175000017500000014547312665336131014246 00000000000000/* * Copyright © 2013, 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Paulo Zanoni * */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #define MSR_PC8_RES 0x630 #define MSR_PC9_RES 0x631 #define MSR_PC10_RES 0x632 #define MAX_CONNECTORS 32 #define MAX_ENCODERS 32 #define MAX_CRTCS 16 enum pc8_status { PC8_ENABLED, PC8_DISABLED }; enum screen_type { SCREEN_TYPE_LPSP, SCREEN_TYPE_NON_LPSP, SCREEN_TYPE_ANY, }; enum plane_type { PLANE_OVERLAY, PLANE_PRIMARY, PLANE_CURSOR, }; /* Wait flags */ #define DONT_WAIT 0 #define WAIT_STATUS 1 #define WAIT_PC8_RES 2 #define WAIT_EXTRA 4 #define USE_DPMS 8 int drm_fd, msr_fd, pc8_status_fd; bool has_runtime_pm, has_pc8; struct mode_set_data ms_data; /* Stuff used when creating FBs and mode setting. */ struct mode_set_data { drmModeResPtr res; drmModeConnectorPtr connectors[MAX_CONNECTORS]; drmModePropertyBlobPtr edids[MAX_CONNECTORS]; uint32_t devid; }; /* Stuff we query at different times so we can compare. */ struct compare_data { drmModeResPtr res; drmModeEncoderPtr encoders[MAX_ENCODERS]; drmModeConnectorPtr connectors[MAX_CONNECTORS]; drmModeCrtcPtr crtcs[MAX_CRTCS]; drmModePropertyBlobPtr edids[MAX_CONNECTORS]; }; struct modeset_params { uint32_t crtc_id; uint32_t connector_id; struct igt_fb fb; drmModeModeInfoPtr mode; }; struct modeset_params lpsp_mode_params; struct modeset_params non_lpsp_mode_params; struct modeset_params *default_mode_params; static int8_t *pm_data = NULL; /* If the read fails, then the machine doesn't support PC8+ residencies. */ static bool supports_pc8_plus_residencies(void) { int rc; uint64_t val; rc = pread(msr_fd, &val, sizeof(uint64_t), MSR_PC8_RES); if (rc != sizeof(val)) return false; rc = pread(msr_fd, &val, sizeof(uint64_t), MSR_PC9_RES); if (rc != sizeof(val)) return false; rc = pread(msr_fd, &val, sizeof(uint64_t), MSR_PC10_RES); if (rc != sizeof(val)) return false; return true; } static uint64_t get_residency(uint32_t type) { int rc; uint64_t ret; rc = pread(msr_fd, &ret, sizeof(uint64_t), type); igt_assert(rc == sizeof(ret)); return ret; } static bool pc8_plus_residency_changed(unsigned int timeout_sec) { uint64_t res_pc8, res_pc9, res_pc10; res_pc8 = get_residency(MSR_PC8_RES); res_pc9 = get_residency(MSR_PC9_RES); res_pc10 = get_residency(MSR_PC10_RES); return igt_wait(res_pc8 != get_residency(MSR_PC8_RES) || res_pc9 != get_residency(MSR_PC9_RES) || res_pc10 != get_residency(MSR_PC10_RES), timeout_sec * 1000, 100); } static enum pc8_status get_pc8_status(void) { ssize_t n_read; char buf[150]; /* The whole file has less than 100 chars. */ lseek(pc8_status_fd, 0, SEEK_SET); n_read = read(pc8_status_fd, buf, ARRAY_SIZE(buf)); igt_assert(n_read >= 0); buf[n_read] = '\0'; if (strstr(buf, "\nEnabled: yes\n")) return PC8_ENABLED; else return PC8_DISABLED; } static bool wait_for_pc8_status(enum pc8_status status) { return igt_wait(get_pc8_status() == status, 10000, 100); } static bool wait_for_suspended(void) { if (has_pc8 && !has_runtime_pm) return wait_for_pc8_status(PC8_ENABLED); else return igt_wait_for_pm_status(IGT_RUNTIME_PM_STATUS_SUSPENDED); } static bool wait_for_active(void) { if (has_pc8 && !has_runtime_pm) return wait_for_pc8_status(PC8_DISABLED); else return igt_wait_for_pm_status(IGT_RUNTIME_PM_STATUS_ACTIVE); } static void disable_all_screens_dpms(struct mode_set_data *data) { int i; for (i = 0; i < data->res->count_connectors; i++) { drmModeConnectorPtr c = data->connectors[i]; kmstest_set_connector_dpms(drm_fd, c, DRM_MODE_DPMS_OFF); } } static void disable_all_screens(struct mode_set_data *data) { kmstest_unset_all_crtcs(drm_fd, data->res); } #define disable_all_screens_and_wait(data) do { \ disable_all_screens(data); \ igt_assert(wait_for_suspended()); \ } while (0) static void disable_or_dpms_all_screens(struct mode_set_data *data, bool dpms) { if (dpms) disable_all_screens_dpms(&ms_data); else disable_all_screens(&ms_data); } #define disable_or_dpms_all_screens_and_wait(data, dpms) do { \ disable_or_dpms_all_screens((data), (dpms)); \ igt_assert(wait_for_suspended()); \ } while (0) static uint32_t find_crtc_for_connector(drmModeResPtr res, drmModeConnectorPtr connector) { drmModeEncoderPtr e; uint32_t crtc_id = 0; int i, j; for (i = 0; i < connector->count_encoders && !crtc_id; i++) { e = drmModeGetEncoder(drm_fd, connector->encoders[i]); for (j = 0; (e->possible_crtcs >> j) && !crtc_id; j++) if (e->possible_crtcs & (1 << j)) crtc_id = res->crtcs[j]; drmModeFreeEncoder(e); } igt_assert(crtc_id); return crtc_id; } static bool init_modeset_params_for_type(struct mode_set_data *data, struct modeset_params *params, enum screen_type type) { int i; drmModeConnectorPtr connector = NULL; drmModeModeInfoPtr mode = NULL; for (i = 0; i < data->res->count_connectors; i++) { drmModeConnectorPtr c = data->connectors[i]; if (type == SCREEN_TYPE_LPSP && c->connector_type != DRM_MODE_CONNECTOR_eDP) continue; if (type == SCREEN_TYPE_NON_LPSP && c->connector_type == DRM_MODE_CONNECTOR_eDP) continue; if (c->connection == DRM_MODE_CONNECTED && c->count_modes) { connector = c; mode = &c->modes[0]; break; } } if (!connector) return false; igt_create_pattern_fb(drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, ¶ms->fb); params->crtc_id = find_crtc_for_connector(data->res, connector); params->connector_id = connector->connector_id; params->mode = mode; return true; } static void init_modeset_cached_params(struct mode_set_data *data) { bool lpsp, non_lpsp; lpsp = init_modeset_params_for_type(data, &lpsp_mode_params, SCREEN_TYPE_LPSP); non_lpsp = init_modeset_params_for_type(data, &non_lpsp_mode_params, SCREEN_TYPE_NON_LPSP); if (lpsp) default_mode_params = &lpsp_mode_params; else if (non_lpsp) default_mode_params = &non_lpsp_mode_params; else default_mode_params = NULL; } static bool set_mode_for_params(struct modeset_params *params) { int rc; rc = drmModeSetCrtc(drm_fd, params->crtc_id, params->fb.fb_id, 0, 0, ¶ms->connector_id, 1, params->mode); return (rc == 0); } #define set_mode_for_params_and_wait(params) do { \ igt_assert(set_mode_for_params(params)); \ igt_assert(wait_for_active()); \ } while (0) static bool enable_one_screen_with_type(struct mode_set_data *data, enum screen_type type) { struct modeset_params *params = NULL; switch (type) { case SCREEN_TYPE_ANY: params = default_mode_params; break; case SCREEN_TYPE_LPSP: params = &lpsp_mode_params; break; case SCREEN_TYPE_NON_LPSP: params = &non_lpsp_mode_params; break; default: igt_assert(0); } if (!params) return false; return set_mode_for_params(params); } static void enable_one_screen(struct mode_set_data *data) { /* SKIP if there are no connected screens. */ igt_require(enable_one_screen_with_type(data, SCREEN_TYPE_ANY)); } #define enable_one_screen_and_wait(data) do { \ enable_one_screen(data); \ igt_assert(wait_for_active()); \ } while (0) static drmModePropertyBlobPtr get_connector_edid(drmModeConnectorPtr connector, int index) { bool found; uint64_t prop_value; drmModePropertyPtr prop; drmModePropertyBlobPtr blob = NULL; found = kmstest_get_property(drm_fd, connector->connector_id, DRM_MODE_OBJECT_CONNECTOR, "EDID", NULL, &prop_value, &prop); if (found) { igt_assert(prop->flags & DRM_MODE_PROP_BLOB); igt_assert(prop->count_blobs == 0); blob = drmModeGetPropertyBlob(drm_fd, prop_value); drmModeFreeProperty(prop); } return blob; } static void init_mode_set_data(struct mode_set_data *data) { int i; data->res = drmModeGetResources(drm_fd); igt_assert(data->res); igt_assert(data->res->count_connectors <= MAX_CONNECTORS); for (i = 0; i < data->res->count_connectors; i++) { data->connectors[i] = drmModeGetConnectorCurrent(drm_fd, data->res->connectors[i]); data->edids[i] = get_connector_edid(data->connectors[i], i); } data->devid = intel_get_drm_devid(drm_fd); kmstest_set_vt_graphics_mode(); init_modeset_cached_params(&ms_data); } static void fini_mode_set_data(struct mode_set_data *data) { int i; for (i = 0; i < data->res->count_connectors; i++) { drmModeFreeConnector(data->connectors[i]); drmModeFreePropertyBlob(data->edids[i]); } drmModeFreeResources(data->res); } static void get_drm_info(struct compare_data *data) { int i; data->res = drmModeGetResources(drm_fd); igt_assert(data->res); igt_assert(data->res->count_connectors <= MAX_CONNECTORS); igt_assert(data->res->count_encoders <= MAX_ENCODERS); igt_assert(data->res->count_crtcs <= MAX_CRTCS); for (i = 0; i < data->res->count_connectors; i++) { /* Don't use GetConnectorCurrent, we want to force a reprobe * here. */ data->connectors[i] = drmModeGetConnector(drm_fd, data->res->connectors[i]); data->edids[i] = get_connector_edid(data->connectors[i], i); } for (i = 0; i < data->res->count_encoders; i++) data->encoders[i] = drmModeGetEncoder(drm_fd, data->res->encoders[i]); for (i = 0; i < data->res->count_crtcs; i++) data->crtcs[i] = drmModeGetCrtc(drm_fd, data->res->crtcs[i]); } static void free_drm_info(struct compare_data *data) { int i; for (i = 0; i < data->res->count_connectors; i++) { drmModeFreeConnector(data->connectors[i]); drmModeFreePropertyBlob(data->edids[i]); } for (i = 0; i < data->res->count_encoders; i++) drmModeFreeEncoder(data->encoders[i]); for (i = 0; i < data->res->count_crtcs; i++) drmModeFreeCrtc(data->crtcs[i]); drmModeFreeResources(data->res); } #define COMPARE(d1, d2, data) igt_assert_eq(d1->data, d2->data) #define COMPARE_ARRAY(d1, d2, size, data) do { \ for (i = 0; i < size; i++) \ igt_assert(d1->data[i] == d2->data[i]); \ } while (0) static void assert_drm_resources_equal(struct compare_data *d1, struct compare_data *d2) { COMPARE(d1, d2, res->count_connectors); COMPARE(d1, d2, res->count_encoders); COMPARE(d1, d2, res->count_crtcs); COMPARE(d1, d2, res->min_width); COMPARE(d1, d2, res->max_width); COMPARE(d1, d2, res->min_height); COMPARE(d1, d2, res->max_height); } static void assert_modes_equal(drmModeModeInfoPtr m1, drmModeModeInfoPtr m2) { COMPARE(m1, m2, clock); COMPARE(m1, m2, hdisplay); COMPARE(m1, m2, hsync_start); COMPARE(m1, m2, hsync_end); COMPARE(m1, m2, htotal); COMPARE(m1, m2, hskew); COMPARE(m1, m2, vdisplay); COMPARE(m1, m2, vsync_start); COMPARE(m1, m2, vsync_end); COMPARE(m1, m2, vtotal); COMPARE(m1, m2, vscan); COMPARE(m1, m2, vrefresh); COMPARE(m1, m2, flags); COMPARE(m1, m2, type); igt_assert(strcmp(m1->name, m2->name) == 0); } static void assert_drm_connectors_equal(drmModeConnectorPtr c1, drmModeConnectorPtr c2) { int i; COMPARE(c1, c2, connector_id); COMPARE(c1, c2, connector_type); COMPARE(c1, c2, connector_type_id); COMPARE(c1, c2, mmWidth); COMPARE(c1, c2, mmHeight); COMPARE(c1, c2, count_modes); COMPARE(c1, c2, count_props); COMPARE(c1, c2, count_encoders); COMPARE_ARRAY(c1, c2, c1->count_props, props); COMPARE_ARRAY(c1, c2, c1->count_encoders, encoders); for (i = 0; i < c1->count_modes; i++) assert_modes_equal(&c1->modes[0], &c2->modes[0]); } static void assert_drm_encoders_equal(drmModeEncoderPtr e1, drmModeEncoderPtr e2) { COMPARE(e1, e2, encoder_id); COMPARE(e1, e2, encoder_type); COMPARE(e1, e2, possible_crtcs); COMPARE(e1, e2, possible_clones); } static void assert_drm_crtcs_equal(drmModeCrtcPtr c1, drmModeCrtcPtr c2) { COMPARE(c1, c2, crtc_id); } static void assert_drm_edids_equal(drmModePropertyBlobPtr e1, drmModePropertyBlobPtr e2) { if (!e1 && !e2) return; igt_assert(e1 && e2); COMPARE(e1, e2, length); igt_assert(memcmp(e1->data, e2->data, e1->length) == 0); } static void assert_drm_infos_equal(struct compare_data *d1, struct compare_data *d2) { int i; assert_drm_resources_equal(d1, d2); for (i = 0; i < d1->res->count_connectors; i++) { assert_drm_connectors_equal(d1->connectors[i], d2->connectors[i]); assert_drm_edids_equal(d1->edids[i], d2->edids[i]); } for (i = 0; i < d1->res->count_encoders; i++) assert_drm_encoders_equal(d1->encoders[i], d2->encoders[i]); for (i = 0; i < d1->res->count_crtcs; i++) assert_drm_crtcs_equal(d1->crtcs[i], d2->crtcs[i]); } /* We could check the checksum too, but just the header is probably enough. */ static bool edid_is_valid(const unsigned char *edid) { char edid_header[] = { 0x0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x0, }; return (memcmp(edid, edid_header, sizeof(edid_header)) == 0); } static int count_drm_valid_edids(struct mode_set_data *data) { int i, ret = 0; for (i = 0; i < data->res->count_connectors; i++) if (data->edids[i] && edid_is_valid(data->edids[i]->data)) ret++; return ret; } static bool i2c_edid_is_valid(int fd) { int rc; unsigned char edid[128] = {}; struct i2c_msg msgs[] = { { /* Start at 0. */ .addr = 0x50, .flags = 0, .len = 1, .buf = edid, }, { /* Now read the EDID. */ .addr = 0x50, .flags = I2C_M_RD, .len = 128, .buf = edid, } }; struct i2c_rdwr_ioctl_data msgset = { .msgs = msgs, .nmsgs = 2, }; rc = ioctl(fd, I2C_RDWR, &msgset); return (rc >= 0) ? edid_is_valid(edid) : false; } static int count_i2c_valid_edids(void) { int fd, ret = 0; DIR *dir; struct dirent *dirent; char full_name[32]; dir = opendir("/dev/"); igt_assert(dir); while ((dirent = readdir(dir))) { if (strncmp(dirent->d_name, "i2c-", 4) == 0) { snprintf(full_name, 32, "/dev/%s", dirent->d_name); fd = open(full_name, O_RDWR); igt_assert_neq(fd, -1); if (i2c_edid_is_valid(fd)) ret++; close(fd); } } closedir(dir); return ret; } static int count_vga_outputs(struct mode_set_data *data) { int i, count = 0; for (i = 0; i < data->res->count_connectors; i++) if (data->connectors[i]->connector_type == DRM_MODE_CONNECTOR_VGA) count++; return count; } static void test_i2c(struct mode_set_data *data) { int i2c_edids = count_i2c_valid_edids(); int drm_edids = count_drm_valid_edids(data); int vga_outputs = count_vga_outputs(data); int diff; igt_debug("i2c edids:%d drm edids:%d vga outputs:%d\n", i2c_edids, drm_edids, vga_outputs); /* We fail to detect some VGA monitors using our i2c method. If you look * at the dmesg of these cases, you'll see the Kernel complaining about * the EDID reading mostly FFs and then disabling bit-banging. Since we * don't want to reimplement everything the Kernel does, let's just * accept the fact that some VGA outputs won't be properly detected. */ diff = drm_edids - i2c_edids; igt_assert(diff <= vga_outputs && diff >= 0); } static void setup_pc8(void) { has_pc8 = false; /* Only Haswell supports the PC8 feature. */ if (!IS_HASWELL(ms_data.devid) && !IS_BROADWELL(ms_data.devid)) return; /* Make sure our Kernel supports MSR and the module is loaded. */ igt_assert(system("modprobe -q msr > /dev/null 2>&1") != -1); msr_fd = open("/dev/cpu/0/msr", O_RDONLY); igt_assert_f(msr_fd >= 0, "Can't open /dev/cpu/0/msr.\n"); /* Non-ULT machines don't support PC8+. */ if (!supports_pc8_plus_residencies()) return; pc8_status_fd = igt_debugfs_open("i915_pc8_status", O_RDONLY); if (pc8_status_fd == -1) pc8_status_fd = igt_debugfs_open("i915_runtime_pm_status", O_RDONLY); igt_assert_f(pc8_status_fd >= 0, "Can't open /sys/kernel/debug/dri/0/i915_runtime_pm_status"); has_pc8 = true; } static void setup_environment(void) { drm_fd = drm_open_driver_master(DRIVER_INTEL); init_mode_set_data(&ms_data); pm_data = igt_pm_enable_sata_link_power_management(); has_runtime_pm = igt_setup_runtime_pm(); setup_pc8(); igt_info("Runtime PM support: %d\n", has_runtime_pm); igt_info("PC8 residency support: %d\n", has_pc8); igt_require(has_runtime_pm); } static void restore_environment(void) { igt_pm_restore_sata_link_power_management(pm_data); free(pm_data); } static void teardown_environment(void) { restore_environment(); fini_mode_set_data(&ms_data); drmClose(drm_fd); close(msr_fd); if (has_pc8) close(pc8_status_fd); } static void basic_subtest(void) { disable_all_screens_and_wait(&ms_data); enable_one_screen_and_wait(&ms_data); } static void pc8_residency_subtest(void) { igt_require(has_pc8); /* Make sure PC8+ residencies move! */ disable_all_screens(&ms_data); igt_assert_f(pc8_plus_residency_changed(120), "Machine is not reaching PC8+ states, please check its " "configuration.\n"); /* Make sure PC8+ residencies stop! */ enable_one_screen(&ms_data); igt_assert_f(!pc8_plus_residency_changed(10), "PC8+ residency didn't stop with screen enabled.\n"); } static void modeset_subtest(enum screen_type type, int rounds, int wait_flags) { int i; if (wait_flags & WAIT_PC8_RES) igt_require(has_pc8); if (wait_flags & WAIT_EXTRA) rounds /= 2; for (i = 0; i < rounds; i++) { if (wait_flags & USE_DPMS) disable_all_screens_dpms(&ms_data); else disable_all_screens(&ms_data); if (wait_flags & WAIT_STATUS) igt_assert(wait_for_suspended()); if (wait_flags & WAIT_PC8_RES) igt_assert(pc8_plus_residency_changed(120)); if (wait_flags & WAIT_EXTRA) sleep(5); /* If we skip this line it's because the type of screen we want * is not connected. */ igt_require(enable_one_screen_with_type(&ms_data, type)); if (wait_flags & WAIT_STATUS) igt_assert(wait_for_active()); if (wait_flags & WAIT_PC8_RES) igt_assert(!pc8_plus_residency_changed(5)); if (wait_flags & WAIT_EXTRA) sleep(5); } } /* Test of the DRM resources reported by the IOCTLs are still the same. This * ensures we still see the monitors with the same eyes. We get the EDIDs and * compare them, which ensures we use DP AUX or GMBUS depending on what's * connected. */ static void drm_resources_equal_subtest(void) { struct compare_data pre_suspend, during_suspend, post_suspend; enable_one_screen_and_wait(&ms_data); get_drm_info(&pre_suspend); igt_assert(wait_for_active()); disable_all_screens_and_wait(&ms_data); get_drm_info(&during_suspend); igt_assert(wait_for_suspended()); enable_one_screen_and_wait(&ms_data); get_drm_info(&post_suspend); igt_assert(wait_for_active()); assert_drm_infos_equal(&pre_suspend, &during_suspend); assert_drm_infos_equal(&pre_suspend, &post_suspend); free_drm_info(&pre_suspend); free_drm_info(&during_suspend); free_drm_info(&post_suspend); } static void i2c_subtest_check_environment(void) { int i2c_dev_files = 0; DIR *dev_dir; struct dirent *dirent; /* Make sure the /dev/i2c-* files exist. */ igt_assert(system("modprobe -q i2c-dev > /dev/null 2>&1") != -1); dev_dir = opendir("/dev"); igt_assert(dev_dir); while ((dirent = readdir(dev_dir))) { if (strncmp(dirent->d_name, "i2c-", 4) == 0) i2c_dev_files++; } closedir(dev_dir); igt_require(i2c_dev_files); } /* Try to use raw I2C, which also needs interrupts. */ static void i2c_subtest(void) { i2c_subtest_check_environment(); enable_one_screen_and_wait(&ms_data); disable_all_screens_and_wait(&ms_data); test_i2c(&ms_data); igt_assert(wait_for_suspended()); enable_one_screen(&ms_data); } static void read_full_file(const char *name) { int rc, fd; char buf[128]; igt_assert_f(wait_for_suspended(), "File: %s\n", name); fd = open(name, O_RDONLY); if (fd < 0) return; do { rc = read(fd, buf, ARRAY_SIZE(buf)); } while (rc == ARRAY_SIZE(buf)); rc = close(fd); igt_assert_eq(rc, 0); igt_assert_f(wait_for_suspended(), "File: %s\n", name); } static void read_files_from_dir(const char *name, int level) { DIR *dir; struct dirent *dirent; char *full_name; int rc; dir = opendir(name); igt_assert(dir); full_name = malloc(PATH_MAX); igt_assert_lt(level, 128); while ((dirent = readdir(dir))) { struct stat stat_buf; if (strcmp(dirent->d_name, ".") == 0) continue; if (strcmp(dirent->d_name, "..") == 0) continue; snprintf(full_name, PATH_MAX, "%s/%s", name, dirent->d_name); rc = lstat(full_name, &stat_buf); igt_assert_eq(rc, 0); if (S_ISDIR(stat_buf.st_mode)) read_files_from_dir(full_name, level + 1); if (S_ISREG(stat_buf.st_mode)) read_full_file(full_name); } free(full_name); closedir(dir); } /* This test will probably pass, with a small chance of hanging the machine in * case of bugs. Many of the bugs exercised by this patch just result in dmesg * errors, so a "pass" here should be confirmed by a check on dmesg. */ static void debugfs_read_subtest(void) { const char *path = "/sys/kernel/debug/dri/0"; DIR *dir; dir = opendir(path); igt_require_f(dir, "Can't open the debugfs directory\n"); closedir(dir); disable_all_screens_and_wait(&ms_data); read_files_from_dir(path, 0); } /* Read the comment on debugfs_read_subtest(). */ static void sysfs_read_subtest(void) { const char *path = "/sys/devices/pci0000:00/0000:00:02.0"; DIR *dir; dir = opendir(path); igt_require_f(dir, "Can't open the sysfs directory\n"); closedir(dir); disable_all_screens_and_wait(&ms_data); read_files_from_dir(path, 0); } /* Make sure we don't suspend when we have the i915_forcewake_user file open. */ static void debugfs_forcewake_user_subtest(void) { int fd, rc; igt_require(intel_gen(ms_data.devid) >= 6); disable_all_screens_and_wait(&ms_data); fd = igt_open_forcewake_handle(); igt_require(fd >= 0); if (has_runtime_pm) { igt_assert(wait_for_active()); sleep(10); igt_assert(wait_for_active()); } else { igt_assert(wait_for_suspended()); } rc = close(fd); igt_assert_eq(rc, 0); igt_assert(wait_for_suspended()); } static void gem_mmap_subtest(bool gtt_mmap) { int i; uint32_t handle; int buf_size = 8192; uint8_t *gem_buf; /* Create, map and set data while the device is active. */ enable_one_screen_and_wait(&ms_data); handle = gem_create(drm_fd, buf_size); if (gtt_mmap) { gem_buf = gem_mmap__gtt(drm_fd, handle, buf_size, PROT_READ | PROT_WRITE); } else { gem_buf = gem_mmap__cpu(drm_fd, handle, 0, buf_size, 0); } for (i = 0; i < buf_size; i++) gem_buf[i] = i & 0xFF; for (i = 0; i < buf_size; i++) igt_assert(gem_buf[i] == (i & 0xFF)); /* Now suspend, read and modify. */ disable_all_screens_and_wait(&ms_data); for (i = 0; i < buf_size; i++) igt_assert(gem_buf[i] == (i & 0xFF)); igt_assert(wait_for_suspended()); for (i = 0; i < buf_size; i++) gem_buf[i] = (~i & 0xFF); igt_assert(wait_for_suspended()); /* Now resume and see if it's still there. */ enable_one_screen_and_wait(&ms_data); for (i = 0; i < buf_size; i++) igt_assert(gem_buf[i] == (~i & 0xFF)); igt_assert(munmap(gem_buf, buf_size) == 0); /* Now the opposite: suspend, and try to create the mmap while * suspended. */ disable_all_screens_and_wait(&ms_data); if (gtt_mmap) { gem_buf = gem_mmap__gtt(drm_fd, handle, buf_size, PROT_READ | PROT_WRITE); } else { gem_buf = gem_mmap__cpu(drm_fd, handle, 0, buf_size, 0); } igt_assert(wait_for_suspended()); for (i = 0; i < buf_size; i++) gem_buf[i] = i & 0xFF; for (i = 0; i < buf_size; i++) igt_assert(gem_buf[i] == (i & 0xFF)); igt_assert(wait_for_suspended()); /* Resume and check if it's still there. */ enable_one_screen_and_wait(&ms_data); for (i = 0; i < buf_size; i++) igt_assert(gem_buf[i] == (i & 0xFF)); igt_assert(munmap(gem_buf, buf_size) == 0); gem_close(drm_fd, handle); } static void gem_pread_subtest(void) { int i; uint32_t handle; int buf_size = 8192; uint8_t *cpu_buf, *read_buf; cpu_buf = malloc(buf_size); read_buf = malloc(buf_size); igt_assert(cpu_buf); igt_assert(read_buf); memset(cpu_buf, 0, buf_size); memset(read_buf, 0, buf_size); /* Create and set data while the device is active. */ enable_one_screen_and_wait(&ms_data); handle = gem_create(drm_fd, buf_size); for (i = 0; i < buf_size; i++) cpu_buf[i] = i & 0xFF; gem_write(drm_fd, handle, 0, cpu_buf, buf_size); gem_read(drm_fd, handle, 0, read_buf, buf_size); for (i = 0; i < buf_size; i++) igt_assert(cpu_buf[i] == read_buf[i]); /* Now suspend, read and modify. */ disable_all_screens_and_wait(&ms_data); memset(read_buf, 0, buf_size); gem_read(drm_fd, handle, 0, read_buf, buf_size); for (i = 0; i < buf_size; i++) igt_assert(cpu_buf[i] == read_buf[i]); igt_assert(wait_for_suspended()); for (i = 0; i < buf_size; i++) cpu_buf[i] = (~i & 0xFF); gem_write(drm_fd, handle, 0, cpu_buf, buf_size); igt_assert(wait_for_suspended()); /* Now resume and see if it's still there. */ enable_one_screen_and_wait(&ms_data); memset(read_buf, 0, buf_size); gem_read(drm_fd, handle, 0, read_buf, buf_size); for (i = 0; i < buf_size; i++) igt_assert(cpu_buf[i] == read_buf[i]); gem_close(drm_fd, handle); free(cpu_buf); free(read_buf); } /* Paints a square of color $color, size $width x $height, at position $x x $y * of $dst_handle, which contains pitch $pitch. */ static void submit_blt_cmd(uint32_t dst_handle, uint16_t x, uint16_t y, uint16_t width, uint16_t height, uint32_t pitch, uint32_t color, uint32_t *presumed_dst_offset) { int i, reloc_pos; uint32_t batch_handle; int batch_size = 8 * sizeof(uint32_t); uint32_t batch_buf[batch_size]; struct drm_i915_gem_execbuffer2 execbuf = {}; struct drm_i915_gem_exec_object2 objs[2] = {{}, {}}; struct drm_i915_gem_relocation_entry relocs[1] = {{}}; struct drm_i915_gem_wait gem_wait; i = 0; if (intel_gen(ms_data.devid) >= 8) batch_buf[i++] = XY_COLOR_BLT_CMD_NOLEN | XY_COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB | 0x5; else batch_buf[i++] = XY_COLOR_BLT_CMD_NOLEN | XY_COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB | 0x4; batch_buf[i++] = (3 << 24) | (0xF0 << 16) | (pitch); batch_buf[i++] = (y << 16) | x; batch_buf[i++] = ((y + height) << 16) | (x + width); reloc_pos = i; batch_buf[i++] = *presumed_dst_offset; if (intel_gen(ms_data.devid) >= 8) batch_buf[i++] = 0; batch_buf[i++] = color; batch_buf[i++] = MI_BATCH_BUFFER_END; if (intel_gen(ms_data.devid) < 8) batch_buf[i++] = MI_NOOP; igt_assert(i * sizeof(uint32_t) == batch_size); batch_handle = gem_create(drm_fd, batch_size); gem_write(drm_fd, batch_handle, 0, batch_buf, batch_size); relocs[0].target_handle = dst_handle; relocs[0].delta = 0; relocs[0].offset = reloc_pos * sizeof(uint32_t); relocs[0].presumed_offset = *presumed_dst_offset; relocs[0].read_domains = 0; relocs[0].write_domain = I915_GEM_DOMAIN_RENDER; objs[0].handle = dst_handle; objs[0].alignment = 64; objs[1].handle = batch_handle; objs[1].relocation_count = 1; objs[1].relocs_ptr = (uintptr_t)relocs; execbuf.buffers_ptr = (uintptr_t)objs; execbuf.buffer_count = 2; execbuf.batch_len = batch_size; execbuf.flags = I915_EXEC_BLT; i915_execbuffer2_set_context_id(execbuf, 0); do_ioctl(drm_fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); *presumed_dst_offset = relocs[0].presumed_offset; gem_wait.flags = 0; gem_wait.timeout_ns = 10000000000LL; /* 10s */ gem_wait.bo_handle = batch_handle; do_ioctl(drm_fd, DRM_IOCTL_I915_GEM_WAIT, &gem_wait); gem_wait.bo_handle = dst_handle; do_ioctl(drm_fd, DRM_IOCTL_I915_GEM_WAIT, &gem_wait); gem_close(drm_fd, batch_handle); } /* Make sure we can submit a batch buffer and verify its result. */ static void gem_execbuf_subtest(void) { int x, y; uint32_t handle; int bpp = 4; int pitch = 128 * bpp; int dst_size = 128 * 128 * bpp; /* 128x128 square */ uint32_t *cpu_buf; uint32_t presumed_offset = 0; int sq_x = 5, sq_y = 10, sq_w = 15, sq_h = 20; uint32_t color; /* Create and set data while the device is active. */ enable_one_screen_and_wait(&ms_data); handle = gem_create(drm_fd, dst_size); cpu_buf = malloc(dst_size); igt_assert(cpu_buf); memset(cpu_buf, 0, dst_size); gem_write(drm_fd, handle, 0, cpu_buf, dst_size); /* Now suspend and try it. */ disable_all_screens_and_wait(&ms_data); color = 0x12345678; submit_blt_cmd(handle, sq_x, sq_y, sq_w, sq_h, pitch, color, &presumed_offset); igt_assert(wait_for_suspended()); gem_read(drm_fd, handle, 0, cpu_buf, dst_size); igt_assert(wait_for_suspended()); for (y = 0; y < 128; y++) { for (x = 0; x < 128; x++) { uint32_t px = cpu_buf[y * 128 + x]; if (y >= sq_y && y < (sq_y + sq_h) && x >= sq_x && x < (sq_x + sq_w)) igt_assert_eq_u32(px, color); else igt_assert(px == 0); } } /* Now resume and check for it again. */ enable_one_screen_and_wait(&ms_data); memset(cpu_buf, 0, dst_size); gem_read(drm_fd, handle, 0, cpu_buf, dst_size); for (y = 0; y < 128; y++) { for (x = 0; x < 128; x++) { uint32_t px = cpu_buf[y * 128 + x]; if (y >= sq_y && y < (sq_y + sq_h) && x >= sq_x && x < (sq_x + sq_w)) igt_assert_eq_u32(px, color); else igt_assert(px == 0); } } /* Now we'll do the opposite: do the blt while active, then read while * suspended. We use the same spot, but a different color. As a bonus, * we're testing the presumed_offset from the previous command. */ color = 0x87654321; submit_blt_cmd(handle, sq_x, sq_y, sq_w, sq_h, pitch, color, &presumed_offset); disable_all_screens_and_wait(&ms_data); memset(cpu_buf, 0, dst_size); gem_read(drm_fd, handle, 0, cpu_buf, dst_size); for (y = 0; y < 128; y++) { for (x = 0; x < 128; x++) { uint32_t px = cpu_buf[y * 128 + x]; if (y >= sq_y && y < (sq_y + sq_h) && x >= sq_x && x < (sq_x + sq_w)) igt_assert_eq_u32(px, color); else igt_assert(px == 0); } } gem_close(drm_fd, handle); free(cpu_buf); } /* Assuming execbuf already works, let's see what happens when we force many * suspend/resume cycles with commands. */ static void gem_execbuf_stress_subtest(int rounds, int wait_flags) { int i; int batch_size = 4 * sizeof(uint32_t); uint32_t batch_buf[batch_size]; uint32_t handle; struct drm_i915_gem_execbuffer2 execbuf = {}; struct drm_i915_gem_exec_object2 objs[1] = {{}}; if (wait_flags & WAIT_PC8_RES) igt_require(has_pc8); i = 0; batch_buf[i++] = MI_NOOP; batch_buf[i++] = MI_NOOP; batch_buf[i++] = MI_BATCH_BUFFER_END; batch_buf[i++] = MI_NOOP; igt_assert(i * sizeof(uint32_t) == batch_size); disable_all_screens_and_wait(&ms_data); handle = gem_create(drm_fd, batch_size); gem_write(drm_fd, handle, 0, batch_buf, batch_size); objs[0].handle = handle; execbuf.buffers_ptr = (uintptr_t)objs; execbuf.buffer_count = 1; execbuf.batch_len = batch_size; execbuf.flags = I915_EXEC_RENDER; i915_execbuffer2_set_context_id(execbuf, 0); for (i = 0; i < rounds; i++) { do_ioctl(drm_fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); if (wait_flags & WAIT_STATUS) igt_assert(wait_for_suspended()); if (wait_flags & WAIT_PC8_RES) igt_assert(pc8_plus_residency_changed(120)); if (wait_flags & WAIT_EXTRA) sleep(5); } gem_close(drm_fd, handle); } /* When this test was written, it triggered WARNs and DRM_ERRORs on dmesg. */ static void gem_idle_subtest(void) { disable_all_screens_and_wait(&ms_data); sleep(5); gem_quiescent_gpu(drm_fd); } static void gem_evict_pwrite_subtest(void) { static drm_intel_bufmgr *bufmgr; uint32_t buf; int i; bufmgr = drm_intel_bufmgr_gem_init(drm_fd, 4096); igt_assert(bufmgr); igt_init_aperture_trashers(bufmgr); igt_trash_aperture(); disable_or_dpms_all_screens_and_wait(&ms_data, true); igt_assert(wait_for_suspended()); buf = 0; for (i = 0; i < num_trash_bos; i++) gem_write(drm_fd, trash_bos[i]->handle, 0, &buf, sizeof(buf)); igt_cleanup_aperture_trashers(); drm_intel_bufmgr_destroy(bufmgr); } /* This also triggered WARNs on dmesg at some point. */ static void reg_read_ioctl_subtest(void) { struct drm_i915_reg_read rr = { .offset = 0x2358, /* render ring timestamp */ }; disable_all_screens_and_wait(&ms_data); do_ioctl(drm_fd, DRM_IOCTL_I915_REG_READ, &rr); igt_assert(wait_for_suspended()); } static bool device_in_pci_d3(void) { struct pci_device *pci_dev; int rc; uint16_t val; pci_dev = intel_get_pci_device(); rc = pci_device_cfg_read_u16(pci_dev, &val, 0xd4); igt_assert_eq(rc, 0); return (val & 0x3) == 0x3; } static void pci_d3_state_subtest(void) { igt_require(has_runtime_pm); disable_all_screens_and_wait(&ms_data); igt_assert(device_in_pci_d3()); enable_one_screen_and_wait(&ms_data); igt_assert(!device_in_pci_d3()); } static void __attribute__((noreturn)) stay_subtest(void) { disable_all_screens_and_wait(&ms_data); while (1) sleep(600); } static void system_suspend_subtest(void) { disable_all_screens_and_wait(&ms_data); igt_system_suspend_autoresume(); igt_assert(wait_for_suspended()); } static void system_suspend_execbuf_subtest(void) { int i; int batch_size = 4 * sizeof(uint32_t); uint32_t batch_buf[batch_size]; uint32_t handle; struct drm_i915_gem_execbuffer2 execbuf = {}; struct drm_i915_gem_exec_object2 objs[1] = {{}}; i = 0; batch_buf[i++] = MI_NOOP; batch_buf[i++] = MI_NOOP; batch_buf[i++] = MI_BATCH_BUFFER_END; batch_buf[i++] = MI_NOOP; igt_assert(i * sizeof(uint32_t) == batch_size); handle = gem_create(drm_fd, batch_size); gem_write(drm_fd, handle, 0, batch_buf, batch_size); objs[0].handle = handle; execbuf.buffers_ptr = (uintptr_t)objs; execbuf.buffer_count = 1; execbuf.batch_len = batch_size; execbuf.flags = I915_EXEC_RENDER; i915_execbuffer2_set_context_id(execbuf, 0); disable_all_screens_and_wait(&ms_data); igt_system_suspend_autoresume(); igt_assert(wait_for_suspended()); for (i = 0; i < 20; i++) { do_ioctl(drm_fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); igt_assert(wait_for_suspended()); } gem_close(drm_fd, handle); } static void system_suspend_modeset_subtest(void) { disable_all_screens_and_wait(&ms_data); igt_system_suspend_autoresume(); igt_assert(wait_for_suspended()); enable_one_screen_and_wait(&ms_data); disable_all_screens_and_wait(&ms_data); } /* Enable a screen, activate DPMS, then do a modeset. At some point our driver * produced WARNs on this case. */ static void dpms_mode_unset_subtest(enum screen_type type) { disable_all_screens_and_wait(&ms_data); igt_require(enable_one_screen_with_type(&ms_data, type)); igt_assert(wait_for_active()); disable_all_screens_dpms(&ms_data); igt_assert(wait_for_suspended()); disable_all_screens_and_wait(&ms_data); } static void fill_igt_fb(struct igt_fb *fb, uint32_t color) { int i; uint32_t *ptr; ptr = gem_mmap__gtt(drm_fd, fb->gem_handle, fb->size, PROT_WRITE); for (i = 0; i < fb->size/sizeof(uint32_t); i++) ptr[i] = color; igt_assert(munmap(ptr, fb->size) == 0); } /* At some point, this test triggered WARNs in the Kernel. */ static void cursor_subtest(bool dpms) { int rc; struct igt_fb cursor_fb1, cursor_fb2, cursor_fb3; uint32_t crtc_id; disable_all_screens_and_wait(&ms_data); igt_require(default_mode_params); crtc_id = default_mode_params->crtc_id; igt_create_fb(drm_fd, 64, 64, DRM_FORMAT_ARGB8888, LOCAL_DRM_FORMAT_MOD_NONE, &cursor_fb1); igt_create_fb(drm_fd, 64, 64, DRM_FORMAT_ARGB8888, LOCAL_DRM_FORMAT_MOD_NONE, &cursor_fb2); igt_create_fb(drm_fd, 64, 64, DRM_FORMAT_ARGB8888, LOCAL_I915_FORMAT_MOD_X_TILED, &cursor_fb3); fill_igt_fb(&cursor_fb1, 0xFF00FFFF); fill_igt_fb(&cursor_fb2, 0xFF00FF00); fill_igt_fb(&cursor_fb3, 0xFFFF0000); set_mode_for_params_and_wait(default_mode_params); rc = drmModeSetCursor(drm_fd, crtc_id, cursor_fb1.gem_handle, cursor_fb1.width, cursor_fb1.height); igt_assert_eq(rc, 0); rc = drmModeMoveCursor(drm_fd, crtc_id, 0, 0); igt_assert_eq(rc, 0); igt_assert(wait_for_active()); disable_or_dpms_all_screens_and_wait(&ms_data, dpms); /* First, just move the cursor. */ rc = drmModeMoveCursor(drm_fd, crtc_id, 1, 1); igt_assert_eq(rc, 0); igt_assert(wait_for_suspended()); /* Then unset it, and set a new one. */ rc = drmModeSetCursor(drm_fd, crtc_id, 0, 0, 0); igt_assert_eq(rc, 0); igt_assert(wait_for_suspended()); rc = drmModeSetCursor(drm_fd, crtc_id, cursor_fb2.gem_handle, cursor_fb1.width, cursor_fb2.height); igt_assert_eq(rc, 0); igt_assert(wait_for_suspended()); /* Move the new cursor. */ rc = drmModeMoveCursor(drm_fd, crtc_id, 2, 2); igt_assert_eq(rc, 0); igt_assert(wait_for_suspended()); /* Now set a new one without unsetting the previous one. */ rc = drmModeSetCursor(drm_fd, crtc_id, cursor_fb1.gem_handle, cursor_fb1.width, cursor_fb1.height); igt_assert_eq(rc, 0); igt_assert(wait_for_suspended()); /* Cursor 3 was created with tiling and painted with a GTT mmap, so * hopefully it has some fences around it. */ rc = drmModeRmFB(drm_fd, cursor_fb3.fb_id); igt_assert_eq(rc, 0); gem_set_tiling(drm_fd, cursor_fb3.gem_handle, false, cursor_fb3.stride); igt_assert(wait_for_suspended()); rc = drmModeSetCursor(drm_fd, crtc_id, cursor_fb3.gem_handle, cursor_fb3.width, cursor_fb3.height); igt_assert_eq(rc, 0); igt_assert(wait_for_suspended()); /* Make sure nothing remains for the other tests. */ rc = drmModeSetCursor(drm_fd, crtc_id, 0, 0, 0); igt_assert_eq(rc, 0); igt_assert(wait_for_suspended()); } static enum plane_type get_plane_type(uint32_t plane_id) { int i; bool found; uint64_t prop_value; drmModePropertyPtr prop; const char *enum_name = NULL; enum plane_type type; found = kmstest_get_property(drm_fd, plane_id, DRM_MODE_OBJECT_PLANE, "type", NULL, &prop_value, &prop); igt_assert(found); igt_assert(prop->flags & DRM_MODE_PROP_ENUM); igt_assert(prop_value < prop->count_enums); for (i = 0; i < prop->count_enums; i++) { if (prop->enums[i].value == prop_value) { enum_name = prop->enums[i].name; break; } } igt_assert(enum_name); if (strcmp(enum_name, "Overlay") == 0) type = PLANE_OVERLAY; else if (strcmp(enum_name, "Primary") == 0) type = PLANE_PRIMARY; else if (strcmp(enum_name, "Cursor") == 0) type = PLANE_CURSOR; else igt_assert(0); drmModeFreeProperty(prop); return type; } static void test_one_plane(bool dpms, uint32_t plane_id, enum plane_type plane_type) { int rc; uint32_t plane_format, plane_w, plane_h; uint32_t crtc_id; struct igt_fb plane_fb1, plane_fb2; int32_t crtc_x = 0, crtc_y = 0; uint64_t tiling; disable_all_screens_and_wait(&ms_data); crtc_id = default_mode_params->crtc_id; switch (plane_type) { case PLANE_OVERLAY: plane_format = DRM_FORMAT_XRGB8888; plane_w = 64; plane_h = 64; tiling = LOCAL_I915_FORMAT_MOD_X_TILED; break; case PLANE_PRIMARY: plane_format = DRM_FORMAT_XRGB8888; plane_w = default_mode_params->mode->hdisplay; plane_h = default_mode_params->mode->vdisplay; tiling = LOCAL_I915_FORMAT_MOD_X_TILED; break; case PLANE_CURSOR: plane_format = DRM_FORMAT_ARGB8888; plane_w = 64; plane_h = 64; tiling = LOCAL_DRM_FORMAT_MOD_NONE; break; default: igt_assert(0); break; } igt_create_fb(drm_fd, plane_w, plane_h, plane_format, tiling, &plane_fb1); igt_create_fb(drm_fd, plane_w, plane_h, plane_format, tiling, &plane_fb2); fill_igt_fb(&plane_fb1, 0xFF00FFFF); fill_igt_fb(&plane_fb2, 0xFF00FF00); set_mode_for_params_and_wait(default_mode_params); rc = drmModeSetPlane(drm_fd, plane_id, crtc_id, plane_fb1.fb_id, 0, 0, 0, plane_fb1.width, plane_fb1.height, 0 << 16, 0 << 16, plane_fb1.width << 16, plane_fb1.height << 16); igt_assert_eq(rc, 0); disable_or_dpms_all_screens_and_wait(&ms_data, dpms); /* Just move the plane around. */ if (plane_type != PLANE_PRIMARY) { crtc_x++; crtc_y++; } rc = drmModeSetPlane(drm_fd, plane_id, crtc_id, plane_fb1.fb_id, 0, crtc_x, crtc_y, plane_fb1.width, plane_fb1.height, 0 << 16, 0 << 16, plane_fb1.width << 16, plane_fb1.height << 16); igt_assert_eq(rc, 0); igt_assert(wait_for_suspended()); /* Unset, then change the plane. */ rc = drmModeSetPlane(drm_fd, plane_id, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); igt_assert_eq(rc, 0); igt_assert(wait_for_suspended()); rc = drmModeSetPlane(drm_fd, plane_id, crtc_id, plane_fb2.fb_id, 0, crtc_x, crtc_y, plane_fb2.width, plane_fb2.height, 0 << 16, 0 << 16, plane_fb2.width << 16, plane_fb2.height << 16); igt_assert_eq(rc, 0); igt_assert(wait_for_suspended()); /* Now change the plane without unsetting first. */ rc = drmModeSetPlane(drm_fd, plane_id, crtc_id, plane_fb1.fb_id, 0, crtc_x, crtc_y, plane_fb1.width, plane_fb1.height, 0 << 16, 0 << 16, plane_fb1.width << 16, plane_fb1.height << 16); igt_assert_eq(rc, 0); igt_assert(wait_for_suspended()); /* Make sure nothing remains for the other tests. */ rc = drmModeSetPlane(drm_fd, plane_id, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); igt_assert_eq(rc, 0); igt_assert(wait_for_suspended()); } static int get_crtc_idx(drmModeResPtr res, uint32_t crtc_id) { int i; for (i = 0; i < res->count_crtcs; i++) if (res->crtcs[i] == crtc_id) return i; igt_assert(false); } /* This one also triggered WARNs on our driver at some point in time. */ static void planes_subtest(bool universal, bool dpms) { int i, rc, planes_tested = 0, crtc_idx; drmModePlaneResPtr planes; igt_require(default_mode_params); crtc_idx = get_crtc_idx(ms_data.res, default_mode_params->crtc_id); if (universal) { rc = drmSetClientCap(drm_fd, DRM_CLIENT_CAP_UNIVERSAL_PLANES, 1); igt_require(rc == 0); } planes = drmModeGetPlaneResources(drm_fd); for (i = 0; i < planes->count_planes; i++) { drmModePlanePtr plane; plane = drmModeGetPlane(drm_fd, planes->planes[i]); igt_assert(plane); if (plane->possible_crtcs & (1 << crtc_idx)) { enum plane_type type; type = universal ? get_plane_type(plane->plane_id) : PLANE_OVERLAY; test_one_plane(dpms, plane->plane_id, type); planes_tested++; } drmModeFreePlane(plane); } drmModeFreePlaneResources(planes); if (universal) { rc = drmSetClientCap(drm_fd, DRM_CLIENT_CAP_UNIVERSAL_PLANES, 0); igt_assert_eq(rc, 0); igt_assert_lte(3, planes_tested); } else { igt_assert_lte(1, planes_tested); } } static void pm_test_tiling(void) { uint32_t *handles; uint8_t **gem_bufs; int max_gem_objs = 0; uint8_t off_bit = 14; uint32_t gtt_obj_max_size = (256 * 1024); uint32_t i, j, k, tiling_modes[3] = { I915_TILING_NONE, I915_TILING_X, I915_TILING_Y, }; uint32_t ti, sw; /* default stride value */ uint32_t stride = 512; /* calculate how many objects we can map */ for (i = 1 << off_bit; i <= gtt_obj_max_size; i <<= 1, max_gem_objs++) ; gem_bufs = calloc(max_gem_objs, sizeof(*gem_bufs)); handles = calloc(max_gem_objs, sizeof(*handles)); /* try to set different tiling for each handle */ for (i = 0; i < ARRAY_SIZE(tiling_modes); i++) { for (j = 0, k = 1 << off_bit; k <= gtt_obj_max_size; k <<= 1, j++) { handles[j] = gem_create(drm_fd, k); gem_bufs[j] = gem_mmap__gtt(drm_fd, handles[j], k, PROT_WRITE); memset(gem_bufs[j], 0x0, k); } disable_all_screens_and_wait(&ms_data); for (j = 0; j < max_gem_objs; j++) { gem_set_tiling(drm_fd, handles[j], tiling_modes[i], stride); gem_get_tiling(drm_fd, handles[j], &ti, &sw); igt_assert(tiling_modes[i] == ti); } enable_one_screen_and_wait(&ms_data); for (j = 0, k = 1 << off_bit; k <= gtt_obj_max_size; k <<= 1, j++) { igt_assert(munmap(gem_bufs[j], k) == 0); gem_close(drm_fd, handles[j]); } } free(gem_bufs); free(handles); } static void pm_test_caching(void) { uint32_t handle; uint8_t *gem_buf; uint32_t i, got_caching; uint32_t gtt_obj_max_size = (16 * 1024); uint32_t cache_levels[3] = { I915_CACHING_NONE, I915_CACHING_CACHED, /* LLC caching */ I915_CACHING_DISPLAY, /* eDRAM caching */ }; handle = gem_create(drm_fd, gtt_obj_max_size); gem_buf = gem_mmap__gtt(drm_fd, handle, gtt_obj_max_size, PROT_WRITE); for (i = 0; i < ARRAY_SIZE(cache_levels); i++) { memset(gem_buf, 16 << i, gtt_obj_max_size); disable_all_screens_and_wait(&ms_data); igt_debug("Setting cache level %u\n", cache_levels[i]); gem_set_caching(drm_fd, handle, cache_levels[i]); got_caching = gem_get_caching(drm_fd, handle); igt_debug("Got back %u\n", got_caching); /* * Allow fall-back to CACHING_NONE in case the platform does * not support it. */ if (cache_levels[i] == I915_CACHING_DISPLAY) igt_assert(got_caching == I915_CACHING_NONE || got_caching == I915_CACHING_DISPLAY); else igt_assert(got_caching == cache_levels[i]); enable_one_screen_and_wait(&ms_data); } igt_assert(munmap(gem_buf, gtt_obj_max_size) == 0); gem_close(drm_fd, handle); } static void fences_subtest(bool dpms) { int i; uint32_t *buf_ptr; uint32_t tiling = false, swizzle; struct modeset_params params; disable_all_screens_and_wait(&ms_data); igt_require(default_mode_params); params.crtc_id = default_mode_params->crtc_id; params.connector_id = default_mode_params->connector_id; params.mode = default_mode_params->mode; igt_create_fb(drm_fd, params.mode->hdisplay, params.mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_I915_FORMAT_MOD_X_TILED, ¶ms.fb); /* Even though we passed "true" as the tiling argument, double-check * that the fb is really tiled. */ gem_get_tiling(drm_fd, params.fb.gem_handle, &tiling, &swizzle); igt_assert(tiling); buf_ptr = gem_mmap__gtt(drm_fd, params.fb.gem_handle, params.fb.size, PROT_WRITE | PROT_READ); for (i = 0; i < params.fb.size/sizeof(uint32_t); i++) buf_ptr[i] = i; set_mode_for_params_and_wait(¶ms); disable_or_dpms_all_screens_and_wait(&ms_data, dpms); for (i = 0; i < params.fb.size/sizeof(uint32_t); i++) igt_assert_eq(buf_ptr[i], i); igt_assert(wait_for_suspended()); if (dpms) { drmModeConnectorPtr c = NULL; for (i = 0; i < ms_data.res->count_connectors; i++) if (ms_data.connectors[i]->connector_id == params.connector_id) c = ms_data.connectors[i]; igt_assert(c); kmstest_set_connector_dpms(drm_fd, c, DRM_MODE_DPMS_ON); } else { set_mode_for_params(¶ms); } igt_assert(wait_for_active()); for (i = 0; i < params.fb.size/sizeof(uint32_t); i++) igt_assert_eq(buf_ptr[i], i); igt_assert(munmap(buf_ptr, params.fb.size) == 0); } int rounds = 40; bool stay = false; static int opt_handler(int opt, int opt_index, void *data) { switch (opt) { case 'q': rounds = 10; break; case 's': stay = true; break; default: igt_assert(0); } return 0; } int main(int argc, char *argv[]) { const char *help_str = " --quick\t\tMake the stress-tests not stressful, for quick regression testing.\n" " --stay\t\tDisable all screen and try to go into runtime pm. Useful for debugging."; static struct option long_options[] = { {"quick", 0, 0, 'q'}, {"stay", 0, 0, 's'}, { 0, 0, 0, 0 } }; igt_subtest_init_parse_opts(&argc, argv, "", long_options, help_str, opt_handler, NULL); /* Skip instead of failing in case the machine is not prepared to reach * PC8+. We don't want bug reports from cases where the machine is just * not properly configured. */ igt_fixture setup_environment(); if (stay) igt_subtest("stay") stay_subtest(); /* Essential things */ igt_subtest("basic-rte") basic_subtest(); igt_subtest("drm-resources-equal") drm_resources_equal_subtest(); igt_subtest("basic-pci-d3-state") pci_d3_state_subtest(); /* Basic modeset */ igt_subtest("modeset-lpsp") modeset_subtest(SCREEN_TYPE_LPSP, 1, WAIT_STATUS); igt_subtest("modeset-non-lpsp") modeset_subtest(SCREEN_TYPE_NON_LPSP, 1, WAIT_STATUS); igt_subtest("dpms-lpsp") modeset_subtest(SCREEN_TYPE_LPSP, 1, WAIT_STATUS | USE_DPMS); igt_subtest("dpms-non-lpsp") modeset_subtest(SCREEN_TYPE_NON_LPSP, 1, WAIT_STATUS | USE_DPMS); /* GEM */ igt_subtest("gem-mmap-cpu") gem_mmap_subtest(false); igt_subtest("gem-mmap-gtt") gem_mmap_subtest(true); igt_subtest("gem-pread") gem_pread_subtest(); igt_subtest("gem-execbuf") gem_execbuf_subtest(); igt_subtest("gem-idle") gem_idle_subtest(); igt_subtest("gem-evict-pwrite") gem_evict_pwrite_subtest(); /* Planes and cursors */ igt_subtest("cursor") cursor_subtest(false); igt_subtest("cursor-dpms") cursor_subtest(true); igt_subtest("legacy-planes") planes_subtest(false, false); igt_subtest("legacy-planes-dpms") planes_subtest(false, true); igt_subtest("universal-planes") planes_subtest(true, false); igt_subtest("universal-planes-dpms") planes_subtest(true, true); /* Misc */ igt_subtest("reg-read-ioctl") reg_read_ioctl_subtest(); igt_subtest("i2c") i2c_subtest(); igt_subtest("pc8-residency") pc8_residency_subtest(); igt_subtest("debugfs-read") debugfs_read_subtest(); igt_subtest("debugfs-forcewake-user") debugfs_forcewake_user_subtest(); igt_subtest("sysfs-read") sysfs_read_subtest(); igt_subtest("dpms-mode-unset-lpsp") dpms_mode_unset_subtest(SCREEN_TYPE_LPSP); igt_subtest("dpms-mode-unset-non-lpsp") dpms_mode_unset_subtest(SCREEN_TYPE_NON_LPSP); igt_subtest("fences") fences_subtest(false); igt_subtest("fences-dpms") fences_subtest(true); /* Modeset stress */ igt_subtest("modeset-lpsp-stress") modeset_subtest(SCREEN_TYPE_LPSP, rounds, WAIT_STATUS); igt_subtest("modeset-non-lpsp-stress") modeset_subtest(SCREEN_TYPE_NON_LPSP, rounds, WAIT_STATUS); igt_subtest("modeset-lpsp-stress-no-wait") modeset_subtest(SCREEN_TYPE_LPSP, rounds, DONT_WAIT); igt_subtest("modeset-non-lpsp-stress-no-wait") modeset_subtest(SCREEN_TYPE_NON_LPSP, rounds, DONT_WAIT); igt_subtest("modeset-pc8-residency-stress") modeset_subtest(SCREEN_TYPE_ANY, rounds, WAIT_PC8_RES); igt_subtest("modeset-stress-extra-wait") modeset_subtest(SCREEN_TYPE_ANY, rounds, WAIT_STATUS | WAIT_EXTRA); /* System suspend */ igt_subtest("system-suspend") system_suspend_subtest(); igt_subtest("system-suspend-execbuf") system_suspend_execbuf_subtest(); igt_subtest("system-suspend-modeset") system_suspend_modeset_subtest(); /* GEM stress */ igt_subtest("gem-execbuf-stress") gem_execbuf_stress_subtest(rounds, WAIT_STATUS); igt_subtest("gem-execbuf-stress-pc8") gem_execbuf_stress_subtest(rounds, WAIT_PC8_RES); igt_subtest("gem-execbuf-stress-extra-wait") gem_execbuf_stress_subtest(rounds, WAIT_STATUS | WAIT_EXTRA); /* power-wake reference tests */ igt_subtest("pm-tiling") pm_test_tiling(); igt_subtest("pm-caching") pm_test_caching(); igt_fixture teardown_environment(); igt_exit(); } intel-gpu-tools-1.14/tests/gem_caching.c0000644000175000017500000001677112665336131015176 00000000000000/* * Copyright © 2012 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * Chris Wilson * */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include "intel_bufmgr.h" IGT_TEST_DESCRIPTION("Test snoop consistency when touching partial" " cachelines."); /* * Testcase: snoop consistency when touching partial cachelines * */ static drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; drm_intel_bo *scratch_bo; drm_intel_bo *staging_bo; #define BO_SIZE (4*4096) uint32_t devid; uint64_t mappable_gtt_limit; int fd; static void copy_bo(drm_intel_bo *src, drm_intel_bo *dst) { BLIT_COPY_BATCH_START(0); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ 4096); OUT_BATCH(0 << 16 | 0); OUT_BATCH((BO_SIZE/4096) << 16 | 1024); OUT_RELOC_FENCED(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(0 << 16 | 0); OUT_BATCH(4096); OUT_RELOC_FENCED(src, I915_GEM_DOMAIN_RENDER, 0, 0); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); } static void blt_bo_fill(drm_intel_bo *tmp_bo, drm_intel_bo *bo, uint8_t val) { uint8_t *gtt_ptr; int i; do_or_die(drm_intel_gem_bo_map_gtt(tmp_bo)); gtt_ptr = tmp_bo->virtual; for (i = 0; i < BO_SIZE; i++) gtt_ptr[i] = val; drm_intel_gem_bo_unmap_gtt(tmp_bo); if (bo->offset < mappable_gtt_limit && (IS_G33(devid) || intel_gen(devid) >= 4)) igt_trash_aperture(); copy_bo(tmp_bo, bo); } #define MAX_BLT_SIZE 128 #define ROUNDS 1000 #define TEST_READ 0x1 #define TEST_WRITE 0x2 #define TEST_BOTH (TEST_READ | TEST_WRITE) igt_main { unsigned flags = TEST_BOTH; int i, j; uint8_t *cpu_ptr; uint8_t *gtt_ptr; igt_skip_on_simulation(); igt_fixture { srandom(0xdeadbeef); fd = drm_open_driver(DRIVER_INTEL); gem_require_caching(fd); devid = intel_get_drm_devid(fd); if (IS_GEN2(devid)) /* chipset only handles cached -> uncached */ flags &= ~TEST_READ; if (IS_BROADWATER(devid) || IS_CRESTLINE(devid)) { /* chipset is completely fubar */ igt_info("coherency broken on i965g/gm\n"); flags = 0; } bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); batch = intel_batchbuffer_alloc(bufmgr, devid); /* overallocate the buffers we're actually using because */ scratch_bo = drm_intel_bo_alloc(bufmgr, "scratch bo", BO_SIZE, 4096); gem_set_caching(fd, scratch_bo->handle, 1); staging_bo = drm_intel_bo_alloc(bufmgr, "staging bo", BO_SIZE, 4096); igt_init_aperture_trashers(bufmgr); mappable_gtt_limit = gem_mappable_aperture_size(); } igt_subtest("reads") { igt_require(flags & TEST_READ); igt_info("checking partial reads\n"); for (i = 0; i < ROUNDS; i++) { uint8_t val0 = i; int start, len; blt_bo_fill(staging_bo, scratch_bo, i); start = random() % BO_SIZE; len = random() % (BO_SIZE-start) + 1; drm_intel_bo_map(scratch_bo, false); cpu_ptr = scratch_bo->virtual; for (j = 0; j < len; j++) { igt_assert_f(cpu_ptr[j] == val0, "mismatch at %i, got: %i, expected: %i\n", j, cpu_ptr[j], val0); } drm_intel_bo_unmap(scratch_bo); igt_progress("partial reads test: ", i, ROUNDS); } } igt_subtest("writes") { igt_require(flags & TEST_WRITE); igt_info("checking partial writes\n"); for (i = 0; i < ROUNDS; i++) { uint8_t val0 = i, val1; int start, len; blt_bo_fill(staging_bo, scratch_bo, val0); start = random() % BO_SIZE; len = random() % (BO_SIZE-start) + 1; val1 = val0 + 63; drm_intel_bo_map(scratch_bo, true); cpu_ptr = scratch_bo->virtual; memset(cpu_ptr + start, val1, len); drm_intel_bo_unmap(scratch_bo); copy_bo(scratch_bo, staging_bo); do_or_die(drm_intel_gem_bo_map_gtt(staging_bo)); gtt_ptr = staging_bo->virtual; for (j = 0; j < start; j++) { igt_assert_f(gtt_ptr[j] == val0, "mismatch at %i, partial=[%d+%d] got: %i, expected: %i\n", j, start, len, gtt_ptr[j], val0); } for (; j < start + len; j++) { igt_assert_f(gtt_ptr[j] == val1, "mismatch at %i, partial=[%d+%d] got: %i, expected: %i\n", j, start, len, gtt_ptr[j], val1); } for (; j < BO_SIZE; j++) { igt_assert_f(gtt_ptr[j] == val0, "mismatch at %i, partial=[%d+%d] got: %i, expected: %i\n", j, start, len, gtt_ptr[j], val0); } drm_intel_gem_bo_unmap_gtt(staging_bo); igt_progress("partial writes test: ", i, ROUNDS); } } igt_subtest("read-writes") { igt_require((flags & TEST_BOTH) == TEST_BOTH); igt_info("checking partial writes after partial reads\n"); for (i = 0; i < ROUNDS; i++) { uint8_t val0 = i, val1, val2; int start, len; blt_bo_fill(staging_bo, scratch_bo, val0); /* partial read */ start = random() % BO_SIZE; len = random() % (BO_SIZE-start) + 1; do_or_die(drm_intel_bo_map(scratch_bo, false)); cpu_ptr = scratch_bo->virtual; for (j = 0; j < len; j++) { igt_assert_f(cpu_ptr[j] == val0, "mismatch in read at %i, got: %i, expected: %i\n", j, cpu_ptr[j], val0); } drm_intel_bo_unmap(scratch_bo); /* Change contents through gtt to make the pread cachelines * stale. */ val1 = i + 17; blt_bo_fill(staging_bo, scratch_bo, val1); /* partial write */ start = random() % BO_SIZE; len = random() % (BO_SIZE-start) + 1; val2 = i + 63; do_or_die(drm_intel_bo_map(scratch_bo, false)); cpu_ptr = scratch_bo->virtual; memset(cpu_ptr + start, val2, len); copy_bo(scratch_bo, staging_bo); do_or_die(drm_intel_gem_bo_map_gtt(staging_bo)); gtt_ptr = staging_bo->virtual; for (j = 0; j < start; j++) { igt_assert_f(gtt_ptr[j] == val1, "mismatch at %i, partial=[%d+%d] got: %i, expected: %i\n", j, start, len, gtt_ptr[j], val1); } for (; j < start + len; j++) { igt_assert_f(gtt_ptr[j] == val2, "mismatch at %i, partial=[%d+%d] got: %i, expected: %i\n", j, start, len, gtt_ptr[j], val2); } for (; j < BO_SIZE; j++) { igt_assert_f(gtt_ptr[j] == val1, "mismatch at %i, partial=[%d+%d] got: %i, expected: %i\n", j, start, len, gtt_ptr[j], val1); } drm_intel_gem_bo_unmap_gtt(staging_bo); drm_intel_bo_unmap(scratch_bo); igt_progress("partial read/writes test: ", i, ROUNDS); } } igt_fixture { igt_cleanup_aperture_trashers(); drm_intel_bufmgr_destroy(bufmgr); close(fd); } } intel-gpu-tools-1.14/tests/gem_mmap.c0000644000175000017500000001206312665336131014522 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include "drm.h" #define OBJECT_SIZE 16384 #define PAGE_SIZE 4096 int fd; static void test_huge_bo(int huge) { uint64_t huge_object_size, last_offset, i; unsigned check = CHECK_RAM; char *ptr_cpu; char *cpu_pattern; uint32_t bo; int loop; switch (huge) { case -1: huge_object_size = gem_mappable_aperture_size() / 2; break; case 0: huge_object_size = gem_mappable_aperture_size() + PAGE_SIZE; break; case 1: huge_object_size = gem_aperture_size(fd) + PAGE_SIZE; break; case 2: huge_object_size = (intel_get_total_ram_mb() + 1) << 20; check |= CHECK_SWAP; break; default: return; } intel_require_memory(1, huge_object_size, check); last_offset = huge_object_size - PAGE_SIZE; cpu_pattern = malloc(PAGE_SIZE); igt_assert(cpu_pattern); for (i = 0; i < PAGE_SIZE; i++) cpu_pattern[i] = i; bo = gem_create(fd, huge_object_size); /* Obtain CPU mapping for the object. */ ptr_cpu = __gem_mmap__cpu(fd, bo, 0, huge_object_size, PROT_READ | PROT_WRITE); igt_require(ptr_cpu); gem_set_domain(fd, bo, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU); gem_close(fd, bo); igt_debug("Exercising %'llu bytes\n", (long long)huge_object_size); loop = 0; do { /* Write first page through the mapping and * assert reading it back works. */ memcpy(ptr_cpu, cpu_pattern, PAGE_SIZE); igt_assert(memcmp(ptr_cpu, cpu_pattern, PAGE_SIZE) == 0); memset(ptr_cpu, 0xcc, PAGE_SIZE); /* Write last page through the mapping and * assert reading it back works. */ memcpy(ptr_cpu + last_offset, cpu_pattern, PAGE_SIZE); igt_assert(memcmp(ptr_cpu + last_offset, cpu_pattern, PAGE_SIZE) == 0); memset(ptr_cpu + last_offset, 0xcc, PAGE_SIZE); /* Cross check that accessing two simultaneous pages works. */ igt_assert(memcmp(ptr_cpu, ptr_cpu + last_offset, PAGE_SIZE) == 0); /* Force every page to be faulted and retest */ for (i = 0; i < huge_object_size; i += 4096) ptr_cpu[i] = i >> 12; } while (loop++ == 0); munmap(ptr_cpu, huge_object_size); free(cpu_pattern); } igt_main { struct drm_i915_gem_mmap arg; uint8_t expected[OBJECT_SIZE]; uint8_t buf[OBJECT_SIZE]; uint8_t *addr; int ret; igt_fixture fd = drm_open_driver(DRIVER_INTEL); igt_subtest("bad-object") { memset(&arg, 0, sizeof(arg)); arg.handle = 0x10101010; arg.offset = 0; arg.size = 4096; ret = ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg); igt_assert(ret == -1 && errno == ENOENT); } igt_subtest("basic") { arg.handle = gem_create(fd, OBJECT_SIZE); arg.offset = 0; arg.size = OBJECT_SIZE; ret = ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg); igt_assert(ret == 0); addr = (uint8_t *)(uintptr_t)arg.addr_ptr; igt_info("Testing contents of newly created object.\n"); memset(expected, 0, sizeof(expected)); igt_assert(memcmp(addr, expected, sizeof(expected)) == 0); igt_info("Testing coherency of writes and mmap reads.\n"); memset(buf, 0, sizeof(buf)); memset(buf + 1024, 0x01, 1024); memset(expected + 1024, 0x01, 1024); gem_write(fd, arg.handle, 0, buf, OBJECT_SIZE); igt_assert(memcmp(buf, addr, sizeof(buf)) == 0); igt_info("Testing that mapping stays after close\n"); gem_close(fd, arg.handle); igt_assert(memcmp(buf, addr, sizeof(buf)) == 0); igt_info("Testing unmapping\n"); munmap(addr, OBJECT_SIZE); } igt_subtest("short-mmap") { igt_assert(OBJECT_SIZE > 4096); arg.handle = gem_create(fd, OBJECT_SIZE); addr = gem_mmap__cpu(fd, arg.handle, 0, 4096, PROT_WRITE); memset(addr, 0, 4096); munmap(addr, 4096); gem_close(fd, arg.handle); } igt_subtest("basic-small-bo") test_huge_bo(-1); igt_subtest("big-bo") test_huge_bo(0); igt_subtest("huge-bo") test_huge_bo(1); igt_subtest("swap-bo") test_huge_bo(2); igt_fixture close(fd); } intel-gpu-tools-1.14/tests/gem_tiling_max_stride.c0000644000175000017500000000722412665336131017300 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Ville Syrjälä * */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include "drm.h" IGT_TEST_DESCRIPTION("Check that max fence stride works."); static void do_test_invalid_tiling(int fd, uint32_t handle, int tiling, int stride) { igt_assert(__gem_set_tiling(fd, handle, tiling, tiling ? stride : 0) == -EINVAL); } static void test_invalid_tiling(int fd, uint32_t handle, int stride) { do_test_invalid_tiling(fd, handle, I915_TILING_X, stride); do_test_invalid_tiling(fd, handle, I915_TILING_Y, stride); } /** * Testcase: Check that max fence stride works */ igt_simple_main { int fd; uint32_t *ptr; uint32_t *data; uint32_t handle; uint32_t stride; uint32_t size; uint32_t devid; int i = 0, x, y; int tile_width = 512; int tile_height = 8; fd = drm_open_driver(DRIVER_INTEL); devid = intel_get_drm_devid(fd); if (intel_gen(devid) >= 7) stride = 256 * 1024; else if (intel_gen(devid) >= 4) stride = 128 * 1024; else { if (IS_GEN2(devid)) { tile_width = 128; tile_height = 16; } stride = 8 * 1024; } size = stride * tile_height; data = malloc(size); igt_assert(data); /* Fill each line with the line number */ for (y = 0; y < tile_height; y++) { for (x = 0; x < stride / 4; x++) data[i++] = y; } handle = gem_create(fd, size); ptr = gem_mmap__gtt(fd, handle, size, PROT_READ | PROT_WRITE); test_invalid_tiling(fd, handle, 0); test_invalid_tiling(fd, handle, 64); test_invalid_tiling(fd, handle, stride - 1); test_invalid_tiling(fd, handle, stride + 1); test_invalid_tiling(fd, handle, stride + 127); test_invalid_tiling(fd, handle, stride + 128); test_invalid_tiling(fd, handle, stride + tile_width - 1); test_invalid_tiling(fd, handle, stride + tile_width); test_invalid_tiling(fd, handle, stride * 2); test_invalid_tiling(fd, handle, INT_MAX); test_invalid_tiling(fd, handle, UINT_MAX); gem_set_tiling(fd, handle, I915_TILING_X, stride); gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); memcpy(ptr, data, size); gem_set_tiling(fd, handle, I915_TILING_NONE, 0); memcpy(data, ptr, size); /* Check that each tile contains the expected pattern */ for (i = 0; i < size / 4; ) { for (y = 0; y < tile_height; y++) { for (x = 0; x < tile_width / 4; x++) { igt_assert(y == data[i]); i++; } } } munmap(ptr, size); close(fd); } intel-gpu-tools-1.14/tests/gem_storedw_loop.c0000644000175000017500000001265312665336131016315 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * Jesse Barnes (based on gem_bad_blit.c) * */ #include "igt.h" #include #include #include #include #include #include #include #include #include "drm.h" IGT_TEST_DESCRIPTION("Basic CS check using MI_STORE_DATA_IMM."); #define LOCAL_I915_EXEC_VEBOX (4<<0) static int devid; /* * Testcase: Basic bsd MI check using MI_STORE_DATA_IMM */ static unsigned coherent_domain; static void * mmap_coherent(int fd, uint32_t handle, int size) { if (gem_has_llc(fd)) { coherent_domain = I915_GEM_DOMAIN_CPU; return gem_mmap__cpu(fd, handle, 0, size, PROT_WRITE); } coherent_domain = I915_GEM_DOMAIN_GTT; if (gem_mmap__has_wc(fd)) return gem_mmap__wc(fd, handle, 0, size, PROT_WRITE); else return gem_mmap__gtt(fd, handle, size, PROT_WRITE); } static void store_dword_loop(int fd, int ring, int count, int divider) { int i, val = 0; struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 obj[2]; struct drm_i915_gem_relocation_entry reloc[divider]; uint32_t handle[divider]; uint32_t *batch[divider]; uint32_t *target; int gen = intel_gen(devid); memset(obj, 0, sizeof(obj)); obj[0].handle = gem_create(fd, 4096); target = mmap_coherent(fd, obj[0].handle, 4096); memset(reloc, 0, sizeof(reloc)); for (i = 0; i < divider; i++) { uint32_t *b; handle[i] = gem_create(fd, 4096); batch[i] = mmap_coherent(fd, handle[i], 4096); gem_set_domain(fd, handle[i], coherent_domain, coherent_domain); b = batch[i]; *b++ = MI_STORE_DWORD_IMM; *b++ = 0; *b++ = 0; *b++ = 0; *b++ = MI_BATCH_BUFFER_END; reloc[i].target_handle = obj[0].handle; reloc[i].offset = 4; if (gen < 8) reloc[i].offset += 4; reloc[i].read_domains = I915_GEM_DOMAIN_INSTRUCTION; reloc[i].write_domain = I915_GEM_DOMAIN_INSTRUCTION; obj[1].relocation_count = 1; } memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)obj; execbuf.buffer_count = 2; execbuf.flags = ring; igt_info("running storedw loop on render with stall every %i batch\n", divider); for (i = 0; i < SLOW_QUICK(0x2000, 0x10); i++) { int j = i % divider; gem_set_domain(fd, handle[j], coherent_domain, coherent_domain); batch[j][3] = val; obj[1].handle = handle[j]; obj[1].relocs_ptr = (uintptr_t)&reloc[j]; gem_execbuf(fd, &execbuf); if (j == 0) { gem_set_domain(fd, obj[0].handle, coherent_domain, 0); igt_assert_f(*target == val, "%d: value mismatch: stored 0x%08x, expected 0x%08x\n", i, *target, val); } val++; } gem_set_domain(fd, obj[0].handle, coherent_domain, 0); igt_info("completed %d writes successfully, current value: 0x%08x\n", i, target[0]); munmap(target, 4096); gem_close(fd, obj[0].handle); for (i = 0; i < divider; ++i) { munmap(batch[i], 4096); gem_close(fd, handle[i]); } } static void store_test(int fd, int ring, int count) { gem_require_ring(fd, ring); store_dword_loop(fd, ring, count, 1); store_dword_loop(fd, ring, count, 2); if (!igt_run_in_simulation()) { store_dword_loop(fd, ring, count, 3); store_dword_loop(fd, ring, count, 5); store_dword_loop(fd, ring, count, 7); store_dword_loop(fd, ring, count, 11); store_dword_loop(fd, ring, count, 13); store_dword_loop(fd, ring, count, 17); store_dword_loop(fd, ring, count, 19); } } static void check_test_requirements(int fd, int ringid) { gem_require_ring(fd, ringid); igt_skip_on_f(intel_gen(devid) == 6 && ringid == I915_EXEC_BSD, "MI_STORE_DATA broken on gen6 bsd\n"); } igt_main { const struct intel_execution_engine *e; int fd; igt_fixture { fd = drm_open_driver(DRIVER_INTEL); devid = intel_get_drm_devid(fd); igt_skip_on_f(intel_gen(devid) < 6, "MI_STORE_DATA can only use GTT address on gen4+/g33 and " "needs snoopable mem on pre-gen6\n"); /* This only works with ppgtt */ igt_require(gem_uses_ppgtt(fd)); } for (e = intel_execution_engines; e->name; e++) { igt_subtest_f("basic-%s", e->name) { check_test_requirements(fd, e->exec_id); store_test(fd, e->exec_id | e->flags, 16*1024); } igt_subtest_f("long-%s", e->name) { check_test_requirements(fd, e->exec_id); store_test(fd, e->exec_id | e->flags, 1024*1024); } } igt_fixture { close(fd); } } intel-gpu-tools-1.14/tests/kms_rotation_crc.c0000644000175000017500000003763612665336131016315 00000000000000/* * Copyright © 2013,2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include "igt.h" #include #define MAX_FENCES 32 typedef struct { int gfx_fd; igt_display_t display; struct igt_fb fb; struct igt_fb fb_modeset; struct igt_fb fb_flip; igt_crc_t ref_crc; igt_pipe_crc_t *pipe_crc; igt_rotation_t rotation; int pos_x; int pos_y; unsigned int w, h; uint32_t override_fmt; uint64_t override_tiling; unsigned int flip_stress; } data_t; static void paint_squares(data_t *data, drmModeModeInfo *mode, igt_rotation_t rotation, struct igt_fb *fb, float o) { cairo_t *cr; unsigned int w = data->w; unsigned int h = data->h; cr = igt_get_cairo_ctx(data->gfx_fd, fb); if (rotation == IGT_ROTATION_180) { cairo_translate(cr, w, h); cairo_rotate(cr, M_PI); } if (rotation == IGT_ROTATION_90) { /* Paint 4 squares with width == height in Green, White, Blue, Red Clockwise order to look like 270 degree rotated*/ igt_paint_color(cr, 0, 0, w / 2, h / 2, 0.0, o, 0.0); igt_paint_color(cr, w / 2, 0, w / 2, h / 2, o, o, o); igt_paint_color(cr, 0, h / 2, w / 2, h / 2, o, 0.0, 0.0); igt_paint_color(cr, w / 2, h / 2, w / 2, h / 2, 0.0, 0.0, o); } else if (rotation == IGT_ROTATION_270) { /* Paint 4 squares with width == height in Blue, Red, Green, White Clockwise order to look like 90 degree rotated*/ igt_paint_color(cr, 0, 0, w / 2, h / 2, 0.0, 0.0, o); igt_paint_color(cr, w / 2, 0, w / 2, h / 2, o, 0.0, 0.0); igt_paint_color(cr, 0, h / 2, w / 2, h / 2, o, o, o); igt_paint_color(cr, w / 2, h / 2, w / 2, h / 2, 0.0, o, 0.0); } else { /* Paint with 4 squares of Red, Green, White, Blue Clockwise */ igt_paint_color(cr, 0, 0, w / 2, h / 2, o, 0.0, 0.0); igt_paint_color(cr, w / 2, 0, w / 2, h / 2, 0.0, o, 0.0); igt_paint_color(cr, 0, h / 2, w / 2, h / 2, 0.0, 0.0, o); igt_paint_color(cr, w / 2, h / 2, w / 2, h / 2, o, o, o); } cairo_destroy(cr); } static void commit_crtc(data_t *data, igt_output_t *output, igt_plane_t *plane) { igt_display_t *display = &data->display; enum igt_commit_style commit = COMMIT_LEGACY; igt_plane_t *primary; /* * With igt_display_commit2 and COMMIT_UNIVERSAL, we call just the * setplane without a modeset. So, to be able to call * igt_display_commit and ultimately setcrtc to do the first modeset, * we create an fb covering the crtc and call commit */ primary = igt_output_get_plane(output, IGT_PLANE_PRIMARY); igt_plane_set_fb(primary, &data->fb_modeset); igt_display_commit(display); igt_plane_set_fb(plane, &data->fb); if (!plane->is_cursor) igt_plane_set_position(plane, data->pos_x, data->pos_y); if (plane->is_primary || plane->is_cursor) { igt_require(data->display.has_universal_planes); commit = COMMIT_UNIVERSAL; } igt_display_commit2(display, commit); } static void prepare_crtc(data_t *data, igt_output_t *output, enum pipe pipe, igt_plane_t *plane) { drmModeModeInfo *mode; int fb_id, fb_modeset_id; unsigned int w, h; uint64_t tiling = data->override_tiling ? data->override_tiling : LOCAL_DRM_FORMAT_MOD_NONE; uint32_t pixel_format = data->override_fmt ? data->override_fmt : DRM_FORMAT_XRGB8888; igt_output_set_pipe(output, pipe); /* create the pipe_crc object for this pipe */ igt_pipe_crc_free(data->pipe_crc); data->pipe_crc = igt_pipe_crc_new(pipe, INTEL_PIPE_CRC_SOURCE_AUTO); mode = igt_output_get_mode(output); w = mode->hdisplay; h = mode->vdisplay; fb_modeset_id = igt_create_fb(data->gfx_fd, w, h, pixel_format, tiling, &data->fb_modeset); igt_assert(fb_modeset_id); /* * For 90/270, we will use create smaller fb so that the rotated * frame can fit in */ if (data->rotation == IGT_ROTATION_90 || data->rotation == IGT_ROTATION_270) { tiling = data->override_tiling ? data->override_tiling : LOCAL_I915_FORMAT_MOD_Y_TILED; w = h = mode->vdisplay; } else if (plane->is_cursor) { pixel_format = data->override_fmt ? data->override_fmt : DRM_FORMAT_ARGB8888; w = h = 128; } data->w = w; data->h = h; fb_id = igt_create_fb(data->gfx_fd, w, h, pixel_format, tiling, &data->fb); igt_assert(fb_id); if (data->flip_stress) { fb_id = igt_create_fb(data->gfx_fd, w, h, pixel_format, tiling, &data->fb_flip); igt_assert(fb_id); paint_squares(data, mode, IGT_ROTATION_0, &data->fb_flip, 0.92); } /* Step 1: create a reference CRC for a software-rotated fb */ paint_squares(data, mode, data->rotation, &data->fb, 1.0); commit_crtc(data, output, plane); igt_pipe_crc_collect_crc(data->pipe_crc, &data->ref_crc); /* * Step 2: prepare the plane with an non-rotated fb let the hw * rotate it. */ paint_squares(data, mode, IGT_ROTATION_0, &data->fb, 1.0); igt_plane_set_fb(plane, &data->fb); } static void cleanup_crtc(data_t *data, igt_output_t *output, igt_plane_t *plane) { igt_display_t *display = &data->display; igt_pipe_crc_free(data->pipe_crc); data->pipe_crc = NULL; igt_remove_fb(data->gfx_fd, &data->fb); igt_remove_fb(data->gfx_fd, &data->fb_modeset); if (data->fb_flip.fb_id) igt_remove_fb(data->gfx_fd, &data->fb_flip); /* XXX: see the note in prepare_crtc() */ if (!plane->is_primary) { igt_plane_t *primary; primary = igt_output_get_plane(output, IGT_PLANE_PRIMARY); igt_plane_set_fb(primary, NULL); } igt_plane_set_fb(plane, NULL); igt_output_set_pipe(output, PIPE_ANY); igt_display_commit(display); } static void wait_for_pageflip(int fd) { drmEventContext evctx = { .version = DRM_EVENT_CONTEXT_VERSION }; struct timeval timeout = { .tv_sec = 0, .tv_usec = 50000 }; fd_set fds; int ret; /* Wait for pageflip completion, then consume event on fd */ FD_ZERO(&fds); FD_SET(fd, &fds); do { ret = select(fd + 1, &fds, NULL, NULL, &timeout); } while (ret < 0 && errno == EINTR); igt_assert_eq(ret, 1); igt_assert(drmHandleEvent(fd, &evctx) == 0); } static void test_plane_rotation(data_t *data, enum igt_plane plane_type) { igt_display_t *display = &data->display; igt_output_t *output; enum pipe pipe; int valid_tests = 0; igt_crc_t crc_output, crc_unrotated; enum igt_commit_style commit = COMMIT_LEGACY; unsigned int flip_count; int ret; if (plane_type == IGT_PLANE_PRIMARY || plane_type == IGT_PLANE_CURSOR) { igt_require(data->display.has_universal_planes); commit = COMMIT_UNIVERSAL; } for_each_connected_output(display, output) { for_each_pipe(display, pipe) { igt_plane_t *plane; igt_output_set_pipe(output, pipe); plane = igt_output_get_plane(output, plane_type); igt_require(igt_plane_supports_rotation(plane)); prepare_crtc(data, output, pipe, plane); igt_display_commit2(display, commit); /* collect unrotated CRC */ igt_pipe_crc_collect_crc(data->pipe_crc, &crc_unrotated); igt_plane_set_rotation(plane, data->rotation); ret = igt_display_try_commit2(display, commit); if (data->override_fmt || data->override_tiling) { igt_assert_eq(ret, -EINVAL); } else { igt_assert_eq(ret, 0); igt_pipe_crc_collect_crc(data->pipe_crc, &crc_output); igt_assert_crc_equal(&data->ref_crc, &crc_output); } flip_count = data->flip_stress; while (flip_count--) { ret = drmModePageFlip(data->gfx_fd, output->config.crtc->crtc_id, data->fb_flip.fb_id, DRM_MODE_PAGE_FLIP_EVENT, NULL); igt_assert(ret == 0); wait_for_pageflip(data->gfx_fd); ret = drmModePageFlip(data->gfx_fd, output->config.crtc->crtc_id, data->fb.fb_id, DRM_MODE_PAGE_FLIP_EVENT, NULL); igt_assert(ret == 0); wait_for_pageflip(data->gfx_fd); } /* * check the rotation state has been reset when the VT * mode is restored */ kmstest_restore_vt_mode(); kmstest_set_vt_graphics_mode(); commit_crtc(data, output, plane); igt_pipe_crc_collect_crc(data->pipe_crc, &crc_output); igt_assert_crc_equal(&crc_unrotated, &crc_output); valid_tests++; cleanup_crtc(data, output, plane); } } igt_require_f(valid_tests, "no valid crtc/connector combinations found\n"); } static void test_plane_rotation_ytiled_obj(data_t *data, enum igt_plane plane_type) { igt_display_t *display = &data->display; uint64_t tiling = LOCAL_I915_FORMAT_MOD_Y_TILED; uint32_t format = DRM_FORMAT_XRGB8888; int bpp = igt_drm_format_to_bpp(format); enum igt_commit_style commit = COMMIT_LEGACY; int fd = data->gfx_fd; igt_output_t *output = &display->outputs[0]; igt_plane_t *plane; drmModeModeInfo *mode; unsigned int stride, size, w, h; uint32_t gem_handle; int ret; igt_require(output != NULL && output->valid == true); plane = igt_output_get_plane(output, plane_type); igt_require(igt_plane_supports_rotation(plane)); if (plane_type == IGT_PLANE_PRIMARY || plane_type == IGT_PLANE_CURSOR) { igt_require(data->display.has_universal_planes); commit = COMMIT_UNIVERSAL; } mode = igt_output_get_mode(output); w = mode->hdisplay; h = mode->vdisplay; for (stride = 512; stride < (w * bpp / 8); stride *= 2) ; for (size = 1024*1024; size < stride * h; size *= 2) ; gem_handle = gem_create(fd, size); ret = __gem_set_tiling(fd, gem_handle, I915_TILING_Y, stride); igt_assert(ret == 0); do_or_die(__kms_addfb(fd, gem_handle, w, h, stride, format, tiling, LOCAL_DRM_MODE_FB_MODIFIERS, &data->fb.fb_id)); data->fb.width = w; data->fb.height = h; data->fb.gem_handle = gem_handle; igt_plane_set_fb(plane, NULL); igt_display_commit(display); igt_plane_set_rotation(plane, data->rotation); igt_plane_set_fb(plane, &data->fb); drmModeObjectSetProperty(fd, plane->drm_plane->plane_id, DRM_MODE_OBJECT_PLANE, plane->rotation_property, plane->rotation); ret = igt_display_try_commit2(display, commit); kmstest_restore_vt_mode(); igt_remove_fb(fd, &data->fb); igt_assert(ret == 0); } static void test_plane_rotation_exhaust_fences(data_t *data, enum igt_plane plane_type) { igt_display_t *display = &data->display; uint64_t tiling = LOCAL_I915_FORMAT_MOD_Y_TILED; uint32_t format = DRM_FORMAT_XRGB8888; int bpp = igt_drm_format_to_bpp(format); enum igt_commit_style commit = COMMIT_LEGACY; int fd = data->gfx_fd; igt_output_t *output = &display->outputs[0]; igt_plane_t *plane; drmModeModeInfo *mode; data_t data2[MAX_FENCES+1] = {}; unsigned int stride, size, w, h; uint32_t gem_handle; uint64_t total_aperture_size, total_fbs_size; int i, ret; igt_require(output != NULL && output->valid == true); plane = igt_output_get_plane(output, plane_type); igt_require(igt_plane_supports_rotation(plane)); if (plane_type == IGT_PLANE_PRIMARY || plane_type == IGT_PLANE_CURSOR) { igt_require(data->display.has_universal_planes); commit = COMMIT_UNIVERSAL; } mode = igt_output_get_mode(output); w = mode->hdisplay; h = mode->vdisplay; for (stride = 512; stride < (w * bpp / 8); stride *= 2) ; for (size = 1024*1024; size < stride * h; size *= 2) ; /* * Make sure there is atleast 90% of the available GTT space left * for creating (MAX_FENCES+1) framebuffers. */ total_fbs_size = size * (MAX_FENCES + 1); total_aperture_size = gem_available_aperture_size(fd); igt_require(total_fbs_size < total_aperture_size * 0.9); igt_plane_set_fb(plane, NULL); igt_display_commit(display); for (i = 0; i < MAX_FENCES + 1; i++) { gem_handle = gem_create(fd, size); ret = __gem_set_tiling(fd, gem_handle, I915_TILING_Y, stride); if (ret) { igt_warn("failed to set tiling\n"); goto err_alloc; } ret = (__kms_addfb(fd, gem_handle, w, h, stride, format, tiling, LOCAL_DRM_MODE_FB_MODIFIERS, &data2[i].fb.fb_id)); if (ret) { igt_warn("failed to create framebuffer\n"); goto err_alloc; } data2[i].fb.width = w; data2[i].fb.height = h; data2[i].fb.gem_handle = gem_handle; igt_plane_set_fb(plane, &data2[i].fb); igt_plane_set_rotation(plane, IGT_ROTATION_0); ret = igt_display_try_commit2(display, commit); if (ret) { igt_warn("failed to commit unrotated fb\n"); goto err_commit; } igt_plane_set_rotation(plane, IGT_ROTATION_90); drmModeObjectSetProperty(fd, plane->drm_plane->plane_id, DRM_MODE_OBJECT_PLANE, plane->rotation_property, plane->rotation); ret = igt_display_try_commit2(display, commit); if (ret) { igt_warn("failed to commit hardware rotated fb\n"); goto err_commit; } } err_alloc: if (ret) gem_close(fd, gem_handle); i--; err_commit: for (; i >= 0; i--) igt_remove_fb(fd, &data2[i].fb); kmstest_restore_vt_mode(); igt_assert(ret == 0); } igt_main { data_t data = {}; int gen = 0; igt_skip_on_simulation(); igt_fixture { data.gfx_fd = drm_open_driver_master(DRIVER_INTEL); gen = intel_gen(intel_get_drm_devid(data.gfx_fd)); kmstest_set_vt_graphics_mode(); igt_require_pipe_crc(); igt_display_init(&data.display, data.gfx_fd); } igt_subtest_f("primary-rotation-180") { data.rotation = IGT_ROTATION_180; test_plane_rotation(&data, IGT_PLANE_PRIMARY); } igt_subtest_f("sprite-rotation-180") { data.rotation = IGT_ROTATION_180; test_plane_rotation(&data, IGT_PLANE_2); } igt_subtest_f("cursor-rotation-180") { data.rotation = IGT_ROTATION_180; test_plane_rotation(&data, IGT_PLANE_CURSOR); } igt_subtest_f("primary-rotation-90") { igt_require(gen >= 9); data.rotation = IGT_ROTATION_90; test_plane_rotation(&data, IGT_PLANE_PRIMARY); } igt_subtest_f("primary-rotation-270") { igt_require(gen >= 9); data.rotation = IGT_ROTATION_270; test_plane_rotation(&data, IGT_PLANE_PRIMARY); } igt_subtest_f("sprite-rotation-90") { igt_require(gen >= 9); data.rotation = IGT_ROTATION_90; test_plane_rotation(&data, IGT_PLANE_2); } igt_subtest_f("sprite-rotation-270") { igt_require(gen >= 9); data.rotation = IGT_ROTATION_270; test_plane_rotation(&data, IGT_PLANE_2); } igt_subtest_f("sprite-rotation-90-pos-100-0") { igt_require(gen >= 9); data.rotation = IGT_ROTATION_90; data.pos_x = 100, data.pos_y = 0; test_plane_rotation(&data, IGT_PLANE_2); } igt_subtest_f("bad-pixel-format") { igt_require(gen >= 9); data.pos_x = 0, data.pos_y = 0; data.rotation = IGT_ROTATION_90; data.override_fmt = DRM_FORMAT_RGB565; test_plane_rotation(&data, IGT_PLANE_PRIMARY); } igt_subtest_f("bad-tiling") { igt_require(gen >= 9); data.override_fmt = 0; data.rotation = IGT_ROTATION_90; data.override_tiling = LOCAL_DRM_FORMAT_MOD_NONE; test_plane_rotation(&data, IGT_PLANE_PRIMARY); } igt_subtest_f("primary-rotation-90-flip-stress") { igt_require(gen >= 9); data.override_tiling = 0; data.flip_stress = 60; data.rotation = IGT_ROTATION_90; test_plane_rotation(&data, IGT_PLANE_PRIMARY); } igt_subtest_f("primary-rotation-90-Y-tiled") { igt_require(gen >= 9); data.rotation = IGT_ROTATION_90; test_plane_rotation_ytiled_obj(&data, IGT_PLANE_PRIMARY); } igt_subtest_f("exhaust-fences") { igt_require(gen >= 9); test_plane_rotation_exhaust_fences(&data, IGT_PLANE_PRIMARY); } igt_fixture { igt_display_fini(&data.display); } } intel-gpu-tools-1.14/tests/vc4_wait_bo.c0000644000175000017500000000606712665336131015147 00000000000000/* * Copyright © 2016 Broadcom * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ #include "igt.h" #include "igt_vc4.h" #include #include #include #include #include #include #include #include #include #include "vc4_drm.h" static void test_used_bo(int fd, uint64_t timeout) { size_t size = 4096; uint32_t clearval = 0xaabbccdd + timeout; int handle = igt_vc4_get_cleared_bo(fd, size, clearval); struct drm_vc4_wait_bo wait = { .timeout_ns = timeout, .handle = handle, }; int ret, i; ret = ioctl(fd, DRM_IOCTL_VC4_WAIT_BO, &wait); if (timeout == ~0ull) { igt_assert_eq_u32(ret, 0); } else { if (ret == -1 && errno == ETIME) igt_debug("Timeout triggered\n"); igt_assert(ret == 0 || (ret == -1 && errno == ETIME)); } if (ret == 0) { uint32_t *map = igt_vc4_mmap_bo(fd, handle, size, PROT_READ); for (i = 0; i < size / 4; i++) { igt_assert_eq_u32(map[i], clearval); } munmap((void *)map, size); } gem_close(fd, handle); } igt_main { int fd; int bo_handle; igt_fixture { fd = drm_open_driver(DRIVER_VC4); bo_handle = igt_vc4_create_bo(fd, 4096); } igt_subtest("bad-bo") { struct drm_vc4_wait_bo arg = { .handle = bo_handle + 1, .timeout_ns = 0, }; do_ioctl_err(fd, DRM_IOCTL_VC4_WAIT_BO, &arg, EINVAL); } igt_subtest("bad-pad") { struct drm_vc4_wait_bo arg = { .pad = 1, .handle = bo_handle, .timeout_ns = 0, }; do_ioctl_err(fd, DRM_IOCTL_VC4_WAIT_BO, &arg, EINVAL); } igt_subtest("unused-bo-0ns") { struct drm_vc4_wait_bo arg = { .handle = bo_handle, .timeout_ns = 0, }; do_ioctl(fd, DRM_IOCTL_VC4_WAIT_BO, &arg); } igt_subtest("unused-bo-1ns") { struct drm_vc4_wait_bo arg = { .handle = bo_handle, .timeout_ns = 1, }; do_ioctl(fd, DRM_IOCTL_VC4_WAIT_BO, &arg); } igt_subtest("used-bo-0ns") test_used_bo(fd, 0); igt_subtest("used-bo-1ns") test_used_bo(fd, 1); igt_subtest("used-bo") test_used_bo(fd, ~0ull); igt_fixture close(fd); } intel-gpu-tools-1.14/tests/test_rte_check0000755000175000017500000000015412665336131015506 00000000000000#!/bin/bash SOURCE_DIR="$( dirname "${BASH_SOURCE[0]}" )" . $SOURCE_DIR/drm_lib.sh exit $IGT_EXIT_SUCCESS intel-gpu-tools-1.14/tests/kms_pipe_b_c_ivb.c0000644000175000017500000001636412665336131016222 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Ander Conselvan de Oliveira */ #include "igt.h" IGT_TEST_DESCRIPTION( "Exercise the FDI lane bifurcation code for IVB in the kernel by setting" "different combinations of modes for pipes B and C."); typedef struct { int drm_fd; igt_display_t display; } data_t; drmModeModeInfo mode_3_lanes = { .clock = 173000, .hdisplay = 1920, .hsync_start = 2048, .hsync_end = 2248, .htotal = 2576, .vdisplay = 1080, .vsync_start = 1083, .vsync_end = 1088, .vtotal = 1120, .vrefresh = 60, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC, .name = "3_lanes", }; drmModeModeInfo mode_2_lanes = { .clock = 138500, .hdisplay = 1920, .hsync_start = 1968, .hsync_end = 2000, .htotal = 2080, .vdisplay = 1080, .vsync_start = 1083, .vsync_end = 1088, .vtotal = 1111, .vrefresh = 60, .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC, .name = "2_lanes", }; static int disable_pipe(data_t *data, enum pipe pipe, igt_output_t *output) { igt_plane_t *primary; igt_output_set_pipe(output, pipe); primary = igt_output_get_plane(output, 0); igt_plane_set_fb(primary, NULL); return igt_display_commit(&data->display); } static int set_mode_on_pipe(data_t *data, enum pipe pipe, igt_output_t *output) { igt_plane_t *primary; drmModeModeInfo *mode; struct igt_fb fb; int fb_id; igt_output_set_pipe(output, pipe); mode = igt_output_get_mode(output); primary = igt_output_get_plane(output, 0); fb_id = igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, I915_TILING_NONE, 1.0, 1.0, 1.0, &fb); igt_assert_lte(0, fb_id); igt_plane_set_fb(primary, &fb); return igt_display_try_commit2(&data->display, COMMIT_LEGACY); } static int set_big_mode_on_pipe(data_t *data, enum pipe pipe, igt_output_t *output) { igt_output_override_mode(output, &mode_3_lanes); return set_mode_on_pipe(data, pipe, output); } static int set_normal_mode_on_pipe(data_t *data, enum pipe pipe, igt_output_t *output) { igt_output_override_mode(output, &mode_2_lanes); return set_mode_on_pipe(data, pipe, output); } static void find_outputs(data_t *data, igt_output_t **output1, igt_output_t **output2) { int count = 0; igt_output_t *output; *output1 = NULL; *output2 = NULL; for_each_connected_output(&data->display, output) { if (!(*output1)) *output1 = output; else if (!(*output2)) *output2 = output; igt_output_set_pipe(output, PIPE_ANY); count++; } igt_skip_on_f(count < 2, "Not enough connected outputs\n"); } static void test_dpms(data_t *data) { igt_output_t *output1, *output2; int ret; find_outputs(data, &output1, &output2); igt_info("Pipe %s will use connector %s\n", kmstest_pipe_name(PIPE_B), igt_output_name(output1)); igt_info("Pipe %s will use connector %s\n", kmstest_pipe_name(PIPE_C), igt_output_name(output2)); ret = set_big_mode_on_pipe(data, PIPE_B, output1); igt_assert_eq(ret, 0); kmstest_set_connector_dpms(data->drm_fd, output1->config.connector, DRM_MODE_DPMS_OFF); ret = set_big_mode_on_pipe(data, PIPE_C, output2); igt_assert_neq(ret, 0); } static void test_lane_reduction(data_t *data) { igt_output_t *output1, *output2; int ret; find_outputs(data, &output1, &output2); igt_info("Pipe %s will use connector %s\n", kmstest_pipe_name(PIPE_B), igt_output_name(output1)); igt_info("Pipe %s will use connector %s\n", kmstest_pipe_name(PIPE_C), igt_output_name(output2)); ret = set_big_mode_on_pipe(data, PIPE_B, output1); igt_assert_eq(ret, 0); ret = set_normal_mode_on_pipe(data, PIPE_B, output1); igt_assert_eq(ret, 0); ret = set_normal_mode_on_pipe(data, PIPE_C, output2); igt_assert_eq(ret, 0); } static void test_disable_pipe_B(data_t *data) { igt_output_t *output1, *output2; int ret; find_outputs(data, &output1, &output2); igt_info("Pipe %s will use connector %s\n", kmstest_pipe_name(PIPE_B), igt_output_name(output1)); igt_info("Pipe %s will use connector %s\n", kmstest_pipe_name(PIPE_C), igt_output_name(output2)); ret = set_big_mode_on_pipe(data, PIPE_B, output1); igt_assert_eq(ret, 0); ret = disable_pipe(data, PIPE_B, output1); igt_assert_eq(ret, 0); ret = set_normal_mode_on_pipe(data, PIPE_C, output2); igt_assert_eq(ret, 0); ret = set_normal_mode_on_pipe(data, PIPE_B, output1); igt_assert_eq(ret, 0); } static void test_from_C_to_B_with_3_lanes(data_t *data) { igt_output_t *output1, *output2; int ret; find_outputs(data, &output1, &output2); igt_info("Pipe %s will use connector %s\n", kmstest_pipe_name(PIPE_B), igt_output_name(output1)); igt_info("Pipe %s will use connector %s\n", kmstest_pipe_name(PIPE_C), igt_output_name(output2)); ret = set_normal_mode_on_pipe(data, PIPE_C, output2); igt_assert_eq(ret, 0); ret = disable_pipe(data, PIPE_C, output2); igt_assert_eq(ret, 0); ret = set_big_mode_on_pipe(data, PIPE_B, output1); igt_assert_eq(ret, 0); } static void test_fail_enable_pipe_C_while_B_has_3_lanes(data_t *data) { igt_output_t *output1, *output2; int ret; find_outputs(data, &output1, &output2); igt_info("Pipe %s will use connector %s\n", kmstest_pipe_name(PIPE_B), igt_output_name(output1)); igt_info("Pipe %s will use connector %s\n", kmstest_pipe_name(PIPE_C), igt_output_name(output2)); ret = set_big_mode_on_pipe(data, PIPE_B, output1); igt_assert_eq(ret, 0); ret = set_normal_mode_on_pipe(data, PIPE_C, output2); igt_assert_neq(ret, 0); } static data_t data; igt_main { int devid; igt_skip_on_simulation(); igt_fixture { data.drm_fd = drm_open_driver_master(DRIVER_INTEL); devid = intel_get_drm_devid(data.drm_fd); igt_skip_on(!IS_IVYBRIDGE(devid)); kmstest_set_vt_graphics_mode(); igt_display_init(&data.display, data.drm_fd); } igt_subtest("pipe-B-dpms-off-modeset-pipe-C") test_dpms(&data); igt_subtest("pipe-B-double-modeset-then-modeset-pipe-C") test_lane_reduction(&data); igt_subtest("disable-pipe-B-enable-pipe-C") test_disable_pipe_B(&data); igt_subtest("from-pipe-C-to-B-with-3-lanes") test_from_C_to_B_with_3_lanes(&data); igt_subtest("enable-pipe-C-while-B-has-3-lanes") test_fail_enable_pipe_C_while_B_has_3_lanes(&data); igt_fixture { igt_display_fini(&data.display); } } intel-gpu-tools-1.14/tests/kms_atomic.c0000644000175000017500000011746012665336131015075 00000000000000/* * Copyright © 2015 Intel Corporation * Copyright © 2014-2015 Collabora, Ltd. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Micah Fedke * Daniel Stone * Pekka Paalanen */ /* * Testcase: testing atomic modesetting API */ #include #include #include #include #include #include #include #include #include "drm.h" #include "ioctl_wrappers.h" #include "drmtest.h" #include "igt.h" #include "igt_aux.h" #ifndef DRM_CLIENT_CAP_ATOMIC #define DRM_CLIENT_CAP_ATOMIC 3 #endif #ifndef DRM_CAP_CURSOR_WIDTH #define DRM_CAP_CURSOR_WIDTH 0x8 #endif #ifndef DRM_CAP_CURSOR_HEIGHT #define DRM_CAP_CURSOR_HEIGHT 0x9 #endif #ifndef DRM_MODE_ATOMIC_TEST_ONLY #define DRM_MODE_ATOMIC_TEST_ONLY 0x0100 #define DRM_MODE_ATOMIC_NONBLOCK 0x0200 #define DRM_MODE_ATOMIC_ALLOW_MODESET 0x0400 struct drm_mode_atomic { __u32 flags; __u32 count_objs; __u64 objs_ptr; __u64 count_props_ptr; __u64 props_ptr; __u64 prop_values_ptr; __u64 reserved; __u64 user_data; }; #endif IGT_TEST_DESCRIPTION("Test atomic modesetting API"); enum kms_atomic_check_relax { ATOMIC_RELAX_NONE = 0, CRTC_RELAX_MODE = (1 << 0), PLANE_RELAX_FB = (1 << 1) }; /** * KMS plane type enum * * KMS plane types are represented by enums, which do not have stable numeric * values, but must be looked up by their string value each time. * * To make the code more simple, we define a plane_type enum which maps to * each KMS enum value. These values must be looked up through the map, and * cannot be passed directly to KMS functions. */ enum plane_type { PLANE_TYPE_PRIMARY = 0, PLANE_TYPE_OVERLAY, PLANE_TYPE_CURSOR, NUM_PLANE_TYPE_PROPS }; static const char *plane_type_prop_names[NUM_PLANE_TYPE_PROPS] = { "Primary", "Overlay", "Cursor" }; enum plane_properties { PLANE_SRC_X = 0, PLANE_SRC_Y, PLANE_SRC_W, PLANE_SRC_H, PLANE_CRTC_X, PLANE_CRTC_Y, PLANE_CRTC_W, PLANE_CRTC_H, PLANE_FB_ID, PLANE_CRTC_ID, PLANE_TYPE, NUM_PLANE_PROPS }; static const char *plane_prop_names[NUM_PLANE_PROPS] = { "SRC_X", "SRC_Y", "SRC_W", "SRC_H", "CRTC_X", "CRTC_Y", "CRTC_W", "CRTC_H", "FB_ID", "CRTC_ID", "type" }; enum crtc_properties { CRTC_MODE_ID = 0, CRTC_ACTIVE, NUM_CRTC_PROPS }; static const char *crtc_prop_names[NUM_CRTC_PROPS] = { "MODE_ID", "ACTIVE" }; enum connector_properties { CONNECTOR_CRTC_ID = 0, NUM_CONNECTOR_PROPS }; static const char *connector_prop_names[NUM_CONNECTOR_PROPS] = { "CRTC_ID" }; struct kms_atomic_blob { uint32_t id; /* 0 if not already allocated */ size_t len; void *data; }; struct kms_atomic_connector_state { struct kms_atomic_state *state; uint32_t obj; uint32_t crtc_id; }; struct kms_atomic_plane_state { struct kms_atomic_state *state; uint32_t obj; enum plane_type type; uint32_t crtc_mask; uint32_t crtc_id; /* 0 to disable */ uint32_t fb_id; /* 0 to disable */ uint32_t src_x, src_y, src_w, src_h; /* 16.16 fixed-point */ uint32_t crtc_x, crtc_y, crtc_w, crtc_h; /* normal integers */ }; struct kms_atomic_crtc_state { struct kms_atomic_state *state; uint32_t obj; int idx; bool active; struct kms_atomic_blob mode; }; struct kms_atomic_state { struct kms_atomic_connector_state *connectors; int num_connectors; struct kms_atomic_crtc_state *crtcs; int num_crtcs; struct kms_atomic_plane_state *planes; int num_planes; struct kms_atomic_desc *desc; }; struct kms_atomic_desc { int fd; uint32_t props_connector[NUM_CONNECTOR_PROPS]; uint32_t props_crtc[NUM_CRTC_PROPS]; uint32_t props_plane[NUM_PLANE_PROPS]; uint64_t props_plane_type[NUM_PLANE_TYPE_PROPS]; }; static uint32_t blob_duplicate(int fd, uint32_t id_orig) { drmModePropertyBlobPtr orig = drmModeGetPropertyBlob(fd, id_orig); uint32_t id_new; igt_assert(orig); do_or_die(drmModeCreatePropertyBlob(fd, orig->data, orig->length, &id_new)); drmModeFreePropertyBlob(orig); return id_new; } #define crtc_set_prop(req, crtc, prop, value) \ igt_assert_lt(0, drmModeAtomicAddProperty(req, crtc->obj, \ crtc->state->desc->props_crtc[prop], \ value)); #define plane_set_prop(req, plane, prop, value) \ igt_assert_lt(0, drmModeAtomicAddProperty(req, plane->obj, \ plane->state->desc->props_plane[prop], \ value)); #define do_atomic_commit(fd, req, flags) \ do_or_die(drmModeAtomicCommit(fd, req, flags, NULL)); #define do_atomic_commit_err(fd, req, flags, err) { \ igt_assert_neq(drmModeAtomicCommit(fd, req, flags, NULL), 0); \ igt_assert_eq(errno, err); \ } #define crtc_commit_atomic(crtc, plane, req, relax) { \ drmModeAtomicSetCursor(req, 0); \ crtc_populate_req(crtc, req); \ plane_populate_req(plane, req); \ do_atomic_commit((crtc)->state->desc->fd, req, 0); \ crtc_check_current_state(crtc, plane, relax); \ plane_check_current_state(plane, relax); \ } #define crtc_commit_atomic_err(crtc, plane, crtc_old, plane_old, req, relax, e) { \ drmModeAtomicSetCursor(req, 0); \ crtc_populate_req(crtc, req); \ plane_populate_req(plane, req); \ do_atomic_commit_err((crtc)->state->desc->fd, req, 0, e); \ crtc_check_current_state(crtc_old, plane_old, relax); \ plane_check_current_state(plane_old, relax); \ } #define plane_commit_atomic(plane, req, relax) { \ drmModeAtomicSetCursor(req, 0); \ plane_populate_req(plane, req); \ do_atomic_commit((plane)->state->desc->fd, req, 0); \ plane_check_current_state(plane, relax); \ } #define plane_commit_atomic_err(plane, plane_old, req, relax, e) { \ drmModeAtomicSetCursor(req, 0); \ plane_populate_req(plane, req); \ do_atomic_commit_err((plane)->state->desc->fd, req, 0, e); \ plane_check_current_state(plane_old, relax); \ } static void connector_get_current_state(struct kms_atomic_connector_state *connector) { drmModeObjectPropertiesPtr props; int i; props = drmModeObjectGetProperties(connector->state->desc->fd, connector->obj, DRM_MODE_OBJECT_CONNECTOR); igt_assert(props); for (i = 0; i < props->count_props; i++) { uint32_t *prop_ids = connector->state->desc->props_connector; if (props->props[i] == prop_ids[CONNECTOR_CRTC_ID]) connector->crtc_id = props->prop_values[i]; } drmModeFreeObjectProperties(props); } #if 0 /* XXX: Checking this repeatedly actually hangs the GPU. I have literally no * idea why. */ static void connector_check_current_state(struct kms_atomic_connector_state *connector) { struct kms_atomic_connector_state connector_kernel; drmModeConnectorPtr legacy; uint32_t crtc_id; legacy = drmModeGetConnectorCurrent(connector->state->desc->fd, connector->obj); igt_assert(legacy); if (legacy->encoder_id) { drmModeEncoderPtr legacy_enc; legacy_enc = drmModeGetEncoder(connector->state->desc->fd, legacy->encoder_id); igt_assert(legacy_enc); crtc_id = legacy_enc->crtc_id; drmModeFreeEncoder(legacy_enc); } else { crtc_id = 0; } igt_assert_eq_u32(crtc_id, connector->crtc_id); memcpy(&connector_kernel, connector, sizeof(connector_kernel)); connector_get_current_state(&connector_kernel); do_or_die(memcmp(&connector_kernel, connector, sizeof(connector_kernel))); drmModeFreeConnector(legacy); } #endif static struct kms_atomic_connector_state * find_connector(struct kms_atomic_state *state, struct kms_atomic_crtc_state *crtc) { int i; for (i = 0; i < state->num_connectors; i++) { struct kms_atomic_connector_state *connector = &state->connectors[i]; if (!connector->obj) continue; if (crtc && connector->crtc_id != crtc->obj) continue; return connector; } return NULL; } static void plane_populate_req(struct kms_atomic_plane_state *plane, drmModeAtomicReq *req) { plane_set_prop(req, plane, PLANE_CRTC_ID, plane->crtc_id); plane_set_prop(req, plane, PLANE_FB_ID, plane->fb_id); plane_set_prop(req, plane, PLANE_SRC_X, plane->src_x); plane_set_prop(req, plane, PLANE_SRC_Y, plane->src_y); plane_set_prop(req, plane, PLANE_SRC_W, plane->src_w); plane_set_prop(req, plane, PLANE_SRC_H, plane->src_h); plane_set_prop(req, plane, PLANE_CRTC_X, plane->crtc_x); plane_set_prop(req, plane, PLANE_CRTC_Y, plane->crtc_y); plane_set_prop(req, plane, PLANE_CRTC_W, plane->crtc_w); plane_set_prop(req, plane, PLANE_CRTC_H, plane->crtc_h); } static void plane_get_current_state(struct kms_atomic_plane_state *plane) { struct kms_atomic_desc *desc = plane->state->desc; drmModeObjectPropertiesPtr props; int i; props = drmModeObjectGetProperties(desc->fd, plane->obj, DRM_MODE_OBJECT_PLANE); igt_assert(props); for (i = 0; i < props->count_props; i++) { uint32_t *prop_ids = desc->props_plane; if (props->props[i] == prop_ids[PLANE_CRTC_ID]) plane->crtc_id = props->prop_values[i]; else if (props->props[i] == prop_ids[PLANE_FB_ID]) plane->fb_id = props->prop_values[i]; else if (props->props[i] == prop_ids[PLANE_CRTC_X]) plane->crtc_x = props->prop_values[i]; else if (props->props[i] == prop_ids[PLANE_CRTC_Y]) plane->crtc_y = props->prop_values[i]; else if (props->props[i] == prop_ids[PLANE_CRTC_W]) plane->crtc_w = props->prop_values[i]; else if (props->props[i] == prop_ids[PLANE_CRTC_H]) plane->crtc_h = props->prop_values[i]; else if (props->props[i] == prop_ids[PLANE_SRC_X]) plane->src_x = props->prop_values[i]; else if (props->props[i] == prop_ids[PLANE_SRC_Y]) plane->src_y = props->prop_values[i]; else if (props->props[i] == prop_ids[PLANE_SRC_W]) plane->src_w = props->prop_values[i]; else if (props->props[i] == prop_ids[PLANE_SRC_H]) plane->src_h = props->prop_values[i]; else if (props->props[i] == prop_ids[PLANE_TYPE]) { int j; for (j = 0; j < ARRAY_SIZE(desc->props_plane_type); j++) { if (props->prop_values[i] == desc->props_plane_type[j]) { plane->type = j; break; } } } } drmModeFreeObjectProperties(props); } static void plane_check_current_state(struct kms_atomic_plane_state *plane, enum kms_atomic_check_relax relax) { drmModePlanePtr legacy; struct kms_atomic_plane_state plane_kernel; legacy = drmModeGetPlane(plane->state->desc->fd, plane->obj); igt_assert(legacy); igt_assert_eq_u32(legacy->crtc_id, plane->crtc_id); if (!(relax & PLANE_RELAX_FB)) igt_assert_eq_u32(legacy->fb_id, plane->fb_id); memcpy(&plane_kernel, plane, sizeof(plane_kernel)); plane_get_current_state(&plane_kernel); /* Legacy cursor ioctls create their own, unknowable, internal * framebuffer which we can't reason about. */ if (relax & PLANE_RELAX_FB) plane_kernel.fb_id = plane->fb_id; do_or_die(memcmp(&plane_kernel, plane, sizeof(plane_kernel))); drmModeFreePlane(legacy); } static void plane_commit_legacy(struct kms_atomic_plane_state *plane, enum kms_atomic_check_relax relax) { do_or_die(drmModeSetPlane(plane->state->desc->fd, plane->obj, plane->crtc_id, plane->fb_id, 0, plane->crtc_x, plane->crtc_y, plane->crtc_w, plane->crtc_h, plane->src_x, plane->src_y, plane->src_w, plane->src_h)); plane_check_current_state(plane, relax); } static struct kms_atomic_plane_state * find_plane(struct kms_atomic_state *state, enum plane_type type, struct kms_atomic_crtc_state *crtc) { int i; for (i = 0; i < state->num_planes; i++) { struct kms_atomic_plane_state *plane = &state->planes[i]; if (!plane->obj) continue; if (type != NUM_PLANE_TYPE_PROPS && plane->type != type) continue; if (crtc && !(plane->crtc_mask & (1 << crtc->idx))) continue; plane_get_current_state(plane); return plane; } return NULL; } static void crtc_populate_req(struct kms_atomic_crtc_state *crtc, drmModeAtomicReq *req) { crtc_set_prop(req, crtc, CRTC_MODE_ID, crtc->mode.id); crtc_set_prop(req, crtc, CRTC_ACTIVE, crtc->active); } static void crtc_get_current_state(struct kms_atomic_crtc_state *crtc) { drmModeObjectPropertiesPtr props; int i; props = drmModeObjectGetProperties(crtc->state->desc->fd, crtc->obj, DRM_MODE_OBJECT_CRTC); igt_assert(props); for (i = 0; i < props->count_props; i++) { uint32_t *prop_ids = crtc->state->desc->props_crtc; if (props->props[i] == prop_ids[CRTC_MODE_ID]) { drmModePropertyBlobPtr blob; crtc->mode.id = props->prop_values[i]; if (!crtc->mode.id) { crtc->mode.len = 0; continue; } blob = drmModeGetPropertyBlob(crtc->state->desc->fd, crtc->mode.id); igt_assert(blob); igt_assert_eq_u32(blob->length, sizeof(struct drm_mode_modeinfo)); if (!crtc->mode.data || memcmp(crtc->mode.data, blob->data, blob->length) != 0) crtc->mode.data = blob->data; crtc->mode.len = blob->length; } else if (props->props[i] == prop_ids[CRTC_ACTIVE]) { crtc->active = props->prop_values[i]; } } drmModeFreeObjectProperties(props); } static void crtc_check_current_state(struct kms_atomic_crtc_state *crtc, struct kms_atomic_plane_state *primary, enum kms_atomic_check_relax relax) { struct kms_atomic_crtc_state crtc_kernel; drmModeCrtcPtr legacy; legacy = drmModeGetCrtc(crtc->state->desc->fd, crtc->obj); igt_assert(legacy); igt_assert_eq_u32(legacy->crtc_id, crtc->obj); igt_assert_eq_u32(legacy->x, primary->src_x >> 16); igt_assert_eq_u32(legacy->y, primary->src_y >> 16); if (crtc->active) igt_assert_eq_u32(legacy->buffer_id, primary->fb_id); else igt_assert_eq_u32(legacy->buffer_id, 0); if (legacy->mode_valid) { igt_assert_neq(legacy->mode_valid, 0); igt_assert_eq(crtc->mode.len, sizeof(struct drm_mode_modeinfo)); do_or_die(memcmp(&legacy->mode, crtc->mode.data, crtc->mode.len)); igt_assert_eq(legacy->width, legacy->mode.hdisplay); igt_assert_eq(legacy->height, legacy->mode.vdisplay); } else { igt_assert_eq(legacy->mode_valid, 0); } memcpy(&crtc_kernel, crtc, sizeof(crtc_kernel)); crtc_get_current_state(&crtc_kernel); if (crtc_kernel.mode.id != 0) igt_assert_eq(crtc_kernel.mode.len, sizeof(struct drm_mode_modeinfo)); /* Optionally relax the check for MODE_ID: using the legacy SetCrtc * API can potentially change MODE_ID even if the mode itself remains * unchanged. */ if (((relax & CRTC_RELAX_MODE) && (crtc_kernel.mode.id != crtc->mode.id && crtc_kernel.mode.id != 0 && crtc->mode.id != 0)) && memcmp(crtc_kernel.mode.data, crtc->mode.data, sizeof(struct drm_mode_modeinfo)) == 0) { crtc_kernel.mode.id = crtc->mode.id; crtc_kernel.mode.data = crtc->mode.data; } do_or_die(memcmp(&crtc_kernel, crtc, sizeof(crtc_kernel))); drmModeFreeCrtc(legacy); } static void crtc_commit_legacy(struct kms_atomic_crtc_state *crtc, struct kms_atomic_plane_state *plane, enum kms_atomic_check_relax relax) { drmModeObjectPropertiesPtr props; uint32_t *connectors; int num_connectors = 0; int i; if (!crtc->active) { do_or_die(drmModeSetCrtc(crtc->state->desc->fd, crtc->obj, 0, 0, 0, NULL, 0, NULL)); return; } connectors = calloc(crtc->state->num_connectors, sizeof(*connectors)); igt_assert(connectors); igt_assert_neq_u32(crtc->mode.id, 0); for (i = 0; i < crtc->state->num_connectors; i++) { struct kms_atomic_connector_state *connector = &crtc->state->connectors[i]; if (connector->crtc_id != crtc->obj) continue; connectors[num_connectors++] = connector->obj; } do_or_die(drmModeSetCrtc(crtc->state->desc->fd, crtc->obj, plane->fb_id, plane->src_x >> 16, plane->src_y >> 16, (num_connectors) ? connectors : NULL, num_connectors, crtc->mode.data)); /* When doing a legacy commit, the core may update MODE_ID to be a new * blob implicitly created by the legacy request. Hence we backfill * the value in the state object to ensure they match. */ props = drmModeObjectGetProperties(crtc->state->desc->fd, crtc->obj, DRM_MODE_OBJECT_CRTC); igt_assert(props); for (i = 0; i < props->count_props; i++) { if (props->props[i] != crtc->state->desc->props_crtc[CRTC_MODE_ID]) continue; crtc->mode.id = props->prop_values[i]; break; } drmModeFreeObjectProperties(props); crtc_check_current_state(crtc, plane, relax); plane_check_current_state(plane, relax); } static struct kms_atomic_crtc_state *find_crtc(struct kms_atomic_state *state, bool must_be_enabled) { int i; for (i = 0; i < state->num_crtcs; i++) { struct kms_atomic_crtc_state *crtc = &state->crtcs[i]; if (!crtc->obj) continue; if (must_be_enabled && !crtc->active) continue; crtc_get_current_state(crtc); return crtc; } return NULL; } static void fill_obj_props(int fd, uint32_t id, int type, int num_props, const char **prop_names, uint32_t *prop_ids) { drmModeObjectPropertiesPtr props; int i, j; props = drmModeObjectGetProperties(fd, id, type); igt_assert(props); for (i = 0; i < props->count_props; i++) { drmModePropertyPtr prop = drmModeGetProperty(fd, props->props[i]); for (j = 0; j < num_props; j++) { if (strcmp(prop->name, prop_names[j]) != 0) continue; prop_ids[j] = props->props[i]; break; } drmModeFreeProperty(prop); } drmModeFreeObjectProperties(props); } static void fill_obj_prop_map(int fd, uint32_t id, int type, const char *name, int num_enums, const char **enum_names, uint64_t *enum_ids) { drmModeObjectPropertiesPtr props; int i, j, k; props = drmModeObjectGetProperties(fd, id, type); igt_assert(props); for (i = 0; i < props->count_props; i++) { drmModePropertyPtr prop = drmModeGetProperty(fd, props->props[i]); igt_assert(prop); if (strcmp(prop->name, name) != 0) { drmModeFreeProperty(prop); continue; } for (j = 0; j < prop->count_enums; j++) { struct drm_mode_property_enum *e = &prop->enums[j]; for (k = 0; k < num_enums; k++) { if (strcmp(e->name, enum_names[k]) != 0) continue; enum_ids[k] = e->value; break; } } drmModeFreeProperty(prop); } } static void atomic_setup(struct kms_atomic_state *state) { struct kms_atomic_desc *desc = state->desc; drmModeResPtr res; drmModePlaneResPtr res_plane; int i; desc->fd = drm_open_driver_master(DRIVER_INTEL); igt_assert_fd(desc->fd); do_or_die(drmSetClientCap(desc->fd, DRM_CLIENT_CAP_ATOMIC, 1)); res = drmModeGetResources(desc->fd); res_plane = drmModeGetPlaneResources(desc->fd); igt_assert(res); igt_assert(res_plane); igt_assert_lt(0, res->count_crtcs); state->num_crtcs = res->count_crtcs; state->crtcs = calloc(state->num_crtcs, sizeof(*state->crtcs)); igt_assert(state->crtcs); igt_assert_lt(0, res_plane->count_planes); state->num_planes = res_plane->count_planes; state->planes = calloc(state->num_planes, sizeof(*state->planes)); igt_assert(state->planes); igt_assert_lt(0, res->count_connectors); state->num_connectors = res->count_connectors; state->connectors = calloc(state->num_connectors, sizeof(*state->connectors)); igt_assert(state->connectors); fill_obj_props(desc->fd, res->crtcs[0], DRM_MODE_OBJECT_CRTC, NUM_CRTC_PROPS, crtc_prop_names, desc->props_crtc); fill_obj_props(desc->fd, res_plane->planes[0], DRM_MODE_OBJECT_PLANE, NUM_PLANE_PROPS, plane_prop_names, desc->props_plane); fill_obj_prop_map(desc->fd, res_plane->planes[0], DRM_MODE_OBJECT_PLANE, "type", NUM_PLANE_TYPE_PROPS, plane_type_prop_names, desc->props_plane_type); fill_obj_props(desc->fd, res->connectors[0], DRM_MODE_OBJECT_CONNECTOR, NUM_CONNECTOR_PROPS, connector_prop_names, desc->props_connector); for (i = 0; i < state->num_crtcs; i++) { struct kms_atomic_crtc_state *crtc = &state->crtcs[i]; crtc->state = state; crtc->obj = res->crtcs[i]; crtc->idx = i; crtc_get_current_state(crtc); /* The blob pointed to by MODE_ID could well be transient, * and lose its last reference as we switch away from it. * Duplicate the blob here so we have a reference we know we * own. */ if (crtc->mode.id != 0) crtc->mode.id = blob_duplicate(desc->fd, crtc->mode.id); } for (i = 0; i < state->num_planes; i++) { drmModePlanePtr plane = drmModeGetPlane(desc->fd, res_plane->planes[i]); igt_assert(plane); state->planes[i].state = state; state->planes[i].obj = res_plane->planes[i]; state->planes[i].crtc_mask = plane->possible_crtcs; plane_get_current_state(&state->planes[i]); } for (i = 0; i < state->num_connectors; i++) { state->connectors[i].state = state; state->connectors[i].obj = res->connectors[i]; connector_get_current_state(&state->connectors[i]); } drmModeFreePlaneResources(res_plane); drmModeFreeResources(res); } static struct kms_atomic_state * atomic_state_dup(const struct kms_atomic_state *state) { struct kms_atomic_state *ret = calloc(1, sizeof(*ret)); igt_assert(ret); *ret = *state; ret->crtcs = calloc(ret->num_crtcs, sizeof(*ret->crtcs)); igt_assert(ret->crtcs); memcpy(ret->crtcs, state->crtcs, ret->num_crtcs * sizeof(*ret->crtcs)); ret->planes = calloc(ret->num_planes, sizeof(*ret->planes)); igt_assert(ret->planes); memcpy(ret->planes, state->planes, ret->num_planes * sizeof(*ret->planes)); ret->connectors = calloc(ret->num_connectors, sizeof(*ret->connectors)); igt_assert(ret->connectors); memcpy(ret->connectors, state->connectors, ret->num_connectors * sizeof(*ret->connectors)); return ret; } static void atomic_state_free(struct kms_atomic_state *state) { free(state->crtcs); free(state->planes); free(state->connectors); free(state); } static uint32_t plane_get_igt_format(struct kms_atomic_plane_state *plane) { drmModePlanePtr plane_kms; const uint32_t *igt_formats; uint32_t ret = 0; int num_igt_formats; int i; plane_kms = drmModeGetPlane(plane->state->desc->fd, plane->obj); igt_assert(plane_kms); igt_get_all_cairo_formats(&igt_formats, &num_igt_formats); for (i = 0; i < num_igt_formats; i++) { int j; for (j = 0; j < plane_kms->count_formats; j++) { if (plane_kms->formats[j] == igt_formats[i]) { ret = plane_kms->formats[j]; break; } } } drmModeFreePlane(plane_kms); return ret; } static void plane_overlay(struct kms_atomic_crtc_state *crtc, struct kms_atomic_plane_state *plane_old) { struct drm_mode_modeinfo *mode = crtc->mode.data; struct kms_atomic_plane_state plane = *plane_old; uint32_t format = plane_get_igt_format(&plane); drmModeAtomicReq *req = drmModeAtomicAlloc(); struct igt_fb fb; igt_require(req); igt_require(format != 0); plane.src_x = 0; plane.src_y = 0; plane.src_w = (mode->hdisplay / 2) << 16; plane.src_h = (mode->vdisplay / 2) << 16; plane.crtc_x = mode->hdisplay / 4; plane.crtc_y = mode->vdisplay / 4; plane.crtc_w = mode->hdisplay / 2; plane.crtc_h = mode->vdisplay / 2; plane.crtc_id = crtc->obj; plane.fb_id = igt_create_pattern_fb(plane.state->desc->fd, plane.crtc_w, plane.crtc_h, format, I915_TILING_NONE, &fb); /* Enable the overlay plane using the atomic API, and double-check * state is what we think it should be. */ plane_commit_atomic(&plane, req, ATOMIC_RELAX_NONE); /* Disable the plane and check the state matches the old. */ plane_commit_atomic(plane_old, req, ATOMIC_RELAX_NONE); /* Re-enable the plane through the legacy plane API, and verify through * atomic. */ plane_commit_legacy(&plane, ATOMIC_RELAX_NONE); /* Restore the plane to its original settings through the legacy plane * API, and verify through atomic. */ plane_commit_legacy(plane_old, ATOMIC_RELAX_NONE); drmModeAtomicFree(req); } static void plane_primary(struct kms_atomic_crtc_state *crtc, struct kms_atomic_plane_state *plane_old) { struct drm_mode_modeinfo *mode = crtc->mode.data; struct kms_atomic_plane_state plane = *plane_old; uint32_t format = plane_get_igt_format(&plane); drmModeAtomicReq *req = drmModeAtomicAlloc(); struct igt_fb fb; igt_require(format != 0); plane.src_x = 0; plane.src_y = 0; plane.src_w = mode->hdisplay << 16; plane.src_h = mode->vdisplay << 16; plane.crtc_x = 0; plane.crtc_y = 0; plane.crtc_w = mode->hdisplay; plane.crtc_h = mode->vdisplay; plane.crtc_id = crtc->obj; plane.fb_id = igt_create_pattern_fb(plane.state->desc->fd, plane.crtc_w, plane.crtc_h, format, I915_TILING_NONE, &fb); /* Flip the primary plane using the atomic API, and double-check * state is what we think it should be. */ crtc_commit_atomic(crtc, &plane, req, ATOMIC_RELAX_NONE); /* Restore the primary plane and check the state matches the old. */ crtc_commit_atomic(crtc, plane_old, req, ATOMIC_RELAX_NONE); /* Re-enable the plane through the legacy CRTC/primary-plane API, and * verify through atomic. */ crtc_commit_legacy(crtc, &plane, CRTC_RELAX_MODE); /* Restore the plane to its original settings through the legacy CRTC * API, and verify through atomic. */ crtc_commit_legacy(crtc, plane_old, CRTC_RELAX_MODE); /* Finally, restore to the original state. */ crtc_commit_atomic(crtc, plane_old, req, ATOMIC_RELAX_NONE); drmModeAtomicFree(req); } static void plane_cursor(struct kms_atomic_crtc_state *crtc, struct kms_atomic_plane_state *plane_old) { struct drm_mode_modeinfo *mode = crtc->mode.data; struct kms_atomic_plane_state plane = *plane_old; drmModeAtomicReq *req = drmModeAtomicAlloc(); struct igt_fb fb; uint64_t width, height; igt_assert(req); /* Any kernel new enough for atomic, also has the cursor size caps. */ do_or_die(drmGetCap(plane.state->desc->fd, DRM_CAP_CURSOR_WIDTH, &width)); do_or_die(drmGetCap(plane.state->desc->fd, DRM_CAP_CURSOR_HEIGHT, &height)); plane.src_x = 0; plane.src_y = 0; plane.src_w = width << 16; plane.src_h = height << 16; plane.crtc_x = mode->hdisplay / 2; plane.crtc_y = mode->vdisplay / 2; plane.crtc_w = width; plane.crtc_h = height; plane.crtc_id = crtc->obj; plane.fb_id = igt_create_color_fb(plane.state->desc->fd, width, height, DRM_FORMAT_ARGB8888, LOCAL_DRM_FORMAT_MOD_NONE, 0.0, 0.0, 0.0, &fb); igt_assert_neq_u32(plane.fb_id, 0); /* Flip the cursor plane using the atomic API, and double-check * state is what we think it should be. */ plane_commit_atomic(&plane, req, ATOMIC_RELAX_NONE); /* Restore the cursor plane and check the state matches the old. */ plane_commit_atomic(plane_old, req, ATOMIC_RELAX_NONE); /* Re-enable the plane through the legacy cursor API, and verify * through atomic. */ do_or_die(drmModeMoveCursor(plane.state->desc->fd, plane.crtc_id, plane.crtc_x, plane.crtc_y)); do_or_die(drmModeSetCursor(plane.state->desc->fd, plane.crtc_id, fb.gem_handle, width, height)); plane_check_current_state(&plane, PLANE_RELAX_FB); /* Wiggle. */ plane.crtc_x -= 16; plane.crtc_y -= 16; do_or_die(drmModeMoveCursor(plane.state->desc->fd, plane.crtc_id, plane.crtc_x, plane.crtc_y)); plane_check_current_state(&plane, PLANE_RELAX_FB); /* Restore the plane to its original settings through the legacy cursor * API, and verify through atomic. */ do_or_die(drmModeSetCursor2(plane.state->desc->fd, plane.crtc_id, 0, 0, 0, 0, 0)); plane_check_current_state(plane_old, ATOMIC_RELAX_NONE); /* Finally, restore to the original state. */ plane_commit_atomic(plane_old, req, ATOMIC_RELAX_NONE); drmModeAtomicFree(req); } static void plane_invalid_params(struct kms_atomic_crtc_state *crtc, struct kms_atomic_plane_state *plane_old, struct kms_atomic_connector_state *conn) { struct drm_mode_modeinfo *mode = crtc->mode.data; struct kms_atomic_plane_state plane = *plane_old; uint32_t format = plane_get_igt_format(&plane); drmModeAtomicReq *req = drmModeAtomicAlloc(); struct igt_fb fb; /* Pass a series of invalid object IDs for the FB ID. */ plane.fb_id = plane.obj; plane_commit_atomic_err(&plane, plane_old, req, ATOMIC_RELAX_NONE, EINVAL); plane.fb_id = crtc->obj; plane_commit_atomic_err(&plane, plane_old, req, ATOMIC_RELAX_NONE, EINVAL); plane.fb_id = conn->obj; plane_commit_atomic_err(&plane, plane_old, req, ATOMIC_RELAX_NONE, EINVAL); plane.fb_id = crtc->mode.id; plane_commit_atomic_err(&plane, plane_old, req, ATOMIC_RELAX_NONE, EINVAL); plane.fb_id = plane_old->fb_id; plane_commit_atomic(&plane, req, ATOMIC_RELAX_NONE); /* Pass a series of invalid object IDs for the CRTC ID. */ plane.crtc_id = plane.obj; plane_commit_atomic_err(&plane, plane_old, req, ATOMIC_RELAX_NONE, EINVAL); plane.crtc_id = plane.fb_id; plane_commit_atomic_err(&plane, plane_old, req, ATOMIC_RELAX_NONE, EINVAL); plane.crtc_id = conn->obj; plane_commit_atomic_err(&plane, plane_old, req, ATOMIC_RELAX_NONE, EINVAL); plane.crtc_id = crtc->mode.id; plane_commit_atomic_err(&plane, plane_old, req, ATOMIC_RELAX_NONE, EINVAL); plane.crtc_id = plane_old->crtc_id; plane_commit_atomic(&plane, req, ATOMIC_RELAX_NONE); /* Create a framebuffer too small for the plane configuration. */ igt_require(format != 0); plane.src_x = 0; plane.src_y = 0; plane.src_w = mode->hdisplay << 16; plane.src_h = mode->vdisplay << 16; plane.crtc_x = 0; plane.crtc_y = 0; plane.crtc_w = mode->hdisplay; plane.crtc_h = mode->vdisplay; plane.crtc_id = crtc->obj; plane.fb_id = igt_create_pattern_fb(plane.state->desc->fd, plane.crtc_w - 1, plane.crtc_h - 1, format, I915_TILING_NONE, &fb); plane_commit_atomic_err(&plane, plane_old, req, ATOMIC_RELAX_NONE, ENOSPC); /* Restore the primary plane and check the state matches the old. */ plane_commit_atomic(plane_old, req, ATOMIC_RELAX_NONE); drmModeAtomicFree(req); } static void crtc_invalid_params(struct kms_atomic_crtc_state *crtc_old, struct kms_atomic_plane_state *plane, struct kms_atomic_connector_state *conn) { struct kms_atomic_crtc_state crtc = *crtc_old; drmModeAtomicReq *req = drmModeAtomicAlloc(); igt_assert(req); /* Pass a series of invalid object IDs for the mode ID. */ crtc.mode.id = plane->obj; crtc_commit_atomic_err(&crtc, plane, crtc_old, plane, req, ATOMIC_RELAX_NONE, EINVAL); crtc.mode.id = crtc.obj; crtc_commit_atomic_err(&crtc, plane, crtc_old, plane, req, ATOMIC_RELAX_NONE, EINVAL); crtc.mode.id = conn->obj; crtc_commit_atomic_err(&crtc, plane, crtc_old, plane, req, ATOMIC_RELAX_NONE, EINVAL); crtc.mode.id = plane->fb_id; crtc_commit_atomic_err(&crtc, plane, crtc_old, plane, req, ATOMIC_RELAX_NONE, EINVAL); crtc.mode.id = crtc_old->mode.id; crtc_commit_atomic(&crtc, plane, req, ATOMIC_RELAX_NONE); /* Create a blob which is the wrong size to be a valid mode. */ do_or_die(drmModeCreatePropertyBlob(crtc.state->desc->fd, crtc.mode.data, sizeof(struct drm_mode_modeinfo) - 1, &crtc.mode.id)); crtc_commit_atomic_err(&crtc, plane, crtc_old, plane, req, ATOMIC_RELAX_NONE, EINVAL); do_or_die(drmModeCreatePropertyBlob(crtc.state->desc->fd, crtc.mode.data, sizeof(struct drm_mode_modeinfo) + 1, &crtc.mode.id)); crtc_commit_atomic_err(&crtc, plane, crtc_old, plane, req, ATOMIC_RELAX_NONE, EINVAL); /* Restore the CRTC and check the state matches the old. */ crtc_commit_atomic(crtc_old, plane, req, ATOMIC_RELAX_NONE); drmModeAtomicFree(req); } /* Abuse the atomic ioctl directly in order to test various invalid conditions, * which the libdrm wrapper won't allow us to create. */ static void atomic_invalid_params(struct kms_atomic_crtc_state *crtc, struct kms_atomic_plane_state *plane, struct kms_atomic_connector_state *connector) { struct kms_atomic_desc *desc = crtc->state->desc; struct drm_mode_atomic ioc; uint32_t obj_raw[16]; /* array of objects (sized by count_objs) */ uint32_t num_props_raw[16]; /* array of num props per obj (ditto) */ uint32_t props_raw[256]; /* array of props (sum of count_props) */ uint64_t values_raw[256]; /* array of values for properties (ditto) */ int i; memset(&ioc, 0, sizeof(ioc)); /* An empty request should do nothing. */ do_ioctl(desc->fd, DRM_IOCTL_MODE_ATOMIC, &ioc); for (i = 0; i < ARRAY_SIZE(obj_raw); i++) obj_raw[i] = 0; for (i = 0; i < ARRAY_SIZE(num_props_raw); i++) num_props_raw[i] = 0; for (i = 0; i < ARRAY_SIZE(props_raw); i++) props_raw[i] = 0; for (i = 0; i < ARRAY_SIZE(values_raw); i++) values_raw[i] = 0; ioc.objs_ptr = (uintptr_t) obj_raw; ioc.count_props_ptr = (uintptr_t) num_props_raw; ioc.props_ptr = (uintptr_t) props_raw; ioc.prop_values_ptr = (uintptr_t) values_raw; /* Valid pointers, but still should copy nothing. */ do_ioctl(desc->fd, DRM_IOCTL_MODE_ATOMIC, &ioc); /* Nonsense flags. */ ioc.flags = 0xdeadbeef; do_ioctl_err(desc->fd, DRM_IOCTL_MODE_ATOMIC, &ioc, EINVAL); /* Specifically forbidden combination. */ ioc.flags = DRM_MODE_ATOMIC_TEST_ONLY | DRM_MODE_PAGE_FLIP_EVENT; do_ioctl_err(desc->fd, DRM_IOCTL_MODE_ATOMIC, &ioc, EINVAL); ioc.flags = 0; /* Safety check that flags is reset properly. */ do_ioctl(desc->fd, DRM_IOCTL_MODE_ATOMIC, &ioc); /* Reserved/MBZ. */ ioc.reserved = 1; do_ioctl_err(desc->fd, DRM_IOCTL_MODE_ATOMIC, &ioc, EINVAL); ioc.reserved = 0; do_ioctl(desc->fd, DRM_IOCTL_MODE_ATOMIC, &ioc); /* Zero is not a valid object ID. */ ioc.count_objs = ARRAY_SIZE(obj_raw); do_ioctl_err(desc->fd, DRM_IOCTL_MODE_ATOMIC, &ioc, ENOENT); /* Invalid object type (not a thing we can set properties on). */ ioc.count_objs = 1; obj_raw[0] = crtc->mode.id; do_ioctl_err(desc->fd, DRM_IOCTL_MODE_ATOMIC, &ioc, ENOENT); obj_raw[0] = plane->fb_id; do_ioctl_err(desc->fd, DRM_IOCTL_MODE_ATOMIC, &ioc, ENOENT); /* Filled object but with no properties; no-op. */ for (i = 0; i < ARRAY_SIZE(obj_raw); i++) obj_raw[i] = crtc->obj; do_ioctl(desc->fd, DRM_IOCTL_MODE_ATOMIC, &ioc); /* Pass in all sorts of things other than the property ID. */ num_props_raw[0] = 1; do_ioctl_err(desc->fd, DRM_IOCTL_MODE_ATOMIC, &ioc, ENOENT); props_raw[0] = crtc->obj; do_ioctl_err(desc->fd, DRM_IOCTL_MODE_ATOMIC, &ioc, ENOENT); props_raw[0] = plane->obj; do_ioctl_err(desc->fd, DRM_IOCTL_MODE_ATOMIC, &ioc, ENOENT); props_raw[0] = connector->obj; do_ioctl_err(desc->fd, DRM_IOCTL_MODE_ATOMIC, &ioc, ENOENT); props_raw[0] = crtc->mode.id; do_ioctl_err(desc->fd, DRM_IOCTL_MODE_ATOMIC, &ioc, ENOENT); /* Valid property, valid value. */ for (i = 0; i < ARRAY_SIZE(props_raw); i++) { props_raw[i] = desc->props_crtc[CRTC_MODE_ID]; values_raw[i] = crtc->mode.id; } do_ioctl(desc->fd, DRM_IOCTL_MODE_ATOMIC, &ioc); /* Setting the same thing multiple times is OK. */ for (i = 0; i < ARRAY_SIZE(obj_raw); i++) num_props_raw[i] = ARRAY_SIZE(props_raw) / ARRAY_SIZE(obj_raw); do_ioctl(desc->fd, DRM_IOCTL_MODE_ATOMIC, &ioc); ioc.count_objs = ARRAY_SIZE(obj_raw); do_ioctl(desc->fd, DRM_IOCTL_MODE_ATOMIC, &ioc); /* Pass a series of outlandish addresses. */ ioc.objs_ptr = 0; do_ioctl_err(desc->fd, DRM_IOCTL_MODE_ATOMIC, &ioc, EFAULT); ioc.objs_ptr = (uintptr_t) obj_raw; ioc.count_props_ptr = 0; do_ioctl_err(desc->fd, DRM_IOCTL_MODE_ATOMIC, &ioc, EFAULT); ioc.count_props_ptr = (uintptr_t) num_props_raw; ioc.props_ptr = 0; do_ioctl_err(desc->fd, DRM_IOCTL_MODE_ATOMIC, &ioc, EFAULT); ioc.props_ptr = (uintptr_t) props_raw; ioc.prop_values_ptr = 0; do_ioctl_err(desc->fd, DRM_IOCTL_MODE_ATOMIC, &ioc, EFAULT); ioc.prop_values_ptr = (uintptr_t) values_raw; do_ioctl(desc->fd, DRM_IOCTL_MODE_ATOMIC, &ioc); /* Attempt to overflow and/or trip various boundary conditions. */ ioc.count_objs = UINT32_MAX / sizeof(uint32_t); do_ioctl_err(desc->fd, DRM_IOCTL_MODE_ATOMIC, &ioc, ENOENT); ioc.count_objs = ARRAY_SIZE(obj_raw); ioc.objs_ptr = UINT64_MAX - sizeof(uint32_t); do_ioctl_err(desc->fd, DRM_IOCTL_MODE_ATOMIC, &ioc, EFAULT); ioc.count_objs = 1; ioc.objs_ptr = UINT64_MAX - sizeof(uint32_t); do_ioctl_err(desc->fd, DRM_IOCTL_MODE_ATOMIC, &ioc, EFAULT); num_props_raw[0] = UINT32_MAX / sizeof(uint32_t); do_ioctl_err(desc->fd, DRM_IOCTL_MODE_ATOMIC, &ioc, EFAULT); num_props_raw[0] = UINT32_MAX - 1; do_ioctl_err(desc->fd, DRM_IOCTL_MODE_ATOMIC, &ioc, EFAULT); for (i = 0; i < ARRAY_SIZE(obj_raw); i++) num_props_raw[i] = (UINT32_MAX / ARRAY_SIZE(obj_raw)) + 1; do_ioctl_err(desc->fd, DRM_IOCTL_MODE_ATOMIC, &ioc, EFAULT); for (i = 0; i < ARRAY_SIZE(obj_raw); i++) num_props_raw[i] = ARRAY_SIZE(props_raw) / ARRAY_SIZE(obj_raw); do_ioctl_err(desc->fd, DRM_IOCTL_MODE_ATOMIC, &ioc, EFAULT); } igt_main { struct kms_atomic_desc desc; struct kms_atomic_state *current; memset(&desc, 0, sizeof(desc)); current = calloc(1, sizeof(*current)); igt_assert(current); current->desc = &desc; igt_fixture atomic_setup(current); igt_subtest("plane_overlay_legacy") { struct kms_atomic_state *scratch = atomic_state_dup(current); struct kms_atomic_crtc_state *crtc = find_crtc(scratch, true); struct kms_atomic_plane_state *plane = find_plane(scratch, PLANE_TYPE_OVERLAY, crtc); igt_require(crtc); igt_require(plane); plane_overlay(crtc, plane); atomic_state_free(scratch); } igt_subtest("plane_primary_legacy") { struct kms_atomic_state *scratch = atomic_state_dup(current); struct kms_atomic_crtc_state *crtc = find_crtc(scratch, true); struct kms_atomic_plane_state *plane = find_plane(scratch, PLANE_TYPE_PRIMARY, crtc); igt_require(crtc); igt_require(plane); plane_primary(crtc, plane); atomic_state_free(scratch); } igt_subtest("plane_cursor_legacy") { struct kms_atomic_state *scratch = atomic_state_dup(current); struct kms_atomic_crtc_state *crtc = find_crtc(scratch, true); struct kms_atomic_plane_state *plane = find_plane(scratch, PLANE_TYPE_CURSOR, crtc); igt_require(crtc); igt_require(plane); plane_cursor(crtc, plane); atomic_state_free(scratch); } igt_subtest("plane_invalid_params") { struct kms_atomic_state *scratch = atomic_state_dup(current); struct kms_atomic_crtc_state *crtc = find_crtc(scratch, true); struct kms_atomic_plane_state *plane = find_plane(current, PLANE_TYPE_PRIMARY, crtc); struct kms_atomic_connector_state *conn = find_connector(scratch, crtc); igt_require(crtc); igt_require(plane); plane_invalid_params(crtc, plane, conn); atomic_state_free(scratch); } igt_subtest("crtc_invalid_params") { struct kms_atomic_state *scratch = atomic_state_dup(current); struct kms_atomic_crtc_state *crtc = find_crtc(scratch, true); struct kms_atomic_plane_state *plane = find_plane(scratch, NUM_PLANE_TYPE_PROPS, crtc); struct kms_atomic_connector_state *conn = find_connector(scratch, crtc); igt_require(crtc); igt_require(plane); igt_require(conn); crtc_invalid_params(crtc, plane, conn); atomic_state_free(scratch); } igt_subtest("atomic_invalid_params") { struct kms_atomic_state *scratch = atomic_state_dup(current); struct kms_atomic_crtc_state *crtc = &scratch->crtcs[0]; struct kms_atomic_plane_state *plane = find_plane(scratch, NUM_PLANE_TYPE_PROPS, crtc); struct kms_atomic_connector_state *conn = find_connector(scratch, crtc); igt_require(plane); igt_require(conn); atomic_invalid_params(crtc, plane, conn); atomic_state_free(scratch); } atomic_state_free(current); igt_fixture close(desc.fd); } intel-gpu-tools-1.14/tests/gem_bad_batch.c0000644000175000017500000000400312665336131015452 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * Jesse Barnes (based on gem_bad_blit.c) * */ #include "igt.h" #include #include #include #include #include #include #include #include #include "drm.h" #include "intel_bufmgr.h" static drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; static void bad_batch(void) { BEGIN_BATCH(2, 0); OUT_BATCH(MI_BATCH_BUFFER_START); OUT_BATCH(0); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); } igt_simple_main { int fd; fd = drm_open_driver(DRIVER_INTEL); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); drm_intel_bufmgr_gem_enable_reuse(bufmgr); batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd)); bad_batch(); intel_batchbuffer_free(batch); drm_intel_bufmgr_destroy(bufmgr); close(fd); } intel-gpu-tools-1.14/tests/gem_exec_blt.c0000644000175000017500000002275612665336131015367 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include "drm.h" #define OBJECT_SIZE 16384 #define COPY_BLT_CMD (2<<29|0x53<<22|0x6) #define BLT_WRITE_ALPHA (1<<21) #define BLT_WRITE_RGB (1<<20) #define BLT_SRC_TILED (1<<15) #define BLT_DST_TILED (1<<11) #define LOCAL_I915_EXEC_NO_RELOC (1<<11) #define LOCAL_I915_EXEC_HANDLE_LUT (1<<12) static int gem_linear_blt(int fd, uint32_t *batch, uint32_t src, uint32_t dst, uint32_t length, struct drm_i915_gem_relocation_entry *reloc) { uint32_t *b = batch; int height = length / (16 * 1024); igt_assert_lte(height, 1 << 16); if (height) { int i = 0; b[i++] = COPY_BLT_CMD | BLT_WRITE_ALPHA | BLT_WRITE_RGB; if (intel_gen(intel_get_drm_devid(fd)) >= 8) b[i-1]+=2; b[i++] = 0xcc << 16 | 1 << 25 | 1 << 24 | (16*1024); b[i++] = 0; b[i++] = height << 16 | (4*1024); b[i++] = 0; reloc->offset = (b-batch+4) * sizeof(uint32_t); reloc->delta = 0; reloc->target_handle = dst; reloc->read_domains = I915_GEM_DOMAIN_RENDER; reloc->write_domain = I915_GEM_DOMAIN_RENDER; reloc->presumed_offset = 0; reloc++; if (intel_gen(intel_get_drm_devid(fd)) >= 8) b[i++] = 0; /* FIXME */ b[i++] = 0; b[i++] = 16*1024; b[i++] = 0; reloc->offset = (b-batch+7) * sizeof(uint32_t); if (intel_gen(intel_get_drm_devid(fd)) >= 8) reloc->offset += sizeof(uint32_t); reloc->delta = 0; reloc->target_handle = src; reloc->read_domains = I915_GEM_DOMAIN_RENDER; reloc->write_domain = 0; reloc->presumed_offset = 0; reloc++; if (intel_gen(intel_get_drm_devid(fd)) >= 8) b[i++] = 0; /* FIXME */ b += i; length -= height * 16*1024; } if (length) { int i = 0; b[i++] = COPY_BLT_CMD | BLT_WRITE_ALPHA | BLT_WRITE_RGB; if (intel_gen(intel_get_drm_devid(fd)) >= 8) b[i-1]+=2; b[i++] = 0xcc << 16 | 1 << 25 | 1 << 24 | (16*1024); b[i++] = height << 16; b[i++] = (1+height) << 16 | (length / 4); b[i++] = 0; reloc->offset = (b-batch+4) * sizeof(uint32_t); reloc->delta = 0; reloc->target_handle = dst; reloc->read_domains = I915_GEM_DOMAIN_RENDER; reloc->write_domain = I915_GEM_DOMAIN_RENDER; reloc->presumed_offset = 0; reloc++; if (intel_gen(intel_get_drm_devid(fd)) >= 8) b[i++] = 0; /* FIXME */ b[i++] = height << 16; b[i++] = 16*1024; b[i++] = 0; reloc->offset = (b-batch+7) * sizeof(uint32_t); if (intel_gen(intel_get_drm_devid(fd)) >= 8) reloc->offset += sizeof(uint32_t); reloc->delta = 0; reloc->target_handle = src; reloc->read_domains = I915_GEM_DOMAIN_RENDER; reloc->write_domain = 0; reloc->presumed_offset = 0; reloc++; if (intel_gen(intel_get_drm_devid(fd)) >= 8) b[i++] = 0; /* FIXME */ b += i; } b[0] = MI_BATCH_BUFFER_END; b[1] = 0; return (b+2 - batch) * sizeof(uint32_t); } static double elapsed(const struct timeval *start, const struct timeval *end, int loop) { return (1e6*(end->tv_sec - start->tv_sec) + (end->tv_usec - start->tv_usec))/loop; } static const char *bytes_per_sec(char *buf, double v) { const char *order[] = { "", "KiB", "MiB", "GiB", "TiB", "PiB", NULL, }, **o = order; while (v > 1024 && o[1]) { v /= 1024; o++; } sprintf(buf, "%.1f%s/s", v, *o); return buf; } static uint32_t dumb_create(int fd) { struct drm_mode_create_dumb arg; int ret; arg.bpp = 32; arg.width = 32; arg.height = 32; ret = drmIoctl(fd, DRM_IOCTL_MODE_CREATE_DUMB, &arg); igt_assert_eq(ret, 0); igt_assert(arg.size >= 4096); return arg.handle; } static int dcmp(const void *A, const void *B) { const double *a = A, *b = B; if (*a < *b) return -1; else if (*a > *b) return 1; else return 0; } static void run(int object_size, bool dumb) { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 exec[3]; struct drm_i915_gem_relocation_entry reloc[4]; uint32_t buf[20]; uint32_t handle, src, dst; int fd, len, count; int ring; fd = drm_open_driver(DRIVER_INTEL); if (dumb) handle = dumb_create(fd); else handle = gem_create(fd, 4096); src = gem_create(fd, object_size); dst = gem_create(fd, object_size); len = gem_linear_blt(fd, buf, 0, 1, object_size, reloc); gem_write(fd, handle, 0, buf, len); memset(exec, 0, sizeof(exec)); exec[0].handle = src; exec[1].handle = dst; exec[2].handle = handle; if (intel_gen(intel_get_drm_devid(fd)) >= 8) exec[2].relocation_count = len > 56 ? 4 : 2; else exec[2].relocation_count = len > 40 ? 4 : 2; exec[2].relocs_ptr = (uintptr_t)reloc; ring = 0; if (HAS_BLT_RING(intel_get_drm_devid(fd))) ring = I915_EXEC_BLT; memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)exec; execbuf.buffer_count = 3; execbuf.batch_len = len; execbuf.flags = ring; execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT; execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC; if (drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf)) { len = gem_linear_blt(fd, buf, src, dst, object_size, reloc); igt_assert(len == execbuf.batch_len); gem_write(fd, handle, 0, buf, len); execbuf.flags = ring; do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); } gem_sync(fd, handle); for (count = 1; count <= 1<<12; count <<= 1) { struct timeval start, end; const int reps = 9; double t[reps], sum; int n; for (n = 0; n < reps; n++) { gettimeofday(&start, NULL); for (int loop = 0; loop < count; loop++) gem_execbuf(fd, &execbuf); gem_sync(fd, handle); gettimeofday(&end, NULL); t[n] = elapsed(&start, &end, count); } qsort(t, n, sizeof(double), dcmp); sum = 0; for (n = 2; n < reps - 2; n++) sum += t[n]; sum /= reps - 4; igt_info("Time to blt %d bytes x %6d: %7.3fµs, %s\n", object_size, count, sum, bytes_per_sec((char *)buf, object_size/sum*1e6)); fflush(stdout); } gem_close(fd, handle); close(fd); } static int sysfs_read(const char *name) { char buf[4096]; int sysfd; int len; sprintf(buf, "/sys/class/drm/card%d/%s", drm_get_card(), name); sysfd = open(buf, O_RDONLY); if (sysfd < 0) return -1; len = read(sysfd, buf, sizeof(buf)-1); close(sysfd); if (len < 0) return -1; buf[len] = '\0'; return atoi(buf); } static int sysfs_write(const char *name, int value) { char buf[4096]; int sysfd; int len; sprintf(buf, "/sys/class/drm/card%d/%s", drm_get_card(), name); sysfd = open(buf, O_WRONLY); if (sysfd < 0) return -1; len = sprintf(buf, "%d", value); len = write(sysfd, buf, len); close(sysfd); if (len < 0) return len; return 0; } static void set_auto_freq(void) { int min = sysfs_read("gt_RPn_freq_mhz"); int max = sysfs_read("gt_RP0_freq_mhz"); if (max <= min) return; igt_debug("Setting min to %dMHz, and max to %dMHz\n", min, max); sysfs_write("gt_min_freq_mhz", min); sysfs_write("gt_max_freq_mhz", max); } static void set_min_freq(void) { int min = sysfs_read("gt_RPn_freq_mhz"); igt_require(min > 0); igt_debug("Setting min/max to %dMHz\n", min); igt_require(sysfs_write("gt_min_freq_mhz", min) == 0 && sysfs_write("gt_max_freq_mhz", min) == 0); } static void set_max_freq(void) { int max = sysfs_read("gt_RP0_freq_mhz"); igt_require(max > 0); igt_debug("Setting min/max to %dMHz\n", max); igt_require(sysfs_write("gt_max_freq_mhz", max) == 0 && sysfs_write("gt_min_freq_mhz", max) == 0); } int main(int argc, char **argv) { const struct { const char *suffix; void (*func)(void); } rps[] = { { "", set_auto_freq }, { "-min", set_min_freq }, { "-max", set_max_freq }, { NULL, NULL }, }, *r; int min = -1, max = -1; int i; igt_subtest_init(argc, argv); igt_skip_on_simulation(); if (argc > 1) { for (i = 1; i < argc; i++) { int object_size = atoi(argv[i]); if (object_size) run((object_size + 3) & -4, false); } _exit(0); /* blergh */ } igt_fixture { min = sysfs_read("gt_min_freq_mhz"); max = sysfs_read("gt_max_freq_mhz"); } for (r = rps; r->suffix; r++) { igt_fixture r->func(); igt_subtest_f("cold%s", r->suffix) run(OBJECT_SIZE, false); igt_subtest_f("normal%s", r->suffix) run(OBJECT_SIZE, false); igt_subtest_f("dumb-buf%s", r->suffix) run(OBJECT_SIZE, true); } igt_fixture { if (min > 0) sysfs_write("gt_min_freq_mhz", min); if (max > 0) sysfs_write("gt_max_freq_mhz", max); } igt_exit(); } intel-gpu-tools-1.14/tests/gem_ring_sync_loop.c0000644000175000017500000000575212665336131016623 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter (based on gem_storedw_*.c) * */ #include "igt.h" IGT_TEST_DESCRIPTION("Basic check of ring<->ring write synchronisation."); /* * Testcase: Basic check of ring<->ring sync using a dummy reloc * * Extremely efficient at catching missed irqs with semaphores=0 ... */ static void sync_loop(int fd) { const uint32_t bbe = MI_BATCH_BUFFER_END; int num_rings = gem_get_num_rings(fd); struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 object[2]; struct drm_i915_gem_relocation_entry reloc[1]; int i; memset(object, 0, sizeof(object)); object[0].handle = gem_create(fd, 4096); object[0].flags = EXEC_OBJECT_WRITE; object[1].handle = gem_create(fd, 4096); gem_write(fd, object[1].handle, 0, &bbe, sizeof(bbe)); memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)object; execbuf.buffer_count = 2; /* Check if we have no-reloc support first */ if (__gem_execbuf(fd, &execbuf)) { object[0].flags = 0; object[1].relocs_ptr = (uintptr_t)reloc; object[1].relocation_count = 1; /* Add a dummy relocation to mark the object as writing */ memset(reloc, 0, sizeof(reloc)); reloc->offset = 1000; reloc->target_handle = object[0].handle; reloc->read_domains = I915_GEM_DOMAIN_RENDER; reloc->write_domain = I915_GEM_DOMAIN_RENDER; gem_execbuf(fd, &execbuf); } srandom(0xdeadbeef); for (i = 0; i < SLOW_QUICK(0x100000, 10); i++) { execbuf.flags = random() % num_rings + 1; gem_execbuf(fd, &execbuf); } gem_sync(fd, object[1].handle); gem_close(fd, object[1].handle); gem_close(fd, object[0].handle); } igt_simple_main { int fd; fd = drm_open_driver(DRIVER_INTEL); igt_require(gem_get_num_rings(fd) > 1); intel_detect_and_clear_missed_interrupts(fd); sync_loop(fd); igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); close(fd); } intel-gpu-tools-1.14/tests/drv_getparams_basic.c0000644000175000017500000000763512665336131016750 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Jeff McGee * */ #include "igt.h" #include #include #include #include #include "intel_bufmgr.h" IGT_TEST_DESCRIPTION("Tests the export of parameters via DRM_IOCTL_I915_GETPARAM\n"); int drm_fd; int devid; static void init(void) { drm_fd = drm_open_driver(DRIVER_INTEL); devid = intel_get_drm_devid(drm_fd); } static void deinit(void) { close(drm_fd); } #define LOCAL_I915_PARAM_SUBSLICE_TOTAL 33 #define LOCAL_I915_PARAM_EU_TOTAL 34 static int getparam(int param, int *value) { drm_i915_getparam_t gp; int ret; memset(&gp, 0, sizeof(gp)); gp.value = value; gp.param = param; ret = drmIoctl(drm_fd, DRM_IOCTL_I915_GETPARAM, &gp); if (ret) return -errno; return 0; } static void subslice_total(void) { unsigned int subslice_total = 0; int ret; ret = getparam(LOCAL_I915_PARAM_SUBSLICE_TOTAL, (int*)&subslice_total); igt_skip_on_f(ret == -EINVAL && intel_gen(devid), "Interface not supported by kernel\n"); if (ret) { /* * These devices are not required to implement the * interface. If they do not, -ENODEV must be returned. */ if ((intel_gen(devid) < 8) || IS_BROADWELL(devid) || igt_run_in_simulation()) { igt_assert_eq(ret, -ENODEV); igt_info("subslice total: unknown\n"); /* * All other devices must implement the interface, so * fail them if we are here. */ } else { igt_assert_eq(ret, 0); } } else { /* * On success, just make sure the returned count value is * non-zero. The validity of the count value for the given * device is not checked. */ igt_assert_neq(subslice_total, 0); igt_info("subslice total: %u\n", subslice_total); } } static void eu_total(void) { unsigned int eu_total = 0; int ret; ret = getparam(LOCAL_I915_PARAM_EU_TOTAL, (int*)&eu_total); igt_skip_on_f(ret == -EINVAL, "Interface not supported by kernel\n"); if (ret) { /* * These devices are not required to implement the * interface. If they do not, -ENODEV must be returned. */ if ((intel_gen(devid) < 8) || IS_BROADWELL(devid) || igt_run_in_simulation()) { igt_assert_eq(ret, -ENODEV); igt_info("EU total: unknown\n"); /* * All other devices must implement the interface, so * fail them if we are here. */ } else { igt_assert_eq(ret, 0); } } else { /* * On success, just make sure the returned count value is * non-zero. The validity of the count value for the given * device is not checked. */ igt_assert_neq(eu_total, 0); igt_info("EU total: %u\n", eu_total); } } static void exit_handler(int sig) { deinit(); } igt_main { igt_fixture { igt_install_exit_handler(exit_handler); init(); } igt_subtest("basic-subslice-total") subslice_total(); igt_subtest("basic-eu-total") eu_total(); } intel-gpu-tools-1.14/tests/pm_backlight.c0000644000175000017500000001055112665336131015364 00000000000000/* * Copyright © 2015 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Author: * Antti Koskipaa * */ #include "igt.h" #include #include #include #include #include #include #include #include #define TOLERANCE 5 /* percent */ #define BACKLIGHT_PATH "/sys/class/backlight/intel_backlight" #define FADESTEPS 10 #define FADESPEED 100 /* milliseconds between steps */ IGT_TEST_DESCRIPTION("Basic backlight sysfs test"); static int backlight_read(int *result, const char *fname) { int fd; char full[PATH_MAX]; char dst[64]; int r, e; igt_assert(snprintf(full, PATH_MAX, "%s/%s", BACKLIGHT_PATH, fname) < PATH_MAX); fd = open(full, O_RDONLY); if (fd == -1) return -errno; r = read(fd, dst, sizeof(dst)); e = errno; close(fd); if (r < 0) return -e; errno = 0; *result = strtol(dst, NULL, 10); return errno; } static int backlight_write(int value, const char *fname) { int fd; char full[PATH_MAX]; char src[64]; int len; igt_assert(snprintf(full, PATH_MAX, "%s/%s", BACKLIGHT_PATH, fname) < PATH_MAX); fd = open(full, O_WRONLY); if (fd == -1) return -errno; len = snprintf(src, sizeof(src), "%i", value); len = write(fd, src, len); close(fd); if (len < 0) return len; return 0; } static void test_and_verify(int val) { int result; igt_assert_eq(backlight_write(val, "brightness"), 0); igt_assert_eq(backlight_read(&result, "brightness"), 0); /* Check that the exact value sticks */ igt_assert_eq(result, val); igt_assert_eq(backlight_read(&result, "actual_brightness"), 0); /* Some rounding may happen depending on hw. Just check that it's close enough. */ igt_assert(result <= val + val * TOLERANCE / 100 && result >= val - val * TOLERANCE / 100); } static void test_brightness(int max) { test_and_verify(0); test_and_verify(max); test_and_verify(max / 2); } static void test_bad_brightness(int max) { int val; /* First write some sane value */ backlight_write(max / 2, "brightness"); /* Writing invalid values should fail and not change the value */ igt_assert_lt(backlight_write(-1, "brightness"), 0); backlight_read(&val, "brightness"); igt_assert_eq(val, max / 2); igt_assert_lt(backlight_write(max + 1, "brightness"), 0); backlight_read(&val, "brightness"); igt_assert_eq(val, max / 2); igt_assert_lt(backlight_write(INT_MAX, "brightness"), 0); backlight_read(&val, "brightness"); igt_assert_eq(val, max / 2); } static void test_fade(int max) { int i; static const struct timespec ts = { .tv_sec = 0, .tv_nsec = FADESPEED*1000000 }; /* Fade out, then in */ for (i = max; i > 0; i -= max / FADESTEPS) { test_and_verify(i); nanosleep(&ts, NULL); } for (i = 0; i <= max; i += max / FADESTEPS) { test_and_verify(i); nanosleep(&ts, NULL); } } igt_main { int max, old; igt_skip_on_simulation(); igt_fixture { /* Get the max value and skip the whole test if sysfs interface not available */ igt_skip_on(backlight_read(&old, "brightness")); igt_assert(backlight_read(&max, "max_brightness") > -1); } igt_subtest("basic-brightness") test_brightness(max); igt_subtest("bad-brightness") test_bad_brightness(max); igt_subtest("fade") test_fade(max); igt_fixture { /* Restore old brightness */ backlight_write(old, "brightness"); } } intel-gpu-tools-1.14/tests/kms_pwrite_crc.c0000644000175000017500000001263312665336131015756 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include "igt.h" #include #include #include #include #include IGT_TEST_DESCRIPTION( "Use the display CRC support to validate pwrite to an already uncached future scanout buffer."); typedef struct { int drm_fd; igt_display_t display; struct igt_fb fb[2]; igt_output_t *output; igt_plane_t *primary; enum pipe pipe; igt_crc_t ref_crc; igt_pipe_crc_t *pipe_crc; uint32_t devid; } data_t; static void test(data_t *data) { igt_output_t *output = data->output; struct igt_fb *fb = &data->fb[1]; drmModeModeInfo *mode; uint32_t caching; void *buf; igt_crc_t crc; mode = igt_output_get_mode(output); /* create a non-white fb where we can pwrite later */ igt_create_pattern_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, fb); /* flip to it to make it UC/WC and fully flushed */ drmModeSetPlane(data->drm_fd, data->primary->drm_plane->plane_id, output->config.crtc->crtc_id, fb->fb_id, 0, 0, 0, fb->width, fb->height, 0, 0, fb->width << 16, fb->height << 16); /* flip back the original white buffer */ drmModeSetPlane(data->drm_fd, data->primary->drm_plane->plane_id, output->config.crtc->crtc_id, data->fb[0].fb_id, 0, 0, 0, fb->width, fb->height, 0, 0, fb->width << 16, fb->height << 16); /* make sure caching mode has become UC/WT */ caching = gem_get_caching(data->drm_fd, fb->gem_handle); igt_assert(caching == I915_CACHING_NONE || caching == I915_CACHING_DISPLAY); /* use pwrite to make the other fb all white too */ buf = malloc(fb->size); igt_assert(buf != NULL); memset(buf, 0xff, fb->size); gem_write(data->drm_fd, fb->gem_handle, 0, buf, fb->size); free(buf); /* and flip to it */ drmModeSetPlane(data->drm_fd, data->primary->drm_plane->plane_id, output->config.crtc->crtc_id, fb->fb_id, 0, 0, 0, fb->width, fb->height, 0, 0, fb->width << 16, fb->height << 16); /* check that the crc is as expected, which requires that caches got flushed */ igt_pipe_crc_collect_crc(data->pipe_crc, &crc); igt_assert_crc_equal(&crc, &data->ref_crc); } static bool prepare_crtc(data_t *data) { igt_display_t *display = &data->display; igt_output_t *output = data->output; drmModeModeInfo *mode; /* select the pipe we want to use */ igt_output_set_pipe(output, data->pipe); igt_display_commit(display); if (!output->valid) { igt_output_set_pipe(output, PIPE_ANY); igt_display_commit(display); return false; } mode = igt_output_get_mode(output); /* create a white reference fb and flip to it */ igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, 1.0, 1.0, 1.0, &data->fb[0]); data->primary = igt_output_get_plane(output, IGT_PLANE_PRIMARY); igt_plane_set_fb(data->primary, &data->fb[0]); igt_display_commit(display); if (data->pipe_crc) igt_pipe_crc_free(data->pipe_crc); data->pipe_crc = igt_pipe_crc_new(data->pipe, INTEL_PIPE_CRC_SOURCE_AUTO); /* get reference crc for the white fb */ igt_pipe_crc_collect_crc(data->pipe_crc, &data->ref_crc); return true; } static void cleanup_crtc(data_t *data) { igt_display_t *display = &data->display; igt_output_t *output = data->output; igt_pipe_crc_free(data->pipe_crc); data->pipe_crc = NULL; igt_plane_set_fb(data->primary, NULL); igt_output_set_pipe(output, PIPE_ANY); igt_display_commit(display); igt_remove_fb(data->drm_fd, &data->fb[0]); igt_remove_fb(data->drm_fd, &data->fb[1]); } static void run_test(data_t *data) { igt_display_t *display = &data->display; igt_output_t *output; enum pipe pipe; for_each_connected_output(display, output) { data->output = output; for_each_pipe(display, pipe) { data->pipe = pipe; if (!prepare_crtc(data)) continue; test(data); cleanup_crtc(data); /* once is enough */ return; } } igt_skip("no valid crtc/connector combinations found\n"); } static data_t data; igt_simple_main { igt_skip_on_simulation(); igt_fixture { data.drm_fd = drm_open_driver_master(DRIVER_INTEL); data.devid = intel_get_drm_devid(data.drm_fd); kmstest_set_vt_graphics_mode(); igt_require_pipe_crc(); igt_display_init(&data.display, data.drm_fd); } run_test(&data); igt_fixture { igt_display_fini(&data.display); } } intel-gpu-tools-1.14/tests/gem_gtt_speed.c0000644000175000017500000002631312665336131015551 00000000000000/* * Copyright © 2010 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * Chris Wilson * */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include "drm.h" #define OBJECT_SIZE 16384 static double elapsed(const struct timeval *start, const struct timeval *end, int loop) { return (1e6*(end->tv_sec - start->tv_sec) + (end->tv_usec - start->tv_usec))/loop; } int main(int argc, char **argv) { struct timeval start, end; uint8_t *buf; uint32_t handle; int size = OBJECT_SIZE; int loop, i, tiling; int fd; igt_simple_init(argc, argv); igt_skip_on_simulation(); if (argc > 1) size = atoi(argv[1]); if (size == 0) { igt_warn("Invalid object size specified\n"); return 1; } buf = malloc(size); memset(buf, 0, size); fd = drm_open_driver(DRIVER_INTEL); handle = gem_create(fd, size); igt_assert(handle); for (tiling = I915_TILING_NONE; tiling <= I915_TILING_Y; tiling++) { if (tiling != I915_TILING_NONE) { igt_info("\nSetting tiling mode to %s\n", tiling == I915_TILING_X ? "X" : "Y"); gem_set_tiling(fd, handle, tiling, 512); } if (tiling == I915_TILING_NONE) { gem_set_domain(fd, handle, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU); { uint32_t *base = gem_mmap__cpu(fd, handle, 0, size, PROT_READ | PROT_WRITE); volatile uint32_t *ptr = base; int x = 0; for (i = 0; i < size/sizeof(*ptr); i++) x += ptr[i]; /* force overtly clever gcc to actually compute x */ ptr[0] = x; munmap(base, size); /* mmap read */ gettimeofday(&start, NULL); for (loop = 0; loop < 1000; loop++) { base = gem_mmap__cpu(fd, handle, 0, size, PROT_READ | PROT_WRITE); ptr = base; x = 0; for (i = 0; i < size/sizeof(*ptr); i++) x += ptr[i]; /* force overtly clever gcc to actually compute x */ ptr[0] = x; munmap(base, size); } gettimeofday(&end, NULL); igt_info("Time to read %dk through a CPU map: %7.3fµs\n", size/1024, elapsed(&start, &end, loop)); /* mmap write */ gettimeofday(&start, NULL); for (loop = 0; loop < 1000; loop++) { base = gem_mmap__cpu(fd, handle, 0, size, PROT_READ | PROT_WRITE); ptr = base; for (i = 0; i < size/sizeof(*ptr); i++) ptr[i] = i; munmap(base, size); } gettimeofday(&end, NULL); igt_info("Time to write %dk through a CPU map: %7.3fµs\n", size/1024, elapsed(&start, &end, loop)); gettimeofday(&start, NULL); for (loop = 0; loop < 1000; loop++) { base = gem_mmap__cpu(fd, handle, 0, size, PROT_READ | PROT_WRITE); memset(base, 0, size); munmap(base, size); } gettimeofday(&end, NULL); igt_info("Time to clear %dk through a CPU map: %7.3fµs\n", size/1024, elapsed(&start, &end, loop)); gettimeofday(&start, NULL); base = gem_mmap__cpu(fd, handle, 0, size, PROT_READ | PROT_WRITE); for (loop = 0; loop < 1000; loop++) memset(base, 0, size); munmap(base, size); gettimeofday(&end, NULL); igt_info("Time to clear %dk through a cached CPU map: %7.3fµs\n", size/1024, elapsed(&start, &end, loop)); } /* CPU pwrite */ gettimeofday(&start, NULL); for (loop = 0; loop < 1000; loop++) gem_write(fd, handle, 0, buf, size); gettimeofday(&end, NULL); igt_info("Time to pwrite %dk through the CPU: %7.3fµs\n", size/1024, elapsed(&start, &end, loop)); /* CPU pread */ gettimeofday(&start, NULL); for (loop = 0; loop < 1000; loop++) gem_read(fd, handle, 0, buf, size); gettimeofday(&end, NULL); igt_info("Time to pread %dk through the CPU: %7.3fµs\n", size/1024, elapsed(&start, &end, loop)); } /* prefault into gtt */ { uint32_t *base = gem_mmap__gtt(fd, handle, size, PROT_READ | PROT_WRITE); volatile uint32_t *ptr = base; int x = 0; for (i = 0; i < size/sizeof(*ptr); i++) x += ptr[i]; /* force overtly clever gcc to actually compute x */ ptr[0] = x; munmap(base, size); } /* mmap read */ gettimeofday(&start, NULL); for (loop = 0; loop < 1000; loop++) { uint32_t *base = gem_mmap__gtt(fd, handle, size, PROT_READ | PROT_WRITE); volatile uint32_t *ptr = base; int x = 0; for (i = 0; i < size/sizeof(*ptr); i++) x += ptr[i]; /* force overtly clever gcc to actually compute x */ ptr[0] = x; munmap(base, size); } gettimeofday(&end, NULL); igt_info("Time to read %dk through a GTT map: %7.3fµs\n", size/1024, elapsed(&start, &end, loop)); if (gem_mmap__has_wc(fd)) { gettimeofday(&start, NULL); for (loop = 0; loop < 1000; loop++) { uint32_t *base = gem_mmap__wc(fd, handle, 0, size, PROT_READ | PROT_WRITE); volatile uint32_t *ptr = base; int x = 0; for (i = 0; i < size/sizeof(*ptr); i++) x += ptr[i]; /* force overtly clever gcc to actually compute x */ ptr[0] = x; munmap(base, size); } gettimeofday(&end, NULL); igt_info("Time to read %dk through a WC map: %7.3fµs\n", size/1024, elapsed(&start, &end, loop)); } /* mmap write */ gettimeofday(&start, NULL); for (loop = 0; loop < 1000; loop++) { uint32_t *base = gem_mmap__gtt(fd, handle, size, PROT_READ | PROT_WRITE); volatile uint32_t *ptr = base; for (i = 0; i < size/sizeof(*ptr); i++) ptr[i] = i; munmap(base, size); } gettimeofday(&end, NULL); igt_info("Time to write %dk through a GTT map: %7.3fµs\n", size/1024, elapsed(&start, &end, loop)); if (gem_mmap__has_wc(fd)) { /* mmap write */ gettimeofday(&start, NULL); for (loop = 0; loop < 1000; loop++) { uint32_t *base = gem_mmap__wc(fd, handle, 0, size, PROT_READ | PROT_WRITE); volatile uint32_t *ptr = base; for (i = 0; i < size/sizeof(*ptr); i++) ptr[i] = i; munmap(base, size); } gettimeofday(&end, NULL); igt_info("Time to write %dk through a WC map: %7.3fµs\n", size/1024, elapsed(&start, &end, loop)); } /* mmap clear */ gettimeofday(&start, NULL); for (loop = 0; loop < 1000; loop++) { uint32_t *base = gem_mmap__gtt(fd, handle, size, PROT_READ | PROT_WRITE); memset(base, 0, size); munmap(base, size); } gettimeofday(&end, NULL); igt_info("Time to clear %dk through a GTT map: %7.3fµs\n", size/1024, elapsed(&start, &end, loop)); if (gem_mmap__has_wc(fd)) { /* mmap clear */ gettimeofday(&start, NULL); for (loop = 0; loop < 1000; loop++) { uint32_t *base = gem_mmap__wc(fd, handle, 0, size, PROT_READ | PROT_WRITE); memset(base, 0, size); munmap(base, size); } gettimeofday(&end, NULL); igt_info("Time to clear %dk through a WC map: %7.3fµs\n", size/1024, elapsed(&start, &end, loop)); } gettimeofday(&start, NULL);{ uint32_t *base = gem_mmap__gtt(fd, handle, size, PROT_READ | PROT_WRITE); for (loop = 0; loop < 1000; loop++) memset(base, 0, size); munmap(base, size); } gettimeofday(&end, NULL); igt_info("Time to clear %dk through a cached GTT map: %7.3fµs\n", size/1024, elapsed(&start, &end, loop)); if (gem_mmap__has_wc(fd)) { gettimeofday(&start, NULL);{ uint32_t *base = gem_mmap__wc(fd, handle, 0, size, PROT_READ | PROT_WRITE); for (loop = 0; loop < 1000; loop++) memset(base, 0, size); munmap(base, size); } gettimeofday(&end, NULL); igt_info("Time to clear %dk through a cached WC map: %7.3fµs\n", size/1024, elapsed(&start, &end, loop)); } /* mmap read */ gettimeofday(&start, NULL); for (loop = 0; loop < 1000; loop++) { uint32_t *base = gem_mmap__gtt(fd, handle, size, PROT_READ | PROT_WRITE); volatile uint32_t *ptr = base; int x = 0; for (i = 0; i < size/sizeof(*ptr); i++) x += ptr[i]; /* force overtly clever gcc to actually compute x */ ptr[0] = x; munmap(base, size); } gettimeofday(&end, NULL); igt_info("Time to read %dk (again) through a GTT map: %7.3fµs\n", size/1024, elapsed(&start, &end, loop)); if (tiling == I915_TILING_NONE) { /* GTT pwrite */ gettimeofday(&start, NULL); for (loop = 0; loop < 1000; loop++) gem_write(fd, handle, 0, buf, size); gettimeofday(&end, NULL); igt_info("Time to pwrite %dk through the GTT: %7.3fµs\n", size/1024, elapsed(&start, &end, loop)); /* GTT pread */ gettimeofday(&start, NULL); for (loop = 0; loop < 1000; loop++) gem_read(fd, handle, 0, buf, size); gettimeofday(&end, NULL); igt_info("Time to pread %dk through the GTT: %7.3fµs\n", size/1024, elapsed(&start, &end, loop)); /* GTT pwrite, including clflush */ gettimeofday(&start, NULL); for (loop = 0; loop < 1000; loop++) { gem_write(fd, handle, 0, buf, size); gem_sync(fd, handle); } gettimeofday(&end, NULL); igt_info("Time to pwrite %dk through the GTT (clflush): %7.3fµs\n", size/1024, elapsed(&start, &end, loop)); /* GTT pread, including clflush */ gettimeofday(&start, NULL); for (loop = 0; loop < 1000; loop++) { gem_sync(fd, handle); gem_read(fd, handle, 0, buf, size); } gettimeofday(&end, NULL); igt_info("Time to pread %dk through the GTT (clflush): %7.3fµs\n", size/1024, elapsed(&start, &end, loop)); /* partial writes */ igt_info("Now partial writes.\n"); size /= 4; /* partial GTT pwrite, including clflush */ gettimeofday(&start, NULL); for (loop = 0; loop < 1000; loop++) { gem_write(fd, handle, 0, buf, size); gem_sync(fd, handle); } gettimeofday(&end, NULL); igt_info("Time to pwrite %dk through the GTT (clflush): %7.3fµs\n", size/1024, elapsed(&start, &end, loop)); /* partial GTT pread, including clflush */ gettimeofday(&start, NULL); for (loop = 0; loop < 1000; loop++) { gem_sync(fd, handle); gem_read(fd, handle, 0, buf, size); } gettimeofday(&end, NULL); igt_info("Time to pread %dk through the GTT (clflush): %7.3fµs\n", size/1024, elapsed(&start, &end, loop)); size *= 4; } } gem_close(fd, handle); close(fd); igt_exit(); } intel-gpu-tools-1.14/tests/debugfs_emon_crash0000755000175000017500000000055712665336131016344 00000000000000#!/bin/bash # # This check if we can crash the kernel with segmentation-fault # by reading /sys/kernel/debug/dri/0/i915_emon_status too quickly # SOURCE_DIR="$( dirname "${BASH_SOURCE[0]}" )" . $SOURCE_DIR/drm_lib.sh for z in $(seq 1 1000); do cat $i915_dfs_path/i915_emon_status > /dev/null 2&>1 done # If we got here, we haven't crashed exit $IGT_EXIT_SUCCESS intel-gpu-tools-1.14/tests/kms_3d.c0000644000175000017500000000675512665336131014133 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include "igt.h" IGT_TEST_DESCRIPTION("Tests 3D mode setting."); igt_simple_main { int drm_fd; drmModeRes *res; drmModeConnector *connector; unsigned char *edid; size_t length; int mode_count, connector_id; drm_fd = drm_open_driver_master(DRIVER_INTEL); res = drmModeGetResources(drm_fd); igt_assert(drmSetClientCap(drm_fd, DRM_CLIENT_CAP_STEREO_3D, 1) >= 0); /* find an hdmi connector */ for (int i = 0; i < res->count_connectors; i++) { connector = drmModeGetConnectorCurrent(drm_fd, res->connectors[i]); if (connector->connector_type == DRM_MODE_CONNECTOR_HDMIA && connector->connection == DRM_MODE_DISCONNECTED) break; drmModeFreeConnector(connector); connector = NULL; } igt_require(connector); kmstest_edid_add_3d(igt_kms_get_base_edid(), EDID_LENGTH, &edid, &length); kmstest_force_edid(drm_fd, connector, edid, length); if (!kmstest_force_connector(drm_fd, connector, FORCE_CONNECTOR_ON)) igt_skip("Could not force connector on\n"); connector_id = connector->connector_id; /* check for 3D modes */ mode_count = 0; connector = drmModeGetConnectorCurrent(drm_fd, connector_id); for (int i = 0; i < connector->count_modes; i++) { if (connector->modes[i].flags & DRM_MODE_FLAG_3D_MASK) mode_count++; } igt_assert_eq(mode_count, 13); /* set 3D modes */ igt_info("Testing:\n"); for (int i = 0; i < connector->count_modes; i++) { int fb_id; struct kmstest_connector_config config; int crtc_mask = -1; int ret; if (!(connector->modes[i].flags & DRM_MODE_FLAG_3D_MASK)) continue; /* create a configuration */ ret = kmstest_get_connector_config(drm_fd, connector_id, crtc_mask, &config); if (ret != true) { igt_info("Error creating configuration for:\n "); kmstest_dump_mode(&connector->modes[i]); continue; } igt_info(" "); kmstest_dump_mode(&connector->modes[i]); /* create stereo framebuffer */ fb_id = igt_create_stereo_fb(drm_fd, &connector->modes[i], igt_bpp_depth_to_drm_format(32, 24), LOCAL_DRM_FORMAT_MOD_NONE); ret = drmModeSetCrtc(drm_fd, config.crtc->crtc_id, fb_id, 0, 0, &connector->connector_id, 1, &connector->modes[i]); igt_assert(ret == 0); } kmstest_force_connector(drm_fd, connector, FORCE_CONNECTOR_UNSPECIFIED); kmstest_force_edid(drm_fd, connector, NULL, 0); drmModeFreeConnector(connector); free(edid); } intel-gpu-tools-1.14/tests/gen3_render_mixed_blits.c0000644000175000017500000002676312665336131017532 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ /** @file gen3_linear_render_blits.c * * This is a test of doing many blits, with a working set * larger than the aperture size. * * The goal is to simply ensure the basics work. */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include "drm.h" #include "i915_reg.h" #define WIDTH 512 #define HEIGHT 512 static inline uint32_t pack_float(float f) { union { uint32_t dw; float f; } u; u.f = f; return u.dw; } static uint32_t fill_reloc(struct drm_i915_gem_relocation_entry *reloc, uint32_t offset, uint32_t handle, uint32_t read_domain, uint32_t write_domain) { reloc->target_handle = handle; reloc->delta = 0; reloc->offset = offset * sizeof(uint32_t); reloc->presumed_offset = 0; reloc->read_domains = read_domain; reloc->write_domain = write_domain; return reloc->presumed_offset + reloc->delta; } static void copy(int fd, uint32_t dst, int dst_tiling, uint32_t src, int src_tiling) { uint32_t batch[1024], *b = batch; struct drm_i915_gem_relocation_entry reloc[2], *r = reloc; struct drm_i915_gem_exec_object2 obj[3]; struct drm_i915_gem_execbuffer2 exec; uint32_t handle; uint32_t tiling_bits; int ret; /* invariant state */ *b++ = (_3DSTATE_AA_CMD | AA_LINE_ECAAR_WIDTH_ENABLE | AA_LINE_ECAAR_WIDTH_1_0 | AA_LINE_REGION_WIDTH_ENABLE | AA_LINE_REGION_WIDTH_1_0); *b++ = (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD | IAB_MODIFY_ENABLE | IAB_MODIFY_FUNC | (BLENDFUNC_ADD << IAB_FUNC_SHIFT) | IAB_MODIFY_SRC_FACTOR | (BLENDFACT_ONE << IAB_SRC_FACTOR_SHIFT) | IAB_MODIFY_DST_FACTOR | (BLENDFACT_ZERO << IAB_DST_FACTOR_SHIFT)); *b++ = (_3DSTATE_DFLT_DIFFUSE_CMD); *b++ = (0); *b++ = (_3DSTATE_DFLT_SPEC_CMD); *b++ = (0); *b++ = (_3DSTATE_DFLT_Z_CMD); *b++ = (0); *b++ = (_3DSTATE_COORD_SET_BINDINGS | CSB_TCB(0, 0) | CSB_TCB(1, 1) | CSB_TCB(2, 2) | CSB_TCB(3, 3) | CSB_TCB(4, 4) | CSB_TCB(5, 5) | CSB_TCB(6, 6) | CSB_TCB(7, 7)); *b++ = (_3DSTATE_RASTER_RULES_CMD | ENABLE_POINT_RASTER_RULE | OGL_POINT_RASTER_RULE | ENABLE_LINE_STRIP_PROVOKE_VRTX | ENABLE_TRI_FAN_PROVOKE_VRTX | LINE_STRIP_PROVOKE_VRTX(1) | TRI_FAN_PROVOKE_VRTX(2) | ENABLE_TEXKILL_3D_4D | TEXKILL_4D); *b++ = (_3DSTATE_MODES_4_CMD | ENABLE_LOGIC_OP_FUNC | LOGIC_OP_FUNC(LOGICOP_COPY) | ENABLE_STENCIL_WRITE_MASK | STENCIL_WRITE_MASK(0xff) | ENABLE_STENCIL_TEST_MASK | STENCIL_TEST_MASK(0xff)); *b++ = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | I1_LOAD_S(4) | I1_LOAD_S(5) | 2); *b++ = (0x00000000); /* Disable texture coordinate wrap-shortest */ *b++ = ((1 << S4_POINT_WIDTH_SHIFT) | S4_LINE_WIDTH_ONE | S4_CULLMODE_NONE | S4_VFMT_XY); *b++ = (0x00000000); /* Stencil. */ *b++ = (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT); *b++ = (_3DSTATE_SCISSOR_RECT_0_CMD); *b++ = (0); *b++ = (0); *b++ = (_3DSTATE_DEPTH_SUBRECT_DISABLE); *b++ = (_3DSTATE_LOAD_INDIRECT | 0); /* disable indirect state */ *b++ = (0); *b++ = (_3DSTATE_STIPPLE); *b++ = (0x00000000); *b++ = (_3DSTATE_BACKFACE_STENCIL_OPS | BFO_ENABLE_STENCIL_TWO_SIDE | 0); /* samler state */ tiling_bits = 0; if (src_tiling != I915_TILING_NONE) tiling_bits = MS3_TILED_SURFACE; if (src_tiling == I915_TILING_Y) tiling_bits |= MS3_TILE_WALK; #define TEX_COUNT 1 *b++ = (_3DSTATE_MAP_STATE | (3 * TEX_COUNT)); *b++ = ((1 << TEX_COUNT) - 1); *b = fill_reloc(r++, b-batch, src, I915_GEM_DOMAIN_SAMPLER, 0); b++; *b++ = (MAPSURF_32BIT | MT_32BIT_ARGB8888 | tiling_bits | (HEIGHT - 1) << MS3_HEIGHT_SHIFT | (WIDTH - 1) << MS3_WIDTH_SHIFT); *b++ = ((WIDTH-1) << MS4_PITCH_SHIFT); *b++ = (_3DSTATE_SAMPLER_STATE | (3 * TEX_COUNT)); *b++ = ((1 << TEX_COUNT) - 1); *b++ = (MIPFILTER_NONE << SS2_MIP_FILTER_SHIFT | FILTER_NEAREST << SS2_MAG_FILTER_SHIFT | FILTER_NEAREST << SS2_MIN_FILTER_SHIFT); *b++ = (TEXCOORDMODE_WRAP << SS3_TCX_ADDR_MODE_SHIFT | TEXCOORDMODE_WRAP << SS3_TCY_ADDR_MODE_SHIFT | 0 << SS3_TEXTUREMAP_INDEX_SHIFT); *b++ = (0x00000000); /* render target state */ tiling_bits = 0; if (dst_tiling != I915_TILING_NONE) tiling_bits = BUF_3D_TILED_SURFACE; if (dst_tiling == I915_TILING_Y) tiling_bits |= BUF_3D_TILE_WALK_Y; *b++ = (_3DSTATE_BUF_INFO_CMD); *b++ = (BUF_3D_ID_COLOR_BACK | tiling_bits | WIDTH*4); *b = fill_reloc(r++, b-batch, dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER); b++; *b++ = (_3DSTATE_DST_BUF_VARS_CMD); *b++ = (COLR_BUF_ARGB8888 | DSTORG_HORT_BIAS(0x8) | DSTORG_VERT_BIAS(0x8)); /* draw rect is unconditional */ *b++ = (_3DSTATE_DRAW_RECT_CMD); *b++ = (0x00000000); *b++ = (0x00000000); /* ymin, xmin */ *b++ = (DRAW_YMAX(HEIGHT - 1) | DRAW_XMAX(WIDTH - 1)); /* yorig, xorig (relate to color buffer?) */ *b++ = (0x00000000); /* texfmt */ *b++ = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(1) | I1_LOAD_S(2) | I1_LOAD_S(6) | 2); *b++ = ((4 << S1_VERTEX_WIDTH_SHIFT) | (4 << S1_VERTEX_PITCH_SHIFT)); *b++ = (~S2_TEXCOORD_FMT(0, TEXCOORDFMT_NOT_PRESENT) | S2_TEXCOORD_FMT(0, TEXCOORDFMT_2D)); *b++ = (S6_CBUF_BLEND_ENABLE | S6_COLOR_WRITE_ENABLE | BLENDFUNC_ADD << S6_CBUF_BLEND_FUNC_SHIFT | BLENDFACT_ONE << S6_CBUF_SRC_BLEND_FACT_SHIFT | BLENDFACT_ZERO << S6_CBUF_DST_BLEND_FACT_SHIFT); /* pixel shader */ *b++ = (_3DSTATE_PIXEL_SHADER_PROGRAM | (1 + 3*3 - 2)); /* decl FS_T0 */ *b++ = (D0_DCL | REG_TYPE(FS_T0) << D0_TYPE_SHIFT | REG_NR(FS_T0) << D0_NR_SHIFT | ((REG_TYPE(FS_T0) != REG_TYPE_S) ? D0_CHANNEL_ALL : 0)); *b++ = (0); *b++ = (0); /* decl FS_S0 */ *b++ = (D0_DCL | (REG_TYPE(FS_S0) << D0_TYPE_SHIFT) | (REG_NR(FS_S0) << D0_NR_SHIFT) | ((REG_TYPE(FS_S0) != REG_TYPE_S) ? D0_CHANNEL_ALL : 0)); *b++ = (0); *b++ = (0); /* texld(FS_OC, FS_S0, FS_T0 */ *b++ = (T0_TEXLD | (REG_TYPE(FS_OC) << T0_DEST_TYPE_SHIFT) | (REG_NR(FS_OC) << T0_DEST_NR_SHIFT) | (REG_NR(FS_S0) << T0_SAMPLER_NR_SHIFT)); *b++ = ((REG_TYPE(FS_T0) << T1_ADDRESS_REG_TYPE_SHIFT) | (REG_NR(FS_T0) << T1_ADDRESS_REG_NR_SHIFT)); *b++ = (0); *b++ = (PRIM3D_RECTLIST | (3*4 - 1)); *b++ = pack_float(WIDTH); *b++ = pack_float(HEIGHT); *b++ = pack_float(WIDTH); *b++ = pack_float(HEIGHT); *b++ = pack_float(0); *b++ = pack_float(HEIGHT); *b++ = pack_float(0); *b++ = pack_float(HEIGHT); *b++ = pack_float(0); *b++ = pack_float(0); *b++ = pack_float(0); *b++ = pack_float(0); *b++ = MI_BATCH_BUFFER_END; if ((b - batch) & 1) *b++ = 0; igt_assert(b - batch <= 1024); handle = gem_create(fd, 4096); gem_write(fd, handle, 0, batch, (b-batch)*sizeof(batch[0])); igt_assert(r-reloc == 2); obj[0].handle = dst; obj[0].relocation_count = 0; obj[0].relocs_ptr = 0; obj[0].alignment = 0; obj[0].offset = 0; obj[0].flags = 0; obj[0].rsvd1 = 0; obj[0].rsvd2 = 0; obj[1].handle = src; obj[1].relocation_count = 0; obj[1].relocs_ptr = 0; obj[1].alignment = 0; obj[1].offset = 0; obj[1].flags = 0; obj[1].rsvd1 = 0; obj[1].rsvd2 = 0; obj[2].handle = handle; obj[2].relocation_count = 2; obj[2].relocs_ptr = (uintptr_t)reloc; obj[2].alignment = 0; obj[2].offset = 0; obj[2].flags = 0; obj[2].rsvd1 = obj[2].rsvd2 = 0; exec.buffers_ptr = (uintptr_t)obj; exec.buffer_count = 3; exec.batch_start_offset = 0; exec.batch_len = (b-batch)*sizeof(batch[0]); exec.DR1 = exec.DR4 = 0; exec.num_cliprects = 0; exec.cliprects_ptr = 0; exec.flags = 0; i915_execbuffer2_set_context_id(exec, 0); exec.rsvd2 = 0; ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &exec); while (ret && errno == EBUSY) { drmCommandNone(fd, DRM_I915_GEM_THROTTLE); ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &exec); } igt_assert_eq(ret, 0); gem_close(fd, handle); } static uint32_t create_bo(int fd, uint32_t val, int tiling) { uint32_t handle; uint32_t *v; int i; handle = gem_create(fd, WIDTH*HEIGHT*4); gem_set_tiling(fd, handle, tiling, WIDTH*4); /* Fill the BO with dwords starting at val */ v = gem_mmap__gtt(fd, handle, WIDTH * HEIGHT * 4, PROT_READ | PROT_WRITE); for (i = 0; i < WIDTH*HEIGHT; i++) v[i] = val++; munmap(v, WIDTH*HEIGHT*4); return handle; } static void check_bo(int fd, uint32_t handle, uint32_t val) { uint32_t *v; int i; v = gem_mmap__gtt(fd, handle, WIDTH * HEIGHT * 4, PROT_READ); for (i = 0; i < WIDTH*HEIGHT; i++) { igt_assert_f(v[i] == val, "Expected 0x%08x, found 0x%08x " "at offset 0x%08x\n", val, v[i], i * 4); val++; } munmap(v, WIDTH*HEIGHT*4); } int main(int argc, char **argv) { uint32_t *handle, *tiling, *start_val; uint32_t start = 0; int i, fd, count; igt_simple_init(argc, argv); fd = drm_open_driver(DRIVER_INTEL); igt_require(IS_GEN3(intel_get_drm_devid(fd))); count = 0; if (argc > 1) count = atoi(argv[1]); if (count == 0) count = 3 * gem_aperture_size(fd) / (1024*1024) / 2; igt_info("Using %d 1MiB buffers\n", count); handle = malloc(sizeof(uint32_t)*count*3); tiling = handle + count; start_val = tiling + count; for (i = 0; i < count; i++) { handle[i] = create_bo(fd, start, tiling[i] = i % 3); start_val[i] = start; start += 1024 * 1024 / 4; } igt_info("Verifying initialisation..."); fflush(stdout); for (i = 0; i < count; i++) check_bo(fd, handle[i], start_val[i]); igt_info("done\n"); igt_info("Cyclic blits, forward..."); fflush(stdout); for (i = 0; i < count * 32; i++) { int src = i % count; int dst = (i + 1) % count; copy(fd, handle[dst], tiling[dst], handle[src], tiling[src]); start_val[dst] = start_val[src]; } igt_info("verifying..."); fflush(stdout); for (i = 0; i < count; i++) check_bo(fd, handle[i], start_val[i]); igt_info("done\n"); igt_info("Cyclic blits, backward..."); fflush(stdout); for (i = 0; i < count * 32; i++) { int src = (i + 1) % count; int dst = i % count; copy(fd, handle[dst], tiling[dst], handle[src], tiling[src]); start_val[dst] = start_val[src]; } igt_info("verifying..."); fflush(stdout); for (i = 0; i < count; i++) check_bo(fd, handle[i], start_val[i]); igt_info("done\n"); igt_info("Random blits..."); fflush(stdout); for (i = 0; i < count * 32; i++) { int src = random() % count; int dst = random() % count; while (src == dst) dst = random() % count; copy(fd, handle[dst], tiling[dst], handle[src], tiling[src]); start_val[dst] = start_val[src]; } igt_info("verifying..."); fflush(stdout); for (i = 0; i < count; i++) check_bo(fd, handle[i], start_val[i]); igt_info("done\n"); igt_exit(); } intel-gpu-tools-1.14/tests/gem_exec_lut_handle.c0000644000175000017500000001667612665336131016731 00000000000000/* * Copyright © 2012 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ /* Exercises the basic execbuffer using the handle LUT interface */ #include "igt.h" #include #include #include #include #include #include #include #include #include "drm.h" IGT_TEST_DESCRIPTION("Exercises the basic execbuffer using the handle LUT" " interface."); #define BATCH_SIZE (1024*1024) #define LOCAL_I915_EXEC_NO_RELOC (1<<11) #define LOCAL_I915_EXEC_HANDLE_LUT (1<<12) #define MAX_NUM_EXEC 2048 #define MAX_NUM_RELOC 4096 #define SKIP_RELOC 0x1 #define NO_RELOC 0x2 #define CYCLE_BATCH 0x4 #define FAULT 0x8 int target[MAX_NUM_RELOC]; struct drm_i915_gem_exec_object2 gem_exec[MAX_NUM_EXEC+1]; struct drm_i915_gem_relocation_entry mem_reloc[MAX_NUM_RELOC]; static uint32_t state = 0x12345678; static uint32_t hars_petruska_f54_1_random (void) { #define rol(x,k) ((x << k) | (x >> (32-k))) return state = (state ^ rol (state, 5) ^ rol (state, 24)) + 0x37798849; #undef rol } static int has_exec_lut(int fd) { struct drm_i915_gem_execbuffer2 execbuf; memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)(gem_exec + MAX_NUM_EXEC); execbuf.buffer_count = 1; execbuf.flags = LOCAL_I915_EXEC_HANDLE_LUT; return drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf) == 0; } #define ELAPSED(a,b) (1e6*((b)->tv_sec - (a)->tv_sec) + ((b)->tv_usec - (a)->tv_usec)) igt_simple_main { uint32_t batch[2] = {MI_BATCH_BUFFER_END}; uint32_t cycle[16]; int fd, n, m, count, c; const struct { const char *name; unsigned int flags; } pass[] = { { .name = "relocation", .flags = 0 }, { .name = "cycle-relocation", .flags = CYCLE_BATCH }, { .name = "fault-relocation", .flags = FAULT }, { .name = "skip-relocs", .flags = SKIP_RELOC }, { .name = "no-relocs", .flags = SKIP_RELOC | NO_RELOC }, { .name = NULL }, }, *p; struct drm_i915_gem_relocation_entry *reloc; uint32_t reloc_handle; int size; igt_skip_on_simulation(); fd = drm_open_driver(DRIVER_INTEL); memset(gem_exec, 0, sizeof(gem_exec)); for (n = 0; n < MAX_NUM_EXEC; n++) gem_exec[n].handle = gem_create(fd, 4096); for (n = 0; n < 16; n++) { cycle[n] = gem_create(fd, 4096); gem_write(fd, cycle[n], 0, batch, sizeof(batch)); } gem_exec[MAX_NUM_EXEC].handle = cycle[0]; memset(mem_reloc, 0, sizeof(mem_reloc)); for (n = 0; n < MAX_NUM_RELOC; n++) { mem_reloc[n].offset = 1024; mem_reloc[n].read_domains = I915_GEM_DOMAIN_RENDER; } size = ALIGN(sizeof(mem_reloc), 4096); reloc_handle = gem_create(fd, size); reloc = gem_mmap__cpu(fd, reloc_handle, 0, size, PROT_READ | PROT_WRITE); for (n = 0; n < MAX_NUM_RELOC; n++) { reloc[n].offset = 1024; reloc[n].read_domains = I915_GEM_DOMAIN_RENDER; } munmap(reloc, size); igt_require(has_exec_lut(fd)); for (p = pass; p->name != NULL; p++) { if (p->flags & FAULT) igt_disable_prefault(); for (n = 1; n <= MAX_NUM_EXEC; n *= 2) { double elapsed[16][2]; double s_x, s_y, s_xx, s_xy; double A, B; int i, j; for (i = 0, m = 1; m <= MAX_NUM_RELOC; m *= 2, i++) { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 *objects; struct timeval start, end; if (p->flags & FAULT) reloc = __gem_mmap__cpu(fd, reloc_handle, 0, size, PROT_READ | PROT_WRITE); else reloc = mem_reloc; gem_exec[MAX_NUM_EXEC].relocation_count = m; gem_exec[MAX_NUM_EXEC].relocs_ptr = (uintptr_t)reloc; objects = gem_exec + MAX_NUM_EXEC - n; memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)objects; execbuf.buffer_count = n + 1; execbuf.flags = LOCAL_I915_EXEC_HANDLE_LUT; if (p->flags & NO_RELOC) execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC; for (j = 0; j < m; j++) { target[j] = hars_petruska_f54_1_random() % n; reloc[j].target_handle = target[j]; reloc[j].presumed_offset = 0; } gem_execbuf(fd,&execbuf); gettimeofday(&start, NULL); for (count = 0; count < 1000; count++) { if ((p->flags & SKIP_RELOC) == 0) { for (j = 0; j < m; j++) reloc[j].presumed_offset = 0; if (p->flags & CYCLE_BATCH) { c = (c + 1) % 16; gem_exec[MAX_NUM_EXEC].handle = cycle[c]; } } if (p->flags & FAULT) { munmap(reloc, size); reloc = __gem_mmap__cpu(fd, reloc_handle, 0, size, PROT_READ | PROT_WRITE); gem_exec[MAX_NUM_EXEC].relocs_ptr = (uintptr_t)reloc; } gem_execbuf(fd, &execbuf); } gettimeofday(&end, NULL); c = 16; do gem_sync(fd, cycle[--c]); while (c != 0); gem_exec[MAX_NUM_EXEC].handle = cycle[c]; elapsed[i][1] = ELAPSED(&start, &end); execbuf.flags &= ~LOCAL_I915_EXEC_HANDLE_LUT; for (j = 0; j < m; j++) reloc[j].target_handle = objects[target[j]].handle; gem_execbuf(fd,&execbuf); gettimeofday(&start, NULL); for (count = 0; count < 1000; count++) { if ((p->flags & SKIP_RELOC) == 0) { for (j = 0; j < m; j++) reloc[j].presumed_offset = 0; if (p->flags & CYCLE_BATCH) { c = (c + 1) % 16; gem_exec[MAX_NUM_EXEC].handle = cycle[c]; } } if (p->flags & FAULT) { munmap(reloc, size); reloc = __gem_mmap__cpu(fd, reloc_handle, 0, size, PROT_READ | PROT_WRITE); gem_exec[MAX_NUM_EXEC].relocs_ptr = (uintptr_t)reloc; } gem_execbuf(fd, &execbuf); } gettimeofday(&end, NULL); c = 16; do gem_sync(fd, cycle[--c]); while (c != 0); gem_exec[MAX_NUM_EXEC].handle = cycle[c]; elapsed[i][0] = ELAPSED(&start, &end); if (p->flags & FAULT) munmap(reloc, size); } igt_info("%s: buffers=%4d:", p->name, n); s_x = s_y = s_xx = s_xy = 0; for (j = 0; j < i; j++) { int k = 1 << j; s_x += k; s_y += elapsed[j][0]; s_xx += k * k; s_xy += k * elapsed[j][0]; } B = (s_xy - s_x * s_y / j) / (s_xx - s_x * s_x / j); A = s_y / j - B * s_x / j; igt_info(" old=%7.0f + %.1f*reloc,", A, B); s_x = s_y = s_xx = s_xy = 0; for (j = 0; j < i; j++) { int k = 1 << j; s_x += k; s_y += elapsed[j][1]; s_xx += k * k; s_xy += k * elapsed[j][1]; } B = (s_xy - s_x * s_y / j) / (s_xx - s_x * s_x / j); A = s_y / j - B * s_x / j; igt_info(" lut=%7.0f + %.1f*reloc (ns)", A, B); igt_info("\n"); } if (p->flags & FAULT) igt_enable_prefault(); } } intel-gpu-tools-1.14/tests/kms_universal_plane.c0000644000175000017500000005715612665336131017015 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ #include "igt.h" #include #include #include #include typedef struct { int drm_fd; igt_display_t display; int gen; } data_t; typedef struct { data_t *data; igt_pipe_crc_t *pipe_crc; igt_crc_t crc_1, crc_2, crc_3, crc_4, crc_5, crc_6, crc_7, crc_8, crc_9, crc_10; struct igt_fb red_fb, blue_fb, black_fb, yellow_fb; drmModeModeInfo *mode; } functional_test_t; typedef struct { data_t *data; drmModeResPtr moderes; struct igt_fb blue_fb, oversized_fb, undersized_fb; } sanity_test_t; typedef struct { data_t *data; struct igt_fb red_fb, blue_fb; } pageflip_test_t; typedef struct { data_t *data; int x, y; int w, h; struct igt_fb biggreen_fb, smallred_fb, smallblue_fb; } gen9_test_t; static void functional_test_init(functional_test_t *test, igt_output_t *output, enum pipe pipe) { data_t *data = test->data; drmModeModeInfo *mode; test->pipe_crc = igt_pipe_crc_new(pipe, INTEL_PIPE_CRC_SOURCE_AUTO); igt_output_set_pipe(output, pipe); mode = igt_output_get_mode(output); igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, 0.0, 0.0, 0.0, &test->black_fb); igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, 0.0, 0.0, 1.0, &test->blue_fb); igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, 1.0, 1.0, 0.0, &test->yellow_fb); igt_create_color_fb(data->drm_fd, 100, 100, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, 1.0, 0.0, 0.0, &test->red_fb); test->mode = mode; } static void functional_test_fini(functional_test_t *test, igt_output_t *output) { igt_pipe_crc_free(test->pipe_crc); igt_remove_fb(test->data->drm_fd, &test->black_fb); igt_remove_fb(test->data->drm_fd, &test->blue_fb); igt_remove_fb(test->data->drm_fd, &test->red_fb); igt_remove_fb(test->data->drm_fd, &test->yellow_fb); igt_output_set_pipe(output, PIPE_ANY); igt_display_commit2(&test->data->display, COMMIT_LEGACY); } /* * Universal plane functional testing. * - Black primary plane via traditional interfaces, red sprite, grab CRC:1. * - Blue primary plane via traditional interfaces, red sprite, grab CRC:2. * - Yellow primary via traditional interfaces * - Blue primary plane, red sprite via universal planes, grab CRC:3 and compare * with CRC:2 (should be the same) * - Disable primary plane, grab CRC:4 (should be same as CRC:1) * - Reenable primary, grab CRC:5 (should be same as CRC:2 and CRC:3) * - Yellow primary, no sprite * - Disable CRTC * - Program red sprite (while CRTC off) * - Program blue primary (while CRTC off) * - Enable CRTC, grab CRC:6 (should be same as CRC:2) */ static void functional_test_pipe(data_t *data, enum pipe pipe, igt_output_t *output) { functional_test_t test = { .data = data }; igt_display_t *display = &data->display; igt_plane_t *primary, *sprite; int num_primary = 0, num_cursor = 0; int i; igt_assert(data->display.has_universal_planes); igt_skip_on(pipe >= display->n_pipes); igt_info("Testing connector %s using pipe %s\n", igt_output_name(output), kmstest_pipe_name(pipe)); functional_test_init(&test, output, pipe); /* * Make sure we have no more than one primary or cursor plane per crtc. * If the kernel accidentally calls drm_plane_init() rather than * drm_universal_plane_init(), the type enum can get interpreted as a * boolean and show up in userspace as the wrong type. */ for (i = 0; i < display->pipes[pipe].n_planes; i++) if (display->pipes[pipe].planes[i].is_primary) num_primary++; else if (display->pipes[pipe].planes[i].is_cursor) num_cursor++; igt_assert_eq(num_primary, 1); igt_assert_lte(num_cursor, 1); primary = igt_output_get_plane(output, IGT_PLANE_PRIMARY); sprite = igt_output_get_plane(output, IGT_PLANE_2); if (!sprite) { functional_test_fini(&test, output); igt_skip("No sprite plane available\n"); } igt_plane_set_position(sprite, 100, 100); /* Step 1: Legacy API's, black primary, red sprite (CRC 1) */ igt_plane_set_fb(primary, &test.black_fb); igt_plane_set_fb(sprite, &test.red_fb); igt_display_commit2(display, COMMIT_LEGACY); igt_pipe_crc_collect_crc(test.pipe_crc, &test.crc_1); /* Step 2: Legacy API', blue primary, red sprite (CRC 2) */ igt_plane_set_fb(primary, &test.blue_fb); igt_plane_set_fb(sprite, &test.red_fb); igt_display_commit2(display, COMMIT_LEGACY); igt_pipe_crc_collect_crc(test.pipe_crc, &test.crc_2); /* Step 3: Legacy API's, yellow primary (CRC 3) */ igt_plane_set_fb(primary, &test.yellow_fb); igt_display_commit2(display, COMMIT_LEGACY); igt_pipe_crc_collect_crc(test.pipe_crc, &test.crc_3); /* Step 4: Universal API's, blue primary, red sprite (CRC 4) */ igt_plane_set_fb(primary, &test.blue_fb); igt_plane_set_fb(sprite, &test.red_fb); igt_display_commit2(display, COMMIT_UNIVERSAL); igt_pipe_crc_collect_crc(test.pipe_crc, &test.crc_4); /* Step 5: Universal API's, disable primary plane (CRC 5) */ igt_plane_set_fb(primary, NULL); igt_display_commit2(display, COMMIT_UNIVERSAL); igt_pipe_crc_collect_crc(test.pipe_crc, &test.crc_5); /* Step 6: Universal API's, re-enable primary with blue (CRC 6) */ igt_plane_set_fb(primary, &test.blue_fb); igt_display_commit2(display, COMMIT_UNIVERSAL); igt_pipe_crc_collect_crc(test.pipe_crc, &test.crc_6); /* Step 7: Legacy API's, yellow primary, no sprite */ igt_plane_set_fb(primary, &test.yellow_fb); igt_plane_set_fb(sprite, NULL); igt_display_commit2(display, COMMIT_LEGACY); /* Step 8: Disable CRTC */ igt_plane_set_fb(primary, NULL); igt_display_commit2(display, COMMIT_LEGACY); /* Step 9: Universal API's with crtc off: * - red sprite * - multiple primary fb's, ending in blue */ igt_plane_set_fb(sprite, &test.red_fb); igt_display_commit2(display, COMMIT_UNIVERSAL); igt_plane_set_fb(primary, &test.yellow_fb); igt_display_commit2(display, COMMIT_UNIVERSAL); igt_plane_set_fb(primary, &test.black_fb); igt_display_commit2(display, COMMIT_UNIVERSAL); igt_plane_set_fb(primary, &test.blue_fb); igt_display_commit2(display, COMMIT_UNIVERSAL); /* Step 10: Enable crtc (fb = -1), take CRC (CRC 7) */ igt_assert(drmModeSetCrtc(data->drm_fd, output->config.crtc->crtc_id, -1, 0, 0, &output->config.connector->connector_id, 1, test.mode) == 0); igt_pipe_crc_collect_crc(test.pipe_crc, &test.crc_7); /* Step 11: Disable primary plane */ igt_plane_set_fb(primary, NULL); igt_display_commit2(display, COMMIT_UNIVERSAL); /* Step 12: Legacy modeset to yellow FB (CRC 8) */ igt_plane_set_fb(primary, &test.yellow_fb); igt_display_commit2(display, COMMIT_LEGACY); igt_pipe_crc_collect_crc(test.pipe_crc, &test.crc_8); /* Step 13: Legacy API', blue primary, red sprite */ igt_plane_set_fb(primary, &test.blue_fb); igt_plane_set_fb(sprite, &test.red_fb); igt_display_commit2(display, COMMIT_LEGACY); /* Step 14: Universal API, set primary completely offscreen (CRC 9) */ igt_assert(drmModeSetPlane(data->drm_fd, primary->drm_plane->plane_id, output->config.crtc->crtc_id, test.blue_fb.fb_id, 0, 9000, 9000, test.mode->hdisplay, test.mode->vdisplay, IGT_FIXED(0,0), IGT_FIXED(0,0), IGT_FIXED(test.mode->hdisplay,0), IGT_FIXED(test.mode->vdisplay,0)) == 0); igt_pipe_crc_collect_crc(test.pipe_crc, &test.crc_9); /* * Step 15: Explicitly disable primary after it's already been * implicitly disabled (CRC 10). */ igt_plane_set_fb(primary, NULL); igt_display_commit2(display, COMMIT_UNIVERSAL); igt_pipe_crc_collect_crc(test.pipe_crc, &test.crc_10); /* Step 16: Legacy API's, blue primary, red sprite */ igt_plane_set_fb(primary, &test.blue_fb); igt_plane_set_fb(sprite, &test.red_fb); igt_display_commit2(display, COMMIT_LEGACY); /* Blue bg + red sprite should be same under both types of API's */ igt_assert_crc_equal(&test.crc_2, &test.crc_4); /* Disabling primary plane should be same as black primary */ igt_assert_crc_equal(&test.crc_1, &test.crc_5); /* Re-enabling primary should return to blue properly */ igt_assert_crc_equal(&test.crc_2, &test.crc_6); /* * We should be able to setup plane FB's while CRTC is disabled and * then have them pop up correctly when the CRTC is re-enabled. */ igt_assert_crc_equal(&test.crc_2, &test.crc_7); /* * We should be able to modeset with the primary plane off * successfully */ igt_assert_crc_equal(&test.crc_3, &test.crc_8); /* * We should be able to move the primary plane completely offscreen * and have it disable successfully. */ igt_assert_crc_equal(&test.crc_5, &test.crc_9); /* * We should be able to explicitly disable an already * implicitly-disabled primary plane */ igt_assert_crc_equal(&test.crc_5, &test.crc_10); igt_plane_set_fb(primary, NULL); igt_plane_set_fb(sprite, NULL); functional_test_fini(&test, output); } static void sanity_test_init(sanity_test_t *test, igt_output_t *output, enum pipe pipe) { data_t *data = test->data; drmModeModeInfo *mode; igt_output_set_pipe(output, pipe); mode = igt_output_get_mode(output); igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, 0.0, 0.0, 1.0, &test->blue_fb); igt_create_color_fb(data->drm_fd, mode->hdisplay + 100, mode->vdisplay + 100, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, 0.0, 0.0, 1.0, &test->oversized_fb); igt_create_color_fb(data->drm_fd, mode->hdisplay - 100, mode->vdisplay - 100, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, 0.0, 0.0, 1.0, &test->undersized_fb); test->moderes = drmModeGetResources(data->drm_fd); } static void sanity_test_fini(sanity_test_t *test, igt_output_t *output) { drmModeFreeResources(test->moderes); igt_remove_fb(test->data->drm_fd, &test->oversized_fb); igt_remove_fb(test->data->drm_fd, &test->undersized_fb); igt_remove_fb(test->data->drm_fd, &test->blue_fb); igt_output_set_pipe(output, PIPE_ANY); igt_display_commit2(&test->data->display, COMMIT_LEGACY); } /* * Universal plane sanity testing. * - Primary doesn't cover CRTC * - Primary plane tries to scale down * - Primary plane tries to scale up */ static void sanity_test_pipe(data_t *data, enum pipe pipe, igt_output_t *output) { sanity_test_t test = { .data = data }; igt_plane_t *primary; drmModeModeInfo *mode; int i; int expect; igt_skip_on(pipe >= data->display.n_pipes); igt_output_set_pipe(output, pipe); mode = igt_output_get_mode(output); sanity_test_init(&test, output, pipe); primary = igt_output_get_plane(output, IGT_PLANE_PRIMARY); /* Use legacy API to set a mode with a blue FB */ igt_plane_set_fb(primary, &test.blue_fb); igt_display_commit2(&data->display, COMMIT_LEGACY); /* * Try to use universal plane API to set primary plane that * doesn't cover CRTC (should fail on pre-gen9 and succeed on * gen9+). */ igt_plane_set_fb(primary, &test.undersized_fb); expect = (data->gen < 9) ? -EINVAL : 0; igt_assert(igt_display_try_commit2(&data->display, COMMIT_UNIVERSAL) == expect); /* Same as above, but different plane positioning. */ igt_plane_set_position(primary, 100, 100); igt_assert(igt_display_try_commit2(&data->display, COMMIT_UNIVERSAL) == expect); igt_plane_set_position(primary, 0, 0); /* Try to use universal plane API to scale down (should fail on pre-gen9) */ expect = (data->gen < 9) ? -ERANGE : 0; igt_assert(drmModeSetPlane(data->drm_fd, primary->drm_plane->plane_id, output->config.crtc->crtc_id, test.oversized_fb.fb_id, 0, 0, 0, mode->hdisplay + 100, mode->vdisplay + 100, IGT_FIXED(0,0), IGT_FIXED(0,0), IGT_FIXED(mode->hdisplay,0), IGT_FIXED(mode->vdisplay,0)) == expect); /* Try to use universal plane API to scale up (should fail on pre-gen9) */ igt_assert(drmModeSetPlane(data->drm_fd, primary->drm_plane->plane_id, output->config.crtc->crtc_id, test.oversized_fb.fb_id, 0, 0, 0, mode->hdisplay, mode->vdisplay, IGT_FIXED(0,0), IGT_FIXED(0,0), IGT_FIXED(mode->hdisplay - 100,0), IGT_FIXED(mode->vdisplay - 100,0)) == expect); /* Find other crtcs and try to program our primary plane on them */ for (i = 0; i < test.moderes->count_crtcs; i++) if (test.moderes->crtcs[i] != output->config.crtc->crtc_id) { igt_assert(drmModeSetPlane(data->drm_fd, primary->drm_plane->plane_id, test.moderes->crtcs[i], test.blue_fb.fb_id, 0, 0, 0, mode->hdisplay, mode->vdisplay, IGT_FIXED(0,0), IGT_FIXED(0,0), IGT_FIXED(mode->hdisplay,0), IGT_FIXED(mode->vdisplay,0)) == -EINVAL); } igt_plane_set_fb(primary, NULL); sanity_test_fini(&test, output); } static void pageflip_test_init(pageflip_test_t *test, igt_output_t *output, enum pipe pipe) { data_t *data = test->data; drmModeModeInfo *mode; igt_output_set_pipe(output, pipe); mode = igt_output_get_mode(output); igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, 1.0, 0.0, 0.0, &test->red_fb); igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, 0.0, 0.0, 1.0, &test->blue_fb); } static void pageflip_test_fini(pageflip_test_t *test, igt_output_t *output) { igt_remove_fb(test->data->drm_fd, &test->red_fb); igt_remove_fb(test->data->drm_fd, &test->blue_fb); igt_output_set_pipe(output, PIPE_ANY); igt_display_commit2(&test->data->display, COMMIT_LEGACY); } static void pageflip_test_pipe(data_t *data, enum pipe pipe, igt_output_t *output) { pageflip_test_t test = { .data = data }; igt_plane_t *primary; struct timeval timeout = { .tv_sec = 0, .tv_usec = 500 }; drmEventContext evctx = { .version = DRM_EVENT_CONTEXT_VERSION }; fd_set fds; int ret = 0; igt_skip_on(pipe >= data->display.n_pipes); igt_output_set_pipe(output, pipe); pageflip_test_init(&test, output, pipe); primary = igt_output_get_plane(output, IGT_PLANE_PRIMARY); /* Use legacy API to set a mode with a blue FB */ igt_plane_set_fb(primary, &test.blue_fb); igt_display_commit2(&data->display, COMMIT_LEGACY); /* Disable the primary plane */ igt_plane_set_fb(primary, NULL); igt_display_commit2(&data->display, COMMIT_UNIVERSAL); /* * Issue a pageflip to red FB * * Note that crtc->primary->fb = NULL causes flip to return EBUSY for * historical reasons... */ igt_assert(drmModePageFlip(data->drm_fd, output->config.crtc->crtc_id, test.red_fb.fb_id, 0, NULL) == -EBUSY); /* Turn primary plane back on */ igt_plane_set_fb(primary, &test.blue_fb); igt_display_commit2(&data->display, COMMIT_UNIVERSAL); /* * Issue a pageflip to red, then immediately try to disable the primary * plane, hopefully before the pageflip has a chance to complete. The * plane disable operation should wind up blocking while the pageflip * completes, which we don't have a good way to specifically test for, * but at least we can make sure that nothing blows up. */ igt_assert(drmModePageFlip(data->drm_fd, output->config.crtc->crtc_id, test.red_fb.fb_id, DRM_MODE_PAGE_FLIP_EVENT, &test) == 0); igt_plane_set_fb(primary, NULL); igt_display_commit2(&data->display, COMMIT_UNIVERSAL); /* Wait for pageflip completion, then consume event on fd */ FD_ZERO(&fds); FD_SET(data->drm_fd, &fds); do { ret = select(data->drm_fd + 1, &fds, NULL, NULL, &timeout); } while (ret < 0 && errno == EINTR); igt_assert_eq(ret, 1); igt_assert(drmHandleEvent(data->drm_fd, &evctx) == 0); igt_plane_set_fb(primary, NULL); pageflip_test_fini(&test, output); } static void cursor_leak_test_fini(data_t *data, igt_output_t *output, struct igt_fb *bg, struct igt_fb *curs) { int i; igt_remove_fb(data->drm_fd, bg); for (i = 0; i < 10; i++) igt_remove_fb(data->drm_fd, &curs[i]); igt_output_set_pipe(output, PIPE_ANY); } static int i915_gem_fb_count(void) { char buf[1024]; FILE *fp; int count = 0; fp = igt_debugfs_fopen("i915_gem_framebuffer", "r"); igt_require(fp); while (fgets(buf, sizeof(buf), fp) != NULL) count++; fclose(fp); return count; } static void cursor_leak_test_pipe(data_t *data, enum pipe pipe, igt_output_t *output) { igt_display_t *display = &data->display; igt_plane_t *primary, *cursor; drmModeModeInfo *mode; struct igt_fb background_fb; struct igt_fb cursor_fb[10]; int i; int r, g, b; int count1, count2; igt_assert(data->display.has_universal_planes); igt_skip_on(pipe >= display->n_pipes); igt_output_set_pipe(output, pipe); mode = igt_output_get_mode(output); /* Count GEM framebuffers before creating our cursor FB's */ count1 = i915_gem_fb_count(); /* Black background FB */ igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, false, 0.0, 0.0, 0.0, &background_fb); /* Random color cursors */ for (i = 0; i < 10; i++) { r = rand() % 0xFF; g = rand() % 0xFF; b = rand() % 0xFF; igt_create_color_fb(data->drm_fd, 64, 64, DRM_FORMAT_ARGB8888, false, (double)r / 0xFF, (double)g / 0xFF, (double)b / 0xFF, &cursor_fb[i]); } primary = igt_output_get_plane(output, IGT_PLANE_PRIMARY); cursor = igt_output_get_plane(output, IGT_PLANE_CURSOR); if (!primary || !cursor) { cursor_leak_test_fini(data, output, &background_fb, cursor_fb); igt_skip("Primary and/or cursor are unavailable\n"); } igt_plane_set_fb(primary, &background_fb); igt_display_commit2(display, COMMIT_LEGACY); igt_plane_set_position(cursor, 100, 100); /* * Exercise both legacy and universal code paths. Note that legacy * handling in the kernel redirects through universal codepaths * internally, so that redirection is where we're most worried about * leaking. */ for (i = 0; i < 10; i++) { igt_plane_set_fb(cursor, &cursor_fb[i]); igt_display_commit2(display, COMMIT_UNIVERSAL); } for (i = 0; i < 10; i++) { igt_plane_set_fb(cursor, &cursor_fb[i]); igt_display_commit2(display, COMMIT_LEGACY); } /* Release our framebuffer handles before we take a second count */ igt_plane_set_fb(primary, NULL); igt_plane_set_fb(cursor, NULL); igt_display_commit2(display, COMMIT_LEGACY); cursor_leak_test_fini(data, output, &background_fb, cursor_fb); /* We should be back to the same framebuffer count as when we started */ count2 = i915_gem_fb_count(); igt_assert_eq(count1, count2); } static void gen9_test_init(gen9_test_t *test, igt_output_t *output, enum pipe pipe) { data_t *data = test->data; drmModeModeInfo *mode; igt_output_set_pipe(output, pipe); mode = igt_output_get_mode(output); test->w = mode->hdisplay / 2; test->h = mode->vdisplay / 2; test->x = mode->hdisplay / 4; test->y = mode->vdisplay / 4; /* Initial framebuffer of full CRTC size */ igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, 0.0, 1.0, 0.0, &test->biggreen_fb); /* Framebuffers that only cover a quarter of the CRTC size */ igt_create_color_fb(data->drm_fd, test->w, test->h, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, 1.0, 0.0, 0.0, &test->smallred_fb); igt_create_color_fb(data->drm_fd, test->w, test->h, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, 0.0, 0.0, 1.0, &test->smallblue_fb); } static void gen9_test_fini(gen9_test_t *test, igt_output_t *output) { igt_remove_fb(test->data->drm_fd, &test->biggreen_fb); igt_remove_fb(test->data->drm_fd, &test->smallred_fb); igt_remove_fb(test->data->drm_fd, &test->smallblue_fb); igt_output_set_pipe(output, PIPE_ANY); igt_display_commit2(&test->data->display, COMMIT_LEGACY); } /* * Test features specific to gen9+ platforms (i.e., primary plane * windowing) */ static void gen9_test_pipe(data_t *data, enum pipe pipe, igt_output_t *output) { gen9_test_t test = { .data = data }; igt_plane_t *primary; int ret = 0; igt_skip_on(data->gen < 9); igt_skip_on(pipe >= data->display.n_pipes); igt_output_set_pipe(output, pipe); gen9_test_init(&test, output, pipe); primary = igt_output_get_plane(output, IGT_PLANE_PRIMARY); /* Start with a full-screen primary plane */ igt_plane_set_fb(primary, &test.biggreen_fb); igt_display_commit2(&data->display, COMMIT_LEGACY); /* Set primary to windowed size/position */ igt_plane_set_fb(primary, &test.smallblue_fb); igt_plane_set_position(primary, test.x, test.y); igt_plane_set_size(primary, test.w, test.h); igt_display_commit2(&data->display, COMMIT_UNIVERSAL); /* * SetPlane update to another framebuffer of the same size * should succeed */ igt_plane_set_fb(primary, &test.smallred_fb); igt_plane_set_position(primary, test.x, test.y); igt_plane_set_size(primary, test.w, test.h); igt_display_commit2(&data->display, COMMIT_UNIVERSAL); /* PageFlip should also succeed */ ret = drmModePageFlip(data->drm_fd, output->config.crtc->crtc_id, test.smallblue_fb.fb_id, 0, NULL); igt_assert_eq(ret, 0); igt_plane_set_fb(primary, NULL); igt_plane_set_position(primary, 0, 0); gen9_test_fini(&test, output); } static void run_tests_for_pipe(data_t *data, enum pipe pipe) { igt_output_t *output; igt_subtest_f("universal-plane-pipe-%s-functional", kmstest_pipe_name(pipe)) for_each_connected_output(&data->display, output) functional_test_pipe(data, pipe, output); igt_subtest_f("universal-plane-pipe-%s-sanity", kmstest_pipe_name(pipe)) for_each_connected_output(&data->display, output) sanity_test_pipe(data, pipe, output); igt_subtest_f("disable-primary-vs-flip-pipe-%s", kmstest_pipe_name(pipe)) for_each_connected_output(&data->display, output) pageflip_test_pipe(data, pipe, output); igt_subtest_f("cursor-fb-leak-pipe-%s", kmstest_pipe_name(pipe)) for_each_connected_output(&data->display, output) cursor_leak_test_pipe(data, pipe, output); igt_subtest_f("universal-plane-gen9-features-pipe-%s", kmstest_pipe_name(pipe)) for_each_connected_output(&data->display, output) gen9_test_pipe(data, pipe, output); } static data_t data; igt_main { igt_skip_on_simulation(); igt_fixture { data.drm_fd = drm_open_driver_master(DRIVER_INTEL); data.gen = intel_gen(intel_get_drm_devid(data.drm_fd)); kmstest_set_vt_graphics_mode(); igt_require_pipe_crc(); igt_display_init(&data.display, data.drm_fd); igt_require(data.display.has_universal_planes); } for (int pipe = 0; pipe < I915_MAX_PIPES; pipe++) run_tests_for_pipe(&data, pipe); igt_fixture { igt_display_fini(&data.display); } } intel-gpu-tools-1.14/tests/eviction_common.c0000644000175000017500000002036412665336131016133 00000000000000/* * Copyright © 2007, 2011, 2013, 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * Daniel Vetter * Tvrtko Ursulin * */ #include "igt.h" #include struct igt_eviction_test_ops { uint32_t (*create)(int fd, uint64_t size); void (*flink)(uint32_t old_handle, uint32_t new_handle); void (*close)(int fd, uint32_t bo); int (*copy)(int fd, uint32_t dst, uint32_t src, uint32_t *all_bo, int nr_bos); void (*clear)(int fd, uint32_t bo, uint64_t size); }; #define FORKING_EVICTIONS_INTERRUPTIBLE (1 << 0) #define FORKING_EVICTIONS_SWAPPING (1 << 1) #define FORKING_EVICTIONS_DUP_DRMFD (1 << 2) #define FORKING_EVICTIONS_MEMORY_PRESSURE (1 << 3) #define ALL_FORKING_EVICTIONS (FORKING_EVICTIONS_INTERRUPTIBLE | \ FORKING_EVICTIONS_SWAPPING | \ FORKING_EVICTIONS_DUP_DRMFD | \ FORKING_EVICTIONS_MEMORY_PRESSURE) static void exchange_uint32_t(void *array, unsigned i, unsigned j) { uint32_t *i_arr = array; igt_swap(i_arr[i], i_arr[j]); } static int minor_evictions(int fd, struct igt_eviction_test_ops *ops, uint64_t surface_size, uint64_t nr_surfaces) { uint32_t *bo, *sel; uint64_t n, m, total_surfaces; int pass, fail; /* Make sure nr_surfaces is not divisible by seven * to avoid duplicates in the selection loop below. */ nr_surfaces /= 7; nr_surfaces *= 7; nr_surfaces += 3; total_surfaces = gem_aperture_size(fd) / surface_size + 1; igt_require(nr_surfaces < total_surfaces); intel_require_memory(total_surfaces, surface_size, CHECK_RAM); bo = malloc((nr_surfaces + total_surfaces)*sizeof(*bo)); igt_assert(bo); for (n = 0; n < total_surfaces; n++) bo[n] = ops->create(fd, surface_size); sel = bo + n; for (fail = 0, m = 0; fail < 10; fail++) { int ret; for (pass = 0; pass < 100; pass++) { for (n = 0; n < nr_surfaces; n++, m += 7) sel[n] = bo[m%total_surfaces]; ret = ops->copy(fd, sel[0], sel[1], sel, nr_surfaces); igt_assert_eq(ret, 0); } ret = ops->copy(fd, bo[0], bo[0], bo, total_surfaces); igt_assert(ret == ENOSPC); } for (n = 0; n < total_surfaces; n++) ops->close(fd, bo[n]); free(bo); return 0; } static int major_evictions(int fd, struct igt_eviction_test_ops *ops, uint64_t surface_size, uint64_t nr_surfaces) { uint64_t n, m; uint32_t *bo; int ret, loop; intel_require_memory(nr_surfaces, surface_size, CHECK_RAM); bo = malloc(nr_surfaces*sizeof(*bo)); igt_assert(bo); for (n = 0; n < nr_surfaces; n++) bo[n] = ops->create(fd, surface_size); for (loop = 0, m = 0; loop < 100; loop++, m += 17) { n = m % nr_surfaces; ret = ops->copy(fd, bo[n], bo[n], &bo[n], 1); igt_assert_eq(ret, 0); } for (n = 0; n < nr_surfaces; n++) ops->close(fd, bo[n]); free(bo); return 0; } static void mlocked_evictions(int fd, struct igt_eviction_test_ops *ops, uint64_t surface_size, uint64_t surface_count) { uint64_t sz, pin; void *locked; intel_require_memory(surface_count, surface_size, CHECK_RAM); sz = surface_size*surface_count; pin = intel_get_avail_ram_mb(); pin *= 1024 * 1024; igt_require(pin > sz); pin -= sz; igt_debug("Pinning [%'lld, %'lld] MiB\n", (long long)pin/(1024*1024), (long long)(pin + sz)/(1024*1024)); locked = malloc(pin + sz); if (locked != NULL && mlock(locked, pin + sz)) { free(locked); locked = NULL; } else { munlock(locked, pin + sz); free(locked); } igt_require(locked); igt_fork(child, 1) { uint32_t *bo; uint64_t n; int ret; bo = malloc(surface_count*sizeof(*bo)); igt_assert(bo); locked = malloc(pin); if (locked == NULL || mlock(locked, pin)) exit(ENOSPC); for (n = 0; n < surface_count; n++) bo[n] = ops->create(fd, surface_size); for (n = 0; n < surface_count - 2; n++) { igt_permute_array(bo, surface_count, exchange_uint32_t); ret = ops->copy(fd, bo[0], bo[1], bo, surface_count-n); if (ret) exit(ret); /* Having used the surfaces (and so pulled out of * our pages into memory), start a memory hog to * force evictions. */ locked = malloc(surface_size); if (locked == NULL || mlock(locked, surface_size)) free(locked); } for (n = 0; n < surface_count; n++) ops->close(fd, bo[n]); } igt_waitchildren(); } static int swapping_evictions(int fd, struct igt_eviction_test_ops *ops, uint64_t surface_size, uint64_t working_surfaces, uint64_t trash_surfaces) { uint32_t *bo; uint64_t i, n; int pass, ret; intel_require_memory(working_surfaces, surface_size, CHECK_RAM); if (trash_surfaces < working_surfaces) trash_surfaces = working_surfaces; intel_require_memory(trash_surfaces, surface_size, CHECK_RAM | CHECK_SWAP); bo = malloc(trash_surfaces*sizeof(*bo)); igt_assert(bo); for (n = 0; n < trash_surfaces; n++) bo[n] = ops->create(fd, surface_size); for (i = 0; i < trash_surfaces/32; i++) { igt_permute_array(bo, trash_surfaces, exchange_uint32_t); for (pass = 0; pass < 100; pass++) { ret = ops->copy(fd, bo[0], bo[1], bo, working_surfaces); igt_assert_eq(ret, 0); } } for (n = 0; n < trash_surfaces; n++) ops->close(fd, bo[n]); free(bo); return 0; } static int forking_evictions(int fd, struct igt_eviction_test_ops *ops, uint64_t surface_size, uint64_t working_surfaces, uint64_t trash_surfaces, unsigned flags) { const int num_threads = sysconf(_SC_NPROCESSORS_ONLN); uint64_t bo_count, n, l; uint32_t *bo; int pass, ret; intel_require_memory(working_surfaces, surface_size, CHECK_RAM); if (flags & FORKING_EVICTIONS_SWAPPING) { bo_count = trash_surfaces; if (bo_count < working_surfaces) bo_count = working_surfaces; } else bo_count = working_surfaces; igt_assert_lte(working_surfaces, bo_count); intel_require_memory(bo_count, surface_size, CHECK_RAM | CHECK_SWAP); bo = malloc(bo_count*sizeof(*bo)); igt_assert(bo); for (n = 0; n < bo_count; n++) bo[n] = ops->create(fd, surface_size); igt_fork(i, min(num_threads * 4, 12)) { int realfd = fd; int num_passes = flags & FORKING_EVICTIONS_SWAPPING ? 10 : 100; /* Every fork should have a different permutation! */ srand(i * 63); if (flags & FORKING_EVICTIONS_INTERRUPTIBLE) igt_fork_signal_helper(); igt_permute_array(bo, bo_count, exchange_uint32_t); if (flags & FORKING_EVICTIONS_DUP_DRMFD) { realfd = drm_open_driver(DRIVER_INTEL); /* We can overwrite the bo array since we're forked. */ for (l = 0; l < bo_count; l++) { uint32_t handle = bo[l]; uint32_t flink = gem_flink(fd, bo[l]); bo[l] = gem_open(realfd, flink); if (ops->flink) ops->flink(handle, bo[l]); } } for (pass = 0; pass < num_passes; pass++) { ret = ops->copy(realfd, bo[0], bo[1], bo, working_surfaces); igt_assert_eq(ret, 0); for (l = 0; l < working_surfaces && (flags & FORKING_EVICTIONS_MEMORY_PRESSURE); l++) { ops->clear(realfd, bo[l], surface_size); } } if (flags & FORKING_EVICTIONS_INTERRUPTIBLE) igt_stop_signal_helper(); /* drmfd closing will take care of additional bo refs */ if (flags & FORKING_EVICTIONS_DUP_DRMFD) close(realfd); } igt_waitchildren(); for (n = 0; n < bo_count; n++) ops->close(fd, bo[n]); free(bo); return 0; } intel-gpu-tools-1.14/tests/gem_exec_big.c0000644000175000017500000001557712665336131015352 00000000000000/* * Copyright © 2011,2012 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * Daniel Vetter * */ /* * Testcase: run a nop batch which is really big * * Mostly useful to stress-test the error-capture code */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include #include #include "drm.h" IGT_TEST_DESCRIPTION("Run a large nop batch to stress test the error capture" " code."); #define FORCE_PREAD_PWRITE 0 static int use_64bit_relocs; static void exec1(int fd, uint32_t handle, uint64_t reloc_ofs, unsigned flags, char *ptr) { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 gem_exec[1]; struct drm_i915_gem_relocation_entry gem_reloc[1]; gem_reloc[0].offset = reloc_ofs; gem_reloc[0].delta = 0; gem_reloc[0].target_handle = handle; gem_reloc[0].read_domains = I915_GEM_DOMAIN_RENDER; gem_reloc[0].write_domain = 0; gem_reloc[0].presumed_offset = 0; gem_exec[0].handle = handle; gem_exec[0].relocation_count = 1; gem_exec[0].relocs_ptr = (uintptr_t) gem_reloc; gem_exec[0].alignment = 0; gem_exec[0].offset = 0; gem_exec[0].flags = 0; gem_exec[0].rsvd1 = 0; gem_exec[0].rsvd2 = 0; execbuf.buffers_ptr = (uintptr_t)gem_exec; execbuf.buffer_count = 1; execbuf.batch_start_offset = 0; execbuf.batch_len = 8; execbuf.cliprects_ptr = 0; execbuf.num_cliprects = 0; execbuf.DR1 = 0; execbuf.DR4 = 0; execbuf.flags = flags; i915_execbuffer2_set_context_id(execbuf, 0); execbuf.rsvd2 = 0; /* Avoid hitting slowpaths in the reloc processing which might yield a * presumed_offset of -1. Happens when the batch is still busy from the * last round. */ gem_sync(fd, handle); gem_execbuf(fd, &execbuf); igt_warn_on(gem_reloc[0].presumed_offset == -1); if (use_64bit_relocs) { uint64_t tmp; if (ptr) tmp = *(uint64_t *)(ptr+reloc_ofs); else gem_read(fd, handle, reloc_ofs, &tmp, sizeof(tmp)); igt_assert_eq(tmp, gem_reloc[0].presumed_offset); } else { uint32_t tmp; if (ptr) tmp = *(uint32_t *)(ptr+reloc_ofs); else gem_read(fd, handle, reloc_ofs, &tmp, sizeof(tmp)); igt_assert_eq(tmp, gem_reloc[0].presumed_offset); } } static void execN(int fd, uint32_t handle, uint64_t batch_size, unsigned flags, char *ptr) { #define reloc_ofs(N, T) ((((N)+1) << 12) - 4*(1 + ((N) == ((T)-1)))) struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 gem_exec[1]; struct drm_i915_gem_relocation_entry *gem_reloc; uint64_t n, nreloc = batch_size >> 12; gem_reloc = calloc(nreloc, sizeof(*gem_reloc)); igt_assert(gem_reloc); for (n = 0; n < nreloc; n++) { gem_reloc[n].offset = reloc_ofs(n, nreloc); gem_reloc[n].target_handle = handle; gem_reloc[n].read_domains = I915_GEM_DOMAIN_RENDER; gem_reloc[n].presumed_offset = n ^ 0xbeefdeaddeadbeef; if (ptr) { if (use_64bit_relocs) *(uint64_t *)(ptr + gem_reloc[n].offset) = gem_reloc[n].presumed_offset; else *(uint32_t *)(ptr + gem_reloc[n].offset) = gem_reloc[n].presumed_offset; } else gem_write(fd, handle, gem_reloc[n].offset, &gem_reloc[n].presumed_offset, 4*(1+use_64bit_relocs)); } memset(gem_exec, 0, sizeof(gem_exec)); gem_exec[0].handle = handle; gem_exec[0].relocation_count = nreloc; gem_exec[0].relocs_ptr = (uintptr_t)gem_reloc; memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)gem_exec; execbuf.buffer_count = 1; execbuf.batch_start_offset = 0; execbuf.batch_len = 8; execbuf.flags = flags; /* Avoid hitting slowpaths in the reloc processing which might yield a * presumed_offset of -1. Happens when the batch is still busy from the * last round. */ gem_sync(fd, handle); gem_execbuf(fd, &execbuf); for (n = 0; n < nreloc; n++) igt_warn_on(gem_reloc[n].presumed_offset == -1); if (use_64bit_relocs) { for (n = 0; n < nreloc; n++) { uint64_t tmp; if (ptr) tmp = *(uint64_t *)(ptr+reloc_ofs(n, nreloc)); else gem_read(fd, handle, reloc_ofs(n, nreloc), &tmp, sizeof(tmp)); igt_assert_eq(tmp, gem_reloc[n].presumed_offset); } } else { for (n = 0; n < nreloc; n++) { uint32_t tmp; if (ptr) tmp = *(uint32_t *)(ptr+reloc_ofs(n, nreloc)); else gem_read(fd, handle, reloc_ofs(n, nreloc), &tmp, sizeof(tmp)); igt_assert_eq(tmp, gem_reloc[n].presumed_offset); } } free(gem_reloc); #undef reloc_ofs } igt_simple_main { uint32_t batch[2] = {MI_BATCH_BUFFER_END}; uint64_t batch_size, max, reloc_ofs; int fd; fd = drm_open_driver(DRIVER_INTEL); use_64bit_relocs = intel_gen(intel_get_drm_devid(fd)) >= 8; max = 3 * gem_aperture_size(fd) / 4; intel_require_memory(1, max, CHECK_RAM); for (batch_size = 4096; batch_size <= max; ) { uint32_t handle; void *ptr; handle = gem_create(fd, batch_size); gem_write(fd, handle, 0, batch, sizeof(batch)); if (!FORCE_PREAD_PWRITE && gem_has_llc(fd)) ptr = __gem_mmap__cpu(fd, handle, 0, batch_size, PROT_READ); else if (!FORCE_PREAD_PWRITE && gem_mmap__has_wc(fd)) ptr = __gem_mmap__wc(fd, handle, 0, batch_size, PROT_READ); else ptr = NULL; for (reloc_ofs = 4096; reloc_ofs < batch_size; reloc_ofs += 4096) { igt_debug("batch_size %llu, reloc_ofs %llu\n", (long long)batch_size, (long long)reloc_ofs); exec1(fd, handle, reloc_ofs, 0, ptr); exec1(fd, handle, reloc_ofs, I915_EXEC_SECURE, ptr); } igt_debug("batch_size %llu, all %ld relocs\n", (long long)batch_size, (long)(batch_size >> 12)); execN(fd, handle, batch_size, 0, ptr); execN(fd, handle, batch_size, I915_EXEC_SECURE, ptr); if (ptr) munmap(ptr, batch_size); gem_madvise(fd, handle, I915_MADV_DONTNEED); if (batch_size < max && 2*batch_size > max) batch_size = max; else batch_size *= 2; } close(fd); } intel-gpu-tools-1.14/tests/1080p-left.png0000644000175000017500000012160212665336131015002 00000000000000PNG  IHDR8gV pHYs  tIME 0 IDATx{}gi"$.AhsZ2ʌ'nԤf:Lӯw1phx K}fx2t&o; GY$=3Aϝ@$L@#r3k uzdD@4L@qA*3#8a6DLFz/!> 0>+8ܽ{'_~9I$jr4гwtϤi u"@{za {9$@t CbŏXv;ܽ{ɗu:KodP=]s 30 aݽ{ 07C؟ aA:oH6KX f.BgK\ ?&Qmm6'740%\b=409!milmAZ}3 ^406 :h&@Sj٠C7o"@ӠeX '^V4h@,7h8u"%@#om@\4ho;ȃ DG:,a B!DHA-ݹl6BP""@Qkߠeh 0 h vVBG R!C@A̎F\3H @4$h w^wYiٿA28o;Ȁ $e X@4h I c[3t#@Ҡ%m@78z#@ sYBw ,ߠ@}'@9ݸqZ}l@&4h`Pn}C |hуHȞ!do5@~h +.K"r%@ҠRa&@yjߠef; Й dJh_C#Pș rIPȜC$z EALNzP'_ny˗_w\R:u /]9' В h VBO} @Y4h(Fg@Aݽ{e b!P4%D<"uC[@ѬXKB"@@JACfcqعl"@hА7zX3@e hIdJۅ@3> r7DߺRzZ1'O/ߧ/*SK?W.g`Y+u% 3w `P4O=z_{ZY#ؤn_GvYT z VI>?hp̅ ^}asΠA Lgf[Jt!k}ga@[{9n|:͝;P} ֎?׶fhy)B6>hЉ6h )(CEnS6 * J 04dԩ9  {y^H$L@K__?g`B&Fu{G|yy~Ԡ3i @f!, 3 @(8E1ͣ=# > '>;Bh z9吞!ٺ{ymZ:3%R(l6 M 75@74澼i/Gz*Th @v˳څ g r4xΜyo bE1q|羖rB C=.-8;*k/?^rt|xC@7 8w !ͽƟ$\>Mъbp#@9}wApܶ/M_w;*O}-x+w2 oP$<h/ǥKDZ%@ٰIcɮ 7 U4@!\ !}p̙:gŽ.aƮ{9b\fR!@sGzB%x*-n{9V_x;&4P\;CCZ vMhPk*C%T[.w/k @Ey DۿA xuF˻-[ e^HA]6i\SLz^!C9^ 'HM:q''L\ylּIcB#mr8sh gZڰ$Ř pch @y!=/2 :s{-輗ſ \k24Lg9"\^L0/pۦ'@>dhٳټIm 7Z/^ ATy mۤisMeE@ڢMϵW=R0g_mڤd=_s-=t%Q'o{*+zm$=Gf7i,x7@ܹ5 pc_u @Jg9wna4s|_\[@ >Ν׽xiƦ.w;8o8q"@ciG>ڤM 7Z ] @ > G; ] @gٓO!M 7v_vrB :\6+ mx}!1 DDzZ۸p#lnpo!@,g'|xrsX{ڦ9Ż]c|'=;9ƒ w a4k"s@*L@>?l곩I2vy0\rz5w{;?+d ><ԿyK#W6:$2]5h@h`3*pcSa3+8@g^n̶/?8h x\R8^nh`$>4ܭV 8aIQ+t?'B2׻!/n4m/8>L@R̺0Y1[w"@C9NkpZ; ߿҂Ik~;tK"qsF=<Ѯ]½M6:U Fzv, W8z6z[Km @?g`8O?VVd~n,P6g0!ؗ &G"9-z/? 30ٮ#{U40͏sFzN$gpvzo @3040:[؁ g#~no|#ڋb#[XrnOjn ??.T9h blvQn̬ؕ9hOyha~ZzFw!!&׾S `8'0j9CKwa>*v>?^_^Ts24О6-sX鲁_Z͛bgq;>+8Vsl3gO^}ed84J} ֭Yulmҝ l%@MCFqIo˱O @ t^ 4ABbj+85M0;0|tϪOݞz;~U ƍӎXd+tQh` LNW24CѠE4ŝ;v;!ΓRS̱fC4Ͱ4h"@p#~;N:ߓOQ> !p$.\Fz4y>_yGYF&pk.sb]_p>;Jk9C0+82.\G7Vm{;,ԓO~͍ @ݹi௄-z^Ɲa׫:Y6l[vReVH0%5.Cƫ;G< sxx[9_QS,6cYy1(I-'_ua40[^sP&2/\񞝮R8 :@+ p°)C;y8g0Ս _-RԧgXde{z. )wݰ^eu zs?qthq.ʖ{.8zGg! $h7=׎nnLƝ3kmYa/XL֭z_n]F* THԩo ^N5Z&ŋn/7p>o{n{G!3L `_/˜]3h`//!N~3fLƟh?~tsmH̙߫EXCŋet78qB`7CXM=<`k=Ŀ h`7w|!@+ͳuk^8;/l3C>Dh`gU}Hen=/'C3@H=OvCg'8 ` mt6Ry~Ek{t|eih /!p|6y }G4t:C>DEܹ(u5G1{! ]op˫|G?/u@k^zaM A8< >CK/육^K}H솆D>~ſ=\G'Ɵ6L@3 iyᅿBa yt2sh6B_'rFqOW7‹+7ֿpھzwtwyh|ORdϦзnp"gt!.]!1 gt4 tiyۥKx[ӿC[.RJA3Ki6llzGOn@N8`BFs2jɥK:9?*V_XʘϷ߳*[{wytRg`AW4<\|inyi>! %?xٺK]_|# ҔsԾha3]s$o??=Rn`X A*J/v£s`W8A>{K]Q-6/B=ͪ+.=pUsH}( haqvv{-E_4?? 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IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Daniel Vetter * * Based upon a test program provided by Thomas Hellstrom */ /* * Testcase: Check that drop/setMaster correctly transfer master state * * Test approach is only checking auth state (which is part of master state) by * trying to authenticate a client against the wrong master. */ #define _GNU_SOURCE #include "igt.h" #include #include #include #include #ifdef __linux__ # include #else # include #endif IGT_TEST_DESCRIPTION("Check that drop/setMaster correctly transfer master " "state"); igt_simple_main { int master1, master2, client; drm_magic_t magic; master1 = drm_open_driver(DRIVER_ANY); do_or_die(drmSetMaster(master1)); /* Get an authentication magic from the first master */ client = drm_open_driver(DRIVER_ANY); do_or_die(drmGetMagic(client, &magic)); /* Open an fd an make it master */ master2 = drm_open_driver(DRIVER_ANY); do_or_die(drmDropMaster(master1)); do_or_die(drmSetMaster(master2)); /* Auth shouldn't work since we're authenticating with a different * master than the one we got the magic from. */ igt_assert_neq(drmAuthMagic(master2, magic), 0); igt_assert_eq(errno, EINVAL); close(client); close(master2); close(master1); } intel-gpu-tools-1.14/tests/gen3_render_tiledy_blits.c0000644000175000017500000002603612665336131017707 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ /** @file gen3_linear_render_blits.c * * This is a test of doing many blits, with a working set * larger than the aperture size. * * The goal is to simply ensure the basics work. */ #include "igt.h" #include #include #include #include #include #include #include #include #include #include "drm.h" #include "i915_reg.h" #define WIDTH 512 #define HEIGHT 512 static inline uint32_t pack_float(float f) { union { uint32_t dw; float f; } u; u.f = f; return u.dw; } static uint32_t fill_reloc(struct drm_i915_gem_relocation_entry *reloc, uint32_t offset, uint32_t handle, uint32_t read_domain, uint32_t write_domain) { reloc->target_handle = handle; reloc->delta = 0; reloc->offset = offset * sizeof(uint32_t); reloc->presumed_offset = 0; reloc->read_domains = read_domain; reloc->write_domain = write_domain; return reloc->presumed_offset + reloc->delta; } static void copy(int fd, uint32_t dst, uint32_t src) { uint32_t batch[1024], *b = batch; struct drm_i915_gem_relocation_entry reloc[2], *r = reloc; struct drm_i915_gem_exec_object2 obj[3]; struct drm_i915_gem_execbuffer2 exec; uint32_t handle; int ret; /* invariant state */ *b++ = (_3DSTATE_AA_CMD | AA_LINE_ECAAR_WIDTH_ENABLE | AA_LINE_ECAAR_WIDTH_1_0 | AA_LINE_REGION_WIDTH_ENABLE | AA_LINE_REGION_WIDTH_1_0); *b++ = (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD | IAB_MODIFY_ENABLE | IAB_MODIFY_FUNC | (BLENDFUNC_ADD << IAB_FUNC_SHIFT) | IAB_MODIFY_SRC_FACTOR | (BLENDFACT_ONE << IAB_SRC_FACTOR_SHIFT) | IAB_MODIFY_DST_FACTOR | (BLENDFACT_ZERO << IAB_DST_FACTOR_SHIFT)); *b++ = (_3DSTATE_DFLT_DIFFUSE_CMD); *b++ = (0); *b++ = (_3DSTATE_DFLT_SPEC_CMD); *b++ = (0); *b++ = (_3DSTATE_DFLT_Z_CMD); *b++ = (0); *b++ = (_3DSTATE_COORD_SET_BINDINGS | CSB_TCB(0, 0) | CSB_TCB(1, 1) | CSB_TCB(2, 2) | CSB_TCB(3, 3) | CSB_TCB(4, 4) | CSB_TCB(5, 5) | CSB_TCB(6, 6) | CSB_TCB(7, 7)); *b++ = (_3DSTATE_RASTER_RULES_CMD | ENABLE_POINT_RASTER_RULE | OGL_POINT_RASTER_RULE | ENABLE_LINE_STRIP_PROVOKE_VRTX | ENABLE_TRI_FAN_PROVOKE_VRTX | LINE_STRIP_PROVOKE_VRTX(1) | TRI_FAN_PROVOKE_VRTX(2) | ENABLE_TEXKILL_3D_4D | TEXKILL_4D); *b++ = (_3DSTATE_MODES_4_CMD | ENABLE_LOGIC_OP_FUNC | LOGIC_OP_FUNC(LOGICOP_COPY) | ENABLE_STENCIL_WRITE_MASK | STENCIL_WRITE_MASK(0xff) | ENABLE_STENCIL_TEST_MASK | STENCIL_TEST_MASK(0xff)); *b++ = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | I1_LOAD_S(4) | I1_LOAD_S(5) | 2); *b++ = (0x00000000); /* Disable texture coordinate wrap-shortest */ *b++ = ((1 << S4_POINT_WIDTH_SHIFT) | S4_LINE_WIDTH_ONE | S4_CULLMODE_NONE | S4_VFMT_XY); *b++ = (0x00000000); /* Stencil. */ *b++ = (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT); *b++ = (_3DSTATE_SCISSOR_RECT_0_CMD); *b++ = (0); *b++ = (0); *b++ = (_3DSTATE_DEPTH_SUBRECT_DISABLE); *b++ = (_3DSTATE_LOAD_INDIRECT | 0); /* disable indirect state */ *b++ = (0); *b++ = (_3DSTATE_STIPPLE); *b++ = (0x00000000); *b++ = (_3DSTATE_BACKFACE_STENCIL_OPS | BFO_ENABLE_STENCIL_TWO_SIDE | 0); /* samler state */ #define TEX_COUNT 1 *b++ = (_3DSTATE_MAP_STATE | (3 * TEX_COUNT)); *b++ = ((1 << TEX_COUNT) - 1); *b = fill_reloc(r++, b-batch, src, I915_GEM_DOMAIN_SAMPLER, 0); b++; *b++ = (MAPSURF_32BIT | MT_32BIT_ARGB8888 | MS3_TILED_SURFACE | MS3_TILE_WALK | (HEIGHT - 1) << MS3_HEIGHT_SHIFT | (WIDTH - 1) << MS3_WIDTH_SHIFT); *b++ = ((WIDTH-1) << MS4_PITCH_SHIFT); *b++ = (_3DSTATE_SAMPLER_STATE | (3 * TEX_COUNT)); *b++ = ((1 << TEX_COUNT) - 1); *b++ = (MIPFILTER_NONE << SS2_MIP_FILTER_SHIFT | FILTER_NEAREST << SS2_MAG_FILTER_SHIFT | FILTER_NEAREST << SS2_MIN_FILTER_SHIFT); *b++ = (TEXCOORDMODE_WRAP << SS3_TCX_ADDR_MODE_SHIFT | TEXCOORDMODE_WRAP << SS3_TCY_ADDR_MODE_SHIFT | 0 << SS3_TEXTUREMAP_INDEX_SHIFT); *b++ = (0x00000000); /* render target state */ *b++ = (_3DSTATE_BUF_INFO_CMD); *b++ = (BUF_3D_ID_COLOR_BACK | BUF_3D_TILED_SURFACE | BUF_3D_TILE_WALK_Y | WIDTH*4); *b = fill_reloc(r++, b-batch, dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER); b++; *b++ = (_3DSTATE_DST_BUF_VARS_CMD); *b++ = (COLR_BUF_ARGB8888 | DSTORG_HORT_BIAS(0x8) | DSTORG_VERT_BIAS(0x8)); /* draw rect is unconditional */ *b++ = (_3DSTATE_DRAW_RECT_CMD); *b++ = (0x00000000); *b++ = (0x00000000); /* ymin, xmin */ *b++ = (DRAW_YMAX(HEIGHT - 1) | DRAW_XMAX(WIDTH - 1)); /* yorig, xorig (relate to color buffer?) */ *b++ = (0x00000000); /* texfmt */ *b++ = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(1) | I1_LOAD_S(2) | I1_LOAD_S(6) | 2); *b++ = ((4 << S1_VERTEX_WIDTH_SHIFT) | (4 << S1_VERTEX_PITCH_SHIFT)); *b++ = (~S2_TEXCOORD_FMT(0, TEXCOORDFMT_NOT_PRESENT) | S2_TEXCOORD_FMT(0, TEXCOORDFMT_2D)); *b++ = (S6_CBUF_BLEND_ENABLE | S6_COLOR_WRITE_ENABLE | BLENDFUNC_ADD << S6_CBUF_BLEND_FUNC_SHIFT | BLENDFACT_ONE << S6_CBUF_SRC_BLEND_FACT_SHIFT | BLENDFACT_ZERO << S6_CBUF_DST_BLEND_FACT_SHIFT); /* pixel shader */ *b++ = (_3DSTATE_PIXEL_SHADER_PROGRAM | (1 + 3*3 - 2)); /* decl FS_T0 */ *b++ = (D0_DCL | REG_TYPE(FS_T0) << D0_TYPE_SHIFT | REG_NR(FS_T0) << D0_NR_SHIFT | ((REG_TYPE(FS_T0) != REG_TYPE_S) ? D0_CHANNEL_ALL : 0)); *b++ = (0); *b++ = (0); /* decl FS_S0 */ *b++ = (D0_DCL | (REG_TYPE(FS_S0) << D0_TYPE_SHIFT) | (REG_NR(FS_S0) << D0_NR_SHIFT) | ((REG_TYPE(FS_S0) != REG_TYPE_S) ? D0_CHANNEL_ALL : 0)); *b++ = (0); *b++ = (0); /* texld(FS_OC, FS_S0, FS_T0 */ *b++ = (T0_TEXLD | (REG_TYPE(FS_OC) << T0_DEST_TYPE_SHIFT) | (REG_NR(FS_OC) << T0_DEST_NR_SHIFT) | (REG_NR(FS_S0) << T0_SAMPLER_NR_SHIFT)); *b++ = ((REG_TYPE(FS_T0) << T1_ADDRESS_REG_TYPE_SHIFT) | (REG_NR(FS_T0) << T1_ADDRESS_REG_NR_SHIFT)); *b++ = (0); *b++ = (PRIM3D_RECTLIST | (3*4 - 1)); *b++ = pack_float(WIDTH); *b++ = pack_float(HEIGHT); *b++ = pack_float(WIDTH); *b++ = pack_float(HEIGHT); *b++ = pack_float(0); *b++ = pack_float(HEIGHT); *b++ = pack_float(0); *b++ = pack_float(HEIGHT); *b++ = pack_float(0); *b++ = pack_float(0); *b++ = pack_float(0); *b++ = pack_float(0); *b++ = MI_BATCH_BUFFER_END; if ((b - batch) & 1) *b++ = 0; igt_assert(b - batch <= 1024); handle = gem_create(fd, 4096); gem_write(fd, handle, 0, batch, (b-batch)*sizeof(batch[0])); igt_assert(r-reloc == 2); obj[0].handle = dst; obj[0].relocation_count = 0; obj[0].relocs_ptr = 0; obj[0].alignment = 0; obj[0].offset = 0; obj[0].flags = 0; obj[0].rsvd1 = 0; obj[0].rsvd2 = 0; obj[1].handle = src; obj[1].relocation_count = 0; obj[1].relocs_ptr = 0; obj[1].alignment = 0; obj[1].offset = 0; obj[1].flags = 0; obj[1].rsvd1 = 0; obj[1].rsvd2 = 0; obj[2].handle = handle; obj[2].relocation_count = 2; obj[2].relocs_ptr = (uintptr_t)reloc; obj[2].alignment = 0; obj[2].offset = 0; obj[2].flags = 0; obj[2].rsvd1 = obj[2].rsvd2 = 0; exec.buffers_ptr = (uintptr_t)obj; exec.buffer_count = 3; exec.batch_start_offset = 0; exec.batch_len = (b-batch)*sizeof(batch[0]); exec.DR1 = exec.DR4 = 0; exec.num_cliprects = 0; exec.cliprects_ptr = 0; exec.flags = 0; i915_execbuffer2_set_context_id(exec, 0); exec.rsvd2 = 0; ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &exec); while (ret && errno == EBUSY) { drmCommandNone(fd, DRM_I915_GEM_THROTTLE); ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &exec); } igt_assert_eq(ret, 0); gem_close(fd, handle); } static uint32_t create_bo(int fd, uint32_t val) { uint32_t handle; uint32_t *v; int i; handle = gem_create(fd, WIDTH*HEIGHT*4); gem_set_tiling(fd, handle, I915_TILING_Y, WIDTH*4); /* Fill the BO with dwords starting at val */ v = gem_mmap__gtt(fd, handle, WIDTH * HEIGHT * 4, PROT_READ | PROT_WRITE); for (i = 0; i < WIDTH*HEIGHT; i++) v[i] = val++; munmap(v, WIDTH*HEIGHT*4); return handle; } static void check_bo(int fd, uint32_t handle, uint32_t val) { uint32_t *v; int i; v = gem_mmap__gtt(fd, handle, WIDTH * HEIGHT * 4, PROT_READ); for (i = 0; i < WIDTH*HEIGHT; i++) { igt_assert_f(v[i] == val, "Expected 0x%08x, found 0x%08x " "at offset 0x%08x\n", val, v[i], i * 4); val++; } munmap(v, WIDTH*HEIGHT*4); } int main(int argc, char **argv) { uint32_t *handle, *start_val; uint32_t start = 0; int i, fd, count; igt_simple_init(argc, argv); fd = drm_open_driver(DRIVER_INTEL); igt_require(IS_GEN3(intel_get_drm_devid(fd))); count = 0; if (argc > 1) count = atoi(argv[1]); if (count == 0) count = 3 * gem_aperture_size(fd) / (1024*1024) / 2; igt_info("Using %d 1MiB buffers\n", count); handle = malloc(sizeof(uint32_t)*count*2); start_val = handle + count; for (i = 0; i < count; i++) { handle[i] = create_bo(fd, start); start_val[i] = start; start += 1024 * 1024 / 4; } igt_info("Verifying initialisation..."); fflush(stdout); for (i = 0; i < count; i++) check_bo(fd, handle[i], start_val[i]); igt_info("done\n"); igt_info("Cyclic blits, forward..."); fflush(stdout); for (i = 0; i < count * 32; i++) { int src = i % count; int dst = (i + 1) % count; copy(fd, handle[dst], handle[src]); start_val[dst] = start_val[src]; } igt_info("verifying..."); fflush(stdout); for (i = 0; i < count; i++) check_bo(fd, handle[i], start_val[i]); igt_info("done\n"); igt_info("Cyclic blits, backward..."); fflush(stdout); for (i = 0; i < count * 32; i++) { int src = (i + 1) % count; int dst = i % count; copy(fd, handle[dst], handle[src]); start_val[dst] = start_val[src]; } igt_info("verifying..."); fflush(stdout); for (i = 0; i < count; i++) check_bo(fd, handle[i], start_val[i]); igt_info("done\n"); igt_info("Random blits..."); fflush(stdout); for (i = 0; i < count * 32; i++) { int src = random() % count; int dst = random() % count; while (src == dst) dst = random() % count; copy(fd, handle[dst], handle[src]); start_val[dst] = start_val[src]; } igt_info("verifying..."); fflush(stdout); for (i = 0; i < count; i++) check_bo(fd, handle[i], start_val[i]); igt_info("done\n"); igt_exit(); } intel-gpu-tools-1.14/tests/core_getversion.c0000644000175000017500000000320112665336131016127 00000000000000/* * Copyright © 2007 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Eric Anholt * */ #include "igt.h" #include #include IGT_TEST_DESCRIPTION("Tests the DRM_IOCTL_GET_VERSION ioctl and libdrm's " "drmGetVersion() interface to it."); igt_simple_main { int fd; drmVersionPtr v; fd = drm_open_driver(DRIVER_ANY); v = drmGetVersion(fd); igt_assert(strlen(v->name) != 0); igt_assert(strlen(v->date) != 0); igt_assert(strlen(v->desc) != 0); igt_assert(v->version_major >= 1); drmFree(v); close(fd); } intel-gpu-tools-1.14/docs/0000755000175000017500000000000012665337377012455 500000000000000intel-gpu-tools-1.14/docs/Makefile.in0000644000175000017500000005037312665336443014443 00000000000000# Makefile.in generated by automake 1.15 from Makefile.am. # @configure_input@ # Copyright (C) 1994-2014 Free Software Foundation, Inc. # This Makefile.in is free software; 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aux

aux — Auxiliary libraries and support functions

Types and Values

extern drm_intel_bo ** trash_bos
extern int num_trash_bos
enum igt_runtime_pm_status
#define CHECK_RAM
#define CHECK_SWAP

Includes

#include <igt.h>

Description

This library provides various auxiliary helper functions that don't really fit into any other topic.

Functions

igt_fork_signal_helper ()

void
igt_fork_signal_helper (void);

Fork a child process using igt_fork_helper to interrupt the parent process with a SIGCONT signal at regular quick intervals. The corresponding dummy signal handler is installed in the parent process.

This is useful to exercise ioctl error paths, at least where those can be exercises by interrupting blocking waits, like stalling for the gpu. This helper can also be used from children spawned with igt_fork.

In tests with subtests this function can be called outside of failure catching code blocks like igt_fixture or igt_subtest.


igt_stop_signal_helper ()

void
igt_stop_signal_helper (void);

Stops the child process spawned with igt_fork_signal_helper() again.

In tests with subtests this function can be called outside of failure catching code blocks like igt_fixture or igt_subtest.


igt_exchange_int ()

void
igt_exchange_int (void *array,
                  unsigned  i,
                  unsigned  j);

Exchanges the two values at array indices i and j . Useful as an exchange function for igt_permute_array().

Parameters

array

pointer to the array of integers

 

i

first position

 

j

second position

 

igt_permute_array ()

void
igt_permute_array (void *array,
                   unsigned  size,
                   void (*exchange_func) (void *array, unsigned i, unsigned j));

This function randomly permutes the array using random() as the PRNG source. The exchange_func function is called to exchange two elements in the array when needed.

Parameters

array

pointer to array

 

size

size of the array

 

exchange_func

function to exchange array elements

 

igt_progress ()

void
igt_progress (const char *header,
              uint64_t i,
              uint64_t total);

This function draws a progress indicator, which is useful for running long-winded tests manually on the console. To avoid spamming log files in automated runs the progress indicator is suppressed when not running on a terminal.

Parameters

header

header string to prepend to the progress indicator

 

i

work processed thus far

 

total

total amount of work

 

igt_print_activity ()

void
igt_print_activity (void);

Print a '.' to indicate activity. This is printed without a newline and only if output is to a terminal.


igt_check_boolean_env_var ()

bool
igt_check_boolean_env_var (const char *env_var,
                           bool default_value);

This function should be used to parse boolean environment variable options.

Parameters

env_var

environment variable name

 

default_value

default value for the environment variable

 

Returns

The boolean value of the environment variable env_var as decoded by atoi() if it is set and default_value if the variable is not set.


igt_aub_dump_enabled ()

bool
igt_aub_dump_enabled (void);

Returns

True if AUB dumping is enabled with IGT_DUMP_AUB=1 in the environment, false otherwise.


igt_init_aperture_trashers ()

void
igt_init_aperture_trashers (drm_intel_bufmgr *bufmgr);

Initialize the aperture trasher using bufmgr , which can then be run with igt_trash_aperture().

Parameters

bufmgr

libdrm buffer manager

 

igt_trash_aperture ()

void
igt_trash_aperture (void);

Trash the aperture by walking a set of GTT memory mapped objects.


igt_cleanup_aperture_trashers ()

void
igt_cleanup_aperture_trashers (void);

Clean up all aperture trasher state set up with igt_init_aperture_trashers().


igt_system_suspend_autoresume ()

void
igt_system_suspend_autoresume (void);

Execute a system suspend-to-mem cycle and automatically wake up again using the firmware's resume timer.

This is very handy for implementing any kind of suspend/resume test.


igt_system_hibernate_autoresume ()

void
igt_system_hibernate_autoresume (void);

Execute a system suspend-to-disk cycle and automatically wake up again using the firmware's resume timer.

This is very handy for implementing any kind of hibernate/resume test.


igt_drop_root ()

void
igt_drop_root (void);

Drop root privileges and make sure it actually worked. Useful for tests which need to check security constraints. Note that this should only be called from manually forked processes, since the lack of root privileges will wreak havoc with the automatic cleanup handlers.


igt_debug_wait_for_keypress ()

void
igt_debug_wait_for_keypress (const char *var);

Waits for a key press when run interactively and when the corresponding debug var is set in the --interactive-debug=<var> variable. Multiple keys can be specified as a comma-separated list or alternatively "all" if a wait should happen for all cases.

When not connected to a terminal interactive_debug is ignored and execution immediately continues.

This is useful for display tests where under certain situation manual inspection of the display is useful. Or when running a testcase in the background.

Parameters

var

var lookup to to enable this wait

 

igt_debug_manual_check ()

void
igt_debug_manual_check (const char *var,
                        const char *expected);

Waits for a key press when run interactively and when the corresponding debug var is set in the --interactive-debug=<var> variable. Multiple vars can be specified as a comma-separated list or alternatively "all" if a wait should happen for all cases.

This is useful for display tests where under certain situation manual inspection of the display is useful. Or when running a testcase in the background.

When not connected to a terminal interactive_debug is ignored and execution immediately continues. For this reason by default this function returns true. It returns false only when N/n is pressed indicating the user isn't seeing what was expected.

Force test fail when N/n is pressed.

Parameters

var

var lookup to to enable this wait

 

expected

message to be printed as expected behaviour before wait for keys Y/n

 

igt_setup_runtime_pm ()

bool
igt_setup_runtime_pm (void);

Sets up the runtime PM helper functions and enables runtime PM. To speed up tests the autosuspend delay is set to 0.

Returns

True if runtime pm is available, false otherwise.


igt_get_runtime_pm_status ()

enum igt_runtime_pm_status
igt_get_runtime_pm_status (void);

Returns

The current runtime PM status.


igt_wait_for_pm_status ()

bool
igt_wait_for_pm_status (enum igt_runtime_pm_status status);

Waits until for the driver to switch to into the desired runtime PM status, with a 10 second timeout.

Parameters

status

desired runtime PM status

 

Returns

True if the desired runtime PM status was attained, false if the operation timed out.


intel_purge_vm_caches ()

void
intel_purge_vm_caches (void);

intel_get_avail_ram_mb ()

uint64_t
intel_get_avail_ram_mb (void);

Returns

The amount of unused system RAM available in MB.


intel_get_total_ram_mb ()

uint64_t
intel_get_total_ram_mb (void);

Returns

The total amount of system RAM available in MB.


intel_get_total_swap_mb ()

uint64_t
intel_get_total_swap_mb (void);

Returns

The total amount of swap space available in MB.


intel_require_memory ()

void
intel_require_memory (uint64_t count,
                      uint64_t size,
                      unsigned  mode);

Computes the total amount of memory required to allocate count surfaces, each of size bytes, and includes an estimate for kernel overhead. It then queries the kernel for the available amount of memory on the system (either RAM and/or SWAP depending upon mode ) and determines whether there is sufficient to run the test.

Most tests should check that there is enough RAM to hold their working set. The rare swap thrashing tests should check that there is enough RAM + SWAP for their tests. oom-killer tests should only run if this reports that there is not enough RAM + SWAP!

If there is not enough RAM this function calls igt_skip with an appropriate message. It only ever returns if the requirement is fulfilled. This function also causes the test to be skipped automatically on simulation under the assumption that any test that needs to check for memory requirements is a thrashing test unsuitable for slow simulated systems.

Parameters

count

number of surfaces that will be created

 

size

the size in bytes of each surface

 

mode

a bit field declaring whether the test will be run in RAM or in SWAP

 

min()

#define             min(a, b)

max()

#define             max(a, b)

igt_swap()

#define             igt_swap(a, b)

igt_lock_mem ()

void
igt_lock_mem (size_t size);

Allocate size MB of memory and lock it into RAM. This releases any previously locked memory.

Use igt_unlock_mem to release the currently locked memory.

Parameters

size

the amount of memory to lock into RAM, in MB

 

igt_unlock_mem ()

void
igt_unlock_mem (void);

Release and free the RAM used by igt_lock_mem.


igt_wait()

#define             igt_wait(COND, timeout_ms, interval_ms)

Waits until COND evaluates to true or the timeout passes.

It is safe to call this macro if the signal helper is active. The only problem is that the usleep() calls will return early, making us evaluate COND too often, possibly eating valuable CPU cycles.

Parameters

COND

condition to wait

 

timeout_ms

timeout in milliseconds

 

interval_ms

amount of time we try to sleep between COND checks

 

Returns

True of COND evaluated to true, false otherwise.


igt_set_module_param ()

void
igt_set_module_param (const char *name,
                      const char *val);

This function sets the desired value for the given i915.ko parameter. It also takes care of saving and restoring the values that were already set before the test was run.

Please consider using igt_set_module_param_int() for the integer and bool parameters.

Parameters

name

i915.ko parameter name

 

val

i915.ko parameter value

 

igt_set_module_param_int ()

void
igt_set_module_param_int (const char *name,
                          int val);

This is a wrapper for igt_set_module_param() that takes an integer instead of a string. Please see igt_set_module_param().

Parameters

name

i915.ko parameter name

 

val

i915.ko parameter value

 

Types and Values

trash_bos

extern drm_intel_bo **trash_bos;

num_trash_bos

extern int num_trash_bos;

enum igt_runtime_pm_status

Members

IGT_RUNTIME_PM_STATUS_ACTIVE

   

IGT_RUNTIME_PM_STATUS_SUSPENDED

   

IGT_RUNTIME_PM_STATUS_SUSPENDING

   

IGT_RUNTIME_PM_STATUS_RESUMING

   

IGT_RUNTIME_PM_STATUS_UNKNOWN

   

CHECK_RAM

#define CHECK_RAM 0x1

CHECK_SWAP

#define CHECK_SWAP 0x2
intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/igt-gem-tests.html0000644000175000017500000033247412665337377023735 00000000000000 GEM Tests: intel-gpu-tools Reference Manual

GEM Tests

GEM Tests — Tests for core drm ioctls and behaviour.

Programs

gem_bad_length  
gem_bad_reloc  
gem_basic  
gem_busy  
gem_caching  
gem_close_race  
gem_concurrent_all  
gem_concurrent_blit  
gem_cpu_reloc  
gem_create  
gem_cs_prefetch  
gem_cs_tlb  
gem_ctx_bad_destroy  
gem_ctx_bad_exec  
gem_ctx_basic  
gem_ctx_create  
gem_ctx_exec  
gem_ctx_param_basic  
gem_ctx_thrash  
gem_double_irq_loop  
gem_dummy_reloc_loop  
gem_eio  
gem_evict_alignment  
gem_evict_everything  
gem_exec_alignment  
gem_exec_bad_domains  
gem_exec_basic  
gem_exec_big  
gem_exec_blt  
gem_exec_faulting_reloc  
gem_exec_lut_handle  
gem_exec_nop  
gem_exec_params  
gem_exec_parse  
gem_exec_reloc  
gem_fd_exhaustion  
gem_fenced_exec_thrash  
gem_fence_thrash  
gem_fence_upload  
gem_flink_basic  
gem_flink_race  
gem_gpgpu_fill  
gem_gtt_cpu_tlb  
gem_gtt_hog  
gem_gtt_speed  
gem_hangcheck_forcewake  
gem_largeobject  
gem_linear_blits  
gem_lut_handle  
gem_madvise  
gem_media_fill  
gem_mmap  
gem_mmap_gtt  
gem_mmap_offset_exhaustion  
gem_mmap_wc  
gem_multi_bsd_sync_loop  
gem_partial_pwrite_pread  
gem_persistent_relocs  
gem_pin  
gem_pipe_control_store_loop  
gem_ppgtt  
gem_pread  
gem_pread_after_blit  
gem_pwrite  
gem_pwrite_pread  
gem_pwrite_snooped  
gem_read_read_speed  
gem_readwrite  
gem_reg_read  
gem_reloc_overflow  
gem_reloc_vs_gpu  
gem_render_copy  
gem_render_copy_redux  
gem_render_linear_blits  
gem_render_tiled_blits  
gem_request_retire  
gem_reset_stats  
gem_ringfill  
gem_ring_sync_copy  
gem_ring_sync_loop  
gem_seqno_wrap  
gem_set_tiling_vs_blt  
gem_set_tiling_vs_gtt  
gem_set_tiling_vs_pwrite  
gem_softpin  
gem_stolen  
gem_storedw_batches_loop  
gem_storedw_loop  
gem_streaming_writes  
gem_sync  
gem_threaded_access_tiled  
gem_tiled_blits  
gem_tiled_fence_blits  
gem_tiled_partial_pwrite_pread  
gem_tiled_pread_basic  
gem_tiled_pread_pwrite  
gem_tiled_swapping  
gem_tiled_wb  
gem_tiled_wc  
gem_tiling_max_stride  
gem_unfence_active_buffers  
gem_unref_active_buffers  
gem_userptr_blits  
gem_wait  
gem_workarounds  
gem_write_read_ring_switch  

Description

gem_bad_length

Test minimal bo_create and batchbuffer exec.


gem_bad_reloc

Simulates SNA behaviour using negative self-relocations for STATE_BASE_ADDRESS command packets.

Subtests

negative-reloc
negative-reloc-lut
negative-reloc-blt

gem_basic

Subtests

bad-close
create-close
create-fd-close

gem_busy

Basic check of busy-ioctl ABI.

Subtests

render
bsd
bsd1
bsd2
blt
vebox

gem_caching

Test snoop consistency when touching partial cachelines.

Subtests

reads
writes
read-writes

gem_close_race

Subtests

process-exit
gem-close-race

gem_concurrent_all

Test of pread/pwrite/mmap behavior when writing to active buffers.

Subtests

This test has over 100 subtests. Run gem_concurrent_all --list-subtests to list them.


gem_concurrent_blit

Test of pread/pwrite/mmap behavior when writing to active buffers.

Subtests

This test has over 100 subtests. Run gem_concurrent_blit --list-subtests to list them.


gem_cpu_reloc

Test the relocations through the CPU domain.

Subtests

basic
full

gem_create

This is a test for the extended & old gem_create ioctl, that includes allocation of object from stolen memory and shmem.

Subtests

stolen-invalid-flag
create-invalid-size
create-valid-nonaligned
create-invalid-nonaligned

gem_cs_prefetch

Test the CS prefetch behaviour on batches.

Subtests

basic-default
render
bsd
bsd1
bsd2
blt
vebox

gem_cs_tlb

Check whether we correctly invalidate the cs tlb.

Subtests

basic-default
render
bsd
bsd1
bsd2
blt
vebox

gem_ctx_bad_destroy

Negative test cases for destroy contexts.

Subtests

double-destroy
invalid-ctx
invalid-default-ctx
invalid-pad

gem_ctx_bad_exec

Test that context cannot be submitted to unsupported rings.

Subtests

render
bsd
blt
vebox

gem_ctx_basic

Basic test for memory and refcount leaks.


gem_ctx_create

Subtests

basic
invalid-pad

gem_ctx_exec

Test basic context switch functionality.

Subtests

basic
eviction
reset-pin-leak
lrc-lite-restore

gem_ctx_param_basic

Basic test for context set/get param input validation.

Subtests

basic
basic-default
invalid-ctx-get
invalid-ctx-set
invalid-size-get
invalid-size-set
non-root-set
root-set
non-root-set-no-zeromap
root-set-no-zeromap-enabled
root-set-no-zeromap-disabled
invalid-param-get
invalid-param-set

gem_ctx_thrash

Fill the Gobal GTT with context objects and VMs

Subtests

single
engines
processes
threads

gem_double_irq_loop

Basic check for missed IRQs on blt ring.


gem_dummy_reloc_loop

Check ring<->cpu sync using a dummy reloc.

Subtests

render
bsd
blt
vebox
bsd-ring1
bsd-ring2
mixed
mixed_multi_fd

gem_eio

Test that specific ioctls report a wedged GPU (EIO).

Subtests

throttle
execbuf
wait

gem_evict_alignment

Run a couple of big batches to force the unbind on misalignment code.

Subtests

minor-normal
major-normal
minor-interruptible
major-interruptible
minor-hang
major-hang

gem_evict_everything

Run a couple of big batches to force the eviction code.

Subtests

forked-normal
forked-interruptible
forked-swapping-normal
forked-swapping-interruptible
forked-multifd-normal
forked-multifd-interruptible
forked-swapping-multifd-normal
forked-swapping-multifd-interruptible
forked-mempressure-normal
forked-mempressure-interruptible
forked-swapping-mempressure-normal
forked-swapping-mempressure-interruptible
forked-multifd-mempressure-normal
forked-multifd-mempressure-interruptible
forked-swapping-multifd-mempressure-normal
forked-swapping-multifd-mempressure-interruptible
mlocked-normal
swapping-normal
minor-normal
major-normal
mlocked-interruptible
swapping-interruptible
minor-interruptible
major-interruptible
mlocked-hang
swapping-hang
minor-hang
major-hang

gem_exec_alignment

Exercises the basic execbuffer using object alignments

Subtests

single
many

gem_exec_bad_domains

Test whether the kernel rejects relocations with non-gpu domains.

Subtests

cpu-domain
gtt-domain
conflicting-write-domain
double-write-domain
invalid-gpu-domain

gem_exec_basic

Basic sanity check of execbuf-ioctl rings.

Subtests

basic-default
basic-render
basic-bsd
basic-bsd1
basic-bsd2
basic-blt
basic-vebox

gem_exec_big

Run a large nop batch to stress test the error capture code.


gem_exec_blt

Subtests

cold
normal
dumb-buf
cold-min
normal-min
dumb-buf-min
cold-max
normal-max
dumb-buf-max

gem_exec_faulting_reloc

Submit patches with relocations in memory that will fault.

Subtests

normal
no-prefault

gem_exec_lut_handle

Exercises the basic execbuffer using the handle LUT interface.


gem_exec_nop

Subtests

default
render
bsd
bsd1
bsd2
blt
vebox

gem_exec_params

Subtests

control
no-bsd
no-blt
no-vebox
invalid-ring
invalid-ring2
invalid-bsd-ring
invalid-bsd1-flag-on-render
invalid-bsd2-flag-on-render
invalid-bsd1-flag-on-blt
invalid-bsd2-flag-on-blt
invalid-bsd1-flag-on-vebox
invalid-bsd2-flag-on-vebox
rel-constants-invalid-ring
rel-constants-invalid-rel-gen5
rel-constants-invalid
sol-reset-invalid
sol-reset-not-gen7
secure-non-root
secure-non-master
invalid-flag
cliprects-invalid
rs-invalid-on-bsd-ring
rs-invalid-on-blt-ring
rs-invalid-on-vebox-ring
rs-invalid-gen
rsvd2-dirt
cliprects_ptr-dirt
DR1-dirt
DR4-dirt

gem_exec_parse

Subtests

basic-allowed
basic-rejected
registers
bitmasks
batch-without-end
cmd-crossing-page
oacontrol-tracking
chained-batch

gem_exec_reloc

Basic sanity check of execbuf-ioctl relocations.

Subtests

mmap-12
cpu-12
wc-12
gtt-12
mmap-13
cpu-13
wc-13
gtt-13
mmap-14
cpu-14
wc-14
gtt-14
mmap-15
cpu-15
wc-15
gtt-15
mmap-16
cpu-16
wc-16
gtt-16
mmap-17
cpu-17
wc-17
gtt-17
mmap-18
cpu-18
wc-18
gtt-18
mmap-19
cpu-19
wc-19
gtt-19
mmap-20
cpu-20
wc-20
gtt-20
mmap-21
cpu-21
wc-21
gtt-21
mmap-22
cpu-22
wc-22
gtt-22
mmap-23
cpu-23
wc-23
gtt-23
mmap-24
cpu-24
wc-24
gtt-24
mmap-25
cpu-25
wc-25
gtt-25
mmap-26
cpu-26
wc-26
gtt-26
mmap-27
cpu-27
wc-27
gtt-27
mmap-28
cpu-28
wc-28
gtt-28
mmap-29
cpu-29
wc-29
gtt-29
mmap-30
cpu-30
wc-30
gtt-30
mmap-31
cpu-31
wc-31
gtt-31
mmap-32
cpu-32
wc-32
gtt-32
gpu

gem_fd_exhaustion


gem_fenced_exec_thrash

Test execbuf fence accounting.

Subtests

2-spare-fences
no-spare-fences
no-spare-fences-busy
no-spare-fences-interruptible
no-spare-fences-busy-interruptible
too-many-fences

gem_fence_thrash

Subtests

bo-write-verify-none
bo-write-verify-x
bo-write-verify-y
bo-write-verify-threaded-none
bo-write-verify-threaded-x
bo-write-verify-threaded-y
bo-copy

gem_fence_upload

Subtests

performance
thread-contention
wc-contention
thread-performance-read
thread-performance-write
thread-performance-both

gem_flink_basic

Subtests

basic
double-flink
bad-flink
bad-open
flink-lifetime

gem_flink_race

Check for flink/open vs. gem close races.

Subtests

flink_name
flink_close

gem_gpgpu_fill


gem_gtt_cpu_tlb

Check whether gtt tlbs for cpu access are correctly invalidated.


gem_gtt_hog


gem_gtt_speed


gem_hangcheck_forcewake

Provoke the hangcheck timer on an otherwise idle system.


gem_largeobject


gem_linear_blits

Test doing many blits with a working set larger than the aperture size.

Subtests

basic
normal
interruptible

gem_lut_handle

Exercises the basic execbuffer using the handle LUT interface.


gem_madvise

Checks that the kernel reports EFAULT when trying to use purged bo.

Subtests

dontneed-before-mmap
dontneed-after-mmap
dontneed-before-pwrite
dontneed-before-exec

gem_media_fill

Basic test for the media_fill() function, a very simple workload for the Media pipeline.


gem_mmap

Subtests

bad-object
basic
short-mmap
basic-small-bo
big-bo
huge-bo
swap-bo

gem_mmap_gtt

Subtests

basic
basic-short
basic-copy
basic-read
basic-write
basic-write-gtt
coherency
basic-read-write
basic-write-read
basic-read-write-distinct
basic-write-read-distinct
fault-concurrent
basic-read-no-prefault
basic-write-no-prefault
basic-write-gtt-no-prefault
basic-write-cpu-read-gtt
basic-small-bo
basic-small-bo-tiledX
basic-small-bo-tiledY
big-bo
big-bo-tiledX
big-bo-tiledY
huge-bo
huge-bo-tiledX
huge-bo-tiledY
basic-small-copy
basic-small-copy-XY
medium-copy
medium-copy-XY
big-copy
big-copy-XY
huge-copy
huge-copy-XY

gem_mmap_offset_exhaustion

Checks whether the kernel handles mmap offset exhaustion correctly.


gem_mmap_wc

Subtests

invalid-flags
close
copy
read
write
coherency
write-gtt
read-write
write-read
read-write-distinct
write-read-distinct
fault-concurrent
read-no-prefault
write-no-prefault
write-gtt-no-prefault
write-cpu-read-wc
write-cpu-read-wc-unflushed
write-gtt-read-wc
set-cache-level

gem_multi_bsd_sync_loop

Basic check of ring<->ring sync using a dummy reloc.


gem_partial_pwrite_pread

Test pwrite/pread consistency when touching partial cachelines.

Subtests

reads
write
writes-after-reads
reads-uncached
write-uncached
writes-after-reads-uncached
reads-snoop
write-snoop
writes-after-reads-snoop
reads-display
write-display
writes-after-reads-display

gem_persistent_relocs

Test persistent relocations as used by uxa/libva.

Subtests

normal
interruptible
forked
forked-interruptible
forked-faulting-reloc
forked-interruptible-faulting-reloc
forked-thrashing
forked-interruptible-thrashing
forked-faulting-reloc-thrashing
forked-interruptible-faulting-reloc-thrashing
forked-thrash-inactive
forked-interruptible-thrash-inactive
forked-faulting-reloc-thrash-inactive
forked-interruptible-faulting-reloc-thrash-inactive

gem_pin

Exercises pinning of small buffer objects.


gem_pipe_control_store_loop

Test (TLB-)Coherency of pipe_control QW writes.

Subtests

fresh-buffer
reused-buffer

gem_ppgtt

Subtests

blt-vs-render-ctx0
blt-vs-render-ctxN
flink-and-close-vma-leak
flink-and-exit-vma-leak

gem_pread

Subtests

basic
uncached
snoop
display
stolen-normal
stolen-uncached
stolen-snoop
stolen-display
pagefault-pread

gem_pread_after_blit

Test pread behavior when getting values out of just-drawn-to buffers.

Subtests

default-normal
default-interruptible
default-hang
uncached-normal
uncached-interruptible
uncached-hang
snooped-normal
snooped-interruptible
snooped-hang
display-normal
display-interruptible
display-hang

gem_pwrite

Subtests

basic
uncached
snoop
display
stolen-normal
stolen-uncached
stolen-snoop
stolen-display
big-cpu
big-gtt
huge-cpu
huge-gtt

gem_pwrite_pread

Subtests

uncached-copy-correctness
uncached-copy-performance
uncached-pwrite-blt-gtt_mmap-correctness
uncached-pwrite-blt-gtt_mmap-performance
snooped-copy-correctness
snooped-copy-performance
snooped-pwrite-blt-cpu_mmap-correctness
snooped-pwrite-blt-cpu_mmap-performance
display-copy-correctness
display-copy-performance
display-pwrite-blt-gtt_mmap-correctness
display-pwrite-blt-gtt_mmap-performance

gem_pwrite_snooped

pwrite to a snooped bo then make it uncached and check that the GPU sees the data.


gem_read_read_speed

Test speed of concurrent reads between engines.

Subtests

read-read-1x1
read-write-1x1
write-read-1x1
write-write-1x1
read-read-128x128
read-write-128x128
write-read-128x128
write-write-128x128
read-read-256x256
read-write-256x256
write-read-256x256
write-write-256x256
read-read-512x512
read-write-512x512
write-read-512x512
write-write-512x512
read-read-1024x1024
read-write-1024x1024
write-read-1024x1024
write-write-1024x1024
read-read-2048x2048
read-write-2048x2048
write-read-2048x2048
write-write-2048x2048
read-read-4096x4096
read-write-4096x4096
write-read-4096x4096
write-write-4096x4096
read-read-8192x8192
read-write-8192x8192
write-read-8192x8192
write-write-8192x8192

gem_readwrite

Subtests

new-obj
beyond-EOB
read-write
read-bad-handle
write-bad-handle

gem_reg_read

Subtests

bad-register
timestamp-moving
timestamp-monotonic

gem_reloc_overflow

Check that kernel relocation overflows are caught.

Subtests

invalid-address
single-overflow
batch-start-unaligned
batch-end-unaligned
wrapped-overflow
source-offset-page-stradle-gen8-reloc-cpu
source-offset-end-gen8-reloc-cpu
source-offset-overflow-gen8-reloc-cpu
source-offset-end-reloc-cpu
source-offset-big-reloc-cpu
source-offset-negative-reloc-cpu
source-offset-unaligned-reloc-cpu
source-offset-page-stradle-gen8-reloc-gtt
source-offset-end-gen8-reloc-gtt
source-offset-overflow-gen8-reloc-gtt
source-offset-end-reloc-gtt
source-offset-big-reloc-gtt
source-offset-negative-reloc-gtt
source-offset-unaligned-reloc-gtt
buffercount-overflow

gem_reloc_vs_gpu

Test kernel relocations vs. gpu races.

Subtests

normal
faulting-reloc
interruptible
interruptible-hang
faulting-reloc-interruptible
faulting-reloc-interruptible-hang
forked
forked-interruptible
forked-faulting-reloc
forked-interruptible-faulting-reloc
forked-thrashing
forked-interruptible-thrashing
forked-faulting-reloc-thrashing
forked-interruptible-faulting-reloc-thrashing
forked-thrash-inactive
forked-interruptible-thrash-inactive
forked-faulting-reloc-thrash-inactive
forked-interruptible-faulting-reloc-thrash-inactive
forked-hang
forked-interruptible-hang
forked-faulting-reloc-hang
forked-interruptible-faulting-reloc-hang
forked-thrashing-hang
forked-interruptible-thrashing-hang
forked-faulting-reloc-thrashing-hang
forked-interruptible-faulting-reloc-thrashing-hang
forked-thrash-inactive-hang
forked-interruptible-thrash-inactive-hang
forked-faulting-reloc-thrash-inactive-hang
forked-interruptible-faulting-reloc-thrash-inactive-hang

gem_render_copy

Basic test for the render_copy() function.


gem_render_copy_redux

Advanced test for the render_copy() function.

Subtests

normal
interruptible
flink
flink-interruptible

gem_render_linear_blits

Subtests

basic
apperture-thrash
swap-thrash

gem_render_tiled_blits

Subtests

basic
apperture-thrash
swap-thrash

gem_request_retire

Collection of tests targeting request retirement code paths.

Subtests

retire-vma-not-inactive

gem_reset_stats

Subtests

params
params-ctx
reset-stats-default
reset-stats-ctx-default
ban-default
ban-ctx-default
reset-count-default
reset-count-ctx-default
unrelated-ctx-default
close-pending-default
close-pending-ctx-default
close-pending-fork-default
close-pending-fork-reverse-default
defer-hangcheck-default
reset-stats-render
reset-stats-ctx-render
ban-render
ban-ctx-render
reset-count-render
reset-count-ctx-render
unrelated-ctx-render
close-pending-render
close-pending-ctx-render
close-pending-fork-render
close-pending-fork-reverse-render
defer-hangcheck-render
reset-stats-bsd
reset-stats-ctx-bsd
ban-bsd
ban-ctx-bsd
reset-count-bsd
reset-count-ctx-bsd
unrelated-ctx-bsd
close-pending-bsd
close-pending-ctx-bsd
close-pending-fork-bsd
close-pending-fork-reverse-bsd
defer-hangcheck-bsd
reset-stats-bsd1
reset-stats-ctx-bsd1
ban-bsd1
ban-ctx-bsd1
reset-count-bsd1
reset-count-ctx-bsd1
unrelated-ctx-bsd1
close-pending-bsd1
close-pending-ctx-bsd1
close-pending-fork-bsd1
close-pending-fork-reverse-bsd1
defer-hangcheck-bsd1
reset-stats-bsd2
reset-stats-ctx-bsd2
ban-bsd2
ban-ctx-bsd2
reset-count-bsd2
reset-count-ctx-bsd2
unrelated-ctx-bsd2
close-pending-bsd2
close-pending-ctx-bsd2
close-pending-fork-bsd2
close-pending-fork-reverse-bsd2
defer-hangcheck-bsd2
reset-stats-blt
reset-stats-ctx-blt
ban-blt
ban-ctx-blt
reset-count-blt
reset-count-ctx-blt
unrelated-ctx-blt
close-pending-blt
close-pending-ctx-blt
close-pending-fork-blt
close-pending-fork-reverse-blt
defer-hangcheck-blt
reset-stats-vebox
reset-stats-ctx-vebox
ban-vebox
ban-ctx-vebox
reset-count-vebox
reset-count-ctx-vebox
unrelated-ctx-vebox
close-pending-vebox
close-pending-ctx-vebox
close-pending-fork-vebox
close-pending-fork-reverse-vebox
defer-hangcheck-vebox

gem_ringfill

Subtests

basic-default
render
bsd
bsd1
bsd2
blt
vebox
basic-default-interruptible
render-interruptible
bsd-interruptible
bsd1-interruptible
bsd2-interruptible
blt-interruptible
vebox-interruptible
basic-default-hang
render-hang
bsd-hang
bsd1-hang
bsd2-hang
blt-hang
vebox-hang
basic-default-child
render-child
bsd-child
bsd1-child
bsd2-child
blt-child
vebox-child
basic-default-forked
render-forked
bsd-forked
bsd1-forked
bsd2-forked
blt-forked
vebox-forked
basic-default-bomb
render-bomb
bsd-bomb
bsd1-bomb
bsd2-bomb
blt-bomb
vebox-bomb

gem_ring_sync_copy

Ensure inter-ring dependencies are respected.

Subtests

sync-render-blitter-write-read
sync-render-blitter-read-write
sync-render-blitter-write-write
sync-blitter-render-write-read
sync-blitter-render-read-write
sync-blitter-render-write-write

gem_ring_sync_loop

Basic check of ring<->ring write synchronisation.


gem_seqno_wrap

Runs blitcopy -> rendercopy with multiple buffers over wrap boundary.


gem_set_tiling_vs_blt

Check for proper synchronization of tiling changes vs. tiled gpu access.

Subtests

untiled-to-tiled
tiled-to-untiled
tiled-to-tiled

gem_set_tiling_vs_gtt

Check set_tiling vs gtt mmap coherency.


gem_set_tiling_vs_pwrite

Check set_tiling vs pwrite coherency.


gem_softpin

Subtests

invalid
softpin
overlap
noreloc
evict-active
evict-snoop
evict-hang

gem_stolen

This test verifies the exetended gem_create ioctl, that includes allocation of obj from stolen region

Subtests

stolen-clear
stolen-no-mmap
stolen-pwrite
stolen-pread
stolen-copy
large-object-alloc
stolen-fill-purge

gem_storedw_batches_loop

Subtests

normal
secure-dispatch
cached-mapping
uncached-mapping

gem_storedw_loop

Basic CS check using MI_STORE_DATA_IMM.

Subtests

basic-default
long-default
basic-render
long-render
basic-bsd
long-bsd
basic-bsd1
long-bsd1
basic-bsd2
long-bsd2
basic-blt
long-blt
basic-vebox
long-vebox

gem_streaming_writes

Test of streaming writes into active GPU sources

Subtests

cpu-sync
gtt-sync
wc-sync
cpu
gtt
wc
batch-cpu
batch-gtt
batch-wc
batch-reverse-cpu
batch-reverse-gtt
batch-reverse-wc

gem_sync

Basic check of ring<->ring write synchronisation.

Subtests

basic-default
forked-default
basic-render
forked-render
basic-bsd
forked-bsd
basic-bsd1
forked-bsd1
basic-bsd2
forked-bsd2
basic-blt
forked-blt
basic-vebox
forked-vebox
basic-all
forked-all

gem_threaded_access_tiled

Check parallel access to tiled memory.


gem_tiled_blits

Test doing many tiled blits, with a working set larger than the aperture size.

Subtests

basic
normal
interruptible

gem_tiled_fence_blits

Subtests

basic
normal

gem_tiled_partial_pwrite_pread

Test pwrite/pread consistency when touching partial cachelines.

Subtests

reads
writes
writes-after-reads

gem_tiled_pread_basic

Test pread behavior on tiled objects with respect to the reported swizzling value.


gem_tiled_pread_pwrite

Test swizzling by testing pwrite does the inverse of pread.


gem_tiled_swapping

Exercise swizzle code for swapping.

Subtests

non-threaded
threaded

gem_tiled_wb

This is a test of write-combining mmap's behavior on tiled objects with respect to the reported swizzling value.


gem_tiled_wc


gem_tiling_max_stride

Check that max fence stride works.


gem_unfence_active_buffers

Check for use-after-free in the fence stealing code.


gem_unref_active_buffers

Test unreferencing of active buffers.


gem_userptr_blits

Subtests

input-checking
usage-restrictions
invalid-null-pointer
invalid-gtt-mapping
forked-access
forbidden-operations
relocations
create-destroy-unsync
unsync-overlap
unsync-unmap
unsync-unmap-cycles
unsync-unmap-after-close
coherency-unsync
dmabuf-unsync
forked-unsync-normal
forked-unsync-interruptible
forked-unsync-swapping-normal
forked-unsync-swapping-interruptible
forked-unsync-multifd-normal
forked-unsync-multifd-interruptible
forked-unsync-swapping-multifd-normal
forked-unsync-swapping-multifd-interruptible
forked-unsync-mempressure-normal
forked-unsync-mempressure-interruptible
forked-unsync-swapping-mempressure-normal
forked-unsync-swapping-mempressure-interruptible
forked-unsync-multifd-mempressure-normal
forked-unsync-multifd-mempressure-interruptible
forked-unsync-swapping-multifd-mempressure-normal
forked-unsync-swapping-multifd-mempressure-interruptible
mlocked-unsync-normal
swapping-unsync-normal
minor-unsync-normal
major-unsync-normal
mlocked-unsync-interruptible
swapping-unsync-interruptible
minor-unsync-interruptible
major-unsync-interruptible
process-exit
process-exit-gtt
process-exit-busy
process-exit-gtt-busy
create-destroy-sync
sync-overlap
sync-unmap
sync-unmap-cycles
sync-unmap-after-close
stress-mm
stress-mm-invalidate-close
stress-mm-invalidate-close-overlap
coherency-sync
dmabuf-sync
forked-sync-normal
forked-sync-interruptible
forked-sync-swapping-normal
forked-sync-swapping-interruptible
forked-sync-multifd-normal
forked-sync-multifd-interruptible
forked-sync-swapping-multifd-normal
forked-sync-swapping-multifd-interruptible
forked-sync-mempressure-normal
forked-sync-mempressure-interruptible
forked-sync-swapping-mempressure-normal
forked-sync-swapping-mempressure-interruptible
forked-sync-multifd-mempressure-normal
forked-sync-multifd-mempressure-interruptible
forked-sync-swapping-multifd-mempressure-normal
forked-sync-swapping-multifd-mempressure-interruptible
mlocked-normal-sync
swapping-normal-sync
minor-normal-sync
major-normal-sync
mlocked-sync-interruptible
swapping-sync-interruptible
minor-sync-interruptible
major-sync-interruptible
access-control

gem_wait

Subtests

render_timeout
invalid-flags
invalid-buf

gem_workarounds

Subtests

read
reset
suspend-resume

gem_write_read_ring_switch

Check read/write syncpoints when switching rings.

Subtests

blt2render
blt2bsd
blt2vebox
blt2render-interruptible
blt2bsd-interruptible
blt2vebox-interruptible
intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/intel-gpu-tools-drmtest.html0000644000175000017500000004265312665337377025763 00000000000000 drmtest: intel-gpu-tools Reference Manual

drmtest

drmtest — Base library for drm tests and tools

Functions

#define ARRAY_SIZE()
#define ALIGN()
int drm_get_card ()
int drm_open_driver ()
int drm_open_driver_master ()
int drm_open_driver_render ()
void gem_quiescent_gpu ()
#define do_or_die()
#define do_ioctl()
#define do_ioctl_err()

Types and Values

#define DRIVER_ANY
#define DRIVER_INTEL
#define DRIVER_VC4
#define mmap64

Includes

#include <igt.h>

Description

This library contains the basic support for writing tests, with the most important part being the helper function to open drm device nodes.

But there's also a bit of other assorted stuff here.

Note that this library's header pulls in the i-g-t core and batchbuffer libraries as dependencies.

Functions

ARRAY_SIZE()

#define ARRAY_SIZE(arr) (sizeof(arr)/sizeof(arr[0]))

Macro to compute the size of the static array arr .

Parameters

arr

static array

 

ALIGN()

#define ALIGN(v, a) (((v) + (a)-1) & ~((a)-1))

Macro to align a value v to a specified unit a .

Parameters

v

value to be aligned

 

a

alignment unit in bytes

 

drm_get_card ()

int
drm_get_card (void);

Get an i915 drm card index number for use in /dev or /sys. The minor index of the legacy node is returned, not of the control or render node.

Returns

The i915 drm index or -1 on error


drm_open_driver ()

int
drm_open_driver (int chipset);

Open a drm legacy device node. This function always returns a valid file descriptor.

Parameters

chipset

OR'd flags for each chipset to search, eg. DRIVER_INTEL

 

Returns

a drm file descriptor


drm_open_driver_master ()

int
drm_open_driver_master (int chipset);

Open a drm legacy device node and ensure that it is drm master.

Parameters

chipset

OR'd flags for each chipset to search, eg. DRIVER_INTEL

 

Returns

The drm file descriptor or -1 on error


drm_open_driver_render ()

int
drm_open_driver_render (int chipset);

Open a drm render device node.

Parameters

chipset

OR'd flags for each chipset to search, eg. DRIVER_INTEL

 

Returns

The drm file descriptor or -1 on error


gem_quiescent_gpu ()

void
gem_quiescent_gpu (int fd);

Ensure the gpu is idle by launching a nop execbuf and stalling for it. This is automatically run when opening a drm device node and is also installed as an exit handler to have the best assurance that the test is run in a pristine and controlled environment.

This function simply allows tests to make additional calls in-between, if so desired.

Parameters

fd

open i915 drm file descriptor

 

do_or_die()

#define do_or_die(x) igt_assert((x) == 0)

Simple macro to execute x and check that it's return value is 0. Presumes that in any failure case the return value is non-zero and a precise error is logged into errno. Uses igt_assert() internally.

Parameters

x

command

 

do_ioctl()

#define             do_ioctl(fd, ioc, ioc_data)

This macro wraps drmIoctl() and uses igt_assert to check that it has been successfully executed.

Parameters

fd

open i915 drm file descriptor

 

ioc

ioctl op definition from drm headers

 

ioc_data

data pointer for the ioctl operation

 

do_ioctl_err()

#define             do_ioctl_err(fd, ioc, ioc_data, err)

This macro wraps drmIoctl() and uses igt_assert to check that it fails, returning a particular value in errno.

Parameters

fd

open i915 drm file descriptor

 

ioc

ioctl op definition from drm headers

 

ioc_data

data pointer for the ioctl operation

 

err

value to expect in errno

 

Types and Values

DRIVER_ANY

#define DRIVER_ANY 0x1

DRIVER_INTEL

#define DRIVER_INTEL (0x1 << 1)

DRIVER_VC4

#define DRIVER_VC4 (0x1 << 2)

mmap64

#define mmap64 igt_mmap64
intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/intel-gpu-tools-Draw.html0000644000175000017500000004143112665337377025167 00000000000000 Draw: intel-gpu-tools Reference Manual

Draw

Draw — drawing helpers for tests

Functions

const char * igt_draw_get_method_name ()
void igt_draw_rect ()
void igt_draw_rect_fb ()
void igt_draw_fill_fb ()

Types and Values

Includes

#include <igt.h>

Description

This library contains some functions for drawing rectangles on buffers using the many different drawing methods we have. It also contains some wrappers that make the process easier if you have the abstract objects in hand.

This library only claims support for some pixel formats, but adding support for more formats should be faily easy now that we support both 16bpp and 32bpp. If you need a new pixel format, make sure you update both this file and tests/kms_draw_crc.c.

Functions

igt_draw_get_method_name ()

const char *
igt_draw_get_method_name (enum igt_draw_method method);

Simple function to transform the enum into a string. Useful when naming subtests and printing debug messages.

Parameters

method

draw method

 

igt_draw_rect ()

void
igt_draw_rect (int fd,
               drm_intel_bufmgr *bufmgr,
               drm_intel_context *context,
               uint32_t buf_handle,
               uint32_t buf_size,
               uint32_t buf_stride,
               enum igt_draw_method method,
               int rect_x,
               int rect_y,
               int rect_w,
               int rect_h,
               uint32_t color,
               int bpp);

This function draws a colored rectangle on the destination buffer, allowing you to specify the method used to draw the rectangle.

Parameters

fd

the DRM file descriptor

 

bufmgr

the libdrm bufmgr, only required for IGT_DRAW_BLT and IGT_DRAW_RENDER

 

context

the context, can be NULL if you don't want to think about it

 

buf_handle

the handle of the buffer where you're going to draw to

 

buf_size

the size of the buffer

 

buf_stride

the stride of the buffer

 

method

method you're going to use to write to the buffer

 

rect_x

horizontal position on the buffer where your rectangle starts

 

rect_y

vertical position on the buffer where your rectangle starts

 

rect_w

width of the rectangle

 

rect_h

height of the rectangle

 

color

color of the rectangle

 

bpp

bits per pixel

 

igt_draw_rect_fb ()

void
igt_draw_rect_fb (int fd,
                  drm_intel_bufmgr *bufmgr,
                  drm_intel_context *context,
                  struct igt_fb *fb,
                  enum igt_draw_method method,
                  int rect_x,
                  int rect_y,
                  int rect_w,
                  int rect_h,
                  uint32_t color);

This is exactly the same as igt_draw_rect, but you can pass an igt_fb instead of manually providing its details. See igt_draw_rect.

Parameters

fd

the DRM file descriptor

 

bufmgr

the libdrm bufmgr, only required for IGT_DRAW_BLT and IGT_DRAW_RENDER

 

context

the context, can be NULL if you don't want to think about it

 

fb

framebuffer

 

method

method you're going to use to write to the buffer

 

rect_x

horizontal position on the buffer where your rectangle starts

 

rect_y

vertical position on the buffer where your rectangle starts

 

rect_w

width of the rectangle

 

rect_h

height of the rectangle

 

color

color of the rectangle

 

igt_draw_fill_fb ()

void
igt_draw_fill_fb (int fd,
                  struct igt_fb *fb,
                  uint32_t color);

This function just paints an igt_fb using the provided color.

Parameters

fd

the DRM file descriptor

 

fb

the FB that is going to be filled

 

color

the color you're going to paint it

 

Types and Values

enum igt_draw_method

Members

IGT_DRAW_MMAP_CPU

draw using a CPU mmap.

 

IGT_DRAW_MMAP_GTT

draw using a GTT mmap.

 

IGT_DRAW_MMAP_WC

draw using the WC mmap.

 

IGT_DRAW_PWRITE

draw using the pwrite ioctl.

 

IGT_DRAW_BLT

draw using the BLT ring.

 

IGT_DRAW_RENDER

draw using the render ring.

 

IGT_DRAW_METHOD_COUNT

useful for iterating through everything.

 
intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/intel-gpu-tools-Stats.html0000644000175000017500000011664212665337377025377 00000000000000 Stats: intel-gpu-tools Reference Manual

Stats

Stats — Tools for statistical analysis

Types and Values

Includes

#include <igt.h>

Description

Various tools to make sense of data.

igt_stats_t is a container of data samples. igt_stats_push() is used to add new samples and various results (mean, variance, standard deviation, ...) can then be retrieved.

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
igt_stats_t stats;

igt_stats_init(&stats, 8);

igt_stats_push(&stats, 2);
igt_stats_push(&stats, 4);
igt_stats_push(&stats, 4);
igt_stats_push(&stats, 4);
igt_stats_push(&stats, 5);
igt_stats_push(&stats, 5);
igt_stats_push(&stats, 7);
igt_stats_push(&stats, 9);

printf("Mean: %lf\n", igt_stats_get_mean(&stats));

igt_stats_fini(&stats);

Functions

igt_stats_init ()

void
igt_stats_init (igt_stats_t *stats);

Initializes an igt_stats_t instance. igt_stats_fini() must be called once finished with stats .

Parameters

stats

An igt_stats_t instance

 

igt_stats_init_with_size ()

void
igt_stats_init_with_size (igt_stats_t *stats,
                          unsigned int capacity);

Like igt_stats_init() but with a size to avoid reallocating the underlying array(s) when pushing new values. Useful if we have a good idea of the number of data points we want stats to hold.

igt_stats_fini() must be called once finished with stats .

Parameters

stats

An igt_stats_t instance

 

capacity

Number of data samples stats can contain

 

igt_stats_fini ()

void
igt_stats_fini (igt_stats_t *stats);

Frees resources allocated in igt_stats_init().

Parameters

stats

An igt_stats_t instance

 

igt_stats_is_population ()

bool
igt_stats_is_population (igt_stats_t *stats);

Parameters

stats

An igt_stats_t instance

 

Returns

true if stats represents a population, false if only a sample.

See igt_stats_set_population() for more details.


igt_stats_set_population ()

void
igt_stats_set_population (igt_stats_t *stats,
                          bool full_population);

In statistics, we usually deal with a subset of the full data (which may be a continuous or infinite set). Data analysis is then done on a sample of this population.

This has some importance as only having a sample of the data leads to biased estimators. We currently used the information given by this method to apply Bessel's correction to the variance.

Note that even if we manage to have an unbiased variance by multiplying a sample variance by the Bessel's correction, n/(n - 1), the standard deviation derived from the unbiased variance isn't itself unbiased. Statisticians talk about a "corrected" standard deviation.

When giving true to this function, the data set in stats is considered a full population. It's considered a sample of a bigger population otherwise.

When newly created, stats defaults to holding sample data.

Parameters

stats

An igt_stats_t instance

 

full_population

Whether we're dealing with sample data or a full population

 

igt_stats_push ()

void
igt_stats_push (igt_stats_t *stats,
                uint64_t value);

Adds a new value to the stats dataset and converts the igt_stats from an integer collection to a floating point one.

Parameters

stats

An igt_stats_t instance

 

value

An floating point

 

igt_stats_push_float ()

void
igt_stats_push_float (igt_stats_t *stats,
                      double value);

igt_stats_push_array ()

void
igt_stats_push_array (igt_stats_t *stats,
                      const uint64_t *values,
                      unsigned int n_values);

Adds an array of values to the stats dataset.

Parameters

stats

An igt_stats_t instance

 

values

A pointer to an array of data points.

[array length=n_values]

n_values

The number of data points to add

 

igt_stats_get_min ()

uint64_t
igt_stats_get_min (igt_stats_t *stats);

Retrieves the minimal value in stats

Parameters

stats

An igt_stats_t instance

 

igt_stats_get_max ()

uint64_t
igt_stats_get_max (igt_stats_t *stats);

Retrieves the maximum value in stats

Parameters

stats

An igt_stats_t instance

 

igt_stats_get_range ()

uint64_t
igt_stats_get_range (igt_stats_t *stats);

Retrieves the range of the values in stats . The range is the difference between the highest and the lowest value.

The range can be a deceiving characterization of the values, because there can be extreme minimal and maximum values that are just anomalies. Prefer the interquatile range (see igt_stats_get_iqr()) or an histogram.

Parameters

stats

An igt_stats_t instance

 

igt_stats_get_quartiles ()

void
igt_stats_get_quartiles (igt_stats_t *stats,
                         double *q1,
                         double *q2,
                         double *q3);

Retrieves the quartiles of the stats dataset.

Parameters

stats

An igt_stats_t instance

 

q1

lower or 25th quartile.

[out]

q2

median or 50th quartile.

[out]

q3

upper or 75th quartile.

[out]

igt_stats_get_iqr ()

double
igt_stats_get_iqr (igt_stats_t *stats);

Retrieves the interquartile range (IQR) of the stats dataset.

Parameters

stats

An igt_stats_t instance

 

igt_stats_get_iqm ()

double
igt_stats_get_iqm (igt_stats_t *stats);

Retrieves the interquartile mean (IQM) of the stats dataset.

The interquartile mean is a "statistical measure of central tendency". It is a truncated mean that discards the lowest and highest 25% of values, and calculates the mean value of the remaining central values.

It's useful to hide outliers in measurements (due to cold cache etc).

Parameters

stats

An igt_stats_t instance

 

igt_stats_get_mean ()

double
igt_stats_get_mean (igt_stats_t *stats);

Retrieves the mean of the stats dataset.

Parameters

stats

An igt_stats_t instance

 

igt_stats_get_trimean ()

double
igt_stats_get_trimean (igt_stats_t *stats);

Retrieves the trimean of the stats dataset.

The trimean is a the most efficient 3-point L-estimator, even more robust than the median at estimating the average of a sample population.

Parameters

stats

An igt_stats_t instance

 

igt_stats_get_median ()

double
igt_stats_get_median (igt_stats_t *stats);

Retrieves the median of the stats dataset.

Parameters

stats

An igt_stats_t instance

 

igt_stats_get_variance ()

double
igt_stats_get_variance (igt_stats_t *stats);

Retrieves the variance of the stats dataset.

Parameters

stats

An igt_stats_t instance

 

igt_stats_get_std_deviation ()

double
igt_stats_get_std_deviation (igt_stats_t *stats);

Retrieves the standard deviation of the stats dataset.

Parameters

stats

An igt_stats_t instance

 

Types and Values

igt_stats_t

typedef struct {
	union {
		uint64_t *values_u64;
		double *values_f;
	};
	unsigned int n_values;
	unsigned int is_float : 1;
} igt_stats_t;

Members

uint64_t *values_u64;

An array containing pushed integer values

 

double *values_f;

An array containing pushed float values

 
intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/igt-kms-tests.html0000644000175000017500000011750212665337377023750 00000000000000 KMS Tests: intel-gpu-tools Reference Manual

KMS Tests

KMS Tests — Mode setting tests

Description

kms_3d

Tests 3D mode setting.


kms_addfb_basic

Subtests

unused-handle
unused-pitches
unused-offsets
unused-modifier
clobberred-modifier
no-handle
basic
bad-pitch-0
bad-pitch-32
bad-pitch-63
bad-pitch-128
bad-pitch-256
bad-pitch-1024
bad-pitch-999
bad-pitch-65536
basic-X-tiled
framebuffer-vs-set-tiling
tile-pitch-mismatch
basic-Y-tiled
size-max
too-wide
too-high
bo-too-small
small-bo
bo-too-small-due-to-tiling
addfb25-modifier-no-flag
addfb25-bad-modifier
addfb25-X-tiled-mismatch
addfb25-X-tiled
addfb25-framebuffer-vs-set-tiling
addfb25-Y-tiled
addfb25-Yf-tiled
addfb25-Y-tiled-small

kms_atomic

Test atomic modesetting API

Subtests

plane_overlay_legacy
plane_primary_legacy
plane_cursor_legacy
plane_invalid_params
crtc_invalid_params
atomic_invalid_params

kms_chv_cursor_fail

Exercise CHV pipe C cursor fail

Subtests

pipe-A-64x64-left-edge
pipe-A-64x64-right-edge
pipe-A-64x64-top-edge
pipe-A-64x64-bottom-edge
pipe-B-64x64-left-edge
pipe-B-64x64-right-edge
pipe-B-64x64-top-edge
pipe-B-64x64-bottom-edge
pipe-C-64x64-left-edge
pipe-C-64x64-right-edge
pipe-C-64x64-top-edge
pipe-C-64x64-bottom-edge
pipe-A-128x128-left-edge
pipe-A-128x128-right-edge
pipe-A-128x128-top-edge
pipe-A-128x128-bottom-edge
pipe-B-128x128-left-edge
pipe-B-128x128-right-edge
pipe-B-128x128-top-edge
pipe-B-128x128-bottom-edge
pipe-C-128x128-left-edge
pipe-C-128x128-right-edge
pipe-C-128x128-top-edge
pipe-C-128x128-bottom-edge
pipe-A-256x256-left-edge
pipe-A-256x256-right-edge
pipe-A-256x256-top-edge
pipe-A-256x256-bottom-edge
pipe-B-256x256-left-edge
pipe-B-256x256-right-edge
pipe-B-256x256-top-edge
pipe-B-256x256-bottom-edge
pipe-C-256x256-left-edge
pipe-C-256x256-right-edge
pipe-C-256x256-top-edge
pipe-C-256x256-bottom-edge

kms_crtc_background_color

Test crtc background color feature


kms_cursor_crc

Use the display CRC support to validate cursor plane functionality. The test will position the cursor plane either fully onscreen, partially onscreen, or fully offscreen, using either a fully opaque or fully transparent surface. In each case it then reads the PF CRC and compares it with the CRC value obtained when the cursor plane was disabled.

Subtests

cursor-size-change
cursor-64x64-onscreen
cursor-64x64-offscreen
cursor-64x64-sliding
cursor-64x64-random
cursor-64x64-dpms
cursor-64x64-suspend
cursor-64x64-rapid-movement
cursor-64x21-onscreen
cursor-64x21-offscreen
cursor-64x21-sliding
cursor-64x21-random
cursor-128x128-onscreen
cursor-128x128-offscreen
cursor-128x128-sliding
cursor-128x128-random
cursor-128x128-dpms
cursor-128x128-suspend
cursor-128x128-rapid-movement
cursor-128x42-onscreen
cursor-128x42-offscreen
cursor-128x42-sliding
cursor-128x42-random
cursor-256x256-onscreen
cursor-256x256-offscreen
cursor-256x256-sliding
cursor-256x256-random
cursor-256x256-dpms
cursor-256x256-suspend
cursor-256x256-rapid-movement
cursor-256x85-onscreen
cursor-256x85-offscreen
cursor-256x85-sliding
cursor-256x85-random
cursor-512x512-onscreen
cursor-512x512-offscreen
cursor-512x512-sliding
cursor-512x512-random
cursor-512x512-dpms
cursor-512x512-suspend
cursor-512x512-rapid-movement
cursor-512x170-onscreen
cursor-512x170-offscreen
cursor-512x170-sliding
cursor-512x170-random

kms_draw_crc

Subtests

draw-method-xrgb8888-mmap-cpu-untiled
draw-method-xrgb8888-mmap-cpu-tiled
draw-method-xrgb8888-mmap-gtt-untiled
draw-method-xrgb8888-mmap-gtt-tiled
draw-method-xrgb8888-mmap-wc-untiled
draw-method-xrgb8888-mmap-wc-tiled
draw-method-xrgb8888-pwrite-untiled
draw-method-xrgb8888-pwrite-tiled
draw-method-xrgb8888-blt-untiled
draw-method-xrgb8888-blt-tiled
draw-method-xrgb8888-render-untiled
draw-method-xrgb8888-render-tiled
draw-method-rgb565-mmap-cpu-untiled
draw-method-rgb565-mmap-cpu-tiled
draw-method-rgb565-mmap-gtt-untiled
draw-method-rgb565-mmap-gtt-tiled
draw-method-rgb565-mmap-wc-untiled
draw-method-rgb565-mmap-wc-tiled
draw-method-rgb565-pwrite-untiled
draw-method-rgb565-pwrite-tiled
draw-method-rgb565-blt-untiled
draw-method-rgb565-blt-tiled
draw-method-rgb565-render-untiled
draw-method-rgb565-render-tiled
draw-method-xrgb2101010-mmap-cpu-untiled
draw-method-xrgb2101010-mmap-cpu-tiled
draw-method-xrgb2101010-mmap-gtt-untiled
draw-method-xrgb2101010-mmap-gtt-tiled
draw-method-xrgb2101010-mmap-wc-untiled
draw-method-xrgb2101010-mmap-wc-tiled
draw-method-xrgb2101010-pwrite-untiled
draw-method-xrgb2101010-pwrite-tiled
draw-method-xrgb2101010-blt-untiled
draw-method-xrgb2101010-blt-tiled
draw-method-xrgb2101010-render-untiled
draw-method-xrgb2101010-render-tiled
fill-fb

kms_fbc_crc

Performs various write operations to the scanout buffer while FBC is enabled. CRC checks will be used to make sure the modifications to scanout buffer are detected.

Subtests

page_flip
mmap_cpu
mmap_gtt
blt
render
context
page_flip_and_mmap_cpu
page_flip_and_mmap_gtt
page_flip_and_blt
page_flip_and_render
page_flip_and_context

kms_fbcon_fbt

Test the relationship between fbcon and the frontbuffer tracking infrastructure.

Subtests

fbc
psr
fbc-suspend
psr-suspend

kms_fence_pin_leak

Exercises full ppgtt fence pin_count leak in the kernel.


kms_flip

Subtests

This test has over 100 subtests. Run kms_flip --list-subtests to list them.


kms_flip_event_leak

This test tries to provoke the kernel into leaking a pending page flip event when the fd is closed before the flip has completed. The test itself won't fail even if the kernel leaks the event, but the resulting dmesg WARN will indicate a failure.


kms_flip_tiling

Test page flips and tiling scenarios

Subtests

flip-changes-tiling
flip-changes-tiling-Y
flip-changes-tiling-Yf
flip-X-tiled
flip-Y-tiled
flip-Yf-tiled
flip-to-X-tiled
flip-to-Y-tiled
flip-to-Yf-tiled

kms_force_connector_basic

Check the debugfs force connector/edid features work correctly.

Subtests

force-load-detect
force-connector-state
force-edid
prune-stale-modes

kms_frontbuffer_tracking

Test the Kernel's frontbuffer tracking mechanism and its related features: FBC and PSR

Subtests

This test has over 100 subtests. Run kms_frontbuffer_tracking --list-subtests to list them.


kms_legacy_colorkey

Check that the legacy set colorkey ioctl only works on sprite planes.


kms_mmap_write_crc

Use the display CRC support to validate mmap write to an already uncached future scanout buffer.


kms_mmio_vs_cs_flip

Subtests

setplane_vs_cs_flip
setcrtc_vs_cs_flip

kms_panel_fitting

Test display panel fitting


kms_pipe_b_c_ivb

Exercise the FDI lane bifurcation code for IVB in the kernel by settingdifferent combinations of modes for pipes B and C.

Subtests

pipe-B-dpms-off-modeset-pipe-C
pipe-B-double-modeset-then-modeset-pipe-C
disable-pipe-B-enable-pipe-C
from-pipe-C-to-B-with-3-lanes
enable-pipe-C-while-B-has-3-lanes

kms_pipe_crc_basic

Subtests

bad-pipe
bad-source
bad-nb-words-1
bad-nb-words-3
read-crc-pipe-A
read-crc-pipe-A-frame-sequence
nonblocking-crc-pipe-A
nonblocking-crc-pipe-A-frame-sequence
suspend-read-crc-pipe-A
hang-read-crc-pipe-A
read-crc-pipe-B
read-crc-pipe-B-frame-sequence
nonblocking-crc-pipe-B
nonblocking-crc-pipe-B-frame-sequence
suspend-read-crc-pipe-B
hang-read-crc-pipe-B
read-crc-pipe-C
read-crc-pipe-C-frame-sequence
nonblocking-crc-pipe-C
nonblocking-crc-pipe-C-frame-sequence
suspend-read-crc-pipe-C
hang-read-crc-pipe-C

kms_plane

Subtests

plane-position-covered-pipe-A-plane-1
plane-position-hole-pipe-A-plane-1
plane-position-hole-dpms-pipe-A-plane-1
plane-panning-top-left-pipe-A-plane-1
plane-panning-bottom-right-pipe-A-plane-1
plane-panning-bottom-right-suspend-pipe-A-plane-1
plane-position-covered-pipe-A-plane-2
plane-position-hole-pipe-A-plane-2
plane-position-hole-dpms-pipe-A-plane-2
plane-panning-top-left-pipe-A-plane-2
plane-panning-bottom-right-pipe-A-plane-2
plane-panning-bottom-right-suspend-pipe-A-plane-2
plane-position-covered-pipe-A-plane-3
plane-position-hole-pipe-A-plane-3
plane-position-hole-dpms-pipe-A-plane-3
plane-panning-top-left-pipe-A-plane-3
plane-panning-bottom-right-pipe-A-plane-3
plane-panning-bottom-right-suspend-pipe-A-plane-3
plane-position-covered-pipe-B-plane-1
plane-position-hole-pipe-B-plane-1
plane-position-hole-dpms-pipe-B-plane-1
plane-panning-top-left-pipe-B-plane-1
plane-panning-bottom-right-pipe-B-plane-1
plane-panning-bottom-right-suspend-pipe-B-plane-1
plane-position-covered-pipe-B-plane-2
plane-position-hole-pipe-B-plane-2
plane-position-hole-dpms-pipe-B-plane-2
plane-panning-top-left-pipe-B-plane-2
plane-panning-bottom-right-pipe-B-plane-2
plane-panning-bottom-right-suspend-pipe-B-plane-2
plane-position-covered-pipe-B-plane-3
plane-position-hole-pipe-B-plane-3
plane-position-hole-dpms-pipe-B-plane-3
plane-panning-top-left-pipe-B-plane-3
plane-panning-bottom-right-pipe-B-plane-3
plane-panning-bottom-right-suspend-pipe-B-plane-3
plane-position-covered-pipe-C-plane-1
plane-position-hole-pipe-C-plane-1
plane-position-hole-dpms-pipe-C-plane-1
plane-panning-top-left-pipe-C-plane-1
plane-panning-bottom-right-pipe-C-plane-1
plane-panning-bottom-right-suspend-pipe-C-plane-1
plane-position-covered-pipe-C-plane-2
plane-position-hole-pipe-C-plane-2
plane-position-hole-dpms-pipe-C-plane-2
plane-panning-top-left-pipe-C-plane-2
plane-panning-bottom-right-pipe-C-plane-2
plane-panning-bottom-right-suspend-pipe-C-plane-2
plane-position-covered-pipe-C-plane-3
plane-position-hole-pipe-C-plane-3
plane-position-hole-dpms-pipe-C-plane-3
plane-panning-top-left-pipe-C-plane-3
plane-panning-bottom-right-pipe-C-plane-3
plane-panning-bottom-right-suspend-pipe-C-plane-3

kms_plane_scaling

Test display plane scaling


kms_psr_sink_crc

Subtests

psr_basic
primary_page_flip
primary_mmap_gtt
primary_mmap_gtt_waiting
primary_mmap_cpu
primary_blt
primary_render
sprite_mmap_gtt
sprite_mmap_gtt_waiting
sprite_mmap_cpu
sprite_blt
sprite_render
sprite_plane_move
sprite_plane_onoff
cursor_mmap_gtt
cursor_mmap_gtt_waiting
cursor_mmap_cpu
cursor_blt
cursor_render
cursor_plane_move
cursor_plane_onoff
dpms_off_psr_active
dpms_off_psr_exit
suspend_psr_active
suspend_psr_exit

kms_pwrite_crc

Use the display CRC support to validate pwrite to an already uncached future scanout buffer.


kms_render

Subtests

direct-render
gpu-blit

kms_rotation_crc

Subtests

primary-rotation-180
sprite-rotation-180
cursor-rotation-180
primary-rotation-90
primary-rotation-270
sprite-rotation-90
sprite-rotation-270
sprite-rotation-90-pos-100-0
bad-pixel-format
bad-tiling
primary-rotation-90-flip-stress
primary-rotation-90-Y-tiled
exhaust-fences

kms_setmode

Subtests

basic-clone-single-crtc
invalid-clone-single-crtc
invalid-clone-exclusive-crtc
clone-exclusive-crtc

kms_sink_crc_basic


kms_sysfs_edid_timing


kms_universal_plane

Subtests

universal-plane-pipe-A-functional
universal-plane-pipe-A-sanity
disable-primary-vs-flip-pipe-A
cursor-fb-leak-pipe-A
universal-plane-gen9-features-pipe-A
universal-plane-pipe-B-functional
universal-plane-pipe-B-sanity
disable-primary-vs-flip-pipe-B
cursor-fb-leak-pipe-B
universal-plane-gen9-features-pipe-B
universal-plane-pipe-C-functional
universal-plane-pipe-C-sanity
disable-primary-vs-flip-pipe-C
cursor-fb-leak-pipe-C
universal-plane-gen9-features-pipe-C

kms_vblank

Test speed of WaitVblank.

Subtests

accuracy
query-idle
query-busy
wait-idle
wait-busy
intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/igt-core-tests.html0000644000175000017500000001212012665337377024074 00000000000000 Core Tests: intel-gpu-tools Reference Manual

Core Tests

Core Tests — Tests for core drm ioctls and behaviour.

Description

core_auth

Call drmGetMagic() and drmAuthMagic() and see if it behaves.

Subtests

basic-auth
many-magics

core_getclient

Tests the DRM_IOCTL_GET_CLIENT ioctl.


core_get_client_auth

Subtests

simple
master-drop

core_getstats

Tests the DRM_IOCTL_GET_STATS ioctl.


core_getversion

Tests the DRM_IOCTL_GET_VERSION ioctl and libdrm's drmGetVersion() interface to it.


core_prop_blob

Tests behaviour of mass-data 'blob' properties.

Subtests

basic
blob-prop-core
blob-prop-validate
blob-prop-lifetime
blob-multiple

core_setmaster_vs_auth

Check that drop/setMaster correctly transfer master state

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left: 0; height: 3em; } } intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/left-insensitive.png0000644000175000017500000000061312665337377024337 00000000000000PNG  IHDRabKGD pHYs B(xtIMEƫqIDAT8͒NQ@pds`*4@W@ A!Ԇ@6^ 5hxIH R`sQp̙339B|sKEQTK@۝΁i^~Wʆ`0TJ6TcYn6A ƀ~߱>}ǭs; lYkwr 5U= /" "uU=ɲlArDzp5I4^E+P3Ɯq_p ̥iUYp=#IENDB`intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/annotation-glossary.html0000644000175000017500000000514112665337377025243 00000000000000 Annotation Glossary: intel-gpu-tools Reference Manual

Annotation Glossary

A

array

Parameter points to an array of items.

O

out

Parameter for returning results. Default is transfer full.

T

transfer full

Free data after the code is done.

intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/intel-gpu-tools-Batch-Buffer.html0000644000175000017500000020611212665337377026521 00000000000000 Batch Buffer: intel-gpu-tools Reference Manual

Batch Buffer

Batch Buffer — Batchbuffer and blitter support

Types and Values

#define BATCH_SZ
#define BATCH_RESERVED
struct intel_batchbuffer
#define I915_TILING_Yf
#define I915_TILING_Ys
struct igt_buf

Includes

#include <igt.h>

Description

This library provides some basic support for batchbuffers and using the blitter engine based upon libdrm. A new batchbuffer is allocated with intel_batchbuffer_alloc() and for simple blitter commands submitted with intel_batchbuffer_flush().

It also provides some convenient macros to easily emit commands into batchbuffers. All those macros presume that a pointer to a intel_batchbuffer structure called batch is in scope. The basic macros are BEGIN_BATCH, OUT_BATCH, OUT_RELOC and ADVANCE_BATCH.

Note that this library's header pulls in the i-g-t core library as a dependency.

Functions

intel_batchbuffer_alloc ()

struct intel_batchbuffer *
intel_batchbuffer_alloc (drm_intel_bufmgr *bufmgr,
                         uint32_t devid);

Allocates a new batchbuffer object. devid must be supplied since libdrm doesn't expose it directly.

Parameters

bufmgr

libdrm buffer manager

 

devid

pci device id of the drm device

 

Returns

The allocated and initialized batchbuffer object.


intel_batchbuffer_set_context ()

void
intel_batchbuffer_set_context (struct intel_batchbuffer *batch,
                               drm_intel_context *ctx);

intel_batchbuffer_free ()

void
intel_batchbuffer_free (struct intel_batchbuffer *batch);

Releases all resource of the batchbuffer object batch .

Parameters

batch

batchbuffer object

 

intel_batchbuffer_flush ()

void
intel_batchbuffer_flush (struct intel_batchbuffer *batch);

Submits the batch for execution on the blitter engine, selecting the right ring depending upon the hardware platform.

Parameters

batch

batchbuffer object

 

intel_batchbuffer_flush_on_ring ()

void
intel_batchbuffer_flush_on_ring (struct intel_batchbuffer *batch,
                                 int ring);

Submits the batch for execution on ring .

Parameters

batch

batchbuffer object

 

ring

execbuf ring flag

 

intel_batchbuffer_flush_with_context ()

void
intel_batchbuffer_flush_with_context (struct intel_batchbuffer *batch,
                                      drm_intel_context *context);

Submits the batch for execution on the render engine with the supplied hardware context.

Parameters

batch

batchbuffer object

 

context

libdrm hardware context object

 

intel_batchbuffer_reset ()

void
intel_batchbuffer_reset (struct intel_batchbuffer *batch);

Resets batch by allocating a new gem buffer object as backing storage.

Parameters

batch

batchbuffer object

 

intel_batchbuffer_data ()

void
intel_batchbuffer_data (struct intel_batchbuffer *batch,
                        const void *data,
                        unsigned int bytes);

This transfers the given data into the batchbuffer. Note that the length must be DWORD aligned, i.e. multiples of 32bits.

Parameters

batch

batchbuffer object

 

data

pointer to the data to write into the batchbuffer

 

bytes

number of bytes to write into the batchbuffer

 

intel_batchbuffer_emit_reloc ()

void
intel_batchbuffer_emit_reloc (struct intel_batchbuffer *batch,
                              drm_intel_bo *buffer,
                              uint64_t delta,
                              uint32_t read_domains,
                              uint32_t write_domain,
                              int fenced);

Emits both a libdrm relocation entry pointing at buffer and the pre-computed DWORD of batch 's presumed gpu address plus the supplied delta into batch .

Note that fenced is only relevant if buffer is actually tiled.

This is the only way buffers get added to the validate list.

Parameters

batch

batchbuffer object

 

buffer

relocation target libdrm buffer object

 

delta

delta value to add to buffer 's gpu address

 

read_domains

gem domain bits for the relocation

 

write_domain

gem domain bit for the relocation

 

fenced

whether this gpu access requires fences

 

intel_batchbuffer_space ()

unsigned int
intel_batchbuffer_space (struct intel_batchbuffer *batch);

intel_batchbuffer_emit_dword ()

void
intel_batchbuffer_emit_dword (struct intel_batchbuffer *batch,
                              uint32_t dword);

intel_batchbuffer_require_space ()

void
intel_batchbuffer_require_space (struct intel_batchbuffer *batch,
                                 unsigned int sz);

BEGIN_BATCH()

#define             BEGIN_BATCH(n, r)

Prepares a batch to emit n DWORDS, flushing it if there's not enough space available.

This macro needs a pointer to an intel_batchbuffer structure called batch in scope.

Parameters

n

number of DWORDS to emit

 

r

number of RELOCS to emit

 

OUT_BATCH()

#define OUT_BATCH(d) intel_batchbuffer_emit_dword(batch, d)

Emits d into a batch.

This macro needs a pointer to an intel_batchbuffer structure called batch in scope.

Parameters

d

DWORD to emit

 

OUT_RELOC_FENCED()

#define             OUT_RELOC_FENCED(buf, read_domains, write_domain, delta)

Emits a fenced relocation into a batch.

This macro needs a pointer to an intel_batchbuffer structure called batch in scope.

Parameters

buf

relocation target libdrm buffer object

 

read_domains

gem domain bits for the relocation

 

write_domain

gem domain bit for the relocation

 

delta

delta value to add to buffer 's gpu address

 

OUT_RELOC()

#define             OUT_RELOC(buf, read_domains, write_domain, delta)

Emits a normal, unfenced relocation into a batch.

This macro needs a pointer to an intel_batchbuffer structure called batch in scope.

Parameters

buf

relocation target libdrm buffer object

 

read_domains

gem domain bits for the relocation

 

write_domain

gem domain bit for the relocation

 

delta

delta value to add to buffer 's gpu address

 

ADVANCE_BATCH

#define             ADVANCE_BATCH()

Completes the batch command emission sequence started with BEGIN_BATCH.

This macro needs a pointer to an intel_batchbuffer structure called batch in scope.


BLIT_COPY_BATCH_START()

#define             BLIT_COPY_BATCH_START(flags)

COLOR_BLIT_COPY_BATCH_START()

#define             COLOR_BLIT_COPY_BATCH_START(flags)

intel_blt_copy ()

void
intel_blt_copy (struct intel_batchbuffer *batch,
                drm_intel_bo *src_bo,
                int src_x1,
                int src_y1,
                int src_pitch,
                drm_intel_bo *dst_bo,
                int dst_x1,
                int dst_y1,
                int dst_pitch,
                int width,
                int height,
                int bpp);

This emits a 2D copy operation using blitter commands into the supplied batch buffer object.

Parameters

batch

batchbuffer object

 

src_bo

source libdrm buffer object

 

src_x1

source pixel x-coordination

 

src_y1

source pixel y-coordination

 

src_pitch

src_bo 's pitch in bytes

 

dst_bo

destination libdrm buffer object

 

dst_x1

destination pixel x-coordination

 

dst_y1

destination pixel y-coordination

 

dst_pitch

dst_bo 's pitch in bytes

 

width

width of the copied rectangle

 

height

height of the copied rectangle

 

bpp

bits per pixel

 

intel_copy_bo ()

void
intel_copy_bo (struct intel_batchbuffer *batch,
               drm_intel_bo *dst_bo,
               drm_intel_bo *src_bo,
               long int size);

This emits a copy operation using blitter commands into the supplied batch buffer object. A total of size bytes from the start of src_bo is copied over to dst_bo . Note that size must be page-aligned.

Parameters

batch

batchbuffer object

 

src_bo

source libdrm buffer object

 

dst_bo

destination libdrm buffer object

 

size

size of the copy range in bytes

 

igt_buf_width ()

unsigned
igt_buf_width (struct igt_buf *buf);

Computes the width in 32-bit pixels of the given buffer.

Parameters

buf

the i-g-t buffer object

 

Returns

The width of the buffer.


igt_buf_height ()

unsigned
igt_buf_height (struct igt_buf *buf);

Computes the height in 32-bit pixels of the given buffer.

Parameters

buf

the i-g-t buffer object

 

Returns

The height of the buffer.


igt_blitter_fast_copy ()

void
igt_blitter_fast_copy (struct intel_batchbuffer *batch,
                       struct igt_buf *src,
                       unsigned  src_x,
                       unsigned  src_y,
                       unsigned  width,
                       unsigned  height,
                       struct igt_buf *dst,
                       unsigned  dst_x,
                       unsigned  dst_y);

Copy src into dst using the gen9 fast copy blitter command.

The source and destination surfaces cannot overlap.

Parameters

batch

batchbuffer object

 

src

source i-g-t buffer object

 

src_x

source pixel x-coordination

 

src_y

source pixel y-coordination

 

width

width of the copied rectangle

 

height

height of the copied rectangle

 

dst

destination i-g-t buffer object

 

dst_x

destination pixel x-coordination

 

dst_y

destination pixel y-coordination

 

igt_blitter_fast_copy__raw ()

void
igt_blitter_fast_copy__raw (int fd,
                            uint32_t src_handle,
                            unsigned int src_stride,
                            unsigned int src_tiling,
                            unsigned int src_x,
                            unsigned  src_y,
                            unsigned int width,
                            unsigned int height,
                            uint32_t dst_handle,
                            unsigned int dst_stride,
                            unsigned int dst_tiling,
                            unsigned int dst_x,
                            unsigned  dst_y);

Like igt_blitter_fast_copy(), but talking to the kernel directly.

Parameters

fd

file descriptor of the i915 driver

 

src_handle

GEM handle of the source buffer

 

src_stride

Stride (in bytes) of the source buffer

 

src_tiling

Tiling mode of the source buffer

 

src_x

X coordinate of the source region to copy

 

src_y

Y coordinate of the source region to copy

 

width

Width of the region to copy

 

height

Height of the region to copy

 

dst_handle

GEM handle of the source buffer

 

dst_stride

Stride (in bytes) of the destination buffer

 

dst_tiling

Tiling mode of the destination buffer

 

dst_x

X coordinate of destination

 

dst_y

Y coordinate of destination

 

igt_render_copyfunc_t ()

void
(*igt_render_copyfunc_t) (struct intel_batchbuffer *batch,
                          drm_intel_context *context,
                          struct igt_buf *src,
                          unsigned  src_x,
                          unsigned  src_y,
                          unsigned  width,
                          unsigned  height,
                          struct igt_buf *dst,
                          unsigned  dst_x,
                          unsigned  dst_y);

This is the type of the per-platform render copy functions. The platform-specific implementation can be obtained by calling igt_get_render_copyfunc().

A render copy function will emit a batchbuffer to the kernel which executes the specified blit copy operation using the render engine. context is optional and can be NULL.

Parameters

batch

batchbuffer object

 

context

libdrm hardware context to use

 

src

source i-g-t buffer object

 

src_x

source pixel x-coordination

 

src_y

source pixel y-coordination

 

width

width of the copied rectangle

 

height

height of the copied rectangle

 

dst

destination i-g-t buffer object

 

dst_x

destination pixel x-coordination

 

dst_y

destination pixel y-coordination

 

igt_get_render_copyfunc ()

igt_render_copyfunc_t
igt_get_render_copyfunc (int devid);

Parameters

devid

pci device id

 

Returns

The platform-specific render copy function pointer for the device specified with devid . Will return NULL when no render copy function is implemented.


igt_fillfunc_t ()

void
(*igt_fillfunc_t) (struct intel_batchbuffer *batch,
                   struct igt_buf *dst,
                   unsigned  x,
                   unsigned  y,
                   unsigned  width,
                   unsigned  height,
                   uint8_t color);

This is the type of the per-platform fill functions using media or gpgpu pipeline. The platform-specific implementation can be obtained by calling igt_get_media_fillfunc() or igt_get_gpgpu_fillfunc().

A fill function will emit a batchbuffer to the kernel which executes the specified blit fill operation using the media/gpgpu engine.

Parameters

batch

batchbuffer object

 

dst

destination i-g-t buffer object

 

x

destination pixel x-coordination

 

y

destination pixel y-coordination

 

width

width of the filled rectangle

 

height

height of the filled rectangle

 

color

fill color to use

 

igt_get_media_fillfunc ()

igt_fillfunc_t
igt_get_media_fillfunc (int devid);

Parameters

devid

pci device id

 

Returns

The platform-specific media fill function pointer for the device specified with devid . Will return NULL when no media fill function is implemented.


igt_get_gpgpu_fillfunc ()

igt_fillfunc_t
igt_get_gpgpu_fillfunc (int devid);

Parameters

devid

pci device id

 

Returns

The platform-specific gpgpu fill function pointer for the device specified with devid . Will return NULL when no gpgpu fill function is implemented.


igt_media_spinfunc_t ()

void
(*igt_media_spinfunc_t) (struct intel_batchbuffer *batch,
                         struct igt_buf *dst,
                         uint32_t spins);

This is the type of the per-platform media spin functions. The platform-specific implementation can be obtained by calling igt_get_media_spinfunc().

The media spin function emits a batchbuffer for the render engine with the media pipeline selected. The workload consists of a single thread which spins in a tight loop the requested number of times. Each spin increments a counter whose final 32-bit value is written to the destination buffer on completion. This utility provides a simple way to keep the render engine busy for a set time for various tests.

Parameters

batch

batchbuffer object

 

dst

destination i-g-t buffer object

 

spins

number of loops to execute

 

igt_get_media_spinfunc ()

igt_media_spinfunc_t
igt_get_media_spinfunc (int devid);

Parameters

devid

pci device id

 

Returns

The platform-specific media spin function pointer for the device specified with devid . Will return NULL when no media spin function is implemented.

Types and Values

BATCH_SZ

#define BATCH_SZ 4096

BATCH_RESERVED

#define BATCH_RESERVED 16

struct intel_batchbuffer

struct intel_batchbuffer {
	drm_intel_bufmgr *bufmgr;
	uint32_t devid;
	int gen;

	drm_intel_context *ctx;
	drm_intel_bo *bo;

	uint8_t buffer[BATCH_SZ];
	uint8_t *ptr, *end;
	uint8_t *state;
};

I915_TILING_Yf

#define I915_TILING_Yf 3

I915_TILING_Ys

#define I915_TILING_Ys 4

struct igt_buf

struct igt_buf {
    drm_intel_bo *bo;
    uint32_t stride;
    uint32_t tiling;
    uint32_t *data;
    uint32_t size;
};

This is a i-g-t buffer object wrapper structure which augments the baseline libdrm buffer object with suitable data needed by the render copy and the fill functions.

Members

drm_intel_bo *bo;

underlying libdrm buffer object

 

uint32_t stride;

stride of the buffer

 

uint32_t tiling;

tiling mode bits

 

uint32_t *data;

pointer to the memory mapping of the buffer

 

uint32_t size;

size of the buffer object

 
intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/intel-gpu-tools-ioctl-wrappers.html0000644000175000017500000031616512665337377027256 00000000000000 ioctl wrappers: intel-gpu-tools Reference Manual

ioctl wrappers

ioctl wrappers — ioctl wrappers and related functions

Functions

drm_intel_bo * gem_handle_to_libdrm_bo ()
void gem_get_tiling ()
void gem_set_tiling ()
void gem_set_caching ()
uint32_t gem_get_caching ()
uint32_t gem_flink ()
uint32_t gem_open ()
void gem_close ()
void gem_write ()
void gem_read ()
void gem_set_domain ()
int gem_wait ()
void gem_sync ()
bool gem_create__has_stolen_support ()
uint32_t gem_create_stolen ()
uint32_t gem_create ()
void gem_execbuf ()
void * gem_mmap__gtt ()
void * gem_mmap__cpu ()
bool gem_mmap__has_wc ()
void * gem_mmap__wc ()
#define gem_require_stolen_support()
#define gem_require_mmap_wc()
int gem_madvise ()
uint32_t gem_context_create ()
void gem_context_destroy ()
void gem_context_require_ban_period ()
void gem_context_require_param ()
void gem_context_get_param ()
void gem_context_set_param ()
void gem_userptr ()
void gem_sw_finish ()
bool gem_bo_busy ()
bool gem_has_llc ()
int gem_get_num_rings ()
bool gem_has_enable_ring ()
bool gem_has_bsd ()
bool gem_has_blt ()
bool gem_has_vebox ()
bool gem_has_bsd2 ()
int gem_gtt_type ()
bool gem_uses_ppgtt ()
bool gem_uses_full_ppgtt ()
int gem_available_fences ()
uint64_t gem_available_aperture_size ()
uint64_t gem_aperture_size ()
uint64_t gem_global_aperture_size ()
uint64_t gem_mappable_aperture_size ()
bool gem_has_softpin ()
void gem_require_caching ()
void gem_require_ring ()
int prime_handle_to_fd ()
int prime_handle_to_fd_for_mmap ()
uint32_t prime_fd_to_handle ()
off_t prime_get_size ()
void prime_sync_start ()
void prime_sync_end ()
#define local_fourcc_mod_code()
void igt_require_fb_modifiers ()

Includes

#include <igt.h>

Description

This helper library contains simple functions to wrap the raw drm/i915 kernel ioctls. The normal versions never pass any error codes to the caller and use igt_assert() to check for error conditions instead. For some ioctls raw wrappers which do pass on error codes are available. These raw wrappers have a __ prefix.

For wrappers which check for feature bits there can also be two versions: The normal one simply returns a boolean to the caller. But when skipping the testcase entirely is the right action then it's better to use igt_skip() directly in the wrapper. Such functions have _require_ in their name to distinguish them.

Functions

gem_handle_to_libdrm_bo ()

drm_intel_bo *
gem_handle_to_libdrm_bo (drm_intel_bufmgr *bufmgr,
                         int fd,
                         const char *name,
                         uint32_t handle);

This helper function imports a raw gem buffer handle into the libdrm buffer manager.

Parameters

bufmgr

libdrm buffer manager instance

 

fd

open i915 drm file descriptor

 

name

buffer name in libdrm

 

handle

gem buffer object handle

 

Returns

The imported libdrm buffer manager object.


gem_get_tiling ()

void
gem_get_tiling (int fd,
                uint32_t handle,
                uint32_t *tiling,
                uint32_t *swizzle);

This wraps the GET_TILING ioctl.

Parameters

fd

open i915 drm file descriptor

 

handle

gem buffer object handle

 

tiling

(out) tiling mode of the gem buffer

 

swizzle

(out) bit 6 swizzle mode

 

gem_set_tiling ()

void
gem_set_tiling (int fd,
                uint32_t handle,
                uint32_t tiling,
                uint32_t stride);

This wraps the SET_TILING ioctl.

Parameters

fd

open i915 drm file descriptor

 

handle

gem buffer object handle

 

tiling

tiling mode bits

 

stride

stride of the buffer when using a tiled mode, otherwise must be 0

 

gem_set_caching ()

void
gem_set_caching (int fd,
                 uint32_t handle,
                 uint32_t caching);

This wraps the SET_CACHING ioctl. Note that this function internally calls igt_require() when SET_CACHING isn't available, hence automatically skips the test. Therefore always extract test logic which uses this into its own subtest.

Parameters

fd

open i915 drm file descriptor

 

handle

gem buffer object handle

 

caching

caching mode bits

 

gem_get_caching ()

uint32_t
gem_get_caching (int fd,
                 uint32_t handle);

This wraps the GET_CACHING ioctl.

Parameters

fd

open i915 drm file descriptor

 

handle

gem buffer object handle

 

Returns

The current caching mode bits.


gem_flink ()

uint32_t
gem_flink (int fd,
           uint32_t handle);

This wraps the GEM_FLINK ioctl, which is used to export a gem buffer object into the device-global flink namespace. See gem_open() for opening such a buffer name on a different i915 drm file descriptor.

Parameters

fd

open i915 drm file descriptor

 

handle

file-private gem buffer object handle

 

Returns

The created flink buffer name.


gem_open ()

uint32_t
gem_open (int fd,
          uint32_t name);

This wraps the GEM_OPEN ioctl, which is used to import an flink name.

Parameters

fd

open i915 drm file descriptor

 

name

flink buffer name

 

Returns

gem file-private buffer handle of the open object.


gem_close ()

void
gem_close (int fd,
           uint32_t handle);

This wraps the GEM_CLOSE ioctl, which to release a file-private gem buffer handle.

Parameters

fd

open i915 drm file descriptor

 

handle

gem buffer object handle

 

gem_write ()

void
gem_write (int fd,
           uint32_t handle,
           uint64_t offset,
           const void *buf,
           uint64_t length);

This wraps the PWRITE ioctl, which is to upload a linear data to a subrange of a gem buffer object.

Parameters

fd

open i915 drm file descriptor

 

handle

gem buffer object handle

 

offset

offset within the buffer of the subrange

 

buf

pointer to the data to write into the buffer

 

length

size of the subrange

 

gem_read ()

void
gem_read (int fd,
          uint32_t handle,
          uint64_t offset,
          void *buf,
          uint64_t length);

This wraps the PREAD ioctl, which is to download a linear data to a subrange of a gem buffer object.

Parameters

fd

open i915 drm file descriptor

 

handle

gem buffer object handle

 

offset

offset within the buffer of the subrange

 

buf

pointer to the data to read into

 

length

size of the subrange

 

gem_set_domain ()

void
gem_set_domain (int fd,
                uint32_t handle,
                uint32_t read_domains,
                uint32_t write_domain);

This wraps the SET_DOMAIN ioctl, which is used to control the coherency of the gem buffer object between the cpu and gtt mappings. It is also use to synchronize with outstanding rendering in general, but for that use-case please have a look at gem_sync().

Parameters

fd

open i915 drm file descriptor

 

handle

gem buffer object handle

 

read_domains

gem domain bits for read access

 

write_domain

gem domain bit for write access

 

gem_wait ()

int
gem_wait (int fd,
          uint32_t handle,
          int64_t *timeout_ns);

gem_sync ()

void
gem_sync (int fd,
          uint32_t handle);

This functions waits for outstanding rendering to complete.

Parameters

fd

open i915 drm file descriptor

 

handle

gem buffer object handle

 

gem_create__has_stolen_support ()

bool
gem_create__has_stolen_support (int fd);

gem_create_stolen ()

uint32_t
gem_create_stolen (int fd,
                   uint64_t size);

This wraps the new GEM_CREATE ioctl, which allocates a new gem buffer object of size and placement in stolen memory region.

Parameters

fd

open i915 drm file descriptor

 

size

desired size of the buffer

 

Returns

The file-private handle of the created buffer object


gem_create ()

uint32_t
gem_create (int fd,
            uint64_t size);

This wraps the GEM_CREATE ioctl, which allocates a new gem buffer object of size .

Parameters

fd

open i915 drm file descriptor

 

size

desired size of the buffer

 

Returns

The file-private handle of the created buffer object


gem_execbuf ()

void
gem_execbuf (int fd,
             struct drm_i915_gem_execbuffer2 *execbuf);

This wraps the EXECBUFFER2 ioctl, which submits a batchbuffer for the gpu to run.

Parameters

fd

open i915 drm file descriptor

 

execbuf

execbuffer data structure

 

gem_mmap__gtt ()

void *
gem_mmap__gtt (int fd,
               uint32_t handle,
               uint64_t size,
               unsigned  prot);

Like __gem_mmap__gtt() except we assert on failure.

Parameters

fd

open i915 drm file descriptor

 

handle

gem buffer object handle

 

size

size of the gem buffer

 

prot

memory protection bits as used by mmap()

 

Returns

A pointer to the created memory mapping


gem_mmap__cpu ()

void *
gem_mmap__cpu (int fd,
               uint32_t handle,
               uint64_t offset,
               uint64_t size,
               unsigned  prot);

Like __gem_mmap__cpu() except we assert on failure.

Parameters

fd

open i915 drm file descriptor

 

handle

gem buffer object handle

 

offset

offset in the gem buffer of the mmap arena

 

size

size of the mmap arena

 

prot

memory protection bits as used by mmap()

 

Returns

A pointer to the created memory mapping


gem_mmap__has_wc ()

bool
gem_mmap__has_wc (int fd);

gem_mmap__wc ()

void *
gem_mmap__wc (int fd,
              uint32_t handle,
              uint64_t offset,
              uint64_t size,
              unsigned  prot);

Like __gem_mmap__wc() except we assert on failure.

Parameters

fd

open i915 drm file descriptor

 

handle

gem buffer object handle

 

offset

offset in the gem buffer of the mmap arena

 

size

size of the mmap arena

 

prot

memory protection bits as used by mmap()

 

Returns

A pointer to the created memory mapping


gem_require_stolen_support()

#define             gem_require_stolen_support(fd)

Test macro to query whether support for allocating objects from stolen memory is available. Automatically skips through igt_require() if not.

Parameters

fd

open i915 drm file descriptor

 

gem_require_mmap_wc()

#define gem_require_mmap_wc(fd) igt_require(gem_mmap__has_wc(fd))

Feature test macro to query whether direct (i.e. cpu access path, bypassing the gtt) write-combine memory mappings are available. Automatically skips through igt_require() if not.

Parameters

fd

open i915 drm file descriptor

 

gem_madvise ()

int
gem_madvise (int fd,
             uint32_t handle,
             int state);

This is a wraps the MADVISE ioctl, which is used in libdrm to implement opportunistic buffer object caching. Objects in the cache are set to DONTNEED (internally in the kernel tracked as purgeable objects). When such a cached object is in need again it must be set back to WILLNEED before first use.

Parameters

fd

open i915 drm file descriptor

 

handle

gem buffer object handle

 

state

desired madvise state

 

Returns

When setting the madvise state to WILLNEED this returns whether the backing storage was still available or not.


gem_context_create ()

uint32_t
gem_context_create (int fd);

This is a wraps the CONTEXT_CREATE ioctl, which is used to allocate a new hardware context. Not that similarly to gem_set_caching() this wrapper calls igt_require() internally to correctly skip on kernels and platforms where hw context support is not available.

Parameters

fd

open i915 drm file descriptor

 

Returns

The id of the allocated hw context.


gem_context_destroy ()

void
gem_context_destroy (int fd,
                     uint32_t ctx_id);

This is a wraps the CONTEXT_DESTROY ioctl, which is used to free a hardware context.

Parameters

fd

open i915 drm file descriptor

 

ctx_id

i915 hw context id

 

gem_context_require_ban_period ()

void
gem_context_require_ban_period (int fd);

gem_context_require_param ()

void
gem_context_require_param (int fd,
                           uint64_t param);

Feature test macro to query whether hw context parameter support for param is available. Automatically skips through igt_require() if not.

Parameters

fd

open i915 drm file descriptor

 

param

i915 hw context parameter

 

gem_context_get_param ()

void
gem_context_get_param (int fd,
                       struct local_i915_gem_context_param *p);

This is a wraps the CONTEXT_GET_PARAM ioctl, which is used to free a hardware context. Not that similarly to gem_set_caching() this wrapper calls igt_require() internally to correctly skip on kernels and platforms where hw context parameter support is not available.

Parameters

fd

open i915 drm file descriptor

 

p

i915 hw context parameter

 

gem_context_set_param ()

void
gem_context_set_param (int fd,
                       struct local_i915_gem_context_param *p);

This is a wraps the CONTEXT_SET_PARAM ioctl, which is used to free a hardware context. Not that similarly to gem_set_caching() this wrapper calls igt_require() internally to correctly skip on kernels and platforms where hw context parameter support is not available.

Parameters

fd

open i915 drm file descriptor

 

p

i915 hw context parameter

 

gem_userptr ()

void
gem_userptr (int fd,
             void *ptr,
             int size,
             int read_only,
             uint32_t flags,
             uint32_t *handle);

Returns userptr handle for the GEM object.

Parameters

fd

open i915 drm file descriptor

 

ptr

userptr pointer to be passed

 

size

desired size of the buffer

 

read_only

specify whether userptr is opened read only

 

flags

other userptr flags

 

handle

returned handle for the object

 

gem_sw_finish ()

void
gem_sw_finish (int fd,
               uint32_t handle);

This is a wraps the SW_FINISH ioctl, which is used to flush out frontbuffer rendering done through the direct cpu memory mappings. Shipping userspace does _not_ call this after frontbuffer rendering through gtt memory mappings.

Parameters

fd

open i915 drm file descriptor

 

handle

gem buffer object handle

 

gem_bo_busy ()

bool
gem_bo_busy (int fd,
             uint32_t handle);

This is a wraps the BUSY ioctl, which tells whether a buffer object is still actively used by the gpu in a execbuffer.

Parameters

fd

open i915 drm file descriptor

 

handle

gem buffer object handle

 

Returns

The busy state of the buffer object.


gem_has_llc ()

bool
gem_has_llc (int fd);

gem_get_num_rings ()

int
gem_get_num_rings (int fd);

Feature test macro to query the number of available rings. This is useful in test loops which need to step through all rings and similar logic.

For more explicit tests of ring availability see gem_has_enable_ring() and the ring specific versions like gem_has_bsd().

Parameters

fd

open i915 drm file descriptor

 

Returns

The number of available rings.


gem_has_enable_ring ()

bool
gem_has_enable_ring (int fd,
                     int param);

Feature test macro to query whether a specific ring is available.

Parameters

fd

open i915 drm file descriptor

 

param

ring flag bit as used in gem_execbuf()

 

Returns

Whether the ring is available or not.


gem_has_bsd ()

bool
gem_has_bsd (int fd);

Feature test macro to query whether the BSD ring is available. This is simply a specific version of gem_has_enable_ring() for the BSD ring.

Note that recent Bspec calls this the VCS ring for Video Command Submission.

Parameters

fd

open i915 drm file descriptor

 

Returns

Whether the BSD ring is available or not.


gem_has_blt ()

bool
gem_has_blt (int fd);

Feature test macro to query whether the blitter ring is available. This is simply a specific version of gem_has_enable_ring() for the blitter ring.

Note that recent Bspec calls this the BCS ring for Blitter Command Submission.

Parameters

fd

open i915 drm file descriptor

 

Returns

Whether the blitter ring is available or not.


gem_has_vebox ()

bool
gem_has_vebox (int fd);

Feature test macro to query whether the vebox ring is available. This is simply a specific version of gem_has_enable_ring() for the vebox ring.

Note that recent Bspec calls this the VECS ring for Video Enhancement Command Submission.

Parameters

fd

open i915 drm file descriptor

 

Returns

Whether the vebox ring is available or not.


gem_has_bsd2 ()

bool
gem_has_bsd2 (int fd);

Feature test macro to query whether the BSD2 ring is available. This is simply a specific version of gem_has_enable_ring() for the BSD2 ring.

Note that recent Bspec calls this the VCS ring for Video Command Submission.

Parameters

fd

open i915 drm file descriptor

 

Returns

Whether the BSD ring is avaible or not.


gem_gtt_type ()

int
gem_gtt_type (int fd);

Feature test macro to check what type of gtt is being used by the kernel: 0 - global gtt 1 - aliasing ppgtt 2 - full ppgtt, limited to 32bit address space 3 - full ppgtt, 64bit address space

Parameters

fd

open i915 drm file descriptor

 

Returns

Type of gtt being used.


gem_uses_ppgtt ()

bool
gem_uses_ppgtt (int fd);

Feature test macro to check whether the kernel internally uses ppgtt to execute batches. Note that this is also true when we're using full ppgtt.

Parameters

fd

open i915 drm file descriptor

 

Returns

Whether batches are run through ppgtt.


gem_uses_full_ppgtt ()

bool
gem_uses_full_ppgtt (int fd);

Feature test macro to check whether the kernel internally uses full per-process gtt to execute batches. Note that this is also true when we're using full 64b ppgtt.

Parameters

fd

open i915 drm file descriptor

 

Returns

Whether batches are run through full ppgtt.


gem_available_fences ()

int
gem_available_fences (int fd);

Feature test macro to query the kernel for the number of available fences usable in a batchbuffer. Only relevant for pre-gen4.

Parameters

fd

open i915 drm file descriptor

 

Returns

The number of available fences.


gem_available_aperture_size ()

uint64_t
gem_available_aperture_size (int fd);

Feature test macro to query the kernel for the available gpu aperture size usable in a batchbuffer.

Parameters

fd

open i915 drm file descriptor

 

Returns

The available gtt address space size.


gem_aperture_size ()

uint64_t
gem_aperture_size (int fd);

Feature test macro to query the kernel for the total gpu aperture size.

Parameters

fd

open i915 drm file descriptor

 

Returns

The total gtt address space size.


gem_global_aperture_size ()

uint64_t
gem_global_aperture_size (int fd);

Feature test macro to query the kernel for the global gpu aperture size. This is the area available for the kernel to perform address translations.

Returns

The mappable gtt address space size.


gem_mappable_aperture_size ()

uint64_t
gem_mappable_aperture_size (void);

Feature test macro to query the kernel for the mappable gpu aperture size. This is the area available for GTT memory mappings.

Returns

The mappable gtt address space size.


gem_has_softpin ()

bool
gem_has_softpin (int fd);

Feature test macro to query whether the softpinning functionality is supported.

Parameters

fd

open i915 drm file descriptor

 

Returns

Whether softpin support is available


gem_require_caching ()

void
gem_require_caching (int fd);

Feature test macro to query whether buffer object caching control is available. Automatically skips through igt_require() if not.

Parameters

fd

open i915 drm file descriptor

 

gem_require_ring ()

void
gem_require_ring (int fd,
                  int ring_id);

Feature test macro to query whether a specific ring is available. In contrast to gem_has_enable_ring() this automagically skips if the ring isn't available by calling igt_require().

Parameters

fd

open i915 drm file descriptor

 

ring_id

ring flag bit as used in gem_execbuf()

 

prime_handle_to_fd ()

int
prime_handle_to_fd (int fd,
                    uint32_t handle);

This wraps the PRIME_HANDLE_TO_FD ioctl, which is used to export a gem buffer object into a global (i.e. potentially cross-device) dma-buf file-descriptor handle.

Parameters

fd

open i915 drm file descriptor

 

handle

file-private gem buffer object handle

 

Returns

The created dma-buf fd handle.


prime_handle_to_fd_for_mmap ()

int
prime_handle_to_fd_for_mmap (int fd,
                             uint32_t handle);

Same as prime_handle_to_fd above but with DRM_RDWR capabilities, which can be useful for writing into the mmap'ed dma-buf file-descriptor.

Parameters

fd

open i915 drm file descriptor

 

handle

file-private gem buffer object handle

 

Returns

The created dma-buf fd handle or -1 if the ioctl fails.


prime_fd_to_handle ()

uint32_t
prime_fd_to_handle (int fd,
                    int dma_buf_fd);

This wraps the PRIME_FD_TO_HANDLE ioctl, which is used to import a dma-buf file-descriptor into a gem buffer object.

Parameters

fd

open i915 drm file descriptor

 

dma_buf_fd

dma-buf fd handle

 

Returns

The created gem buffer object handle.


prime_get_size ()

off_t
prime_get_size (int dma_buf_fd);

This wraps the lseek() protocol used to query the invariant size of a dma-buf. Not all kernels support this, which is check with igt_require() and so will result in automagic test skipping.

Parameters

dma_buf_fd

dma-buf fd handle

 

Returns

The lifetime-invariant size of the dma-buf object.


prime_sync_start ()

void
prime_sync_start (int dma_buf_fd,
                  bool write);

Parameters

dma_buf_fd

dma-buf fd handle

 

prime_sync_end ()

void
prime_sync_end (int dma_buf_fd,
                bool write);

Parameters

dma_buf_fd

dma-buf fd handle

 

local_fourcc_mod_code()

#define             local_fourcc_mod_code(vendor, val)

igt_require_fb_modifiers ()

void
igt_require_fb_modifiers (int fd);

Requires presence of DRM_CAP_ADDFB2_MODIFIERS.

Parameters

fd

Open DRM file descriptor.

 

Types and Values

struct local_i915_gem_context_param

struct local_i915_gem_context_param {
	uint32_t context;
	uint32_t size;
	uint64_t param;
#define LOCAL_CONTEXT_PARAM_BAN_PERIOD 0x1
#define LOCAL_CONTEXT_PARAM_NO_ZEROMAP 0x2
#define LOCAL_CONTEXT_PARAM_GTT_SIZE 0x3
	uint64_t value;
};

LOCAL_I915_GEM_USERPTR

#define LOCAL_I915_GEM_USERPTR       0x33

LOCAL_IOCTL_I915_GEM_USERPTR

#define LOCAL_IOCTL_I915_GEM_USERPTR DRM_IOWR (DRM_COMMAND_BASE + LOCAL_I915_GEM_USERPTR, struct local_i915_gem_userptr)

struct local_i915_gem_userptr

struct local_i915_gem_userptr {
	uint64_t user_ptr;
	uint64_t user_size;
	uint32_t flags;
#define LOCAL_I915_USERPTR_READ_ONLY (1<<0)
#define LOCAL_I915_USERPTR_UNSYNCHRONIZED (1<<31)
	uint32_t handle;
};

struct local_dma_buf_sync

struct local_dma_buf_sync {
	uint64_t flags;
};

LOCAL_DMA_BUF_SYNC_READ

#define LOCAL_DMA_BUF_SYNC_READ      (1 << 0)

LOCAL_DMA_BUF_SYNC_WRITE

#define LOCAL_DMA_BUF_SYNC_WRITE     (2 << 0)

LOCAL_DMA_BUF_SYNC_RW

#define LOCAL_DMA_BUF_SYNC_RW        (LOCAL_DMA_BUF_SYNC_READ | LOCAL_DMA_BUF_SYNC_WRITE)

LOCAL_DMA_BUF_SYNC_START

#define LOCAL_DMA_BUF_SYNC_START     (0 << 2)

LOCAL_DMA_BUF_SYNC_END

#define LOCAL_DMA_BUF_SYNC_END       (1 << 2)

LOCAL_DMA_BUF_SYNC_VALID_FLAGS_MASK

#define             LOCAL_DMA_BUF_SYNC_VALID_FLAGS_MASK

LOCAL_DMA_BUF_BASE

#define LOCAL_DMA_BUF_BASE 'b'

LOCAL_DMA_BUF_IOCTL_SYNC

#define LOCAL_DMA_BUF_IOCTL_SYNC _IOW(LOCAL_DMA_BUF_BASE, 0, struct local_dma_buf_sync)

DRM_RDWR

#define DRM_RDWR O_RDWR

struct local_drm_mode_fb_cmd2

struct local_drm_mode_fb_cmd2 {
	uint32_t fb_id;
	uint32_t width, height;
	uint32_t pixel_format;
	uint32_t flags;
	uint32_t handles[4];
	uint32_t pitches[4];
	uint32_t offsets[4];
	uint64_t modifier[4];
};

LOCAL_DRM_MODE_FB_MODIFIERS

#define LOCAL_DRM_MODE_FB_MODIFIERS (1<<1)

LOCAL_DRM_FORMAT_MOD_VENDOR_INTEL

#define LOCAL_DRM_FORMAT_MOD_VENDOR_INTEL 0x01

LOCAL_DRM_FORMAT_MOD_NONE

#define LOCAL_DRM_FORMAT_MOD_NONE (0)

LOCAL_I915_FORMAT_MOD_X_TILED

#define LOCAL_I915_FORMAT_MOD_X_TILED local_fourcc_mod_code(INTEL, 1)

LOCAL_I915_FORMAT_MOD_Y_TILED

#define LOCAL_I915_FORMAT_MOD_Y_TILED local_fourcc_mod_code(INTEL, 2)

LOCAL_I915_FORMAT_MOD_Yf_TILED

#define LOCAL_I915_FORMAT_MOD_Yf_TILED local_fourcc_mod_code(INTEL, 3)

LOCAL_DRM_IOCTL_MODE_ADDFB2

#define             LOCAL_DRM_IOCTL_MODE_ADDFB2

LOCAL_DRM_CAP_ADDFB2_MODIFIERS

#define LOCAL_DRM_CAP_ADDFB2_MODIFIERS 0x10
intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/intel-gpu-tools.devhelp20000644000175000017500000020136012665337377025040 00000000000000 intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/igt-prime-tests.html0000644000175000017500000001601012665337377024262 00000000000000 Prime Tests: intel-gpu-tools Reference Manual

Prime Tests

Prime Tests — Buffer sharing tests

Description

prime_mmap

Subtests

test_correct
test_map_unmap
test_reprime
test_forked
test_correct_cpu_write
test_forked_cpu_write
test_refcounting
test_dup
test_userptr
test_errors
test_invalid_sync_flags
test_aperture_limit

prime_mmap_coherency

Test dma-buf mmap on !llc platforms mostly and provoke coherency bugs so we know for sure where we need the sync ioctls.

Subtests

read
read-and-fail
write
write-and-fail

prime_nv_api

Subtests

i915_nv_import_twice
i915_nv_import_twice_check_flink_name
i915_nv_reimport_twice_check_flink_name
nv_i915_import_twice_check_flink_name
nv_i915_reimport_twice_check_flink_name
i915_nv_import_vs_close
i915_nv_double_import
i915_nv_double_export
i915_self_import
nv_self_import
i915_self_import_to_different_fd
nv_self_import_to_different_fd

prime_nv_pcopy

Subtests

test1_macro
test1_micro
test2
test3_1
test3_2
test3_3
test3_4
test3_5
test_semaphore

prime_nv_test

Subtests

i915_nv_sharing
nv_i915_sharing
nv_write_i915_cpu_mmap_read
nv_write_i915_gtt_mmap_read
i915_import_cpu_mmap
i915_import_gtt_mmap
i915_import_pread_pwrite
i915_blt_fill_nv_read

prime_self_import

Check whether prime import/export works on the same device... but with different fds.

Subtests

basic-with_one_bo
basic-with_one_bo_two_files
basic-with_two_bos
basic-with_fd_dup
export-vs-gem_close-race
reimport-vs-gem_close-race
basic-llseek-size
basic-llseek-bad

prime_udl

intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/ch01.html0000644000175000017500000000764612665337377021777 00000000000000 API Reference: intel-gpu-tools Reference Manual

API Reference

drmtest — Base library for drm tests and tools
Core — Core i-g-t testing support
Stats — Tools for statistical analysis
debugfs — Support code for debugfs features
Draw — drawing helpers for tests
KMS — Kernel modesetting support library
Framebuffer — Framebuffer handling and drawing library
aux — Auxiliary libraries and support functions
GT — GT support library
Power Management — Power Management related helpers
ioctl wrappers — ioctl wrappers and related functions
Batch Buffer — Batchbuffer and blitter support
Chipset — Feature macros and chipset helpers
I/O — Register access and sideband I/O library
intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/igt-pm-tests.html0000644000175000017500000001551612665337377023574 00000000000000 PM Tests: intel-gpu-tools Reference Manual

PM Tests

PM Tests — Tests for power management features

Description

pm_backlight

Basic backlight sysfs test

Subtests

basic-brightness
bad-brightness
fade

pm_lpsp

Subtests

screens-disabled
edp-native
edp-panel-fitter
non-edp

pm_rc6_residency

Subtests

rc6-accuracy
media-rc6-accuracy
rc6p-accuracy
rc6pp-accuracy

pm_rpm

Subtests

basic-rte
drm-resources-equal
basic-pci-d3-state
modeset-lpsp
modeset-non-lpsp
dpms-lpsp
dpms-non-lpsp
gem-mmap-cpu
gem-mmap-gtt
gem-pread
gem-execbuf
gem-idle
gem-evict-pwrite
cursor
cursor-dpms
legacy-planes
legacy-planes-dpms
universal-planes
universal-planes-dpms
reg-read-ioctl
i2c
pc8-residency
debugfs-read
debugfs-forcewake-user
sysfs-read
dpms-mode-unset-lpsp
dpms-mode-unset-non-lpsp
fences
fences-dpms
modeset-lpsp-stress
modeset-non-lpsp-stress
modeset-lpsp-stress-no-wait
modeset-non-lpsp-stress-no-wait
modeset-pc8-residency-stress
modeset-stress-extra-wait
system-suspend
system-suspend-execbuf
system-suspend-modeset
gem-execbuf-stress
gem-execbuf-stress-pc8
gem-execbuf-stress-extra-wait
pm-tiling
pm-caching

pm_rps

Subtests

basic-api
min-max-config-idle
min-max-config-loaded
reset
blocking

pm_sseu

Tests slice/subslice/EU power gating functionality.

Subtests

full-enable
intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/intel-gpu-tools-KMS.html0000644000175000017500000023510012665337377024722 00000000000000 KMS: intel-gpu-tools Reference Manual

KMS

KMS — Kernel modesetting support library

Functions

const char * kmstest_pipe_name ()
const char * kmstest_plane_name ()
#define kmstest_port_name()
const char * kmstest_encoder_type_str ()
const char * kmstest_connector_status_str ()
const char * kmstest_connector_type_str ()
void kmstest_dump_mode ()
int kmstest_get_pipe_from_crtc_id ()
void kmstest_set_vt_graphics_mode ()
void kmstest_restore_vt_mode ()
bool kmstest_force_connector ()
void kmstest_edid_add_3d ()
void kmstest_force_edid ()
bool kmstest_get_connector_default_mode ()
bool kmstest_get_connector_config ()
bool kmstest_probe_connector_config ()
void kmstest_free_connector_config ()
void kmstest_set_connector_dpms ()
bool kmstest_get_property ()
void kmstest_unset_all_crtcs ()
void igt_display_init ()
void igt_display_fini ()
int igt_display_commit2 ()
int igt_display_commit ()
int igt_display_try_commit2 ()
int igt_display_get_n_pipes ()
const char * igt_output_name ()
drmModeModeInfo * igt_output_get_mode ()
void igt_output_override_mode ()
void igt_output_set_pipe ()
igt_plane_t * igt_output_get_plane ()
void igt_plane_set_fb ()
void igt_plane_set_position ()
void igt_plane_set_size ()
void igt_plane_set_panning ()
void igt_plane_set_rotation ()
void igt_crtc_set_background ()
void igt_fb_set_position ()
void igt_fb_set_size ()
void igt_wait_for_vblank ()
#define for_each_connected_output()
#define for_each_pipe()
#define IGT_FIXED()
void igt_enable_connectors ()
void igt_reset_connectors ()
const unsigned char * igt_kms_get_base_edid ()
const unsigned char * igt_kms_get_alt_edid ()

Includes

#include <igt.h>

Description

This library provides support to enumerate and set modeset configurations.

There are two parts in this library: First the low level helper function which directly build on top of raw ioctls or the interfaces provided by libdrm. Those functions all have a kmstest_ prefix.

The second part is a high-level library to manage modeset configurations which abstracts away some of the low-level details like the difference between legacy and universal plane support for setting cursors or in the future the difference between legacy and atomic commit. These high-level functions have all igt_ prefixes. This part is still very much work in progress and so also lacks a bit documentation for the individual functions.

Note that this library's header pulls in the i-g-t framebuffer library as a dependency.

Functions

kmstest_pipe_name ()

const char *
kmstest_pipe_name (enum pipe pipe);

Parameters

pipe

display pipe

 

Returns

String represnting pipe , e.g. "A".


kmstest_plane_name ()

const char *
kmstest_plane_name (enum igt_plane plane);

Parameters

plane

display plane

 

Returns

String represnting pipe , e.g. "plane1".


kmstest_port_name()

#define kmstest_port_name(port) ((port) + 'A')

Parameters

port

display plane

 

Returns

String representing port , e.g. "A".


kmstest_encoder_type_str ()

const char *
kmstest_encoder_type_str (int type);

Parameters

type

DRM_MODE_ENCODER_* enumeration value

 

Returns

A string representing the drm encoder type .


kmstest_connector_status_str ()

const char *
kmstest_connector_status_str (int status);

Parameters

status

DRM_MODE_* connector status value

 

Returns

A string representing the drm connector status status .


kmstest_connector_type_str ()

const char *
kmstest_connector_type_str (int type);

Parameters

type

DRM_MODE_CONNECTOR_* enumeration value

 

Returns

A string representing the drm connector type .


kmstest_dump_mode ()

void
kmstest_dump_mode (drmModeModeInfo *mode);

Prints mode to stdout in a huma-readable form.

Parameters

mode

libdrm mode structure

 

kmstest_get_pipe_from_crtc_id ()

int
kmstest_get_pipe_from_crtc_id (int fd,
                               int crtc_id);

Parameters

fd

DRM fd

 

crtc_id

DRM CRTC id

 

Returns

The pipe number for the given DRM CRTC crtc_id . This maps directly to an enum pipe value used in other helper functions.


kmstest_set_vt_graphics_mode ()

void
kmstest_set_vt_graphics_mode (void);

Sets the controlling VT (if available) into graphics/raw mode and installs an igt exit handler to set the VT back to text mode on exit. Use kmstest_restore_vt_mode to restore the previous VT mode manually.

All kms tests must call this function to make sure that the fbcon doesn't interfere by e.g. blanking the screen.


kmstest_restore_vt_mode ()

void
kmstest_restore_vt_mode (void);

Restore the VT mode in use before kmstest_set_vt_graphics_mode was called.


kmstest_force_connector ()

bool
kmstest_force_connector (int fd,
                         drmModeConnector *connector,
                         enum kmstest_force_connector_state state);

Force the specified state on the specified connector.

Parameters

fd

drm file descriptor

 

connector

connector

 

state

state to force on connector

 

Returns

true on success


kmstest_edid_add_3d ()

void
kmstest_edid_add_3d (const unsigned char *edid,
                     size_t length,
                     unsigned char *new_edid_ptr[],
                     size_t *new_length);

Makes a copy of an existing edid block and adds an extension indicating stereo 3D capabilities.

Parameters

edid

an existing valid edid block

 

length

length of edid

 

new_edid_ptr

pointer to where the new edid will be placed

 

new_length

pointer to the size of the new edid

 

kmstest_force_edid ()

void
kmstest_force_edid (int drm_fd,
                    drmModeConnector *connector,
                    const unsigned char *edid,
                    size_t length);

Set the EDID data on connector to edid . See also igt_kms_get_base_edid.

If length is zero, the forced EDID will be removed.

Parameters

drm_fd

drm file descriptor

 

connector

connector to set edid on

 

edid

An EDID data block

 

length

length of the EDID data. EDID_LENGTH defines the standard EDID length

 

kmstest_get_connector_default_mode ()

bool
kmstest_get_connector_default_mode (int drm_fd,
                                    drmModeConnector *connector,
                                    drmModeModeInfo *mode);

Retrieves the default mode for connector and stores it in mode .

Parameters

drm_fd

DRM fd

 

connector

libdrm connector

 

mode

libdrm mode

 

Returns

true on success, false on failure


kmstest_get_connector_config ()

bool
kmstest_get_connector_config (int drm_fd,
                              uint32_t connector_id,
                              unsigned long  crtc_idx_mask,
                              struct kmstest_connector_config *config);

This tries to find a suitable configuration for the given connector and CRTC constraint and fills it into config .

Parameters

drm_fd

DRM fd

 

connector_id

DRM connector id

 

crtc_idx_mask

mask of allowed DRM CRTC indices

 

config

structure filled with the possible configuration

 

kmstest_probe_connector_config ()

bool
kmstest_probe_connector_config (int drm_fd,
                                uint32_t connector_id,
                                unsigned long  crtc_idx_mask,
                                struct kmstest_connector_config *config);

This tries to find a suitable configuration for the given connector and CRTC constraint and fills it into config , fully probing the connector in the process.

Parameters

drm_fd

DRM fd

 

connector_id

DRM connector id

 

crtc_idx_mask

mask of allowed DRM CRTC indices

 

config

structure filled with the possible configuration

 

kmstest_free_connector_config ()

void
kmstest_free_connector_config (struct kmstest_connector_config *config);

Free any resources in config allocated in kmstest_get_connector_config().

Parameters

config

connector configuration structure

 

kmstest_set_connector_dpms ()

void
kmstest_set_connector_dpms (int fd,
                            drmModeConnector *connector,
                            int mode);

This function sets the DPMS setting of connector to mode .

Parameters

fd

DRM fd

 

connector

libdrm connector

 

mode

DRM DPMS value

 

kmstest_get_property ()

bool
kmstest_get_property (int drm_fd,
                      uint32_t object_id,
                      uint32_t object_type,
                      const char *name,
                      uint32_t *prop_id,
                      uint64_t *value,
                      drmModePropertyPtr *prop);

Finds a property with the given name on the given object.

Parameters

drm_fd

drm file descriptor

 

object_id

object whose properties we're going to get

 

object_type

type of obj_id (DRM_MODE_OBJECT_*)

 

name

name of the property we're going to get

 

prop_id

if not NULL, returns the property id

 

value

if not NULL, returns the property value

 

prop

if not NULL, returns the property, and the caller will have to free it manually.

 

Returns

true in case we found something.


kmstest_unset_all_crtcs ()

void
kmstest_unset_all_crtcs (int drm_fd,
                         drmModeResPtr resources);

Disables all the screens.

Parameters

drm_fd

the DRM fd

 

resources

libdrm resources pointer

 

igt_display_init ()

void
igt_display_init (igt_display_t *display,
                  int drm_fd);

Initialize display and allocate the various resources required. Use igt_display_fini to release the resources when they are no longer required.

Parameters

display

a pointer to an igt_display_t structure

 

drm_fd

a drm file descriptor

 

igt_display_fini ()

void
igt_display_fini (igt_display_t *display);

Release any resources associated with display . This does not free display itself.

Parameters

display

a pointer to an igt_display_t structure

 

igt_display_commit2 ()

int
igt_display_commit2 (igt_display_t *display,
                     enum igt_commit_style s);

Commits framebuffer and positioning changes to all planes of each display pipe, using a specific API to perform the programming. This function should be used to exercise a specific driver programming API; igt_display_commit should be used instead if the API used is unimportant to the test being run.

This function should only be used to commit changes that are expected to succeed, since any failure during the commit process will cause the IGT subtest to fail. To commit changes that are expected to fail, use igt_try_display_commit2 instead.

Parameters

display

DRM device handle

 

s

Commit style

 

Returns

0 upon success. This function will never return upon failure since igt_fail() at lower levels will longjmp out of it.


igt_display_commit ()

int
igt_display_commit (igt_display_t *display);

Commits framebuffer and positioning changes to all planes of each display pipe.

Parameters

display

DRM device handle

 

Returns

0 upon success. This function will never return upon failure since igt_fail() at lower levels will longjmp out of it.


igt_display_try_commit2 ()

int
igt_display_try_commit2 (igt_display_t *display,
                         enum igt_commit_style s);

Attempts to commit framebuffer and positioning changes to all planes of each display pipe. This function should be used to commit changes that are expected to fail, so that the error code can be checked for correctness. For changes that are expected to succeed, use igt_display_commit instead.

Note that in non-atomic commit styles, no display programming will be performed after the first failure is encountered, so only some of the operations requested by a test may have been completed. Tests that catch errors returned by this function should take care to restore the display to a sane state after a failure is detected.

Parameters

display

DRM device handle

 

s

Commit style

 

Returns

0 upon success, otherwise the error code of the first error encountered.


igt_display_get_n_pipes ()

int
igt_display_get_n_pipes (igt_display_t *display);

igt_output_name ()

const char *
igt_output_name (igt_output_t *output);

igt_output_get_mode ()

drmModeModeInfo *
igt_output_get_mode (igt_output_t *output);

igt_output_override_mode ()

void
igt_output_override_mode (igt_output_t *output,
                          drmModeModeInfo *mode);

Overrides the output's mode with mode , so that it is used instead of the mode obtained with get connectors. Note that the mode is used without checking if the output supports it, so this might lead to unexpected results.

Parameters

output

Output of which the mode will be overridden

 

mode

New mode

 

igt_output_set_pipe ()

void
igt_output_set_pipe (igt_output_t *output,
                     enum pipe pipe);

igt_output_get_plane ()

igt_plane_t *
igt_output_get_plane (igt_output_t *output,
                      enum igt_plane plane);

igt_plane_set_fb ()

void
igt_plane_set_fb (igt_plane_t *plane,
                  struct igt_fb *fb);

igt_plane_set_position ()

void
igt_plane_set_position (igt_plane_t *plane,
                        int x,
                        int y);

igt_plane_set_size ()

void
igt_plane_set_size (igt_plane_t *plane,
                    int w,
                    int h);

This function sets width and height for requested plane. New size will be committed at plane commit time via drmModeSetPlane().

Parameters

plane

plane pointer for which size to be set

 

w

width

 

h

height

 

igt_plane_set_panning ()

void
igt_plane_set_panning (igt_plane_t *plane,
                       int x,
                       int y);

igt_plane_set_rotation ()

void
igt_plane_set_rotation (igt_plane_t *plane,
                        igt_rotation_t rotation);

igt_crtc_set_background ()

void
igt_crtc_set_background (igt_pipe_t *pipe,
                         uint64_t background);

Sets background color for requested pipe. Color value provided here will be actually submitted at output commit time via "background_color" property. For example to get red as background, set background = 0x00000000FFFF.

Parameters

pipe

pipe pointer to which background color to be set

 

background

background color value in BGR 16bpc

 

igt_fb_set_position ()

void
igt_fb_set_position (struct igt_fb *fb,
                     igt_plane_t *plane,
                     uint32_t x,
                     uint32_t y);

This function sets position for requested framebuffer as src to plane. New position will be committed at plane commit time via drmModeSetPlane().

Parameters

fb

framebuffer pointer

 

plane

plane

 

x

X position

 

y

Y position

 

igt_fb_set_size ()

void
igt_fb_set_size (struct igt_fb *fb,
                 igt_plane_t *plane,
                 uint32_t w,
                 uint32_t h);

This function sets fetch rect size from requested framebuffer as src to plane. New size will be committed at plane commit time via drmModeSetPlane().

Parameters

fb

framebuffer pointer

 

plane

plane

 

w

width

 

h

height

 

igt_wait_for_vblank ()

void
igt_wait_for_vblank (int drm_fd,
                     enum pipe pipe);

for_each_connected_output()

#define             for_each_connected_output(display, output)

for_each_pipe()

#define             for_each_pipe(display, pipe)

IGT_FIXED()

#define IGT_FIXED(i,f) ((i) << 16 | (f))

igt_enable_connectors ()

void
igt_enable_connectors (void);

Force connectors to be enabled where this is known to work well. Use igt_reset_connectors to revert the changes.

An exit handler is installed to ensure connectors are reset when the test exits.


igt_reset_connectors ()

void
igt_reset_connectors (void);

Remove any forced state from the connectors.


igt_kms_get_base_edid ()

const unsigned char *
igt_kms_get_base_edid (void);

Get the base edid block, which includes the following modes:

  • 1920x1080 60Hz

  • 1280x720 60Hz

  • 1024x768 60Hz

  • 800x600 60Hz

  • 640x480 60Hz

This can be extended with further features using functions such as kmstest_edid_add_3d.

Returns

a basic edid block


igt_kms_get_alt_edid ()

const unsigned char *
igt_kms_get_alt_edid (void);

Get an alternate edid block, which includes the following modes:

  • 1400x1050 60Hz

  • 1920x1080 60Hz

  • 1280x720 60Hz

  • 1024x768 60Hz

  • 800x600 60Hz

  • 640x480 60Hz

This can be extended with further features using functions such as kmstest_edid_add_3d.

Returns

an alternate edid block

Types and Values

enum pipe

Members

PIPE_ANY

   

PIPE_A

   

PIPE_B

   

PIPE_C

   

I915_MAX_PIPES

   

enum igt_plane

Members

IGT_PLANE_1

   

IGT_PLANE_PRIMARY

   

IGT_PLANE_2

   

IGT_PLANE_3

   

IGT_PLANE_CURSOR

   

enum port

Members

PORT_A

   

PORT_B

   

PORT_C

   

PORT_D

   

PORT_E

   

I915_MAX_PORTS

   

struct kmstest_connector_config

struct kmstest_connector_config {
	drmModeCrtc *crtc;
	drmModeConnector *connector;
	drmModeEncoder *encoder;
	drmModeModeInfo default_mode;
	int crtc_idx;
	int pipe;
};

enum kmstest_force_connector_state

Members

FORCE_CONNECTOR_UNSPECIFIED

Unspecified

 

FORCE_CONNECTOR_ON

On

 

FORCE_CONNECTOR_DIGITAL

Digital

 

FORCE_CONNECTOR_OFF

Off

 

enum igt_commit_style

Members

COMMIT_LEGACY

   

COMMIT_UNIVERSAL

   

igt_display_t

typedef struct igt_display igt_display_t;

igt_pipe_t

typedef struct igt_pipe igt_pipe_t;

igt_fixed_t

typedef uint32_t igt_fixed_t;			/* 16.16 fixed point */

enum igt_rotation_t

Members

IGT_ROTATION_0

   

IGT_ROTATION_90

   

IGT_ROTATION_180

   

IGT_ROTATION_270

   

igt_plane_t

typedef struct {
} igt_plane_t;

struct igt_pipe

struct igt_pipe {
	igt_display_t *display;
	enum pipe pipe;
	bool enabled;
#define IGT_MAX_PLANES 4
	int n_planes;
	igt_plane_t planes[IGT_MAX_PLANES];
	uint64_t background; /* Background color MSB BGR 16bpc LSB */
	uint32_t background_changed : 1;
	uint32_t background_property;
};

igt_output_t

typedef struct {
} igt_output_t;

struct igt_display

struct igt_display {
	int drm_fd;
	int log_shift;
	int n_pipes;
	int n_outputs;
	unsigned long pipes_in_use;
	igt_output_t *outputs;
	igt_pipe_t pipes[I915_MAX_PIPES];
	bool has_universal_planes;
};

EDID_LENGTH

#define EDID_LENGTH 128
intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/left.png0000644000175000017500000000040612665337377022001 00000000000000PNG  IHDRabKGD pHYs B(xtIME,`m;IDAT8үa?DAPY\$[p+IIMlf('}Mpy{_ޥ}^q xZ <=Yj) <04\~+Pl#",Qϑp Iǐlsw>[/]_i03IENDB`intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/igt-gen3-tests.html0000644000175000017500000000775212665337377024017 00000000000000 Gen 3 Tests: intel-gpu-tools Reference Manual

Gen 3 Tests

Gen 3 Tests — Gen 3 specific tests

Description

gen3_mixed_blits


gen3_render_linear_blits


gen3_render_mixed_blits


gen3_render_tiledx_blits


gen3_render_tiledy_blits

intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/igt-sysfs-tests.html0000644000175000017500000000452212665337377024322 00000000000000 Sysfs Tests: intel-gpu-tools Reference Manual

Sysfs Tests

Sysfs Tests — Sysfs tests

Programs

Description

sysfs_l3_parity

intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/up.png0000644000175000017500000000040412665337377021471 00000000000000PNG  IHDRabKGD pHYs B(xtIME IDAT81 @D{xa;$]r =JR1, Sd-}0̟oL:m-QO[ k TzMޠL,:ךu!tK; Pp Ot@l/̵*l}IENDB`intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/igt-drv-tests.html0000644000175000017500000001323112665337377023743 00000000000000 DRV Tests: intel-gpu-tools Reference Manual

DRV Tests

DRV Tests — Tests for overall driver behaviour.

Description

drv_debugfs_reader


drv_getparams_basic

Tests the export of parameters via DRM_IOCTL_I915_GETPARAM

Subtests

basic-subslice-total
basic-eu-total

drv_hangman

Subtests

error-state-debugfs-entry
error-state-sysfs-entry
ring-stop-sysfs-entry
error-state-basic
error-state-capture-render
error-state-capture-bsd
error-state-capture-bsd1
error-state-capture-bsd2
error-state-capture-blt
error-state-capture-vebox
hangcheck-unterminated

drv_missed_irq_hang


drv_module_reload_basic


drv_suspend

Subtests

fence-restore-tiled2untiled
fence-restore-untiled
debugfs-reader
sysfs-reader
forcewake
fence-restore-tiled2untiled-hibernate
fence-restore-untiled-hibernate
debugfs-reader-hibernate
sysfs-reader-hibernate
forcewake-hibernate
intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/deprecated-api-index.html0000644000175000017500000000301512665337377025202 00000000000000 Index of deprecated API: intel-gpu-tools Reference Manual

Index of deprecated API

intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/intel-gpu-tools-Core.html0000644000175000017500000033543012665337377025167 00000000000000 Core: intel-gpu-tools Reference Manual

Core

Core — Core i-g-t testing support

Functions

#define IGT_TEST_DESCRIPTION()
#define igt_fixture
int (*igt_opt_handler_t) ()
int igt_subtest_init_parse_opts ()
#define igt_subtest_init()
#define igt_tokencat()
#define igt_subtest()
#define igt_subtest_f()
const char * igt_subtest_name ()
bool igt_only_list_subtests ()
void igt_simple_init_parse_opts ()
#define igt_simple_init()
void igt_skip ()
#define igt_skip_check()
void igt_success ()
void igt_fail ()
void igt_exit ()
#define igt_assert()
#define igt_assert_f()
#define igt_fail_on()
#define igt_fail_on_f()
#define igt_assert_cmpint()
#define igt_assert_cmpuint()
#define igt_assert_cmpu64()
#define igt_assert_cmpdouble()
#define igt_assert_eq()
#define igt_assert_eq_u32()
#define igt_assert_eq_u64()
#define igt_assert_eq_double()
#define igt_assert_neq()
#define igt_assert_neq_u32()
#define igt_assert_neq_u64()
#define igt_assert_neq_double()
#define igt_assert_lte()
#define igt_assert_lt()
#define igt_assert_fd()
#define igt_require()
#define igt_skip_on()
#define igt_require_f()
#define igt_skip_on_f()
#define igt_fork()
void igt_waitchildren ()
void igt_waitchildren_timeout ()
#define igt_fork_helper()
int igt_wait_helper ()
void igt_stop_helper ()
void (*igt_exit_handler_t) ()
void igt_install_exit_handler ()
void igt_enable_exit_handler ()
void igt_disable_exit_handler ()
bool igt_run_in_simulation ()
#define SLOW_QUICK()
void igt_skip_on_simulation ()
void igt_log ()
void igt_vlog ()
#define igt_debug()
#define igt_info()
#define igt_warn()
#define igt_critical()
#define igt_warn_on()
#define igt_warn_on_f()
void igt_set_timeout ()
void igt_reset_timeout ()
#define igt_fopen_data()

Types and Values

Includes

#include <igt.h>

Description

This library implements the core of the i-g-t test support infrastructure. Main features are the subtest enumeration, cmdline option parsing helpers for subtest handling and various helpers to structure testcases with subtests and handle subtest test results.

Auxiliary code provides exit handlers, support for forked processes with test result propagation. Other generally useful functionality includes optional structure logging infrastructure and some support code for running reduced test set on in simulated hardware environments.

When writing tests with subtests it is extremely important that nothing interferes with the subtest enumeration. In i-g-t subtests are enumerated at runtime, which allows powerful testcase enumeration. But it makes subtest enumeration a bit more tricky since the test code needs to be careful to never run any code which might fail (like trying to do privileged operations or opening device driver nodes).

To allow this i-g-t provides igt_fixture code blocks for setup code outside of subtests and automatically skips the subtest code blocks themselves. For special cases igt_only_list_subtests() is also provided.

Magic Control Blocks

i-g-t makes heavy use of C macros which serve as magic control blocks. They work fairly well and transparently but since C doesn't have full-blown closures there are caveats:

  • Asynchronous blocks which are used to spawn children internally use fork(). Which means that nonsensical control flow like jumping out of the control block is possible, but it will badly confuse the i-g-t library code. And of course all caveats of a real fork() call apply, namely that file descriptors are copied, but still point at the original file. This will terminally upset the libdrm buffer manager if both parent and child keep on using the same open instance of the drm device. Usually everything related to interacting with the kernel driver must be reinitialized to avoid such issues.

  • Code blocks with magic control flow are implemented with setjmp() and longjmp(). This applies to igt_fixture and igt_subtest blocks and all the three variants to finish test: igt_success(), igt_skip() and igt_fail(). Mostly this is of no concern, except when such a control block changes stack variables defined in the same function as the control block resides. Any store/load behaviour after a longjmp() is ill-defined for these variables. Avoid such code.

    Quoting the man page for longjmp():

    "The values of automatic variables are unspecified after a call to longjmp() if they meet all the following criteria:"

    • "they are local to the function that made the corresponding setjmp() call;

    • "their values are changed between the calls to setjmp() and longjmp(); and

    • "they are not declared as volatile."


Best Practices for Test Helper Libraries Design

Kernel tests itself tend to have fairly complex logic already. It is therefore paramount that helper code, both in libraries and test-private functions, add as little boilerplate code to the main test logic as possible. But then dense code is hard to understand without constantly consulting the documentation and implementation of all the helper functions if it doesn't follow some clear patterns. Hence follow these established best practices:

  • Make extensive use of the implicit control flow afforded by igt_skip(), igt_fail and igt_success(). When dealing with optional kernel features combine igt_skip() with igt_fail() to skip when the kernel support isn't available but fail when anything else goes awry. void should be the most common return type in all your functions, except object constructors of course.

  • The main test logic should have no explicit control flow for failure conditions, but instead such assumptions should be written in a declarative style. Use one of the many macros which encapsulate i-g-t's implicit control flow. Pick the most suitable one to have as much debug output as possible without polluting the code unnecessarily. For example igt_assert_cmpint() for comparing integers or do_ioctl() for running ioctls and checking their results. Feel free to add new ones to the library or wrap up a set of checks into a private function to further condense your test logic.

  • When adding a new feature test function which uses igt_skip() internally, use the <prefix>_require_<feature_name> naming scheme. When you instead add a feature test function which returns a boolean, because your main test logic must take different actions depending upon the feature's availability, then instead use the <prefix>_has_<feature_name>.

  • As already mentioned eschew explicit error handling logic as much as possible. If your test absolutely has to handle the error of some function the customary naming pattern is to prefix those variants with __. Try to restrict explicit error handling to leaf functions. For the main test flow simply pass the expected error condition down into your helper code, which results in tidy and declarative test logic.

  • Make your library functions as simple to use as possible. Automatically register cleanup handlers through igt_install_exit_handler(). Reduce the amount of setup boilerplate needed by using implicit singletons and lazy structure initialization and similar design patterns.

  • Don't shy away from refactoring common code, even when there are just 2-3 users and even if it's not a net reduction in code. As long as it helps to remove boilerplate and makes the code more declarative the resulting clearer test flow is worth it. All i-g-t library code has been organically extracted from testcases in this fashion.

  • For general coding style issues please follow the kernel's rules laid out in CodingStyle.


Interface with Testrunners

i-g-t testcase are all executables which should be run as root on an otherwise completely idle system. The test status is reflected in the exitcode. IGT_EXIT_SUCCESS means "success", IGT_EXIT_SKIP "skip", IGT_EXIT_TIMEOUT that some operation "timed out". All other exit codes encode a failed test result, including any abnormal termination of the test (e.g. by SIGKILL).

On top of that tests may report unexpected results and minor issues to stderr. If stderr is non-empty the test result should be treated as "warn".

The test lists are generated at build time. Simple testcases are listed in tests/single-tests.txt and tests with subtests are listed in tests/multi-tests.txt. When running tests with subtest from a test runner it is recommend to run each subtest individually, since otherwise the return code will only reflect the overall result.

To do that obtain the lists of subtests with "--list-subtests", which can be run as non-root and doesn't require the i915 driver to be loaded (or any intel gpu to be present). Then individual subtests can be run with "--run-subtest". Usage help for tests with subtests can be obtained with the "--help" command line option.

A wildcard expression can be given to --run-subtest to specify a subset of subtests to run. See https://tools.ietf.org/html/rfc3977section-4 for a description of allowed wildcard expressions. Some examples of allowed wildcard expressions are:

  • '*basic*' match any subtest containing basic

  • 'basic-???' match any subtest named basic- with 3 characters after -

  • 'basic-[0-9]' match any subtest named basic- with a single number after -

  • 'basic-[^0-9]' match any subtest named basic- with a single non numerical character after -

  • 'basic*,advanced*' match any subtest starting basic or advanced

  • '*,!basic*' match any subtest not starting basic

  • 'basic*,!basic-render*' match any subtest starting basic but not starting basic-render

Functions

IGT_TEST_DESCRIPTION()

#define IGT_TEST_DESCRIPTION(str) const char* __igt_test_description = str

Defines a description for a test. This is used as the output for the "--help-description" option and is also included in the generated documentation.

Parameters

str

description string

 

igt_fixture

#define             igt_fixture

Annotate global test fixture code

Testcase with subtests often need to set up a bunch of global state as the common test fixture. To avoid such code interfering with the subtest enumeration (e.g. when enumerating on systems without an intel gpu) such blocks should be annotated with igt_fixture.


igt_opt_handler_t ()

int
(*igt_opt_handler_t) (int opt,
                      int opt_index,
                      void *data);

igt_subtest_init_parse_opts ()

int
igt_subtest_init_parse_opts (int *argc,
                             char **argv,
                             const char *extra_short_opts,
                             const struct option *extra_long_opts,
                             const char *help_str,
                             igt_opt_handler_t extra_opt_handler,
                             void *handler_data);

This function handles the subtest related command line options and allows an arbitrary set of additional options. This is useful for tests which have additional knobs to tune when run manually like the number of rounds execute or the size of the allocated buffer objects.

Tests without special needs should just use igt_subtest_init() or use igt_main directly instead of their own main() function.

Parameters

argc

argc from the test's main()

 

argv

argv from the test's main()

 

extra_short_opts

getopt_long() compliant list with additional short options

 

extra_long_opts

getopt_long() compliant list with additional long options

 

help_str

help string for the additional options

 

extra_opt_handler

handler for the additional options

 

handler_data

user data given to extra_opt_handler when invoked

 

Returns

Forwards any option parsing errors from getopt_long.


igt_subtest_init()

#define             igt_subtest_init(argc, argv)

This initializes the for tests with subtests without the need for additional command line options. It is just a simplified version of igt_subtest_init_parse_opts().

If there's not a reason to the contrary it's less error prone to just use an igt_main block instead of stitching the test's main() function together manually.

Parameters

argc

argc from the test's main()

 

argv

argv from the test's main()

 

igt_tokencat()

#define igt_tokencat(x, y) __igt_tokencat2(x, y)

C preprocessor helper to concatenate two variables while properly expanding them.

Parameters

x

first variable

 

y

second variable

 

igt_subtest()

#define             igt_subtest(name)

This is a magic control flow block which denotes a subtest code block. Within that code block igt_skip|success will only bail out of the subtest. The _f variant accepts a printf format string, which is useful for constructing combinatorial tests.

This is a simpler version of igt_subtest_f()

Parameters

name

name of the subtest

 

igt_subtest_f()

#define             igt_subtest_f(f...)

This is a magic control flow block which denotes a subtest code block. Within that code block igt_skip|success will only bail out of the subtest. The _f variant accepts a printf format string, which is useful for constructing combinatorial tests.

Like igt_subtest(), but also accepts a printf format string instead of a static string.

Parameters

...

format string and optional arguments

 

igt_subtest_name ()

const char *
igt_subtest_name (void);

Returns

The name of the currently executed subtest or NULL if called from outside a subtest block.


igt_only_list_subtests ()

bool
igt_only_list_subtests (void);

Returns

Returns true if only subtest should be listed and any setup code must be skipped, false otherwise.


igt_simple_init_parse_opts ()

void
igt_simple_init_parse_opts (int *argc,
                            char **argv,
                            const char *extra_short_opts,
                            const struct option *extra_long_opts,
                            const char *help_str,
                            igt_opt_handler_t extra_opt_handler,
                            void *handler_data);

This initializes a simple test without any support for subtests and allows an arbitrary set of additional options.

Parameters

argc

argc from the test's main()

 

argv

argv from the test's main()

 

extra_short_opts

getopt_long() compliant list with additional short options

 

extra_long_opts

getopt_long() compliant list with additional long options

 

help_str

help string for the additional options

 

extra_opt_handler

handler for the additional options

 

handler_data

user data given to extra_opt_handler when invoked

 

igt_simple_init()

#define             igt_simple_init(argc, argv)

This initializes a simple test without any support for subtests.

If there's not a reason to the contrary it's less error prone to just use an igt_simple_main block instead of stitching the test's main() function together manually.

Parameters

argc

argc from the test's main()

 

argv

argv from the test's main()

 

igt_skip ()

void
igt_skip (const char *f,
          ...);

Subtest aware test skipping. The format string is printed to stderr as the reason why the test skipped.

For tests with subtests this will either bail out of the current subtest or mark all subsequent subtests as SKIP (presuming some global setup code failed).

For normal tests without subtest it will directly exit.

Parameters

f

format string

 

...

optional arguments used in the format string

 

igt_skip_check()

#define             igt_skip_check(E, F...)

igt_success ()

void
igt_success (void);

Complete a (subtest) as successful

This bails out of a subtests and marks it as successful. For global tests it it won't bail out of anything.


igt_fail ()

void
igt_fail (int exitcode);

Fail a testcase. The exitcode is used as the exit code of the test process. It may not be 0 (which indicates success) or 77 (which indicates a skipped test).

For tests with subtests this will either bail out of the current subtest or mark all subsequent subtests as FAIL (presuming some global setup code failed).

For normal tests without subtest it will directly exit with the given exitcode.

Parameters

exitcode

exitcode

 

igt_exit ()

void
igt_exit (void);

exit() for both types (simple and with subtests) of i-g-t tests.

This will exit the test with the right exit code when subtests have been skipped. For normal tests it exits with a successful exit code, presuming everything has worked out. For subtests it also checks that at least one subtest has been run (save when only listing subtests.

It is an error to normally exit a test calling igt_exit() - without it the result reporting will be wrong. To avoid such issues it is highly recommended to use igt_main or igt_simple_main instead of a hand-rolled main() function.


igt_assert()

#define             igt_assert(expr)

Fails (sub-)test if the condition is not met.

Should be used everywhere where a test checks results.

Parameters

expr

condition to test

 

igt_assert_f()

#define             igt_assert_f(expr, f...)

Fails (sub-)test if the condition is not met.

Should be used everywhere where a test checks results.

In addition to the plain igt_assert() helper this allows to print additional information to help debugging test failures.

Parameters

expr

condition to test

 

...

format string and optional arguments

 

igt_fail_on()

#define igt_fail_on(expr) igt_assert(!(expr))

Fails (sub-)test if the condition is met.

Should be used everywhere where a test checks results.

Parameters

expr

condition to test

 

igt_fail_on_f()

#define igt_fail_on_f(expr, f...) igt_assert_f(!(expr), f)

Fails (sub-)test if the condition is met.

Should be used everywhere where a test checks results.

In addition to the plain igt_assert() helper this allows to print additional information to help debugging test failures.

Parameters

expr

condition to test

 

...

format string and optional arguments

 

igt_assert_cmpint()

#define             igt_assert_cmpint(n1, cmp, ncmp, n2)

Fails (sub-)test if the condition is not met

Should be used everywhere where a test compares two integer values.

Like igt_assert(), but displays the values being compared on failure instead of simply printing the stringified expression.

Parameters

n1

first value

 

cmp

compare operator

 

ncmp

negated version of cmp

 

n2

second value

 

igt_assert_cmpuint()

#define             igt_assert_cmpuint(n1, cmp, ncmp, n2)

Like igt_assert_cmpint(), but for unsigned ints.

Parameters

n1

first value

 

cmp

compare operator

 

ncmp

negated version of cmp

 

n2

second value

 

igt_assert_cmpu64()

#define             igt_assert_cmpu64(n1, cmp, ncmp, n2)

Like igt_assert_cmpuint(), but for larger ints.

Parameters

n1

first value

 

cmp

compare operator

 

ncmp

negated version of cmp

 

n2

second value

 

igt_assert_cmpdouble()

#define             igt_assert_cmpdouble(n1, cmp, ncmp, n2)

Like igt_assert_cmpint(), but for doubles.

Parameters

n1

first value

 

cmp

compare operator

 

ncmp

negated version of cmp

 

n2

second value

 

igt_assert_eq()

#define igt_assert_eq(n1, n2) igt_assert_cmpint(n1, ==, !=, n2)

Fails (sub-)test if the two integers are not equal. Beware that for now this only works on integers.

Like igt_assert(), but displays the values being compared on failure instead of simply printing the stringified expression.

Parameters

n1

first integer

 

n2

second integer

 

igt_assert_eq_u32()

#define igt_assert_eq_u32(n1, n2) igt_assert_cmpuint(n1, ==, !=, n2)

Like igt_assert_eq(), but for uint32_t.

Parameters

n1

first integer

 

n2

second integer

 

igt_assert_eq_u64()

#define igt_assert_eq_u64(n1, n2) igt_assert_cmpu64(n1, ==, !=, n2)

Like igt_assert_eq_u32(), but for uint64_t.

Parameters

n1

first integer

 

n2

second integer

 

igt_assert_eq_double()

#define igt_assert_eq_double(n1, n2) igt_assert_cmpdouble(n1, ==, !=, n2)

Like igt_assert_eq(), but for doubles.

Parameters

n1

first double

 

n2

second double

 

igt_assert_neq()

#define igt_assert_neq(n1, n2) igt_assert_cmpint(n1, !=, ==, n2)

Fails (sub-)test if the two integers are equal. Beware that for now this only works on integers.

Like igt_assert(), but displays the values being compared on failure instead of simply printing the stringified expression.

Parameters

n1

first integer

 

n2

second integer

 

igt_assert_neq_u32()

#define igt_assert_neq_u32(n1, n2) igt_assert_cmpuint(n1, !=, ==, n2)

Like igt_assert_neq(), but for uint32_t.

Parameters

n1

first integer

 

n2

second integer

 

igt_assert_neq_u64()

#define igt_assert_neq_u64(n1, n2) igt_assert_cmpu64(n1, !=, ==, n2)

Like igt_assert_neq_u32(), but for uint64_t.

Parameters

n1

first integer

 

n2

second integer

 

igt_assert_neq_double()

#define igt_assert_neq_double(n1, n2) igt_assert_cmpdouble(n1, !=, ==, n2)

Like igt_assert_neq(), but for doubles.

Parameters

n1

first double

 

n2

second double

 

igt_assert_lte()

#define igt_assert_lte(n1, n2) igt_assert_cmpint(n1, <=, >, n2)

Fails (sub-)test if the second integer is strictly smaller than the first. Beware that for now this only works on integers.

Like igt_assert(), but displays the values being compared on failure instead of simply printing the stringified expression.

Parameters

n1

first integer

 

n2

second integer

 

igt_assert_lt()

#define igt_assert_lt(n1, n2) igt_assert_cmpint(n1, <, >=, n2)

Fails (sub-)test if the second integer is smaller than or equal to the first. Beware that for now this only works on integers.

Like igt_assert(), but displays the values being compared on failure instead of simply printing the stringified expression.

Parameters

n1

first integer

 

n2

second integer

 

igt_assert_fd()

#define             igt_assert_fd(fd)

Fails (sub-) test if the given file descriptor is invalid.

Like igt_assert(), but displays the values being compared on failure instead of simply printing the stringified expression.

Parameters

fd

file descriptor

 

igt_require()

#define             igt_require(expr)

Skip a (sub-)test if a condition is not met.

Should be used everywhere where a test checks results to decide about skipping. This is useful to streamline the skip logic since it allows for a more flat code control flow, similar to igt_assert()

Parameters

expr

condition to test

 

igt_skip_on()

#define             igt_skip_on(expr)

Skip a (sub-)test if a condition is met.

Should be used everywhere where a test checks results to decide about skipping. This is useful to streamline the skip logic since it allows for a more flat code control flow, similar to igt_assert()

Parameters

expr

condition to test

 

igt_require_f()

#define             igt_require_f(expr, f...)

Skip a (sub-)test if a condition is not met.

Should be used everywhere where a test checks results to decide about skipping. This is useful to streamline the skip logic since it allows for a more flat code control flow, similar to igt_assert()

In addition to the plain igt_require() helper this allows to print additional information to help debugging test failures.

Parameters

expr

condition to test

 

...

format string and optional arguments

 

igt_skip_on_f()

#define             igt_skip_on_f(expr, f...)

Skip a (sub-)test if a condition is met.

Should be used everywhere where a test checks results to decide about skipping. This is useful to streamline the skip logic since it allows for a more flat code control flow, similar to igt_assert()

In addition to the plain igt_skip_on() helper this allows to print additional information to help debugging test failures.

Parameters

expr

condition to test

 

...

format string and optional arguments

 

igt_fork()

#define             igt_fork(child, num_children)

This is a magic control flow block which spawns parallel test threads with fork().

The test children execute in parallel to the main test thread. Joining all test threads should be done with igt_waitchildren to ensure that the exit codes of all children are properly reflected in the test status.

Note that igt_skip() will not be forwarded, feature tests need to be done before spawning threads with igt_fork().

Parameters

child

name of the int variable with the child number

 

num_children

number of children to fork

 

igt_waitchildren ()

void
igt_waitchildren (void);

Wait for all children forked with igt_fork.

The magic here is that exit codes from children will be correctly propagated to the main thread, including the relevant exit code if a child thread failed. Of course if multiple children failed with different exit codes the resulting exit code will be non-deterministic.

Note that igt_skip() will not be forwarded, feature tests need to be done before spawning threads with igt_fork().


igt_waitchildren_timeout ()

void
igt_waitchildren_timeout (int seconds,
                          const char *reason);

Wait for all children forked with igt_fork, for a maximum of seconds .

Wraps igt_waitchildren() and igt_set_timeout()


igt_fork_helper()

#define             igt_fork_helper(proc)

This is a magic control flow block which denotes an asynchronous helper process block. The difference compared to igt_fork() is that failures from the child process will not be forwarded, making this construct more suitable for background processes. Common use cases are regular interference of the main test thread through e.g. sending signals or evicting objects through debugfs. Through the explicit igt_helper_process they can also be controlled in a more fine-grained way than test children spawned through igt_fork().

For tests with subtest helper process can be started outside of a igt_subtest block.

Calling igt_wait_helper() joins a helper process and igt_stop_helper() forcefully terminates it.

Parameters

proc

igt_helper_process structure

 

igt_wait_helper ()

int
igt_wait_helper (struct igt_helper_process *proc);

Joins a helper process. It is an error to call this on a helper process which hasn't been spawned yet.

Parameters

proc

igt_helper_process structure

 

igt_stop_helper ()

void
igt_stop_helper (struct igt_helper_process *proc);

Terminates a helper process. It is an error to call this on a helper process which hasn't been spawned yet.

Parameters

proc

igt_helper_process structure

 

igt_exit_handler_t ()

void
(*igt_exit_handler_t) (int sig);

Exit handler type used by igt_install_exit_handler(). Note that exit handlers can potentially be run from signal handling contexts, the sig parameter can be used to figure this out and act accordingly.

Parameters

sig

Signal number which caused the exit or 0.

 

igt_install_exit_handler ()

void
igt_install_exit_handler (igt_exit_handler_t fn);

Set a handler that will be called either when the process calls exit() or <!-- -->returns from the main function, or one of the signals in 'handled_signals' is raised. MAX_EXIT_HANDLERS handlers can be installed, each of which will be called only once, even if a subsequent signal is raised. If the exit handlers are called due to a signal, the signal will be re-raised with the original signal disposition after all handlers returned.

The handler will be passed the signal number if called due to a signal, or 0 otherwise. Exit handlers can also be used from test children spawned with igt_fork(), but not from within helper processes spawned with igt_fork_helper(). The list of exit handlers is reset when forking to avoid issues with children cleanup up the parent's state too early.

Parameters

fn

exit handler function

 

igt_enable_exit_handler ()

void
igt_enable_exit_handler (void);

Re-enable all exit handlers temporarily disabled with igt_disable_exit_handler().


igt_disable_exit_handler ()

void
igt_disable_exit_handler (void);

Temporarily disable all exit handlers. Useful for library code doing tricky things.


igt_run_in_simulation ()

bool
igt_run_in_simulation (void);

This function can be used to select a reduced test set when running in simulation environments. This i-g-t mode is selected by setting the INTEL_SIMULATION environment variable to 1.

Returns

True when run in simulation mode, false otherwise.


SLOW_QUICK()

#define SLOW_QUICK(slow,quick) (igt_run_in_simulation() ? (quick) : (slow))

Simple macro to select between two values (e.g. number of test rounds or test buffer size) depending upon whether i-g-t is run in simulation mode or not.

Parameters

slow

value in simulation mode

 

quick

value in normal mode

 

igt_skip_on_simulation ()

void
igt_skip_on_simulation (void);

Skip tests when INTEL_SIMULATION environment variable is set. It uses igt_skip() internally and hence is fully subtest aware.

Note that in contrast to all other functions which use igt_skip() internally it is allowed to use this outside of an igt_fixture block in a test with subtests. This is because in contrast to most other test requirements, checking for simulation mode doesn't depend upon the present hardware and it so makes a lot of sense to have this check in the outermost igt_main block.


igt_log ()

void
igt_log (const char *domain,
         enum igt_log_level level,
         const char *format,
         ...);

This is the generic structured logging helper function. i-g-t testcase should output all normal message to stdout. Warning level message should be printed to stderr and the test runner should treat this as an intermediate result between SUCCESS and FAILURE.

The log level can be set through the IGT_LOG_LEVEL environment variable with values "debug", "info", "warn", "critical" and "none". By default verbose debug message are disabled. "none" completely disables all output and is not recommended since crucial issues only reported at the IGT_LOG_WARN level are ignored.

Parameters

domain

the log domain, or NULL for no domain

 

level

igt_log_level

 

format

format string

 

...

optional arguments used in the format string

 

igt_vlog ()

void
igt_vlog (const char *domain,
          enum igt_log_level level,
          const char *format,
          va_list args);

This is the generic logging helper function using an explicit varargs structure and hence useful to implement domain-specific logging functions.

If there is no need to wrap up a vararg list in the caller it is simpler to just use igt_log().

Parameters

domain

the log domain, or NULL for no domain

 

level

igt_log_level

 

format

format string

 

args

variable arguments lists

 

igt_debug()

#define igt_debug(f...) igt_log(IGT_LOG_DOMAIN, IGT_LOG_DEBUG, f)

Wrapper for igt_log() for message at the IGT_LOG_DEBUG level.

Parameters

...

format string and optional arguments

 

igt_info()

#define igt_info(f...) igt_log(IGT_LOG_DOMAIN, IGT_LOG_INFO, f)

Wrapper for igt_log() for message at the IGT_LOG_INFO level.

Parameters

...

format string and optional arguments

 

igt_warn()

#define igt_warn(f...) igt_log(IGT_LOG_DOMAIN, IGT_LOG_WARN, f)

Wrapper for igt_log() for message at the IGT_LOG_WARN level.

Parameters

...

format string and optional arguments

 

igt_critical()

#define igt_critical(f...) igt_log(IGT_LOG_DOMAIN, IGT_LOG_CRITICAL, f)

Wrapper for igt_log() for message at the IGT_LOG_CRITICAL level.

Parameters

...

format string and optional arguments

 

igt_warn_on()

#define             igt_warn_on(condition)

Print a IGT_LOG_WARN level message if a condition is not met.

Should be used everywhere where a test checks results to decide about printing warnings. This is useful to streamline the test logic since it allows for a more flat code control flow, similar to igt_assert()

Parameters

condition

condition to test

 

igt_warn_on_f()

#define             igt_warn_on_f(condition, f...)

Skip a (sub-)test if a condition is not met.

Print a IGT_LOG_WARN level message if a condition is not met.

Should be used everywhere where a test checks results to decide about printing warnings. This is useful to streamline the test logic since it allows for a more flat code control flow, similar to igt_assert()

In addition to the plain igt_warn_on_f() helper this allows to print additional information (again as warnings) to help debugging test failures.

Parameters

condition

condition to test

 

...

format string and optional arguments

 

igt_set_timeout ()

void
igt_set_timeout (unsigned int seconds,
                 const char *op);

Fail a test and exit with IGT_EXIT_FAILURE status after the specified number of seconds have elapsed. If the current test has subtests and the timeout occurs outside a subtest, subsequent subtests will be skipped and marked as failed.

Any previous timer is cancelled and no timeout is scheduled if seconds is zero. But for clarity the timeout set with this function should be cleared with igt_reset_timeout().

Parameters

seconds

number of seconds before timeout

 

op

Optional string to explain what operation has timed out in the debug log

 

igt_reset_timeout ()

void
igt_reset_timeout (void);

This function resets a timeout set by igt_set_timeout() and disables any timer set up by the former function.


igt_fopen_data()

#define             igt_fopen_data(filename)

Open a datafile for test, first try from installation directory then from build directory.

Parameters

filename

filename to open.

 

Types and Values

IGT_LOG_DOMAIN

#define IGT_LOG_DOMAIN (NULL)

IGT_EXIT_TIMEOUT

#define IGT_EXIT_TIMEOUT 78

Exit status indicating a timeout occurred.


IGT_EXIT_SKIP

#define IGT_EXIT_SKIP    77

Exit status indicating the test was skipped.


IGT_EXIT_SUCCESS

#define IGT_EXIT_SUCCESS 0

Exit status indicating the test executed successfully.


IGT_EXIT_INVALID

#define IGT_EXIT_INVALID 79

Exit status indicating an invalid option or subtest was specified


IGT_EXIT_FAILURE

#define IGT_EXIT_FAILURE 99

Exit status indicating a test failure


igt_main

#define             igt_main

This is a magic control flow block used instead of a main() function for tests with subtests. Open-coding the main() function is only recommended if the test needs to parse additional command line arguments of its own.


igt_simple_main

#define             igt_simple_main

This is a magic control flow block used instead of a main() function for simple tests. Open-coding the main() function is only recommended if the test needs to parse additional command line arguments of its own.


struct igt_helper_process

struct igt_helper_process {
	bool running;
	bool use_SIGKILL;
	pid_t pid;
	int id;
};

Tracking structure for helper processes. Users of the i-g-t library should only set use_SIGKILL directly.

Members

bool running;

indicates whether the process is currently running

 

bool use_SIGKILL;

whether the helper should be terminated with SIGKILL or SIGTERM

 

pid_t pid;

pid of the helper if running is true

 

int id;

internal id

 

igt_interactive_debug

extern const char *igt_interactive_debug;

enum igt_log_level

Members

IGT_LOG_DEBUG

   

IGT_LOG_INFO

   

IGT_LOG_WARN

   

IGT_LOG_CRITICAL

   

IGT_LOG_NONE

   
intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/full-api-index.html0000644000175000017500000035007212665337377024054 00000000000000 API Index: intel-gpu-tools Reference Manual

API Index

A

ADVANCE_BATCH, macro in Batch Buffer
ALIGN, macro in drmtest
ARRAY_SIZE, macro in drmtest
igt_assert, macro in Core
igt_assert_cmpdouble, macro in Core
igt_assert_cmpint, macro in Core
igt_assert_cmpu64, macro in Core
igt_assert_cmpuint, macro in Core
igt_assert_crc_equal, function in debugfs
igt_assert_eq, macro in Core
igt_assert_eq_double, macro in Core
igt_assert_eq_u32, macro in Core
igt_assert_eq_u64, macro in Core
igt_assert_f, macro in Core
igt_assert_fd, macro in Core
igt_assert_lt, macro in Core
igt_assert_lte, macro in Core
igt_assert_neq, macro in Core
igt_assert_neq_double, macro in Core
igt_assert_neq_u32, macro in Core
igt_assert_neq_u64, macro in Core
igt_aub_dump_enabled, function in aux

B

BATCH_RESERVED, macro in Batch Buffer
BATCH_SZ, macro in Batch Buffer
BEGIN_BATCH, macro in Batch Buffer
igt_blitter_fast_copy, function in Batch Buffer
igt_blitter_fast_copy__raw, function in Batch Buffer
BLIT_COPY_BATCH_START, macro in Batch Buffer
igt_bpp_depth_to_drm_format, function in Framebuffer
igt_buf, struct in Batch Buffer
igt_buf_height, function in Batch Buffer
igt_buf_width, function in Batch Buffer

C

igt_cairo_printf_line, function in Framebuffer
cairo_surface_t, typedef in Framebuffer
cairo_t, typedef in Framebuffer
igt_calc_fb_size, function in Framebuffer
igt_check_boolean_env_var, function in aux
CHECK_RAM, macro in aux
CHECK_SWAP, macro in aux
igt_cleanup_aperture_trashers, function in aux
igt_clflush_range, function in GT
COLOR_BLIT_COPY_BATCH_START, macro in Batch Buffer
igt_commit_style, enum in KMS
igt_crc_t, struct in debugfs
igt_crc_to_string, function in debugfs
igt_create_color_fb, function in Framebuffer
igt_create_color_pattern_fb, function in Framebuffer
igt_create_fb, function in Framebuffer
igt_create_fb_with_bo_size, function in Framebuffer
igt_create_image_fb, function in Framebuffer
igt_create_pattern_fb, function in Framebuffer
igt_create_stereo_fb, function in Framebuffer
igt_critical, macro in Core
igt_crtc_set_background, function in KMS

D

igt_debug, macro in Core
igt_debugfs_fopen, function in debugfs
igt_debugfs_open, function in debugfs
igt_debugfs_read, macro in debugfs
igt_debugfs_search, function in debugfs
igt_debug_manual_check, function in aux
igt_debug_wait_for_keypress, function in aux
igt_disable_exit_handler, function in Core
igt_disable_prefault, function in debugfs
igt_display, struct in KMS
igt_display_commit, function in KMS
igt_display_commit2, function in KMS
igt_display_fini, function in KMS
igt_display_get_n_pipes, function in KMS
igt_display_init, function in KMS
igt_display_t, typedef in KMS
igt_display_try_commit2, function in KMS
do_ioctl, macro in drmtest
do_ioctl_err, macro in drmtest
do_or_die, macro in drmtest
igt_draw_fill_fb, function in Draw
igt_draw_get_method_name, function in Draw
igt_draw_method, enum in Draw
igt_draw_rect, function in Draw
igt_draw_rect_fb, function in Draw
DRIVER_ANY, macro in drmtest
DRIVER_INTEL, macro in drmtest
DRIVER_VC4, macro in drmtest
igt_drm_format_to_bpp, function in Framebuffer
drm_get_card, function in drmtest
drm_open_driver, function in drmtest
drm_open_driver_master, function in drmtest
drm_open_driver_render, function in drmtest
DRM_RDWR, macro in ioctl wrappers
DROP_ACTIVE, macro in debugfs
DROP_ALL, macro in debugfs
DROP_BOUND, macro in debugfs
igt_drop_caches_set, function in debugfs
DROP_RETIRE, macro in debugfs
igt_drop_root, function in aux
DROP_UNBOUND, macro in debugfs

E

EDID_LENGTH, macro in KMS
igt_enable_connectors, function in KMS
igt_enable_exit_handler, function in Core
igt_enable_prefault, function in debugfs
igt_exchange_int, function in aux
igt_exit, function in Core
IGT_EXIT_FAILURE, macro in Core
igt_exit_handler_t, user_function in Core
IGT_EXIT_INVALID, macro in Core
IGT_EXIT_SKIP, macro in Core
IGT_EXIT_SUCCESS, macro in Core
IGT_EXIT_TIMEOUT, macro in Core

F

igt_fail, function in Core
igt_fail_on, macro in Core
igt_fail_on_f, macro in Core
igt_fb, struct in Framebuffer
igt_fb_set_position, function in KMS
igt_fb_set_size, function in KMS
igt_fillfunc_t, user_function in Batch Buffer
IGT_FIXED, macro in KMS
igt_fixed_t, typedef in KMS
igt_fixture, macro in Core
igt_fopen_data, macro in Core
igt_force_gpu_reset, function in GT
igt_fork, macro in Core
igt_fork_hang_helper, function in GT
igt_fork_helper, macro in Core
igt_fork_signal_helper, function in aux
igt_format_str, function in Framebuffer
for_each_connected_output, macro in KMS
for_each_pipe, macro in KMS

G

gem_aperture_size, function in ioctl wrappers
gem_available_aperture_size, function in ioctl wrappers
gem_available_fences, function in ioctl wrappers
gem_bo_busy, function in ioctl wrappers
gem_close, function in ioctl wrappers
gem_context_create, function in ioctl wrappers
gem_context_destroy, function in ioctl wrappers
gem_context_get_param, function in ioctl wrappers
gem_context_require_ban_period, function in ioctl wrappers
gem_context_require_param, function in ioctl wrappers
gem_context_set_param, function in ioctl wrappers
gem_create, function in ioctl wrappers
gem_create_stolen, function in ioctl wrappers
gem_create__has_stolen_support, function in ioctl wrappers
gem_execbuf, function in ioctl wrappers
gem_flink, function in ioctl wrappers
gem_get_caching, function in ioctl wrappers
gem_get_num_rings, function in ioctl wrappers
gem_get_tiling, function in ioctl wrappers
gem_global_aperture_size, function in ioctl wrappers
gem_gtt_type, function in ioctl wrappers
gem_handle_to_libdrm_bo, function in ioctl wrappers
gem_has_blt, function in ioctl wrappers
gem_has_bsd, function in ioctl wrappers
gem_has_bsd2, function in ioctl wrappers
gem_has_enable_ring, function in ioctl wrappers
gem_has_llc, function in ioctl wrappers
gem_has_softpin, function in ioctl wrappers
gem_has_vebox, function in ioctl wrappers
gem_madvise, function in ioctl wrappers
gem_mappable_aperture_size, function in ioctl wrappers
gem_mmap__cpu, function in ioctl wrappers
gem_mmap__gtt, function in ioctl wrappers
gem_mmap__has_wc, function in ioctl wrappers
gem_mmap__wc, function in ioctl wrappers
gem_open, function in ioctl wrappers
gem_quiescent_gpu, function in drmtest
gem_read, function in ioctl wrappers
gem_require_caching, function in ioctl wrappers
gem_require_mmap_wc, macro in ioctl wrappers
gem_require_ring, function in ioctl wrappers
gem_require_stolen_support, macro in ioctl wrappers
gem_set_caching, function in ioctl wrappers
gem_set_domain, function in ioctl wrappers
gem_set_tiling, function in ioctl wrappers
gem_sw_finish, function in ioctl wrappers
gem_sync, function in ioctl wrappers
gem_userptr, function in ioctl wrappers
gem_uses_full_ppgtt, function in ioctl wrappers
gem_uses_ppgtt, function in ioctl wrappers
gem_wait, function in ioctl wrappers
gem_write, function in ioctl wrappers
igt_get_all_cairo_formats, function in Framebuffer
igt_get_cairo_ctx, function in Framebuffer
igt_get_gpgpu_fillfunc, function in Batch Buffer
igt_get_media_fillfunc, function in Batch Buffer
igt_get_media_spinfunc, function in Batch Buffer
igt_get_render_copyfunc, function in Batch Buffer
igt_get_runtime_pm_status, function in aux
igt_get_stable_obj_count, function in debugfs
igt_get_stop_rings, function in GT
igt_global_mmio, variable in I/O

H

HANG_ALLOW_BAN, macro in GT
HANG_ALLOW_CAPTURE, macro in GT
igt_hang_ctx, function in GT
HANG_POISON, macro in GT
igt_hang_ring, function in GT
igt_hang_ring_t, struct in GT
HAS_BLT_RING, macro in Chipset
HAS_BSD_RING, macro in Chipset
HAS_CPT, macro in Chipset
HAS_IBX, macro in Chipset
HAS_LPT, macro in Chipset
HAS_PCH_SPLIT, macro in Chipset
HAS_VEBOX_RING, macro in Chipset
igt_helper_process, struct in Core

I

I915_TILING_Yf, macro in Batch Buffer
I915_TILING_Ys, macro in Batch Buffer
igt_info, macro in Core
igt_init_aperture_trashers, function in aux
INREG, function in I/O
INREG16, function in I/O
INREG8, function in I/O
igt_install_exit_handler, function in Core
intel_batchbuffer, struct in Batch Buffer
intel_batchbuffer_alloc, function in Batch Buffer
intel_batchbuffer_data, function in Batch Buffer
intel_batchbuffer_emit_dword, function in Batch Buffer
intel_batchbuffer_emit_reloc, function in Batch Buffer
intel_batchbuffer_flush, function in Batch Buffer
intel_batchbuffer_flush_on_ring, function in Batch Buffer
intel_batchbuffer_flush_with_context, function in Batch Buffer
intel_batchbuffer_free, function in Batch Buffer
intel_batchbuffer_require_space, function in Batch Buffer
intel_batchbuffer_reset, function in Batch Buffer
intel_batchbuffer_set_context, function in Batch Buffer
intel_batchbuffer_space, function in Batch Buffer
intel_blt_copy, function in Batch Buffer
intel_check_pch, function in Chipset
intel_copy_bo, function in Batch Buffer
intel_detect_and_clear_missed_interrupts, function in GT
intel_dpio_reg_read, function in I/O
intel_dpio_reg_write, function in I/O
intel_flisdsi_reg_read, function in I/O
intel_flisdsi_reg_write, function in I/O
intel_gen, function in Chipset
intel_get_avail_ram_mb, function in aux
intel_get_drm_devid, function in Chipset
intel_get_pci_device, function in Chipset
intel_get_total_ram_mb, function in aux
intel_get_total_swap_mb, function in aux
intel_iosf_sb_read, function in I/O
intel_iosf_sb_write, function in I/O
intel_mmio_use_dump_file, function in I/O
intel_mmio_use_pci_bar, function in I/O
intel_nc_read, function in I/O
intel_nc_write, function in I/O
intel_pipe_crc_source, enum in debugfs
intel_punit_read, function in I/O
intel_punit_write, function in I/O
intel_purge_vm_caches, function in aux
intel_register_access_fini, function in I/O
intel_register_access_init, function in I/O
intel_register_access_needs_fakewake, function in I/O
intel_register_read, function in I/O
intel_register_write, function in I/O
intel_require_memory, function in aux
igt_interactive_debug, variable in Core
IS_915, macro in Chipset
IS_945, macro in Chipset
IS_945GM, macro in Chipset
IS_965, macro in Chipset
IS_9XX, macro in Chipset
IS_BROADWATER, macro in Chipset
IS_BROADWELL, macro in Chipset
IS_BROXTON, macro in Chipset
IS_CHERRYVIEW, macro in Chipset
IS_CRESTLINE, macro in Chipset
IS_G33, macro in Chipset
IS_G45, macro in Chipset
IS_G4X, macro in Chipset
IS_GEN2, macro in Chipset
IS_GEN3, macro in Chipset
IS_GEN4, macro in Chipset
IS_GEN5, macro in Chipset
IS_GEN6, macro in Chipset
IS_GEN7, macro in Chipset
IS_GEN8, macro in Chipset
IS_GEN9, macro in Chipset
IS_GM45, macro in Chipset
IS_HASWELL, macro in Chipset
IS_HSW_GT1, macro in Chipset
IS_HSW_GT2, macro in Chipset
IS_HSW_GT3, macro in Chipset
IS_ILD, macro in Chipset
IS_ILM, macro in Chipset
IS_INTEL, macro in Chipset
IS_IVYBRIDGE, macro in Chipset
IS_KABYLAKE, macro in Chipset
IS_KBL_GT1, macro in Chipset
IS_KBL_GT2, macro in Chipset
IS_KBL_GT3, macro in Chipset
IS_KBL_GT4, macro in Chipset
IS_MOBILE, macro in Chipset
IS_SKL_GT1, macro in Chipset
IS_SKL_GT2, macro in Chipset
IS_SKL_GT3, macro in Chipset
IS_SKL_GT4, macro in Chipset
IS_SKYLAKE, macro in Chipset
is_valid_utf8, function in uwildmat
IS_VALLEYVIEW, macro in Chipset

K

kmstest_connector_config, struct in KMS
kmstest_connector_status_str, function in KMS
kmstest_connector_type_str, function in KMS
kmstest_dump_mode, function in KMS
kmstest_edid_add_3d, function in KMS
kmstest_encoder_type_str, function in KMS
kmstest_force_connector, function in KMS
kmstest_force_connector_state, enum in KMS
kmstest_force_edid, function in KMS
kmstest_free_connector_config, function in KMS
kmstest_get_connector_config, function in KMS
kmstest_get_connector_default_mode, function in KMS
kmstest_get_pipe_from_crtc_id, function in KMS
kmstest_get_property, function in KMS
kmstest_pipe_name, function in KMS
kmstest_plane_name, function in KMS
kmstest_port_name, macro in KMS
kmstest_probe_connector_config, function in KMS
kmstest_restore_vt_mode, function in KMS
kmstest_set_connector_dpms, function in KMS
kmstest_set_vt_graphics_mode, function in KMS
kmstest_unset_all_crtcs, function in KMS
igt_kms_get_alt_edid, function in KMS
igt_kms_get_base_edid, function in KMS

L

LOCAL_DMA_BUF_BASE, macro in ioctl wrappers
LOCAL_DMA_BUF_IOCTL_SYNC, macro in ioctl wrappers
local_dma_buf_sync, struct in ioctl wrappers
LOCAL_DMA_BUF_SYNC_END, macro in ioctl wrappers
LOCAL_DMA_BUF_SYNC_READ, macro in ioctl wrappers
LOCAL_DMA_BUF_SYNC_RW, macro in ioctl wrappers
LOCAL_DMA_BUF_SYNC_START, macro in ioctl wrappers
LOCAL_DMA_BUF_SYNC_VALID_FLAGS_MASK, macro in ioctl wrappers
LOCAL_DMA_BUF_SYNC_WRITE, macro in ioctl wrappers
LOCAL_DRM_CAP_ADDFB2_MODIFIERS, macro in ioctl wrappers
LOCAL_DRM_FORMAT_MOD_NONE, macro in ioctl wrappers
LOCAL_DRM_FORMAT_MOD_VENDOR_INTEL, macro in ioctl wrappers
LOCAL_DRM_IOCTL_MODE_ADDFB2, macro in ioctl wrappers
local_drm_mode_fb_cmd2, struct in ioctl wrappers
LOCAL_DRM_MODE_FB_MODIFIERS, macro in ioctl wrappers
local_fourcc_mod_code, macro in ioctl wrappers
LOCAL_I915_FORMAT_MOD_X_TILED, macro in ioctl wrappers
LOCAL_I915_FORMAT_MOD_Yf_TILED, macro in ioctl wrappers
LOCAL_I915_FORMAT_MOD_Y_TILED, macro in ioctl wrappers
local_i915_gem_context_param, struct in ioctl wrappers
LOCAL_I915_GEM_USERPTR, macro in ioctl wrappers
local_i915_gem_userptr, struct in ioctl wrappers
LOCAL_IOCTL_I915_GEM_USERPTR, macro in ioctl wrappers
igt_lock_mem, function in aux
igt_log, function in Core
IGT_LOG_DOMAIN, macro in Core
igt_log_level, enum in Core

M

igt_main, macro in Core
max, macro in aux
igt_media_spinfunc_t, user_function in Batch Buffer
min, macro in aux
mmap64, macro in drmtest

N

num_trash_bos, variable in aux

O

igt_only_list_subtests, function in Core
igt_open_forcewake_handle, function in GT
igt_opt_handler_t, user_function in Core
igt_output_get_mode, function in KMS
igt_output_get_plane, function in KMS
igt_output_name, function in KMS
igt_output_override_mode, function in KMS
igt_output_set_pipe, function in KMS
igt_output_t, struct in KMS
OUTREG, function in I/O
OUTREG16, function in I/O
OUTREG8, function in I/O
OUT_BATCH, macro in Batch Buffer
OUT_RELOC, macro in Batch Buffer
OUT_RELOC_FENCED, macro in Batch Buffer

P

igt_paint_color, function in Framebuffer
igt_paint_color_alpha, function in Framebuffer
igt_paint_color_gradient, function in Framebuffer
igt_paint_image, function in Framebuffer
igt_paint_test_pattern, function in Framebuffer
pch_type, enum in Chipset
igt_permute_array, function in aux
igt_pipe, struct in KMS
pipe, enum in KMS
igt_pipe_crc_collect_crc, function in debugfs
igt_pipe_crc_free, function in debugfs
igt_pipe_crc_get_crcs, function in debugfs
igt_pipe_crc_new, function in debugfs
igt_pipe_crc_new_nonblock, function in debugfs
igt_pipe_crc_start, function in debugfs
igt_pipe_crc_stop, function in debugfs
igt_pipe_crc_t, typedef in debugfs
igt_pipe_t, typedef in KMS
igt_plane, enum in KMS
igt_plane_set_fb, function in KMS
igt_plane_set_panning, function in KMS
igt_plane_set_position, function in KMS
igt_plane_set_rotation, function in KMS
igt_plane_set_size, function in KMS
igt_plane_t, struct in KMS
igt_pm_enable_audio_runtime_pm, function in Power Management
igt_pm_enable_sata_link_power_management, function in Power Management
igt_pm_restore_sata_link_power_management, function in Power Management
port, enum in KMS
igt_post_hang_ring, function in GT
prime_fd_to_handle, function in ioctl wrappers
prime_get_size, function in ioctl wrappers
prime_handle_to_fd, function in ioctl wrappers
prime_handle_to_fd_for_mmap, function in ioctl wrappers
prime_sync_end, function in ioctl wrappers
prime_sync_start, function in ioctl wrappers
igt_print_activity, function in aux
igt_progress, function in aux

R

igt_remove_fb, function in Framebuffer
igt_render_copyfunc_t, user_function in Batch Buffer
igt_require, macro in Core
igt_require_f, macro in Core
igt_require_fb_modifiers, function in ioctl wrappers
igt_require_hang_ring, function in GT
igt_require_pipe_crc, function in debugfs
igt_reset_connectors, function in KMS
igt_reset_timeout, function in Core
igt_rotation_t, enum in KMS
igt_runtime_pm_status, enum in aux
igt_run_in_simulation, function in Core

S

igt_setup_clflush, function in GT
igt_setup_runtime_pm, function in aux
igt_set_module_param, function in aux
igt_set_module_param_int, function in aux
igt_set_stop_rings, function in GT
igt_set_timeout, function in Core
igt_simple_init, macro in Core
igt_simple_init_parse_opts, function in Core
igt_simple_main, macro in Core
igt_skip, function in Core
igt_skip_check, macro in Core
igt_skip_on, macro in Core
igt_skip_on_f, macro in Core
igt_skip_on_simulation, function in Core
SLOW_QUICK, macro in Core
igt_stats_fini, function in Stats
igt_stats_get_iqm, function in Stats
igt_stats_get_iqr, function in Stats
igt_stats_get_max, function in Stats
igt_stats_get_mean, function in Stats
igt_stats_get_median, function in Stats
igt_stats_get_min, function in Stats
igt_stats_get_quartiles, function in Stats
igt_stats_get_range, function in Stats
igt_stats_get_std_deviation, function in Stats
igt_stats_get_trimean, function in Stats
igt_stats_get_variance, function in Stats
igt_stats_init, function in Stats
igt_stats_init_with_size, function in Stats
igt_stats_is_population, function in Stats
igt_stats_push, function in Stats
igt_stats_push_array, function in Stats
igt_stats_push_float, function in Stats
igt_stats_set_population, function in Stats
igt_stats_t, struct in Stats
igt_stop_hang_helper, function in GT
igt_stop_helper, function in Core
stop_ring_flags, enum in GT
igt_stop_signal_helper, function in aux
igt_subtest, macro in Core
igt_subtest_f, macro in Core
igt_subtest_init, macro in Core
igt_subtest_init_parse_opts, function in Core
igt_subtest_name, function in Core
igt_success, function in Core
igt_swap, macro in aux
igt_system_hibernate_autoresume, function in aux
igt_system_suspend_autoresume, function in aux

T

IGT_TEST_DESCRIPTION, macro in Core
igt_text_align, enum in Framebuffer
igt_tokencat, macro in Core
igt_to_stop_ring_flag, function in GT
igt_trash_aperture, function in aux
trash_bos, variable in aux

U

igt_unlock_mem, function in aux
uwildmat, enum in uwildmat
uwildmat_poison, function in uwildmat
uwildmat_simple, function in uwildmat

V

igt_vc4_create_bo, function in VC4
igt_vc4_get_cleared_bo, function in VC4
igt_vc4_mmap_bo, function in VC4
igt_vlog, function in Core

W

igt_wait, macro in aux
igt_waitchildren, function in Core
igt_waitchildren_timeout, function in Core
igt_wait_for_pm_status, function in aux
igt_wait_for_vblank, function in KMS
igt_wait_helper, function in Core
igt_warn, macro in Core
igt_warn_on, macro in Core
igt_warn_on_f, macro in Core
igt_write_fb_to_png, function in Framebuffer
intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/home.png0000644000175000017500000000040012665337377021771 00000000000000PNG  IHDRabKGD pHYs B(xtIME &IDAT8ҽ Aߞf`n v`6`/`Yܡ`f&k$,} 0b+ԸaQW~b O e{y N[L}.piBzmm o.I]7^[;%:VIENDB`intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/intel-gpu-tools-debugfs.html0000644000175000017500000012074412665337377025716 00000000000000 debugfs: intel-gpu-tools Reference Manual

debugfs

debugfs — Support code for debugfs features

Types and Values

typedef igt_pipe_crc_t
  igt_crc_t
enum intel_pipe_crc_source
#define DROP_UNBOUND
#define DROP_BOUND
#define DROP_RETIRE
#define DROP_ACTIVE
#define DROP_ALL

Includes

#include <igt.h>

Description

This library provides helpers to access debugfs features. On top of some basic functions to access debugfs files with e.g. igt_debugfs_open() it also provides higher-level wrappers for some debugfs features

Pipe CRC Support

This library wraps up the kernel's support for capturing pipe CRCs into a neat and tidy package. For the detailed usage see all the functions which work on igt_pipe_crc_t. This is supported on all platforms and outputs.

Actually using pipe CRCs to write modeset tests is a bit tricky though, so there is no way to directly check a CRC: Both the details of the plane blending, color correction and other hardware and how exactly the CRC is computed at each tap point vary by hardware generation and are not disclosed.

The only way to use igt_crc_t CRCs therefore is to compare CRCs among each another either for equality or difference. Otherwise CRCs must be treated as completely opaque values. Note that not even CRCs from different pipes or tap points on the same platform can be compared. Hence only use igt_assert_crc_equal() to inspect CRC values captured by the same igt_pipe_crc_t object.


Other debugfs interface wrappers

This covers the miscellaneous debugfs interface wrappers:

  • drm/i915 supports interfaces to evict certain classes of gem buffer objects, see igt_drop_caches_set().

  • drm/i915 supports an interface to disable prefaulting, useful to test slow paths in ioctls. See igt_disable_prefault().

Functions

igt_debugfs_open ()

int
igt_debugfs_open (const char *filename,
                  int mode);

This opens a debugfs file as a Unix file descriptor. The filename should be relative to the drm device's root, i.e. without "drm/<minor>".

Parameters

filename

name of the debugfs node to open

 

mode

mode bits as used by open()

 

Returns

The Unix file descriptor for the debugfs file or -1 if that didn't work out.


igt_debugfs_fopen ()

FILE *
igt_debugfs_fopen (const char *filename,
                   const char *mode);

This opens a debugfs file as a libc FILE. The filename should be relative to the drm device's root, i.e. without "drm/<minor>".

Parameters

filename

name of the debugfs node to open

 

mode

mode string as used by fopen()

 

Returns

The libc FILE pointer for the debugfs file or NULL if that didn't work out.


igt_debugfs_search ()

bool
igt_debugfs_search (const char *filename,
                    const char *substring);

Searches each line in filename for the substring specified in substring .

Parameters

filename

file name

 

substring

string to search for in filename

 

Returns

True if the substring is found to occur in filename


igt_debugfs_read()

#define             igt_debugfs_read(filename, buf)

This is just a convenience wrapper for __igt_debugfs_read. See its documentation.

Parameters

filename

name of the debugfs file

 

buf

buffer where the contents will be stored, allocated by the caller.

 

igt_assert_crc_equal ()

void
igt_assert_crc_equal (igt_crc_t *a,
                      igt_crc_t *b);

Compares two CRC values and fails the testcase if they don't match with igt_fail(). Note that due to CRC collisions CRC based testcase can only assert that CRCs match, never that they are different. Otherwise there might be random testcase failures when different screen contents end up with the same CRC by chance.

Parameters

a

first pipe CRC value

 

b

second pipe CRC value

 

igt_crc_to_string ()

char *
igt_crc_to_string (igt_crc_t *crc);

This formats crc into a string buffer which is owned by igt_crc_to_string(). The next call will override the buffer again, which makes this multithreading unsafe.

This should only ever be used for diagnostic debug output.

Parameters

crc

pipe CRC value to print

 

igt_require_pipe_crc ()

void
igt_require_pipe_crc (void);

Convenience helper to check whether pipe CRC capturing is supported by the kernel. Uses igt_skip to automatically skip the test/subtest if this isn't the case.


igt_pipe_crc_new ()

igt_pipe_crc_t *
igt_pipe_crc_new (enum pipe pipe,
                  enum intel_pipe_crc_source source);

This sets up a new pipe CRC capture object for the given pipe and source in blocking mode.

Parameters

pipe

display pipe to use as source

 

source

CRC tap point to use as source

 

Returns

A pipe CRC object for the given pipe and source . The library assumes that the source is always available since recent kernels support at least INTEL_PIPE_CRC_SOURCE_AUTO everywhere.


igt_pipe_crc_new_nonblock ()

igt_pipe_crc_t *
igt_pipe_crc_new_nonblock (enum pipe pipe,
                           enum intel_pipe_crc_source source);

This sets up a new pipe CRC capture object for the given pipe and source in nonblocking mode.

Parameters

pipe

display pipe to use as source

 

source

CRC tap point to use as source

 

Returns

A pipe CRC object for the given pipe and source . The library assumes that the source is always available since recent kernels support at least INTEL_PIPE_CRC_SOURCE_AUTO everywhere.


igt_pipe_crc_free ()

void
igt_pipe_crc_free (igt_pipe_crc_t *pipe_crc);

Frees all resources associated with pipe_crc .

Parameters

pipe_crc

pipe CRC object

 

igt_pipe_crc_start ()

void
igt_pipe_crc_start (igt_pipe_crc_t *pipe_crc);

Starts the CRC capture process on pipe_crc .

Parameters

pipe_crc

pipe CRC object

 

igt_pipe_crc_stop ()

void
igt_pipe_crc_stop (igt_pipe_crc_t *pipe_crc);

Stops the CRC capture process on pipe_crc .

Parameters

pipe_crc

pipe CRC object

 

igt_pipe_crc_get_crcs ()

int
igt_pipe_crc_get_crcs (igt_pipe_crc_t *pipe_crc,
                       int n_crcs,
                       igt_crc_t **out_crcs);

Read n_crcs from pipe_crc . This function blocks until n_crcs are retrieved. out_crcs is alloced by this function and must be released with free() by the caller.

Callers must start and stop the capturing themselves by calling igt_pipe_crc_start() and igt_pipe_crc_stop().

Parameters

pipe_crc

pipe CRC object

 

n_crcs

number of CRCs to capture

 

out_crcs

buffer pointer for the captured CRC values

 

Returns

The number of CRCs captured. Should be equal to n_crcs in blocking mode, but can be less (even zero) in non-blocking mode.


igt_pipe_crc_collect_crc ()

void
igt_pipe_crc_collect_crc (igt_pipe_crc_t *pipe_crc,
                          igt_crc_t *out_crc);

Read a single CRC from pipe_crc . This function blocks until the CRC is retrieved. out_crc must be allocated by the caller.

This function takes care of the pipe_crc book-keeping, it will start/stop the collection of the CRC.

This function also calls the interactive debug with the "crc" domain, so you can make use of this feature to actually see the screen that is being CRC'd.

Parameters

pipe_crc

pipe CRC object

 

out_crc

buffer for the captured CRC values

 

igt_drop_caches_set ()

void
igt_drop_caches_set (uint64_t val);

This calls the debugfs interface the drm/i915 GEM driver exposes to drop or evict certain classes of gem buffer objects.

Parameters

val

bitmask for DROP_* values

 

igt_disable_prefault ()

void
igt_disable_prefault (void);

Disable prefaulting in certain gem ioctls through the debugfs interface. As usual this installs an exit handler to clean up and re-enable prefaulting even when the test exited abnormally.

igt_enable_prefault() will enable normale operation again.


igt_enable_prefault ()

void
igt_enable_prefault (void);

Enable prefault (again) through the debugfs interface.


igt_get_stable_obj_count ()

int
igt_get_stable_obj_count (int driver);

This puts the driver into a stable (quiescent) state and then returns the current number of gem buffer objects as reported in the i915_gem_objects debugFS interface.

Parameters

driver

fd to drm/i915 GEM driver

 

Types and Values

igt_pipe_crc_t

typedef struct _igt_pipe_crc igt_pipe_crc_t;

Pipe CRC support structure. Needs to be allocated and set up with igt_pipe_crc_new() for a specific pipe and pipe CRC source value.


igt_crc_t

typedef struct {
	uint32_t frame;
	int n_words;
	uint32_t crc[5];
} igt_crc_t;

Pipe CRC value. All other members than frame are private and should not be inspected by testcases.

Members

uint32_t frame;

frame number of the capture CRC

 

int n_words;

internal field, don't access

 

uint32_t crc[5];

internal field, don't access

 

enum intel_pipe_crc_source

Enumeration of all supported pipe CRC sources. Not all platforms and all outputs support all of them. Generic tests should just use INTEL_PIPE_CRC_SOURCE_AUTO. It should always map to an end-of-pipe CRC suitable for checking planes, cursor, color correction and any other output-agnostic features.

Members

INTEL_PIPE_CRC_SOURCE_NONE

No source

 

INTEL_PIPE_CRC_SOURCE_PLANE1

Plane 1

 

INTEL_PIPE_CRC_SOURCE_PLANE2

Plane 2

 

INTEL_PIPE_CRC_SOURCE_PF

Panel Filter

 

INTEL_PIPE_CRC_SOURCE_PIPE

Pipe

 

INTEL_PIPE_CRC_SOURCE_TV

TV

 

INTEL_PIPE_CRC_SOURCE_DP_B

DisplayPort B

 

INTEL_PIPE_CRC_SOURCE_DP_C

DisplayPort C

 

INTEL_PIPE_CRC_SOURCE_DP_D

DisplayPort D

 

INTEL_PIPE_CRC_SOURCE_AUTO

Automatic source selection

 

INTEL_PIPE_CRC_SOURCE_MAX

Number of available sources

 

DROP_UNBOUND

#define DROP_UNBOUND 0x1

Drop all currently unbound gem buffer objects from the cache.


DROP_BOUND

#define DROP_BOUND 0x2

Drop all inactive objects which are bound into some gpu address space.


DROP_RETIRE

#define DROP_RETIRE 0x4

Wait for all outstanding gpu commands to complete, but do not take any further actions.


DROP_ACTIVE

#define DROP_ACTIVE 0x8

Also drop active objects once retired.


DROP_ALL

#define             DROP_ALL
intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/igt-drm-tests.html0000644000175000017500000001111112665337377023725 00000000000000 DRM Tests: intel-gpu-tools Reference Manual

DRM Tests

DRM Tests — Tests for libdrm behaviour.

Description

drm_import_export

Subtests

import-close-race-flink
import-close-race-prime
flink
prime

drm_read

Call read(drm) and see if it behaves.

Subtests

invalid-buffer
fault-buffer
empty-block
empty-nonblock
short-buffer-block
short-buffer-nonblock

drm_vma_limiter

Check whether the libdrm vma limiter works.


drm_vma_limiter_cached


drm_vma_limiter_cpu


drm_vma_limiter_gtt

intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/index.html0000644000175000017500000001313712665337377022343 00000000000000 intel-gpu-tools Reference Manual: intel-gpu-tools Reference Manual

for intel-gpu-tools 1.14 .


API Reference
drmtest — Base library for drm tests and tools
Core — Core i-g-t testing support
Stats — Tools for statistical analysis
debugfs — Support code for debugfs features
Draw — drawing helpers for tests
KMS — Kernel modesetting support library
Framebuffer — Framebuffer handling and drawing library
aux — Auxiliary libraries and support functions
GT — GT support library
Power Management — Power Management related helpers
ioctl wrappers — ioctl wrappers and related functions
Batch Buffer — Batchbuffer and blitter support
Chipset — Feature macros and chipset helpers
I/O — Register access and sideband I/O library
Test Programs
Common Features — Features available in all test programs
Core Tests — Tests for core drm ioctls and behaviour.
DRM Tests — Tests for libdrm behaviour.
DRV Tests — Tests for overall driver behaviour.
GEM Tests — Tests for core drm ioctls and behaviour.
KMS Tests — Mode setting tests
PM Tests — Tests for power management features
Prime Tests — Buffer sharing tests
Gen 3 Tests — Gen 3 specific tests
Sysfs Tests — Sysfs tests
Debugfs Tests — Debugfs tests
Glossary
Annotation Glossary
API Index
Index of deprecated API
intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/igt-test-programs-common-features.html0000644000175000017500000001130612665337377027722 00000000000000 Common Features: intel-gpu-tools Reference Manual

Common Features

Common Features — Features available in all test programs

Command Line Options

All tests support the following command line options:

--list-subtests

list the available subtests and exit

--run-subtest subtest

run the specified subtest

--debug[=log-domain]

print extra debugging information when running tests and optionally only show the messages from the specified log domain (use "application" to specify the default application domain)

--help-description

print a short description of the test and exit

--help

print help and exit

Exit Status

The following exit status codes are defined:

Name Value Description
IGT_EXIT_SUCCESS 0 The test was successful
IGT_EXIT_SKIP 77 The test was skipped
IGT_EXIT_TIMEOUT 78 The test took longer than expected and was stopped
IGT_EXIT_INVALID 79 An invalid option or subtest was specified

Any other exit status indicates a test failure.

intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/right-insensitive.png0000644000175000017500000000056512665337377024530 00000000000000PNG  IHDRabKGD pHYs B(xtIME ^IDAT8͒J` /S_$AqrW(>m"]\(49.Nd39{eM#MSIιEiHz|3{̲l3,KkV'@EEQlwyiq]Kh4:mĦ,;ts\aR5/7'Wps׭I,K1=0j0Wg> PU𻤝0 ]?qCҫιg~kA_IENDB`intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/intel-gpu-tools-Power-Management.html0000644000175000017500000001617612665337377027450 00000000000000 Power Management: intel-gpu-tools Reference Manual

Power Management

Power Management — Power Management related helpers

Includes

#include <igt.h>

Description

This library provides various helpers to enable power management for, and in some cases subsequently allow restoring the old behaviour of, various external components that by default are set up in a way that interferes with the testing of our power management functionality.

Functions

igt_pm_enable_audio_runtime_pm ()

void
igt_pm_enable_audio_runtime_pm (void);

We know that if we don't enable audio runtime PM, snd_hda_intel will never release its power well refcount, and we'll never reach the LPSP state. There's no guarantee that it will release the power well if we enable runtime PM, but at least we can try.

We don't have any assertions on open since the user may not even have snd_hda_intel loaded, which is not a problem.


igt_pm_enable_sata_link_power_management ()

int8_t *
igt_pm_enable_sata_link_power_management
                               (void);

Enable the min_power policy for SATA link power management. Without this we cannot reach deep runtime power states.

We don't have any assertions on open since the system might not have a SATA host.

Returns

An opaque pointer to the data needed to restore the default values after the test has terminated, or NULL if SATA link power management is not supported. This pointer should be freed when no longer used (typically after having called restore_sata_link_power_management()).


igt_pm_restore_sata_link_power_management ()

void
igt_pm_restore_sata_link_power_management
                               (int8_t *pm_data);

Restore the link power management policies to the values prior to enabling min_power.

Caveat: If the system supports hotplugging and hotplugging takes place during our testing so that the hosts change numbers we might restore the settings to the wrong hosts.

Parameters

pm_data

An opaque pointer with saved link PM policies; If NULL is passed we force enable the "max_performance" policy.

 

Types and Values

intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/intel-gpu-tools-Framebuffer.html0000644000175000017500000017330512665337377026524 00000000000000 Framebuffer: intel-gpu-tools Reference Manual

Framebuffer

Framebuffer — Framebuffer handling and drawing library

Functions

void igt_calc_fb_size ()
unsigned int igt_create_fb_with_bo_size ()
unsigned int igt_create_fb ()
unsigned int igt_create_color_fb ()
unsigned int igt_create_pattern_fb ()
unsigned int igt_create_color_pattern_fb ()
unsigned int igt_create_image_fb ()
unsigned int igt_create_stereo_fb ()
void igt_remove_fb ()
cairo_t * igt_get_cairo_ctx ()
void igt_paint_color ()
void igt_paint_color_alpha ()
void igt_paint_color_gradient ()
void igt_paint_test_pattern ()
void igt_paint_image ()
void igt_write_fb_to_png ()
int igt_cairo_printf_line ()
uint32_t igt_bpp_depth_to_drm_format ()
uint32_t igt_drm_format_to_bpp ()
const char * igt_format_str ()
void igt_get_all_cairo_formats ()

Types and Values

typedef cairo_surface_t
typedef cairo_t
struct igt_fb
enum igt_text_align

Includes

#include <igt.h>

Description

This library contains helper functions for handling kms framebuffer objects using igt_fb structures to track all the metadata. igt_create_fb() creates a basic framebuffer and igt_remove_fb() cleans everything up again.

It also supports drawing using the cairo library and provides some simplified helper functions to easily draw test patterns. The main function to create a cairo drawing context for a framebuffer object is igt_get_cairo_ctx().

Finally it also pulls in the drm fourcc headers and provides some helper functions to work with these pixel format codes.

Functions

igt_calc_fb_size ()

void
igt_calc_fb_size (int fd,
                  int width,
                  int height,
                  int bpp,
                  uint64_t tiling,
                  unsigned *size_ret,
                  unsigned *stride_ret);

This function returns valid stride and size values for a framebuffer with the specified parameters.

Parameters

fd

the DRM file descriptor

 

width

width of the framebuffer in pixels

 

height

height of the framebuffer in pixels

 

bpp

bytes per pixel of the framebuffer

 

tiling

tiling layout of the framebuffer (as framebuffer modifier)

 

size_ret

returned size for the framebuffer

 

stride_ret

returned stride for the framebuffer

 

igt_create_fb_with_bo_size ()

unsigned int
igt_create_fb_with_bo_size (int fd,
                            int width,
                            int height,
                            uint32_t format,
                            uint64_t tiling,
                            struct igt_fb *fb,
                            unsigned  bo_size,
                            unsigned  bo_stride);

This function allocates a gem buffer object suitable to back a framebuffer with the requested properties and then wraps it up in a drm framebuffer object of the requested size. All metadata is stored in fb .

The backing storage of the framebuffer is filled with all zeros, i.e. black for rgb pixel formats.

Parameters

fd

open i915 drm file descriptor

 

width

width of the framebuffer in pixel

 

height

height of the framebuffer in pixel

 

format

drm fourcc pixel format code

 

tiling

tiling layout of the framebuffer (as framebuffer modifier)

 

fb

pointer to an igt_fb structure

 

bo_size

size of the backing bo (0 for automatic size)

 

bo_stride

stride of the backing bo (0 for automatic stride)

 

Returns

The kms id of the created framebuffer.


igt_create_fb ()

unsigned int
igt_create_fb (int fd,
               int width,
               int height,
               uint32_t format,
               uint64_t tiling,
               struct igt_fb *fb);

This function allocates a gem buffer object suitable to back a framebuffer with the requested properties and then wraps it up in a drm framebuffer object. All metadata is stored in fb .

The backing storage of the framebuffer is filled with all zeros, i.e. black for rgb pixel formats.

Parameters

fd

open i915 drm file descriptor

 

width

width of the framebuffer in pixel

 

height

height of the framebuffer in pixel

 

format

drm fourcc pixel format code

 

tiling

tiling layout of the framebuffer

 

fb

pointer to an igt_fb structure

 

Returns

The kms id of the created framebuffer.


igt_create_color_fb ()

unsigned int
igt_create_color_fb (int fd,
                     int width,
                     int height,
                     uint32_t format,
                     uint64_t tiling,
                     double r,
                     double g,
                     double b,
                     struct igt_fb *fb);

This function allocates a gem buffer object suitable to back a framebuffer with the requested properties and then wraps it up in a drm framebuffer object. All metadata is stored in fb .

Compared to igt_create_fb() this function also fills the entire framebuffer with the given color, which is useful for some simple pipe crc based tests.

Parameters

fd

open i915 drm file descriptor

 

width

width of the framebuffer in pixel

 

height

height of the framebuffer in pixel

 

format

drm fourcc pixel format code

 

tiling

tiling layout of the framebuffer

 

r

red value to use as fill color

 

g

green value to use as fill color

 

b

blue value to use as fill color

 

fb

pointer to an igt_fb structure

 

Returns

The kms id of the created framebuffer on success or a negative error code on failure.


igt_create_pattern_fb ()

unsigned int
igt_create_pattern_fb (int fd,
                       int width,
                       int height,
                       uint32_t format,
                       uint64_t tiling,
                       struct igt_fb *fb);

This function allocates a gem buffer object suitable to back a framebuffer with the requested properties and then wraps it up in a drm framebuffer object. All metadata is stored in fb .

Compared to igt_create_fb() this function also draws the standard test pattern into the framebuffer.

Parameters

fd

open i915 drm file descriptor

 

width

width of the framebuffer in pixel

 

height

height of the framebuffer in pixel

 

format

drm fourcc pixel format code

 

tiling

tiling layout of the framebuffer

 

fb

pointer to an igt_fb structure

 

Returns

The kms id of the created framebuffer on success or a negative error code on failure.


igt_create_color_pattern_fb ()

unsigned int
igt_create_color_pattern_fb (int fd,
                             int width,
                             int height,
                             uint32_t format,
                             uint64_t tiling,
                             double r,
                             double g,
                             double b,
                             struct igt_fb *fb);

This function allocates a gem buffer object suitable to back a framebuffer with the requested properties and then wraps it up in a drm framebuffer object. All metadata is stored in fb .

Compared to igt_create_fb() this function also fills the entire framebuffer with the given color, and then draws the standard test pattern into the framebuffer.

Parameters

fd

open i915 drm file descriptor

 

width

width of the framebuffer in pixel

 

height

height of the framebuffer in pixel

 

format

drm fourcc pixel format code

 

tiling

tiling layout of the framebuffer

 

r

red value to use as fill color

 

g

green value to use as fill color

 

b

blue value to use as fill color

 

fb

pointer to an igt_fb structure

 

Returns

The kms id of the created framebuffer on success or a negative error code on failure.


igt_create_image_fb ()

unsigned int
igt_create_image_fb (int drm_fd,
                     int width,
                     int height,
                     uint32_t format,
                     uint64_t tiling,
                     const char *filename,
                     struct igt_fb *fb);

Create a framebuffer with the specified image. If width is zero the image width will be used. If height is zero the image height will be used.

Parameters

drm_fd

open i915 drm file descriptor

 

width

width of the framebuffer in pixel or 0

 

height

height of the framebuffer in pixel or 0

 

format

drm fourcc pixel format code

 

tiling

tiling layout of the framebuffer

 

filename

filename of the png image to draw

 

fb

pointer to an igt_fb structure

 

Returns

The kms id of the created framebuffer on success or a negative error code on failure.


igt_create_stereo_fb ()

unsigned int
igt_create_stereo_fb (int drm_fd,
                      drmModeModeInfo *mode,
                      uint32_t format,
                      uint64_t tiling);

Create a framebuffer for use with the stereo 3D mode specified by mode .

Parameters

drm_fd

open i915 drm file descriptor

 

mode

A stereo 3D mode.

 

format

drm fourcc pixel format code

 

tiling

tiling layout of the framebuffer

 

Returns

The kms id of the created framebuffer on success or a negative error code on failure.


igt_remove_fb ()

void
igt_remove_fb (int fd,
               struct igt_fb *fb);

This function releases all resources allocated in igt_create_fb() for fb . Note that if this framebuffer is still in use on a primary plane the kernel will disable the corresponding crtc.

Parameters

fd

open i915 drm file descriptor

 

fb

pointer to an igt_fb structure

 

igt_get_cairo_ctx ()

cairo_t *
igt_get_cairo_ctx (int fd,
                   struct igt_fb *fb);

This initializes a cairo surface for fb and then allocates a drawing context for it. The return cairo drawing context should be released by calling cairo_destroy(). This also sets a default font for drawing text on framebuffers.

Parameters

fd

open i915 drm file descriptor

 

fb

pointer to an igt_fb structure

 

Returns

The created cairo drawing context.


igt_paint_color ()

void
igt_paint_color (cairo_t *cr,
                 int x,
                 int y,
                 int w,
                 int h,
                 double r,
                 double g,
                 double b);

This functions draws a solid rectangle with the given color using the drawing context cr .

Parameters

cr

cairo drawing context

 

x

pixel x-coordination of the fill rectangle

 

y

pixel y-coordination of the fill rectangle

 

w

width of the fill rectangle

 

h

height of the fill rectangle

 

r

red value to use as fill color

 

g

green value to use as fill color

 

b

blue value to use as fill color

 

igt_paint_color_alpha ()

void
igt_paint_color_alpha (cairo_t *cr,
                       int x,
                       int y,
                       int w,
                       int h,
                       double r,
                       double g,
                       double b,
                       double a);

This functions draws a rectangle with the given color and alpha values using the drawing context cr .

Parameters

cr

cairo drawing context

 

x

pixel x-coordination of the fill rectangle

 

y

pixel y-coordination of the fill rectangle

 

w

width of the fill rectangle

 

h

height of the fill rectangle

 

r

red value to use as fill color

 

g

green value to use as fill color

 

b

blue value to use as fill color

 

a

alpha value to use as fill color

 

igt_paint_color_gradient ()

void
igt_paint_color_gradient (cairo_t *cr,
                          int x,
                          int y,
                          int w,
                          int h,
                          int r,
                          int g,
                          int b);

This functions draws a gradient into the rectangle which fades in from black to the given values using the drawing context cr .

Parameters

cr

cairo drawing context

 

x

pixel x-coordination of the fill rectangle

 

y

pixel y-coordination of the fill rectangle

 

w

width of the fill rectangle

 

h

height of the fill rectangle

 

r

red value to use as fill color

 

g

green value to use as fill color

 

b

blue value to use as fill color

 

igt_paint_test_pattern ()

void
igt_paint_test_pattern (cairo_t *cr,
                        int width,
                        int height);

This functions draws an entire set of test patterns for the given visible area using the drawing context cr . This is useful for manual visual inspection of displayed framebuffers.

The test patterns include

  • corner markers to check for over/underscan and

  • a set of color and b/w gradients.

Parameters

cr

cairo drawing context

 

width

width of the visible area

 

height

height of the visible area

 

igt_paint_image ()

void
igt_paint_image (cairo_t *cr,
                 const char *filename,
                 int dst_x,
                 int dst_y,
                 int dst_width,
                 int dst_height);

This function can be used to draw a scaled version of the supplied png image, which is loaded from the package data directory.

Parameters

cr

cairo drawing context

 

filename

filename of the png image to draw

 

dst_x

pixel x-coordination of the destination rectangle

 

dst_y

pixel y-coordination of the destination rectangle

 

dst_width

width of the destination rectangle

 

dst_height

height of the destination rectangle

 

igt_write_fb_to_png ()

void
igt_write_fb_to_png (int fd,
                     struct igt_fb *fb,
                     const char *filename);

This function stores the contents of the supplied framebuffer into a png image stored at filename .

Parameters

fd

open i915 drm file descriptor

 

fb

pointer to an igt_fb structure

 

filename

target name for the png image

 

igt_cairo_printf_line ()

int
igt_cairo_printf_line (cairo_t *cr,
                       enum igt_text_align align,
                       double yspacing,
                       const char *fmt,
                       ...);

This is a little helper to draw text onto framebuffers. All the initial setup (like setting the font size and the moving to the starting position) still needs to be done manually with explicit cairo calls on cr .

Parameters

cr

cairo drawing context

 

align

text alignment

 

yspacing

additional y-direction feed after this line

 

fmt

format string

 

...

optional arguments used in the format string

 

Returns

The width of the drawn text.


igt_bpp_depth_to_drm_format ()

uint32_t
igt_bpp_depth_to_drm_format (int bpp,
                             int depth);

Parameters

bpp

desired bits per pixel

 

depth

desired depth

 

Returns

The rgb drm fourcc pixel format code corresponding to the given bpp and depth values. Fails hard if no match was found.


igt_drm_format_to_bpp ()

uint32_t
igt_drm_format_to_bpp (uint32_t drm_format);

Parameters

drm_format

drm fourcc pixel format code

 

Returns

The bits per pixel for the given drm fourcc pixel format code. Fails hard if no match was found.


igt_format_str ()

const char *
igt_format_str (uint32_t drm_format);

Parameters

drm_format

drm fourcc pixel format code

 

Returns

Human-readable fourcc pixel format code for drm_format or "invalid" no match was found.


igt_get_all_cairo_formats ()

void
igt_get_all_cairo_formats (const uint32_t **formats,
                           int *format_count);

This functions returns an array of all the drm fourcc codes supported by cairo and this library.

Parameters

formats

pointer to pointer to store the allocated formats array

 

format_count

pointer to integer to store the size of the allocated array

 

Types and Values

cairo_surface_t

typedef struct _cairo_surface cairo_surface_t;

cairo_t

typedef struct _cairo cairo_t;

struct igt_fb

struct igt_fb {
	uint32_t fb_id;
	uint32_t gem_handle;
	uint32_t drm_format;
	int width;
	int height;
	unsigned stride;
	uint64_t tiling;
	unsigned size;
	cairo_surface_t *cairo_surface;
	uint32_t src_x;
	uint32_t src_y;
	uint32_t src_w;
	uint32_t src_h;
};

enum igt_text_align

Members

align_left

   

align_bottom

   

align_right

   

align_top

   

align_vcenter

   

align_hcenter

   
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GT

GT — GT support library

Types and Values

Includes

#include <igt.h>

Description

This library provides various auxiliary helper functions to handle general interactions with the GT like forcewake handling, injecting hangs or stopping engines.

Functions

igt_require_hang_ring ()

void
igt_require_hang_ring (int fd,
                       int ring);

Convenience helper to check whether advanced hang injection is supported by the kernel. Uses igt_skip to automatically skip the test/subtest if this isn't the case.

Note that we can't simply just call this from igt_hang_ring since some tests want to exercise gpu wedging behavior. For which we intentionally disable gpu reset support, but still want to inject a hang, see for example tests/gem_eio.c Instead, we expect that the first invocation of igt_require_hand_ring be from a vanilla context and use the has_gpu_reset() determined then for all later instances. This allows us the convenience of double checking when injecting hangs, whilst pushing the complexity to the tests that are deliberating trying to break the box.

This function is also controlled by the environment variables:

IGT_HANG (boolean) - if false, skip all tests that try to inject a hang. Default: true

IGT_HANG_WITHOUT_RESET (boolean) - if true, allow the hang even if the kernel does not support GPU recovery. The machine will be wedged afterwards (and so require a reboot between testing), but it does allow limited testing to be done under hang injection. Default: false

Parameters

fd

open i915 drm file descriptor

 

ring

execbuf ring flag

 

igt_hang_ctx ()

struct igt_hang_ring
igt_hang_ctx (int fd,
              uint32_t ctx,
              int ring,
              unsigned  flags,
              uint64_t *offset);

igt_hang_ring ()

struct igt_hang_ring
igt_hang_ring (int fd,
               int ring);

This helper function injects a hanging batch into ring . It returns a igt_hang_ring_t structure which must be passed to igt_post_hang_ring() for hang post-processing (after the gpu hang interaction has been tested.

Parameters

fd

open i915 drm file descriptor

 

ring

execbuf ring flag

 

Returns

Structure with helper internal state for igt_post_hang_ring().


igt_post_hang_ring ()

void
igt_post_hang_ring (int fd,
                    struct igt_hang_ring arg);

This function does the necessary post-processing after a gpu hang injected with igt_hang_ring().

Parameters

fd

open i915 drm file descriptor

 

arg

hang state from igt_hang_ring()

 

igt_force_gpu_reset ()

void
igt_force_gpu_reset (void);

forces a gpu reset using the i915_wedged debugfs interface. To be used to recover from situations where the hangcheck didn't trigger and/or the gpu is stuck, either because the test manually disabled gpu resets or because the test hit an hangcheck bug


igt_fork_hang_helper ()

void
igt_fork_hang_helper (void);

Fork a child process using igt_fork_helper to hang the default engine of the GPU at regular intervals.

This is useful to exercise slow running code (such as aperture placement) which needs to be robust against a GPU reset.

This function automatically skips when test requirements aren't met using igt_skip().


igt_stop_hang_helper ()

void
igt_stop_hang_helper (void);

Stops the child process spawned with igt_fork_hang_helper().

In tests with subtests this function can be called outside of failure catching code blocks like igt_fixture or igt_subtest.


igt_open_forcewake_handle ()

int
igt_open_forcewake_handle (void);

This functions opens the debugfs forcewake file and so prevents the GT from suspending. The reference is automatically dropped when the is closed.

Returns

The file descriptor of the forcewake handle or -1 if that didn't work out.


igt_to_stop_ring_flag ()

enum stop_ring_flags
igt_to_stop_ring_flag (int ring);

This converts the specified ring to a ring flag to be used with igt_get_stop_rings() and igt_set_stop_rings().

Parameters

ring

the specified ring flag from execbuf ioctl (I915_EXEC_*)

 

Returns

Ring flag for the given ring.


igt_set_stop_rings ()

void
igt_set_stop_rings (enum stop_ring_flags flags);

This writes flags to 'i915_ring_stop' debugfs entry. Driver will prevent the CPU from writing tail pointer for the ring that flags specify. Note that the ring is not stopped right away. Instead any further command emissions won't be executed after the flag is set.

This is the least invasive way to make the GPU stuck. Hence you must set this after a batch submission with it's own invalid or endless looping instructions. In this case it is merely for giving notification for the driver that this was simulated hang, as the batch would have caused hang in any case. On the other hand if you use a valid or noop batch and want to hang the ring (GPU), you must set corresponding flag before submitting the batch.

Driver checks periodically if a ring is making any progress, and if it is not, it will declare the ring to be hung and will reset the GPU. After reset, the driver will clear flags in 'i915_ring_stop'

Note: Always when hanging the GPU, use igt_set_stop_rings() to notify the driver. Driver controls hang log messaging based on these flags and thus prevents false positives on logs.

Parameters

flags

Ring flags to write

 

igt_get_stop_rings ()

enum stop_ring_flags
igt_get_stop_rings (void);

Read current ring flags from 'i915_ring_stop' debugfs entry.

Returns

Current ring flags.


igt_setup_clflush ()

int
igt_setup_clflush (void);

igt_clflush_range ()

void
igt_clflush_range (void *addr,
                   int size);

intel_detect_and_clear_missed_interrupts ()

unsigned
intel_detect_and_clear_missed_interrupts
                               (int fd);

Types and Values

igt_hang_ring_t

typedef struct {
	unsigned handle;
	unsigned ctx;
	unsigned ban;
	unsigned flags;
} igt_hang_ring_t;

HANG_POISON

#define HANG_POISON 0xc5c5c5c5

HANG_ALLOW_BAN

#define HANG_ALLOW_BAN 1

HANG_ALLOW_CAPTURE

#define HANG_ALLOW_CAPTURE 2

enum stop_ring_flags

Enumeration of all supported flags for igt_set_stop_rings().

Members

STOP_RING_NONE

Can be used to clear the pending stop (warning: hang might be declared already). Returned by igt_get_stop_rings() if there is no currently stopped rings.

 

STOP_RING_RENDER

Render ring

 

STOP_RING_BSD

Video encoding/decoding ring

 

STOP_RING_BLT

Blitter ring

 

STOP_RING_VEBOX

Video enhancement ring

 

STOP_RING_ALL

All rings

 

STOP_RING_ALLOW_ERRORS

Driver will not omit expected DRM_ERRORS

 

STOP_RING_ALLOW_BAN

Driver will use context ban policy

 

STOP_RING_DEFAULTS

STOP_RING_ALL | STOP_RING_ALLOW_ERRORS

 
intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/right.png0000644000175000017500000000040512665337377022163 00000000000000PNG  IHDRabKGD pHYs B(xtIME!GIDAT8үa?MIdEr,-hAIl ry}sX6 !9#D r$-Br$G"$;WZ&!cq \`軀O=QoufIENDB`intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/intel-gpu-tools-Chipset.html0000644000175000017500000006452412665337377025701 00000000000000 Chipset: intel-gpu-tools Reference Manual

Chipset

Chipset — Feature macros and chipset helpers

Functions

struct pci_device * intel_get_pci_device ()
uint32_t intel_get_drm_devid ()
int intel_gen ()
void intel_check_pch ()
#define IS_MOBILE()
#define IS_G45()
#define IS_GM45()
#define IS_G4X()
#define IS_ILD()
#define IS_ILM()
#define IS_915()
#define IS_945GM()
#define IS_945()
#define IS_G33()
#define IS_GEN2()
#define IS_GEN3()
#define IS_GEN4()
#define IS_GEN5()
#define IS_GEN6()
#define IS_GEN7()
#define IS_IVYBRIDGE()
#define IS_VALLEYVIEW()
#define IS_HSW_GT1()
#define IS_HSW_GT2()
#define IS_HSW_GT3()
#define IS_HASWELL()
#define IS_BROADWELL()
#define IS_CHERRYVIEW()
#define IS_GEN8()
#define IS_SKL_GT1()
#define IS_SKL_GT2()
#define IS_SKL_GT3()
#define IS_SKL_GT4()
#define IS_KBL_GT1()
#define IS_KBL_GT2()
#define IS_KBL_GT3()
#define IS_KBL_GT4()
#define IS_KABYLAKE()
#define IS_SKYLAKE()
#define IS_BROXTON()
#define IS_GEN9()
#define IS_965()
#define IS_9XX()
#define IS_INTEL()
#define HAS_PCH_SPLIT()
#define HAS_BLT_RING()
#define HAS_BSD_RING()
#define IS_BROADWATER()
#define IS_CRESTLINE()
#define HAS_VEBOX_RING()

Types and Values

enum pch_type
#define HAS_IBX
#define HAS_CPT
#define HAS_LPT

Includes

#include <igt.h>

Description

This library mostly provides feature macros which use raw pci device ids. It also provides a few more helper functions to handle pci devices, chipset detection and related issues.

Functions

intel_get_pci_device ()

struct pci_device *
intel_get_pci_device (void);

Looks up the main graphics pci device using libpciaccess.

Returns

The pci_device, exits the program on any failures.


intel_get_drm_devid ()

uint32_t
intel_get_drm_devid (int fd);

Queries the kernel for the pci device id corresponding to the drm file descriptor.

Parameters

fd

open i915 drm file descriptor

 

Returns

The devid, exits the program on any failures.


intel_gen ()

int
intel_gen (uint32_t devid);

Computes the Intel GFX generation for the give device id.

Parameters

devid

pci device id

 

Returns

The GFX generation on successful lookup, -1 on failure.


intel_check_pch ()

void
intel_check_pch (void);

Detects the PCH chipset type of the running systems and fills in the results into the global intel_pch variable.


IS_MOBILE()

#define             IS_MOBILE(devid)

IS_G45()

#define             IS_G45(devid)

IS_GM45()

#define IS_GM45(devid)		((devid) == PCI_CHIP_GM45_GM)

IS_G4X()

#define IS_G4X(devid)		(IS_G45(devid) || IS_GM45(devid))

IS_ILD()

#define IS_ILD(devid)		((devid) == PCI_CHIP_ILD_G)

IS_ILM()

#define IS_ILM(devid)		((devid) == PCI_CHIP_ILM_G)

IS_915()

#define             IS_915(devid)

IS_945GM()

#define             IS_945GM(devid)

IS_945()

#define             IS_945(devid)

IS_G33()

#define             IS_G33(devid)

IS_GEN2()

#define             IS_GEN2(devid)

IS_GEN3()

#define IS_GEN3(devid)		(IS_945(devid) || IS_915(devid))

IS_GEN4()

#define             IS_GEN4(devid)

IS_GEN5()

#define IS_GEN5(devid)		(IS_ILD(devid) || IS_ILM(devid))

IS_GEN6()

#define             IS_GEN6(devid)

IS_GEN7()

#define             IS_GEN7(devid)

IS_IVYBRIDGE()

#define             IS_IVYBRIDGE(devid)

IS_VALLEYVIEW()

#define             IS_VALLEYVIEW(devid)

IS_HSW_GT1()

#define             IS_HSW_GT1(devid)

IS_HSW_GT2()

#define             IS_HSW_GT2(devid)

IS_HSW_GT3()

#define             IS_HSW_GT3(devid)

IS_HASWELL()

#define             IS_HASWELL(devid)

IS_BROADWELL()

#define             IS_BROADWELL(devid)

IS_CHERRYVIEW()

#define             IS_CHERRYVIEW(devid)

IS_GEN8()

#define             IS_GEN8(devid)

IS_SKL_GT1()

#define             IS_SKL_GT1(devid)

IS_SKL_GT2()

#define             IS_SKL_GT2(devid)

IS_SKL_GT3()

#define             IS_SKL_GT3(devid)

IS_SKL_GT4()

#define             IS_SKL_GT4(devid)

IS_KBL_GT1()

#define             IS_KBL_GT1(devid)

IS_KBL_GT2()

#define             IS_KBL_GT2(devid)

IS_KBL_GT3()

#define             IS_KBL_GT3(devid)

IS_KBL_GT4()

#define             IS_KBL_GT4(devid)

IS_KABYLAKE()

#define             IS_KABYLAKE(devid)

IS_SKYLAKE()

#define             IS_SKYLAKE(devid)

IS_BROXTON()

#define             IS_BROXTON(devid)

IS_GEN9()

#define             IS_GEN9(devid)

IS_965()

#define             IS_965(devid)

IS_9XX()

#define             IS_9XX(devid)

IS_INTEL()

#define             IS_INTEL(devid)

HAS_PCH_SPLIT()

#define             HAS_PCH_SPLIT(devid)

HAS_BLT_RING()

#define             HAS_BLT_RING(devid)

HAS_BSD_RING()

#define             HAS_BSD_RING(devid)

IS_BROADWATER()

#define             IS_BROADWATER(devid)

IS_CRESTLINE()

#define             IS_CRESTLINE(devid)

HAS_VEBOX_RING()

#define HAS_VEBOX_RING(devid)   (IS_HASWELL(devid))

Types and Values

enum pch_type

Members

PCH_NONE

   

PCH_IBX

   

PCH_CPT

   

PCH_LPT

   

HAS_IBX

#define HAS_IBX (intel_pch == PCH_IBX)

HAS_CPT

#define HAS_CPT (intel_pch == PCH_CPT)

HAS_LPT

#define HAS_LPT (intel_pch == PCH_LPT)
intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/test-programs.html0000644000175000017500000001363312665337377024044 00000000000000 Test Programs: intel-gpu-tools Reference Manual

Test Programs

Common Features — Features available in all test programs
Core Tests — Tests for core drm ioctls and behaviour.
DRM Tests — Tests for libdrm behaviour.
DRV Tests — Tests for overall driver behaviour.
GEM Tests — Tests for core drm ioctls and behaviour.
KMS Tests — Mode setting tests
PM Tests — Tests for power management features
Prime Tests — Buffer sharing tests
Gen 3 Tests — Gen 3 specific tests
Sysfs Tests — Sysfs tests
Debugfs Tests — Debugfs tests
Glossary

Glossary

The following terms are commonly used in test names to describe various features of the test and can be used to filter and select particular tests.

invalid

Negative tests to validate kernel interface input validation.

hang

Tests that provoke gpu hangs.

swap

Tests that force their full working sets through swap.

thrash

Tests that tend to have really slow forward progress due to gtt/memory/.. thrashing.

crc

Tests that use the display CRC infrastructure to check the results.

tiled

Tests that exercise behaviour on tiled buffers.

tiling

Tests that exercise behaviour on tiled buffers.

rte

Runtime environment checks.

ctx

Tests that exercise the hardware context support.

render

Tests which apply to the render ring.

blt

Tests which apply to the blt ring.

bsd

Tests which apply to the bsd ring.

vebox

Tests which apply to the vebox ring.

exec

Tests that exercise the execbuf code in various ways.

rpm

Runtime power management tests.

intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/intel-gpu-tools-IO.html0000644000175000017500000011174012665337377024602 00000000000000 I/O: intel-gpu-tools Reference Manual

I/O

I/O — Register access and sideband I/O library

Functions

Types and Values

extern void * igt_global_mmio

Includes

#include <igt.h>

Description

This library provides register I/O helpers in both a basic version and a more fancy version which also handles forcewake and can optionally check registers against a white-list. All register function are compatible. Hence the same code can be used to decode registers with either of them, or also from a dump file using intel_mmio_use_dump_file().

Furthermore this library also provides helper functions for accessing the various sideband interfaces found on Valleyview/Baytrail based platforms.

Functions

intel_mmio_use_pci_bar ()

void
intel_mmio_use_pci_bar (struct pci_device *pci_dev);

Sets up igt_global_mmio to point at the mmio bar.

pci_dev can be obtained from intel_get_pci_device().

Parameters

pci_dev

intel gracphis pci device

 

intel_mmio_use_dump_file ()

void
intel_mmio_use_dump_file (char *file);

Sets up igt_global_mmio to point at the data contained in file . This allows the same code to get reused for dumping and decoding from running hardware as from register dumps.

Parameters

file

name of the register dump file to open

 

intel_register_access_init ()

int
intel_register_access_init (struct pci_device *pci_dev,
                            int safe);

This initializes the new register access library, which supports forcewake handling and also allows register access to be checked with an explicit whitelist.

It also initializes igt_global_mmio like intel_mmio_use_pci_bar().

pci_dev can be obtained from intel_get_pci_device().

Parameters

pci_dev

intel graphics pci device

 

safe

use safe register access tables

 

intel_register_access_fini ()

void
intel_register_access_fini (void);

Clean up the register access helper initialized with intel_register_access_init().


intel_register_read ()

uint32_t
intel_register_read (uint32_t reg);

32-bit read of the register at offset . This function only works when the new register access helper is initialized with intel_register_access_init().

Compared to INREG() it can do optional checking with the register access white lists.

Parameters

reg

register offset

 

Returns

The value read from the register.


intel_register_write ()

void
intel_register_write (uint32_t reg,
                      uint32_t val);

32-bit write to the register at offset . This function only works when the new register access helper is initialized with intel_register_access_init().

Compared to OUTREG() it can do optional checking with the register access white lists.

Parameters

reg

register offset

 

val

value to write

 

intel_register_access_needs_fakewake ()

int
intel_register_access_needs_fakewake (void);

Returns

Non-zero when forcewake initialization failed.


INREG ()

uint32_t
INREG (uint32_t reg);

32-bit read of the register at offset reg . This function only works when the new register access helper is initialized with intel_register_access_init().

This function directly accesses the igt_global_mmio without safety checks.

Parameters

reg

register offset

 

Returns

The value read from the register.


INREG16 ()

uint16_t
INREG16 (uint32_t reg);

16-bit read of the register at offset reg . This function only works when the new register access helper is initialized with intel_register_access_init().

This function directly accesses the igt_global_mmio without safety checks.

Parameters

reg

register offset

 

Returns

The value read from the register.


INREG8 ()

uint8_t
INREG8 (uint32_t reg);

8-bit read of the register at offset reg . This function only works when the new register access helper is initialized with intel_register_access_init().

This function directly accesses the igt_global_mmio without safety checks.

Parameters

reg

register offset

 

Returns

The value read from the register.


OUTREG ()

void
OUTREG (uint32_t reg,
        uint32_t val);

32-bit write of val to the register at offset reg . This function only works when the new register access helper is initialized with intel_register_access_init().

This function directly accesses the igt_global_mmio without safety checks.

Parameters

reg

register offset

 

val

value to write

 

OUTREG16 ()

void
OUTREG16 (uint32_t reg,
          uint16_t val);

16-bit write of val to the register at offset reg . This function only works when the new register access helper is initialized with intel_register_access_init().

This function directly accesses the igt_global_mmio without safety checks.

Parameters

reg

register offset

 

val

value to write

 

OUTREG8 ()

void
OUTREG8 (uint32_t reg,
         uint8_t val);

8-bit write of val to the register at offset reg . This function only works when the new register access helper is initialized with intel_register_access_init().

This function directly accesses the igt_global_mmio without safety checks.

Parameters

reg

register offset

 

val

value to write

 

intel_dpio_reg_read ()

uint32_t
intel_dpio_reg_read (uint32_t reg,
                     int phy);

32-bit read of the register at offset through the DPIO sideband port.

Parameters

reg

register offset

 

phy

DPIO PHY to use

 

Returns

The value read from the register.


intel_dpio_reg_write ()

void
intel_dpio_reg_write (uint32_t reg,
                      uint32_t val,
                      int phy);

32-bit write of the register at offset through the DPIO sideband port.

Parameters

reg

register offset

 

val

value to write

 

phy

dpio PHY to use

 

intel_flisdsi_reg_read ()

uint32_t
intel_flisdsi_reg_read (uint32_t reg);

intel_flisdsi_reg_write ()

void
intel_flisdsi_reg_write (uint32_t reg,
                         uint32_t val);

intel_iosf_sb_read ()

uint32_t
intel_iosf_sb_read (uint32_t port,
                    uint32_t reg);

intel_iosf_sb_write ()

void
intel_iosf_sb_write (uint32_t port,
                     uint32_t reg,
                     uint32_t val);

intel_punit_read ()

int
intel_punit_read (uint32_t addr,
                  uint32_t *val);

32-bit read of the register at offset through the P-Unit sideband port.

Parameters

addr

register offset

 

val

pointer to store the read result

 

Returns

0 when the register access succeeded, negative errno code on failure.


intel_punit_write ()

int
intel_punit_write (uint32_t addr,
                   uint32_t val);

32-bit write of the register at offset through the P-Unit sideband port.

Parameters

addr

register offset

 

val

value to write

 

Returns

0 when the register access succeeded, negative errno code on failure.


intel_nc_read ()

int
intel_nc_read (uint32_t addr,
               uint32_t *val);

32-bit read of the register at offset through the NC sideband port.

Parameters

addr

register offset

 

val

pointer to starge for the read result

 

Returns

0 when the register access succeeded, negative errno code on failure.


intel_nc_write ()

int
intel_nc_write (uint32_t addr,
                uint32_t val);

32-bit write of the register at offset through the NC sideband port.

Parameters

addr

register offset

 

val

value to write

 

Returns

0 when the register access succeeded, negative errno code on failure.

Types and Values

igt_global_mmio

extern void *igt_global_mmio;

Pointer to the register range, initialized using intel_register_access_init() or intel_mmio_use_dump_file(). It is not recommended to use this directly.

intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/html/up-insensitive.png0000644000175000017500000000056612665337377024040 00000000000000PNG  IHDRabKGD pHYs B(xtIMEwIIDAT8?/Qϙ?[u$VHTDۈBM+! Debugfs Tests: intel-gpu-tools Reference Manual

Debugfs Tests

Debugfs Tests — Debugfs tests

Programs

Description

debugfs_emon_crash

intel-gpu-tools-1.14/docs/reference/intel-gpu-tools/igt_test_programs.xml0000644000175000017500000002213012665336131023634 00000000000000 ]> Test Programs Common Features Features available in all test programs Command Line Options All tests support the following command line options: list the available subtests and exit run the specified subtest print extra debugging information when running tests and optionally only show the messages from the specified log domain (use "application" to specify the default application domain) print a short description of the test and exit print help and exit Exit Status The following exit status codes are defined: NameValueDescription #IGT_EXIT_SUCCESS 0 The test was successful #IGT_EXIT_SKIP 77 The test was skipped #IGT_EXIT_TIMEOUT 78 The test took longer than expected and was stopped #IGT_EXIT_INVALID 79 An invalid option or subtest was specified Any other exit status indicates a test failure. Core Tests Tests for core drm ioctls and behaviour. DRM Tests Tests for libdrm behaviour. DRV Tests Tests for overall driver behaviour. GEM Tests Tests for core drm ioctls and behaviour. KMS Tests Mode setting tests PM Tests Tests for power management features Prime Tests Buffer sharing tests Gen 3 Tests Gen 3 specific tests Sysfs Tests Sysfs tests Debugfs Tests Debugfs tests Glossary The following terms are commonly used in test names to describe various features of the test and can be used to filter and select particular tests. invalid Negative tests to validate kernel interface input validation. hang Tests that provoke gpu hangs. swap Tests that force their full working sets through swap. thrash Tests that tend to have really slow forward progress due to gtt/memory/.. thrashing. crc Tests that use the display CRC infrastructure to check the results. tiled Tests that exercise behaviour on tiled buffers. tiling Tests that exercise behaviour on tiled buffers. rte Runtime environment checks. ctx Tests that exercise the hardware context support. render Tests which apply to the render ring. blt Tests which apply to the blt ring. bsd Tests which apply to the bsd ring. vebox Tests which apply to the vebox ring. exec Tests that exercise the execbuf code in various ways. rpm Runtime power management tests. intel-gpu-tools-1.14/docs/reference/Makefile.am0000644000175000017500000000003212665336131016345 00000000000000SUBDIRS = intel-gpu-tools intel-gpu-tools-1.14/docs/Makefile.am0000644000175000017500000000002212665336131014406 00000000000000SUBDIRS=reference intel-gpu-tools-1.14/configure.ac0000644000175000017500000002412212665336131013717 00000000000000# Copyright 2005 Adam Jackson. # # Permission is hereby granted, free of charge, to any person obtaining a # copy of this software and associated documentation files (the "Software"), # to deal in the Software without restriction, including without limitation # on the rights to use, copy, modify, merge, publish, distribute, sub # license, and/or sell copies of the Software, and to permit persons to whom # the Software is furnished to do so, subject to the following conditions: # # The above copyright notice and this permission notice (including the next # paragraph) shall be included in all copies or substantial portions of the # Software. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, # FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL # ADAM JACKSON BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER # IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN # CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. # # Process this file with autoconf to produce a configure script AC_PREREQ([2.60]) AC_INIT([intel-gpu-tools], [1.14], [https://bugs.freedesktop.org/enter_bug.cgi?product=DRI&component=DRM/Intel], [intel-gpu-tools]) AC_CONFIG_SRCDIR([Makefile.am]) AC_CONFIG_HEADERS([config.h]) AC_CONFIG_MACRO_DIR([m4]) AC_CONFIG_AUX_DIR([build-aux]) AC_USE_SYSTEM_EXTENSIONS AC_SYS_LARGEFILE AC_GNU_SOURCE AC_CANONICAL_HOST AC_CANONICAL_TARGET AM_INIT_AUTOMAKE([1.12 foreign subdir-objects dist-bzip2]) AM_PATH_PYTHON([3],, [:]) AC_PROG_CC AM_PROG_LEX AC_PROG_YACC # check for gtk-doc m4_ifdef([GTK_DOC_CHECK], [ GTK_DOC_CHECK([1.14],[--flavour no-tmpl]) ],[ AM_CONDITIONAL([ENABLE_GTK_DOC], false) enable_gtk_doc=no ]) # check for rst2man for generating man pages AC_CHECK_PROG(RST2MAN, rst2man, yes, no) AM_CONDITIONAL(HAVE_RST2MAN, [test "x$RST2MAN" = xyes]) # Checks for functions, headers, structures, etc. AC_HEADER_STDC AC_CHECK_HEADERS([termios.h linux/kd.h sys/kd.h libgen.h sys/io.h]) AC_CHECK_MEMBERS([struct sysinfo.totalram],[],[],[AC_INCLUDES_DEFAULT #include ]) AC_CHECK_TYPES([sighandler_t],[],[],[AC_INCLUDES_DEFAULT #include ]) AC_CHECK_FUNCS([swapctl]) AC_CHECK_FUNCS([asprintf]) # Initialize libtool AC_DISABLE_STATIC AC_PROG_LIBTOOL # Require X.Org macros 1.16 or later for XORG_TESTSET_CFLAG m4_ifndef([XORG_MACROS_VERSION], [m4_fatal([must install xorg-macros 1.16 or later before running autoconf/autogen])]) XORG_MACROS_VERSION(1.16) XORG_DEFAULT_OPTIONS # warning flags for the assembler. We can't quite use CWARNFLAGS for it yet as # it generates waaaay too many warnings. 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It should be run with kernel modesetting enabled, and may require root privilege for correct operation. It does not require X to be running. .PP Given that it is a microbenchmark, its utility is largely for regression testing of the kernel, and not for general conclusions on graphics performance. intel-gpu-tools-1.14/man/intel_stepping.man0000644000175000017500000000106712665336131015730 00000000000000.\" shorthand for double quote that works everywhere. .ds q \N'34' .TH intel_stepping __appmansuffix__ __xorgversion__ .SH NAME intel_stepping \- Display the stepping information for an Intel GPU .SH SYNOPSIS .B intel_stepping .SH DESCRIPTION .B intel_stepping is a tool to print the stepping information for an Intel GPU, along with the PCI ID and revision used to determine it. It requires root privilege to map the graphics device. .SH BUGS Not all the known stepping IDs or chipsets are included, so the output on some devices may not be as specific as possible. intel-gpu-tools-1.14/man/intel_upload_blit_large_map.man0000644000175000017500000000122012665336131020373 00000000000000.\" shorthand for double quote that works everywhere. .ds q \N'34' .TH intel_upload_blit_large_map __appmansuffix__ __xorgversion__ .SH NAME intel_upload_blit_large_map \- microbenchmark of Intel GPU performance .SH SYNOPSIS .nf .B intel_upload_blit_large_map .fi .SH DESCRIPTION .B intel_upload_blit_large_map is a microbenchmark tool for DRM performance. It should be run with kernel modesetting enabled, and may require root privilege for correct operation. It does not require X to be running. .PP Given that it is a microbenchmark, its utility is largely for regression testing of the kernel, and not for general conclusions on graphics performance. intel-gpu-tools-1.14/man/intel_bios_reader.man0000644000175000017500000000106612665336131016354 00000000000000.\" shorthand for double quote that works everywhere. .ds q \N'34' .TH intel_bios_reader __appmansuffix__ __xorgversion__ .SH NAME intel_bios_reader \- Parses an Intel BIOS and displays many of its tables .SH SYNOPSIS .B intel_bios_reader \fIfilename\fR .SH DESCRIPTION .B intel_bios_reader is a tool to parse the contents of an Intel video BIOS file. The file can come from intel_bios_dumper. This can be used for quick debugging of video bios table handling, which is harder when done inside of the kernel graphics driver. .SH SEE ALSO .BR intel_bios_dumper (1) intel-gpu-tools-1.14/man/intel_gpu_frequency.man0000644000175000017500000000333212665336131016750 00000000000000.TH INTEL_FREQUENCY: "1" "January 2015" "intel_gpu_frequency" "User Commands" .SH NAME intel_gpu_frequency: \- manual page for intel_gpu_frequency .SH SYNOPSIS .B intel_gpu_frequency [\fI\,-e\/\fR] [\fI\,--min | --max\/\fR] [\fI\,-g\/\fR] [\fI\,-s frequency_mhz\/\fR] .SH DESCRIPTION \&A program to manipulate Intel GPU frequencies. Intel GPUs will automatically throttle the frequencies based on system demands, up when needed, down when not. This tool should only be used for debugging performance problems, or trying to get a stable frequency while benchmarking. Intel GPUs only accept specific frequencies. The tool may, or may not attempt to adjust requests to the proper frequency if they aren't correct. This may lead to non-obvious failures when setting frequency. Multiples of 50MHz is usually a safe bet. .SH OPTIONS .TP \fB\-e\fR Lock frequency to the most efficient frequency .TP \fB\-g\fR, \fB\-\-get\fR Get all the current frequency settings .TP \fB\-s\fR, \fB\-\-set\fR Lock frequency to an absolute value (MHz) .TP \fB\-c\fR, \fB\-\-custom\fR Set a min, or max frequency "min=X | max=Y" .TP \fB\-m\fR \fB\-\-max\fR Lock frequency to max frequency .TP \fB\-i\fR \fB\-\-min\fR Lock frequency to min (never a good idea, DEBUG ONLY) .TP \fB\-d\fR \fB\-\-defaults\fR Return the system to hardware defaults .TP \fB\-h\fR \fB\-\-help\fR Returns this .HP \fB\-v\fR \fB\-\-version\fR Version .SH EXAMPLES .TP \fbintel_gpu_frequency \-gmin,cur\fR Get the current and minimum frequency .TP \fbintel_gpu_frequency \-s 400\fR Lock frequency to 400Mhz .TP \fbintel_gpu_frequency \-c max=750\fR Set the max frequency to 750MHz .PP .SH "REPORTING BUGS" Report bugs to https://bugs.freedesktop.org .SH COPYRIGHT Copyright (C) 2015 Intel Corporation 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MAN_SUBST in rst .rst.$(APP_MAN_SUFFIX): $(AM_V_GEN)rst2man < $< > $@ # Tell versions [3.59,3.63) of GNU make to not export all variables. # Otherwise a system limit (for SysV at least) may be exceeded. .NOEXPORT: intel-gpu-tools-1.14/man/intel_gpu_top.man0000644000175000017500000000244112665336131015551 00000000000000.\" shorthand for double quote that works everywhere. .ds q \N'34' .TH intel_gpu_top __appmansuffix__ __xorgversion__ .SH NAME intel_gpu_top \- Display a top-like summary of Intel GPU usage .SH SYNOPSIS .nf .B intel_gpu_top .B intel_gpu_top [ parameters ] .SH DESCRIPTION .B intel_gpu_top is a tool to display usage information of an Intel GPU. It requires root privilege to map the graphics device. .SS Options .TP .B -s [samples per second] number of samples to acquire per second .TP .B -o [output file] collect usage statistics to [file]. If file is "-", run non-interactively and output statistics to stdout. .TP .B -e ["command to profile"] execute a command, and leave when it is finished. Note that the entire command with all parameters should be included as one parameter. .TP .B -h show usage notes .SH EXAMPLES .TP intel_gpu_top -o "cairo-trace-gvim.log" -s 100 -e "cairo-perf-trace /tmp/gvim" will run cairo-perf-trace with /tmp/gvim trace, non-interactively, saving the statistics into cairo-trace-gvim.log file, and collecting 100 samples per second. .PP Note that idle units are not displayed, so an entirely idle GPU will only display the ring status and header. .SH BUGS Some GPUs report some units as busy when they aren't, such that even when idle and not hung, it will show up as 100% busy. intel-gpu-tools-1.14/man/intel_gtt.man0000644000175000017500000000100512665336131014665 00000000000000.\" shorthand for double quote that works everywhere. .ds q \N'34' .TH intel_gtt __appmansuffix__ __xorgversion__ .SH NAME intel_gtt \- Dump the contents of an Intel GPU's GTT .SH SYNOPSIS .B intel_gtt .SH DESCRIPTION .B intel_gtt is a tool to view the contents of the GTT on an Intel GPU. The GTT is the page table that maps between GPU addresses and system memory. This tool can be useful in debugging the Linux AGP driver initialization of the chip or in debugging later overwriting of the GTT with garbage data. intel-gpu-tools-1.14/man/intel_upload_blit_large.man0000644000175000017500000000120012665336131017534 00000000000000.\" shorthand for double quote that works everywhere. .ds q \N'34' .TH intel_upload_blit_large __appmansuffix__ __xorgversion__ .SH NAME intel_upload_blit_large \- microbenchmark of Intel GPU performance .SH SYNOPSIS .nf .B intel_upload_blit_large .fi .SH DESCRIPTION .B intel_upload_blit_large is a microbenchmark tool for DRM performance. It should be run with kernel modesetting enabled, and may require root privilege for correct operation. It does not require X to be running. .PP Given that it is a microbenchmark, its utility is largely for regression testing of the kernel, and not for general conclusions on graphics performance. intel-gpu-tools-1.14/man/intel_audio_dump.man0000644000175000017500000000055612665336131016227 00000000000000.\" shorthand for double quote that works everywhere. .ds q \N'34' .TH intel_audio_dump __appmansuffix__ __xorgversion__ .SH NAME intel_audio_dump \- Dumps the Intel GPU registers for HDMI audio setup. .SH SYNOPSIS .B intel_audio_dump .SH DESCRIPTION .B intel_audio_dump dumps and decodes registers containing the configuration of HDMI audio handling on Intel GPUs. intel-gpu-tools-1.14/man/Makefile.am0000644000175000017500000000176612665336131014251 00000000000000appmandir = $(APP_MAN_DIR) appman_PRE = \ intel_aubdump.man \ intel_audio_dump.man \ intel_bios_dumper.man \ intel_bios_reader.man \ intel_error_decode.man \ intel_gpu_frequency.man \ intel_gpu_top.man \ intel_gtt.man \ intel_infoframes.man \ intel_lid.man \ intel_panel_fitter.man \ intel_stepping.man \ intel_upload_blit_large.man \ intel_upload_blit_large_gtt.man \ intel_upload_blit_large_map.man \ intel_upload_blit_small.man appman_DATA = $(appman_PRE:man=$(APP_MAN_SUFFIX)) # man pages in rst, only used if we have rst2man appman_RST = \ intel_reg.rst if HAVE_RST2MAN appman_DATA += $(appman_RST:rst=$(APP_MAN_SUFFIX)) endif EXTRA_DIST = $(appman_PRE) $(appman_RST) CLEANFILES = $(appman_DATA) # String replacements in MAN_SUBSTS now come from xorg-macros.m4 via configure SUFFIXES = .$(APP_MAN_SUFFIX) .man .man.$(APP_MAN_SUFFIX): $(AM_V_GEN)$(SED) $(MAN_SUBSTS) < $< > $@ # FIXME: handle MAN_SUBST in rst .rst.$(APP_MAN_SUFFIX): $(AM_V_GEN)rst2man < $< > $@ intel-gpu-tools-1.14/man/intel_lid.man0000644000175000017500000000065712665336131014653 00000000000000.\" shorthand for double quote that works everywhere. .ds q \N'34' .TH intel_lid __appmansuffix__ __xorgversion__ .SH NAME intel_lid \- Polls the values of different reports about laptop lid state. .SH SYNOPSIS .B intel_lid .SH DESCRIPTION .B intel_lid is a tool to poll ACPI and the BIOS scratch register's reporting of laptop lid state. This can be used for debugging issues with laptop modesetting for lid opening and closing. intel-gpu-tools-1.14/man/intel_aubdump.man0000644000175000017500000000212112665336131015524 00000000000000.\" shorthand for double quote that works everywhere. .ds q \N'34' .TH intel_aubdump __appmansuffix__ __xorgversion__ .SH NAME intel_aubdump \- Launch an application and capture rendering to an AUB file .SH SYNOPSIS .B intel_aubdump [\fIOPTION\fR]... \fI--\fR \fICOMMAND\fR [\fIARGUMENTS\fR] .SH DESCRIPTION .PP Run .IR COMMAND with .IR ARGUMENTS and dump an AUB file that captures buffer contents and execution of the i915 GEM application. .TP .B \-v Enable verbose mode. .TP .B \-\^\-help Output a usage message and exit. .TP .BI \-o " FILE" "\fR,\fP \-\^\-output=" FILE Write the trace output to the file .IR FILE . Default is .IR COMMAND .aub. .TP .BI \-\^\-device= ID Override the PCI ID of the drm device. This is useful for getting an aub dump for a different generation of GPU. In this mode intel_aubdump will intercept but not forward the execbuffer2 ioctl, as that would typically cause a GPU hang. .SH EXAMPLES .TP intel_aubdump -v --output=stuff.aub -- glxgears -geometry 500x500 Launches glxgears with its -geometry option and enables aub dumping with the -v and --output=stuff.aub options. intel-gpu-tools-1.14/man/intel_error_decode.man0000644000175000017500000000125712665336131016534 00000000000000.\" shorthand for double quote that works everywhere. .ds q \N'34' .TH intel_error_decode __appmansuffix__ __xorgversion__ .SH NAME intel_error_decode \- Decodes an Intel GPU dump automatically captured by the kernel at the time of an error. .SH SYNOPSIS .nf .B intel_error_decode .B intel_error_decode [ filename ] .fi .SH DESCRIPTION .B intel_error_decode is a tool that decodes the instructions and state of the GPU at the time of an error. It requires kernel 2.6.34 or newer, and either debugfs mounted on /sys/kernel/debug or /debug containing a current i915_error_state or you can pass a file containing a saved error. .SS Options .TP .B filename Decodes a previously saved error. intel-gpu-tools-1.14/man/intel_infoframes.man0000644000175000017500000000144012665336131016223 00000000000000.\" shorthand for double quote that works everywhere. .ds q \N'34' .TH intel_infoframes __appmansuffix__ __xorgversion__ .SH NAME intel_infoframes \- View and change HDMI InfoFrames .SH SYNOPSIS .B intel_infoframes .SH DESCRIPTION .B intel_infoframes is a tool to view and change the HDMI InfoFrames sent by the GPU. Its main purpose is to be used as a debugging tool. In some cases (e.g., when changing modes) the Kernel will undo the changes made by this tool. Descriptions of the InfoFrame fields can be found on the HDMI and CEA-861 specifications. Use the .B -h or .B --help options to learn how to use the command .SH LIMITATIONS Not all HDMI monitors respect the InfoFrames sent to them. Only GEN 4 or newer hardware is supported yet. .SH SEE ALSO HDMI specification, CEA-861 specification. intel-gpu-tools-1.14/man/intel_bios_dumper.man0000644000175000017500000000073512665336131016410 00000000000000.\" shorthand for double quote that works everywhere. .ds q \N'34' .TH intel_bios_dumper __appmansuffix__ __xorgversion__ .SH NAME intel_bios_dumper \- Saves the Intel video BIOS contents to a file. .SH SYNOPSIS .B intel_bios_dumper \fIfilename\fR .SH DESCRIPTION .B intel_bios_dumper is a tool to save the contents of the Intel video BIOS to a file. It can then be parsed offline for debugging issues with the video bios table handling. .SH SEE ALSO .BR intel_bios_reader(1) intel-gpu-tools-1.14/man/intel_panel_fitter.man0000644000175000017500000000265612665336131016560 00000000000000.\" shorthand for double quote that works everywhere. .ds q \N'34' .TH intel_panel_fitter __appmansuffix__ __xorgversion__ .SH NAME intel_panel_fitter \- Change the panel fitter settings .SH SYNOPSIS .B intel_panel_fitter [options] .SH DESCRIPTION .B intel_panel_fitter is a tool that allows you to change the panel fitter settings, so you can change the size of the screen being displayed on your monitor without changing the real pixel size of your desktop. The biggest use case for this tool is to work around overscan done by TVs and some monitors in interlaced mode. .SS Options .TP .B -p [pipe] pipe to be used (A, B or C, but C is only present on Ivy Bridge and newer). .TP .B -x [value] final screen width size in pixels (needs -p option). .TP .B -y [value] final screen height size in pixels (needs -p option). .TP .B -d disable panel fitter (needs -p option, ignores -x and -y options). .TP .B -l list current state of each pipe. .TP .B -h prints the help message. .SS .SH EXAMPLES .TP .B intel_panel_fitter -l will list the current status of each pipe, so you can decide what to do. .TP .B intel_panel_fitter -p A -x 1850 -y 1040 will change the pipe A size to 1850x1040 pixels. .TP .B intel_panel_fitter -p A -d will disable the panel fitter for pipe A. .SH NOTES In the future, there will be support for this feature inside the Linux Kernel. Machines older than Ironlake are still not supported, but support may be possible to implement. intel-gpu-tools-1.14/man/intel_reg.rst0000644000175000017500000001135712665336131014714 00000000000000========= intel_reg ========= --------------------------------- Intel graphics register multitool --------------------------------- :Author: Jani Nikula :Date: 2015-04-14 :Version: intel-gpu-tools :Copyright: 2015 Intel Corporation :Manual section: 1 :Manual group: General Commands Manual SYNOPSIS ======== **intel_reg** [*option* ...] *command* DESCRIPTION =========== Intel graphics register multitool. Read, write, dump, and decode Intel graphics MMIO and sideband registers, and more. OPTIONS ======= Some options are global, and some specific to commands. --verbose --------- Increase verbosity. --quiet ------- Decrease verbosity. --count=N --------- Read N registers. --binary -------- Output binary values. --all ----- Decode registers for all known platforms. --mmio=FILE ----------- Use MMIO bar from FILE. --devid=DEVID ------------- Pretend to be PCI ID DEVID. Useful with MMIO bar snapshots from other machines. --spec=PATH ----------- Read register spec from directory or file specified by PATH; see REGISTER SPEC DEFINITIONS below for details. --help ------ Show brief help. COMMANDS ======== See REGISTER REFERENCES below on how to describe registers for the commands. read [--count=N] REGISTER [...] ------------------------------- Dump each specified REGISTER, or N registers starting from each REGISTER. write REGISTER VALUE [REGISTER VALUE ...] ----------------------------------------- Write each VALUE to corresponding REGISTER. dump [--mmio=FILE --devid=DEVID] -------------------------------- Dump all registers specified in the register spec. decode REGISTER VALUE --------------------- Decode REGISTER VALUE. snapshot -------- Output the MMIO bar to stdout. The output can be used for a later invocation of dump or read with the --mmio=FILE and --devid=DEVID parameters. list ---- List the known registers. help ---- Display brief help. REGISTER REFERENCES =================== Registers are defined as [(PORTNAME|PORTNUM|MMIO-OFFSET):](REGNAME|REGADDR). PORTNAME -------- The register access method, most often MMIO, which is the default. The methods supported on all platforms are "mmio", "portio-vga", and "mmio-vga". On BYT and CHV, the sideband ports "bunit", "punit", "nc", "dpio", "gpio-nc", "cck", "ccu", "dpio2", and "flisdsi" are also supported. PORTNUM ------- Port number for the sideband ports supported on BYT and CHV. Only numbers mapped to the supported ports are allowed, arbitrary numbers are not accepted. Numbers above 0xff are automatically interpreted as MMIO offsets, not port numbers. MMIO-OFFSET ----------- Use MMIO, and add this offset to the register address. Numbers equal to or below 0xff are automatically interpreted as port numbers, not MMIO offsets. REGNAME ------- Name of the register as defined in the register spec. If MMIO offset is not specified, it is picked up from the register spec. However, ports are not; the port is a namespace for the register names. REGADDR ------- Register address. The corresponding register name need not be specified in the register spec. ENVIRONMENT =========== INTEL_REG_SPEC -------------- Path to a directory or a file containing register spec definitions. REGISTER SPEC DEFINITIONS ========================= A register spec associates register names with addresses. The spec is searched for in this order: #. Directory or file specified by the --spec option. #. Directory or file specified by the INTEL_REG_SPEC environment variable. #. Builtin register spec. Also used as fallback with a warning if the above are used but fail. If a directory is specified using --spec option or INTEL_REG_SPEC environment variable, the directory is scanned for a spec file in this order: #. File named after the PCI device id. For example, "0412". #. File named after the code name in lowercase, without punctuation. For example, "valleyview". #. File named after generation. For example, "gen7" (note that this matches valleyview, ivybridge and haswell!). Register Spec File Format ------------------------- The register spec format is briefly described below: * Empty lines and lines beginning with "#", ";", or "//" are ignored. * Lines *not* beginning with "(" are interpreted as file names, absolute or relative, to be included. * Lines beginning with "(" are interpreted as register definitions. Registers are defined as tuples ('REGNAME', 'REGADDR', 'PORTNAME|PORTNUM|MMIO-OFFSET'), as in REGISTER REFERENCES above. The port description may also be an empty string to denote MMIO. Examples: * # this is a comment, below is an include * vlv_pipe_a.txt * ('GEN6_PMINTRMSK', '0x0000a168', '') * ('MIPIA_PORT_CTRL', '0x61190', '0x180000') * ('PLL1_DW0', '0x8000', 'DPIO') BUGS ==== Reading some registers may hang the GPU or the machine. intel-gpu-tools-1.14/man/intel_upload_blit_large_gtt.man0000644000175000017500000000122012665336131020414 00000000000000.\" shorthand for double quote that works everywhere. .ds q \N'34' .TH intel_upload_blit_large_gtt __appmansuffix__ __xorgversion__ .SH NAME intel_upload_blit_large_gtt \- microbenchmark of Intel GPU performance .SH SYNOPSIS .nf .B intel_upload_blit_large_gtt .fi .SH DESCRIPTION .B intel_upload_blit_large_gtt is a microbenchmark tool for DRM performance. It should be run with kernel modesetting enabled, and may require root privilege for correct operation. It does not require X to be running. .PP Given that it is a microbenchmark, its utility is largely for regression testing of the kernel, and not for general conclusions on graphics performance. intel-gpu-tools-1.14/config.h.in0000644000175000017500000001012112665336443013454 00000000000000/* config.h.in. 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